feurig/libmaplemidi-cma/libmaple/nvic.h, branch 0.0.9-maintenance C and C++ library for STM32 ARM Cortex-M3 development boards. https://git.suspectdevices.com/feurig/libmaplemidi-cma/atom?h=0.0.9-maintenance 2011-02-16T01:00:10+00:00 undoing USART[45] -> UART[45] mistake 2011-02-16T01:00:10+00:00 Marti Bolivar mbolivar@leaflabs.com 2011-02-16T01:00:10+00:00 urn:sha1:620740bf1986311041a40bd2992d1b549f84b2ba [WIP] Code review picked up some bugs/issues. 2011-01-27T03:05:41+00:00 Marti Bolivar mbolivar@leaflabs.com 2011-01-27T03:05:41+00:00 urn:sha1:f1b64e707d8aa7548954b110368a7eb46b827794 Changed nzmichaelh's initial DMA interface to be more flexible. 2010-12-30T07:40:16+00:00 Marti Bolivar mbolivar@mit.edu 2010-12-30T02:30:42+00:00 urn:sha1:8e973f3d1ef0324e213824dc05af0f9713e7b3cb Some bugfixes in the external interrupt code were found along the way. Defines for nonexistent registers removed from nvic interface. Merge remote branch 'upstream/master' 2010-09-29T07:45:57+00:00 Michael Hope michael.hope@linaro.org 2010-09-29T07:45:57+00:00 urn:sha1:6fcd4cd306dbecf56f5b0b506a3c23762d1219fa Fixed up the build due to a missing header file. 2010-09-29T07:42:18+00:00 Michael Hope michael.hope@linaro.org 2010-09-29T07:42:18+00:00 urn:sha1:368e4fc1662c2594b2a0908900713a2555a3ed8e whitespace cleanups 2010-09-27T04:40:44+00:00 Marti Bolivar mbolivar@mit.edu 2010-09-27T04:40:44+00:00 urn:sha1:753f89de354eff212d84f3f2aff41146865da342 Enable external interrupts on all Maple GPIOs. 2010-09-22T07:17:45+00:00 Perry Hung iperry@gmail.com 2010-09-22T07:17:45+00:00 urn:sha1:c13e850abe053edaa1aad6ef7b928c6bf9288cb3 Extend the wirish attachInterrupt() and detachInterrupt() interface to work with all GPIOs. Note: The STM32 external interrupt lines are multiplexed between GPIO ports. While any GPIO can be used as an external interrupt, not all of them can be used at the same time. Each EXTI[n] line selects between PA[n], PB[n], PC[n], etc. For example, line EXTI5 can be used with STM32 pins PA5, PB5, or PC5, but not all at the same time. See table: EXTI Line Maple Pin STM32 Pin 0 D2 PA0 0 D27 PB0 0 D15 PC0 1 D3 PA1 1 D28 PB1 1 D16 PC1 2 D1 PA2 2 D17 PC2 2 D25 PD2 3 D0 PA3 3 D18 PC3 4 D10 PA4 4 D19 PC4 5 D13 PA5 5 D4 PB5 5 D20 PC5 6 D12 PA6 6 D5 PB6 6 D35 PC6 7 D11 PA7 7 D9 PB7 7 D36 PC7 8 D6 PA8 8 D14 PB8 8 D37 PC8 9 D7 PA9 9 D24 PB9 9 D38 PC9 (BUT) 10 D8 PA10 10 D29 PB10 10 D26 PC10 11 D30 PB11 12 D31 PB12 13 D32 PB13 13 D21 PC13 14 D33 PB14 14 D22 PC14 15 D34 PB15 15 D23 PC15 Fix enable/disable global irq 2010-09-15T01:59:39+00:00 Perry Hung iperry@gmail.com 2010-09-15T01:59:39+00:00 urn:sha1:1cec807e44da29c5a122e57120174f4711d95f25 Oooooops. timer fixes for maple native 2010-09-06T03:22:19+00:00 bnewbold bnewbold@robocracy.org 2010-09-06T03:22:19+00:00 urn:sha1:552da8705245a876c2e816bab93edc2cb39f94e3 Portability fixes 2010-09-01T02:05:39+00:00 bnewbold bnewbold@robocracy.org 2010-09-01T02:05:39+00:00 urn:sha1:0ccec95446d4c7f3ea47a46d267c791fb22bb8d4 Still not working but fixed a lot of merge errors