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<title>suspect-devices/circuitpython/ports/stm32/i2c.c, branch azure</title>
<subtitle>CircuitPython - a Python implementation for teaching coding with microcontrollers</subtitle>
<id>https://git.suspectdevices.com/suspect-devices/circuitpython/atom?h=azure</id>
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<updated>2018-06-15T04:10:53+00:00</updated>
<entry>
<title>stm32/i2c: Fix num_acks calculation in i2c_write for F0 and F7 MCU's.</title>
<updated>2018-06-15T04:10:53+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-06-15T04:10:53+00:00</published>
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<id>urn:sha1:bc5e8a2cb6f17bc5a9fec108a2421adc77f5cb3c</id>
<content type='text'>
Due to buffering of outgoing bytes on the I2C bus, detection of a NACK
using the ISR_NACKF flag needs to account for the case where ISR_NACKF
corresponds to the previous-to-previous byte.
</content>
</entry>
<entry>
<title>stm32: Add support for STM32F0 MCUs.</title>
<updated>2018-05-28T11:49:49+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-05-28T08:10:53+00:00</published>
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<id>urn:sha1:ea7e747979c2f27eb90f9a6ba292c500eb288dd4</id>
<content type='text'>
</content>
</entry>
<entry>
<title>stm32/i2c: Add new hardware I2C driver for F4 MCUs.</title>
<updated>2018-05-14T03:19:03+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-05-14T03:19:03+00:00</published>
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<id>urn:sha1:b21415ed4f4bcc66b9a76313e3b47483d279da11</id>
<content type='text'>
This driver uses low-level register access to control the I2C peripheral
(ie it doesn't rely on the ST HAL) and provides the same C-level API as the
existing F7 hardware driver.
</content>
</entry>
<entry>
<title>stm32/i2c: Make sure stop condition is sent after receiving addr nack.</title>
<updated>2018-05-09T05:53:09+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-05-09T05:53:09+00:00</published>
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<id>urn:sha1:e638defff453102d5d0811f7b9a596682a21e9af</id>
<content type='text'>
</content>
</entry>
<entry>
<title>stm32/i2c: Add low-level I2C driver for F7 MCUs.</title>
<updated>2018-04-24T13:48:04+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-04-24T07:34:07+00:00</published>
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<id>urn:sha1:19778d0a3c8e819fd7e7408cf9081b25911f8a3c</id>
<content type='text'>
</content>
</entry>
<entry>
<title>stm32: Rename i2c.c to pyb_i2c.c.</title>
<updated>2018-04-24T06:23:36+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-04-24T06:23:36+00:00</published>
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<id>urn:sha1:b73adcc3d90da7fd2a66b76161b661a603403506</id>
<content type='text'>
i2c.c implements the legacy pyb.I2C class so rename the file to make this
explicit, and also to make room for an improved I2C driver.
</content>
</entry>
<entry>
<title>stm32/i2c: Fully support peripheral I2C4.</title>
<updated>2018-04-10T04:33:18+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-04-10T04:33:18+00:00</published>
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<id>urn:sha1:22f1414abb538e80bda6c9c7123534923558d0fb</id>
<content type='text'>
</content>
</entry>
<entry>
<title>stm32/i2c: Update HAL macros to use new __HAL_RCC prefix.</title>
<updated>2018-04-10T04:28:39+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-04-10T04:28:39+00:00</published>
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<id>urn:sha1:69bf23c9cfacae4745c260b9a75ca5144ffb353b</id>
<content type='text'>
</content>
</entry>
<entry>
<title>stm32: Change pin_X and pyb_pin_X identifiers to be pointers to objects.</title>
<updated>2018-03-28T05:29:50+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-03-28T05:13:21+00:00</published>
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<id>urn:sha1:2dca693c24f9bcadb1e06113848fff620d8088dd</id>
<content type='text'>
Rather than pin objects themselves.  The actual object is now pin_X_obj and
defines are provided so that pin_X is &amp;pin_X_obj.  This makes it so that
code that uses pin objects doesn't need to know if they are literals or
objects (that need pointers taken) or something else.  They are just
entities that can be passed to the map_hal_pin_xxx functions.  This mirrors
how the core handles constant objects (eg mp_const_none which is
&amp;mp_const_none_obj) and allows for the possibility of different
implementations of the pin layer.

For example, prior to this patch there was the following:

    extern const pin_obj_t pin_A0;
    #define pyb_pin_X1 pin_A0
    ...
    mp_hal_pin_high(&amp;pin_A0);

and now there is:

    extern const pin_obj_t pin_A0_obj;
    #define pin_A0 (&amp;pin_A0_obj)
    #define pyb_pin_X1 pin_A0
    ...
    mp_hal_pin_high(pin_A0);

This patch should have minimal effect on board configuration files.  The
only change that may be needed is if a board has .c files that configure
pins.
</content>
</entry>
<entry>
<title>stm32: Consolidate include of genhdr/pins.h to single location in pin.h.</title>
<updated>2018-03-27T09:25:24+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-03-27T09:25:24+00:00</published>
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<id>urn:sha1:6b51eb22c8200124bd1639f542f7757edb82e736</id>
<content type='text'>
genhdr/pins.h is an internal header file that defines all of the pin
objects and it's cleaner to have pin.h include it (where the struct's for
these objects are defined) rather than an explicit include by every user.
</content>
</entry>
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