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<title>suspect-devices/circuitpython/ports/stm32/storage.c, branch azure</title>
<subtitle>CircuitPython - a Python implementation for teaching coding with microcontrollers</subtitle>
<id>https://git.suspectdevices.com/suspect-devices/circuitpython/atom?h=azure</id>
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<updated>2018-05-28T11:45:46+00:00</updated>
<entry>
<title>stm32: Allow to have no storage support if there are no block devices.</title>
<updated>2018-05-28T11:45:46+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-05-28T00:57:27+00:00</published>
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<id>urn:sha1:f497723802406c00d84b20fe5fc74b973a128ebc</id>
<content type='text'>
If no block devices are defined by a board then storage support will be
disabled.  This means there is no filesystem provided by either the
internal flash or external SPI flash.  But the VFS system can still be
enabled and filesystems provided on external devices like an SD card.
</content>
</entry>
<entry>
<title>stm32/irq: Define IRQ priorities directly as encoded hardware values.</title>
<updated>2018-05-02T04:41:02+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-05-02T04:41:02+00:00</published>
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<id>urn:sha1:a03e6c1e05203bb71ebee50af2a41de404b05078</id>
<content type='text'>
For a given IRQn (eg UART) there's no need to carry around both a PRI and
SUBPRI value (eg IRQ_PRI_UART, IRQ_SUBPRI_UART).  Instead, the IRQ_PRI_UART
value has been changed in this patch to be the encoded hardware value,
using NVIC_EncodePriority.  This way the NVIC_SetPriority function can be
used directly, instead of going through HAL_NVIC_SetPriority which must do
extra processing to encode the PRI+SUBPRI.

For a priority grouping of 4 (4 bits for preempt priority, 0 bits for the
sub-priority), which is used in the stm32 port, the IRQ_PRI_xxx constants
remain unchanged in their value.

This patch also "fixes" the use of raise_irq_pri() which should be passed
the encoded value (but as mentioned above the unencoded value is the same
as the encoded value for priority grouping 4, so there was no bug from this
error).
</content>
</entry>
<entry>
<title>stm32/storage: Provide support for a second block device.</title>
<updated>2018-03-09T14:03:27+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-03-09T14:03:27+00:00</published>
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<id>urn:sha1:0d5bccad11f2ccc11e513c3fff3ba65d1f4846b0</id>
<content type='text'>
</content>
</entry>
<entry>
<title>stm32/storage: Introduce MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE cfg.</title>
<updated>2018-03-09T13:59:43+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-03-09T13:50:27+00:00</published>
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<id>urn:sha1:626d6c9756df3f089b9f62d15f343cdf080c7f80</id>
<content type='text'>
This config variable controls whether to support storage on the internal
flash of the MCU.  It is enabled by default and should be explicitly
disabled by boards that don't want internal flash storage.
</content>
</entry>
<entry>
<title>stm32/storage: Remove all SPI-flash bdev cfg, to be provided per board.</title>
<updated>2018-03-09T13:59:43+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-03-09T13:36:22+00:00</published>
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<id>urn:sha1:d1c4bd69dfa19b10b09f193d6a6c6a2f7548614c</id>
<content type='text'>
If a board wants to use SPI flash for storage then it must now provide the
configuration itself, using the MICROPY_HW_BDEV_xxx macros.
</content>
</entry>
<entry>
<title>stm32/storage: Make spi_bdev interface take a data pointer as first arg.</title>
<updated>2018-03-09T13:59:43+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-03-09T13:22:38+00:00</published>
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<id>urn:sha1:1803e8ef221c7714e4f663c777be2f8733721f3d</id>
<content type='text'>
This allows a board to have multiple instances of the SPI block device.
</content>
</entry>
<entry>
<title>stm32/storage: Merge all misc block-dev funcs into a single ioctl func.</title>
<updated>2018-03-09T13:59:43+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-03-09T11:22:29+00:00</published>
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<id>urn:sha1:1e4caf0b1ec4dcdf2348e9e0a07a12c9f63f3176</id>
<content type='text'>
It makes it cleaner, and simpler to support multiple different block
devices.  It also allows to easily extend a given block device with new
ioctl operations.
</content>
</entry>
<entry>
<title>stm32/spibdev: Convert to use multiple block read/write interface.</title>
<updated>2018-03-02T13:13:15+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-03-02T13:13:15+00:00</published>
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<id>urn:sha1:8bd0a51ca9e5106a834b5db070855932a0b042df</id>
<content type='text'>
The spiflash driver now supports read/write of multiple blocks at a time.
</content>
</entry>
<entry>
<title>stm32/storage: Add option for bdev to supply readblock/writeblocks.</title>
<updated>2018-03-02T12:57:53+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-03-02T12:51:06+00:00</published>
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<id>urn:sha1:861080aa3d595f9b9cbfeca80c56da9785eca430</id>
<content type='text'>
If the underlying block device supports it, it's more efficient to
read/write multiple blocks at once.
</content>
</entry>
<entry>
<title>stm32/spibdev: Update to work with new spiflash driver.</title>
<updated>2018-03-02T12:55:40+00:00</updated>
<author>
<name>Damien George</name>
<email>damien.p.george@gmail.com</email>
</author>
<published>2018-03-02T12:11:47+00:00</published>
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<id>urn:sha1:a0dfc386410b3a397e8643b269e352a8930b5f53</id>
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</content>
</entry>
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