suspect-devices/circuitpython/shared-bindings/busio, branch 3.0.0-beta.1 CircuitPython - a Python implementation for teaching coding with microcontrollers https://git.suspectdevices.com/suspect-devices/circuitpython/atom?h=3.0.0-beta.1 2018-05-14T01:54:44+00:00 add timeout keyword to I2C - for bitbangio - ignored for busio 2018-05-14T01:54:44+00:00 Jerry Needell jerryneedell@gmail.com 2018-05-14T01:54:44+00:00 urn:sha1:d6c26942a5fadeb95305c86a604233257a7858db Merge remote-tracking branch 'adafruit/2.x' into merge_2x 2018-02-27T23:24:16+00:00 Scott Shawcroft scott.shawcroft@gmail.com 2018-02-27T23:24:16+00:00 urn:sha1:bf05183158c67c4ef1824c3b1296d401bc7754d8 Implement UART for 3.0 + related fixes. 2018-02-21T22:18:49+00:00 Dan Halbert halbert@halwitz.org 2018-02-21T21:30:26+00:00 urn:sha1:9b4477e1dc088d18127838310b828514cb33edea 1. UART: ported to ASF4. Allow rx-only and tx-only. Add .baudrate r/w property. 2. Make NeoPixel timing deterministic by turning off caches during NeoPixel writes. 3. Incorporate asf4 updates: a. async USART driver b. bringing Atmel START configuration closer to what we use c. Clock initialization order now specified by CIRCUITPY_GCLK_INIT_1ST and _LAST. 4. supervisor/port.c: Move commented-out clock-test pin setting to correct location. documentation: caution on SPI clock speed for SAMD21 2018-01-30T19:31:20+00:00 Dan Halbert halbert@halwitz.org 2018-01-30T19:31:20+00:00 urn:sha1:cc87363234e22b2ba3a1b91f73f3a3b3f16d01df atmel-samd: Correct computation of SPI baud rate. 2018-01-30T17:08:41+00:00 Dan Halbert halbert@halwitz.org 2018-01-30T03:52:23+00:00 urn:sha1:e550b024c5d3d6d5a7e739ae9dd2175756591f6e all: Add .frequency read-only property for busio.SPI to return actual frequency. Fix esp8266/posix_helpers.c, which was not up to date for the new long-lived/short-lived heap allocation scheme. merge from 2.2.0 + fix up board defs 2018-01-03T02:25:41+00:00 Dan Halbert halbert@halwitz.org 2018-01-03T02:25:41+00:00 urn:sha1:065e82015f0d2bd6732c62b7375fcc7af87fa0cf add SPI.write_readinto() - bidirectional SPI 2017-12-05T19:17:16+00:00 Dan Halbert halbert@halwitz.org 2017-12-05T02:49:31+00:00 urn:sha1:e75fd0e166375727fbb4c054478c9c8d329477c4 non-DMA SPI working; adding this now for testing; will continue with DMA 2017-11-17T00:09:35+00:00 Dan Halbert halbert@halwitz.org 2017-11-15T01:00:29+00:00 urn:sha1:312444bbd2a8e77ebf3c0e1983649327970e9575 Also, fixed pin mappings for rev B Metro M4: swap PA12 and PA13 on SPI 2x3 header swap A3 and A5 Comment out all frozen modules in CPX again to make room while waiting for SPI flash. Implement busio.I2c. 2017-11-07T17:59:54+00:00 Dan Halbert halbert@halwitz.org 2017-11-06T23:35:23+00:00 urn:sha1:7292984204e7ac28a5b69c23930ff7b8be003faf * Added asf4_conf/samd*/hpl_sercom_config.h * Adjusted clocks in peripheral_clk_config.h. * Put some frozen libs back in CPX for testing. * Implement common-hal I2C * Add samd*_peripherals.h in parallel with samd*_pins.h for common functions and data. * Store SERCOM index in pins table for convenience. * Canonicalize some #include guard names in various .h files. simpler reset of SERCOMs; remove unused routine Allow empty reads and writes for busio.SPI 2017-11-03T16:33:37+00:00 Radomir Dopieralski openstack@sheep.art.pl 2017-11-03T14:44:13+00:00 urn:sha1:78f6c2232ca08f80ed96d2f1ef365f5f749fec1c This is mostly for convenience, so that user code doesn't need to add additional checks. Also, bring the bitbangio into compatibility with busio wrt. empty buffers.