suspect-devices/circuitpython/shared-bindings/busio, branch 3.1.1 CircuitPython - a Python implementation for teaching coding with microcontrollers https://git.suspectdevices.com/suspect-devices/circuitpython/atom?h=3.1.1 2018-09-12T21:19:43+00:00 UART fixes and enhancements; default board object fix 2018-09-12T21:19:43+00:00 Dan Halbert halbert@halwitz.org 2018-09-12T21:19:43+00:00 urn:sha1:6a046f55c449da59cf4641ef4cf34c6b1b63da44 UART: Always allocate UART objects in the long-lived pool 2018-08-09T00:21:57+00:00 Jeff Epler jepler@gmail.com 2018-07-31T01:49:20+00:00 urn:sha1:e1b4e9b7c7cdd7a022a5ab113b68c8fa6be2c74d Particularly when they have buffers that are written via IRQ or DMA, UART objects do not relocate gracefully. If such an object is relocated to the long-lived pool after its original creation, the IRQ or DMA will write to an unexpected location within the Python heap, leading to a variety of symptoms. The most frequent symptom is inability to read from the UART. Consider the particular case of atmel-samd: usart_uart_obj_t contains a usart_async_descriptor contains a _usart_async_device. In _sercom_init_irq_param the address of this contained _usart_async_device is assigned to a global array sercom_to_sercom_dev which is later used from the interrupt context _sercom_usart_interrupt_handler to store the received data in the right ring buffer. When the UART object is relocated to the long-lived heap, there's no mechanism to re-point these internal pointers, so instead take the cowardly way and allocate the UART object as long-lived. Happily, almost all UART objects are likely to be long-lived, so this is unlikely to have a negative effect on memory usage or heap fragmentation. Closes: #1056 add timeout keyword to I2C - for bitbangio - ignored for busio 2018-05-14T01:54:44+00:00 Jerry Needell jerryneedell@gmail.com 2018-05-14T01:54:44+00:00 urn:sha1:d6c26942a5fadeb95305c86a604233257a7858db Merge remote-tracking branch 'adafruit/2.x' into merge_2x 2018-02-27T23:24:16+00:00 Scott Shawcroft scott.shawcroft@gmail.com 2018-02-27T23:24:16+00:00 urn:sha1:bf05183158c67c4ef1824c3b1296d401bc7754d8 Implement UART for 3.0 + related fixes. 2018-02-21T22:18:49+00:00 Dan Halbert halbert@halwitz.org 2018-02-21T21:30:26+00:00 urn:sha1:9b4477e1dc088d18127838310b828514cb33edea 1. UART: ported to ASF4. Allow rx-only and tx-only. Add .baudrate r/w property. 2. Make NeoPixel timing deterministic by turning off caches during NeoPixel writes. 3. Incorporate asf4 updates: a. async USART driver b. bringing Atmel START configuration closer to what we use c. Clock initialization order now specified by CIRCUITPY_GCLK_INIT_1ST and _LAST. 4. supervisor/port.c: Move commented-out clock-test pin setting to correct location. documentation: caution on SPI clock speed for SAMD21 2018-01-30T19:31:20+00:00 Dan Halbert halbert@halwitz.org 2018-01-30T19:31:20+00:00 urn:sha1:cc87363234e22b2ba3a1b91f73f3a3b3f16d01df atmel-samd: Correct computation of SPI baud rate. 2018-01-30T17:08:41+00:00 Dan Halbert halbert@halwitz.org 2018-01-30T03:52:23+00:00 urn:sha1:e550b024c5d3d6d5a7e739ae9dd2175756591f6e all: Add .frequency read-only property for busio.SPI to return actual frequency. Fix esp8266/posix_helpers.c, which was not up to date for the new long-lived/short-lived heap allocation scheme. merge from 2.2.0 + fix up board defs 2018-01-03T02:25:41+00:00 Dan Halbert halbert@halwitz.org 2018-01-03T02:25:41+00:00 urn:sha1:065e82015f0d2bd6732c62b7375fcc7af87fa0cf add SPI.write_readinto() - bidirectional SPI 2017-12-05T19:17:16+00:00 Dan Halbert halbert@halwitz.org 2017-12-05T02:49:31+00:00 urn:sha1:e75fd0e166375727fbb4c054478c9c8d329477c4 non-DMA SPI working; adding this now for testing; will continue with DMA 2017-11-17T00:09:35+00:00 Dan Halbert halbert@halwitz.org 2017-11-15T01:00:29+00:00 urn:sha1:312444bbd2a8e77ebf3c0e1983649327970e9575 Also, fixed pin mappings for rev B Metro M4: swap PA12 and PA13 on SPI 2x3 header swap A3 and A5 Comment out all frozen modules in CPX again to make room while waiting for SPI flash.