suspect-devices/circuitpython/supervisor/shared/tick.c, branch audiocore-rawsample-sinewaveCircuitPython - a Python implementation for teaching coding with microcontrollershttps://git.suspectdevices.com/suspect-devices/circuitpython/atom?h=audiocore-rawsample-sinewave2020-04-04T01:07:56+00:00Rework sleep timing2020-04-04T01:07:56+00:00Scott Shawcroftscott@tannewt.org2020-04-04T01:07:56+00:00urn:sha1:e99cf6e441db5f8f3c6378cf0a0ce2b12f1b72cd
It didn't account for background task time and could end up
sleeping for way longer than it should because the RTC compare time
had already passed.
Clean up2020-04-03T00:36:09+00:00Scott Shawcroftscott@tannewt.org2020-04-03T00:36:09+00:00urn:sha1:c248730bd1c837fe682232bf096e7260c4d5be3cInitial work for STM32. Need to fix us delay and PulseIn still.2020-03-20T19:58:34+00:00Scott Shawcroftscott@tannewt.org2020-03-20T19:58:34+00:00urn:sha1:2623022c846698d8a6b9cfab8617aa569c5aef2fFix autoreload and ticks in general2020-03-13T23:13:24+00:00Scott Shawcroftscott@tannewt.org2020-03-13T23:13:24+00:00urn:sha1:7100d5e485a93552e035476cb794145d6e194052Fix autoreload, neopixel, monotonic_ns and sleep w/o SD2020-03-13T18:12:31+00:00Scott Shawcroftscott@tannewt.org2020-03-07T02:15:16+00:00urn:sha1:418333979ae007b28855079c64ee3c65f76ecbc7First try at lowering the power consumption2020-03-13T18:12:30+00:00Scott Shawcroftscott@tannewt.org2020-03-06T01:14:54+00:00urn:sha1:6f60afe8c521011d1a2d34a2632295b483a8cee3Refine iMX RT memory layout and add three boards2020-01-18T01:36:08+00:00Scott Shawcroftscott@tannewt.org2020-01-09T04:32:45+00:00urn:sha1:7d8dac9211dab92d750a0351335b4ad3fffc05e2
Introduces a way to place CircuitPython code and data into
tightly coupled memory (TCM) which is accessible by the CPU in a
single cycle. It also frees up room in the corresponding cache for
intermittent data. Loading from external flash is slow!
The data cache is also now enabled.
Adds support for the iMX RT 1021 chip. Adds three new boards:
* iMX RT 1020 EVK
* iMX RT 1060 EVK
* Teensy 4.0
Related to #2492, #2472 and #2477. Fixes #2475.
supervisor: tick: add supervisor_fake_tick2019-11-20T20:37:13+00:00Jeff Eplerjepler@gmail.com2019-11-20T16:15:44+00:00urn:sha1:46c5775ba4b9c4905f8e3f4c1842c2c6c04d8fb0supervisor: tick: Rewrite without atomics2019-11-20T20:37:13+00:00Jeff Eplerjepler@gmail.com2019-11-20T16:15:11+00:00urn:sha1:70719597ab7b3785a6641b08ef3cb82d9b6b459brun_background_tasks: Do nothing unless there has been a tick2019-11-18T17:26:48+00:00Jeff Eplerjepler@gmail.com2019-11-18T15:53:12+00:00urn:sha1:568636d562b4c64d0095ff2ac921b79eb69e520d
This improves performance of running python code by 34%, based
on the "pystone" benchmark on metro m4 express at 5000 passes
(1127.65 -> 1521.6 passes/second).
In addition, by instrumenting the tick function and monitoring on an
oscilloscope, the time actually spent in run_background_tasks() on
the metro m4 decreases from average 43% to 0.5%. (however, there's
some additional overhead that is moved around and not accounted for
in that "0.5%" figure, each time supervisor_run_background_tasks_if_tick
is called but no tick has occurred)
On the CPB, it increases pystone from 633 to 769, a smaller percentage
increase of 21%. I did not measure the time actually spent in
run_background_tasks() on CPB.
Testing performed: on metro m4 and cpb, run pystone adapted from python3.4
(change time.time to time.monotonic for sub-second resolution)
Besides running a 5000 pass test, I also ran a 50-pass test while
scoping how long an output pin was set. Average: 34.59ms or 1445/s on m4,
67.61ms or 739/s on cbp, both matching the other pystone result reasonably
well.
import pystone
import board
import digitalio
import time
d = digitalio.DigitalInOut(board.D13)
d.direction = digitalio.Direction.OUTPUT
while True:
d.value = 0
time.sleep(.01)
d.value = 1
pystone.main(50)