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authorScott Shawcroft <scott.shawcroft@gmail.com>2017-01-20 16:52:53 -0800
committerScott Shawcroft <scott.shawcroft@gmail.com>2017-02-10 05:09:17 -0800
commit370d1dec888e661d2cc23d38bb444d95d8d2a141 (patch)
tree1b80552a7bd7b0e3a03901d16a6fbbd8e00f3258 /atmel-samd/common-hal/nativeio
parent10fbe0675791c0318aafd6d4bf4a227faa36eb73 (diff)
SPI tweaks for SD Cards:
* Always init SPI to 250k to start for SD cards. * Add ability to configure byte written during read. * Add ability to read and write to portions of buffers like existing I2C API.
Diffstat (limited to 'atmel-samd/common-hal/nativeio')
-rw-r--r--atmel-samd/common-hal/nativeio/SPI.c17
-rw-r--r--atmel-samd/common-hal/nativeio/types.h1
2 files changed, 13 insertions, 5 deletions
diff --git a/atmel-samd/common-hal/nativeio/SPI.c b/atmel-samd/common-hal/nativeio/SPI.c
index f24cd40a2..705e30d8e 100644
--- a/atmel-samd/common-hal/nativeio/SPI.c
+++ b/atmel-samd/common-hal/nativeio/SPI.c
@@ -135,6 +135,11 @@ void common_hal_nativeio_spi_construct(nativeio_spi_obj_t *self,
self->MISO_pin = miso->pin;
}
+ // Always start at 250khz which is what SD cards need. They are sensitive to
+ // SPI bus noise before they are put into SPI mode.
+ self->current_baudrate = 250000;
+ config_spi_master.mode_specific.master.baudrate = self->current_baudrate;
+
spi_init(&self->spi_master_instance, sercom, &config_spi_master);
spi_enable(&self->spi_master_instance);
@@ -150,9 +155,11 @@ void common_hal_nativeio_spi_deinit(nativeio_spi_obj_t *self) {
bool common_hal_nativeio_spi_configure(nativeio_spi_obj_t *self,
uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) {
// TODO(tannewt): Check baudrate first before changing it.
- enum status_code status = spi_set_baudrate(&self->spi_master_instance, baudrate);
- if (status != STATUS_OK) {
- return false;
+ if (baudrate != self->current_baudrate) {
+ enum status_code status = spi_set_baudrate(&self->spi_master_instance, baudrate);
+ if (status != STATUS_OK) {
+ return false;
+ }
}
SercomSpi *const spi_module = &(self->spi_master_instance.hw->SPI);
@@ -213,7 +220,7 @@ bool common_hal_nativeio_spi_write(nativeio_spi_obj_t *self,
}
bool common_hal_nativeio_spi_read(nativeio_spi_obj_t *self,
- uint8_t *data, size_t len) {
+ uint8_t *data, size_t len, uint8_t write_value) {
if (len == 0) {
return true;
}
@@ -221,6 +228,6 @@ bool common_hal_nativeio_spi_read(nativeio_spi_obj_t *self,
&self->spi_master_instance,
data,
len,
- 0);
+ write_value);
return status == STATUS_OK;
}
diff --git a/atmel-samd/common-hal/nativeio/types.h b/atmel-samd/common-hal/nativeio/types.h
index ad5205381..c039ed293 100644
--- a/atmel-samd/common-hal/nativeio/types.h
+++ b/atmel-samd/common-hal/nativeio/types.h
@@ -85,6 +85,7 @@ typedef struct {
uint8_t clock_pin;
uint8_t MOSI_pin;
uint8_t MISO_pin;
+ uint32_t current_baudrate;
} nativeio_spi_obj_t;
typedef struct {