This introduces an alternative hardware API called nativeio structured around different functions that are typically accelerated by native hardware. Its not meant to reflect the structure of the hardware.

Docs are here: http://tannewt-micropython.readthedocs.io/en/microcontroller/

It differs from upstream's machine in the following ways:

* Python API is identical across ports due to code structure. (Lives in shared-bindings)
* Focuses on abstracting common functionality (AnalogIn) and not representing structure (ADC).
* Documentation lives with code making it easy to ensure they match.
* Pin is split into references (board.D13 and microcontroller.pin.PA17) and functionality (DigitalInOut).
* All nativeio classes claim underlying hardware resources when inited on construction, support Context Managers (aka with statements) and have deinit methods which release the claimed hardware.
* All constructors take pin references rather than peripheral ids. Its up to the implementation to find hardware or throw and exception.

8 files changed, 834 insertions, 0 deletions

diff --git a/atmel-samd/common-hal/nativeio/AnalogIn.c b/atmel-samd/common-hal/nativeio/AnalogIn.c
new file mode 100644
index 000000000..faf63265f
--- /dev/null
+++ b/atmel-samd/common-hal/nativeio/AnalogIn.c
@@ -0,0 +1,76 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <string.h>
+
+#include "py/nlr.h"
+#include "py/runtime.h"
+#include "py/binary.h"
+#include "py/mphal.h"
+#include "shared-bindings/nativeio/AnalogIn.h"
+
+#include "asf/sam0/drivers/adc/adc.h"
+
+void common_hal_nativeio_analogin_construct(nativeio_analogin_obj_t* self,
+        const mcu_pin_obj_t *pin) {
+    if (!pin->has_adc) {
+        // No ADC function on that pin
+        nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "pin %q does not have ADC capabilities", pin->name));
+    }
+
+    self->pin = pin;
+
+    struct adc_config config_adc;
+    adc_get_config_defaults(&config_adc);
+
+    config_adc.positive_input = self->pin->adc_input;
+    config_adc.resolution = ADC_RESOLUTION_CUSTOM;
+    config_adc.accumulate_samples = ADC_ACCUMULATE_SAMPLES_16;
+    config_adc.divide_result = ADC_DIVIDE_RESULT_16;
+    config_adc.clock_prescaler = ADC_CLOCK_PRESCALER_DIV128;
+
+    adc_init(&self->adc_instance, ADC, &config_adc);
+}
+
+// TODO(tannewt): Don't turn it all on just for one read. This simplifies
+// handling of reading multiple inputs and surviving sleep though so for now its
+// ok.
+uint16_t common_hal_nativeio_analogin_get_value(nativeio_analogin_obj_t *self) {
+    adc_enable(&self->adc_instance);
+    adc_start_conversion(&self->adc_instance);
+
+    uint16_t data;
+    enum status_code status = adc_read(&self->adc_instance, &data);
+    while (status == STATUS_BUSY) {
+      status = adc_read(&self->adc_instance, &data);
+    }
+    if (status == STATUS_ERR_OVERFLOW) {
+      // TODO(tannewt): Throw an error.
+    }
+
+    adc_disable(&self->adc_instance);
+    return data;
+}
diff --git a/atmel-samd/common-hal/nativeio/AnalogOut.c b/atmel-samd/common-hal/nativeio/AnalogOut.c
new file mode 100644
index 000000000..5540cb37d
--- /dev/null
+++ b/atmel-samd/common-hal/nativeio/AnalogOut.c
@@ -0,0 +1,69 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2013, 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+#include <string.h>
+
+#include "py/runtime.h"
+
+#include "shared-bindings/nativeio/AnalogOut.h"
+
+#include "asf/sam0/drivers/dac/dac.h"
+
+void common_hal_nativeio_analogout_construct(nativeio_analogout_obj_t* self,
+        const mcu_pin_obj_t *pin) {
+    if (pin->pin != PIN_PA02) {
+        nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError,
+            "DAC only supported on pin PA02."));
+        return;
+    }
+    struct dac_config config_dac;
+    dac_get_config_defaults(&config_dac);
+    config_dac.reference = DAC_REFERENCE_AVCC;
+    enum status_code status = dac_init(&self->dac_instance, DAC, &config_dac);
+    if (status != STATUS_OK) {
+        nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError,
+            "DAC init failed."));
+        return;
+    }
+
+    struct dac_chan_config config_analogout_chan;
+    dac_chan_get_config_defaults(&config_analogout_chan);
+    dac_chan_set_config(&self->dac_instance, DAC_CHANNEL_0, &config_analogout_chan);
+    dac_chan_enable(&self->dac_instance, DAC_CHANNEL_0);
+
+    dac_enable(&self->dac_instance);
+}
+
+void common_hal_nativeio_analogout_deinit(nativeio_analogout_obj_t *self) {
+    dac_disable(&self->dac_instance);
+    dac_chan_disable(&self->dac_instance, DAC_CHANNEL_0);
+}
+
+void common_hal_nativeio_analogout_set_value(nativeio_analogout_obj_t *self,
+        uint16_t value) {
+    dac_chan_write(&self->dac_instance, DAC_CHANNEL_0, value);
+}
diff --git a/atmel-samd/common-hal/nativeio/DigitalInOut.c b/atmel-samd/common-hal/nativeio/DigitalInOut.c
new file mode 100644
index 000000000..119832ff6
--- /dev/null
+++ b/atmel-samd/common-hal/nativeio/DigitalInOut.c
@@ -0,0 +1,186 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2013, 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+#include <string.h>
+
+#include "py/nlr.h"
+#include "py/runtime.h"
+#include "py/mphal.h"
+
+#include "shared-bindings/nativeio/DigitalInOut.h"
+
+#include "asf/sam0/drivers/port/port.h"
+#include "asf/sam0/drivers/system/pinmux/pinmux.h"
+
+digitalinout_result_t common_hal_nativeio_digitalinout_construct(
+        nativeio_digitalinout_obj_t* self, const mcu_pin_obj_t* pin) {
+    self->pin = pin;
+
+    struct port_config pin_conf;
+    port_get_config_defaults(&pin_conf);
+
+    pin_conf.direction  = PORT_PIN_DIR_INPUT;
+    pin_conf.input_pull = PORT_PIN_PULL_NONE;
+    port_pin_set_config(self->pin->pin, &pin_conf);
+    return DIGITALINOUT_OK;
+}
+
+void common_hal_nativeio_digitalinout_deinit(nativeio_digitalinout_obj_t* self) {
+    struct port_config pin_conf;
+    port_get_config_defaults(&pin_conf);
+
+    pin_conf.powersave  = true;
+    port_pin_set_config(self->pin->pin, &pin_conf);
+}
+
+void common_hal_nativeio_digitalinout_switch_to_input(
+        nativeio_digitalinout_obj_t* self, enum digitalinout_pull_t pull) {
+    self->output = false;
+
+    common_hal_nativeio_digitalinout_set_pull(self, pull);
+}
+
+void common_hal_nativeio_digitalinout_switch_to_output(
+        nativeio_digitalinout_obj_t* self, bool value,
+        enum digitalinout_drive_mode_t drive_mode) {
+    struct port_config pin_conf;
+    port_get_config_defaults(&pin_conf);
+
+    pin_conf.direction  = PORT_PIN_DIR_INPUT;
+    pin_conf.input_pull = PORT_PIN_PULL_NONE;
+    port_pin_set_config(self->pin->pin, &pin_conf);
+
+    self->output = true;
+    self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN;
+    common_hal_nativeio_digitalinout_set_value(self, value);
+}
+
+enum digitalinout_direction_t common_hal_nativeio_digitalinout_get_direction(
+        nativeio_digitalinout_obj_t* self) {
+    return self->output? DIRECTION_OUT : DIRECTION_IN;
+}
+
+void common_hal_nativeio_digitalinout_set_value(
+        nativeio_digitalinout_obj_t* self, bool value) {
+    uint32_t pin = self->pin->pin;
+    PortGroup *const port_base = port_get_group_from_gpio_pin(pin);
+    uint32_t pin_mask  = (1UL << (pin % 32));
+
+    /* Set the pin to high or low atomically based on the requested level */
+    if (value) {
+        if (self->open_drain) {
+            port_base->DIRCLR.reg = pin_mask;
+        } else {
+            port_base->DIRSET.reg = pin_mask;
+            port_base->OUTSET.reg = pin_mask;
+        }
+    } else {
+        if (!self->open_drain) {
+            port_base->DIRSET.reg = pin_mask;
+        }
+        port_base->OUTCLR.reg = pin_mask;
+    }
+}
+
+bool common_hal_nativeio_digitalinout_get_value(
+        nativeio_digitalinout_obj_t* self) {
+    uint32_t pin = self->pin->pin;
+    PortGroup *const port_base = port_get_group_from_gpio_pin(pin);
+    uint32_t pin_mask  = (1UL << (pin % 32));
+    if (!self->output) {
+        return (port_base->IN.reg & pin_mask);
+    } else {
+        if (self->open_drain && (port_base->DIR.reg & pin_mask) == 0) {
+            return true;
+        } else {
+            return (port_base->OUT.reg & pin_mask);
+        }
+    }
+}
+
+void common_hal_nativeio_digitalinout_set_drive_mode(
+        nativeio_digitalinout_obj_t* self,
+        enum digitalinout_drive_mode_t drive_mode) {
+    bool value = common_hal_nativeio_digitalinout_get_value(self);
+    self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN;
+    // True is implemented differently between modes so reset the value to make
+    // sure its correct for the new mode.
+    if (value) {
+        common_hal_nativeio_digitalinout_set_value(self, value);
+    }
+}
+
+enum digitalinout_drive_mode_t common_hal_nativeio_digitalinout_get_drive_mode(
+        nativeio_digitalinout_obj_t* self) {
+    if (self->open_drain) {
+        return DRIVE_MODE_OPEN_DRAIN;
+    } else {
+        return DRIVE_MODE_PUSH_PULL;
+    }
+}
+
+void common_hal_nativeio_digitalinout_set_pull(
+        nativeio_digitalinout_obj_t* self, enum digitalinout_pull_t pull) {
+    enum port_pin_pull asf_pull = PORT_PIN_PULL_NONE;
+    switch (pull) {
+        case PULL_UP:
+            asf_pull = PORT_PIN_PULL_UP;
+            break;
+        case PULL_DOWN:
+            asf_pull = PORT_PIN_PULL_DOWN;
+            break;
+        case PULL_NONE:
+        default:
+            break;
+    }
+    struct port_config pin_conf;
+    port_get_config_defaults(&pin_conf);
+
+    pin_conf.direction  = PORT_PIN_DIR_INPUT;
+    pin_conf.input_pull = asf_pull;
+    port_pin_set_config(self->pin->pin, &pin_conf);
+}
+
+enum digitalinout_pull_t common_hal_nativeio_digitalinout_get_pull(
+        nativeio_digitalinout_obj_t* self) {
+    uint32_t pin = self->pin->pin;
+    PortGroup *const port_base = port_get_group_from_gpio_pin(pin);
+    uint32_t pin_mask  = (1UL << (pin % 32));
+    if (self->output) {
+        nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError,
+            "Cannot get pull while in output mode."));
+        return PULL_NONE;
+    } else {
+        if (port_base->PINCFG[pin % 32].bit.PULLEN != 0) {
+            return PULL_NONE;
+        } if ((port_base->OUT.reg & pin_mask) > 0) {
+            return PULL_UP;
+        } else {
+            return PULL_DOWN;
+        }
+    }
+}
diff --git a/atmel-samd/common-hal/nativeio/I2C.c b/atmel-samd/common-hal/nativeio/I2C.c
new file mode 100644
index 000000000..9eb2361fb
--- /dev/null
+++ b/atmel-samd/common-hal/nativeio/I2C.c
@@ -0,0 +1,159 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Scott Shawcroft
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+ // This file contains all of the port specific HAL functions for the machine
+ // module.
+
+#include "shared-bindings/nativeio/I2C.h"
+#include "py/nlr.h"
+
+#include "asf/sam0/drivers/sercom/i2c/i2c_master.h"
+
+// We use ENABLE registers below we don't want to treat as a macro.
+#undef ENABLE
+
+// Number of times to try to send packet if failed.
+#define TIMEOUT 1
+
+void common_hal_nativeio_i2c_construct(nativeio_i2c_obj_t *self,
+        const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, uint32_t freq) {
+    struct i2c_master_config config_i2c_master;
+    i2c_master_get_config_defaults(&config_i2c_master);
+    // Struct takes the argument in Khz not Hz.
+    config_i2c_master.baud_rate = freq / 1000;
+    Sercom* sercom = NULL;
+    uint32_t sda_pinmux = 0;
+    uint32_t scl_pinmux = 0;
+    for (int i = 0; i < NUM_SERCOMS_PER_PIN; i++) {
+        Sercom* potential_sercom = sda->sercom[i].sercom;
+        if (potential_sercom == NULL ||
+            potential_sercom->I2CM.CTRLA.bit.ENABLE != 0 ||
+            sda->sercom[i].pad != 0) {
+            continue;
+        }
+        sda_pinmux = sda->sercom[i].pinmux;
+        for (int j = 0; j < NUM_SERCOMS_PER_PIN; j++) {
+            if (potential_sercom == scl->sercom[j].sercom &&
+                scl->sercom[j].pad == 1) {
+                scl_pinmux = scl->sercom[j].pinmux;
+                sercom = potential_sercom;
+                break;
+            }
+        }
+        if (sercom != NULL) {
+            break;
+        }
+    }
+    if (sercom == NULL) {
+        nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError,
+            "No hardware support available with those pins."));
+    }
+
+    config_i2c_master.pinmux_pad0 = sda_pinmux; // SDA
+    config_i2c_master.pinmux_pad1 = scl_pinmux; // SCL
+    config_i2c_master.buffer_timeout = 10000;
+
+    enum status_code status = i2c_master_init(&self->i2c_master_instance,
+        sercom, &config_i2c_master);
+    if (status != STATUS_OK) {
+        nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "I2C bus init error"));
+    }
+
+    i2c_master_enable(&self->i2c_master_instance);
+}
+
+void common_hal_nativeio_i2c_deinit(nativeio_i2c_obj_t *self) {
+    i2c_master_disable(&self->i2c_master_instance);
+}
+
+bool common_hal_nativeio_i2c_probe(nativeio_i2c_obj_t *self, uint8_t addr) {
+    uint8_t buf;
+    struct i2c_master_packet packet = {
+        .address     = addr,
+        .data_length = 0,
+        .data        = &buf,
+        .ten_bit_address = false,
+        .high_speed      = false,
+        .hs_master_code  = 0x0,
+    };
+
+    enum status_code status = i2c_master_write_packet_wait(
+        &self->i2c_master_instance, &packet);
+    return status == STATUS_OK;
+}
+
+bool common_hal_nativeio_i2c_write(nativeio_i2c_obj_t *self, uint16_t addr,
+        const uint8_t *data, size_t len, bool transmit_stop_bit) {
+    struct i2c_master_packet packet = {
+        .address     = addr,
+        .data_length = len,
+        .data        = (uint8_t *) data,
+        .ten_bit_address = false,
+        .high_speed      = false,
+        .hs_master_code  = 0x0,
+    };
+
+    uint16_t timeout = 0;
+    enum status_code status = STATUS_BUSY;
+    while (status != STATUS_OK) {
+        if (transmit_stop_bit) {
+            status = i2c_master_write_packet_wait(&self->i2c_master_instance,
+                                                  &packet);
+        } else {
+            status = i2c_master_write_packet_wait_no_stop(
+                &self->i2c_master_instance, &packet);
+        }
+        /* Increment timeout counter and check if timed out. */
+        if (timeout++ == TIMEOUT) {
+            break;
+        }
+    }
+    return status == STATUS_OK;
+}
+
+bool common_hal_nativeio_i2c_read(nativeio_i2c_obj_t *self, uint16_t addr,
+        uint8_t *data, size_t len) {
+    struct i2c_master_packet packet = {
+        .address     = addr,
+        .data_length = len,
+        .data        = data,
+        .ten_bit_address = false,
+        .high_speed      = false,
+        .hs_master_code  = 0x0,
+    };
+
+    uint16_t timeout = 0;
+    enum status_code status = STATUS_BUSY;
+    while (status != STATUS_OK) {
+        status = i2c_master_read_packet_wait(&self->i2c_master_instance,
+                                             &packet);
+        /* Increment timeout counter and check if timed out. */
+        if (timeout++ == TIMEOUT) {
+            break;
+        }
+    }
+    return status == STATUS_OK;
+}
diff --git a/atmel-samd/common-hal/nativeio/PWMOut.c b/atmel-samd/common-hal/nativeio/PWMOut.c
new file mode 100644
index 000000000..a444ba864
--- /dev/null
+++ b/atmel-samd/common-hal/nativeio/PWMOut.c
@@ -0,0 +1,114 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+
+#include "py/runtime.h"
+#include "shared-bindings/nativeio/PWMOut.h"
+
+void common_hal_nativeio_pwmout_construct(nativeio_pwmout_obj_t* self, const mcu_pin_obj_t* pin, uint16_t duty) {
+    self->pin = pin;
+    self->using_primary_timer = true;
+
+    if (pin->primary_timer.tc == 0 && pin->primary_timer.tcc == 0 &&
+        pin->secondary_timer.tc == 0 && pin->secondary_timer.tcc == 0) {
+        nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError,
+            "PWM not supported on pin %q", self->pin->name));
+    }
+
+    // TODO(tannewt): Support output on multiple timer channels at once.
+    const pin_timer_t* t = &pin->primary_timer;
+    if (t->tcc != 0) {
+        struct tcc_config config_tcc;
+        tcc_get_config_defaults(&config_tcc, t->tcc);
+
+        config_tcc.counter.clock_prescaler = TCC_CLOCK_PRESCALER_DIV256;
+        config_tcc.counter.period = 0xFF;
+        config_tcc.compare.wave_generation = TCC_WAVE_GENERATION_SINGLE_SLOPE_PWM;
+        config_tcc.compare.match[t->channel] = duty;
+
+        config_tcc.pins.enable_wave_out_pin[t->wave_output] = true;
+        config_tcc.pins.wave_out_pin[t->wave_output] = t->pin;
+        config_tcc.pins.wave_out_pin_mux[t->wave_output] = t->mux;
+
+        tcc_init(&self->tcc_instance, t->tcc, &config_tcc);
+
+        tcc_enable(&self->tcc_instance);
+    } else {
+        struct tc_config config_tc;
+        tc_get_config_defaults(&config_tc);
+
+        config_tc.counter_size    = TC_COUNTER_SIZE_8BIT;
+        config_tc.wave_generation = TC_WAVE_GENERATION_NORMAL_PWM;
+        config_tc.clock_prescaler = TC_CLOCK_PRESCALER_DIV256;
+        config_tc.counter_8_bit.period = 0xff;
+        config_tc.counter_8_bit.compare_capture_channel[t->channel] = duty;
+
+        config_tc.pwm_channel[t->wave_output].enabled = true;
+        config_tc.pwm_channel[t->wave_output].pin_out = t->pin;
+        config_tc.pwm_channel[t->wave_output].pin_mux = t->mux;
+
+        tc_init(&self->tc_instance, t->tc, &config_tc);
+
+        tc_enable(&self->tc_instance);
+    }
+}
+
+extern void common_hal_nativeio_pwmout_deinit(nativeio_pwmout_obj_t* self) {
+    const pin_timer_t* t = &self->pin->primary_timer;
+    if (!self->using_primary_timer) {
+      t = &self->pin->secondary_timer;
+    }
+    if (t->tcc != 0) {
+      tcc_disable(&self->tcc_instance);
+    } else {
+      tc_disable(&self->tc_instance);
+    }
+}
+
+extern void common_hal_nativeio_pwmout_set_duty_cycle(nativeio_pwmout_obj_t* self, uint16_t duty) {
+    const pin_timer_t* t = &self->pin->primary_timer;
+    if (!self->using_primary_timer) {
+        t = &self->pin->secondary_timer;
+    }
+    if (t->tcc != 0) {
+        tcc_set_compare_value(&self->tcc_instance, t->channel, duty);
+    } else {
+        tc_set_compare_value(&self->tc_instance, t->channel, duty);
+    }
+}
+
+uint16_t common_hal_nativeio_pwmout_get_duty_cycle(nativeio_pwmout_obj_t* self) {
+    const pin_timer_t* t = &self->pin->primary_timer;
+    if (!self->using_primary_timer) {
+        t = &self->pin->secondary_timer;
+    }
+    if (t->tcc != 0) {
+        return tcc_get_capture_value(&self->tcc_instance, t->channel);
+    } else {
+        return tc_get_capture_value(&self->tc_instance, t->channel);
+    }
+}
diff --git a/atmel-samd/common-hal/nativeio/SPI.c b/atmel-samd/common-hal/nativeio/SPI.c
new file mode 100644
index 000000000..7600766f7
--- /dev/null
+++ b/atmel-samd/common-hal/nativeio/SPI.c
@@ -0,0 +1,143 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Scott Shawcroft
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+ // This file contains all of the port specific HAL functions for the machine
+ // module.
+
+#include "shared-bindings/nativeio/SPI.h"
+#include "py/nlr.h"
+
+// We use ENABLE registers below we don't want to treat as a macro.
+#undef ENABLE
+
+// Number of times to try to send packet if failed.
+#define TIMEOUT 1
+
+void common_hal_nativeio_spi_construct(nativeio_spi_obj_t *self,
+        const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi,
+        const mcu_pin_obj_t * miso, uint32_t baudrate) {
+    struct spi_config config_spi_master;
+    spi_get_config_defaults(&config_spi_master);
+
+    Sercom* sercom = NULL;
+    uint32_t clock_pinmux = 0;
+    uint32_t mosi_pinmux = 0;
+    uint32_t miso_pinmux = 0;
+    uint8_t clock_pad = 0;
+    uint8_t mosi_pad = 0;
+    uint8_t miso_pad = 0;
+    for (int i = 0; i < NUM_SERCOMS_PER_PIN; i++) {
+        Sercom* potential_sercom = clock->sercom[i].sercom;
+        if (potential_sercom == NULL ||
+            potential_sercom->SPI.CTRLA.bit.ENABLE != 0) {
+            continue;
+        }
+        clock_pinmux = clock->sercom[i].pinmux;
+        clock_pad = clock->sercom[i].pad;
+        for (int j = 0; j < NUM_SERCOMS_PER_PIN; j++) {
+            mosi_pinmux = mosi->sercom[j].pinmux;
+            mosi_pad = mosi->sercom[j].pad;
+            for (int k = 0; k < NUM_SERCOMS_PER_PIN; k++) {
+                if (potential_sercom == miso->sercom[k].sercom) {
+                    miso_pinmux = miso->sercom[k].pinmux;
+                    miso_pad = miso->sercom[k].pad;
+                    sercom = potential_sercom;
+                    break;
+                }
+            }
+            if (sercom != NULL) {
+                break;
+            }
+        }
+        if (sercom != NULL) {
+            break;
+        }
+    }
+    if (sercom == NULL) {
+        nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError,
+            "No hardware support available with those pins."));
+    }
+
+    // Depends on where MOSI and CLK are.
+    uint8_t dopo = 8;
+    if (clock_pad == 1) {
+        if (mosi_pad == 0) {
+            dopo = 0;
+        } else if (mosi_pad == 3) {
+            dopo = 2;
+        }
+    } else if (clock_pad == 3) {
+        if (mosi_pad == 0) {
+            dopo = 3;
+        } else if (mosi_pad == 2) {
+            dopo = 1;
+        }
+    }
+    if (dopo == 8) {
+        nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "SPI MOSI and clock pins incompatible."));
+    }
+
+    config_spi_master.mux_setting = (dopo << SERCOM_SPI_CTRLA_DOPO_Pos) |
+        (miso_pad << SERCOM_SPI_CTRLA_DIPO_Pos);
+
+    // Map pad to pinmux through a short array.
+    uint32_t *pinmuxes[4] = {&config_spi_master.pinmux_pad0,
+                             &config_spi_master.pinmux_pad1,
+                             &config_spi_master.pinmux_pad2,
+                             &config_spi_master.pinmux_pad3};
+    *pinmuxes[clock_pad] = clock_pinmux;
+    *pinmuxes[mosi_pad] = mosi_pinmux;
+    *pinmuxes[miso_pad] = miso_pinmux;
+
+    config_spi_master.mode_specific.master.baudrate = baudrate;
+
+    spi_init(&self->spi_master_instance, sercom, &config_spi_master);
+
+    spi_enable(&self->spi_master_instance);
+}
+
+void common_hal_nativeio_spi_deinit(nativeio_spi_obj_t *self) {
+    spi_disable(&self->spi_master_instance);
+}
+
+bool common_hal_nativeio_spi_write(nativeio_spi_obj_t *self,
+        const uint8_t *data, size_t len) {
+    enum status_code status = spi_write_buffer_wait(
+        &self->spi_master_instance,
+        data,
+        len);
+    return status == STATUS_OK;
+}
+
+bool common_hal_nativeio_spi_read(nativeio_spi_obj_t *self,
+        uint8_t *data, size_t len) {
+    enum status_code status = spi_read_buffer_wait(
+        &self->spi_master_instance,
+        data,
+        len,
+        0);
+    return status == STATUS_OK;
+}
diff --git a/atmel-samd/common-hal/nativeio/__init__.c b/atmel-samd/common-hal/nativeio/__init__.c
new file mode 100644
index 000000000..e0ec8acfb
--- /dev/null
+++ b/atmel-samd/common-hal/nativeio/__init__.c
@@ -0,0 +1 @@
+// No nativeio module functions.
diff --git a/atmel-samd/common-hal/nativeio/types.h b/atmel-samd/common-hal/nativeio/types.h
new file mode 100644
index 000000000..0842262bd
--- /dev/null
+++ b/atmel-samd/common-hal/nativeio/types.h
@@ -0,0 +1,86 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Scott Shawcroft
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// This defines the types used to underly the standard nativeio Python objects.
+// The shared API is defined in terms of these types.
+
+#ifndef __MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_NATIVEIO_TYPES_H__
+#define __MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_NATIVEIO_TYPES_H__
+
+#include "common-hal/microcontroller/types.h"
+
+// Don't reorder these includes because they are dependencies of adc_feature.h.
+// They should really be included by adc_feature.h.
+#include <compiler.h>
+#include "asf/sam0/drivers/system/clock/gclk.h"
+#include "asf/sam0/utils/cmsis/samd21/include/component/adc.h"
+#include "asf/sam0/drivers/adc/adc_sam_d_r/adc_feature.h"
+
+#include "asf/sam0/drivers/dac/dac.h"
+#include "asf/sam0/drivers/sercom/i2c/i2c_master.h"
+#include "asf/sam0/drivers/sercom/spi/spi.h"
+#include "asf/sam0/drivers/tc/tc.h"
+#include "asf/sam0/drivers/tcc/tcc.h"
+
+#include "py/obj.h"
+
+typedef struct {
+    mp_obj_base_t base;
+    const mcu_pin_obj_t * pin;
+    struct adc_module adc_instance;
+} nativeio_analogin_obj_t;
+
+typedef struct {
+    mp_obj_base_t base;
+    struct dac_module dac_instance;
+} nativeio_analogout_obj_t;
+
+typedef struct {
+    mp_obj_base_t base;
+    const mcu_pin_obj_t * pin;
+    bool output;
+    bool open_drain;
+} nativeio_digitalinout_obj_t;
+
+typedef struct {
+    mp_obj_base_t base;
+    struct i2c_master_module i2c_master_instance;
+} nativeio_i2c_obj_t;
+
+typedef struct _machine_spi_obj_t {
+    mp_obj_base_t base;
+    struct spi_module spi_master_instance;
+} nativeio_spi_obj_t;
+
+typedef struct {
+    mp_obj_base_t base;
+    const mcu_pin_obj_t *pin;
+    bool using_primary_timer;
+    struct tc_module tc_instance;
+    struct tcc_module tcc_instance;
+} nativeio_pwmout_obj_t;
+
+#endif // __MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_NATIVEIO_TYPES_H__