diff options
| author | danicampora <danicampora@gmail.com> | 2015-02-10 13:11:27 +0100 |
|---|---|---|
| committer | danicampora <danicampora@gmail.com> | 2015-02-13 17:54:04 +0100 |
| commit | 99f3f6b5de567c1bdf04259d2c8322681755c732 (patch) | |
| tree | f80a4d986bf20478283abb9dd45517fbdc4740c3 /cc3200/hal | |
| parent | 601c814603801ad3af78e37d26c87a4470156738 (diff) | |
cc3200: Add I2C module. Only master mode is currently supported.
Diffstat (limited to 'cc3200/hal')
| -rw-r--r-- | cc3200/hal/i2c.c | 20 | ||||
| -rw-r--r-- | cc3200/hal/i2c.h | 3 | ||||
| -rw-r--r-- | cc3200/hal/rom_patch.h | 1 |
3 files changed, 5 insertions, 19 deletions
diff --git a/cc3200/hal/i2c.c b/cc3200/hal/i2c.c index 520868767..487f93cc2 100644 --- a/cc3200/hal/i2c.c +++ b/cc3200/hal/i2c.c @@ -169,10 +169,8 @@ _I2CIntNumberGet(uint32_t ui32Base) // //***************************************************************************** void -I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32I2CClk, - bool bFast) +I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32SCLFreq) { - uint32_t ui32SCLFreq; uint32_t ui32TPR; // @@ -186,24 +184,12 @@ I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32I2CClk, I2CMasterEnable(ui32Base); // - // Get the desired SCL speed. - // - if(bFast == true) - { - ui32SCLFreq = 400000; - } - else - { - ui32SCLFreq = 100000; - } - - // // Compute the clock divider that achieves the fastest speed less than or // equal to the desired speed. The numerator is biased to favor a larger // clock divider so that the resulting clock is always less than or equal // to the desired clock, never greater. // - ui32TPR = ((ui32I2CClk + (2 * 10 * ui32SCLFreq) - 1) / + ui32TPR = ((80000000 + (2 * 10 * ui32SCLFreq) - 1) / (2 * 10 * ui32SCLFreq)) - 1; HWREG(ui32Base + I2C_O_MTPR) = ui32TPR; @@ -213,7 +199,7 @@ I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32I2CClk, // if(HWREG(ui32Base + I2C_O_PP) & I2C_PP_HS) { - ui32TPR = ((ui32I2CClk + (2 * 3 * 3400000) - 1) / + ui32TPR = ((80000000 + (2 * 3 * 3400000) - 1) / (2 * 3 * 3400000)) - 1; HWREG(ui32Base + I2C_O_MTPR) = I2C_MTPR_HS | ui32TPR; } diff --git a/cc3200/hal/i2c.h b/cc3200/hal/i2c.h index 67f77fa9a..d966dbf56 100644 --- a/cc3200/hal/i2c.h +++ b/cc3200/hal/i2c.h @@ -309,8 +309,7 @@ extern void I2CMasterDataPut(uint32_t ui32Base, uint8_t ui8Data); extern void I2CMasterDisable(uint32_t ui32Base); extern void I2CMasterEnable(uint32_t ui32Base); extern uint32_t I2CMasterErr(uint32_t ui32Base); -extern void I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32I2CClk, - bool bFast); +extern void I2CMasterInitExpClk(uint32_t ui32Base, uint32_t ui32SCLFreq); extern void I2CMasterIntClear(uint32_t ui32Base); extern void I2CMasterIntDisable(uint32_t ui32Base); extern void I2CMasterIntEnable(uint32_t ui32Base); diff --git a/cc3200/hal/rom_patch.h b/cc3200/hal/rom_patch.h index 4df44bd5d..6ca366b0f 100644 --- a/cc3200/hal/rom_patch.h +++ b/cc3200/hal/rom_patch.h @@ -84,4 +84,5 @@ #undef ROM_SPIConfigSetExpClk #undef ROM_GPIODirModeGet #undef ROM_GPIOIntTypeGet +#undef ROM_I2CMasterInitExpClk |