Merge branch 'main' into webusb (trying to get CI back online)

17 files changed, 897 insertions, 157 deletions

diff --git a/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/board.c b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/board.c
new file mode 100644
index 000000000..aaef97c7d
--- /dev/null
+++ b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/board.c
@@ -0,0 +1,52 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "supervisor/board.h"
+#include "mpconfigboard.h"
+#include "shared-bindings/microcontroller/Pin.h"
+
+void board_init(void) {
+    // USB
+    common_hal_never_reset_pin(&pin_GPIO19);
+    common_hal_never_reset_pin(&pin_GPIO20);
+
+    // Debug UART
+#ifdef DEBUG
+    common_hal_never_reset_pin(&pin_GPIO43);
+    common_hal_never_reset_pin(&pin_GPIO44);
+#endif /* DEBUG */
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+
+}
+
+void board_deinit(void) {
+}
diff --git a/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.h b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.h
new file mode 100644
index 000000000..c9020c200
--- /dev/null
+++ b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.h
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+//Micropython setup
+
+#define MICROPY_HW_BOARD_NAME       "LILYGO TTGO T8 ESP32-S2 w/Display"
+#define MICROPY_HW_MCU_NAME         "ESP32S2"
+
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
+#define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.mk b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.mk
new file mode 100644
index 000000000..38a7ed1fb
--- /dev/null
+++ b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.mk
@@ -0,0 +1,18 @@
+USB_VID = 0x303a
+USB_PID = 0x8007
+USB_PRODUCT = "TTGO T8 ESP32-S2"
+USB_MANUFACTURER = "LILYGO"
+USB_DEVICES = "CDC,MSC,HID"
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = MPZ
+
+# The default queue depth of 16 overflows on release builds,
+# so increase it to 32.
+CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
+
+CIRCUITPY_ESP_FLASH_MODE = dio
+CIRCUITPY_ESP_FLASH_FREQ = 40m
+CIRCUITPY_ESP_FLASH_SIZE = 4MB
+
+CIRCUITPY_MODULE = wroom
diff --git a/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/pins.c b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/pins.c
new file mode 100644
index 000000000..bda0fd227
--- /dev/null
+++ b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/pins.c
@@ -0,0 +1,55 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
+    { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
+    { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
+    { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
+    { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
+    { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
+    { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
+    { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
+    { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
+
+    { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
+    { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+    { MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
+    { MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
+    { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
+    { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
+    { MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) },
+    { MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) },
+    { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
+
+    { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) },
+    { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) },
+    { MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) },
+    { MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
+    { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },
+    { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },
+
+    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
+    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
+    { MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_GPIO17) },
+    { MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_GPIO18) },
+
+    // SD Card
+    { MP_ROM_QSTR(MP_QSTR_SD_MISO), MP_ROM_PTR(&pin_GPIO13) },
+    { MP_ROM_QSTR(MP_QSTR_SD_MOSI), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_ROM_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_GPIO12) },
+    { MP_ROM_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_GPIO10) },
+
+    // 1.14 inch LCD ST7789
+    { MP_ROM_QSTR(MP_QSTR_LCD_MISO), MP_ROM_PTR(&pin_GPIO4) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_MOSI), MP_ROM_PTR(&pin_GPIO35) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_CLK), MP_ROM_PTR(&pin_GPIO36) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_CS), MP_ROM_PTR(&pin_GPIO34) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_RST), MP_ROM_PTR(&pin_GPIO38) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_BCKL), MP_ROM_PTR(&pin_GPIO33) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D_C), MP_ROM_PTR(&pin_GPIO37) },
+
+    // Peripheral Power control
+    { MP_ROM_QSTR(MP_QSTR_PE_POWER), MP_ROM_PTR(&pin_GPIO14) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/sdkconfig b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/sdkconfig
new file mode 100644
index 000000000..ce6fe832b
--- /dev/null
+++ b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/sdkconfig
@@ -0,0 +1,31 @@
+CONFIG_ESP32S2_SPIRAM_SUPPORT=y
+
+#
+# SPI RAM config
+#
+CONFIG_SPIRAM_TYPE_ESPPSRAM64=y
+CONFIG_SPIRAM_SIZE=8388608
+
+#
+# PSRAM clock and cs IO for ESP32S2
+#
+CONFIG_DEFAULT_PSRAM_CLK_IO=30
+CONFIG_DEFAULT_PSRAM_CS_IO=26
+# end of PSRAM clock and cs IO for ESP32S2
+
+CONFIG_SPIRAM_SPIWP_SD3_PIN=28
+CONFIG_SPIRAM_SPEED_40M=y
+CONFIG_SPIRAM=y
+CONFIG_SPIRAM_BOOT_INIT=y
+CONFIG_SPIRAM_USE_MALLOC=y
+CONFIG_SPIRAM_MEMTEST=y
+CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=16384
+CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=32768
+# end of SPI RAM config
+
+#
+# LWIP
+#
+CONFIG_LWIP_LOCAL_HOSTNAME="TTGO-T8-ESP32-S2"
+CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y
+# end of LWIP
diff --git a/ports/esp32s2/common-hal/busio/I2C.c b/ports/esp32s2/common-hal/busio/I2C.c
index 772262d0a..8372eb8c3 100644
--- a/ports/esp32s2/common-hal/busio/I2C.c
+++ b/ports/esp32s2/common-hal/busio/I2C.c
@@ -85,7 +85,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self,
     if (gpio_get_level(sda->number) == 0 || gpio_get_level(scl->number) == 0) {
         reset_pin_number(sda->number);
         reset_pin_number(scl->number);
-        mp_raise_RuntimeError(translate("SDA or SCL needs a pull up"));
+        mp_raise_RuntimeError(translate("No pull up found on SDA or SCL; check your wiring"));
     }
 #endif
 
diff --git a/ports/esp32s2/common-hal/displayio/ParallelBus.c b/ports/esp32s2/common-hal/displayio/ParallelBus.c
index d0c98f361..f77b37b57 100644
--- a/ports/esp32s2/common-hal/displayio/ParallelBus.c
+++ b/ports/esp32s2/common-hal/displayio/ParallelBus.c
@@ -33,35 +33,196 @@
 #include "shared-bindings/digitalio/DigitalInOut.h"
 #include "shared-bindings/microcontroller/__init__.h"
 
+/*
+ *  Current pin limitations for ESP32-S2 ParallelBus:
+ *   - data0 pin must be byte aligned
+ */
+
 void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* self,
     const mcu_pin_obj_t* data0, const mcu_pin_obj_t* command, const mcu_pin_obj_t* chip_select,
     const mcu_pin_obj_t* write, const mcu_pin_obj_t* read, const mcu_pin_obj_t* reset) {
 
-    mp_raise_NotImplementedError(translate("ParallelBus not yet supported"));
+    uint8_t data_pin = data0->number;
+    if (data_pin % 8 != 0) {
+        mp_raise_ValueError(translate("Data 0 pin must be byte aligned."));
+    }
+
+    for (uint8_t i = 0; i < 8; i++) {
+        if (!pin_number_is_free(data_pin + i)) {
+            mp_raise_ValueError_varg(translate("Bus pin %d is already in use"), i);
+        }
+    }
+
+    gpio_dev_t *g = &GPIO; // this is the GPIO registers, see "extern gpio_dev_t GPIO" from file:gpio_struct.h
+
+    // Setup the pins as "Simple GPIO outputs" see section 19.3.3 of the ESP32-S2 Reference Manual
+    // Enable pins with "enable_w1ts"
+
+    for (uint8_t i = 0; i < 8; i++) {
+    	g->enable_w1ts = (0x1 << (data_pin + i));
+    	g->func_out_sel_cfg[data_pin + i].val= 256; /* setup output pin for simple GPIO Output, (0x100 = 256) */
+
+    }
+
+    /* From my understanding, there is a limitation of the ESP32-S2 that does not allow single-byte writes
+     *  into the GPIO registers.  See section 10.3.3 regarding "non-aligned writes" into the registers.
+     */
+
+
+    if (data_pin < 31) {
+		self->bus = (uint32_t*) &g->out; //pointer to GPIO output register (for pins 0-31)
+	} else {
+		self->bus = (uint32_t*) &g->out1.val; //pointer to GPIO output register (for pins >= 32)
+	}
+
+    /* SNIP - common setup of command, chip select, write and read pins, same as from SAMD and NRF ports */
+    self->command.base.type = &digitalio_digitalinout_type;
+    common_hal_digitalio_digitalinout_construct(&self->command, command);
+    common_hal_digitalio_digitalinout_switch_to_output(&self->command, true, DRIVE_MODE_PUSH_PULL);
+
+    self->chip_select.base.type = &digitalio_digitalinout_type;
+    common_hal_digitalio_digitalinout_construct(&self->chip_select, chip_select);
+    common_hal_digitalio_digitalinout_switch_to_output(&self->chip_select, true, DRIVE_MODE_PUSH_PULL);
+
+    self->write.base.type = &digitalio_digitalinout_type;
+    common_hal_digitalio_digitalinout_construct(&self->write, write);
+    common_hal_digitalio_digitalinout_switch_to_output(&self->write, true, DRIVE_MODE_PUSH_PULL);
+
+    self->read.base.type = &digitalio_digitalinout_type;
+    common_hal_digitalio_digitalinout_construct(&self->read, read);
+    common_hal_digitalio_digitalinout_switch_to_output(&self->read, true, DRIVE_MODE_PUSH_PULL);
+
+    self->data0_pin = data_pin;
+
+    if (write->number < 32) {
+    	self->write_clear_register = (uint32_t*) &g->out_w1tc;
+    	self->write_set_register = (uint32_t*) &g->out_w1ts;
+    } else {
+    	self->write_clear_register = (uint32_t*) &g->out1_w1tc.val;
+    	self->write_set_register = (uint32_t*) &g->out1_w1ts.val;
+    }
+
+    // Check to see if the data and write pins are on the same register:
+    if ( ( ((self->data0_pin < 32) && (write->number < 32)) ) ||
+    	 ( ((self->data0_pin > 31) && (write->number > 31)) )  ) {
+    		self->data_write_same_register = true; // data pins and write pin are on the same register
+    } else {
+    	self->data_write_same_register = false; // data pins and write pins are on different registers
+	}
+
+
+    self->write_mask = 1 << (write->number % 32); /* the write pin triggers the LCD to latch the data */
+
+    /* SNIP - common setup of the reset pin, same as from SAMD and NRF ports */
+    self->reset.base.type = &mp_type_NoneType;
+    if (reset != NULL) {
+        self->reset.base.type = &digitalio_digitalinout_type;
+        common_hal_digitalio_digitalinout_construct(&self->reset, reset);
+        common_hal_digitalio_digitalinout_switch_to_output(&self->reset, true, DRIVE_MODE_PUSH_PULL);
+        never_reset_pin_number(reset->number);
+        common_hal_displayio_parallelbus_reset(self);
+    }
+
+    never_reset_pin_number(command->number);
+    never_reset_pin_number(chip_select->number);
+    never_reset_pin_number(write->number);
+    never_reset_pin_number(read->number);
+    for (uint8_t i = 0; i < 8; i++) {
+        never_reset_pin_number(data_pin + i);
+    }
+
 }
 
 void common_hal_displayio_parallelbus_deinit(displayio_parallelbus_obj_t* self) {
+	/* SNIP - same as from SAMD and NRF ports */
+    for (uint8_t i = 0; i < 8; i++) {
+        reset_pin_number(self->data0_pin + i);
+    }
 
+    reset_pin_number(self->command.pin->number);
+    reset_pin_number(self->chip_select.pin->number);
+    reset_pin_number(self->write.pin->number);
+    reset_pin_number(self->read.pin->number);
+    reset_pin_number(self->reset.pin->number);
 }
 
 bool common_hal_displayio_parallelbus_reset(mp_obj_t obj) {
-	return false;
+	/* SNIP - same as from SAMD and NRF ports */
+	displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj);
+    if (self->reset.base.type == &mp_type_NoneType) {
+        return false;
+    }
+
+    common_hal_digitalio_digitalinout_set_value(&self->reset, false);
+    common_hal_mcu_delay_us(4);
+    common_hal_digitalio_digitalinout_set_value(&self->reset, true);
+    return true;
+
 }
 
 bool common_hal_displayio_parallelbus_bus_free(mp_obj_t obj) {
-    return false;
+	/* SNIP - same as from SAMD and NRF ports */
+    return true;
 }
 
 bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t obj) {
-
-    return false;
+	/* SNIP - same as from SAMD and NRF ports */
+    displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj);
+    common_hal_digitalio_digitalinout_set_value(&self->chip_select, false);
+    return true;
 }
 
 void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type,
-        display_chip_select_behavior_t chip_select, const uint8_t *data, uint32_t data_length) {
+	display_chip_select_behavior_t chip_select, const uint8_t *data, uint32_t data_length) {
+    displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj);
+    common_hal_digitalio_digitalinout_set_value(&self->command, byte_type == DISPLAY_DATA);
+
+    uint32_t* clear_write = self->write_clear_register;
+    uint32_t* set_write = self->write_set_register;
+
+    const uint32_t mask = self->write_mask;
+
+    /* Setup structures for data writing.  The ESP32-S2 port differs from the SAMD and NRF ports
+     * because I have not found a way to write a single byte into the ESP32-S2 registers.
+     * For the ESP32-S2, I create a 32-bit data_buffer that is used to transfer the data bytes.
+     */
+
+    *clear_write = mask; // Clear the write pin to prepare the registers before storing the
+    					 // register value into data_buffer
+
+    const uint32_t data_buffer = *self->bus; // store the initial output register values into the data output buffer
+    uint8_t* data_address = ((uint8_t*) &data_buffer) + (self->data0_pin / 8); /* address inside data_buffer where
+    							* each data byte will be written to the data pin registers
+    							*/
+
+
+    if ( self->data_write_same_register ) { // data and write pins are on the same register
+	    for (uint32_t i = 0; i < data_length; i++) {
+
+	    	/* Note: If the write pin and data pins are controlled by the same GPIO register, we can eliminate
+	    	 * the "clear_write" step below, since the write pin is cleared when the data_buffer is written
+	    	 * to the bus.
+	    	 */
+
+	        *(data_address) = data[i]; // stuff the data byte into the data_buffer at the correct offset byte location
+	        *self->bus = data_buffer; // write the data to the output register
+	        *set_write = mask; // set the write pin
+	    }
+	}
+	else { // data and write pins are on different registers
+		for (uint32_t i = 0; i < data_length; i++) {
+			*clear_write = mask; // clear the write pin (See comment above, this may not be necessary).
+	        *(data_address) = data[i]; // stuff the data byte into the data_buffer at the correct offset byte location
+	        *self->bus = data_buffer; // write the data to the output register
+	        *set_write = mask; // set the write pin
+
+	    }
+	}
 
 }
 
 void common_hal_displayio_parallelbus_end_transaction(mp_obj_t obj) {
-
+	/* SNIP - same as from SAMD and NRF ports */
+    displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj);
+    common_hal_digitalio_digitalinout_set_value(&self->chip_select, true);
 }
diff --git a/ports/esp32s2/common-hal/displayio/ParallelBus.h b/ports/esp32s2/common-hal/displayio/ParallelBus.h
index cd636921d..84302118b 100644
--- a/ports/esp32s2/common-hal/displayio/ParallelBus.h
+++ b/ports/esp32s2/common-hal/displayio/ParallelBus.h
@@ -31,6 +31,17 @@
 
 typedef struct {
     mp_obj_base_t base;
+    uint32_t* bus; // pointer where 8 bits of data are written to the display
+    digitalio_digitalinout_obj_t command;
+    digitalio_digitalinout_obj_t chip_select;
+    digitalio_digitalinout_obj_t reset;
+    digitalio_digitalinout_obj_t write;
+    digitalio_digitalinout_obj_t read;
+    uint8_t data0_pin; // pin number for the lowest number data pin.  Must be 8-bit aligned
+    bool data_write_same_register; // if data and write pins are in the sare
+    uint32_t* write_set_register; // pointer to the write group for setting the write bit to latch the data on the LCD
+    uint32_t* write_clear_register; // pointer to the write group for clearing the write bit to latch the data on the LCD
+    uint32_t write_mask; // bit mask for the single bit for the write pin register
 } displayio_parallelbus_obj_t;
 
 #endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_DISPLAYIO_PARALLELBUS_H
diff --git a/ports/esp32s2/common-hal/socketpool/Socket.c b/ports/esp32s2/common-hal/socketpool/Socket.c
index 5e943f8fd..cee940aaf 100644
--- a/ports/esp32s2/common-hal/socketpool/Socket.c
+++ b/ports/esp32s2/common-hal/socketpool/Socket.c
@@ -3,7 +3,7 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ * Copyright (c) 2020 Lucian Copeland for Adafruit Industries
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -37,140 +37,168 @@
 #include "components/lwip/lwip/src/include/lwip/sys.h"
 #include "components/lwip/lwip/src/include/lwip/netdb.h"
 
-void common_hal_socketpool_socket_settimeout(socketpool_socket_obj_t* self, mp_uint_t timeout_ms) {
-    self->timeout_ms = timeout_ms;
-}
+STATIC socketpool_socket_obj_t * open_socket_handles[CONFIG_LWIP_MAX_SOCKETS];
 
-bool common_hal_socketpool_socket_connect(socketpool_socket_obj_t* self, const char* host, mp_uint_t hostlen, mp_int_t port) {
-    // For simplicity we use esp_tls for all TCP connections. If it's not SSL, ssl_context will be
-    // NULL and should still work. This makes regular TCP connections more memory expensive but TLS
-    // should become more and more common. Therefore, we optimize for the TLS case.
-
-    esp_tls_cfg_t* tls_config = NULL;
-    if (self->ssl_context != NULL) {
-        tls_config = &self->ssl_context->ssl_config;
-    }
-    int result = esp_tls_conn_new_sync(host, hostlen, port, tls_config, self->tcp);
-    self->connected = result >= 0;
-    if (result < 0) {
-        int esp_tls_code;
-        int flags;
-        esp_err_t err = esp_tls_get_and_clear_last_error(self->tcp->error_handle, &esp_tls_code, &flags);
-
-        if (err == ESP_ERR_MBEDTLS_SSL_SETUP_FAILED) {
-            mp_raise_espidf_MemoryError();
-        } else if (ESP_ERR_MBEDTLS_SSL_HANDSHAKE_FAILED) {
-            mp_raise_OSError_msg_varg(translate("Failed SSL handshake"));
-        } else {
-            mp_raise_OSError_msg_varg(translate("Unhandled ESP TLS error %d %d %x %d"), esp_tls_code, flags, err, result);
+void socket_reset(void) {
+    for (size_t i = 0; i < MP_ARRAY_SIZE(open_socket_handles); i++) {
+        if (open_socket_handles[i]) {
+            if (open_socket_handles[i]->num > 0) {
+                // Close automatically clears socket handle
+                common_hal_socketpool_socket_close(open_socket_handles[i]);
+            } else {
+                open_socket_handles[i] = NULL;
+            }
         }
-    } else {
-        // Connection successful, set the timeout on the underlying socket. We can't rely on the IDF
-        // to do it because the config structure is only used for TLS connections. Generally, we
-        // shouldn't hit this timeout because we try to only read available data. However, there is
-        // always a chance that we try to read something that is used internally.
-        int fd;
-        esp_tls_get_conn_sockfd(self->tcp, &fd);
-        struct timeval tv;
-        tv.tv_sec = 2 * 60; // Two minutes
-        tv.tv_usec = 0;
-        setsockopt(fd, SOL_SOCKET, SO_RCVTIMEO, &tv, sizeof(tv));
-        setsockopt(fd, SOL_SOCKET, SO_SNDTIMEO, &tv, sizeof(tv));
     }
-
-    return self->connected;
 }
 
-bool common_hal_socketpool_socket_get_connected(socketpool_socket_obj_t* self) {
-    return self->connected;
-}
-
-mp_uint_t common_hal_socketpool_socket_send(socketpool_socket_obj_t* self, const uint8_t* buf, mp_uint_t len) {
-    size_t sent = esp_tls_conn_write(self->tcp, buf, len);
-
-    if (sent < 0) {
-        mp_raise_OSError(MP_ENOTCONN);
+bool register_open_socket(socketpool_socket_obj_t* self) {
+    for (size_t i = 0; i < MP_ARRAY_SIZE(open_socket_handles); i++) {
+        if (open_socket_handles[i] == NULL) {
+            open_socket_handles[i] = self;
+            return true;
+        }
     }
-    return sent;
+    return false;
 }
 
-mp_uint_t common_hal_socketpool_socket_recv_into(socketpool_socket_obj_t* self, const uint8_t* buf, mp_uint_t len) {
-    size_t received = 0;
-    int status = 0;
+socketpool_socket_obj_t* common_hal_socketpool_socket_accept(socketpool_socket_obj_t* self,
+                                        uint8_t* ip, uint *port) {
+    struct sockaddr_in accept_addr;
+    socklen_t socklen = sizeof(accept_addr);
+    int newsoc = -1;
+    bool timed_out = false;
     uint64_t start_ticks = supervisor_ticks_ms64();
-    int sockfd;
-    esp_err_t err = esp_tls_get_conn_sockfd(self->tcp, &sockfd);
-    if (err != ESP_OK) {
-        mp_raise_OSError(MP_EBADF);
-    }
-    while (received == 0 &&
-           status >= 0 &&
-           (self->timeout_ms == 0 || supervisor_ticks_ms64() - start_ticks <= self->timeout_ms) &&
+
+    // Allow timeouts and interrupts
+    while (newsoc == -1 &&
+           !timed_out &&
            !mp_hal_is_interrupted()) {
-        RUN_BACKGROUND_TASKS;
-        size_t available = esp_tls_get_bytes_avail(self->tcp);
-        if (available == 0) {
-            // This reads the raw socket buffer and is used for non-TLS connections
-            // and between encrypted TLS blocks.
-            status = lwip_ioctl(sockfd, FIONREAD, &available);
+        if (self->timeout_ms != (uint)-1 && self->timeout_ms != 0) {
+            timed_out = supervisor_ticks_ms64() - start_ticks >= self->timeout_ms;
         }
-        size_t remaining = len - received;
-        if (available > remaining) {
-            available = remaining;
+        RUN_BACKGROUND_TASKS;
+        newsoc = lwip_accept(self->num, (struct sockaddr *)&accept_addr, &socklen);
+        // In non-blocking mode, fail instead of timing out
+        if (newsoc == -1 && self->timeout_ms == 0) {
+            mp_raise_OSError(MP_EAGAIN);
         }
-        if (available > 0) {
-            status = esp_tls_conn_read(self->tcp, (void*) buf + received, available);
-            if (status == 0) {
-                // Reading zero when something is available indicates a closed
-                // connection. (The available bytes could have been TLS internal.)
-                break;
-            }
-            if (status > 0) {
-                received += status;
-            }
+    }
+
+    if (!timed_out) {
+        // harmless on failure but avoiding memcpy is faster
+        memcpy((void *)ip, (void*)&accept_addr.sin_addr.s_addr, sizeof(accept_addr.sin_addr.s_addr));
+        *port = accept_addr.sin_port;
+    } else {
+        mp_raise_OSError(ETIMEDOUT);
+    }
+
+    if (newsoc > 0) {
+        // Create the socket
+        socketpool_socket_obj_t *sock = m_new_obj_with_finaliser(socketpool_socket_obj_t);
+        sock->base.type = &socketpool_socket_type;
+        sock->num = newsoc;
+        sock->pool = self->pool;
+
+        if (!register_open_socket(sock)) {
+            mp_raise_OSError(MP_EBADF);
         }
+
+        lwip_fcntl(newsoc, F_SETFL, O_NONBLOCK);
+        return sock;
+    } else {
+        mp_raise_OSError(MP_EBADF);
+        return NULL;
     }
+}
 
-    if (received == 0) {
-        // socket closed
-        common_hal_socketpool_socket_close(self);
+bool common_hal_socketpool_socket_bind(socketpool_socket_obj_t* self,
+                                        const char* host, size_t hostlen, uint8_t port) {
+    struct sockaddr_in bind_addr;
+    bind_addr.sin_addr.s_addr = inet_addr(host);
+    bind_addr.sin_family = AF_INET;
+    bind_addr.sin_port = htons(port);
+
+    int opt = 1;
+    int err = lwip_setsockopt(self->num, SOL_SOCKET, SO_REUSEADDR, &opt, sizeof(opt));
+    if (err != 0) {
+        mp_raise_RuntimeError(translate("Cannot set socket options"));
     }
-    return received;
+    int result = lwip_bind(self->num, (struct sockaddr *)&bind_addr, sizeof(bind_addr)) == 0;
+    return result;
 }
 
-mp_uint_t common_hal_socketpool_socket_sendto(socketpool_socket_obj_t* self,
-    const char* host, size_t hostlen, uint8_t port, const uint8_t* buf, mp_uint_t len) {
+void common_hal_socketpool_socket_close(socketpool_socket_obj_t* self) {
+    self->connected = false;
+    if (self->num >= 0) {
+        lwip_shutdown(self->num, 0);
+        lwip_close(self->num);
+        self->num = -1;
+    }
+    // Remove socket record
+    for (size_t i = 0; i < MP_ARRAY_SIZE(open_socket_handles); i++) {
+        if (open_socket_handles[i] == self) {
+            open_socket_handles[i] = NULL;
+        }
+    }
+}
 
-    // Get the IP address string
+bool common_hal_socketpool_socket_connect(socketpool_socket_obj_t* self,
+                                            const char* host, mp_uint_t hostlen, mp_int_t port) {
     const struct addrinfo hints = {
         .ai_family = AF_INET,
         .ai_socktype = SOCK_STREAM,
     };
-    struct addrinfo *result;
-    int error = lwip_getaddrinfo(host, NULL, &hints, &result);
-    if (error != 0 || result == NULL) {
-        return 0;
+    struct addrinfo *result_i;
+    int error = lwip_getaddrinfo(host, NULL, &hints, &result_i);
+    if (error != 0 || result_i == NULL) {
+        mp_raise_OSError(EHOSTUNREACH);
     }
+
+    // Set parameters
+    struct sockaddr_in dest_addr;
     #pragma GCC diagnostic push
     #pragma GCC diagnostic ignored "-Wcast-align"
-    struct in_addr *addr = &((struct sockaddr_in *)result->ai_addr)->sin_addr;
+    dest_addr.sin_addr.s_addr = ((struct sockaddr_in *)result_i->ai_addr)->sin_addr.s_addr;
     #pragma GCC diagnostic pop
-    char ip_str[IP4ADDR_STRLEN_MAX];
-    inet_ntoa_r(*addr, ip_str, IP4ADDR_STRLEN_MAX);
-    freeaddrinfo(result);
+    freeaddrinfo(result_i);
 
-    // Set parameters
-    struct sockaddr_in dest_addr;
-    dest_addr.sin_addr.s_addr = inet_addr((const char *)ip_str);
     dest_addr.sin_family = AF_INET;
     dest_addr.sin_port = htons(port);
 
-    int bytes_sent = lwip_sendto(self->num, buf, len, 0, (struct sockaddr *)&dest_addr, sizeof(dest_addr));
-    if (bytes_sent < 0) {
-        mp_raise_BrokenPipeError();
-        return 0;
+    // Replace above with function call -----
+
+    // Switch to blocking mode for this one call
+    int opts;
+    opts = lwip_fcntl(self->num,F_GETFL,0);
+    opts = opts & (~O_NONBLOCK);
+    lwip_fcntl(self->num, F_SETFL, opts);
+
+    int result = -1;
+    result = lwip_connect(self->num, (struct sockaddr *)&dest_addr, sizeof(struct sockaddr_in));
+
+    // Switch back once complete
+    opts = opts | O_NONBLOCK;
+    lwip_fcntl(self->num, F_SETFL, opts);
+
+    if (result) {
+        self->connected = true;
+        return true;
+    } else {
+        mp_raise_OSError(errno);
     }
-    return bytes_sent;
+}
+
+bool common_hal_socketpool_socket_get_closed(socketpool_socket_obj_t* self) {
+    return self->num < 0;
+}
+
+bool common_hal_socketpool_socket_get_connected(socketpool_socket_obj_t* self) {
+    return self->connected;
+}
+
+bool common_hal_socketpool_socket_listen(socketpool_socket_obj_t* self, int backlog) {
+    return lwip_listen(self->num, backlog) == 0;
 }
 
 mp_uint_t common_hal_socketpool_socket_recvfrom_into(socketpool_socket_obj_t* self,
@@ -178,37 +206,122 @@ mp_uint_t common_hal_socketpool_socket_recvfrom_into(socketpool_socket_obj_t* se
 
     struct sockaddr_in source_addr;
     socklen_t socklen = sizeof(source_addr);
-    int bytes_received = lwip_recvfrom(self->num, buf, len, 0, (struct sockaddr *)&source_addr, &socklen);
 
-    memcpy((void *)ip, (void*)&source_addr.sin_addr.s_addr, sizeof source_addr.sin_addr.s_addr);
-    *port = source_addr.sin_port;
+    // LWIP Socket
+    uint64_t start_ticks = supervisor_ticks_ms64();
+    int received = -1;
+    bool timed_out = false;
+    while (received == -1 &&
+            !timed_out &&
+            !mp_hal_is_interrupted()) {
+        if (self->timeout_ms != (uint)-1  && self->timeout_ms != 0) {
+            timed_out = supervisor_ticks_ms64() - start_ticks >= self->timeout_ms;
+        }
+        RUN_BACKGROUND_TASKS;
+        received = lwip_recvfrom(self->num, buf, len, 0, (struct sockaddr *)&source_addr, &socklen);
 
-    if (bytes_received < 0) {
+        // In non-blocking mode, fail instead of looping
+        if (received == -1 && self->timeout_ms == 0) {
+            mp_raise_OSError(MP_EAGAIN);
+        }
+    }
+
+    if (!timed_out) {
+        memcpy((void *)ip, (void*)&source_addr.sin_addr.s_addr, sizeof(source_addr.sin_addr.s_addr));
+        *port = source_addr.sin_port;
+    } else {
+        mp_raise_OSError(ETIMEDOUT);
+    }
+
+    if (received < 0) {
         mp_raise_BrokenPipeError();
         return 0;
     }
 
-    return bytes_received;
+    return received;
 }
 
-void common_hal_socketpool_socket_close(socketpool_socket_obj_t* self) {
-    self->connected = false;
-    if (self->tcp != NULL) {
-        esp_tls_conn_destroy(self->tcp);
-        self->tcp = NULL;
+mp_uint_t common_hal_socketpool_socket_recv_into(socketpool_socket_obj_t* self, const uint8_t* buf, mp_uint_t len) {
+    int received = 0;
+    bool timed_out = false;
+
+    if (self->num != -1) {
+        // LWIP Socket
+        uint64_t start_ticks = supervisor_ticks_ms64();
+        received = -1;
+        while (received == -1 &&
+                !timed_out &&
+                !mp_hal_is_interrupted()) {
+            if (self->timeout_ms != (uint)-1 && self->timeout_ms != 0) {
+                timed_out = supervisor_ticks_ms64() - start_ticks >= self->timeout_ms;
+            }
+            RUN_BACKGROUND_TASKS;
+            received = lwip_recv(self->num, (void*) buf, len - 1, 0);
+
+            // In non-blocking mode, fail instead of looping
+            if (received == -1 && self->timeout_ms == 0) {
+                mp_raise_OSError(MP_EAGAIN);
+            }
+        }
+    } else {
+        mp_raise_OSError(MP_EBADF);
     }
-    if (self->num >= 0) {
-        lwip_shutdown(self->num, 0);
-        lwip_close(self->num);
-        self->num = -1;
+
+    if (timed_out) {
+        mp_raise_OSError(ETIMEDOUT);
     }
+    return received;
 }
 
-bool common_hal_socketpool_socket_get_closed(socketpool_socket_obj_t* self) {
-    return self->tcp == NULL && self->num < 0;
+mp_uint_t common_hal_socketpool_socket_send(socketpool_socket_obj_t* self, const uint8_t* buf, mp_uint_t len) {
+    int sent = -1;
+    if (self->num != -1) {
+        // LWIP Socket
+        // TODO: deal with potential failure/add timeout?
+        sent = lwip_send(self->num, buf, len, 0);
+    } else {
+        mp_raise_OSError(MP_EBADF);
+    }
+
+    if (sent < 0) {
+        mp_raise_OSError(errno);
+    }
+    return sent;
 }
 
+mp_uint_t common_hal_socketpool_socket_sendto(socketpool_socket_obj_t* self,
+    const char* host, size_t hostlen, uint8_t port, const uint8_t* buf, mp_uint_t len) {
+
+    // Set parameters
+    const struct addrinfo hints = {
+        .ai_family = AF_INET,
+        .ai_socktype = SOCK_STREAM,
+    };
+    struct addrinfo *result_i;
+    int error = lwip_getaddrinfo(host, NULL, &hints, &result_i);
+    if (error != 0 || result_i == NULL) {
+        mp_raise_OSError(EHOSTUNREACH);
+    }
+
+    // Set parameters
+    struct sockaddr_in dest_addr;
+    #pragma GCC diagnostic push
+    #pragma GCC diagnostic ignored "-Wcast-align"
+    dest_addr.sin_addr.s_addr = ((struct sockaddr_in *)result_i->ai_addr)->sin_addr.s_addr;
+    #pragma GCC diagnostic pop
+    freeaddrinfo(result_i);
+
+    dest_addr.sin_family = AF_INET;
+    dest_addr.sin_port = htons(port);
 
-mp_uint_t common_hal_socketpool_socket_get_hash(socketpool_socket_obj_t* self) {
-    return self->num;
+    int bytes_sent = lwip_sendto(self->num, buf, len, 0, (struct sockaddr *)&dest_addr, sizeof(dest_addr));
+    if (bytes_sent < 0) {
+        mp_raise_BrokenPipeError();
+        return 0;
+    }
+    return bytes_sent;
+}
+
+void common_hal_socketpool_socket_settimeout(socketpool_socket_obj_t* self, mp_uint_t timeout_ms) {
+    self->timeout_ms = timeout_ms;
 }
diff --git a/ports/esp32s2/common-hal/socketpool/Socket.h b/ports/esp32s2/common-hal/socketpool/Socket.h
index 62b5ded58..b86f5597c 100644
--- a/ports/esp32s2/common-hal/socketpool/Socket.h
+++ b/ports/esp32s2/common-hal/socketpool/Socket.h
@@ -37,11 +37,15 @@
 typedef struct {
     mp_obj_base_t base;
     int num;
+    int type;
+    int family;
+    int ipproto;
     bool connected;
-    esp_tls_t* tcp;
-    ssl_sslcontext_obj_t* ssl_context;
     socketpool_socketpool_obj_t* pool;
     mp_uint_t timeout_ms;
 } socketpool_socket_obj_t;
 
+void socket_reset(void);
+bool register_open_socket(socketpool_socket_obj_t* self);
+
 #endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_SOCKETPOOL_SOCKET_H
diff --git a/ports/esp32s2/common-hal/socketpool/SocketPool.c b/ports/esp32s2/common-hal/socketpool/SocketPool.c
index 3bec5f337..fbd6dca7a 100644
--- a/ports/esp32s2/common-hal/socketpool/SocketPool.c
+++ b/ports/esp32s2/common-hal/socketpool/SocketPool.c
@@ -25,6 +25,7 @@
  */
 
 #include "shared-bindings/socketpool/SocketPool.h"
+#include "common-hal/socketpool/Socket.h"
 
 #include "py/runtime.h"
 #include "shared-bindings/wifi/__init__.h"
@@ -65,27 +66,23 @@ socketpool_socket_obj_t* common_hal_socketpool_socket(socketpool_socketpool_obj_
         mp_raise_NotImplementedError(translate("Only IPv4 sockets supported"));
     }
 
+    socketpool_socket_obj_t *sock = m_new_obj_with_finaliser(socketpool_socket_obj_t);
+    sock->base.type = &socketpool_socket_type;
+    sock->type = socket_type;
+    sock->family = addr_family;
+    sock->ipproto = ipproto;
+    sock->pool = self;
+    sock->timeout_ms = (uint)-1;
+
+    // Create LWIP socket
     int socknum = -1;
-    esp_tls_t* tcp_handle = NULL;
-    if (socket_type == SOCK_DGRAM || socket_type == SOCK_RAW) {
-        socknum = lwip_socket(addr_family, socket_type, ipproto);
-    } else {
-        tcp_handle = esp_tls_init();
-
-        if (tcp_handle == NULL) {
-            mp_raise_espidf_MemoryError();
-        }
-    }
-    if (socknum < 0 && tcp_handle == NULL) {
+    socknum = lwip_socket(sock->family, sock->type, sock->ipproto);
+    if (socknum < 0 || !register_open_socket(sock)) {
         mp_raise_RuntimeError(translate("Out of sockets"));
     }
-
-    socketpool_socket_obj_t *sock = m_new_obj_with_finaliser(socketpool_socket_obj_t);
-    sock->base.type = &socketpool_socket_type;
     sock->num = socknum;
-    sock->tcp = tcp_handle;
-    sock->ssl_context = NULL;
-    sock->pool = self;
+    // Sockets should be nonblocking in most cases
+    lwip_fcntl(socknum, F_SETFL, O_NONBLOCK);
     return sock;
 }
 
diff --git a/ports/esp32s2/common-hal/ssl/SSLContext.c b/ports/esp32s2/common-hal/ssl/SSLContext.c
index e24fd338b..afc3ecce2 100644
--- a/ports/esp32s2/common-hal/ssl/SSLContext.c
+++ b/ports/esp32s2/common-hal/ssl/SSLContext.c
@@ -25,6 +25,9 @@
  */
 
 #include "shared-bindings/ssl/SSLContext.h"
+#include "shared-bindings/ssl/SSLSocket.h"
+
+#include "bindings/espidf/__init__.h"
 
 #include "py/runtime.h"
 
@@ -32,10 +35,26 @@ void common_hal_ssl_sslcontext_construct(ssl_sslcontext_obj_t* self) {
 
 }
 
-socketpool_socket_obj_t* common_hal_ssl_sslcontext_wrap_socket(ssl_sslcontext_obj_t* self,
+ssl_sslsocket_obj_t* common_hal_ssl_sslcontext_wrap_socket(ssl_sslcontext_obj_t* self,
     socketpool_socket_obj_t* socket, bool server_side, const char* server_hostname) {
 
-    socket->ssl_context = self;
+    if (socket->type != SOCK_STREAM) {
+        mp_raise_RuntimeError(translate("Invalid socket for TLS"));
+    }
+
+    ssl_sslsocket_obj_t *sock = m_new_obj_with_finaliser(ssl_sslsocket_obj_t);
+    sock->base.type = &ssl_sslsocket_type;
+    sock->ssl_context = self;
+    sock->sock = socket;
+
+    esp_tls_t* tls_handle = esp_tls_init();
+    if (tls_handle == NULL) {
+        mp_raise_espidf_MemoryError();
+    }
+    sock->tls = tls_handle;
+
+    // TODO: do something with the original socket? Don't call a close on the internal LWIP.
+
     // Should we store server hostname on the socket in case connect is called with an ip?
-    return socket;
+    return sock;
 }
diff --git a/ports/esp32s2/common-hal/ssl/SSLSocket.c b/ports/esp32s2/common-hal/ssl/SSLSocket.c
new file mode 100644
index 000000000..33507e0f4
--- /dev/null
+++ b/ports/esp32s2/common-hal/ssl/SSLSocket.c
@@ -0,0 +1,176 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ * Copyright (c) 2021 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "shared-bindings/ssl/SSLSocket.h"
+#include "shared-bindings/socketpool/Socket.h"
+#include "shared-bindings/ssl/SSLContext.h"
+
+#include "bindings/espidf/__init__.h"
+#include "lib/utils/interrupt_char.h"
+#include "py/mperrno.h"
+#include "py/runtime.h"
+#include "supervisor/shared/tick.h"
+
+void common_hal_ssl_sslsocket_settimeout(ssl_sslsocket_obj_t* self, mp_uint_t timeout_ms) {
+    self->sock->timeout_ms = timeout_ms;
+}
+
+ssl_sslsocket_obj_t* common_hal_ssl_sslsocket_accept(ssl_sslsocket_obj_t* self,
+                                        uint8_t* ip, uint *port) {
+    socketpool_socket_obj_t * sock = common_hal_socketpool_socket_accept(self->sock, ip, port);
+    ssl_sslsocket_obj_t * sslsock = common_hal_ssl_sslcontext_wrap_socket(self->ssl_context, sock, false, NULL);
+    return sslsock;
+}
+
+bool common_hal_ssl_sslsocket_bind(ssl_sslsocket_obj_t* self,
+                                        const char* host, size_t hostlen, uint8_t port) {
+    return common_hal_socketpool_socket_bind(self->sock, host, hostlen, port);
+}
+
+void common_hal_ssl_sslsocket_close(ssl_sslsocket_obj_t* self) {
+    common_hal_socketpool_socket_close(self->sock);
+    esp_tls_conn_destroy(self->tls);
+    self->tls = NULL;
+}
+
+bool common_hal_ssl_sslsocket_connect(ssl_sslsocket_obj_t* self,
+                                            const char* host, mp_uint_t hostlen, mp_int_t port) {
+    esp_tls_cfg_t* tls_config = NULL;
+    tls_config = &self->ssl_context->ssl_config;
+    int result = esp_tls_conn_new_sync(host, hostlen, port, tls_config, self->tls);
+    self->sock->connected = result >= 0;
+    if (result < 0) {
+        int esp_tls_code;
+        int flags;
+        esp_err_t err = esp_tls_get_and_clear_last_error(self->tls->error_handle, &esp_tls_code, &flags);
+
+        if (err == ESP_ERR_MBEDTLS_SSL_SETUP_FAILED) {
+            mp_raise_espidf_MemoryError();
+        } else if (ESP_ERR_MBEDTLS_SSL_HANDSHAKE_FAILED) {
+            mp_raise_OSError_msg_varg(translate("Failed SSL handshake"));
+        } else {
+            mp_raise_OSError_msg_varg(translate("Unhandled ESP TLS error %d %d %x %d"), esp_tls_code, flags, err, result);
+        }
+    } else {
+        // Connection successful, set the timeout on the underlying socket. We can't rely on the IDF
+        // to do it because the config structure is only used for TLS connections. Generally, we
+        // shouldn't hit this timeout because we try to only read available data. However, there is
+        // always a chance that we try to read something that is used internally.
+        int fd;
+        esp_tls_get_conn_sockfd(self->tls, &fd);
+        struct timeval tv;
+        tv.tv_sec = 2 * 60; // Two minutes
+        tv.tv_usec = 0;
+        setsockopt(fd, SOL_SOCKET, SO_RCVTIMEO, &tv, sizeof(tv));
+        setsockopt(fd, SOL_SOCKET, SO_SNDTIMEO, &tv, sizeof(tv));
+    }
+
+    return self->sock->connected;
+}
+
+bool common_hal_ssl_sslsocket_get_closed(ssl_sslsocket_obj_t* self) {
+    return self->tls == NULL && self->sock->num < 0;
+}
+
+bool common_hal_ssl_sslsocket_get_connected(ssl_sslsocket_obj_t* self) {
+    return self->sock->connected;
+}
+
+bool common_hal_ssl_sslsocket_listen(ssl_sslsocket_obj_t* self, int backlog) {
+    return common_hal_socketpool_socket_listen(self->sock, backlog);
+}
+
+mp_uint_t common_hal_ssl_sslsocket_recv_into(ssl_sslsocket_obj_t* self, const uint8_t* buf, mp_uint_t len) {
+    int received = 0;
+    bool timed_out = false;
+    int status = 0;
+    uint64_t start_ticks = supervisor_ticks_ms64();
+    int sockfd;
+    esp_err_t err = esp_tls_get_conn_sockfd(self->tls, &sockfd);
+    if (err != ESP_OK) {
+        mp_raise_OSError(MP_EBADF);
+    }
+    while (received == 0 &&
+           status >= 0 &&
+           !timed_out &&
+           !mp_hal_is_interrupted()) {
+        if (self->sock->timeout_ms != (uint)-1 && self->sock->timeout_ms != 0) {
+            timed_out = self->sock->timeout_ms == 0 || supervisor_ticks_ms64() - start_ticks >= self->sock->timeout_ms;
+        }
+        RUN_BACKGROUND_TASKS;
+        size_t available = esp_tls_get_bytes_avail(self->tls);
+        if (available == 0) {
+            // This reads the raw socket buffer and is used for non-TLS connections
+            // and between encrypted TLS blocks.
+            status = lwip_ioctl(sockfd, FIONREAD, &available);
+        }
+        size_t remaining = len - received;
+        if (available > remaining) {
+            available = remaining;
+        }
+        if (available > 0) {
+            status = esp_tls_conn_read(self->tls, (void*) buf + received, available);
+            if (status == 0) {
+                // Reading zero when something is available indicates a closed
+                // connection. (The available bytes could have been TLS internal.)
+                break;
+            }
+            if (status > 0) {
+                received += status;
+            }
+        }
+        // In non-blocking mode, fail instead of timing out
+        if (received==0 && self->sock->timeout_ms == 0) {
+            mp_raise_OSError(MP_EAGAIN);
+        }
+    }
+
+    if (timed_out) {
+        mp_raise_OSError(ETIMEDOUT);
+    }
+    return received;
+}
+
+mp_uint_t common_hal_ssl_sslsocket_send(ssl_sslsocket_obj_t* self, const uint8_t* buf, mp_uint_t len) {
+    int sent = -1;
+    sent = esp_tls_conn_write(self->tls, buf, len);
+
+    if (sent < 0) {
+        int esp_tls_code;
+        int flags;
+        esp_err_t err = esp_tls_get_and_clear_last_error(self->tls->error_handle, &esp_tls_code, &flags);
+
+        if (err == ESP_ERR_MBEDTLS_SSL_SETUP_FAILED) {
+            mp_raise_espidf_MemoryError();
+        } else if (ESP_ERR_MBEDTLS_SSL_HANDSHAKE_FAILED) {
+            mp_raise_OSError_msg_varg(translate("Failed SSL handshake"));
+        } else {
+            mp_raise_OSError_msg_varg(translate("Unhandled ESP TLS error %d %d %x %d"), esp_tls_code, flags, err, sent);
+        }
+    }
+    return sent;
+}
diff --git a/ports/esp32s2/common-hal/ssl/SSLSocket.h b/ports/esp32s2/common-hal/ssl/SSLSocket.h
new file mode 100644
index 000000000..e9e5bff06
--- /dev/null
+++ b/ports/esp32s2/common-hal/ssl/SSLSocket.h
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_SSL_SSLSOCKET_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_SSL_SSLSOCKET_H
+
+#include "py/obj.h"
+
+#include "common-hal/ssl/SSLContext.h"
+#include "common-hal/socketpool/Socket.h"
+
+#include "components/esp-tls/esp_tls.h"
+
+typedef struct {
+    mp_obj_base_t base;
+    socketpool_socket_obj_t * sock;
+    esp_tls_t* tls;
+    ssl_sslcontext_obj_t* ssl_context;
+} ssl_sslsocket_obj_t;
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_SSL_SSLSOCKET_H
diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c
index 930230088..574bab0a1 100644
--- a/ports/esp32s2/common-hal/wifi/Radio.c
+++ b/ports/esp32s2/common-hal/wifi/Radio.c
@@ -72,7 +72,7 @@ void common_hal_wifi_radio_set_enabled(wifi_radio_obj_t *self, bool enabled) {
     }
     if (!self->started && enabled) {
 	// esp_wifi_start() would default to soft-AP, thus setting it to station
-        ESP_ERROR_CHECK(esp_wifi_set_mode(WIFI_MODE_STA));
+        start_station(self);
         ESP_ERROR_CHECK(esp_wifi_start());
         self->started = true;
         return;
@@ -89,7 +89,9 @@ mp_obj_t common_hal_wifi_radio_start_scanning_networks(wifi_radio_obj_t *self) {
     if (self->current_scan != NULL) {
         mp_raise_RuntimeError(translate("Already scanning for wifi networks"));
     }
-    // check enabled
+    if (!common_hal_wifi_radio_get_enabled(self)) {
+        mp_raise_RuntimeError(translate("wifi is not enabled"));
+    }
     start_station(self);
 
     wifi_scannednetworks_obj_t *scan = m_new_obj(wifi_scannednetworks_obj_t);
@@ -126,7 +128,25 @@ void common_hal_wifi_radio_set_hostname(wifi_radio_obj_t *self, const char *host
 }
 
 wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout, uint8_t* bssid, size_t bssid_len) {
-    // check enabled
+    if (!common_hal_wifi_radio_get_enabled(self)) {
+        mp_raise_RuntimeError(translate("wifi is not enabled"));
+    }
+
+    EventBits_t bits;
+    // can't block since both bits are false after wifi_init
+    // both bits are true after an existing connection stops
+    bits = xEventGroupWaitBits(self->event_group_handle,
+        WIFI_CONNECTED_BIT | WIFI_DISCONNECTED_BIT,
+        pdTRUE,
+        pdTRUE,
+        0);
+    if (((bits & WIFI_CONNECTED_BIT) != 0) &&
+        !((bits & WIFI_DISCONNECTED_BIT) != 0)) {
+        return WIFI_RADIO_ERROR_NONE;
+    }
+    // explicitly clear bits since xEventGroupWaitBits may have timed out
+    xEventGroupClearBits(self->event_group_handle, WIFI_CONNECTED_BIT);
+    xEventGroupClearBits(self->event_group_handle, WIFI_DISCONNECTED_BIT);
     start_station(self);
 
     wifi_config_t* config = &self->sta_config;
@@ -157,7 +177,6 @@ wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t
     self->retries_left = 5;
     esp_wifi_connect();
 
-    EventBits_t bits;
     do {
         RUN_BACKGROUND_TASKS;
         bits = xEventGroupWaitBits(self->event_group_handle,
diff --git a/ports/esp32s2/mpconfigport.h b/ports/esp32s2/mpconfigport.h
index 9c0fd9da3..0cf695bc9 100644
--- a/ports/esp32s2/mpconfigport.h
+++ b/ports/esp32s2/mpconfigport.h
@@ -30,7 +30,6 @@
 
 #define MICROPY_NLR_THUMB                   (0)
 
-#define MICROPY_PY_UJSON                    (1)
 #define MICROPY_USE_INTERNAL_PRINTF         (0)
 #define MICROPY_PY_SYS_PLATFORM             "Espressif ESP32-S2"
 
diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c
index 6491e7430..534f7f71b 100644
--- a/ports/esp32s2/supervisor/port.c
+++ b/ports/esp32s2/supervisor/port.c
@@ -46,6 +46,7 @@
 #include "common-hal/pulseio/PulseIn.h"
 #include "common-hal/pwmio/PWMOut.h"
 #include "common-hal/watchdog/WatchDogTimer.h"
+#include "common-hal/socketpool/Socket.h"
 #include "common-hal/wifi/__init__.h"
 #include "supervisor/memory.h"
 #include "supervisor/shared/tick.h"
@@ -143,9 +144,9 @@ safe_mode_t port_init(void) {
         case ESP_RST_BROWNOUT:
             return BROWNOUT;
         case ESP_RST_PANIC:
+            return HARD_CRASH;
         case ESP_RST_INT_WDT:
         case ESP_RST_WDT:
-            return HARD_CRASH;
         default:
             break;
     }
@@ -222,6 +223,10 @@ void reset_port(void) {
 #if CIRCUITPY_WIFI
     wifi_reset();
 #endif
+
+#if CIRCUITPY_SOCKETPOOL
+    socket_reset();
+#endif
 }
 
 void reset_to_bootloader(void) {