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authorSean Cross <sean@xobs.io>2020-05-21 21:46:37 +0800
committerSean Cross <sean@xobs.io>2020-05-21 21:46:37 +0800
commitfd4ef233c6d9b312c3582466c68390a16ddf15fa (patch)
tree9155810b4e9e8bbaba2329f036f962efd8d0d91e /ports/nrf/supervisor
parent77cf4dce8f1ae03edbe275cb82e250daeba8990f (diff)
nrf: port: add memory barrier before wfi
ARM recommends issuing a DSB instruction propr to issuing WFI, as it is required on many parts suchas Cortex-M7. This is effectively a no-op on the Cortex-M4 used in most NRF parts, however it ensures that we won't be surprised when new parts come out. See http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0321a/BIHICBGB.html for more information. Signed-off-by: Sean Cross <sean@xobs.io>
Diffstat (limited to 'ports/nrf/supervisor')
-rw-r--r--ports/nrf/supervisor/port.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/ports/nrf/supervisor/port.c b/ports/nrf/supervisor/port.c
index aa138e481..36725293c 100644
--- a/ports/nrf/supervisor/port.c
+++ b/ports/nrf/supervisor/port.c
@@ -273,8 +273,10 @@ void port_sleep_until_interrupt(void) {
// available, even though the actual handler won't fire until
// we re-enable interrupts.
common_hal_mcu_disable_interrupts();
- if (!tud_task_event_ready())
+ if (!tud_task_event_ready()) {
+ __DSB();
__WFI();
+ }
common_hal_mcu_enable_interrupts();
}
}