diff options
| author | Lucian Copeland <hierophect@gmail.com> | 2020-06-05 11:42:34 -0400 |
|---|---|---|
| committer | Lucian Copeland <hierophect@gmail.com> | 2020-06-05 13:56:32 -0400 |
| commit | ad0971fb25347a8cc36ace2c45449ef7eac6995e (patch) | |
| tree | 5545b3c93b75cd1b21f1f56156e850db26c5effc /ports/stm/peripherals | |
| parent | a0977cac7b92233a3ea52404fe59f9a4a3d3ac4a (diff) | |
Override HAL_Delay and HAL_GetTick
Diffstat (limited to 'ports/stm/peripherals')
| -rw-r--r-- | ports/stm/peripherals/stm32f4/stm32f401xe/clocks.h | 2 | ||||
| -rw-r--r-- | ports/stm/peripherals/stm32f4/stm32f411xe/clocks.h | 2 | ||||
| -rw-r--r-- | ports/stm/peripherals/stm32f4/stm32f412zx/clocks.h | 2 | ||||
| -rw-r--r-- | ports/stm/peripherals/stm32h7/clocks.c | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/clocks.h b/ports/stm/peripherals/stm32f4/stm32f401xe/clocks.h index be62370d8..d157d944a 100644 --- a/ports/stm/peripherals/stm32f4/stm32f401xe/clocks.h +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/clocks.h @@ -37,7 +37,7 @@ #ifndef CPY_CLK_PLLN #define CPY_CLK_PLLN (336) #endif -#ifndef (CPY_CLK_PLLP +#ifndef CPY_CLK_PLLP #define CPY_CLK_PLLP (RCC_PLLP_DIV4) #endif #ifndef CPY_CLK_PLLQ diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/clocks.h b/ports/stm/peripherals/stm32f4/stm32f411xe/clocks.h index adb60e8a9..a2fb7bd54 100644 --- a/ports/stm/peripherals/stm32f4/stm32f411xe/clocks.h +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/clocks.h @@ -32,7 +32,7 @@ // Note - the actual maximum frequency is 100MHz, but this requires divisors // which are incompatible with USB, and there is no additional PLL such as on -// the F412. +// the F412. // Defaults: #ifndef CPY_CLK_VSCALE diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/clocks.h b/ports/stm/peripherals/stm32f4/stm32f412zx/clocks.h index 8f092adba..e1355c8f3 100644 --- a/ports/stm/peripherals/stm32f4/stm32f412zx/clocks.h +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/clocks.h @@ -30,7 +30,7 @@ // Line Type: Access Line // Speed: 200MHz (MAX) -// Note - uses the I2S PLL for SUSB to enable full 100MHz operation, since USB +// Note - uses the I2S PLL for SUSB to enable full 100MHz operation, since USB // can't get the right divisors from 100MHz PLL settings. // Defaults: diff --git a/ports/stm/peripherals/stm32h7/clocks.c b/ports/stm/peripherals/stm32h7/clocks.c index d68137df0..0e4e79f9f 100644 --- a/ports/stm/peripherals/stm32h7/clocks.c +++ b/ports/stm/peripherals/stm32h7/clocks.c @@ -120,4 +120,4 @@ void stm32_peripherals_clocks_init(void) { if (lse_failure) { reset_into_safe_mode(HARD_CRASH); //TODO: make safe mode category CLOCK_FAULT? } -}
\ No newline at end of file +} |
