diff options
| author | Lucian Copeland <hierophect@gmail.com> | 2020-04-13 12:03:05 -0400 |
|---|---|---|
| committer | Lucian Copeland <hierophect@gmail.com> | 2020-04-13 12:03:05 -0400 |
| commit | 5ac38c95cc914c69e56a0f646131b34826b6f59a (patch) | |
| tree | 2083df3f5c661b48c94d3f30a2bdb11c02d312f3 /ports | |
| parent | 92a0621e5956fee84591859ffa58c04be8e46158 (diff) | |
Various requested fixes
Diffstat (limited to 'ports')
| -rwxr-xr-x | ports/stm/Makefile | 1 | ||||
| -rw-r--r-- | ports/stm/boards/nucleo_f767zi/mpconfigboard.mk | 4 | ||||
| -rw-r--r-- | ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk | 4 | ||||
| -rw-r--r-- | ports/stm/boards/thunderpack/mpconfigboard.mk | 2 | ||||
| -rw-r--r-- | ports/stm/common-hal/busio/I2C.c | 6 | ||||
| -rw-r--r-- | ports/stm/common-hal/busio/SPI.c | 24 | ||||
| -rw-r--r-- | ports/stm/common-hal/busio/UART.c | 12 | ||||
| -rw-r--r-- | ports/stm/supervisor/internal_flash.c | 10 | ||||
| -rw-r--r-- | ports/stm/supervisor/port.c | 30 | ||||
| -rw-r--r-- | ports/stm/supervisor/usb.c | 26 |
10 files changed, 39 insertions, 80 deletions
diff --git a/ports/stm/Makefile b/ports/stm/Makefile index 355fd1d02..dc32f6c7a 100755 --- a/ports/stm/Makefile +++ b/ports/stm/Makefile @@ -255,7 +255,6 @@ OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o)) ifeq ($(INTERNAL_LIBM),1) OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) endif -#OBJ += $(addprefix $(BUILD)/, $(SRC_O)) OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) diff --git a/ports/stm/boards/nucleo_f767zi/mpconfigboard.mk b/ports/stm/boards/nucleo_f767zi/mpconfigboard.mk index cac4a273e..c8c2a3d2b 100644 --- a/ports/stm/boards/nucleo_f767zi/mpconfigboard.mk +++ b/ports/stm/boards/nucleo_f767zi/mpconfigboard.mk @@ -1,5 +1,5 @@ -USB_VID = 0x239A #REPLACE -USB_PID = 0x808A #REPLACE +USB_VID = 0x239A +USB_PID = 0x809A USB_PRODUCT = "Nucleo F767ZI - CPy" USB_MANUFACTURER = "STMicroelectronics" USB_DEVICES = "CDC,MSC" diff --git a/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk b/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk index dd7f05f29..01ace06a2 100644 --- a/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk +++ b/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk @@ -1,5 +1,5 @@ -USB_VID = 0x239A #REPLACE -USB_PID = 0x808A #REPLACE +USB_VID = 0x239A +USB_PID = 0x8098 USB_PRODUCT = "Nucleo H743ZI - CPy" USB_MANUFACTURER = "STMicroelectronics" USB_DEVICES = "CDC,MSC" diff --git a/ports/stm/boards/thunderpack/mpconfigboard.mk b/ports/stm/boards/thunderpack/mpconfigboard.mk index 37aded836..007b00cdd 100644 --- a/ports/stm/boards/thunderpack/mpconfigboard.mk +++ b/ports/stm/boards/thunderpack/mpconfigboard.mk @@ -13,5 +13,5 @@ MCU_SERIES = F4 MCU_VARIANT = STM32F411xE MCU_PACKAGE = UFQFPN48 -LD_FILE = boards/common_nvm.ld +LD_COMMON = boards/common_nvm.ld LD_FILE = boards/STM32F411_nvm.ld diff --git a/ports/stm/common-hal/busio/I2C.c b/ports/stm/common-hal/busio/I2C.c index 31a1278d3..e3c59e7e0 100644 --- a/ports/stm/common-hal/busio/I2C.c +++ b/ports/stm/common-hal/busio/I2C.c @@ -64,7 +64,6 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, uint8_t sda_len = MP_ARRAY_SIZE(mcu_i2c_sda_list); uint8_t scl_len = MP_ARRAY_SIZE(mcu_i2c_scl_list); bool i2c_taken = false; - bool search_done = false; for (uint i = 0; i < sda_len; i++) { if (mcu_i2c_sda_list[i].pin == sda) { @@ -78,12 +77,11 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, } self->scl = &mcu_i2c_scl_list[j]; self->sda = &mcu_i2c_sda_list[i]; - // Multi-level break here, or it'll pick the highest numbered peripheral (inefficient) - search_done = true; break; } } - if (search_done) { + if (self->scl != NULL) { + // Multi-level break to pick lowest peripheral break; } } diff --git a/ports/stm/common-hal/busio/SPI.c b/ports/stm/common-hal/busio/SPI.c index a83f8703c..2572c7f26 100644 --- a/ports/stm/common-hal/busio/SPI.c +++ b/ports/stm/common-hal/busio/SPI.c @@ -118,7 +118,6 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, uint8_t mosi_len = MP_ARRAY_SIZE(mcu_spi_mosi_list); uint8_t miso_len = MP_ARRAY_SIZE(mcu_spi_miso_list); bool spi_taken = false; - bool search_done = false; //SCK is not optional. MOSI and MISO are for (uint i = 0; i < sck_len; i++) { @@ -142,18 +141,15 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, self->sck = &mcu_spi_sck_list[i]; self->mosi = &mcu_spi_mosi_list[j]; self->miso = &mcu_spi_miso_list[k]; - - // Multi-level break to pick lowest peripheral - search_done = true; break; } } - if (search_done) { - break; + if (self->sck != NULL) { + break; // Multi-level break to pick lowest peripheral } } } - if (search_done) { + if (self->sck != NULL) { break; } // if just MISO, reduce search @@ -161,22 +157,17 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, for (uint j = 0; j < miso_len; j++) { if ((mcu_spi_miso_list[j].pin == miso) //only SCK and MISO need the same index && (mcu_spi_sck_list[i].periph_index == mcu_spi_miso_list[j].periph_index)) { - //keep looking if the SPI is taken, edge case if (reserved_spi[mcu_spi_sck_list[i].periph_index - 1]) { spi_taken = true; continue; } - //store pins if not self->sck = &mcu_spi_sck_list[i]; self->mosi = NULL; self->miso = &mcu_spi_miso_list[j]; - - // Multi-level break to pick lowest peripheral - search_done = true; break; } } - if (search_done) { + if (self->sck != NULL) { break; } // if just MOSI, reduce search @@ -184,22 +175,17 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, for (uint j = 0; j < mosi_len; j++) { if ((mcu_spi_mosi_list[j].pin == mosi) //only SCK and MOSI need the same index && (mcu_spi_sck_list[i].periph_index == mcu_spi_mosi_list[j].periph_index)) { - //keep looking if the SPI is taken, edge case if (reserved_spi[mcu_spi_sck_list[i].periph_index - 1]) { spi_taken = true; continue; } - //store pins if not self->sck = &mcu_spi_sck_list[i]; self->mosi = &mcu_spi_mosi_list[j]; self->miso = NULL; - - // Multi-level break to pick lowest peripheral - search_done = true; break; } } - if (search_done) { + if (self->sck != NULL) { break; } } else { diff --git a/ports/stm/common-hal/busio/UART.c b/ports/stm/common-hal/busio/UART.c index a5a76ef82..cb5460c68 100644 --- a/ports/stm/common-hal/busio/UART.c +++ b/ports/stm/common-hal/busio/UART.c @@ -84,7 +84,6 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, uint8_t rx_len = MP_ARRAY_SIZE(mcu_uart_rx_list); bool uart_taken = false; uint8_t periph_index = 0; //origin 0 corrected - bool search_done = false; if ((rts != NULL) || (cts != NULL) || (rs485_dir != NULL) || (rs485_invert == true)) { mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device")); @@ -107,13 +106,10 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, //store pins if not self->tx = &mcu_uart_tx_list[i]; self->rx = &mcu_uart_rx_list[j]; - - // Multi-level break to pick lowest peripheral - search_done = true; break; } } - if (search_done) { + if (self->tx != NULL) { break; } } @@ -132,9 +128,6 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, } //store pins if not self->rx = &mcu_uart_rx_list[i]; - - // Multi-level break to pick lowest peripheral - search_done = true; break; } } @@ -152,9 +145,6 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, } //store pins if not self->tx = &mcu_uart_tx_list[i]; - - // Multi-level break to pick lowest peripheral - search_done = true; break; } } diff --git a/ports/stm/supervisor/internal_flash.c b/ports/stm/supervisor/internal_flash.c index 7d394d187..03fa73d5f 100644 --- a/ports/stm/supervisor/internal_flash.c +++ b/ports/stm/supervisor/internal_flash.c @@ -181,8 +181,6 @@ void supervisor_flash_flush(void) { EraseInitStruct.Sector = flash_get_sector_info(_cache_flash_addr, §or_start_addr, §or_size); EraseInitStruct.NbSectors = 1; if (sector_size > sizeof(_flash_cache)) { - __ASM volatile ("bkpt"); - mp_printf(&mp_plat_print, "FLASH ERR: invalid sector\n"); reset_into_safe_mode(FLASH_WRITE_FAIL); } @@ -196,8 +194,6 @@ void supervisor_flash_flush(void) { if (HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError) != HAL_OK) { // error occurred during sector erase HAL_FLASH_Lock(); // lock the flash - __ASM volatile ("bkpt"); - mp_printf(&mp_plat_print, "FLASH ERR: erase failure\n"); reset_into_safe_mode(FLASH_WRITE_FAIL); } @@ -211,7 +207,6 @@ void supervisor_flash_flush(void) { (uint32_t)cache_addr) != HAL_OK) { // error occurred during flash write HAL_FLASH_Lock(); // lock the flash - __ASM volatile ("bkpt"); reset_into_safe_mode(FLASH_WRITE_FAIL); } // RAM memory is by word (4 byte), but flash memory is by byte @@ -226,7 +221,6 @@ void supervisor_flash_flush(void) { (uint64_t)*cache_addr) != HAL_OK) { // error occurred during flash write HAL_FLASH_Lock(); // lock the flash - __ASM volatile ("bkpt"); reset_into_safe_mode(FLASH_WRITE_FAIL); } // RAM memory is by word (4 byte), but flash memory is by byte @@ -267,8 +261,6 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, int32_t dest = convert_block_to_flash_addr(block_num); if (dest == -1) { // bad block number - __ASM volatile ("bkpt"); - mp_printf(&mp_plat_print, "BAD FLASH BLOCK ERROR"); return false; } @@ -281,8 +273,6 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, // Fail for any sector outside the 16k ones for now if (sector_size > sizeof(_flash_cache)) { - __ASM volatile ("bkpt"); - mp_printf(&mp_plat_print, "FLASH ERR: invalid sector\n"); reset_into_safe_mode(FLASH_WRITE_FAIL); } diff --git a/ports/stm/supervisor/port.c b/ports/stm/supervisor/port.c index d9d720280..81a12d6c4 100644 --- a/ports/stm/supervisor/port.c +++ b/ports/stm/supervisor/port.c @@ -31,14 +31,16 @@ #include "tick.h" #include "common-hal/microcontroller/Pin.h" + +#if CIRCUITPY_BUSIO #include "common-hal/busio/I2C.h" #include "common-hal/busio/SPI.h" #include "common-hal/busio/UART.h" - -#if defined(STM32F4) - #include "common-hal/pulseio/PWMOut.h" - #include "common-hal/pulseio/PulseOut.h" - #include "common-hal/pulseio/PulseIn.h" +#endif +#if CIRCUITPY_PULSEIO +#include "common-hal/pulseio/PWMOut.h" +#include "common-hal/pulseio/PulseOut.h" +#include "common-hal/pulseio/PulseIn.h" #endif #include "clocks.h" @@ -114,7 +116,6 @@ __attribute__((used, naked)) void Reset_Handler(void) { // The first number in RBAR is the region number. When searching for a policy, the region with // the highest number wins. If none match, then the default policy set at enable applies. - // TODO: what is the default policy? Where is that set? // TODO: do I need to subdivide this up? // Mark all the flash the same until instructed otherwise. @@ -124,7 +125,7 @@ __attribute__((used, naked)) void Reset_Handler(void) { // This the ITCM. Set it to read-only because we've loaded everything already and it's easy to // accidentally write the wrong value to 0x00000000 (aka NULL). MPU->RBAR = ARM_MPU_RBAR(12, 0x00000000U); - MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_RO, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_128KB); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_RO, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_64KB); // This the DTCM. MPU->RBAR = ARM_MPU_RBAR(14, 0x20000000U); @@ -187,17 +188,16 @@ safe_mode_t port_init(void) { void reset_port(void) { reset_all_pins(); +#if CIRCUITPY_BUSIO i2c_reset(); spi_reset(); uart_reset(); - - // TODO: it'd be nice if this was more automatic - #if defined(STM32F4) - - pwmout_reset(); - pulseout_reset(); - pulsein_reset(); - #endif +#endif +#if CIRCUITPY_PULSEIO + pwmout_reset(); + pulseout_reset(); + pulsein_reset(); +#endif } void reset_to_bootloader(void) { diff --git a/ports/stm/supervisor/usb.c b/ports/stm/supervisor/usb.c index 501550aed..b66107b7b 100644 --- a/ports/stm/supervisor/usb.c +++ b/ports/stm/supervisor/usb.c @@ -78,58 +78,54 @@ void init_usb_hardware(void) { GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; - #if defined(STM32H7) + #if CPY_STM32H7 GPIO_InitStruct.Alternate = GPIO_AF10_OTG1_FS; - #elif defined(STM32F4) || defined(STM32F7) + #elif CPY_STM32F4 || CPY_STM32F7 GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; - #else - #error Unsupported processor #endif HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); never_reset_pin_number(0, 11); never_reset_pin_number(0, 12); /* Configure VBUS Pin */ -#if !(BOARD_NO_VBUS_SENSE) + #if !(BOARD_NO_VBUS_SENSE) GPIO_InitStruct.Pin = GPIO_PIN_9; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); never_reset_pin_number(0, 9); -#endif + #endif /* This for ID line debug */ GPIO_InitStruct.Pin = GPIO_PIN_10; GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; GPIO_InitStruct.Pull = GPIO_PULLUP; GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; - #if defined(STM32H7) + #if CPY_STM32H7 GPIO_InitStruct.Alternate = GPIO_AF10_OTG1_FS; - #elif defined(STM32F4) || defined(STM32F7) + #elif CPY_STM32F4 || CPY_STM32F7 GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; - #else - #error Unsupported processor #endif HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); never_reset_pin_number(0, 10); -#ifdef STM32F412Zx + #ifdef STM32F412Zx /* Configure POWER_SWITCH IO pin (F412 ONLY)*/ GPIO_InitStruct.Pin = GPIO_PIN_8; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); never_reset_pin_number(0, 8); -#endif + #endif -#if defined(STM32H7) + #if CPY_STM32H7 HAL_PWREx_EnableUSBVoltageDetector(); __HAL_RCC_USB2_OTG_FS_CLK_ENABLE(); -#else + #else /* Peripheral clock enable */ __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); -#endif + #endif init_usb_vbus_sense(); } |
