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authorDan Halbert <halbert@adafruit.com>2021-02-20 18:10:52 -0500
committerGitHub <noreply@github.com>2021-02-20 18:10:52 -0500
commitcf3217e6d4b9a640427fb13b8d1b2ebc17a23a9e (patch)
treee158543d6fa2e56934df9552bccdfae0200d7943 /ports
parent2074244bce57fc8adb73f715d6721c7b466caba5 (diff)
parentd8715ac92a2180e689c55be8a9fff9ea9e6a5d17 (diff)
Merge pull request #4232 from TG-Techie/fix_tg_watch
fix TG-Watch ble issue
Diffstat (limited to 'ports')
-rw-r--r--ports/nrf/boards/TG-Watch/mpconfigboard.h30
1 files changed, 15 insertions, 15 deletions
diff --git a/ports/nrf/boards/TG-Watch/mpconfigboard.h b/ports/nrf/boards/TG-Watch/mpconfigboard.h
index 07a607b3d..1377c921e 100644
--- a/ports/nrf/boards/TG-Watch/mpconfigboard.h
+++ b/ports/nrf/boards/TG-Watch/mpconfigboard.h
@@ -30,27 +30,27 @@
#define MICROPY_HW_BOARD_NAME "TG-Watch"
#define MICROPY_HW_MCU_NAME "nRF52840"
-#define MICROPY_HW_NEOPIXEL (&pin_P0_16)
-#define MICROPY_HW_LED_STATUS (&pin_P1_15)
-
-// TG-Gui requires a deeper call stack than normal CircuitPython
+// TG-Gui requires a deeper call stack than normal CircuitPython, this is intentional overkill
#define CIRCUITPY_PYSTACK_SIZE 8192 // 1536 is the normal size, (32 bytes/frame * 48 frames)
-#define BOARD_HAS_CRYSTAL 0
+
+// the board has a 32mhz crystal but NOT a 32khz one
+#define BOARD_HAS_32KHZ_XTAL 0
+#define BOARD_HAS_CRYSTAL 1
#if QSPI_FLASH_FILESYSTEM
-#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 17)
-#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 22)
-#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 23)
-#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 21)
-#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19)
-#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 20)
+ #define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 17)
+ #define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 22)
+ #define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 23)
+ #define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 21)
+ #define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19)
+ #define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 20)
#endif
#if SPI_FLASH_FILESYSTEM
-#define SPI_FLASH_MOSI_PIN &pin_P0_17
-#define SPI_FLASH_MISO_PIN &pin_P0_22
-#define SPI_FLASH_SCK_PIN &pin_P0_19
-#define SPI_FLASH_CS_PIN &pin_P0_20
+ #define SPI_FLASH_MOSI_PIN &pin_P0_17
+ #define SPI_FLASH_MISO_PIN &pin_P0_22
+ #define SPI_FLASH_SCK_PIN &pin_P0_19
+ #define SPI_FLASH_CS_PIN &pin_P0_20
#endif
#define DEFAULT_I2C_BUS_SCL (&pin_P0_11)