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authorScott Shawcroft <scott@tannewt.org>2020-01-08 20:32:45 -0800
committerScott Shawcroft <scott@tannewt.org>2020-01-17 17:36:08 -0800
commit7d8dac9211dab92d750a0351335b4ad3fffc05e2 (patch)
tree819d63e5495931042b433e2b67eee9848bf47ec1 /py/vm.c
parent85c731734a0388c28c8e3895ec1cecd1d9491e0c (diff)
Refine iMX RT memory layout and add three boards
Introduces a way to place CircuitPython code and data into tightly coupled memory (TCM) which is accessible by the CPU in a single cycle. It also frees up room in the corresponding cache for intermittent data. Loading from external flash is slow! The data cache is also now enabled. Adds support for the iMX RT 1021 chip. Adds three new boards: * iMX RT 1020 EVK * iMX RT 1060 EVK * Teensy 4.0 Related to #2492, #2472 and #2477. Fixes #2475.
Diffstat (limited to 'py/vm.c')
-rw-r--r--py/vm.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/py/vm.c b/py/vm.c
index 353fc8810..4f0340681 100644
--- a/py/vm.c
+++ b/py/vm.c
@@ -35,6 +35,8 @@
#include "py/bc0.h"
#include "py/bc.h"
+#include "supervisor/linker.h"
+
#if 0
#define TRACE(ip) printf("sp=%d ", (int)(sp - &code_state->state[0] + 1)); mp_bytecode_print2(ip, 1, code_state->fun_bc->const_table);
#else
@@ -116,7 +118,7 @@
// MP_VM_RETURN_NORMAL, sp valid, return value in *sp
// MP_VM_RETURN_YIELD, ip, sp valid, yielded value in *sp
// MP_VM_RETURN_EXCEPTION, exception in fastn[0]
-mp_vm_return_kind_t mp_execute_bytecode(mp_code_state_t *code_state, volatile mp_obj_t inject_exc) {
+mp_vm_return_kind_t PLACE_IN_ITCM(mp_execute_bytecode)(mp_code_state_t *code_state, volatile mp_obj_t inject_exc) {
#define SELECTIVE_EXC_IP (0)
#if SELECTIVE_EXC_IP
#define MARK_EXC_IP_SELECTIVE() { code_state->ip = ip; } /* stores ip 1 byte past last opcode */