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authorDamien George <damien.p.george@gmail.com>2014-04-21 12:03:09 +0100
committerDamien George <damien.p.george@gmail.com>2014-04-21 12:03:09 +0100
commit7533700393b4b5d4858e1f5745be4544b2a970cc (patch)
treed76bd5859079d5494840670c49fe2886d1fb77e2 /stmhal/Makefile
parent806f4aef9acd9d8990681b9ba73362d995b59417 (diff)
stmhal: Rename USART to UART.
It's really a UART because there is no external clock line (and hence no synchronous ability, at least in the implementation of this module). USART should be reserved for a module that has "S"ynchronous capabilities. Also, UART is shorter and easier to type :)
Diffstat (limited to 'stmhal/Makefile')
-rw-r--r--stmhal/Makefile8
1 files changed, 4 insertions, 4 deletions
diff --git a/stmhal/Makefile b/stmhal/Makefile
index c4c7f7bfc..5ab405e32 100644
--- a/stmhal/Makefile
+++ b/stmhal/Makefile
@@ -66,7 +66,10 @@ SRC_C = \
led.c \
pin.c \
pin_named_pins.c \
- usart.c \
+ bufhelper.c \
+ i2c.c \
+ spi.c \
+ uart.c \
usb.c \
printf.c \
math.c \
@@ -97,9 +100,6 @@ SRC_C = \
servo.c \
dac.c \
adc.c \
- bufhelper.c \
- i2c.c \
- spi.c \
# pybwlan.c \