diff options
| author | Damien George <damien.p.george@gmail.com> | 2016-12-22 14:53:03 +1100 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2016-12-22 14:55:26 +1100 |
| commit | e202b6f586700aa4ac974d0355b171c92956ec71 (patch) | |
| tree | 0064c87cd19213c368f7666ebf8444d62373a583 /stmhal/boards | |
| parent | ed559de06336aa9a9dd71c1eb363e43d438a4e28 (diff) | |
stmhal/sdcard: Use mp_hal_pin_config function instead of HAL_GPIO_Init.
There is a minor functional change with this patch, that the GPIO are now
configured in fast mode, whereas they were in high speed mode before. But
the SDIO should still work because SD CK frequency is at most 25MHz.
Diffstat (limited to 'stmhal/boards')
| -rw-r--r-- | stmhal/boards/PYBV3/pins.csv | 6 | ||||
| -rw-r--r-- | stmhal/boards/STM32F769DISC/pins.csv | 6 | ||||
| -rw-r--r-- | stmhal/boards/STM32F7DISC/pins.csv | 6 |
3 files changed, 18 insertions, 0 deletions
diff --git a/stmhal/boards/PYBV3/pins.csv b/stmhal/boards/PYBV3/pins.csv index 6172b3bc1..b20bd4ffb 100644 --- a/stmhal/boards/PYBV3/pins.csv +++ b/stmhal/boards/PYBV3/pins.csv @@ -37,4 +37,10 @@ SW,PA13 SD,PC13 MMA_INT,PB2 MMA_AVDD,PB5 +SD_D0,PC8 +SD_D1,PC9 +SD_D2,PC10 +SD_D3,PC11 +SD_CK,PC12 +SD_CMD,PD2 UART1_TX,PA9 diff --git a/stmhal/boards/STM32F769DISC/pins.csv b/stmhal/boards/STM32F769DISC/pins.csv index ab5c5eef4..e59a51387 100644 --- a/stmhal/boards/STM32F769DISC/pins.csv +++ b/stmhal/boards/STM32F769DISC/pins.csv @@ -33,6 +33,12 @@ AUDIO_SCL,PH7 EXT_SDA,PB9 EXT_SCL,PB8 EXT_RST,PG3 +SD_D0,PC8 +SD_D1,PC9 +SD_D2,PC10 +SD_D3,PC11 +SD_CK,PC12 +SD_CMD,PD2 SD_SW,PI15 LCD_BL_CTRL,PK3 LCD_INT,PI13 diff --git a/stmhal/boards/STM32F7DISC/pins.csv b/stmhal/boards/STM32F7DISC/pins.csv index 917214ae7..1aa8a9b3a 100644 --- a/stmhal/boards/STM32F7DISC/pins.csv +++ b/stmhal/boards/STM32F7DISC/pins.csv @@ -31,6 +31,12 @@ AUDIO_SCL,PH7 EXT_SDA,PB9 EXT_SCL,PB8 EXT_RST,PG3 +SD_D0,PC8 +SD_D1,PC9 +SD_D2,PC10 +SD_D3,PC11 +SD_CK,PC12 +SD_CMD,PD2 SD_SW,PC13 LCD_BL_CTRL,PK3 LCD_INT,PI13 |