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authorDamien George <damien.p.george@gmail.com>2014-10-31 00:12:02 +0000
committerDamien George <damien.p.george@gmail.com>2014-10-31 00:12:02 +0000
commit9a41b32b3f58246cbe69db237877775b4d2fe920 (patch)
treee77af30b8e341f38cfaf1fd6ca4055384cbc0ebf /stmhal/usbd_cdc_interface.c
parentefc49c5591d23f606a2e6203f9b4e4976aa3e6e3 (diff)
stmhal: Add ioctl to USB_VCP object, so it works with select.
This patch also enables non-blocking streams on stmhal port. One can now make a USB-UART pass-through function: def pass_through(usb, uart): while True: select.select([usb, uart], [], []) if usb.any(): uart.write(usb.read(256)) if uart.any(): usb.write(uart.read(256)) pass_through(pyb.USB_VCP(), pyb.UART(1, 9600))
Diffstat (limited to 'stmhal/usbd_cdc_interface.c')
-rw-r--r--stmhal/usbd_cdc_interface.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/stmhal/usbd_cdc_interface.c b/stmhal/usbd_cdc_interface.c
index e9b4863f6..7f1eef5b3 100644
--- a/stmhal/usbd_cdc_interface.c
+++ b/stmhal/usbd_cdc_interface.c
@@ -402,6 +402,14 @@ void USBD_CDC_SetInterrupt(int chr, void *data) {
user_interrupt_data = data;
}
+int USBD_CDC_TxHalfEmpty(void) {
+ int32_t tx_waiting = (int32_t)UserTxBufPtrIn - (int32_t)UserTxBufPtrOut;
+ if (tx_waiting < 0) {
+ tx_waiting += APP_TX_DATA_SIZE;
+ }
+ return tx_waiting <= APP_TX_DATA_SIZE / 2;
+}
+
// timout in milliseconds.
// Returns number of bytes written to the device.
int USBD_CDC_Tx(const uint8_t *buf, uint32_t len, uint32_t timeout) {