diff options
| author | DavePutz <dwputz@gmail.com> | 2020-05-19 10:32:32 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-05-19 10:32:32 -0500 |
| commit | 7fa5009674c7741436fd45a3d2009019280aa6f6 (patch) | |
| tree | 9b9197adc9dfc2a7f7a7466abcfc2259f842c16a /supervisor/shared | |
| parent | 114f06d8250b4250a7c035f3bb1a2820ca2720d2 (diff) | |
| parent | 2c2b53303d17e07daa8f7a61740835d30f671a18 (diff) | |
Merge pull request #4 from adafruit/master
merge from adafruit
Diffstat (limited to 'supervisor/shared')
| -rw-r--r-- | supervisor/shared/external_flash/common_commands.h | 1 | ||||
| -rw-r--r-- | supervisor/shared/external_flash/devices.h | 30 | ||||
| -rw-r--r-- | supervisor/shared/external_flash/external_flash.c | 86 | ||||
| -rw-r--r-- | supervisor/shared/serial.c | 52 |
4 files changed, 139 insertions, 30 deletions
diff --git a/supervisor/shared/external_flash/common_commands.h b/supervisor/shared/external_flash/common_commands.h index cc0da2175..2eaa84833 100644 --- a/supervisor/shared/external_flash/common_commands.h +++ b/supervisor/shared/external_flash/common_commands.h @@ -43,5 +43,6 @@ #define CMD_QUAD_READ 0x6b #define CMD_ENABLE_RESET 0x66 #define CMD_RESET 0x99 +#define CMD_WAKE 0xab #endif // MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_COMMON_COMMANDS_H diff --git a/supervisor/shared/external_flash/devices.h b/supervisor/shared/external_flash/devices.h index 57c52e2ea..f99fad4e7 100644 --- a/supervisor/shared/external_flash/devices.h +++ b/supervisor/shared/external_flash/devices.h @@ -64,6 +64,15 @@ typedef struct { // True when the status register is a single byte. This implies the Quad Enable bit is in the // first byte and the Read Status Register 2 command (0x35) is unsupported. bool single_status_byte: 1; + + // Does not support using a ready bit within the status register + bool no_ready_bit: 1; + + // Does not support the erase command (0x20) + bool no_erase_cmd: 1; + + // Device does not have a reset command + bool no_reset_cmd: 1; } external_flash_device; // Settings for the Adesto Tech AT25DF081A 1MiB SPI flash. It's on the SAMD21 @@ -426,6 +435,27 @@ typedef struct { .single_status_byte = false, \ } +// Settings for the Everspin MR20H40 / MR25H40 magnetic non-volatile RAM +// Datasheet: https://www.everspin.com/supportdocs/MR25H40CDFR +#define MR2xH40 {\ + .total_size = (1 << 22), /* 4 MiB */ \ + .start_up_time_us = 10000, \ + .manufacturer_id = 0xef, /*no JDEC*/ \ + .memory_type = 0x40, /*no JDEC*/ \ + .capacity = 0x14, /*no JDEC*/ \ + .max_clock_speed_mhz = 10, \ + .quad_enable_bit_mask = 0x00, \ + .has_sector_protection = false, \ + .supports_fast_read = false, \ + .supports_qspi = false, \ + .supports_qspi_writes = false, \ + .write_status_register_split = false, \ + .single_status_byte = true, \ + .no_ready_bit = true, \ + .no_erase_cmd = true, \ + .no_reset_cmd = true, \ +} + // Settings for the Macronix MX25L1606 2MiB SPI flash. // Datasheet: #define MX25L1606 {\ diff --git a/supervisor/shared/external_flash/external_flash.c b/supervisor/shared/external_flash/external_flash.c index bfc434664..5bde7fd48 100644 --- a/supervisor/shared/external_flash/external_flash.c +++ b/supervisor/shared/external_flash/external_flash.c @@ -27,7 +27,6 @@ #include <stdint.h> #include <string.h> - #include "supervisor/flash.h" #include "supervisor/spi_flash_api.h" #include "supervisor/shared/external_flash/common_commands.h" @@ -58,9 +57,13 @@ static supervisor_allocation* supervisor_cache = NULL; // Wait until both the write enable and write in progress bits have cleared. static bool wait_for_flash_ready(void) { - uint8_t read_status_response[1] = {0x00}; bool ok = true; // Both the write enable and write in progress bits should be low. + if (flash_device->no_ready_bit){ + // For NVM without a ready bit in status register + return ok; + } + uint8_t read_status_response[1] = {0x00}; do { ok = spi_flash_read_command(CMD_READ_STATUS, read_status_response, 1); } while (ok && (read_status_response[0] & 0x3) != 0); @@ -92,15 +95,18 @@ static bool write_flash(uint32_t address, const uint8_t* data, uint32_t data_len } // Don't bother writing if the data is all 1s. Thats equivalent to the flash // state after an erase. - bool all_ones = true; - for (uint16_t i = 0; i < data_length; i++) { - if (data[i] != 0xff) { - all_ones = false; - break; + if (!flash_device->no_erase_cmd){ + // Only do this if the device has an erase command + bool all_ones = true; + for (uint16_t i = 0; i < data_length; i++) { + if (data[i] != 0xff) { + all_ones = false; + break; + } + } + if (all_ones) { + return true; } - } - if (all_ones) { - return true; } for (uint32_t bytes_written = 0; @@ -121,6 +127,10 @@ static bool write_flash(uint32_t address, const uint8_t* data, uint32_t data_len static bool page_erased(uint32_t sector_address) { // Check the first few bytes to catch the common case where there is data // without using a bunch of memory. + if (flash_device->no_erase_cmd){ + // skip this if device doesn't have an erase command. + return true; + } uint8_t short_buffer[4]; if (read_flash(sector_address, short_buffer, 4)) { for (uint16_t i = 0; i < 4; i++) { @@ -151,10 +161,16 @@ static bool page_erased(uint32_t sector_address) { static bool erase_sector(uint32_t sector_address) { // Before we erase the sector we need to wait for any writes to finish and // and then enable the write again. + if (flash_device->no_erase_cmd){ + // skip this if device doesn't have an erase command. + return true; + } if (!wait_for_flash_ready() || !write_enable()) { return false; } - + if (flash_device->no_erase_cmd) { + return true; + } spi_flash_sector_command(CMD_SECTOR_ERASE, sector_address); return true; } @@ -192,25 +208,33 @@ void supervisor_flash_init(void) { spi_flash_init(); +#ifdef EXTERNAL_FLASH_NO_JEDEC + // For NVM that don't have JEDEC response + spi_flash_command(CMD_WAKE); + for (uint8_t i = 0; i < EXTERNAL_FLASH_DEVICE_COUNT; i++) { + const external_flash_device* possible_device = &possible_devices[i]; + flash_device = possible_device; + break; + } +#else // The response will be 0xff if the flash needs more time to start up. uint8_t jedec_id_response[3] = {0xff, 0xff, 0xff}; while (jedec_id_response[0] == 0xff) { spi_flash_read_command(CMD_READ_JEDEC_ID, jedec_id_response, 3); } - - for (uint8_t i = 0; i < EXTERNAL_FLASH_DEVICE_COUNT; i++) { - const external_flash_device* possible_device = &possible_devices[i]; - if (jedec_id_response[0] == possible_device->manufacturer_id && - jedec_id_response[1] == possible_device->memory_type && - jedec_id_response[2] == possible_device->capacity) { - flash_device = possible_device; - break; + for (uint8_t i = 0; i < EXTERNAL_FLASH_DEVICE_COUNT; i++) { + const external_flash_device* possible_device = &possible_devices[i]; + if (jedec_id_response[0] == possible_device->manufacturer_id && + jedec_id_response[1] == possible_device->memory_type && + jedec_id_response[2] == possible_device->capacity) { + flash_device = possible_device; + break; + } + } +#endif + if (flash_device == NULL) { + return; } - } - - if (flash_device == NULL) { - return; - } // We don't know what state the flash is in so wait for any remaining writes and then reset. uint8_t read_status_response[1] = {0x00}; @@ -219,14 +243,16 @@ void supervisor_flash_init(void) { spi_flash_read_command(CMD_READ_STATUS, read_status_response, 1); } while ((read_status_response[0] & 0x1) != 0); if (!flash_device->single_status_byte) { - // The suspended write/erase bit should be low. - do { - spi_flash_read_command(CMD_READ_STATUS2, read_status_response, 1); - } while ((read_status_response[0] & 0x80) != 0); + // The suspended write/erase bit should be low. + do { + spi_flash_read_command(CMD_READ_STATUS2, read_status_response, 1); + } while ((read_status_response[0] & 0x80) != 0); } - spi_flash_command(CMD_ENABLE_RESET); - spi_flash_command(CMD_RESET); + if (!(flash_device->no_reset_cmd)){ + spi_flash_command(CMD_ENABLE_RESET); + spi_flash_command(CMD_RESET); + } // Wait 30us for the reset common_hal_mcu_delay_us(30); diff --git a/supervisor/shared/serial.c b/supervisor/shared/serial.c index a61899576..513022667 100644 --- a/supervisor/shared/serial.c +++ b/supervisor/shared/serial.c @@ -32,26 +32,73 @@ #include "shared-bindings/terminalio/Terminal.h" #include "supervisor/serial.h" #include "supervisor/usb.h" +#include "shared-bindings/microcontroller/Pin.h" #include "tusb.h" +/* + * Note: DEBUG_UART currently only works on STM32, + * enabling on another platform will cause a crash. + */ + +#if defined(DEBUG_UART_TX) && defined(DEBUG_UART_RX) +#include "shared-bindings/busio/UART.h" +busio_uart_obj_t debug_uart; +byte buf_array[64]; +#endif + +void serial_early_init(void) { +#if defined(DEBUG_UART_TX) && defined(DEBUG_UART_RX) + debug_uart.base.type = &busio_uart_type; + + const mcu_pin_obj_t* rx = MP_OBJ_TO_PTR(DEBUG_UART_RX); + const mcu_pin_obj_t* tx = MP_OBJ_TO_PTR(DEBUG_UART_TX); + + common_hal_busio_uart_construct(&debug_uart, tx, rx, NULL, NULL, NULL, + false, 115200, 8, PARITY_NONE, 1, 1.0f, 64, + buf_array, true); + common_hal_busio_uart_never_reset(&debug_uart); +#endif +} + void serial_init(void) { usb_init(); } bool serial_connected(void) { +#if defined(DEBUG_UART_TX) && defined(DEBUG_UART_RX) + return true; +#else return tud_cdc_connected(); +#endif } char serial_read(void) { +#if defined(DEBUG_UART_TX) && defined(DEBUG_UART_RX) + if (tud_cdc_connected() && tud_cdc_available() > 0) { + return (char) tud_cdc_read_char(); + } + int uart_errcode; + char text; + common_hal_busio_uart_read(&debug_uart, (uint8_t*) &text, 1, &uart_errcode); + return text; +#else return (char) tud_cdc_read_char(); +#endif } bool serial_bytes_available(void) { +#if defined(DEBUG_UART_TX) && defined(DEBUG_UART_RX) + return common_hal_busio_uart_rx_characters_available(&debug_uart) || (tud_cdc_available() > 0); +#else return tud_cdc_available() > 0; +#endif } void serial_write_substring(const char* text, uint32_t length) { + if (length == 0) { + return; + } #if CIRCUITPY_DISPLAYIO int errcode; common_hal_terminalio_terminal_write(&supervisor_terminal, (const uint8_t*) text, length, &errcode); @@ -62,6 +109,11 @@ void serial_write_substring(const char* text, uint32_t length) { count += tud_cdc_write(text + count, length - count); usb_background(); } + +#if defined(DEBUG_UART_TX) && defined(DEBUG_UART_RX) + int uart_errcode; + common_hal_busio_uart_write(&debug_uart, (const uint8_t*) text, length, &uart_errcode); +#endif } void serial_write(const char* text) { |
