Merge tag 'v1.9.1'2.0.0-alpha.0

Fixes for stmhal USB mass storage, lwIP bindings and VFS regressions

This release provides an important fix for the USB mass storage device in
the stmhal port by implementing the SCSI SYNCHRONIZE_CACHE command, which
is now require by some Operating Systems.  There are also fixes for the
lwIP bindings to improve non-blocking sockets and error codes.  The VFS has
some regressions fixed including the ability to statvfs the root.

All changes are listed below.

py core:
- modbuiltins: add core-provided version of input() function
- objstr: catch case of negative "maxsplit" arg to str.rsplit()
- persistentcode: allow to compile with complex numbers disabled
- objstr: allow to compile with obj-repr D, and unicode disabled
- modsys: allow to compile with obj-repr D and PY_ATTRTUPLE disabled
- provide mp_decode_uint_skip() to help reduce stack usage
- makeqstrdefs.py: make script run correctly with Python 2.6
- objstringio: if created from immutable object, follow copy on write policy

extmod:
- modlwip: connect: for non-blocking mode, return EINPROGRESS
- modlwip: fix error codes for duplicate calls to connect()
- modlwip: accept: fix error code for non-blocking mode
- vfs: allow to statvfs the root directory
- vfs: allow "buffering" and "encoding" args to VFS's open()
- modframebuf: fix signed/unsigned comparison pendantic warning

lib:
- libm: use isfinite instead of finitef, for C99 compatibility
- utils/interrupt_char: remove support for KBD_EXCEPTION disabled

tests:
- basics/string_rsplit: add tests for negative "maxsplit" argument
- float: convert "sys.exit()" to "raise SystemExit"
- float/builtin_float_minmax: PEP8 fixes
- basics: convert "sys.exit()" to "raise SystemExit"
- convert remaining "sys.exit()" to "raise SystemExit"

unix port:
- convert to use core-provided version of built-in import()
- Makefile: replace references to make with $(MAKE)

windows port:
- convert to use core-provided version of built-in import()

qemu-arm port:
- Makefile: adjust object-file lists to get correct dependencies
- enable micropython.mem_*() functions to allow more tests

stmhal port:
- boards: enable DAC for NUCLEO_F767ZI board
- add support for NUCLEO_F446RE board
- pass USB handler as parameter to allow more than one USB handler
- usb: use local USB handler variable in Start-of-Frame handler
- usb: make state for USB device private to top-level USB driver
- usbdev: for MSC implement SCSI SYNCHRONIZE_CACHE command
- convert from using stmhal's input() to core provided version

cc3200 port:
- convert from using stmhal's input() to core provided version

teensy port:
- convert from using stmhal's input() to core provided version

esp8266 port:
- Makefile: replace references to make with $(MAKE)
- Makefile: add clean-modules target
- convert from using stmhal's input() to core provided version

zephyr port:
- modusocket: getaddrinfo: Fix mp_obj_len() usage
- define MICROPY_PY_SYS_PLATFORM (to "zephyr")
- machine_pin: use native Zephyr types for Zephyr API calls

docs:
- machine.Pin: remove out_value() method
- machine.Pin: add on() and off() methods
- esp8266: consistently replace Pin.high/low methods with .on/off
- esp8266/quickref: polish Pin.on()/off() examples
- network: move confusingly-named cc3200 Server class to its reference
- uos: deconditionalize, remove minor port-specific details
- uos: move cc3200 port legacy VFS mounting functions to its ref doc
- machine: sort machine classes in logical order, not alphabetically
- network: first step to describe standard network class interface

examples:
- embedding: use core-provided KeyboardInterrupt object

14 files changed, 57 insertions, 25 deletions

diff --git a/tests/pyb/adc.py b/tests/pyb/adc.py
index 6508d7e24..362ca326d 100644
--- a/tests/pyb/adc.py
+++ b/tests/pyb/adc.py
@@ -9,9 +9,12 @@ print(adc)
 val = adc.read()
 assert val < 500
 
+# timer for read_timed
+tim = pyb.Timer(5, freq=500)
+
 # read into bytearray
 buf = bytearray(50)
-adc.read_timed(buf, 500)
+adc.read_timed(buf, tim)
 print(len(buf))
 for i in buf:
     assert i < 500
@@ -19,12 +22,12 @@ for i in buf:
 # read into arrays with different element sizes
 import array
 ar = array.array('h', 25 * [0])
-adc.read_timed(ar, 500)
+adc.read_timed(ar, tim)
 print(len(ar))
 for i in buf:
     assert i < 500
 ar = array.array('i', 30 * [0])
-adc.read_timed(ar, 500)
+adc.read_timed(ar, tim)
 print(len(ar))
 for i in buf:
     assert i < 500
diff --git a/tests/pyb/can.py b/tests/pyb/can.py
index 594d1d509..0fd8c8368 100644
--- a/tests/pyb/can.py
+++ b/tests/pyb/can.py
@@ -1,4 +1,9 @@
-from pyb import CAN
+try:
+    from pyb import CAN
+except ImportError:
+    print('SKIP')
+    raise SystemExit
+
 import pyb
 
 # test we can correctly create by id or name
@@ -152,7 +157,7 @@ print(can.recv(1))
 
 del can
 
-# Testing asyncronous send
+# Testing asynchronous send
 can = CAN(1, CAN.LOOPBACK)
 can.setfilter(0, CAN.MASK16, 0, (0, 0, 0, 0))
 
diff --git a/tests/pyb/dac.py b/tests/pyb/dac.py
index 884ec5829..6f03bbc64 100644
--- a/tests/pyb/dac.py
+++ b/tests/pyb/dac.py
@@ -1,5 +1,9 @@
 import pyb
 
+if not hasattr(pyb, 'DAC'):
+    print('SKIP')
+    raise SystemExit
+
 dac = pyb.DAC(1)
 print(dac)
 dac.noise(100)
diff --git a/tests/pyb/extint.py b/tests/pyb/extint.py
index a8ba484b1..ae98ccd5a 100644
--- a/tests/pyb/extint.py
+++ b/tests/pyb/extint.py
@@ -1,7 +1,7 @@
 import pyb
 
 # test basic functionality
-ext = pyb.ExtInt('X1', pyb.ExtInt.IRQ_RISING, pyb.Pin.PULL_DOWN, lambda l:print('line:', l))
+ext = pyb.ExtInt('Y1', pyb.ExtInt.IRQ_RISING, pyb.Pin.PULL_DOWN, lambda l:print('line:', l))
 ext.disable()
 ext.enable()
 print(ext.line())
diff --git a/tests/pyb/extint.py.exp b/tests/pyb/extint.py.exp
index daed01c7f..1f9da9844 100644
--- a/tests/pyb/extint.py.exp
+++ b/tests/pyb/extint.py.exp
@@ -1,3 +1,3 @@
-0
-line: 0
-line: 0
+6
+line: 6
+line: 6
diff --git a/tests/pyb/pin.py b/tests/pyb/pin.py
index b3eb87b60..9b3788343 100644
--- a/tests/pyb/pin.py
+++ b/tests/pyb/pin.py
@@ -1,14 +1,14 @@
 from pyb import Pin
 
-p = Pin('X1', Pin.IN)
+p = Pin('Y1', Pin.IN)
 print(p)
 print(p.name())
 print(p.pin())
 print(p.port())
 
-p = Pin('X1', Pin.IN, Pin.PULL_UP)
-p = Pin('X1', Pin.IN, pull=Pin.PULL_UP)
-p = Pin('X1', mode=Pin.IN, pull=Pin.PULL_UP)
+p = Pin('Y1', Pin.IN, Pin.PULL_UP)
+p = Pin('Y1', Pin.IN, pull=Pin.PULL_UP)
+p = Pin('Y1', mode=Pin.IN, pull=Pin.PULL_UP)
 print(p)
 print(p.value())
 
diff --git a/tests/pyb/pin.py.exp b/tests/pyb/pin.py.exp
index 599374600..f2f7038fd 100644
--- a/tests/pyb/pin.py.exp
+++ b/tests/pyb/pin.py.exp
@@ -1,10 +1,10 @@
-Pin(Pin.cpu.A0, mode=Pin.IN)
-A0
-0
-0
-Pin(Pin.cpu.A0, mode=Pin.IN, pull=Pin.PULL_UP)
+Pin(Pin.cpu.C6, mode=Pin.IN)
+C6
+6
+2
+Pin(Pin.cpu.C6, mode=Pin.IN, pull=Pin.PULL_UP)
 1
-Pin(Pin.cpu.A0, mode=Pin.IN, pull=Pin.PULL_DOWN)
+Pin(Pin.cpu.C6, mode=Pin.IN, pull=Pin.PULL_DOWN)
 0
 0
 1
diff --git a/tests/pyb/pyb1.py b/tests/pyb/pyb1.py
index 0087ec050..184acbdc4 100644
--- a/tests/pyb/pyb1.py
+++ b/tests/pyb/pyb1.py
@@ -27,16 +27,15 @@ print((pyb.millis() - start) // 5) # should print 3
 pyb.disable_irq()
 pyb.enable_irq()
 
-print(pyb.freq())
-
 print(pyb.have_cdc())
 
 pyb.hid((0, 0, 0, 0)) # won't do anything
 
-pyb.rng()
-
 pyb.sync()
 
 print(len(pyb.unique_id()))
 
 pyb.wfi()
+
+pyb.fault_debug(True)
+pyb.fault_debug(False)
diff --git a/tests/pyb/pyb1.py.exp b/tests/pyb/pyb1.py.exp
index 84034d683..5816ea967 100644
--- a/tests/pyb/pyb1.py.exp
+++ b/tests/pyb/pyb1.py.exp
@@ -1,5 +1,4 @@
 3
 3
-(168000000, 168000000, 42000000, 84000000)
 True
 12
diff --git a/tests/pyb/pyb_f405.py b/tests/pyb/pyb_f405.py
new file mode 100644
index 000000000..2f161ae09
--- /dev/null
+++ b/tests/pyb/pyb_f405.py
@@ -0,0 +1,10 @@
+# test pyb module on F405 MCUs
+
+import os, pyb
+
+if not 'STM32F405' in os.uname().machine:
+    print('SKIP')
+    raise SystemExit
+
+print(pyb.freq())
+print(type(pyb.rng()))
diff --git a/tests/pyb/pyb_f405.py.exp b/tests/pyb/pyb_f405.py.exp
new file mode 100644
index 000000000..a90aa0268
--- /dev/null
+++ b/tests/pyb/pyb_f405.py.exp
@@ -0,0 +1,2 @@
+(168000000, 168000000, 42000000, 84000000)
+<class 'int'>
diff --git a/tests/pyb/pyb_f411.py b/tests/pyb/pyb_f411.py
new file mode 100644
index 000000000..50de30282
--- /dev/null
+++ b/tests/pyb/pyb_f411.py
@@ -0,0 +1,9 @@
+# test pyb module on F411 MCUs
+
+import os, pyb
+
+if not 'STM32F411' in os.uname().machine:
+    print('SKIP')
+    raise SystemExit
+
+print(pyb.freq())
diff --git a/tests/pyb/pyb_f411.py.exp b/tests/pyb/pyb_f411.py.exp
new file mode 100644
index 000000000..79e0a1062
--- /dev/null
+++ b/tests/pyb/pyb_f411.py.exp
@@ -0,0 +1 @@
+(96000000, 96000000, 24000000, 48000000)
diff --git a/tests/pyb/rtc.py b/tests/pyb/rtc.py
index 300c95634..844526b4b 100644
--- a/tests/pyb/rtc.py
+++ b/tests/pyb/rtc.py
@@ -7,7 +7,7 @@ print(rtc)
 
 # make sure that 1 second passes correctly
 rtc.datetime((2014, 1, 1, 1, 0, 0, 0, 0))
-pyb.delay(1001)
+pyb.delay(1002)
 print(rtc.datetime()[:7])
 
 def set_and_print(datetime):