diff options
| author | Scott Shawcroft <scott@tannewt.org> | 2021-02-25 16:50:57 -0800 |
|---|---|---|
| committer | Scott Shawcroft <scott@tannewt.org> | 2021-02-25 16:50:57 -0800 |
| commit | 52bc935fa7aa9e5c94f75fec8b2fa746c83f0be7 (patch) | |
| tree | 6167dbc2b9e3c51a3322975ec303c0d9155a9356 /tests | |
| parent | 8170e26a869b1f00e2dc7aade84cb459155bf920 (diff) | |
A few minor fixes for corner cases
* Always clear the peripheral interrupt so we don't hang when full
* Store the ringbuf in the object so it gets collected when we're alive
* Make UART objects have a finaliser so they are deinit when their
memory is freed
* Copy bytes into the ringbuf from the FIFO after we read to ensure
the interrupt is enabled ASAP
* Copy bytes into the ringbuf from the FIFO before measuring our
rx available because the interrupt is based on a threshold (not
> 0). For example, a single byte won't trigger an interrupt.
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/manual/busio/uart_echo.py | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/tests/manual/busio/uart_echo.py b/tests/manual/busio/uart_echo.py new file mode 100644 index 000000000..f55d4db9e --- /dev/null +++ b/tests/manual/busio/uart_echo.py @@ -0,0 +1,18 @@ +import busio +import board +import time + +i = 0 + +u = busio.UART(tx=board.TX, rx=board.RX) + +while True: + u.write(str(i).encode("utf-8")) + time.sleep(0.1) + print(i, u.in_waiting) # should be the number of digits + time.sleep(0.1) + print(i, u.in_waiting) # should be the number of digits + r = u.read(64 + 10) + print(i, u.in_waiting) # should be 0 + print(len(r), r) + i += 1 |
