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-rw-r--r--ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c2
-rw-r--r--ports/mimxrt10xx/common-hal/busio/SPI.c2
-rw-r--r--ports/mimxrt10xx/common-hal/busio/UART.c4
-rw-r--r--ports/mimxrt10xx/common-hal/microcontroller/Pin.c8
-rwxr-xr-xports/mimxrt10xx/common-hal/supervisor/__init__.c2
-rw-r--r--ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c2
-rw-r--r--ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c2
-rw-r--r--ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c4
-rw-r--r--ports/mimxrt10xx/supervisor/internal_flash.c1
-rw-r--r--ports/mimxrt10xx/supervisor/port.c2
-rw-r--r--ports/mimxrt10xx/supervisor/serial.c1
11 files changed, 14 insertions, 16 deletions
diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c
index 80a57f17b..43ffe0dd1 100644
--- a/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c
+++ b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c
@@ -45,7 +45,7 @@ const flexspi_nor_config_t qspiflash_config = {
#ifdef BOARD_USING_SECONDARY_QSPI_PINMUX
.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromInternally,
#else
- .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
+ .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
#endif
.csHoldTime = 1u,
.csSetupTime = 2u,
diff --git a/ports/mimxrt10xx/common-hal/busio/SPI.c b/ports/mimxrt10xx/common-hal/busio/SPI.c
index ef34e6172..c51aef4da 100644
--- a/ports/mimxrt10xx/common-hal/busio/SPI.c
+++ b/ports/mimxrt10xx/common-hal/busio/SPI.c
@@ -87,7 +87,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
//if both MOSI and MISO exist, loop search normally
if ((mosi != NULL) && (miso != NULL)) {
for (uint j = 0; j < mosi_count; j++) {
- if ((mcu_spi_mosi_list[i].pin != mosi)
+ if ((mcu_spi_mosi_list[i].pin != mosi)
|| (mcu_spi_sck_list[i].bank_idx != mcu_spi_mosi_list[j].bank_idx)){
continue;
}
diff --git a/ports/mimxrt10xx/common-hal/busio/UART.c b/ports/mimxrt10xx/common-hal/busio/UART.c
index a517dc7b5..5ef347e59 100644
--- a/ports/mimxrt10xx/common-hal/busio/UART.c
+++ b/ports/mimxrt10xx/common-hal/busio/UART.c
@@ -109,7 +109,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
// If TX is on, keep looking, else stop
if (tx != NULL) {
for (uint32_t j = 0; j < tx_count; ++j) {
- if (mcu_uart_tx_list[j].pin != tx ||
+ if (mcu_uart_tx_list[j].pin != tx ||
mcu_uart_tx_list[j].bank_idx != mcu_uart_rx_list[i].bank_idx) {
continue;
}
@@ -291,7 +291,7 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) {
} else {
reserved_uart[self->tx->bank_idx - 1] = false;
}
-
+
LPUART_Deinit(self->uart);
gc_free(self->ringbuf);
diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Pin.c b/ports/mimxrt10xx/common-hal/microcontroller/Pin.c
index 233e66006..a005924e2 100644
--- a/ports/mimxrt10xx/common-hal/microcontroller/Pin.c
+++ b/ports/mimxrt10xx/common-hal/microcontroller/Pin.c
@@ -41,8 +41,8 @@ STATIC bool claimed_pins[IOMUXC_SW_PAD_CTL_PAD_COUNT];
STATIC bool never_reset_pins[IOMUXC_SW_PAD_CTL_PAD_COUNT];
// There are two numbering systems used here:
-// IOMUXC index, used for iterating through pins and accessing reset information,
-// and GPIO port and number, used to store claimed and reset tagging. The two number
+// IOMUXC index, used for iterating through pins and accessing reset information,
+// and GPIO port and number, used to store claimed and reset tagging. The two number
// systems are not related and one cannot determine the other without a pin object
void reset_all_pins(void) {
for (uint8_t i = 0; i < IOMUXC_SW_PAD_CTL_PAD_COUNT; i++) {
@@ -64,8 +64,8 @@ void reset_all_pins(void) {
#endif
}
-// Since i.MX pins need extra register and reset information to reset properly,
-// resetting pins by number alone has been removed.
+// Since i.MX pins need extra register and reset information to reset properly,
+// resetting pins by number alone has been removed.
void common_hal_reset_pin(const mcu_pin_obj_t* pin) {
never_reset_pins[pin->mux_idx] = false;
claimed_pins[pin->mux_idx] = false;
diff --git a/ports/mimxrt10xx/common-hal/supervisor/__init__.c b/ports/mimxrt10xx/common-hal/supervisor/__init__.c
index ac88556b4..6dca35fb5 100755
--- a/ports/mimxrt10xx/common-hal/supervisor/__init__.c
+++ b/ports/mimxrt10xx/common-hal/supervisor/__init__.c
@@ -37,4 +37,4 @@ const super_runtime_obj_t common_hal_supervisor_runtime_obj = {
.base = {
.type = &supervisor_runtime_type,
},
-}; \ No newline at end of file
+};
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c
index 3e2c6972b..a994e154d 100644
--- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c
@@ -115,7 +115,7 @@ const mcu_periph_obj_t mcu_uart_tx_list[9] = {
const mcu_periph_obj_t mcu_uart_rts_list[4] = {
PERIPH_PIN(1, 6, 0, 0, &pin_GPIO_07),
-
+
PERIPH_PIN(2, 3, 0, 0, &pin_GPIO_AD_07),
PERIPH_PIN(3, 1, 0, 0, &pin_GPIO_AD_13),
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c
index 814b4120d..3d043a14e 100644
--- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c
@@ -160,7 +160,7 @@ const mcu_periph_obj_t mcu_uart_tx_list[16] = {
const mcu_periph_obj_t mcu_uart_rts_list[10] = {
PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_09),
-
+
PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_EMC_21),
PERIPH_PIN(2, 2, 0, 1, &pin_GPIO_AD_B1_07),
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c
index 388a1b014..fd1e4ddb8 100644
--- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c
@@ -165,7 +165,7 @@ const mcu_periph_obj_t mcu_uart_tx_list[18] = {
const mcu_periph_obj_t mcu_uart_rts_list[9] = {
PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_15),
-
+
PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_AD_B1_01),
PERIPH_PIN(3, 2, 0, 0, &pin_GPIO_AD_B1_05),
@@ -188,7 +188,7 @@ const mcu_periph_obj_t mcu_uart_cts_list[9] = {
PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_AD_B1_00),
PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 0, &pin_GPIO_EMC_15),
- PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 1, &pin_GPIO_AD_B1_04),
+ PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 1, &pin_GPIO_AD_B1_04),
PERIPH_PIN(4, 2, 0, 0, &pin_GPIO_EMC_17),
diff --git a/ports/mimxrt10xx/supervisor/internal_flash.c b/ports/mimxrt10xx/supervisor/internal_flash.c
index 4f52748ed..9abd15e60 100644
--- a/ports/mimxrt10xx/supervisor/internal_flash.c
+++ b/ports/mimxrt10xx/supervisor/internal_flash.c
@@ -254,4 +254,3 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32
void supervisor_flash_release_cache(void) {
}
-
diff --git a/ports/mimxrt10xx/supervisor/port.c b/ports/mimxrt10xx/supervisor/port.c
index acec3cf72..ed5824732 100644
--- a/ports/mimxrt10xx/supervisor/port.c
+++ b/ports/mimxrt10xx/supervisor/port.c
@@ -257,7 +257,7 @@ safe_mode_t port_init(void) {
// enabled. It won't occur very often so it'll be low overhead.
NVIC_EnableIRQ(SNVS_HP_WRAPPER_IRQn);
- // Note that `reset_port` CANNOT GO HERE, unlike other ports, because `board_init` hasn't been
+ // Note that `reset_port` CANNOT GO HERE, unlike other ports, because `board_init` hasn't been
// run yet, which uses `never_reset` to protect critical pins from being reset by `reset_port`.
if (board_requests_safe_mode()) {
diff --git a/ports/mimxrt10xx/supervisor/serial.c b/ports/mimxrt10xx/supervisor/serial.c
index 22c979cf9..01656a819 100644
--- a/ports/mimxrt10xx/supervisor/serial.c
+++ b/ports/mimxrt10xx/supervisor/serial.c
@@ -90,4 +90,3 @@ void serial_write_substring(const char *text, uint32_t len) {
LPUART_WriteBlocking(uart_instance, (uint8_t*)text, len);
}
-
generated by cgit v1.2.3 (git 2.39.1) at 2026-08-08 08:58:25 +0000