diff options
Diffstat (limited to 'ports/stm')
95 files changed, 4672 insertions, 1298 deletions
diff --git a/ports/stm/Makefile b/ports/stm/Makefile index f8c05fd80..2eedcca11 100755 --- a/ports/stm/Makefile +++ b/ports/stm/Makefile @@ -22,7 +22,6 @@ # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN # THE SOFTWARE. -# DEBUG = 1 # Select the board to build for. ifeq ($(BOARD),) @@ -58,21 +57,23 @@ include $(TOP)/py/circuitpy_defns.mk CROSS_COMPILE = arm-none-eabi- -####################################### -# CFLAGS -####################################### +MCU_SERIES_LOWER = $(shell echo $(MCU_SERIES) | tr '[:upper:]' '[:lower:]') +MCU_VARIANT_LOWER = $(shell echo $(MCU_VARIANT) | tr '[:upper:]' '[:lower:]') + +HAL_DIR=st_driver/STM32$(MCU_SERIES)xx_HAL_Driver INC += -I. INC += -I../.. INC += -I$(BUILD) INC += -I$(BUILD)/genhdr -INC += -I./st_driver/STM32F4xx_HAL_Driver/Inc -INC += -I./st_driver/STM32F4xx_HAL_Driver/Inc/Legacy -INC += -I./st_driver/CMSIS/Device/ST/STM32F4xx/Include +INC += -I./$(HAL_DIR)/Inc +INC += -I./$(HAL_DIR)/Inc/Legacy +INC += -I./st_driver/CMSIS/Device/ST/STM32$(MCU_SERIES)xx/Include INC += -I./st_driver/CMSIS/Include INC += -I./boards INC += -I./boards/$(BOARD) INC += -I./peripherals +INC += -I./packages INC += -I../../lib/mp-readline INC += -I../../lib/tinyusb/src INC += -I../../supervisor/shared/usb @@ -87,11 +88,11 @@ else CFLAGS += -Os -DNDEBUG CFLAGS += -ggdb # TODO: Test with -flto - ### CFLAGS += -flto + # CFLAGS += -flto endif - -C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(CMSIS_MCU) +# MCU Series is defined by the HAL package and doesn't need to be specified here +C_DEFS = -D$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(MCU_VARIANT) CFLAGS += $(INC) -Werror -Wall -std=gnu11 -nostdlib $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT) @@ -102,17 +103,24 @@ CFLAGS += -Wno-undef # STM32 might do casts that increase alignment requirements. CFLAGS += -Wno-cast-align -CFLAGS += \ - -mthumb \ - -mabi=aapcs-linux \ - -mfloat-abi=hard \ - -mcpu=cortex-m4 \ - -mfpu=fpv4-sp-d16 +CFLAGS += -mthumb -mabi=aapcs-linux -# TODO: check this -CFLAGS += -D__START=main +# Arm core selection +MCU_FLAGS_F4 = -mtune=cortex-m4 -mcpu=cortex-m4 +MCU_FLAGS_F7 = -mtune=cortex-m7 -mcpu=cortex-m7 +MCU_FLAGS_H7 = -mtune=cortex-m7 -mcpu=cortex-m7 +CFLAGS += $(MCU_FLAGS_$(MCU_SERIES)) -#need both command and valid file to use uf2 bootloader +CFLAGS += -DSTM32_HAL_H='<stm32$(MCU_SERIES_LOWER)xx_hal.h>' + +# Floating point settings +ifeq ($(MCU_VARIANT),$(filter $(MCU_VARIANT),STM32F765xx STM32F767xx STM32F769xx STM32H743xx)) +CFLAGS += -mfpu=fpv5-d16 -mfloat-abi=hard +else +CFLAGS += -mfpu=fpv4-sp-d16 -mfloat-abi=hard +endif + +# Need both command and valid file to use uf2 bootloader ifndef LD_FILE ifneq ($(and $(UF2_BOOTLOADER),$(LD_BOOT)),) LD_FILE = $(LD_BOOT) @@ -131,7 +139,7 @@ endif LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs LIBS := -lgcc -lc -LDFLAGS += -mthumb -mcpu=cortex-m4 +LDFLAGS += -mthumb $(MCU_FLAGS_$(MCU_SERIES)) # Use toolchain libm if we're not using our own. ifndef INTERNAL_LIBM @@ -139,55 +147,52 @@ LIBS += -lm endif # TinyUSB defines -CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_STM32F4 -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD_CDC_TX_BUFSIZE=1024 -DCFG_TUD_MSC_BUFSIZE=4096 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128 - - -###################################### -# source -###################################### - -SRC_STM32 = \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac_ex.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_qspi.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rng.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_gpio.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_adc.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_i2c.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_sdmmc.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usart.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_rcc.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_utils.c \ - st_driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_exti.c \ - system_stm32f4xx.c - +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_STM32$(MCU_SERIES) -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD_CDC_TX_BUFSIZE=1024 -DCFG_TUD_MSC_BUFSIZE=4096 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128 + +SRC_STM32 = $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES_LOWER)xx_,\ + hal_adc.c \ + hal_adc_ex.c \ + hal_dac.c \ + hal_dac_ex.c \ + hal_i2c.c \ + hal_i2c_ex.c \ + hal_qspi.c \ + hal_rng.c \ + hal_rtc.c \ + hal_rtc_ex.c \ + hal_spi.c \ + hal_tim.c \ + hal_tim_ex.c \ + hal_uart.c \ + hal_usart.c \ + hal_rcc.c \ + hal_rcc_ex.c \ + hal_flash.c \ + hal_flash_ex.c \ + hal_gpio.c \ + hal_dma_ex.c \ + hal_dma.c \ + hal_pwr.c \ + hal_pwr_ex.c \ + hal_cortex.c \ + hal.c \ + hal_exti.c \ + hal_sd.c \ + ll_gpio.c \ + ll_adc.c \ + ll_i2c.c \ + ll_dma.c \ + ll_sdmmc.c \ + ll_usart.c \ + ll_rcc.c \ + ll_utils.c \ + ll_exti.c \ + ) +#removed: +# hal_flash_ramfunc.c \ +# ll_fsmc.c \ + +SRC_STM32 += system_stm32$(MCU_SERIES_LOWER)xx.c SRC_C += \ background.c \ @@ -196,10 +201,11 @@ SRC_C += \ tick.c \ boards/$(BOARD)/board.c \ boards/$(BOARD)/pins.c \ - peripherals/stm32f4/$(MCU_SUB_VARIANT)/pins.c \ - peripherals/stm32f4/$(MCU_SUB_VARIANT)/clocks.c \ - peripherals/stm32f4/$(MCU_SUB_VARIANT)/gpio.c \ - peripherals/stm32f4/$(MCU_SUB_VARIANT)/periph.c \ + peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/pins.c \ + peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/clocks.c \ + peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/gpio.c \ + peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/periph.c \ + packages/$(MCU_PACKAGE).c\ lib/libc/string0.c \ lib/mp-readline/readline.c \ lib/oofatfs/ff.c \ @@ -219,7 +225,7 @@ endif SRC_S = \ supervisor/cpu.s \ - boards/startup_$(MCU_SUB_VARIANT).s + boards/startup_$(MCU_VARIANT_LOWER).s SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ diff --git a/ports/stm/README.md b/ports/stm/README.md index a860c01ce..f2e3e9b67 100644 --- a/ports/stm/README.md +++ b/ports/stm/README.md @@ -1,3 +1,3 @@ -# CircuitPython Port To The ST Microelectronics STM32F4 Series +# CircuitPython Port To The ST Microelectronics STM32 Series -This is a port of CircuitPython to the STM32F4 series of chips. +This is a port of CircuitPython to the STM32 series of chips. diff --git a/ports/stm/background.h b/ports/stm/background.h index 05a4f894a..6225429f8 100644 --- a/ports/stm/background.h +++ b/ports/stm/background.h @@ -24,12 +24,12 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_BACKGROUND_H -#define MICROPY_INCLUDED_STM32F4_BACKGROUND_H +#ifndef MICROPY_INCLUDED_STM32_BACKGROUND_H +#define MICROPY_INCLUDED_STM32_BACKGROUND_H #include <stdbool.h> void background_tasks_reset(void); void run_background_tasks(void); -#endif // MICROPY_INCLUDED_STM32F4_BACKGROUND_H +#endif // MICROPY_INCLUDED_STM32_BACKGROUND_H diff --git a/ports/stm/boards/STM32H743ZITx_FLASH.ld b/ports/stm/boards/STM32H743ZITx_FLASH.ld new file mode 100644 index 000000000..38b1fe4ea --- /dev/null +++ b/ports/stm/boards/STM32H743ZITx_FLASH.ld @@ -0,0 +1,193 @@ +/* +****************************************************************************** +** + +** File : LinkerScript.ld +** +** Author : Auto-generated by System Workbench for STM32 +** +** Abstract : Linker script for STM32H743ZITx series +** 2048Kbytes FLASH and 1056Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +** <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2> +** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20020000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +RAM_D1 (xrw) : ORIGIN = 0x24000000, LENGTH = 512K +RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K +RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K +ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K +FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 2048K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >DTCMRAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >DTCMRAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >DTCMRAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm/boards/STM32H743_fs.ld b/ports/stm/boards/STM32H743_fs.ld new file mode 100644 index 000000000..395a074d3 --- /dev/null +++ b/ports/stm/boards/STM32H743_fs.ld @@ -0,0 +1,164 @@ +/* +****************************************************************************** +** + +** File : LinkerScript.ld +** +** Author : Auto-generated by System Workbench for STM32 +** +** Abstract : Linker script for STM32H743ZITx series +** 2048Kbytes FLASH and 1056Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +** <h2><center>© COPYRIGHT(c) 2019 STMicroelectronics</center></h2> +** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20020000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 128K /* sector 0, 128K */ + FLASH_FS (r) : ORIGIN = 0x08020000, LENGTH = 128K /* sector 1, 128K */ + FLASH_TEXT (rx) : ORIGIN = 0x08040000, LENGTH = 1792K /* sectors 6*128 + 8*128 */ + DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /* Used for storage cache */ + RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 512K /* AXI SRAM */ +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm/boards/espruino_pico/mpconfigboard.mk b/ports/stm/boards/espruino_pico/mpconfigboard.mk index 151ca1437..01264d512 100644 --- a/ports/stm/boards/espruino_pico/mpconfigboard.mk +++ b/ports/stm/boards/espruino_pico/mpconfigboard.mk @@ -5,12 +5,10 @@ USB_MANUFACTURER = "Espruino" USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE -MCU_SERIES = m4 -MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f401xe -MCU_PACKAGE = 48 -CMSIS_MCU = STM32F401xE +MCU_SERIES = F4 +MCU_VARIANT = STM32F401xE +MCU_PACKAGE = UFQFPN48 + LD_FILE = boards/STM32F401xd_fs.ld # use for internal flash diff --git a/ports/stm/boards/espruino_wifi/mpconfigboard.mk b/ports/stm/boards/espruino_wifi/mpconfigboard.mk index 8b28cf07c..b4b394443 100644 --- a/ports/stm/boards/espruino_wifi/mpconfigboard.mk +++ b/ports/stm/boards/espruino_wifi/mpconfigboard.mk @@ -5,12 +5,10 @@ USB_MANUFACTURER = "Espruino" USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE -MCU_SERIES = m4 -MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f411xe -MCU_PACKAGE = 48 -CMSIS_MCU = STM32F411xE +MCU_SERIES = F4 +MCU_VARIANT = STM32F411xE +MCU_PACKAGE = UFQFPN48 + LD_FILE = boards/STM32F411VETx_FLASH.ld diff --git a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk index 312ca6b48..351adf1b8 100644 --- a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk @@ -7,15 +7,11 @@ USB_DEVICES = "CDC,MSC" SPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = GD25Q16C -LONGINT_IMPL = MPZ -MCU_SERIES = m4 -MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f405xx -MCU_PACKAGE = 64 -CMSIS_MCU = STM32F405xx +MCU_SERIES = F4 +MCU_VARIANT = STM32F405xx +MCU_PACKAGE = LQFP64 -# Default includes filesystem, but uses external flash LD_DEFAULT = boards/STM32F405_default.ld LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option UF2_OFFSET = 0x8010000 diff --git a/ports/stm/boards/meowbit_v121/mpconfigboard.mk b/ports/stm/boards/meowbit_v121/mpconfigboard.mk index 16268ba11..0a725d75b 100644 --- a/ports/stm/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm/boards/meowbit_v121/mpconfigboard.mk @@ -7,18 +7,14 @@ USB_DEVICES = "CDC,MSC" SPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ -LONGINT_IMPL = MPZ +# INTERNAL_FLASH_FILESYSTEM = 1 BOOTLOADER_OFFSET = 0x8010000 -# INTERNAL_FLASH_FILESYSTEM = 1 -# LONGINT_IMPL = NONE +MCU_SERIES = F4 +MCU_VARIANT = STM32F401xE +MCU_PACKAGE = LQFP64 -MCU_SERIES = m4 -MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f401xe -MCU_PACKAGE = 64 -CMSIS_MCU = STM32F401xE LD_FILE = boards/STM32F401xe_boot.ld # LD_FILE = boards/STM32F401xe_fs.ld # use for internal flash diff --git a/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk b/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk index a8472608b..e9f1d0369 100644 --- a/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk +++ b/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk @@ -7,12 +7,10 @@ USB_DEVICES = "CDC,MSC" SPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = W25Q64JV_IQ -LONGINT_IMPL = MPZ -MCU_SERIES = m4 -MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f411xe -MCU_PACKAGE = 48 -CMSIS_MCU = STM32F411xE +MCU_SERIES = F4 +MCU_VARIANT = STM32F411xE +MCU_PACKAGE = UFQFPN48 + LD_FILE = boards/STM32F411VETx_FLASH.ld diff --git a/ports/stm/boards/pyboard_v11/mpconfigboard.mk b/ports/stm/boards/pyboard_v11/mpconfigboard.mk index ef1b8f0ca..ab2ce86a9 100644 --- a/ports/stm/boards/pyboard_v11/mpconfigboard.mk +++ b/ports/stm/boards/pyboard_v11/mpconfigboard.mk @@ -5,12 +5,10 @@ USB_MANUFACTURER = "George Robotic" USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE -MCU_SERIES = m4 -MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f405xx -MCU_PACKAGE = 64 -CMSIS_MCU = STM32F405xx +MCU_SERIES = F4 +MCU_VARIANT = STM32F405xx +MCU_PACKAGE = LQFP64 + LD_FILE = boards/STM32F405_fs.ld diff --git a/ports/stm/boards/startup_stm32h743xx.s b/ports/stm/boards/startup_stm32h743xx.s new file mode 100644 index 000000000..357f7a7ba --- /dev/null +++ b/ports/stm/boards/startup_stm32h743xx.s @@ -0,0 +1,748 @@ +/** + ****************************************************************************** + * @file startup_stm32h743xx.s + * @author MCD Application Team + * @brief STM32H743xx Devices vector table for GCC based toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m7 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ +/* bl __libc_init_array */ +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_AVD_IRQHandler /* PVD/AVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word FDCAN1_IT0_IRQHandler /* FDCAN1 interrupt line 0 */ + .word FDCAN2_IT0_IRQHandler /* FDCAN2 interrupt line 0 */ + .word FDCAN1_IT1_IRQHandler /* FDCAN1 interrupt line 1 */ + .word FDCAN2_IT1_IRQHandler /* FDCAN2 interrupt line 1 */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_IRQHandler /* TIM1 Break interrupt */ + .word TIM1_UP_IRQHandler /* TIM1 Update interrupt */ + .word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation interrupt */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word 0 /* Reserved */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word FMC_IRQHandler /* FMC */ + .word SDMMC1_IRQHandler /* SDMMC1 */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word UART4_IRQHandler /* UART4 */ + .word UART5_IRQHandler /* UART5 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .word TIM7_IRQHandler /* TIM7 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word ETH_IRQHandler /* Ethernet */ + .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ + .word FDCAN_CAL_IRQHandler /* FDCAN calibration unit interrupt*/ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .word OTG_HS_IRQHandler /* USB OTG HS */ + .word DCMI_IRQHandler /* DCMI */ + .word 0 /* Reserved */ + .word RNG_IRQHandler /* Rng */ + .word FPU_IRQHandler /* FPU */ + .word UART7_IRQHandler /* UART7 */ + .word UART8_IRQHandler /* UART8 */ + .word SPI4_IRQHandler /* SPI4 */ + .word SPI5_IRQHandler /* SPI5 */ + .word SPI6_IRQHandler /* SPI6 */ + .word SAI1_IRQHandler /* SAI1 */ + .word LTDC_IRQHandler /* LTDC */ + .word LTDC_ER_IRQHandler /* LTDC error */ + .word DMA2D_IRQHandler /* DMA2D */ + .word SAI2_IRQHandler /* SAI2 */ + .word QUADSPI_IRQHandler /* QUADSPI */ + .word LPTIM1_IRQHandler /* LPTIM1 */ + .word CEC_IRQHandler /* HDMI_CEC */ + .word I2C4_EV_IRQHandler /* I2C4 Event */ + .word I2C4_ER_IRQHandler /* I2C4 Error */ + .word SPDIF_RX_IRQHandler /* SPDIF_RX */ + .word OTG_FS_EP1_OUT_IRQHandler /* USB OTG FS End Point 1 Out */ + .word OTG_FS_EP1_IN_IRQHandler /* USB OTG FS End Point 1 In */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMAMUX1_OVR_IRQHandler /* DMAMUX1 Overrun interrupt */ + .word HRTIM1_Master_IRQHandler /* HRTIM Master Timer global Interrupt */ + .word HRTIM1_TIMA_IRQHandler /* HRTIM Timer A global Interrupt */ + .word HRTIM1_TIMB_IRQHandler /* HRTIM Timer B global Interrupt */ + .word HRTIM1_TIMC_IRQHandler /* HRTIM Timer C global Interrupt */ + .word HRTIM1_TIMD_IRQHandler /* HRTIM Timer D global Interrupt */ + .word HRTIM1_TIME_IRQHandler /* HRTIM Timer E global Interrupt */ + .word HRTIM1_FLT_IRQHandler /* HRTIM Fault global Interrupt */ + .word DFSDM1_FLT0_IRQHandler /* DFSDM Filter0 Interrupt */ + .word DFSDM1_FLT1_IRQHandler /* DFSDM Filter1 Interrupt */ + .word DFSDM1_FLT2_IRQHandler /* DFSDM Filter2 Interrupt */ + .word DFSDM1_FLT3_IRQHandler /* DFSDM Filter3 Interrupt */ + .word SAI3_IRQHandler /* SAI3 global Interrupt */ + .word SWPMI1_IRQHandler /* Serial Wire Interface 1 global interrupt */ + .word TIM15_IRQHandler /* TIM15 global Interrupt */ + .word TIM16_IRQHandler /* TIM16 global Interrupt */ + .word TIM17_IRQHandler /* TIM17 global Interrupt */ + .word MDIOS_WKUP_IRQHandler /* MDIOS Wakeup Interrupt */ + .word MDIOS_IRQHandler /* MDIOS global Interrupt */ + .word JPEG_IRQHandler /* JPEG global Interrupt */ + .word MDMA_IRQHandler /* MDMA global Interrupt */ + .word 0 /* Reserved */ + .word SDMMC2_IRQHandler /* SDMMC2 global Interrupt */ + .word HSEM1_IRQHandler /* HSEM1 global Interrupt */ + .word 0 /* Reserved */ + .word ADC3_IRQHandler /* ADC3 global Interrupt */ + .word DMAMUX2_OVR_IRQHandler /* DMAMUX Overrun interrupt */ + .word BDMA_Channel0_IRQHandler /* BDMA Channel 0 global Interrupt */ + .word BDMA_Channel1_IRQHandler /* BDMA Channel 1 global Interrupt */ + .word BDMA_Channel2_IRQHandler /* BDMA Channel 2 global Interrupt */ + .word BDMA_Channel3_IRQHandler /* BDMA Channel 3 global Interrupt */ + .word BDMA_Channel4_IRQHandler /* BDMA Channel 4 global Interrupt */ + .word BDMA_Channel5_IRQHandler /* BDMA Channel 5 global Interrupt */ + .word BDMA_Channel6_IRQHandler /* BDMA Channel 6 global Interrupt */ + .word BDMA_Channel7_IRQHandler /* BDMA Channel 7 global Interrupt */ + .word COMP1_IRQHandler /* COMP1 global Interrupt */ + .word LPTIM2_IRQHandler /* LP TIM2 global interrupt */ + .word LPTIM3_IRQHandler /* LP TIM3 global interrupt */ + .word LPTIM4_IRQHandler /* LP TIM4 global interrupt */ + .word LPTIM5_IRQHandler /* LP TIM5 global interrupt */ + .word LPUART1_IRQHandler /* LP UART1 interrupt */ + .word 0 /* Reserved */ + .word CRS_IRQHandler /* Clock Recovery Global Interrupt */ + .word ECC_IRQHandler /* ECC diagnostic Global Interrupt */ + .word SAI4_IRQHandler /* SAI4 global interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word WAKEUP_PIN_IRQHandler /* Interrupt for all 6 wake-up pins */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_AVD_IRQHandler + .thumb_set PVD_AVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak FDCAN1_IT0_IRQHandler + .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler + + .weak FDCAN2_IT0_IRQHandler + .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler + + .weak FDCAN1_IT1_IRQHandler + .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler + + .weak FDCAN2_IT1_IRQHandler + .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_IRQHandler + .thumb_set TIM1_BRK_IRQHandler,Default_Handler + + .weak TIM1_UP_IRQHandler + .thumb_set TIM1_UP_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_IRQHandler + .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FMC_IRQHandler + .thumb_set FMC_IRQHandler,Default_Handler + + .weak SDMMC1_IRQHandler + .thumb_set SDMMC1_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak ETH_IRQHandler + .thumb_set ETH_IRQHandler,Default_Handler + + .weak ETH_WKUP_IRQHandler + .thumb_set ETH_WKUP_IRQHandler,Default_Handler + + .weak FDCAN_CAL_IRQHandler + .thumb_set FDCAN_CAL_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak RNG_IRQHandler + .thumb_set RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak UART7_IRQHandler + .thumb_set UART7_IRQHandler,Default_Handler + + .weak UART8_IRQHandler + .thumb_set UART8_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler + + .weak SPI5_IRQHandler + .thumb_set SPI5_IRQHandler,Default_Handler + + .weak SPI6_IRQHandler + .thumb_set SPI6_IRQHandler,Default_Handler + + .weak SAI1_IRQHandler + .thumb_set SAI1_IRQHandler,Default_Handler + + .weak LTDC_IRQHandler + .thumb_set LTDC_IRQHandler,Default_Handler + + .weak LTDC_ER_IRQHandler + .thumb_set LTDC_ER_IRQHandler,Default_Handler + + .weak DMA2D_IRQHandler + .thumb_set DMA2D_IRQHandler,Default_Handler + + .weak SAI2_IRQHandler + .thumb_set SAI2_IRQHandler,Default_Handler + + .weak QUADSPI_IRQHandler + .thumb_set QUADSPI_IRQHandler,Default_Handler + + .weak LPTIM1_IRQHandler + .thumb_set LPTIM1_IRQHandler,Default_Handler + + .weak CEC_IRQHandler + .thumb_set CEC_IRQHandler,Default_Handler + + .weak I2C4_EV_IRQHandler + .thumb_set I2C4_EV_IRQHandler,Default_Handler + + .weak I2C4_ER_IRQHandler + .thumb_set I2C4_ER_IRQHandler,Default_Handler + + .weak SPDIF_RX_IRQHandler + .thumb_set SPDIF_RX_IRQHandler,Default_Handler + + .weak OTG_FS_EP1_OUT_IRQHandler + .thumb_set OTG_FS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_FS_EP1_IN_IRQHandler + .thumb_set OTG_FS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMAMUX1_OVR_IRQHandler + .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler + + .weak HRTIM1_Master_IRQHandler + .thumb_set HRTIM1_Master_IRQHandler,Default_Handler + + .weak HRTIM1_TIMA_IRQHandler + .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler + + .weak HRTIM1_TIMB_IRQHandler + .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler + + .weak HRTIM1_TIMC_IRQHandler + .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler + + .weak HRTIM1_TIMD_IRQHandler + .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler + + .weak HRTIM1_TIME_IRQHandler + .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler + + .weak HRTIM1_FLT_IRQHandler + .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler + + .weak DFSDM1_FLT0_IRQHandler + .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler + + .weak DFSDM1_FLT1_IRQHandler + .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler + + .weak DFSDM1_FLT2_IRQHandler + .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler + + .weak DFSDM1_FLT3_IRQHandler + .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler + + .weak SAI3_IRQHandler + .thumb_set SAI3_IRQHandler,Default_Handler + + .weak SWPMI1_IRQHandler + .thumb_set SWPMI1_IRQHandler,Default_Handler + + .weak TIM15_IRQHandler + .thumb_set TIM15_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak MDIOS_WKUP_IRQHandler + .thumb_set MDIOS_WKUP_IRQHandler,Default_Handler + + .weak MDIOS_IRQHandler + .thumb_set MDIOS_IRQHandler,Default_Handler + + .weak JPEG_IRQHandler + .thumb_set JPEG_IRQHandler,Default_Handler + + .weak MDMA_IRQHandler + .thumb_set MDMA_IRQHandler,Default_Handler + + .weak SDMMC2_IRQHandler + .thumb_set SDMMC2_IRQHandler,Default_Handler + + .weak HSEM1_IRQHandler + .thumb_set HSEM1_IRQHandler,Default_Handler + + .weak ADC3_IRQHandler + .thumb_set ADC3_IRQHandler,Default_Handler + + .weak DMAMUX2_OVR_IRQHandler + .thumb_set DMAMUX2_OVR_IRQHandler,Default_Handler + + .weak BDMA_Channel0_IRQHandler + .thumb_set BDMA_Channel0_IRQHandler,Default_Handler + + .weak BDMA_Channel1_IRQHandler + .thumb_set BDMA_Channel1_IRQHandler,Default_Handler + + .weak BDMA_Channel2_IRQHandler + .thumb_set BDMA_Channel2_IRQHandler,Default_Handler + + .weak BDMA_Channel3_IRQHandler + .thumb_set BDMA_Channel3_IRQHandler,Default_Handler + + .weak BDMA_Channel4_IRQHandler + .thumb_set BDMA_Channel4_IRQHandler,Default_Handler + + .weak BDMA_Channel5_IRQHandler + .thumb_set BDMA_Channel5_IRQHandler,Default_Handler + + .weak BDMA_Channel6_IRQHandler + .thumb_set BDMA_Channel6_IRQHandler,Default_Handler + + .weak BDMA_Channel7_IRQHandler + .thumb_set BDMA_Channel7_IRQHandler,Default_Handler + + .weak COMP1_IRQHandler + .thumb_set COMP1_IRQHandler,Default_Handler + + .weak LPTIM2_IRQHandler + .thumb_set LPTIM2_IRQHandler,Default_Handler + + .weak LPTIM3_IRQHandler + .thumb_set LPTIM3_IRQHandler,Default_Handler + + .weak LPTIM4_IRQHandler + .thumb_set LPTIM4_IRQHandler,Default_Handler + + .weak LPTIM5_IRQHandler + .thumb_set LPTIM5_IRQHandler,Default_Handler + + .weak LPUART1_IRQHandler + .thumb_set LPUART1_IRQHandler,Default_Handler + + .weak CRS_IRQHandler + .thumb_set CRS_IRQHandler,Default_Handler + + .weak ECC_IRQHandler + .thumb_set ECC_IRQHandler,Default_Handler + + .weak SAI4_IRQHandler + .thumb_set SAI4_IRQHandler,Default_Handler + + .weak WAKEUP_PIN_IRQHandler + .thumb_set WAKEUP_PIN_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk b/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk index 68c6a1eea..bf2dd5596 100644 --- a/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk +++ b/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk @@ -10,12 +10,10 @@ USB_DEVICES = "CDC,MSC" # LONGINT_IMPL = MPZ INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE -MCU_SERIES = m4 -MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f411xe -MCU_PACKAGE = 48 -CMSIS_MCU = STM32F411xE +MCU_SERIES = F4 +MCU_VARIANT = STM32F411xE +MCU_PACKAGE = UFQFPN48 + LD_FILE = boards/STM32F411VETx_FLASH.ld diff --git a/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk index 64e2b4dc5..da24fe3f0 100644 --- a/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk +++ b/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk @@ -5,12 +5,10 @@ USB_MANUFACTURER = "STMicroelectronics" USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE -MCU_SERIES = m4 -MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f411xe -MCU_PACKAGE = 100 -CMSIS_MCU = STM32F411xE +MCU_SERIES = F4 +MCU_VARIANT = STM32F411xE +MCU_PACKAGE = LQFP100_f4 + LD_FILE = boards/STM32F411VETx_FLASH.ld diff --git a/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk index b0205fc73..d227803de 100644 --- a/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk +++ b/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk @@ -5,18 +5,16 @@ USB_MANUFACTURER = "STMicroelectronics" USB_DEVICES = "CDC,MSC,HID" INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE # QSPI_FLASH_FILESYSTEM = 1 # EXTERNAL_FLASH_DEVICE_COUNT = 1 # EXTERNAL_FLASH_DEVICES = N25Q128A # LONGINT_IMPL = MPZ -MCU_SERIES = m4 -MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f412zx -MCU_PACKAGE = 144 -CMSIS_MCU = STM32F412Zx +MCU_SERIES = F4 +MCU_VARIANT = STM32F412Zx +MCU_PACKAGE = LQFP144 + LD_FILE = boards/STM32F412ZGTx_FLASH.ld diff --git a/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk index 312a20f65..c8c424c0c 100644 --- a/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk +++ b/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk @@ -5,14 +5,10 @@ USB_MANUFACTURER = "STMicroelectronics" USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE -# This is technically a F407 but there's no difference -# other than the camera and ethernet, which aren't supported. -MCU_SERIES = m4 -MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f407xx -MCU_PACKAGE = 100 -CMSIS_MCU = STM32F407xx +MCU_SERIES = F4 +MCU_VARIANT = STM32F407xx +MCU_PACKAGE = LQFP100_f4 + LD_FILE = boards/STM32F407_fs.ld diff --git a/ports/stm/boards/stm32h743zi_discovery/board.c b/ports/stm/boards/stm32h743zi_discovery/board.c new file mode 100644 index 000000000..4421970ee --- /dev/null +++ b/ports/stm/boards/stm32h743zi_discovery/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/stm32h743zi_discovery/mpconfigboard.h b/ports/stm/boards/stm32h743zi_discovery/mpconfigboard.h new file mode 100644 index 000000000..6a62ff512 --- /dev/null +++ b/ports/stm/boards/stm32h743zi_discovery/mpconfigboard.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "STM32H743_DISCO" +#define MICROPY_HW_MCU_NAME "STM32H743" + +// #define FLASH_SIZE (0x200000) +#define FLASH_PAGE_SIZE (0x4000) + +#define BOARD_OSC_DIV (8) diff --git a/ports/stm/boards/stm32h743zi_discovery/mpconfigboard.mk b/ports/stm/boards/stm32h743zi_discovery/mpconfigboard.mk new file mode 100644 index 000000000..d2f890536 --- /dev/null +++ b/ports/stm/boards/stm32h743zi_discovery/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x239A #REPLACE +USB_PID = 0x808A #REPLACE +USB_PRODUCT = "STM32H743ZI Discovery Board - CPy" +USB_MANUFACTURER = "STMicroelectronics" +USB_DEVICES = "CDC,HID" + +DISABLE_FILESYSTEM = 1 + +MCU_SERIES = H7 +MCU_VARIANT = STM32H743xx +MCU_PACKAGE = LQFP144 + +LD_FILE = boards/STM32H743_fs.ld + diff --git a/ports/stm/boards/stm32h743zi_discovery/pins.c b/ports/stm/boards/stm32h743zi_discovery/pins.c new file mode 100644 index 000000000..eceea9382 --- /dev/null +++ b/ports/stm/boards/stm32h743zi_discovery/pins.c @@ -0,0 +1,135 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PF10) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PF04) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PF05) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PF06) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PG14) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PE13) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PE14) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PE11) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PE09) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PG12) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PF03) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PD15) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_PG06) }, + { MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_D29), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_PD11) }, + { MP_ROM_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_PE02) }, + { MP_ROM_QSTR(MP_QSTR_D32), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_D34), MP_ROM_PTR(&pin_PE00) }, + { MP_ROM_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_PE15) }, + { MP_ROM_QSTR(MP_QSTR_D38), MP_ROM_PTR(&pin_PE06) }, + { MP_ROM_QSTR(MP_QSTR_D39), MP_ROM_PTR(&pin_PE12) }, + { MP_ROM_QSTR(MP_QSTR_D40), MP_ROM_PTR(&pin_PE10) }, + { MP_ROM_QSTR(MP_QSTR_D41), MP_ROM_PTR(&pin_PE07) }, + { MP_ROM_QSTR(MP_QSTR_D42), MP_ROM_PTR(&pin_PE08) }, + { MP_ROM_QSTR(MP_QSTR_D43), MP_ROM_PTR(&pin_PC08) }, + { MP_ROM_QSTR(MP_QSTR_D44), MP_ROM_PTR(&pin_PC09) }, + { MP_ROM_QSTR(MP_QSTR_D45), MP_ROM_PTR(&pin_PC10) }, + { MP_ROM_QSTR(MP_QSTR_D46), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_D47), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_D48), MP_ROM_PTR(&pin_PD02) }, + { MP_ROM_QSTR(MP_QSTR_D49), MP_ROM_PTR(&pin_PG02) }, + { MP_ROM_QSTR(MP_QSTR_D50), MP_ROM_PTR(&pin_PG03) }, + { MP_ROM_QSTR(MP_QSTR_D51), MP_ROM_PTR(&pin_PD07) }, + { MP_ROM_QSTR(MP_QSTR_D52), MP_ROM_PTR(&pin_PD06) }, + { MP_ROM_QSTR(MP_QSTR_D53), MP_ROM_PTR(&pin_PD05) }, + { MP_ROM_QSTR(MP_QSTR_D54), MP_ROM_PTR(&pin_PD04) }, + { MP_ROM_QSTR(MP_QSTR_D55), MP_ROM_PTR(&pin_PD03) }, + { MP_ROM_QSTR(MP_QSTR_D56), MP_ROM_PTR(&pin_PE02) }, + { MP_ROM_QSTR(MP_QSTR_D57), MP_ROM_PTR(&pin_PE04) }, + { MP_ROM_QSTR(MP_QSTR_D58), MP_ROM_PTR(&pin_PE05) }, + { MP_ROM_QSTR(MP_QSTR_D59), MP_ROM_PTR(&pin_PE06) }, + { MP_ROM_QSTR(MP_QSTR_D60), MP_ROM_PTR(&pin_PE03) }, + { MP_ROM_QSTR(MP_QSTR_D61), MP_ROM_PTR(&pin_PF08) }, + { MP_ROM_QSTR(MP_QSTR_D62), MP_ROM_PTR(&pin_PF07) }, + { MP_ROM_QSTR(MP_QSTR_D63), MP_ROM_PTR(&pin_PF09) }, + { MP_ROM_QSTR(MP_QSTR_D64), MP_ROM_PTR(&pin_PG01) }, + { MP_ROM_QSTR(MP_QSTR_D65), MP_ROM_PTR(&pin_PG00) }, + { MP_ROM_QSTR(MP_QSTR_D66), MP_ROM_PTR(&pin_PD01) }, + { MP_ROM_QSTR(MP_QSTR_D67), MP_ROM_PTR(&pin_PD00) }, + { MP_ROM_QSTR(MP_QSTR_D68), MP_ROM_PTR(&pin_PF00) }, + { MP_ROM_QSTR(MP_QSTR_D69), MP_ROM_PTR(&pin_PF01) }, + { MP_ROM_QSTR(MP_QSTR_D70), MP_ROM_PTR(&pin_PF02) }, + { MP_ROM_QSTR(MP_QSTR_D71), MP_ROM_PTR(&pin_PE09) }, + { MP_ROM_QSTR(MP_QSTR_D72), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_DAC2), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_SW), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_I2C1_SDA), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_I2C1_SCL), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_I2C2_SDA), MP_ROM_PTR(&pin_PF00) }, + { MP_ROM_QSTR(MP_QSTR_I2C2_SCL), MP_ROM_PTR(&pin_PF01) }, + { MP_ROM_QSTR(MP_QSTR_I2C4_SCL), MP_ROM_PTR(&pin_PF14) }, + { MP_ROM_QSTR(MP_QSTR_I2C4_SDA), MP_ROM_PTR(&pin_PF15) }, + { MP_ROM_QSTR(MP_QSTR_SD_D0), MP_ROM_PTR(&pin_PC08) }, + { MP_ROM_QSTR(MP_QSTR_SD_D1), MP_ROM_PTR(&pin_PC09) }, + { MP_ROM_QSTR(MP_QSTR_SD_D2), MP_ROM_PTR(&pin_PC10) }, + { MP_ROM_QSTR(MP_QSTR_SD_D3), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_SD_CMD), MP_ROM_PTR(&pin_PD02) }, + { MP_ROM_QSTR(MP_QSTR_SD_CK), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_SD_SW), MP_ROM_PTR(&pin_PG02) }, + { MP_ROM_QSTR(MP_QSTR_OTG_FS_POWER), MP_ROM_PTR(&pin_PG06) }, + { MP_ROM_QSTR(MP_QSTR_OTG_FS_OVER_CURRENT), MP_ROM_PTR(&pin_PG07) }, + { MP_ROM_QSTR(MP_QSTR_USB_VBUS), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_USB_ID), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_USB_DM), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_USB_DP), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_UART2_TX), MP_ROM_PTR(&pin_PD05) }, + { MP_ROM_QSTR(MP_QSTR_UART2_RX), MP_ROM_PTR(&pin_PD06) }, + { MP_ROM_QSTR(MP_QSTR_UART2_RTS), MP_ROM_PTR(&pin_PD04) }, + { MP_ROM_QSTR(MP_QSTR_UART2_CTS), MP_ROM_PTR(&pin_PD03) }, + { MP_ROM_QSTR(MP_QSTR_UART3_TX), MP_ROM_PTR(&pin_PD08) }, + { MP_ROM_QSTR(MP_QSTR_UART3_RX), MP_ROM_PTR(&pin_PD09) }, + { MP_ROM_QSTR(MP_QSTR_UART5_TX), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_UART5_RX), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_UART6_TX), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_UART6_RX), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_UART7_TX), MP_ROM_PTR(&pin_PF07) }, + { MP_ROM_QSTR(MP_QSTR_UART7_RX), MP_ROM_PTR(&pin_PF06) }, + { MP_ROM_QSTR(MP_QSTR_UART8_TX), MP_ROM_PTR(&pin_PE01) }, + { MP_ROM_QSTR(MP_QSTR_UART8_RX), MP_ROM_PTR(&pin_PE00) }, + { MP_ROM_QSTR(MP_QSTR_ETH_MDC), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_ETH_MDIO), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_ETH_RMII_REF_CLK), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_ETH_RMII_CRS_DV), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_ETH_RMII_RXD0), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_ETH_RMII_RXD1), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_ETH_RMII_TX_EN), MP_ROM_PTR(&pin_PG11) }, + { MP_ROM_QSTR(MP_QSTR_ETH_RMII_TXD0), MP_ROM_PTR(&pin_PG13) }, + { MP_ROM_QSTR(MP_QSTR_ETH_RMII_TXD1), MP_ROM_PTR(&pin_PB13) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/stm32h743zi_discovery/stm32h7xx_hal_conf.h b/ports/stm/boards/stm32h743zi_discovery/stm32h7xx_hal_conf.h new file mode 100644 index 000000000..e6a2dd5f8 --- /dev/null +++ b/ports/stm/boards/stm32h743zi_discovery/stm32h7xx_hal_conf.h @@ -0,0 +1,493 @@ +/** + ****************************************************************************** + * @file stm32h7xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32H7xx_HAL_CONF_H +#define __STM32H7xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + + #define HAL_ADC_MODULE_ENABLED +/* #define HAL_FDCAN_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_COMP_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +#define HAL_ETH_MODULE_ENABLED +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_OTFDEC_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HRTIM_MODULE_ENABLED */ +/* #define HAL_HSEM_MODULE_ENABLED */ +/* #define HAL_GFXMMU_MODULE_ENABLED */ +/* #define HAL_JPEG_MODULE_ENABLED */ +/* #define HAL_OPAMP_MODULE_ENABLED */ +/* #define HAL_OSPI_MODULE_ENABLED */ +/* #define HAL_OSPI_MODULE_ENABLED */ +/* #define HAL_I2S_MODULE_ENABLED */ +/* #define HAL_SMBUS_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +#define HAL_RNG_MODULE_ENABLED +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +/* #define HAL_SWPMI_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_JPEG_MODULE_ENABLED */ +/* #define HAL_MDIOS_MODULE_ENABLED */ +/* #define HAL_PSSI_MODULE_ENABLED */ +/* #define HAL_DTS_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_MDMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED +#define HAL_HSEM_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) +#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal oscillator (CSI) default value. + * This value is the default CSI value after Reset. + */ +#if !defined (CSI_VALUE) + #define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* CSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External clock in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */ + +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ +#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ +#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */ +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ +#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ +#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ +#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ +#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ +#define USE_HAL_DTS_REGISTER_CALLBACKS 0U /* DTS register callback disabled */ +#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ +#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U /* FDCAN register callback disabled */ +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ +#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ +#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ +#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U /* GFXMMU register callback disabled */ +#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U /* HRTIM register callback disabled */ +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ +#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */ +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ +#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ +#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */ +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ +#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */ +#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U /* OSPI register callback disabled */ +#define USE_HAL_OTFDEC_REGISTER_CALLBACKS 0U /* OTFDEC register callback disabled */ +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ +#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ +#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ +#define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U /* SWPMI register callback disabled */ +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ + +/* ########################### Ethernet Configuration ######################### */ +#define ETH_TX_DESC_CNT 4 /* number of Ethernet Tx DMA descriptors */ +#define ETH_RX_DESC_CNT 4 /* number of Ethernet Rx DMA descriptors */ + +#define ETH_MAC_ADDR0 ((uint8_t)0x02) +#define ETH_MAC_ADDR1 ((uint8_t)0x00) +#define ETH_MAC_ADDR2 ((uint8_t)0x00) +#define ETH_MAC_ADDR3 ((uint8_t)0x00) +#define ETH_MAC_ADDR4 ((uint8_t)0x00) +#define ETH_MAC_ADDR5 ((uint8_t)0x00) + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32h7xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32h7xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32h7xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_MDMA_MODULE_ENABLED + #include "stm32h7xx_hal_mdma.h" +#endif /* HAL_MDMA_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32h7xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32h7xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32h7xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32h7xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32h7xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32h7xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32h7xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32h7xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32h7xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_FDCAN_MODULE_ENABLED + #include "stm32h7xx_hal_fdcan.h" +#endif /* HAL_FDCAN_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32h7xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32h7xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32h7xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32h7xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32h7xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32h7xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_GFXMMU_MODULE_ENABLED + #include "stm32h7xx_hal_gfxmmu.h" +#endif /* HAL_GFXMMU_MODULE_ENABLED */ + +#ifdef HAL_HRTIM_MODULE_ENABLED + #include "stm32h7xx_hal_hrtim.h" +#endif /* HAL_HRTIM_MODULE_ENABLED */ + +#ifdef HAL_HSEM_MODULE_ENABLED + #include "stm32h7xx_hal_hsem.h" +#endif /* HAL_HSEM_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32h7xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32h7xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32h7xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32h7xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32h7xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32h7xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_JPEG_MODULE_ENABLED + #include "stm32h7xx_hal_jpeg.h" +#endif /* HAL_JPEG_MODULE_ENABLED */ + +#ifdef HAL_MDIOS_MODULE_ENABLED + #include "stm32h7xx_hal_mdios.h" +#endif /* HAL_MDIOS_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32h7xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED +#include "stm32h7xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED +#include "stm32h7xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED +#include "stm32h7xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_OSPI_MODULE_ENABLED + #include "stm32h7xx_hal_ospi.h" +#endif /* HAL_OSPI_MODULE_ENABLED */ + +#ifdef HAL_OTFDEC_MODULE_ENABLED +#include "stm32h7xx_hal_otfdec.h" +#endif /* HAL_OTFDEC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32h7xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32h7xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_RAMECC_MODULE_ENABLED + #include "stm32h7xx_hal_ramecc.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32h7xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32h7xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32h7xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32h7xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32h7xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32h7xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32h7xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_SWPMI_MODULE_ENABLED + #include "stm32h7xx_hal_swpmi.h" +#endif /* HAL_SWPMI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32h7xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32h7xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32h7xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32h7xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32h7xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32h7xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32h7xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32h7xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32h7xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_PSSI_MODULE_ENABLED + #include "stm32h7xx_hal_pssi.h" +#endif /* HAL_PSSI_MODULE_ENABLED */ + +#ifdef HAL_DTS_MODULE_ENABLED + #include "stm32h7xx_hal_dts.h" +#endif /* HAL_DTS_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32H7xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/common-hal/analogio/AnalogOut.h b/ports/stm/common-hal/analogio/AnalogOut.h index 61591d0e6..46312b460 100644 --- a/ports/stm/common-hal/analogio/AnalogOut.h +++ b/ports/stm/common-hal/analogio/AnalogOut.h @@ -32,7 +32,7 @@ #include "py/obj.h" #include "stm32f4xx_hal.h" -#include "stm32f4/periph.h" +#include "peripherals/periph.h" typedef struct { mp_obj_base_t base; diff --git a/ports/stm/common-hal/busio/I2C.c b/ports/stm/common-hal/busio/I2C.c index 8e98b966d..4daefb58b 100644 --- a/ports/stm/common-hal/busio/I2C.c +++ b/ports/stm/common-hal/busio/I2C.c @@ -29,7 +29,6 @@ #include "shared-bindings/busio/I2C.h" #include "py/mperrno.h" #include "py/runtime.h" -#include "stm32f4xx_hal.h" #include "shared-bindings/microcontroller/__init__.h" #include "supervisor/shared/translate.h" @@ -69,9 +68,9 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, if (mcu_i2c_sda_list[i].pin == sda) { for (uint j = 0; j < scl_len; j++) { if ((mcu_i2c_scl_list[j].pin == scl) - && (mcu_i2c_scl_list[j].i2c_index == mcu_i2c_sda_list[i].i2c_index)) { + && (mcu_i2c_scl_list[j].periph_index == mcu_i2c_sda_list[i].periph_index)) { //keep looking if the I2C is taken, could be another SCL that works - if (reserved_i2c[mcu_i2c_scl_list[i].i2c_index - 1]) { + if (reserved_i2c[mcu_i2c_scl_list[i].periph_index - 1]) { i2c_taken = true; continue; } @@ -85,7 +84,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, //handle typedef selection, errors if (self->sda != NULL && self->scl != NULL ) { - I2Cx = mcu_i2c_banks[self->sda->i2c_index - 1]; + I2Cx = mcu_i2c_banks[self->sda->periph_index - 1]; } else { if (i2c_taken) { mp_raise_ValueError(translate("Hardware busy, try alternative pins")); @@ -111,8 +110,8 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, HAL_GPIO_Init(pin_port(scl->port), &GPIO_InitStruct); //Note: due to I2C soft reboot issue, do not relocate clock init. - i2c_clock_enable(1 << (self->sda->i2c_index - 1)); - reserved_i2c[self->sda->i2c_index - 1] = true; + i2c_clock_enable(1 << (self->sda->periph_index - 1)); + reserved_i2c[self->sda->periph_index - 1] = true; self->handle.Instance = I2Cx; self->handle.Init.ClockSpeed = 100000; @@ -152,9 +151,9 @@ void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { return; } - i2c_clock_disable(1 << (self->sda->i2c_index - 1)); - reserved_i2c[self->sda->i2c_index - 1] = false; - never_reset_i2c[self->sda->i2c_index - 1] = false; + i2c_clock_disable(1 << (self->sda->periph_index - 1)); + reserved_i2c[self->sda->periph_index - 1] = false; + never_reset_i2c[self->sda->periph_index - 1] = false; reset_pin_number(self->sda->pin->port,self->sda->pin->number); reset_pin_number(self->scl->pin->port,self->scl->pin->number); diff --git a/ports/stm/common-hal/busio/I2C.h b/ports/stm/common-hal/busio/I2C.h index b5c891a98..5ca2854eb 100644 --- a/ports/stm/common-hal/busio/I2C.h +++ b/ports/stm/common-hal/busio/I2C.h @@ -25,13 +25,12 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_I2C_H -#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_I2C_H +#ifndef MICROPY_INCLUDED_STM32_COMMON_HAL_BUSIO_I2C_H +#define MICROPY_INCLUDED_STM32_COMMON_HAL_BUSIO_I2C_H #include "common-hal/microcontroller/Pin.h" -#include "stm32f4xx_hal.h" -#include "stm32f4/periph.h" +#include "peripherals/periph.h" #include "py/obj.h" @@ -39,10 +38,10 @@ typedef struct { mp_obj_base_t base; I2C_HandleTypeDef handle; bool has_lock; - const mcu_i2c_scl_obj_t *scl; - const mcu_i2c_sda_obj_t *sda; + const mcu_periph_obj_t *scl; + const mcu_periph_obj_t *sda; } busio_i2c_obj_t; void i2c_reset(void); -#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_I2C_H +#endif // MICROPY_INCLUDED_STM32_COMMON_HAL_BUSIO_I2C_H diff --git a/ports/stm/common-hal/busio/OneWire.h b/ports/stm/common-hal/busio/OneWire.h index 6e8c82979..0099593f0 100644 --- a/ports/stm/common-hal/busio/OneWire.h +++ b/ports/stm/common-hal/busio/OneWire.h @@ -24,10 +24,10 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_ONEWIRE_H -#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_ONEWIRE_H +#ifndef MICROPY_INCLUDED_STM32_COMMON_HAL_BUSIO_ONEWIRE_H +#define MICROPY_INCLUDED_STM32_COMMON_HAL_BUSIO_ONEWIRE_H // Use bitbangio. #include "shared-module/busio/OneWire.h" -#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_ONEWIRE_H +#endif // MICROPY_INCLUDED_STM32F_COMMON_HAL_BUSIO_ONEWIRE_H diff --git a/ports/stm/common-hal/busio/SPI.c b/ports/stm/common-hal/busio/SPI.c index 7e25e0a57..cf0015560 100644 --- a/ports/stm/common-hal/busio/SPI.c +++ b/ports/stm/common-hal/busio/SPI.c @@ -29,7 +29,6 @@ #include "shared-bindings/busio/SPI.h" #include "py/mperrno.h" #include "py/runtime.h" -#include "stm32f4xx_hal.h" #include "shared-bindings/microcontroller/__init__.h" #include "boards/board.h" @@ -120,10 +119,10 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, //MISO for (uint k = 0; k < miso_len; k++) { if ((mcu_spi_miso_list[k].pin == miso) //everything needs the same index - && (mcu_spi_sck_list[i].spi_index == mcu_spi_mosi_list[j].spi_index) - && (mcu_spi_sck_list[i].spi_index == mcu_spi_miso_list[k].spi_index)) { + && (mcu_spi_sck_list[i].periph_index == mcu_spi_mosi_list[j].periph_index) + && (mcu_spi_sck_list[i].periph_index == mcu_spi_miso_list[k].periph_index)) { //keep looking if the SPI is taken, edge case - if (reserved_spi[mcu_spi_sck_list[i].spi_index - 1]) { + if (reserved_spi[mcu_spi_sck_list[i].periph_index - 1]) { spi_taken = true; continue; } @@ -140,9 +139,9 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, } else if (miso != NULL) { for (uint j = 0; j < miso_len; j++) { if ((mcu_spi_miso_list[j].pin == miso) //only SCK and MISO need the same index - && (mcu_spi_sck_list[i].spi_index == mcu_spi_miso_list[j].spi_index)) { + && (mcu_spi_sck_list[i].periph_index == mcu_spi_miso_list[j].periph_index)) { //keep looking if the SPI is taken, edge case - if (reserved_spi[mcu_spi_sck_list[i].spi_index - 1]) { + if (reserved_spi[mcu_spi_sck_list[i].periph_index - 1]) { spi_taken = true; continue; } @@ -157,9 +156,9 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, } else if (mosi != NULL) { for (uint j = 0; j < mosi_len; j++) { if ((mcu_spi_mosi_list[j].pin == mosi) //only SCK and MOSI need the same index - && (mcu_spi_sck_list[i].spi_index == mcu_spi_mosi_list[j].spi_index)) { + && (mcu_spi_sck_list[i].periph_index == mcu_spi_mosi_list[j].periph_index)) { //keep looking if the SPI is taken, edge case - if (reserved_spi[mcu_spi_sck_list[i].spi_index - 1]) { + if (reserved_spi[mcu_spi_sck_list[i].periph_index - 1]) { spi_taken = true; continue; } @@ -181,7 +180,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, if ( (self->sck != NULL && self->mosi != NULL && self->miso != NULL) || (self->sck != NULL && self->mosi != NULL && miso == NULL) || (self->sck != NULL && self->miso != NULL && mosi == NULL)) { - SPIx = mcu_spi_banks[self->sck->spi_index - 1]; + SPIx = mcu_spi_banks[self->sck->periph_index - 1]; } else { if (spi_taken) { mp_raise_ValueError(translate("Hardware busy, try alternative pins")); @@ -217,8 +216,8 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, HAL_GPIO_Init(pin_port(miso->port), &GPIO_InitStruct); } - spi_clock_enable(1 << (self->sck->spi_index - 1)); - reserved_spi[self->sck->spi_index - 1] = true; + spi_clock_enable(1 << (self->sck->periph_index - 1)); + reserved_spi[self->sck->periph_index - 1] = true; self->handle.Instance = SPIx; self->handle.Init.Mode = SPI_MODE_MASTER; @@ -276,9 +275,9 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { if (common_hal_busio_spi_deinited(self)) { return; } - spi_clock_disable(1<<(self->sck->spi_index - 1)); - reserved_spi[self->sck->spi_index - 1] = false; - never_reset_spi[self->sck->spi_index - 1] = false; + spi_clock_disable(1<<(self->sck->periph_index - 1)); + reserved_spi[self->sck->periph_index - 1] = false; + never_reset_spi[self->sck->periph_index - 1] = false; reset_pin_number(self->sck->pin->port,self->sck->pin->number); if (self->mosi != NULL) { diff --git a/ports/stm/common-hal/busio/SPI.h b/ports/stm/common-hal/busio/SPI.h index 067d2fcb6..648318367 100644 --- a/ports/stm/common-hal/busio/SPI.h +++ b/ports/stm/common-hal/busio/SPI.h @@ -25,13 +25,12 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_SPI_H -#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_SPI_H +#ifndef MICROPY_INCLUDED_STM32_COMMON_HAL_BUSIO_SPI_H +#define MICROPY_INCLUDED_STM32_COMMON_HAL_BUSIO_SPI_H #include "common-hal/microcontroller/Pin.h" -#include "stm32f4xx_hal.h" -#include "stm32f4/periph.h" +#include "peripherals/periph.h" #include "py/obj.h" @@ -39,10 +38,10 @@ typedef struct { mp_obj_base_t base; SPI_HandleTypeDef handle; bool has_lock; - const mcu_spi_sck_obj_t *sck; - const mcu_spi_mosi_obj_t *mosi; - const mcu_spi_miso_obj_t *miso; - const mcu_spi_nss_obj_t *nss; + const mcu_periph_obj_t *sck; + const mcu_periph_obj_t *mosi; + const mcu_periph_obj_t *miso; + const mcu_periph_obj_t *nss; uint32_t baudrate; uint16_t prescaler; uint8_t polarity; @@ -52,4 +51,4 @@ typedef struct { void spi_reset(void); -#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_SPI_H +#endif // MICROPY_INCLUDED_STM32_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/stm/common-hal/busio/UART.c b/ports/stm/common-hal/busio/UART.c index 0b434fd02..df05a68cb 100644 --- a/ports/stm/common-hal/busio/UART.c +++ b/ports/stm/common-hal/busio/UART.c @@ -36,7 +36,6 @@ #include "supervisor/shared/translate.h" #include "tick.h" -#include "stm32f4xx_hal.h" #define ALL_UARTS 0xFFFF @@ -49,11 +48,11 @@ STATIC void uart_clock_disable(uint16_t mask); STATIC void uart_assign_irq(busio_uart_obj_t* self, USART_TypeDef* USARTx); STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t* self, bool pin_eval, - int uart_index, bool uart_taken) { + int periph_index, bool uart_taken) { if (pin_eval) { //assign a root pointer pointer for IRQ - MP_STATE_PORT(cpy_uart_obj_all)[uart_index] = self; - return mcu_uart_banks[uart_index]; + MP_STATE_PORT(cpy_uart_obj_all)[periph_index] = self; + return mcu_uart_banks[periph_index]; } else { if (uart_taken) { mp_raise_ValueError(translate("Hardware in use, try alternative pins")); @@ -84,7 +83,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, uint8_t tx_len = MP_ARRAY_SIZE(mcu_uart_tx_list); uint8_t rx_len = MP_ARRAY_SIZE(mcu_uart_rx_list); bool uart_taken = false; - uint8_t uart_index = 0; //origin 0 corrected + uint8_t periph_index = 0; //origin 0 corrected if ((rts != NULL) || (cts != NULL) || (rs485_dir != NULL) || (rs485_invert == true)) { mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device")); @@ -98,9 +97,9 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, //rx for (uint j = 0; j < rx_len; j++) { if (mcu_uart_rx_list[j].pin == rx - && mcu_uart_rx_list[j].uart_index == mcu_uart_tx_list[i].uart_index) { + && mcu_uart_rx_list[j].periph_index == mcu_uart_tx_list[i].periph_index) { //keep looking if the UART is taken, edge case - if (reserved_uart[mcu_uart_tx_list[i].uart_index - 1]) { + if (reserved_uart[mcu_uart_tx_list[i].periph_index - 1]) { uart_taken = true; continue; } @@ -112,15 +111,15 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, } } } - uart_index = self->tx->uart_index - 1; + periph_index = self->tx->periph_index - 1; USARTx = assign_uart_or_throw(self, (self->tx != NULL && self->rx != NULL), - uart_index, uart_taken); + periph_index, uart_taken); } else if (tx == NULL) { //If there is no tx, run only rx for (uint i = 0; i < rx_len; i++) { if (mcu_uart_rx_list[i].pin == rx) { //keep looking if the UART is taken, edge case - if (reserved_uart[mcu_uart_rx_list[i].uart_index - 1]) { + if (reserved_uart[mcu_uart_rx_list[i].periph_index - 1]) { uart_taken = true; continue; } @@ -129,15 +128,15 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, break; } } - uart_index = self->rx->uart_index - 1; + periph_index = self->rx->periph_index - 1; USARTx = assign_uart_or_throw(self, (self->rx != NULL), - uart_index, uart_taken); + periph_index, uart_taken); } else if (rx == NULL) { //If there is no rx, run only tx for (uint i = 0; i < tx_len; i++) { if (mcu_uart_tx_list[i].pin == tx) { //keep looking if the UART is taken, edge case - if (reserved_uart[mcu_uart_tx_list[i].uart_index - 1]) { + if (reserved_uart[mcu_uart_tx_list[i].periph_index - 1]) { uart_taken = true; continue; } @@ -146,9 +145,9 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, break; } } - uart_index = self->tx->uart_index - 1; + periph_index = self->tx->periph_index - 1; USARTx = assign_uart_or_throw(self, (self->tx != NULL), - uart_index, uart_taken); + periph_index, uart_taken); } else { //both pins cannot be empty mp_raise_ValueError(translate("Supply at least one UART pin")); @@ -185,8 +184,8 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, } //reserve uart and enable the peripheral - reserved_uart[uart_index] = true; - uart_clock_enable(1 << (uart_index)); + reserved_uart[periph_index] = true; + uart_clock_enable(1 << (periph_index)); uart_assign_irq(self, USARTx); self->handle.Instance = USARTx; diff --git a/ports/stm/common-hal/busio/UART.h b/ports/stm/common-hal/busio/UART.h index cde5fadd0..5ac1d352c 100644 --- a/ports/stm/common-hal/busio/UART.h +++ b/ports/stm/common-hal/busio/UART.h @@ -24,12 +24,11 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_UART_H -#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_UART_H +#ifndef MICROPY_INCLUDED_STM32_COMMON_HAL_BUSIO_UART_H +#define MICROPY_INCLUDED_STM32_COMMON_HAL_BUSIO_UART_H #include "common-hal/microcontroller/Pin.h" -#include "stm32f4/periph.h" -#include "stm32f4xx_hal.h" +#include "peripherals/periph.h" #include "py/obj.h" #include "py/ringbuf.h" @@ -45,8 +44,8 @@ typedef struct { mp_obj_base_t base; UART_HandleTypeDef handle; IRQn_Type irq; - const mcu_uart_tx_obj_t *tx; - const mcu_uart_rx_obj_t *rx; + const mcu_periph_obj_t *tx; + const mcu_periph_obj_t *rx; ringbuf_t rbuf; uint8_t rx_char; diff --git a/ports/stm/common-hal/digitalio/DigitalInOut.c b/ports/stm/common-hal/digitalio/DigitalInOut.c index be2db4dac..40e13ca3b 100644 --- a/ports/stm/common-hal/digitalio/DigitalInOut.c +++ b/ports/stm/common-hal/digitalio/DigitalInOut.c @@ -29,8 +29,12 @@ #include "py/runtime.h" #include "supervisor/shared/translate.h" -#include "stm32f4xx_hal.h" +//TODO: rework this module to use HAL only +#ifdef STM32H743xx +#include "stm32h7xx_ll_gpio.h" +#else #include "stm32f4xx_ll_gpio.h" +#endif void common_hal_digitalio_digitalinout_never_reset( digitalio_digitalinout_obj_t *self) { diff --git a/ports/stm/common-hal/digitalio/DigitalInOut.h b/ports/stm/common-hal/digitalio/DigitalInOut.h index 76aa2c855..e810ca3c1 100644 --- a/ports/stm/common-hal/digitalio/DigitalInOut.h +++ b/ports/stm/common-hal/digitalio/DigitalInOut.h @@ -25,8 +25,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_DIGITALIO_DIGITALINOUT_H -#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_DIGITALIO_DIGITALINOUT_H +#ifndef MICROPY_INCLUDED_STM32_COMMON_HAL_DIGITALIO_DIGITALINOUT_H +#define MICROPY_INCLUDED_STM32_COMMON_HAL_DIGITALIO_DIGITALINOUT_H #include "common-hal/microcontroller/Pin.h" @@ -35,4 +35,4 @@ typedef struct { const mcu_pin_obj_t *pin; } digitalio_digitalinout_obj_t; -#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_DIGITALIO_DIGITALINOUT_H +#endif // MICROPY_INCLUDED_STM32_COMMON_HAL_DIGITALIO_DIGITALINOUT_H diff --git a/ports/stm/common-hal/microcontroller/Pin.c b/ports/stm/common-hal/microcontroller/Pin.c index 1d4d45b97..2c513f4aa 100644 --- a/ports/stm/common-hal/microcontroller/Pin.c +++ b/ports/stm/common-hal/microcontroller/Pin.c @@ -30,23 +30,22 @@ #include "supervisor/shared/rgb_led_status.h" #include "py/mphal.h" -#include "stm32f4/pins.h" -#include "stm32f4xx_hal.h" +#include "pins.h" #ifdef MICROPY_HW_NEOPIXEL bool neopixel_in_use; #endif -#if MCU_PACKAGE == 144 +#if defined(LQFP144) #define GPIO_PORT_COUNT 7 GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG}; -#elif MCU_PACKAGE == 100 +#elif defined(LQFP100_f4) || (LQFP100_x7) #define GPIO_PORT_COUNT 5 GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE}; -#elif MCU_PACKAGE == 64 +#elif defined(LQFP64) #define GPIO_PORT_COUNT 3 GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC}; -#elif MCU_PACKAGE == 48 +#elif defined(UFQFPN48) #define GPIO_PORT_COUNT 3 GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC}; #endif diff --git a/ports/stm/common-hal/microcontroller/Pin.h b/ports/stm/common-hal/microcontroller/Pin.h index c4c9be6a8..d69ddfb1d 100644 --- a/ports/stm/common-hal/microcontroller/Pin.h +++ b/ports/stm/common-hal/microcontroller/Pin.h @@ -24,12 +24,12 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM34F4_COMMON_HAL_MICROCONTROLLER_PIN_H -#define MICROPY_INCLUDED_STM34F4_COMMON_HAL_MICROCONTROLLER_PIN_H +#ifndef MICROPY_INCLUDED_STM32_COMMON_HAL_MICROCONTROLLER_PIN_H +#define MICROPY_INCLUDED_STM32_COMMON_HAL_MICROCONTROLLER_PIN_H #include "py/mphal.h" -#include "peripherals/stm32f4/pins.h" +#include "peripherals/pins.h" #ifdef MICROPY_HW_NEOPIXEL extern bool neopixel_in_use; @@ -49,4 +49,4 @@ void never_reset_pin_number(uint8_t pin_port, uint8_t pin_number); GPIO_TypeDef * pin_port(uint8_t pin_port); uint16_t pin_mask(uint8_t pin_number); -#endif // MICROPY_INCLUDED_STM34F4_COMMON_HAL_MICROCONTROLLER_PIN_H +#endif // MICROPY_INCLUDED_STM32_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/stm/common-hal/microcontroller/Processor.c b/ports/stm/common-hal/microcontroller/Processor.c index 324659cef..c8b07db3f 100644 --- a/ports/stm/common-hal/microcontroller/Processor.c +++ b/ports/stm/common-hal/microcontroller/Processor.c @@ -29,7 +29,7 @@ #include "py/runtime.h" #include "supervisor/shared/translate.h" -#include "stm32f4xx_hal.h" +#if defined(STM32F4) #define STM32_UUID ((uint32_t *)0x1FFF7A10) @@ -58,7 +58,10 @@ STATIC void set_adc_params(ADC_HandleTypeDef *AdcHandle) { AdcHandle->Init.EOCSelection = ADC_EOC_SINGLE_CONV; } +#endif + float common_hal_mcu_processor_get_temperature(void) { + #if defined(STM32F4) __HAL_RCC_ADC1_CLK_ENABLE(); //HAL Implementation @@ -85,9 +88,13 @@ float common_hal_mcu_processor_get_temperature(void) { //There's no F4 specific appnote for this but it works the same as the L1 in AN3964 float core_temp_avg_slope = (*ADC_CAL2 - *ADC_CAL1) / 80.0; return (((float)value * adc_refcor - *ADC_CAL1) / core_temp_avg_slope) + 30.0f; + #else + return false; + #endif } float common_hal_mcu_processor_get_voltage(void) { + #if defined(STM32F4) __HAL_RCC_ADC1_CLK_ENABLE(); //HAL Implementation @@ -114,6 +121,9 @@ float common_hal_mcu_processor_get_voltage(void) { adc_refcor = ((float)(*VREFIN_CAL)) / ((float)value); return adc_refcor * 3.3f; + #else + return false; + #endif } uint32_t common_hal_mcu_processor_get_frequency(void) { @@ -121,7 +131,9 @@ uint32_t common_hal_mcu_processor_get_frequency(void) { } void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { + #if defined(STM32F4) for (int i=0; i<3; i++) { ((uint32_t*) raw_id)[i] = STM32_UUID[i]; } + #endif } diff --git a/ports/stm/common-hal/microcontroller/Processor.h b/ports/stm/common-hal/microcontroller/Processor.h index 311333e7d..1d22aa965 100644 --- a/ports/stm/common-hal/microcontroller/Processor.h +++ b/ports/stm/common-hal/microcontroller/Processor.h @@ -24,8 +24,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H -#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H +#ifndef MICROPY_INCLUDED_STM32_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H +#define MICROPY_INCLUDED_STM32_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H #define COMMON_HAL_MCU_PROCESSOR_UID_LENGTH 12 @@ -36,4 +36,4 @@ typedef struct { // Stores no state currently. } mcu_processor_obj_t; -#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H +#endif // MICROPY_INCLUDED_STM32_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H diff --git a/ports/stm/common-hal/microcontroller/__init__.c b/ports/stm/common-hal/microcontroller/__init__.c index 0c680eb05..6f16c3ef2 100644 --- a/ports/stm/common-hal/microcontroller/__init__.c +++ b/ports/stm/common-hal/microcontroller/__init__.c @@ -39,8 +39,6 @@ #include "supervisor/filesystem.h" #include "supervisor/shared/safe_mode.h" -#include "stm32f4xx_hal.h" - //tested divisor value for busy loop in us delay #define LOOP_TICKS 12 @@ -108,137 +106,3 @@ const mcu_processor_obj_t common_hal_mcu_processor_obj = { .type = &mcu_processor_type, }, }; - -STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { -#if MCU_PACKAGE >= 100 - { MP_ROM_QSTR(MP_QSTR_PE02), MP_ROM_PTR(&pin_PE02) }, - { MP_ROM_QSTR(MP_QSTR_PE03), MP_ROM_PTR(&pin_PE03) }, - { MP_ROM_QSTR(MP_QSTR_PE04), MP_ROM_PTR(&pin_PE04) }, - { MP_ROM_QSTR(MP_QSTR_PE05), MP_ROM_PTR(&pin_PE05) }, - { MP_ROM_QSTR(MP_QSTR_PE06), MP_ROM_PTR(&pin_PE06) }, -#endif - { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, -#if MCU_PACKAGE == 144 - { MP_ROM_QSTR(MP_QSTR_PF00), MP_ROM_PTR(&pin_PF00) }, - { MP_ROM_QSTR(MP_QSTR_PF01), MP_ROM_PTR(&pin_PF01) }, - { MP_ROM_QSTR(MP_QSTR_PF02), MP_ROM_PTR(&pin_PF02) }, - { MP_ROM_QSTR(MP_QSTR_PF03), MP_ROM_PTR(&pin_PF03) }, - { MP_ROM_QSTR(MP_QSTR_PF04), MP_ROM_PTR(&pin_PF04) }, - { MP_ROM_QSTR(MP_QSTR_PF05), MP_ROM_PTR(&pin_PF05) }, - { MP_ROM_QSTR(MP_QSTR_PF06), MP_ROM_PTR(&pin_PF06) }, - { MP_ROM_QSTR(MP_QSTR_PF07), MP_ROM_PTR(&pin_PF07) }, - { MP_ROM_QSTR(MP_QSTR_PF08), MP_ROM_PTR(&pin_PF08) }, - { MP_ROM_QSTR(MP_QSTR_PF09), MP_ROM_PTR(&pin_PF09) }, - { MP_ROM_QSTR(MP_QSTR_PF10), MP_ROM_PTR(&pin_PF10) }, -#endif - { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) }, - { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, - { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, - { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, - { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_PA00) }, - { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, - { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, - { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, - { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, - { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, - { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, - { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, - { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, -#if MCU_PACKAGE == 144 - { MP_ROM_QSTR(MP_QSTR_PF11), MP_ROM_PTR(&pin_PF11) }, - { MP_ROM_QSTR(MP_QSTR_PF12), MP_ROM_PTR(&pin_PF12) }, - { MP_ROM_QSTR(MP_QSTR_PF13), MP_ROM_PTR(&pin_PF13) }, - { MP_ROM_QSTR(MP_QSTR_PF14), MP_ROM_PTR(&pin_PF14) }, - { MP_ROM_QSTR(MP_QSTR_PF15), MP_ROM_PTR(&pin_PF15) }, - { MP_ROM_QSTR(MP_QSTR_PG00), MP_ROM_PTR(&pin_PG00) }, - { MP_ROM_QSTR(MP_QSTR_PG01), MP_ROM_PTR(&pin_PG01) }, -#endif -#if MCU_PACKAGE >= 100 - { MP_ROM_QSTR(MP_QSTR_PE07), MP_ROM_PTR(&pin_PE07) }, - { MP_ROM_QSTR(MP_QSTR_PE08), MP_ROM_PTR(&pin_PE08) }, - { MP_ROM_QSTR(MP_QSTR_PE09), MP_ROM_PTR(&pin_PE09) }, - { MP_ROM_QSTR(MP_QSTR_PE10), MP_ROM_PTR(&pin_PE10) }, - { MP_ROM_QSTR(MP_QSTR_PE11), MP_ROM_PTR(&pin_PE11) }, - { MP_ROM_QSTR(MP_QSTR_PE12), MP_ROM_PTR(&pin_PE12) }, - { MP_ROM_QSTR(MP_QSTR_PE13), MP_ROM_PTR(&pin_PE13) }, - { MP_ROM_QSTR(MP_QSTR_PE14), MP_ROM_PTR(&pin_PE14) }, - { MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) }, -#endif - { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, -#if MCU_PACKAGE == 144 || defined STM32F405xx - { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, -#endif - { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, - { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, - { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, - { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, -#if MCU_PACKAGE >= 100 - { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, - { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, - { MP_ROM_QSTR(MP_QSTR_PD10), MP_ROM_PTR(&pin_PD10) }, - { MP_ROM_QSTR(MP_QSTR_PD11), MP_ROM_PTR(&pin_PD11) }, - { MP_ROM_QSTR(MP_QSTR_PD12), MP_ROM_PTR(&pin_PD12) }, - { MP_ROM_QSTR(MP_QSTR_PD13), MP_ROM_PTR(&pin_PD13) }, - { MP_ROM_QSTR(MP_QSTR_PD14), MP_ROM_PTR(&pin_PD14) }, - { MP_ROM_QSTR(MP_QSTR_PD15), MP_ROM_PTR(&pin_PD15) }, -#endif -#if MCU_PACKAGE == 144 - { MP_ROM_QSTR(MP_QSTR_PG02), MP_ROM_PTR(&pin_PG02) }, - { MP_ROM_QSTR(MP_QSTR_PG03), MP_ROM_PTR(&pin_PG03) }, - { MP_ROM_QSTR(MP_QSTR_PG04), MP_ROM_PTR(&pin_PG04) }, - { MP_ROM_QSTR(MP_QSTR_PG05), MP_ROM_PTR(&pin_PG05) }, - { MP_ROM_QSTR(MP_QSTR_PG06), MP_ROM_PTR(&pin_PG06) }, - { MP_ROM_QSTR(MP_QSTR_PG07), MP_ROM_PTR(&pin_PG07) }, - { MP_ROM_QSTR(MP_QSTR_PG08), MP_ROM_PTR(&pin_PG08) }, -#endif - { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, - { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, - { MP_ROM_QSTR(MP_QSTR_PC08), MP_ROM_PTR(&pin_PC08) }, - { MP_ROM_QSTR(MP_QSTR_PC09), MP_ROM_PTR(&pin_PC09) }, - { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, - { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, - { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11) }, - { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12) }, - { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, - { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, - { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, - { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, - { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) }, - { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) }, -#if MCU_PACKAGE >= 100 - { MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_PD00) }, - { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) }, - { MP_ROM_QSTR(MP_QSTR_PD02), MP_ROM_PTR(&pin_PD02) }, - { MP_ROM_QSTR(MP_QSTR_PD03), MP_ROM_PTR(&pin_PD03) }, - { MP_ROM_QSTR(MP_QSTR_PD04), MP_ROM_PTR(&pin_PD04) }, - { MP_ROM_QSTR(MP_QSTR_PD05), MP_ROM_PTR(&pin_PD05) }, - { MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_PD06) }, - { MP_ROM_QSTR(MP_QSTR_PD07), MP_ROM_PTR(&pin_PD07) }, -#endif -#if MCU_PACKAGE == 144 - { MP_ROM_QSTR(MP_QSTR_PG09), MP_ROM_PTR(&pin_PG09) }, - { MP_ROM_QSTR(MP_QSTR_PG10), MP_ROM_PTR(&pin_PG10) }, - { MP_ROM_QSTR(MP_QSTR_PG11), MP_ROM_PTR(&pin_PG11) }, - { MP_ROM_QSTR(MP_QSTR_PG12), MP_ROM_PTR(&pin_PG12) }, - { MP_ROM_QSTR(MP_QSTR_PG13), MP_ROM_PTR(&pin_PG13) }, - { MP_ROM_QSTR(MP_QSTR_PG14), MP_ROM_PTR(&pin_PG14) }, - { MP_ROM_QSTR(MP_QSTR_PG15), MP_ROM_PTR(&pin_PG15) }, -#endif - { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, - { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, - { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, - { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, - { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, - { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, - { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, -#if MCU_PACKAGE >= 100 - { MP_ROM_QSTR(MP_QSTR_PE00), MP_ROM_PTR(&pin_PE00) }, - { MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_PE01) }, -#endif -}; -MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/stm/common-hal/os/__init__.c b/ports/stm/common-hal/os/__init__.c index 0b3153286..1a1efef9f 100644 --- a/ports/stm/common-hal/os/__init__.c +++ b/ports/stm/common-hal/os/__init__.c @@ -33,7 +33,7 @@ #include "py/mperrno.h" #include "py/runtime.h" #include "stm32f4xx_hal.h" -#include "stm32f4/periph.h" +#include "peripherals/periph.h" STATIC const qstr os_uname_info_fields[] = { MP_QSTR_sysname, MP_QSTR_nodename, diff --git a/ports/stm/common-hal/pulseio/PWMOut.h b/ports/stm/common-hal/pulseio/PWMOut.h index 59fc04e5f..8519735c6 100644 --- a/ports/stm/common-hal/pulseio/PWMOut.h +++ b/ports/stm/common-hal/pulseio/PWMOut.h @@ -30,7 +30,7 @@ #include "common-hal/microcontroller/Pin.h" #include "stm32f4xx_hal.h" -#include "stm32f4/periph.h" +#include "peripherals/periph.h" #include "py/obj.h" diff --git a/ports/stm/common-hal/supervisor/Runtime.h b/ports/stm/common-hal/supervisor/Runtime.h index 9a798e056..a357eb0c7 100755 --- a/ports/stm/common-hal/supervisor/Runtime.h +++ b/ports/stm/common-hal/supervisor/Runtime.h @@ -24,8 +24,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_SUPERVISOR_RUNTIME_H -#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_SUPERVISOR_RUNTIME_H +#ifndef MICROPY_INCLUDED_STM32_COMMON_HAL_SUPERVISOR_RUNTIME_H +#define MICROPY_INCLUDED_STM32_COMMON_HAL_SUPERVISOR_RUNTIME_H #include "py/obj.h" @@ -34,4 +34,4 @@ typedef struct { // Stores no state currently. } super_runtime_obj_t; -#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_SUPERVISOR_RUNTIME_H +#endif // MICROPY_INCLUDED_STM32_COMMON_HAL_SUPERVISOR_RUNTIME_H diff --git a/ports/stm/mpconfigport.h b/ports/stm/mpconfigport.h index 283984ea9..297c7338e 100644 --- a/ports/stm/mpconfigport.h +++ b/ports/stm/mpconfigport.h @@ -25,8 +25,8 @@ * THE SOFTWARE. */ -#ifndef STM32F4_MPCONFIGPORT_H__ -#define STM32F4_MPCONFIGPORT_H__ +#ifndef STM32_MPCONFIGPORT_H__ +#define STM32_MPCONFIGPORT_H__ #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) #define MICROPY_PY_FUNCTION_ATTRS (1) @@ -39,7 +39,10 @@ #include "py/circuitpy_mpconfig.h" -//Board flags: +// The STM32 HAL file is included virtually everywhere: +#include STM32_HAL_H + +// Board flags: #ifndef BOARD_OVERWRITE_SWD #define BOARD_OVERWRITE_SWD (0) #endif diff --git a/ports/stm/mpconfigport.mk b/ports/stm/mpconfigport.mk index 493f32c63..75cde0e38 100644 --- a/ports/stm/mpconfigport.mk +++ b/ports/stm/mpconfigport.mk @@ -12,7 +12,7 @@ USB_SERIAL_NUMBER_LENGTH = 24 # Longints can be implemented as mpz, as longlong, or not LONGINT_IMPL = MPZ -#Reduced feature set for early port +# Reduced feature set for early port CIRCUITPY_MINIMAL_BUILD = 1 # The ifndef's allow overriding in mpconfigboard.mk. @@ -73,5 +73,18 @@ CFLAGS += -DMICROPY_CPYTHON_COMPAT=1 MICROPY_PY_ULAB = 1 -#ifeq ($(MCU_SUB_VARIANT), stm32f412zx) -#endif +ifeq ($(MCU_SERIES), H7) + CIRCUITPY_BOARD = 1 + CIRCUITPY_DIGITALIO = 1 + CIRCUITPY_ANALOGIO = 0 + CIRCUITPY_MICROCONTROLLER = 1 + CIRCUITPY_BUSIO = 0 + CIRCUITPY_PULSEIO = 0 + CIRCUITPY_OS = 0 + CIRCUITPY_STORAGE = 0 + CIRCUITPY_RANDOM = 0 + CIRCUITPY_USB_HID = 0 + CIRCUITPY_USB_MIDI = 0 + CIRCUITPY_NEOPIXEL_WRITE = 0 + CIRCUITPY_DISPLAYIO = 0 +endif diff --git a/ports/stm/mphalport.c b/ports/stm/mphalport.c index a3cf501c0..3ee56e22a 100644 --- a/ports/stm/mphalport.c +++ b/ports/stm/mphalport.c @@ -33,7 +33,6 @@ #include "shared-bindings/microcontroller/__init__.h" #include "supervisor/shared/tick.h" -#include "stm32f4xx_hal.h" void mp_hal_delay_ms(mp_uint_t delay) { uint64_t start_tick = supervisor_ticks_ms64(); diff --git a/ports/stm/mphalport.h b/ports/stm/mphalport.h index b392cb0f8..69f2c489c 100644 --- a/ports/stm/mphalport.h +++ b/ports/stm/mphalport.h @@ -24,8 +24,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_MPHALPORT_H -#define MICROPY_INCLUDED_STM32F4_MPHALPORT_H +#ifndef MICROPY_INCLUDED_STM32_MPHALPORT_H +#define MICROPY_INCLUDED_STM32_MPHALPORT_H #include "py/obj.h" @@ -48,4 +48,4 @@ void mp_hal_set_interrupt_char(int c); void mp_hal_disable_all_interrupts(void); void mp_hal_enable_all_interrupts(void); -#endif // MICROPY_INCLUDED_STM32F4_MPHALPORT_H +#endif // MICROPY_INCLUDED_STM32_MPHALPORT_H diff --git a/ports/stm/packages/LQFP100_f4.c b/ports/stm/packages/LQFP100_f4.c new file mode 100644 index 000000000..a2219ccc0 --- /dev/null +++ b/ports/stm/packages/LQFP100_f4.c @@ -0,0 +1,117 @@ +#include "shared-bindings/microcontroller/__init__.h" +#include "common-hal/microcontroller/Pin.h" +#include "py/obj.h" + +STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { +// Pins 1-25 + { MP_ROM_QSTR(MP_QSTR_PE02), MP_ROM_PTR(&pin_PE02) }, + { MP_ROM_QSTR(MP_QSTR_PE03), MP_ROM_PTR(&pin_PE03) }, + { MP_ROM_QSTR(MP_QSTR_PE04), MP_ROM_PTR(&pin_PE04) }, + { MP_ROM_QSTR(MP_QSTR_PE05), MP_ROM_PTR(&pin_PE05) }, + { MP_ROM_QSTR(MP_QSTR_PE06), MP_ROM_PTR(&pin_PE06) }, + /* VBAT -------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, + // PC14 OSC32_IN ----------------------------------*/ + // PC15 OSC32_OUT ---------------------------------*/ + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + // PH0 OSC_IN -------------------------------------*/ + // PH1 OSC_OUT ------------------------------------*/ + // NRST -------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, + // VDD --------------------------------------------*/ + // VSSA -------------------------------------------*/ + // VREF+ ------------------------------------------*/ + // VDDA -------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, + +// Pins 26-50 + { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_PE07), MP_ROM_PTR(&pin_PE07) }, + { MP_ROM_QSTR(MP_QSTR_PE08), MP_ROM_PTR(&pin_PE08) }, + { MP_ROM_QSTR(MP_QSTR_PE09), MP_ROM_PTR(&pin_PE09) }, + { MP_ROM_QSTR(MP_QSTR_PE10), MP_ROM_PTR(&pin_PE10) }, + { MP_ROM_QSTR(MP_QSTR_PE11), MP_ROM_PTR(&pin_PE11) }, + { MP_ROM_QSTR(MP_QSTR_PE12), MP_ROM_PTR(&pin_PE12) }, + { MP_ROM_QSTR(MP_QSTR_PE13), MP_ROM_PTR(&pin_PE13) }, + { MP_ROM_QSTR(MP_QSTR_PE14), MP_ROM_PTR(&pin_PE14) }, + { MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) }, + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, +#if MCU_LINE == FOUNDATION || MCU_LINE == ADVANCED + { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, +#endif //or VCAP1 -----------------------------------*/ + // VCAP1 or VSS -----------------------------------*/ + // VDD --------------------------------------------*/ + +// Pins 51-75 + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, + { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, + { MP_ROM_QSTR(MP_QSTR_PD10), MP_ROM_PTR(&pin_PD10) }, + { MP_ROM_QSTR(MP_QSTR_PD11), MP_ROM_PTR(&pin_PD11) }, + { MP_ROM_QSTR(MP_QSTR_PD12), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_PD13), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_PD14), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_PD15), MP_ROM_PTR(&pin_PD15) }, + { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_PC08), MP_ROM_PTR(&pin_PC08) }, + { MP_ROM_QSTR(MP_QSTR_PC09), MP_ROM_PTR(&pin_PC09) }, + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + // VCAP2 ------------------------------------------*/ + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + +// Pins 76-100 + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, + { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_PD00) }, + { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) }, + { MP_ROM_QSTR(MP_QSTR_PD02), MP_ROM_PTR(&pin_PD02) }, + { MP_ROM_QSTR(MP_QSTR_PD03), MP_ROM_PTR(&pin_PD03) }, + { MP_ROM_QSTR(MP_QSTR_PD04), MP_ROM_PTR(&pin_PD04) }, + { MP_ROM_QSTR(MP_QSTR_PD05), MP_ROM_PTR(&pin_PD05) }, + { MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_PD06) }, + { MP_ROM_QSTR(MP_QSTR_PD07), MP_ROM_PTR(&pin_PD07) }, + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + // BOOT0 ------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_PE00), MP_ROM_PTR(&pin_PE00) }, + { MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_PE01) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);
\ No newline at end of file diff --git a/ports/stm/packages/stm32f4/LQFP100.h b/ports/stm/packages/LQFP100_x7.c index 3c0e244f9..23d89a826 100644 --- a/ports/stm/packages/stm32f4/LQFP100.h +++ b/ports/stm/packages/LQFP100_x7.c @@ -1,3 +1,7 @@ +#include "shared-bindings/microcontroller/__init__.h" +#include "common-hal/microcontroller/Pin.h" +#include "py/obj.h" + STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { // Pins 1-25 { MP_ROM_QSTR(MP_QSTR_PE02), MP_ROM_PTR(&pin_PE02) }, @@ -25,11 +29,11 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, - { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, // Pins 26-50 // VSS --------------------------------------------*/ // VDD --------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, @@ -48,11 +52,12 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_PE14), MP_ROM_PTR(&pin_PE14) }, { MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) }, { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, -#if MCU_LINE == FOUNDATION || MCU_LINE == ADVANCED { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, -#endif - + // VCAP1 ------------------------------------------*/ + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ +// Pins 51-75 { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, @@ -75,6 +80,11 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11) }, { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12) }, { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + // VCAP2 ------------------------------------------*/ + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + +// Pins 76-100 { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, @@ -93,9 +103,13 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + // BOOT0 ------------------------------------------*/ { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, { MP_ROM_QSTR(MP_QSTR_PE00), MP_ROM_PTR(&pin_PE00) }, { MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_PE01) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + }; MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);
\ No newline at end of file diff --git a/ports/stm/packages/LQFP144.c b/ports/stm/packages/LQFP144.c new file mode 100644 index 000000000..36683bb64 --- /dev/null +++ b/ports/stm/packages/LQFP144.c @@ -0,0 +1,159 @@ +#include "shared-bindings/microcontroller/__init__.h" +#include "common-hal/microcontroller/Pin.h" +#include "py/obj.h" + +STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { +// Pins 1-36 + { MP_ROM_QSTR(MP_QSTR_PE02), MP_ROM_PTR(&pin_PE02) }, + { MP_ROM_QSTR(MP_QSTR_PE03), MP_ROM_PTR(&pin_PE03) }, + { MP_ROM_QSTR(MP_QSTR_PE04), MP_ROM_PTR(&pin_PE04) }, + { MP_ROM_QSTR(MP_QSTR_PE05), MP_ROM_PTR(&pin_PE05) }, + { MP_ROM_QSTR(MP_QSTR_PE06), MP_ROM_PTR(&pin_PE06) }, + /* VBAT -------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, + // PC14 OSC32_IN ----------------------------------*/ + // PC15 OSC32_OUT ---------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PF00), MP_ROM_PTR(&pin_PF00) }, + { MP_ROM_QSTR(MP_QSTR_PF01), MP_ROM_PTR(&pin_PF01) }, + { MP_ROM_QSTR(MP_QSTR_PF02), MP_ROM_PTR(&pin_PF02) }, + { MP_ROM_QSTR(MP_QSTR_PF03), MP_ROM_PTR(&pin_PF03) }, + { MP_ROM_QSTR(MP_QSTR_PF04), MP_ROM_PTR(&pin_PF04) }, + { MP_ROM_QSTR(MP_QSTR_PF05), MP_ROM_PTR(&pin_PF05) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PF06), MP_ROM_PTR(&pin_PF06) }, + { MP_ROM_QSTR(MP_QSTR_PF07), MP_ROM_PTR(&pin_PF07) }, + { MP_ROM_QSTR(MP_QSTR_PF08), MP_ROM_PTR(&pin_PF08) }, + { MP_ROM_QSTR(MP_QSTR_PF09), MP_ROM_PTR(&pin_PF09) }, + { MP_ROM_QSTR(MP_QSTR_PF10), MP_ROM_PTR(&pin_PF10) }, + // PH0 OSC_IN -------------------------------------*/ + // PH1 OSC_OUT ------------------------------------*/ + // NRST -------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, + // VDD --------------------------------------------*/ + // VSSA -------------------------------------------*/ + // VREF+ ------------------------------------------*/ + // VDDA -------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, + +// Pins 37-72 + { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_PF11), MP_ROM_PTR(&pin_PF11) }, + { MP_ROM_QSTR(MP_QSTR_PF12), MP_ROM_PTR(&pin_PF12) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PF13), MP_ROM_PTR(&pin_PF13) }, + { MP_ROM_QSTR(MP_QSTR_PF14), MP_ROM_PTR(&pin_PF14) }, + { MP_ROM_QSTR(MP_QSTR_PF15), MP_ROM_PTR(&pin_PF15) }, + { MP_ROM_QSTR(MP_QSTR_PG00), MP_ROM_PTR(&pin_PG00) }, + { MP_ROM_QSTR(MP_QSTR_PG01), MP_ROM_PTR(&pin_PG01) }, + { MP_ROM_QSTR(MP_QSTR_PE07), MP_ROM_PTR(&pin_PE07) }, + { MP_ROM_QSTR(MP_QSTR_PE08), MP_ROM_PTR(&pin_PE08) }, + { MP_ROM_QSTR(MP_QSTR_PE09), MP_ROM_PTR(&pin_PE09) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PE10), MP_ROM_PTR(&pin_PE10) }, + { MP_ROM_QSTR(MP_QSTR_PE11), MP_ROM_PTR(&pin_PE11) }, + { MP_ROM_QSTR(MP_QSTR_PE12), MP_ROM_PTR(&pin_PE12) }, + { MP_ROM_QSTR(MP_QSTR_PE13), MP_ROM_PTR(&pin_PE13) }, + { MP_ROM_QSTR(MP_QSTR_PE14), MP_ROM_PTR(&pin_PE14) }, + { MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) }, + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, + // VCAP1 ------------------------------------------*/ + // VDD --------------------------------------------*/ + +// Pins 73-108 + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, + { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, + { MP_ROM_QSTR(MP_QSTR_PD10), MP_ROM_PTR(&pin_PD10) }, + { MP_ROM_QSTR(MP_QSTR_PD11), MP_ROM_PTR(&pin_PD11) }, + { MP_ROM_QSTR(MP_QSTR_PD12), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_PD13), MP_ROM_PTR(&pin_PD13) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PD14), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_PD15), MP_ROM_PTR(&pin_PD15) }, + { MP_ROM_QSTR(MP_QSTR_PG02), MP_ROM_PTR(&pin_PG02) }, + { MP_ROM_QSTR(MP_QSTR_PG03), MP_ROM_PTR(&pin_PG03) }, + { MP_ROM_QSTR(MP_QSTR_PG04), MP_ROM_PTR(&pin_PG04) }, + { MP_ROM_QSTR(MP_QSTR_PG05), MP_ROM_PTR(&pin_PG05) }, + { MP_ROM_QSTR(MP_QSTR_PG06), MP_ROM_PTR(&pin_PG06) }, + { MP_ROM_QSTR(MP_QSTR_PG07), MP_ROM_PTR(&pin_PG07) }, + { MP_ROM_QSTR(MP_QSTR_PG08), MP_ROM_PTR(&pin_PG08) }, + // VSS --------------------------------------------*/ + // VDD or VDD_USB (F412, F446) --------------------*/ + { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_PC08), MP_ROM_PTR(&pin_PC08) }, + { MP_ROM_QSTR(MP_QSTR_PC09), MP_ROM_PTR(&pin_PC09) }, + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + // VCAP2 ------------------------------------------*/ + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + +// Pins 109-144 + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, + { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_PD00) }, + { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) }, + { MP_ROM_QSTR(MP_QSTR_PD02), MP_ROM_PTR(&pin_PD02) }, + { MP_ROM_QSTR(MP_QSTR_PD03), MP_ROM_PTR(&pin_PD03) }, + { MP_ROM_QSTR(MP_QSTR_PD04), MP_ROM_PTR(&pin_PD04) }, + { MP_ROM_QSTR(MP_QSTR_PD05), MP_ROM_PTR(&pin_PD05) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_PD06) }, + { MP_ROM_QSTR(MP_QSTR_PD07), MP_ROM_PTR(&pin_PD07) }, + { MP_ROM_QSTR(MP_QSTR_PG09), MP_ROM_PTR(&pin_PG09) }, + { MP_ROM_QSTR(MP_QSTR_PG10), MP_ROM_PTR(&pin_PG10) }, + { MP_ROM_QSTR(MP_QSTR_PG11), MP_ROM_PTR(&pin_PG11) }, + { MP_ROM_QSTR(MP_QSTR_PG12), MP_ROM_PTR(&pin_PG12) }, + { MP_ROM_QSTR(MP_QSTR_PG13), MP_ROM_PTR(&pin_PG13) }, + { MP_ROM_QSTR(MP_QSTR_PG14), MP_ROM_PTR(&pin_PG14) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PG15), MP_ROM_PTR(&pin_PG15) }, + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + // BOOT0 ------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_PE00), MP_ROM_PTR(&pin_PE00) }, + { MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_PE01) }, + // PDR_ON -----------------------------------------*/ + // VDD --------------------------------------------*/ + +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);
\ No newline at end of file diff --git a/ports/stm/packages/LQFP64.c b/ports/stm/packages/LQFP64.c new file mode 100644 index 000000000..02dcfa00c --- /dev/null +++ b/ports/stm/packages/LQFP64.c @@ -0,0 +1,81 @@ +#include "shared-bindings/microcontroller/__init__.h" +#include "common-hal/microcontroller/Pin.h" +#include "py/obj.h" + +STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { +// Pins 1-16 + /* VBAT -------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, + // PC14 OSC32_IN ----------------------------------*/ + // PC15 OSC32_OUT ---------------------------------*/ + // PH0 OSC_IN -------------------------------------*/ + // PH1 OSC_OUT ------------------------------------*/ + // NRST -------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, + // VSSA -------------------------------------------*/ + // VDDA -------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, + +// Pins 17-32 + { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, +#if MCU_LINE == FOUNDATION || MCU_LINE == ADVANCED + { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, +#endif //or VCAP1 -----------------------------------*/ + // VCAP1 or VSS -----------------------------------*/ + // VDD --------------------------------------------*/ + +// Pins 33-48 + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_PC08), MP_ROM_PTR(&pin_PC08) }, + { MP_ROM_QSTR(MP_QSTR_PC09), MP_ROM_PTR(&pin_PC09) }, + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + // VSS or VCAP (F405) -----------------------------*/ + // VDD --------------------------------------------*/ + +// Pins 49-64 + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, + { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_PD02), MP_ROM_PTR(&pin_PD02) }, + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + // BOOT0 ------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/stm/packages/UFQFPN48.c b/ports/stm/packages/UFQFPN48.c new file mode 100644 index 000000000..ae4bcf6cd --- /dev/null +++ b/ports/stm/packages/UFQFPN48.c @@ -0,0 +1,63 @@ +#include "shared-bindings/microcontroller/__init__.h" +#include "common-hal/microcontroller/Pin.h" +#include "py/obj.h" + +STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { +// Pins 1-12 + /* VBAT -------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, + // PC14 OSC32_IN ----------------------------------*/ + // PC15 OSC32_OUT ---------------------------------*/ + // PH0 OSC_IN -------------------------------------*/ + // PH1 OSC_OUT ------------------------------------*/ + // NRST -------------------------------------------*/ + // VSSA -------------------------------------------*/ + // VDDA -------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, + +// Pins 13-24 + { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, + // VCAP1 ------------------------------------------*/ + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + +// Pins 25-36 + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + +// Pins 37-48 + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + // BOOT0 ------------------------------------------*/ + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, + // VSS --------------------------------------------*/ + // VDD --------------------------------------------*/ + +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);
\ No newline at end of file diff --git a/ports/stm/peripherals/stm32f4/clocks.h b/ports/stm/peripherals/clocks.h index c7ba84662..1f837c79e 100644 --- a/ports/stm/peripherals/stm32f4/clocks.h +++ b/ports/stm/peripherals/clocks.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,4 +24,4 @@ * THE SOFTWARE. */ -void stm32f4_peripherals_clocks_init(void); +void stm32_peripherals_clocks_init(void); diff --git a/ports/stm/peripherals/stm32f4/gpio.h b/ports/stm/peripherals/gpio.h index 34f89e792..a5dbe444c 100644 --- a/ports/stm/peripherals/stm32f4/gpio.h +++ b/ports/stm/peripherals/gpio.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,5 +24,4 @@ * THE SOFTWARE. */ -void stm32f4_peripherals_gpio_init(void); -void stm32f4_peripherals_status_led(uint8_t led, uint8_t state); +void stm32_peripherals_gpio_init(void); diff --git a/ports/stm/peripherals/periph.h b/ports/stm/peripherals/periph.h new file mode 100644 index 000000000..aaf41361e --- /dev/null +++ b/ports/stm/peripherals/periph.h @@ -0,0 +1,117 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef __MICROPY_INCLUDED_STM32_PERIPHERALS_PERIPH_H__ +#define __MICROPY_INCLUDED_STM32_PERIPHERALS_PERIPH_H__ + +#include <stdint.h> +#include <stdbool.h> + +#include STM32_HAL_H +#include "pins.h" + +// PERIPH + +typedef struct { + uint8_t periph_index:4; // Index of the I2C unit (1 to 3) + uint8_t altfn_index:4; //Index of the altfn for this pin (0 to 15) + const mcu_pin_obj_t * pin; +} mcu_periph_obj_t; + +#define PERIPH(index, alt, p_pin) \ +{ \ + .periph_index = index, \ + .altfn_index = alt, \ + .pin = p_pin, \ +} + +//Timers +typedef struct { + uint8_t tim_index:4; + uint8_t altfn_index:4; + uint8_t channel_index:4; + const mcu_pin_obj_t * pin; +} mcu_tim_pin_obj_t; + +#define TIM(index, alt, channel, tim_pin) \ +{ \ + .tim_index = index, \ + .altfn_index = alt, \ + .channel_index = channel, \ + .pin = tim_pin, \ +} + +// F4 Series +// Access Lines + +#ifdef STM32F401xE +#define HAS_DAC 0 +#define HAS_TRNG 0 +#define HAS_BASIC_TIM 0 +#include "stm32f4/stm32f401xe/periph.h" +#endif + +#ifdef STM32F411xE +#define HAS_DAC 0 +#define HAS_TRNG 0 +#define HAS_BASIC_TIM 0 +#include "stm32f4/stm32f411xe/periph.h" +#endif + +#ifdef STM32F412Zx +#define HAS_DAC 0 +#define HAS_TRNG 1 +#define HAS_BASIC_TIM 1 +#include "stm32f4/stm32f412zx/periph.h" +#endif + +// Foundation Lines + +#ifdef STM32F405xx +#define HAS_DAC 1 +#define HAS_TRNG 1 +#define HAS_BASIC_TIM 1 +#include "stm32f4/stm32f405xx/periph.h" +#endif + +#ifdef STM32F407xx +#define HAS_DAC 1 +#define HAS_TRNG 1 +#define HAS_BASIC_TIM 1 +#include "stm32f4/stm32f407xx/periph.h" +#endif + +// H7 Series +// Single Core + +#ifdef STM32H743xx +#define HAS_DAC 0 +#define HAS_TRNG 0 +#define HAS_BASIC_TIM 0 +#include "stm32h7/stm32h743xx/periph.h" +#endif + +#endif // __MICROPY_INCLUDED_STM32_PERIPHERALS_PERIPH_H__ diff --git a/ports/stm/peripherals/stm32f4/pins.h b/ports/stm/peripherals/pins.h index 44ef4c1ba..c6f1ec322 100644 --- a/ports/stm/peripherals/stm32f4/pins.h +++ b/ports/stm/peripherals/pins.h @@ -3,8 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2018 Dan Halbert for Adafruit Industries - * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -28,13 +27,13 @@ // DO NOT include this file directly. Use shared-bindings/microcontroller/Pin.h instead to ensure // that all necessary includes are already included. -#ifndef __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PINS_H__ -#define __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PINS_H__ +#ifndef __MICROPY_INCLUDED_STM32_PERIPHERALS_PINS_H__ +#define __MICROPY_INCLUDED_STM32_PERIPHERALS_PINS_H__ #include <stdint.h> #include <stdbool.h> -#include "stm32f4xx_hal.h" +#include STM32_HAL_H typedef struct { mp_obj_base_t base; @@ -76,21 +75,26 @@ extern const mp_obj_type_t mcu_pin_type; // Use illegal pin value to mark unassigned pins. #define NO_PIN 0xff -// Choose based on chip +// F4 Series #ifdef STM32F401xE -#include "stm32f401xe/pins.h" +#include "stm32f4/stm32f401xe/pins.h" #endif #ifdef STM32F411xE -#include "stm32f411xe/pins.h" +#include "stm32f4/stm32f411xe/pins.h" #endif #ifdef STM32F412Zx -#include "stm32f412zx/pins.h" +#include "stm32f4/stm32f412zx/pins.h" #endif #ifdef STM32F405xx -#include "stm32f405xx/pins.h" +#include "stm32f4/stm32f405xx/pins.h" #endif #ifdef STM32F407xx -#include "stm32f407xx/pins.h" +#include "stm32f4/stm32f407xx/pins.h" #endif -#endif // __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PINS_H__ +// H7 Series +#ifdef STM32H743xx +#include "stm32h7/stm32h743xx/pins.h" +#endif + +#endif // __MICROPY_INCLUDED_STM32_PERIPHERALS_PINS_H__ diff --git a/ports/stm/peripherals/stm32f4/periph.h b/ports/stm/peripherals/stm32f4/periph.h deleted file mode 100644 index d311afe4a..000000000 --- a/ports/stm/peripherals/stm32f4/periph.h +++ /dev/null @@ -1,180 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Lucian Copeland for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PERIPH_H__ -#define __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PERIPH_H__ - -#include <stdint.h> -#include <stdbool.h> - -#include "stm32f4xx_hal.h" -#include "stm32f4/pins.h" - -// I2C -// TODO: these objects should be condensed into a single 'periph_pin' unless we -// find a compelling reason to store more unique data in them. - -typedef struct { - uint8_t i2c_index:4; // Index of the I2C unit (1 to 3) - uint8_t altfn_index:4; //Index of the altfn for this pin (0 to 15) - const mcu_pin_obj_t * pin; -} mcu_i2c_sda_obj_t; - -typedef struct { - uint8_t i2c_index:4; - uint8_t altfn_index:4; - const mcu_pin_obj_t * pin; -} mcu_i2c_scl_obj_t; - - -#define I2C_SDA(index, alt, sda_pin) \ -{ \ - .i2c_index = index, \ - .altfn_index = alt, \ - .pin = sda_pin, \ -} - -#define I2C_SCL(index, alt, scl_pin) \ -{ \ - .i2c_index = index, \ - .altfn_index = alt, \ - .pin = scl_pin, \ -} - -// SPI -// TODO: these objects should be condensed into a single 'periph_pin' unless we -// find a compelling reason to store more unique data in them. - -typedef struct { - uint8_t spi_index:4; //Up to 6 SPI units - uint8_t altfn_index:4; //Up to 15 alt channels - const mcu_pin_obj_t * pin; -} mcu_spi_sck_obj_t; - -typedef struct { - uint8_t spi_index:4; - uint8_t altfn_index:4; - const mcu_pin_obj_t * pin; -} mcu_spi_mosi_obj_t; - -typedef struct { - uint8_t spi_index:4; - uint8_t altfn_index:4; - const mcu_pin_obj_t * pin; -} mcu_spi_miso_obj_t; - -typedef struct { - uint8_t spi_index:4; - uint8_t altfn_index:4; - const mcu_pin_obj_t * pin; -} mcu_spi_nss_obj_t; - -#define SPI(index, alt, spi_pin) \ -{ \ - .spi_index = index, \ - .altfn_index = alt, \ - .pin = spi_pin, \ -} - -// UART -// TODO: these objects should be condensed into a single 'periph_pin' unless we -// find a compelling reason to store more unique data in them. - -typedef struct { - uint8_t uart_index:4; - uint8_t altfn_index:4; - const mcu_pin_obj_t * pin; -} mcu_uart_tx_obj_t; - -typedef struct { - uint8_t uart_index:4; - uint8_t altfn_index:4; - const mcu_pin_obj_t * pin; -} mcu_uart_rx_obj_t; - -#define UART(index, alt, uart_pin) \ -{ \ - .uart_index = index, \ - .altfn_index = alt, \ - .pin = uart_pin, \ -} - -//Timers -typedef struct { - uint8_t tim_index:4; - uint8_t altfn_index:4; - uint8_t channel_index:4; - const mcu_pin_obj_t * pin; -} mcu_tim_pin_obj_t; - -#define TIM(index, alt, channel, tim_pin) \ -{ \ - .tim_index = index, \ - .altfn_index = alt, \ - .channel_index = channel, \ - .pin = tim_pin, \ -} - -//Access Lines - -#ifdef STM32F401xE -#define HAS_DAC 0 -#define HAS_TRNG 0 -#define HAS_BASIC_TIM 0 -#include "stm32f401xe/periph.h" -#endif - -#ifdef STM32F411xE -#define HAS_DAC 0 -#define HAS_TRNG 0 -#define HAS_BASIC_TIM 0 -#include "stm32f411xe/periph.h" -#endif - -#ifdef STM32F412Zx -#define HAS_DAC 0 -#define HAS_TRNG 1 -#define HAS_BASIC_TIM 1 -#include "stm32f412zx/periph.h" -#endif - -//Foundation Lines - -#ifdef STM32F405xx -#define HAS_DAC 1 -#define HAS_TRNG 1 -#define HAS_BASIC_TIM 1 -#include "stm32f405xx/periph.h" -#endif - -#ifdef STM32F407xx -#define HAS_DAC 1 -#define HAS_TRNG 1 -#define HAS_BASIC_TIM 1 -#include "stm32f407xx/periph.h" -#endif - -#endif // __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PERIPH_H__ diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/clocks.c b/ports/stm/peripherals/stm32f4/stm32f401xe/clocks.c index 53810af26..d048d60e8 100644 --- a/ports/stm/peripherals/stm32f4/stm32f401xe/clocks.c +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/clocks.c @@ -24,10 +24,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "stm32f4xx_hal.h" + #include "py/mpconfig.h" -void stm32f4_peripherals_clocks_init(void) { +void stm32_peripherals_clocks_init(void) { //System clock init RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/gpio.c b/ports/stm/peripherals/stm32f4/stm32f401xe/gpio.c index 7bd619662..514bcc506 100644 --- a/ports/stm/peripherals/stm32f4/stm32f401xe/gpio.c +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/gpio.c @@ -24,11 +24,10 @@ * THE SOFTWARE. */ -#include "stm32f4xx_hal.h" -#include "stm32f4/gpio.h" +#include "gpio.h" #include "common-hal/microcontroller/Pin.h" -void stm32f4_peripherals_gpio_init(void) { +void stm32_peripherals_gpio_init(void) { /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); @@ -44,8 +43,3 @@ void stm32f4_peripherals_gpio_init(void) { never_reset_pin_number(0,14); //PA14 SWCLK } -//LEDs are inverted on F411 DISCO -void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) { -} - - diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/periph.c b/ports/stm/peripherals/stm32f4/stm32f401xe/periph.c index b12084186..868945ecc 100644 --- a/ports/stm/peripherals/stm32f4/stm32f401xe/periph.c +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/periph.c @@ -26,98 +26,98 @@ #include "py/obj.h" #include "py/mphal.h" -#include "stm32f4/pins.h" -#include "stm32f4/periph.h" +#include "peripherals/pins.h" +#include "peripherals/periph.h" // I2C I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; -const mcu_i2c_sda_obj_t mcu_i2c_sda_list[5] = { - I2C_SDA(1, 4, &pin_PB07), - I2C_SDA(1, 4, &pin_PB09), - I2C_SDA(2, 9, &pin_PB03), - I2C_SDA(3, 4, &pin_PC09), - I2C_SDA(3, 9, &pin_PB04), +const mcu_periph_obj_t mcu_i2c_sda_list[5] = { + PERIPH(1, 4, &pin_PB07), + PERIPH(1, 4, &pin_PB09), + PERIPH(2, 9, &pin_PB03), + PERIPH(3, 4, &pin_PC09), + PERIPH(3, 9, &pin_PB04), }; -const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { - I2C_SCL(1, 4, &pin_PB06), - I2C_SCL(1, 4, &pin_PB08), - I2C_SCL(2, 4, &pin_PB10), - I2C_SCL(3, 4, &pin_PA08) +const mcu_periph_obj_t mcu_i2c_scl_list[4] = { + PERIPH(1, 4, &pin_PB06), + PERIPH(1, 4, &pin_PB08), + PERIPH(2, 4, &pin_PB10), + PERIPH(3, 4, &pin_PA08) }; // SPI SPI_TypeDef * mcu_spi_banks[4] = {SPI1, SPI2, SPI3, SPI4}; -const mcu_spi_sck_obj_t mcu_spi_sck_list[9] = { - SPI(1, 5, &pin_PA05), - SPI(1, 5, &pin_PB03), - SPI(2, 5, &pin_PB10), - SPI(2, 5, &pin_PB13), - SPI(2, 5, &pin_PD03), - SPI(3, 6, &pin_PB03), - SPI(3, 6, &pin_PC10), - SPI(4, 5, &pin_PE02), - SPI(4, 5, &pin_PE12), +const mcu_periph_obj_t mcu_spi_sck_list[9] = { + PERIPH(1, 5, &pin_PA05), + PERIPH(1, 5, &pin_PB03), + PERIPH(2, 5, &pin_PB10), + PERIPH(2, 5, &pin_PB13), + PERIPH(2, 5, &pin_PD03), + PERIPH(3, 6, &pin_PB03), + PERIPH(3, 6, &pin_PC10), + PERIPH(4, 5, &pin_PE02), + PERIPH(4, 5, &pin_PE12), }; -const mcu_spi_mosi_obj_t mcu_spi_mosi_list[9] = { - SPI(1, 5, &pin_PA07), - SPI(1, 5, &pin_PB05), - SPI(2, 5, &pin_PB15), - SPI(2, 5, &pin_PC03), - SPI(3, 6, &pin_PB05), - SPI(3, 6, &pin_PC12), - SPI(3, 5, &pin_PD06), - SPI(4, 5, &pin_PE06), - SPI(4, 5, &pin_PE14), +const mcu_periph_obj_t mcu_spi_mosi_list[9] = { + PERIPH(1, 5, &pin_PA07), + PERIPH(1, 5, &pin_PB05), + PERIPH(2, 5, &pin_PB15), + PERIPH(2, 5, &pin_PC03), + PERIPH(3, 6, &pin_PB05), + PERIPH(3, 6, &pin_PC12), + PERIPH(3, 5, &pin_PD06), + PERIPH(4, 5, &pin_PE06), + PERIPH(4, 5, &pin_PE14), }; -const mcu_spi_miso_obj_t mcu_spi_miso_list[8] = { - SPI(1, 5, &pin_PA06), - SPI(1, 5, &pin_PB04), - SPI(2, 5, &pin_PB14), - SPI(2, 5, &pin_PC02), - SPI(3, 6, &pin_PB04), - SPI(3, 6, &pin_PC11), - SPI(4, 5, &pin_PE05), - SPI(4, 5, &pin_PE13), +const mcu_periph_obj_t mcu_spi_miso_list[8] = { + PERIPH(1, 5, &pin_PA06), + PERIPH(1, 5, &pin_PB04), + PERIPH(2, 5, &pin_PB14), + PERIPH(2, 5, &pin_PC02), + PERIPH(3, 6, &pin_PB04), + PERIPH(3, 6, &pin_PC11), + PERIPH(4, 5, &pin_PE05), + PERIPH(4, 5, &pin_PE13), }; -const mcu_spi_nss_obj_t mcu_spi_nss_list[9] = { - SPI(1, 5, &pin_PA04), - SPI(1, 5, &pin_PA15), - SPI(2, 5, &pin_PB09), - SPI(2, 5, &pin_PB12), - SPI(3, 6, &pin_PA04), - SPI(3, 6, &pin_PA15), - SPI(4, 6, &pin_PB12), - SPI(4, 5, &pin_PE04), - SPI(4, 5, &pin_PE11), +const mcu_periph_obj_t mcu_spi_nss_list[9] = { + PERIPH(1, 5, &pin_PA04), + PERIPH(1, 5, &pin_PA15), + PERIPH(2, 5, &pin_PB09), + PERIPH(2, 5, &pin_PB12), + PERIPH(3, 6, &pin_PA04), + PERIPH(3, 6, &pin_PA15), + PERIPH(4, 6, &pin_PB12), + PERIPH(4, 5, &pin_PE04), + PERIPH(4, 5, &pin_PE11), }; USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, NULL, NULL, NULL, USART6}; bool mcu_uart_has_usart[MAX_UART] = {true, true, false, false, false, true}; -const mcu_uart_tx_obj_t mcu_uart_tx_list[6] = { - UART(2, 7, &pin_PA02), - UART(1, 7, &pin_PA09), - UART(6, 8, &pin_PA11), - UART(1, 7, &pin_PB06), - UART(6, 8, &pin_PC06), - UART(2, 7, &pin_PD05), +const mcu_periph_obj_t mcu_uart_tx_list[6] = { + PERIPH(2, 7, &pin_PA02), + PERIPH(1, 7, &pin_PA09), + PERIPH(6, 8, &pin_PA11), + PERIPH(1, 7, &pin_PB06), + PERIPH(6, 8, &pin_PC06), + PERIPH(2, 7, &pin_PD05), }; -const mcu_uart_rx_obj_t mcu_uart_rx_list[6] = { - UART(2, 7, &pin_PA03), - UART(1, 7, &pin_PA10), - UART(6, 8, &pin_PA12), - UART(1, 7, &pin_PB07), - UART(6, 8, &pin_PC07), - UART(2, 7, &pin_PD06), +const mcu_periph_obj_t mcu_uart_rx_list[6] = { + PERIPH(2, 7, &pin_PA03), + PERIPH(1, 7, &pin_PA10), + PERIPH(6, 8, &pin_PA12), + PERIPH(1, 7, &pin_PB07), + PERIPH(6, 8, &pin_PC07), + PERIPH(2, 7, &pin_PD06), }; //Timers diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/periph.h b/ports/stm/peripherals/stm32f4/stm32f401xe/periph.h index 6085f1ff2..334a14db5 100644 --- a/ports/stm/peripherals/stm32f4/stm32f401xe/periph.h +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/periph.h @@ -24,29 +24,29 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PERIPH_H -#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PERIPH_H +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F401XE_PERIPH_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F401XE_PERIPH_H //I2C extern I2C_TypeDef * mcu_i2c_banks[3]; -extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[5]; -extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; +extern const mcu_periph_obj_t mcu_i2c_sda_list[5]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[4]; //SPI extern SPI_TypeDef * mcu_spi_banks[4]; -extern const mcu_spi_sck_obj_t mcu_spi_sck_list[9]; -extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[9]; -extern const mcu_spi_miso_obj_t mcu_spi_miso_list[8]; -extern const mcu_spi_nss_obj_t mcu_spi_nss_list[9]; +extern const mcu_periph_obj_t mcu_spi_sck_list[9]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[9]; +extern const mcu_periph_obj_t mcu_spi_miso_list[8]; +extern const mcu_periph_obj_t mcu_spi_nss_list[9]; //UART extern USART_TypeDef * mcu_uart_banks[MAX_UART]; extern bool mcu_uart_has_usart[MAX_UART]; -extern const mcu_uart_tx_obj_t mcu_uart_tx_list[6]; -extern const mcu_uart_rx_obj_t mcu_uart_rx_list[6]; +extern const mcu_periph_obj_t mcu_uart_tx_list[6]; +extern const mcu_periph_obj_t mcu_uart_rx_list[6]; //Timers #define TIM_BANK_ARRAY_LEN 14 @@ -54,4 +54,4 @@ extern const mcu_uart_rx_obj_t mcu_uart_rx_list[6]; TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; -#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PERIPH_H
\ No newline at end of file +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F401XE_PERIPH_H
\ No newline at end of file diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/pins.c b/ports/stm/peripherals/stm32f4/stm32f401xe/pins.c index 7e88c3dcb..eea2a1a1b 100644 --- a/ports/stm/peripherals/stm32f4/stm32f401xe/pins.c +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/pins.c @@ -26,7 +26,7 @@ #include "py/obj.h" #include "py/mphal.h" -#include "stm32f4/pins.h" +#include "peripherals/pins.h" const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/pins.h b/ports/stm/peripherals/stm32f4/stm32f401xe/pins.h index 09bc8f13e..c836df69a 100644 --- a/ports/stm/peripherals/stm32f4/stm32f401xe/pins.h +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/pins.h @@ -24,8 +24,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PINS_H -#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PINS_H +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F401XE_PINS_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F401XE_PINS_H //Pins in datasheet order: DocID026289 Rev 7 page 38. LQFP100 only //pg 38 @@ -118,4 +118,4 @@ extern const mcu_pin_obj_t pin_PE00; extern const mcu_pin_obj_t pin_PE01; -#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PINS_H +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F401XE_PINS_H diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/clocks.c b/ports/stm/peripherals/stm32f4/stm32f405xx/clocks.c index 2afca64e8..5f4fd2783 100644 --- a/ports/stm/peripherals/stm32f4/stm32f405xx/clocks.c +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/clocks.c @@ -24,12 +24,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "stm32f4xx_hal.h" -#include "py/mpconfig.h" -void stm32f4_peripherals_clocks_init(void) { - //TODO: All parameters must be moved to board level, due to relationship with HSE Osc. +#include "py/mpconfig.h" +void stm32_peripherals_clocks_init(void) { //System clock init RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/gpio.c b/ports/stm/peripherals/stm32f4/stm32f405xx/gpio.c index d1eaa90d1..a5f4eae78 100644 --- a/ports/stm/peripherals/stm32f4/stm32f405xx/gpio.c +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/gpio.c @@ -24,11 +24,10 @@ * THE SOFTWARE. */ -#include "stm32f4xx_hal.h" -#include "stm32f4/gpio.h" +#include "peripherals/gpio.h" #include "common-hal/microcontroller/Pin.h" -void stm32f4_peripherals_gpio_init(void) { +void stm32_peripherals_gpio_init(void) { //Enable all GPIO for now __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/periph.c b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.c index bc03f7c7b..e75f0b206 100644 --- a/ports/stm/peripherals/stm32f4/stm32f405xx/periph.c +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.c @@ -26,97 +26,97 @@ #include "py/obj.h" #include "py/mphal.h" -#include "stm32f4/pins.h" -#include "stm32f4/periph.h" +#include "peripherals/pins.h" +#include "peripherals/periph.h" // I2C I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; -const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4] = { - I2C_SDA(1, 4, &pin_PB07), - I2C_SDA(1, 4, &pin_PB09), - I2C_SDA(2, 4, &pin_PB11), - I2C_SDA(3, 4, &pin_PC09), +const mcu_periph_obj_t mcu_i2c_sda_list[4] = { + PERIPH(1, 4, &pin_PB07), + PERIPH(1, 4, &pin_PB09), + PERIPH(2, 4, &pin_PB11), + PERIPH(3, 4, &pin_PC09), }; -const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { - I2C_SCL(1, 4, &pin_PB06), - I2C_SCL(1, 4, &pin_PB08), - I2C_SCL(2, 4, &pin_PB10), - I2C_SCL(3, 4, &pin_PA08) +const mcu_periph_obj_t mcu_i2c_scl_list[4] = { + PERIPH(1, 4, &pin_PB06), + PERIPH(1, 4, &pin_PB08), + PERIPH(2, 4, &pin_PB10), + PERIPH(3, 4, &pin_PA08) }; SPI_TypeDef * mcu_spi_banks[3] = {SPI1, SPI2, SPI3}; -const mcu_spi_sck_obj_t mcu_spi_sck_list[7] = { - SPI(1, 5, &pin_PA05), - SPI(1, 5, &pin_PB03), - SPI(2, 5, &pin_PB10), - SPI(2, 5, &pin_PB13), - SPI(2, 5, &pin_PC07), - SPI(3, 6, &pin_PB03), - SPI(3, 6, &pin_PC10), +const mcu_periph_obj_t mcu_spi_sck_list[7] = { + PERIPH(1, 5, &pin_PA05), + PERIPH(1, 5, &pin_PB03), + PERIPH(2, 5, &pin_PB10), + PERIPH(2, 5, &pin_PB13), + PERIPH(2, 5, &pin_PC07), + PERIPH(3, 6, &pin_PB03), + PERIPH(3, 6, &pin_PC10), }; -const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6] = { - SPI(1, 5, &pin_PA07), - SPI(1, 5, &pin_PB05), - SPI(2, 5, &pin_PB15), - SPI(2, 5, &pin_PC03), - SPI(3, 6, &pin_PB05), - SPI(3, 6, &pin_PC12), +const mcu_periph_obj_t mcu_spi_mosi_list[6] = { + PERIPH(1, 5, &pin_PA07), + PERIPH(1, 5, &pin_PB05), + PERIPH(2, 5, &pin_PB15), + PERIPH(2, 5, &pin_PC03), + PERIPH(3, 6, &pin_PB05), + PERIPH(3, 6, &pin_PC12), }; -const mcu_spi_miso_obj_t mcu_spi_miso_list[6] = { - SPI(1, 5, &pin_PA06), - SPI(1, 5, &pin_PB04), - SPI(2, 5, &pin_PB14), - SPI(2, 5, &pin_PC02), - SPI(3, 6, &pin_PB04), - SPI(3, 6, &pin_PC11), +const mcu_periph_obj_t mcu_spi_miso_list[6] = { + PERIPH(1, 5, &pin_PA06), + PERIPH(1, 5, &pin_PB04), + PERIPH(2, 5, &pin_PB14), + PERIPH(2, 5, &pin_PC02), + PERIPH(3, 6, &pin_PB04), + PERIPH(3, 6, &pin_PC11), }; -const mcu_spi_nss_obj_t mcu_spi_nss_list[6] = { - SPI(1, 5, &pin_PA04), - SPI(1, 5, &pin_PA15), - SPI(2, 5, &pin_PB09), - SPI(2, 5, &pin_PB12), - SPI(3, 6, &pin_PA04), - SPI(3, 6, &pin_PA15), +const mcu_periph_obj_t mcu_spi_nss_list[6] = { + PERIPH(1, 5, &pin_PA04), + PERIPH(1, 5, &pin_PA15), + PERIPH(2, 5, &pin_PB09), + PERIPH(2, 5, &pin_PB12), + PERIPH(3, 6, &pin_PA04), + PERIPH(3, 6, &pin_PA15), }; USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, UART4, UART5, USART6}; bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true}; -const mcu_uart_tx_obj_t mcu_uart_tx_list[12] = { - UART(4, 8, &pin_PA00), - UART(2, 7, &pin_PA02), - UART(1, 7, &pin_PA09), - UART(1, 7, &pin_PB06), - UART(3, 7, &pin_PB10), - UART(6, 8, &pin_PC06), - UART(3, 7, &pin_PC10), - UART(4, 8, &pin_PC10), - UART(5, 8, &pin_PC12), - UART(2, 7, &pin_PD05), - UART(3, 7, &pin_PD08), - UART(6, 8, &pin_PG14), +const mcu_periph_obj_t mcu_uart_tx_list[12] = { + PERIPH(4, 8, &pin_PA00), + PERIPH(2, 7, &pin_PA02), + PERIPH(1, 7, &pin_PA09), + PERIPH(1, 7, &pin_PB06), + PERIPH(3, 7, &pin_PB10), + PERIPH(6, 8, &pin_PC06), + PERIPH(3, 7, &pin_PC10), + PERIPH(4, 8, &pin_PC10), + PERIPH(5, 8, &pin_PC12), + PERIPH(2, 7, &pin_PD05), + PERIPH(3, 7, &pin_PD08), + PERIPH(6, 8, &pin_PG14), }; -const mcu_uart_rx_obj_t mcu_uart_rx_list[12] = { - UART(4, 8, &pin_PA01), - UART(2, 7, &pin_PA03), - UART(1, 7, &pin_PA10), - UART(1, 7, &pin_PB07), - UART(3, 7, &pin_PB11), - UART(6, 8, &pin_PC07), - UART(3, 7, &pin_PC11), - UART(4, 8, &pin_PC11), - UART(5, 8, &pin_PD02), - UART(2, 7, &pin_PD06), - UART(3, 7, &pin_PD09), - UART(6, 8, &pin_PG09), +const mcu_periph_obj_t mcu_uart_rx_list[12] = { + PERIPH(4, 8, &pin_PA01), + PERIPH(2, 7, &pin_PA03), + PERIPH(1, 7, &pin_PA10), + PERIPH(1, 7, &pin_PB07), + PERIPH(3, 7, &pin_PB11), + PERIPH(6, 8, &pin_PC07), + PERIPH(3, 7, &pin_PC11), + PERIPH(4, 8, &pin_PC11), + PERIPH(5, 8, &pin_PD02), + PERIPH(2, 7, &pin_PD06), + PERIPH(3, 7, &pin_PD09), + PERIPH(6, 8, &pin_PG09), }; //Timers diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h index e87e79857..98b4fab9c 100644 --- a/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h @@ -24,29 +24,29 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H -#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F405XX_PERIPH_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F405XX_PERIPH_H //I2C extern I2C_TypeDef * mcu_i2c_banks[3]; -extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4]; -extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; +extern const mcu_periph_obj_t mcu_i2c_sda_list[4]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[4]; //SPI extern SPI_TypeDef * mcu_spi_banks[3]; -extern const mcu_spi_sck_obj_t mcu_spi_sck_list[7]; -extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6]; -extern const mcu_spi_miso_obj_t mcu_spi_miso_list[6]; -extern const mcu_spi_nss_obj_t mcu_spi_nss_list[6]; +extern const mcu_periph_obj_t mcu_spi_sck_list[7]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[6]; +extern const mcu_periph_obj_t mcu_spi_miso_list[6]; +extern const mcu_periph_obj_t mcu_spi_nss_list[6]; //UART extern USART_TypeDef * mcu_uart_banks[MAX_UART]; extern bool mcu_uart_has_usart[MAX_UART]; -extern const mcu_uart_tx_obj_t mcu_uart_tx_list[12]; -extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; +extern const mcu_periph_obj_t mcu_uart_tx_list[12]; +extern const mcu_periph_obj_t mcu_uart_rx_list[12]; //Timers #define TIM_BANK_ARRAY_LEN 14 @@ -54,4 +54,4 @@ extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; -#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H
\ No newline at end of file +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F405XX_PERIPH_H
\ No newline at end of file diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/pins.c b/ports/stm/peripherals/stm32f4/stm32f405xx/pins.c index 86445fe14..0f669f1c6 100644 --- a/ports/stm/peripherals/stm32f4/stm32f405xx/pins.c +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/pins.c @@ -26,7 +26,7 @@ #include "py/obj.h" #include "py/mphal.h" -#include "stm32f4/pins.h" +#include "peripherals/pins.h" const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/pins.h b/ports/stm/peripherals/stm32f4/stm32f405xx/pins.h index 180f5c316..b3e5e3344 100644 --- a/ports/stm/peripherals/stm32f4/stm32f405xx/pins.h +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/pins.h @@ -24,8 +24,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H -#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F405XX_PINS_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F405XX_PINS_H //Pins in datasheet order: DocID028087 Rev 7 page 50. LQFP100 only //pg 50 @@ -155,4 +155,4 @@ extern const mcu_pin_obj_t pin_PB09; extern const mcu_pin_obj_t pin_PE00; extern const mcu_pin_obj_t pin_PE01; -#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F405XX_PINS_H diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/clocks.c b/ports/stm/peripherals/stm32f4/stm32f407xx/clocks.c index 2afca64e8..5f4fd2783 100644 --- a/ports/stm/peripherals/stm32f4/stm32f407xx/clocks.c +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/clocks.c @@ -24,12 +24,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "stm32f4xx_hal.h" -#include "py/mpconfig.h" -void stm32f4_peripherals_clocks_init(void) { - //TODO: All parameters must be moved to board level, due to relationship with HSE Osc. +#include "py/mpconfig.h" +void stm32_peripherals_clocks_init(void) { //System clock init RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/gpio.c b/ports/stm/peripherals/stm32f4/stm32f407xx/gpio.c index d1eaa90d1..dfdd61fde 100644 --- a/ports/stm/peripherals/stm32f4/stm32f407xx/gpio.c +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/gpio.c @@ -24,8 +24,7 @@ * THE SOFTWARE. */ -#include "stm32f4xx_hal.h" -#include "stm32f4/gpio.h" +#include "peripherals/gpio.h" #include "common-hal/microcontroller/Pin.h" void stm32f4_peripherals_gpio_init(void) { diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/periph.c b/ports/stm/peripherals/stm32f4/stm32f407xx/periph.c index bc03f7c7b..e75f0b206 100644 --- a/ports/stm/peripherals/stm32f4/stm32f407xx/periph.c +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/periph.c @@ -26,97 +26,97 @@ #include "py/obj.h" #include "py/mphal.h" -#include "stm32f4/pins.h" -#include "stm32f4/periph.h" +#include "peripherals/pins.h" +#include "peripherals/periph.h" // I2C I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; -const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4] = { - I2C_SDA(1, 4, &pin_PB07), - I2C_SDA(1, 4, &pin_PB09), - I2C_SDA(2, 4, &pin_PB11), - I2C_SDA(3, 4, &pin_PC09), +const mcu_periph_obj_t mcu_i2c_sda_list[4] = { + PERIPH(1, 4, &pin_PB07), + PERIPH(1, 4, &pin_PB09), + PERIPH(2, 4, &pin_PB11), + PERIPH(3, 4, &pin_PC09), }; -const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { - I2C_SCL(1, 4, &pin_PB06), - I2C_SCL(1, 4, &pin_PB08), - I2C_SCL(2, 4, &pin_PB10), - I2C_SCL(3, 4, &pin_PA08) +const mcu_periph_obj_t mcu_i2c_scl_list[4] = { + PERIPH(1, 4, &pin_PB06), + PERIPH(1, 4, &pin_PB08), + PERIPH(2, 4, &pin_PB10), + PERIPH(3, 4, &pin_PA08) }; SPI_TypeDef * mcu_spi_banks[3] = {SPI1, SPI2, SPI3}; -const mcu_spi_sck_obj_t mcu_spi_sck_list[7] = { - SPI(1, 5, &pin_PA05), - SPI(1, 5, &pin_PB03), - SPI(2, 5, &pin_PB10), - SPI(2, 5, &pin_PB13), - SPI(2, 5, &pin_PC07), - SPI(3, 6, &pin_PB03), - SPI(3, 6, &pin_PC10), +const mcu_periph_obj_t mcu_spi_sck_list[7] = { + PERIPH(1, 5, &pin_PA05), + PERIPH(1, 5, &pin_PB03), + PERIPH(2, 5, &pin_PB10), + PERIPH(2, 5, &pin_PB13), + PERIPH(2, 5, &pin_PC07), + PERIPH(3, 6, &pin_PB03), + PERIPH(3, 6, &pin_PC10), }; -const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6] = { - SPI(1, 5, &pin_PA07), - SPI(1, 5, &pin_PB05), - SPI(2, 5, &pin_PB15), - SPI(2, 5, &pin_PC03), - SPI(3, 6, &pin_PB05), - SPI(3, 6, &pin_PC12), +const mcu_periph_obj_t mcu_spi_mosi_list[6] = { + PERIPH(1, 5, &pin_PA07), + PERIPH(1, 5, &pin_PB05), + PERIPH(2, 5, &pin_PB15), + PERIPH(2, 5, &pin_PC03), + PERIPH(3, 6, &pin_PB05), + PERIPH(3, 6, &pin_PC12), }; -const mcu_spi_miso_obj_t mcu_spi_miso_list[6] = { - SPI(1, 5, &pin_PA06), - SPI(1, 5, &pin_PB04), - SPI(2, 5, &pin_PB14), - SPI(2, 5, &pin_PC02), - SPI(3, 6, &pin_PB04), - SPI(3, 6, &pin_PC11), +const mcu_periph_obj_t mcu_spi_miso_list[6] = { + PERIPH(1, 5, &pin_PA06), + PERIPH(1, 5, &pin_PB04), + PERIPH(2, 5, &pin_PB14), + PERIPH(2, 5, &pin_PC02), + PERIPH(3, 6, &pin_PB04), + PERIPH(3, 6, &pin_PC11), }; -const mcu_spi_nss_obj_t mcu_spi_nss_list[6] = { - SPI(1, 5, &pin_PA04), - SPI(1, 5, &pin_PA15), - SPI(2, 5, &pin_PB09), - SPI(2, 5, &pin_PB12), - SPI(3, 6, &pin_PA04), - SPI(3, 6, &pin_PA15), +const mcu_periph_obj_t mcu_spi_nss_list[6] = { + PERIPH(1, 5, &pin_PA04), + PERIPH(1, 5, &pin_PA15), + PERIPH(2, 5, &pin_PB09), + PERIPH(2, 5, &pin_PB12), + PERIPH(3, 6, &pin_PA04), + PERIPH(3, 6, &pin_PA15), }; USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, UART4, UART5, USART6}; bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true}; -const mcu_uart_tx_obj_t mcu_uart_tx_list[12] = { - UART(4, 8, &pin_PA00), - UART(2, 7, &pin_PA02), - UART(1, 7, &pin_PA09), - UART(1, 7, &pin_PB06), - UART(3, 7, &pin_PB10), - UART(6, 8, &pin_PC06), - UART(3, 7, &pin_PC10), - UART(4, 8, &pin_PC10), - UART(5, 8, &pin_PC12), - UART(2, 7, &pin_PD05), - UART(3, 7, &pin_PD08), - UART(6, 8, &pin_PG14), +const mcu_periph_obj_t mcu_uart_tx_list[12] = { + PERIPH(4, 8, &pin_PA00), + PERIPH(2, 7, &pin_PA02), + PERIPH(1, 7, &pin_PA09), + PERIPH(1, 7, &pin_PB06), + PERIPH(3, 7, &pin_PB10), + PERIPH(6, 8, &pin_PC06), + PERIPH(3, 7, &pin_PC10), + PERIPH(4, 8, &pin_PC10), + PERIPH(5, 8, &pin_PC12), + PERIPH(2, 7, &pin_PD05), + PERIPH(3, 7, &pin_PD08), + PERIPH(6, 8, &pin_PG14), }; -const mcu_uart_rx_obj_t mcu_uart_rx_list[12] = { - UART(4, 8, &pin_PA01), - UART(2, 7, &pin_PA03), - UART(1, 7, &pin_PA10), - UART(1, 7, &pin_PB07), - UART(3, 7, &pin_PB11), - UART(6, 8, &pin_PC07), - UART(3, 7, &pin_PC11), - UART(4, 8, &pin_PC11), - UART(5, 8, &pin_PD02), - UART(2, 7, &pin_PD06), - UART(3, 7, &pin_PD09), - UART(6, 8, &pin_PG09), +const mcu_periph_obj_t mcu_uart_rx_list[12] = { + PERIPH(4, 8, &pin_PA01), + PERIPH(2, 7, &pin_PA03), + PERIPH(1, 7, &pin_PA10), + PERIPH(1, 7, &pin_PB07), + PERIPH(3, 7, &pin_PB11), + PERIPH(6, 8, &pin_PC07), + PERIPH(3, 7, &pin_PC11), + PERIPH(4, 8, &pin_PC11), + PERIPH(5, 8, &pin_PD02), + PERIPH(2, 7, &pin_PD06), + PERIPH(3, 7, &pin_PD09), + PERIPH(6, 8, &pin_PG09), }; //Timers diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/periph.h b/ports/stm/peripherals/stm32f4/stm32f407xx/periph.h index e87e79857..15cbfb16d 100644 --- a/ports/stm/peripherals/stm32f4/stm32f407xx/periph.h +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/periph.h @@ -24,29 +24,29 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H -#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F407XX_PERIPH_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F407XX_PERIPH_H //I2C extern I2C_TypeDef * mcu_i2c_banks[3]; -extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4]; -extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; +extern const mcu_periph_obj_t mcu_i2c_sda_list[4]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[4]; //SPI extern SPI_TypeDef * mcu_spi_banks[3]; -extern const mcu_spi_sck_obj_t mcu_spi_sck_list[7]; -extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6]; -extern const mcu_spi_miso_obj_t mcu_spi_miso_list[6]; -extern const mcu_spi_nss_obj_t mcu_spi_nss_list[6]; +extern const mcu_periph_obj_t mcu_spi_sck_list[7]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[6]; +extern const mcu_periph_obj_t mcu_spi_miso_list[6]; +extern const mcu_periph_obj_t mcu_spi_nss_list[6]; //UART extern USART_TypeDef * mcu_uart_banks[MAX_UART]; extern bool mcu_uart_has_usart[MAX_UART]; -extern const mcu_uart_tx_obj_t mcu_uart_tx_list[12]; -extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; +extern const mcu_periph_obj_t mcu_uart_tx_list[12]; +extern const mcu_periph_obj_t mcu_uart_rx_list[12]; //Timers #define TIM_BANK_ARRAY_LEN 14 @@ -54,4 +54,4 @@ extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; -#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H
\ No newline at end of file +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F407XX_PERIPH_H
\ No newline at end of file diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/pins.c b/ports/stm/peripherals/stm32f4/stm32f407xx/pins.c index 86445fe14..0f669f1c6 100644 --- a/ports/stm/peripherals/stm32f4/stm32f407xx/pins.c +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/pins.c @@ -26,7 +26,7 @@ #include "py/obj.h" #include "py/mphal.h" -#include "stm32f4/pins.h" +#include "peripherals/pins.h" const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/pins.h b/ports/stm/peripherals/stm32f4/stm32f407xx/pins.h index 180f5c316..109dcb922 100644 --- a/ports/stm/peripherals/stm32f4/stm32f407xx/pins.h +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/pins.h @@ -24,8 +24,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H -#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F407XX_PINS_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F407XX_PINS_H //Pins in datasheet order: DocID028087 Rev 7 page 50. LQFP100 only //pg 50 @@ -155,4 +155,4 @@ extern const mcu_pin_obj_t pin_PB09; extern const mcu_pin_obj_t pin_PE00; extern const mcu_pin_obj_t pin_PE01; -#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F407XX_PINS_H diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/clocks.c b/ports/stm/peripherals/stm32f4/stm32f411xe/clocks.c index 53810af26..d048d60e8 100644 --- a/ports/stm/peripherals/stm32f4/stm32f411xe/clocks.c +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/clocks.c @@ -24,10 +24,10 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "stm32f4xx_hal.h" + #include "py/mpconfig.h" -void stm32f4_peripherals_clocks_init(void) { +void stm32_peripherals_clocks_init(void) { //System clock init RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/gpio.c b/ports/stm/peripherals/stm32f4/stm32f411xe/gpio.c index aee0bd5eb..201a90e34 100644 --- a/ports/stm/peripherals/stm32f4/stm32f411xe/gpio.c +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/gpio.c @@ -24,12 +24,11 @@ * THE SOFTWARE. */ -#include "stm32f4xx_hal.h" -#include "stm32f4/gpio.h" +#include "peripherals/gpio.h" #include "py/mpconfig.h" #include "common-hal/microcontroller/Pin.h" -void stm32f4_peripherals_gpio_init(void) { +void stm32_peripherals_gpio_init(void) { //* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE(); diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/periph.c b/ports/stm/peripherals/stm32f4/stm32f411xe/periph.c index b7d9edf4f..085663749 100644 --- a/ports/stm/peripherals/stm32f4/stm32f411xe/periph.c +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/periph.c @@ -26,120 +26,120 @@ #include "py/obj.h" #include "py/mphal.h" -#include "stm32f4/pins.h" -#include "stm32f4/periph.h" +#include "peripherals/pins.h" +#include "peripherals/periph.h" // I2C I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; -const mcu_i2c_sda_obj_t mcu_i2c_sda_list[7] = { - I2C_SDA(1, 4, &pin_PB07), - I2C_SDA(1, 4, &pin_PB09), - I2C_SDA(2, 9, &pin_PB09), - I2C_SDA(2, 9, &pin_PB03), - I2C_SDA(3, 4, &pin_PC09), - I2C_SDA(3, 9, &pin_PB04), - I2C_SDA(3, 9, &pin_PB08) +const mcu_periph_obj_t mcu_i2c_sda_list[7] = { + PERIPH(1, 4, &pin_PB07), + PERIPH(1, 4, &pin_PB09), + PERIPH(2, 9, &pin_PB09), + PERIPH(2, 9, &pin_PB03), + PERIPH(3, 4, &pin_PC09), + PERIPH(3, 9, &pin_PB04), + PERIPH(3, 9, &pin_PB08) }; -const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { - I2C_SCL(1, 4, &pin_PB06), - I2C_SCL(1, 4, &pin_PB08), - I2C_SCL(2, 4, &pin_PB10), - I2C_SCL(3, 4, &pin_PA08) +const mcu_periph_obj_t mcu_i2c_scl_list[4] = { + PERIPH(1, 4, &pin_PB06), + PERIPH(1, 4, &pin_PB08), + PERIPH(2, 4, &pin_PB10), + PERIPH(3, 4, &pin_PA08) }; // SPI SPI_TypeDef * mcu_spi_banks[5] = {SPI1, SPI2, SPI3, SPI4, SPI5}; -const mcu_spi_sck_obj_t mcu_spi_sck_list[15] = { - SPI(1, 5, &pin_PA05), - SPI(1, 5, &pin_PB03), - SPI(2, 5, &pin_PB10), - SPI(2, 5, &pin_PB13), - SPI(2, 5, &pin_PC07), - SPI(2, 5, &pin_PD03), - SPI(3, 6, &pin_PB03), - SPI(3, 7, &pin_PB12), - SPI(3, 6, &pin_PC10), - SPI(4, 6, &pin_PB13), - SPI(4, 5, &pin_PE02), - SPI(4, 5, &pin_PE12), - SPI(5, 6, &pin_PB00), - SPI(5, 6, &pin_PE02), - SPI(5, 6, &pin_PE12) +const mcu_periph_obj_t mcu_spi_sck_list[15] = { + PERIPH(1, 5, &pin_PA05), + PERIPH(1, 5, &pin_PB03), + PERIPH(2, 5, &pin_PB10), + PERIPH(2, 5, &pin_PB13), + PERIPH(2, 5, &pin_PC07), + PERIPH(2, 5, &pin_PD03), + PERIPH(3, 6, &pin_PB03), + PERIPH(3, 7, &pin_PB12), + PERIPH(3, 6, &pin_PC10), + PERIPH(4, 6, &pin_PB13), + PERIPH(4, 5, &pin_PE02), + PERIPH(4, 5, &pin_PE12), + PERIPH(5, 6, &pin_PB00), + PERIPH(5, 6, &pin_PE02), + PERIPH(5, 6, &pin_PE12) }; -const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14] = { - SPI(1, 5, &pin_PA07), - SPI(1, 5, &pin_PB05), - SPI(2, 5, &pin_PB15), - SPI(2, 5, &pin_PC03), - SPI(3, 6, &pin_PB05), - SPI(3, 6, &pin_PC12), - SPI(3, 5, &pin_PD06), - SPI(4, 5, &pin_PA01), - SPI(4, 5, &pin_PE06), - SPI(4, 5, &pin_PE14), - SPI(5, 6, &pin_PA10), - SPI(5, 6, &pin_PB08), - SPI(5, 6, &pin_PE06), - SPI(5, 6, &pin_PE14) +const mcu_periph_obj_t mcu_spi_mosi_list[14] = { + PERIPH(1, 5, &pin_PA07), + PERIPH(1, 5, &pin_PB05), + PERIPH(2, 5, &pin_PB15), + PERIPH(2, 5, &pin_PC03), + PERIPH(3, 6, &pin_PB05), + PERIPH(3, 6, &pin_PC12), + PERIPH(3, 5, &pin_PD06), + PERIPH(4, 5, &pin_PA01), + PERIPH(4, 5, &pin_PE06), + PERIPH(4, 5, &pin_PE14), + PERIPH(5, 6, &pin_PA10), + PERIPH(5, 6, &pin_PB08), + PERIPH(5, 6, &pin_PE06), + PERIPH(5, 6, &pin_PE14) }; -const mcu_spi_miso_obj_t mcu_spi_miso_list[12] = { - SPI(1, 5, &pin_PA06), - SPI(1, 5, &pin_PB04), - SPI(2, 5, &pin_PB14), - SPI(2, 5, &pin_PC02), - SPI(3, 6, &pin_PB04), - SPI(3, 6, &pin_PC11), - SPI(4, 6, &pin_PA11), - SPI(4, 5, &pin_PE05), - SPI(4, 5, &pin_PE13), - SPI(5, 6, &pin_PA12), - SPI(5, 6, &pin_PE05), - SPI(5, 6, &pin_PE13) +const mcu_periph_obj_t mcu_spi_miso_list[12] = { + PERIPH(1, 5, &pin_PA06), + PERIPH(1, 5, &pin_PB04), + PERIPH(2, 5, &pin_PB14), + PERIPH(2, 5, &pin_PC02), + PERIPH(3, 6, &pin_PB04), + PERIPH(3, 6, &pin_PC11), + PERIPH(4, 6, &pin_PA11), + PERIPH(4, 5, &pin_PE05), + PERIPH(4, 5, &pin_PE13), + PERIPH(5, 6, &pin_PA12), + PERIPH(5, 6, &pin_PE05), + PERIPH(5, 6, &pin_PE13) }; -const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { - SPI(1, 5, &pin_PA04), - SPI(1, 5, &pin_PA15), - SPI(2, 5, &pin_PB09), - SPI(2, 5, &pin_PB12), - SPI(3, 6, &pin_PA04), - SPI(3, 6, &pin_PA15), - SPI(4, 6, &pin_PB12), - SPI(4, 5, &pin_PE04), - SPI(4, 5, &pin_PE11), - SPI(5, 6, &pin_PB01), - SPI(5, 6, &pin_PE04), - SPI(5, 6, &pin_PE11) +const mcu_periph_obj_t mcu_spi_nss_list[12] = { + PERIPH(1, 5, &pin_PA04), + PERIPH(1, 5, &pin_PA15), + PERIPH(2, 5, &pin_PB09), + PERIPH(2, 5, &pin_PB12), + PERIPH(3, 6, &pin_PA04), + PERIPH(3, 6, &pin_PA15), + PERIPH(4, 6, &pin_PB12), + PERIPH(4, 5, &pin_PE04), + PERIPH(4, 5, &pin_PE11), + PERIPH(5, 6, &pin_PB01), + PERIPH(5, 6, &pin_PE04), + PERIPH(5, 6, &pin_PE11) }; USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, NULL, NULL, NULL, USART6}; bool mcu_uart_has_usart[MAX_UART] = {true, true, false, false, false, true}; -const mcu_uart_tx_obj_t mcu_uart_tx_list[7] = { - UART(2, 7, &pin_PA02), - UART(1, 7, &pin_PA09), - UART(1, 7, &pin_PA15), - UART(6, 8, &pin_PA11), - UART(1, 7, &pin_PB06), - UART(6, 8, &pin_PC06), - UART(2, 7, &pin_PD05), +const mcu_periph_obj_t mcu_uart_tx_list[7] = { + PERIPH(2, 7, &pin_PA02), + PERIPH(1, 7, &pin_PA09), + PERIPH(1, 7, &pin_PA15), + PERIPH(6, 8, &pin_PA11), + PERIPH(1, 7, &pin_PB06), + PERIPH(6, 8, &pin_PC06), + PERIPH(2, 7, &pin_PD05), }; -const mcu_uart_rx_obj_t mcu_uart_rx_list[7] = { - UART(2, 7, &pin_PA03), - UART(1, 7, &pin_PA10), - UART(6, 8, &pin_PA12), - UART(1, 7, &pin_PB03), - UART(1, 7, &pin_PB07), - UART(6, 8, &pin_PC07), - UART(2, 7, &pin_PD06), +const mcu_periph_obj_t mcu_uart_rx_list[7] = { + PERIPH(2, 7, &pin_PA03), + PERIPH(1, 7, &pin_PA10), + PERIPH(6, 8, &pin_PA12), + PERIPH(1, 7, &pin_PB03), + PERIPH(1, 7, &pin_PB07), + PERIPH(6, 8, &pin_PC07), + PERIPH(2, 7, &pin_PD06), }; //Timers diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/periph.h b/ports/stm/peripherals/stm32f4/stm32f411xe/periph.h index d657d73b6..2c5e5dd56 100644 --- a/ports/stm/peripherals/stm32f4/stm32f411xe/periph.h +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/periph.h @@ -24,29 +24,29 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H -#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F411XE_PERIPH_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F411XE_PERIPH_H //I2C extern I2C_TypeDef * mcu_i2c_banks[3]; -extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[7]; -extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; +extern const mcu_periph_obj_t mcu_i2c_sda_list[7]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[4]; //SPI extern SPI_TypeDef * mcu_spi_banks[5]; -extern const mcu_spi_sck_obj_t mcu_spi_sck_list[15]; -extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14]; -extern const mcu_spi_miso_obj_t mcu_spi_miso_list[12]; -extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; +extern const mcu_periph_obj_t mcu_spi_sck_list[15]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[14]; +extern const mcu_periph_obj_t mcu_spi_miso_list[12]; +extern const mcu_periph_obj_t mcu_spi_nss_list[12]; //UART extern USART_TypeDef * mcu_uart_banks[MAX_UART]; extern bool mcu_uart_has_usart[MAX_UART]; -extern const mcu_uart_tx_obj_t mcu_uart_tx_list[7]; -extern const mcu_uart_rx_obj_t mcu_uart_rx_list[7]; +extern const mcu_periph_obj_t mcu_uart_tx_list[7]; +extern const mcu_periph_obj_t mcu_uart_rx_list[7]; //Timers #define TIM_BANK_ARRAY_LEN 14 @@ -54,4 +54,4 @@ extern const mcu_uart_rx_obj_t mcu_uart_rx_list[7]; TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; -#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H
\ No newline at end of file +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F411XE_PERIPH_H
\ No newline at end of file diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/pins.c b/ports/stm/peripherals/stm32f4/stm32f411xe/pins.c index 7e88c3dcb..eea2a1a1b 100644 --- a/ports/stm/peripherals/stm32f4/stm32f411xe/pins.c +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/pins.c @@ -26,7 +26,7 @@ #include "py/obj.h" #include "py/mphal.h" -#include "stm32f4/pins.h" +#include "peripherals/pins.h" const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/pins.h b/ports/stm/peripherals/stm32f4/stm32f411xe/pins.h index 37d3a5cf1..b6c18b02e 100644 --- a/ports/stm/peripherals/stm32f4/stm32f411xe/pins.h +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/pins.h @@ -24,8 +24,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PINS_H -#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PINS_H +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F411XE_PINS_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F411XE_PINS_H //Pins in datasheet order: DocID026289 Rev 7 page 38. LQFP100 only //pg 38 diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/clocks.c b/ports/stm/peripherals/stm32f4/stm32f412zx/clocks.c index b208f9dfb..ad45abed2 100644 --- a/ports/stm/peripherals/stm32f4/stm32f412zx/clocks.c +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/clocks.c @@ -24,12 +24,12 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#include "stm32f4xx_hal.h" + #include "py/mpconfig.h" -void stm32f4_peripherals_clocks_init(void) { +void stm32_peripherals_clocks_init(void) { //System clock init - RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/gpio.c b/ports/stm/peripherals/stm32f4/stm32f412zx/gpio.c index d17ab4e01..97ec933ea 100644 --- a/ports/stm/peripherals/stm32f4/stm32f412zx/gpio.c +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/gpio.c @@ -24,193 +24,23 @@ * THE SOFTWARE. */ -/* GPIO PIN REFERENCE -#define LED3_Pin GPIO_PIN_2 -#define LED3_GPIO_Port GPIOE -#define LED4_Pin GPIO_PIN_3 -#define LED4_GPIO_Port GPIOE -#define DFSDM_DATIN3_Pin GPIO_PIN_4 -#define DFSDM_DATIN3_GPIO_Port GPIOE -#define A0_Pin GPIO_PIN_0 -#define A0_GPIO_Port GPIOF -#define LCD_BLCTRL_Pin GPIO_PIN_5 -#define LCD_BLCTRL_GPIO_Port GPIOF -#define QSPI_BK1_IO3_Pin GPIO_PIN_6 -#define QSPI_BK1_IO3_GPIO_Port GPIOF -#define QSPI_BK1_IO2_Pin GPIO_PIN_7 -#define QSPI_BK1_IO2_GPIO_Port GPIOF -#define QSPI_BK1_IO0_Pin GPIO_PIN_8 -#define QSPI_BK1_IO0_GPIO_Port GPIOF -#define QSPI_BK1_IO1_Pin GPIO_PIN_9 -#define QSPI_BK1_IO1_GPIO_Port GPIOF -#define STLK_MCO_Pin GPIO_PIN_0 -#define STLK_MCO_GPIO_Port GPIOH -#define DFSDM_CKOUT_Pin GPIO_PIN_2 -#define DFSDM_CKOUT_GPIO_Port GPIOC -#define JOY_SEL_Pin GPIO_PIN_0 -#define JOY_SEL_GPIO_Port GPIOA -#define STLINK_RX_Pin GPIO_PIN_2 -#define STLINK_RX_GPIO_Port GPIOA -#define STLINK_TX_Pin GPIO_PIN_3 -#define STLINK_TX_GPIO_Port GPIOA -#define CODEC_I2S3_WS_Pin GPIO_PIN_4 -#define CODEC_I2S3_WS_GPIO_Port GPIOA -#define DFSDM_DATIN0_Pin GPIO_PIN_1 -#define DFSDM_DATIN0_GPIO_Port GPIOB -#define QSPI_CLK_Pin GPIO_PIN_2 -#define QSPI_CLK_GPIO_Port GPIOB -#define EXT_RESET_Pin GPIO_PIN_11 -#define EXT_RESET_GPIO_Port GPIOF -#define CTP_RST_Pin GPIO_PIN_12 -#define CTP_RST_GPIO_Port GPIOF -#define JOY_RIGHT_Pin GPIO_PIN_14 -#define JOY_RIGHT_GPIO_Port GPIOF -#define JOY_LEFT_Pin GPIO_PIN_15 -#define JOY_LEFT_GPIO_Port GPIOF -#define JOY_UP_Pin GPIO_PIN_0 -#define JOY_UP_GPIO_Port GPIOG -#define JOY_DOWN_Pin GPIO_PIN_1 -#define JOY_DOWN_GPIO_Port GPIOG -#define D4_Pin GPIO_PIN_7 -#define D4_GPIO_Port GPIOE -#define D5_Pin GPIO_PIN_8 -#define D5_GPIO_Port GPIOE -#define D6_Pin GPIO_PIN_9 -#define D6_GPIO_Port GPIOE -#define D7_Pin GPIO_PIN_10 -#define D7_GPIO_Port GPIOE -#define D8_Pin GPIO_PIN_11 -#define D8_GPIO_Port GPIOE -#define D9_Pin GPIO_PIN_12 -#define D9_GPIO_Port GPIOE -#define D10_Pin GPIO_PIN_13 -#define D10_GPIO_Port GPIOE -#define D11_Pin GPIO_PIN_14 -#define D11_GPIO_Port GPIOE -#define D12_Pin GPIO_PIN_15 -#define D12_GPIO_Port GPIOE -#define I2C2_SCL_Pin GPIO_PIN_10 -#define I2C2_SCL_GPIO_Port GPIOB -#define M2_CKIN_Pin GPIO_PIN_11 -#define M2_CKIN_GPIO_Port GPIOB -#define CODEC_I2S3_SCK_Pin GPIO_PIN_12 -#define CODEC_I2S3_SCK_GPIO_Port GPIOB -#define D13_Pin GPIO_PIN_8 -#define D13_GPIO_Port GPIOD -#define D14_Pin GPIO_PIN_9 -#define D14_GPIO_Port GPIOD -#define D15_Pin GPIO_PIN_10 -#define D15_GPIO_Port GPIOD -#define LCD_RESET_Pin GPIO_PIN_11 -#define LCD_RESET_GPIO_Port GPIOD -#define D0_Pin GPIO_PIN_14 -#define D0_GPIO_Port GPIOD -#define D1_Pin GPIO_PIN_15 -#define D1_GPIO_Port GPIOD -#define CODEC_INT_Pin GPIO_PIN_2 -#define CODEC_INT_GPIO_Port GPIOG -#define LCD_TE_Pin GPIO_PIN_4 -#define LCD_TE_GPIO_Port GPIOG -#define CTP_INT_Pin GPIO_PIN_5 -#define CTP_INT_GPIO_Port GPIOG -#define QSPI_BK1_NCS_Pin GPIO_PIN_6 -#define QSPI_BK1_NCS_GPIO_Port GPIOG -#define USB_OTGFS_OVRCR_Pin GPIO_PIN_7 -#define USB_OTGFS_OVRCR_GPIO_Port GPIOG -#define USB_OTGFS_PPWR_EN_Pin GPIO_PIN_8 -#define USB_OTGFS_PPWR_EN_GPIO_Port GPIOG -#define CODEC_I2S3_MCK_Pin GPIO_PIN_7 -#define CODEC_I2S3_MCK_GPIO_Port GPIOC -#define uSD_D0_Pin GPIO_PIN_8 -#define uSD_D0_GPIO_Port GPIOC -#define uSD_D1_Pin GPIO_PIN_9 -#define uSD_D1_GPIO_Port GPIOC -#define M2_CKINA8_Pin GPIO_PIN_8 -#define M2_CKINA8_GPIO_Port GPIOA -#define USB_OTGFS_VBUS_Pin GPIO_PIN_9 -#define USB_OTGFS_VBUS_GPIO_Port GPIOA -#define USB_OTGFS_ID_Pin GPIO_PIN_10 -#define USB_OTGFS_ID_GPIO_Port GPIOA -#define USB_OTGFS_DM_Pin GPIO_PIN_11 -#define USB_OTGFS_DM_GPIO_Port GPIOA -#define USB_OTGFS_DP_Pin GPIO_PIN_12 -#define USB_OTGFS_DP_GPIO_Port GPIOA -#define SWDIO_Pin GPIO_PIN_13 -#define SWDIO_GPIO_Port GPIOA -#define SWCLK_Pin GPIO_PIN_14 -#define SWCLK_GPIO_Port GPIOA -#define uSD_D2_Pin GPIO_PIN_10 -#define uSD_D2_GPIO_Port GPIOC -#define uSD_D3_Pin GPIO_PIN_11 -#define uSD_D3_GPIO_Port GPIOC -#define uSD_CLK_Pin GPIO_PIN_12 -#define uSD_CLK_GPIO_Port GPIOC -#define D2_Pin GPIO_PIN_0 -#define D2_GPIO_Port GPIOD -#define D3_Pin GPIO_PIN_1 -#define D3_GPIO_Port GPIOD -#define uSD_CMD_Pin GPIO_PIN_2 -#define uSD_CMD_GPIO_Port GPIOD -#define uSD_DETECT_Pin GPIO_PIN_3 -#define uSD_DETECT_GPIO_Port GPIOD -#define FMC_NOE_Pin GPIO_PIN_4 -#define FMC_NOE_GPIO_Port GPIOD -#define FMC_NWE_Pin GPIO_PIN_5 -#define FMC_NWE_GPIO_Port GPIOD -#define FMC_NE1_Pin GPIO_PIN_7 -#define FMC_NE1_GPIO_Port GPIOD -#define SWO_Pin GPIO_PIN_3 -#define SWO_GPIO_Port GPIOB -#define CODEC_I2S3ext_SD_Pin GPIO_PIN_4 -#define CODEC_I2S3ext_SD_GPIO_Port GPIOB -#define CODEC_I2S3_SD_Pin GPIO_PIN_5 -#define CODEC_I2S3_SD_GPIO_Port GPIOB -#define I2C1_SCL_Pin GPIO_PIN_6 -#define I2C1_SCL_GPIO_Port GPIOB -#define I2C1_SDA_Pin GPIO_PIN_7 -#define I2C1_SDA_GPIO_Port GPIOB -#define I2C2_SDA_Pin GPIO_PIN_9 -#define I2C2_SDA_GPIO_Port GPIOB -#define LED1_Pin GPIO_PIN_0 -#define LED1_GPIO_Port GPIOE -#define LED2_Pin GPIO_PIN_1 -#define LED2_GPIO_Port GPIOE -*/ - -#include "stm32f4xx_hal.h" -#include "stm32f4/gpio.h" +#include "peripherals/gpio.h" #include "common-hal/microcontroller/Pin.h" -void stm32f4_peripherals_gpio_init(void) { - //Enable all GPIO for now - GPIO_InitTypeDef GPIO_InitStruct = {0}; - __HAL_RCC_GPIOE_CLK_ENABLE(); - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOF_CLK_ENABLE(); - __HAL_RCC_GPIOH_CLK_ENABLE(); - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - __HAL_RCC_GPIOG_CLK_ENABLE(); - __HAL_RCC_GPIOD_CLK_ENABLE(); - - HAL_GPIO_WritePin(GPIOE, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, GPIO_PIN_RESET); - //HAL_GPIO_WritePin(USB_OTGFS_PPWR_EN_GPIO_Port, USB_OTGFS_PPWR_EN_Pin, GPIO_PIN_SET); +void stm32_peripherals_gpio_init(void) { - //Configure LED pins - GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + GPIO_InitTypeDef GPIO_InitStruct = {0}; + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); - //Status LED chain - stm32f4_peripherals_status_led(0,1); - stm32f4_peripherals_status_led(1,0); - stm32f4_peripherals_status_led(2,0); - stm32f4_peripherals_status_led(3,0); - - //Never reset pins - never_reset_pin_number(2,13); //PC13 anti tamp + //Never reset pins + never_reset_pin_number(2,13); //PC13 anti tamp never_reset_pin_number(2,14); //PC14 OSC32_IN never_reset_pin_number(2,15); //PC15 OSC32_OUT never_reset_pin_number(0,13); //PA13 SWDIO @@ -223,21 +53,3 @@ void stm32f4_peripherals_gpio_init(void) { // never_reset_pin_number(5,0); //PH0 JTDO // never_reset_pin_number(5,1); //PH1 JTRST } - -//LEDs are inverted on F411 DISCO -void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) { - switch(led) - { - case 0: HAL_GPIO_WritePin(GPIOE, GPIO_PIN_0, (state ^ 1)); - break; - case 1: HAL_GPIO_WritePin(GPIOE, GPIO_PIN_1, (state ^ 1)); - break; - case 2: HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, (state ^ 1)); - break; - case 3: HAL_GPIO_WritePin(GPIOE, GPIO_PIN_3, (state ^ 1)); - break; - default: break; - } -} - - diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/periph.c b/ports/stm/peripherals/stm32f4/stm32f412zx/periph.c index f5effa80e..e92c88ce5 100644 --- a/ports/stm/peripherals/stm32f4/stm32f412zx/periph.c +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/periph.c @@ -26,98 +26,98 @@ #include "py/obj.h" #include "py/mphal.h" -#include "stm32f4/pins.h" -#include "stm32f4/periph.h" +#include "peripherals/pins.h" +#include "peripherals/periph.h" // I2C I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; -const mcu_i2c_sda_obj_t mcu_i2c_sda_list[8] = { - I2C_SDA(1, 4, &pin_PB07), - I2C_SDA(1, 4, &pin_PB09), - I2C_SDA(2, 4, &pin_PB11), //not on LQFP100 - I2C_SDA(2, 9, &pin_PB09), - I2C_SDA(2, 9, &pin_PB03), - I2C_SDA(3, 4, &pin_PC09), - I2C_SDA(3, 9, &pin_PB04), - I2C_SDA(3, 9, &pin_PB08) +const mcu_periph_obj_t mcu_i2c_sda_list[8] = { + PERIPH(1, 4, &pin_PB07), + PERIPH(1, 4, &pin_PB09), + PERIPH(2, 4, &pin_PB11), //not on LQFP100 + PERIPH(2, 9, &pin_PB09), + PERIPH(2, 9, &pin_PB03), + PERIPH(3, 4, &pin_PC09), + PERIPH(3, 9, &pin_PB04), + PERIPH(3, 9, &pin_PB08) }; -const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { - I2C_SCL(1, 4, &pin_PB06), - I2C_SCL(1, 4, &pin_PB08), - I2C_SCL(2, 4, &pin_PB10), - I2C_SCL(3, 4, &pin_PA08) +const mcu_periph_obj_t mcu_i2c_scl_list[4] = { + PERIPH(1, 4, &pin_PB06), + PERIPH(1, 4, &pin_PB08), + PERIPH(2, 4, &pin_PB10), + PERIPH(3, 4, &pin_PA08) }; // SPI SPI_TypeDef * mcu_spi_banks[5] = {SPI1, SPI2, SPI3, SPI4, SPI5}; -const mcu_spi_sck_obj_t mcu_spi_sck_list[15] = { - SPI(1, 5, &pin_PA05), - SPI(1, 5, &pin_PB03), - SPI(2, 5, &pin_PB10), - SPI(2, 5, &pin_PB13), - SPI(2, 5, &pin_PC07), - SPI(2, 5, &pin_PD03), - SPI(3, 6, &pin_PB03), - SPI(3, 7, &pin_PB12), - SPI(3, 6, &pin_PC10), - SPI(4, 6, &pin_PB13), - SPI(4, 5, &pin_PE02), - SPI(4, 5, &pin_PE12), - SPI(5, 6, &pin_PB00), - SPI(5, 6, &pin_PE02), - SPI(5, 6, &pin_PE12) +const mcu_periph_obj_t mcu_spi_sck_list[15] = { + PERIPH(1, 5, &pin_PA05), + PERIPH(1, 5, &pin_PB03), + PERIPH(2, 5, &pin_PB10), + PERIPH(2, 5, &pin_PB13), + PERIPH(2, 5, &pin_PC07), + PERIPH(2, 5, &pin_PD03), + PERIPH(3, 6, &pin_PB03), + PERIPH(3, 7, &pin_PB12), + PERIPH(3, 6, &pin_PC10), + PERIPH(4, 6, &pin_PB13), + PERIPH(4, 5, &pin_PE02), + PERIPH(4, 5, &pin_PE12), + PERIPH(5, 6, &pin_PB00), + PERIPH(5, 6, &pin_PE02), + PERIPH(5, 6, &pin_PE12) }; -const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14] = { - SPI(1, 5, &pin_PA07), - SPI(1, 5, &pin_PB05), - SPI(2, 5, &pin_PB15), - SPI(2, 5, &pin_PC03), - SPI(3, 6, &pin_PB05), - SPI(3, 6, &pin_PC12), - SPI(3, 5, &pin_PD06), - SPI(4, 5, &pin_PA01), - SPI(4, 5, &pin_PE06), - SPI(4, 5, &pin_PE14), - SPI(5, 6, &pin_PA10), - SPI(5, 6, &pin_PB08), - SPI(5, 6, &pin_PE06), - SPI(5, 6, &pin_PE14) +const mcu_periph_obj_t mcu_spi_mosi_list[14] = { + PERIPH(1, 5, &pin_PA07), + PERIPH(1, 5, &pin_PB05), + PERIPH(2, 5, &pin_PB15), + PERIPH(2, 5, &pin_PC03), + PERIPH(3, 6, &pin_PB05), + PERIPH(3, 6, &pin_PC12), + PERIPH(3, 5, &pin_PD06), + PERIPH(4, 5, &pin_PA01), + PERIPH(4, 5, &pin_PE06), + PERIPH(4, 5, &pin_PE14), + PERIPH(5, 6, &pin_PA10), + PERIPH(5, 6, &pin_PB08), + PERIPH(5, 6, &pin_PE06), + PERIPH(5, 6, &pin_PE14) }; -const mcu_spi_miso_obj_t mcu_spi_miso_list[12] = { - SPI(1, 5, &pin_PA06), - SPI(1, 5, &pin_PB04), - SPI(2, 5, &pin_PB14), - SPI(2, 5, &pin_PC02), - SPI(3, 6, &pin_PB04), - SPI(3, 6, &pin_PC11), - SPI(4, 6, &pin_PA11), - SPI(4, 5, &pin_PE05), - SPI(4, 5, &pin_PE13), - SPI(5, 6, &pin_PA12), - SPI(5, 6, &pin_PE05), - SPI(5, 6, &pin_PE13) +const mcu_periph_obj_t mcu_spi_miso_list[12] = { + PERIPH(1, 5, &pin_PA06), + PERIPH(1, 5, &pin_PB04), + PERIPH(2, 5, &pin_PB14), + PERIPH(2, 5, &pin_PC02), + PERIPH(3, 6, &pin_PB04), + PERIPH(3, 6, &pin_PC11), + PERIPH(4, 6, &pin_PA11), + PERIPH(4, 5, &pin_PE05), + PERIPH(4, 5, &pin_PE13), + PERIPH(5, 6, &pin_PA12), + PERIPH(5, 6, &pin_PE05), + PERIPH(5, 6, &pin_PE13) }; -const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { - SPI(1, 5, &pin_PA04), - SPI(1, 5, &pin_PA15), - SPI(2, 5, &pin_PB09), - SPI(2, 5, &pin_PB12), - SPI(3, 6, &pin_PA04), - SPI(3, 6, &pin_PA15), - SPI(4, 6, &pin_PB12), - SPI(4, 5, &pin_PE04), - SPI(4, 5, &pin_PE11), - SPI(5, 6, &pin_PB01), - SPI(5, 6, &pin_PE04), - SPI(5, 6, &pin_PE11) +const mcu_periph_obj_t mcu_spi_nss_list[12] = { + PERIPH(1, 5, &pin_PA04), + PERIPH(1, 5, &pin_PA15), + PERIPH(2, 5, &pin_PB09), + PERIPH(2, 5, &pin_PB12), + PERIPH(3, 6, &pin_PA04), + PERIPH(3, 6, &pin_PA15), + PERIPH(4, 6, &pin_PB12), + PERIPH(4, 5, &pin_PE04), + PERIPH(4, 5, &pin_PE11), + PERIPH(5, 6, &pin_PB01), + PERIPH(5, 6, &pin_PE04), + PERIPH(5, 6, &pin_PE11) }; //UART @@ -125,33 +125,33 @@ const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, NULL, NULL, USART6}; bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true}; -const mcu_uart_tx_obj_t mcu_uart_tx_list[11] = { - UART(2, 7, &pin_PA02), - UART(1, 7, &pin_PA09), - UART(1, 7, &pin_PA15), - UART(6, 8, &pin_PA11), - UART(1, 7, &pin_PB06), - UART(3, 7, &pin_PB10), - UART(6, 8, &pin_PC06), - UART(3, 7, &pin_PC10), - UART(2, 7, &pin_PD05), - UART(3, 7, &pin_PD08), - UART(6, 8, &pin_PG14), +const mcu_periph_obj_t mcu_uart_tx_list[11] = { + PERIPH(2, 7, &pin_PA02), + PERIPH(1, 7, &pin_PA09), + PERIPH(1, 7, &pin_PA15), + PERIPH(6, 8, &pin_PA11), + PERIPH(1, 7, &pin_PB06), + PERIPH(3, 7, &pin_PB10), + PERIPH(6, 8, &pin_PC06), + PERIPH(3, 7, &pin_PC10), + PERIPH(2, 7, &pin_PD05), + PERIPH(3, 7, &pin_PD08), + PERIPH(6, 8, &pin_PG14), }; -const mcu_uart_rx_obj_t mcu_uart_rx_list[12] = { - UART(2, 7, &pin_PA03), - UART(1, 7, &pin_PA10), - UART(6, 8, &pin_PA12), - UART(1, 7, &pin_PB03), - UART(1, 7, &pin_PB07), - UART(3, 7, &pin_PB11), - UART(3, 7, &pin_PC05), - UART(6, 8, &pin_PC07), - UART(3, 7, &pin_PC11), - UART(2, 7, &pin_PD06), - UART(3, 7, &pin_PD09), - UART(6, 8, &pin_PG09), +const mcu_periph_obj_t mcu_uart_rx_list[12] = { + PERIPH(2, 7, &pin_PA03), + PERIPH(1, 7, &pin_PA10), + PERIPH(6, 8, &pin_PA12), + PERIPH(1, 7, &pin_PB03), + PERIPH(1, 7, &pin_PB07), + PERIPH(3, 7, &pin_PB11), + PERIPH(3, 7, &pin_PC05), + PERIPH(6, 8, &pin_PC07), + PERIPH(3, 7, &pin_PC11), + PERIPH(2, 7, &pin_PD06), + PERIPH(3, 7, &pin_PD09), + PERIPH(6, 8, &pin_PG09), }; //Timers diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/periph.h b/ports/stm/peripherals/stm32f4/stm32f412zx/periph.h index e0141e6da..f668ace75 100644 --- a/ports/stm/peripherals/stm32f4/stm32f412zx/periph.h +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/periph.h @@ -24,30 +24,30 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H -#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F412ZX_PERIPH_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F412ZX_PERIPH_H //I2C extern I2C_TypeDef * mcu_i2c_banks[3]; -extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[8]; -extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; +extern const mcu_periph_obj_t mcu_i2c_sda_list[8]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[4]; //SPI extern SPI_TypeDef * mcu_spi_banks[5]; -extern const mcu_spi_sck_obj_t mcu_spi_sck_list[15]; -extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14]; -extern const mcu_spi_miso_obj_t mcu_spi_miso_list[12]; -extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; +extern const mcu_periph_obj_t mcu_spi_sck_list[15]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[14]; +extern const mcu_periph_obj_t mcu_spi_miso_list[12]; +extern const mcu_periph_obj_t mcu_spi_nss_list[12]; //UART extern USART_TypeDef * mcu_uart_banks[MAX_UART]; extern bool mcu_uart_has_usart[MAX_UART]; -extern const mcu_uart_tx_obj_t mcu_uart_tx_list[11]; -extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; +extern const mcu_periph_obj_t mcu_uart_tx_list[11]; +extern const mcu_periph_obj_t mcu_uart_rx_list[12]; //Timers #define TIM_BANK_ARRAY_LEN 14 @@ -55,4 +55,4 @@ extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; -#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H
\ No newline at end of file +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F412ZX_PERIPH_H
\ No newline at end of file diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/pins.c b/ports/stm/peripherals/stm32f4/stm32f412zx/pins.c index c56de5a29..ef3ce6d0e 100644 --- a/ports/stm/peripherals/stm32f4/stm32f412zx/pins.c +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/pins.c @@ -26,7 +26,7 @@ #include "py/obj.h" #include "py/mphal.h" -#include "stm32f4/pins.h" +#include "peripherals/pins.h" const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/pins.h b/ports/stm/peripherals/stm32f4/stm32f412zx/pins.h index 180f5c316..5cf99345c 100644 --- a/ports/stm/peripherals/stm32f4/stm32f412zx/pins.h +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/pins.h @@ -24,10 +24,9 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H -#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F412ZX_PINS_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F412ZX_PINS_H -//Pins in datasheet order: DocID028087 Rev 7 page 50. LQFP100 only //pg 50 extern const mcu_pin_obj_t pin_PE02; extern const mcu_pin_obj_t pin_PE03; @@ -155,4 +154,4 @@ extern const mcu_pin_obj_t pin_PB09; extern const mcu_pin_obj_t pin_PE00; extern const mcu_pin_obj_t pin_PE01; -#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F412ZX_PINS_H diff --git a/ports/stm/peripherals/stm32h7/stm32h743xx/clocks.c b/ports/stm/peripherals/stm32h7/stm32h743xx/clocks.c new file mode 100644 index 000000000..494b7709e --- /dev/null +++ b/ports/stm/peripherals/stm32h7/stm32h743xx/clocks.c @@ -0,0 +1,162 @@ + +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mpconfig.h" + +void stm32_peripherals_clocks_init(void) { + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + + /* The PWR block is always enabled on the H7 series- there is no clock + enable. For now, use the default VOS3 scale mode (lowest) and limit clock + frequencies to avoid potential current draw problems from bus + power when using the max clock speeds throughout the chip. */ + + /* Enable HSE Oscillator and activate PLL1 with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSIState = RCC_HSI_OFF; + RCC_OscInitStruct.CSIState = RCC_CSI_OFF; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000; + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 7; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_0; + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | \ + RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | \ + RCC_CLOCKTYPE_D3PCLK1); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1; + + /* Unlike on the STM32F4 family, it appears the maximum APB frequencies are + device-dependent- 120 MHz for this board according to Figure 2 of + the datasheet. Dividing by half will be safe for now. */ + RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; + RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; + + /* 4 wait states required for 168MHz and VOS3. */ + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); + + /* Like on F4, on H7, USB's actual peripheral clock and bus clock are + separate. However, the main system PLL (PLL1) doesn't have a direct + connection to the USB peripheral clock to generate 48 MHz, so we do this + dance. This will connect PLL1's Q output to the USB peripheral clock. */ + RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct; + + RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; + RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL; + HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct); + + // RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + // RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + // RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + + // /** Supply configuration update enable + // */ + // HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); + // /** Configure the main internal regulator output voltage + // */ + // __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + // while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + // /** Macro to configure the PLL clock source + // */ + // __HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE); + // /** Initializes the CPU, AHB and APB busses clocks + // */ + // RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + // RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; + // RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + // RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + // RCC_OscInitStruct.PLL.PLLM = 4; + // RCC_OscInitStruct.PLL.PLLN = 400; + // RCC_OscInitStruct.PLL.PLLP = 2; + // RCC_OscInitStruct.PLL.PLLQ = 4; + // RCC_OscInitStruct.PLL.PLLR = 2; + // RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_1; + // RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; + // RCC_OscInitStruct.PLL.PLLFRACN = 0; + // if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + // { + + // } + // /** Initializes the CPU, AHB and APB busses clocks + // */ + // RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + // |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 + // |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; + // RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + // RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + // RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; + // RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; + // RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; + // RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; + // RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; + + // if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) + // { + + // } + // PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; /*RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_UART4 + // |RCC_PERIPHCLK_SPI1|RCC_PERIPHCLK_ADC + // |RCC_PERIPHCLK_I2C1| */ + // // PeriphClkInitStruct.PLL2.PLL2M = 1; + // // PeriphClkInitStruct.PLL2.PLL2N = 19; + // // PeriphClkInitStruct.PLL2.PLL2P = 2; + // // PeriphClkInitStruct.PLL2.PLL2Q = 2; + // // PeriphClkInitStruct.PLL2.PLL2R = 2; + // // PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3; + // // PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM; + // // PeriphClkInitStruct.PLL2.PLL2FRACN = 0; + // PeriphClkInitStruct.PLL3.PLL3M = 4; + // PeriphClkInitStruct.PLL3.PLL3N = 120; + // PeriphClkInitStruct.PLL3.PLL3P = 2; + // PeriphClkInitStruct.PLL3.PLL3Q = 5; + // PeriphClkInitStruct.PLL3.PLL3R = 2; + // PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_1; + // PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOWIDE; + // PeriphClkInitStruct.PLL3.PLL3FRACN = 0; + // PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL; + // PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; + // PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_D2PCLK1; + // PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3; + // PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2; + // if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + // { + + // } + +} diff --git a/ports/stm/peripherals/stm32h7/stm32h743xx/gpio.c b/ports/stm/peripherals/stm32h7/stm32h743xx/gpio.c new file mode 100644 index 000000000..d51ff53c1 --- /dev/null +++ b/ports/stm/peripherals/stm32h7/stm32h743xx/gpio.c @@ -0,0 +1,48 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "gpio.h" +#include "common-hal/microcontroller/Pin.h" + +void stm32_peripherals_gpio_init(void) { + //Enable all GPIO for now + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOG_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + + //Never reset pins + never_reset_pin_number(2,14); //PC14 OSC32_IN + never_reset_pin_number(2,15); //PC15 OSC32_OUT + never_reset_pin_number(0,13); //PA13 SWDIO + never_reset_pin_number(0,14); //PA14 SWCLK +} + + diff --git a/ports/stm/peripherals/stm32h7/stm32h743xx/periph.c b/ports/stm/peripherals/stm32h7/stm32h743xx/periph.c new file mode 100644 index 000000000..892164600 --- /dev/null +++ b/ports/stm/peripherals/stm32h7/stm32h743xx/periph.c @@ -0,0 +1,260 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "peripherals/pins.h" +#include "peripherals/periph.h" + +// I2C + +I2C_TypeDef * mcu_i2c_banks[4] = {I2C1, I2C2, I2C3, I2C4}; + +const mcu_periph_obj_t mcu_i2c_sda_list[12] = { + PERIPH(1, 4, &pin_PB07), + PERIPH(4, 6, &pin_PB07), + PERIPH(1, 4, &pin_PB09), + PERIPH(4, 6, &pin_PB09), + PERIPH(2, 4, &pin_PB11), + PERIPH(3, 4, &pin_PC09), + PERIPH(4, 4, &pin_PD13), + PERIPH(2, 4, &pin_PF00), + PERIPH(4, 4, &pin_PF15), + PERIPH(2, 4, &pin_PH05), + PERIPH(3, 4, &pin_PH08), + PERIPH(4, 4, &pin_PH12) +}; + +const mcu_periph_obj_t mcu_i2c_scl_list[12] = { + PERIPH(3, 4, &pin_PA08), + PERIPH(1, 4, &pin_PB06), + PERIPH(4, 6, &pin_PB06), + PERIPH(1, 4, &pin_PB08), + PERIPH(4, 6, &pin_PB08), + PERIPH(2, 4, &pin_PB10), + PERIPH(4, 4, &pin_PD12), + PERIPH(2, 4, &pin_PF01), + PERIPH(4, 4, &pin_PF14), + PERIPH(2, 4, &pin_PH04), + PERIPH(3, 4, &pin_PH07), + PERIPH(4, 4, &pin_PH11) +}; + +// SPI + +SPI_TypeDef * mcu_spi_banks[6] = {SPI1, SPI2, SPI3, SPI4, SPI5, SPI6}; + +const mcu_periph_obj_t mcu_spi_sck_list[19] = { + PERIPH(1, 5, &pin_PA05), + PERIPH(6, 8, &pin_PA05), + PERIPH(2, 5, &pin_PA09), + PERIPH(2, 5, &pin_PA12), + PERIPH(1, 5, &pin_PB03), + PERIPH(3, 6, &pin_PB03), + PERIPH(6, 8, &pin_PB03), + PERIPH(2, 5, &pin_PB10), + PERIPH(2, 5, &pin_PB13), + PERIPH(3, 6, &pin_PC10), + PERIPH(2, 5, &pin_PD03), + PERIPH(4, 5, &pin_PE02), + PERIPH(4, 5, &pin_PE12), + PERIPH(5, 5, &pin_PF07), + PERIPH(1, 5, &pin_PG11), + PERIPH(6, 5, &pin_PG13), + PERIPH(5, 5, &pin_PH06), + PERIPH(2, 5, &pin_PI01), + PERIPH(5, 5, &pin_PK00), +}; + +const mcu_periph_obj_t mcu_spi_mosi_list[19] = { + PERIPH(1, 5, &pin_PA07), + PERIPH(6, 8, &pin_PA07), + PERIPH(3, 7, &pin_PB02), + PERIPH(1, 5, &pin_PB05), + PERIPH(3, 7, &pin_PB05), + PERIPH(6, 8, &pin_PB05), + PERIPH(2, 5, &pin_PB15), + PERIPH(2, 5, &pin_PC01), + PERIPH(2, 5, &pin_PC03), + PERIPH(3, 6, &pin_PC12), + PERIPH(3, 5, &pin_PD06), + PERIPH(1, 5, &pin_PD07), + PERIPH(4, 5, &pin_PE06), + PERIPH(4, 5, &pin_PE14), + PERIPH(5, 5, &pin_PF09), + PERIPH(5, 5, &pin_PF11), + PERIPH(6, 5, &pin_PG14), + PERIPH(2, 5, &pin_PI03), + PERIPH(5, 5, &pin_PJ10), +}; + +const mcu_periph_obj_t mcu_spi_miso_list[16] = { + PERIPH(1, 5, &pin_PA06), + PERIPH(6, 8, &pin_PA06), + PERIPH(1, 5, &pin_PB04), + PERIPH(3, 6, &pin_PB04), + PERIPH(6, 8, &pin_PB04), + PERIPH(2, 5, &pin_PB14), + PERIPH(2, 5, &pin_PC02), + PERIPH(3, 6, &pin_PC11), + PERIPH(4, 5, &pin_PE05), + PERIPH(4, 5, &pin_PE13), + PERIPH(5, 5, &pin_PF08), + PERIPH(1, 5, &pin_PG09), + PERIPH(6, 5, &pin_PG12), + PERIPH(5, 5, &pin_PH07), + PERIPH(2, 5, &pin_PI02), + PERIPH(5, 5, &pin_PJ11), +}; + +//UART + +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, UART4, UART5, USART6, UART7, UART8}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, true, true, true, true, true, true}; + +const mcu_periph_obj_t mcu_uart_tx_list[25] = { + PERIPH(4, 8, &pin_PA00), + PERIPH(2, 7, &pin_PA02), + PERIPH(1, 7, &pin_PA09), + PERIPH(4, 6, &pin_PA12), + PERIPH(7, 11, &pin_PA15), + PERIPH(7, 11, &pin_PB04), + PERIPH(1, 7, &pin_PB06), + PERIPH(5, 14, &pin_PB06), + PERIPH(4, 8, &pin_PB09), + PERIPH(3, 7, &pin_PB10), + PERIPH(5, 14, &pin_PB13), + PERIPH(1, 4, &pin_PB14), + PERIPH(6, 7, &pin_PC06), + PERIPH(3, 7, &pin_PC10), + PERIPH(4, 8, &pin_PC10), + PERIPH(5, 8, &pin_PC12), + PERIPH(4, 8, &pin_PD01), + PERIPH(2, 7, &pin_PD05), + PERIPH(3, 7, &pin_PD08), + PERIPH(8, 8, &pin_PE01), + PERIPH(7, 7, &pin_PE08), + PERIPH(7, 7, &pin_PF07), + PERIPH(6, 7, &pin_PG14), + PERIPH(4, 8, &pin_PH13), + PERIPH(8, 8, &pin_PJ08), +}; + +const mcu_periph_obj_t mcu_uart_rx_list[26] = { + PERIPH(4, 8, &pin_PA01), + PERIPH(2, 7, &pin_PA03), + PERIPH(7, 11, &pin_PA08), + PERIPH(1, 7, &pin_PA10), + PERIPH(4, 6, &pin_PA11), + PERIPH(7, 11, &pin_PB03), + PERIPH(5, 14, &pin_PB05), + PERIPH(1, 7, &pin_PB07), + PERIPH(4, 8, &pin_PB08), + PERIPH(3, 7, &pin_PB11), + PERIPH(5, 14, &pin_PB12), + PERIPH(1, 4, &pin_PB15), + PERIPH(6, 7, &pin_PC07), + PERIPH(3, 7, &pin_PC11), + PERIPH(4, 8, &pin_PC11), + PERIPH(4, 8, &pin_PD00), + PERIPH(5, 8, &pin_PD02), + PERIPH(2, 7, &pin_PD06), + PERIPH(3, 7, &pin_PD09), + PERIPH(8, 8, &pin_PE00), + PERIPH(7, 7, &pin_PE07), + PERIPH(7, 7, &pin_PF06), + PERIPH(6, 7, &pin_PG09), + PERIPH(4, 8, &pin_PH14), + PERIPH(4, 8, &pin_PI09), + PERIPH(8, 8, &pin_PJ09), +}; + +//Timers +//TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins +//TODO: H7 has more timers than this, but are they tied to pins? +TIM_TypeDef * mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, TIM8, NULL, NULL, + NULL, TIM12, TIM13, TIM14}; + +const mcu_tim_pin_obj_t mcu_tim_pin_list[58] = { + TIM(2, 1, 1, &pin_PA00), + TIM(5, 2, 1, &pin_PA00), + TIM(2, 1, 2, &pin_PA01), + TIM(5, 2, 2, &pin_PA01), + TIM(2, 1, 3, &pin_PA02), + TIM(5, 2, 3, &pin_PA02), + TIM(2, 1, 4, &pin_PA03), + TIM(5, 2, 4, &pin_PA03), + TIM(2, 1, 1, &pin_PA05), + TIM(3, 2, 1, &pin_PA06), + TIM(3, 2, 2, &pin_PA07), + TIM(1, 1, 1, &pin_PA08), + TIM(1, 1, 2, &pin_PA09), + TIM(1, 1, 3, &pin_PA10), + TIM(1, 1, 4, &pin_PA11), + TIM(2, 1, 1, &pin_PA15), + TIM(3, 2, 3, &pin_PB00), + TIM(3, 2, 4, &pin_PB01), + TIM(2, 1, 2, &pin_PB03), + TIM(3, 2, 1, &pin_PB04), + TIM(3, 2, 2, &pin_PB05), + TIM(4, 2, 1, &pin_PB06), + TIM(4, 2, 2, &pin_PB07), + TIM(4, 2, 3, &pin_PB08), + TIM(4, 2, 4, &pin_PB09), + TIM(2, 1, 3, &pin_PB10), + TIM(2, 1, 4, &pin_PB11), + TIM(3, 2, 1, &pin_PC06), + TIM(8, 3, 1, &pin_PC06), + TIM(3, 2, 2, &pin_PC07), + TIM(8, 3, 2, &pin_PC07), + TIM(3, 2, 3, &pin_PC08), + TIM(8, 3, 3, &pin_PC08), + TIM(3, 2, 4, &pin_PC09), + TIM(8, 3, 4, &pin_PC09), + TIM(4, 2, 1, &pin_PD12), + TIM(4, 2, 2, &pin_PD13), + TIM(4, 2, 3, &pin_PD14), + TIM(4, 2, 4, &pin_PD15), + TIM(1, 1, 1, &pin_PE09), + TIM(1, 1, 2, &pin_PE11), + TIM(1, 1, 3, &pin_PE13), + TIM(1, 1, 4, &pin_PE14), + TIM(5, 2, 1, &pin_PH10), + TIM(5, 2, 2, &pin_PH11), + TIM(5, 2, 3, &pin_PH12), + TIM(5, 2, 4, &pin_PI00), + TIM(8, 3, 4, &pin_PI02), + TIM(8, 3, 1, &pin_PI05), + TIM(8, 3, 2, &pin_PI06), + TIM(8, 3, 3, &pin_PI07), + TIM(8, 3, 2, &pin_PJ06), + TIM(8, 3, 1, &pin_PJ08), + TIM(1, 1, 3, &pin_PJ09), + TIM(8, 3, 2, &pin_PJ10), + TIM(1, 1, 2, &pin_PJ11), + TIM(8, 3, 3, &pin_PK00), + TIM(1, 1, 1, &pin_PK01), +}; diff --git a/ports/stm/peripherals/stm32h7/stm32h743xx/periph.h b/ports/stm/peripherals/stm32h7/stm32h743xx/periph.h new file mode 100644 index 000000000..4b852413b --- /dev/null +++ b/ports/stm/peripherals/stm32h7/stm32h743xx/periph.h @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32H743XX_PERIPH_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32H743XX_PERIPH_H + +//I2C +extern I2C_TypeDef * mcu_i2c_banks[4]; + +const mcu_periph_obj_t mcu_i2c_sda_list[12]; +const mcu_periph_obj_t mcu_i2c_scl_list[12]; + +//SPI +extern SPI_TypeDef * mcu_spi_banks[6]; + +const mcu_periph_obj_t mcu_spi_sck_list[19]; +const mcu_periph_obj_t mcu_spi_mosi_list[19]; +const mcu_periph_obj_t mcu_spi_miso_list[16]; + +//UART +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; + +const mcu_periph_obj_t mcu_uart_tx_list[25]; +const mcu_periph_obj_t mcu_uart_rx_list[26]; + +//Timers +#define TIM_BANK_ARRAY_LEN 14 +#define TIM_PIN_ARRAY_LEN 58 +TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; + +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32H743XX_PERIPH_H
\ No newline at end of file diff --git a/ports/stm/peripherals/stm32h7/stm32h743xx/pins.c b/ports/stm/peripherals/stm32h7/stm32h743xx/pins.c new file mode 100644 index 000000000..491fe6938 --- /dev/null +++ b/ports/stm/peripherals/stm32h7/stm32h743xx/pins.c @@ -0,0 +1,210 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "peripherals/pins.h" + +// Todo: some pins do have ADCs, but the module isn't set up yet. + +const mcu_pin_obj_t pin_PA00 = PIN(0, 0, NO_ADC); +const mcu_pin_obj_t pin_PA01 = PIN(0, 1, NO_ADC); +const mcu_pin_obj_t pin_PA02 = PIN(0, 2, NO_ADC); +const mcu_pin_obj_t pin_PA03 = PIN(0, 3, NO_ADC); +const mcu_pin_obj_t pin_PA04 = PIN(0, 4, NO_ADC); +const mcu_pin_obj_t pin_PA05 = PIN(0, 5, NO_ADC); +const mcu_pin_obj_t pin_PA06 = PIN(0, 6, NO_ADC); +const mcu_pin_obj_t pin_PA07 = PIN(0, 7, NO_ADC); +const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC); +const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC); +const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC); +const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC); +const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC); +const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC); +const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC); +const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC); + +const mcu_pin_obj_t pin_PB00 = PIN(1, 0, NO_ADC); +const mcu_pin_obj_t pin_PB01 = PIN(1, 1, NO_ADC); +const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); +const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC); +const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC); +const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC); +const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC); +const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC); +const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC); +const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC); +const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC); +const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC); +const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC); +const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC); +const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC); +const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC); + +const mcu_pin_obj_t pin_PC00 = PIN(2, 0, NO_ADC); +const mcu_pin_obj_t pin_PC01 = PIN(2, 1, NO_ADC); +const mcu_pin_obj_t pin_PC02 = PIN(2, 2, NO_ADC); +const mcu_pin_obj_t pin_PC03 = PIN(2, 3, NO_ADC); +const mcu_pin_obj_t pin_PC04 = PIN(2, 4, NO_ADC); +const mcu_pin_obj_t pin_PC05 = PIN(2, 5, NO_ADC); +const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC); +const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC); +const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC); +const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC); +const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC); +const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC); +const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC); +const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); +const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); +const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); + +const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC); +const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC); +const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC); +const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC); +const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC); +const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC); +const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC); +const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC); +const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC); +const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC); +const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC); +const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC); +const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC); +const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC); +const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC); +const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC); + +const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC); +const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC); +const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); +const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); +const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC); +const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC); +const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC); +const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC); +const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC); +const mcu_pin_obj_t pin_PE09 = PIN(4, 9, NO_ADC); +const mcu_pin_obj_t pin_PE10 = PIN(4, 10, NO_ADC); +const mcu_pin_obj_t pin_PE11 = PIN(4, 11, NO_ADC); +const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC); +const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC); +const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC); +const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC); + +const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); +const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); +const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); +const mcu_pin_obj_t pin_PF03 = PIN(5, 3, NO_ADC); +const mcu_pin_obj_t pin_PF04 = PIN(5, 4, NO_ADC); +const mcu_pin_obj_t pin_PF05 = PIN(5, 5, NO_ADC); +const mcu_pin_obj_t pin_PF06 = PIN(5, 6, NO_ADC); +const mcu_pin_obj_t pin_PF07 = PIN(5, 7, NO_ADC); +const mcu_pin_obj_t pin_PF08 = PIN(5, 8, NO_ADC); +const mcu_pin_obj_t pin_PF09 = PIN(5, 9, NO_ADC); +const mcu_pin_obj_t pin_PF10 = PIN(5, 10, NO_ADC); +const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); +const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); +const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC); +const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC); +const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC); + +const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC); +const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC); +const mcu_pin_obj_t pin_PG02 = PIN(6, 2, NO_ADC); +const mcu_pin_obj_t pin_PG03 = PIN(6, 3, NO_ADC); +const mcu_pin_obj_t pin_PG04 = PIN(6, 4, NO_ADC); +const mcu_pin_obj_t pin_PG05 = PIN(6, 5, NO_ADC); +const mcu_pin_obj_t pin_PG06 = PIN(6, 6, NO_ADC); +const mcu_pin_obj_t pin_PG07 = PIN(6, 7, NO_ADC); +const mcu_pin_obj_t pin_PG08 = PIN(6, 8, NO_ADC); +const mcu_pin_obj_t pin_PG09 = PIN(6, 9, NO_ADC); +const mcu_pin_obj_t pin_PG10 = PIN(6, 10, NO_ADC); +const mcu_pin_obj_t pin_PG11 = PIN(6, 11, NO_ADC); +const mcu_pin_obj_t pin_PG12 = PIN(6, 12, NO_ADC); +const mcu_pin_obj_t pin_PG13 = PIN(6, 13, NO_ADC); +const mcu_pin_obj_t pin_PG14 = PIN(6, 14, NO_ADC); +const mcu_pin_obj_t pin_PG15 = PIN(6, 15, NO_ADC); + +const mcu_pin_obj_t pin_PH00 = PIN(7, 0, NO_ADC); +const mcu_pin_obj_t pin_PH01 = PIN(7, 1, NO_ADC); +const mcu_pin_obj_t pin_PH02 = PIN(7, 2, NO_ADC); +const mcu_pin_obj_t pin_PH03 = PIN(7, 3, NO_ADC); +const mcu_pin_obj_t pin_PH04 = PIN(7, 4, NO_ADC); +const mcu_pin_obj_t pin_PH05 = PIN(7, 5, NO_ADC); +const mcu_pin_obj_t pin_PH06 = PIN(7, 6, NO_ADC); +const mcu_pin_obj_t pin_PH07 = PIN(7, 7, NO_ADC); +const mcu_pin_obj_t pin_PH08 = PIN(7, 8, NO_ADC); +const mcu_pin_obj_t pin_PH09 = PIN(7, 9, NO_ADC); +const mcu_pin_obj_t pin_PH10 = PIN(7, 10, NO_ADC); +const mcu_pin_obj_t pin_PH11 = PIN(7, 11, NO_ADC); +const mcu_pin_obj_t pin_PH12 = PIN(7, 12, NO_ADC); +const mcu_pin_obj_t pin_PH13 = PIN(7, 13, NO_ADC); +const mcu_pin_obj_t pin_PH14 = PIN(7, 14, NO_ADC); +const mcu_pin_obj_t pin_PH15 = PIN(7, 15, NO_ADC); + +const mcu_pin_obj_t pin_PI00 = PIN(8, 0, NO_ADC); +const mcu_pin_obj_t pin_PI01 = PIN(8, 1, NO_ADC); +const mcu_pin_obj_t pin_PI02 = PIN(8, 2, NO_ADC); +const mcu_pin_obj_t pin_PI03 = PIN(8, 3, NO_ADC); +const mcu_pin_obj_t pin_PI04 = PIN(8, 4, NO_ADC); +const mcu_pin_obj_t pin_PI05 = PIN(8, 5, NO_ADC); +const mcu_pin_obj_t pin_PI06 = PIN(8, 6, NO_ADC); +const mcu_pin_obj_t pin_PI07 = PIN(8, 7, NO_ADC); +const mcu_pin_obj_t pin_PI08 = PIN(8, 8, NO_ADC); +const mcu_pin_obj_t pin_PI09 = PIN(8, 9, NO_ADC); +const mcu_pin_obj_t pin_PI10 = PIN(8, 10, NO_ADC); +const mcu_pin_obj_t pin_PI11 = PIN(8, 11, NO_ADC); +const mcu_pin_obj_t pin_PI12 = PIN(8, 12, NO_ADC); +const mcu_pin_obj_t pin_PI13 = PIN(8, 13, NO_ADC); +const mcu_pin_obj_t pin_PI14 = PIN(8, 14, NO_ADC); +const mcu_pin_obj_t pin_PI15 = PIN(8, 15, NO_ADC); + +const mcu_pin_obj_t pin_PJ00 = PIN(9, 0, NO_ADC); +const mcu_pin_obj_t pin_PJ01 = PIN(9, 1, NO_ADC); +const mcu_pin_obj_t pin_PJ02 = PIN(9, 2, NO_ADC); +const mcu_pin_obj_t pin_PJ03 = PIN(9, 3, NO_ADC); +const mcu_pin_obj_t pin_PJ04 = PIN(9, 4, NO_ADC); +const mcu_pin_obj_t pin_PJ05 = PIN(9, 5, NO_ADC); +const mcu_pin_obj_t pin_PJ06 = PIN(9, 6, NO_ADC); +const mcu_pin_obj_t pin_PJ07 = PIN(9, 7, NO_ADC); +const mcu_pin_obj_t pin_PJ08 = PIN(9, 8, NO_ADC); +const mcu_pin_obj_t pin_PJ09 = PIN(9, 9, NO_ADC); +const mcu_pin_obj_t pin_PJ10 = PIN(9, 10, NO_ADC); +const mcu_pin_obj_t pin_PJ11 = PIN(9, 11, NO_ADC); +const mcu_pin_obj_t pin_PJ12 = PIN(9, 12, NO_ADC); +const mcu_pin_obj_t pin_PJ13 = PIN(9, 13, NO_ADC); +const mcu_pin_obj_t pin_PJ14 = PIN(9, 14, NO_ADC); +const mcu_pin_obj_t pin_PJ15 = PIN(9, 15, NO_ADC); + +const mcu_pin_obj_t pin_PK00 = PIN(10, 0, NO_ADC); +const mcu_pin_obj_t pin_PK01 = PIN(10, 1, NO_ADC); +const mcu_pin_obj_t pin_PK02 = PIN(10, 2, NO_ADC); +const mcu_pin_obj_t pin_PK03 = PIN(10, 3, NO_ADC); +const mcu_pin_obj_t pin_PK04 = PIN(10, 4, NO_ADC); +const mcu_pin_obj_t pin_PK05 = PIN(10, 5, NO_ADC); +const mcu_pin_obj_t pin_PK06 = PIN(10, 6, NO_ADC); +const mcu_pin_obj_t pin_PK07 = PIN(10, 7, NO_ADC); diff --git a/ports/stm/peripherals/stm32h7/stm32h743xx/pins.h b/ports/stm/peripherals/stm32h7/stm32h743xx/pins.h new file mode 100644 index 000000000..7c4650dca --- /dev/null +++ b/ports/stm/peripherals/stm32h7/stm32h743xx/pins.h @@ -0,0 +1,199 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32_PERIPHERALS_STM32H743XX_PINS_H +#define MICROPY_INCLUDED_STM32_PERIPHERALS_STM32H743XX_PINS_H + +extern const mcu_pin_obj_t pin_PA00; +extern const mcu_pin_obj_t pin_PA01; +extern const mcu_pin_obj_t pin_PA02; +extern const mcu_pin_obj_t pin_PA03; +extern const mcu_pin_obj_t pin_PA04; +extern const mcu_pin_obj_t pin_PA05; +extern const mcu_pin_obj_t pin_PA06; +extern const mcu_pin_obj_t pin_PA07; +extern const mcu_pin_obj_t pin_PA08; +extern const mcu_pin_obj_t pin_PA09; +extern const mcu_pin_obj_t pin_PA10; +extern const mcu_pin_obj_t pin_PA11; +extern const mcu_pin_obj_t pin_PA12; +extern const mcu_pin_obj_t pin_PA13; +extern const mcu_pin_obj_t pin_PA14; +extern const mcu_pin_obj_t pin_PA15; +extern const mcu_pin_obj_t pin_PB00; +extern const mcu_pin_obj_t pin_PB01; +extern const mcu_pin_obj_t pin_PB02; +extern const mcu_pin_obj_t pin_PB03; +extern const mcu_pin_obj_t pin_PB04; +extern const mcu_pin_obj_t pin_PB05; +extern const mcu_pin_obj_t pin_PB06; +extern const mcu_pin_obj_t pin_PB07; +extern const mcu_pin_obj_t pin_PB08; +extern const mcu_pin_obj_t pin_PB09; +extern const mcu_pin_obj_t pin_PB10; +extern const mcu_pin_obj_t pin_PB11; +extern const mcu_pin_obj_t pin_PB12; +extern const mcu_pin_obj_t pin_PB13; +extern const mcu_pin_obj_t pin_PB14; +extern const mcu_pin_obj_t pin_PB15; +extern const mcu_pin_obj_t pin_PC00; +extern const mcu_pin_obj_t pin_PC01; +extern const mcu_pin_obj_t pin_PC02; +extern const mcu_pin_obj_t pin_PC03; +extern const mcu_pin_obj_t pin_PC04; +extern const mcu_pin_obj_t pin_PC05; +extern const mcu_pin_obj_t pin_PC06; +extern const mcu_pin_obj_t pin_PC07; +extern const mcu_pin_obj_t pin_PC08; +extern const mcu_pin_obj_t pin_PC09; +extern const mcu_pin_obj_t pin_PC10; +extern const mcu_pin_obj_t pin_PC11; +extern const mcu_pin_obj_t pin_PC12; +extern const mcu_pin_obj_t pin_PC13; +extern const mcu_pin_obj_t pin_PC14; +extern const mcu_pin_obj_t pin_PC15; +extern const mcu_pin_obj_t pin_PD00; +extern const mcu_pin_obj_t pin_PD01; +extern const mcu_pin_obj_t pin_PD02; +extern const mcu_pin_obj_t pin_PD03; +extern const mcu_pin_obj_t pin_PD04; +extern const mcu_pin_obj_t pin_PD05; +extern const mcu_pin_obj_t pin_PD06; +extern const mcu_pin_obj_t pin_PD07; +extern const mcu_pin_obj_t pin_PD08; +extern const mcu_pin_obj_t pin_PD09; +extern const mcu_pin_obj_t pin_PD10; +extern const mcu_pin_obj_t pin_PD11; +extern const mcu_pin_obj_t pin_PD12; +extern const mcu_pin_obj_t pin_PD13; +extern const mcu_pin_obj_t pin_PD14; +extern const mcu_pin_obj_t pin_PD15; +extern const mcu_pin_obj_t pin_PE00; +extern const mcu_pin_obj_t pin_PE01; +extern const mcu_pin_obj_t pin_PE02; +extern const mcu_pin_obj_t pin_PE03; +extern const mcu_pin_obj_t pin_PE04; +extern const mcu_pin_obj_t pin_PE05; +extern const mcu_pin_obj_t pin_PE06; +extern const mcu_pin_obj_t pin_PE07; +extern const mcu_pin_obj_t pin_PE08; +extern const mcu_pin_obj_t pin_PE09; +extern const mcu_pin_obj_t pin_PE10; +extern const mcu_pin_obj_t pin_PE11; +extern const mcu_pin_obj_t pin_PE12; +extern const mcu_pin_obj_t pin_PE13; +extern const mcu_pin_obj_t pin_PE14; +extern const mcu_pin_obj_t pin_PE15; +extern const mcu_pin_obj_t pin_PF00; +extern const mcu_pin_obj_t pin_PF01; +extern const mcu_pin_obj_t pin_PF02; +extern const mcu_pin_obj_t pin_PF03; +extern const mcu_pin_obj_t pin_PF04; +extern const mcu_pin_obj_t pin_PF05; +extern const mcu_pin_obj_t pin_PF06; +extern const mcu_pin_obj_t pin_PF07; +extern const mcu_pin_obj_t pin_PF08; +extern const mcu_pin_obj_t pin_PF09; +extern const mcu_pin_obj_t pin_PF10; +extern const mcu_pin_obj_t pin_PF11; +extern const mcu_pin_obj_t pin_PF12; +extern const mcu_pin_obj_t pin_PF13; +extern const mcu_pin_obj_t pin_PF14; +extern const mcu_pin_obj_t pin_PF15; +extern const mcu_pin_obj_t pin_PG00; +extern const mcu_pin_obj_t pin_PG01; +extern const mcu_pin_obj_t pin_PG02; +extern const mcu_pin_obj_t pin_PG03; +extern const mcu_pin_obj_t pin_PG04; +extern const mcu_pin_obj_t pin_PG05; +extern const mcu_pin_obj_t pin_PG06; +extern const mcu_pin_obj_t pin_PG07; +extern const mcu_pin_obj_t pin_PG08; +extern const mcu_pin_obj_t pin_PG09; +extern const mcu_pin_obj_t pin_PG10; +extern const mcu_pin_obj_t pin_PG11; +extern const mcu_pin_obj_t pin_PG12; +extern const mcu_pin_obj_t pin_PG13; +extern const mcu_pin_obj_t pin_PG14; +extern const mcu_pin_obj_t pin_PG15; +extern const mcu_pin_obj_t pin_PH00; +extern const mcu_pin_obj_t pin_PH01; +extern const mcu_pin_obj_t pin_PH02; +extern const mcu_pin_obj_t pin_PH03; +extern const mcu_pin_obj_t pin_PH04; +extern const mcu_pin_obj_t pin_PH05; +extern const mcu_pin_obj_t pin_PH06; +extern const mcu_pin_obj_t pin_PH07; +extern const mcu_pin_obj_t pin_PH08; +extern const mcu_pin_obj_t pin_PH09; +extern const mcu_pin_obj_t pin_PH10; +extern const mcu_pin_obj_t pin_PH11; +extern const mcu_pin_obj_t pin_PH12; +extern const mcu_pin_obj_t pin_PH13; +extern const mcu_pin_obj_t pin_PH14; +extern const mcu_pin_obj_t pin_PH15; +extern const mcu_pin_obj_t pin_PI00; +extern const mcu_pin_obj_t pin_PI01; +extern const mcu_pin_obj_t pin_PI02; +extern const mcu_pin_obj_t pin_PI03; +extern const mcu_pin_obj_t pin_PI04; +extern const mcu_pin_obj_t pin_PI05; +extern const mcu_pin_obj_t pin_PI06; +extern const mcu_pin_obj_t pin_PI07; +extern const mcu_pin_obj_t pin_PI08; +extern const mcu_pin_obj_t pin_PI09; +extern const mcu_pin_obj_t pin_PI10; +extern const mcu_pin_obj_t pin_PI11; +extern const mcu_pin_obj_t pin_PI12; +extern const mcu_pin_obj_t pin_PI13; +extern const mcu_pin_obj_t pin_PI14; +extern const mcu_pin_obj_t pin_PI15; +extern const mcu_pin_obj_t pin_PJ00; +extern const mcu_pin_obj_t pin_PJ01; +extern const mcu_pin_obj_t pin_PJ02; +extern const mcu_pin_obj_t pin_PJ03; +extern const mcu_pin_obj_t pin_PJ04; +extern const mcu_pin_obj_t pin_PJ05; +extern const mcu_pin_obj_t pin_PJ06; +extern const mcu_pin_obj_t pin_PJ07; +extern const mcu_pin_obj_t pin_PJ08; +extern const mcu_pin_obj_t pin_PJ09; +extern const mcu_pin_obj_t pin_PJ10; +extern const mcu_pin_obj_t pin_PJ11; +extern const mcu_pin_obj_t pin_PJ12; +extern const mcu_pin_obj_t pin_PJ13; +extern const mcu_pin_obj_t pin_PJ14; +extern const mcu_pin_obj_t pin_PJ15; +extern const mcu_pin_obj_t pin_PK00; +extern const mcu_pin_obj_t pin_PK01; +extern const mcu_pin_obj_t pin_PK02; +extern const mcu_pin_obj_t pin_PK03; +extern const mcu_pin_obj_t pin_PK04; +extern const mcu_pin_obj_t pin_PK05; +extern const mcu_pin_obj_t pin_PK06; +extern const mcu_pin_obj_t pin_PK07; + +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32H743XX_PINS_H diff --git a/ports/stm/supervisor/port.c b/ports/stm/supervisor/port.c index 948e9f2e4..fa377e74a 100644 --- a/ports/stm/supervisor/port.c +++ b/ports/stm/supervisor/port.c @@ -31,25 +31,29 @@ #include "tick.h" #include "common-hal/microcontroller/Pin.h" -#include "common-hal/busio/I2C.h" -#include "common-hal/busio/SPI.h" -#include "common-hal/busio/UART.h" -#include "common-hal/pulseio/PWMOut.h" -#include "common-hal/pulseio/PulseOut.h" -#include "common-hal/pulseio/PulseIn.h" -#include "stm32f4/clocks.h" -#include "stm32f4/gpio.h" +#if defined(STM32F4) + #include "common-hal/busio/I2C.h" + #include "common-hal/busio/SPI.h" + #include "common-hal/busio/UART.h" + #include "common-hal/pulseio/PWMOut.h" + #include "common-hal/pulseio/PulseOut.h" + #include "common-hal/pulseio/PulseIn.h" +#endif -#include "stm32f4xx_hal.h" +#include "clocks.h" +#include "gpio.h" safe_mode_t port_init(void) { HAL_Init(); __HAL_RCC_SYSCFG_CLK_ENABLE(); - __HAL_RCC_PWR_CLK_ENABLE(); + + #if defined(STM32F4) + __HAL_RCC_PWR_CLK_ENABLE(); + #endif - stm32f4_peripherals_clocks_init(); - stm32f4_peripherals_gpio_init(); + stm32_peripherals_clocks_init(); + stm32_peripherals_gpio_init(); tick_init(); @@ -58,12 +62,15 @@ safe_mode_t port_init(void) { void reset_port(void) { reset_all_pins(); - i2c_reset(); - spi_reset(); - uart_reset(); - pwmout_reset(); - pulseout_reset(); - pulsein_reset(); + + #if defined(STM32F4) + i2c_reset(); + spi_reset(); + uart_reset(); + pwmout_reset(); + pulseout_reset(); + pulsein_reset(); + #endif } void reset_to_bootloader(void) { diff --git a/ports/stm/supervisor/usb.c b/ports/stm/supervisor/usb.c index 358c2de5b..a0c907a3d 100644 --- a/ports/stm/supervisor/usb.c +++ b/ports/stm/supervisor/usb.c @@ -30,7 +30,6 @@ #include "supervisor/usb.h" #include "lib/utils/interrupt_char.h" #include "lib/mp-readline/readline.h" -#include "stm32f4xx_hal.h" #include "py/mpconfig.h" @@ -74,7 +73,11 @@ void init_usb_hardware(void) { GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; + #if defined(STM32H7) + GPIO_InitStruct.Alternate = GPIO_AF10_OTG1_FS; + #else GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; + #endif HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); never_reset_pin_number(0, 11); never_reset_pin_number(0, 12); @@ -91,7 +94,11 @@ void init_usb_hardware(void) { GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; GPIO_InitStruct.Pull = GPIO_PULLUP; GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; + #if defined(STM32H7) + GPIO_InitStruct.Alternate = GPIO_AF10_OTG1_FS; + #else GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; + #endif HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); never_reset_pin_number(0, 10); @@ -103,10 +110,16 @@ void init_usb_hardware(void) { HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); never_reset_pin_number(0, 8); #endif - + + +#if defined(STM32H7) + HAL_PWREx_EnableUSBVoltageDetector(); + __HAL_RCC_USB2_OTG_FS_CLK_ENABLE(); +#else /* Peripheral clock enable */ __HAL_RCC_USB_OTG_FS_CLK_DISABLE(); __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); +#endif init_usb_vbus_sense(); } diff --git a/ports/stm/system_stm32h7xx.c b/ports/stm/system_stm32h7xx.c new file mode 100644 index 000000000..2132f26a0 --- /dev/null +++ b/ports/stm/system_stm32h7xx.c @@ -0,0 +1,425 @@ +/* + * Taken from ST Cube library and modified. See below for original header. + * + * Modifications copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +/** + ****************************************************************************** + * @file system_stm32h7xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-Mx Device Peripheral Access Layer System Source File. + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32h7xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock, it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * + ****************************************************************************** + * @attention + * + * <h2><center>© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.</center></h2> + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32h7xx_system + * @{ + */ + +/** @addtogroup STM32H7xx_System_Private_Includes + * @{ + */ + +#include "stm32h7xx.h" +#include <math.h> +#if !defined (HSE_VALUE) +#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (CSI_VALUE) + #define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* CSI_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to use initialized data in D2 domain SRAM (AHB SRAM) */ +/* #define DATA_IN_D2_SRAM */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00000000UL /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/******************************************************************************/ + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_Variables + * @{ + */ + /* This variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 64000000; + uint32_t SystemD2Clock = 64000000; + const uint8_t D1CorePrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the FPU setting and vector table location + * configuration. + * @param None + * @retval None + */ +void SystemInit (void) +{ +#if defined (DATA_IN_D2_SRAM) + __IO uint32_t tmpreg; +#endif /* DATA_IN_D2_SRAM */ + + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */ + #endif + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set HSION bit */ + RCC->CR |= RCC_CR_HSION; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000; + + /* Reset HSEON, CSSON , CSION,RC48ON, CSIKERON PLL1ON, PLL2ON and PLL3ON bits */ + RCC->CR &= 0xEAF6ED7FU; + +#if defined(D3_SRAM_BASE) + /* Reset D1CFGR register */ + RCC->D1CFGR = 0x00000000; + + /* Reset D2CFGR register */ + RCC->D2CFGR = 0x00000000; + + /* Reset D3CFGR register */ + RCC->D3CFGR = 0x00000000; +#else + /* Reset CDCFGR1 register */ + RCC->CDCFGR1 = 0x00000000; + + /* Reset CDCFGR2 register */ + RCC->CDCFGR2 = 0x00000000; + + /* Reset SRDCFGR register */ + RCC->SRDCFGR = 0x00000000; +#endif + /* Reset PLLCKSELR register */ + RCC->PLLCKSELR = 0x00000000; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x00000000; + /* Reset PLL1DIVR register */ + RCC->PLL1DIVR = 0x00000000; + /* Reset PLL1FRACR register */ + RCC->PLL1FRACR = 0x00000000; + + /* Reset PLL2DIVR register */ + RCC->PLL2DIVR = 0x00000000; + + /* Reset PLL2FRACR register */ + + RCC->PLL2FRACR = 0x00000000; + /* Reset PLL3DIVR register */ + RCC->PLL3DIVR = 0x00000000; + + /* Reset PLL3FRACR register */ + RCC->PLL3FRACR = 0x00000000; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Disable all interrupts */ + RCC->CIER = 0x00000000; + +#if (STM32H7_DEV_ID == 0x450UL) + /* dual core CM7 or single core line */ + if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U) + { + /* if stm32h7 revY*/ + /* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */ + *((__IO uint32_t*)0x51008108) = 0x000000001U; + } +#endif + +#if defined (DATA_IN_D2_SRAM) + /* in case of initialized data in D2 SRAM (AHB SRAM) , enable the D2 SRAM clock (AHB SRAM clock) */ +#if defined(RCC_AHB2ENR_D2SRAM3EN) + RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN | RCC_AHB2ENR_D2SRAM3EN); +#elif defined(RCC_AHB2ENR_D2SRAM2EN) + RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN); +#else + RCC->AHB2ENR |= (RCC_AHB2ENR_AHBSRAM1EN | RCC_AHB2ENR_AHBSRAM2EN); +#endif /* RCC_AHB2ENR_D2SRAM3EN */ + + tmpreg = RCC->AHB2ENR; + (void) tmpreg; +#endif /* DATA_IN_D2_SRAM */ + +#if defined(DUAL_CORE) && defined(CORE_CM4) + /* Configure the Vector Table location add offset address for cortex-M4 ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = D2_AHBSRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BANK2_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif /* VECT_TAB_SRAM */ + +#else + + /* Configure the Vector Table location add offset address for cortex-M7 ------------------*/ +#if !(BOARD_VTOR_DEFER) //only set VTOR if the bootloader hasn't already + #ifdef VECT_TAB_SRAM + SCB->VTOR = D1_AXISRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal AXI-RAM */ + #else + SCB->VTOR = FLASH_BANK1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ + #endif +#endif + +#endif /*DUAL_CORE && CORE_CM4*/ + +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock , it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is CSI, SystemCoreClock will contain the CSI_VALUE(*) + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * - If SYSCLK source is PLL, SystemCoreClock will contain the CSI_VALUE(*), + * HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors. + * + * (*) CSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value + * 4 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * (**) HSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value + * 64 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***)HSE_VALUE is a constant defined in stm32h7xx_hal.h file (default value + * 25 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t pllp, pllsource, pllm, pllfracen, hsivalue, tmp; + uint32_t common_system_clock; + float_t fracn1, pllvco; + + + /* Get SYSCLK source -------------------------------------------------------*/ + + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ + common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)); + break; + + case RCC_CFGR_SWS_CSI: /* CSI used as system clock source */ + common_system_clock = CSI_VALUE; + break; + + case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ + common_system_clock = HSE_VALUE; + break; + + case RCC_CFGR_SWS_PLL1: /* PLL1 used as system clock source */ + + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); + pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; + pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos); + fracn1 = (float_t)(uint32_t)(pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3)); + + if (pllm != 0U) + { + switch (pllsource) + { + case RCC_PLLCKSELR_PLLSRC_HSI: /* HSI used as PLL clock source */ + + hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ; + pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); + + break; + + case RCC_PLLCKSELR_PLLSRC_CSI: /* CSI used as PLL clock source */ + pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); + break; + + case RCC_PLLCKSELR_PLLSRC_HSE: /* HSE used as PLL clock source */ + pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); + break; + + default: + pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); + break; + } + pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + 1U ) ; + common_system_clock = (uint32_t)(float_t)(pllvco/(float_t)pllp); + } + else + { + common_system_clock = 0U; + } + break; + + default: + common_system_clock = CSI_VALUE; + break; + } + + /* Compute SystemClock frequency --------------------------------------------------*/ +#if defined (RCC_D1CFGR_D1CPRE) + tmp = D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]; + + /* common_system_clock frequency : CM7 CPU frequency */ + common_system_clock >>= tmp; + + /* SystemD2Clock frequency : CM4 CPU, AXI and AHBs Clock frequency */ + SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU)); + +#else + tmp = D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]; + + /* common_system_clock frequency : CM7 CPU frequency */ + common_system_clock >>= tmp; + + /* SystemD2Clock frequency : AXI and AHBs Clock frequency */ + SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_HPRE)>> RCC_CDCFGR1_HPRE_Pos]) & 0x1FU)); + +#endif + +#if defined(DUAL_CORE) && defined(CORE_CM4) + SystemCoreClock = SystemD2Clock; +#else + SystemCoreClock = common_system_clock; +#endif /* DUAL_CORE && CORE_CM4 */ +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/tick.c b/ports/stm/tick.c index f4adf183a..67adc84e3 100644 --- a/ports/stm/tick.c +++ b/ports/stm/tick.c @@ -30,8 +30,6 @@ #include "supervisor/shared/tick.h" #include "shared-bindings/microcontroller/Processor.h" -#include "stm32f4xx.h" - void SysTick_Handler(void) { // SysTick interrupt handler called when the SysTick timer reaches zero // (every millisecond). diff --git a/ports/stm/tick.h b/ports/stm/tick.h index 999acc7a3..17e96362d 100644 --- a/ports/stm/tick.h +++ b/ports/stm/tick.h @@ -23,8 +23,8 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_TICK_H -#define MICROPY_INCLUDED_STM32F4_TICK_H +#ifndef MICROPY_INCLUDED_STM32_TICK_H +#define MICROPY_INCLUDED_STM32_TICK_H #include "py/mpconfig.h" @@ -41,4 +41,4 @@ void current_tick(uint64_t* ms, uint32_t* us_until_ms); // ticks_ms to increment. void wait_until(uint64_t ms, uint32_t us_until_ms); -#endif // MICROPY_INCLUDED_STM32F4_TICK_H +#endif // MICROPY_INCLUDED_STM32_TICK_H diff --git a/ports/stm/tools/parse_af_csv.py b/ports/stm/tools/parse_af_csv.py new file mode 100644 index 000000000..4ab636d79 --- /dev/null +++ b/ports/stm/tools/parse_af_csv.py @@ -0,0 +1,137 @@ +# This file is part of the MicroPython project, http://micropython.org/ +# +# The MIT License (MIT) +# +# Copyright (c) 2020 Lucian Copeland for Adafruit Industries +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +import csv +import sys + +# Use: parse_af_csf.py Filename.csv -pins-only + +# Most peripherals (SPI, I2C) output 3 values: +# peripheral index, alt function, pin string +def evaluate_periph(inper, inlist, periph, subtype, altfn, pin): + # ex) SPI1_SCK,SPI3_SCK/I2S3_CK + # Clean anything after a '\' due to SPI/I2S mixing + if not inper.find('/') == -1: + inper = inper[:inper.find('/')] + + if inper[:len(periph)] == periph and inper[-len(subtype):] == subtype: + inlist.append([inper[len(periph):len(periph)+1], altfn, pin]) + +# Timers (TIM) are a special case with 4 values +# timer index, alt function, channel, pin string +def evaluate_tim(inper, inlist, altfn, pin): + # ex) TIM2_CH1/TIM2_ETR, TIM5_CH1 + # Clean anything after a '\' to filter ETR + if not inper.find('/') == -1: + inper = inper[:inper.find('/')] + + if inper[:3] == "TIM" and inper[5:7] == "CH" and inper[-1:] != 'N': + inlist.append([inper[3:4],altfn,inper[-1:],pin]) + +# Open target file +with open(sys.argv[1]) as csv_file: + csv_reader = csv.reader(csv_file, delimiter=',') + line_count = 0 + + if sys.argv[2] != "-pins-only": + # List of peripheral pin types to read + todo = [ + ["I2C","SDA"], + ["I2C","SCL"], + ["SPI","SCK"], + ["SPI","MOSI"], + ["SPI","MISO"], + ["UART","TX"], + ["UART","RX"]] + + # Make a list of empty lists to populate + outlist = [] + for items in todo: + empty = [] + outlist.append(empty) + # TIM + empty = [] + outlist.append(empty) + + # Each line is a list of strings + for row in csv_reader: + altfn = 0 + pin = row[1] + if len(pin) < 4: + pin = pin[:2] + '0' + pin[2:] + for col in row: + array_index = 0 + # Evaluate the string for every possible todo entry + for item in todo: + evaluate_periph(col, outlist[array_index], item[0], item[1], altfn - 2, pin) + # UART special case, run again for USART variant + if item[0] == "UART": + evaluate_periph(col, outlist[array_index], "USART", item[1], altfn - 2, pin) + array_index += 1 + # TIM special case + evaluate_tim(col, outlist[-1], altfn - 2, pin) + altfn += 1 + line_count += 1 + + # Print formatted output + for i in range(len(todo)): + ins = (todo[i][0]).lower() + '_' + (todo[i][1]).lower() + '_' + # const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4] = { + print("const mcu_" + ins + "obj_t mcu_" + ins + "list[" + str(len(outlist[i])) + "] = {") + for row in outlist[i]: + print(" PERIPH(" + row[0] + ", " + str(row[1]) + ", &pin_" + row[2] + "),") + print("};") + + # Timer special case: + print("const mcu_tim_pin_obj_t mcu_tim_pin_list[" + str(len(outlist[-1])) + "] = {") + for row in outlist[-1]: + print(" TIM(" + row[0] + ", " + str(row[1]) + ", " + str(row[2]) + ", &pin_" + row[3] + "),") + print("};") + + else: + # Format all viable pins listed + # ex) const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); + # ex 2) extern const mcu_pin_obj_t pin_PE02; + # TODO: add ADC detection + outlist = [] + + for row in csv_reader: + altfn = 0 + pin = row[1] + if len(pin) < 4: + pin = pin[:2] + '0' + pin[2:] + outlist.append([pin, str(ord(row[1][1:2]) - 65), row[1][2:4]]) + line_count += 1 + + for line in outlist: + print("const mcu_pin_obj_t pin_" + line[0] + " = PIN(" + line[1] + ", " + line[2] + ", NO_ADC);") + + for line in outlist: + print("extern const mcu_pin_obj_t pin_" + line[0] + ";") + + + + + print(f'Processed {line_count} lines.') + |