diff options
Diffstat (limited to 'ports')
165 files changed, 499 insertions, 571 deletions
diff --git a/ports/atmel-samd/boards/8086_commander/pins.c b/ports/atmel-samd/boards/8086_commander/pins.c index 3eea4009e..728da3f6b 100644 --- a/ports/atmel-samd/boards/8086_commander/pins.c +++ b/ports/atmel-samd/boards/8086_commander/pins.c @@ -2,7 +2,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - // Serial + // Serial { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, // RX { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, // TX diff --git a/ports/atmel-samd/boards/aloriumtech_evo_m51/board.c b/ports/atmel-samd/boards/aloriumtech_evo_m51/board.c index b418d0f1b..1e9ab029e 100644 --- a/ports/atmel-samd/boards/aloriumtech_evo_m51/board.c +++ b/ports/atmel-samd/boards/aloriumtech_evo_m51/board.c @@ -24,7 +24,7 @@ * THE SOFTWARE. */ -// Updated to support Alorium Technology Evo M51 +// Updated to support Alorium Technology Evo M51 // Author: Bryan Craker // Date: 2020-05-20 diff --git a/ports/atmel-samd/boards/capablerobot_usbhub/pins.c b/ports/atmel-samd/boards/capablerobot_usbhub/pins.c index b1966930c..f7ad82c57 100644 --- a/ports/atmel-samd/boards/capablerobot_usbhub/pins.c +++ b/ports/atmel-samd/boards/capablerobot_usbhub/pins.c @@ -4,7 +4,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_ANMB), MP_ROM_PTR(&pin_PA02) }, { MP_OBJ_NEW_QSTR(MP_QSTR_ANVLIM), MP_ROM_PTR(&pin_PA04) }, { MP_OBJ_NEW_QSTR(MP_QSTR_AN5V), MP_ROM_PTR(&pin_PA05) }, - + { MP_OBJ_NEW_QSTR(MP_QSTR_MBPWM), MP_ROM_PTR(&pin_PA14) }, { MP_OBJ_NEW_QSTR(MP_QSTR_MBINT), MP_ROM_PTR(&pin_PA15) }, { MP_OBJ_NEW_QSTR(MP_QSTR_MBCS), MP_ROM_PTR(&pin_PA18) }, diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h index 592160b84..321436c6b 100755 --- a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h @@ -32,4 +32,4 @@ // USB is always used internally so skip the pin objects for it. #define IGNORE_PIN_PA24 1 -#define IGNORE_PIN_PA25 1
\ No newline at end of file +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk index 19e5dd2ab..a71728e2d 100755 --- a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk @@ -15,4 +15,3 @@ CIRCUITPY_BITBANGIO = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CSLAVE = 0 CIRCUITPY_VECTORIO = 0 - diff --git a/ports/atmel-samd/boards/datum_distance/pins.c b/ports/atmel-samd/boards/datum_distance/pins.c index b29a859b6..8e4f1101e 100644 --- a/ports/atmel-samd/boards/datum_distance/pins.c +++ b/ports/atmel-samd/boards/datum_distance/pins.c @@ -14,7 +14,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, - { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, diff --git a/ports/atmel-samd/boards/datum_imu/pins.c b/ports/atmel-samd/boards/datum_imu/pins.c index 237b5774e..eabd2567e 100644 --- a/ports/atmel-samd/boards/datum_imu/pins.c +++ b/ports/atmel-samd/boards/datum_imu/pins.c @@ -16,7 +16,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, - { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, diff --git a/ports/atmel-samd/boards/datum_light/pins.c b/ports/atmel-samd/boards/datum_light/pins.c index b29a859b6..8e4f1101e 100644 --- a/ports/atmel-samd/boards/datum_light/pins.c +++ b/ports/atmel-samd/boards/datum_light/pins.c @@ -14,7 +14,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, - { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, diff --git a/ports/atmel-samd/boards/datum_weather/pins.c b/ports/atmel-samd/boards/datum_weather/pins.c index b29a859b6..8e4f1101e 100644 --- a/ports/atmel-samd/boards/datum_weather/pins.c +++ b/ports/atmel-samd/boards/datum_weather/pins.c @@ -14,7 +14,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, - { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, diff --git a/ports/atmel-samd/boards/escornabot_makech/pins.c b/ports/atmel-samd/boards/escornabot_makech/pins.c index d43d254e7..fefee1919 100644 --- a/ports/atmel-samd/boards/escornabot_makech/pins.c +++ b/ports/atmel-samd/boards/escornabot_makech/pins.c @@ -9,11 +9,11 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { // Buttons { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA03) }, - - + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA00) }, { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA01) }, - + // Motors { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA22) }, { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA11) }, @@ -23,10 +23,10 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA17) }, - + // Buzzer { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA16) }, - + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA09) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA13) }, @@ -34,7 +34,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { //UART { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA01) }, { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA00) }, - + // I2C { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, diff --git a/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.mk index 7cb53bd13..4946788d3 100644 --- a/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.mk @@ -12,4 +12,3 @@ EXTERNAL_FLASH_DEVICES = GD25Q16C LONGINT_IMPL = MPZ CIRCUITPY_VECTORIO = 1 - diff --git a/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.mk b/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.mk index 3aa7c5721..e9d94638a 100755 --- a/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.mk @@ -18,4 +18,3 @@ CIRCUITPY_AUDIOIO = 0 # Too much flash for Korean translations CIRCUITPY_VECTORIO = 0 - diff --git a/ports/atmel-samd/boards/hallowing_m4_express/pins.c b/ports/atmel-samd/boards/hallowing_m4_express/pins.c index 9365ea3ca..388a85d56 100644 --- a/ports/atmel-samd/boards/hallowing_m4_express/pins.c +++ b/ports/atmel-samd/boards/hallowing_m4_express/pins.c @@ -40,7 +40,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA20) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA21) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, - + { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_PB14) }, { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PA27) }, { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PB31) }, diff --git a/ports/atmel-samd/boards/kicksat-sprite/board.c b/ports/atmel-samd/boards/kicksat-sprite/board.c index fc53f3967..75cdfbc82 100644 --- a/ports/atmel-samd/boards/kicksat-sprite/board.c +++ b/ports/atmel-samd/boards/kicksat-sprite/board.c @@ -38,4 +38,4 @@ bool board_requests_safe_mode(void) { } void reset_board(void) { -}
\ No newline at end of file +} diff --git a/ports/atmel-samd/boards/kicksat-sprite/pins.c b/ports/atmel-samd/boards/kicksat-sprite/pins.c index 03af22ff2..87d894c58 100644 --- a/ports/atmel-samd/boards/kicksat-sprite/pins.c +++ b/ports/atmel-samd/boards/kicksat-sprite/pins.c @@ -22,7 +22,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_DAC0), MP_ROM_PTR(&pin_PA02) }, - + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB09) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB08) }, { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA16) }, @@ -30,9 +30,9 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PB03) }, - + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, }; -MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
\ No newline at end of file +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.h b/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.h index 4bd01706d..ed8f15856 100644 --- a/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.h +++ b/ports/atmel-samd/boards/monster_m4sk/mpconfigboard.h @@ -23,6 +23,3 @@ // Enable the use of 2 displays #define CIRCUITPY_DISPLAY_LIMIT (2) - - - diff --git a/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.h b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.h index 869f207a1..51be8d7c0 100644 --- a/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.h +++ b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.h @@ -29,4 +29,3 @@ // USB is always used. #define IGNORE_PIN_PA24 1 #define IGNORE_PIN_PA25 1 - diff --git a/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk index 5e5f0ff5f..09804bc4e 100644 --- a/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk +++ b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk @@ -12,4 +12,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - diff --git a/ports/atmel-samd/boards/ndgarage_ndbit6/pins.c b/ports/atmel-samd/boards/ndgarage_ndbit6/pins.c index 6d1fc53b6..2ea563007 100644 --- a/ports/atmel-samd/boards/ndgarage_ndbit6/pins.c +++ b/ports/atmel-samd/boards/ndgarage_ndbit6/pins.c @@ -23,7 +23,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA04) }, { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, - + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) }, diff --git a/ports/atmel-samd/boards/pycubed/board.c b/ports/atmel-samd/boards/pycubed/board.c index 31b081209..9d29d2a66 100644 --- a/ports/atmel-samd/boards/pycubed/board.c +++ b/ports/atmel-samd/boards/pycubed/board.c @@ -58,4 +58,4 @@ void reset_board(void) { common_hal_nvm_bytearray_get_bytes(&bootcnt,0,1,&value_out); ++value_out; common_hal_nvm_bytearray_set_bytes(&bootcnt,0,&value_out,1); -}
\ No newline at end of file +} diff --git a/ports/atmel-samd/boards/pycubed/mpconfigboard.h b/ports/atmel-samd/boards/pycubed/mpconfigboard.h index 8d046c75b..fc16e22b5 100644 --- a/ports/atmel-samd/boards/pycubed/mpconfigboard.h +++ b/ports/atmel-samd/boards/pycubed/mpconfigboard.h @@ -17,7 +17,7 @@ #define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) -// External flash W25Q80DV +// External flash W25Q80DV #define EXTERNAL_FLASH_QSPI_DUAL #define BOARD_HAS_CRYSTAL 1 diff --git a/ports/atmel-samd/boards/pycubed/pins.c b/ports/atmel-samd/boards/pycubed/pins.c index 4c97f58a8..e494fb54b 100644 --- a/ports/atmel-samd/boards/pycubed/pins.c +++ b/ports/atmel-samd/boards/pycubed/pins.c @@ -40,16 +40,16 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_EN_GPS), MP_ROM_PTR(&pin_PB01) }, { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB02) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB03) }, - + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB12) }, { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB13) }, { MP_ROM_QSTR(MP_QSTR_WDT_WDI), MP_ROM_PTR(&pin_PA23) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA21) }, - + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, - + }; -MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
\ No newline at end of file +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/pycubed_mram/board.c b/ports/atmel-samd/boards/pycubed_mram/board.c index 31b081209..9d29d2a66 100644 --- a/ports/atmel-samd/boards/pycubed_mram/board.c +++ b/ports/atmel-samd/boards/pycubed_mram/board.c @@ -58,4 +58,4 @@ void reset_board(void) { common_hal_nvm_bytearray_get_bytes(&bootcnt,0,1,&value_out); ++value_out; common_hal_nvm_bytearray_set_bytes(&bootcnt,0,&value_out,1); -}
\ No newline at end of file +} diff --git a/ports/atmel-samd/boards/pygamer/pins.c b/ports/atmel-samd/boards/pygamer/pins.c index 7e6eff43f..107d780a8 100644 --- a/ports/atmel-samd/boards/pygamer/pins.c +++ b/ports/atmel-samd/boards/pygamer/pins.c @@ -44,7 +44,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, // SDCS, dup of D4 - { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_PA14) }, // Special named pins { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, diff --git a/ports/atmel-samd/boards/pygamer_advance/pins.c b/ports/atmel-samd/boards/pygamer_advance/pins.c index 9c2284db1..653a1bb2e 100644 --- a/ports/atmel-samd/boards/pygamer_advance/pins.c +++ b/ports/atmel-samd/boards/pygamer_advance/pins.c @@ -44,7 +44,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, // SDCS, dup of D4 - { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_PA14) }, // Special named pins { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, diff --git a/ports/atmel-samd/boards/robohatmm1_m4/pins.c b/ports/atmel-samd/boards/robohatmm1_m4/pins.c index 4fc290fb0..74dcfd651 100644 --- a/ports/atmel-samd/boards/robohatmm1_m4/pins.c +++ b/ports/atmel-samd/boards/robohatmm1_m4/pins.c @@ -83,7 +83,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_SWCLK), MP_ROM_PTR(&pin_PA30) }, { MP_ROM_QSTR(MP_QSTR_PI_GP24), MP_ROM_PTR(&pin_PA31) }, { MP_ROM_QSTR(MP_QSTR_SWDIO), MP_ROM_PTR(&pin_PA31) }, - + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, //{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, diff --git a/ports/atmel-samd/boards/sam32/board.c b/ports/atmel-samd/boards/sam32/board.c index 7a23d3007..e03260144 100644 --- a/ports/atmel-samd/boards/sam32/board.c +++ b/ports/atmel-samd/boards/sam32/board.c @@ -49,4 +49,4 @@ void reset_board(void) { common_hal_digitalio_digitalinout_switch_to_output(&neopixel, false, DRIVE_MODE_PUSH_PULL); common_hal_neopixel_write(&neopixel, zeroes, 96); common_hal_digitalio_digitalinout_deinit(&neopixel); -}
\ No newline at end of file +} diff --git a/ports/atmel-samd/boards/sam32/mpconfigboard.mk b/ports/atmel-samd/boards/sam32/mpconfigboard.mk index 118744935..1dc686ef8 100644 --- a/ports/atmel-samd/boards/sam32/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sam32/mpconfigboard.mk @@ -14,4 +14,4 @@ CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_USTACK = 1 FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel
\ No newline at end of file +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel diff --git a/ports/atmel-samd/boards/sam32/pins.c b/ports/atmel-samd/boards/sam32/pins.c index f0a5b2b62..463615960 100644 --- a/ports/atmel-samd/boards/sam32/pins.c +++ b/ports/atmel-samd/boards/sam32/pins.c @@ -42,12 +42,12 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_TDI), MP_ROM_PTR(&pin_PB02) }, { MP_ROM_QSTR(MP_QSTR_TMS), MP_ROM_PTR(&pin_PB03) }, { MP_ROM_QSTR(MP_QSTR_ESP_CS),MP_ROM_PTR(&pin_PB15) }, - + { MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_PA12) }, { MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_PA13) }, { MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_PB16) }, { MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_PB17) }, - + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, @@ -56,11 +56,11 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA27) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, - + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PA06) }, - + }; -MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
\ No newline at end of file +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/serpente/pins.c b/ports/atmel-samd/boards/serpente/pins.c index 0bf686656..7b7b14799 100644 --- a/ports/atmel-samd/boards/serpente/pins.c +++ b/ports/atmel-samd/boards/serpente/pins.c @@ -37,4 +37,3 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); - diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/pins.c b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/pins.c index f9d755d93..9562dc3b8 100644 --- a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/pins.c +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/pins.c @@ -21,14 +21,14 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA10) }, { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA22) }, { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PA23) }, - + // External SPI { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA05) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, - // UART + // UART { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA22) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA23) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/pins.c b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/pins.c index f9d755d93..9562dc3b8 100644 --- a/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/pins.c +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/pins.c @@ -21,14 +21,14 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA10) }, { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA22) }, { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PA23) }, - + // External SPI { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA05) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, - // UART + // UART { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA22) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA23) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, diff --git a/ports/atmel-samd/common-hal/countio/Counter.c b/ports/atmel-samd/common-hal/countio/Counter.c index db5b325b8..d2e3fae63 100644 --- a/ports/atmel-samd/common-hal/countio/Counter.c +++ b/ports/atmel-samd/common-hal/countio/Counter.c @@ -25,20 +25,20 @@ void common_hal_countio_counter_construct(countio_counter_obj_t* self, // These default settings apply when the EIC isn't yet enabled. self->eic_channel_a = pin_a->extint_channel; - + self->pin_a = pin_a->number; - + gpio_set_pin_function(self->pin_a, GPIO_PIN_FUNCTION_A); gpio_set_pin_pull_mode(self->pin_a, GPIO_PULL_UP); set_eic_channel_data(self->eic_channel_a, (void*) self); self->count = 0; - + claim_pin(pin_a); - - + + set_eic_handler(self->eic_channel_a, EIC_HANDLER_COUNTER); turn_on_eic_channel(self->eic_channel_a, EIC_CONFIG_SENSE0_FALL_Val); @@ -77,7 +77,7 @@ void common_hal_countio_counter_reset(countio_counter_obj_t* self){ void counter_interrupt_handler(uint8_t channel) { countio_counter_obj_t* self = get_eic_channel_data(channel); - + self->count += 1; - + } diff --git a/ports/atmel-samd/common-hal/neopixel_write/__init__.c b/ports/atmel-samd/common-hal/neopixel_write/__init__.c index 175527025..5c79f72a4 100644 --- a/ports/atmel-samd/common-hal/neopixel_write/__init__.c +++ b/ports/atmel-samd/common-hal/neopixel_write/__init__.c @@ -150,4 +150,3 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout, mp_hal_enable_all_interrupts(); } - diff --git a/ports/atmel-samd/common-hal/supervisor/__init__.c b/ports/atmel-samd/common-hal/supervisor/__init__.c index ac88556b4..6dca35fb5 100755 --- a/ports/atmel-samd/common-hal/supervisor/__init__.c +++ b/ports/atmel-samd/common-hal/supervisor/__init__.c @@ -37,4 +37,4 @@ const super_runtime_obj_t common_hal_supervisor_runtime_obj = { .base = { .type = &supervisor_runtime_type, }, -};
\ No newline at end of file +}; diff --git a/ports/cxd56/boards/spresense/mpconfigboard.h b/ports/cxd56/boards/spresense/mpconfigboard.h index c53f6b418..adfcbacb9 100644 --- a/ports/cxd56/boards/spresense/mpconfigboard.h +++ b/ports/cxd56/boards/spresense/mpconfigboard.h @@ -38,4 +38,3 @@ #define DEFAULT_UART_BUS_TX (&pin_UART2_TXD) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) - diff --git a/ports/cxd56/common-hal/busio/I2C.c b/ports/cxd56/common-hal/busio/I2C.c index c163c183a..127b6e75c 100644 --- a/ports/cxd56/common-hal/busio/I2C.c +++ b/ports/cxd56/common-hal/busio/I2C.c @@ -79,7 +79,7 @@ bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) { bool common_hal_busio_i2c_has_lock(busio_i2c_obj_t *self) { return self->has_lock; } - + void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) { self->has_lock = false; } diff --git a/ports/cxd56/common-hal/busio/SPI.c b/ports/cxd56/common-hal/busio/SPI.c index 9a41011f2..718a8ff16 100644 --- a/ports/cxd56/common-hal/busio/SPI.c +++ b/ports/cxd56/common-hal/busio/SPI.c @@ -31,7 +31,7 @@ #include "shared-bindings/busio/SPI.h" -void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t *clock, +void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t *clock, const mcu_pin_obj_t *mosi, const mcu_pin_obj_t *miso) { int port = -1; diff --git a/ports/cxd56/common-hal/pulseio/PulseOut.c b/ports/cxd56/common-hal/pulseio/PulseOut.c index 5e1d5a2ed..21b4c77e5 100644 --- a/ports/cxd56/common-hal/pulseio/PulseOut.c +++ b/ports/cxd56/common-hal/pulseio/PulseOut.c @@ -63,7 +63,7 @@ void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t *self, if (pulse_fd < 0) { pulse_fd = open("/dev/timer0", O_RDONLY); } - + if (pulse_fd < 0) { mp_raise_RuntimeError(translate("All timers in use")); } diff --git a/ports/cxd56/mkspk/.gitignore b/ports/cxd56/mkspk/.gitignore index e9a6ab18f..4c3d12e3a 100644 --- a/ports/cxd56/mkspk/.gitignore +++ b/ports/cxd56/mkspk/.gitignore @@ -1,3 +1,2 @@ /mkspk /mkspk.exe - diff --git a/ports/cxd56/supervisor/port.c b/ports/cxd56/supervisor/port.c index a7e9c30a3..a40d31faf 100644 --- a/ports/cxd56/supervisor/port.c +++ b/ports/cxd56/supervisor/port.c @@ -146,4 +146,3 @@ void port_interrupt_after_ticks(uint32_t ticks) { void port_sleep_until_interrupt(void) { // TODO: Implement sleep. } - diff --git a/ports/esp32s2/common-hal/supervisor/Runtime.c b/ports/esp32s2/common-hal/supervisor/Runtime.c index feab6987d..ea663f897 100644 --- a/ports/esp32s2/common-hal/supervisor/Runtime.c +++ b/ports/esp32s2/common-hal/supervisor/Runtime.c @@ -35,4 +35,3 @@ bool common_hal_get_serial_connected(void) { bool common_hal_get_serial_bytes_available(void) { return (bool) serial_bytes_available(); } - diff --git a/ports/esp32s2/common-hal/supervisor/__init__.c b/ports/esp32s2/common-hal/supervisor/__init__.c index ac88556b4..6dca35fb5 100644 --- a/ports/esp32s2/common-hal/supervisor/__init__.c +++ b/ports/esp32s2/common-hal/supervisor/__init__.c @@ -37,4 +37,4 @@ const super_runtime_obj_t common_hal_supervisor_runtime_obj = { .base = { .type = &supervisor_runtime_type, }, -};
\ No newline at end of file +}; diff --git a/ports/esp32s2/supervisor/internal_flash.c b/ports/esp32s2/supervisor/internal_flash.c index ef216c4b1..a8d3fa485 100644 --- a/ports/esp32s2/supervisor/internal_flash.c +++ b/ports/esp32s2/supervisor/internal_flash.c @@ -121,4 +121,3 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32 void supervisor_flash_release_cache(void) { } - diff --git a/ports/esp32s2/supervisor/usb.c b/ports/esp32s2/supervisor/usb.c index 8bba84015..39eb8204f 100644 --- a/ports/esp32s2/supervisor/usb.c +++ b/ports/esp32s2/supervisor/usb.c @@ -88,4 +88,3 @@ void init_usb_hardware(void) { usb_device_stack, &usb_device_taskdef); } - diff --git a/ports/litex/common-hal/supervisor/Runtime.c b/ports/litex/common-hal/supervisor/Runtime.c index feab6987d..ea663f897 100644 --- a/ports/litex/common-hal/supervisor/Runtime.c +++ b/ports/litex/common-hal/supervisor/Runtime.c @@ -35,4 +35,3 @@ bool common_hal_get_serial_connected(void) { bool common_hal_get_serial_bytes_available(void) { return (bool) serial_bytes_available(); } - diff --git a/ports/litex/common-hal/supervisor/__init__.c b/ports/litex/common-hal/supervisor/__init__.c index ac88556b4..6dca35fb5 100644 --- a/ports/litex/common-hal/supervisor/__init__.c +++ b/ports/litex/common-hal/supervisor/__init__.c @@ -37,4 +37,4 @@ const super_runtime_obj_t common_hal_supervisor_runtime_obj = { .base = { .type = &supervisor_runtime_type, }, -};
\ No newline at end of file +}; diff --git a/ports/litex/hw/common.h b/ports/litex/hw/common.h index 6a97ca2e9..b902bc4f2 100644 --- a/ports/litex/hw/common.h +++ b/ports/litex/hw/common.h @@ -30,4 +30,4 @@ static inline uint32_t csr_readl(uint32_t addr) { return *(volatile uint32_t *)addr; } -#endif /* _HW_COMMON_H_ */
\ No newline at end of file +#endif /* _HW_COMMON_H_ */ diff --git a/ports/litex/irq.h b/ports/litex/irq.h index a82218907..dc96c228d 100644 --- a/ports/litex/irq.h +++ b/ports/litex/irq.h @@ -68,4 +68,4 @@ static inline unsigned int irq_pending(void) } #endif -#endif /* __IRQ_H */
\ No newline at end of file +#endif /* __IRQ_H */ diff --git a/ports/litex/supervisor/internal_flash.c b/ports/litex/supervisor/internal_flash.c index 2dbf46b3a..cf777a8ac 100644 --- a/ports/litex/supervisor/internal_flash.c +++ b/ports/litex/supervisor/internal_flash.c @@ -348,4 +348,3 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32 void supervisor_flash_release_cache(void) { } - diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c index 80a57f17b..43ffe0dd1 100644 --- a/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c @@ -45,7 +45,7 @@ const flexspi_nor_config_t qspiflash_config = { #ifdef BOARD_USING_SECONDARY_QSPI_PINMUX .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromInternally, #else - .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, #endif .csHoldTime = 1u, .csSetupTime = 2u, diff --git a/ports/mimxrt10xx/common-hal/busio/SPI.c b/ports/mimxrt10xx/common-hal/busio/SPI.c index ef34e6172..c51aef4da 100644 --- a/ports/mimxrt10xx/common-hal/busio/SPI.c +++ b/ports/mimxrt10xx/common-hal/busio/SPI.c @@ -87,7 +87,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, //if both MOSI and MISO exist, loop search normally if ((mosi != NULL) && (miso != NULL)) { for (uint j = 0; j < mosi_count; j++) { - if ((mcu_spi_mosi_list[i].pin != mosi) + if ((mcu_spi_mosi_list[i].pin != mosi) || (mcu_spi_sck_list[i].bank_idx != mcu_spi_mosi_list[j].bank_idx)){ continue; } diff --git a/ports/mimxrt10xx/common-hal/busio/UART.c b/ports/mimxrt10xx/common-hal/busio/UART.c index a517dc7b5..5ef347e59 100644 --- a/ports/mimxrt10xx/common-hal/busio/UART.c +++ b/ports/mimxrt10xx/common-hal/busio/UART.c @@ -109,7 +109,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, // If TX is on, keep looking, else stop if (tx != NULL) { for (uint32_t j = 0; j < tx_count; ++j) { - if (mcu_uart_tx_list[j].pin != tx || + if (mcu_uart_tx_list[j].pin != tx || mcu_uart_tx_list[j].bank_idx != mcu_uart_rx_list[i].bank_idx) { continue; } @@ -291,7 +291,7 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { } else { reserved_uart[self->tx->bank_idx - 1] = false; } - + LPUART_Deinit(self->uart); gc_free(self->ringbuf); diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Pin.c b/ports/mimxrt10xx/common-hal/microcontroller/Pin.c index 233e66006..a005924e2 100644 --- a/ports/mimxrt10xx/common-hal/microcontroller/Pin.c +++ b/ports/mimxrt10xx/common-hal/microcontroller/Pin.c @@ -41,8 +41,8 @@ STATIC bool claimed_pins[IOMUXC_SW_PAD_CTL_PAD_COUNT]; STATIC bool never_reset_pins[IOMUXC_SW_PAD_CTL_PAD_COUNT]; // There are two numbering systems used here: -// IOMUXC index, used for iterating through pins and accessing reset information, -// and GPIO port and number, used to store claimed and reset tagging. The two number +// IOMUXC index, used for iterating through pins and accessing reset information, +// and GPIO port and number, used to store claimed and reset tagging. The two number // systems are not related and one cannot determine the other without a pin object void reset_all_pins(void) { for (uint8_t i = 0; i < IOMUXC_SW_PAD_CTL_PAD_COUNT; i++) { @@ -64,8 +64,8 @@ void reset_all_pins(void) { #endif } -// Since i.MX pins need extra register and reset information to reset properly, -// resetting pins by number alone has been removed. +// Since i.MX pins need extra register and reset information to reset properly, +// resetting pins by number alone has been removed. void common_hal_reset_pin(const mcu_pin_obj_t* pin) { never_reset_pins[pin->mux_idx] = false; claimed_pins[pin->mux_idx] = false; diff --git a/ports/mimxrt10xx/common-hal/supervisor/__init__.c b/ports/mimxrt10xx/common-hal/supervisor/__init__.c index ac88556b4..6dca35fb5 100755 --- a/ports/mimxrt10xx/common-hal/supervisor/__init__.c +++ b/ports/mimxrt10xx/common-hal/supervisor/__init__.c @@ -37,4 +37,4 @@ const super_runtime_obj_t common_hal_supervisor_runtime_obj = { .base = { .type = &supervisor_runtime_type, }, -};
\ No newline at end of file +}; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c index 3e2c6972b..a994e154d 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c @@ -115,7 +115,7 @@ const mcu_periph_obj_t mcu_uart_tx_list[9] = { const mcu_periph_obj_t mcu_uart_rts_list[4] = { PERIPH_PIN(1, 6, 0, 0, &pin_GPIO_07), - + PERIPH_PIN(2, 3, 0, 0, &pin_GPIO_AD_07), PERIPH_PIN(3, 1, 0, 0, &pin_GPIO_AD_13), diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c index 814b4120d..3d043a14e 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c @@ -160,7 +160,7 @@ const mcu_periph_obj_t mcu_uart_tx_list[16] = { const mcu_periph_obj_t mcu_uart_rts_list[10] = { PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_09), - + PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_EMC_21), PERIPH_PIN(2, 2, 0, 1, &pin_GPIO_AD_B1_07), diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c index 388a1b014..fd1e4ddb8 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c @@ -165,7 +165,7 @@ const mcu_periph_obj_t mcu_uart_tx_list[18] = { const mcu_periph_obj_t mcu_uart_rts_list[9] = { PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_15), - + PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_AD_B1_01), PERIPH_PIN(3, 2, 0, 0, &pin_GPIO_AD_B1_05), @@ -188,7 +188,7 @@ const mcu_periph_obj_t mcu_uart_cts_list[9] = { PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_AD_B1_00), PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 0, &pin_GPIO_EMC_15), - PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 1, &pin_GPIO_AD_B1_04), + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 1, &pin_GPIO_AD_B1_04), PERIPH_PIN(4, 2, 0, 0, &pin_GPIO_EMC_17), diff --git a/ports/mimxrt10xx/supervisor/internal_flash.c b/ports/mimxrt10xx/supervisor/internal_flash.c index 4f52748ed..9abd15e60 100644 --- a/ports/mimxrt10xx/supervisor/internal_flash.c +++ b/ports/mimxrt10xx/supervisor/internal_flash.c @@ -254,4 +254,3 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32 void supervisor_flash_release_cache(void) { } - diff --git a/ports/mimxrt10xx/supervisor/port.c b/ports/mimxrt10xx/supervisor/port.c index acec3cf72..ed5824732 100644 --- a/ports/mimxrt10xx/supervisor/port.c +++ b/ports/mimxrt10xx/supervisor/port.c @@ -257,7 +257,7 @@ safe_mode_t port_init(void) { // enabled. It won't occur very often so it'll be low overhead. NVIC_EnableIRQ(SNVS_HP_WRAPPER_IRQn); - // Note that `reset_port` CANNOT GO HERE, unlike other ports, because `board_init` hasn't been + // Note that `reset_port` CANNOT GO HERE, unlike other ports, because `board_init` hasn't been // run yet, which uses `never_reset` to protect critical pins from being reset by `reset_port`. if (board_requests_safe_mode()) { diff --git a/ports/mimxrt10xx/supervisor/serial.c b/ports/mimxrt10xx/supervisor/serial.c index 22c979cf9..01656a819 100644 --- a/ports/mimxrt10xx/supervisor/serial.c +++ b/ports/mimxrt10xx/supervisor/serial.c @@ -90,4 +90,3 @@ void serial_write_substring(const char *text, uint32_t len) { LPUART_WriteBlocking(uart_instance, (uint8_t*)text, len); } - diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/doc/ble_api.dox b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/doc/ble_api.dox index a444c5e4e..ecabf96aa 100644 --- a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/doc/ble_api.dox +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/doc/ble_api.dox @@ -968,11 +968,11 @@ * |||; * SD<-ADVERTISERS [label = "Scannable Advertisement (ADV_SCAN_IND)", textcolor="#000080", linecolor="#000080"]; * SD->ADVERTISERS [label = "Scan Request (SCAN_REQ)", textcolor="#000080", linecolor="#000080"]; - * SD<-ADVERTISERS [label = "Scan Response (SCAN_RSP)", textcolor="#000080", linecolor="#000080"]; + * SD<-ADVERTISERS [label = "Scan Response (SCAN_RSP)", textcolor="#000080", linecolor="#000080"]; * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {bdaddr, rssi, data}"]; - * ...; - * APP<<=SD [label = "BLE_GAP_EVT_TIMEOUT {BLE_GAP_TIMEOUT_SRC_SCAN}"]; - * |||; + * ...; + * APP<<=SD [label = "BLE_GAP_EVT_TIMEOUT {BLE_GAP_TIMEOUT_SRC_SCAN}"]; + * |||; * @endmsc * @defgroup BLE_GAP_SCAN_MSC_AE Scanning for advertisers performing legacy and extended advertising * @msc @@ -1011,7 +1011,7 @@ * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {type : {extended_pdu = 1, scannable = 1, scan_response = 1}, data}"]; * APP=>SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; * APP<<SD [label = "NRF_SUCCESS"]; - * SD<-ADVERTISERS [label = "Legacy Scannable Advertisement (ADV_SCAN_IND) with adv_data ", textcolor="#000080", linecolor="#000080"]; + * SD<-ADVERTISERS [label = "Legacy Scannable Advertisement (ADV_SCAN_IND) with adv_data ", textcolor="#000080", linecolor="#000080"]; * SD->ADVERTISERS [label = "Legacy Scan Request (SCAN_REQ)", textcolor="#000080", linecolor="#000080"]; * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {type : {extended_pdu = 0, scannable = 1, scan_response = 0}, adv_data}"]; * APP=>SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; @@ -1030,8 +1030,8 @@ * --- [label = " Variant #2 Reporting incomplete advertising reports"]; * |||; * APP=>SD [label = "sd_ble_gap_scan_start(params : {extended = 1, report_incomplete_evts = 1}, adv_report_buffer)"]; - * APP<<SD [label = "NRF_SUCCESS"]; - * |||; + * APP<<SD [label = "NRF_SUCCESS"]; + * |||; * SD<-ADVERTISERS [label = "Advertisement (ADV_*_IND)", textcolor="#000080", linecolor="#000080"]; * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {type : status = BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, aux_pointer}"]; * |||; @@ -1052,7 +1052,7 @@ * @defgroup BLE_GAP_CENTRAL_CONN_MSC Central Connection Establishment and Termination * @{ * @defgroup BLE_GAP_CENTRAL_CONN_MSC_LEGACY Connecting to legacy advertisers - + * @msc * hscale = "1.5"; * APP,SD,PERIPHERAL; @@ -1114,9 +1114,9 @@ * SD rbox SD [label = "Connection timeout reached"]; * |||; * APP<<=SD [label = "BLE_GAP_EVT_TIMEOUT {BLE_GAP_TIMEOUT_SRC_CONN}"]; - * @endmsc + * @endmsc * @} - + * * @defgroup BLE_GAP_CENTRAL_CPU_MSC Central Connection Parameter Update * @msc @@ -1868,7 +1868,7 @@ * APP=>SD [label = "sd_ble_gap_privacy_set(params: {mode: DEVICE_PRIVACY, private_addr_type: RESOLVABLE } "]; * APP<<SD [label = "NRF_SUCCESS"]; * |||; - + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: {{peer_addr1, peer_irk1}}, pp_local_irks: {local_irk1}) "]; * APP<<SD [label = "NRF_SUCCESS"]; * |||; @@ -3894,4 +3894,3 @@ * @} * @} */ - diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble.h index da1a06bbc..e2abcd7ad 100644 --- a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble.h +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble.h @@ -521,7 +521,7 @@ SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_v /**@brief Remove a Vendor Specific base UUID. - * + * * @details This call removes a Vendor Specific base UUID that has been added with @ref sd_ble_uuid_vs_add. This function allows * the application to reuse memory allocated for Vendor Specific base UUIDs. * diff --git a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gap.h b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gap.h index a130d7b51..6750e742f 100644 --- a/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gap.h +++ b/ports/nrf/bluetooth/s140_nrf52_6.1.0/s140_nrf52_6.1.0_API/include/ble_gap.h @@ -1664,7 +1664,7 @@ SVCALL(SD_BLE_GAP_ADDR_GET, uint32_t, sd_ble_gap_addr_get(ble_gap_addr_t *p_addr * * @retval ::NRF_SUCCESS Address successfully retrieved. * @retval ::NRF_ERROR_INVALID_ADDR Invalid or NULL pointer supplied. - * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. + * @retval ::BLE_ERROR_INVALID_ADV_HANDLE The provided advertising handle was not found. * @retval ::NRF_ERROR_INVALID_STATE The advertising set is currently not advertising. */ SVCALL(SD_BLE_GAP_ADV_ADDR_GET, uint32_t, sd_ble_gap_adv_addr_get(uint8_t adv_handle, ble_gap_addr_t *p_addr)); diff --git a/ports/nrf/bluetooth/s140_nrf52_7.0.1/s140_nrf52_7.0.1_API/doc/ble_api.dox b/ports/nrf/bluetooth/s140_nrf52_7.0.1/s140_nrf52_7.0.1_API/doc/ble_api.dox index 6cdfc8870..ceebf55a7 100644 --- a/ports/nrf/bluetooth/s140_nrf52_7.0.1/s140_nrf52_7.0.1_API/doc/ble_api.dox +++ b/ports/nrf/bluetooth/s140_nrf52_7.0.1/s140_nrf52_7.0.1_API/doc/ble_api.dox @@ -968,11 +968,11 @@ * |||; * SD<-ADVERTISERS [label = "Scannable Advertisement (ADV_SCAN_IND)", textcolor="#000080", linecolor="#000080"]; * SD->ADVERTISERS [label = "Scan Request (SCAN_REQ)", textcolor="#000080", linecolor="#000080"]; - * SD<-ADVERTISERS [label = "Scan Response (SCAN_RSP)", textcolor="#000080", linecolor="#000080"]; + * SD<-ADVERTISERS [label = "Scan Response (SCAN_RSP)", textcolor="#000080", linecolor="#000080"]; * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {bdaddr, rssi, data}"]; - * ...; - * APP<<=SD [label = "BLE_GAP_EVT_TIMEOUT {BLE_GAP_TIMEOUT_SRC_SCAN}"]; - * |||; + * ...; + * APP<<=SD [label = "BLE_GAP_EVT_TIMEOUT {BLE_GAP_TIMEOUT_SRC_SCAN}"]; + * |||; * @endmsc * @defgroup BLE_GAP_SCAN_MSC_AE Scanning for advertisers performing legacy and extended advertising * @msc @@ -1011,7 +1011,7 @@ * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {type : {extended_pdu = 1, scannable = 1, scan_response = 1}, data}"]; * APP=>SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; * APP<<SD [label = "NRF_SUCCESS"]; - * SD<-ADVERTISERS [label = "Legacy Scannable Advertisement (ADV_SCAN_IND) with adv_data ", textcolor="#000080", linecolor="#000080"]; + * SD<-ADVERTISERS [label = "Legacy Scannable Advertisement (ADV_SCAN_IND) with adv_data ", textcolor="#000080", linecolor="#000080"]; * SD->ADVERTISERS [label = "Legacy Scan Request (SCAN_REQ)", textcolor="#000080", linecolor="#000080"]; * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {type : {extended_pdu = 0, scannable = 1, scan_response = 0}, adv_data}"]; * APP=>SD [label = "sd_ble_gap_scan_start(params = NULL, adv_report_buffer)"]; @@ -1030,8 +1030,8 @@ * --- [label = " Variant #2 Reporting incomplete advertising reports"]; * |||; * APP=>SD [label = "sd_ble_gap_scan_start(params : {extended = 1, report_incomplete_evts = 1}, adv_report_buffer)"]; - * APP<<SD [label = "NRF_SUCCESS"]; - * |||; + * APP<<SD [label = "NRF_SUCCESS"]; + * |||; * SD<-ADVERTISERS [label = "Advertisement (ADV_*_IND)", textcolor="#000080", linecolor="#000080"]; * APP<<=SD [label = "BLE_GAP_EVT_ADV_REPORT {type : status = BLE_GAP_ADV_DATA_STATUS_INCOMPLETE_MORE_DATA, aux_pointer}"]; * |||; @@ -1052,7 +1052,7 @@ * @defgroup BLE_GAP_CENTRAL_CONN_MSC Central Connection Establishment and Termination * @{ * @defgroup BLE_GAP_CENTRAL_CONN_MSC_LEGACY Connecting to legacy advertisers - + * @msc * hscale = "1.5"; * APP,SD,PERIPHERAL; @@ -1114,9 +1114,9 @@ * SD rbox SD [label = "Connection timeout reached"]; * |||; * APP<<=SD [label = "BLE_GAP_EVT_TIMEOUT {BLE_GAP_TIMEOUT_SRC_CONN}"]; - * @endmsc + * @endmsc * @} - + * * @defgroup BLE_GAP_CENTRAL_CPU_MSC Central Connection Parameter Update * @msc @@ -1868,7 +1868,7 @@ * APP=>SD [label = "sd_ble_gap_privacy_set(params: {mode: DEVICE_PRIVACY, private_addr_type: RESOLVABLE } "]; * APP<<SD [label = "NRF_SUCCESS"]; * |||; - + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: {peer_addr1, peer_irk1}, pp_local_irks: {local_irk1}) "]; * APP<<SD [label = "NRF_SUCCESS"]; * |||; @@ -1970,7 +1970,7 @@ * hscale = "1.5"; * APP,SD,ADVERTISERS; * |||; - + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: {peer_addr1, peer_irk1}, pp_local_irks: NULL) "]; * APP<<SD [label = "NRF_SUCCESS"]; * |||; @@ -2022,7 +2022,7 @@ * |||; * --- [label = " Variant #4 Scan directed advertisers and resolve initiator address using local IRK in device identity list"]; * |||; - + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: {peer_addr1, peer_irk1}, pp_local_irks: local_irk1) "]; * APP<<SD [label = "NRF_SUCCESS"]; * |||; @@ -2054,7 +2054,7 @@ * |||; * --- [label = " Variant #1 Advertise directed to private peer"]; * |||; - + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: {peer_addr1, peer_irk1}, pp_local_irks: NULL) "]; * APP<<SD [label = "NRF_SUCCESS"]; * |||; @@ -2070,7 +2070,7 @@ * |||; * --- [label = " Variant #2 Private directed advertising to private peer using device IRK"]; * |||; - + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: {peer_addr1, peer_irk1}, pp_local_irks: NULL) "]; * APP<<SD [label = "NRF_SUCCESS"]; * |||; @@ -2089,7 +2089,7 @@ * |||; * --- [label = " Variant #3 Private directed advertising to private peer using local IRK in device identity list"]; * |||; - + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: {peer_addr1, peer_irk1}, pp_local_irks: {local_irk1}) "]; * APP<<SD [label = "NRF_SUCCESS"]; * |||; @@ -2132,7 +2132,7 @@ * hscale = "1.5"; * APP,SD,CENTRAL; * |||; - + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: {peer_addr1, peer_irk1}, pp_local_irks: NULL) "]; * APP<<SD [label = "NRF_SUCCESS"]; * |||; @@ -2157,7 +2157,7 @@ * hscale = "1.5"; * APP,SD,PERIPHERAL; * |||; - + * APP=>SD [label = "sd_ble_gap_device_identities_set(pp_id_keys: {peer_addr1, peer_irk1}, pp_local_irks: NULL) "]; * APP<<SD [label = "NRF_SUCCESS"]; * |||; @@ -2346,7 +2346,7 @@ * APP<<SD [label = "NRF_SUCCESS"]; * SD:>PEER [label = "LL Length Request (LL_LENGTH_REQ) {tx=251, rx=251}", textcolor="#000080", linecolor="#000080"]; * SD<:PEER [label = "LL Length Response (LL_LENGTH_RSP) {tx=251, rx=251}", textcolor="#000080", linecolor="#000080"]; - + * APP<<=SD [label = "BLE_GAP_EVT_DATA_LENGTH_UPDATE {.effective_params={.max_tx_octets=251, .max_rx_octets=251, .max_tx_time_us=2120, .max_rx_time_us=2120}}"]; * |||; * ...; @@ -3927,4 +3927,3 @@ * @} * @} */ - diff --git a/ports/nrf/bluetooth/s140_nrf52_7.0.1/s140_nrf52_7.0.1_API/include/ble.h b/ports/nrf/bluetooth/s140_nrf52_7.0.1/s140_nrf52_7.0.1_API/include/ble.h index 39944854c..d17ac9a59 100644 --- a/ports/nrf/bluetooth/s140_nrf52_7.0.1/s140_nrf52_7.0.1_API/include/ble.h +++ b/ports/nrf/bluetooth/s140_nrf52_7.0.1/s140_nrf52_7.0.1_API/include/ble.h @@ -89,7 +89,7 @@ enum BLE_COMMON_SVCS */ enum BLE_COMMON_EVTS { - BLE_EVT_USER_MEM_REQUEST = BLE_EVT_BASE + 0, /**< User Memory request. See @ref ble_evt_user_mem_request_t + BLE_EVT_USER_MEM_REQUEST = BLE_EVT_BASE + 0, /**< User Memory request. See @ref ble_evt_user_mem_request_t \n Reply with @ref sd_ble_user_mem_reply. */ BLE_EVT_USER_MEM_RELEASE = BLE_EVT_BASE + 1, /**< User Memory release. See @ref ble_evt_user_mem_release_t */ }; @@ -389,10 +389,10 @@ typedef union * application RAM region (APP_RAM_BASE). On return, this will * contain the minimum start address of the application RAM region * required by the SoftDevice for this configuration. - * @warning After this call, the SoftDevice may generate several events. The list of events provided - * below require the application to initiate a SoftDevice API call. The corresponding API call - * is referenced in the event documentation. - * If the application fails to do so, the BLE connection may timeout, or the SoftDevice may stop + * @warning After this call, the SoftDevice may generate several events. The list of events provided + * below require the application to initiate a SoftDevice API call. The corresponding API call + * is referenced in the event documentation. + * If the application fails to do so, the BLE connection may timeout, or the SoftDevice may stop * communicating with the peer device. * - @ref BLE_GAP_EVT_CONN_PARAM_UPDATE_REQUEST * - @ref BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST @@ -537,7 +537,7 @@ SVCALL(SD_BLE_UUID_VS_ADD, uint32_t, sd_ble_uuid_vs_add(ble_uuid128_t const *p_v /**@brief Remove a Vendor Specific base UUID. - * + * * @details This call removes a Vendor Specific base UUID that has been added with @ref sd_ble_uuid_vs_add. This function allows * the application to reuse memory allocated for Vendor Specific base UUIDs. * diff --git a/ports/nrf/boards/electronut_labs_papyr/README.md b/ports/nrf/boards/electronut_labs_papyr/README.md index fda390193..7e5c43cc8 100644 --- a/ports/nrf/boards/electronut_labs_papyr/README.md +++ b/ports/nrf/boards/electronut_labs_papyr/README.md @@ -4,7 +4,7 @@ The `Electronut Labs Papyr` board is based on the `nRF52840` SoC from Nordic Semiconductors. It has an e-ink display on it, along with a CR2477 battery holder. -Papyr can be programmed with the [`Adafruit nRF52 bootloader`](https://github.com/adafruit/Adafruit_nRF52_Bootloader) to +Papyr can be programmed with the [`Adafruit nRF52 bootloader`](https://github.com/adafruit/Adafruit_nRF52_Bootloader) to Schematic, datasheet default pin mapping etc. can be found over [here](https://docs.electronut.in/papyr/). The default pin mapping can be found in the board directory. diff --git a/ports/nrf/boards/hiibot_bluefi/mpconfigboard.h b/ports/nrf/boards/hiibot_bluefi/mpconfigboard.h index c4833e719..4b7a884cf 100644 --- a/ports/nrf/boards/hiibot_bluefi/mpconfigboard.h +++ b/ports/nrf/boards/hiibot_bluefi/mpconfigboard.h @@ -62,6 +62,3 @@ #define DEFAULT_UART_BUS_RX (&pin_P0_28) #define DEFAULT_UART_BUS_TX (&pin_P0_02) - - - diff --git a/ports/nrf/boards/hiibot_bluefi/mpconfigboard.mk b/ports/nrf/boards/hiibot_bluefi/mpconfigboard.mk index b6614f8b3..e43639a89 100644 --- a/ports/nrf/boards/hiibot_bluefi/mpconfigboard.mk +++ b/ports/nrf/boards/hiibot_bluefi/mpconfigboard.mk @@ -15,4 +15,3 @@ EXTERNAL_FLASH_DEVICES = "W25Q16JV_IQ" # We use a CFLAGS define here because there are include order issues # if we try to include "mpconfigport.h" into nrfx_config.h . CFLAGS += -DCIRCUITPY_NRF_NUM_I2C=2 - diff --git a/ports/nrf/boards/particle_argon/mpconfigboard.mk b/ports/nrf/boards/particle_argon/mpconfigboard.mk index a0edfda95..2ca08b982 100644 --- a/ports/nrf/boards/particle_argon/mpconfigboard.mk +++ b/ports/nrf/boards/particle_argon/mpconfigboard.mk @@ -11,4 +11,4 @@ EXTERNAL_FLASH_DEVICES = "MX25L3233F" # Support for the Ethernet FeatherWing CIRCUITPY_NETWORK = 1 -MICROPY_PY_WIZNET5K = 5500
\ No newline at end of file +MICROPY_PY_WIZNET5K = 5500 diff --git a/ports/nrf/boards/particle_boron/mpconfigboard.mk b/ports/nrf/boards/particle_boron/mpconfigboard.mk index ccb2d63a1..f03f43a7b 100644 --- a/ports/nrf/boards/particle_boron/mpconfigboard.mk +++ b/ports/nrf/boards/particle_boron/mpconfigboard.mk @@ -11,4 +11,4 @@ EXTERNAL_FLASH_DEVICES = "MX25L3233F" # Support for the Ethernet FeatherWing CIRCUITPY_NETWORK = 1 -MICROPY_PY_WIZNET5K = 5500
\ No newline at end of file +MICROPY_PY_WIZNET5K = 5500 diff --git a/ports/nrf/boards/particle_xenon/mpconfigboard.mk b/ports/nrf/boards/particle_xenon/mpconfigboard.mk index 3970b1d05..44309bbca 100644 --- a/ports/nrf/boards/particle_xenon/mpconfigboard.mk +++ b/ports/nrf/boards/particle_xenon/mpconfigboard.mk @@ -11,4 +11,4 @@ EXTERNAL_FLASH_DEVICES = "MX25L3233F" # Support for the Ethernet FeatherWing CIRCUITPY_NETWORK = 1 -MICROPY_PY_WIZNET5K = 5500
\ No newline at end of file +MICROPY_PY_WIZNET5K = 5500 diff --git a/ports/nrf/boards/sparkfun_nrf52840_mini/README.md b/ports/nrf/boards/sparkfun_nrf52840_mini/README.md index f80f1c27c..396e169a1 100644 --- a/ports/nrf/boards/sparkfun_nrf52840_mini/README.md +++ b/ports/nrf/boards/sparkfun_nrf52840_mini/README.md @@ -45,4 +45,4 @@ The nRF52840 Mini hardware layout is open source: * [Schematic](https://cdn.sparkfun.com/assets/learn_tutorials/8/2/0/nrf52840-breakout-mdbt50q-v10.pdf) * [Eagle Files](https://cdn.sparkfun.com/assets/learn_tutorials/8/2/0/nrf52840-breakout-mdbt50q-v10.zip) -* [Hookup Guide](https://learn.sparkfun.com/tutorials/sparkfun-pro-nrf52840-mini-hookup-guide)
\ No newline at end of file +* [Hookup Guide](https://learn.sparkfun.com/tutorials/sparkfun-pro-nrf52840-mini-hookup-guide) diff --git a/ports/nrf/common-hal/neopixel_write/__init__.h b/ports/nrf/common-hal/neopixel_write/__init__.h index b8dce85ad..9366235af 100644 --- a/ports/nrf/common-hal/neopixel_write/__init__.h +++ b/ports/nrf/common-hal/neopixel_write/__init__.h @@ -29,4 +29,4 @@ void neopixel_write_reset(void); -#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_NEOPIXEL_WRITE_INIT_H
\ No newline at end of file +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_NEOPIXEL_WRITE_INIT_H diff --git a/ports/nrf/common-hal/rotaryio/IncrementalEncoder.c b/ports/nrf/common-hal/rotaryio/IncrementalEncoder.c index a0cfd48d5..28f563da6 100644 --- a/ports/nrf/common-hal/rotaryio/IncrementalEncoder.c +++ b/ports/nrf/common-hal/rotaryio/IncrementalEncoder.c @@ -49,9 +49,9 @@ static void _intr_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action) { self->state = new_state; - // logic from the atmel-samd port: provides some damping and scales movement - // down by 4:1. - if (self->quarter >= 4) { + // logic from the atmel-samd port: provides some damping and scales movement + // down by 4:1. + if (self->quarter >= 4) { self->position++; self->quarter = 0; } else if (self->quarter <= -4) { diff --git a/ports/nrf/common-hal/rtc/RTC.c b/ports/nrf/common-hal/rtc/RTC.c index 06345f589..93ba007c8 100644 --- a/ports/nrf/common-hal/rtc/RTC.c +++ b/ports/nrf/common-hal/rtc/RTC.c @@ -79,4 +79,3 @@ int common_hal_rtc_get_calibration(void) { void common_hal_rtc_set_calibration(int calibration) { mp_raise_NotImplementedError(translate("RTC calibration is not supported on this board")); } - diff --git a/ports/nrf/common-hal/supervisor/Runtime.c b/ports/nrf/common-hal/supervisor/Runtime.c index feab6987d..ea663f897 100755 --- a/ports/nrf/common-hal/supervisor/Runtime.c +++ b/ports/nrf/common-hal/supervisor/Runtime.c @@ -35,4 +35,3 @@ bool common_hal_get_serial_connected(void) { bool common_hal_get_serial_bytes_available(void) { return (bool) serial_bytes_available(); } - diff --git a/ports/nrf/common-hal/supervisor/__init__.c b/ports/nrf/common-hal/supervisor/__init__.c index ac88556b4..6dca35fb5 100755 --- a/ports/nrf/common-hal/supervisor/__init__.c +++ b/ports/nrf/common-hal/supervisor/__init__.c @@ -37,4 +37,4 @@ const super_runtime_obj_t common_hal_supervisor_runtime_obj = { .base = { .type = &supervisor_runtime_type, }, -};
\ No newline at end of file +}; diff --git a/ports/nrf/examples/ubluepy_eddystone.py b/ports/nrf/examples/ubluepy_eddystone.py index baf25ba4b..426a4aa55 100644 --- a/ports/nrf/examples/ubluepy_eddystone.py +++ b/ports/nrf/examples/ubluepy_eddystone.py @@ -53,6 +53,6 @@ def generate_eddystone_adv_packet(url): return packet def start(): - adv_packet = generate_eddystone_adv_packet("micropython") + adv_packet = generate_eddystone_adv_packet("micropython") p = Peripheral() - p.advertise(data=adv_packet, connectable=False)
\ No newline at end of file + p.advertise(data=adv_packet, connectable=False) diff --git a/ports/nrf/examples/ubluepy_scan.py b/ports/nrf/examples/ubluepy_scan.py index ab11661cc..c0a7d05a3 100644 --- a/ports/nrf/examples/ubluepy_scan.py +++ b/ports/nrf/examples/ubluepy_scan.py @@ -19,7 +19,7 @@ def get_device_names(scan_entries): def find_device_by_name(name): s = Scanner() scan_res = s.scan(100) - + device_names = get_device_names(scan_res) for dev in device_names: if name == dev[1]: @@ -30,9 +30,9 @@ def find_device_by_name(name): # ... print("address:", res.addr()) # ... print("address type:", res.addr_type()) # ... print("rssi:", res.rssi()) -# ... -# ... -# ... +# ... +# ... +# ... # address: c2:73:61:89:24:45 # address type: 1 # rssi: -26 diff --git a/ports/nrf/examples/ubluepy_temp.py b/ports/nrf/examples/ubluepy_temp.py index e5c157dbb..118407af5 100644 --- a/ports/nrf/examples/ubluepy_temp.py +++ b/ports/nrf/examples/ubluepy_temp.py @@ -31,7 +31,7 @@ def event_handler(id, handle, data): global periph global serv_env_sense global notif_enabled - + if id == constants.EVT_GAP_CONNECTED: # indicated 'connected' LED(1).on() @@ -50,7 +50,7 @@ def event_handler(id, handle, data): notif_enabled = True # start low power timer rtc.start() - else: + else: notif_enabled = False # stop low power timer rtc.stop() @@ -68,7 +68,7 @@ def send_temp(timer_id): # start off with LED(1) off LED(1).off() -# use RTC1 as RTC0 is used by bluetooth stack +# use RTC1 as RTC0 is used by bluetooth stack # set up RTC callback every 5 second rtc = RTC(1, period=5, mode=RTC.PERIODIC, callback=send_temp) @@ -76,7 +76,7 @@ notif_enabled = False uuid_env_sense = UUID("0x181A") # Environmental Sensing service uuid_temp = UUID("0x2A6E") # Temperature characteristic - + serv_env_sense = Service(uuid_env_sense) temp_props = Characteristic.PROP_NOTIFY | Characteristic.PROP_READ @@ -89,4 +89,3 @@ periph = Peripheral() periph.addService(serv_env_sense) periph.setConnectionHandler(event_handler) periph.advertise(device_name="micr_temp", services=[serv_env_sense]) - diff --git a/ports/nrf/gccollect.c b/ports/nrf/gccollect.c index b7aa57a55..3661daa53 100644 --- a/ports/nrf/gccollect.c +++ b/ports/nrf/gccollect.c @@ -43,7 +43,7 @@ void gc_collect(void) { gc_collect_start(); mp_uint_t sp = get_msp(); // Get stack pointer - + // trace the stack, including the registers (since they live on the stack in this function) gc_collect_root((void**)sp, ((uint32_t)&_ram_end - sp) / sizeof(uint32_t)); diff --git a/ports/stm/.gitignore b/ports/stm/.gitignore index 3080ece14..5d645392c 100644 --- a/ports/stm/.gitignore +++ b/ports/stm/.gitignore @@ -6,4 +6,4 @@ build-*/ ##################### ref/ -.gdb_history
\ No newline at end of file +.gdb_history diff --git a/ports/stm/README.md b/ports/stm/README.md index 95e9bd13f..5df9cedee 100644 --- a/ports/stm/README.md +++ b/ports/stm/README.md @@ -1,6 +1,6 @@ # Circuitpython on STM32 # -This port brings the ST Microelectronics STM32 series of MCUs to Circuitpython. STM32 chips have a wide range of capability, from <$1 low power STM32F0s to dual-core STM32H7s running at 400+ MHz. Currently, only the F4, F7, and H7 families are supported, powered by the ARM Cortex M4 and M7 processors. +This port brings the ST Microelectronics STM32 series of MCUs to Circuitpython. STM32 chips have a wide range of capability, from <$1 low power STM32F0s to dual-core STM32H7s running at 400+ MHz. Currently, only the F4, F7, and H7 families are supported, powered by the ARM Cortex M4 and M7 processors. Refer to the ST Microelectronics website for more information on features sorted by family and individual chip lines: [st.com/en/microcontrollers-microprocessors/stm32-high-performance-mcus.html](https://www.st.com/en/microcontrollers-microprocessors/stm32-high-performance-mcus.html) @@ -13,10 +13,10 @@ STM32 SoCs vary product-by-product in clock speed, peripheral capability, pin as - **packages/** contains package-specific pin bindings (LQFP100, BGA216, etc) - **peripherals/** contains peripheral setup files and peripheral mapping information, sorted by family and sub-variant. Most files in this directory can be generated with the python scripts in **tools/**. - **st-driver/** submodule for ST HAL and LL files generated via CubeMX. Shared with TinyUSB. -- **supervisor/** contains port-specific implementations of internal flash, serial and USB, as well as the **port.c** file, which initializes the port at startup. -- **tools/** python scripts for generating peripheral and pin mapping files in **peripherals/** and **board/**. +- **supervisor/** contains port-specific implementations of internal flash, serial and USB, as well as the **port.c** file, which initializes the port at startup. +- **tools/** python scripts for generating peripheral and pin mapping files in **peripherals/** and **board/**. -At the root level, refer to **mpconfigboard.h** and **mpconfigport.mk** for port specific settings and a list of enabled modules. +At the root level, refer to **mpconfigboard.h** and **mpconfigport.mk** for port specific settings and a list of enabled modules. ## Build instructions ## @@ -36,9 +36,9 @@ You may also build with certain flags available in the makefile, depending on yo ## USB connection ## -Connect your development board of choice to the host PC via the USB cable. Note that for most ST development boards such as the Nucleo and Discovery series, you must use a secondary OTG USB connector to access circuitpython, as the primary USB connector will be connected to a built-in ST-Link debugger rather than the chip itself. +Connect your development board of choice to the host PC via the USB cable. Note that for most ST development boards such as the Nucleo and Discovery series, you must use a secondary OTG USB connector to access circuitpython, as the primary USB connector will be connected to a built-in ST-Link debugger rather than the chip itself. -In many cases, this ST-Link USB connector will **still need to be connected to power** for the chip to turn on - refer to your specific product manual for details. +In many cases, this ST-Link USB connector will **still need to be connected to power** for the chip to turn on - refer to your specific product manual for details. ## Flash the bootloader ## @@ -52,7 +52,7 @@ Windows users will need to install [stm32cubeprog](https://www.st.com/en/develop ## Flashing the circuitpython image with DFU-Util ## -Ensure the board is in dfu mode by following the steps in the previous section. Then run: +Ensure the board is in dfu mode by following the steps in the previous section. Then run: $ make BOARD=feather_stm32F405_express flash @@ -62,10 +62,10 @@ Alternatively, you can navigate to the build directory and run the raw `dfu-util ## Accessing the board ## -Connecting the board to the PC via the USB cable will allow code to be uploaded to the `CIRCUITPY` volume. +Connecting the board to the PC via the USB cable will allow code to be uploaded to the `CIRCUITPY` volume. -Circuitpython exposes a CDC virtual serial connection for REPL access and debugging. Connecting to it from OSX will look something like this: +Circuitpython exposes a CDC virtual serial connection for REPL access and debugging. Connecting to it from OSX will look something like this: screen /dev/tty.usbmodem14111201 115200 -You may also use a program like [mu](https://codewith.mu/) to assist with REPL access. +You may also use a program like [mu](https://codewith.mu/) to assist with REPL access. diff --git a/ports/stm/boards/STM32F401xe_boot.ld b/ports/stm/boards/STM32F401xe_boot.ld index 37827c330..4f3e6ea70 100644 --- a/ports/stm/boards/STM32F401xe_boot.ld +++ b/ports/stm/boards/STM32F401xe_boot.ld @@ -1,5 +1,5 @@ /* - GNU linker script for STM32F401 with bootloader (such as the Meowbit). No internal fs. + GNU linker script for STM32F401 with bootloader (such as the Meowbit). No internal fs. */ /* Specify the memory areas */ @@ -23,4 +23,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM); /* RAM extents for the garbage collector */ _ram_start = ORIGIN(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); - diff --git a/ports/stm/boards/STM32F405_boot.ld b/ports/stm/boards/STM32F405_boot.ld index 5768d1a01..0b0e1a5f3 100644 --- a/ports/stm/boards/STM32F405_boot.ld +++ b/ports/stm/boards/STM32F405_boot.ld @@ -24,4 +24,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM); /* RAM extents for the garbage collector */ _ram_start = ORIGIN(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); - diff --git a/ports/stm/boards/STM32F405_default.ld b/ports/stm/boards/STM32F405_default.ld index 4c11fd7cf..39255ff7a 100644 --- a/ports/stm/boards/STM32F405_default.ld +++ b/ports/stm/boards/STM32F405_default.ld @@ -24,4 +24,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM); /* RAM extents for the garbage collector */ _ram_start = ORIGIN(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); - diff --git a/ports/stm/boards/STM32F405_fs.ld b/ports/stm/boards/STM32F405_fs.ld index e6c66127f..d6de1a08b 100644 --- a/ports/stm/boards/STM32F405_fs.ld +++ b/ports/stm/boards/STM32F405_fs.ld @@ -25,4 +25,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM); /* RAM extents for the garbage collector */ _ram_start = ORIGIN(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); - diff --git a/ports/stm/boards/STM32F407_fs.ld b/ports/stm/boards/STM32F407_fs.ld index f06c19d99..293ac6ff5 100644 --- a/ports/stm/boards/STM32F407_fs.ld +++ b/ports/stm/boards/STM32F407_fs.ld @@ -25,4 +25,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM); /* RAM extents for the garbage collector */ _ram_start = ORIGIN(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); - diff --git a/ports/stm/boards/STM32F411_fs.ld b/ports/stm/boards/STM32F411_fs.ld index 1b45f235f..69b98cf82 100644 --- a/ports/stm/boards/STM32F411_fs.ld +++ b/ports/stm/boards/STM32F411_fs.ld @@ -24,4 +24,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM); /* RAM extents for the garbage collector */ _ram_start = ORIGIN(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); - diff --git a/ports/stm/boards/STM32F412_fs.ld b/ports/stm/boards/STM32F412_fs.ld index 8837bd87d..d3ad291a2 100644 --- a/ports/stm/boards/STM32F412_fs.ld +++ b/ports/stm/boards/STM32F412_fs.ld @@ -24,4 +24,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM); /* RAM extents for the garbage collector */ _ram_start = ORIGIN(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); - diff --git a/ports/stm/boards/STM32F746xG_fs.ld b/ports/stm/boards/STM32F746xG_fs.ld index be10a1429..6c9ea4de3 100644 --- a/ports/stm/boards/STM32F746xG_fs.ld +++ b/ports/stm/boards/STM32F746xG_fs.ld @@ -49,4 +49,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM); /* RAM extents for the garbage collector */ _ram_start = ORIGIN(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); - diff --git a/ports/stm/boards/STM32F767_fs.ld b/ports/stm/boards/STM32F767_fs.ld index 25322b0b6..2feb42225 100644 --- a/ports/stm/boards/STM32F767_fs.ld +++ b/ports/stm/boards/STM32F767_fs.ld @@ -24,4 +24,3 @@ _estack = ORIGIN(RAM) + LENGTH(RAM); /* RAM extents for the garbage collector */ _ram_start = ORIGIN(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); - diff --git a/ports/stm/boards/STM32H743_fs.ld b/ports/stm/boards/STM32H743_fs.ld index b6c3d5b62..ca69f0d8d 100644 --- a/ports/stm/boards/STM32H743_fs.ld +++ b/ports/stm/boards/STM32H743_fs.ld @@ -36,4 +36,3 @@ _estack = ORIGIN(DTCM) + LENGTH(DTCM); /* RAM extents for the garbage collector */ _ram_start = ORIGIN(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); - diff --git a/ports/stm/boards/common_default.ld b/ports/stm/boards/common_default.ld index ade3571a5..0c7efd01d 100644 --- a/ports/stm/boards/common_default.ld +++ b/ports/stm/boards/common_default.ld @@ -1,4 +1,4 @@ -/* Memory layout for default case. +/* Memory layout for default case. FLASH_ISR .isr_vector FLASH_FIRMWARE .text @@ -96,4 +96,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - diff --git a/ports/stm/boards/common_nvm.ld b/ports/stm/boards/common_nvm.ld index f948b94e1..91e453bfd 100644 --- a/ports/stm/boards/common_nvm.ld +++ b/ports/stm/boards/common_nvm.ld @@ -106,4 +106,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - diff --git a/ports/stm/boards/common_tcm.ld b/ports/stm/boards/common_tcm.ld index 1a41853fe..9e677862d 100644 --- a/ports/stm/boards/common_tcm.ld +++ b/ports/stm/boards/common_tcm.ld @@ -133,7 +133,7 @@ SECTIONS . += _ld_default_stack_size; } > DTCM _ld_stack_top = ORIGIN(DTCM) + LENGTH(DTCM); - + .ARM.attributes 0 : { *(.ARM.attributes) } } diff --git a/ports/stm/boards/espruino_pico/README.md b/ports/stm/boards/espruino_pico/README.md index 9f0321c47..86df1ad32 100644 --- a/ports/stm/boards/espruino_pico/README.md +++ b/ports/stm/boards/espruino_pico/README.md @@ -6,10 +6,10 @@ The Espruino Pico is normally updated via a bootloader activated by the Espruino - Install ST's DFU utility on Windows, or dfu-util for Mac or Linux - **Mac**: install with Homebrew: `brew install dfu-util` - **Linux**: install with apt-get: `sudo apt-get install dfu-util` - - **Windows**: download [ST's application](https://www.st.com/en/development-tools/stsw-stm32080.html) or install the Linux subsystem for Windows 10 and follow the linux instructions. + - **Windows**: download [ST's application](https://www.st.com/en/development-tools/stsw-stm32080.html) or install the Linux subsystem for Windows 10 and follow the linux instructions. - Hold down the Pico's button while plugging it into USB (when overwriting Espruino's default firmware) - - Navigate to the same directory as your firmware.bin file for Circuitpython and run the following command: `sudo dfu-util -a 0 -s 0x08000000 -D firmware.bin` or use the ST utility on Windows. - - Restart the board. + - Navigate to the same directory as your firmware.bin file for Circuitpython and run the following command: `sudo dfu-util -a 0 -s 0x08000000 -D firmware.bin` or use the ST utility on Windows. + - Restart the board. -To reinstall Espruino, follow the same steps with the latest Espruino Pico binary from espruino.com/binaries. This will reinstall the usual Espruino bootloader. You must un-short the BOOT0/BTN jumper to re-use the original Espruino Bootloader again. If you used a Pencil mark then you may need to use cleaning fluid and a small brush to totally clear out the graphite.
\ No newline at end of file +To reinstall Espruino, follow the same steps with the latest Espruino Pico binary from espruino.com/binaries. This will reinstall the usual Espruino bootloader. You must un-short the BOOT0/BTN jumper to re-use the original Espruino Bootloader again. If you used a Pencil mark then you may need to use cleaning fluid and a small brush to totally clear out the graphite. diff --git a/ports/stm/boards/espruino_pico/mpconfigboard.h b/ports/stm/boards/espruino_pico/mpconfigboard.h index 890b1b88e..5136fac22 100644 --- a/ports/stm/boards/espruino_pico/mpconfigboard.h +++ b/ports/stm/boards/espruino_pico/mpconfigboard.h @@ -37,4 +37,3 @@ #define BOARD_OSC_DIV (8) #define BOARD_HAS_LOW_SPEED_CRYSTAL (1) - diff --git a/ports/stm/boards/espruino_wifi/README.MD b/ports/stm/boards/espruino_wifi/README.MD index 8c2cd3be2..cc78811f1 100644 --- a/ports/stm/boards/espruino_wifi/README.MD +++ b/ports/stm/boards/espruino_wifi/README.MD @@ -6,10 +6,10 @@ The Espruino Wifi is normally updated via a bootloader activated by the Espruino - Install ST's DFU utility on Windows, or dfu-util for Mac or Linux - **Mac**: install with Homebrew: `brew install dfu-util` - **Linux**: install with apt-get: `sudo apt-get install dfu-util` - - **Windows**: download [ST's application](https://www.st.com/en/development-tools/stsw-stm32080.html) or install the Linux subsystem for Windows 10 and follow the linux instructions. + - **Windows**: download [ST's application](https://www.st.com/en/development-tools/stsw-stm32080.html) or install the Linux subsystem for Windows 10 and follow the linux instructions. - Hold down the Wifi's button while plugging it into USB (when overwriting Espruino's default firmware) - - Navigate to the same directory as your firmware.bin file for Circuitpython and run the following command: `sudo dfu-util -a 0 -s 0x08000000 -D firmware.bin` or use the ST utility on Windows. - - Restart the board. + - Navigate to the same directory as your firmware.bin file for Circuitpython and run the following command: `sudo dfu-util -a 0 -s 0x08000000 -D firmware.bin` or use the ST utility on Windows. + - Restart the board. -To reinstall Espruino, follow the same steps with the latest Espruino Wifi binary from espruino.com/binaries. This will reinstall the usual Espruino bootloader. You must un-short the BOOT0/BTN jumper to re-use the original Espruino Bootloader again. If you used a Pencil mark then you may need to use cleaning fluid and a small brush to totally clear out the graphite.
\ No newline at end of file +To reinstall Espruino, follow the same steps with the latest Espruino Wifi binary from espruino.com/binaries. This will reinstall the usual Espruino bootloader. You must un-short the BOOT0/BTN jumper to re-use the original Espruino Bootloader again. If you used a Pencil mark then you may need to use cleaning fluid and a small brush to totally clear out the graphite. diff --git a/ports/stm/boards/espruino_wifi/mpconfigboard.mk b/ports/stm/boards/espruino_wifi/mpconfigboard.mk index 70d0ea2bd..ee82095ff 100644 --- a/ports/stm/boards/espruino_wifi/mpconfigboard.mk +++ b/ports/stm/boards/espruino_wifi/mpconfigboard.mk @@ -10,6 +10,5 @@ MCU_SERIES = F4 MCU_VARIANT = STM32F411xE MCU_PACKAGE = UFQFPN48 -LD_COMMON = boards/common_default.ld +LD_COMMON = boards/common_default.ld LD_FILE = boards/STM32F411_fs.ld - diff --git a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk index 85ed18f4f..d98bd29ec 100644 --- a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk @@ -12,8 +12,7 @@ MCU_SERIES = F4 MCU_VARIANT = STM32F405xx MCU_PACKAGE = LQFP64 -LD_COMMON = boards/common_default.ld -LD_DEFAULT = boards/STM32F405_default.ld +LD_COMMON = boards/common_default.ld +LD_DEFAULT = boards/STM32F405_default.ld LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option UF2_OFFSET = 0x8010000 - diff --git a/ports/stm/boards/meowbit_v121/mpconfigboard.mk b/ports/stm/boards/meowbit_v121/mpconfigboard.mk index cd8d3b548..cf60c89c2 100644 --- a/ports/stm/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm/boards/meowbit_v121/mpconfigboard.mk @@ -15,7 +15,6 @@ MCU_SERIES = F4 MCU_VARIANT = STM32F401xE MCU_PACKAGE = LQFP64 -LD_COMMON = boards/common_default.ld -LD_FILE = boards/STM32F401xe_boot.ld +LD_COMMON = boards/common_default.ld +LD_FILE = boards/STM32F401xe_boot.ld # LD_FILE = boards/STM32F401xe_fs.ld # use for internal flash - diff --git a/ports/stm/boards/nucleo_f746zg/mpconfigboard.mk b/ports/stm/boards/nucleo_f746zg/mpconfigboard.mk index 8a793d570..f23f642e7 100644 --- a/ports/stm/boards/nucleo_f746zg/mpconfigboard.mk +++ b/ports/stm/boards/nucleo_f746zg/mpconfigboard.mk @@ -10,5 +10,5 @@ MCU_SERIES = F7 MCU_VARIANT = STM32F746xx MCU_PACKAGE = LQFP144 -LD_COMMON = boards/common_default.ld +LD_COMMON = boards/common_default.ld LD_FILE = boards/STM32F746xG_fs.ld diff --git a/ports/stm/boards/nucleo_f767zi/mpconfigboard.mk b/ports/stm/boards/nucleo_f767zi/mpconfigboard.mk index c8c2a3d2b..4e5e1bc7c 100644 --- a/ports/stm/boards/nucleo_f767zi/mpconfigboard.mk +++ b/ports/stm/boards/nucleo_f767zi/mpconfigboard.mk @@ -10,6 +10,5 @@ MCU_SERIES = F7 MCU_VARIANT = STM32F767xx MCU_PACKAGE = LQFP144 -LD_COMMON = boards/common_default.ld +LD_COMMON = boards/common_default.ld LD_FILE = boards/STM32F767_fs.ld - diff --git a/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk b/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk index 01ace06a2..ea99a1e10 100644 --- a/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk +++ b/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk @@ -10,6 +10,5 @@ MCU_SERIES = H7 MCU_VARIANT = STM32H743xx MCU_PACKAGE = LQFP144 -LD_COMMON = boards/common_tcm.ld +LD_COMMON = boards/common_tcm.ld LD_FILE = boards/STM32H743_fs.ld - diff --git a/ports/stm/boards/openmv_h7/mpconfigboard.h b/ports/stm/boards/openmv_h7/mpconfigboard.h index 9a049ed2c..2f26c6e71 100644 --- a/ports/stm/boards/openmv_h7/mpconfigboard.h +++ b/ports/stm/boards/openmv_h7/mpconfigboard.h @@ -34,4 +34,3 @@ #define BOARD_OSC_DIV (12) #define HSE_VALUE ((uint32_t)12000000) #define BOARD_HAS_LOW_SPEED_CRYSTAL (0) - diff --git a/ports/stm/boards/openmv_h7/mpconfigboard.mk b/ports/stm/boards/openmv_h7/mpconfigboard.mk index 242dac52c..4ff0f18d5 100644 --- a/ports/stm/boards/openmv_h7/mpconfigboard.mk +++ b/ports/stm/boards/openmv_h7/mpconfigboard.mk @@ -10,6 +10,5 @@ MCU_SERIES = H7 MCU_VARIANT = STM32H743xx MCU_PACKAGE = LQFP100_x7 -LD_COMMON = boards/common_tcm.ld +LD_COMMON = boards/common_tcm.ld LD_FILE = boards/STM32H743_fs.ld - diff --git a/ports/stm/boards/openmv_h7/openmv.csv b/ports/stm/boards/openmv_h7/openmv.csv index 9045e1ea2..f9d4ebc40 100644 --- a/ports/stm/boards/openmv_h7/openmv.csv +++ b/ports/stm/boards/openmv_h7/openmv.csv @@ -23,4 +23,4 @@ I2C4_SDA,PD13 SPI2_NSS,PB12 SPI2_SCK,PB13 SPI2_MISO,PB14 -SPI2_MOSI,PB15
\ No newline at end of file +SPI2_MOSI,PB15 diff --git a/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk b/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk index 0a06852fb..08a266816 100644 --- a/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk +++ b/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk @@ -12,6 +12,5 @@ MCU_SERIES = F4 MCU_VARIANT = STM32F411xE MCU_PACKAGE = UFQFPN48 -LD_COMMON = boards/common_default.ld +LD_COMMON = boards/common_default.ld LD_FILE = boards/STM32F411_fs.ld - diff --git a/ports/stm/boards/pyboard_v11/mpconfigboard.mk b/ports/stm/boards/pyboard_v11/mpconfigboard.mk index 9d8b0f3f2..c0c0f5f6c 100644 --- a/ports/stm/boards/pyboard_v11/mpconfigboard.mk +++ b/ports/stm/boards/pyboard_v11/mpconfigboard.mk @@ -10,6 +10,5 @@ MCU_SERIES = F4 MCU_VARIANT = STM32F405xx MCU_PACKAGE = LQFP64 -LD_COMMON = boards/common_default.ld +LD_COMMON = boards/common_default.ld LD_FILE = boards/STM32F405_fs.ld - diff --git a/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk b/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk index 62887c028..0054232e1 100644 --- a/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk +++ b/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk @@ -15,6 +15,5 @@ MCU_SERIES = F4 MCU_VARIANT = STM32F411xE MCU_PACKAGE = UFQFPN48 -LD_COMMON = boards/common_default.ld +LD_COMMON = boards/common_default.ld LD_FILE = boards/STM32F411_fs.ld - diff --git a/ports/stm/boards/stm32f411ce_blackpill/pins.c b/ports/stm/boards/stm32f411ce_blackpill/pins.c index aa9736fc4..2f8aab6e8 100644 --- a/ports/stm/boards/stm32f411ce_blackpill/pins.c +++ b/ports/stm/boards/stm32f411ce_blackpill/pins.c @@ -33,7 +33,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00) }, { MP_ROM_QSTR(MP_QSTR_C15), MP_ROM_PTR(&pin_PC15) }, { MP_ROM_QSTR(MP_QSTR_C14), MP_ROM_PTR(&pin_PC14) }, - { MP_ROM_QSTR(MP_QSTR_C13), MP_ROM_PTR(&pin_PC13) }, - { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_C13), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PC13) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk index 761602acd..ca2f10ba3 100644 --- a/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk +++ b/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk @@ -12,4 +12,3 @@ MCU_PACKAGE = LQFP100_f4 LD_COMMON = boards/common_default.ld LD_FILE = boards/STM32F411_fs.ld - diff --git a/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk index 09e7bda85..04d2a9b0d 100644 --- a/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk +++ b/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk @@ -17,5 +17,3 @@ MCU_PACKAGE = LQFP144 LD_COMMON = boards/common_default.ld LD_FILE = boards/STM32F412_fs.ld - - diff --git a/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk index 57a65f75a..09652d9ad 100644 --- a/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk +++ b/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk @@ -12,4 +12,3 @@ MCU_PACKAGE = LQFP100_f4 LD_COMMON = boards/common_default.ld LD_FILE = boards/STM32F407_fs.ld - diff --git a/ports/stm/boards/stm32f746g_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f746g_discovery/mpconfigboard.mk index 0b4ccc760..ff8456df6 100644 --- a/ports/stm/boards/stm32f746g_discovery/mpconfigboard.mk +++ b/ports/stm/boards/stm32f746g_discovery/mpconfigboard.mk @@ -10,5 +10,5 @@ MCU_SERIES = F7 MCU_VARIANT = STM32F746xx MCU_PACKAGE = TFBGA216 -LD_COMMON = boards/common_default.ld +LD_COMMON = boards/common_default.ld LD_FILE = boards/STM32F746xG_fs.ld diff --git a/ports/stm/boards/system_stm32f4xx.c b/ports/stm/boards/system_stm32f4xx.c index caa4f9caf..d8c745dbb 100644 --- a/ports/stm/boards/system_stm32f4xx.c +++ b/ports/stm/boards/system_stm32f4xx.c @@ -1,6 +1,6 @@ /* * Taken from ST Cube library and modified. See below for original header. - * + * * Modifications copyright (c) 2019 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy @@ -28,16 +28,16 @@ * @author MCD Application Team * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. * - * This file provides two functions and one global variable to be called from + * This file provides two functions and one global variable to be called from * user application: - * - SystemInit(): This function is called at startup just after reset and + * - SystemInit(): This function is called at startup just after reset and * before branch to main program. This call is made inside * the "startup_stm32f4xx.s" file. * * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used - * by the user application to setup the SysTick + * by the user application to setup the SysTick * timer or configure other parameters. - * + * * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must * be called whenever the core clock is changed * during program execution. @@ -79,8 +79,8 @@ /** @addtogroup stm32f4xx_system * @{ - */ - + */ + /** @addtogroup STM32F4xx_System_Private_Includes * @{ */ @@ -89,7 +89,7 @@ #include "stm32f4xx.h" #include "py/mpconfig.h" -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -121,7 +121,7 @@ /* #define DATA_IN_ExtSRAM */ #endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\ STM32F412Zx || STM32F412Vx */ - + #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) /* #define DATA_IN_ExtSDRAM */ @@ -131,7 +131,7 @@ /*!< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. */ /* #define VECT_TAB_SRAM */ -#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. This value must be a multiple of 0x200. */ /******************************************************************************/ @@ -153,7 +153,7 @@ /* This variable is updated in three ways: 1) by calling CMSIS function SystemCoreClockUpdate() 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency Note: If you use this function to configure the system clock; then there is no need to call the 2 first functions listed above, since SystemCoreClock variable is updated automatically. @@ -170,7 +170,7 @@ const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; */ #if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) - static void SystemInit_ExtMemCtl(void); + static void SystemInit_ExtMemCtl(void); #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ /** @@ -183,7 +183,7 @@ const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; /** * @brief Setup the microcontroller system - * Initialize the FPU setting, vector table location and External memory + * Initialize the FPU setting, vector table location and External memory * configuration. * @param None * @retval None @@ -214,7 +214,7 @@ void SystemInit(void) RCC->CIR = 0x00000000; #if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) - SystemInit_ExtMemCtl(); + SystemInit_ExtMemCtl(); #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ /* Configure the Vector Table location add offset address ------------------*/ @@ -232,41 +232,41 @@ void SystemInit(void) * The SystemCoreClock variable contains the core clock (HCLK), it can * be used by the user application to setup the SysTick timer or configure * other parameters. - * + * * @note Each time the core clock (HCLK) changes, this function must be called * to update SystemCoreClock variable value. Otherwise, any configuration - * based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined * constant and the selected clock source: - * + * * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) - * + * * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) * or HSI_VALUE(*) multiplied/divided by the PLL factors. - * + * * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value * 16 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * + * in voltage and temperature. + * * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value * depends on the application requirements), user has to ensure that HSE_VALUE * is same as the real frequency of the crystal used. Otherwise, this function * may have wrong result. - * + * * - The result of this function could be not correct when using fractional * value for HSE crystal. - * + * * @param None * @retval None */ void SystemCoreClockUpdate(void) { uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; - + /* Get SYSCLK source -------------------------------------------------------*/ tmp = RCC->CFGR & RCC_CFGR_SWS; @@ -282,10 +282,10 @@ void SystemCoreClockUpdate(void) /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N SYSCLK = PLL_VCO / PLL_P - */ + */ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; - + if (pllsource != 0) { /* HSE used as PLL clock source */ @@ -334,79 +334,79 @@ void SystemInit_ExtMemCtl(void) /* Delay after an RCC peripheral clock enabling */ tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN); - + /* Connect PDx pins to FMC Alternate function */ GPIOD->AFR[0] = 0x00CCC0CC; GPIOD->AFR[1] = 0xCCCCCCCC; - /* Configure PDx pins in Alternate function mode */ + /* Configure PDx pins in Alternate function mode */ GPIOD->MODER = 0xAAAA0A8A; - /* Configure PDx pins speed to 100 MHz */ + /* Configure PDx pins speed to 100 MHz */ GPIOD->OSPEEDR = 0xFFFF0FCF; - /* Configure PDx pins Output type to push-pull */ + /* Configure PDx pins Output type to push-pull */ GPIOD->OTYPER = 0x00000000; - /* No pull-up, pull-down for PDx pins */ + /* No pull-up, pull-down for PDx pins */ GPIOD->PUPDR = 0x00000000; /* Connect PEx pins to FMC Alternate function */ GPIOE->AFR[0] = 0xC00CC0CC; GPIOE->AFR[1] = 0xCCCCCCCC; - /* Configure PEx pins in Alternate function mode */ + /* Configure PEx pins in Alternate function mode */ GPIOE->MODER = 0xAAAA828A; - /* Configure PEx pins speed to 100 MHz */ + /* Configure PEx pins speed to 100 MHz */ GPIOE->OSPEEDR = 0xFFFFC3CF; - /* Configure PEx pins Output type to push-pull */ + /* Configure PEx pins Output type to push-pull */ GPIOE->OTYPER = 0x00000000; - /* No pull-up, pull-down for PEx pins */ + /* No pull-up, pull-down for PEx pins */ GPIOE->PUPDR = 0x00000000; - + /* Connect PFx pins to FMC Alternate function */ GPIOF->AFR[0] = 0xCCCCCCCC; GPIOF->AFR[1] = 0xCCCCCCCC; - /* Configure PFx pins in Alternate function mode */ + /* Configure PFx pins in Alternate function mode */ GPIOF->MODER = 0xAA800AAA; - /* Configure PFx pins speed to 50 MHz */ + /* Configure PFx pins speed to 50 MHz */ GPIOF->OSPEEDR = 0xAA800AAA; - /* Configure PFx pins Output type to push-pull */ + /* Configure PFx pins Output type to push-pull */ GPIOF->OTYPER = 0x00000000; - /* No pull-up, pull-down for PFx pins */ + /* No pull-up, pull-down for PFx pins */ GPIOF->PUPDR = 0x00000000; /* Connect PGx pins to FMC Alternate function */ GPIOG->AFR[0] = 0xCCCCCCCC; GPIOG->AFR[1] = 0xCCCCCCCC; - /* Configure PGx pins in Alternate function mode */ + /* Configure PGx pins in Alternate function mode */ GPIOG->MODER = 0xAAAAAAAA; - /* Configure PGx pins speed to 50 MHz */ + /* Configure PGx pins speed to 50 MHz */ GPIOG->OSPEEDR = 0xAAAAAAAA; - /* Configure PGx pins Output type to push-pull */ + /* Configure PGx pins Output type to push-pull */ GPIOG->OTYPER = 0x00000000; - /* No pull-up, pull-down for PGx pins */ + /* No pull-up, pull-down for PGx pins */ GPIOG->PUPDR = 0x00000000; - + /* Connect PHx pins to FMC Alternate function */ GPIOH->AFR[0] = 0x00C0CC00; GPIOH->AFR[1] = 0xCCCCCCCC; - /* Configure PHx pins in Alternate function mode */ + /* Configure PHx pins in Alternate function mode */ GPIOH->MODER = 0xAAAA08A0; - /* Configure PHx pins speed to 50 MHz */ + /* Configure PHx pins speed to 50 MHz */ GPIOH->OSPEEDR = 0xAAAA08A0; - /* Configure PHx pins Output type to push-pull */ + /* Configure PHx pins Output type to push-pull */ GPIOH->OTYPER = 0x00000000; - /* No pull-up, pull-down for PHx pins */ + /* No pull-up, pull-down for PHx pins */ GPIOH->PUPDR = 0x00000000; - + /* Connect PIx pins to FMC Alternate function */ GPIOI->AFR[0] = 0xCCCCCCCC; GPIOI->AFR[1] = 0x00000CC0; - /* Configure PIx pins in Alternate function mode */ + /* Configure PIx pins in Alternate function mode */ GPIOI->MODER = 0x0028AAAA; - /* Configure PIx pins speed to 50 MHz */ + /* Configure PIx pins speed to 50 MHz */ GPIOI->OSPEEDR = 0x0028AAAA; - /* Configure PIx pins Output type to push-pull */ + /* Configure PIx pins Output type to push-pull */ GPIOI->OTYPER = 0x00000000; - /* No pull-up, pull-down for PIx pins */ + /* No pull-up, pull-down for PIx pins */ GPIOI->PUPDR = 0x00000000; - + /*-- FMC Configuration -------------------------------------------------------*/ /* Enable the FMC interface clock */ RCC->AHB3ENR |= 0x00000001; @@ -414,50 +414,50 @@ void SystemInit_ExtMemCtl(void) tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); FMC_Bank5_6->SDCR[0] = 0x000019E4; - FMC_Bank5_6->SDTR[0] = 0x01115351; - + FMC_Bank5_6->SDTR[0] = 0x01115351; + /* SDRAM initialization sequence */ /* Clock enable command */ - FMC_Bank5_6->SDCMR = 0x00000011; - tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + FMC_Bank5_6->SDCMR = 0x00000011; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; while((tmpreg != 0) && (timeout-- > 0)) { - tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; } /* Delay */ for (index = 0; index<1000; index++); - + /* PALL command */ - FMC_Bank5_6->SDCMR = 0x00000012; + FMC_Bank5_6->SDCMR = 0x00000012; timeout = 0xFFFF; while((tmpreg != 0) && (timeout-- > 0)) { - tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; } - + /* Auto refresh command */ FMC_Bank5_6->SDCMR = 0x00000073; timeout = 0xFFFF; while((tmpreg != 0) && (timeout-- > 0)) { - tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; } - + /* MRD register program */ FMC_Bank5_6->SDCMR = 0x00046014; timeout = 0xFFFF; while((tmpreg != 0) && (timeout-- > 0)) { - tmpreg = FMC_Bank5_6->SDSR & 0x00000020; - } - + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + /* Set refresh count */ tmpreg = FMC_Bank5_6->SDRTR; FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1)); - + /* Disable write protection */ - tmpreg = FMC_Bank5_6->SDCR[0]; + tmpreg = FMC_Bank5_6->SDCR[0]; FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF); #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) @@ -465,7 +465,7 @@ void SystemInit_ExtMemCtl(void) FMC_Bank1->BTCR[2] = 0x00001011; FMC_Bank1->BTCR[3] = 0x00000201; FMC_Bank1E->BWTR[2] = 0x0fffffff; -#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ #if defined(STM32F469xx) || defined(STM32F479xx) /* Configure and enable Bank1_SRAM2 */ FMC_Bank1->BTCR[2] = 0x00001091; @@ -473,7 +473,7 @@ void SystemInit_ExtMemCtl(void) FMC_Bank1E->BWTR[2] = 0x0fffffff; #endif /* STM32F469xx || STM32F479xx */ - (void)(tmp); + (void)(tmp); } #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ #elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) @@ -499,13 +499,13 @@ void SystemInit_ExtMemCtl(void) clock */ RCC->AHB1ENR |= 0x0000007D; #else - /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface + /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */ RCC->AHB1ENR |= 0x000001F8; -#endif /* STM32F446xx */ +#endif /* STM32F446xx */ /* Delay after an RCC peripheral clock enabling */ tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN); - + #if defined(STM32F446xx) /* Connect PAx pins to FMC Alternate function */ GPIOA->AFR[0] |= 0xC0000000; @@ -535,78 +535,78 @@ void SystemInit_ExtMemCtl(void) /* Connect PDx pins to FMC Alternate function */ GPIOD->AFR[0] = 0x000000CC; GPIOD->AFR[1] = 0xCC000CCC; - /* Configure PDx pins in Alternate function mode */ + /* Configure PDx pins in Alternate function mode */ GPIOD->MODER = 0xA02A000A; - /* Configure PDx pins speed to 50 MHz */ + /* Configure PDx pins speed to 50 MHz */ GPIOD->OSPEEDR = 0xA02A000A; - /* Configure PDx pins Output type to push-pull */ + /* Configure PDx pins Output type to push-pull */ GPIOD->OTYPER = 0x00000000; - /* No pull-up, pull-down for PDx pins */ + /* No pull-up, pull-down for PDx pins */ GPIOD->PUPDR = 0x00000000; /* Connect PEx pins to FMC Alternate function */ GPIOE->AFR[0] = 0xC00000CC; GPIOE->AFR[1] = 0xCCCCCCCC; - /* Configure PEx pins in Alternate function mode */ + /* Configure PEx pins in Alternate function mode */ GPIOE->MODER = 0xAAAA800A; - /* Configure PEx pins speed to 50 MHz */ + /* Configure PEx pins speed to 50 MHz */ GPIOE->OSPEEDR = 0xAAAA800A; - /* Configure PEx pins Output type to push-pull */ + /* Configure PEx pins Output type to push-pull */ GPIOE->OTYPER = 0x00000000; - /* No pull-up, pull-down for PEx pins */ + /* No pull-up, pull-down for PEx pins */ GPIOE->PUPDR = 0x00000000; /* Connect PFx pins to FMC Alternate function */ GPIOF->AFR[0] = 0xCCCCCCCC; GPIOF->AFR[1] = 0xCCCCCCCC; - /* Configure PFx pins in Alternate function mode */ + /* Configure PFx pins in Alternate function mode */ GPIOF->MODER = 0xAA800AAA; - /* Configure PFx pins speed to 50 MHz */ + /* Configure PFx pins speed to 50 MHz */ GPIOF->OSPEEDR = 0xAA800AAA; - /* Configure PFx pins Output type to push-pull */ + /* Configure PFx pins Output type to push-pull */ GPIOF->OTYPER = 0x00000000; - /* No pull-up, pull-down for PFx pins */ + /* No pull-up, pull-down for PFx pins */ GPIOF->PUPDR = 0x00000000; /* Connect PGx pins to FMC Alternate function */ GPIOG->AFR[0] = 0xCCCCCCCC; GPIOG->AFR[1] = 0xCCCCCCCC; - /* Configure PGx pins in Alternate function mode */ + /* Configure PGx pins in Alternate function mode */ GPIOG->MODER = 0xAAAAAAAA; - /* Configure PGx pins speed to 50 MHz */ + /* Configure PGx pins speed to 50 MHz */ GPIOG->OSPEEDR = 0xAAAAAAAA; - /* Configure PGx pins Output type to push-pull */ + /* Configure PGx pins Output type to push-pull */ GPIOG->OTYPER = 0x00000000; - /* No pull-up, pull-down for PGx pins */ + /* No pull-up, pull-down for PGx pins */ GPIOG->PUPDR = 0x00000000; #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ - || defined(STM32F469xx) || defined(STM32F479xx) + || defined(STM32F469xx) || defined(STM32F479xx) /* Connect PHx pins to FMC Alternate function */ GPIOH->AFR[0] = 0x00C0CC00; GPIOH->AFR[1] = 0xCCCCCCCC; - /* Configure PHx pins in Alternate function mode */ + /* Configure PHx pins in Alternate function mode */ GPIOH->MODER = 0xAAAA08A0; - /* Configure PHx pins speed to 50 MHz */ + /* Configure PHx pins speed to 50 MHz */ GPIOH->OSPEEDR = 0xAAAA08A0; - /* Configure PHx pins Output type to push-pull */ + /* Configure PHx pins Output type to push-pull */ GPIOH->OTYPER = 0x00000000; - /* No pull-up, pull-down for PHx pins */ + /* No pull-up, pull-down for PHx pins */ GPIOH->PUPDR = 0x00000000; - + /* Connect PIx pins to FMC Alternate function */ GPIOI->AFR[0] = 0xCCCCCCCC; GPIOI->AFR[1] = 0x00000CC0; - /* Configure PIx pins in Alternate function mode */ + /* Configure PIx pins in Alternate function mode */ GPIOI->MODER = 0x0028AAAA; - /* Configure PIx pins speed to 50 MHz */ + /* Configure PIx pins speed to 50 MHz */ GPIOI->OSPEEDR = 0x0028AAAA; - /* Configure PIx pins Output type to push-pull */ + /* Configure PIx pins Output type to push-pull */ GPIOI->OTYPER = 0x00000000; - /* No pull-up, pull-down for PIx pins */ + /* No pull-up, pull-down for PIx pins */ GPIOI->PUPDR = 0x00000000; #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ - + /*-- FMC Configuration -------------------------------------------------------*/ /* Enable the FMC interface clock */ RCC->AHB3ENR |= 0x00000001; @@ -616,65 +616,65 @@ void SystemInit_ExtMemCtl(void) /* Configure and enable SDRAM bank1 */ #if defined(STM32F446xx) FMC_Bank5_6->SDCR[0] = 0x00001954; -#else +#else FMC_Bank5_6->SDCR[0] = 0x000019E4; #endif /* STM32F446xx */ - FMC_Bank5_6->SDTR[0] = 0x01115351; - + FMC_Bank5_6->SDTR[0] = 0x01115351; + /* SDRAM initialization sequence */ /* Clock enable command */ - FMC_Bank5_6->SDCMR = 0x00000011; - tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + FMC_Bank5_6->SDCMR = 0x00000011; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; while((tmpreg != 0) && (timeout-- > 0)) { - tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; } /* Delay */ for (index = 0; index<1000; index++); - + /* PALL command */ - FMC_Bank5_6->SDCMR = 0x00000012; + FMC_Bank5_6->SDCMR = 0x00000012; timeout = 0xFFFF; while((tmpreg != 0) && (timeout-- > 0)) { - tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; } - + /* Auto refresh command */ #if defined(STM32F446xx) FMC_Bank5_6->SDCMR = 0x000000F3; -#else +#else FMC_Bank5_6->SDCMR = 0x00000073; #endif /* STM32F446xx */ timeout = 0xFFFF; while((tmpreg != 0) && (timeout-- > 0)) { - tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; } - + /* MRD register program */ #if defined(STM32F446xx) FMC_Bank5_6->SDCMR = 0x00044014; -#else +#else FMC_Bank5_6->SDCMR = 0x00046014; #endif /* STM32F446xx */ timeout = 0xFFFF; while((tmpreg != 0) && (timeout-- > 0)) { - tmpreg = FMC_Bank5_6->SDSR & 0x00000020; - } - + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + /* Set refresh count */ tmpreg = FMC_Bank5_6->SDRTR; #if defined(STM32F446xx) FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1)); -#else +#else FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1)); #endif /* STM32F446xx */ - + /* Disable write protection */ - tmpreg = FMC_Bank5_6->SDCR[0]; + tmpreg = FMC_Bank5_6->SDCR[0]; FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF); #endif /* DATA_IN_ExtSDRAM */ #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ @@ -689,55 +689,55 @@ void SystemInit_ExtMemCtl(void) RCC->AHB1ENR |= 0x00000078; /* Delay after an RCC peripheral clock enabling */ tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN); - + /* Connect PDx pins to FMC Alternate function */ GPIOD->AFR[0] = 0x00CCC0CC; GPIOD->AFR[1] = 0xCCCCCCCC; - /* Configure PDx pins in Alternate function mode */ + /* Configure PDx pins in Alternate function mode */ GPIOD->MODER = 0xAAAA0A8A; - /* Configure PDx pins speed to 100 MHz */ + /* Configure PDx pins speed to 100 MHz */ GPIOD->OSPEEDR = 0xFFFF0FCF; - /* Configure PDx pins Output type to push-pull */ + /* Configure PDx pins Output type to push-pull */ GPIOD->OTYPER = 0x00000000; - /* No pull-up, pull-down for PDx pins */ + /* No pull-up, pull-down for PDx pins */ GPIOD->PUPDR = 0x00000000; /* Connect PEx pins to FMC Alternate function */ GPIOE->AFR[0] = 0xC00CC0CC; GPIOE->AFR[1] = 0xCCCCCCCC; - /* Configure PEx pins in Alternate function mode */ + /* Configure PEx pins in Alternate function mode */ GPIOE->MODER = 0xAAAA828A; - /* Configure PEx pins speed to 100 MHz */ + /* Configure PEx pins speed to 100 MHz */ GPIOE->OSPEEDR = 0xFFFFC3CF; - /* Configure PEx pins Output type to push-pull */ + /* Configure PEx pins Output type to push-pull */ GPIOE->OTYPER = 0x00000000; - /* No pull-up, pull-down for PEx pins */ + /* No pull-up, pull-down for PEx pins */ GPIOE->PUPDR = 0x00000000; /* Connect PFx pins to FMC Alternate function */ GPIOF->AFR[0] = 0x00CCCCCC; GPIOF->AFR[1] = 0xCCCC0000; - /* Configure PFx pins in Alternate function mode */ + /* Configure PFx pins in Alternate function mode */ GPIOF->MODER = 0xAA000AAA; - /* Configure PFx pins speed to 100 MHz */ + /* Configure PFx pins speed to 100 MHz */ GPIOF->OSPEEDR = 0xFF000FFF; - /* Configure PFx pins Output type to push-pull */ + /* Configure PFx pins Output type to push-pull */ GPIOF->OTYPER = 0x00000000; - /* No pull-up, pull-down for PFx pins */ + /* No pull-up, pull-down for PFx pins */ GPIOF->PUPDR = 0x00000000; /* Connect PGx pins to FMC Alternate function */ GPIOG->AFR[0] = 0x00CCCCCC; GPIOG->AFR[1] = 0x000000C0; - /* Configure PGx pins in Alternate function mode */ + /* Configure PGx pins in Alternate function mode */ GPIOG->MODER = 0x00085AAA; - /* Configure PGx pins speed to 100 MHz */ + /* Configure PGx pins speed to 100 MHz */ GPIOG->OSPEEDR = 0x000CAFFF; - /* Configure PGx pins Output type to push-pull */ + /* Configure PGx pins Output type to push-pull */ GPIOG->OTYPER = 0x00000000; - /* No pull-up, pull-down for PGx pins */ + /* No pull-up, pull-down for PGx pins */ GPIOG->PUPDR = 0x00000000; - + /*-- FMC/FSMC Configuration --------------------------------------------------*/ /* Enable the FMC/FSMC interface clock */ RCC->AHB3ENR |= 0x00000001; @@ -749,7 +749,7 @@ void SystemInit_ExtMemCtl(void) FMC_Bank1->BTCR[2] = 0x00001011; FMC_Bank1->BTCR[3] = 0x00000201; FMC_Bank1E->BWTR[2] = 0x0fffffff; -#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ #if defined(STM32F469xx) || defined(STM32F479xx) /* Delay after an RCC peripheral clock enabling */ tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); @@ -770,8 +770,8 @@ void SystemInit_ExtMemCtl(void) #endif /* DATA_IN_ExtSRAM */ #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\ - STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */ - (void)(tmp); + STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */ + (void)(tmp); } #endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */ /** diff --git a/ports/stm/boards/system_stm32f7xx.c b/ports/stm/boards/system_stm32f7xx.c index 184fefb36..4aebc3d35 100644 --- a/ports/stm/boards/system_stm32f7xx.c +++ b/ports/stm/boards/system_stm32f7xx.c @@ -4,16 +4,16 @@ * @author MCD Application Team * @brief CMSIS Cortex-M7 Device Peripheral Access Layer System Source File. * - * This file provides two functions and one global variable to be called from + * This file provides two functions and one global variable to be called from * user application: - * - SystemInit(): This function is called at startup just after reset and + * - SystemInit(): This function is called at startup just after reset and * before branch to main program. This call is made inside * the "startup_stm32f7xx.s" file. * * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used - * by the user application to setup the SysTick + * by the user application to setup the SysTick * timer or configure other parameters. - * + * * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must * be called whenever the core clock is changed * during program execution. @@ -39,15 +39,15 @@ /** @addtogroup stm32f7xx_system * @{ - */ - + */ + /** @addtogroup STM32F7xx_System_Private_Includes * @{ */ #include "stm32f7xx.h" -#if !defined (HSE_VALUE) +#if !defined (HSE_VALUE) #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */ #endif /* HSE_VALUE */ @@ -76,7 +76,7 @@ /*!< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. */ /* #define VECT_TAB_SRAM */ -#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. This value must be a multiple of 0x200. */ /******************************************************************************/ @@ -99,7 +99,7 @@ /* This variable is updated in three ways: 1) by calling CMSIS function SystemCoreClockUpdate() 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency Note: If you use this function to configure the system clock; then there is no need to call the 2 first functions listed above, since SystemCoreClock variable is updated automatically. @@ -126,7 +126,7 @@ /** * @brief Setup the microcontroller system - * Initialize the Embedded Flash Interface, the PLL and update the + * Initialize the Embedded Flash Interface, the PLL and update the * SystemFrequency variable. * @param None * @retval None @@ -154,41 +154,41 @@ void SystemInit(void) * The SystemCoreClock variable contains the core clock (HCLK), it can * be used by the user application to setup the SysTick timer or configure * other parameters. - * + * * @note Each time the core clock (HCLK) changes, this function must be called * to update SystemCoreClock variable value. Otherwise, any configuration - * based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined * constant and the selected clock source: - * + * * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) - * + * * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) * or HSI_VALUE(*) multiplied/divided by the PLL factors. - * + * * (*) HSI_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value * 16 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * + * in voltage and temperature. + * * (**) HSE_VALUE is a constant defined in stm32f7xx_hal_conf.h file (default value * 25 MHz), user has to ensure that HSE_VALUE is same as the real * frequency of the crystal used. Otherwise, this function may * have wrong result. - * + * * - The result of this function could be not correct when using fractional * value for HSE crystal. - * + * * @param None * @retval None */ void SystemCoreClockUpdate(void) { uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; - + /* Get SYSCLK source -------------------------------------------------------*/ tmp = RCC->CFGR & RCC_CFGR_SWS; @@ -204,10 +204,10 @@ void SystemCoreClockUpdate(void) /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N SYSCLK = PLL_VCO / PLL_P - */ + */ pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; - + if (pllsource != 0) { /* HSE used as PLL clock source */ @@ -216,7 +216,7 @@ void SystemCoreClockUpdate(void) else { /* HSI used as PLL clock source */ - pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); } pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; @@ -240,8 +240,8 @@ void SystemCoreClockUpdate(void) /** * @} */ - + /** * @} - */ + */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/boards/system_stm32h7xx.c b/ports/stm/boards/system_stm32h7xx.c index 2132f26a0..bbb0f821f 100644 --- a/ports/stm/boards/system_stm32h7xx.c +++ b/ports/stm/boards/system_stm32h7xx.c @@ -1,6 +1,6 @@ /* * Taken from ST Cube library and modified. See below for original header. - * + * * Modifications copyright (c) 2020 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy diff --git a/ports/stm/boards/thunderpack/pins.c b/ports/stm/boards/thunderpack/pins.c index 559d9658e..eed54eb3c 100644 --- a/ports/stm/boards/thunderpack/pins.c +++ b/ports/stm/boards/thunderpack/pins.c @@ -10,7 +10,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_PA6), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_PA7), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_PA8), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_PA9), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA9), MP_ROM_PTR(&pin_PA09) }, { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, diff --git a/ports/stm/common-hal/busio/UART.c b/ports/stm/common-hal/busio/UART.c index 0dc10c4e4..86a932290 100644 --- a/ports/stm/common-hal/busio/UART.c +++ b/ports/stm/common-hal/busio/UART.c @@ -280,7 +280,7 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { reset_pin_number(self->rx->pin->port,self->rx->pin->number); self->rx = NULL; } - + ringbuf_free(&self->ringbuf); } diff --git a/ports/stm/common-hal/nvm/ByteArray.c b/ports/stm/common-hal/nvm/ByteArray.c index 1aaf54653..462d3aa9d 100644 --- a/ports/stm/common-hal/nvm/ByteArray.c +++ b/ports/stm/common-hal/nvm/ByteArray.c @@ -60,7 +60,7 @@ bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, return false; } } - + // Finish up HAL_FLASH_Lock(); return true; diff --git a/ports/stm/common-hal/os/__init__.c b/ports/stm/common-hal/os/__init__.c index eef58bfe2..84deb8175 100644 --- a/ports/stm/common-hal/os/__init__.c +++ b/ports/stm/common-hal/os/__init__.c @@ -92,4 +92,4 @@ bool common_hal_os_urandom(uint8_t *buffer, uint32_t length) { #else return false; #endif -}
\ No newline at end of file +} diff --git a/ports/stm/common-hal/supervisor/Runtime.c b/ports/stm/common-hal/supervisor/Runtime.c index feab6987d..ea663f897 100755 --- a/ports/stm/common-hal/supervisor/Runtime.c +++ b/ports/stm/common-hal/supervisor/Runtime.c @@ -35,4 +35,3 @@ bool common_hal_get_serial_connected(void) { bool common_hal_get_serial_bytes_available(void) { return (bool) serial_bytes_available(); } - diff --git a/ports/stm/common-hal/supervisor/__init__.c b/ports/stm/common-hal/supervisor/__init__.c index ac88556b4..6dca35fb5 100755 --- a/ports/stm/common-hal/supervisor/__init__.c +++ b/ports/stm/common-hal/supervisor/__init__.c @@ -37,4 +37,4 @@ const super_runtime_obj_t common_hal_supervisor_runtime_obj = { .base = { .type = &supervisor_runtime_type, }, -};
\ No newline at end of file +}; diff --git a/ports/stm/packages/LQFP100_f4.c b/ports/stm/packages/LQFP100_f4.c index 5bc0a5158..9136b9495 100644 --- a/ports/stm/packages/LQFP100_f4.c +++ b/ports/stm/packages/LQFP100_f4.c @@ -114,4 +114,4 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { // VDD --------------------------------------------*/ }; -MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);
\ No newline at end of file +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/stm/packages/LQFP100_x7.c b/ports/stm/packages/LQFP100_x7.c index 23d89a826..4d3d5f45a 100644 --- a/ports/stm/packages/LQFP100_x7.c +++ b/ports/stm/packages/LQFP100_x7.c @@ -112,4 +112,4 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { // VDD --------------------------------------------*/ }; -MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);
\ No newline at end of file +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/stm/packages/LQFP144.c b/ports/stm/packages/LQFP144.c index 36683bb64..5e0d743d7 100644 --- a/ports/stm/packages/LQFP144.c +++ b/ports/stm/packages/LQFP144.c @@ -154,6 +154,6 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_PE01) }, // PDR_ON -----------------------------------------*/ // VDD --------------------------------------------*/ - + }; -MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);
\ No newline at end of file +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/stm/packages/LQFP64.c b/ports/stm/packages/LQFP64.c index e6a492bc3..52ca27cd9 100644 --- a/ports/stm/packages/LQFP64.c +++ b/ports/stm/packages/LQFP64.c @@ -76,6 +76,6 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, // VSS --------------------------------------------*/ // VDD --------------------------------------------*/ - + }; MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/stm/packages/UFQFPN48.c b/ports/stm/packages/UFQFPN48.c index ae4bcf6cd..5304482ec 100644 --- a/ports/stm/packages/UFQFPN48.c +++ b/ports/stm/packages/UFQFPN48.c @@ -58,6 +58,6 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, // VSS --------------------------------------------*/ // VDD --------------------------------------------*/ - + }; -MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);
\ No newline at end of file +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/stm/peripherals/periph.h b/ports/stm/peripherals/periph.h index 316dbbec5..34089c849 100644 --- a/ports/stm/peripherals/periph.h +++ b/ports/stm/peripherals/periph.h @@ -51,8 +51,8 @@ typedef struct { // Timer Peripheral typedef struct { - uint8_t tim_index:4; - uint8_t altfn_index:4; + uint8_t tim_index:4; + uint8_t altfn_index:4; uint8_t channel_index:4; const mcu_pin_obj_t * pin; } mcu_tim_pin_obj_t; diff --git a/ports/stm/peripherals/pins.h b/ports/stm/peripherals/pins.h index 8f06d012e..358313f56 100644 --- a/ports/stm/peripherals/pins.h +++ b/ports/stm/peripherals/pins.h @@ -39,7 +39,7 @@ typedef struct { mp_obj_base_t base; uint8_t port:4; uint8_t number:4; - uint8_t adc_unit:3; + uint8_t adc_unit:3; uint8_t adc_channel:5; } mcu_pin_obj_t; @@ -50,8 +50,8 @@ typedef struct { #define ADC_3 4 //STM32 ADC pins can have a combination of 1, 2 or all 3 ADCs on a single pin, -//but all 3 ADCs will share the same input number per pin. -//F4 family has 3 ADC max, 24 channels max. +//but all 3 ADCs will share the same input number per pin. +//F4 family has 3 ADC max, 24 channels max. #define ADC_INPUT(mask, number) \ .adc_unit = mask, \ .adc_channel = number, @@ -63,7 +63,7 @@ typedef struct { extern const mp_obj_type_t mcu_pin_type; // STM32 can have up to 9 ports, each restricted to 16 pins -// We split the pin/port evenly, in contrast to nrf. +// We split the pin/port evenly, in contrast to nrf. #define PIN(p_port, p_number, p_adc) \ { \ { &mcu_pin_type }, \ diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/gpio.c b/ports/stm/peripherals/stm32f4/stm32f401xe/gpio.c index 514bcc506..d10fcbb6f 100644 --- a/ports/stm/peripherals/stm32f4/stm32f401xe/gpio.c +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/gpio.c @@ -42,4 +42,3 @@ void stm32_peripherals_gpio_init(void) { never_reset_pin_number(0,13); //PA13 SWDIO never_reset_pin_number(0,14); //PA14 SWCLK } - diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/periph.h b/ports/stm/peripherals/stm32f4/stm32f401xe/periph.h index 334a14db5..ae416bda1 100644 --- a/ports/stm/peripherals/stm32f4/stm32f401xe/periph.h +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/periph.h @@ -54,4 +54,4 @@ extern const mcu_periph_obj_t mcu_uart_rx_list[6]; TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; -#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F401XE_PERIPH_H
\ No newline at end of file +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F401XE_PERIPH_H diff --git a/ports/stm/peripherals/stm32f4/stm32f401xe/pins.c b/ports/stm/peripherals/stm32f4/stm32f401xe/pins.c index eea2a1a1b..ed89f0de6 100644 --- a/ports/stm/peripherals/stm32f4/stm32f401xe/pins.c +++ b/ports/stm/peripherals/stm32f4/stm32f401xe/pins.c @@ -120,4 +120,4 @@ const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC); const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC); const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC); -const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC);
\ No newline at end of file +const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/gpio.c b/ports/stm/peripherals/stm32f4/stm32f405xx/gpio.c index a5f4eae78..03fba6289 100644 --- a/ports/stm/peripherals/stm32f4/stm32f405xx/gpio.c +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/gpio.c @@ -48,12 +48,10 @@ void stm32_peripherals_gpio_init(void) { // never_reset_pin_number(1,4); //PB4 JTRST // Port H is not included in GPIO port array - // never_reset_pin_number(5,0); //PH0 JTDO + // never_reset_pin_number(5,0); //PH0 JTDO // never_reset_pin_number(5,1); //PH1 JTRST } void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) { } - - diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h index 98b4fab9c..df67a99d7 100644 --- a/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h @@ -54,4 +54,4 @@ extern const mcu_periph_obj_t mcu_uart_rx_list[12]; TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; -#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F405XX_PERIPH_H
\ No newline at end of file +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F405XX_PERIPH_H diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/pins.c b/ports/stm/peripherals/stm32f4/stm32f405xx/pins.c index 0f669f1c6..4282741a8 100644 --- a/ports/stm/peripherals/stm32f4/stm32f405xx/pins.c +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/pins.c @@ -38,17 +38,17 @@ const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); //anti-tamp const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); //OSC32_IN const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT -const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF03 = PIN(5, 3, ADC_INPUT(ADC_3,9)); // 144 only -const mcu_pin_obj_t pin_PF04 = PIN(5, 4, ADC_INPUT(ADC_3,14)); // 144 only -const mcu_pin_obj_t pin_PF05 = PIN(5, 5, ADC_INPUT(ADC_3,15)); // 144 only -const mcu_pin_obj_t pin_PF06 = PIN(5, 6, ADC_INPUT(ADC_3,4)); // 144 only -const mcu_pin_obj_t pin_PF07 = PIN(5, 7, ADC_INPUT(ADC_3,5)); // 144 only -const mcu_pin_obj_t pin_PF08 = PIN(5, 8, ADC_INPUT(ADC_3,6)); // 144 only -const mcu_pin_obj_t pin_PF09 = PIN(5, 9, ADC_INPUT(ADC_3,7)); // 144 only -const mcu_pin_obj_t pin_PF10 = PIN(5, 10, ADC_INPUT(ADC_3,8)); // 144 only +const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF03 = PIN(5, 3, ADC_INPUT(ADC_3,9)); // 144 only +const mcu_pin_obj_t pin_PF04 = PIN(5, 4, ADC_INPUT(ADC_3,14)); // 144 only +const mcu_pin_obj_t pin_PF05 = PIN(5, 5, ADC_INPUT(ADC_3,15)); // 144 only +const mcu_pin_obj_t pin_PF06 = PIN(5, 6, ADC_INPUT(ADC_3,4)); // 144 only +const mcu_pin_obj_t pin_PF07 = PIN(5, 7, ADC_INPUT(ADC_3,5)); // 144 only +const mcu_pin_obj_t pin_PF08 = PIN(5, 8, ADC_INPUT(ADC_3,6)); // 144 only +const mcu_pin_obj_t pin_PF09 = PIN(5, 9, ADC_INPUT(ADC_3,7)); // 144 only +const mcu_pin_obj_t pin_PF10 = PIN(5, 10, ADC_INPUT(ADC_3,8)); // 144 only const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_123,10)); const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_123,11)); @@ -71,14 +71,14 @@ const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_12,8)); const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_12,9)); const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); //BOOT1 -const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC); // 144 only const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC); const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC); @@ -91,7 +91,7 @@ const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC); const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC); const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC); -const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC); +const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC); const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC); const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC); const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/pins.h b/ports/stm/peripherals/stm32f4/stm32f405xx/pins.h index b3e5e3344..e722b6e5a 100644 --- a/ports/stm/peripherals/stm32f4/stm32f405xx/pins.h +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/pins.h @@ -38,17 +38,17 @@ extern const mcu_pin_obj_t pin_PC13; extern const mcu_pin_obj_t pin_PC14; //pg 51 extern const mcu_pin_obj_t pin_PC15; -extern const mcu_pin_obj_t pin_PF00; // 144 only -extern const mcu_pin_obj_t pin_PF01; // 144 only -extern const mcu_pin_obj_t pin_PF02; // 144 only -extern const mcu_pin_obj_t pin_PF03; // 144 only -extern const mcu_pin_obj_t pin_PF04; // 144 only -extern const mcu_pin_obj_t pin_PF05; // 144 only -extern const mcu_pin_obj_t pin_PF06; // 144 only -extern const mcu_pin_obj_t pin_PF07; // 144 only -extern const mcu_pin_obj_t pin_PF08; // 144 only -extern const mcu_pin_obj_t pin_PF09; // 144 only -extern const mcu_pin_obj_t pin_PF10; // 144 only +extern const mcu_pin_obj_t pin_PF00; // 144 only +extern const mcu_pin_obj_t pin_PF01; // 144 only +extern const mcu_pin_obj_t pin_PF02; // 144 only +extern const mcu_pin_obj_t pin_PF03; // 144 only +extern const mcu_pin_obj_t pin_PF04; // 144 only +extern const mcu_pin_obj_t pin_PF05; // 144 only +extern const mcu_pin_obj_t pin_PF06; // 144 only +extern const mcu_pin_obj_t pin_PF07; // 144 only +extern const mcu_pin_obj_t pin_PF08; // 144 only +extern const mcu_pin_obj_t pin_PF09; // 144 only +extern const mcu_pin_obj_t pin_PF10; // 144 only //pg 52 extern const mcu_pin_obj_t pin_PC00; extern const mcu_pin_obj_t pin_PC01; @@ -69,13 +69,13 @@ extern const mcu_pin_obj_t pin_PC05; extern const mcu_pin_obj_t pin_PB00; extern const mcu_pin_obj_t pin_PB01; extern const mcu_pin_obj_t pin_PB02; -extern const mcu_pin_obj_t pin_PF11; // 144 only -extern const mcu_pin_obj_t pin_PF12; // 144 only -extern const mcu_pin_obj_t pin_PF13; // 144 only -extern const mcu_pin_obj_t pin_PF14; // 144 only -extern const mcu_pin_obj_t pin_PF15; // 144 only -extern const mcu_pin_obj_t pin_PG00; // 144 only -extern const mcu_pin_obj_t pin_PG01; // 144 only +extern const mcu_pin_obj_t pin_PF11; // 144 only +extern const mcu_pin_obj_t pin_PF12; // 144 only +extern const mcu_pin_obj_t pin_PF13; // 144 only +extern const mcu_pin_obj_t pin_PF14; // 144 only +extern const mcu_pin_obj_t pin_PF15; // 144 only +extern const mcu_pin_obj_t pin_PG00; // 144 only +extern const mcu_pin_obj_t pin_PG01; // 144 only //pg 55 extern const mcu_pin_obj_t pin_PE07; extern const mcu_pin_obj_t pin_PE08; diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/gpio.c b/ports/stm/peripherals/stm32f4/stm32f407xx/gpio.c index a5f4eae78..03fba6289 100644 --- a/ports/stm/peripherals/stm32f4/stm32f407xx/gpio.c +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/gpio.c @@ -48,12 +48,10 @@ void stm32_peripherals_gpio_init(void) { // never_reset_pin_number(1,4); //PB4 JTRST // Port H is not included in GPIO port array - // never_reset_pin_number(5,0); //PH0 JTDO + // never_reset_pin_number(5,0); //PH0 JTDO // never_reset_pin_number(5,1); //PH1 JTRST } void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) { } - - diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/periph.h b/ports/stm/peripherals/stm32f4/stm32f407xx/periph.h index 15cbfb16d..55c00ee93 100644 --- a/ports/stm/peripherals/stm32f4/stm32f407xx/periph.h +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/periph.h @@ -54,4 +54,4 @@ extern const mcu_periph_obj_t mcu_uart_rx_list[12]; TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; -#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F407XX_PERIPH_H
\ No newline at end of file +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F407XX_PERIPH_H diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/pins.c b/ports/stm/peripherals/stm32f4/stm32f407xx/pins.c index 0f669f1c6..4282741a8 100644 --- a/ports/stm/peripherals/stm32f4/stm32f407xx/pins.c +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/pins.c @@ -38,17 +38,17 @@ const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); //anti-tamp const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); //OSC32_IN const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT -const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF03 = PIN(5, 3, ADC_INPUT(ADC_3,9)); // 144 only -const mcu_pin_obj_t pin_PF04 = PIN(5, 4, ADC_INPUT(ADC_3,14)); // 144 only -const mcu_pin_obj_t pin_PF05 = PIN(5, 5, ADC_INPUT(ADC_3,15)); // 144 only -const mcu_pin_obj_t pin_PF06 = PIN(5, 6, ADC_INPUT(ADC_3,4)); // 144 only -const mcu_pin_obj_t pin_PF07 = PIN(5, 7, ADC_INPUT(ADC_3,5)); // 144 only -const mcu_pin_obj_t pin_PF08 = PIN(5, 8, ADC_INPUT(ADC_3,6)); // 144 only -const mcu_pin_obj_t pin_PF09 = PIN(5, 9, ADC_INPUT(ADC_3,7)); // 144 only -const mcu_pin_obj_t pin_PF10 = PIN(5, 10, ADC_INPUT(ADC_3,8)); // 144 only +const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF03 = PIN(5, 3, ADC_INPUT(ADC_3,9)); // 144 only +const mcu_pin_obj_t pin_PF04 = PIN(5, 4, ADC_INPUT(ADC_3,14)); // 144 only +const mcu_pin_obj_t pin_PF05 = PIN(5, 5, ADC_INPUT(ADC_3,15)); // 144 only +const mcu_pin_obj_t pin_PF06 = PIN(5, 6, ADC_INPUT(ADC_3,4)); // 144 only +const mcu_pin_obj_t pin_PF07 = PIN(5, 7, ADC_INPUT(ADC_3,5)); // 144 only +const mcu_pin_obj_t pin_PF08 = PIN(5, 8, ADC_INPUT(ADC_3,6)); // 144 only +const mcu_pin_obj_t pin_PF09 = PIN(5, 9, ADC_INPUT(ADC_3,7)); // 144 only +const mcu_pin_obj_t pin_PF10 = PIN(5, 10, ADC_INPUT(ADC_3,8)); // 144 only const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_123,10)); const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_123,11)); @@ -71,14 +71,14 @@ const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_12,8)); const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_12,9)); const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); //BOOT1 -const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC); // 144 only const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC); const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC); @@ -91,7 +91,7 @@ const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC); const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC); const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC); -const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC); +const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC); const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC); const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC); const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f407xx/pins.h b/ports/stm/peripherals/stm32f4/stm32f407xx/pins.h index 109dcb922..a247fe631 100644 --- a/ports/stm/peripherals/stm32f4/stm32f407xx/pins.h +++ b/ports/stm/peripherals/stm32f4/stm32f407xx/pins.h @@ -38,17 +38,17 @@ extern const mcu_pin_obj_t pin_PC13; extern const mcu_pin_obj_t pin_PC14; //pg 51 extern const mcu_pin_obj_t pin_PC15; -extern const mcu_pin_obj_t pin_PF00; // 144 only -extern const mcu_pin_obj_t pin_PF01; // 144 only -extern const mcu_pin_obj_t pin_PF02; // 144 only -extern const mcu_pin_obj_t pin_PF03; // 144 only -extern const mcu_pin_obj_t pin_PF04; // 144 only -extern const mcu_pin_obj_t pin_PF05; // 144 only -extern const mcu_pin_obj_t pin_PF06; // 144 only -extern const mcu_pin_obj_t pin_PF07; // 144 only -extern const mcu_pin_obj_t pin_PF08; // 144 only -extern const mcu_pin_obj_t pin_PF09; // 144 only -extern const mcu_pin_obj_t pin_PF10; // 144 only +extern const mcu_pin_obj_t pin_PF00; // 144 only +extern const mcu_pin_obj_t pin_PF01; // 144 only +extern const mcu_pin_obj_t pin_PF02; // 144 only +extern const mcu_pin_obj_t pin_PF03; // 144 only +extern const mcu_pin_obj_t pin_PF04; // 144 only +extern const mcu_pin_obj_t pin_PF05; // 144 only +extern const mcu_pin_obj_t pin_PF06; // 144 only +extern const mcu_pin_obj_t pin_PF07; // 144 only +extern const mcu_pin_obj_t pin_PF08; // 144 only +extern const mcu_pin_obj_t pin_PF09; // 144 only +extern const mcu_pin_obj_t pin_PF10; // 144 only //pg 52 extern const mcu_pin_obj_t pin_PC00; extern const mcu_pin_obj_t pin_PC01; @@ -69,13 +69,13 @@ extern const mcu_pin_obj_t pin_PC05; extern const mcu_pin_obj_t pin_PB00; extern const mcu_pin_obj_t pin_PB01; extern const mcu_pin_obj_t pin_PB02; -extern const mcu_pin_obj_t pin_PF11; // 144 only -extern const mcu_pin_obj_t pin_PF12; // 144 only -extern const mcu_pin_obj_t pin_PF13; // 144 only -extern const mcu_pin_obj_t pin_PF14; // 144 only -extern const mcu_pin_obj_t pin_PF15; // 144 only -extern const mcu_pin_obj_t pin_PG00; // 144 only -extern const mcu_pin_obj_t pin_PG01; // 144 only +extern const mcu_pin_obj_t pin_PF11; // 144 only +extern const mcu_pin_obj_t pin_PF12; // 144 only +extern const mcu_pin_obj_t pin_PF13; // 144 only +extern const mcu_pin_obj_t pin_PF14; // 144 only +extern const mcu_pin_obj_t pin_PF15; // 144 only +extern const mcu_pin_obj_t pin_PG00; // 144 only +extern const mcu_pin_obj_t pin_PG01; // 144 only //pg 55 extern const mcu_pin_obj_t pin_PE07; extern const mcu_pin_obj_t pin_PE08; diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/gpio.c b/ports/stm/peripherals/stm32f4/stm32f411xe/gpio.c index 9aabffa9f..08c6b55cd 100644 --- a/ports/stm/peripherals/stm32f4/stm32f411xe/gpio.c +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/gpio.c @@ -56,5 +56,3 @@ void stm32_peripherals_gpio_init(void) { //LEDs are inverted on F411 DISCO void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) { } - - diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/periph.h b/ports/stm/peripherals/stm32f4/stm32f411xe/periph.h index 2c5e5dd56..14a73d12f 100644 --- a/ports/stm/peripherals/stm32f4/stm32f411xe/periph.h +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/periph.h @@ -54,4 +54,4 @@ extern const mcu_periph_obj_t mcu_uart_rx_list[7]; TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; -#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F411XE_PERIPH_H
\ No newline at end of file +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F411XE_PERIPH_H diff --git a/ports/stm/peripherals/stm32f4/stm32f411xe/pins.c b/ports/stm/peripherals/stm32f4/stm32f411xe/pins.c index eea2a1a1b..ed89f0de6 100644 --- a/ports/stm/peripherals/stm32f4/stm32f411xe/pins.c +++ b/ports/stm/peripherals/stm32f4/stm32f411xe/pins.c @@ -120,4 +120,4 @@ const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC); const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC); const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC); -const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC);
\ No newline at end of file +const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/gpio.c b/ports/stm/peripherals/stm32f4/stm32f412zx/gpio.c index 3ec1b5b79..5ca4667a4 100644 --- a/ports/stm/peripherals/stm32f4/stm32f412zx/gpio.c +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/gpio.c @@ -49,6 +49,6 @@ void stm32_peripherals_gpio_init(void) { //never_reset_pin_number(1,4); //PB4 JTRST // Port H is not included in GPIO port array - // never_reset_pin_number(5,0); //PH0 JTDO + // never_reset_pin_number(5,0); //PH0 JTDO // never_reset_pin_number(5,1); //PH1 JTRST } diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/periph.h b/ports/stm/peripherals/stm32f4/stm32f412zx/periph.h index f668ace75..f6b001a4e 100644 --- a/ports/stm/peripherals/stm32f4/stm32f412zx/periph.h +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/periph.h @@ -55,4 +55,4 @@ extern const mcu_periph_obj_t mcu_uart_rx_list[12]; TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; -#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F412ZX_PERIPH_H
\ No newline at end of file +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F412ZX_PERIPH_H diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/pins.c b/ports/stm/peripherals/stm32f4/stm32f412zx/pins.c index ef3ce6d0e..c1b624f4d 100644 --- a/ports/stm/peripherals/stm32f4/stm32f412zx/pins.c +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/pins.c @@ -38,17 +38,17 @@ const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); //anti-tamp const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); //OSC32_IN const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT -const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF03 = PIN(5, 3, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF04 = PIN(5, 4, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF05 = PIN(5, 5, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF06 = PIN(5, 6, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF07 = PIN(5, 7, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF08 = PIN(5, 8, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF09 = PIN(5, 9, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF10 = PIN(5, 10, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF03 = PIN(5, 3, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF04 = PIN(5, 4, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF05 = PIN(5, 5, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF06 = PIN(5, 6, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF07 = PIN(5, 7, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF08 = PIN(5, 8, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF09 = PIN(5, 9, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF10 = PIN(5, 10, NO_ADC); // 144 only const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_1,10)); const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_1,11)); @@ -71,14 +71,14 @@ const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_1,8)); const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_1,9)); const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); -const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC); // 144 only -const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC); // 144 only const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC); const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC); diff --git a/ports/stm/peripherals/stm32f4/stm32f412zx/pins.h b/ports/stm/peripherals/stm32f4/stm32f412zx/pins.h index 5cf99345c..8914530d2 100644 --- a/ports/stm/peripherals/stm32f4/stm32f412zx/pins.h +++ b/ports/stm/peripherals/stm32f4/stm32f412zx/pins.h @@ -37,17 +37,17 @@ extern const mcu_pin_obj_t pin_PC13; extern const mcu_pin_obj_t pin_PC14; //pg 51 extern const mcu_pin_obj_t pin_PC15; -extern const mcu_pin_obj_t pin_PF00; // 144 only -extern const mcu_pin_obj_t pin_PF01; // 144 only -extern const mcu_pin_obj_t pin_PF02; // 144 only -extern const mcu_pin_obj_t pin_PF03; // 144 only -extern const mcu_pin_obj_t pin_PF04; // 144 only -extern const mcu_pin_obj_t pin_PF05; // 144 only -extern const mcu_pin_obj_t pin_PF06; // 144 only -extern const mcu_pin_obj_t pin_PF07; // 144 only -extern const mcu_pin_obj_t pin_PF08; // 144 only -extern const mcu_pin_obj_t pin_PF09; // 144 only -extern const mcu_pin_obj_t pin_PF10; // 144 only +extern const mcu_pin_obj_t pin_PF00; // 144 only +extern const mcu_pin_obj_t pin_PF01; // 144 only +extern const mcu_pin_obj_t pin_PF02; // 144 only +extern const mcu_pin_obj_t pin_PF03; // 144 only +extern const mcu_pin_obj_t pin_PF04; // 144 only +extern const mcu_pin_obj_t pin_PF05; // 144 only +extern const mcu_pin_obj_t pin_PF06; // 144 only +extern const mcu_pin_obj_t pin_PF07; // 144 only +extern const mcu_pin_obj_t pin_PF08; // 144 only +extern const mcu_pin_obj_t pin_PF09; // 144 only +extern const mcu_pin_obj_t pin_PF10; // 144 only //pg 52 extern const mcu_pin_obj_t pin_PC00; extern const mcu_pin_obj_t pin_PC01; @@ -68,13 +68,13 @@ extern const mcu_pin_obj_t pin_PC05; extern const mcu_pin_obj_t pin_PB00; extern const mcu_pin_obj_t pin_PB01; extern const mcu_pin_obj_t pin_PB02; -extern const mcu_pin_obj_t pin_PF11; // 144 only -extern const mcu_pin_obj_t pin_PF12; // 144 only -extern const mcu_pin_obj_t pin_PF13; // 144 only -extern const mcu_pin_obj_t pin_PF14; // 144 only -extern const mcu_pin_obj_t pin_PF15; // 144 only -extern const mcu_pin_obj_t pin_PG00; // 144 only -extern const mcu_pin_obj_t pin_PG01; // 144 only +extern const mcu_pin_obj_t pin_PF11; // 144 only +extern const mcu_pin_obj_t pin_PF12; // 144 only +extern const mcu_pin_obj_t pin_PF13; // 144 only +extern const mcu_pin_obj_t pin_PF14; // 144 only +extern const mcu_pin_obj_t pin_PF15; // 144 only +extern const mcu_pin_obj_t pin_PG00; // 144 only +extern const mcu_pin_obj_t pin_PG01; // 144 only //pg 55 extern const mcu_pin_obj_t pin_PE07; extern const mcu_pin_obj_t pin_PE08; diff --git a/ports/stm/peripherals/stm32f7/stm32f746xx/gpio.c b/ports/stm/peripherals/stm32f7/stm32f746xx/gpio.c index cee4b4f45..ca64428eb 100644 --- a/ports/stm/peripherals/stm32f7/stm32f746xx/gpio.c +++ b/ports/stm/peripherals/stm32f7/stm32f746xx/gpio.c @@ -50,4 +50,3 @@ void stm32_peripherals_gpio_init(void) { never_reset_pin_number(7,0); //PH0 OSC_IN never_reset_pin_number(7,1); //PH1 OSC_OUT } - diff --git a/ports/stm/peripherals/stm32f7/stm32f746xx/pins.c b/ports/stm/peripherals/stm32f7/stm32f746xx/pins.c index 895ad5ec0..ae940c1a0 100644 --- a/ports/stm/peripherals/stm32f7/stm32f746xx/pins.c +++ b/ports/stm/peripherals/stm32f7/stm32f746xx/pins.c @@ -28,7 +28,7 @@ #include "py/mphal.h" #include "peripherals/pins.h" -// Todo: some pins do have ADCs, but the module isn't set up yet. +// Todo: some pins do have ADCs, but the module isn't set up yet. const mcu_pin_obj_t pin_PA00 = PIN(0, 0, NO_ADC); const mcu_pin_obj_t pin_PA01 = PIN(0, 1, NO_ADC); diff --git a/ports/stm/peripherals/stm32f7/stm32f767xx/gpio.c b/ports/stm/peripherals/stm32f7/stm32f767xx/gpio.c index d51ff53c1..1189948c7 100644 --- a/ports/stm/peripherals/stm32f7/stm32f767xx/gpio.c +++ b/ports/stm/peripherals/stm32f7/stm32f767xx/gpio.c @@ -44,5 +44,3 @@ void stm32_peripherals_gpio_init(void) { never_reset_pin_number(0,13); //PA13 SWDIO never_reset_pin_number(0,14); //PA14 SWCLK } - - diff --git a/ports/stm/peripherals/stm32f7/stm32f767xx/periph.h b/ports/stm/peripherals/stm32f7/stm32f767xx/periph.h index 98aa5782a..438964c3e 100644 --- a/ports/stm/peripherals/stm32f7/stm32f767xx/periph.h +++ b/ports/stm/peripherals/stm32f7/stm32f767xx/periph.h @@ -54,4 +54,4 @@ TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; -#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F767XX_PERIPH_H
\ No newline at end of file +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F767XX_PERIPH_H diff --git a/ports/stm/peripherals/stm32f7/stm32f767xx/pins.c b/ports/stm/peripherals/stm32f7/stm32f767xx/pins.c index 870545f99..5c9daea98 100644 --- a/ports/stm/peripherals/stm32f7/stm32f767xx/pins.c +++ b/ports/stm/peripherals/stm32f7/stm32f767xx/pins.c @@ -28,7 +28,7 @@ #include "py/mphal.h" #include "peripherals/pins.h" -// Todo: some pins do have ADCs, but the module isn't set up yet. +// Todo: some pins do have ADCs, but the module isn't set up yet. const mcu_pin_obj_t pin_PA00 = PIN(0, 0, NO_ADC); const mcu_pin_obj_t pin_PA01 = PIN(0, 1, NO_ADC); diff --git a/ports/stm/peripherals/stm32h7/stm32h743xx/gpio.c b/ports/stm/peripherals/stm32h7/stm32h743xx/gpio.c index d51ff53c1..1189948c7 100644 --- a/ports/stm/peripherals/stm32h7/stm32h743xx/gpio.c +++ b/ports/stm/peripherals/stm32h7/stm32h743xx/gpio.c @@ -44,5 +44,3 @@ void stm32_peripherals_gpio_init(void) { never_reset_pin_number(0,13); //PA13 SWDIO never_reset_pin_number(0,14); //PA14 SWCLK } - - diff --git a/ports/stm/peripherals/stm32h7/stm32h743xx/periph.h b/ports/stm/peripherals/stm32h7/stm32h743xx/periph.h index 4b852413b..9aa2f7366 100644 --- a/ports/stm/peripherals/stm32h7/stm32h743xx/periph.h +++ b/ports/stm/peripherals/stm32h7/stm32h743xx/periph.h @@ -52,4 +52,4 @@ const mcu_periph_obj_t mcu_uart_rx_list[26]; #define TIM_PIN_ARRAY_LEN 58 TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; -#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32H743XX_PERIPH_H
\ No newline at end of file +#endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32H743XX_PERIPH_H diff --git a/ports/stm/peripherals/stm32h7/stm32h743xx/pins.c b/ports/stm/peripherals/stm32h7/stm32h743xx/pins.c index 491fe6938..7484781c2 100644 --- a/ports/stm/peripherals/stm32h7/stm32h743xx/pins.c +++ b/ports/stm/peripherals/stm32h7/stm32h743xx/pins.c @@ -28,7 +28,7 @@ #include "py/mphal.h" #include "peripherals/pins.h" -// Todo: some pins do have ADCs, but the module isn't set up yet. +// Todo: some pins do have ADCs, but the module isn't set up yet. const mcu_pin_obj_t pin_PA00 = PIN(0, 0, NO_ADC); const mcu_pin_obj_t pin_PA01 = PIN(0, 1, NO_ADC); diff --git a/ports/stm/supervisor/internal_flash.c b/ports/stm/supervisor/internal_flash.c index 060eadecb..d37a54f60 100644 --- a/ports/stm/supervisor/internal_flash.c +++ b/ports/stm/supervisor/internal_flash.c @@ -321,4 +321,3 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t block_num, void supervisor_flash_release_cache(void) { } - diff --git a/ports/stm/supervisor/port.c b/ports/stm/supervisor/port.c index 9b62fa2eb..dfe4c5ba2 100644 --- a/ports/stm/supervisor/port.c +++ b/ports/stm/supervisor/port.c @@ -453,4 +453,3 @@ void _init(void) { } - diff --git a/ports/stm/supervisor/serial.c b/ports/stm/supervisor/serial.c index ce1366000..3a058ed2e 100644 --- a/ports/stm/supervisor/serial.c +++ b/ports/stm/supervisor/serial.c @@ -72,4 +72,3 @@ void serial_write_substring(const char *text, uint32_t len) { } HAL_UART_Transmit(&huart2, (uint8_t*)text, len, 5000); } - diff --git a/ports/stm/tools/examples/nucleo_h743.csv b/ports/stm/tools/examples/nucleo_h743.csv index 2481415b3..d3647ca42 100644 --- a/ports/stm/tools/examples/nucleo_h743.csv +++ b/ports/stm/tools/examples/nucleo_h743.csv @@ -127,4 +127,4 @@ ETH_RMII_RXD0,PC4 ETH_RMII_RXD1,PC5 ETH_RMII_TX_EN,PG11 ETH_RMII_TXD0,PG13 -ETH_RMII_TXD1,PB13
\ No newline at end of file +ETH_RMII_TXD1,PB13 diff --git a/ports/stm/tools/parse_af_csv.py b/ports/stm/tools/parse_af_csv.py index b257a450c..4e9725260 100644 --- a/ports/stm/tools/parse_af_csv.py +++ b/ports/stm/tools/parse_af_csv.py @@ -28,8 +28,8 @@ import sys # Use: parse_af_csf.py Filename.csv -pins-only # Designed for use with .csv files from Micropython, or in identical format # created via Datasheet peripheral tables with a Sheets program. -# -# See examples/stm32f405.csv for example formatting. +# +# See examples/stm32f405.csv for example formatting. # Most peripherals (SPI, I2C) output 3 values: # peripheral index, alt function, pin string @@ -52,7 +52,7 @@ def evaluate_tim(inper, inlist, altfn, pin): if inper[:3] == "TIM" and inper[5:7] == "CH" and inper[-1:] != 'N': inlist.append([inper[3:4],altfn,inper[-1:],pin]) - + # Open target file with open(sys.argv[1]) as csv_file: csv_reader = csv.reader(csv_file, delimiter=',') @@ -107,7 +107,7 @@ with open(sys.argv[1]) as csv_file: print(" PERIPH(" + row[0] + ", " + str(row[1]) + ", &pin_" + row[2] + "),") print("};") - # Timer special case: + # Timer special case: print("const mcu_tim_pin_obj_t mcu_tim_pin_list[" + str(len(outlist[-1])) + "] = {") for row in outlist[-1]: print(" TIM(" + row[0] + ", " + str(row[1]) + ", " + str(row[2]) + ", &pin_" + row[3] + "),") diff --git a/ports/stm/tools/parse_pins_csv.py b/ports/stm/tools/parse_pins_csv.py index b69b4791b..4ab3fc25c 100644 --- a/ports/stm/tools/parse_pins_csv.py +++ b/ports/stm/tools/parse_pins_csv.py @@ -25,12 +25,12 @@ import csv import sys -# Use: parse_pins_csv.py Filename.csv +# Use: parse_pins_csv.py Filename.csv # Designed for use with .csv files from Micropython, or in identical format # created via Datasheet peripheral tables with a Sheets program. -# -# See examples/nucleo_h743.csv for example formatting. - +# +# See examples/nucleo_h743.csv for example formatting. + # Open target file with open(sys.argv[1]) as csv_file: csv_reader = csv.reader(csv_file, delimiter=',') |