From d94023e9b310731807785ffc6f4249faf4912554 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 22 Aug 2019 01:04:00 -0400 Subject: Fix CPBlue LFCLKSRC; CPB has no status neopixel --- .../nrf/boards/circuitplayground_bluefruit/mpconfigboard.h | 2 -- .../nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk | 3 +++ ports/nrf/common-hal/bleio/Adapter.c | 13 +++++++++++-- ports/nrf/common-hal/bleio/Characteristic.c | 2 +- ports/nrf/mpconfigport.mk | 5 +++++ ports/nrf/peripherals/nrf/clocks.c | 7 +++++-- 6 files changed, 25 insertions(+), 7 deletions(-) diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h index 04c7e8d60..f618a652c 100644 --- a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h +++ b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h @@ -34,8 +34,6 @@ #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (4096) -#define MICROPY_HW_NEOPIXEL (&pin_P0_13) - #define MICROPY_HW_LED_STATUS (&pin_P1_14) #if QSPI_FLASH_FILESYSTEM diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk index dbb32629c..44c385c5b 100644 --- a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk +++ b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.mk @@ -10,6 +10,9 @@ MCU_CHIP = nrf52840 SD ?= s140 SOFTDEV_VERSION ?= 6.1.0 +# Unusually, board does not have a 32 kHz xtal. +BOARD_HAS_32KHZ_XTAL = 0 + BOOT_SETTING_ADDR = 0xFF000 ifeq ($(SD),) diff --git a/ports/nrf/common-hal/bleio/Adapter.c b/ports/nrf/common-hal/bleio/Adapter.c index 936dfcb9b..463e5d25b 100644 --- a/ports/nrf/common-hal/bleio/Adapter.c +++ b/ports/nrf/common-hal/bleio/Adapter.c @@ -47,8 +47,17 @@ STATIC void softdevice_assert_handler(uint32_t id, uint32_t pc, uint32_t info) { STATIC uint32_t ble_stack_enable(void) { nrf_clock_lf_cfg_t clock_config = { - .source = NRF_CLOCK_LF_SRC_XTAL, - .accuracy = NRF_CLOCK_LF_ACCURACY_20_PPM +#if BOARD_HAS_32KHZ_XTAL + .source = NRF_CLOCK_LF_SRC_XTAL, + .rc_ctiv = 0, + .rc_temp_ctiv = 0, + .accuracy = NRF_CLOCK_LF_ACCURACY_20_PPM +#else + .source = NRF_CLOCK_LF_SRC_RC, + .rc_ctiv = 16, + .rc_temp_ctiv = 2, + .accuracy = NRF_CLOCK_LF_ACCURACY_250_PPM +#endif }; uint32_t err_code = sd_softdevice_enable(&clock_config, softdevice_assert_handler); diff --git a/ports/nrf/common-hal/bleio/Characteristic.c b/ports/nrf/common-hal/bleio/Characteristic.c index 45e8d2495..604d24d73 100644 --- a/ports/nrf/common-hal/bleio/Characteristic.c +++ b/ports/nrf/common-hal/bleio/Characteristic.c @@ -183,7 +183,7 @@ void common_hal_bleio_characteristic_set_value(bleio_characteristic_obj_t *self, (self->props & CHAR_PROP_WRITE_NO_RESPONSE)); } else { if (self->fixed_length && bufinfo->len != self->max_length) { - mp_raise_ValueError(translate("Value length required fixed length")); + mp_raise_ValueError(translate("Value length != required fixed length")); } if (bufinfo->len > self->max_length) { mp_raise_ValueError(translate("Value length > max_length")); diff --git a/ports/nrf/mpconfigport.mk b/ports/nrf/mpconfigport.mk index 55920b3f4..11058cd7e 100644 --- a/ports/nrf/mpconfigport.mk +++ b/ports/nrf/mpconfigport.mk @@ -28,6 +28,11 @@ CIRCUITPY_RTC = 1 # frequencyio not yet implemented CIRCUITPY_FREQUENCYIO = 0 +ifndef BOARD_HAS_32KHZ_XTAL +# Assume crystal is present, which is the most common case. +BOARD_HAS_32KHZ_XTAL = 1 +endif + # CircuitPython doesn't yet support NFC so force the NFC antenna pins to be GPIO. # See https://github.com/adafruit/circuitpython/issues/1300 # Defined here because system_nrf52840.c doesn't #include any of our own include files. diff --git a/ports/nrf/peripherals/nrf/clocks.c b/ports/nrf/peripherals/nrf/clocks.c index 4acb878db..b8f231385 100644 --- a/ports/nrf/peripherals/nrf/clocks.c +++ b/ports/nrf/peripherals/nrf/clocks.c @@ -28,9 +28,12 @@ #include "nrfx.h" void nrf_peripherals_clocks_init(void) { - // Set low-frequency clock source to be crystal. If there's a crystalless board, this will need to be - // generalized. + +#if BOARD_HAS_32KHZ_XTAL NRF_CLOCK->LFCLKSRC = (uint32_t)((CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk); +#else + NRF_CLOCK->LFCLKSRC = (uint32_t)((CLOCK_LFCLKSRC_SRC_RC << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk); +#endif NRF_CLOCK->TASKS_LFCLKSTART = 1UL; // Wait for clocks to start. -- cgit v1.2.3 From 0b7291d76726616ade481bb802994bcd81dbb98f Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 22 Aug 2019 09:01:05 -0400 Subject: fix default crystal value; fix include order --- ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h | 2 -- ports/nrf/common-hal/bleio/Adapter.c | 4 ++-- ports/nrf/mpconfigport.h | 10 +++++----- ports/nrf/peripherals/nrf/clocks.c | 2 +- 4 files changed, 8 insertions(+), 10 deletions(-) diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h index c422dbd55..1e55cd026 100644 --- a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h +++ b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h @@ -61,8 +61,6 @@ #define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) -#define BOARD_HAS_CRYSTAL 1 - #define DEFAULT_I2C_BUS_SCL (&pin_P0_04) #define DEFAULT_I2C_BUS_SDA (&pin_P0_05) diff --git a/ports/nrf/common-hal/bleio/Adapter.c b/ports/nrf/common-hal/bleio/Adapter.c index 463e5d25b..15ae8840b 100644 --- a/ports/nrf/common-hal/bleio/Adapter.c +++ b/ports/nrf/common-hal/bleio/Adapter.c @@ -51,12 +51,12 @@ STATIC uint32_t ble_stack_enable(void) { .source = NRF_CLOCK_LF_SRC_XTAL, .rc_ctiv = 0, .rc_temp_ctiv = 0, - .accuracy = NRF_CLOCK_LF_ACCURACY_20_PPM + .accuracy = NRF_CLOCK_LF_ACCURACY_20_PPM, #else .source = NRF_CLOCK_LF_SRC_RC, .rc_ctiv = 16, .rc_temp_ctiv = 2, - .accuracy = NRF_CLOCK_LF_ACCURACY_250_PPM + .accuracy = NRF_CLOCK_LF_ACCURACY_250_PPM, #endif }; diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h index 3f939b492..0b755a156 100644 --- a/ports/nrf/mpconfigport.h +++ b/ports/nrf/mpconfigport.h @@ -38,11 +38,6 @@ #define MICROPY_PY_UBINASCII (1) #define MICROPY_PY_UJSON (1) -#ifndef BOARD_HAS_32KHZ_XTAL -// Assume crystal is present, which is the most common case. -#define BOARD_HAS_32KHZ_XTAL (0) -#endif - // TODO this is old BLE stuff #if BLUETOOTH_SD #define MICROPY_PY_BLEIO (1) @@ -58,6 +53,11 @@ #include "py/circuitpy_mpconfig.h" +#ifndef BOARD_HAS_32KHZ_XTAL +// Assume crystal is present, which is the most common case. +#define BOARD_HAS_32KHZ_XTAL (1) +#endif + #define MICROPY_PORT_ROOT_POINTERS \ CIRCUITPY_COMMON_ROOT_POINTERS \ ble_drv_evt_handler_entry_t* ble_drv_evt_handler_entries; \ diff --git a/ports/nrf/peripherals/nrf/clocks.c b/ports/nrf/peripherals/nrf/clocks.c index 67c748488..269365cc9 100644 --- a/ports/nrf/peripherals/nrf/clocks.c +++ b/ports/nrf/peripherals/nrf/clocks.c @@ -26,7 +26,7 @@ */ #include "nrfx.h" -#include "mpconfigboard.h" +#include "mpconfigport.h" void nrf_peripherals_clocks_init(void) { -- cgit v1.2.3