From 51901f7de02675d3cae0ba57ece7b464f9479767 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Fri, 4 Oct 2019 11:42:38 -0400 Subject: Add peripheral definitions --- ports/stm32f4/common-hal/busio/UART.c | 23 ++++++++++++++- ports/stm32f4/common-hal/busio/UART.h | 4 +-- ports/stm32f4/peripherals/stm32f4/periph.h | 31 ++++++++++++++++---- .../peripherals/stm32f4/stm32f405xx/periph.c | 34 ++++++++++++++++++++++ .../peripherals/stm32f4/stm32f405xx/periph.h | 7 +++++ 5 files changed, 91 insertions(+), 8 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index e1810b131..d353592bf 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -41,7 +41,28 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size) { - mp_raise_NotImplementedError(translate("UART not yet supported")); + + GPIO_InitStruct.Pin = pin_mask(10)|pin_mask(11); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART3; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + __HAL_RCC_USART2_CLK_ENABLE(); + + huart2.Instance = USART2; + huart2.Init.BaudRate = 115200; + huart2.Init.WordLength = UART_WORDLENGTH_8B; + huart2.Init.StopBits = UART_STOPBITS_1; + huart2.Init.Parity = UART_PARITY_NONE; + huart2.Init.Mode = UART_MODE_TX_RX; + huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart2.Init.OverSampling = UART_OVERSAMPLING_16; + if (HAL_UART_Init(&huart2) != HAL_OK) + { + mp_raise_NotImplementedError(translate("UART explode")); + } } bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { diff --git a/ports/stm32f4/common-hal/busio/UART.h b/ports/stm32f4/common-hal/busio/UART.h index 699233934..8a4b554c4 100644 --- a/ports/stm32f4/common-hal/busio/UART.h +++ b/ports/stm32f4/common-hal/busio/UART.h @@ -33,8 +33,8 @@ typedef struct { mp_obj_base_t base; - uint8_t rx_pin; - uint8_t tx_pin; + const mcu_uart_tx_obj_t *tx; + const mcu_uart_rx_obj_t *rx; uint8_t character_bits; bool rx_error; uint32_t baudrate; diff --git a/ports/stm32f4/peripherals/stm32f4/periph.h b/ports/stm32f4/peripherals/stm32f4/periph.h index 06ab2d3e4..c24d20586 100644 --- a/ports/stm32f4/peripherals/stm32f4/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/periph.h @@ -34,8 +34,8 @@ #include "stm32f4/pins.h" // I2C -//TODO: these objects should be condensed into a single 'periph_pin' unless we -//find a compelling reason to store more unique data in them. +// TODO: these objects should be condensed into a single 'periph_pin' unless we +// find a compelling reason to store more unique data in them. typedef struct { uint8_t i2c_index:4; // Index of the I2C unit (1 to 3) @@ -65,8 +65,8 @@ typedef struct { } // SPI -//TODO: these objects should be condensed into a single 'periph_pin' unless we -//find a compelling reason to store more unique data in them. +// TODO: these objects should be condensed into a single 'periph_pin' unless we +// find a compelling reason to store more unique data in them. typedef struct { uint8_t spi_index:4; //Up to 6 SPI units @@ -99,7 +99,28 @@ typedef struct { .pin = spi_pin, \ } -// TODO: SPI, UART, etc +// UART +// TODO: these objects should be condensed into a single 'periph_pin' unless we +// find a compelling reason to store more unique data in them. + +typedef struct { + uint8_t uart_index:4; + uint8_t altfn_index:4; + const mcu_pin_obj_t * pin; +} mcu_uart_tx_obj_t; + +typedef struct { + uint8_t uart_index:4; + uint8_t altfn_index:4; + const mcu_pin_obj_t * pin; +} mcu_uart_rx_obj_t; + +#define UART(index, alt, uart_pin) \ +{ \ + .uart_index = index, \ + .altfn_index = alt, \ + .pin = uart_pin, \ +} // Choose based on chip #ifdef STM32F412Zx diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c index 7b0a54e55..c1c78b3bf 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c @@ -85,4 +85,38 @@ const mcu_spi_nss_obj_t mcu_spi_nss_list[6] = { SPI(3, 6, &pin_PA04), SPI(3, 6, &pin_PA15), }; + +USART_TypeDef * mcu_uart_banks[6] = {USART1, USART2, USART3, UART4, UART5, USART6}; +bool mcu_uart_has_usart[6] = {true, true, true, false, false, true}; + +const mcu_uart_tx_obj_t mcu_uart_tx_list[12] = { + UART(4, 8, &pin_PA00), + UART(2, 7, &pin_PA02), + UART(1, 7, &pin_PA09), + UART(1, 7, &pin_PB06), + UART(3, 7, &pin_PB10), + UART(6, 8, &pin_PC06), + UART(3, 7, &pin_PC10), + UART(4, 8, &pin_PC10), + UART(5, 8, &pin_PC12), + UART(2, 7, &pin_PD05), + UART(3, 7, &pin_PD08), + UART(6, 8, &pin_PG14), +}; + +const mcu_uart_rx_obj_t mcu_uart_rx_list[12] = { + UART(4, 8, &pin_PA01), + UART(2, 7, &pin_PA03), + UART(1, 7, &pin_PA10), + UART(1, 7, &pin_PB07), + UART(3, 7, &pin_PB11), + UART(6, 8, &pin_PC07), + UART(3, 7, &pin_PC11), + UART(4, 8, &pin_PC11), + UART(5, 8, &pin_PD02), + UART(2, 7, &pin_PD06), + UART(3, 7, &pin_PD09), + UART(6, 8, &pin_PG09), +}; + //UART, Etc diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h index cb9b33f6e..673772026 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h @@ -41,5 +41,12 @@ extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6]; extern const mcu_spi_miso_obj_t mcu_spi_miso_list[6]; extern const mcu_spi_nss_obj_t mcu_spi_nss_list[6]; +//UART +extern USART_TypeDef * mcu_uart_banks[6]; +bool mcu_uart_has_usart[6] + +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[12]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; + #endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H \ No newline at end of file -- cgit v1.2.3 From 0b85172ba6358a1b57191cef52b051ba9fa4919b Mon Sep 17 00:00:00 2001 From: Hierophect Date: Fri, 4 Oct 2019 14:37:18 -0400 Subject: WIP --- ports/stm32f4/Makefile | 1 + .../boards/feather_f405/stm32f4xx_hal_conf.h | 2 +- ports/stm32f4/common-hal/busio/UART.c | 167 +++++++++++++++++++-- ports/stm32f4/common-hal/busio/UART.h | 4 + .../peripherals/stm32f4/stm32f405xx/periph.h | 2 +- ports/stm32f4/supervisor/port.c | 2 + 6 files changed, 160 insertions(+), 18 deletions(-) diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index bef26d662..50d0e980f 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -152,6 +152,7 @@ SRC_STM32 = \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_utils.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_exti.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c \ diff --git a/ports/stm32f4/boards/feather_f405/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/feather_f405/stm32f4xx_hal_conf.h index 019b03ca7..04cb75f2b 100644 --- a/ports/stm32f4/boards/feather_f405/stm32f4xx_hal_conf.h +++ b/ports/stm32f4/boards/feather_f405/stm32f4xx_hal_conf.h @@ -63,7 +63,7 @@ #define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +#define HAL_USART_MODULE_ENABLED /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index d353592bf..aef2f6263 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -35,34 +35,157 @@ #include "py/stream.h" #include "supervisor/shared/translate.h" +#include "common-hal/microcontroller/Pin.h" +#include "stm32f4xx_hal.h" + #include "tick.h" +STATIC bool reserved_uart[10]; + +void uart_reset(void) { + //ugh. reduce this + #ifdef USART1 + reserved_uart[0] = false; + __HAL_RCC_USART1_CLK_DISABLE(); + #endif + #ifdef USART2 + reserved_uart[1] = false; + __HAL_RCC_USART2_CLK_DISABLE(); + #endif + #ifdef USART3 + reserved_uart[2] = false; + __HAL_RCC_USART3_CLK_DISABLE(); + #endif + #ifdef UART4 + reserved_uart[3] = false; + __HAL_RCC_UART4_CLK_DISABLE(); + #endif + #ifdef UART5 + reserved_uart[4] = false; + __HAL_RCC_UART5_CLK_DISABLE(); + #endif + #ifdef USART6 + reserved_uart[5] = false; + __HAL_RCC_USART6_CLK_DISABLE(); + #endif +} + void common_hal_busio_uart_construct(busio_uart_obj_t *self, const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size) { - GPIO_InitStruct.Pin = pin_mask(10)|pin_mask(11); + //match pins to UART objects + USART_TypeDef * USARTx; + + uint8_t tx_len = sizeof(mcu_uart_tx_list)/sizeof(*mcu_uart_tx_list); + uint8_t rx_len = sizeof(mcu_uart_rx_list)/sizeof(*mcu_uart_rx_list); + + bool uart_taken = false; + //tx + for(uint i=0; itx = &mcu_uart_tx_list[i]; + self->rx = &mcu_uart_rx_list[j]; + break; + } + } + } + } + + //handle typedef selection, errors + if(self->tx!=NULL && self->rx!=NULL) { + USARTx = mcu_uart_banks[self->tx->uart_index-1]; + } else { + if (uart_taken) { + mp_raise_ValueError(translate("Hardware busy, try alternative pins")); + } else { + mp_raise_ValueError(translate("Invalid UART pin selection")); + } + } + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(tx->number); GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_PULLUP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF7_USART3; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - __HAL_RCC_USART2_CLK_ENABLE(); - - huart2.Instance = USART2; - huart2.Init.BaudRate = 115200; - huart2.Init.WordLength = UART_WORDLENGTH_8B; - huart2.Init.StopBits = UART_STOPBITS_1; - huart2.Init.Parity = UART_PARITY_NONE; - huart2.Init.Mode = UART_MODE_TX_RX; - huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart2.Init.OverSampling = UART_OVERSAMPLING_16; - if (HAL_UART_Init(&huart2) != HAL_OK) + GPIO_InitStruct.Alternate = self->tx->altfn_index; + HAL_GPIO_Init(pin_port(tx->port), &GPIO_InitStruct); + + GPIO_InitStruct.Pin = pin_mask(rx->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->rx->altfn_index; + HAL_GPIO_Init(pin_port(rx->port), &GPIO_InitStruct); + + #ifdef USART1 + if(USARTx==USART1) { + reserved_uart[0] = true; + __HAL_RCC_USART1_CLK_ENABLE(); + mp_printf(&mp_plat_print, "USART1"); + } + #endif + #ifdef UART2 + if(USARTx==USART2) { + reserved_uart[1] = true; + __HAL_RCC_USART2_CLK_ENABLE(); + mp_printf(&mp_plat_print, "USART2"); + } + #endif + #ifdef USART3 + if(USARTx==USART3) { + reserved_uart[2] = true; + __HAL_RCC_USART3_CLK_ENABLE(); + mp_printf(&mp_plat_print, "USART3"); + } + #endif + #ifdef UART4 + if(USARTx==UART4) { + reserved_uart[3] = true; + __HAL_RCC_UART4_CLK_ENABLE(); + mp_printf(&mp_plat_print, "USART4"); + } + #endif + #ifdef UART5 + if(USARTx==UART5) { + reserved_uart[4] = true; + __HAL_RCC_UART5_CLK_ENABLE(); + mp_printf(&mp_plat_print, "USART5"); + } + #endif + #ifdef USART6 + if(USARTx==USART6) { + reserved_uart[5] = true; + __HAL_RCC_USART6_CLK_ENABLE(); + mp_printf(&mp_plat_print, "USART6"); + } + #endif + + self->handle.Instance = USARTx; + self->handle.Init.BaudRate = 115200; + self->handle.Init.WordLength = UART_WORDLENGTH_8B; + self->handle.Init.StopBits = UART_STOPBITS_1; + self->handle.Init.Parity = UART_PARITY_NONE; + self->handle.Init.Mode = UART_MODE_TX_RX; + self->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + self->handle.Init.OverSampling = UART_OVERSAMPLING_16; + if (HAL_UART_Init(&self->handle) != HAL_OK) { - mp_raise_NotImplementedError(translate("UART explode")); + mp_raise_ValueError(translate("UART Init Error")); } + claim_pin(tx); + claim_pin(rx); } bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { @@ -74,11 +197,23 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { // Read characters. size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { + if (HAL_UART_Receive(&self->handle, data, (uint16_t)len, 500) == HAL_OK) { + return len; + } else { + mp_raise_ValueError(translate("UART read error")); + } return 0; } // Write characters. size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { + //const char aTxBuffer[] = "This is the internal message"; + + if (HAL_UART_Transmit(&self->handle, (uint8_t *)data, len, 500) == HAL_OK) { + return len; + } else { + mp_raise_ValueError(translate("UART write error")); + } return 0; } diff --git a/ports/stm32f4/common-hal/busio/UART.h b/ports/stm32f4/common-hal/busio/UART.h index 8a4b554c4..fd1fd113a 100644 --- a/ports/stm32f4/common-hal/busio/UART.h +++ b/ports/stm32f4/common-hal/busio/UART.h @@ -28,11 +28,13 @@ #define MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_UART_H #include "common-hal/microcontroller/Pin.h" +#include "stm32f4/periph.h" #include "py/obj.h" typedef struct { mp_obj_base_t base; + UART_HandleTypeDef handle; const mcu_uart_tx_obj_t *tx; const mcu_uart_rx_obj_t *rx; uint8_t character_bits; @@ -43,4 +45,6 @@ typedef struct { uint8_t* buffer; } busio_uart_obj_t; +void uart_reset(void); + #endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_UART_H diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h index 673772026..5ab7f025e 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h @@ -43,7 +43,7 @@ extern const mcu_spi_nss_obj_t mcu_spi_nss_list[6]; //UART extern USART_TypeDef * mcu_uart_banks[6]; -bool mcu_uart_has_usart[6] +bool mcu_uart_has_usart[6]; extern const mcu_uart_tx_obj_t mcu_uart_tx_list[12]; extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; diff --git a/ports/stm32f4/supervisor/port.c b/ports/stm32f4/supervisor/port.c index df7a6ca42..7d50c94c3 100644 --- a/ports/stm32f4/supervisor/port.c +++ b/ports/stm32f4/supervisor/port.c @@ -33,6 +33,7 @@ #include "common-hal/microcontroller/Pin.h" #include "common-hal/busio/I2C.h" #include "common-hal/busio/SPI.h" +#include "common-hal/busio/UART.h" #include "stm32f4/clocks.h" #include "stm32f4/gpio.h" @@ -57,6 +58,7 @@ void reset_port(void) { reset_all_pins(); i2c_reset(); spi_reset(); + uart_reset(); } void reset_to_bootloader(void) { -- cgit v1.2.3 From cc3a17845c0dfad0d37f79e3c0791e72365d18d3 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 7 Oct 2019 14:22:12 -0400 Subject: Fix USB issues, frequency macro, F412 tests --- ports/stm32f4/Makefile | 2 +- ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk | 1 + ports/stm32f4/boards/stm32f412zg_discovery/pins.c | 4 ++-- ports/stm32f4/common-hal/busio/UART.c | 7 ++++++- ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c | 11 ++++++++++- ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h | 8 ++++++++ 6 files changed, 28 insertions(+), 5 deletions(-) diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index 50d0e980f..b1adce342 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -120,7 +120,7 @@ LIBS += -lm endif # TinyUSB defines -CFLAGS += -DHSE_VALUE=8000000 -DCFG_TUSB_MCU=OPT_MCU_STM32F4 -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD_CDC_TX_BUFSIZE=1024 -DCFG_TUD_MSC_BUFSIZE=4096 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128 +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_STM32F4 -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD_CDC_TX_BUFSIZE=1024 -DCFG_TUD_MSC_BUFSIZE=4096 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128 ###################################### diff --git a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk index 509a24410..d642f243e 100644 --- a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk @@ -2,6 +2,7 @@ USB_VID = 0x239A USB_PID = 0x8056 USB_PRODUCT = "STM32F412ZG Discovery Board - CPy" USB_MANUFACTURER = "STMicroelectronics" +USB_DEVICES = "CDC,MSC,HID" INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE diff --git a/ports/stm32f4/boards/stm32f412zg_discovery/pins.c b/ports/stm32f4/boards/stm32f412zg_discovery/pins.c index a0b477a47..461dee799 100644 --- a/ports/stm32f4/boards/stm32f412zg_discovery/pins.c +++ b/ports/stm32f4/boards/stm32f412zg_discovery/pins.c @@ -74,8 +74,8 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PG12) }, { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PF04) }, { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PG13) }, - { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PG14) }, - { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PG09) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PG14) }, //USART6 TX + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PG09) }, //USART6 RX { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA01) }, { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PC01) }, { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PC03) }, diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index aef2f6263..5ef2e9807 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -173,7 +173,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, #endif self->handle.Instance = USARTx; - self->handle.Init.BaudRate = 115200; + self->handle.Init.BaudRate = 9600; self->handle.Init.WordLength = UART_WORDLENGTH_8B; self->handle.Init.StopBits = UART_STOPBITS_1; self->handle.Init.Parity = UART_PARITY_NONE; @@ -183,6 +183,11 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if (HAL_UART_Init(&self->handle) != HAL_OK) { mp_raise_ValueError(translate("UART Init Error")); + + } else { + mp_printf(&mp_plat_print, "Init Success, "); + const char msg[] = "Program has started"; + if(HAL_UART_Transmit(&self->handle, (uint8_t *)msg, sizeof(msg)/sizeof(*msg), 5000) == HAL_OK) mp_printf(&mp_plat_print, "Write Success"); } claim_pin(tx); claim_pin(rx); diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c index ea94719ec..3936c0dc0 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c @@ -120,4 +120,13 @@ const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { SPI(5, 6, &pin_PE11) }; -//UART, Etc +USART_TypeDef * mcu_uart_banks[6] = {USART1, USART2, USART3, NULL, NULL, USART6}; +bool mcu_uart_has_usart[6] = {true, true, true, false, false, true}; + +const mcu_uart_tx_obj_t mcu_uart_tx_list[1] = { + UART(6, 8, &pin_PG14), +}; + +const mcu_uart_rx_obj_t mcu_uart_rx_list[1] = { + UART(6, 8, &pin_PG09), +}; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h index d12bbba93..afe7ac0db 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h @@ -42,4 +42,12 @@ extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14]; extern const mcu_spi_miso_obj_t mcu_spi_miso_list[12]; extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; +//UART +extern USART_TypeDef * mcu_uart_banks[6]; +bool mcu_uart_has_usart[6]; + +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[1]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[1]; + + #endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H \ No newline at end of file -- cgit v1.2.3 From f58d54cd22eefb7269082cf8e592671741368038 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Tue, 8 Oct 2019 16:03:51 -0400 Subject: Preliminary read system, not buffered --- ports/stm32f4/common-hal/busio/UART.c | 42 +++++++++++++++++++---------------- 1 file changed, 23 insertions(+), 19 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 5ef2e9807..780451782 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -119,7 +119,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_PULLUP; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = self->tx->altfn_index; + GPIO_InitStruct.Alternate = self->tx->altfn_index; HAL_GPIO_Init(pin_port(tx->port), &GPIO_InitStruct); GPIO_InitStruct.Pin = pin_mask(rx->number); @@ -133,42 +133,36 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if(USARTx==USART1) { reserved_uart[0] = true; __HAL_RCC_USART1_CLK_ENABLE(); - mp_printf(&mp_plat_print, "USART1"); } #endif #ifdef UART2 if(USARTx==USART2) { reserved_uart[1] = true; __HAL_RCC_USART2_CLK_ENABLE(); - mp_printf(&mp_plat_print, "USART2"); } #endif #ifdef USART3 if(USARTx==USART3) { reserved_uart[2] = true; __HAL_RCC_USART3_CLK_ENABLE(); - mp_printf(&mp_plat_print, "USART3"); } #endif #ifdef UART4 if(USARTx==UART4) { reserved_uart[3] = true; __HAL_RCC_UART4_CLK_ENABLE(); - mp_printf(&mp_plat_print, "USART4"); } #endif #ifdef UART5 if(USARTx==UART5) { reserved_uart[4] = true; __HAL_RCC_UART5_CLK_ENABLE(); - mp_printf(&mp_plat_print, "USART5"); } #endif #ifdef USART6 if(USARTx==USART6) { reserved_uart[5] = true; __HAL_RCC_USART6_CLK_ENABLE(); - mp_printf(&mp_plat_print, "USART6"); } #endif @@ -184,36 +178,46 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, { mp_raise_ValueError(translate("UART Init Error")); - } else { - mp_printf(&mp_plat_print, "Init Success, "); - const char msg[] = "Program has started"; - if(HAL_UART_Transmit(&self->handle, (uint8_t *)msg, sizeof(msg)/sizeof(*msg), 5000) == HAL_OK) mp_printf(&mp_plat_print, "Write Success"); } + claim_pin(tx); claim_pin(rx); } bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { - return 0; + return self->tx->pin == mp_const_none; } void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { + reset_pin_number(self->tx->pin->port,self->tx->pin->number); + reset_pin_number(self->rx->pin->port,self->rx->pin->number); + self->tx = mp_const_none; + self->rx = mp_const_none; } // Read characters. size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { - if (HAL_UART_Receive(&self->handle, data, (uint16_t)len, 500) == HAL_OK) { - return len; - } else { - mp_raise_ValueError(translate("UART read error")); + uint pos = 0; + HAL_StatusTypeDef result = HAL_OK; + uint8_t cha[1]; + if (__HAL_UART_GET_FLAG(&self->handle, UART_FLAG_RXNE)) { + while(poshandle, cha, 1, 500); + data[pos] = cha[0]; + pos++; + } } - return 0; + + if (pos == 0) { + *errcode = EAGAIN; + return MP_STREAM_ERROR; + } + + return pos; } // Write characters. size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { - //const char aTxBuffer[] = "This is the internal message"; - if (HAL_UART_Transmit(&self->handle, (uint8_t *)data, len, 500) == HAL_OK) { return len; } else { -- cgit v1.2.3 From 1140ff5cd5d997f1faeb61826b34971828a83426 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Fri, 11 Oct 2019 15:47:55 -0400 Subject: WIP --- ports/stm32f4/common-hal/busio/UART.c | 285 ++++++++++++++++++++++++++-------- ports/stm32f4/common-hal/busio/UART.h | 13 +- 2 files changed, 231 insertions(+), 67 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 780451782..2883974eb 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -35,15 +35,15 @@ #include "py/stream.h" #include "supervisor/shared/translate.h" -#include "common-hal/microcontroller/Pin.h" -#include "stm32f4xx_hal.h" - #include "tick.h" +#include "stm32f4xx_hal.h" + STATIC bool reserved_uart[10]; +//TODO: remove this horrible hack +STATIC busio_uart_obj_t * context_pointers[10]; //numbered by uart module void uart_reset(void) { - //ugh. reduce this #ifdef USART1 reserved_uart[0] = false; __HAL_RCC_USART1_CLK_DISABLE(); @@ -68,6 +68,7 @@ void uart_reset(void) { reserved_uart[5] = false; __HAL_RCC_USART6_CLK_DISABLE(); #endif + //TODO: this technically needs to go to 10 to support F413. Any way to condense? } void common_hal_busio_uart_construct(busio_uart_obj_t *self, @@ -80,54 +81,127 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, uint8_t tx_len = sizeof(mcu_uart_tx_list)/sizeof(*mcu_uart_tx_list); uint8_t rx_len = sizeof(mcu_uart_rx_list)/sizeof(*mcu_uart_rx_list); - bool uart_taken = false; - //tx - for(uint i=0; itx = &mcu_uart_tx_list[i]; + self->rx = &mcu_uart_rx_list[j]; + break; } - //store pins if not - self->tx = &mcu_uart_tx_list[i]; - self->rx = &mcu_uart_rx_list[j]; - break; } } } - } - - //handle typedef selection, errors - if(self->tx!=NULL && self->rx!=NULL) { - USARTx = mcu_uart_banks[self->tx->uart_index-1]; - } else { - if (uart_taken) { - mp_raise_ValueError(translate("Hardware busy, try alternative pins")); + //handle typedef selection, errors + if(self->tx!=NULL && self->rx!=NULL) { + USARTx = mcu_uart_banks[self->tx->uart_index-1]; + mp_printf(&mp_plat_print, "UART:%d \n", self->tx->uart_index); + //TODO: remove this horrible hack + context_pointers[self->tx->uart_index-1] = self; + } else { + if (uart_taken) { + mp_raise_ValueError(translate("Hardware busy, try alternative pins")); + } else { + mp_raise_ValueError(translate("Invalid UART pin selection")); + } + } + } else if (tx==mp_const_none) { + //run only rx + for(uint i=0; irx = &mcu_uart_rx_list[i]; + break; + } + } + //handle typedef selection, errors + if(self->rx!=NULL) { + USARTx = mcu_uart_banks[self->rx->uart_index-1]; + //TODO: remove this horrible hack + context_pointers[self->rx->uart_index-1] = self; + } else { + if (uart_taken) { + mp_raise_ValueError(translate("Hardware busy, try alternative pins")); + } else { + mp_raise_ValueError(translate("Invalid UART pin selection")); + } + } + } else if (rx==mp_const_none) { + //run only tx + for(uint i=0; itx = &mcu_uart_tx_list[i]; + break; + } + } + //handle typedef selection, errors + if(self->tx!=NULL) { + USARTx = mcu_uart_banks[self->tx->uart_index-1]; + //TODO: remove this horrible hack + context_pointers[self->tx->uart_index-1] = self; } else { - mp_raise_ValueError(translate("Invalid UART pin selection")); + if (uart_taken) { + mp_raise_ValueError(translate("Hardware busy, try alternative pins")); + } else { + mp_raise_ValueError(translate("Invalid UART pin selection")); + } } + } else { + //both pins cannot be empty + mp_raise_ValueError(translate("You must supply at least one UART pin")); + } + + //Other errors + if ( receiver_buffer_size == 0 ) { + mp_raise_ValueError(translate("Invalid buffer size")); + } + if ( bits != 8 && bits != 9 ) { + mp_raise_ValueError(translate("Invalid word/bit length")); } + //GPIO Init GPIO_InitTypeDef GPIO_InitStruct = {0}; - GPIO_InitStruct.Pin = pin_mask(tx->number); - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = self->tx->altfn_index; - HAL_GPIO_Init(pin_port(tx->port), &GPIO_InitStruct); - - GPIO_InitStruct.Pin = pin_mask(rx->number); - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = self->rx->altfn_index; - HAL_GPIO_Init(pin_port(rx->port), &GPIO_InitStruct); + if (self->tx!=NULL) { + GPIO_InitStruct.Pin = pin_mask(tx->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->tx->altfn_index; + HAL_GPIO_Init(pin_port(tx->port), &GPIO_InitStruct); + } + if (self->rx!=NULL) { + GPIO_InitStruct.Pin = pin_mask(rx->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->rx->altfn_index; + HAL_GPIO_Init(pin_port(rx->port), &GPIO_InitStruct); + } #ifdef USART1 if(USARTx==USART1) { @@ -166,12 +240,21 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, } #endif + HAL_NVIC_SetPriority(USART2_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(USART2_IRQn); + + //TODO: this technically needs to go to 10 to support F413. Condense? + self->handle.Instance = USARTx; - self->handle.Init.BaudRate = 9600; - self->handle.Init.WordLength = UART_WORDLENGTH_8B; - self->handle.Init.StopBits = UART_STOPBITS_1; - self->handle.Init.Parity = UART_PARITY_NONE; - self->handle.Init.Mode = UART_MODE_TX_RX; + self->handle.Init.BaudRate = baudrate; + self->handle.Init.WordLength = (bits == 9) ? UART_WORDLENGTH_9B : UART_WORDLENGTH_8B; + self->handle.Init.StopBits = (stop>1) ? UART_STOPBITS_2 : UART_STOPBITS_1; + self->handle.Init.Parity = (parity==PARITY_ODD) ? UART_PARITY_ODD : + (parity==PARITY_EVEN) ? UART_PARITY_EVEN : + UART_PARITY_NONE; + self->handle.Init.Mode = (self->tx != NULL && self->rx != NULL) ? UART_MODE_TX_RX : + (self->tx != NULL) ? UART_MODE_TX : + UART_MODE_RX; self->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE; self->handle.Init.OverSampling = UART_OVERSAMPLING_16; if (HAL_UART_Init(&self->handle) != HAL_OK) @@ -180,8 +263,24 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, } - claim_pin(tx); - claim_pin(rx); + // Init buffer for rx and claim pins + if (self->rx != NULL) { + ringbuf_alloc(&self->rbuf, receiver_buffer_size, true); + if (!self->rbuf.buf) { + mp_raise_ValueError(translate("UART Buffer allocation error")); + } + claim_pin(rx); + } + if (self->tx != NULL) { + claim_pin(tx); + } + + self->baudrate = baudrate; + self->timeout_ms = timeout * 1000; + + if (HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1) != HAL_OK) { + mp_raise_ValueError(translate("HAL recieve IT start error")); + } } bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { @@ -197,23 +296,43 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { // Read characters. size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { - uint pos = 0; - HAL_StatusTypeDef result = HAL_OK; - uint8_t cha[1]; - if (__HAL_UART_GET_FLAG(&self->handle, UART_FLAG_RXNE)) { - while(poshandle, cha, 1, 500); - data[pos] = cha[0]; - pos++; + // if ( nrf_uarte_rx_pin_get(self->uarte->p_reg) == NRF_UARTE_PSEL_DISCONNECTED ) { + // mp_raise_ValueError(translate("No RX pin")); + // } + + size_t rx_bytes = 0; + uint64_t start_ticks = ticks_ms; + + // Wait for all bytes received or timeout, same as nrf + while ( (ringbuf_count(&self->rbuf) < len) && (ticks_ms - start_ticks < self->timeout_ms) ) { + RUN_BACKGROUND_TASKS; + // Allow user to break out of a timeout with a KeyboardInterrupt. + if ( mp_hal_is_interrupted() ) { + return 0; } } - if (pos == 0) { + // Halt reception + HAL_UART_AbortReceive_IT(&self->handle); + + // copy received data + rx_bytes = ringbuf_count(&self->rbuf); + rx_bytes = MIN(rx_bytes, len); + for ( uint16_t i = 0; i < rx_bytes; i++ ) { + data[i] = ringbuf_get(&self->rbuf); + } + + if (HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1) != HAL_OK) { + mp_raise_ValueError(translate("HAL recieve IT start error")); + } + + mp_printf(&mp_plat_print, "bytes:%d, char:%c", rx_bytes, self->rx_char); + + if (rx_bytes == 0) { *errcode = EAGAIN; return MP_STREAM_ERROR; } - - return pos; + return rx_bytes; } // Write characters. @@ -226,20 +345,60 @@ size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, return 0; } +void HAL_UART_TxCpltCallback(UART_HandleTypeDef *handle) +{ + //not used at the moment. +} + +void HAL_UART_RxCpltCallback(UART_HandleTypeDef *handle) +{ + //TODO: I feel bad just writing this + for(int i=0; i<7; i++) { + if(handle == &context_pointers[i]->handle) { + mp_raise_msg_varg(&mp_type_RuntimeError, translate("error = 0x%d ,%c"), i, &context_pointers[i]->rx_char); + ringbuf_put_n(&context_pointers[i]->rbuf, &context_pointers[i]->rx_char, 1); + HAL_UART_Receive_IT(handle, &context_pointers[i]->rx_char, 1); + return; + } + } +} + +void HAL_UART_ErrorCallback(UART_HandleTypeDef *UartHandle) +{ + mp_raise_RuntimeError(translate("UART Callback Error")); +} + uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { - return 0; + return self->baudrate; } void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) { + //Don't reset if it's the same value + if (baudrate == self->baudrate) return; + + //Otherwise de-init and set new rate + if(HAL_UART_DeInit(&self->handle) != HAL_OK) { + mp_raise_ValueError(translate("UART De-init error")); + } + self->handle.Init.BaudRate = baudrate; + if(HAL_UART_Init(&self->handle) != HAL_OK) { + mp_raise_ValueError(translate("UART Re-init error")); + } + + self->baudrate = baudrate; } uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { - return 0; + return ringbuf_count(&self->rbuf); } void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { + // Halt reception + HAL_UART_AbortReceive_IT(&self->handle); + ringbuf_clear(&self->rbuf); + HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); } bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { - return 0; + return true; } diff --git a/ports/stm32f4/common-hal/busio/UART.h b/ports/stm32f4/common-hal/busio/UART.h index fd1fd113a..5d88ddd93 100644 --- a/ports/stm32f4/common-hal/busio/UART.h +++ b/ports/stm32f4/common-hal/busio/UART.h @@ -29,22 +29,27 @@ #include "common-hal/microcontroller/Pin.h" #include "stm32f4/periph.h" +#include "stm32f4xx_hal.h" #include "py/obj.h" +#include "py/ringbuf.h" typedef struct { mp_obj_base_t base; UART_HandleTypeDef handle; const mcu_uart_tx_obj_t *tx; const mcu_uart_rx_obj_t *rx; - uint8_t character_bits; - bool rx_error; + + ringbuf_t rbuf; + uint8_t rx_char; + uint32_t baudrate; uint32_t timeout_ms; - uint32_t buffer_length; - uint8_t* buffer; + //bool tx_complete; } busio_uart_obj_t; void uart_reset(void); +void USART2_IRQHandler(void); + #endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_UART_H -- cgit v1.2.3 From 14eefaafeeebbb2193da13c105bf30a826ee39cd Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 16 Oct 2019 11:33:55 -0400 Subject: Hack in interrupt support --- ports/stm32f4/common-hal/busio/UART.c | 74 ++++++++++++++++++++++++++--------- ports/stm32f4/common-hal/busio/UART.h | 4 +- ports/stm32f4/mpconfigport.h | 2 + 3 files changed, 61 insertions(+), 19 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 2883974eb..7eb1a4b1a 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -40,8 +40,6 @@ STATIC bool reserved_uart[10]; -//TODO: remove this horrible hack -STATIC busio_uart_obj_t * context_pointers[10]; //numbered by uart module void uart_reset(void) { #ifdef USART1 @@ -110,8 +108,8 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if(self->tx!=NULL && self->rx!=NULL) { USARTx = mcu_uart_banks[self->tx->uart_index-1]; mp_printf(&mp_plat_print, "UART:%d \n", self->tx->uart_index); - //TODO: remove this horrible hack - context_pointers[self->tx->uart_index-1] = self; + //assign a root pointer pointer for IRQ + MP_STATE_PORT(cpy_uart_obj_all)[self->tx->uart_index-1] = self; } else { if (uart_taken) { mp_raise_ValueError(translate("Hardware busy, try alternative pins")); @@ -136,8 +134,8 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, //handle typedef selection, errors if(self->rx!=NULL) { USARTx = mcu_uart_banks[self->rx->uart_index-1]; - //TODO: remove this horrible hack - context_pointers[self->rx->uart_index-1] = self; + //assign a root pointer pointer for IRQ + MP_STATE_PORT(cpy_uart_obj_all)[self->rx->uart_index-1] = self; } else { if (uart_taken) { mp_raise_ValueError(translate("Hardware busy, try alternative pins")); @@ -162,8 +160,8 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, //handle typedef selection, errors if(self->tx!=NULL) { USARTx = mcu_uart_banks[self->tx->uart_index-1]; - //TODO: remove this horrible hack - context_pointers[self->tx->uart_index-1] = self; + //assign a root pointer pointer for IRQ + MP_STATE_PORT(cpy_uart_obj_all)[self->tx->uart_index-1] = self; } else { if (uart_taken) { mp_raise_ValueError(translate("Hardware busy, try alternative pins")); @@ -207,24 +205,32 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if(USARTx==USART1) { reserved_uart[0] = true; __HAL_RCC_USART1_CLK_ENABLE(); + HAL_NVIC_SetPriority(USART1_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(USART1_IRQn); } #endif #ifdef UART2 if(USARTx==USART2) { reserved_uart[1] = true; __HAL_RCC_USART2_CLK_ENABLE(); + HAL_NVIC_SetPriority(USART2_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(USART2_IRQn); } #endif #ifdef USART3 if(USARTx==USART3) { reserved_uart[2] = true; __HAL_RCC_USART3_CLK_ENABLE(); + HAL_NVIC_SetPriority(USART3_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(USART3_IRQn); } #endif #ifdef UART4 if(USARTx==UART4) { reserved_uart[3] = true; __HAL_RCC_UART4_CLK_ENABLE(); + HAL_NVIC_SetPriority(UART4_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(UART4_IRQn); } #endif #ifdef UART5 @@ -240,9 +246,6 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, } #endif - HAL_NVIC_SetPriority(USART2_IRQn, 0, 1); - HAL_NVIC_EnableIRQ(USART2_IRQn); - //TODO: this technically needs to go to 10 to support F413. Condense? self->handle.Instance = USARTx; @@ -281,6 +284,8 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if (HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1) != HAL_OK) { mp_raise_ValueError(translate("HAL recieve IT start error")); } + + //__HAL_UART_ENABLE_IT(&self->uart, UART_IT_RXNE); } bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { @@ -325,8 +330,6 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t if (HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1) != HAL_OK) { mp_raise_ValueError(translate("HAL recieve IT start error")); } - - mp_printf(&mp_plat_print, "bytes:%d, char:%c", rx_bytes, self->rx_char); if (rx_bytes == 0) { *errcode = EAGAIN; @@ -352,12 +355,12 @@ void HAL_UART_TxCpltCallback(UART_HandleTypeDef *handle) void HAL_UART_RxCpltCallback(UART_HandleTypeDef *handle) { - //TODO: I feel bad just writing this for(int i=0; i<7; i++) { - if(handle == &context_pointers[i]->handle) { - mp_raise_msg_varg(&mp_type_RuntimeError, translate("error = 0x%d ,%c"), i, &context_pointers[i]->rx_char); - ringbuf_put_n(&context_pointers[i]->rbuf, &context_pointers[i]->rx_char, 1); - HAL_UART_Receive_IT(handle, &context_pointers[i]->rx_char, 1); + //get context pointer and cast it as struct pointer + busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[i]; + if(handle == &context->handle) { + ringbuf_put_n(&context->rbuf, &context->rx_char, 1); + HAL_UART_Receive_IT(handle, &context->rx_char, 1); return; } } @@ -402,3 +405,38 @@ void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { return true; } + +static void call_hal_irq(int uart_num) { + //Create casted context pointer + busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[uart_num-1]; + if(context != NULL) { + HAL_UART_IRQHandler(&context->handle); + } else { + mp_raise_ValueError(translate("UART IRQ bad handle supplied")); + } +} + +// UART/USART IRQ handlers +void USART1_IRQHandler(void) { + call_hal_irq(1); +} + +void USART2_IRQHandler(void) { + call_hal_irq(2); +} + +void USART3_IRQHandler(void) { + call_hal_irq(3); +} + +void UART4_IRQHandler(void) { + call_hal_irq(4); +} + +void UART5_IRQHandler(void) { + call_hal_irq(5); +} + +void USART6_IRQHandler(void) { + call_hal_irq(6); +} diff --git a/ports/stm32f4/common-hal/busio/UART.h b/ports/stm32f4/common-hal/busio/UART.h index 5d88ddd93..ee45d9b74 100644 --- a/ports/stm32f4/common-hal/busio/UART.h +++ b/ports/stm32f4/common-hal/busio/UART.h @@ -50,6 +50,8 @@ typedef struct { void uart_reset(void); +void USART1_IRQHandler(void); void USART2_IRQHandler(void); - +void USART3_IRQHandler(void); +void UART_IRQHandler(void); #endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_UART_H diff --git a/ports/stm32f4/mpconfigport.h b/ports/stm32f4/mpconfigport.h index 543a55942..080916be1 100644 --- a/ports/stm32f4/mpconfigport.h +++ b/ports/stm32f4/mpconfigport.h @@ -40,6 +40,8 @@ #include "py/circuitpy_mpconfig.h" #define MICROPY_PORT_ROOT_POINTERS \ + /* pointers to all 10 UART objects (if they have been created) */ \ + void *cpy_uart_obj_all[9]; \ CIRCUITPY_COMMON_ROOT_POINTERS #endif // __INCLUDED_MPCONFIGPORT_H -- cgit v1.2.3 From b4a6246e30200b78b2eb14ceda15d042205ea274 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 16 Oct 2019 12:32:34 -0400 Subject: Cleanup --- ports/stm32f4/common-hal/busio/UART.c | 28 +++++++++++++++++----------- ports/stm32f4/common-hal/busio/UART.h | 1 - 2 files changed, 17 insertions(+), 12 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 7eb1a4b1a..826804ef6 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -45,26 +45,32 @@ void uart_reset(void) { #ifdef USART1 reserved_uart[0] = false; __HAL_RCC_USART1_CLK_DISABLE(); + HAL_NVIC_DisableIRQ(USART1_IRQn); #endif #ifdef USART2 reserved_uart[1] = false; __HAL_RCC_USART2_CLK_DISABLE(); + HAL_NVIC_DisableIRQ(USART2_IRQn); #endif #ifdef USART3 reserved_uart[2] = false; __HAL_RCC_USART3_CLK_DISABLE(); + HAL_NVIC_DisableIRQ(USART3_IRQn); #endif #ifdef UART4 reserved_uart[3] = false; __HAL_RCC_UART4_CLK_DISABLE(); + HAL_NVIC_DisableIRQ(UART4_IRQn); #endif #ifdef UART5 reserved_uart[4] = false; __HAL_RCC_UART5_CLK_DISABLE(); + HAL_NVIC_DisableIRQ(UART5_IRQn); #endif #ifdef USART6 reserved_uart[5] = false; __HAL_RCC_USART6_CLK_DISABLE(); + HAL_NVIC_DisableIRQ(USART6_IRQn); #endif //TODO: this technically needs to go to 10 to support F413. Any way to condense? } @@ -237,15 +243,18 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if(USARTx==UART5) { reserved_uart[4] = true; __HAL_RCC_UART5_CLK_ENABLE(); + HAL_NVIC_SetPriority(UART5_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(UART5_IRQn); } #endif #ifdef USART6 if(USARTx==USART6) { reserved_uart[5] = true; __HAL_RCC_USART6_CLK_ENABLE(); + HAL_NVIC_SetPriority(USART6_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(USART6_IRQn); } #endif - //TODO: this technically needs to go to 10 to support F413. Condense? self->handle.Instance = USARTx; @@ -284,8 +293,6 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if (HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1) != HAL_OK) { mp_raise_ValueError(translate("HAL recieve IT start error")); } - - //__HAL_UART_ENABLE_IT(&self->uart, UART_IT_RXNE); } bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { @@ -301,9 +308,9 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { // Read characters. size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { - // if ( nrf_uarte_rx_pin_get(self->uarte->p_reg) == NRF_UARTE_PSEL_DISCONNECTED ) { - // mp_raise_ValueError(translate("No RX pin")); - // } + if (self->rx == NULL) { + mp_raise_ValueError(translate("No RX pin")); + } size_t rx_bytes = 0; uint64_t start_ticks = ticks_ms; @@ -340,6 +347,10 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t // Write characters. size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { + if (self->tx == NULL) { + mp_raise_ValueError(translate("No TX pin")); + } + if (HAL_UART_Transmit(&self->handle, (uint8_t *)data, len, 500) == HAL_OK) { return len; } else { @@ -348,11 +359,6 @@ size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, return 0; } -void HAL_UART_TxCpltCallback(UART_HandleTypeDef *handle) -{ - //not used at the moment. -} - void HAL_UART_RxCpltCallback(UART_HandleTypeDef *handle) { for(int i=0; i<7; i++) { diff --git a/ports/stm32f4/common-hal/busio/UART.h b/ports/stm32f4/common-hal/busio/UART.h index ee45d9b74..3c746f64e 100644 --- a/ports/stm32f4/common-hal/busio/UART.h +++ b/ports/stm32f4/common-hal/busio/UART.h @@ -45,7 +45,6 @@ typedef struct { uint32_t baudrate; uint32_t timeout_ms; - //bool tx_complete; } busio_uart_obj_t; void uart_reset(void); -- cgit v1.2.3 From 323fe418f734c235d32cc64f7b16fbb9e7c44d46 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 16 Oct 2019 13:14:57 -0400 Subject: Add support for other F4 MCUs --- .../peripherals/stm32f4/stm32f411xe/periph.c | 23 ++++++++++++++++++++ .../peripherals/stm32f4/stm32f411xe/periph.h | 7 ++++++ .../peripherals/stm32f4/stm32f412zx/periph.c | 25 ++++++++++++++++++++-- .../peripherals/stm32f4/stm32f412zx/periph.h | 4 ++-- 4 files changed, 55 insertions(+), 4 deletions(-) diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c index f0966f785..6c70a5611 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c @@ -120,3 +120,26 @@ const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { }; //UART, Etc + +USART_TypeDef * mcu_uart_banks[6] = {USART1, USART2, NULL, NULL, NULL, USART6}; +bool mcu_uart_has_usart[6] = {true, true, false, false, false, true}; + +const mcu_uart_tx_obj_t mcu_uart_tx_list[7] = { + UART(2, 7, &pin_PA02), + UART(1, 7, &pin_PA09), + UART(1, 7, &pin_PA15), + UART(6, 8, &pin_PA11), + UART(1, 7, &pin_PB06), + UART(6, 8, &pin_PC06), + UART(2, 7, &pin_PD05), +}; + +const mcu_uart_rx_obj_t mcu_uart_rx_list[7] = { + UART(2, 7, &pin_PA03), + UART(1, 7, &pin_PA10), + UART(6, 8, &pin_PA12), + UART(1, 7, &pin_PB03), + UART(1, 7, &pin_PB07), + UART(6, 8, &pin_PC07), + UART(2, 7, &pin_PD06), +}; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h index 08efa14ca..1d835bb3c 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h @@ -41,4 +41,11 @@ extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14]; extern const mcu_spi_miso_obj_t mcu_spi_miso_list[12]; extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; +//UART +extern USART_TypeDef * mcu_uart_banks[6]; +bool mcu_uart_has_usart[6]; + +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[7]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[7]; + #endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H \ No newline at end of file diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c index 3936c0dc0..3d2454024 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c @@ -123,10 +123,31 @@ const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { USART_TypeDef * mcu_uart_banks[6] = {USART1, USART2, USART3, NULL, NULL, USART6}; bool mcu_uart_has_usart[6] = {true, true, true, false, false, true}; -const mcu_uart_tx_obj_t mcu_uart_tx_list[1] = { +const mcu_uart_tx_obj_t mcu_uart_tx_list[11] = { + UART(2, 7, &pin_PA02), + UART(1, 7, &pin_PA09), + UART(1, 7, &pin_PA15), + UART(6, 8, &pin_PA11), + UART(1, 7, &pin_PB06), + UART(3, 7, &pin_PB10), + UART(6, 8, &pin_PC06), + UART(3, 7, &pin_PC10), + UART(2, 7, &pin_PD05), + UART(3, 7, &pin_PD08), UART(6, 8, &pin_PG14), }; -const mcu_uart_rx_obj_t mcu_uart_rx_list[1] = { +const mcu_uart_rx_obj_t mcu_uart_rx_list[12] = { + UART(2, 7, &pin_PA03), + UART(1, 7, &pin_PA10), + UART(6, 8, &pin_PA12), + UART(1, 7, &pin_PB03), + UART(1, 7, &pin_PB07), + UART(3, 7, &pin_PB11), + UART(3, 7, &pin_PC05), + UART(6, 8, &pin_PC07), + UART(3, 7, &pin_PC11), + UART(2, 7, &pin_PD06), + UART(3, 7, &pin_PD09), UART(6, 8, &pin_PG09), }; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h index afe7ac0db..72adaafd1 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h @@ -46,8 +46,8 @@ extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; extern USART_TypeDef * mcu_uart_banks[6]; bool mcu_uart_has_usart[6]; -extern const mcu_uart_tx_obj_t mcu_uart_tx_list[1]; -extern const mcu_uart_rx_obj_t mcu_uart_rx_list[1]; +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[11]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; #endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H \ No newline at end of file -- cgit v1.2.3 From 14c64159c8bd9b36f2054cff3f74f710ac679bd8 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 16 Oct 2019 13:50:54 -0400 Subject: Implement requested changes, refactors --- ports/stm32f4/common-hal/busio/UART.c | 168 ++++++++++----------- ports/stm32f4/mpconfigport.h | 3 +- ports/stm32f4/peripherals/stm32f4/periph.h | 2 + .../peripherals/stm32f4/stm32f405xx/periph.c | 4 +- .../peripherals/stm32f4/stm32f405xx/periph.h | 4 +- .../peripherals/stm32f4/stm32f411xe/periph.c | 4 +- .../peripherals/stm32f4/stm32f411xe/periph.h | 4 +- .../peripherals/stm32f4/stm32f412zx/periph.c | 2 + .../peripherals/stm32f4/stm32f412zx/periph.h | 4 +- 9 files changed, 93 insertions(+), 102 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 826804ef6..1830e925e 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -39,7 +39,7 @@ #include "stm32f4xx_hal.h" -STATIC bool reserved_uart[10]; +STATIC bool reserved_uart[MAX_UART]; void uart_reset(void) { #ifdef USART1 @@ -75,6 +75,73 @@ void uart_reset(void) { //TODO: this technically needs to go to 10 to support F413. Any way to condense? } +STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t *self, bool pin_eval, + int uart_index, bool uart_taken) { + if(pin_eval) { + //assign a root pointer pointer for IRQ + MP_STATE_PORT(cpy_uart_obj_all)[uart_index] = self; + return mcu_uart_banks[uart_index]; + } else { + if (uart_taken) { + mp_raise_ValueError(translate("Hardware busy, try alternative pins")); + } else { + mp_raise_ValueError(translate("Invalid UART pin selection")); + } + } +} + + +STATIC void uart_clk_irq_enable(USART_TypeDef * USARTx) { + #ifdef USART1 + if(USARTx==USART1) { + reserved_uart[0] = true; + __HAL_RCC_USART1_CLK_ENABLE(); + HAL_NVIC_SetPriority(USART1_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(USART1_IRQn); + } + #endif + #ifdef UART2 + if(USARTx==USART2) { + reserved_uart[1] = true; + __HAL_RCC_USART2_CLK_ENABLE(); + HAL_NVIC_SetPriority(USART2_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(USART2_IRQn); + } + #endif + #ifdef USART3 + if(USARTx==USART3) { + reserved_uart[2] = true; + __HAL_RCC_USART3_CLK_ENABLE(); + HAL_NVIC_SetPriority(USART3_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(USART3_IRQn); + } + #endif + #ifdef UART4 + if(USARTx==UART4) { + reserved_uart[3] = true; + __HAL_RCC_UART4_CLK_ENABLE(); + HAL_NVIC_SetPriority(UART4_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(UART4_IRQn); + } + #endif + #ifdef UART5 + if(USARTx==UART5) { + reserved_uart[4] = true; + __HAL_RCC_UART5_CLK_ENABLE(); + HAL_NVIC_SetPriority(UART5_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(UART5_IRQn); + } + #endif + #ifdef USART6 + if(USARTx==USART6) { + reserved_uart[5] = true; + __HAL_RCC_USART6_CLK_ENABLE(); + HAL_NVIC_SetPriority(USART6_IRQn, 0, 1); + HAL_NVIC_EnableIRQ(USART6_IRQn); + } + #endif +} + void common_hal_busio_uart_construct(busio_uart_obj_t *self, const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, @@ -88,7 +155,6 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, bool uart_taken = false; //Can have both pins, or either - //TODO: condense in some elegant clever way that I can't currently think of if ((tx != mp_const_none) && (rx != mp_const_none)) { //normal find loop if both pins exist for(uint i=0; itx!=NULL && self->rx!=NULL) { - USARTx = mcu_uart_banks[self->tx->uart_index-1]; - mp_printf(&mp_plat_print, "UART:%d \n", self->tx->uart_index); - //assign a root pointer pointer for IRQ - MP_STATE_PORT(cpy_uart_obj_all)[self->tx->uart_index-1] = self; - } else { - if (uart_taken) { - mp_raise_ValueError(translate("Hardware busy, try alternative pins")); - } else { - mp_raise_ValueError(translate("Invalid UART pin selection")); - } - } + USARTx = assign_uart_or_throw(self, (self->tx!=NULL && self->rx!=NULL), + self->tx->uart_index-1, uart_taken); } else if (tx==mp_const_none) { - //run only rx + //If there is no tx, run only rx for(uint i=0; irx!=NULL) { - USARTx = mcu_uart_banks[self->rx->uart_index-1]; - //assign a root pointer pointer for IRQ - MP_STATE_PORT(cpy_uart_obj_all)[self->rx->uart_index-1] = self; - } else { - if (uart_taken) { - mp_raise_ValueError(translate("Hardware busy, try alternative pins")); - } else { - mp_raise_ValueError(translate("Invalid UART pin selection")); - } - } + USARTx = assign_uart_or_throw(self, (self->rx!=NULL), + self->rx->uart_index-1, uart_taken); } else if (rx==mp_const_none) { - //run only tx + //If there is no rx, run only tx for(uint i=0; itx!=NULL) { - USARTx = mcu_uart_banks[self->tx->uart_index-1]; - //assign a root pointer pointer for IRQ - MP_STATE_PORT(cpy_uart_obj_all)[self->tx->uart_index-1] = self; - } else { - if (uart_taken) { - mp_raise_ValueError(translate("Hardware busy, try alternative pins")); - } else { - mp_raise_ValueError(translate("Invalid UART pin selection")); - } - } + USARTx = assign_uart_or_throw(self, (self->tx!=NULL), + (self->tx->uart_index-1), uart_taken); } else { //both pins cannot be empty mp_raise_ValueError(translate("You must supply at least one UART pin")); @@ -207,55 +242,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, HAL_GPIO_Init(pin_port(rx->port), &GPIO_InitStruct); } - #ifdef USART1 - if(USARTx==USART1) { - reserved_uart[0] = true; - __HAL_RCC_USART1_CLK_ENABLE(); - HAL_NVIC_SetPriority(USART1_IRQn, 0, 1); - HAL_NVIC_EnableIRQ(USART1_IRQn); - } - #endif - #ifdef UART2 - if(USARTx==USART2) { - reserved_uart[1] = true; - __HAL_RCC_USART2_CLK_ENABLE(); - HAL_NVIC_SetPriority(USART2_IRQn, 0, 1); - HAL_NVIC_EnableIRQ(USART2_IRQn); - } - #endif - #ifdef USART3 - if(USARTx==USART3) { - reserved_uart[2] = true; - __HAL_RCC_USART3_CLK_ENABLE(); - HAL_NVIC_SetPriority(USART3_IRQn, 0, 1); - HAL_NVIC_EnableIRQ(USART3_IRQn); - } - #endif - #ifdef UART4 - if(USARTx==UART4) { - reserved_uart[3] = true; - __HAL_RCC_UART4_CLK_ENABLE(); - HAL_NVIC_SetPriority(UART4_IRQn, 0, 1); - HAL_NVIC_EnableIRQ(UART4_IRQn); - } - #endif - #ifdef UART5 - if(USARTx==UART5) { - reserved_uart[4] = true; - __HAL_RCC_UART5_CLK_ENABLE(); - HAL_NVIC_SetPriority(UART5_IRQn, 0, 1); - HAL_NVIC_EnableIRQ(UART5_IRQn); - } - #endif - #ifdef USART6 - if(USARTx==USART6) { - reserved_uart[5] = true; - __HAL_RCC_USART6_CLK_ENABLE(); - HAL_NVIC_SetPriority(USART6_IRQn, 0, 1); - HAL_NVIC_EnableIRQ(USART6_IRQn); - } - #endif - //TODO: this technically needs to go to 10 to support F413. Condense? + uart_clk_irq_enable(USARTx); self->handle.Instance = USARTx; self->handle.Init.BaudRate = baudrate; @@ -446,3 +433,4 @@ void UART5_IRQHandler(void) { void USART6_IRQHandler(void) { call_hal_irq(6); } + diff --git a/ports/stm32f4/mpconfigport.h b/ports/stm32f4/mpconfigport.h index 080916be1..6d9fe4376 100644 --- a/ports/stm32f4/mpconfigport.h +++ b/ports/stm32f4/mpconfigport.h @@ -40,8 +40,7 @@ #include "py/circuitpy_mpconfig.h" #define MICROPY_PORT_ROOT_POINTERS \ - /* pointers to all 10 UART objects (if they have been created) */ \ - void *cpy_uart_obj_all[9]; \ + void *cpy_uart_obj_all[6]; \ CIRCUITPY_COMMON_ROOT_POINTERS #endif // __INCLUDED_MPCONFIGPORT_H diff --git a/ports/stm32f4/peripherals/stm32f4/periph.h b/ports/stm32f4/peripherals/stm32f4/periph.h index 4e6276cfa..9eda364e9 100644 --- a/ports/stm32f4/peripherals/stm32f4/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/periph.h @@ -33,6 +33,8 @@ #include "stm32f4xx_hal.h" #include "stm32f4/pins.h" +#define MAX_UART 6 //how many UART are implemented + // I2C // TODO: these objects should be condensed into a single 'periph_pin' unless we // find a compelling reason to store more unique data in them. diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c index c1c78b3bf..e43a11d54 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c @@ -86,8 +86,8 @@ const mcu_spi_nss_obj_t mcu_spi_nss_list[6] = { SPI(3, 6, &pin_PA15), }; -USART_TypeDef * mcu_uart_banks[6] = {USART1, USART2, USART3, UART4, UART5, USART6}; -bool mcu_uart_has_usart[6] = {true, true, true, false, false, true}; +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, UART4, UART5, USART6}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true}; const mcu_uart_tx_obj_t mcu_uart_tx_list[12] = { UART(4, 8, &pin_PA00), diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h index 5ab7f025e..4232b1946 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h @@ -42,8 +42,8 @@ extern const mcu_spi_miso_obj_t mcu_spi_miso_list[6]; extern const mcu_spi_nss_obj_t mcu_spi_nss_list[6]; //UART -extern USART_TypeDef * mcu_uart_banks[6]; -bool mcu_uart_has_usart[6]; +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +bool mcu_uart_has_usart[MAX_UART]; extern const mcu_uart_tx_obj_t mcu_uart_tx_list[12]; extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c index 6c70a5611..75ec925d0 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c @@ -121,8 +121,8 @@ const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { //UART, Etc -USART_TypeDef * mcu_uart_banks[6] = {USART1, USART2, NULL, NULL, NULL, USART6}; -bool mcu_uart_has_usart[6] = {true, true, false, false, false, true}; +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, NULL, NULL, NULL, USART6}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, false, false, false, true}; const mcu_uart_tx_obj_t mcu_uart_tx_list[7] = { UART(2, 7, &pin_PA02), diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h index 1d835bb3c..8fe24ab94 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h @@ -42,8 +42,8 @@ extern const mcu_spi_miso_obj_t mcu_spi_miso_list[12]; extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; //UART -extern USART_TypeDef * mcu_uart_banks[6]; -bool mcu_uart_has_usart[6]; +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +bool mcu_uart_has_usart[MAX_UART]; extern const mcu_uart_tx_obj_t mcu_uart_tx_list[7]; extern const mcu_uart_rx_obj_t mcu_uart_rx_list[7]; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c index 3d2454024..adc607f5c 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c @@ -120,6 +120,8 @@ const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { SPI(5, 6, &pin_PE11) }; +//UART + USART_TypeDef * mcu_uart_banks[6] = {USART1, USART2, USART3, NULL, NULL, USART6}; bool mcu_uart_has_usart[6] = {true, true, true, false, false, true}; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h index 72adaafd1..1dac700c1 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h @@ -43,8 +43,8 @@ extern const mcu_spi_miso_obj_t mcu_spi_miso_list[12]; extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; //UART -extern USART_TypeDef * mcu_uart_banks[6]; -bool mcu_uart_has_usart[6]; +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +bool mcu_uart_has_usart[MAX_UART]; extern const mcu_uart_tx_obj_t mcu_uart_tx_list[11]; extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; -- cgit v1.2.3 From af28474b06df405d423bb946e23fee720228ae50 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Fri, 18 Oct 2019 14:10:41 -0400 Subject: IRQ priority and port clearing scratchwork --- ports/stm32f4/common-hal/busio/UART.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 1830e925e..bb6710473 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -44,31 +44,37 @@ STATIC bool reserved_uart[MAX_UART]; void uart_reset(void) { #ifdef USART1 reserved_uart[0] = false; + MP_STATE_PORT(cpy_uart_obj_all)[0] = NULL; __HAL_RCC_USART1_CLK_DISABLE(); HAL_NVIC_DisableIRQ(USART1_IRQn); #endif #ifdef USART2 reserved_uart[1] = false; + MP_STATE_PORT(cpy_uart_obj_all)[1] = NULL; __HAL_RCC_USART2_CLK_DISABLE(); HAL_NVIC_DisableIRQ(USART2_IRQn); #endif #ifdef USART3 reserved_uart[2] = false; + MP_STATE_PORT(cpy_uart_obj_all)[2] = NULL; __HAL_RCC_USART3_CLK_DISABLE(); HAL_NVIC_DisableIRQ(USART3_IRQn); #endif #ifdef UART4 reserved_uart[3] = false; + MP_STATE_PORT(cpy_uart_obj_all)[3] = NULL; __HAL_RCC_UART4_CLK_DISABLE(); HAL_NVIC_DisableIRQ(UART4_IRQn); #endif #ifdef UART5 reserved_uart[4] = false; + MP_STATE_PORT(cpy_uart_obj_all)[4] = NULL; __HAL_RCC_UART5_CLK_DISABLE(); HAL_NVIC_DisableIRQ(UART5_IRQn); #endif #ifdef USART6 reserved_uart[5] = false; + MP_STATE_PORT(cpy_uart_obj_all)[5] = NULL; __HAL_RCC_USART6_CLK_DISABLE(); HAL_NVIC_DisableIRQ(USART6_IRQn); #endif @@ -96,7 +102,7 @@ STATIC void uart_clk_irq_enable(USART_TypeDef * USARTx) { if(USARTx==USART1) { reserved_uart[0] = true; __HAL_RCC_USART1_CLK_ENABLE(); - HAL_NVIC_SetPriority(USART1_IRQn, 0, 1); + //HAL_NVIC_SetPriority(USART1_IRQn, 0, 1); HAL_NVIC_EnableIRQ(USART1_IRQn); } #endif @@ -104,7 +110,7 @@ STATIC void uart_clk_irq_enable(USART_TypeDef * USARTx) { if(USARTx==USART2) { reserved_uart[1] = true; __HAL_RCC_USART2_CLK_ENABLE(); - HAL_NVIC_SetPriority(USART2_IRQn, 0, 1); + //HAL_NVIC_SetPriority(USART2_IRQn, 0, 1); HAL_NVIC_EnableIRQ(USART2_IRQn); } #endif @@ -112,7 +118,7 @@ STATIC void uart_clk_irq_enable(USART_TypeDef * USARTx) { if(USARTx==USART3) { reserved_uart[2] = true; __HAL_RCC_USART3_CLK_ENABLE(); - HAL_NVIC_SetPriority(USART3_IRQn, 0, 1); + //HAL_NVIC_SetPriority(USART3_IRQn, 0, 1); HAL_NVIC_EnableIRQ(USART3_IRQn); } #endif @@ -120,7 +126,7 @@ STATIC void uart_clk_irq_enable(USART_TypeDef * USARTx) { if(USARTx==UART4) { reserved_uart[3] = true; __HAL_RCC_UART4_CLK_ENABLE(); - HAL_NVIC_SetPriority(UART4_IRQn, 0, 1); + //HAL_NVIC_SetPriority(UART4_IRQn, 0, 1); HAL_NVIC_EnableIRQ(UART4_IRQn); } #endif @@ -128,7 +134,7 @@ STATIC void uart_clk_irq_enable(USART_TypeDef * USARTx) { if(USARTx==UART5) { reserved_uart[4] = true; __HAL_RCC_UART5_CLK_ENABLE(); - HAL_NVIC_SetPriority(UART5_IRQn, 0, 1); + //HAL_NVIC_SetPriority(UART5_IRQn, 0, 1); HAL_NVIC_EnableIRQ(UART5_IRQn); } #endif @@ -136,7 +142,7 @@ STATIC void uart_clk_irq_enable(USART_TypeDef * USARTx) { if(USARTx==USART6) { reserved_uart[5] = true; __HAL_RCC_USART6_CLK_ENABLE(); - HAL_NVIC_SetPriority(USART6_IRQn, 0, 1); + //HAL_NVIC_SetPriority(USART6_IRQn, 0, 1); HAL_NVIC_EnableIRQ(USART6_IRQn); } #endif -- cgit v1.2.3 From a596213526cdfba0688fbe8228f49c798f1b7d1e Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 21 Oct 2019 16:24:32 -0400 Subject: non-functional WIP --- ports/stm32f4/common-hal/busio/UART.c | 80 +++++++++++++++++++++++------------ ports/stm32f4/common-hal/busio/UART.h | 6 ++- ports/stm32f4/tick.c | 9 ++++ 3 files changed, 67 insertions(+), 28 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index bb6710473..0b051dbe4 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -38,7 +38,6 @@ #include "tick.h" #include "stm32f4xx_hal.h" - STATIC bool reserved_uart[MAX_UART]; void uart_reset(void) { @@ -46,37 +45,37 @@ void uart_reset(void) { reserved_uart[0] = false; MP_STATE_PORT(cpy_uart_obj_all)[0] = NULL; __HAL_RCC_USART1_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(USART1_IRQn); + //HAL_NVIC_DisableIRQ(USART1_IRQn); #endif #ifdef USART2 reserved_uart[1] = false; MP_STATE_PORT(cpy_uart_obj_all)[1] = NULL; __HAL_RCC_USART2_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(USART2_IRQn); + //HAL_NVIC_DisableIRQ(USART2_IRQn); #endif #ifdef USART3 reserved_uart[2] = false; MP_STATE_PORT(cpy_uart_obj_all)[2] = NULL; __HAL_RCC_USART3_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(USART3_IRQn); + //HAL_NVIC_DisableIRQ(USART3_IRQn); #endif #ifdef UART4 reserved_uart[3] = false; MP_STATE_PORT(cpy_uart_obj_all)[3] = NULL; __HAL_RCC_UART4_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(UART4_IRQn); + //HAL_NVIC_DisableIRQ(UART4_IRQn); #endif #ifdef UART5 reserved_uart[4] = false; MP_STATE_PORT(cpy_uart_obj_all)[4] = NULL; __HAL_RCC_UART5_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(UART5_IRQn); + //HAL_NVIC_DisableIRQ(UART5_IRQn); #endif #ifdef USART6 reserved_uart[5] = false; MP_STATE_PORT(cpy_uart_obj_all)[5] = NULL; __HAL_RCC_USART6_CLK_DISABLE(); - HAL_NVIC_DisableIRQ(USART6_IRQn); + //HAL_NVIC_DisableIRQ(USART6_IRQn); #endif //TODO: this technically needs to go to 10 to support F413. Any way to condense? } @@ -97,20 +96,26 @@ STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t *self, bool pin_eva } -STATIC void uart_clk_irq_enable(USART_TypeDef * USARTx) { +STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) { #ifdef USART1 if(USARTx==USART1) { reserved_uart[0] = true; __HAL_RCC_USART1_CLK_ENABLE(); - //HAL_NVIC_SetPriority(USART1_IRQn, 0, 1); + self->irq = USART1_IRQn; + //HAL_NVIC_SetPriority(USART1_IRQn, 2,1); + NVIC_SetPriority(USART1_IRQn, 7); + NVIC_ClearPendingIRQ(USART1_IRQn); HAL_NVIC_EnableIRQ(USART1_IRQn); } #endif - #ifdef UART2 + #ifdef USART2 if(USARTx==USART2) { reserved_uart[1] = true; __HAL_RCC_USART2_CLK_ENABLE(); - //HAL_NVIC_SetPriority(USART2_IRQn, 0, 1); + self->irq = USART2_IRQn; + //HAL_NVIC_SetPriority(USART2_IRQn, 2,1); + NVIC_SetPriority(USART2_IRQn, 7); + NVIC_ClearPendingIRQ(USART2_IRQn); HAL_NVIC_EnableIRQ(USART2_IRQn); } #endif @@ -118,7 +123,10 @@ STATIC void uart_clk_irq_enable(USART_TypeDef * USARTx) { if(USARTx==USART3) { reserved_uart[2] = true; __HAL_RCC_USART3_CLK_ENABLE(); - //HAL_NVIC_SetPriority(USART3_IRQn, 0, 1); + self->irq = USART3_IRQn; + //HAL_NVIC_SetPriority(USART3_IRQn, 2,1); + NVIC_SetPriority(USART3_IRQn, 7); + NVIC_ClearPendingIRQ(USART3_IRQn); HAL_NVIC_EnableIRQ(USART3_IRQn); } #endif @@ -126,7 +134,10 @@ STATIC void uart_clk_irq_enable(USART_TypeDef * USARTx) { if(USARTx==UART4) { reserved_uart[3] = true; __HAL_RCC_UART4_CLK_ENABLE(); - //HAL_NVIC_SetPriority(UART4_IRQn, 0, 1); + self->irq = UART4_IRQn; + //HAL_NVIC_SetPriority(UART4_IRQn, 2,1); + NVIC_SetPriority(UART4_IRQn, 7); + NVIC_ClearPendingIRQ(UART4_IRQn); HAL_NVIC_EnableIRQ(UART4_IRQn); } #endif @@ -134,7 +145,10 @@ STATIC void uart_clk_irq_enable(USART_TypeDef * USARTx) { if(USARTx==UART5) { reserved_uart[4] = true; __HAL_RCC_UART5_CLK_ENABLE(); - //HAL_NVIC_SetPriority(UART5_IRQn, 0, 1); + self->irq = UART5_IRQn; + //NVIC_SetPriority(UART5_IRQn, 7); + NVIC_SetPriority(UART5_IRQn, 7); + NVIC_ClearPendingIRQ(UART5_IRQn); HAL_NVIC_EnableIRQ(UART5_IRQn); } #endif @@ -142,7 +156,10 @@ STATIC void uart_clk_irq_enable(USART_TypeDef * USARTx) { if(USARTx==USART6) { reserved_uart[5] = true; __HAL_RCC_USART6_CLK_ENABLE(); - //HAL_NVIC_SetPriority(USART6_IRQn, 0, 1); + self->irq = USART6_IRQn; + //NVIC_SetPriority(USART6_IRQn, 7); + NVIC_SetPriority(USART6_IRQn, 7); + NVIC_ClearPendingIRQ(USART6_IRQn); HAL_NVIC_EnableIRQ(USART6_IRQn); } #endif @@ -248,7 +265,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, HAL_GPIO_Init(pin_port(rx->port), &GPIO_InitStruct); } - uart_clk_irq_enable(USARTx); + uart_clk_irq_enable(self,USARTx); self->handle.Instance = USARTx; self->handle.Init.BaudRate = baudrate; @@ -297,6 +314,9 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { reset_pin_number(self->rx->pin->port,self->rx->pin->number); self->tx = mp_const_none; self->rx = mp_const_none; + gc_free(self->rbuf.buf); + self->rbuf.size = 0; + self->rbuf.iput = self->rbuf.iget = 0; } // Read characters. @@ -318,7 +338,8 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t } // Halt reception - HAL_UART_AbortReceive_IT(&self->handle); + //HAL_UART_AbortReceive_IT(&self->handle); + NVIC_DisableIRQ(self->irq); // copy received data rx_bytes = ringbuf_count(&self->rbuf); @@ -327,9 +348,10 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t data[i] = ringbuf_get(&self->rbuf); } - if (HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1) != HAL_OK) { - mp_raise_ValueError(translate("HAL recieve IT start error")); - } + NVIC_EnableIRQ(self->irq); + // if (HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1) != HAL_OK) { + // mp_raise_ValueError(translate("HAL recieve IT re-start error")); + // } if (rx_bytes == 0) { *errcode = EAGAIN; @@ -359,15 +381,18 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *handle) busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[i]; if(handle == &context->handle) { ringbuf_put_n(&context->rbuf, &context->rx_char, 1); - HAL_UART_Receive_IT(handle, &context->rx_char, 1); - return; + HAL_StatusTypeDef result = HAL_UART_Receive_IT(handle, &context->rx_char, 1); + if(result!=HAL_OK) { + mp_raise_RuntimeError(translate("UART rx restart error")); + } + break; } } } void HAL_UART_ErrorCallback(UART_HandleTypeDef *UartHandle) { - mp_raise_RuntimeError(translate("UART Callback Error")); + mp_raise_RuntimeError(translate("UART Error Callback hit")); } uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { @@ -396,16 +421,18 @@ uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { // Halt reception - HAL_UART_AbortReceive_IT(&self->handle); + //HAL_UART_AbortReceive_IT(&self->handle); + NVIC_DisableIRQ(self->irq); ringbuf_clear(&self->rbuf); - HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); + NVIC_EnableIRQ(self->irq); + //HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); } bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { return true; } -static void call_hal_irq(int uart_num) { +STATIC void call_hal_irq(int uart_num) { //Create casted context pointer busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[uart_num-1]; if(context != NULL) { @@ -439,4 +466,3 @@ void UART5_IRQHandler(void) { void USART6_IRQHandler(void) { call_hal_irq(6); } - diff --git a/ports/stm32f4/common-hal/busio/UART.h b/ports/stm32f4/common-hal/busio/UART.h index 3c746f64e..a8c4b5c42 100644 --- a/ports/stm32f4/common-hal/busio/UART.h +++ b/ports/stm32f4/common-hal/busio/UART.h @@ -37,6 +37,7 @@ typedef struct { mp_obj_base_t base; UART_HandleTypeDef handle; + IRQn_Type irq; const mcu_uart_tx_obj_t *tx; const mcu_uart_rx_obj_t *rx; @@ -52,5 +53,8 @@ void uart_reset(void); void USART1_IRQHandler(void); void USART2_IRQHandler(void); void USART3_IRQHandler(void); -void UART_IRQHandler(void); +void UART4_IRQHandler(void); +void UART5_IRQHandler(void); +void USART6_IRQHandler(void); +// void UART_IRQHandler(void); #endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_UART_H diff --git a/ports/stm32f4/tick.c b/ports/stm32f4/tick.c index 43521fb51..110af52b6 100644 --- a/ports/stm32f4/tick.c +++ b/ports/stm32f4/tick.c @@ -62,6 +62,15 @@ uint32_t HAL_GetTick(void) //override ST HAL void tick_init() { uint32_t ticks_per_ms = SystemCoreClock/ 1000; SysTick_Config(ticks_per_ms); // interrupt is enabled + + NVIC_EnableIRQ(SysTick_IRQn); + // Set all peripheral interrupt priorities to the lowest priority by default. + // for (uint16_t i = 0; i < PERIPH_COUNT_IRQn; i++) { + // NVIC_SetPriority(i, (1UL << __NVIC_PRIO_BITS) - 1UL); + // } + // Bump up the systick interrupt so nothing else interferes with timekeeping. + NVIC_SetPriority(SysTick_IRQn, 0); + NVIC_SetPriority(OTG_FS_IRQn, 1); } void tick_delay(uint32_t us) { -- cgit v1.2.3 From ec32731b5019c32f8f1d6562d174a02b0837092e Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 28 Oct 2019 12:21:12 -0400 Subject: sync tinyusb (again) --- lib/tinyusb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/tinyusb b/lib/tinyusb index d3e48da5a..e413c9efa 160000 --- a/lib/tinyusb +++ b/lib/tinyusb @@ -1 +1 @@ -Subproject commit d3e48da5a1266a88f5f0fdfe28818c8599b09844 +Subproject commit e413c9efa303d70de019a91aa415384fe80ca78f -- cgit v1.2.3 From 33deb6752b8723d66036d2e433eddf0ad22d27ce Mon Sep 17 00:00:00 2001 From: Hierophect Date: Tue, 29 Oct 2019 09:41:52 -0400 Subject: Add harder resets to UART --- ports/stm32f4/common-hal/busio/UART.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 0b051dbe4..1e03b5886 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -100,6 +100,8 @@ STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) #ifdef USART1 if(USARTx==USART1) { reserved_uart[0] = true; + __HAL_RCC_USART1_FORCE_RESET(); + __HAL_RCC_USART1_RELEASE_RESET(); __HAL_RCC_USART1_CLK_ENABLE(); self->irq = USART1_IRQn; //HAL_NVIC_SetPriority(USART1_IRQn, 2,1); @@ -111,6 +113,8 @@ STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) #ifdef USART2 if(USARTx==USART2) { reserved_uart[1] = true; + __HAL_RCC_USART2_FORCE_RESET(); + __HAL_RCC_USART2_RELEASE_RESET(); __HAL_RCC_USART2_CLK_ENABLE(); self->irq = USART2_IRQn; //HAL_NVIC_SetPriority(USART2_IRQn, 2,1); @@ -122,6 +126,8 @@ STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) #ifdef USART3 if(USARTx==USART3) { reserved_uart[2] = true; + __HAL_RCC_USART3_FORCE_RESET(); + __HAL_RCC_USART3_RELEASE_RESET(); __HAL_RCC_USART3_CLK_ENABLE(); self->irq = USART3_IRQn; //HAL_NVIC_SetPriority(USART3_IRQn, 2,1); @@ -133,6 +139,8 @@ STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) #ifdef UART4 if(USARTx==UART4) { reserved_uart[3] = true; + __HAL_RCC_UART4_FORCE_RESET(); + __HAL_RCC_UART4_RELEASE_RESET(); __HAL_RCC_UART4_CLK_ENABLE(); self->irq = UART4_IRQn; //HAL_NVIC_SetPriority(UART4_IRQn, 2,1); @@ -144,6 +152,8 @@ STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) #ifdef UART5 if(USARTx==UART5) { reserved_uart[4] = true; + __HAL_RCC_UART5_FORCE_RESET(); + __HAL_RCC_UART5_RELEASE_RESET(); __HAL_RCC_UART5_CLK_ENABLE(); self->irq = UART5_IRQn; //NVIC_SetPriority(UART5_IRQn, 7); @@ -155,6 +165,8 @@ STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) #ifdef USART6 if(USARTx==USART6) { reserved_uart[5] = true; + __HAL_RCC_USART6_FORCE_RESET(); + __HAL_RCC_USART6_RELEASE_RESET(); __HAL_RCC_USART6_CLK_ENABLE(); self->irq = USART6_IRQn; //NVIC_SetPriority(USART6_IRQn, 7); -- cgit v1.2.3 From a8070a4185ab35e7373bfc231ebc0ad459392b3f Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 30 Oct 2019 16:59:53 -0400 Subject: Revise IRQ managment, add restart on failure --- ports/stm32f4/common-hal/busio/UART.c | 119 +++++++++++++++++++--------------- ports/stm32f4/common-hal/busio/UART.h | 7 ++ 2 files changed, 74 insertions(+), 52 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 1e03b5886..ca0d5cd9f 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -38,6 +38,11 @@ #include "tick.h" #include "stm32f4xx_hal.h" +bool iflag; +int errflag; +bool rxflag; +bool bsyflag; + STATIC bool reserved_uart[MAX_UART]; void uart_reset(void) { @@ -45,37 +50,31 @@ void uart_reset(void) { reserved_uart[0] = false; MP_STATE_PORT(cpy_uart_obj_all)[0] = NULL; __HAL_RCC_USART1_CLK_DISABLE(); - //HAL_NVIC_DisableIRQ(USART1_IRQn); #endif #ifdef USART2 reserved_uart[1] = false; MP_STATE_PORT(cpy_uart_obj_all)[1] = NULL; __HAL_RCC_USART2_CLK_DISABLE(); - //HAL_NVIC_DisableIRQ(USART2_IRQn); #endif #ifdef USART3 reserved_uart[2] = false; MP_STATE_PORT(cpy_uart_obj_all)[2] = NULL; __HAL_RCC_USART3_CLK_DISABLE(); - //HAL_NVIC_DisableIRQ(USART3_IRQn); #endif #ifdef UART4 reserved_uart[3] = false; MP_STATE_PORT(cpy_uart_obj_all)[3] = NULL; __HAL_RCC_UART4_CLK_DISABLE(); - //HAL_NVIC_DisableIRQ(UART4_IRQn); #endif #ifdef UART5 reserved_uart[4] = false; MP_STATE_PORT(cpy_uart_obj_all)[4] = NULL; __HAL_RCC_UART5_CLK_DISABLE(); - //HAL_NVIC_DisableIRQ(UART5_IRQn); #endif #ifdef USART6 reserved_uart[5] = false; MP_STATE_PORT(cpy_uart_obj_all)[5] = NULL; __HAL_RCC_USART6_CLK_DISABLE(); - //HAL_NVIC_DisableIRQ(USART6_IRQn); #endif //TODO: this technically needs to go to 10 to support F413. Any way to condense? } @@ -104,10 +103,6 @@ STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) __HAL_RCC_USART1_RELEASE_RESET(); __HAL_RCC_USART1_CLK_ENABLE(); self->irq = USART1_IRQn; - //HAL_NVIC_SetPriority(USART1_IRQn, 2,1); - NVIC_SetPriority(USART1_IRQn, 7); - NVIC_ClearPendingIRQ(USART1_IRQn); - HAL_NVIC_EnableIRQ(USART1_IRQn); } #endif #ifdef USART2 @@ -117,10 +112,6 @@ STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) __HAL_RCC_USART2_RELEASE_RESET(); __HAL_RCC_USART2_CLK_ENABLE(); self->irq = USART2_IRQn; - //HAL_NVIC_SetPriority(USART2_IRQn, 2,1); - NVIC_SetPriority(USART2_IRQn, 7); - NVIC_ClearPendingIRQ(USART2_IRQn); - HAL_NVIC_EnableIRQ(USART2_IRQn); } #endif #ifdef USART3 @@ -130,10 +121,6 @@ STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) __HAL_RCC_USART3_RELEASE_RESET(); __HAL_RCC_USART3_CLK_ENABLE(); self->irq = USART3_IRQn; - //HAL_NVIC_SetPriority(USART3_IRQn, 2,1); - NVIC_SetPriority(USART3_IRQn, 7); - NVIC_ClearPendingIRQ(USART3_IRQn); - HAL_NVIC_EnableIRQ(USART3_IRQn); } #endif #ifdef UART4 @@ -143,10 +130,6 @@ STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) __HAL_RCC_UART4_RELEASE_RESET(); __HAL_RCC_UART4_CLK_ENABLE(); self->irq = UART4_IRQn; - //HAL_NVIC_SetPriority(UART4_IRQn, 2,1); - NVIC_SetPriority(UART4_IRQn, 7); - NVIC_ClearPendingIRQ(UART4_IRQn); - HAL_NVIC_EnableIRQ(UART4_IRQn); } #endif #ifdef UART5 @@ -156,10 +139,6 @@ STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) __HAL_RCC_UART5_RELEASE_RESET(); __HAL_RCC_UART5_CLK_ENABLE(); self->irq = UART5_IRQn; - //NVIC_SetPriority(UART5_IRQn, 7); - NVIC_SetPriority(UART5_IRQn, 7); - NVIC_ClearPendingIRQ(UART5_IRQn); - HAL_NVIC_EnableIRQ(UART5_IRQn); } #endif #ifdef USART6 @@ -169,10 +148,6 @@ STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) __HAL_RCC_USART6_RELEASE_RESET(); __HAL_RCC_USART6_CLK_ENABLE(); self->irq = USART6_IRQn; - //NVIC_SetPriority(USART6_IRQn, 7); - NVIC_SetPriority(USART6_IRQn, 7); - NVIC_ClearPendingIRQ(USART6_IRQn); - HAL_NVIC_EnableIRQ(USART6_IRQn); } #endif } @@ -308,13 +283,25 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if (self->tx != NULL) { claim_pin(tx); } - self->baudrate = baudrate; self->timeout_ms = timeout * 1000; - if (HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1) != HAL_OK) { - mp_raise_ValueError(translate("HAL recieve IT start error")); + //start the interrupt series + if ((HAL_UART_GetState(&self->handle) & HAL_UART_STATE_BUSY_RX) == HAL_UART_STATE_BUSY_RX) { + mp_raise_ValueError(translate("Could not start interrupt, RX busy")); } + HAL_NVIC_DisableIRQ(self->irq); //prevent handle lock contention + + HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); + + HAL_NVIC_SetPriority(self->irq, UART_IRQPRI, UART_IRQSUB_PRI); + HAL_NVIC_EnableIRQ(self->irq); + + mp_printf(&mp_plat_print, "Started and inited\n"); + iflag = 0; + errflag = 0; + rxflag = 0; + bsyflag = 0; } bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { @@ -322,6 +309,7 @@ bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { } void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { + mp_printf(&mp_plat_print, "De-init UART\n"); reset_pin_number(self->tx->pin->port,self->tx->pin->number); reset_pin_number(self->rx->pin->port,self->rx->pin->number); self->tx = mp_const_none; @@ -343,6 +331,10 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t // Wait for all bytes received or timeout, same as nrf while ( (ringbuf_count(&self->rbuf) < len) && (ticks_ms - start_ticks < self->timeout_ms) ) { RUN_BACKGROUND_TASKS; + //restart if it failed in the callback + if(errflag != HAL_OK) { + errflag = HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); + } // Allow user to break out of a timeout with a KeyboardInterrupt. if ( mp_hal_is_interrupted() ) { return 0; @@ -350,21 +342,23 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t } // Halt reception - //HAL_UART_AbortReceive_IT(&self->handle); - NVIC_DisableIRQ(self->irq); + HAL_NVIC_DisableIRQ(self->irq); // copy received data rx_bytes = ringbuf_count(&self->rbuf); + //Used for debuggings + //mp_printf(&mp_plat_print, "Read: count:%d, buffer location%p, if:%der:%drx:%dbsy:%d\n", rx_bytes, &self->rbuf,iflag,errflag,rxflag,bsyflag); + iflag = 0; + errflag = 0; + rxflag = 0; + bsyflag = 0; rx_bytes = MIN(rx_bytes, len); for ( uint16_t i = 0; i < rx_bytes; i++ ) { data[i] = ringbuf_get(&self->rbuf); } - NVIC_EnableIRQ(self->irq); - // if (HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1) != HAL_OK) { - // mp_raise_ValueError(translate("HAL recieve IT re-start error")); - // } - + HAL_NVIC_EnableIRQ(self->irq); + if (rx_bytes == 0) { *errcode = EAGAIN; return MP_STREAM_ERROR; @@ -383,28 +377,50 @@ size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, } else { mp_raise_ValueError(translate("UART write error")); } + mp_printf(&mp_plat_print, "Send\n"); return 0; } void HAL_UART_RxCpltCallback(UART_HandleTypeDef *handle) { + rxflag = 1; for(int i=0; i<7; i++) { //get context pointer and cast it as struct pointer busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[i]; if(handle == &context->handle) { - ringbuf_put_n(&context->rbuf, &context->rx_char, 1); - HAL_StatusTypeDef result = HAL_UART_Receive_IT(handle, &context->rx_char, 1); - if(result!=HAL_OK) { - mp_raise_RuntimeError(translate("UART rx restart error")); + //check if transaction is ongoing + if((HAL_UART_GetState(handle) & HAL_UART_STATE_BUSY_RX) == HAL_UART_STATE_BUSY_RX) { + bsyflag = 1; + return; } - break; + ringbuf_put_n(&context->rbuf, &context->rx_char, 1); + errflag = HAL_UART_Receive_IT(handle, &context->rx_char, 1); + + return; } } } void HAL_UART_ErrorCallback(UART_HandleTypeDef *UartHandle) { - mp_raise_RuntimeError(translate("UART Error Callback hit")); + if (__HAL_UART_GET_FLAG(UartHandle, UART_FLAG_PE) != RESET) { + __HAL_UART_CLEAR_PEFLAG(UartHandle); + } else if (__HAL_UART_GET_FLAG(UartHandle, UART_FLAG_FE) != RESET) { + __HAL_UART_CLEAR_FEFLAG(UartHandle); + } else if (__HAL_UART_GET_FLAG(UartHandle, UART_FLAG_NE) != RESET) { + __HAL_UART_CLEAR_NEFLAG(UartHandle); + } else if (__HAL_UART_GET_FLAG(UartHandle, UART_FLAG_ORE) != RESET) { + __HAL_UART_CLEAR_OREFLAG(UartHandle); + } + //restart serial read after an error + for(int i=0; i<7; i++) { + busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[i]; + if(UartHandle == &context->handle) { + HAL_UART_Receive_IT(UartHandle, &context->rx_char, 1); + return; + } + } + } uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { @@ -432,12 +448,11 @@ uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { } void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { + mp_printf(&mp_plat_print, "Clear RX Buffer\n"); // Halt reception - //HAL_UART_AbortReceive_IT(&self->handle); - NVIC_DisableIRQ(self->irq); + HAL_NVIC_DisableIRQ(self->irq); ringbuf_clear(&self->rbuf); - NVIC_EnableIRQ(self->irq); - //HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); + HAL_NVIC_EnableIRQ(self->irq); } bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { @@ -445,12 +460,12 @@ bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { } STATIC void call_hal_irq(int uart_num) { + iflag = 1; //Create casted context pointer busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[uart_num-1]; if(context != NULL) { + HAL_NVIC_ClearPendingIRQ(context->irq); HAL_UART_IRQHandler(&context->handle); - } else { - mp_raise_ValueError(translate("UART IRQ bad handle supplied")); } } diff --git a/ports/stm32f4/common-hal/busio/UART.h b/ports/stm32f4/common-hal/busio/UART.h index a8c4b5c42..467030598 100644 --- a/ports/stm32f4/common-hal/busio/UART.h +++ b/ports/stm32f4/common-hal/busio/UART.h @@ -34,6 +34,13 @@ #include "py/obj.h" #include "py/ringbuf.h" +#ifndef UART_IRQPRI +#define UART_IRQPRI 1 +#endif +#ifndef UART_IRQSUB_PRI +#define UART_IRQSUB_PRI 0 +#endif + typedef struct { mp_obj_base_t base; UART_HandleTypeDef handle; -- cgit v1.2.3 From c78d79938de97838bb86ea63204fc31ffefb596f Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 30 Oct 2019 17:07:16 -0400 Subject: remove debug output --- ports/stm32f4/common-hal/busio/UART.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index ca0d5cd9f..b78515440 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -297,7 +297,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, HAL_NVIC_SetPriority(self->irq, UART_IRQPRI, UART_IRQSUB_PRI); HAL_NVIC_EnableIRQ(self->irq); - mp_printf(&mp_plat_print, "Started and inited\n"); + //mp_printf(&mp_plat_print, "Started and inited\n"); iflag = 0; errflag = 0; rxflag = 0; @@ -309,7 +309,7 @@ bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { } void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { - mp_printf(&mp_plat_print, "De-init UART\n"); + //mp_printf(&mp_plat_print, "De-init UART\n"); reset_pin_number(self->tx->pin->port,self->tx->pin->number); reset_pin_number(self->rx->pin->port,self->rx->pin->number); self->tx = mp_const_none; @@ -377,7 +377,7 @@ size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, } else { mp_raise_ValueError(translate("UART write error")); } - mp_printf(&mp_plat_print, "Send\n"); + //mp_printf(&mp_plat_print, "Send\n"); return 0; } @@ -448,7 +448,7 @@ uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { } void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { - mp_printf(&mp_plat_print, "Clear RX Buffer\n"); + //mp_printf(&mp_plat_print, "Clear RX Buffer\n"); // Halt reception HAL_NVIC_DisableIRQ(self->irq); ringbuf_clear(&self->rbuf); -- cgit v1.2.3 From e605ce63176a6794e98c59457619cde620b93a4e Mon Sep 17 00:00:00 2001 From: Hierophect Date: Fri, 1 Nov 2019 14:30:28 -0400 Subject: Debugging additions --- ports/stm32f4/common-hal/busio/UART.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index b78515440..34875324b 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -49,31 +49,43 @@ void uart_reset(void) { #ifdef USART1 reserved_uart[0] = false; MP_STATE_PORT(cpy_uart_obj_all)[0] = NULL; + __HAL_RCC_USART1_FORCE_RESET(); + __HAL_RCC_USART1_RELEASE_RESET(); __HAL_RCC_USART1_CLK_DISABLE(); #endif #ifdef USART2 reserved_uart[1] = false; MP_STATE_PORT(cpy_uart_obj_all)[1] = NULL; + __HAL_RCC_USART2_FORCE_RESET(); + __HAL_RCC_USART2_RELEASE_RESET(); __HAL_RCC_USART2_CLK_DISABLE(); #endif #ifdef USART3 reserved_uart[2] = false; MP_STATE_PORT(cpy_uart_obj_all)[2] = NULL; + __HAL_RCC_USART3_FORCE_RESET(); + __HAL_RCC_USART3_RELEASE_RESET(); __HAL_RCC_USART3_CLK_DISABLE(); #endif #ifdef UART4 reserved_uart[3] = false; MP_STATE_PORT(cpy_uart_obj_all)[3] = NULL; + __HAL_RCC_UART4_FORCE_RESET(); + __HAL_RCC_UART4_RELEASE_RESET(); __HAL_RCC_UART4_CLK_DISABLE(); #endif #ifdef UART5 reserved_uart[4] = false; MP_STATE_PORT(cpy_uart_obj_all)[4] = NULL; + __HAL_RCC_UART5_FORCE_RESET(); + __HAL_RCC_UART5_RELEASE_RESET(); __HAL_RCC_UART5_CLK_DISABLE(); #endif #ifdef USART6 reserved_uart[5] = false; MP_STATE_PORT(cpy_uart_obj_all)[5] = NULL; + __HAL_RCC_USART6_FORCE_RESET(); + __HAL_RCC_USART6_RELEASE_RESET(); __HAL_RCC_USART6_CLK_DISABLE(); #endif //TODO: this technically needs to go to 10 to support F413. Any way to condense? @@ -302,6 +314,14 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, errflag = 0; rxflag = 0; bsyflag = 0; + + //interrupt debuggery + GPIO_InitStruct.Pin = pin_mask(7); + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(pin_port(2), &GPIO_InitStruct); + HAL_GPIO_WritePin(pin_port(2),pin_mask(7),0); } bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { @@ -466,6 +486,7 @@ STATIC void call_hal_irq(int uart_num) { if(context != NULL) { HAL_NVIC_ClearPendingIRQ(context->irq); HAL_UART_IRQHandler(&context->handle); + HAL_GPIO_TogglePin(pin_port(2),pin_mask(7)); } } -- cgit v1.2.3 From 8d0cc71aee6fb65669d7ef1ba64d55acf8cb47f1 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Fri, 1 Nov 2019 17:00:01 -0400 Subject: Add write protections, fix edge case read halt --- ports/stm32f4/common-hal/busio/UART.c | 58 ++++++++++------------------------- 1 file changed, 16 insertions(+), 42 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 34875324b..3873c1a5a 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -38,12 +38,8 @@ #include "tick.h" #include "stm32f4xx_hal.h" -bool iflag; -int errflag; -bool rxflag; -bool bsyflag; - STATIC bool reserved_uart[MAX_UART]; +int errflag; //Used to restart read halts void uart_reset(void) { #ifdef USART1 @@ -88,7 +84,6 @@ void uart_reset(void) { __HAL_RCC_USART6_RELEASE_RESET(); __HAL_RCC_USART6_CLK_DISABLE(); #endif - //TODO: this technically needs to go to 10 to support F413. Any way to condense? } STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t *self, bool pin_eval, @@ -302,26 +297,14 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if ((HAL_UART_GetState(&self->handle) & HAL_UART_STATE_BUSY_RX) == HAL_UART_STATE_BUSY_RX) { mp_raise_ValueError(translate("Could not start interrupt, RX busy")); } - HAL_NVIC_DisableIRQ(self->irq); //prevent handle lock contention + //start the recieve interrupt chain + HAL_NVIC_DisableIRQ(self->irq); //prevent handle lock contention HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); - HAL_NVIC_SetPriority(self->irq, UART_IRQPRI, UART_IRQSUB_PRI); HAL_NVIC_EnableIRQ(self->irq); - //mp_printf(&mp_plat_print, "Started and inited\n"); - iflag = 0; - errflag = 0; - rxflag = 0; - bsyflag = 0; - - //interrupt debuggery - GPIO_InitStruct.Pin = pin_mask(7); - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(pin_port(2), &GPIO_InitStruct); - HAL_GPIO_WritePin(pin_port(2),pin_mask(7),0); + errflag = HAL_OK; } bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { @@ -329,7 +312,6 @@ bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { } void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { - //mp_printf(&mp_plat_print, "De-init UART\n"); reset_pin_number(self->tx->pin->port,self->tx->pin->number); reset_pin_number(self->rx->pin->port,self->rx->pin->number); self->tx = mp_const_none; @@ -339,7 +321,6 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { self->rbuf.iput = self->rbuf.iget = 0; } -// Read characters. size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { if (self->rx == NULL) { mp_raise_ValueError(translate("No RX pin")); @@ -363,20 +344,14 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t // Halt reception HAL_NVIC_DisableIRQ(self->irq); - // copy received data rx_bytes = ringbuf_count(&self->rbuf); - //Used for debuggings - //mp_printf(&mp_plat_print, "Read: count:%d, buffer location%p, if:%der:%drx:%dbsy:%d\n", rx_bytes, &self->rbuf,iflag,errflag,rxflag,bsyflag); - iflag = 0; - errflag = 0; - rxflag = 0; - bsyflag = 0; + //Used for debugging + //mp_printf(&mp_plat_print, "Read: count:%d, buffer location%p, er:%d\n", rx_bytes, &self->rbuf,errflag); rx_bytes = MIN(rx_bytes, len); for ( uint16_t i = 0; i < rx_bytes; i++ ) { data[i] = ringbuf_get(&self->rbuf); } - HAL_NVIC_EnableIRQ(self->irq); if (rx_bytes == 0) { @@ -392,25 +367,27 @@ size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, mp_raise_ValueError(translate("No TX pin")); } - if (HAL_UART_Transmit(&self->handle, (uint8_t *)data, len, 500) == HAL_OK) { - return len; - } else { + HAL_NVIC_DisableIRQ(self->irq); + + if (HAL_UART_Transmit(&self->handle, (uint8_t *)data, len, self->timeout_ms) != HAL_OK) { mp_raise_ValueError(translate("UART write error")); } - //mp_printf(&mp_plat_print, "Send\n"); - return 0; + + HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); + HAL_NVIC_SetPriority(self->irq, UART_IRQPRI, UART_IRQSUB_PRI); + HAL_NVIC_EnableIRQ(self->irq); + + return len; } void HAL_UART_RxCpltCallback(UART_HandleTypeDef *handle) { - rxflag = 1; for(int i=0; i<7; i++) { //get context pointer and cast it as struct pointer busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[i]; if(handle == &context->handle) { //check if transaction is ongoing if((HAL_UART_GetState(handle) & HAL_UART_STATE_BUSY_RX) == HAL_UART_STATE_BUSY_RX) { - bsyflag = 1; return; } ringbuf_put_n(&context->rbuf, &context->rx_char, 1); @@ -468,7 +445,6 @@ uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { } void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { - //mp_printf(&mp_plat_print, "Clear RX Buffer\n"); // Halt reception HAL_NVIC_DisableIRQ(self->irq); ringbuf_clear(&self->rbuf); @@ -476,17 +452,15 @@ void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { } bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { - return true; + return __HAL_UART_GET_FLAG(&self->handle,UART_FLAG_TXE); } STATIC void call_hal_irq(int uart_num) { - iflag = 1; //Create casted context pointer busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[uart_num-1]; if(context != NULL) { HAL_NVIC_ClearPendingIRQ(context->irq); HAL_UART_IRQHandler(&context->handle); - HAL_GPIO_TogglePin(pin_port(2),pin_mask(7)); } } -- cgit v1.2.3 From 8a098c154dd235cb43e053aeb813e4124c409fff Mon Sep 17 00:00:00 2001 From: Hierophect Date: Tue, 5 Nov 2019 16:25:30 -0500 Subject: Fix unsaved file --- ports/stm32f4/peripherals/stm32f4/periph.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/ports/stm32f4/peripherals/stm32f4/periph.h b/ports/stm32f4/peripherals/stm32f4/periph.h index 389b27a51..990cf0533 100644 --- a/ports/stm32f4/peripherals/stm32f4/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/periph.h @@ -101,7 +101,6 @@ typedef struct { .pin = spi_pin, \ } -<<<<<<< HEAD // UART // TODO: these objects should be condensed into a single 'periph_pin' unless we // find a compelling reason to store more unique data in them. @@ -123,7 +122,8 @@ typedef struct { .uart_index = index, \ .altfn_index = alt, \ .pin = uart_pin, \ -======= +} + //Timers typedef struct { uint8_t tim_index:4; @@ -138,7 +138,6 @@ typedef struct { .altfn_index = alt, \ .channel_index = channel, \ .pin = tim_pin, \ ->>>>>>> upstream/master } //Starter Lines -- cgit v1.2.3 From e076f14ea351381190ce08d931a2b4000a7454a3 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 11 Nov 2019 15:32:47 -0500 Subject: text fixes --- ports/stm32f4/common-hal/busio/UART.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 3873c1a5a..8e08fd3bd 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -94,7 +94,7 @@ STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t *self, bool pin_eva return mcu_uart_banks[uart_index]; } else { if (uart_taken) { - mp_raise_ValueError(translate("Hardware busy, try alternative pins")); + mp_raise_ValueError(translate("Hardware in use, try alternative pins")); } else { mp_raise_ValueError(translate("Invalid UART pin selection")); } @@ -229,7 +229,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, (self->tx->uart_index-1), uart_taken); } else { //both pins cannot be empty - mp_raise_ValueError(translate("You must supply at least one UART pin")); + mp_raise_ValueError(translate("Supply at least one UART pin")); } //Other errors @@ -298,7 +298,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, mp_raise_ValueError(translate("Could not start interrupt, RX busy")); } - //start the recieve interrupt chain + //start the receive interrupt chain HAL_NVIC_DisableIRQ(self->irq); //prevent handle lock contention HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); HAL_NVIC_SetPriority(self->irq, UART_IRQPRI, UART_IRQSUB_PRI); -- cgit v1.2.3 From 14b70806a5aacd3a5346940e6a07d32464d73506 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 11 Nov 2019 15:47:47 -0500 Subject: de-init check --- ports/stm32f4/common-hal/busio/UART.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 8e08fd3bd..c5e2edfa3 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -312,6 +312,8 @@ bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { } void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { + if(common_hal_busio_uart_deinited(self)) return; + reset_pin_number(self->tx->pin->port,self->tx->pin->number); reset_pin_number(self->rx->pin->port,self->rx->pin->number); self->tx = mp_const_none; -- cgit v1.2.3 From bbc366b85b3a29834def291805ca24c593f12915 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Tue, 12 Nov 2019 11:26:14 -0500 Subject: Style overhaul, extra error checks --- ports/stm32f4/common-hal/busio/UART.c | 391 ++++++++++++++++++----------- ports/stm32f4/common-hal/busio/UART.h | 9 +- ports/stm32f4/mpconfigport.h | 4 +- ports/stm32f4/peripherals/stm32f4/periph.h | 2 - ports/stm32f4/supervisor/port.c | 12 +- ports/stm32f4/tick.c | 4 - 6 files changed, 254 insertions(+), 168 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index c5e2edfa3..c4ab237cd 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Damien P. George + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -38,57 +38,26 @@ #include "tick.h" #include "stm32f4xx_hal.h" +#define ALL_UARTS 0xFFFF + STATIC bool reserved_uart[MAX_UART]; int errflag; //Used to restart read halts +STATIC void uart_clock_enable(uint16_t mask); +STATIC void uart_clock_disable(uint16_t mask); +STATIC void uart_assign_irq(busio_uart_obj_t* self, USART_TypeDef* USARTx); + void uart_reset(void) { - #ifdef USART1 - reserved_uart[0] = false; - MP_STATE_PORT(cpy_uart_obj_all)[0] = NULL; - __HAL_RCC_USART1_FORCE_RESET(); - __HAL_RCC_USART1_RELEASE_RESET(); - __HAL_RCC_USART1_CLK_DISABLE(); - #endif - #ifdef USART2 - reserved_uart[1] = false; - MP_STATE_PORT(cpy_uart_obj_all)[1] = NULL; - __HAL_RCC_USART2_FORCE_RESET(); - __HAL_RCC_USART2_RELEASE_RESET(); - __HAL_RCC_USART2_CLK_DISABLE(); - #endif - #ifdef USART3 - reserved_uart[2] = false; - MP_STATE_PORT(cpy_uart_obj_all)[2] = NULL; - __HAL_RCC_USART3_FORCE_RESET(); - __HAL_RCC_USART3_RELEASE_RESET(); - __HAL_RCC_USART3_CLK_DISABLE(); - #endif - #ifdef UART4 - reserved_uart[3] = false; - MP_STATE_PORT(cpy_uart_obj_all)[3] = NULL; - __HAL_RCC_UART4_FORCE_RESET(); - __HAL_RCC_UART4_RELEASE_RESET(); - __HAL_RCC_UART4_CLK_DISABLE(); - #endif - #ifdef UART5 - reserved_uart[4] = false; - MP_STATE_PORT(cpy_uart_obj_all)[4] = NULL; - __HAL_RCC_UART5_FORCE_RESET(); - __HAL_RCC_UART5_RELEASE_RESET(); - __HAL_RCC_UART5_CLK_DISABLE(); - #endif - #ifdef USART6 - reserved_uart[5] = false; - MP_STATE_PORT(cpy_uart_obj_all)[5] = NULL; - __HAL_RCC_USART6_FORCE_RESET(); - __HAL_RCC_USART6_RELEASE_RESET(); - __HAL_RCC_USART6_CLK_DISABLE(); - #endif + for (uint8_t i = 0; i < MAX_UART; i++) { + reserved_uart[i] = false; + MP_STATE_PORT(cpy_uart_obj_all)[i] = NULL; + } + uart_clock_disable(ALL_UARTS); } -STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t *self, bool pin_eval, +STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t* self, bool pin_eval, int uart_index, bool uart_taken) { - if(pin_eval) { + if (pin_eval) { //assign a root pointer pointer for IRQ MP_STATE_PORT(cpy_uart_obj_all)[uart_index] = self; return mcu_uart_banks[uart_index]; @@ -101,66 +70,8 @@ STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t *self, bool pin_eva } } - -STATIC void uart_clk_irq_enable(busio_uart_obj_t *self, USART_TypeDef * USARTx) { - #ifdef USART1 - if(USARTx==USART1) { - reserved_uart[0] = true; - __HAL_RCC_USART1_FORCE_RESET(); - __HAL_RCC_USART1_RELEASE_RESET(); - __HAL_RCC_USART1_CLK_ENABLE(); - self->irq = USART1_IRQn; - } - #endif - #ifdef USART2 - if(USARTx==USART2) { - reserved_uart[1] = true; - __HAL_RCC_USART2_FORCE_RESET(); - __HAL_RCC_USART2_RELEASE_RESET(); - __HAL_RCC_USART2_CLK_ENABLE(); - self->irq = USART2_IRQn; - } - #endif - #ifdef USART3 - if(USARTx==USART3) { - reserved_uart[2] = true; - __HAL_RCC_USART3_FORCE_RESET(); - __HAL_RCC_USART3_RELEASE_RESET(); - __HAL_RCC_USART3_CLK_ENABLE(); - self->irq = USART3_IRQn; - } - #endif - #ifdef UART4 - if(USARTx==UART4) { - reserved_uart[3] = true; - __HAL_RCC_UART4_FORCE_RESET(); - __HAL_RCC_UART4_RELEASE_RESET(); - __HAL_RCC_UART4_CLK_ENABLE(); - self->irq = UART4_IRQn; - } - #endif - #ifdef UART5 - if(USARTx==UART5) { - reserved_uart[4] = true; - __HAL_RCC_UART5_FORCE_RESET(); - __HAL_RCC_UART5_RELEASE_RESET(); - __HAL_RCC_UART5_CLK_ENABLE(); - self->irq = UART5_IRQn; - } - #endif - #ifdef USART6 - if(USARTx==USART6) { - reserved_uart[5] = true; - __HAL_RCC_USART6_FORCE_RESET(); - __HAL_RCC_USART6_RELEASE_RESET(); - __HAL_RCC_USART6_CLK_ENABLE(); - self->irq = USART6_IRQn; - } - #endif -} - -void common_hal_busio_uart_construct(busio_uart_obj_t *self, - const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, +void common_hal_busio_uart_construct(busio_uart_obj_t* self, + const mcu_pin_obj_t* tx, const mcu_pin_obj_t* rx, uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size) { @@ -170,18 +81,19 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, uint8_t tx_len = sizeof(mcu_uart_tx_list)/sizeof(*mcu_uart_tx_list); uint8_t rx_len = sizeof(mcu_uart_rx_list)/sizeof(*mcu_uart_rx_list); bool uart_taken = false; + uint8_t uart_index = 0; //origin 0 corrected //Can have both pins, or either if ((tx != mp_const_none) && (rx != mp_const_none)) { //normal find loop if both pins exist - for(uint i=0; itx!=NULL && self->rx!=NULL), - self->tx->uart_index-1, uart_taken); - } else if (tx==mp_const_none) { + uart_index = self->tx->uart_index - 1; + USARTx = assign_uart_or_throw(self, (self->tx != NULL && self->rx != NULL), + uart_index, uart_taken); + } else if (tx == mp_const_none) { //If there is no tx, run only rx - for(uint i=0; irx!=NULL), - self->rx->uart_index-1, uart_taken); - } else if (rx==mp_const_none) { + uart_index = self->rx->uart_index - 1; + USARTx = assign_uart_or_throw(self, (self->rx != NULL), + uart_index, uart_taken); + } else if (rx == mp_const_none) { //If there is no rx, run only tx - for(uint i=0; itx!=NULL), - (self->tx->uart_index-1), uart_taken); + uart_index = self->tx->uart_index - 1; + USARTx = assign_uart_or_throw(self, (self->tx != NULL), + uart_index, uart_taken); } else { //both pins cannot be empty mp_raise_ValueError(translate("Supply at least one UART pin")); @@ -239,10 +154,13 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if ( bits != 8 && bits != 9 ) { mp_raise_ValueError(translate("Invalid word/bit length")); } + if ( USARTx == NULL) { //this can only be hit if the periph file is wrong + mp_raise_ValueError(translate("Internal define error")); + } //GPIO Init GPIO_InitTypeDef GPIO_InitStruct = {0}; - if (self->tx!=NULL) { + if (self->tx != NULL) { GPIO_InitStruct.Pin = pin_mask(tx->number); GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_PULLUP; @@ -250,7 +168,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, GPIO_InitStruct.Alternate = self->tx->altfn_index; HAL_GPIO_Init(pin_port(tx->port), &GPIO_InitStruct); } - if (self->rx!=NULL) { + if (self->rx != NULL) { GPIO_InitStruct.Pin = pin_mask(rx->number); GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_PULLUP; @@ -259,14 +177,17 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, HAL_GPIO_Init(pin_port(rx->port), &GPIO_InitStruct); } - uart_clk_irq_enable(self,USARTx); + //reserve uart and enable the peripheral + reserved_uart[uart_index] = true; + uart_clock_enable(1 << (uart_index)); + uart_assign_irq(self, USARTx); self->handle.Instance = USARTx; self->handle.Init.BaudRate = baudrate; self->handle.Init.WordLength = (bits == 9) ? UART_WORDLENGTH_9B : UART_WORDLENGTH_8B; - self->handle.Init.StopBits = (stop>1) ? UART_STOPBITS_2 : UART_STOPBITS_1; - self->handle.Init.Parity = (parity==PARITY_ODD) ? UART_PARITY_ODD : - (parity==PARITY_EVEN) ? UART_PARITY_EVEN : + self->handle.Init.StopBits = (stop > 1) ? UART_STOPBITS_2 : UART_STOPBITS_1; + self->handle.Init.Parity = (parity == PARITY_ODD) ? UART_PARITY_ODD : + (parity == PARITY_EVEN) ? UART_PARITY_EVEN : UART_PARITY_NONE; self->handle.Init.Mode = (self->tx != NULL && self->rx != NULL) ? UART_MODE_TX_RX : (self->tx != NULL) ? UART_MODE_TX : @@ -312,7 +233,7 @@ bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { } void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { - if(common_hal_busio_uart_deinited(self)) return; + if (common_hal_busio_uart_deinited(self)) return; reset_pin_number(self->tx->pin->port,self->tx->pin->number); reset_pin_number(self->rx->pin->port,self->rx->pin->number); @@ -335,7 +256,7 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t while ( (ringbuf_count(&self->rbuf) < len) && (ticks_ms - start_ticks < self->timeout_ms) ) { RUN_BACKGROUND_TASKS; //restart if it failed in the callback - if(errflag != HAL_OK) { + if (errflag != HAL_OK) { errflag = HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); } // Allow user to break out of a timeout with a KeyboardInterrupt. @@ -348,10 +269,8 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t HAL_NVIC_DisableIRQ(self->irq); // copy received data rx_bytes = ringbuf_count(&self->rbuf); - //Used for debugging - //mp_printf(&mp_plat_print, "Read: count:%d, buffer location%p, er:%d\n", rx_bytes, &self->rbuf,errflag); rx_bytes = MIN(rx_bytes, len); - for ( uint16_t i = 0; i < rx_bytes; i++ ) { + for (uint16_t i = 0; i < rx_bytes; i++) { data[i] = ringbuf_get(&self->rbuf); } HAL_NVIC_EnableIRQ(self->irq); @@ -368,28 +287,27 @@ size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, if (self->tx == NULL) { mp_raise_ValueError(translate("No TX pin")); } + bool write_err = false; //write error shouldn't disable interrupts HAL_NVIC_DisableIRQ(self->irq); - - if (HAL_UART_Transmit(&self->handle, (uint8_t *)data, len, self->timeout_ms) != HAL_OK) { - mp_raise_ValueError(translate("UART write error")); + if (HAL_UART_Transmit(&self->handle, (uint8_t*)data, len, self->timeout_ms) != HAL_OK) { + write_err = true; } - HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); - HAL_NVIC_SetPriority(self->irq, UART_IRQPRI, UART_IRQSUB_PRI); HAL_NVIC_EnableIRQ(self->irq); + if (write_err) mp_raise_ValueError(translate("UART write error")); return len; } void HAL_UART_RxCpltCallback(UART_HandleTypeDef *handle) { - for(int i=0; i<7; i++) { + for (int i = 0; i < 7; i++) { //get context pointer and cast it as struct pointer - busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[i]; - if(handle == &context->handle) { + busio_uart_obj_t * context = (busio_uart_obj_t*)MP_STATE_PORT(cpy_uart_obj_all)[i]; + if (handle == &context->handle) { //check if transaction is ongoing - if((HAL_UART_GetState(handle) & HAL_UART_STATE_BUSY_RX) == HAL_UART_STATE_BUSY_RX) { + if ((HAL_UART_GetState(handle) & HAL_UART_STATE_BUSY_RX) == HAL_UART_STATE_BUSY_RX) { return; } ringbuf_put_n(&context->rbuf, &context->rx_char, 1); @@ -412,9 +330,9 @@ void HAL_UART_ErrorCallback(UART_HandleTypeDef *UartHandle) __HAL_UART_CLEAR_OREFLAG(UartHandle); } //restart serial read after an error - for(int i=0; i<7; i++) { + for (int i = 0; i < 7; i++) { busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[i]; - if(UartHandle == &context->handle) { + if (UartHandle == &context->handle) { HAL_UART_Receive_IT(UartHandle, &context->rx_char, 1); return; } @@ -431,11 +349,11 @@ void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrat if (baudrate == self->baudrate) return; //Otherwise de-init and set new rate - if(HAL_UART_DeInit(&self->handle) != HAL_OK) { + if (HAL_UART_DeInit(&self->handle) != HAL_OK) { mp_raise_ValueError(translate("UART De-init error")); } self->handle.Init.BaudRate = baudrate; - if(HAL_UART_Init(&self->handle) != HAL_OK) { + if (HAL_UART_Init(&self->handle) != HAL_OK) { mp_raise_ValueError(translate("UART Re-init error")); } @@ -454,13 +372,13 @@ void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { } bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { - return __HAL_UART_GET_FLAG(&self->handle,UART_FLAG_TXE); + return __HAL_UART_GET_FLAG(&self->handle, UART_FLAG_TXE); } STATIC void call_hal_irq(int uart_num) { //Create casted context pointer - busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[uart_num-1]; - if(context != NULL) { + busio_uart_obj_t * context = (busio_uart_obj_t*)MP_STATE_PORT(cpy_uart_obj_all)[uart_num - 1]; + if (context != NULL) { HAL_NVIC_ClearPendingIRQ(context->irq); HAL_UART_IRQHandler(&context->handle); } @@ -490,3 +408,182 @@ void UART5_IRQHandler(void) { void USART6_IRQHandler(void) { call_hal_irq(6); } + +STATIC void uart_clock_enable(uint16_t mask) { + #ifdef USART1 + if (mask & (1 << 0)) { + __HAL_RCC_USART1_FORCE_RESET(); + __HAL_RCC_USART1_RELEASE_RESET(); + __HAL_RCC_USART1_CLK_ENABLE(); + } + #endif + #ifdef USART2 + if (mask & (1 << 1)) { + __HAL_RCC_USART2_FORCE_RESET(); + __HAL_RCC_USART2_RELEASE_RESET(); + __HAL_RCC_USART2_CLK_ENABLE(); + } + #endif + #ifdef USART3 + if (mask & (1 << 2)) { + __HAL_RCC_USART3_FORCE_RESET(); + __HAL_RCC_USART3_RELEASE_RESET(); + __HAL_RCC_USART3_CLK_ENABLE(); + } + #endif + #ifdef UART4 + if (mask & (1 << 3)) { + __HAL_RCC_UART4_FORCE_RESET(); + __HAL_RCC_UART4_RELEASE_RESET(); + __HAL_RCC_UART4_CLK_ENABLE(); + } + #endif + #ifdef UART5 + if (mask & (1 << 4)) { + __HAL_RCC_UART5_FORCE_RESET(); + __HAL_RCC_UART5_RELEASE_RESET(); + __HAL_RCC_UART5_CLK_ENABLE(); + } + #endif + #ifdef USART6 + if (mask & (1 << 5)) { + __HAL_RCC_USART6_FORCE_RESET(); + __HAL_RCC_USART6_RELEASE_RESET(); + __HAL_RCC_USART6_CLK_ENABLE(); + } + #endif + #ifdef UART7 + if (mask & (1 << 6)) { + __HAL_RCC_UART7_FORCE_RESET(); + __HAL_RCC_UART7_RELEASE_RESET(); + __HAL_RCC_UART7_CLK_ENABLE(); + } + #endif + #ifdef UART8 + if (mask & (1 << 7)) { + __HAL_RCC_UART8_FORCE_RESET(); + __HAL_RCC_UART8_RELEASE_RESET(); + __HAL_RCC_UART8_CLK_ENABLE(); + } + #endif + #ifdef UART9 + if (mask & (1 << 8)) { + __HAL_RCC_UART9_FORCE_RESET(); + __HAL_RCC_UART9_RELEASE_RESET(); + __HAL_RCC_UART9_CLK_ENABLE(); + } + #endif + #ifdef UART10 + if (mask & (1 << 9)) { + __HAL_RCC_UART10_FORCE_RESET(); + __HAL_RCC_UART10_RELEASE_RESET(); + __HAL_RCC_UART10_CLK_ENABLE(); + } + #endif +} + +STATIC void uart_clock_disable(uint16_t mask) { + #ifdef USART1 + if (mask & (1 << 0)) { + __HAL_RCC_USART1_FORCE_RESET(); + __HAL_RCC_USART1_RELEASE_RESET(); + __HAL_RCC_USART1_CLK_DISABLE(); + } + #endif + #ifdef USART2 + if (mask & (1 << 1)) { + __HAL_RCC_USART2_FORCE_RESET(); + __HAL_RCC_USART2_RELEASE_RESET(); + __HAL_RCC_USART2_CLK_DISABLE(); + } + #endif + #ifdef USART3 + if (mask & (1 << 2)) { + __HAL_RCC_USART3_FORCE_RESET(); + __HAL_RCC_USART3_RELEASE_RESET(); + __HAL_RCC_USART3_CLK_DISABLE(); + } + #endif + #ifdef UART4 + if (mask & (1 << 3)) { + __HAL_RCC_UART4_FORCE_RESET(); + __HAL_RCC_UART4_RELEASE_RESET(); + __HAL_RCC_UART4_CLK_DISABLE(); + } + #endif + #ifdef UART5 + if (mask & (1 << 4)) { + __HAL_RCC_UART5_FORCE_RESET(); + __HAL_RCC_UART5_RELEASE_RESET(); + __HAL_RCC_UART5_CLK_DISABLE(); + } + #endif + #ifdef USART6 + if (mask & (1 << 5)) { + __HAL_RCC_USART6_FORCE_RESET(); + __HAL_RCC_USART6_RELEASE_RESET(); + __HAL_RCC_USART6_CLK_DISABLE(); + } + #endif + #ifdef UART7 + if (mask & (1 << 6)) { + __HAL_RCC_UART7_FORCE_RESET(); + __HAL_RCC_UART7_RELEASE_RESET(); + __HAL_RCC_UART7_CLK_DISABLE(); + } + #endif + #ifdef UART8 + if (mask & (1 << 7)) { + __HAL_RCC_UART8_FORCE_RESET(); + __HAL_RCC_UART8_RELEASE_RESET(); + __HAL_RCC_UART8_CLK_DISABLE(); + } + #endif + #ifdef UART9 + if (mask & (1 << 8)) { + __HAL_RCC_UART9_FORCE_RESET(); + __HAL_RCC_UART9_RELEASE_RESET(); + __HAL_RCC_UART9_CLK_DISABLE(); + } + #endif + #ifdef UART10 + if (mask & (1 << 9)) { + __HAL_RCC_UART10_FORCE_RESET(); + __HAL_RCC_UART10_RELEASE_RESET(); + __HAL_RCC_UART10_CLK_DISABLE(); + } + #endif +} + +STATIC void uart_assign_irq(busio_uart_obj_t *self, USART_TypeDef * USARTx) { + #ifdef USART1 + if (USARTx == USART1) self->irq = USART1_IRQn; + #endif + #ifdef USART2 + if (USARTx == USART2) self->irq = USART2_IRQn; + #endif + #ifdef USART3 + if (USARTx == USART3) self->irq = USART3_IRQn; + #endif + #ifdef UART4 + if (USARTx == UART4) self->irq = UART4_IRQn; + #endif + #ifdef UART5 + if (USARTx == UART5) self->irq = UART5_IRQn; + #endif + #ifdef USART6 + if (USARTx == USART6) self->irq = USART6_IRQn; + #endif + #ifdef UART7 + if (USARTx == UART7) self->irq = UART7_IRQn; + #endif + #ifdef UART8 + if (USARTx == UART8) self->irq = UART8_IRQn; + #endif + #ifdef UART9 + if (USARTx == UART9) self->irq = UART9_IRQn; + #endif + #ifdef UART10 + if (USARTx == UART10) self->irq = UART10_IRQn; + #endif +} diff --git a/ports/stm32f4/common-hal/busio/UART.h b/ports/stm32f4/common-hal/busio/UART.h index 467030598..cde5fadd0 100644 --- a/ports/stm32f4/common-hal/busio/UART.h +++ b/ports/stm32f4/common-hal/busio/UART.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -57,11 +57,4 @@ typedef struct { void uart_reset(void); -void USART1_IRQHandler(void); -void USART2_IRQHandler(void); -void USART3_IRQHandler(void); -void UART4_IRQHandler(void); -void UART5_IRQHandler(void); -void USART6_IRQHandler(void); -// void UART_IRQHandler(void); #endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_UART_H diff --git a/ports/stm32f4/mpconfigport.h b/ports/stm32f4/mpconfigport.h index 6d9fe4376..7737bda8d 100644 --- a/ports/stm32f4/mpconfigport.h +++ b/ports/stm32f4/mpconfigport.h @@ -39,8 +39,10 @@ #include "py/circuitpy_mpconfig.h" +#define MAX_UART 10 //how many UART are implemented + #define MICROPY_PORT_ROOT_POINTERS \ - void *cpy_uart_obj_all[6]; \ + void *cpy_uart_obj_all[MAX_UART]; \ CIRCUITPY_COMMON_ROOT_POINTERS #endif // __INCLUDED_MPCONFIGPORT_H diff --git a/ports/stm32f4/peripherals/stm32f4/periph.h b/ports/stm32f4/peripherals/stm32f4/periph.h index 990cf0533..4b00ce1d9 100644 --- a/ports/stm32f4/peripherals/stm32f4/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/periph.h @@ -33,8 +33,6 @@ #include "stm32f4xx_hal.h" #include "stm32f4/pins.h" -#define MAX_UART 6 //how many UART are implemented - // I2C // TODO: these objects should be condensed into a single 'periph_pin' unless we // find a compelling reason to store more unique data in them. diff --git a/ports/stm32f4/supervisor/port.c b/ports/stm32f4/supervisor/port.c index 8f27c5ad2..df5a70cd1 100644 --- a/ports/stm32f4/supervisor/port.c +++ b/ports/stm32f4/supervisor/port.c @@ -42,12 +42,12 @@ #include "stm32f4xx_hal.h" safe_mode_t port_init(void) { - HAL_Init(); + HAL_Init(); __HAL_RCC_SYSCFG_CLK_ENABLE(); __HAL_RCC_PWR_CLK_ENABLE(); - stm32f4_peripherals_clocks_init(); - stm32f4_peripherals_gpio_init(); + stm32f4_peripherals_clocks_init(); + stm32f4_peripherals_gpio_init(); tick_init(); board_init(); @@ -56,7 +56,7 @@ safe_mode_t port_init(void) { } void reset_port(void) { - reset_all_pins(); + reset_all_pins(); i2c_reset(); spi_reset(); uart_reset(); @@ -68,7 +68,7 @@ void reset_to_bootloader(void) { } void reset_cpu(void) { - NVIC_SystemReset(); + NVIC_SystemReset(); } uint32_t *port_stack_get_limit(void) { @@ -90,7 +90,7 @@ uint32_t port_get_saved_word(void) { } void HardFault_Handler(void) { - reset_into_safe_mode(HARD_CRASH); + reset_into_safe_mode(HARD_CRASH); while (true) { asm("nop;"); } diff --git a/ports/stm32f4/tick.c b/ports/stm32f4/tick.c index 110af52b6..688f71dbd 100644 --- a/ports/stm32f4/tick.c +++ b/ports/stm32f4/tick.c @@ -64,10 +64,6 @@ void tick_init() { SysTick_Config(ticks_per_ms); // interrupt is enabled NVIC_EnableIRQ(SysTick_IRQn); - // Set all peripheral interrupt priorities to the lowest priority by default. - // for (uint16_t i = 0; i < PERIPH_COUNT_IRQn; i++) { - // NVIC_SetPriority(i, (1UL << __NVIC_PRIO_BITS) - 1UL); - // } // Bump up the systick interrupt so nothing else interferes with timekeeping. NVIC_SetPriority(SysTick_IRQn, 0); NVIC_SetPriority(OTG_FS_IRQn, 1); -- cgit v1.2.3 From e40bd07fcff59a2871fc30b803c1cfa640fa5220 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Tue, 12 Nov 2019 13:03:13 -0500 Subject: fix conflicting definitions on discovery boards --- ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h | 2 +- ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h | 2 +- ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c | 4 ++-- ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h index c75562398..e87e79857 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h @@ -43,7 +43,7 @@ extern const mcu_spi_nss_obj_t mcu_spi_nss_list[6]; //UART extern USART_TypeDef * mcu_uart_banks[MAX_UART]; -bool mcu_uart_has_usart[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; extern const mcu_uart_tx_obj_t mcu_uart_tx_list[12]; extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h index dda68f40e..d657d73b6 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h @@ -43,7 +43,7 @@ extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; //UART extern USART_TypeDef * mcu_uart_banks[MAX_UART]; -bool mcu_uart_has_usart[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; extern const mcu_uart_tx_obj_t mcu_uart_tx_list[7]; extern const mcu_uart_rx_obj_t mcu_uart_rx_list[7]; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c index 19ef806dd..f5effa80e 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c @@ -122,8 +122,8 @@ const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { //UART -USART_TypeDef * mcu_uart_banks[6] = {USART1, USART2, USART3, NULL, NULL, USART6}; -bool mcu_uart_has_usart[6] = {true, true, true, false, false, true}; +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, NULL, NULL, USART6}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true}; const mcu_uart_tx_obj_t mcu_uart_tx_list[11] = { UART(2, 7, &pin_PA02), diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h index 7a3eaa66e..e0141e6da 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h @@ -44,7 +44,7 @@ extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; //UART extern USART_TypeDef * mcu_uart_banks[MAX_UART]; -bool mcu_uart_has_usart[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; extern const mcu_uart_tx_obj_t mcu_uart_tx_list[11]; extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; -- cgit v1.2.3