From 947c2243bdc88fed001723939ed6f91851236e8d Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 29 Jan 2020 15:30:35 -0500 Subject: add feather bootloader settings, cleanup --- ports/stm32f4/boards/STM32F401.ld | 132 --------------------- ports/stm32f4/boards/STM32F401_boot.ld | 6 +- ports/stm32f4/boards/STM32F405.ld | 108 ----------------- ports/stm32f4/boards/STM32F405_boot.ld | 108 +++++++++++++++++ ports/stm32f4/boards/STM32F405_fs.ld | 108 +++++++++++++++++ .../feather_stm32f405_express/mpconfigboard.h | 3 + .../feather_stm32f405_express/mpconfigboard.mk | 7 +- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 2 +- 8 files changed, 227 insertions(+), 247 deletions(-) delete mode 100644 ports/stm32f4/boards/STM32F401.ld delete mode 100644 ports/stm32f4/boards/STM32F405.ld create mode 100644 ports/stm32f4/boards/STM32F405_boot.ld create mode 100644 ports/stm32f4/boards/STM32F405_fs.ld diff --git a/ports/stm32f4/boards/STM32F401.ld b/ports/stm32f4/boards/STM32F401.ld deleted file mode 100644 index bf1f21cf6..000000000 --- a/ports/stm32f4/boards/STM32F401.ld +++ /dev/null @@ -1,132 +0,0 @@ -/* - GNU linker script for STM32F401 with bootloader (from Meowbit Micropython) - Doesn't work: - - Traceback (most recent call last): - File "../../tools/build_memory_info.py", line 64, in - regions[region] = int(eval(space)) - File "", line 1, in -NameError: name 'FLASH_ISR' is not defined -*/ - -/* Specify the memory areas */ -/* FLASH_FS (rx) : ORIGIN = 0x08020000, LENGTH = 128K */ -/* sectors 5 128K */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4, sec 0~3 reserved for booloader */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5, 6,7 are 128K */ - RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define the stack. The stack is full descending so begins just above last byte - of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve; -_sstack = _estack - 16K; /* tunable */ - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = _sstack; - -ENTRY(Reset_Handler) - -/* define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - - /* This first flash block is 16K annd the isr vectors only take up - about 400 bytes. So we pull in a couple of object files to pad it - out. */ - - . = ALIGN(4); - - /* NOTE: If you update the list of files contained in .isr_vector, - then be sure to also update smhal/Makefile where it forcibly - builds each of these files with -Os */ - - */ff.o(.text*) - */vfs_fat_*.o(.text*) - */py/formatfloat.o(.text*) - */py/parsenum.o(.text*) - */py/mpprint.o(.text*) - - */py/compile.o(.text*) - */py/objset.o(.text*) - */py/mpz.o(.text*) - */py/vm.o(.text*) - - . = ALIGN(4); - } >FLASH_ISR - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text*) /* .text* sections (code) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - /* *(.glue_7) */ /* glue arm to thumb code */ - /* *(.glue_7t) */ /* glue thumb to arm code */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - } >FLASH_TEXT - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM AT> FLASH_TEXT - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ - } >RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - . = . + _minimum_heap_size; - . = ALIGN(4); - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/stm32f4/boards/STM32F401_boot.ld b/ports/stm32f4/boards/STM32F401_boot.ld index ffdd7097c..125d785fc 100644 --- a/ports/stm32f4/boards/STM32F401_boot.ld +++ b/ports/stm32f4/boards/STM32F401_boot.ld @@ -5,9 +5,9 @@ /* Specify the memory areas */ MEMORY { - FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash, sans bootloader region */ + FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4 */ + FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5,6,7 are 128K */ RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 } diff --git a/ports/stm32f4/boards/STM32F405.ld b/ports/stm32f4/boards/STM32F405.ld deleted file mode 100644 index 7f7c91784..000000000 --- a/ports/stm32f4/boards/STM32F405.ld +++ /dev/null @@ -1,108 +0,0 @@ -/* - GNU linker script for STM32F405 via Micropython -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ - FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */ - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); - -ENTRY(Reset_Handler) - -/* define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - - /* This first flash block is 16K annd the isr vectors only take up - about 400 bytes. Micropython pads this with files, but this didn't - work with the size of Circuitpython's ff object. */ - - . = ALIGN(4); - } >FLASH_ISR - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text*) /* .text* sections (code) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - /* *(.glue_7) */ /* glue arm to thumb code */ - /* *(.glue_7t) */ /* glue thumb to arm code */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - } >FLASH_TEXT - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM AT> FLASH_TEXT - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ - } >RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - . = . + _minimum_heap_size; - . = ALIGN(4); - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} - - diff --git a/ports/stm32f4/boards/STM32F405_boot.ld b/ports/stm32f4/boards/STM32F405_boot.ld new file mode 100644 index 000000000..cff2af388 --- /dev/null +++ b/ports/stm32f4/boards/STM32F405_boot.ld @@ -0,0 +1,108 @@ +/* + GNU linker script for STM32F405 with bootloader + Based on Micropython +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 1024K - 64K /* entire flash, sans bootloader region */ + FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 0 */ + FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 1024K - 64K - 64K /* sectors 5+ */ + CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/STM32F405_fs.ld b/ports/stm32f4/boards/STM32F405_fs.ld new file mode 100644 index 000000000..7f7c91784 --- /dev/null +++ b/ports/stm32f4/boards/STM32F405_fs.ld @@ -0,0 +1,108 @@ +/* + GNU linker script for STM32F405 via Micropython +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h index a1d83a25a..fb98397a9 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h @@ -40,6 +40,9 @@ #define SPI_FLASH_SCK_PIN (&pin_PB03) #define SPI_FLASH_CS_PIN (&pin_PA15) +// Bootloader only +#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader + #define DEFAULT_I2C_BUS_SCL (&pin_PB06) #define DEFAULT_I2C_BUS_SDA (&pin_PB07) diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk index 5bad4e81f..4fa59d70f 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk @@ -9,11 +9,12 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = GD25Q16C LONGINT_IMPL = MPZ +BOOTLOADER_OFFSET = 0x8010000 + MCU_SERIES = m4 MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f405xx MCU_PACKAGE = 64 CMSIS_MCU = STM32F405xx -LD_FILE = boards/STM32F405.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08010000 \ No newline at end of file +LD_FILE = boards/STM32F405_boot.ld # use for bootloader (external fs only) +# LD_FILE = boards/STM32F405_fs.ld # use for internal filesystem \ No newline at end of file diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index 340fd9d3b..8c24222f3 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -20,4 +20,4 @@ MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE LD_FILE = boards/STM32F401_boot.ld -# LD_FILE = boards/STM32F401_fs.ld #use for internal flash \ No newline at end of file +# LD_FILE = boards/STM32F401_fs.ld # use for internal flash \ No newline at end of file -- cgit v1.2.3 From b4dcecb266bd1aba0a94d11ac6d8a044f6822b69 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 31 Jan 2020 13:12:58 -0500 Subject: Add build option for UF2 flash offset --- ports/stm32f4/Makefile | 49 ++++++++++++++-------- .../feather_stm32f405_express/mpconfigboard.h | 4 +- .../feather_stm32f405_express/mpconfigboard.mk | 8 ++-- ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk | 3 +- .../boards/stm32f411ce_blackpill/mpconfigboard.mk | 3 +- .../boards/stm32f411ve_discovery/mpconfigboard.mk | 2 - .../boards/stm32f412zg_discovery/mpconfigboard.mk | 3 +- 7 files changed, 41 insertions(+), 31 deletions(-) diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index ccadeac8a..082d05039 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -26,11 +26,11 @@ # Select the board to build for. ifeq ($(BOARD),) - $(error You must provide a BOARD parameter) + $(error You must provide a BOARD parameter) else - ifeq ($(wildcard boards/$(BOARD)/.),) - $(error Invalid BOARD specified) - endif + ifeq ($(wildcard boards/$(BOARD)/.),) + $(error Invalid BOARD specified) + endif endif # If the build directory is not given, make it reflect the board name. @@ -80,19 +80,16 @@ INC += -I../../supervisor/shared/usb #Debugging/Optimization ifeq ($(DEBUG), 1) - CFLAGS += -ggdb - # You may want to enable these flags to make setting breakpoints easier. - CFLAGS += -fno-inline -fno-ipa-sra + CFLAGS += -ggdb + # You may want to enable these flags to make setting breakpoints easier. + CFLAGS += -fno-inline -fno-ipa-sra else - CFLAGS += -Os -DNDEBUG - CFLAGS += -ggdb - # TODO: Test with -flto - ### CFLAGS += -flto + CFLAGS += -Os -DNDEBUG + CFLAGS += -ggdb + # TODO: Test with -flto + ### CFLAGS += -flto endif -ifndef BOOTLOADER_OFFSET - BOOTLOADER_OFFSET := 0x8000000 -endif C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(CMSIS_MCU) @@ -115,6 +112,22 @@ CFLAGS += \ # TODO: check this CFLAGS += -D__START=main +#need both command and valid file to use uf2 bootloader +ifndef LD_FILE + ifneq ($(and $(UF2_BOOTLOADER),$(LD_BOOT)),) + LD_FILE = $(LD_BOOT) + BOOTLOADER_OFFSET = $(UF2_OFFSET) + CFLAGS += -DUF2_BOOTLOADER_ENABLED + else + LD_FILE = $(LD_FS) + endif +endif + +# Add bootloader specific items +ifndef BOOTLOADER_OFFSET + BOOTLOADER_OFFSET := 0x8000000 +endif + LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs LIBS := -lgcc -lc @@ -210,12 +223,12 @@ SRC_S = \ boards/startup_$(MCU_SUB_VARIANT).s SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ - $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ - $(addprefix common-hal/, $(SRC_COMMON_HAL)) + $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ + $(addprefix common-hal/, $(SRC_COMMON_HAL)) SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ - $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \ - $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL)) + $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL)) ifneq ($(FROZEN_MPY_DIR),) diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h index fb98397a9..ad9bba7b0 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h @@ -41,7 +41,9 @@ #define SPI_FLASH_CS_PIN (&pin_PA15) // Bootloader only -#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader +#ifdef UF2_BOOTLOADER_ENABLED + #define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader +#endif #define DEFAULT_I2C_BUS_SCL (&pin_PB06) #define DEFAULT_I2C_BUS_SDA (&pin_PB07) diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk index 4fa59d70f..95bc6c75e 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk @@ -9,12 +9,12 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = GD25Q16C LONGINT_IMPL = MPZ -BOOTLOADER_OFFSET = 0x8010000 - MCU_SERIES = m4 MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f405xx MCU_PACKAGE = 64 CMSIS_MCU = STM32F405xx -LD_FILE = boards/STM32F405_boot.ld # use for bootloader (external fs only) -# LD_FILE = boards/STM32F405_fs.ld # use for internal filesystem \ No newline at end of file + +LD_FS = boards/STM32F405_fs.ld # Default to internal FS +LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option +UF2_OFFSET = 0x8010000 diff --git a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk index a01ff7923..b83852c4c 100644 --- a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk +++ b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk @@ -13,5 +13,4 @@ MCU_SUB_VARIANT = stm32f405xx MCU_PACKAGE = 64 CMSIS_MCU = STM32F405xx LD_FILE = boards/STM32F405.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08010000 + diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk index d4f0f9577..68c6a1eea 100644 --- a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk @@ -18,5 +18,4 @@ MCU_SUB_VARIANT = stm32f411xe MCU_PACKAGE = 48 CMSIS_MCU = STM32F411xE LD_FILE = boards/STM32F411VETx_FLASH.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 + diff --git a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk index d6f369b6e..1f91bd8bc 100644 --- a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk @@ -13,5 +13,3 @@ MCU_SUB_VARIANT = stm32f411xe MCU_PACKAGE = 100 CMSIS_MCU = STM32F411xE LD_FILE = boards/STM32F411VETx_FLASH.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 \ No newline at end of file diff --git a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk index d642f243e..b0205fc73 100644 --- a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk @@ -18,6 +18,5 @@ MCU_SUB_VARIANT = stm32f412zx MCU_PACKAGE = 144 CMSIS_MCU = STM32F412Zx LD_FILE = boards/STM32F412ZGTx_FLASH.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 + -- cgit v1.2.3 From 7085d912786ffa5cd3919dcfcff2f37d247c3f30 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 31 Jan 2020 13:13:51 -0500 Subject: dangling edit --- ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk | 2 -- 1 file changed, 2 deletions(-) diff --git a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk index d46ee0b08..d761d9dbe 100644 --- a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk +++ b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk @@ -15,5 +15,3 @@ MCU_SUB_VARIANT = stm32f411xe MCU_PACKAGE = 48 CMSIS_MCU = STM32F411xE LD_FILE = boards/STM32F411VETx_FLASH.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 \ No newline at end of file -- cgit v1.2.3 From a10e5d1da2f0fa29c3588bda5c791ca47fbe53bd Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 31 Jan 2020 13:17:43 -0500 Subject: text fixes --- ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk | 1 + ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 3 ++- ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk | 1 + ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk | 1 + 4 files changed, 5 insertions(+), 1 deletion(-) diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk index 95bc6c75e..e7c5353b4 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk @@ -18,3 +18,4 @@ CMSIS_MCU = STM32F405xx LD_FS = boards/STM32F405_fs.ld # Default to internal FS LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option UF2_OFFSET = 0x8010000 + diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index 8c24222f3..dce69276d 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -20,4 +20,5 @@ MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE LD_FILE = boards/STM32F401_boot.ld -# LD_FILE = boards/STM32F401_fs.ld # use for internal flash \ No newline at end of file +# LD_FILE = boards/STM32F401_fs.ld # use for internal flash + diff --git a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk index d761d9dbe..a8472608b 100644 --- a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk +++ b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk @@ -15,3 +15,4 @@ MCU_SUB_VARIANT = stm32f411xe MCU_PACKAGE = 48 CMSIS_MCU = STM32F411xE LD_FILE = boards/STM32F411VETx_FLASH.ld + diff --git a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk index 1f91bd8bc..64e2b4dc5 100644 --- a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk @@ -13,3 +13,4 @@ MCU_SUB_VARIANT = stm32f411xe MCU_PACKAGE = 100 CMSIS_MCU = STM32F411xE LD_FILE = boards/STM32F411VETx_FLASH.ld + -- cgit v1.2.3 From f38e12f0abaf9a1a0ae84a0240958a27d99425ff Mon Sep 17 00:00:00 2001 From: hierophect Date: Fri, 31 Jan 2020 13:56:08 -0500 Subject: Update ports/stm32f4/boards/STM32F405_boot.ld Co-Authored-By: Scott Shawcroft --- ports/stm32f4/boards/STM32F405_boot.ld | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/ports/stm32f4/boards/STM32F405_boot.ld b/ports/stm32f4/boards/STM32F405_boot.ld index cff2af388..64da3b652 100644 --- a/ports/stm32f4/boards/STM32F405_boot.ld +++ b/ports/stm32f4/boards/STM32F405_boot.ld @@ -17,7 +17,7 @@ MEMORY _minimum_stack_size = 2K; _minimum_heap_size = 16K; -/* Define tho top end of the stack. The stack is full descending so begins just +/* Define the top end of the stack. The stack is full descending so begins just above last byte of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */ _estack = ORIGIN(RAM) + LENGTH(RAM); @@ -105,4 +105,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - -- cgit v1.2.3 From 41aefc819bd177865d7114d58a00e8b67cbd6cb1 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 31 Jan 2020 14:35:54 -0500 Subject: Fix pyboard --- ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk | 3 ++- ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk index e7c5353b4..3fc8581ef 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk @@ -15,7 +15,8 @@ MCU_SUB_VARIANT = stm32f405xx MCU_PACKAGE = 64 CMSIS_MCU = STM32F405xx -LD_FS = boards/STM32F405_fs.ld # Default to internal FS +# Default includes filesystem, but uses external flash +LD_FS = boards/STM32F405_fs.ld LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option UF2_OFFSET = 0x8010000 diff --git a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk index b83852c4c..ef1b8f0ca 100644 --- a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk +++ b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk @@ -12,5 +12,5 @@ MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f405xx MCU_PACKAGE = 64 CMSIS_MCU = STM32F405xx -LD_FILE = boards/STM32F405.ld +LD_FILE = boards/STM32F405_fs.ld -- cgit v1.2.3 From 3ce6fc89a4b5bb97edc8568d1cd41aed04635b94 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Tue, 4 Feb 2020 10:38:45 -0500 Subject: Implement new linker for external flash only --- ports/stm32f4/Makefile | 2 +- ports/stm32f4/boards/STM32F405_default.ld | 107 +++++++++++++++++++++ .../feather_stm32f405_express/mpconfigboard.mk | 2 +- 3 files changed, 109 insertions(+), 2 deletions(-) create mode 100644 ports/stm32f4/boards/STM32F405_default.ld diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index 082d05039..3a6191c85 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -119,7 +119,7 @@ ifndef LD_FILE BOOTLOADER_OFFSET = $(UF2_OFFSET) CFLAGS += -DUF2_BOOTLOADER_ENABLED else - LD_FILE = $(LD_FS) + LD_FILE = $(LD_DEFAULT) endif endif diff --git a/ports/stm32f4/boards/STM32F405_default.ld b/ports/stm32f4/boards/STM32F405_default.ld new file mode 100644 index 000000000..c2b8c843e --- /dev/null +++ b/ports/stm32f4/boards/STM32F405_default.ld @@ -0,0 +1,107 @@ +/* + GNU linker script for STM32F405 via Micropython +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 1008K /* sectors 0-7*/ + CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk index 3fc8581ef..312ca6b48 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk @@ -16,7 +16,7 @@ MCU_PACKAGE = 64 CMSIS_MCU = STM32F405xx # Default includes filesystem, but uses external flash -LD_FS = boards/STM32F405_fs.ld +LD_DEFAULT = boards/STM32F405_default.ld LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option UF2_OFFSET = 0x8010000 -- cgit v1.2.3