From f28673786871b65a3ce5f737ee33c8b3d8ea2098 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 25 Sep 2019 11:37:27 -0400 Subject: add peripheral definitions --- ports/stm32f4/common-hal/busio/SPI.c | 20 ++++- ports/stm32f4/peripherals/stm32f4/periph.h | 41 ++++++++- .../peripherals/stm32f4/stm32f412zx/periph.c | 97 +++++++++++++++++++--- .../peripherals/stm32f4/stm32f412zx/periph.h | 8 ++ 4 files changed, 148 insertions(+), 18 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index cde3e5372..589b4e818 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -31,10 +31,28 @@ #include "boards/board.h" #include "common-hal/microcontroller/Pin.h" +//mp_raise_NotImplementedError(translate("SPI not yet supported")); + void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) { - mp_raise_NotImplementedError(translate("SPI not yet supported")); + + hspi1.Instance = SPI1; + hspi1.Init.Mode = SPI_MODE_MASTER; + hspi1.Init.Direction = SPI_DIRECTION_2LINES; + hspi1.Init.DataSize = SPI_DATASIZE_8BIT; + hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; + hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; + hspi1.Init.NSS = SPI_NSS_HARD_OUTPUT; + hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi1.Init.TIMode = SPI_TIMODE_DISABLE; + hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + hspi1.Init.CRCPolynomial = 10; + if (HAL_SPI_Init(&hspi1) != HAL_OK) + { + Error_Handler(); + } } void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { diff --git a/ports/stm32f4/peripherals/stm32f4/periph.h b/ports/stm32f4/peripherals/stm32f4/periph.h index 2d5f944cb..9c3a3ffe8 100644 --- a/ports/stm32f4/peripherals/stm32f4/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/periph.h @@ -33,17 +33,17 @@ #include "stm32f4xx_hal.h" #include "stm32f4/pins.h" -// Address Version +// I2C + typedef struct { uint8_t i2c_index:4; // Index of the I2C unit (1 to 3) uint8_t altfn_index:4; //Index of the altfn for this pin (0 to 15) const mcu_pin_obj_t * pin; } mcu_i2c_sda_obj_t; -// Address Version typedef struct { - uint8_t i2c_index:4; // Index of the I2C unit (1 to 3) - uint8_t altfn_index:4; //Index of the altfn for this pin (0 to 15) + uint8_t i2c_index:4; + uint8_t altfn_index:4; const mcu_pin_obj_t * pin; } mcu_i2c_scl_obj_t; @@ -62,6 +62,39 @@ typedef struct { .pin = scl_pin, \ } +// SPI + +typedef struct { + uint8_t spi_index:4; //Up to 6 SPI units + uint8_t altfn_index:4; //Up to 15 alt channels + const mcu_pin_obj_t * pin; +} mcu_spi_sck_obj_t; + +typedef struct { + uint8_t spi_index:4; + uint8_t altfn_index:4; + const mcu_pin_obj_t * pin; +} mcu_spi_miso_obj_t; + +typedef struct { + uint8_t spi_index:4; + uint8_t altfn_index:4; + const mcu_pin_obj_t * pin; +} mcu_spi_mosi_obj_t; + +typedef struct { + uint8_t i2c_index:4; + uint8_t altfn_index:4; + const mcu_pin_obj_t * pin; +} mcu_spi_nss_obj_t; + +#define SPI(index, alt, spi_pin) \ +{ \ + .i2c_index = index, \ + .altfn_index = alt, \ + .pin = spi_pin, \ +} + // TODO: SPI, UART, etc // Choose based on chip diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c index 857a8039b..af243359f 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c @@ -34,20 +34,91 @@ I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; const mcu_i2c_sda_obj_t mcu_i2c_sda_list[8] = { - I2C_SDA(1, 4, &pin_PB07), - I2C_SDA(1, 4, &pin_PB09), - I2C_SDA(2, 4, &pin_PB11), //not on LQFP100 - I2C_SDA(2, 9, &pin_PB09), - I2C_SDA(2, 9, &pin_PB03), - I2C_SDA(3, 4, &pin_PC09), - I2C_SDA(3, 9, &pin_PB04), - I2C_SDA(3, 9, &pin_PB08) + I2C_SDA(1, 4, &pin_PB07), + I2C_SDA(1, 4, &pin_PB09), + I2C_SDA(2, 4, &pin_PB11), //not on LQFP100 + I2C_SDA(2, 9, &pin_PB09), + I2C_SDA(2, 9, &pin_PB03), + I2C_SDA(3, 4, &pin_PC09), + I2C_SDA(3, 9, &pin_PB04), + I2C_SDA(3, 9, &pin_PB08) }; const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { - I2C_SCL(1, 4, &pin_PB06), - I2C_SCL(1, 4, &pin_PB08), - I2C_SCL(2, 4, &pin_PB10), - I2C_SCL(3, 4, &pin_PA08) + I2C_SCL(1, 4, &pin_PB06), + I2C_SCL(1, 4, &pin_PB08), + I2C_SCL(2, 4, &pin_PB10), + I2C_SCL(3, 4, &pin_PA08) }; -//SPI, UART, Etc + +// SPI + +SPI_TypeDef * mcu_i2c_banks[3] = {SPI1, SPI2, SPI3, SPI4, SPI5}; + +const mcu_spi_sck_obj_t mcu_spi_sck_list[16] = { + SPI(1, 5, &pin_PA05), + SPI(5, 6, &pin_PB00), + SPI(1, 5, &pin_PB03), + SPI(3, 6, &pin_PB03), + SPI(2, 5, &pin_PB10), + SPI(5, 6, &pin_PB00), + SPI(3, 7, &pin_PB12), + SPI(2, 5, &pin_PB13), + SPI(4, 6, &pin_PB13), + SPI(2, 5, &pin_PC07), + SPI(3, 6, &pin_PC10), + SPI(2, 5, &pin_PD03), + SPI(4, 5, &pin_PE02), + SPI(5, 6, &pin_PE02), + SPI(4, 5, &pin_PE12), + SPI(5, 6, &pin_PE12), +}; + +const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14] = { + SPI(4, 5, &pin_PA01), + SPI(1, 5, &pin_PA07), + SPI(5, 6, &pin_PA10), + SPI(1, 5, &pin_PB05), + SPI(3, 6, &pin_PB05), + SPI(5, 6, &pin_PB08), + SPI(2, 5, &pin_PB15), + SPI(2, 5, &pin_PC03), + SPI(3, 6, &pin_PC12), + SPI(3, 5, &pin_PD06), + SPI(4, 5, &pin_PE06), + SPI(5, 6, &pin_PE06), + SPI(4, 5, &pin_PE14), + SPI(5, 6, &pin_PE14), +}; + +const mcu_spi_miso_obj_t mcu_spi_miso_list[12] = { + SPI(1, 5, &pin_PA06), + SPI(4, 6, &pin_PA11), + SPI(5, 6, &pin_PA12), + SPI(1, 5, &pin_PB04), + SPI(3, 6, &pin_PB04), + SPI(2, 5, &pin_PB14), + SPI(2, 5, &pin_PC02), + SPI(3, 6, &pin_PC11), + SPI(4, 5, &pin_PE05), + SPI(5, 6, &pin_PE05), + SPI(4, 5, &pin_PE13), + SPI(5, 6, &pin_PE13), +}; + +const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { + SPI(1, 5, &pin_PA04), + SPI(3, 6, &pin_PA04), + SPI(1, 5, &pin_PA15), + SPI(3, 6, &pin_PA15), + SPI(5, 6, &pin_PB01), + SPI(2, 5, &pin_PB09), + SPI(2, 5, &pin_PB12), + SPI(4, 6, &pin_PB12), + SPI(4, 5, &pin_PE04), + SPI(5, 6, &pin_PE04), + SPI(4, 5, &pin_PE11), + SPI(5, 6, &pin_PE11), +}; + +//UART, Etc diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h index f8eef043e..0514be311 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h @@ -34,4 +34,12 @@ extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[8]; extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; +//SPI +extern SPI_TypeDef * mcu_spi_banks[5]; + +extern const mcu_spi_sck_obj_t mcu_spi_sck_list[8]; +extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[4]; +extern const mcu_spi_miso_obj_t mcu_spi_miso_list[4]; +extern const mcu_spi_nss_obj_t mcu_spi_nss_list[4]; + #endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H \ No newline at end of file -- cgit v1.2.3 From a926d01509abd0b223efd95d6424e5be143a42c1 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 25 Sep 2019 11:53:49 -0400 Subject: reorganize pins --- ports/stm32f4/peripherals/stm32f4/periph.h | 6 +-- .../peripherals/stm32f4/stm32f412zx/periph.c | 48 +++++++++++----------- .../peripherals/stm32f4/stm32f412zx/periph.h | 8 ++-- 3 files changed, 31 insertions(+), 31 deletions(-) diff --git a/ports/stm32f4/peripherals/stm32f4/periph.h b/ports/stm32f4/peripherals/stm32f4/periph.h index 9c3a3ffe8..480f7aba2 100644 --- a/ports/stm32f4/peripherals/stm32f4/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/periph.h @@ -74,16 +74,16 @@ typedef struct { uint8_t spi_index:4; uint8_t altfn_index:4; const mcu_pin_obj_t * pin; -} mcu_spi_miso_obj_t; +} mcu_spi_mosi_obj_t; typedef struct { uint8_t spi_index:4; uint8_t altfn_index:4; const mcu_pin_obj_t * pin; -} mcu_spi_mosi_obj_t; +} mcu_spi_miso_obj_t; typedef struct { - uint8_t i2c_index:4; + uint8_t spi_index:4; uint8_t altfn_index:4; const mcu_pin_obj_t * pin; } mcu_spi_nss_obj_t; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c index af243359f..d31703158 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c @@ -57,68 +57,68 @@ SPI_TypeDef * mcu_i2c_banks[3] = {SPI1, SPI2, SPI3, SPI4, SPI5}; const mcu_spi_sck_obj_t mcu_spi_sck_list[16] = { SPI(1, 5, &pin_PA05), - SPI(5, 6, &pin_PB00), SPI(1, 5, &pin_PB03), - SPI(3, 6, &pin_PB03), SPI(2, 5, &pin_PB10), - SPI(5, 6, &pin_PB00), - SPI(3, 7, &pin_PB12), SPI(2, 5, &pin_PB13), - SPI(4, 6, &pin_PB13), SPI(2, 5, &pin_PC07), - SPI(3, 6, &pin_PC10), SPI(2, 5, &pin_PD03), + SPI(3, 6, &pin_PB03), + SPI(3, 7, &pin_PB12), + SPI(3, 6, &pin_PC10), + SPI(4, 6, &pin_PB13), SPI(4, 5, &pin_PE02), - SPI(5, 6, &pin_PE02), SPI(4, 5, &pin_PE12), - SPI(5, 6, &pin_PE12), + SPI(5, 6, &pin_PB00), + SPI(5, 6, &pin_PB00), + SPI(5, 6, &pin_PE02), + SPI(5, 6, &pin_PE12) }; const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14] = { - SPI(4, 5, &pin_PA01), SPI(1, 5, &pin_PA07), - SPI(5, 6, &pin_PA10), SPI(1, 5, &pin_PB05), - SPI(3, 6, &pin_PB05), - SPI(5, 6, &pin_PB08), SPI(2, 5, &pin_PB15), SPI(2, 5, &pin_PC03), + SPI(3, 6, &pin_PB05), SPI(3, 6, &pin_PC12), SPI(3, 5, &pin_PD06), + SPI(4, 5, &pin_PA01), SPI(4, 5, &pin_PE06), - SPI(5, 6, &pin_PE06), SPI(4, 5, &pin_PE14), - SPI(5, 6, &pin_PE14), + SPI(5, 6, &pin_PA10), + SPI(5, 6, &pin_PB08), + SPI(5, 6, &pin_PE06), + SPI(5, 6, &pin_PE14) }; const mcu_spi_miso_obj_t mcu_spi_miso_list[12] = { SPI(1, 5, &pin_PA06), - SPI(4, 6, &pin_PA11), - SPI(5, 6, &pin_PA12), SPI(1, 5, &pin_PB04), - SPI(3, 6, &pin_PB04), SPI(2, 5, &pin_PB14), SPI(2, 5, &pin_PC02), + SPI(3, 6, &pin_PB04), SPI(3, 6, &pin_PC11), + SPI(4, 6, &pin_PA11), SPI(4, 5, &pin_PE05), - SPI(5, 6, &pin_PE05), SPI(4, 5, &pin_PE13), - SPI(5, 6, &pin_PE13), + SPI(5, 6, &pin_PA12), + SPI(5, 6, &pin_PE05), + SPI(5, 6, &pin_PE13) }; const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { SPI(1, 5, &pin_PA04), - SPI(3, 6, &pin_PA04), SPI(1, 5, &pin_PA15), - SPI(3, 6, &pin_PA15), - SPI(5, 6, &pin_PB01), SPI(2, 5, &pin_PB09), SPI(2, 5, &pin_PB12), + SPI(3, 6, &pin_PA04), + SPI(3, 6, &pin_PA15), SPI(4, 6, &pin_PB12), SPI(4, 5, &pin_PE04), - SPI(5, 6, &pin_PE04), SPI(4, 5, &pin_PE11), - SPI(5, 6, &pin_PE11), + SPI(5, 6, &pin_PB01), + SPI(5, 6, &pin_PE04), + SPI(5, 6, &pin_PE11) }; //UART, Etc diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h index 0514be311..188afcfd2 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h @@ -37,9 +37,9 @@ extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; //SPI extern SPI_TypeDef * mcu_spi_banks[5]; -extern const mcu_spi_sck_obj_t mcu_spi_sck_list[8]; -extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[4]; -extern const mcu_spi_miso_obj_t mcu_spi_miso_list[4]; -extern const mcu_spi_nss_obj_t mcu_spi_nss_list[4]; +extern const mcu_spi_sck_obj_t mcu_spi_sck_list[16]; +extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14]; +extern const mcu_spi_miso_obj_t mcu_spi_miso_list[12]; +extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; #endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H \ No newline at end of file -- cgit v1.2.3 From f08127bfcc5b8298a4b4ab4b8c0a208c1fa6d7d0 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Thu, 26 Sep 2019 11:35:08 -0400 Subject: WIP --- ports/stm32f4/common-hal/busio/SPI.c | 229 ++++++++++++++++++++++++++--- ports/stm32f4/common-hal/busio/SPI.h | 10 +- ports/stm32f4/peripherals/stm32f4/periph.h | 4 + 3 files changed, 222 insertions(+), 21 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index 589b4e818..ffc23ab83 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -23,55 +23,248 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ +#include #include "shared-bindings/busio/SPI.h" #include "py/mperrno.h" #include "py/runtime.h" +#include "stm32f4xx_hal.h" +#include "shared-bindings/microcontroller/__init__.h" #include "boards/board.h" #include "common-hal/microcontroller/Pin.h" -//mp_raise_NotImplementedError(translate("SPI not yet supported")); +STATIC bool reserved_spi[6]; + +void spi_reset(void) { + //Note: I2Cs are also forcibly reset in construct, due to silicon error + #ifdef SPI1 + reserved_spi[0] = false; + __HAL_RCC_SPI1_CLK_DISABLE(); + #endif + #ifdef SPI2 + reserved_spi[1] = false; + __HAL_RCC_SPI2_CLK_DISABLE(); + #endif + #ifdef SPI3 + reserved_spi[2] = false; + __HAL_RCC_SPI3_CLK_DISABLE(); + #endif + #ifdef SPI4 + reserved_spi[3] = false; + __HAL_RCC_SPI4_CLK_DISABLE(); + #endif + #ifdef SPI5 + reserved_spi[4] = false; + __HAL_RCC_SPI5_CLK_DISABLE(); + #endif + #ifdef SPI6 + reserved_spi[5] = false; + __HAL_RCC_SPI6_CLK_DISABLE(); + #endif +} void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) { + + //match pins to I2C objects + SPI_TypeDef * SPIx; + + uint8_t sck_len = sizeof(mcu_spi_sck_list)/sizeof(*mcu_spi_sck_list); + uint8_t mosi_len = sizeof(mcu_spi_mosi_list)/sizeof(*mcu_spi_mosi_list); + uint8_t miso_len = sizeof(mcu_spi_miso_list)/sizeof(*mcu_spi_miso_list); + + //sck + for(uint i=0; isck = &mcu_spi_sck_list[j]; + self->mosi = &mcu_spi_mosi_list[j]; + self->miso = &mcu_spi_miso_list[k]; + break; + } + } + } + } + } + } + + //handle typedef selection, errors + if(self->clk!=NULL && self->mosi!=NULL && self->miso!=NULL ) { + SPIx = mcu_spi_banks[self->clk->spi_index-1]; + } else { + mp_raise_RuntimeError(translate("Invalid SPI pin selection")); + } + + if(reserved_spi[self->sck->spi_index-1]) { + mp_raise_RuntimeError(translate("Hardware busy, try alternative pins")); + } + + //Start GPIO for each pin + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = pin_mask(sck->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = self->sck->altfn_index; + HAL_GPIO_Init(pin_port(sck->port), &GPIO_InitStruct); + + GPIO_InitStruct.Pin = pin_mask(mosi->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = self->mosi->altfn_index; + HAL_GPIO_Init(pin_port(mosi->port), &GPIO_InitStruct); + + GPIO_InitStruct.Pin = pin_mask(miso->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = self->miso->altfn_index; + HAL_GPIO_Init(pin_port(miso->port), &GPIO_InitStruct); + + //Keep separate so above hack can be cleanly replaced + #ifdef SPI1 + if(SPIx==SPI1) { + reserved_spi[0] = true; + __HAL_RCC_SPI1_CLK_ENABLE(); + } + #endif + #ifdef SPI2 + if(SPIx==SPI2) { + reserved_spi[1] = true; + __HAL_RCC_SPI2_CLK_ENABLE(); + } + #endif + #ifdef SPI3 + if(SPIx==SPI3) { + reserved_spi[2] = true; + __HAL_RCC_SPI3_CLK_ENABLE(); + } + #endif + #ifdef SPI4 + if(SPIx==SPI4) { + reserved_spi[3] = true; + __HAL_RCC_SPI4_CLK_ENABLE(); + } + #endif + #ifdef SPI5 + if(SPIx==SPI5) { + reserved_spi[4] = true; + __HAL_RCC_SPI5_CLK_ENABLE(); + } + #endif + #ifdef SPI6 + if(SPIx==SPI6) { + reserved_spi[5] = true; + __HAL_RCC_SPI6_CLK_ENABLE(); + } + #endif - hspi1.Instance = SPI1; - hspi1.Init.Mode = SPI_MODE_MASTER; - hspi1.Init.Direction = SPI_DIRECTION_2LINES; - hspi1.Init.DataSize = SPI_DATASIZE_8BIT; - hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; - hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; - hspi1.Init.NSS = SPI_NSS_HARD_OUTPUT; - hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; - hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; - hspi1.Init.TIMode = SPI_TIMODE_DISABLE; - hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - hspi1.Init.CRCPolynomial = 10; - if (HAL_SPI_Init(&hspi1) != HAL_OK) + self->handle.Instance = SPIx; + self->handle.Init.Mode = SPI_MODE_MASTER; + self->handle.Init.Direction = SPI_DIRECTION_2LINES; + self->handle.Init.DataSize = SPI_DATASIZE_8BIT; + self->handle.Init.CLKPolarity = SPI_POLARITY_LOW; + self->handle.Init.CLKPhase = SPI_PHASE_1EDGE; + self->handle.Init.NSS = SPI_NSS_SOFT; + self->handle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + self->handle.Init.FirstBit = SPI_FIRSTBIT_MSB; + self->handle.Init.TIMode = SPI_TIMODE_DISABLE; + self->handle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + self->handle.Init.CRCPolynomial = 10; + if (HAL_SPI_Init(&self->handle) != HAL_OK) { - Error_Handler(); + mp_raise_RuntimeError(translate("SPI Init Error")); } + + claim_pin(sck); + claim_pin(mosi); + claim_pin(miso); } void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { } bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { - return 0; + return self->sck->pin == mp_const_none; } void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { + #ifdef SPI1 + if(self->handle.Instance==SPI1) { + reserved_spi[0] = false; + __HAL_RCC_SPI1_CLK_DISABLE(); + } + #endif + #ifdef SPI2 + if(self->handle.Instance==SPI2) { + reserved_spi[1] = false; + __HAL_RCC_SPI2_CLK_DISABLE(); + } + #endif + #ifdef SPI3 + if(self->handle.Instance==SPI3) { + reserved_spi[2] = false; + __HAL_RCC_SPI3_CLK_DISABLE(); + } + #endif + #ifdef SPI4 + if(self->handle.Instance==SPI4) { + reserved_spi[3] = false; + __HAL_RCC_SPI4_CLK_DISABLE(); + } + #endif + #ifdef SPI5 + if(self->handle.Instance==SPI5) { + reserved_spi[4] = false; + __HAL_RCC_SPI5_CLK_DISABLE(); + } + #endif + #ifdef SPI6 + if(self->handle.Instance==SPI6) { + reserved_spi[5] = false; + __HAL_RCC_SPI6_CLK_DISABLE(); + } + #endif + reset_pin_number(self->sck->pin->port,self->sck->pin->number); + reset_pin_number(self->mosi->pin->port,self->mosi->pin->number); + reset_pin_number(self->miso->pin->port,self->miso->pin->number); + self->sck = mp_const_none; + self->mosi = mp_const_none; + self->miso = mp_const_none; } bool common_hal_busio_spi_configure(busio_spi_obj_t *self, - uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { - return true; + uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { + return true; } bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { bool grabbed_lock = false; + + //Critical section code that may be required at some point. + // uint32_t store_primask = __get_PRIMASK(); + // __disable_irq(); + // __DMB(); + + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } + + // __DMB(); + // __set_PRIMASK(store_primask); + return grabbed_lock; } diff --git a/ports/stm32f4/common-hal/busio/SPI.h b/ports/stm32f4/common-hal/busio/SPI.h index f7ff79b49..bb6c7bc47 100644 --- a/ports/stm32f4/common-hal/busio/SPI.h +++ b/ports/stm32f4/common-hal/busio/SPI.h @@ -33,10 +33,14 @@ typedef struct { mp_obj_base_t base; + SPI_HandleTypeDef handle; bool has_lock; - uint8_t clock_pin; - uint8_t MOSI_pin; - uint8_t MISO_pin; + const mcu_spi_sck_obj_t *sck; + const mcu_spi_mosi_obj_t *mosi; + const mcu_spi_miso_obj_t *miso; + const mcu_spi_nss_obj_t *nss; } busio_spi_obj_t; +void spi_reset(void); + #endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/stm32f4/peripherals/stm32f4/periph.h b/ports/stm32f4/peripherals/stm32f4/periph.h index 480f7aba2..1d9042f7e 100644 --- a/ports/stm32f4/peripherals/stm32f4/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/periph.h @@ -34,6 +34,8 @@ #include "stm32f4/pins.h" // I2C +//TODO: these objects should be condensed into a single 'periph_pin' unless we +//find a compelling reason to store more unique data in them. typedef struct { uint8_t i2c_index:4; // Index of the I2C unit (1 to 3) @@ -63,6 +65,8 @@ typedef struct { } // SPI +//TODO: these objects should be condensed into a single 'periph_pin' unless we +//find a compelling reason to store more unique data in them. typedef struct { uint8_t spi_index:4; //Up to 6 SPI units -- cgit v1.2.3 From ad339509666428046f9f7d8a95bb5c2ca5760a6e Mon Sep 17 00:00:00 2001 From: Hierophect Date: Fri, 27 Sep 2019 11:00:09 -0400 Subject: Flash memory changes - non functional --- ports/stm32f4/Makefile | 1 + ports/stm32f4/boards/STM32F412ZGTx_FLASH.ld | 4 +-- .../stm32f412zg_discovery/stm32f4xx_hal_conf.h | 3 +- ports/stm32f4/common-hal/busio/SPI.c | 11 ++++--- ports/stm32f4/common-hal/busio/SPI.h | 3 ++ ports/stm32f4/peripherals/stm32f4/periph.h | 2 +- .../peripherals/stm32f4/stm32f412zx/periph.c | 2 +- ports/stm32f4/supervisor/internal_flash.c | 35 ++++++++++++++++++---- ports/stm32f4/supervisor/internal_flash.h | 2 +- 9 files changed, 45 insertions(+), 18 deletions(-) diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index ed396fea7..7cee0d8e7 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -137,6 +137,7 @@ SRC_STM32 = \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c \ + stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_i2c.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_dma.c \ stm32f4/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2s.c \ diff --git a/ports/stm32f4/boards/STM32F412ZGTx_FLASH.ld b/ports/stm32f4/boards/STM32F412ZGTx_FLASH.ld index e0586709e..4774e7768 100644 --- a/ports/stm32f4/boards/STM32F412ZGTx_FLASH.ld +++ b/ports/stm32f4/boards/STM32F412ZGTx_FLASH.ld @@ -7,8 +7,8 @@ MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ - FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 896K /* sector 4 is 64K, sectors 5,6,7 are 128K */ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K } diff --git a/ports/stm32f4/boards/stm32f412zg_discovery/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/stm32f412zg_discovery/stm32f4xx_hal_conf.h index dbfd423d0..2ad0fee20 100644 --- a/ports/stm32f4/boards/stm32f412zg_discovery/stm32f4xx_hal_conf.h +++ b/ports/stm32f4/boards/stm32f412zg_discovery/stm32f4xx_hal_conf.h @@ -60,7 +60,7 @@ /* #define HAL_SAI_MODULE_ENABLED */ #define HAL_SD_MODULE_ENABLED /* #define HAL_MMC_MODULE_ENABLED */ -/* #define HAL_SPI_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED /* #define HAL_TIM_MODULE_ENABLED */ #define HAL_UART_MODULE_ENABLED /* #define HAL_USART_MODULE_ENABLED */ @@ -70,7 +70,6 @@ #define HAL_PCD_MODULE_ENABLED /* #define HAL_HCD_MODULE_ENABLED */ /* #define HAL_DSI_MODULE_ENABLED */ -/* #define HAL_QSPI_MODULE_ENABLED */ #define HAL_QSPI_MODULE_ENABLED /* #define HAL_CEC_MODULE_ENABLED */ /* #define HAL_FMPI2C_MODULE_ENABLED */ diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index ffc23ab83..d65f44f47 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -37,7 +37,6 @@ STATIC bool reserved_spi[6]; void spi_reset(void) { - //Note: I2Cs are also forcibly reset in construct, due to silicon error #ifdef SPI1 reserved_spi[0] = false; __HAL_RCC_SPI1_CLK_DISABLE(); @@ -65,10 +64,10 @@ void spi_reset(void) { } void common_hal_busio_spi_construct(busio_spi_obj_t *self, - const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, + const mcu_pin_obj_t * sck, const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) { - //match pins to I2C objects + //match pins to SPI objects SPI_TypeDef * SPIx; uint8_t sck_len = sizeof(mcu_spi_sck_list)/sizeof(*mcu_spi_sck_list); @@ -77,7 +76,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, //sck for(uint i=0; iclk!=NULL && self->mosi!=NULL && self->miso!=NULL ) { - SPIx = mcu_spi_banks[self->clk->spi_index-1]; + if(self->sck!=NULL && self->mosi!=NULL && self->miso!=NULL ) { + SPIx = mcu_spi_banks[self->sck->spi_index-1]; } else { mp_raise_RuntimeError(translate("Invalid SPI pin selection")); } diff --git a/ports/stm32f4/common-hal/busio/SPI.h b/ports/stm32f4/common-hal/busio/SPI.h index bb6c7bc47..cc9af6e62 100644 --- a/ports/stm32f4/common-hal/busio/SPI.h +++ b/ports/stm32f4/common-hal/busio/SPI.h @@ -29,6 +29,9 @@ #include "common-hal/microcontroller/Pin.h" +#include "stm32f4xx_hal.h" +#include "stm32f4/periph.h" + #include "py/obj.h" typedef struct { diff --git a/ports/stm32f4/peripherals/stm32f4/periph.h b/ports/stm32f4/peripherals/stm32f4/periph.h index ab4a5e173..06ab2d3e4 100644 --- a/ports/stm32f4/peripherals/stm32f4/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/periph.h @@ -94,7 +94,7 @@ typedef struct { #define SPI(index, alt, spi_pin) \ { \ - .i2c_index = index, \ + .spi_index = index, \ .altfn_index = alt, \ .pin = spi_pin, \ } diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c index d31703158..7df876931 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c @@ -53,7 +53,7 @@ const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { // SPI -SPI_TypeDef * mcu_i2c_banks[3] = {SPI1, SPI2, SPI3, SPI4, SPI5}; +SPI_TypeDef * mcu_spi_banks[5] = {SPI1, SPI2, SPI3, SPI4, SPI5}; const mcu_spi_sck_obj_t mcu_spi_sck_list[16] = { SPI(1, 5, &pin_PA05), diff --git a/ports/stm32f4/supervisor/internal_flash.c b/ports/stm32f4/supervisor/internal_flash.c index 046b26baf..8f0219616 100644 --- a/ports/stm32f4/supervisor/internal_flash.c +++ b/ports/stm32f4/supervisor/internal_flash.c @@ -62,7 +62,11 @@ static const flash_layout_t flash_layout[] = { #endif }; -static uint8_t sector_copy[0x4000] __attribute__((aligned(4))); +static uint8_t sector_copy_16[0x4000] __attribute__((aligned(4))); + +#if INTERNAL_FLASH_FILESYSTEM_SIZE >= 0x1C000 +static uint8_t sector_copy_64[0x10000] __attribute__((aligned(4))); +#endif //Return the sector of a given flash address. uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) { @@ -126,7 +130,7 @@ bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { int32_t dest = convert_block_to_flash_addr(block); if (dest == -1) { // bad block number - mp_printf(&mp_plat_print, "BAD FLASH BLOCK ERROR"); + mp_printf(&mp_plat_print, "Error: flash block not in filesystem"); return false; } @@ -142,7 +146,28 @@ bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { uint32_t sector_start_addr; EraseInitStruct.Sector = flash_get_sector_info(dest, §or_start_addr, §or_size); EraseInitStruct.NbSectors = 1; - if (sector_size>0x4000) return false; + + //If we have lots of ram the filesystem can be bigger. + if (INTERNAL_FLASH_FILESYSTEM_SIZE>=0x1C000) { + if (sector_size>0x10000) { //support 64KB sector 4 + mp_printf(&mp_plat_print, "Error: flash sector too large"); + return false; + } + } else { + if (sector_size>0x4000) { + mp_printf(&mp_plat_print, "Error: flash sector too large"); + return false; + } + } + + uint8_t * sector_copy; + if (sector_size == 0x4000) { + sector_copy = sector_copy_16; + } else if (sector_size == 0x10000) { + sector_copy = sector_copy_64; + } else { + mp_printf(&mp_plat_print, "Error: flash sector incorrect size"); + } // copy the sector memcpy(sector_copy,(void *)sector_start_addr,sector_size); @@ -159,7 +184,7 @@ bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { if (HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError) != HAL_OK) { // error occurred during sector erase HAL_FLASH_Lock(); // lock the flash - mp_printf(&mp_plat_print, "FLASH SECTOR ERASE ERROR"); + mp_printf(&mp_plat_print, "Error: flash sector erase failure"); return false; } @@ -177,7 +202,7 @@ bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, sector_start_addr, (uint64_t)sector_copy[i]) != HAL_OK) { // error occurred during flash write HAL_FLASH_Lock(); // lock the flash - mp_printf(&mp_plat_print, "FLASH WRITE ERROR"); + mp_printf(&mp_plat_print, "Error: flash sector write error"); return false; } sector_start_addr += 1; diff --git a/ports/stm32f4/supervisor/internal_flash.h b/ports/stm32f4/supervisor/internal_flash.h index b6d26a07f..0018e3ad9 100644 --- a/ports/stm32f4/supervisor/internal_flash.h +++ b/ports/stm32f4/supervisor/internal_flash.h @@ -39,7 +39,7 @@ #ifdef STM32F412Zx #define STM32_FLASH_SIZE 0x100000 //1MB -#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //112KiB #endif #ifdef STM32F405xx -- cgit v1.2.3 From d7443fce54d0bcd616f1bf414fcc9d4d85ea6c8f Mon Sep 17 00:00:00 2001 From: Hierophect Date: Fri, 27 Sep 2019 17:59:55 -0400 Subject: First implementation of read write --- ports/stm32f4/common-hal/busio/SPI.c | 15 +++++++++++---- ports/stm32f4/common-hal/busio/SPI.h | 1 + ports/stm32f4/mpconfigport.mk | 1 + ports/stm32f4/supervisor/internal_flash.c | 2 ++ ports/stm32f4/supervisor/port.c | 2 ++ 5 files changed, 17 insertions(+), 4 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index d65f44f47..44cae40c9 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -4,6 +4,7 @@ * The MIT License (MIT) * * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -32,6 +33,7 @@ #include "shared-bindings/microcontroller/__init__.h" #include "boards/board.h" +#include "supervisor/shared/translate.h" #include "common-hal/microcontroller/Pin.h" STATIC bool reserved_spi[6]; @@ -277,16 +279,21 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { - return 0; + HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, 2); + return result == HAL_OK ? 0 : 1; } bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { - return 0; + HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, 2); + return result == HAL_OK ? 0 : 1; } -bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { - return 0; +bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, + uint8_t *data_out, uint8_t *data_in, size_t len) { + HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle, + data_out, data_in, (uint16_t)len,2); + return result == HAL_OK ? 0 : 1; } uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { diff --git a/ports/stm32f4/common-hal/busio/SPI.h b/ports/stm32f4/common-hal/busio/SPI.h index cc9af6e62..ea4219a1f 100644 --- a/ports/stm32f4/common-hal/busio/SPI.h +++ b/ports/stm32f4/common-hal/busio/SPI.h @@ -4,6 +4,7 @@ * The MIT License (MIT) * * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal diff --git a/ports/stm32f4/mpconfigport.mk b/ports/stm32f4/mpconfigport.mk index e814d86e4..0dd4862ec 100644 --- a/ports/stm32f4/mpconfigport.mk +++ b/ports/stm32f4/mpconfigport.mk @@ -23,6 +23,7 @@ CIRCUITPY_BUSIO = 1 CIRCUITPY_TIME = 1 CIRCUITPY_OS = 1 CIRCUITPY_STRUCT = 1 +CIRCUITPY_MATH = 1 #ifeq ($(MCU_SUB_VARIANT), stm32f412zx) #endif diff --git a/ports/stm32f4/supervisor/internal_flash.c b/ports/stm32f4/supervisor/internal_flash.c index 8f0219616..9f4be538b 100644 --- a/ports/stm32f4/supervisor/internal_flash.c +++ b/ports/stm32f4/supervisor/internal_flash.c @@ -164,7 +164,9 @@ bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { if (sector_size == 0x4000) { sector_copy = sector_copy_16; } else if (sector_size == 0x10000) { + #ifdef sector_copy_64 sector_copy = sector_copy_64; + #endif } else { mp_printf(&mp_plat_print, "Error: flash sector incorrect size"); } diff --git a/ports/stm32f4/supervisor/port.c b/ports/stm32f4/supervisor/port.c index 990672360..df7a6ca42 100644 --- a/ports/stm32f4/supervisor/port.c +++ b/ports/stm32f4/supervisor/port.c @@ -32,6 +32,7 @@ #include "common-hal/microcontroller/Pin.h" #include "common-hal/busio/I2C.h" +#include "common-hal/busio/SPI.h" #include "stm32f4/clocks.h" #include "stm32f4/gpio.h" @@ -55,6 +56,7 @@ safe_mode_t port_init(void) { void reset_port(void) { reset_all_pins(); i2c_reset(); + spi_reset(); } void reset_to_bootloader(void) { -- cgit v1.2.3 From 270396a882529a3eeca308ec2e8bec525a5081aa Mon Sep 17 00:00:00 2001 From: Hierophect Date: Sun, 29 Sep 2019 13:01:27 -0400 Subject: Refine SPI settings for testing --- ports/stm32f4/common-hal/busio/SPI.c | 39 ++++++++++++++++++++----------- ports/stm32f4/supervisor/internal_flash.c | 30 ++++-------------------- 2 files changed, 29 insertions(+), 40 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index 44cae40c9..d7bd88b05 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -113,23 +113,23 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, //Start GPIO for each pin GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitStruct.Pin = pin_mask(sck->number); - GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Alternate = self->sck->altfn_index; HAL_GPIO_Init(pin_port(sck->port), &GPIO_InitStruct); GPIO_InitStruct.Pin = pin_mask(mosi->number); - GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Alternate = self->mosi->altfn_index; HAL_GPIO_Init(pin_port(mosi->port), &GPIO_InitStruct); GPIO_InitStruct.Pin = pin_mask(miso->number); - GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Alternate = self->miso->altfn_index; HAL_GPIO_Init(pin_port(miso->port), &GPIO_InitStruct); @@ -178,7 +178,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, self->handle.Init.CLKPolarity = SPI_POLARITY_LOW; self->handle.Init.CLKPhase = SPI_PHASE_1EDGE; self->handle.Init.NSS = SPI_NSS_SOFT; - self->handle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + self->handle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16; self->handle.Init.FirstBit = SPI_FIRSTBIT_MSB; self->handle.Init.TIMode = SPI_TIMODE_DISABLE; self->handle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; @@ -186,6 +186,8 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, if (HAL_SPI_Init(&self->handle) != HAL_OK) { mp_raise_RuntimeError(translate("SPI Init Error")); + } else { + mp_printf(&mp_plat_print, "Success! spi clock speed:%u\n",(HAL_RCC_GetPCLK2Freq()/16)); } claim_pin(sck); @@ -247,6 +249,7 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { + //mp_printf(&mp_plat_print, "SPI Configure\n"); return true; } @@ -280,30 +283,38 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, 2); - return result == HAL_OK ? 0 : 1; + if(!(result==HAL_OK)) mp_raise_RuntimeError(translate("SPI write error")); + return true; //result == HAL_OK ? 0 : 1; } bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, 2); - return result == HAL_OK ? 0 : 1; + if(!(result==HAL_OK)) mp_raise_RuntimeError(translate("SPI read error")); + return true; //result == HAL_OK ? 0 : 1; } bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle, data_out, data_in, (uint16_t)len,2); - return result == HAL_OK ? 0 : 1; + if(!(result==HAL_OK)) mp_raise_RuntimeError(translate("SPI transfer error")); + return true; //result == HAL_OK ? 0 : 1; } uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { - return 0; + + uint32_t result = HAL_RCC_GetPCLK2Freq()/16; + mp_printf(&mp_plat_print, "spi clock speed:%u\n",result); + return result; } uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { + mp_raise_RuntimeError(translate("SPI call triggered")); return 0; } uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { + mp_raise_RuntimeError(translate("SPI call triggered")); return 0; } \ No newline at end of file diff --git a/ports/stm32f4/supervisor/internal_flash.c b/ports/stm32f4/supervisor/internal_flash.c index 9f4be538b..95df93d54 100644 --- a/ports/stm32f4/supervisor/internal_flash.c +++ b/ports/stm32f4/supervisor/internal_flash.c @@ -62,11 +62,7 @@ static const flash_layout_t flash_layout[] = { #endif }; -static uint8_t sector_copy_16[0x4000] __attribute__((aligned(4))); - -#if INTERNAL_FLASH_FILESYSTEM_SIZE >= 0x1C000 -static uint8_t sector_copy_64[0x10000] __attribute__((aligned(4))); -#endif +static uint8_t sector_copy[0x4000] __attribute__((aligned(4))); //Return the sector of a given flash address. uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) { @@ -147,28 +143,10 @@ bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { EraseInitStruct.Sector = flash_get_sector_info(dest, §or_start_addr, §or_size); EraseInitStruct.NbSectors = 1; - //If we have lots of ram the filesystem can be bigger. - if (INTERNAL_FLASH_FILESYSTEM_SIZE>=0x1C000) { - if (sector_size>0x10000) { //support 64KB sector 4 - mp_printf(&mp_plat_print, "Error: flash sector too large"); - return false; - } - } else { - if (sector_size>0x4000) { - mp_printf(&mp_plat_print, "Error: flash sector too large"); - return false; - } - } - uint8_t * sector_copy; - if (sector_size == 0x4000) { - sector_copy = sector_copy_16; - } else if (sector_size == 0x10000) { - #ifdef sector_copy_64 - sector_copy = sector_copy_64; - #endif - } else { - mp_printf(&mp_plat_print, "Error: flash sector incorrect size"); + if (sector_size>0x4000) { + mp_printf(&mp_plat_print, "Error: flash sector too large"); + return false; } // copy the sector -- cgit v1.2.3 From 89315999e23695cde1d64dfb8db8417b6dc91a2a Mon Sep 17 00:00:00 2001 From: Hierophect Date: Sun, 29 Sep 2019 13:18:43 -0400 Subject: Fix bad returns, revert flash changes --- ports/stm32f4/boards/STM32F412ZGTx_FLASH.ld | 4 ++-- ports/stm32f4/common-hal/busio/SPI.c | 6 +++--- ports/stm32f4/supervisor/internal_flash.h | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/ports/stm32f4/boards/STM32F412ZGTx_FLASH.ld b/ports/stm32f4/boards/STM32F412ZGTx_FLASH.ld index 4774e7768..e0586709e 100644 --- a/ports/stm32f4/boards/STM32F412ZGTx_FLASH.ld +++ b/ports/stm32f4/boards/STM32F412ZGTx_FLASH.ld @@ -7,8 +7,8 @@ MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1,2,3 are 16K */ - FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 896K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K } diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index d7bd88b05..ea6a2014a 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -284,14 +284,14 @@ bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, 2); if(!(result==HAL_OK)) mp_raise_RuntimeError(translate("SPI write error")); - return true; //result == HAL_OK ? 0 : 1; + return result == HAL_OK ? 1 : 0; } bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, 2); if(!(result==HAL_OK)) mp_raise_RuntimeError(translate("SPI read error")); - return true; //result == HAL_OK ? 0 : 1; + return result == HAL_OK ? 1 : 0; } bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, @@ -299,7 +299,7 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle, data_out, data_in, (uint16_t)len,2); if(!(result==HAL_OK)) mp_raise_RuntimeError(translate("SPI transfer error")); - return true; //result == HAL_OK ? 0 : 1; + return result == HAL_OK ? 1 : 0; } uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { diff --git a/ports/stm32f4/supervisor/internal_flash.h b/ports/stm32f4/supervisor/internal_flash.h index 0018e3ad9..b6d26a07f 100644 --- a/ports/stm32f4/supervisor/internal_flash.h +++ b/ports/stm32f4/supervisor/internal_flash.h @@ -39,7 +39,7 @@ #ifdef STM32F412Zx #define STM32_FLASH_SIZE 0x100000 //1MB -#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //112KiB +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB #endif #ifdef STM32F405xx -- cgit v1.2.3 From bf7b841020fbf3fb7090272995b67d1d3b212ceb Mon Sep 17 00:00:00 2001 From: Hierophect Date: Sun, 29 Sep 2019 13:20:13 -0400 Subject: Further reversion --- ports/stm32f4/supervisor/internal_flash.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/ports/stm32f4/supervisor/internal_flash.c b/ports/stm32f4/supervisor/internal_flash.c index 95df93d54..046b26baf 100644 --- a/ports/stm32f4/supervisor/internal_flash.c +++ b/ports/stm32f4/supervisor/internal_flash.c @@ -126,7 +126,7 @@ bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { int32_t dest = convert_block_to_flash_addr(block); if (dest == -1) { // bad block number - mp_printf(&mp_plat_print, "Error: flash block not in filesystem"); + mp_printf(&mp_plat_print, "BAD FLASH BLOCK ERROR"); return false; } @@ -142,12 +142,7 @@ bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { uint32_t sector_start_addr; EraseInitStruct.Sector = flash_get_sector_info(dest, §or_start_addr, §or_size); EraseInitStruct.NbSectors = 1; - - - if (sector_size>0x4000) { - mp_printf(&mp_plat_print, "Error: flash sector too large"); - return false; - } + if (sector_size>0x4000) return false; // copy the sector memcpy(sector_copy,(void *)sector_start_addr,sector_size); @@ -164,7 +159,7 @@ bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { if (HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError) != HAL_OK) { // error occurred during sector erase HAL_FLASH_Lock(); // lock the flash - mp_printf(&mp_plat_print, "Error: flash sector erase failure"); + mp_printf(&mp_plat_print, "FLASH SECTOR ERASE ERROR"); return false; } @@ -182,7 +177,7 @@ bool supervisor_flash_write_block(const uint8_t *src, uint32_t block) { if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, sector_start_addr, (uint64_t)sector_copy[i]) != HAL_OK) { // error occurred during flash write HAL_FLASH_Lock(); // lock the flash - mp_printf(&mp_plat_print, "Error: flash sector write error"); + mp_printf(&mp_plat_print, "FLASH WRITE ERROR"); return false; } sector_start_addr += 1; -- cgit v1.2.3 From e2d0ad6adcc45506f385e3c06efb0415befe5374 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Sun, 29 Sep 2019 15:01:32 -0400 Subject: Add settings reconfiguration --- ports/stm32f4/common-hal/busio/SPI.c | 85 ++++++++++++++++++++++++++++++++---- ports/stm32f4/common-hal/busio/SPI.h | 5 +++ 2 files changed, 81 insertions(+), 9 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index ea6a2014a..a523b9f5d 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -133,7 +133,6 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, GPIO_InitStruct.Alternate = self->miso->altfn_index; HAL_GPIO_Init(pin_port(miso->port), &GPIO_InitStruct); - //Keep separate so above hack can be cleanly replaced #ifdef SPI1 if(SPIx==SPI1) { reserved_spi[0] = true; @@ -187,9 +186,15 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, { mp_raise_RuntimeError(translate("SPI Init Error")); } else { - mp_printf(&mp_plat_print, "Success! spi clock speed:%u\n",(HAL_RCC_GetPCLK2Freq()/16)); + mp_printf(&mp_plat_print, "Constructed! spi clock speed:%u\n",(HAL_RCC_GetPCLK2Freq()/16)); } + self->baudrate = (HAL_RCC_GetPCLK2Freq()/16); + self->prescaler = 16; + self->polarity = 0; + self->phase = 1; + self->bits = 8; + claim_pin(sck); claim_pin(mosi); claim_pin(miso); @@ -247,9 +252,73 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { self->miso = mp_const_none; } +static uint32_t stm32_baud_to_spi_div(uint32_t baudrate, uint16_t * prescaler) { + static const uint32_t baud_map[8][2] = { + {2,SPI_BAUDRATEPRESCALER_2}, + {4,SPI_BAUDRATEPRESCALER_4}, + {8,SPI_BAUDRATEPRESCALER_8}, + {16,SPI_BAUDRATEPRESCALER_16}, + {32,SPI_BAUDRATEPRESCALER_32}, + {64,SPI_BAUDRATEPRESCALER_64}, + {128,SPI_BAUDRATEPRESCALER_128}, + {256,SPI_BAUDRATEPRESCALER_256} + }; + size_t i = 0; + uint16_t divisor; + do { + divisor = baud_map[i][0]; + if (baudrate >= (HAL_RCC_GetPCLK2Freq()/divisor)) { + *prescaler = divisor; + return baud_map[i][1]; + } + i++; + } while (divisor != 256); + //should never get here + mp_raise_RuntimeError(translate("SPI Divisor error")); + return 0; +} + bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { - //mp_printf(&mp_plat_print, "SPI Configure\n"); + //This resets the SPI, so check before updating it redundantly + if (baudrate == self->baudrate && polarity== self->polarity + && phase == self->phase && bits == self->bits) return true; + + //Deinit SPI + HAL_SPI_DeInit(&self->handle); + + if (bits == 8) self->handle.Init.DataSize = SPI_DATASIZE_8BIT; + else if (bits == 16) self->handle.Init.DataSize = SPI_DATASIZE_16BIT; + else return false; + + if (polarity) self->handle.Init.CLKPolarity = SPI_POLARITY_HIGH; + else self->handle.Init.CLKPolarity = SPI_POLARITY_LOW; + + if (phase) self->handle.Init.CLKPhase = SPI_PHASE_2EDGE; + else self->handle.Init.CLKPhase = SPI_PHASE_1EDGE; + + self->handle.Init.BaudRatePrescaler = stm32_baud_to_spi_div(baudrate, &self->prescaler); + + self->handle.Init.Mode = SPI_MODE_MASTER; + self->handle.Init.Direction = SPI_DIRECTION_2LINES; + self->handle.Init.NSS = SPI_NSS_SOFT; + self->handle.Init.FirstBit = SPI_FIRSTBIT_MSB; + self->handle.Init.TIMode = SPI_TIMODE_DISABLE; + self->handle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + self->handle.Init.CRCPolynomial = 10; + + if (HAL_SPI_Init(&self->handle) != HAL_OK) + { + mp_raise_RuntimeError(translate("SPI Re-init error")); + } else { + mp_printf(&mp_plat_print, "Configured! new spi clock speed:%u\n",(HAL_RCC_GetPCLK2Freq()/self->prescaler)); + mp_printf(&mp_plat_print, "Prescaler is%u\n",self->prescaler); + } + + self->baudrate = baudrate; + self->polarity = polarity; + self->phase = phase; + self->bits = bits; return true; } @@ -303,18 +372,16 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, } uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { - - uint32_t result = HAL_RCC_GetPCLK2Freq()/16; + //returns actual frequency + uint32_t result = HAL_RCC_GetPCLK2Freq()/self->prescaler; mp_printf(&mp_plat_print, "spi clock speed:%u\n",result); return result; } uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { - mp_raise_RuntimeError(translate("SPI call triggered")); - return 0; + return self->phase; } uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { - mp_raise_RuntimeError(translate("SPI call triggered")); - return 0; + return self->polarity; } \ No newline at end of file diff --git a/ports/stm32f4/common-hal/busio/SPI.h b/ports/stm32f4/common-hal/busio/SPI.h index ea4219a1f..067d2fcb6 100644 --- a/ports/stm32f4/common-hal/busio/SPI.h +++ b/ports/stm32f4/common-hal/busio/SPI.h @@ -43,6 +43,11 @@ typedef struct { const mcu_spi_mosi_obj_t *mosi; const mcu_spi_miso_obj_t *miso; const mcu_spi_nss_obj_t *nss; + uint32_t baudrate; + uint16_t prescaler; + uint8_t polarity; + uint8_t phase; + uint8_t bits; } busio_spi_obj_t; void spi_reset(void); -- cgit v1.2.3 From 492bc3eedc887a1adc48a55674cce81e68e18a8f Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 30 Sep 2019 10:45:02 -0400 Subject: Expand pin definitions for all boards --- .../peripherals/stm32f4/stm32f405xx/periph.c | 41 +++++++++++- .../peripherals/stm32f4/stm32f405xx/periph.h | 14 ++++- .../peripherals/stm32f4/stm32f411xe/periph.c | 72 +++++++++++++++++++++- .../peripherals/stm32f4/stm32f411xe/periph.h | 8 +++ .../peripherals/stm32f4/stm32f412zx/periph.c | 2 +- .../peripherals/stm32f4/stm32f412zx/periph.h | 2 +- 6 files changed, 132 insertions(+), 7 deletions(-) diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c index f2ace8204..7b0a54e55 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c @@ -46,4 +46,43 @@ const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { I2C_SCL(2, 4, &pin_PB10), I2C_SCL(3, 4, &pin_PA08) }; -//SPI, UART, Etc + +SPI_TypeDef * mcu_spi_banks[3] = {SPI1, SPI2, SPI3}; + +const mcu_spi_sck_obj_t mcu_spi_sck_list[7] = { + SPI(1, 5, &pin_PA05), + SPI(1, 5, &pin_PB03), + SPI(2, 5, &pin_PB10), + SPI(2, 5, &pin_PB13), + SPI(2, 5, &pin_PC07), + SPI(3, 6, &pin_PB03), + SPI(3, 6, &pin_PC10), +}; + +const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6] = { + SPI(1, 5, &pin_PA07), + SPI(1, 5, &pin_PB05), + SPI(2, 5, &pin_PB15), + SPI(2, 5, &pin_PC03), + SPI(3, 6, &pin_PB05), + SPI(3, 6, &pin_PC12), +}; + +const mcu_spi_miso_obj_t mcu_spi_miso_list[6] = { + SPI(1, 5, &pin_PA06), + SPI(1, 5, &pin_PB04), + SPI(2, 5, &pin_PB14), + SPI(2, 5, &pin_PC02), + SPI(3, 6, &pin_PB04), + SPI(3, 6, &pin_PC11), +}; + +const mcu_spi_nss_obj_t mcu_spi_nss_list[6] = { + SPI(1, 5, &pin_PA04), + SPI(1, 5, &pin_PA15), + SPI(2, 5, &pin_PB09), + SPI(2, 5, &pin_PB12), + SPI(3, 6, &pin_PA04), + SPI(3, 6, &pin_PA15), +}; +//UART, Etc diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h index 41b797e5f..cb9b33f6e 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h @@ -24,8 +24,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H -#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H //I2C extern I2C_TypeDef * mcu_i2c_banks[3]; @@ -33,5 +33,13 @@ extern I2C_TypeDef * mcu_i2c_banks[3]; extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4]; extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; +//SPI +extern SPI_TypeDef * mcu_spi_banks[3]; -#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H \ No newline at end of file +extern const mcu_spi_sck_obj_t mcu_spi_sck_list[7]; +extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6]; +extern const mcu_spi_miso_obj_t mcu_spi_miso_list[6]; +extern const mcu_spi_nss_obj_t mcu_spi_nss_list[6]; + + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H \ No newline at end of file diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c index 645e93717..f0966f785 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c @@ -49,4 +49,74 @@ const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { I2C_SCL(2, 4, &pin_PB10), I2C_SCL(3, 4, &pin_PA08) }; -//SPI, UART, Etc + +// SPI + +SPI_TypeDef * mcu_spi_banks[5] = {SPI1, SPI2, SPI3, SPI4, SPI5}; + +const mcu_spi_sck_obj_t mcu_spi_sck_list[15] = { + SPI(1, 5, &pin_PA05), + SPI(1, 5, &pin_PB03), + SPI(2, 5, &pin_PB10), + SPI(2, 5, &pin_PB13), + SPI(2, 5, &pin_PC07), + SPI(2, 5, &pin_PD03), + SPI(3, 6, &pin_PB03), + SPI(3, 7, &pin_PB12), + SPI(3, 6, &pin_PC10), + SPI(4, 6, &pin_PB13), + SPI(4, 5, &pin_PE02), + SPI(4, 5, &pin_PE12), + SPI(5, 6, &pin_PB00), + SPI(5, 6, &pin_PE02), + SPI(5, 6, &pin_PE12) +}; + +const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14] = { + SPI(1, 5, &pin_PA07), + SPI(1, 5, &pin_PB05), + SPI(2, 5, &pin_PB15), + SPI(2, 5, &pin_PC03), + SPI(3, 6, &pin_PB05), + SPI(3, 6, &pin_PC12), + SPI(3, 5, &pin_PD06), + SPI(4, 5, &pin_PA01), + SPI(4, 5, &pin_PE06), + SPI(4, 5, &pin_PE14), + SPI(5, 6, &pin_PA10), + SPI(5, 6, &pin_PB08), + SPI(5, 6, &pin_PE06), + SPI(5, 6, &pin_PE14) +}; + +const mcu_spi_miso_obj_t mcu_spi_miso_list[12] = { + SPI(1, 5, &pin_PA06), + SPI(1, 5, &pin_PB04), + SPI(2, 5, &pin_PB14), + SPI(2, 5, &pin_PC02), + SPI(3, 6, &pin_PB04), + SPI(3, 6, &pin_PC11), + SPI(4, 6, &pin_PA11), + SPI(4, 5, &pin_PE05), + SPI(4, 5, &pin_PE13), + SPI(5, 6, &pin_PA12), + SPI(5, 6, &pin_PE05), + SPI(5, 6, &pin_PE13) +}; + +const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { + SPI(1, 5, &pin_PA04), + SPI(1, 5, &pin_PA15), + SPI(2, 5, &pin_PB09), + SPI(2, 5, &pin_PB12), + SPI(3, 6, &pin_PA04), + SPI(3, 6, &pin_PA15), + SPI(4, 6, &pin_PB12), + SPI(4, 5, &pin_PE04), + SPI(4, 5, &pin_PE11), + SPI(5, 6, &pin_PB01), + SPI(5, 6, &pin_PE04), + SPI(5, 6, &pin_PE11) +}; + +//UART, Etc diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h index 13236468d..08efa14ca 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h @@ -33,4 +33,12 @@ extern I2C_TypeDef * mcu_i2c_banks[3]; extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[7]; extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; +//SPI +extern SPI_TypeDef * mcu_spi_banks[5]; + +extern const mcu_spi_sck_obj_t mcu_spi_sck_list[15]; +extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14]; +extern const mcu_spi_miso_obj_t mcu_spi_miso_list[12]; +extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; + #endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H \ No newline at end of file diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c index 7df876931..1f51b5b8d 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c @@ -55,7 +55,7 @@ const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { SPI_TypeDef * mcu_spi_banks[5] = {SPI1, SPI2, SPI3, SPI4, SPI5}; -const mcu_spi_sck_obj_t mcu_spi_sck_list[16] = { +const mcu_spi_sck_obj_t mcu_spi_sck_list[15] = { SPI(1, 5, &pin_PA05), SPI(1, 5, &pin_PB03), SPI(2, 5, &pin_PB10), diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h index 188afcfd2..d12bbba93 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h @@ -37,7 +37,7 @@ extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; //SPI extern SPI_TypeDef * mcu_spi_banks[5]; -extern const mcu_spi_sck_obj_t mcu_spi_sck_list[16]; +extern const mcu_spi_sck_obj_t mcu_spi_sck_list[15]; extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14]; extern const mcu_spi_miso_obj_t mcu_spi_miso_list[12]; extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; -- cgit v1.2.3 From a475b667b58c6baf1f1b2f64e2691d97717690db Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 30 Sep 2019 11:04:09 -0400 Subject: Clean up debugging messages, remove shortcuts --- ports/stm32f4/common-hal/busio/SPI.c | 42 ++++++++++++++++++------------------ 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index a523b9f5d..12550e663 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -185,10 +185,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, if (HAL_SPI_Init(&self->handle) != HAL_OK) { mp_raise_RuntimeError(translate("SPI Init Error")); - } else { - mp_printf(&mp_plat_print, "Constructed! spi clock speed:%u\n",(HAL_RCC_GetPCLK2Freq()/16)); } - self->baudrate = (HAL_RCC_GetPCLK2Freq()/16); self->prescaler = 16; self->polarity = 0; @@ -273,9 +270,9 @@ static uint32_t stm32_baud_to_spi_div(uint32_t baudrate, uint16_t * prescaler) { } i++; } while (divisor != 256); - //should never get here - mp_raise_RuntimeError(translate("SPI Divisor error")); - return 0; + //only gets here if requested baud is lower than minimum + *prescaler = 256; + return SPI_BAUDRATEPRESCALER_256; } bool common_hal_busio_spi_configure(busio_spi_obj_t *self, @@ -287,15 +284,25 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self, //Deinit SPI HAL_SPI_DeInit(&self->handle); - if (bits == 8) self->handle.Init.DataSize = SPI_DATASIZE_8BIT; - else if (bits == 16) self->handle.Init.DataSize = SPI_DATASIZE_16BIT; - else return false; + if (bits == 8) { + self->handle.Init.DataSize = SPI_DATASIZE_8BIT; + } else if (bits == 16) { + self->handle.Init.DataSize = SPI_DATASIZE_16BIT; + } else { + return false; + } - if (polarity) self->handle.Init.CLKPolarity = SPI_POLARITY_HIGH; - else self->handle.Init.CLKPolarity = SPI_POLARITY_LOW; + if (polarity) { + self->handle.Init.CLKPolarity = SPI_POLARITY_HIGH; + } else { + self->handle.Init.CLKPolarity = SPI_POLARITY_LOW; + } - if (phase) self->handle.Init.CLKPhase = SPI_PHASE_2EDGE; - else self->handle.Init.CLKPhase = SPI_PHASE_1EDGE; + if (phase) { + self->handle.Init.CLKPhase = SPI_PHASE_2EDGE; + } else { + self->handle.Init.CLKPhase = SPI_PHASE_1EDGE; + } self->handle.Init.BaudRatePrescaler = stm32_baud_to_spi_div(baudrate, &self->prescaler); @@ -309,10 +316,7 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self, if (HAL_SPI_Init(&self->handle) != HAL_OK) { - mp_raise_RuntimeError(translate("SPI Re-init error")); - } else { - mp_printf(&mp_plat_print, "Configured! new spi clock speed:%u\n",(HAL_RCC_GetPCLK2Freq()/self->prescaler)); - mp_printf(&mp_plat_print, "Prescaler is%u\n",self->prescaler); + mp_raise_RuntimeError(translate("SPI Re-initialization error")); } self->baudrate = baudrate; @@ -352,14 +356,12 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, 2); - if(!(result==HAL_OK)) mp_raise_RuntimeError(translate("SPI write error")); return result == HAL_OK ? 1 : 0; } bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, 2); - if(!(result==HAL_OK)) mp_raise_RuntimeError(translate("SPI read error")); return result == HAL_OK ? 1 : 0; } @@ -367,14 +369,12 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle, data_out, data_in, (uint16_t)len,2); - if(!(result==HAL_OK)) mp_raise_RuntimeError(translate("SPI transfer error")); return result == HAL_OK ? 1 : 0; } uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { //returns actual frequency uint32_t result = HAL_RCC_GetPCLK2Freq()/self->prescaler; - mp_printf(&mp_plat_print, "spi clock speed:%u\n",result); return result; } -- cgit v1.2.3 From 56eb9666ead5a6d59e1bbc7a6850d9420cd8385b Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 30 Sep 2019 11:35:40 -0400 Subject: Implement never-reset, fix F412 --- ports/stm32f4/common-hal/busio/SPI.c | 26 ++++++++++++++++++++-- .../peripherals/stm32f4/stm32f412zx/periph.c | 1 - 2 files changed, 24 insertions(+), 3 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index 12550e663..a13b3dfdb 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -37,31 +37,44 @@ #include "common-hal/microcontroller/Pin.h" STATIC bool reserved_spi[6]; +STATIC bool never_reset_spi[6]; void spi_reset(void) { #ifdef SPI1 + if(!never_reset_spi[0]) { reserved_spi[0] = false; __HAL_RCC_SPI1_CLK_DISABLE(); + } #endif #ifdef SPI2 + if(!never_reset_spi[1]) { reserved_spi[1] = false; __HAL_RCC_SPI2_CLK_DISABLE(); + } #endif #ifdef SPI3 + if(!never_reset_spi[2]) { reserved_spi[2] = false; __HAL_RCC_SPI3_CLK_DISABLE(); + } #endif #ifdef SPI4 + if(!never_reset_spi[3]) { reserved_spi[3] = false; - __HAL_RCC_SPI4_CLK_DISABLE(); + __HAL_RCC_SPI4_CLK_DISABLE(); + } #endif #ifdef SPI5 + if(!never_reset_spi[4]) { reserved_spi[4] = false; - __HAL_RCC_SPI5_CLK_DISABLE(); + __HAL_RCC_SPI5_CLK_DISABLE(); + } #endif #ifdef SPI6 + if(!never_reset_spi[5]) { reserved_spi[5] = false; __HAL_RCC_SPI6_CLK_DISABLE(); + } #endif } @@ -198,6 +211,15 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, } void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { + for(size_t i = 0 ; i < MP_ARRAY_SIZE(mcu_spi_banks); i++) { + if (mcu_spi_banks[i] == self->handle.Instance) { + never_reset_spi[i] = true; + never_reset_pin_number(self->sck->pin->port, self->sck->pin->number); + never_reset_pin_number(self->mosi->pin->port, self->mosi->pin->number); + never_reset_pin_number(self->miso->pin->port, self->miso->pin->number); + break; + } + } } bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c index 1f51b5b8d..ea94719ec 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c @@ -69,7 +69,6 @@ const mcu_spi_sck_obj_t mcu_spi_sck_list[15] = { SPI(4, 5, &pin_PE02), SPI(4, 5, &pin_PE12), SPI(5, 6, &pin_PB00), - SPI(5, 6, &pin_PB00), SPI(5, 6, &pin_PE02), SPI(5, 6, &pin_PE12) }; -- cgit v1.2.3 From 1f90cffc896b84cdc571aef88dfe09655471adfe Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 30 Sep 2019 13:33:20 -0400 Subject: protect against edge case --- ports/stm32f4/common-hal/busio/SPI.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index a13b3dfdb..d64ec542a 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -97,10 +97,12 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, if (mcu_spi_mosi_list[j].pin == mosi) { //miso for(uint k=0; ksck = &mcu_spi_sck_list[j]; self->mosi = &mcu_spi_mosi_list[j]; self->miso = &mcu_spi_miso_list[k]; -- cgit v1.2.3 From b66700720bb9139cc698e3eef890f77091d53a93 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 30 Sep 2019 18:05:07 -0400 Subject: improve error readability --- ports/stm32f4/common-hal/busio/SPI.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index d64ec542a..50b15978c 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -89,6 +89,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, uint8_t mosi_len = sizeof(mcu_spi_mosi_list)/sizeof(*mcu_spi_mosi_list); uint8_t miso_len = sizeof(mcu_spi_miso_list)/sizeof(*mcu_spi_miso_list); + bool spi_taken = false; //sck for(uint i=0; isck = &mcu_spi_sck_list[j]; self->mosi = &mcu_spi_mosi_list[j]; @@ -118,11 +122,11 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, if(self->sck!=NULL && self->mosi!=NULL && self->miso!=NULL ) { SPIx = mcu_spi_banks[self->sck->spi_index-1]; } else { - mp_raise_RuntimeError(translate("Invalid SPI pin selection")); - } - - if(reserved_spi[self->sck->spi_index-1]) { - mp_raise_RuntimeError(translate("Hardware busy, try alternative pins")); + if (spi_taken) { + mp_raise_RuntimeError(translate("Hardware busy, try alternative pins")); + } else { + mp_raise_RuntimeError(translate("Invalid SPI pin selection")); + } } //Start GPIO for each pin -- cgit v1.2.3