From f1256c0b35d8ff3e1893bd345a6ff29c2ee2e752 Mon Sep 17 00:00:00 2001 From: sommersoft Date: Thu, 4 Jul 2019 01:18:16 -0500 Subject: add script to gather module support matrix info; add initial json file --- docs/shared_bindings_matrix.py | 130 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 130 insertions(+) create mode 100644 docs/shared_bindings_matrix.py (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py new file mode 100644 index 000000000..ebcadb7ad --- /dev/null +++ b/docs/shared_bindings_matrix.py @@ -0,0 +1,130 @@ +# The MIT License (MIT) +# +# Copyright (c) 2019 Michael Schroeder +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. +# + +import json +import os +import re + + +SUPPORTED_PORTS = ["atmel-samd", "nrf"] + + +def get_shared_bindings(): + """ Get a list of modules in shared-bindings based on folder names + """ + return [item for item in os.listdir("./shared-bindings")] + + +def read_mpconfig(): + """ Open 'circuitpy_mpconfig.mk' and return the contents. + """ + configs = [] + with open("py/circuitpy_mpconfig.mk") as mpconfig: + configs = mpconfig.read() + + return configs + + +def build_json(modules, configs): + """ Establish the base of the JSON file, based on the contents from + `configs`. Base will contain module names, if they're part of + the `FULL_BUILD`, or their default value (0 | 1). + + """ + base_json = dict() + full_build = False + for module in modules: + full_name = module + search_name = module.lstrip("_") + re_pattern = "CIRCUITPY_{}\s=\s(.+)".format(search_name.upper()) + find_config = re.search(re_pattern, configs) + #print(module, "|", find_config) + if not find_config: + continue + full_build = int("FULL_BUILD" in find_config[0]) + #print(find_config[1]) + if not full_build: + default_val = find_config[1] + else: + default_val = "None" + base_json[search_name] = { + "name": full_name, + "full_build": str(full_build), + "default_value": default_val, + "excluded": [] + } + + return get_excluded_boards(base_json) + + +def get_excluded_boards(base_json): + """ Cycles through each board's `mpconfigboard.mk` file to determine + if each module is included or not. Boards are selected by existence + in a port listed in `SUPPORTED_PORTS` (e.g. `/port/nrf/feather_52840`) + """ + modules = list(base_json.keys()) + for port in SUPPORTED_PORTS: + port_dir = "ports/{}/boards".format(port) + with os.scandir(port_dir) as boards: + for entry in boards: + if not entry.is_dir(): + continue + contents = "" + board_dir = os.path.join(entry.path, "mpconfigboard.mk") + #print(board_dir) + with open(board_dir) as board: + contents = board.read() + for module in modules: + # check if board uses `SMALL_BUILD`. if yes, and current + # module is marked as `FULL_BUILD`, board is excluded + small_build = re.search("CIRCUITPY_SMALL_BUILD = 1", contents) + if small_build and base_json[module]["full_build"] == "1": + base_json[module]["excluded"].append(entry.name) + continue + + # check if module is specifically disabled for this board + re_pattern = "CIRCUITPY_{}\s=\s(\w)".format(module.upper()) + find_module = re.search(re_pattern, contents) + if not find_module: + continue + if (find_module[1] == "0" and + find_module[1] != base_json[module]["default_value"]): + base_json[module]["excluded"].append(entry.name) + + return base_json + +if __name__ == "__main__": + modules = get_shared_bindings() + configs = read_mpconfig() + base = build_json(sorted(modules), configs) + + final_json = json.dumps(base, indent=2) + + shared_bindings_json = 'support_matrix.json' + if 'TRAVIS' in os.environ: + shared_bindings_json = os.path.join('$HOME', shared_bindings_json) + else: + print(final_json) + shared_bindings_json = os.path.join('shared-bindings', shared_bindings_json) + with open(shared_bindings_json, "w") as matrix: + json.dump(base, matrix, indent=2) -- cgit v1.2.3 From 42ed84141ebdf821131bd477700e399f4fa76c98 Mon Sep 17 00:00:00 2001 From: sommersoft Date: Thu, 4 Jul 2019 01:49:40 -0500 Subject: fix late-night directory snafu --- conf.py | 2 +- docs/shared_bindings_matrix.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/conf.py b/conf.py index 3bc7d2764..152c718b5 100644 --- a/conf.py +++ b/conf.py @@ -31,7 +31,7 @@ master_doc = 'docs/index' # in 'shared-bindings/index.rst' shared_bindings_json = 'support_matrix.json' if 'TRAVIS' in os.environ: - shared_bindings_json = os.path.join('$HOME', shared_bindings_json) + shared_bindings_json = os.path.join(os.environ['HOME'], shared_bindings_json) else: shared_bindings_json = os.path.join('shared-bindings', shared_bindings_json) with open(shared_bindings_json) as json_file: diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index ebcadb7ad..5d7ada701 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -122,7 +122,7 @@ if __name__ == "__main__": shared_bindings_json = 'support_matrix.json' if 'TRAVIS' in os.environ: - shared_bindings_json = os.path.join('$HOME', shared_bindings_json) + shared_bindings_json = os.path.join(os.environ['HOME'], shared_bindings_json) else: print(final_json) shared_bindings_json = os.path.join('shared-bindings', shared_bindings_json) -- cgit v1.2.3 From 7378744bb2357c9b949fc3b74a9dfbb4b7cdb85e Mon Sep 17 00:00:00 2001 From: sommersoft Date: Fri, 5 Jul 2019 16:11:19 -0500 Subject: update regex module use to be python3.5 compatible --- docs/shared_bindings_matrix.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index 5d7ada701..f0942b426 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -61,10 +61,10 @@ def build_json(modules, configs): #print(module, "|", find_config) if not find_config: continue - full_build = int("FULL_BUILD" in find_config[0]) + full_build = int("FULL_BUILD" in find_config.group(0)) #print(find_config[1]) if not full_build: - default_val = find_config[1] + default_val = find_config.group(1) else: default_val = "None" base_json[search_name] = { @@ -107,8 +107,8 @@ def get_excluded_boards(base_json): find_module = re.search(re_pattern, contents) if not find_module: continue - if (find_module[1] == "0" and - find_module[1] != base_json[module]["default_value"]): + if (find_module.group(1) == "0" and + find_module.group(1) != base_json[module]["default_value"]): base_json[module]["excluded"].append(entry.name) return base_json -- cgit v1.2.3 From 86e885c5fc1d22217da56d9a0d29b798f95bb99d Mon Sep 17 00:00:00 2001 From: sommersoft Date: Fri, 5 Jul 2019 18:00:26 -0500 Subject: handle module exclusion when the default is to not include a module --- docs/shared_bindings_matrix.py | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index f0942b426..8aa517129 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -106,6 +106,10 @@ def get_excluded_boards(base_json): re_pattern = "CIRCUITPY_{}\s=\s(\w)".format(module.upper()) find_module = re.search(re_pattern, contents) if not find_module: + # check if default inclusion is off ('0'). if the board doesn't + # have it explicitly enabled, its excluded. + if base_json[module]["default_value"] == "0": + base_json[module]["excluded"].append(entry.name) continue if (find_module.group(1) == "0" and find_module.group(1) != base_json[module]["default_value"]): -- cgit v1.2.3 From fce1efc74c0397447a79c94701b9f17cc9038d91 Mon Sep 17 00:00:00 2001 From: sommersoft Date: Sun, 7 Jul 2019 09:14:46 -0500 Subject: more python3.5 compatibility fixes --- docs/shared_bindings_matrix.py | 53 +++++++++++++++++++++--------------------- 1 file changed, 26 insertions(+), 27 deletions(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index 8aa517129..d690e4718 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -85,35 +85,34 @@ def get_excluded_boards(base_json): modules = list(base_json.keys()) for port in SUPPORTED_PORTS: port_dir = "ports/{}/boards".format(port) - with os.scandir(port_dir) as boards: - for entry in boards: - if not entry.is_dir(): + for entry in os.scandir(port_dir): + if not entry.is_dir(): + continue + contents = "" + board_dir = os.path.join(entry.path, "mpconfigboard.mk") + #print(board_dir) + with open(board_dir) as board: + contents = board.read() + for module in modules: + # check if board uses `SMALL_BUILD`. if yes, and current + # module is marked as `FULL_BUILD`, board is excluded + small_build = re.search("CIRCUITPY_SMALL_BUILD = 1", contents) + if small_build and base_json[module]["full_build"] == "1": + base_json[module]["excluded"].append(entry.name) continue - contents = "" - board_dir = os.path.join(entry.path, "mpconfigboard.mk") - #print(board_dir) - with open(board_dir) as board: - contents = board.read() - for module in modules: - # check if board uses `SMALL_BUILD`. if yes, and current - # module is marked as `FULL_BUILD`, board is excluded - small_build = re.search("CIRCUITPY_SMALL_BUILD = 1", contents) - if small_build and base_json[module]["full_build"] == "1": + + # check if module is specifically disabled for this board + re_pattern = "CIRCUITPY_{}\s=\s(\w)".format(module.upper()) + find_module = re.search(re_pattern, contents) + if not find_module: + # check if default inclusion is off ('0'). if the board doesn't + # have it explicitly enabled, its excluded. + if base_json[module]["default_value"] == "0": + base_json[module]["excluded"].append(entry.name) + continue + if (find_module.group(1) == "0" and + find_module.group(1) != base_json[module]["default_value"]): base_json[module]["excluded"].append(entry.name) - continue - - # check if module is specifically disabled for this board - re_pattern = "CIRCUITPY_{}\s=\s(\w)".format(module.upper()) - find_module = re.search(re_pattern, contents) - if not find_module: - # check if default inclusion is off ('0'). if the board doesn't - # have it explicitly enabled, its excluded. - if base_json[module]["default_value"] == "0": - base_json[module]["excluded"].append(entry.name) - continue - if (find_module.group(1) == "0" and - find_module.group(1) != base_json[module]["default_value"]): - base_json[module]["excluded"].append(entry.name) return base_json -- cgit v1.2.3 From b90b63bb2bb27597f87173f10451980c4412757f Mon Sep 17 00:00:00 2001 From: sommersoft Date: Tue, 23 Jul 2019 20:49:37 -0500 Subject: don't use files to pass data; call and return directly in conf.py --- conf.py | 12 +++++------- docs/shared_bindings_matrix.py | 44 +++++++++++++++++------------------------- 2 files changed, 23 insertions(+), 33 deletions(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/conf.py b/conf.py index 152c718b5..0c23028ec 100644 --- a/conf.py +++ b/conf.py @@ -25,17 +25,15 @@ from recommonmark.parser import CommonMarkParser sys.path.insert(0, os.path.abspath('docs')) sys.path.insert(0, os.path.abspath('.')) +import shared_bindings_matrix + master_doc = 'docs/index' # Grab the JSON values to use while building the module support matrix # in 'shared-bindings/index.rst' -shared_bindings_json = 'support_matrix.json' -if 'TRAVIS' in os.environ: - shared_bindings_json = os.path.join(os.environ['HOME'], shared_bindings_json) -else: - shared_bindings_json = os.path.join('shared-bindings', shared_bindings_json) -with open(shared_bindings_json) as json_file: - modules_support_matrix = json.load(json_file) + +modules_support_matrix = shared_bindings_matrix.support_matrix() + html_context = { 'support_matrix': modules_support_matrix } diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index d690e4718..59b67b7b2 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -45,13 +45,13 @@ def read_mpconfig(): return configs -def build_json(modules, configs): +def build_module_map(modules, configs): """ Establish the base of the JSON file, based on the contents from `configs`. Base will contain module names, if they're part of the `FULL_BUILD`, or their default value (0 | 1). """ - base_json = dict() + base = dict() full_build = False for module in modules: full_name = module @@ -67,22 +67,22 @@ def build_json(modules, configs): default_val = find_config.group(1) else: default_val = "None" - base_json[search_name] = { + base[search_name] = { "name": full_name, "full_build": str(full_build), "default_value": default_val, "excluded": [] } - return get_excluded_boards(base_json) + return get_excluded_boards(base) -def get_excluded_boards(base_json): +def get_excluded_boards(base): """ Cycles through each board's `mpconfigboard.mk` file to determine if each module is included or not. Boards are selected by existence in a port listed in `SUPPORTED_PORTS` (e.g. `/port/nrf/feather_52840`) """ - modules = list(base_json.keys()) + modules = list(base.keys()) for port in SUPPORTED_PORTS: port_dir = "ports/{}/boards".format(port) for entry in os.scandir(port_dir): @@ -97,8 +97,8 @@ def get_excluded_boards(base_json): # check if board uses `SMALL_BUILD`. if yes, and current # module is marked as `FULL_BUILD`, board is excluded small_build = re.search("CIRCUITPY_SMALL_BUILD = 1", contents) - if small_build and base_json[module]["full_build"] == "1": - base_json[module]["excluded"].append(entry.name) + if small_build and base[module]["full_build"] == "1": + base[module]["excluded"].append(entry.name) continue # check if module is specifically disabled for this board @@ -107,27 +107,19 @@ def get_excluded_boards(base_json): if not find_module: # check if default inclusion is off ('0'). if the board doesn't # have it explicitly enabled, its excluded. - if base_json[module]["default_value"] == "0": - base_json[module]["excluded"].append(entry.name) + if base[module]["default_value"] == "0": + base[module]["excluded"].append(entry.name) continue if (find_module.group(1) == "0" and - find_module.group(1) != base_json[module]["default_value"]): - base_json[module]["excluded"].append(entry.name) + find_module.group(1) != base[module]["default_value"]): + base[module]["excluded"].append(entry.name) - return base_json + return base -if __name__ == "__main__": + +def support_matrix(): modules = get_shared_bindings() configs = read_mpconfig() - base = build_json(sorted(modules), configs) - - final_json = json.dumps(base, indent=2) - - shared_bindings_json = 'support_matrix.json' - if 'TRAVIS' in os.environ: - shared_bindings_json = os.path.join(os.environ['HOME'], shared_bindings_json) - else: - print(final_json) - shared_bindings_json = os.path.join('shared-bindings', shared_bindings_json) - with open(shared_bindings_json, "w") as matrix: - json.dump(base, matrix, indent=2) + base = build_module_map(sorted(modules), configs) + + return base -- cgit v1.2.3 From a184380dc9a01a88ecb3735d5fbf48e955f2546f Mon Sep 17 00:00:00 2001 From: sommersoft Date: Sat, 27 Jul 2019 09:15:37 -0500 Subject: add port-wide config parsing; add modules-by-board function --- docs/shared_bindings_matrix.py | 148 +++++++++++++++++++++++++++++++++++------ 1 file changed, 128 insertions(+), 20 deletions(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index 59b67b7b2..694a60942 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -29,6 +29,45 @@ import re SUPPORTED_PORTS = ["atmel-samd", "nrf"] +def parse_port_config(contents, chip_keyword=None): + """ Compile a dictionary of port-wide module configs, which may + be categorized by chipset. + """ + chip_fam = "all" + ifeq_found = False + port_config_results = {"all": []} + + chip_pattern = "" + if chip_keyword: + chip_pattern = ( + re.compile("(?<=ifeq\s\(\$\({}\)\,)(\w+)".format(chip_keyword)) + ) + + for line in contents: + if chip_keyword: + if not ifeq_found: + check_ifeq = chip_pattern.search(line) + if check_ifeq: + ifeq_found = True + chip_fam = check_ifeq.group(1) + print("found chip:", chip_fam) + else: + ifeq_found = False + chip_fam = "all" + else: + if "endif" in line: + ifeq_found = False + chip_fam = "all" + + if "CIRCUITPY_" in line: + if chip_fam in port_config_results: + port_config_results[chip_fam].append(line.rstrip("\n")) + else: + port_config_results[chip_fam] = [line.rstrip("\n")] + + #print(port_config_results) + return port_config_results + def get_shared_bindings(): """ Get a list of modules in shared-bindings based on folder names """ @@ -45,13 +84,15 @@ def read_mpconfig(): return configs -def build_module_map(modules, configs): +def build_module_map(): """ Establish the base of the JSON file, based on the contents from `configs`. Base will contain module names, if they're part of the `FULL_BUILD`, or their default value (0 | 1). """ base = dict() + modules = get_shared_bindings() + configs = read_mpconfig() full_build = False for module in modules: full_name = module @@ -71,36 +112,67 @@ def build_module_map(modules, configs): "name": full_name, "full_build": str(full_build), "default_value": default_val, - "excluded": [] + "excluded": {} } - return get_excluded_boards(base) + return base def get_excluded_boards(base): """ Cycles through each board's `mpconfigboard.mk` file to determine if each module is included or not. Boards are selected by existence in a port listed in `SUPPORTED_PORTS` (e.g. `/port/nrf/feather_52840`) + + Boards are further categorized by their respective chipset (SAMD21, + SAMD51, nRF52840, etc.) """ modules = list(base.keys()) + + re_board_chip = None + chip_keyword = None for port in SUPPORTED_PORTS: - port_dir = "ports/{}/boards".format(port) - for entry in os.scandir(port_dir): + # each port appears to use its own define for the chipset + if port in ["atmel-samd"]: + re_board_chip = re.compile("CHIP_FAMILY\s=\s(\w+)") + chip_keyword = "CHIP_FAMILY" + elif port in ["nrf"]: + re_board_chip = re.compile("MCU_VARIANT\s=\s(\w+)") + + port_dir = "ports/{}".format(port) + + port_config_contents = "" + with open(os.path.join(port_dir, "mpconfigport.mk")) as port_config: + port_config_contents = port_config.readlines() + port_config = parse_port_config(port_config_contents, chip_keyword) + + for entry in os.scandir(os.path.join(port_dir, "boards")): if not entry.is_dir(): continue + contents = "" board_dir = os.path.join(entry.path, "mpconfigboard.mk") - #print(board_dir) with open(board_dir) as board: contents = board.read() + + board_chip = re_board_chip.search(contents) + #print(entry.name, board_chip.group(1)) + if not board_chip: + board_chip = "Unknown Chip" + else: + board_chip = board_chip.group(1) + + # add port_config results to contents + contents += "\n" + "\n".join(port_config["all"]) + if board_chip in port_config: + contents += "\n" + "\n".join(port_config[board_chip]) + for module in modules: + board_is_excluded = False # check if board uses `SMALL_BUILD`. if yes, and current # module is marked as `FULL_BUILD`, board is excluded small_build = re.search("CIRCUITPY_SMALL_BUILD = 1", contents) if small_build and base[module]["full_build"] == "1": - base[module]["excluded"].append(entry.name) - continue - + board_is_excluded = True # check if module is specifically disabled for this board re_pattern = "CIRCUITPY_{}\s=\s(\w)".format(module.upper()) find_module = re.search(re_pattern, contents) @@ -108,18 +180,54 @@ def get_excluded_boards(base): # check if default inclusion is off ('0'). if the board doesn't # have it explicitly enabled, its excluded. if base[module]["default_value"] == "0": - base[module]["excluded"].append(entry.name) - continue - if (find_module.group(1) == "0" and - find_module.group(1) != base[module]["default_value"]): - base[module]["excluded"].append(entry.name) - + board_is_excluded = True + else: + if (find_module.group(1) == "0" and + find_module.group(1) != base[module]["default_value"]): + board_is_excluded = True + + if board_is_excluded: + if board_chip in base[module]["excluded"]: + base[module]["excluded"][board_chip].append(entry.name) + else: + base[module]["excluded"][board_chip] = [entry.name] + #print(json.dumps(base, indent=2)) return base -def support_matrix(): - modules = get_shared_bindings() - configs = read_mpconfig() - base = build_module_map(sorted(modules), configs) +def support_matrix_excluded_boards(): + """ Compiles a list of available modules, and which board definitions + do not include them. + """ + base = build_module_map() - return base + return get_excluded_boards(base) + +def support_matrix_by_board(): + """ Compiles a list of the available core modules available for each + board. + """ + base = build_module_map() + base_with_exclusions = get_excluded_boards(base) + + boards = dict() + for port in SUPPORTED_PORTS: + port_dir = "ports/{}/boards".format(port) + for entry in os.scandir(port_dir): + if not entry.is_dir(): + continue + board_modules = [] + for module in base_with_exclusions.keys(): + #print(module) + board_has_module = True + if base_with_exclusions[module]["excluded"]: + for port in base_with_exclusions[module]["excluded"].values(): + #print(port) + if entry.name in port: + board_has_module = False + + if board_has_module: + board_modules.append(base_with_exclusions[module]["name"]) + boards[entry.name] = sorted(board_modules) + + return boards -- cgit v1.2.3 From 69bbdcab91e9aec0715be23633551d15e9a55c9e Mon Sep 17 00:00:00 2001 From: sommersoft Date: Sat, 27 Jul 2019 10:30:57 -0500 Subject: use MICROPY_HW_BOARD_NAME vice board's folder name --- docs/shared_bindings_matrix.py | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index 694a60942..c3ca0258f 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -50,7 +50,7 @@ def parse_port_config(contents, chip_keyword=None): if check_ifeq: ifeq_found = True chip_fam = check_ifeq.group(1) - print("found chip:", chip_fam) + #print("found chip:", chip_fam) else: ifeq_found = False chip_fam = "all" @@ -217,17 +217,28 @@ def support_matrix_by_board(): if not entry.is_dir(): continue board_modules = [] + + board_name = entry.name + board_contents = "" + with open(os.path.join(entry.path, "mpconfigboard.h")) as get_name: + board_contents = get_name.read() + board_name_re = re.search("(?<=MICROPY_HW_BOARD_NAME)\s+(.+)", + board_contents) + if board_name_re: + board_name = board_name_re.group(1).strip('"') + for module in base_with_exclusions.keys(): #print(module) board_has_module = True if base_with_exclusions[module]["excluded"]: for port in base_with_exclusions[module]["excluded"].values(): #print(port) - if entry.name in port: + if board_name in port: board_has_module = False if board_has_module: board_modules.append(base_with_exclusions[module]["name"]) - boards[entry.name] = sorted(board_modules) + boards[board_name] = sorted(board_modules) + #print(json.dumps(boards, indent=2)) return boards -- cgit v1.2.3 From 143275db044ae8a3f1d5aebb5b4c7ddfe49e4d69 Mon Sep 17 00:00:00 2001 From: sommersoft Date: Sat, 27 Jul 2019 11:01:10 -0500 Subject: fix board_exclusion lookup --- docs/shared_bindings_matrix.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index c3ca0258f..ed88efc75 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -233,7 +233,7 @@ def support_matrix_by_board(): if base_with_exclusions[module]["excluded"]: for port in base_with_exclusions[module]["excluded"].values(): #print(port) - if board_name in port: + if entry.name in port: board_has_module = False if board_has_module: -- cgit v1.2.3 From c3dda7c535385e367c761bd968ab117d90825cd2 Mon Sep 17 00:00:00 2001 From: sommersoft Date: Fri, 27 Sep 2019 23:41:34 -0500 Subject: add parsing for 'MINIMAL/DEFAULT'; process inclusion when determined by another module --- docs/shared_bindings_matrix.py | 65 +++++++++++++++++++++++++++++++++++------- 1 file changed, 55 insertions(+), 10 deletions(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index ed88efc75..bfa107a47 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -87,7 +87,8 @@ def read_mpconfig(): def build_module_map(): """ Establish the base of the JSON file, based on the contents from `configs`. Base will contain module names, if they're part of - the `FULL_BUILD`, or their default value (0 | 1). + the `FULL_BUILD`, or their default value (0, 1, or a list of + modules that determine default [see audiocore, audiomixer, etc.]). """ base = dict() @@ -98,16 +99,17 @@ def build_module_map(): full_name = module search_name = module.lstrip("_") re_pattern = "CIRCUITPY_{}\s=\s(.+)".format(search_name.upper()) - find_config = re.search(re_pattern, configs) - #print(module, "|", find_config) + find_config = re.findall(re_pattern, configs) if not find_config: continue - full_build = int("FULL_BUILD" in find_config.group(0)) - #print(find_config[1]) + find_config = ", ".join([x.strip("$()") for x in find_config]) + + full_build = int("CIRCUITPY_FULL_BUILD" in find_config) if not full_build: - default_val = find_config.group(1) + default_val = find_config else: default_val = "None" + base[search_name] = { "name": full_name, "full_build": str(full_build), @@ -115,6 +117,7 @@ def build_module_map(): "excluded": {} } + #print(base) return base @@ -166,6 +169,7 @@ def get_excluded_boards(base): if board_chip in port_config: contents += "\n" + "\n".join(port_config[board_chip]) + check_dependent_modules = dict() for module in modules: board_is_excluded = False # check if board uses `SMALL_BUILD`. if yes, and current @@ -173,14 +177,32 @@ def get_excluded_boards(base): small_build = re.search("CIRCUITPY_SMALL_BUILD = 1", contents) if small_build and base[module]["full_build"] == "1": board_is_excluded = True + + # check if board uses `MINIMAL_BUILD`. if yes, and current + # module is marked as `DEFAULT_BUILD`, board is excluded + min_build = re.search("CIRCUITPY_MINIMAL_BUILD = 1", contents) + if min_build and base[module]["default_value"] == "CIRCUITPY_DEFAULT_BUILD": + board_is_excluded = True + # check if module is specifically disabled for this board re_pattern = "CIRCUITPY_{}\s=\s(\w)".format(module.upper()) find_module = re.search(re_pattern, contents) if not find_module: - # check if default inclusion is off ('0'). if the board doesn't - # have it explicitly enabled, its excluded. - if base[module]["default_value"] == "0": - board_is_excluded = True + if base[module]["default_value"].isdigit(): + # check if default inclusion is off ('0'). if the board doesn't + # have it explicitly enabled, its excluded. + if base[module]["default_value"] == "0": + board_is_excluded = True + else: + # this module is dependent on another module. add it + # to the list to check after processing all other modules. + # only need to check exclusion if it isn't already excluded. + if (not board_is_excluded and + base[module]["default_value"] not in [ + "None", + "CIRCUITPY_DEFAULT_BUILD" + ]): + check_dependent_modules[module] = base[module]["default_value"] else: if (find_module.group(1) == "0" and find_module.group(1) != base[module]["default_value"]): @@ -191,6 +213,29 @@ def get_excluded_boards(base): base[module]["excluded"][board_chip].append(entry.name) else: base[module]["excluded"][board_chip] = [entry.name] + + for module in check_dependent_modules: + depend_results = set() + + parents = check_dependent_modules[module].split("CIRCUITPY_") + parents = [item.strip(", ").lower() for item in parents if item] + + for parent in parents: + if parent in base: + if (board_chip in base[parent]["excluded"] and + entry.name in base[parent]["excluded"][board_chip]): + depend_results.add(False) + else: + depend_results.add(True) + + # only exclude the module if there were zero parents enabled + # as determined by the 'depend_results' set. + if (len(depend_results) == 1 and False in depend_results): + if board_chip in base[module]["excluded"]: + base[module]["excluded"][board_chip].append(entry.name) + else: + base[module]["excluded"][board_chip] = [entry.name] + #print(json.dumps(base, indent=2)) return base -- cgit v1.2.3 From 01ec3b995e8613489791efb3fb8add9a6d662a51 Mon Sep 17 00:00:00 2001 From: sommersoft Date: Wed, 2 Oct 2019 00:02:49 -0500 Subject: use 'any()' vs 'len == 1 & == False' --- docs/shared_bindings_matrix.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index bfa107a47..ba0ec0e4f 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -230,7 +230,7 @@ def get_excluded_boards(base): # only exclude the module if there were zero parents enabled # as determined by the 'depend_results' set. - if (len(depend_results) == 1 and False in depend_results): + if not any(depend_results): if board_chip in base[module]["excluded"]: base[module]["excluded"][board_chip].append(entry.name) else: -- cgit v1.2.3 From 13e0cba6f18c1b569cf014fb4e3f0156ba63622e Mon Sep 17 00:00:00 2001 From: arturo182 Date: Sat, 2 Nov 2019 16:52:26 +0100 Subject: Add initial MIMXRT10XX port --- .github/workflows/build.yml | 3 + .gitmodules | 3 + conf.py | 2 + docs/shared_bindings_matrix.py | 2 +- docs/supported_ports.rst | 1 + ports/mimxrt10xx/.gitignore | 1 + ports/mimxrt10xx/Makefile | 253 ++++++++++ ports/mimxrt10xx/README.md | 3 + ports/mimxrt10xx/background.c | 82 +++ ports/mimxrt10xx/background.h | 38 ++ ports/mimxrt10xx/boards/board.h | 48 ++ ports/mimxrt10xx/boards/feather_mimxrt1011/board.c | 55 ++ .../boards/feather_mimxrt1011/mpconfigboard.h | 31 ++ .../boards/feather_mimxrt1011/mpconfigboard.mk | 21 + ports/mimxrt10xx/boards/feather_mimxrt1011/pins.c | 52 ++ ports/mimxrt10xx/boards/feather_mimxrt1062/board.c | 55 ++ .../boards/feather_mimxrt1062/mpconfigboard.h | 31 ++ .../boards/feather_mimxrt1062/mpconfigboard.mk | 21 + ports/mimxrt10xx/boards/feather_mimxrt1062/pins.c | 45 ++ ports/mimxrt10xx/boards/imxrt1010_evk/board.c | 55 ++ .../boards/imxrt1010_evk/mpconfigboard.h | 31 ++ .../boards/imxrt1010_evk/mpconfigboard.mk | 22 + ports/mimxrt10xx/boards/imxrt1010_evk/pins.c | 37 ++ .../boards/mimxrt1011-bootloader-external-flash.ld | 106 ++++ .../mimxrt10xx/boards/mimxrt1011-external-flash.ld | 123 +++++ .../boards/mimxrt1062-bootloader-external-flash.ld | 106 ++++ ports/mimxrt10xx/common-hal/analogio/AnalogIn.c | 88 ++++ ports/mimxrt10xx/common-hal/analogio/AnalogIn.h | 40 ++ ports/mimxrt10xx/common-hal/analogio/AnalogOut.c | 46 ++ ports/mimxrt10xx/common-hal/analogio/AnalogOut.h | 37 ++ ports/mimxrt10xx/common-hal/analogio/__init__.c | 1 + ports/mimxrt10xx/common-hal/board/__init__.c | 35 ++ ports/mimxrt10xx/common-hal/busio/I2C.c | 192 +++++++ ports/mimxrt10xx/common-hal/busio/I2C.h | 44 ++ ports/mimxrt10xx/common-hal/busio/OneWire.h | 33 ++ ports/mimxrt10xx/common-hal/busio/SPI.c | 318 ++++++++++++ ports/mimxrt10xx/common-hal/busio/SPI.h | 46 ++ ports/mimxrt10xx/common-hal/busio/UART.c | 252 ++++++++++ ports/mimxrt10xx/common-hal/busio/UART.h | 54 ++ ports/mimxrt10xx/common-hal/busio/__init__.c | 1 + .../mimxrt10xx/common-hal/digitalio/DigitalInOut.c | 170 +++++++ .../mimxrt10xx/common-hal/digitalio/DigitalInOut.h | 43 ++ ports/mimxrt10xx/common-hal/digitalio/__init__.c | 1 + ports/mimxrt10xx/common-hal/microcontroller/Pin.c | 226 +++++++++ ports/mimxrt10xx/common-hal/microcontroller/Pin.h | 51 ++ .../common-hal/microcontroller/Processor.c | 65 +++ .../common-hal/microcontroller/Processor.h | 40 ++ .../common-hal/microcontroller/__init__.c | 284 +++++++++++ .../common-hal/neopixel_write/__init__.c | 106 ++++ ports/mimxrt10xx/common-hal/os/__init__.c | 72 +++ ports/mimxrt10xx/common-hal/pulseio/PWMOut.c | 551 +++++++++++++++++++++ ports/mimxrt10xx/common-hal/pulseio/PWMOut.h | 44 ++ ports/mimxrt10xx/common-hal/pulseio/PulseIn.c | 248 ++++++++++ ports/mimxrt10xx/common-hal/pulseio/PulseIn.h | 55 ++ ports/mimxrt10xx/common-hal/pulseio/PulseOut.c | 207 ++++++++ ports/mimxrt10xx/common-hal/pulseio/PulseOut.h | 45 ++ ports/mimxrt10xx/common-hal/pulseio/__init__.c | 1 + ports/mimxrt10xx/common-hal/rtc/RTC.c | 76 +++ ports/mimxrt10xx/common-hal/rtc/RTC.h | 34 ++ ports/mimxrt10xx/common-hal/rtc/__init__.c | 0 ports/mimxrt10xx/common-hal/supervisor/Runtime.c | 37 ++ ports/mimxrt10xx/common-hal/supervisor/Runtime.h | 37 ++ ports/mimxrt10xx/common-hal/supervisor/__init__.c | 40 ++ ports/mimxrt10xx/common-hal/time/__init__.c | 39 ++ ports/mimxrt10xx/fatfs_port.c | 48 ++ ports/mimxrt10xx/mpconfigport.h | 51 ++ ports/mimxrt10xx/mpconfigport.mk | 20 + ports/mimxrt10xx/mphalport.c | 65 +++ ports/mimxrt10xx/mphalport.h | 52 ++ .../peripherals/mimxrt10xx/MIMXRT1011/clocks.c | 293 +++++++++++ .../peripherals/mimxrt10xx/MIMXRT1011/periph.c | 148 ++++++ .../peripherals/mimxrt10xx/MIMXRT1011/periph.h | 42 ++ .../peripherals/mimxrt10xx/MIMXRT1011/pins.c | 77 +++ .../peripherals/mimxrt10xx/MIMXRT1011/pins.h | 77 +++ .../peripherals/mimxrt10xx/MIMXRT1062/clocks.c | 366 ++++++++++++++ .../peripherals/mimxrt10xx/MIMXRT1062/periph.c | 270 ++++++++++ .../peripherals/mimxrt10xx/MIMXRT1062/periph.h | 42 ++ .../peripherals/mimxrt10xx/MIMXRT1062/pins.c | 161 ++++++ .../peripherals/mimxrt10xx/MIMXRT1062/pins.h | 161 ++++++ ports/mimxrt10xx/peripherals/mimxrt10xx/clocks.h | 29 ++ ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h | 77 +++ ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h | 75 +++ ports/mimxrt10xx/qstrdefsport.h | 1 + ports/mimxrt10xx/reset.c | 39 ++ ports/mimxrt10xx/reset.h | 43 ++ ports/mimxrt10xx/sdk | 1 + ports/mimxrt10xx/supervisor/cpu.S | 27 + .../mimxrt10xx/supervisor/flexspi_nor_flash_ops.c | 347 +++++++++++++ ports/mimxrt10xx/supervisor/internal_flash.c | 255 ++++++++++ ports/mimxrt10xx/supervisor/internal_flash.h | 53 ++ .../supervisor/internal_flash_root_pointers.h | 31 ++ ports/mimxrt10xx/supervisor/port.c | 168 +++++++ ports/mimxrt10xx/supervisor/serial.c | 93 ++++ ports/mimxrt10xx/supervisor/usb.c | 56 +++ ports/mimxrt10xx/tick.c | 92 ++++ ports/mimxrt10xx/tick.h | 43 ++ tools/uf2 | 2 +- 97 files changed, 8189 insertions(+), 2 deletions(-) create mode 100644 ports/mimxrt10xx/.gitignore create mode 100644 ports/mimxrt10xx/Makefile create mode 100644 ports/mimxrt10xx/README.md create mode 100644 ports/mimxrt10xx/background.c create mode 100644 ports/mimxrt10xx/background.h create mode 100644 ports/mimxrt10xx/boards/board.h create mode 100644 ports/mimxrt10xx/boards/feather_mimxrt1011/board.c create mode 100644 ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h create mode 100644 ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk create mode 100644 ports/mimxrt10xx/boards/feather_mimxrt1011/pins.c create mode 100644 ports/mimxrt10xx/boards/feather_mimxrt1062/board.c create mode 100644 ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h create mode 100644 ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk create mode 100644 ports/mimxrt10xx/boards/feather_mimxrt1062/pins.c create mode 100644 ports/mimxrt10xx/boards/imxrt1010_evk/board.c create mode 100644 ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h create mode 100644 ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk create mode 100644 ports/mimxrt10xx/boards/imxrt1010_evk/pins.c create mode 100644 ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld create mode 100644 ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld create mode 100644 ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld create mode 100644 ports/mimxrt10xx/common-hal/analogio/AnalogIn.c create mode 100644 ports/mimxrt10xx/common-hal/analogio/AnalogIn.h create mode 100644 ports/mimxrt10xx/common-hal/analogio/AnalogOut.c create mode 100644 ports/mimxrt10xx/common-hal/analogio/AnalogOut.h create mode 100644 ports/mimxrt10xx/common-hal/analogio/__init__.c create mode 100644 ports/mimxrt10xx/common-hal/board/__init__.c create mode 100644 ports/mimxrt10xx/common-hal/busio/I2C.c create mode 100644 ports/mimxrt10xx/common-hal/busio/I2C.h create mode 100644 ports/mimxrt10xx/common-hal/busio/OneWire.h create mode 100644 ports/mimxrt10xx/common-hal/busio/SPI.c create mode 100644 ports/mimxrt10xx/common-hal/busio/SPI.h create mode 100644 ports/mimxrt10xx/common-hal/busio/UART.c create mode 100644 ports/mimxrt10xx/common-hal/busio/UART.h create mode 100644 ports/mimxrt10xx/common-hal/busio/__init__.c create mode 100644 ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c create mode 100644 ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.h create mode 100644 ports/mimxrt10xx/common-hal/digitalio/__init__.c create mode 100644 ports/mimxrt10xx/common-hal/microcontroller/Pin.c create mode 100644 ports/mimxrt10xx/common-hal/microcontroller/Pin.h create mode 100644 ports/mimxrt10xx/common-hal/microcontroller/Processor.c create mode 100644 ports/mimxrt10xx/common-hal/microcontroller/Processor.h create mode 100644 ports/mimxrt10xx/common-hal/microcontroller/__init__.c create mode 100644 ports/mimxrt10xx/common-hal/neopixel_write/__init__.c create mode 100644 ports/mimxrt10xx/common-hal/os/__init__.c create mode 100644 ports/mimxrt10xx/common-hal/pulseio/PWMOut.c create mode 100644 ports/mimxrt10xx/common-hal/pulseio/PWMOut.h create mode 100644 ports/mimxrt10xx/common-hal/pulseio/PulseIn.c create mode 100644 ports/mimxrt10xx/common-hal/pulseio/PulseIn.h create mode 100644 ports/mimxrt10xx/common-hal/pulseio/PulseOut.c create mode 100644 ports/mimxrt10xx/common-hal/pulseio/PulseOut.h create mode 100644 ports/mimxrt10xx/common-hal/pulseio/__init__.c create mode 100644 ports/mimxrt10xx/common-hal/rtc/RTC.c create mode 100644 ports/mimxrt10xx/common-hal/rtc/RTC.h create mode 100644 ports/mimxrt10xx/common-hal/rtc/__init__.c create mode 100755 ports/mimxrt10xx/common-hal/supervisor/Runtime.c create mode 100755 ports/mimxrt10xx/common-hal/supervisor/Runtime.h create mode 100755 ports/mimxrt10xx/common-hal/supervisor/__init__.c create mode 100644 ports/mimxrt10xx/common-hal/time/__init__.c create mode 100644 ports/mimxrt10xx/fatfs_port.c create mode 100644 ports/mimxrt10xx/mpconfigport.h create mode 100644 ports/mimxrt10xx/mpconfigport.mk create mode 100644 ports/mimxrt10xx/mphalport.c create mode 100644 ports/mimxrt10xx/mphalport.h create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.h create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.c create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.h create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/clocks.h create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h create mode 100644 ports/mimxrt10xx/qstrdefsport.h create mode 100644 ports/mimxrt10xx/reset.c create mode 100644 ports/mimxrt10xx/reset.h create mode 160000 ports/mimxrt10xx/sdk create mode 100755 ports/mimxrt10xx/supervisor/cpu.S create mode 100644 ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c create mode 100644 ports/mimxrt10xx/supervisor/internal_flash.c create mode 100644 ports/mimxrt10xx/supervisor/internal_flash.h create mode 100644 ports/mimxrt10xx/supervisor/internal_flash_root_pointers.h create mode 100644 ports/mimxrt10xx/supervisor/port.c create mode 100644 ports/mimxrt10xx/supervisor/serial.c create mode 100644 ports/mimxrt10xx/supervisor/usb.c create mode 100644 ports/mimxrt10xx/tick.c create mode 100644 ports/mimxrt10xx/tick.h (limited to 'docs/shared_bindings_matrix.py') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 903948657..041b8b27c 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -102,6 +102,8 @@ jobs: - "feather_m0_rfm9x" - "feather_m0_supersized" - "feather_m4_express" + - "feather_mimxrt1011" + - "feather_mimxrt1062" - "feather_nrf52840_express" - "feather_radiofruit_zigbee" - "feather_stm32f405_express" @@ -109,6 +111,7 @@ jobs: - "grandcentral_m4_express" - "hallowing_m0_express" - "hallowing_m4_express" + - "imxrt1010_evk" - "itsybitsy_m0_express" - "itsybitsy_m4_express" - "itsybitsy_nrf52840_express" diff --git a/.gitmodules b/.gitmodules index da2360cb7..44fc818c8 100644 --- a/.gitmodules +++ b/.gitmodules @@ -108,3 +108,6 @@ [submodule "lib/mp3"] path = lib/mp3 url = https://github.com/adafruit/Adafruit_MP3 +[submodule "ports/mimxrt10xx/sdk"] + path = ports/mimxrt10xx/sdk + url = https://github.com/arturo182/MIMXRT10xx_SDK diff --git a/conf.py b/conf.py index 2e48703c9..abee78aba 100644 --- a/conf.py +++ b/conf.py @@ -131,6 +131,8 @@ exclude_patterns = ["**/build*", "ports/esp8266/common-hal", "ports/esp8266/modules", "ports/minimal", + "ports/mimxrt10xx/peripherals", + "ports/mimxrt10xx/sdk", "ports/nrf/device", "ports/nrf/bluetooth", "ports/nrf/modules", diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index ba0ec0e4f..6e0fc34bd 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -26,7 +26,7 @@ import os import re -SUPPORTED_PORTS = ["atmel-samd", "nrf"] +SUPPORTED_PORTS = ["atmel-samd", "nrf", "mimxrt10xx"] def parse_port_config(contents, chip_keyword=None): diff --git a/docs/supported_ports.rst b/docs/supported_ports.rst index 13f1e6507..9416a9c4f 100644 --- a/docs/supported_ports.rst +++ b/docs/supported_ports.rst @@ -8,6 +8,7 @@ and ESP8266. :maxdepth: 2 ../ports/atmel-samd/README + ../ports/mimxrt10xx/README ../ports/nrf/README ../ports/stm32f4/README ../ports/cxd56/README diff --git a/ports/mimxrt10xx/.gitignore b/ports/mimxrt10xx/.gitignore new file mode 100644 index 000000000..414487d53 --- /dev/null +++ b/ports/mimxrt10xx/.gitignore @@ -0,0 +1 @@ +build-*/ diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile new file mode 100644 index 000000000..68ddea565 --- /dev/null +++ b/ports/mimxrt10xx/Makefile @@ -0,0 +1,253 @@ +# This file is part of the MicroPython project, http://micropython.org/ +# +# The MIT License (MIT) +# +# Copyright (c) 2019 Dan Halbert for Adafruit Industries +# Copyright (c) 2019 Artur Pacholec +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +# Select the board to build for. +ifeq ($(BOARD),) + $(error You must provide a BOARD parameter) +else + ifeq ($(wildcard boards/$(BOARD)/.),) + $(error Invalid BOARD specified) + endif +endif + +# If the build directory is not given, make it reflect the board name. +BUILD ?= build-$(BOARD) + +include ../../py/mkenv.mk +# Board-specific +include boards/$(BOARD)/mpconfigboard.mk +# Port-specific +include mpconfigport.mk +# CircuitPython-specific +include $(TOP)/py/circuitpy_mpconfig.mk + +# qstr definitions (must come before including py.mk) +QSTR_DEFS = qstrdefsport.h + +# include py core make definitions +include $(TOP)/py/py.mk + +include $(TOP)/supervisor/supervisor.mk + +# Include make rules and variables common across CircuitPython builds. +include $(TOP)/py/circuitpy_defns.mk + +CROSS_COMPILE = arm-none-eabi- + +INC += \ + -I. \ + -I../.. \ + -I../lib/mp-readline \ + -I../lib/timeutils \ + -I../../lib/tinyusb/src \ + -I../../supervisor/shared/usb \ + -I$(BUILD) \ + -Iboards/ \ + -Iboards/$(BOARD) \ + -Iperipherals/ \ + -Iperipherals/mimxrt10xx/ \ + -Isdk/CMSIS/Include \ + -Isdk/devices/$(CHIP_FAMILY) \ + -Isdk/devices/$(CHIP_FAMILY)/drivers \ + +# NDEBUG disables assert() statements. This reduces code size pretty dramatically, per tannewt. + +CFLAGS += -Os -DNDEBUG + +# TinyUSB defines +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=256 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=256 -DCFG_TUD_MSC_BUFSIZE=1024 + +#Debugging/Optimization +ifeq ($(DEBUG), 1) + CFLAGS += -ggdb + # You may want to disable -flto if it interferes with debugging. + #CFLAGS += -flto -flto-partition=none + # You may want to enable these flags to make setting breakpoints easier. + CFLAGS += -fno-inline -fno-ipa-sra +else + # -finline-limit can shrink the image size. + # -finline-limit=80 or so is similar to not having it on. + # There is no simple default value, though. + + # Do a default shrink for small builds. + ifndef CFLAGS_INLINE_LIMIT + ifeq ($(CIRCUITPY_SMALL_BUILD),1) + CFLAGS_INLINE_LIMIT = 50 + endif + endif + + ifdef CFLAGS_INLINE_LIMIT + CFLAGS += -finline-limit=$(CFLAGS_INLINE_LIMIT) + endif + #CFLAGS += -flto -flto-partition=none +endif + +CFLAGS += $(INC) -Wall -Wno-cast-align -std=gnu11 -nostdlib $(BASE_CFLAGS) $(CFLAGS_MOD) $(COPT) + +CFLAGS += \ + -mthumb \ + -mapcs \ + -mcpu=cortex-m7 \ + -mfloat-abi=hard \ + -mfpu=fpv5-sp-d16 \ + -DCPU_$(CHIP_VARIANT) \ + -DDEBUG \ + -DXIP_EXTERNAL_FLASH=1 \ + -DXIP_BOOT_HEADER_ENABLE=1 \ + -D__START=main \ + -Os -g3 -Wno-unused-parameter \ + -ffunction-sections -fdata-sections -fstack-usage \ + -D__STARTUP_CLEAR_BSS + +LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs +LIBS := -lgcc -lc -lnosys -lm + +# Use toolchain libm if we're not using our own. +ifndef INTERNAL_LIBM +LIBS += -lm +endif + +LDFLAGS += -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-sp-d16 -mthumb -mapcs +BOOTLOADER_SIZE := 0x6000C000 + +SRC_SDK := \ + drivers/fsl_adc.c \ + drivers/fsl_cache.c \ + drivers/fsl_clock.c \ + drivers/fsl_common.c \ + drivers/fsl_flexspi.c \ + drivers/fsl_gpio.c \ + drivers/fsl_lpi2c.c \ + drivers/fsl_lpspi.c \ + drivers/fsl_lpuart.c \ + drivers/fsl_ocotp.c \ + drivers/fsl_pwm.c \ + drivers/fsl_snvs_hp.c \ + drivers/fsl_tempmon.c \ + drivers/fsl_trng.c \ + system_$(CHIP_FAMILY).c \ + +SRC_SDK := $(addprefix sdk/devices/$(CHIP_FAMILY)/, $(SRC_SDK)) + +SRC_C = \ + background.c \ + boards/$(BOARD)/board.c \ + boards/$(BOARD)/pins.c \ + fatfs_port.c \ + lib/mp-readline/readline.c \ + lib/oofatfs/ff.c \ + lib/oofatfs/option/ccsbcs.c \ + lib/timeutils/timeutils.c \ + lib/utils/buffer_helper.c \ + lib/utils/context_manager_helpers.c \ + lib/utils/interrupt_char.c \ + lib/utils/pyexec.c \ + lib/utils/stdout_helpers.c \ + lib/utils/sys_stdio_mphal.c \ + lib/tinyusb/src/portable/nxp/transdimension/dcd_transdimension.c \ + mphalport.c \ + peripherals/mimxrt10xx/$(CHIP_FAMILY)/clocks.c \ + peripherals/mimxrt10xx/$(CHIP_FAMILY)/periph.c \ + peripherals/mimxrt10xx/$(CHIP_FAMILY)/pins.c \ + reset.c \ + supervisor/flexspi_nor_flash_ops.c \ + supervisor/shared/memory.c \ + tick.c + +ifeq ($(CIRCUITPY_NETWORK),1) +CFLAGS += -DMICROPY_PY_NETWORK=1 + +SRC_MOD += lib/netutils/netutils.c + +ifneq ($(MICROPY_PY_WIZNET5K),0) +WIZNET5K_DIR=drivers/wiznet5k +INC += -I$(TOP)/$(WIZNET5K_DIR) +CFLAGS_MOD += -DMICROPY_PY_WIZNET5K=$(MICROPY_PY_WIZNET5K) -D_WIZCHIP_=$(MICROPY_PY_WIZNET5K) +SRC_MOD += $(addprefix $(WIZNET5K_DIR)/,\ + ethernet/w$(MICROPY_PY_WIZNET5K)/w$(MICROPY_PY_WIZNET5K).c \ + ethernet/wizchip_conf.c \ + ethernet/socket.c \ + internet/dns/dns.c \ + internet/dhcp/dhcp.c \ + ) + +endif # MICROPY_PY_WIZNET5K +endif # CIRCUITPY_NETWORK + +ifeq ($(CIRCUITPY_NETWORK),1) +ifneq ($(MICROPY_PY_WIZNET5K),0) +SRC_SHARED_MODULE += wiznet/__init__.c wiznet/wiznet5k.c +endif +endif + +# TODO +#ifeq ($(CIRCUITPY_AUDIOBUSIO),1) +#SRC_C += peripherals/samd/i2s.c peripherals/samd/$(CHIP_FAMILY)/i2s.c +#endif +# +SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ + $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ + $(addprefix common-hal/, $(SRC_COMMON_HAL)) + +SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL)) + +SRC_S = \ + sdk/devices/$(CHIP_FAMILY)/gcc/startup_$(CHIP_FAMILY).S \ + supervisor/cpu.S + +OBJ = $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_SDK:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o)) +ifeq ($(INTERNAL_LIBM),1) +OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) +endif +OBJ += $(addprefix $(BUILD)/, $(SRC_S:.S=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) + +SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) + +all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 + +$(BUILD)/firmware.elf: $(LD_FILE) $(OBJ) + $(STEPECHO) "LINK $@" + $(Q)$(CC) -o $@ $(LDFLAGS) $(filter-out $<,$^) -Wl,--start-group $(LIBS) -Wl,--end-group + +$(BUILD)/firmware.bin: $(BUILD)/firmware.elf + $(STEPECHO) "Create $@" + $(Q)$(OBJCOPY) -O binary -j .interrupts -j .text -j .ARM.exidx -j .data $^ $@ + +$(BUILD)/firmware.uf2: $(BUILD)/firmware.bin + $(STEPECHO) "Create $@" + $(Q)$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -b $(BOOTLOADER_SIZE) -f MIMXRT10XX -c -o $@ $^ + +include $(TOP)/py/mkrules.mk + +# Print out the value of a make variable. +# https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile +print-%: + @echo $* = $($*) diff --git a/ports/mimxrt10xx/README.md b/ports/mimxrt10xx/README.md new file mode 100644 index 000000000..fe7fd5ea6 --- /dev/null +++ b/ports/mimxrt10xx/README.md @@ -0,0 +1,3 @@ +# CircuitPython Port To The NXP i.MX RT10xx Series + +This is a port of CircuitPython to the i.MX RT10xx series of chips. diff --git a/ports/mimxrt10xx/background.c b/ports/mimxrt10xx/background.c new file mode 100644 index 000000000..8c7333cf8 --- /dev/null +++ b/ports/mimxrt10xx/background.c @@ -0,0 +1,82 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "background.h" + +//#include "audio_dma.h" +#include "tick.h" +#include "supervisor/filesystem.h" +#include "supervisor/shared/tick.h" +#include "supervisor/usb.h" + +#include "py/runtime.h" +#include "shared-module/network/__init__.h" +#include "supervisor/shared/stack.h" + +// TODO +#ifdef CIRCUITPY_DISPLAYIO +//#include "shared-module/displayio/__init__.h" +#endif + +volatile uint64_t last_finished_tick = 0; + +bool stack_ok_so_far = true; + +static bool running_background_tasks = false; + +void background_tasks_reset(void) { + running_background_tasks = false; +} + +void run_background_tasks(void) { + // Don't call ourselves recursively. + if (running_background_tasks) { + return; + } + assert_heap_ok(); + running_background_tasks = true; + + #if CIRCUITPY_AUDIOIO || CIRCUITPY_AUDIOBUSIO + audio_dma_background(); + #endif + #if CIRCUITPY_DISPLAYIO + displayio_background(); + #endif + + #if CIRCUITPY_NETWORK + network_module_background(); + #endif + filesystem_background(); + usb_background(); + running_background_tasks = false; + assert_heap_ok(); + + last_finished_tick = supervisor_ticks_ms64(); +} + +bool background_tasks_ok(void) { + return supervisor_ticks_ms64() - last_finished_tick < 1000; +} diff --git a/ports/mimxrt10xx/background.h b/ports/mimxrt10xx/background.h new file mode 100644 index 000000000..52789d038 --- /dev/null +++ b/ports/mimxrt10xx/background.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_BACKGROUND_H +#define MICROPY_INCLUDED_MIMXRT10XX_BACKGROUND_H + +#include + +void background_tasks_reset(void); +void run_background_tasks(void); +void run_background_vm_tasks(void); +bool background_tasks_ok(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_BACKGROUND_H diff --git a/ports/mimxrt10xx/boards/board.h b/ports/mimxrt10xx/boards/board.h new file mode 100644 index 000000000..92d02d900 --- /dev/null +++ b/ports/mimxrt10xx/boards/board.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// This file defines board specific functions. + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_BOARDS_BOARD_H +#define MICROPY_INCLUDED_MIMXRT10XX_BOARDS_BOARD_H + +#include + +#include "py/mpconfig.h" +#include "fsl_common.h" + +// Initializes board related state once on start up. +void board_init(void); + +// Returns true if the user initiates safe mode in a board specific way. +// Also add BOARD_USER_SAFE_MODE in mpconfigboard.h to explain the board specific +// way. +bool board_requests_safe_mode(void); + +// Reset the state of off MCU components such as neopixels. +void reset_board(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_BOARDS_BOARD_H diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c b/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c new file mode 100644 index 000000000..8e73df4ad --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "fsl_iomuxc.h" + +void board_init(void) { + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1,1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 1U); + + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B,0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 0x10E1U); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h new file mode 100644 index 000000000..98d1f478b --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h @@ -0,0 +1,31 @@ +#define MICROPY_HW_BOARD_NAME "Feather MIMXRT1011" +#define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A" + +//TODO +//#define MICROPY_HW_LED_STATUS (&pin_PA27) + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO_SD_05) + +// These are pins not to reset. +// QSPI Data pins +//#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 ) +// QSPI CS, and QSPI SCK +//#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 ) +//#define MICROPY_PORT_C ( 0 ) +//#define MICROPY_PORT_D ( 0 ) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (8 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_10) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_09) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_AD_06) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_04) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_03) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_01) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_02) diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk new file mode 100644 index 000000000..6efd3f329 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk @@ -0,0 +1,21 @@ +LD_FILE = boards/mimxrt1011-bootloader-external-flash.ld +USB_VID = 0x239A +USB_PID = 0x8074 +USB_PRODUCT = "Feather MIMXRT1011" +USB_MANUFACTURER = "arturo182" +USB_DEVICES = "CDC,MSC,HID" + +CHIP_VARIANT = MIMXRT1011DAE5A +CHIP_FAMILY = MIMXRT1011 + +INTERNAL_FLASH_FILESYSTEM = 1 + +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_NVM = 0 +CIRCUITPY_ROTARYIO = 0 + +LONGINT_IMPL = MPZ diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/pins.c b/ports/mimxrt10xx/boards/feather_mimxrt1011/pins.c new file mode 100644 index 000000000..2c6c1ce93 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/pins.c @@ -0,0 +1,52 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + // Analog + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_07) }, + + // Digital + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_05) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_AD_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_AD_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_AD_04) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_01) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_10) }, + + // ESP control + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_CS), MP_ROM_PTR(&pin_GPIO_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_GPIO0), MP_ROM_PTR(&pin_GPIO_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_BUSY), MP_ROM_PTR(&pin_GPIO_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RESET), MP_ROM_PTR(&pin_GPIO_AD_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_TX), MP_ROM_PTR(&pin_GPIO_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RX), MP_ROM_PTR(&pin_GPIO_11) }, + //{ MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RTS), MP_ROM_PTR(&pin_) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO_SD_05) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c b/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c new file mode 100644 index 000000000..979dd82ce --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "fsl_iomuxc.h" + +void board_init(void) { + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK,1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, 1U); + + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B,0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, 0x10E1U); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h new file mode 100644 index 000000000..b91209c82 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h @@ -0,0 +1,31 @@ +#define MICROPY_HW_BOARD_NAME "Feather MIMXRT1062" +#define MICROPY_HW_MCU_NAME "IMXRT1062DVJ6A" + +//TODO +//#define MICROPY_HW_LED_STATUS (&pin_PA27) + +//#define MICROPY_HW_NEOPIXEL (&pin_PB22) + +// These are pins not to reset. +// QSPI Data pins +//#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 ) +// QSPI CS, and QSPI SCK +//#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 ) +//#define MICROPY_PORT_C ( 0 ) +//#define MICROPY_PORT_D ( 0 ) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (8 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_EMC_22) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_EMC_21) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_B1_07) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_B1_06) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_B1_05) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_B1_03) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_B1_02) diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk new file mode 100644 index 000000000..b2e356e55 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk @@ -0,0 +1,21 @@ +LD_FILE = boards/mimxrt1062-bootloader-external-flash.ld +USB_VID = 0x239A +USB_PID = 0x8076 +USB_PRODUCT = "Feather MIMXRT1062" +USB_MANUFACTURER = "arturo182" +USB_DEVICES = "CDC,MSC,HID" + +CHIP_VARIANT = MIMXRT1062DVJ6A +CHIP_FAMILY = MIMXRT1062 + +INTERNAL_FLASH_FILESYSTEM = 1 + +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_NVM = 0 +CIRCUITPY_ROTARYIO = 0 + +LONGINT_IMPL = MPZ diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/pins.c b/ports/mimxrt10xx/boards/feather_mimxrt1062/pins.c new file mode 100644 index 000000000..eb287b87a --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/pins.c @@ -0,0 +1,45 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + // Analog + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B0_14) }, + + // Digital + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_EMC_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_EMC_28) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_EMC_29) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_EMC_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_EMC_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_EMC_23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_EMC_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_B1_08) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_B1_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_B1_06) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_B1_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_B1_03) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_EMC_21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_EMC_22) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO_SD_B1_01) }, + + // TODO: Big connector + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/board.c b/ports/mimxrt10xx/boards/imxrt1010_evk/board.c new file mode 100644 index 000000000..8e73df4ad --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/board.c @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "fsl_iomuxc.h" + +void board_init(void) { + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1,1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 1U); + IOMUXC_SetPinMux(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 1U); + + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B,0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 0x10E1U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 0x10E1U); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h new file mode 100644 index 000000000..12cb5e8a8 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h @@ -0,0 +1,31 @@ +#define MICROPY_HW_BOARD_NAME "IMXRT1010-EVK" +#define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A" + +//TODO +//#define MICROPY_HW_LED_STATUS (&pin_PA27) + +//#define MICROPY_HW_NEOPIXEL (&pin_PB22) + +// These are pins not to reset. +// QSPI Data pins +//#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 ) +// QSPI CS, and QSPI SCK +//#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 ) +//#define MICROPY_PORT_C ( 0 ) +//#define MICROPY_PORT_D ( 0 ) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (16 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_02) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_01) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_AD_06) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_04) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_03) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_09) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_10) diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk new file mode 100644 index 000000000..4401647c4 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk @@ -0,0 +1,22 @@ +LD_FILE = boards/mimxrt1011-bootloader-external-flash.ld +USB_VID = 0x239A +USB_PID = 0x8078 +USB_PRODUCT = "IMXRT1010-EVK" +USB_MANUFACTURER = "NXP" +USB_DEVICES = "CDC,MSC,HID" + +CHIP_VARIANT = MIMXRT1011DAE5A +CHIP_FAMILY = MIMXRT1011 + +INTERNAL_FLASH_FILESYSTEM = 1 + +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_NEOPIXEL_WRITE = 0 +CIRCUITPY_NVM = 0 +CIRCUITPY_ROTARYIO = 0 + +LONGINT_IMPL = MPZ diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c b/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c new file mode 100644 index 000000000..cfc876369 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c @@ -0,0 +1,37 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_AD_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_AD_06) }, + //{ MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_08) }, // Connected to audio codec + //{ MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_01) }, // Connected to audio codec + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_AD_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_AD_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_SD_02) }, + //{ MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_03) }, // Connected to audio codec + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_AD_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_AD_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_AD_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_AD_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_02) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_02) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_USR_LED), MP_ROM_PTR(&pin_GPIO_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_USR_SW), MP_ROM_PTR(&pin_GPIO_SD_05) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld b/ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld new file mode 100644 index 000000000..d36ee1239 --- /dev/null +++ b/ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld @@ -0,0 +1,106 @@ +ENTRY(Reset_Handler) + +_minimum_stack_size = 64K; +_minimum_heap_size = 0; + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x60000000, LENGTH = 8M + FLASH_BOOTLOADER (rx) : ORIGIN = 0x60000000, LENGTH = 48K + FLASH_ISR (rx) : ORIGIN = 0x6000C000, LENGTH = 1K + FLASH_TEXT (rx) : ORIGIN = 0x6000C400, LENGTH = 975K + FLASH_FATFS (r) : ORIGIN = 0x60100000, LENGTH = 7M + RAM (rwx) : ORIGIN = 0x00000000, LENGTH = 32K + OCRAM (rwx) : ORIGIN = 0x20200000, LENGTH = 64K +} + +_estack = ORIGIN(OCRAM) + LENGTH(OCRAM); +_bootloader_dbl_tap = ORIGIN(RAM) + LENGTH(RAM) - 4; + +__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS); +__fatfs_flash_length = LENGTH(FLASH_FATFS); + +__RAM_VECTOR_TABLE_SIZE_BYTES = 0; + +SECTIONS +{ + .interrupts : + { + __VECTOR_TABLE = .; + __VECTOR_RAM = .; + + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > FLASH_ISR + + .text : + { + . = ALIGN(4); + *(EXCLUDE_FILE( + *flexspi_nor_flash_ops.o + *fsl_flexspi.o + ) .text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } > FLASH_TEXT + + .ARM.exidx : + { + *(.ARM.exidx*) + *(.gnu.linkonce.armexidx.*) + _etext = .; /* define a global symbol at end of code */ + __etext = .; /* define a global symbol at end of code */ + } > FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = .; + + .data : AT (_sidata) + { + . = ALIGN(4); + __data_start__ = .; /* create a global symbol at data start */ + + *(.data*) /* .data* sections */ + *flexspi_nor_flash_ops.o(.text*) + *fsl_flexspi.o(.text*) + . = ALIGN(4); + + __data_end__ = .; /* define a global symbol at data end */ + } > RAM + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + + *(.bss*) + *(COMMON) + + . = ALIGN(4); + __bss_end__ = .; + PROVIDE(end = .); + } > RAM + + .heap : + { + . = ALIGN(8); + _heap_start = .; /* define a global symbol at heap start */ + + . += _minimum_heap_size; + + __HeapLimit = .; + } > OCRAM + + .stack : + { + . = ALIGN(8); + . += _minimum_stack_size; + } > OCRAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + +ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data") +ASSERT(_estack - _minimum_stack_size >= __HeapLimit, "region OCRAM overflowed with stack and heap") diff --git a/ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld b/ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld new file mode 100644 index 000000000..f1b0d8554 --- /dev/null +++ b/ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld @@ -0,0 +1,123 @@ +ENTRY(Reset_Handler) + +_minimum_stack_size = 64K; +_minimum_heap_size = 0; + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x60000000, LENGTH = 8M + FLASH_CONFIG (rx) : ORIGIN = 0x60000400, LENGTH = 3K + FLASH_IVT (rx) : ORIGIN = 0x60001000, LENGTH = 4K + FLASH_ISR (rx) : ORIGIN = 0x60002000, LENGTH = 1K + FLASH_TEXT (rx) : ORIGIN = 0x60002400, LENGTH = 1015K + FLASH_FATFS (r) : ORIGIN = 0x60100000, LENGTH = 7M + RAM (rwx) : ORIGIN = 0x00000000, LENGTH = 32K + OCRAM (rwx) : ORIGIN = 0x20200000, LENGTH = 64K +} + +_estack = ORIGIN(OCRAM) + LENGTH(OCRAM); +_bootloader_dbl_tap = 0; + +__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS); +__fatfs_flash_length = LENGTH(FLASH_FATFS); + +__RAM_VECTOR_TABLE_SIZE_BYTES = 0; + +SECTIONS +{ + .flash_config : + { + . = ALIGN(4); + KEEP(* (.boot_hdr.conf)) + . = ALIGN(4); + } > FLASH_CONFIG + + .ivt : + { + . = ALIGN(4); + KEEP(* (.boot_hdr.ivt)) + KEEP(* (.boot_hdr.boot_data)) + KEEP(* (.boot_hdr.dcd_data)) + . = ALIGN(4); + } > FLASH_IVT + + .interrupts : + { + __VECTOR_TABLE = .; + __VECTOR_RAM = .; + + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > FLASH_ISR + + .text : + { + . = ALIGN(4); + *(EXCLUDE_FILE( + *flexspi_nor_flash_ops.o + *fsl_flexspi.o + ) .text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } > FLASH_TEXT + + .ARM.exidx : + { + *(.ARM.exidx*) + *(.gnu.linkonce.armexidx.*) + _etext = .; /* define a global symbol at end of code */ + __etext = .; /* define a global symbol at end of code */ + } > FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = .; + + .data : AT (_sidata) + { + . = ALIGN(4); + __data_start__ = .; /* create a global symbol at data start */ + + *(.data*) /* .data* sections */ + *flexspi_nor_flash_ops.o(.text*) + *fsl_flexspi.o(.text*) + . = ALIGN(4); + + __data_end__ = .; /* define a global symbol at data end */ + } > RAM + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + + *(.bss*) + *(COMMON) + + . = ALIGN(4); + __bss_end__ = .; + PROVIDE(end = .); + } > RAM + + .heap : + { + . = ALIGN(8); + _heap_start = .; /* define a global symbol at heap start */ + + . += _minimum_heap_size; + + __HeapLimit = .; + } > OCRAM + + .stack : + { + . = ALIGN(8); + . += _minimum_stack_size; + } > OCRAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + +ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data") +ASSERT(_estack - _minimum_stack_size >= __HeapLimit, "region OCRAM overflowed with stack and heap") diff --git a/ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld b/ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld new file mode 100644 index 000000000..16442607f --- /dev/null +++ b/ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld @@ -0,0 +1,106 @@ +ENTRY(Reset_Handler) + +_minimum_stack_size = 64K; +_minimum_heap_size = 0; + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x60000000, LENGTH = 8M + FLASH_BOOTLOADER (rx) : ORIGIN = 0x60000000, LENGTH = 48K + FLASH_ISR (rx) : ORIGIN = 0x6000C000, LENGTH = 1K + FLASH_TEXT (rx) : ORIGIN = 0x6000C400, LENGTH = 975K + FLASH_FATFS (r) : ORIGIN = 0x60100000, LENGTH = 7M + RAM (rwx) : ORIGIN = 0x00000000, LENGTH = 128K + OCRAM (rwx) : ORIGIN = 0x20200000, LENGTH = 768K +} + +_estack = ORIGIN(OCRAM) + LENGTH(OCRAM); +_bootloader_dbl_tap = ORIGIN(RAM) + LENGTH(RAM) - 4; + +__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS); +__fatfs_flash_length = LENGTH(FLASH_FATFS); + +__RAM_VECTOR_TABLE_SIZE_BYTES = 0; + +SECTIONS +{ + .interrupts : + { + __VECTOR_TABLE = .; + __VECTOR_RAM = .; + + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } > FLASH_ISR + + .text : + { + . = ALIGN(4); + *(EXCLUDE_FILE( + *flexspi_nor_flash_ops.o + *fsl_flexspi.o + ) .text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } > FLASH_TEXT + + .ARM.exidx : + { + *(.ARM.exidx*) + *(.gnu.linkonce.armexidx.*) + _etext = .; /* define a global symbol at end of code */ + __etext = .; /* define a global symbol at end of code */ + } > FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = .; + + .data : AT (_sidata) + { + . = ALIGN(4); + __data_start__ = .; /* create a global symbol at data start */ + + *(.data*) /* .data* sections */ + *flexspi_nor_flash_ops.o(.text*) + *fsl_flexspi.o(.text*) + . = ALIGN(4); + + __data_end__ = .; /* define a global symbol at data end */ + } > RAM + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + + *(.bss*) + *(COMMON) + + . = ALIGN(4); + __bss_end__ = .; + PROVIDE(end = .); + } > RAM + + .heap : + { + . = ALIGN(8); + _heap_start = .; /* define a global symbol at heap start */ + + . += _minimum_heap_size; + + __HeapLimit = .; + } > OCRAM + + .stack : + { + . = ALIGN(8); + . += _minimum_stack_size; + } > OCRAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + +ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data") +ASSERT(_estack - _minimum_stack_size >= __HeapLimit, "region OCRAM overflowed with stack and heap") diff --git a/ports/mimxrt10xx/common-hal/analogio/AnalogIn.c b/ports/mimxrt10xx/common-hal/analogio/AnalogIn.c new file mode 100644 index 000000000..d714001f3 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/AnalogIn.c @@ -0,0 +1,88 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/analogio/AnalogIn.h" + +#include + +#include "py/runtime.h" + +#include "fsl_adc.h" + +#define ADC_CHANNEL_GROUP 0 + +void common_hal_analogio_analogin_construct(analogio_analogin_obj_t* self, + const mcu_pin_obj_t *pin) { + adc_config_t config = {0}; + + if (pin->adc == NULL) { + mp_raise_ValueError(translate("Pin does not have ADC capabilities")); + } + + ADC_GetDefaultConfig(&config); + + config.enableLongSample = true; + config.samplePeriodMode = kADC_SamplePeriod8or24Clocks; + + ADC_Init(pin->adc, &config); + ADC_SetHardwareAverageConfig(pin->adc, kADC_HardwareAverageCount32); + ADC_DoAutoCalibration(pin->adc); + + claim_pin(pin); + + self->pin = pin; +} + +bool common_hal_analogio_analogin_deinited(analogio_analogin_obj_t *self) { + return self->pin == mp_const_none; +} + +void common_hal_analogio_analogin_deinit(analogio_analogin_obj_t *self) { + if (common_hal_analogio_analogin_deinited(self)) { + return; + } + reset_pin_number(self->pin->number); + self->pin = mp_const_none; +} + +uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { + adc_channel_config_t config = { 0 }; + config.channelNumber = self->pin->adc_channel; + + ADC_SetChannelConfig(self->pin->adc, ADC_CHANNEL_GROUP, &config); + + while (!ADC_GetChannelStatusFlags(self->pin->adc, ADC_CHANNEL_GROUP)) { + + } + + // Shift the value to be 16 bit + return ADC_GetChannelConversionValue(self->pin->adc, ADC_CHANNEL_GROUP) << 4; +} + +float common_hal_analogio_analogin_get_reference_voltage(analogio_analogin_obj_t *self) { + return 3.3f; +} diff --git a/ports/mimxrt10xx/common-hal/analogio/AnalogIn.h b/ports/mimxrt10xx/common-hal/analogio/AnalogIn.h new file mode 100644 index 000000000..c252ab553 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/AnalogIn.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGIN_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGIN_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; +} analogio_analogin_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGIN_H diff --git a/ports/mimxrt10xx/common-hal/analogio/AnalogOut.c b/ports/mimxrt10xx/common-hal/analogio/AnalogOut.c new file mode 100644 index 000000000..6e34a7217 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/AnalogOut.c @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" + +#include "shared-bindings/analogio/AnalogOut.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/translate.h" + +void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, const mcu_pin_obj_t *pin) { + mp_raise_RuntimeError(translate("AnalogOut functionality not supported")); +} + +bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { + return true; +} + +void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { +} + +void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, uint16_t value) { +} diff --git a/ports/mimxrt10xx/common-hal/analogio/AnalogOut.h b/ports/mimxrt10xx/common-hal/analogio/AnalogOut.h new file mode 100644 index 000000000..133cce8fb --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/AnalogOut.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGOUT_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; +} analogio_analogout_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_ANALOGIO_ANALOGOUT_H diff --git a/ports/mimxrt10xx/common-hal/analogio/__init__.c b/ports/mimxrt10xx/common-hal/analogio/__init__.c new file mode 100644 index 000000000..eea58c77d --- /dev/null +++ b/ports/mimxrt10xx/common-hal/analogio/__init__.c @@ -0,0 +1 @@ +// No analogio module functions. diff --git a/ports/mimxrt10xx/common-hal/board/__init__.c b/ports/mimxrt10xx/common-hal/board/__init__.c new file mode 100644 index 000000000..e86251480 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/board/__init__.c @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "py/mphal.h" +#include "common-hal/microcontroller/Pin.h" + +// Pins aren't actually defined here. They are in the board specific directory +// such as boards/imxrt1010_evk/pins.c. diff --git a/ports/mimxrt10xx/common-hal/busio/I2C.c b/ports/mimxrt10xx/common-hal/busio/I2C.c new file mode 100644 index 000000000..3c555df45 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/I2C.c @@ -0,0 +1,192 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "shared-bindings/busio/I2C.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "periph.h" + +#include "fsl_lpi2c.h" + +//TODO + +#define I2C_CLOCK_SOURCE_DIVIDER (5U) +#define I2C_CLOCK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8 / (I2C_CLOCK_SOURCE_DIVIDER + 1U)) + +static void config_periph_pin(const mcu_periph_obj_t *periph) { + IOMUXC_SetPinMux( + periph->pin->mux_reg, periph->mux_mode, + periph->input_reg, periph->input_idx, + 0, + 1); + + IOMUXC_SetPinConfig(0, 0, 0, 0, + periph->pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_HYS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUS(3) + | IOMUXC_SW_PAD_CTL_PAD_PUE(0) + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) + | IOMUXC_SW_PAD_CTL_PAD_ODE(1) + | IOMUXC_SW_PAD_CTL_PAD_SPEED(2) + | IOMUXC_SW_PAD_CTL_PAD_DSE(4) + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); +} + +void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, + const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, uint32_t frequency, uint32_t timeout) { + + const uint32_t sda_count = sizeof(mcu_i2c_sda_list) / sizeof(mcu_periph_obj_t); + const uint32_t scl_count = sizeof(mcu_i2c_scl_list) / sizeof(mcu_periph_obj_t); + + for (uint32_t i = 0; i < sda_count; ++i) { + if (mcu_i2c_sda_list[i].pin != sda) + continue; + + for (uint32_t j = 0; j < scl_count; ++j) { + if (mcu_i2c_scl_list[j].pin != scl) + continue; + + if (mcu_i2c_scl_list[j].bank_idx != mcu_i2c_sda_list[i].bank_idx) + continue; + + self->sda_pin = &mcu_i2c_sda_list[i]; + self->scl_pin = &mcu_i2c_scl_list[j]; + + break; + } + } + + if(self->sda_pin == NULL || self->scl_pin == NULL) { + mp_raise_RuntimeError(translate("Invalid I2C pin selection")); + } else { + self->i2c = mcu_i2c_banks[self->sda_pin->bank_idx - 1]; + } + + config_periph_pin(self->sda_pin); + config_periph_pin(self->scl_pin); + + lpi2c_master_config_t config = { 0 }; + LPI2C_MasterGetDefaultConfig(&config); + + config.baudRate_Hz = frequency; + + LPI2C_MasterInit(self->i2c, &config, I2C_CLOCK_FREQ); + +// if (!gpio_get_pin_level(sda->number) || !gpio_get_pin_level(scl->number)) { +// reset_pin_number(sda->number); +// reset_pin_number(scl->number); +// mp_raise_RuntimeError(translate("SDA or SCL needs a pull up")); +// } + + claim_pin(self->sda_pin->pin); + claim_pin(self->scl_pin->pin); +} + +bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) { + return self->sda_pin == NULL; +} + +void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { + if (common_hal_busio_i2c_deinited(self)) { + return; + } + + LPI2C_MasterDeinit(self->i2c); + +// reset_pin_number(self->sda_pin); +// reset_pin_number(self->scl_pin); + + self->sda_pin = NULL; + self->scl_pin = NULL; +} + +bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) { + lpi2c_master_transfer_t xfer = { 0 }; + xfer.slaveAddress = addr; + + return LPI2C_MasterTransferBlocking(self->i2c, &xfer) == kStatus_Success; +} + +bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) { + bool grabbed_lock = false; +// CRITICAL_SECTION_ENTER() + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } +// CRITICAL_SECTION_LEAVE(); + return grabbed_lock; +} + +bool common_hal_busio_i2c_has_lock(busio_i2c_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) { + self->has_lock = false; +} + +uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, + const uint8_t *data, size_t len, bool transmit_stop_bit) { + + lpi2c_master_transfer_t xfer = { 0 }; + xfer.flags = transmit_stop_bit ? kLPI2C_TransferDefaultFlag : kLPI2C_TransferNoStopFlag; + xfer.slaveAddress = addr; + xfer.data = (uint8_t*)data; + xfer.dataSize = len; + + const status_t status = LPI2C_MasterTransferBlocking(self->i2c, &xfer); + if (status == kStatus_Success) + return 0; + + return MP_EIO; +} + +uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, + uint8_t *data, size_t len) { + + lpi2c_master_transfer_t xfer = { 0 }; + xfer.direction = kLPI2C_Read; + xfer.slaveAddress = addr; + xfer.data = data; + xfer.dataSize = len; + + const status_t status = LPI2C_MasterTransferBlocking(self->i2c, &xfer); + if (status == kStatus_Success) + return 0; + + return MP_EIO; +} + +void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { +// never_reset_sercom(self->i2c_desc.device.hw); +// +// never_reset_pin_number(self->scl_pin); +// never_reset_pin_number(self->sda_pin); +} diff --git a/ports/mimxrt10xx/common-hal/busio/I2C.h b/ports/mimxrt10xx/common-hal/busio/I2C.h new file mode 100644 index 000000000..924e10811 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/I2C.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_I2C_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_I2C_H + +#include "common-hal/microcontroller/Pin.h" +#include "fsl_common.h" +#include "periph.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + LPI2C_Type *i2c; + bool has_lock; + const mcu_periph_obj_t *scl_pin; + const mcu_periph_obj_t *sda_pin; +} busio_i2c_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_I2C_H diff --git a/ports/mimxrt10xx/common-hal/busio/OneWire.h b/ports/mimxrt10xx/common-hal/busio/OneWire.h new file mode 100644 index 000000000..bb4bc016a --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/OneWire.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_ONEWIRE_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_ONEWIRE_H + +// Use bitbangio. +#include "shared-module/busio/OneWire.h" + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_ONEWIRE_H diff --git a/ports/mimxrt10xx/common-hal/busio/SPI.c b/ports/mimxrt10xx/common-hal/busio/SPI.c new file mode 100644 index 000000000..5ff94bcf8 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/SPI.c @@ -0,0 +1,318 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//TODO +#include "shared-bindings/busio/SPI.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "periph.h" + +#include "fsl_lpspi.h" + +#include + +//bool never_reset_sercoms[SERCOM_INST_NUM]; +// +//void never_reset_sercom(Sercom* sercom) { +// // Reset all SERCOMs except the ones being used by on-board devices. +// Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; +// for (int i = 0; i < SERCOM_INST_NUM; i++) { +// if (sercom_instances[i] == sercom) { +// never_reset_sercoms[i] = true; +// break; +// } +// } +//} +// +//void allow_reset_sercom(Sercom* sercom) { +// // Reset all SERCOMs except the ones being used by on-board devices. +// Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; +// for (int i = 0; i < SERCOM_INST_NUM; i++) { +// if (sercom_instances[i] == sercom) { +// never_reset_sercoms[i] = false; +// break; +// } +// } +//} +// +//void reset_sercoms(void) { +// // Reset all SERCOMs except the ones being used by on-board devices. +// Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS; +// for (int i = 0; i < SERCOM_INST_NUM; i++) { +// if (never_reset_sercoms[i]) { +// continue; +// } +// #ifdef MICROPY_HW_APA102_SERCOM +// if (sercom_instances[i] == MICROPY_HW_APA102_SERCOM) { +// continue; +// } +// #endif +// // SWRST is same for all modes of SERCOMs. +// sercom_instances[i]->SPI.CTRLA.bit.SWRST = 1; +// } +//} + +static void config_periph_pin(const mcu_periph_obj_t *periph) { + IOMUXC_SetPinMux( + periph->pin->mux_reg, periph->mux_mode, + periph->input_reg, periph->input_idx, + 0, + 0); + + IOMUXC_SetPinConfig(0, 0, 0, 0, + periph->pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_HYS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUE(0) + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) + | IOMUXC_SW_PAD_CTL_PAD_ODE(0) + | IOMUXC_SW_PAD_CTL_PAD_SPEED(2) + | IOMUXC_SW_PAD_CTL_PAD_DSE(4) + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); +} + +#define LPSPI_CLOCK_SOURCE_DIVIDER (7U) +#define LPSPI_MASTER_CLK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk) / (LPSPI_CLOCK_SOURCE_DIVIDER + 1U)) + +void common_hal_busio_spi_construct(busio_spi_obj_t *self, + const mcu_pin_obj_t *clock, const mcu_pin_obj_t *mosi, + const mcu_pin_obj_t *miso) { + + // TODO: Allow none mosi or miso + + const uint32_t sck_count = sizeof(mcu_spi_sck_list) / sizeof(mcu_periph_obj_t); + const uint32_t miso_count = sizeof(mcu_spi_miso_list) / sizeof(mcu_periph_obj_t); + const uint32_t mosi_count = sizeof(mcu_spi_mosi_list) / sizeof(mcu_periph_obj_t); + + for (uint32_t i = 0; i < sck_count; ++i) { + if (mcu_spi_sck_list[i].pin != clock) + continue; + + for (uint32_t j = 0; j < miso_count; ++j) { + if (mcu_spi_miso_list[j].pin != miso) + continue; + + if (mcu_spi_miso_list[j].bank_idx != mcu_spi_sck_list[i].bank_idx) + continue; + + for (uint32_t k = 0; k < mosi_count; ++k) { + if (mcu_spi_mosi_list[k].pin != mosi) + continue; + + if (mcu_spi_mosi_list[k].bank_idx != mcu_spi_miso_list[j].bank_idx) + continue; + + self->clock_pin = &mcu_spi_sck_list[i]; + self->miso_pin = &mcu_spi_miso_list[j]; + self->mosi_pin = &mcu_spi_mosi_list[k]; + + break; + } + } + } + + if(self->clock_pin == NULL || self->mosi_pin == NULL || self->miso_pin == NULL) { + mp_raise_RuntimeError(translate("Invalid SPI pin selection")); + } else { + self->spi = mcu_spi_banks[self->clock_pin->bank_idx - 1]; + } + + config_periph_pin(self->mosi_pin); + config_periph_pin(self->miso_pin); + config_periph_pin(self->clock_pin); + + lpspi_master_config_t config = { 0 }; + LPSPI_MasterGetDefaultConfig(&config); + + // Always start at 250khz which is what SD cards need. They are sensitive to + // SPI bus noise before they are put into SPI mode. + config.baudRate = 250000; + + LPSPI_MasterInit(self->spi, &config, LPSPI_MASTER_CLK_FREQ); + + LPSPI_Enable(self->spi, false); + uint32_t tcrPrescaleValue; + self->baudrate = LPSPI_MasterSetBaudRate(self->spi, config.baudRate, LPSPI_MASTER_CLK_FREQ, &tcrPrescaleValue); + LPSPI_Enable(self->spi, true); + + claim_pin(self->clock_pin->pin); + +// if (mosi_none) { +// self->MOSI_pin = NO_PIN; +// } else { +// gpio_set_pin_direction(mosi->number, GPIO_DIRECTION_OUT); +// gpio_set_pin_pull_mode(mosi->number, GPIO_PULL_OFF); +// gpio_set_pin_function(mosi->number, mosi_pinmux); +// self->MOSI_pin = mosi->number; + claim_pin(self->mosi_pin->pin); +// } + +// if (miso_none) { +// self->MISO_pin = NO_PIN; +// } else { +// gpio_set_pin_direction(miso->number, GPIO_DIRECTION_IN); +// gpio_set_pin_pull_mode(miso->number, GPIO_PULL_OFF); +// gpio_set_pin_function(miso->number, miso_pinmux); +// self->MISO_pin = miso->number; + claim_pin(self->miso_pin->pin); +// } +} + +void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { +// never_reset_sercom(self->spi_desc.dev.prvt); + +// never_reset_pin_number(self->clock_pin); +// never_reset_pin_number(self->MOSI_pin); +// never_reset_pin_number(self->MISO_pin); +} + +bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { + return self->clock_pin == NULL; +} + +void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { + if (common_hal_busio_spi_deinited(self)) { + return; + } + +// allow_reset_sercom(self->spi_desc.dev.prvt); + +// spi_m_sync_disable(&self->spi_desc); +// spi_m_sync_deinit(&self->spi_desc); +// reset_pin_number(self->clock_pin); +// reset_pin_number(self->MOSI_pin); +// reset_pin_number(self->MISO_pin); + self->clock_pin = NULL; +} + +bool common_hal_busio_spi_configure(busio_spi_obj_t *self, + uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { + lpspi_master_config_t config = { 0 }; + LPSPI_MasterGetDefaultConfig(&config); + + config.baudRate = baudrate; + config.cpol = polarity; + config.cpha = phase; + config.bitsPerFrame = bits; + + LPSPI_Deinit(self->spi); + LPSPI_MasterInit(self->spi, &config, LPSPI_MASTER_CLK_FREQ); + + LPSPI_Enable(self->spi, false); + uint32_t tcrPrescaleValue; + self->baudrate = LPSPI_MasterSetBaudRate(self->spi, config.baudRate, LPSPI_MASTER_CLK_FREQ, &tcrPrescaleValue); + LPSPI_Enable(self->spi, true); + + return true; +} + +bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { + bool grabbed_lock = false; +// CRITICAL_SECTION_ENTER() + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } +// CRITICAL_SECTION_LEAVE(); + return grabbed_lock; +} + +bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { + self->has_lock = false; +} + +bool common_hal_busio_spi_write(busio_spi_obj_t *self, + const uint8_t *data, size_t len) { + if (len == 0) { + return true; + } + + lpspi_transfer_t xfer = { 0 }; + xfer.txData = (uint8_t*)data; + xfer.dataSize = len; + xfer.configFlags = kLPSPI_MasterPcs0; + + const status_t status = LPSPI_MasterTransferBlocking(self->spi, &xfer); + if (status != kStatus_Success) + printf("%s: status %ld\r\n", __func__, status); + + return (status == kStatus_Success); +} + +bool common_hal_busio_spi_read(busio_spi_obj_t *self, + uint8_t *data, size_t len, uint8_t write_value) { + if (len == 0) { + return true; + } + + LPSPI_SetDummyData(self->spi, write_value); + + lpspi_transfer_t xfer = { 0 }; + xfer.rxData = data; + xfer.dataSize = len; + + const status_t status = LPSPI_MasterTransferBlocking(self->spi, &xfer); + if (status != kStatus_Success) + printf("%s: status %ld\r\n", __func__, status); + + return (status == kStatus_Success); +} + +bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { + if (len == 0) { + return true; + } + + LPSPI_SetDummyData(self->spi, 0xFF); + + lpspi_transfer_t xfer = { 0 }; + xfer.txData = data_out; + xfer.rxData = data_in; + xfer.dataSize = len; + + const status_t status = LPSPI_MasterTransferBlocking(self->spi, &xfer); + if (status != kStatus_Success) + printf("%s: status %ld\r\n", __func__, status); + + return (status == kStatus_Success); +} + +uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { + return self->baudrate; +} + +uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { + return ((self->spi->TCR & LPSPI_TCR_CPHA_MASK) == LPSPI_TCR_CPHA_MASK); +} + +uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { + return ((self->spi->TCR & LPSPI_TCR_CPOL_MASK) == LPSPI_TCR_CPOL_MASK); +} diff --git a/ports/mimxrt10xx/common-hal/busio/SPI.h b/ports/mimxrt10xx/common-hal/busio/SPI.h new file mode 100644 index 000000000..0895e1ddb --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/SPI.h @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_SPI_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_SPI_H + +#include "common-hal/microcontroller/Pin.h" +#include "fsl_common.h" +#include "periph.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + LPSPI_Type *spi; + bool has_lock; + uint32_t baudrate; + const mcu_periph_obj_t *clock_pin; + const mcu_periph_obj_t *mosi_pin; + const mcu_periph_obj_t *miso_pin; +} busio_spi_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/mimxrt10xx/common-hal/busio/UART.c b/ports/mimxrt10xx/common-hal/busio/UART.c new file mode 100644 index 000000000..a4819798b --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/UART.c @@ -0,0 +1,252 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/busio/UART.h" + +#include "mpconfigport.h" +#include "lib/utils/interrupt_char.h" +#include "supervisor/shared/tick.h" +#include "py/gc.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "py/stream.h" +#include "periph.h" + +#include "fsl_lpuart.h" + +// TODO + +#define UART_CLOCK_FREQ (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U) + +static void config_periph_pin(const mcu_periph_obj_t *periph) { + IOMUXC_SetPinMux( + periph->pin->mux_reg, periph->mux_mode, + periph->input_reg, periph->input_idx, + 0, + 0); + + IOMUXC_SetPinConfig(0, 0, 0, 0, + periph->pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_HYS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUE(0) + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) + | IOMUXC_SW_PAD_CTL_PAD_ODE(0) + | IOMUXC_SW_PAD_CTL_PAD_SPEED(1) + | IOMUXC_SW_PAD_CTL_PAD_DSE(6) + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); +} + +void LPUART_UserCallback(LPUART_Type *base, lpuart_handle_t *handle, status_t status, void *user_data) +{ + busio_uart_obj_t *self = (busio_uart_obj_t*)user_data; + + if (status == kStatus_LPUART_RxIdle) { + self->rx_ongoing = false; + } +} + +void common_hal_busio_uart_construct(busio_uart_obj_t *self, + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, + uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, + uint16_t receiver_buffer_size) { + + // TODO: Allow none rx or tx + + bool have_tx = tx != mp_const_none; + bool have_rx = rx != mp_const_none; + if (!have_tx && !have_rx) { + mp_raise_ValueError(translate("tx and rx cannot both be None")); + } + + self->baudrate = baudrate; + self->character_bits = bits; + self->timeout_ms = timeout * 1000; + + const uint32_t rx_count = sizeof(mcu_uart_rx_list) / sizeof(mcu_periph_obj_t); + const uint32_t tx_count = sizeof(mcu_uart_tx_list) / sizeof(mcu_periph_obj_t); + + for (uint32_t i = 0; i < rx_count; ++i) { + if (mcu_uart_rx_list[i].pin != rx) + continue; + + for (uint32_t j = 0; j < tx_count; ++j) { + if (mcu_uart_tx_list[j].pin != tx) + continue; + + if (mcu_uart_tx_list[j].bank_idx != mcu_uart_rx_list[i].bank_idx) + continue; + + self->rx_pin = &mcu_uart_rx_list[i]; + self->tx_pin = &mcu_uart_tx_list[j]; + + break; + } + } + + if(self->rx_pin == NULL || self->tx_pin == NULL) { + mp_raise_RuntimeError(translate("Invalid UART pin selection")); + } else { + self->uart = mcu_uart_banks[self->tx_pin->bank_idx - 1]; + } + + config_periph_pin(self->rx_pin); + config_periph_pin(self->tx_pin); + + lpuart_config_t config = { 0 }; + LPUART_GetDefaultConfig(&config); + + config.dataBitsCount = self->character_bits == 8 ? kLPUART_EightDataBits : kLPUART_SevenDataBits; + config.baudRate_Bps = self->baudrate; + config.enableTx = self->tx_pin != NULL; + config.enableRx = self->rx_pin != NULL; + + LPUART_Init(self->uart, &config, UART_CLOCK_FREQ); + + claim_pin(self->tx_pin->pin); + + if (self->rx_pin != NULL) { + ringbuf_alloc(&self->rbuf, receiver_buffer_size, true); + + if (!self->rbuf.buf) { + LPUART_Deinit(self->uart); + mp_raise_msg(&mp_type_MemoryError, translate("Failed to allocate RX buffer")); + } + + LPUART_TransferCreateHandle(self->uart, &self->handle, LPUART_UserCallback, self); + LPUART_TransferStartRingBuffer(self->uart, &self->handle, self->rbuf.buf, self->rbuf.size); + + claim_pin(self->rx_pin->pin); + } +} + +bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { + return self->rx_pin == NULL && self->tx_pin == NULL; +} + +void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { + if (common_hal_busio_uart_deinited(self)) { + return; + } + + LPUART_Deinit(self->uart); + + gc_free(self->rbuf.buf); + self->rbuf.size = 0; + self->rbuf.iput = self->rbuf.iget = 0; + +// reset_pin_number(self->rx_pin); +// reset_pin_number(self->tx_pin); + + self->rx_pin = NULL; + self->tx_pin = NULL; +} + +// Read characters. +size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { + if (self->rx_pin == NULL) { + mp_raise_ValueError(translate("No RX pin")); + } + + if (len == 0) { + // Nothing to read. + return 0; + } + + lpuart_transfer_t xfer = { + .data = data, + .dataSize = len, + }; + + self->rx_ongoing = true; + LPUART_TransferReceiveNonBlocking(self->uart, &self->handle, &xfer, NULL); + + uint64_t start_ticks = supervisor_ticks_ms64(); + + // Wait for all bytes received or timeout + while (self->rx_ongoing && (supervisor_ticks_ms64() - start_ticks < self->timeout_ms) ) { + RUN_BACKGROUND_TASKS; + + // Allow user to break out of a timeout with a KeyboardInterrupt. + if (mp_hal_is_interrupted()) { + break; + } + } + + // if we timed out, stop the transfer + if (self->rx_ongoing) { + LPUART_TransferAbortReceive(self->uart, &self->handle); + } + + return len - self->handle.rxDataSize; +} + +// Write characters. +size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { + if (self->tx_pin == NULL) { + mp_raise_ValueError(translate("No TX pin")); + } + + LPUART_WriteBlocking(self->uart, data, len); + + return len; +} + +uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { + return self->baudrate; +} + +void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) { + if (LPUART_SetBaudRate(self->uart, baudrate, UART_CLOCK_FREQ) == kStatus_Success) { + self->baudrate = baudrate; + } +} + +mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self) { + return (mp_float_t) (self->timeout_ms / 1000.0f); +} + +void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeout) { + self->timeout_ms = timeout * 1000; +} + +uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { + return LPUART_TransferGetRxRingBufferLength(self->uart, &self->handle); +} + +void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { + self->handle.rxRingBufferHead = self->handle.rxRingBufferTail; +} + +bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { + if (self->tx_pin == NULL) { + return false; + } + + return LPUART_GetStatusFlags(self->uart) & kLPUART_TxDataRegEmptyFlag; +} diff --git a/ports/mimxrt10xx/common-hal/busio/UART.h b/ports/mimxrt10xx/common-hal/busio/UART.h new file mode 100644 index 000000000..9e768db3c --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/UART.h @@ -0,0 +1,54 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_UART_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_UART_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/ringbuf.h" +#include "py/obj.h" +#include "periph.h" + +#include "fsl_lpuart.h" + +typedef struct { + mp_obj_base_t base; + LPUART_Type *uart; + lpuart_handle_t handle; + ringbuf_t rbuf; + bool rx_ongoing; + uint32_t baudrate; + uint8_t character_bits; + uint32_t timeout_ms; + const mcu_periph_obj_t *rx_pin; + const mcu_periph_obj_t *tx_pin; + const mcu_periph_obj_t *cts_pin; + const mcu_periph_obj_t *rts_pin; +} busio_uart_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_UART_H diff --git a/ports/mimxrt10xx/common-hal/busio/__init__.c b/ports/mimxrt10xx/common-hal/busio/__init__.c new file mode 100644 index 000000000..41761b674 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/busio/__init__.c @@ -0,0 +1 @@ +// No busio module functions. diff --git a/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c b/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c new file mode 100644 index 000000000..d69a18d96 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c @@ -0,0 +1,170 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/runtime.h" +#include "py/mphal.h" + +#include "fsl_gpio.h" + +#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "supervisor/shared/translate.h" + +#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT5 5U + +void pin_config(const mcu_pin_obj_t *pin, bool open_drain, digitalio_pull_t pull) +{ + IOMUXC_SetPinConfig(0, 0, 0, 0, pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_HYS(1) + | IOMUXC_SW_PAD_CTL_PAD_PUS((pull == PULL_UP) ? 2 : 0) + | IOMUXC_SW_PAD_CTL_PAD_PUE(pull != PULL_NONE) + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) + | IOMUXC_SW_PAD_CTL_PAD_ODE(open_drain) + | IOMUXC_SW_PAD_CTL_PAD_SPEED(2) + | IOMUXC_SW_PAD_CTL_PAD_DSE(1) + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); +} + +digitalinout_result_t common_hal_digitalio_digitalinout_construct( + digitalio_digitalinout_obj_t* self, const mcu_pin_obj_t* pin) { + claim_pin(pin); + self->pin = pin; + self->output = false; + self->open_drain = false; + self->pull = PULL_NONE; + + // GPIO is always IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT5 until proven otherwise + IOMUXC_SetPinMux(pin->mux_reg, IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT5, 0, 0, 0, 0); + + pin_config(pin, self->open_drain, self->pull); + + const gpio_pin_config_t config = { kGPIO_DigitalInput, 0, kGPIO_NoIntmode }; + GPIO_PinInit(self->pin->gpio, self->pin->number, &config); + + return DIGITALINOUT_OK; +} + +void common_hal_digitalio_digitalinout_never_reset( + digitalio_digitalinout_obj_t *self) { + never_reset_pin_number(self->pin->number); +} + +bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t* self) { + return self->pin == mp_const_none; +} + +void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t* self) { + if (common_hal_digitalio_digitalinout_deinited(self)) { + return; + } + reset_pin_number(self->pin->number); + self->pin = mp_const_none; +} + +void common_hal_digitalio_digitalinout_switch_to_input( + digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { + self->output = false; + + // This also sets direction to input. + common_hal_digitalio_digitalinout_set_pull(self, pull); +} + +void common_hal_digitalio_digitalinout_switch_to_output( + digitalio_digitalinout_obj_t* self, bool value, + digitalio_drive_mode_t drive_mode) { + self->output = true; + self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; + self->pull = PULL_NONE; + + pin_config(self->pin, self->open_drain, self->pull); + + const gpio_pin_config_t config = { kGPIO_DigitalOutput, value, kGPIO_NoIntmode }; + GPIO_PinInit(self->pin->gpio, self->pin->number, &config); +} + +digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( + digitalio_digitalinout_obj_t* self) { + return self->output ? DIRECTION_OUTPUT : DIRECTION_INPUT; +} + +void common_hal_digitalio_digitalinout_set_value( + digitalio_digitalinout_obj_t* self, bool value) { + GPIO_PinWrite(self->pin->gpio, self->pin->number, value); +} + +bool common_hal_digitalio_digitalinout_get_value( + digitalio_digitalinout_obj_t* self) { + return GPIO_PinRead(self->pin->gpio, self->pin->number); +} + +void common_hal_digitalio_digitalinout_set_drive_mode( + digitalio_digitalinout_obj_t* self, + digitalio_drive_mode_t drive_mode) { + bool value = common_hal_digitalio_digitalinout_get_value(self); + self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN; + + pin_config(self->pin, self->open_drain, self->pull); + + // True is implemented differently between modes so reset the value to make + // sure it's correct for the new mode. + if (value) { + common_hal_digitalio_digitalinout_set_value(self, value); + } +} + +digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( + digitalio_digitalinout_obj_t* self) { + if (self->open_drain) { + return DRIVE_MODE_OPEN_DRAIN; + } else { + return DRIVE_MODE_PUSH_PULL; + } +} + +void common_hal_digitalio_digitalinout_set_pull( + digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) { + self->pull = pull; + + pin_config(self->pin, self->open_drain, self->pull); + + const gpio_pin_config_t config = { kGPIO_DigitalInput, 0, kGPIO_NoIntmode }; + GPIO_PinInit(self->pin->gpio, self->pin->number, &config); +} + +digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( + digitalio_digitalinout_obj_t* self) { + if (self->output) { + mp_raise_AttributeError(translate("Cannot get pull while in output mode")); + return PULL_NONE; + } else { + return self->pull; + } +} diff --git a/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.h b/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.h new file mode 100644 index 000000000..4c19de20b --- /dev/null +++ b/ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DIGITALIO_DIGITALINOUT_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DIGITALIO_DIGITALINOUT_H + +#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/digitalio/Pull.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; + bool output; + bool open_drain; + digitalio_pull_t pull; +} digitalio_digitalinout_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DIGITALIO_DIGITALINOUT_H diff --git a/ports/mimxrt10xx/common-hal/digitalio/__init__.c b/ports/mimxrt10xx/common-hal/digitalio/__init__.c new file mode 100644 index 000000000..20fad4595 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/digitalio/__init__.c @@ -0,0 +1 @@ +// No digitalio module functions. diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Pin.c b/ports/mimxrt10xx/common-hal/microcontroller/Pin.c new file mode 100644 index 000000000..04dd99739 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/Pin.c @@ -0,0 +1,226 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/rgb_led_status.h" + +#ifdef MICROPY_HW_NEOPIXEL +bool neopixel_in_use; +#endif +#ifdef MICROPY_HW_APA102_MOSI +bool apa102_sck_in_use; +bool apa102_mosi_in_use; +#endif +#ifdef SPEAKER_ENABLE_PIN +bool speaker_enable_in_use; +#endif + +//TODO + +#define PORT_COUNT (IOMUXC_SW_PAD_CTL_PAD_COUNT / 32 + 1) + +//STATIC uint32_t never_reset_pins[PORT_COUNT]; + +void reset_all_pins(void) { +// uint32_t pin_mask[PORT_COUNT] = PORT_OUT_IMPLEMENTED; + +// // Do not full reset USB lines. +// pin_mask[0] &= ~(PORT_PA24 | PORT_PA25); + +// // Do not reset SWD when a debugger is present. +// if (DSU->STATUSB.bit.DBGPRES == 1) { +// pin_mask[0] &= ~(PORT_PA30 | PORT_PA31); +// } + +// for (uint32_t i = 0; i < PORT_COUNT; i++) { +// pin_mask[i] &= ~never_reset_pins[i]; +// } + +// gpio_set_port_direction(GPIO_PORTA, pin_mask[0] & ~MICROPY_PORT_A, GPIO_DIRECTION_OFF); +// gpio_set_port_direction(GPIO_PORTB, pin_mask[1] & ~MICROPY_PORT_B, GPIO_DIRECTION_OFF); +// #if PORT_BITS > 64 +// gpio_set_port_direction(GPIO_PORTC, pin_mask[2] & ~MICROPY_PORT_C, GPIO_DIRECTION_OFF); +// #endif +// #if PORT_BITS > 96 +// gpio_set_port_direction(GPIO_PORTD, pin_mask[3] & ~MICROPY_PORT_D, GPIO_DIRECTION_OFF); +// #endif +// +// // Configure SWD. SWDIO will be automatically switched on PA31 when a signal is input on +// // SWCLK. +// #ifdef SAMD51 +// gpio_set_pin_function(PIN_PA30, MUX_PA30H_CM4_SWCLK); +// #endif +// #ifdef SAMD21 +// gpio_set_pin_function(PIN_PA30, GPIO_PIN_FUNCTION_G); +// gpio_set_pin_function(PIN_PA31, GPIO_PIN_FUNCTION_G); +// #endif +// + #ifdef MICROPY_HW_NEOPIXEL + neopixel_in_use = false; + #endif + #ifdef MICROPY_HW_APA102_MOSI + apa102_sck_in_use = false; + apa102_mosi_in_use = false; + #endif + + // After configuring SWD because it may be shared. + #ifdef SPEAKER_ENABLE_PIN + speaker_enable_in_use = false; +// gpio_set_pin_function(SPEAKER_ENABLE_PIN->number, GPIO_PIN_FUNCTION_OFF); +// gpio_set_pin_direction(SPEAKER_ENABLE_PIN->number, GPIO_DIRECTION_OUT); +// gpio_set_pin_level(SPEAKER_ENABLE_PIN->number, false); + #endif +} + +void never_reset_pin_number(uint8_t pin_number) { +// never_reset_pins[GPIO_PORT(pin_number)] |= 1 << GPIO_PIN(pin_number); +} + +void reset_pin_number(uint8_t pin_number) { + // never_reset_pins[GPIO_PORT(pin_number)] &= ~(1 << GPIO_PIN(pin_number)); + + if (pin_number >= IOMUXC_SW_PAD_CTL_PAD_COUNT) { + return; + } + + #ifdef MICROPY_HW_NEOPIXEL + if (pin_number == MICROPY_HW_NEOPIXEL->number) { + neopixel_in_use = false; + rgb_led_status_init(); + return; + } + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin_number == MICROPY_HW_APA102_MOSI->number || + pin_number == MICROPY_HW_APA102_SCK->number) { +// apa102_mosi_in_use = apa102_mosi_in_use && pin_number != MICROPY_HW_APA102_MOSI->number; +// apa102_sck_in_use = apa102_sck_in_use && pin_number != MICROPY_HW_APA102_SCK->number; + if (!apa102_sck_in_use && !apa102_mosi_in_use) { +// rgb_led_status_init(); + } + return; + } + #endif + +// if (pin_number == PIN_PA30 +// #ifdef SAMD51 +// ) { +// #endif +// #ifdef SAMD21 +// || pin_number == PIN_PA31) { +// #endif +// gpio_set_pin_function(pin_number, SWD_MUX); +// } else { +// gpio_set_pin_direction(pin_number, GPIO_DIRECTION_OFF); +// gpio_set_pin_function(pin_number, GPIO_PIN_FUNCTION_OFF); +// } +// + #ifdef SPEAKER_ENABLE_PIN + if (pin_number == SPEAKER_ENABLE_PIN->number) { + speaker_enable_in_use = false; +// gpio_set_pin_function(pin_number, GPIO_PIN_FUNCTION_OFF); +// gpio_set_pin_direction(SPEAKER_ENABLE_PIN->number, GPIO_DIRECTION_OUT); +// gpio_set_pin_level(SPEAKER_ENABLE_PIN->number, false); + } + #endif +} + +void claim_pin(const mcu_pin_obj_t* pin) { + #ifdef MICROPY_HW_NEOPIXEL + if (pin == MICROPY_HW_NEOPIXEL) { + neopixel_in_use = true; + } + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin == MICROPY_HW_APA102_MOSI) { + apa102_mosi_in_use = true; + } + if (pin == MICROPY_HW_APA102_SCK) { + apa102_sck_in_use = true; + } + #endif + + #ifdef SPEAKER_ENABLE_PIN + if (pin == SPEAKER_ENABLE_PIN) { + speaker_enable_in_use = true; + } + #endif +} + +bool pin_number_is_free(uint8_t pin_number) { +// PortGroup *const port = &PORT->Group[(enum gpio_port)GPIO_PORT(pin_number)]; +// uint8_t pin_index = GPIO_PIN(pin_number); +// volatile PORT_PINCFG_Type *state = &port->PINCFG[pin_index]; +// volatile PORT_PMUX_Type *pmux = &port->PMUX[pin_index / 2]; +// +// if (pin_number == PIN_PA30 || pin_number == PIN_PA31) { +// if (DSU->STATUSB.bit.DBGPRES == 1) { +// return false; +// } +// if (pin_number == PIN_PA30 +// #ifdef SAMD51 +// ) { +// #endif +// #ifdef SAMD21 +// || pin_number == PIN_PA31) { +// #endif) { +// return state->bit.PMUXEN == 1 && ((pmux->reg >> (4 * pin_index % 2)) & 0xf) == SWD_MUX; +// } +// } +// +// return state->bit.PMUXEN == 0 && state->bit.INEN == 0 && +// state->bit.PULLEN == 0 && (port->DIR.reg & (1 << pin_index)) == 0; + return true; +} + +bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) { + #ifdef MICROPY_HW_NEOPIXEL + if (pin == MICROPY_HW_NEOPIXEL) { + return !neopixel_in_use; + } + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin == MICROPY_HW_APA102_MOSI) { + return !apa102_mosi_in_use; + } + if (pin == MICROPY_HW_APA102_SCK) { + return !apa102_sck_in_use; + } + #endif + + #ifdef SPEAKER_ENABLE_PIN + if (pin == SPEAKER_ENABLE_PIN) { + return !speaker_enable_in_use; + } + #endif + + return pin_number_is_free(pin->number); +} + +void common_hal_reset_pin(const mcu_pin_obj_t* pin) { +// reset_pin_number(pin->number); +} diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Pin.h b/ports/mimxrt10xx/common-hal/microcontroller/Pin.h new file mode 100644 index 000000000..74a1f7cbb --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/Pin.h @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PIN_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PIN_H + +#include + +#include "pins.h" + +#ifdef MICROPY_HW_NEOPIXEL +extern bool neopixel_in_use; +#endif +#ifdef MICROPY_HW_APA102_MOSI +extern bool apa102_sck_in_use; +extern bool apa102_mosi_in_use; +#endif + +void reset_all_pins(void); +// reset_pin_number takes the pin number instead of the pointer so that objects don't +// need to store a full pointer. +void reset_pin_number(uint8_t pin_number); +void never_reset_pin_number(uint8_t pin_number); +void claim_pin(const mcu_pin_obj_t* pin); +bool pin_number_is_free(uint8_t pin_number); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Processor.c b/ports/mimxrt10xx/common-hal/microcontroller/Processor.c new file mode 100644 index 000000000..23493f766 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/Processor.c @@ -0,0 +1,65 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Dan Halbert for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "common-hal/microcontroller/Processor.h" + +#include "fsl_tempmon.h" +#include "fsl_ocotp.h" +#include "clocks.h" + +float common_hal_mcu_processor_get_temperature(void) { + tempmon_config_t config; + TEMPMON_GetDefaultConfig(&config); + + TEMPMON_Init(TEMPMON, &config); + TEMPMON_StartMeasure(TEMPMON); + + const float temp = TEMPMON_GetCurrentTemperature(TEMPMON); + TEMPMON_Deinit(TEMPMON); + + return temp; +} + +float common_hal_mcu_processor_get_voltage(void) { + return NAN; +} + +uint32_t common_hal_mcu_processor_get_frequency(void) { + return SystemCoreClock; +} + +void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { + OCOTP_Init(OCOTP, CLOCK_GetFreq(kCLOCK_IpgClk)); + + // Reads shadow registers 0x01 - 0x04 (Configuration and Manufacturing Info) + for (int i = 0; i < 4; ++i) + ((uint32_t*) raw_id)[i] = OCOTP_ReadFuseShadowRegister(OCOTP, i + 1); + + OCOTP_Deinit(OCOTP); +} diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Processor.h b/ports/mimxrt10xx/common-hal/microcontroller/Processor.h new file mode 100644 index 000000000..43b0ec878 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/Processor.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Dan Halbert for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H + +#define COMMON_HAL_MCU_PROCESSOR_UID_LENGTH 16 + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + // Stores no state currently. +} mcu_processor_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H diff --git a/ports/mimxrt10xx/common-hal/microcontroller/__init__.c b/ports/mimxrt10xx/common-hal/microcontroller/__init__.c new file mode 100644 index 000000000..68de3a890 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/microcontroller/__init__.c @@ -0,0 +1,284 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +//TODO +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" + +#include "fsl_device_registers.h" + +#include "reset.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/microcontroller/Processor.h" +#include "supervisor/shared/safe_mode.h" +#include "supervisor/shared/translate.h" + +void common_hal_mcu_delay_us(uint32_t delay) { + mp_hal_delay_us(delay); +} + +volatile uint32_t nesting_count = 0; +void common_hal_mcu_disable_interrupts(void) { + __disable_irq(); + __DMB(); + nesting_count++; +} + +void HardFault_Handler(void); +void common_hal_mcu_enable_interrupts(void) { + if (nesting_count == 0) { + // This is very very bad because it means there was mismatched disable/enables so we + // "HardFault". + HardFault_Handler(); + } + nesting_count--; + if (nesting_count > 0) { + return; + } + __DMB(); + __enable_irq(); +} + +void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { + if (runmode == RUNMODE_BOOTLOADER) { + if (!bootloader_available()) { + mp_raise_ValueError(translate("Cannot reset into bootloader because no bootloader is present.")); + } + // Pretend to be the first of the two reset presses needed to enter the + // bootloader. That way one reset will end in the bootloader. + _bootloader_dbl_tap = DBL_TAP_MAGIC; + } else { + // Set up the default. + _bootloader_dbl_tap = DBL_TAP_MAGIC_QUICK_BOOT; + } + if (runmode == RUNMODE_SAFE_MODE) { + safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE); + } +} + +void common_hal_mcu_reset(void) { + NVIC_SystemReset(); +} + +// The singleton microcontroller.Processor object, bound to microcontroller.cpu +// It currently only has properties, and no state. +const mcu_processor_obj_t common_hal_mcu_processor_obj = { + .base = { + .type = &mcu_processor_type, + }, +}; + +// NVM is only available on Express boards for now. +#if CIRCUITPY_INTERNAL_NVM_SIZE > 0 +// The singleton nvm.ByteArray object. +const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = { + .base = { + .type = &nvm_bytearray_type, + }, + .len = CIRCUITPY_INTERNAL_NVM_SIZE, + .start_address = (uint8_t*) (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE) +}; +#endif + +// This maps MCU pin names to pin objects. +STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { +#ifdef MIMXRT1011_SERIES + { MP_ROM_QSTR(MP_QSTR_GPIO_00), MP_ROM_PTR(&pin_GPIO_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_01), MP_ROM_PTR(&pin_GPIO_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_02), MP_ROM_PTR(&pin_GPIO_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_03), MP_ROM_PTR(&pin_GPIO_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_04), MP_ROM_PTR(&pin_GPIO_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_05), MP_ROM_PTR(&pin_GPIO_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_06), MP_ROM_PTR(&pin_GPIO_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_07), MP_ROM_PTR(&pin_GPIO_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_08), MP_ROM_PTR(&pin_GPIO_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_09), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_10), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_11), MP_ROM_PTR(&pin_GPIO_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_12), MP_ROM_PTR(&pin_GPIO_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_13), MP_ROM_PTR(&pin_GPIO_13) }, + + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_00), MP_ROM_PTR(&pin_GPIO_SD_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_01), MP_ROM_PTR(&pin_GPIO_SD_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_02), MP_ROM_PTR(&pin_GPIO_SD_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_03), MP_ROM_PTR(&pin_GPIO_SD_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_04), MP_ROM_PTR(&pin_GPIO_SD_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_05), MP_ROM_PTR(&pin_GPIO_SD_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_06), MP_ROM_PTR(&pin_GPIO_SD_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_07), MP_ROM_PTR(&pin_GPIO_SD_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_08), MP_ROM_PTR(&pin_GPIO_SD_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_09), MP_ROM_PTR(&pin_GPIO_SD_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_10), MP_ROM_PTR(&pin_GPIO_SD_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_11), MP_ROM_PTR(&pin_GPIO_SD_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_12), MP_ROM_PTR(&pin_GPIO_SD_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_13), MP_ROM_PTR(&pin_GPIO_SD_13) }, + + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_00), MP_ROM_PTR(&pin_GPIO_AD_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_01), MP_ROM_PTR(&pin_GPIO_AD_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_02), MP_ROM_PTR(&pin_GPIO_AD_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_03), MP_ROM_PTR(&pin_GPIO_AD_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_04), MP_ROM_PTR(&pin_GPIO_AD_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_05), MP_ROM_PTR(&pin_GPIO_AD_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_06), MP_ROM_PTR(&pin_GPIO_AD_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_07), MP_ROM_PTR(&pin_GPIO_AD_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_08), MP_ROM_PTR(&pin_GPIO_AD_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_09), MP_ROM_PTR(&pin_GPIO_AD_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_10), MP_ROM_PTR(&pin_GPIO_AD_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_11), MP_ROM_PTR(&pin_GPIO_AD_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_12), MP_ROM_PTR(&pin_GPIO_AD_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_13), MP_ROM_PTR(&pin_GPIO_AD_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_14), MP_ROM_PTR(&pin_GPIO_AD_14) }, +#else + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_00), MP_ROM_PTR(&pin_GPIO_EMC_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_01), MP_ROM_PTR(&pin_GPIO_EMC_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_02), MP_ROM_PTR(&pin_GPIO_EMC_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_03), MP_ROM_PTR(&pin_GPIO_EMC_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_04), MP_ROM_PTR(&pin_GPIO_EMC_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_05), MP_ROM_PTR(&pin_GPIO_EMC_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_06), MP_ROM_PTR(&pin_GPIO_EMC_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_07), MP_ROM_PTR(&pin_GPIO_EMC_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_08), MP_ROM_PTR(&pin_GPIO_EMC_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_09), MP_ROM_PTR(&pin_GPIO_EMC_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_10), MP_ROM_PTR(&pin_GPIO_EMC_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_11), MP_ROM_PTR(&pin_GPIO_EMC_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_12), MP_ROM_PTR(&pin_GPIO_EMC_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_13), MP_ROM_PTR(&pin_GPIO_EMC_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_14), MP_ROM_PTR(&pin_GPIO_EMC_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_15), MP_ROM_PTR(&pin_GPIO_EMC_15) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_16), MP_ROM_PTR(&pin_GPIO_EMC_16) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_17), MP_ROM_PTR(&pin_GPIO_EMC_17) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_18), MP_ROM_PTR(&pin_GPIO_EMC_18) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_19), MP_ROM_PTR(&pin_GPIO_EMC_19) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_20), MP_ROM_PTR(&pin_GPIO_EMC_20) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_21), MP_ROM_PTR(&pin_GPIO_EMC_21) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_22), MP_ROM_PTR(&pin_GPIO_EMC_22) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_23), MP_ROM_PTR(&pin_GPIO_EMC_23) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_24), MP_ROM_PTR(&pin_GPIO_EMC_24) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_25), MP_ROM_PTR(&pin_GPIO_EMC_25) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_26), MP_ROM_PTR(&pin_GPIO_EMC_26) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_27), MP_ROM_PTR(&pin_GPIO_EMC_27) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_28), MP_ROM_PTR(&pin_GPIO_EMC_28) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_29), MP_ROM_PTR(&pin_GPIO_EMC_29) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_30), MP_ROM_PTR(&pin_GPIO_EMC_30) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_31), MP_ROM_PTR(&pin_GPIO_EMC_31) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_32), MP_ROM_PTR(&pin_GPIO_EMC_32) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_33), MP_ROM_PTR(&pin_GPIO_EMC_33) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_34), MP_ROM_PTR(&pin_GPIO_EMC_34) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_35), MP_ROM_PTR(&pin_GPIO_EMC_35) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_36), MP_ROM_PTR(&pin_GPIO_EMC_36) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_37), MP_ROM_PTR(&pin_GPIO_EMC_37) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_38), MP_ROM_PTR(&pin_GPIO_EMC_38) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_39), MP_ROM_PTR(&pin_GPIO_EMC_39) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_40), MP_ROM_PTR(&pin_GPIO_EMC_40) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_EMC_41), MP_ROM_PTR(&pin_GPIO_EMC_41) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_00), MP_ROM_PTR(&pin_GPIO_AD_B0_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_01), MP_ROM_PTR(&pin_GPIO_AD_B0_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_02), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_03), MP_ROM_PTR(&pin_GPIO_AD_B0_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_04), MP_ROM_PTR(&pin_GPIO_AD_B0_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_05), MP_ROM_PTR(&pin_GPIO_AD_B0_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_06), MP_ROM_PTR(&pin_GPIO_AD_B0_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_07), MP_ROM_PTR(&pin_GPIO_AD_B0_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_08), MP_ROM_PTR(&pin_GPIO_AD_B0_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_09), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_10), MP_ROM_PTR(&pin_GPIO_AD_B0_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_11), MP_ROM_PTR(&pin_GPIO_AD_B0_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_12), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_13), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_14), MP_ROM_PTR(&pin_GPIO_AD_B0_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B0_15), MP_ROM_PTR(&pin_GPIO_AD_B0_15) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_00), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_01), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_02), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_03), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_04), MP_ROM_PTR(&pin_GPIO_AD_B1_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_05), MP_ROM_PTR(&pin_GPIO_AD_B1_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_06), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_07), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_08), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_09), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_10), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_11), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_12), MP_ROM_PTR(&pin_GPIO_AD_B1_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_13), MP_ROM_PTR(&pin_GPIO_AD_B1_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_14), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_15), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_00), MP_ROM_PTR(&pin_GPIO_B0_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_01), MP_ROM_PTR(&pin_GPIO_B0_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_02), MP_ROM_PTR(&pin_GPIO_B0_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_03), MP_ROM_PTR(&pin_GPIO_B0_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_04), MP_ROM_PTR(&pin_GPIO_B0_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_05), MP_ROM_PTR(&pin_GPIO_B0_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_06), MP_ROM_PTR(&pin_GPIO_B0_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_07), MP_ROM_PTR(&pin_GPIO_B0_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_08), MP_ROM_PTR(&pin_GPIO_B0_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_09), MP_ROM_PTR(&pin_GPIO_B0_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_10), MP_ROM_PTR(&pin_GPIO_B0_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_11), MP_ROM_PTR(&pin_GPIO_B0_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_12), MP_ROM_PTR(&pin_GPIO_B0_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_13), MP_ROM_PTR(&pin_GPIO_B0_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_14), MP_ROM_PTR(&pin_GPIO_B0_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B0_15), MP_ROM_PTR(&pin_GPIO_B0_15) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_00), MP_ROM_PTR(&pin_GPIO_B1_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_01), MP_ROM_PTR(&pin_GPIO_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_02), MP_ROM_PTR(&pin_GPIO_B1_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_03), MP_ROM_PTR(&pin_GPIO_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_04), MP_ROM_PTR(&pin_GPIO_B1_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_05), MP_ROM_PTR(&pin_GPIO_B1_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_06), MP_ROM_PTR(&pin_GPIO_B1_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_07), MP_ROM_PTR(&pin_GPIO_B1_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_08), MP_ROM_PTR(&pin_GPIO_B1_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_09), MP_ROM_PTR(&pin_GPIO_B1_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_10), MP_ROM_PTR(&pin_GPIO_B1_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_11), MP_ROM_PTR(&pin_GPIO_B1_11) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_12), MP_ROM_PTR(&pin_GPIO_B1_12) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_13), MP_ROM_PTR(&pin_GPIO_B1_13) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_14), MP_ROM_PTR(&pin_GPIO_B1_14) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_B1_15), MP_ROM_PTR(&pin_GPIO_B1_15) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_00), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_01), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_02), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_03), MP_ROM_PTR(&pin_GPIO_SD_B0_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_04), MP_ROM_PTR(&pin_GPIO_SD_B0_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_05), MP_ROM_PTR(&pin_GPIO_SD_B0_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_00), MP_ROM_PTR(&pin_GPIO_SD_B1_00) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_01), MP_ROM_PTR(&pin_GPIO_SD_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_02), MP_ROM_PTR(&pin_GPIO_SD_B1_02) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_03), MP_ROM_PTR(&pin_GPIO_SD_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_04), MP_ROM_PTR(&pin_GPIO_SD_B1_04) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_05), MP_ROM_PTR(&pin_GPIO_SD_B1_05) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_06), MP_ROM_PTR(&pin_GPIO_SD_B1_06) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_07), MP_ROM_PTR(&pin_GPIO_SD_B1_07) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_08), MP_ROM_PTR(&pin_GPIO_SD_B1_08) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_09), MP_ROM_PTR(&pin_GPIO_SD_B1_09) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_10), MP_ROM_PTR(&pin_GPIO_SD_B1_10) }, + { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B1_11), MP_ROM_PTR(&pin_GPIO_SD_B1_11) }, +#endif +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_global_dict_table); diff --git a/ports/mimxrt10xx/common-hal/neopixel_write/__init__.c b/ports/mimxrt10xx/common-hal/neopixel_write/__init__.c new file mode 100644 index 000000000..9ea233502 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/neopixel_write/__init__.c @@ -0,0 +1,106 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2020 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include "shared-bindings/neopixel_write/__init__.h" + +#include "tick.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "common-hal/microcontroller/Pin.h" +#include "fsl_gpio.h" + +uint64_t next_start_tick_ms = 0; +uint32_t next_start_tick_us = 1000; + +//sysclock divisors +#define MAGIC_800_INT 900000 // ~1.11 us -> 1.2 field +#define MAGIC_800_T0H 2800000 // ~0.36 us -> 0.44 field +#define MAGIC_800_T1H 1350000 // ~0.74 us -> 0.84 field + +#pragma GCC push_options +#pragma GCC optimize ("Os") + +void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, + uint32_t numBytes) { + uint8_t *p = pixels, *end = p + numBytes, pix = *p++, mask = 0x80; + uint32_t start = 0; + uint32_t cyc = 0; + + //assumes 800_000Hz frequency + //Theoretical values here are 800_000 -> 1.25us, 2500000->0.4us, 1250000->0.8us + //TODO: try to get dynamic weighting working again +#ifdef MIMXRT1011_SERIES + uint32_t sys_freq = CLOCK_GetCoreFreq(); +#else + uint32_t sys_freq = CLOCK_GetAhbFreq(); +#endif + uint32_t interval = sys_freq/MAGIC_800_INT; + uint32_t t0 = (sys_freq/MAGIC_800_T0H); + uint32_t t1 = (sys_freq/MAGIC_800_T1H); + + // This must be called while interrupts are on in case we're waiting for a + // future ms tick. + wait_until(next_start_tick_ms, next_start_tick_us); + + GPIO_Type *gpio = digitalinout->pin->gpio; + const uint32_t pin = digitalinout->pin->number; + + __disable_irq(); + // Enable DWT in debug core. Useable when interrupts disabled, as opposed to Systick->VAL + CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; + DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; + DWT->CYCCNT = 0; + + for(;;) { + cyc = (pix & mask) ? t1 : t0; + start = DWT->CYCCNT; + GPIO_PinWrite(gpio, pin, 1); + while((DWT->CYCCNT - start) < cyc); + GPIO_PinWrite(gpio, pin, 0); + while((DWT->CYCCNT - start) < interval); + if(!(mask >>= 1)) { + if(p >= end) break; + pix = *p++; + mask = 0x80; + } + } + + // Enable interrupts again + __enable_irq(); + + // Update the next start. + current_tick(&next_start_tick_ms, &next_start_tick_us); + if (next_start_tick_us < 100) { + next_start_tick_ms += 1; + next_start_tick_us = 100 - next_start_tick_us; + } else { + next_start_tick_us -= 100; + } +} + +#pragma GCC pop_options diff --git a/ports/mimxrt10xx/common-hal/os/__init__.c b/ports/mimxrt10xx/common-hal/os/__init__.c new file mode 100644 index 000000000..e84beb526 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/os/__init__.c @@ -0,0 +1,72 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "genhdr/mpversion.h" +#include "py/mpconfig.h" +#include "py/objstr.h" +#include "py/objtuple.h" +#include "py/qstr.h" + +#include "fsl_trng.h" + +STATIC const qstr os_uname_info_fields[] = { + MP_QSTR_sysname, MP_QSTR_nodename, + MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine +}; +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "mimxrt10xx"); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "mimxrt10xx"); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE); +STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME); + +STATIC MP_DEFINE_ATTRTUPLE( + os_uname_info_obj, + os_uname_info_fields, + 5, + (mp_obj_t)&os_uname_info_sysname_obj, + (mp_obj_t)&os_uname_info_nodename_obj, + (mp_obj_t)&os_uname_info_release_obj, + (mp_obj_t)&os_uname_info_version_obj, + (mp_obj_t)&os_uname_info_machine_obj +); + +mp_obj_t common_hal_os_uname(void) { + return (mp_obj_t)&os_uname_info_obj; +} + +bool common_hal_os_urandom(uint8_t* buffer, uint32_t length) { + trng_config_t trngConfig; + + TRNG_GetDefaultConfig(&trngConfig); + trngConfig.sampleMode = kTRNG_SampleModeVonNeumann; + + TRNG_Init(TRNG, &trngConfig); + TRNG_GetRandomData(TRNG, buffer, length); + TRNG_Deinit(TRNG); + + return true; +} diff --git a/ports/mimxrt10xx/common-hal/pulseio/PWMOut.c b/ports/mimxrt10xx/common-hal/pulseio/PWMOut.c new file mode 100644 index 000000000..c75b75316 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PWMOut.c @@ -0,0 +1,551 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2016 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "common-hal/pulseio/PWMOut.h" +#include "shared-bindings/pulseio/PWMOut.h" +#include "shared-bindings/microcontroller/Processor.h" + +#include "fsl_pwm.h" + +#include "supervisor/shared/translate.h" +#include "periph.h" + +#include + +// TODO +//#include "samd/pins.h" + +//#undef ENABLE +// +//# define _TCC_SIZE(unused, n) TCC ## n ## _SIZE, +//# define TCC_SIZES { REPEAT_MACRO(_TCC_SIZE, 0, TCC_INST_NUM) } +// +//static uint32_t tcc_periods[TCC_INST_NUM]; +//static uint32_t tc_periods[TC_INST_NUM]; +// +//uint32_t target_tcc_frequencies[TCC_INST_NUM]; +//uint8_t tcc_refcount[TCC_INST_NUM]; +// +//// This bitmask keeps track of which channels of a TCC are currently claimed. +//#ifdef SAMD21 +//uint8_t tcc_channels[3]; // Set by pwmout_reset() to {0xf0, 0xfc, 0xfc} initially. +//#endif +//#ifdef SAMD51 +//uint8_t tcc_channels[5]; // Set by pwmout_reset() to {0xc0, 0xf0, 0xf8, 0xfc, 0xfc} initially. +//#endif +// +//static uint8_t never_reset_tc_or_tcc[TC_INST_NUM + TCC_INST_NUM]; + +void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) { +// if (self->timer->is_tc) { +// never_reset_tc_or_tcc[self->timer->index] += 1; +// } else { +// never_reset_tc_or_tcc[TC_INST_NUM + self->timer->index] += 1; +// } +// +// never_reset_pin_number(self->pin->number); +} + +void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) { +// if (self->timer->is_tc) { +// never_reset_tc_or_tcc[self->timer->index] -= 1; +// } else { +// never_reset_tc_or_tcc[TC_INST_NUM + self->timer->index] -= 1; +// } +} + +void pwmout_reset(void) { +// // Reset all timers +// for (int i = 0; i < TCC_INST_NUM; i++) { +// target_tcc_frequencies[i] = 0; +// tcc_refcount[i] = 0; +// } +// Tcc *tccs[TCC_INST_NUM] = TCC_INSTS; +// for (int i = 0; i < TCC_INST_NUM; i++) { +// if (never_reset_tc_or_tcc[TC_INST_NUM + i] > 0) { +// continue; +// } +// // Disable the module before resetting it. +// if (tccs[i]->CTRLA.bit.ENABLE == 1) { +// tccs[i]->CTRLA.bit.ENABLE = 0; +// while (tccs[i]->SYNCBUSY.bit.ENABLE == 1) { +// } +// } +// uint8_t mask = 0xff; +// for (uint8_t j = 0; j < tcc_cc_num[i]; j++) { +// mask <<= 1; +// } +// tcc_channels[i] = mask; +// tccs[i]->CTRLA.bit.SWRST = 1; +// while (tccs[i]->CTRLA.bit.SWRST == 1) { +// } +// } +// Tc *tcs[TC_INST_NUM] = TC_INSTS; +// for (int i = 0; i < TC_INST_NUM; i++) { +// if (never_reset_tc_or_tcc[i] > 0) { +// continue; +// } +// tcs[i]->COUNT16.CTRLA.bit.SWRST = 1; +// while (tcs[i]->COUNT16.CTRLA.bit.SWRST == 1) { +// } +// } +} + +//static uint8_t tcc_channel(const pin_timer_t* t) { +// // For the SAMD51 this hardcodes the use of OTMX == 0x0, the output matrix mapping, which uses +// // SAMD21-style modulo mapping. +// return t->wave_output % tcc_cc_num[t->index]; +//} + +//bool channel_ok(const pin_timer_t* t) { +// uint8_t channel_bit = 1 << tcc_channel(t); +// return (!t->is_tc && ((tcc_channels[t->index] & channel_bit) == 0)) || +// t->is_tc; +//} + +#define PWM_SRC_CLK_FREQ CLOCK_GetFreq(kCLOCK_IpgClk) + +pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t *self, + const mcu_pin_obj_t *pin, + uint16_t duty, + uint32_t frequency, + bool variable_frequency) { + self->pin = pin; + self->variable_frequency = variable_frequency; + + const uint32_t pwm_count = sizeof(mcu_pwm_list) / sizeof(mcu_pwm_obj_t); + + for (uint32_t i = 0; i < pwm_count; ++i) { + if (mcu_pwm_list[i].pin != pin) + continue; + + printf("pwm: 0x%p, sum %d, chan %d, mux %d\r\n", mcu_pwm_list[i].pwm, mcu_pwm_list[i].submodule, mcu_pwm_list[i].channel, mcu_pwm_list[i].mux_mode); + + self->pwm = &mcu_pwm_list[i]; + + break; + } + + if (self->pwm == NULL) { + return PWMOUT_INVALID_PIN; + } + + CLOCK_SetDiv(kCLOCK_AhbDiv, 0x2); /* Set AHB PODF to 2, divide by 3 */ + CLOCK_SetDiv(kCLOCK_IpgDiv, 0x3); /* Set IPG PODF to 3, divede by 4 */ + +//TODO re-enable +// IOMUXC_SetPinMux( +// IOMUXC_GPIO_SD_02_FLEXPWM1_PWM0_A, /* GPIO_02 is configured as FLEXPWM1_PWM0_A */ +// 0U); /* Software Input On Field: Input Path is determined by functionality */ +// +// IOMUXC_SetPinConfig( +// IOMUXC_GPIO_SD_02_FLEXPWM1_PWM0_A, /* GPIO_02 PAD functional properties : */ +// 0x10A0U); /* Slew Rate Field: Slow Slew Rate +// Drive Strength Field: R0/4 +// Speed Field: fast(150MHz) +// Open Drain Enable Field: Open Drain Disabled +// Pull / Keep Enable Field: Pull/Keeper Enabled +// Pull / Keep Select Field: Keeper +// Pull Up / Down Config. Field: 100K Ohm Pull Down +// Hyst. Enable Field: Hysteresis Disabled */ + + pwm_config_t pwmConfig; + + /* + * pwmConfig.enableDebugMode = false; + * pwmConfig.enableWait = false; + * pwmConfig.reloadSelect = kPWM_LocalReload; + * pwmConfig.faultFilterCount = 0; + * pwmConfig.faultFilterPeriod = 0; + * pwmConfig.clockSource = kPWM_BusClock; + * pwmConfig.prescale = kPWM_Prescale_Divide_1; + * pwmConfig.initializationControl = kPWM_Initialize_LocalSync; + * pwmConfig.forceTrigger = kPWM_Force_Local; + * pwmConfig.reloadFrequency = kPWM_LoadEveryOportunity; + * pwmConfig.reloadLogic = kPWM_ReloadImmediate; + * pwmConfig.pairOperation = kPWM_Independent; + */ + PWM_GetDefaultConfig(&pwmConfig); + + //pwmConfig.reloadLogic = kPWM_ReloadPwmFullCycle; + pwmConfig.enableDebugMode = true; + + if (PWM_Init(PWM1, self->pwm->submodule, &pwmConfig) == kStatus_Fail) { + printf("PWM initialization failed\r\n"); + return PWMOUT_INVALID_PIN; + } + + pwm_signal_param_t pwmSignal; + + /* Set deadtime count, we set this to about 650ns */ + uint16_t deadTimeVal = ((uint64_t)PWM_SRC_CLK_FREQ * 650) / 1000000000; + + pwmSignal.pwmChannel = self->pwm->channel; + pwmSignal.level = kPWM_HighTrue; + pwmSignal.dutyCyclePercent = frequency / 2; /* 1 percent dutycycle */ + pwmSignal.deadtimeValue = deadTimeVal; + + PWM_SetupPwm(PWM1, self->pwm->submodule, &pwmSignal, 1, kPWM_SignedCenterAligned, frequency, PWM_SRC_CLK_FREQ); + + PWM_SetPwmLdok(PWM1, kPWM_Control_Module_0 | kPWM_Control_Module_1 | kPWM_Control_Module_2, true); + + PWM_StartTimer(PWM1, kPWM_Control_Module_0 | kPWM_Control_Module_1 | kPWM_Control_Module_2); + +// if (frequency == 0 || frequency > 6000000) { +// return PWMOUT_INVALID_FREQUENCY; +// } + +// // Figure out which timer we are using. +// // First see if a tcc is already going with the frequency we want and our +// // channel is unused. tc's don't have enough channels to share. +// const pin_timer_t* timer = NULL; +// uint8_t mux_position = 0; +// if (!variable_frequency) { +// for (uint8_t i = 0; i < TCC_INST_NUM && timer == NULL; i++) { +// if (target_tcc_frequencies[i] != frequency) { +// continue; +// } +// for (uint8_t j = 0; j < NUM_TIMERS_PER_PIN && timer == NULL; j++) { +// const pin_timer_t* t = &pin->timer[j]; +// if (t->index != i || t->is_tc || t->index >= TCC_INST_NUM) { +// continue; +// } +// Tcc* tcc = tcc_insts[t->index]; +// if (tcc->CTRLA.bit.ENABLE == 1 && channel_ok(t)) { +// timer = t; +// mux_position = j; +// // Claim channel. +// tcc_channels[timer->index] |= (1 << tcc_channel(timer)); +// +// } +// } +// } +// } +// +// // No existing timer has been found, so find a new one to use and set it up. +// if (timer == NULL) { +// // By default, with fixed frequency we want to share a TCC because its likely we'll have +// // other outputs at the same frequency. If the frequency is variable then we'll only have +// // one output so we start with the TCs to see if they work. +// int8_t direction = -1; +// uint8_t start = NUM_TIMERS_PER_PIN - 1; +// bool found = false; +// if (variable_frequency) { +// direction = 1; +// start = 0; +// } +// for (int8_t i = start; i >= 0 && i < NUM_TIMERS_PER_PIN && timer == NULL; i += direction) { +// const pin_timer_t* t = &pin->timer[i]; +// if ((!t->is_tc && t->index >= TCC_INST_NUM) || +// (t->is_tc && t->index >= TC_INST_NUM)) { +// continue; +// } +// if (t->is_tc) { +// found = true; +// Tc* tc = tc_insts[t->index]; +// if (tc->COUNT16.CTRLA.bit.ENABLE == 0 && t->wave_output == 1) { +// timer = t; +// mux_position = i; +// } +// } else { +// Tcc* tcc = tcc_insts[t->index]; +// if (tcc->CTRLA.bit.ENABLE == 0 && channel_ok(t)) { +// timer = t; +// mux_position = i; +// } +// } +// } +// +// if (timer == NULL) { +// if (found) { +// return PWMOUT_ALL_TIMERS_ON_PIN_IN_USE; +// } +// return PWMOUT_ALL_TIMERS_IN_USE; +// } +// +// uint8_t resolution = 0; +// if (timer->is_tc) { +// resolution = 16; +// } else { +// // TCC resolution varies so look it up. +// const uint8_t _tcc_sizes[TCC_INST_NUM] = TCC_SIZES; +// resolution = _tcc_sizes[timer->index]; +// } +// // First determine the divisor that gets us the highest resolution. +// uint32_t system_clock = common_hal_mcu_processor_get_frequency(); +// uint32_t top; +// uint8_t divisor; +// for (divisor = 0; divisor < 8; divisor++) { +// top = (system_clock / prescaler[divisor] / frequency) - 1; +// if (top < (1u << resolution)) { +// break; +// } +// } +// +// set_timer_handler(timer->is_tc, timer->index, TC_HANDLER_NO_INTERRUPT); +// // We use the zeroeth clock on either port to go full speed. +// turn_on_clocks(timer->is_tc, timer->index, 0); +// +// if (timer->is_tc) { +// tc_periods[timer->index] = top; +// Tc* tc = tc_insts[timer->index]; +// #ifdef SAMD21 +// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | +// TC_CTRLA_PRESCALER(divisor) | +// TC_CTRLA_WAVEGEN_MPWM; +// tc->COUNT16.CC[0].reg = top; +// #endif +// #ifdef SAMD51 +// +// tc->COUNT16.CTRLA.bit.SWRST = 1; +// while (tc->COUNT16.CTRLA.bit.SWRST == 1) { +// } +// tc_set_enable(tc, false); +// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER(divisor); +// tc->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MPWM; +// tc->COUNT16.CCBUF[0].reg = top; +// tc->COUNT16.CCBUF[1].reg = 0; +// #endif +// +// tc_set_enable(tc, true); +// } else { +// tcc_periods[timer->index] = top; +// Tcc* tcc = tcc_insts[timer->index]; +// tcc_set_enable(tcc, false); +// tcc->CTRLA.bit.PRESCALER = divisor; +// tcc->PER.bit.PER = top; +// tcc->WAVE.bit.WAVEGEN = TCC_WAVE_WAVEGEN_NPWM_Val; +// tcc_set_enable(tcc, true); +// target_tcc_frequencies[timer->index] = frequency; +// tcc_refcount[timer->index]++; +// if (variable_frequency) { +// // We're changing frequency so claim all of the channels. +// tcc_channels[timer->index] = 0xff; +// } else { +// tcc_channels[timer->index] |= (1 << tcc_channel(timer)); +// } +// } +// } +// +// self->timer = timer; +// +// gpio_set_pin_function(pin->number, GPIO_PIN_FUNCTION_E + mux_position); + + common_hal_pulseio_pwmout_set_duty_cycle(self, duty); + + return PWMOUT_OK; +} + +bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) { + return self->pin == NULL; +} + +void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { + if (common_hal_pulseio_pwmout_deinited(self)) { + return; + } + +// const pin_timer_t* t = self->timer; +// if (t->is_tc) { +// Tc* tc = tc_insts[t->index]; +// tc_set_enable(tc, false); +// tc->COUNT16.CTRLA.bit.SWRST = true; +// tc_wait_for_sync(tc); +// } else { +// tcc_refcount[t->index]--; +// tcc_channels[t->index] &= ~(1 << tcc_channel(t)); +// if (tcc_refcount[t->index] == 0) { +// target_tcc_frequencies[t->index] = 0; +// Tcc* tcc = tcc_insts[t->index]; +// tcc_set_enable(tcc, false); +// tcc->CTRLA.bit.SWRST = true; +// while (tcc->SYNCBUSY.bit.SWRST != 0) { +// /* Wait for sync */ +// } +// } +// } +// reset_pin_number(self->pin->number); + self->pin = NULL; +} + +void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t *self, uint16_t duty) { + PWM_UpdatePwmDutycycle(PWM1, self->pwm->submodule, self->pwm->channel, kPWM_SignedCenterAligned, duty); + +// const pin_timer_t* t = self->timer; +// if (t->is_tc) { +// uint16_t adjusted_duty = tc_periods[t->index] * duty / 0xffff; +// #ifdef SAMD21 +// tc_insts[t->index]->COUNT16.CC[t->wave_output].reg = adjusted_duty; +// #endif +// #ifdef SAMD51 +// Tc* tc = tc_insts[t->index]; +// while (tc->COUNT16.SYNCBUSY.bit.CC1 != 0) {} +// tc->COUNT16.CCBUF[1].reg = adjusted_duty; +// #endif +// } else { +// uint32_t adjusted_duty = ((uint64_t) tcc_periods[t->index]) * duty / 0xffff; +// uint8_t channel = tcc_channel(t); +// Tcc* tcc = tcc_insts[t->index]; +// +// // Write into the CC buffer register, which will be transferred to the +// // CC register on an UPDATE (when period is finished). +// // Do clock domain syncing as necessary. +// +// while (tcc->SYNCBUSY.reg != 0) {} +// +// // Lock out double-buffering while updating the CCB value. +// tcc->CTRLBSET.bit.LUPD = 1; +// #ifdef SAMD21 +// tcc->CCB[channel].reg = adjusted_duty; +// #endif +// #ifdef SAMD51 +// tcc->CCBUF[channel].reg = adjusted_duty; +// #endif +// tcc->CTRLBCLR.bit.LUPD = 1; +// } +} + +uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { + return 0; +// const pin_timer_t* t = self->timer; +// if (t->is_tc) { +// Tc* tc = tc_insts[t->index]; +// tc_wait_for_sync(tc); +// uint16_t cv = tc->COUNT16.CC[t->wave_output].reg; +// return cv * 0xffff / tc_periods[t->index]; +// } else { +// Tcc* tcc = tcc_insts[t->index]; +// uint8_t channel = tcc_channel(t); +// uint32_t cv = 0; +// +// while (tcc->SYNCBUSY.bit.CTRLB) {} +// +// #ifdef SAMD21 +// // If CCBV (CCB valid) is set, the CCB value hasn't yet been copied +// // to the CC value. +// if ((tcc->STATUS.vec.CCBV & (1 << channel)) != 0) { +// cv = tcc->CCB[channel].reg; +// } else { +// cv = tcc->CC[channel].reg; +// } +// #endif +// #ifdef SAMD51 +// if ((tcc->STATUS.vec.CCBUFV & (1 << channel)) != 0) { +// cv = tcc->CCBUF[channel].reg; +// } else { +// cv = tcc->CC[channel].reg; +// } +// #endif +// +// uint32_t duty_cycle = ((uint64_t) cv) * 0xffff / tcc_periods[t->index]; +// +// return duty_cycle; +// } +} + +void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, + uint32_t frequency) { +// if (frequency == 0 || frequency > 6000000) { +// mp_raise_ValueError(translate("Invalid PWM frequency")); +// } +// const pin_timer_t* t = self->timer; +// uint8_t resolution; +// if (t->is_tc) { +// resolution = 16; +// } else { +// resolution = 24; +// } +// uint32_t system_clock = common_hal_mcu_processor_get_frequency(); +// uint32_t new_top; +// uint8_t new_divisor; +// for (new_divisor = 0; new_divisor < 8; new_divisor++) { +// new_top = (system_clock / prescaler[new_divisor] / frequency) - 1; +// if (new_top < (1u << resolution)) { +// break; +// } +// } +// uint16_t old_duty = common_hal_pulseio_pwmout_get_duty_cycle(self); +// if (t->is_tc) { +// Tc* tc = tc_insts[t->index]; +// uint8_t old_divisor = tc->COUNT16.CTRLA.bit.PRESCALER; +// if (new_divisor != old_divisor) { +// tc_set_enable(tc, false); +// tc->COUNT16.CTRLA.bit.PRESCALER = new_divisor; +// tc_set_enable(tc, true); +// } +// tc_periods[t->index] = new_top; +// #ifdef SAMD21 +// tc->COUNT16.CC[0].reg = new_top; +// #endif +// #ifdef SAMD51 +// while (tc->COUNT16.SYNCBUSY.reg != 0) {} +// tc->COUNT16.CCBUF[0].reg = new_top; +// #endif +// } else { +// Tcc* tcc = tcc_insts[t->index]; +// uint8_t old_divisor = tcc->CTRLA.bit.PRESCALER; +// if (new_divisor != old_divisor) { +// tcc_set_enable(tcc, false); +// tcc->CTRLA.bit.PRESCALER = new_divisor; +// tcc_set_enable(tcc, true); +// } +// while (tcc->SYNCBUSY.reg != 0) {} +// tcc_periods[t->index] = new_top; +// #ifdef SAMD21 +// tcc->PERB.bit.PERB = new_top; +// #endif +// #ifdef SAMD51 +// tcc->PERBUF.bit.PERBUF = new_top; +// #endif +// } + +// common_hal_pulseio_pwmout_set_duty_cycle(self, old_duty); +} + +uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) { +// uint32_t system_clock = common_hal_mcu_processor_get_frequency(); +// const pin_timer_t* t = self->timer; +// uint8_t divisor; +// uint32_t top; +// if (t->is_tc) { +// divisor = tc_insts[t->index]->COUNT16.CTRLA.bit.PRESCALER; +// top = tc_periods[t->index]; +// } else { +// divisor = tcc_insts[t->index]->CTRLA.bit.PRESCALER; +// top = tcc_periods[t->index]; +// } +// return (system_clock / prescaler[divisor]) / (top + 1); + return 0; +} + +bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self) { + return self->variable_frequency; +} diff --git a/ports/mimxrt10xx/common-hal/pulseio/PWMOut.h b/ports/mimxrt10xx/common-hal/pulseio/PWMOut.h new file mode 100644 index 000000000..2f0fe94c4 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PWMOut.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PWMOUT_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PWMOUT_H + +#include "common-hal/microcontroller/Pin.h" +#include "periph.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t *pin; + const mcu_pwm_obj_t *pwm; + bool variable_frequency; +} pulseio_pwmout_obj_t; + +void pwmout_reset(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PWMOUT_H diff --git a/ports/mimxrt10xx/common-hal/pulseio/PulseIn.c b/ports/mimxrt10xx/common-hal/pulseio/PulseIn.c new file mode 100644 index 000000000..24e9ad85d --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PulseIn.c @@ -0,0 +1,248 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017-2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/pulseio/PulseIn.h" + +#include + +#include "background.h" +#include "mpconfigport.h" +#include "py/gc.h" +#include "py/runtime.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/pulseio/PulseIn.h" +#include "supervisor/shared/translate.h" + +#include "tick.h" + +// TODO +//static void pulsein_set_config(pulseio_pulsein_obj_t* self, bool first_edge) { +// uint32_t sense_setting; +// if (!first_edge) { +// sense_setting = EIC_CONFIG_SENSE0_BOTH_Val; +// configure_eic_channel(self->channel, sense_setting); +// return; +// } else if (self->idle_state) { +// sense_setting = EIC_CONFIG_SENSE0_FALL_Val; +// } else { +// sense_setting = EIC_CONFIG_SENSE0_RISE_Val; +// } +// set_eic_handler(self->channel, EIC_HANDLER_PULSEIN); +// turn_on_eic_channel(self->channel, sense_setting); +//} + +//void pulsein_interrupt_handler(uint8_t channel) { +// // Grab the current time first. +// uint32_t current_us; +// uint64_t current_ms; +// current_tick(¤t_ms, ¤t_us); +// +// // current_tick gives us the remaining us until the next tick but we want the number since the +// // last ms. +// current_us = 1000 - current_us; +// pulseio_pulsein_obj_t* self = get_eic_channel_data(channel); +// if (!background_tasks_ok() || self->errored_too_fast) { +// self->errored_too_fast = true; +// common_hal_pulseio_pulsein_pause(self); +// return; +// } +// if (self->first_edge) { +// self->first_edge = false; +// pulsein_set_config(self, false); +// } else { +// uint32_t ms_diff = current_ms - self->last_ms; +// uint16_t us_diff = current_us - self->last_us; +// uint32_t total_diff = us_diff; +// if (self->last_us > current_us) { +// total_diff = 1000 + current_us - self->last_us; +// if (ms_diff > 1) { +// total_diff += (ms_diff - 1) * 1000; +// } +// } else { +// total_diff += ms_diff * 1000; +// } +// uint16_t duration = 0xffff; +// if (total_diff < duration) { +// duration = total_diff; +// } +// +// uint16_t i = (self->start + self->len) % self->maxlen; +// self->buffer[i] = duration; +// if (self->len < self->maxlen) { +// self->len++; +// } else { +// self->start++; +// } +// } +// self->last_ms = current_ms; +// self->last_us = current_us; +//} + +void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, + const mcu_pin_obj_t* pin, uint16_t maxlen, bool idle_state) { +// if (!pin->has_extint) { +// mp_raise_RuntimeError(translate("No hardware support on pin")); +// } +// if (eic_get_enable() && !eic_channel_free(pin->extint_channel)) { +// mp_raise_RuntimeError(translate("EXTINT channel already in use")); +// } +// +// self->buffer = (uint16_t *) m_malloc(maxlen * sizeof(uint16_t), false); +// if (self->buffer == NULL) { +// mp_raise_msg_varg(&mp_type_MemoryError, translate("Failed to allocate RX buffer of %d bytes"), maxlen * sizeof(uint16_t)); +// } +// self->channel = pin->extint_channel; +// self->pin = pin->number; +// self->maxlen = maxlen; +// self->idle_state = idle_state; +// self->start = 0; +// self->len = 0; +// self->first_edge = true; +// self->last_us = 0; +// self->last_ms = 0; +// self->errored_too_fast = false; +// +// set_eic_channel_data(pin->extint_channel, (void*) self); +// +// // Check to see if the EIC is enabled and start it up if its not.' +// if (eic_get_enable() == 0) { +// turn_on_external_interrupt_controller(); +// } +// +// gpio_set_pin_function(pin->number, GPIO_PIN_FUNCTION_A); +// +// turn_on_cpu_interrupt(self->channel); +// +// claim_pin(pin); +// +// // Set config will enable the EIC. +// pulsein_set_config(self, true); +} + +bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t* self) { +// return self->pin == NO_PIN; + return true; +} + +void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) { +// if (common_hal_pulseio_pulsein_deinited(self)) { +// return; +// } +// set_eic_handler(self->channel, EIC_HANDLER_NO_INTERRUPT); +// turn_off_eic_channel(self->channel); +// reset_pin_number(self->pin); +// self->pin = NO_PIN; +} + +void common_hal_pulseio_pulsein_pause(pulseio_pulsein_obj_t* self) { +// uint32_t mask = 1 << self->channel; +// EIC->INTENCLR.reg = mask << EIC_INTENSET_EXTINT_Pos; +} + +void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, + uint16_t trigger_duration) { +// // Make sure we're paused. +// common_hal_pulseio_pulsein_pause(self); +// +// // Reset erroring +// self->errored_too_fast = false; +// +// // Send the trigger pulse. +// if (trigger_duration > 0) { +// gpio_set_pin_pull_mode(self->pin, GPIO_PULL_OFF); +// gpio_set_pin_direction(self->pin, GPIO_DIRECTION_OUT); +// gpio_set_pin_level(self->pin, !self->idle_state); +// common_hal_mcu_delay_us((uint32_t)trigger_duration); +// gpio_set_pin_level(self->pin, self->idle_state); +// } +// +// // Reconfigure the pin and make sure its set to detect the first edge. +// self->first_edge = true; +// self->last_ms = 0; +// self->last_us = 0; +// gpio_set_pin_function(self->pin, GPIO_PIN_FUNCTION_A); +// uint32_t mask = 1 << self->channel; +// // Clear previous interrupt state and re-enable it. +// EIC->INTFLAG.reg = mask << EIC_INTFLAG_EXTINT_Pos; +// EIC->INTENSET.reg = mask << EIC_INTENSET_EXTINT_Pos; +// +// pulsein_set_config(self, true); +} + +void common_hal_pulseio_pulsein_clear(pulseio_pulsein_obj_t* self) { +// common_hal_mcu_disable_interrupts(); +// self->start = 0; +// self->len = 0; +// common_hal_mcu_enable_interrupts(); +} + +uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { +// if (self->len == 0) { +// mp_raise_IndexError(translate("pop from an empty PulseIn")); +// } +// common_hal_mcu_disable_interrupts(); +// uint16_t value = self->buffer[self->start]; +// self->start = (self->start + 1) % self->maxlen; +// self->len--; +// common_hal_mcu_enable_interrupts(); +// +// return value; + return 0; +} + +uint16_t common_hal_pulseio_pulsein_get_maxlen(pulseio_pulsein_obj_t* self) { +// return self->maxlen; + return 0; +} + +uint16_t common_hal_pulseio_pulsein_get_len(pulseio_pulsein_obj_t* self) { +// return self->len; + return 0; +} + +bool common_hal_pulseio_pulsein_get_paused(pulseio_pulsein_obj_t* self) { +// uint32_t mask = 1 << self->channel; +// return (EIC->INTENSET.reg & (mask << EIC_INTENSET_EXTINT_Pos)) == 0; + return true; +} + +uint16_t common_hal_pulseio_pulsein_get_item(pulseio_pulsein_obj_t* self, + int16_t index) { +// common_hal_mcu_disable_interrupts(); +// if (index < 0) { +// index += self->len; +// } +// if (index < 0 || index >= self->len) { +// common_hal_mcu_enable_interrupts(); +// mp_raise_IndexError(translate("index out of range")); +// } +// uint16_t value = self->buffer[(self->start + index) % self->maxlen]; +// common_hal_mcu_enable_interrupts(); +// return value; + return 0; +} diff --git a/ports/mimxrt10xx/common-hal/pulseio/PulseIn.h b/ports/mimxrt10xx/common-hal/pulseio/PulseIn.h new file mode 100644 index 000000000..af742f319 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PulseIn.h @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEIN_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEIN_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +// TODO +typedef struct { + mp_obj_base_t base; +// uint8_t channel; +// uint8_t pin; +// uint16_t* buffer; +// uint16_t maxlen; +// bool idle_state; +// volatile uint16_t start; +// volatile uint16_t len; +// volatile bool first_edge; +// volatile uint64_t last_ms; +// volatile uint16_t last_us; +// volatile bool errored_too_fast; +} pulseio_pulsein_obj_t; + +//void pulsein_reset(void); +// +//void pulsein_interrupt_handler(uint8_t channel); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEIN_H diff --git a/ports/mimxrt10xx/common-hal/pulseio/PulseOut.c b/ports/mimxrt10xx/common-hal/pulseio/PulseOut.c new file mode 100644 index 000000000..a49cfa7af --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PulseOut.c @@ -0,0 +1,207 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/pulseio/PulseOut.h" + +#include + +#include "mpconfigport.h" +#include "py/gc.h" +#include "py/runtime.h" +#include "shared-bindings/pulseio/PulseOut.h" +#include "supervisor/shared/translate.h" + +// TODO + +// This timer is shared amongst all PulseOut objects under the assumption that +// the code is single threaded. +//static uint8_t refcount = 0; +// +//static uint8_t pulseout_tc_index = 0xff; +// +//static __IO PORT_PINCFG_Type *active_pincfg = NULL; +//static uint16_t *pulse_buffer = NULL; +//static volatile uint16_t pulse_index = 0; +//static uint16_t pulse_length; +//static volatile uint32_t current_compare = 0; +// +//static void turn_on(__IO PORT_PINCFG_Type * pincfg) { +// pincfg->reg = PORT_PINCFG_PMUXEN; +//} +// +//static void turn_off(__IO PORT_PINCFG_Type * pincfg) { +// pincfg->reg = PORT_PINCFG_RESETVALUE; +//} +// +//void pulse_finish(void) { +// pulse_index++; +// +// if (active_pincfg == NULL) { +// return; +// } +// // Always turn it off. +// turn_off(active_pincfg); +// if (pulse_index >= pulse_length) { +// return; +// } +// current_compare = (current_compare + pulse_buffer[pulse_index] * 3 / 4) & 0xffff; +// Tc* tc = tc_insts[pulseout_tc_index]; +// tc->COUNT16.CC[0].reg = current_compare; +// if (pulse_index % 2 == 0) { +// turn_on(active_pincfg); +// } +//} + +void pulseout_interrupt_handler(uint8_t index) { +// if (index != pulseout_tc_index) return; +// Tc* tc = tc_insts[index]; +// if (!tc->COUNT16.INTFLAG.bit.MC0) return; +// +// pulse_finish(); +// +// // Clear the interrupt bit. +// tc->COUNT16.INTFLAG.reg = TC_INTFLAG_MC0; +} + +void pulseout_reset() { +// refcount = 0; +// pulseout_tc_index = 0xff; +// active_pincfg = NULL; +} + +void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, + const pulseio_pwmout_obj_t* carrier) { +// if (refcount == 0) { +// // Find a spare timer. +// Tc *tc = NULL; +// int8_t index = TC_INST_NUM - 1; +// for (; index >= 0; index--) { +// if (tc_insts[index]->COUNT16.CTRLA.bit.ENABLE == 0) { +// tc = tc_insts[index]; +// break; +// } +// } +// if (tc == NULL) { +// mp_raise_RuntimeError(translate("All timers in use")); +// } +// +// pulseout_tc_index = index; +// +// set_timer_handler(true, index, TC_HANDLER_PULSEOUT); +// // We use GCLK0 for SAMD21 and GCLK1 for SAMD51 because they both run at 48mhz making our +// // math the same across the boards. +// #ifdef SAMD21 +// turn_on_clocks(true, index, 0); +// #endif +// #ifdef SAMD51 +// turn_on_clocks(true, index, 1); +// #endif +// +// +// #ifdef SAMD21 +// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | +// TC_CTRLA_PRESCALER_DIV64 | +// TC_CTRLA_WAVEGEN_NFRQ; +// #endif +// #ifdef SAMD51 +// tc_reset(tc); +// tc_set_enable(tc, false); +// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER_DIV64; +// tc->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_NFRQ; +// #endif +// +// tc_set_enable(tc, true); +// tc->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_STOP; +// } +// refcount++; +// +// self->pin = carrier->pin->number; +// +// PortGroup *const port_base = &PORT->Group[GPIO_PORT(self->pin)]; +// self->pincfg = &port_base->PINCFG[self->pin % 32]; +// +// // Set the port to output a zero. +// port_base->OUTCLR.reg = 1 << (self->pin % 32); +// port_base->DIRSET.reg = 1 << (self->pin % 32); +// +// // Turn off the pinmux which should connect the port output. +// turn_off(self->pincfg); +} + +bool common_hal_pulseio_pulseout_deinited(pulseio_pulseout_obj_t* self) { +// return self->pin == NO_PIN; + return false; +} + +void common_hal_pulseio_pulseout_deinit(pulseio_pulseout_obj_t* self) { +// if (common_hal_pulseio_pulseout_deinited(self)) { +// return; +// } +// PortGroup *const port_base = &PORT->Group[GPIO_PORT(self->pin)]; +// port_base->DIRCLR.reg = 1 << (self->pin % 32); +// +// turn_on(self->pincfg); +// +// refcount--; +// if (refcount == 0) { +// tc_reset(tc_insts[pulseout_tc_index]); +// pulseout_tc_index = 0xff; +// } +// self->pin = NO_PIN; +} + +void common_hal_pulseio_pulseout_send(pulseio_pulseout_obj_t* self, uint16_t* pulses, uint16_t length) { +// if (active_pincfg != NULL) { +// mp_raise_RuntimeError(translate("Another send is already active")); +// } +// active_pincfg = self->pincfg; +// pulse_buffer = pulses; +// pulse_index = 0; +// pulse_length = length; +// +// current_compare = pulses[0] * 3 / 4; +// Tc* tc = tc_insts[pulseout_tc_index]; +// tc->COUNT16.CC[0].reg = current_compare; +// +// // Clear our interrupt in case it was set earlier +// tc->COUNT16.INTFLAG.reg = TC_INTFLAG_MC0; +// tc->COUNT16.INTENSET.reg = TC_INTENSET_MC0; +// tc_enable_interrupts(pulseout_tc_index); +// turn_on(active_pincfg); +// tc->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_RETRIGGER; +// +// while(pulse_index < length) { +// // Do other things while we wait. The interrupts will handle sending the +// // signal. +// RUN_BACKGROUND_TASKS; +// } +// +// tc->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_STOP; +// tc->COUNT16.INTENCLR.reg = TC_INTENCLR_MC0; +// tc_disable_interrupts(pulseout_tc_index); +// active_pincfg = NULL; +} diff --git a/ports/mimxrt10xx/common-hal/pulseio/PulseOut.h b/ports/mimxrt10xx/common-hal/pulseio/PulseOut.h new file mode 100644 index 000000000..ee70ac17e --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/PulseOut.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEOUT_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEOUT_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +// TODO +typedef struct { + mp_obj_base_t base; +// __IO PORT_PINCFG_Type *pincfg; +// uint8_t pin; +} pulseio_pulseout_obj_t; + +void pulseout_reset(void); +//void pulseout_interrupt_handler(uint8_t index); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_PULSEIO_PULSEOUT_H diff --git a/ports/mimxrt10xx/common-hal/pulseio/__init__.c b/ports/mimxrt10xx/common-hal/pulseio/__init__.c new file mode 100644 index 000000000..2bee925bc --- /dev/null +++ b/ports/mimxrt10xx/common-hal/pulseio/__init__.c @@ -0,0 +1 @@ +// No pulseio module functions. diff --git a/ports/mimxrt10xx/common-hal/rtc/RTC.c b/ports/mimxrt10xx/common-hal/rtc/RTC.c new file mode 100644 index 000000000..5d6cae520 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/rtc/RTC.c @@ -0,0 +1,76 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Nick Moore for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/timeutils/timeutils.h" +#include "shared-bindings/rtc/__init__.h" +#include "supervisor/shared/translate.h" + +#include "fsl_snvs_hp.h" + +void rtc_init(void) { + snvs_hp_rtc_config_t config; + SNVS_HP_RTC_GetDefaultConfig(&config); + + SNVS_HP_RTC_Init(SNVS, &config); + SNVS_HP_RTC_StartTimer(SNVS); +} + +void common_hal_rtc_get_time(timeutils_struct_time_t *tm) { + snvs_hp_rtc_datetime_t rtcDate; + SNVS_HP_RTC_GetDatetime(SNVS, &rtcDate); + + tm->tm_year = rtcDate.year; + tm->tm_mon = rtcDate.month; + tm->tm_mday = rtcDate.day; + tm->tm_hour = rtcDate.hour; + tm->tm_min = rtcDate.minute; + tm->tm_sec = rtcDate.second; +} + +void common_hal_rtc_set_time(timeutils_struct_time_t *tm) { + snvs_hp_rtc_datetime_t rtcDate; + rtcDate.year = tm->tm_year; + rtcDate.month = tm->tm_mon; + rtcDate.day = tm->tm_mday; + rtcDate.hour = tm->tm_hour; + rtcDate.minute = tm->tm_min; + rtcDate.second = tm->tm_sec; + + SNVS_HP_RTC_SetDatetime(SNVS, &rtcDate); +} + +int common_hal_rtc_get_calibration(void) { + return 0; +} + +void common_hal_rtc_set_calibration(int calibration) { + mp_raise_NotImplementedError(translate("RTC calibration is not supported on this board")); +} diff --git a/ports/mimxrt10xx/common-hal/rtc/RTC.h b/ports/mimxrt10xx/common-hal/rtc/RTC.h new file mode 100644 index 000000000..4965356c5 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/rtc/RTC.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_RTC_RTC_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_RTC_RTC_H + +extern void rtc_init(void); +extern void rtc_reset(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_RTC_RTC_H diff --git a/ports/mimxrt10xx/common-hal/rtc/__init__.c b/ports/mimxrt10xx/common-hal/rtc/__init__.c new file mode 100644 index 000000000..e69de29bb diff --git a/ports/mimxrt10xx/common-hal/supervisor/Runtime.c b/ports/mimxrt10xx/common-hal/supervisor/Runtime.c new file mode 100755 index 000000000..6be38f216 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/supervisor/Runtime.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include "shared-bindings/supervisor/Runtime.h" +#include "supervisor/serial.h" + +bool common_hal_get_serial_connected(void) { + return (bool) serial_connected(); +} + +bool common_hal_get_serial_bytes_available(void) { + return (bool) serial_bytes_available(); +} diff --git a/ports/mimxrt10xx/common-hal/supervisor/Runtime.h b/ports/mimxrt10xx/common-hal/supervisor/Runtime.h new file mode 100755 index 000000000..11bb59063 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/supervisor/Runtime.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_SUPERVISOR_RUNTIME_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_SUPERVISOR_RUNTIME_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + // Stores no state currently. +} super_runtime_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_SUPERVISOR_RUNTIME_H diff --git a/ports/mimxrt10xx/common-hal/supervisor/__init__.c b/ports/mimxrt10xx/common-hal/supervisor/__init__.c new file mode 100755 index 000000000..ac88556b4 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/supervisor/__init__.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Michael Schroeder + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include "py/obj.h" + +#include "shared-bindings/supervisor/__init__.h" +#include "shared-bindings/supervisor/Runtime.h" + + +// The singleton supervisor.Runtime object, bound to supervisor.runtime +// It currently only has properties, and no state. +const super_runtime_obj_t common_hal_supervisor_runtime_obj = { + .base = { + .type = &supervisor_runtime_type, + }, +}; \ No newline at end of file diff --git a/ports/mimxrt10xx/common-hal/time/__init__.c b/ports/mimxrt10xx/common-hal/time/__init__.c new file mode 100644 index 000000000..2d82b3d1a --- /dev/null +++ b/ports/mimxrt10xx/common-hal/time/__init__.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" + +#include "shared-bindings/time/__init__.h" + +#include "supervisor/shared/tick.h" + +inline uint64_t common_hal_time_monotonic() { + return supervisor_ticks_ms64(); +} + +void common_hal_time_delay_ms(uint32_t delay) { + mp_hal_delay_ms(delay); +} diff --git a/ports/mimxrt10xx/fatfs_port.c b/ports/mimxrt10xx/fatfs_port.c new file mode 100644 index 000000000..c4ce18c2a --- /dev/null +++ b/ports/mimxrt10xx/fatfs_port.c @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" /* FatFs lower layer API */ +#include "lib/oofatfs/diskio.h" /* FatFs lower layer API */ +#include "lib/timeutils/timeutils.h" + +#if CIRCUITPY_RTC +#include "shared-bindings/rtc/RTC.h" +#endif + +DWORD get_fattime(void) { +#if CIRCUITPY_RTC + timeutils_struct_time_t tm; + common_hal_rtc_get_time(&tm); + return ((tm.tm_year - 1980) << 25) | (tm.tm_mon << 21) | (tm.tm_mday << 16) | + (tm.tm_hour << 11) | (tm.tm_min << 5) | (tm.tm_sec >> 1); +#else + return ((2016 - 1980) << 25) | ((9) << 21) | ((1) << 16) | ((16) << 11) | ((43) << 5) | (35 / 2); +#endif + + +} diff --git a/ports/mimxrt10xx/mpconfigport.h b/ports/mimxrt10xx/mpconfigport.h new file mode 100644 index 000000000..47b793fed --- /dev/null +++ b/ports/mimxrt10xx/mpconfigport.h @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef __INCLUDED_MPCONFIGPORT_H +#define __INCLUDED_MPCONFIGPORT_H + +#define MICROPY_PY_SYS_PLATFORM "NXP IMXRT10XX" +#define SPI_FLASH_MAX_BAUDRATE 24000000 + +// 20kiB stack +#define CIRCUITPY_DEFAULT_STACK_SIZE 0x5000 +#define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (0) +#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) +#define MICROPY_PY_FUNCTION_ATTRS (0) +#define MICROPY_PY_IO (1) +#define MICROPY_PY_UJSON (1) +#define MICROPY_PY_REVERSE_SPECIAL_METHODS (0) + +#include "py/circuitpy_mpconfig.h" + +#define MICROPY_PORT_ROOT_POINTERS \ + CIRCUITPY_COMMON_ROOT_POINTERS \ + +// TODO: +// mp_obj_t playing_audio[AUDIO_DMA_CHANNEL_COUNT]; + +#endif // __INCLUDED_MPCONFIGPORT_H diff --git a/ports/mimxrt10xx/mpconfigport.mk b/ports/mimxrt10xx/mpconfigport.mk new file mode 100644 index 000000000..f1106e88f --- /dev/null +++ b/ports/mimxrt10xx/mpconfigport.mk @@ -0,0 +1,20 @@ +# Define an equivalent for MICROPY_LONGINT_IMPL, to pass to $(MPY-TOOL) in py/mkrules.mk +# $(MPY-TOOL) needs to know what kind of longint to use (if any) to freeze long integers. +# This should correspond to the MICROPY_LONGINT_IMPL definition in mpconfigport.h. + +ifeq ($(LONGINT_IMPL),NONE) +MPY_TOOL_LONGINT_IMPL = -mlongint-impl=none +endif + +ifeq ($(LONGINT_IMPL),MPZ) +MPY_TOOL_LONGINT_IMPL = -mlongint-impl=mpz +endif + +ifeq ($(LONGINT_IMPL),LONGLONG) +MPY_TOOL_LONGINT_IMPL = -mlongint-impl=longlong +endif + +INTERNAL_LIBM = 1 + +USB_SERIAL_NUMBER_LENGTH = 32 +USB_MSC_MAX_PACKET_SIZE = 512 diff --git a/ports/mimxrt10xx/mphalport.c b/ports/mimxrt10xx/mphalport.c new file mode 100644 index 000000000..b333730b9 --- /dev/null +++ b/ports/mimxrt10xx/mphalport.c @@ -0,0 +1,65 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mpstate.h" +#include "py/smallint.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "supervisor/shared/tick.h" + +#include "fsl_common.h" + +void mp_hal_delay_ms(mp_uint_t delay) { + uint64_t start_tick = supervisor_ticks_ms64(); + uint64_t duration = 0; + while (duration < delay) { + RUN_BACKGROUND_TASKS; + // Check to see if we've been CTRL-Ced by autoreload or the user. + if(MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)) || + MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception))) { + break; + } + duration = (supervisor_ticks_ms64() - start_tick); + // TODO(tannewt): Go to sleep for a little while while we wait. + } +} + +void mp_hal_delay_us(mp_uint_t delay) { +#ifdef MIMXRT1011_SERIES + SDK_DelayAtLeastUs(delay, SystemCoreClock); +#else + SDK_DelayAtLeastUs(delay); +#endif +} + +void mp_hal_disable_all_interrupts(void) { + common_hal_mcu_disable_interrupts(); +} + +void mp_hal_enable_all_interrupts(void) { + common_hal_mcu_enable_interrupts(); +} diff --git a/ports/mimxrt10xx/mphalport.h b/ports/mimxrt10xx/mphalport.h new file mode 100644 index 000000000..1acc461b7 --- /dev/null +++ b/ports/mimxrt10xx/mphalport.h @@ -0,0 +1,52 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_MPHALPORT_H +#define MICROPY_INCLUDED_MIMXRT10XX_MPHALPORT_H + +#include "py/obj.h" + +#include "lib/oofatfs/ff.h" + +#include "supervisor/shared/tick.h" + +// Global millisecond tick count (driven by SysTick interrupt). +static inline mp_uint_t mp_hal_ticks_ms(void) { + return supervisor_ticks_ms32(); +} +// Number of bytes in receive buffer +volatile uint8_t usb_rx_count; +volatile bool mp_cdc_enabled; + +int receive_usb(void); + +void mp_hal_set_interrupt_char(int c); + +void mp_hal_disable_all_interrupts(void); +void mp_hal_enable_all_interrupts(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_MPHALPORT_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c new file mode 100644 index 000000000..59f7bcd24 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c @@ -0,0 +1,293 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "mpconfigport.h" + +#include "fsl_clock.h" +#include "fsl_iomuxc.h" + +#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */ +#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */ + +#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 500000000U /*!< Core clock frequency: 500000000Hz */ + +/* Clock outputs (values are in Hz): */ +#define BOARD_BOOTCLOCKRUN_ADC_ALT_CLK 40000000UL +#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL +#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL +#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL +#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL +#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL +#define BOARD_BOOTCLOCKRUN_CORE_CLK_ROOT 500000000UL +#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK 500000000UL +#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL +#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 132000000UL +#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 62500000UL +#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 62500000UL +#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 125000000UL +#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL +#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL +#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL +#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 62500000UL +#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL +#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL +#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL +#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL +#define BOARD_BOOTCLOCKRUN_USBPHY_CLK 0UL + +/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration. + */ +//extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN; +/*! @brief Sys PLL for BOARD_BootClockRUN configuration. + */ +//extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN; +/*! @brief Enet PLL set for BOARD_BootClockRUN configuration. + */ +//extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN; + +const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = { + .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */ + .numerator = 0, /* 30 bit numerator of fractional loop divider */ + .denominator = 1, /* 30 bit denominator of fractional loop divider */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; +const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = { + .loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; +const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN = { + .enableClkOutput500M = true, /* Enable the PLL providing the ENET 500MHz reference clock */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; +void clocks_init(void) { + /* Init RTC OSC clock frequency. */ + CLOCK_SetRtcXtalFreq(32768U); + /* Enable 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK; + /* Use free 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK; + /* Set XTAL 24MHz clock frequency. */ + CLOCK_SetXtalFreq(24000000U); + /* Enable XTAL 24MHz clock source. */ + CLOCK_InitExternalClk(0); + /* Enable internal RC. */ + CLOCK_InitRcOsc24M(); + /* Switch clock source to external OSC. */ + CLOCK_SwitchOsc(kCLOCK_XtalOsc); + /* Set Oscillator ready counter value. */ + CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127); + /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */ + CLOCK_SetMux(kCLOCK_PeriphMux, 1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */ + /* Setting the VDD_SOC to 1.5V. It is necessary to config CORE to 500Mhz. */ + DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12); + /* Waiting for DCDC_STS_DC_OK bit is asserted */ + while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0)) + { + } + /* Set AHB_PODF. */ + CLOCK_SetDiv(kCLOCK_AhbDiv, 0); + /* Disable IPG clock gate. */ + CLOCK_DisableClock(kCLOCK_Adc1); + CLOCK_DisableClock(kCLOCK_Xbar1); + /* Set IPG_PODF. */ + CLOCK_SetDiv(kCLOCK_IpgDiv, 3); + /* Disable PERCLK clock gate. */ + CLOCK_DisableClock(kCLOCK_Gpt1); + CLOCK_DisableClock(kCLOCK_Gpt1S); + CLOCK_DisableClock(kCLOCK_Gpt2); + CLOCK_DisableClock(kCLOCK_Gpt2S); + CLOCK_DisableClock(kCLOCK_Pit); + /* Set PERCLK_PODF. */ + CLOCK_SetDiv(kCLOCK_PerclkDiv, 1); + /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. + * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left + * unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as + * well.*/ +#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) + /* Disable Flexspi clock gate. */ + CLOCK_DisableClock(kCLOCK_FlexSpi); + /* Set FLEXSPI_PODF. */ + CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3); + /* Set Flexspi clock source. */ + CLOCK_SetMux(kCLOCK_FlexspiMux, 0); + CLOCK_SetMux(kCLOCK_FlexspiSrcMux, 0); +#endif + /* Disable ADC_ACLK_EN clock gate. */ + CCM->CSCMR2 &= ~CCM_CSCMR2_ADC_ACLK_EN_MASK; + /* Set ADC_ACLK_PODF. */ + CLOCK_SetDiv(kCLOCK_AdcDiv, 11); + /* Disable LPSPI clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpspi1); + CLOCK_DisableClock(kCLOCK_Lpspi2); + /* Set LPSPI_PODF. */ + CLOCK_SetDiv(kCLOCK_LpspiDiv, 7); + /* Set Lpspi clock source. */ + CLOCK_SetMux(kCLOCK_LpspiMux, 1); + /* Disable TRACE clock gate. */ + CLOCK_DisableClock(kCLOCK_Trace); + /* Set TRACE_PODF. */ + CLOCK_SetDiv(kCLOCK_TraceDiv, 2); + /* Set Trace clock source. */ + CLOCK_SetMux(kCLOCK_TraceMux, 2); + /* Disable SAI1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai1); + /* Set SAI1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3); + /* Set SAI1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai1Div, 1); + /* Set Sai1 clock source. */ + CLOCK_SetMux(kCLOCK_Sai1Mux, 0); + /* Disable SAI3 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai3); + /* Set SAI3_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3); + /* Set SAI3_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai3Div, 1); + /* Set Sai3 clock source. */ + CLOCK_SetMux(kCLOCK_Sai3Mux, 0); + /* Disable Lpi2c clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpi2c1); + CLOCK_DisableClock(kCLOCK_Lpi2c2); + /* Set LPI2C_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 5U); + /* Set Lpi2c clock source. */ + CLOCK_SetMux(kCLOCK_Lpi2cMux, 0); + /* Disable UART clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpuart1); + CLOCK_DisableClock(kCLOCK_Lpuart2); + CLOCK_DisableClock(kCLOCK_Lpuart3); + CLOCK_DisableClock(kCLOCK_Lpuart4); + /* Set UART_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_UartDiv, 0); + /* Set Uart clock source. */ + CLOCK_SetMux(kCLOCK_UartMux, 0); + /* Disable SPDIF clock gate. */ + CLOCK_DisableClock(kCLOCK_Spdif); + /* Set SPDIF0_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1); + /* Set SPDIF0_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Spdif0Div, 7); + /* Set Spdif clock source. */ + CLOCK_SetMux(kCLOCK_SpdifMux, 3); + /* Disable Flexio1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Flexio1); + /* Set FLEXIO1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1); + /* Set FLEXIO1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Flexio1Div, 7); + /* Set Flexio1 clock source. */ + CLOCK_SetMux(kCLOCK_Flexio1Mux, 3); + /* Set Pll3 sw clock source. */ + CLOCK_SetMux(kCLOCK_Pll3SwMux, 0); + /* Init System PLL. */ + CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN); + /* Init System pfd0. */ + CLOCK_InitSysPfd(kCLOCK_Pfd0, 27); + /* Init System pfd1. */ + CLOCK_InitSysPfd(kCLOCK_Pfd1, 16); + /* Init System pfd2. */ + CLOCK_InitSysPfd(kCLOCK_Pfd2, 18); + /* Init System pfd3. */ + CLOCK_InitSysPfd(kCLOCK_Pfd3, 18); + /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. + * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left + * unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as + * well.*/ +#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) + /* Init Usb1 PLL. */ + CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN); + /* Init Usb1 pfd0. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22); + /* Init Usb1 pfd1. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16); + /* Init Usb1 pfd2. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17); + /* Init Usb1 pfd3. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18); + /* Disable Usb1 PLL output for USBPHY1. */ + CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK; +#endif + /* DeInit Audio PLL. */ + CLOCK_DeinitAudioPll(); + /* Bypass Audio PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1); + /* Set divider for Audio PLL. */ + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK; + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK; + /* Enable Audio PLL output. */ + CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK; + /* Init Enet PLL. */ + CLOCK_InitEnetPll(&enetPllConfig_BOARD_BootClockRUN); + /* Set preperiph clock source. */ + CLOCK_SetMux(kCLOCK_PrePeriphMux, 3); + /* Set periph clock source. */ + CLOCK_SetMux(kCLOCK_PeriphMux, 0); + /* Set periph clock2 clock source. */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0); + /* Set per clock source. */ + CLOCK_SetMux(kCLOCK_PerclkMux, 0); + /* Set clock out1 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0); + /* Set clock out1 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1); + /* Set clock out2 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); + /* Set clock out2 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18); + /* Set clock out1 drives clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK; + /* Disable clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; + /* Disable clock out2. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK; + /* Set SAI1 MCLK1 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0); + /* Set SAI1 MCLK2 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0); + /* Set SAI1 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0); + /* Set SAI3 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0); + /* Set MQS configuration. */ + IOMUXC_MQSConfig(IOMUXC_GPR, kIOMUXC_MqsPwmOverSampleRate32, 0); + /* Set GPT1 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK; + /* Set GPT2 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK; + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; + + CLOCK_EnableClock(kCLOCK_Iomuxc); +} diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c new file mode 100644 index 000000000..e9d735830 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c @@ -0,0 +1,148 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/periph.h" + +LPI2C_Type *mcu_i2c_banks[] = { LPI2C1, LPI2C2 }; + +const mcu_periph_obj_t mcu_i2c_sda_list[8] = { + PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_13), + PERIPH_PIN(1, 1, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 1, &pin_GPIO_SD_05), + PERIPH_PIN(1, 1, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 2, &pin_GPIO_11), + PERIPH_PIN(1, 3, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 3, &pin_GPIO_01), + + PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_07), + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 1, &pin_GPIO_AD_01), + PERIPH_PIN(2, 1, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 2, &pin_GPIO_SD_07), + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 3, &pin_GPIO_09), +}; + +const mcu_periph_obj_t mcu_i2c_scl_list[8] = { + PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_14), + PERIPH_PIN(1, 1, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_06), + PERIPH_PIN(1, 1, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 2, &pin_GPIO_12), + PERIPH_PIN(1, 3, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 3, &pin_GPIO_02), + + PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_08), + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_02), + PERIPH_PIN(2, 1, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 2, &pin_GPIO_SD_08), + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 3, &pin_GPIO_10), +}; + +LPSPI_Type *mcu_spi_banks[] = { LPSPI1, LPSPI2 }; + +const mcu_periph_obj_t mcu_spi_sck_list[4] = { + PERIPH_PIN(1, 0, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_06), + PERIPH_PIN(1, 2, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 1, &pin_GPIO_SD_08), + + PERIPH_PIN(2, 0, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_12), + PERIPH_PIN(2, 1, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_SD_11), +}; + +const mcu_periph_obj_t mcu_spi_mosi_list[4] = { + PERIPH_PIN(1, 0, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_04), + PERIPH_PIN(1, 2, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 1, &pin_GPIO_SD_06), + + PERIPH_PIN(2, 0, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_10), + PERIPH_PIN(2, 1, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_SD_10), +}; + +const mcu_periph_obj_t mcu_spi_miso_list[4] = { + PERIPH_PIN(1, 0, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_03), + PERIPH_PIN(1, 2, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 1, &pin_GPIO_SD_05), + + PERIPH_PIN(2, 0, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_09), + PERIPH_PIN(2, 1, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_SD_09), +}; + +LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4 }; + +const mcu_periph_obj_t mcu_uart_rx_list[9] = { + PERIPH_PIN(1, 2, kIOMUXC_LPUART1_RXD_SELECT_INPUT, 0, &pin_GPIO_SD_11), + PERIPH_PIN(1, 0, kIOMUXC_LPUART1_RXD_SELECT_INPUT, 1, &pin_GPIO_09), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RXD_SELECT_INPUT, 0, &pin_GPIO_SD_09), + PERIPH_PIN(2, 0, kIOMUXC_LPUART2_RXD_SELECT_INPUT, 1, &pin_GPIO_13), + + PERIPH_PIN(3, 1, kIOMUXC_LPUART3_RXD_SELECT_INPUT, 0, &pin_GPIO_AD_07), + PERIPH_PIN(3, 0, kIOMUXC_LPUART3_RXD_SELECT_INPUT, 1, &pin_GPIO_11), + PERIPH_PIN(3, 3, kIOMUXC_LPUART3_RXD_SELECT_INPUT, 2, &pin_GPIO_07), + + PERIPH_PIN(4, 0, kIOMUXC_LPUART4_RXD_SELECT_INPUT, 0, &pin_GPIO_AD_01), + PERIPH_PIN(4, 3, kIOMUXC_LPUART4_RXD_SELECT_INPUT, 1, &pin_GPIO_05), +}; + +const mcu_periph_obj_t mcu_uart_tx_list[9] = { + PERIPH_PIN(1, 2, kIOMUXC_LPUART1_TXD_SELECT_INPUT, 0, &pin_GPIO_SD_12), + PERIPH_PIN(1, 0, kIOMUXC_LPUART1_TXD_SELECT_INPUT, 1, &pin_GPIO_10), + + PERIPH_PIN(2, 0, kIOMUXC_LPUART2_TXD_SELECT_INPUT, 0, &pin_GPIO_AD_00), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TXD_SELECT_INPUT, 1, &pin_GPIO_SD_10), + + PERIPH_PIN(3, 1, kIOMUXC_LPUART3_TXD_SELECT_INPUT, 0, &pin_GPIO_AD_08), + PERIPH_PIN(3, 0, kIOMUXC_LPUART3_TXD_SELECT_INPUT, 1, &pin_GPIO_12), + PERIPH_PIN(3, 3, kIOMUXC_LPUART3_TXD_SELECT_INPUT, 2, &pin_GPIO_08), + + PERIPH_PIN(4, 0, kIOMUXC_LPUART4_TXD_SELECT_INPUT, 0, &pin_GPIO_AD_02), + PERIPH_PIN(4, 3, kIOMUXC_LPUART4_TXD_SELECT_INPUT, 1, &pin_GPIO_06), +}; + +const mcu_pwm_obj_t mcu_pwm_list[20] = { + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_02), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_SD_02), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 2, &pin_GPIO_01), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 2, &pin_GPIO_SD_01), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 1, &pin_GPIO_AD_12), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 2, &pin_GPIO_04), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 2, &pin_GPIO_SD_04), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 2, &pin_GPIO_03), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 2, &pin_GPIO_SD_03), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 1, &pin_GPIO_AD_11), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 2, &pin_GPIO_06), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 2, &pin_GPIO_AD_04), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 2, &pin_GPIO_05), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 2, &pin_GPIO_AD_03), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 1, &pin_GPIO_AD_10), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_08), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_AD_06), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_07), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_AD_05), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmX, 1, &pin_GPIO_AD_09), +}; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h new file mode 100644 index 000000000..c91d5808a --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h @@ -0,0 +1,42 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H + +extern const mcu_periph_obj_t mcu_i2c_sda_list[8]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[8]; + +extern const mcu_periph_obj_t mcu_spi_sck_list[4]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[4]; +extern const mcu_periph_obj_t mcu_spi_miso_list[4]; + +extern const mcu_periph_obj_t mcu_uart_rx_list[9]; +extern const mcu_periph_obj_t mcu_uart_tx_list[9]; + +extern const mcu_pwm_obj_t mcu_pwm_list[20]; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIP_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c new file mode 100644 index 000000000..0b219468f --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c @@ -0,0 +1,77 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/pins.h" + +const mcu_pin_obj_t pin_GPIO_00 = PIN(GPIO1, 0, GPIO_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_01 = PIN(GPIO1, 1, GPIO_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_02 = PIN(GPIO1, 2, GPIO_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_03 = PIN(GPIO1, 3, GPIO_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_04 = PIN(GPIO1, 4, GPIO_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_05 = PIN(GPIO1, 5, GPIO_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_06 = PIN(GPIO1, 6, GPIO_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_07 = PIN(GPIO1, 7, GPIO_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_08 = PIN(GPIO1, 8, GPIO_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_09 = PIN(GPIO1, 9, GPIO_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_10 = PIN(GPIO1, 10, GPIO_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_11 = PIN(GPIO1, 11, GPIO_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_12 = PIN(GPIO1, 12, GPIO_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_13 = PIN(GPIO1, 13, GPIO_11, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_AD_00 = PIN(GPIO1, 14, GPIO_AD_00, ADC1, 0); +const mcu_pin_obj_t pin_GPIO_AD_01 = PIN(GPIO1, 15, GPIO_AD_01, ADC1, 1); +const mcu_pin_obj_t pin_GPIO_AD_02 = PIN(GPIO1, 16, GPIO_AD_02, ADC1, 2); +const mcu_pin_obj_t pin_GPIO_AD_03 = PIN(GPIO1, 17, GPIO_AD_03, ADC1, 3); +const mcu_pin_obj_t pin_GPIO_AD_04 = PIN(GPIO1, 18, GPIO_AD_04, ADC1, 4); +const mcu_pin_obj_t pin_GPIO_AD_05 = PIN(GPIO1, 19, GPIO_AD_05, ADC1, 5); +const mcu_pin_obj_t pin_GPIO_AD_06 = PIN(GPIO1, 20, GPIO_AD_06, ADC1, 6); +const mcu_pin_obj_t pin_GPIO_AD_07 = PIN(GPIO1, 21, GPIO_AD_07, ADC1, 7); +const mcu_pin_obj_t pin_GPIO_AD_08 = PIN(GPIO1, 22, GPIO_AD_08, ADC1, 8); +const mcu_pin_obj_t pin_GPIO_AD_09 = PIN(GPIO1, 23, GPIO_AD_09, ADC1, 9); +const mcu_pin_obj_t pin_GPIO_AD_10 = PIN(GPIO1, 24, GPIO_AD_10, ADC1, 10); +const mcu_pin_obj_t pin_GPIO_AD_11 = PIN(GPIO1, 25, GPIO_AD_11, ADC1, 11); +const mcu_pin_obj_t pin_GPIO_AD_12 = PIN(GPIO1, 26, GPIO_AD_12, ADC1, 12); +const mcu_pin_obj_t pin_GPIO_AD_13 = PIN(GPIO1, 27, GPIO_AD_13, ADC1, 13); +const mcu_pin_obj_t pin_GPIO_AD_14 = PIN(GPIO1, 28, GPIO_AD_14, ADC1, 14); + +const mcu_pin_obj_t pin_GPIO_SD_00 = PIN(GPIO2, 0, GPIO_SD_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_01 = PIN(GPIO2, 1, GPIO_SD_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_02 = PIN(GPIO2, 2, GPIO_SD_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_03 = PIN(GPIO2, 3, GPIO_SD_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_04 = PIN(GPIO2, 4, GPIO_SD_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_05 = PIN(GPIO2, 5, GPIO_SD_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_06 = PIN(GPIO2, 6, GPIO_SD_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_07 = PIN(GPIO2, 7, GPIO_SD_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_08 = PIN(GPIO2, 8, GPIO_SD_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_09 = PIN(GPIO2, 9, GPIO_SD_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_10 = PIN(GPIO2, 10, GPIO_SD_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_11 = PIN(GPIO2, 11, GPIO_SD_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_12 = PIN(GPIO2, 12, GPIO_SD_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_13 = PIN(GPIO2, 13, GPIO_SD_13, NO_ADC, 0); + diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.h new file mode 100644 index 000000000..6b31d6d8e --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.h @@ -0,0 +1,77 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PINS_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PINS_H + +extern const mcu_pin_obj_t pin_GPIO_00; +extern const mcu_pin_obj_t pin_GPIO_01; +extern const mcu_pin_obj_t pin_GPIO_02; +extern const mcu_pin_obj_t pin_GPIO_03; +extern const mcu_pin_obj_t pin_GPIO_04; +extern const mcu_pin_obj_t pin_GPIO_05; +extern const mcu_pin_obj_t pin_GPIO_06; +extern const mcu_pin_obj_t pin_GPIO_07; +extern const mcu_pin_obj_t pin_GPIO_08; +extern const mcu_pin_obj_t pin_GPIO_09; +extern const mcu_pin_obj_t pin_GPIO_10; +extern const mcu_pin_obj_t pin_GPIO_11; +extern const mcu_pin_obj_t pin_GPIO_12; +extern const mcu_pin_obj_t pin_GPIO_13; + +extern const mcu_pin_obj_t pin_GPIO_SD_00; +extern const mcu_pin_obj_t pin_GPIO_SD_01; +extern const mcu_pin_obj_t pin_GPIO_SD_02; +extern const mcu_pin_obj_t pin_GPIO_SD_03; +extern const mcu_pin_obj_t pin_GPIO_SD_04; +extern const mcu_pin_obj_t pin_GPIO_SD_05; +extern const mcu_pin_obj_t pin_GPIO_SD_06; +extern const mcu_pin_obj_t pin_GPIO_SD_07; +extern const mcu_pin_obj_t pin_GPIO_SD_08; +extern const mcu_pin_obj_t pin_GPIO_SD_09; +extern const mcu_pin_obj_t pin_GPIO_SD_10; +extern const mcu_pin_obj_t pin_GPIO_SD_11; +extern const mcu_pin_obj_t pin_GPIO_SD_12; +extern const mcu_pin_obj_t pin_GPIO_SD_13; +extern const mcu_pin_obj_t pin_GPIO_SD_14; + +extern const mcu_pin_obj_t pin_GPIO_AD_00; +extern const mcu_pin_obj_t pin_GPIO_AD_01; +extern const mcu_pin_obj_t pin_GPIO_AD_02; +extern const mcu_pin_obj_t pin_GPIO_AD_03; +extern const mcu_pin_obj_t pin_GPIO_AD_04; +extern const mcu_pin_obj_t pin_GPIO_AD_05; +extern const mcu_pin_obj_t pin_GPIO_AD_06; +extern const mcu_pin_obj_t pin_GPIO_AD_07; +extern const mcu_pin_obj_t pin_GPIO_AD_08; +extern const mcu_pin_obj_t pin_GPIO_AD_09; +extern const mcu_pin_obj_t pin_GPIO_AD_10; +extern const mcu_pin_obj_t pin_GPIO_AD_11; +extern const mcu_pin_obj_t pin_GPIO_AD_12; +extern const mcu_pin_obj_t pin_GPIO_AD_13; +extern const mcu_pin_obj_t pin_GPIO_AD_14; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PINS_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c new file mode 100644 index 000000000..422834529 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c @@ -0,0 +1,366 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "mpconfigport.h" + +#include "fsl_clock.h" +#include "fsl_iomuxc.h" + +#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */ +#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */ +#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 600000000U /*!< Core clock frequency: 600000000Hz */ + +/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration. + */ +//extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN; +/*! @brief Sys PLL for BOARD_BootClockRUN configuration. + */ +//extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN; +/*! @brief Enet PLL set for BOARD_BootClockRUN configuration. + */ +//extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN; + +const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN = + { + .loopDivider = 100, /* PLL loop divider, Fout = Fin * 50 */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ + }; +const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = + { + .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */ + .numerator = 0, /* 30 bit numerator of fractional loop divider */ + .denominator = 1, /* 30 bit denominator of fractional loop divider */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ + }; +const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = + { + .loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ + }; +void clocks_init(void) { + /* Init RTC OSC clock frequency. */ + CLOCK_SetRtcXtalFreq(32768U); + /* Enable 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK; + /* Use free 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK; + /* Set XTAL 24MHz clock frequency. */ + CLOCK_SetXtalFreq(24000000U); + /* Enable XTAL 24MHz clock source. */ + CLOCK_InitExternalClk(0); + /* Enable internal RC. */ + CLOCK_InitRcOsc24M(); + /* Switch clock source to external OSC. */ + CLOCK_SwitchOsc(kCLOCK_XtalOsc); + /* Set Oscillator ready counter value. */ + CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127); + /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */ + CLOCK_SetMux(kCLOCK_PeriphMux, 1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */ + /* Setting the VDD_SOC to 1.275V. It is necessary to config AHB to 600Mhz. */ + DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x13); + /* Waiting for DCDC_STS_DC_OK bit is asserted */ + while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0)) + { + } + /* Set AHB_PODF. */ + CLOCK_SetDiv(kCLOCK_AhbDiv, 0); + /* Disable IPG clock gate. */ + CLOCK_DisableClock(kCLOCK_Adc1); + CLOCK_DisableClock(kCLOCK_Adc2); + CLOCK_DisableClock(kCLOCK_Xbar1); + CLOCK_DisableClock(kCLOCK_Xbar2); + /* Set IPG_PODF. */ + CLOCK_SetDiv(kCLOCK_IpgDiv, 3); + /* Set ARM_PODF. */ + CLOCK_SetDiv(kCLOCK_ArmDiv, 1); + /* Set PERIPH_CLK2_PODF. */ + CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0); + /* Disable PERCLK clock gate. */ + CLOCK_DisableClock(kCLOCK_Gpt1); + CLOCK_DisableClock(kCLOCK_Gpt1S); + CLOCK_DisableClock(kCLOCK_Gpt2); + CLOCK_DisableClock(kCLOCK_Gpt2S); + CLOCK_DisableClock(kCLOCK_Pit); + /* Set PERCLK_PODF. */ + CLOCK_SetDiv(kCLOCK_PerclkDiv, 1); + /* Disable USDHC1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Usdhc1); + /* Set USDHC1_PODF. */ + CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1); + /* Set Usdhc1 clock source. */ + CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0); + /* Disable USDHC2 clock gate. */ + CLOCK_DisableClock(kCLOCK_Usdhc2); + /* Set USDHC2_PODF. */ + CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1); + /* Set Usdhc2 clock source. */ + CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0); + /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. + * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged. + * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/ +#ifndef SKIP_SYSCLK_INIT + /* Disable Semc clock gate. */ + CLOCK_DisableClock(kCLOCK_Semc); + /* Set SEMC_PODF. */ + CLOCK_SetDiv(kCLOCK_SemcDiv, 7); + /* Set Semc alt clock source. */ + CLOCK_SetMux(kCLOCK_SemcAltMux, 0); + /* Set Semc clock source. */ + CLOCK_SetMux(kCLOCK_SemcMux, 0); +#endif + /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. + * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged. + * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/ +#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) + /* Disable Flexspi clock gate. */ + CLOCK_DisableClock(kCLOCK_FlexSpi); + /* Set FLEXSPI_PODF. */ + CLOCK_SetDiv(kCLOCK_FlexspiDiv, 1); + /* Set Flexspi clock source. */ + CLOCK_SetMux(kCLOCK_FlexspiMux, 3); +#endif + /* Disable LPSPI clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpspi1); + CLOCK_DisableClock(kCLOCK_Lpspi2); + CLOCK_DisableClock(kCLOCK_Lpspi3); + CLOCK_DisableClock(kCLOCK_Lpspi4); + /* Set LPSPI_PODF. */ + CLOCK_SetDiv(kCLOCK_LpspiDiv, 4); + /* Set Lpspi clock source. */ + CLOCK_SetMux(kCLOCK_LpspiMux, 2); + /* Disable TRACE clock gate. */ + CLOCK_DisableClock(kCLOCK_Trace); + /* Set TRACE_PODF. */ + CLOCK_SetDiv(kCLOCK_TraceDiv, 2); + /* Set Trace clock source. */ + CLOCK_SetMux(kCLOCK_TraceMux, 2); + /* Disable SAI1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai1); + /* Set SAI1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3); + /* Set SAI1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai1Div, 1); + /* Set Sai1 clock source. */ + CLOCK_SetMux(kCLOCK_Sai1Mux, 0); + /* Disable SAI2 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai2); + /* Set SAI2_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3); + /* Set SAI2_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai2Div, 1); + /* Set Sai2 clock source. */ + CLOCK_SetMux(kCLOCK_Sai2Mux, 0); + /* Disable SAI3 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai3); + /* Set SAI3_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3); + /* Set SAI3_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai3Div, 1); + /* Set Sai3 clock source. */ + CLOCK_SetMux(kCLOCK_Sai3Mux, 0); + /* Disable Lpi2c clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpi2c1); + CLOCK_DisableClock(kCLOCK_Lpi2c2); + CLOCK_DisableClock(kCLOCK_Lpi2c3); + /* Set LPI2C_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0); + /* Set Lpi2c clock source. */ + CLOCK_SetMux(kCLOCK_Lpi2cMux, 0); + /* Disable CAN clock gate. */ + CLOCK_DisableClock(kCLOCK_Can1); + CLOCK_DisableClock(kCLOCK_Can2); + CLOCK_DisableClock(kCLOCK_Can3); + CLOCK_DisableClock(kCLOCK_Can1S); + CLOCK_DisableClock(kCLOCK_Can2S); + CLOCK_DisableClock(kCLOCK_Can3S); + /* Set CAN_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_CanDiv, 1); + /* Set Can clock source. */ + CLOCK_SetMux(kCLOCK_CanMux, 2); + /* Disable UART clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpuart1); + CLOCK_DisableClock(kCLOCK_Lpuart2); + CLOCK_DisableClock(kCLOCK_Lpuart3); + CLOCK_DisableClock(kCLOCK_Lpuart4); + CLOCK_DisableClock(kCLOCK_Lpuart5); + CLOCK_DisableClock(kCLOCK_Lpuart6); + CLOCK_DisableClock(kCLOCK_Lpuart7); + CLOCK_DisableClock(kCLOCK_Lpuart8); + /* Set UART_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_UartDiv, 0); + /* Set Uart clock source. */ + CLOCK_SetMux(kCLOCK_UartMux, 0); + /* Disable SPDIF clock gate. */ + CLOCK_DisableClock(kCLOCK_Spdif); + /* Set SPDIF0_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1); + /* Set SPDIF0_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Spdif0Div, 7); + /* Set Spdif clock source. */ + CLOCK_SetMux(kCLOCK_SpdifMux, 3); + /* Disable Flexio1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Flexio1); + /* Set FLEXIO1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1); + /* Set FLEXIO1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Flexio1Div, 7); + /* Set Flexio1 clock source. */ + CLOCK_SetMux(kCLOCK_Flexio1Mux, 3); + /* Disable Flexio2 clock gate. */ + CLOCK_DisableClock(kCLOCK_Flexio2); + /* Set FLEXIO2_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1); + /* Set FLEXIO2_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Flexio2Div, 7); + /* Set Flexio2 clock source. */ + CLOCK_SetMux(kCLOCK_Flexio2Mux, 3); + /* Set Pll3 sw clock source. */ + CLOCK_SetMux(kCLOCK_Pll3SwMux, 0); + /* Init ARM PLL. */ + CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN); + /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. + * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged. + * Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/ +#ifndef SKIP_SYSCLK_INIT + /* Init System PLL. */ + CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN); + /* Init System pfd0. */ + CLOCK_InitSysPfd(kCLOCK_Pfd0, 27); + /* Init System pfd1. */ + CLOCK_InitSysPfd(kCLOCK_Pfd1, 16); + /* Init System pfd2. */ + CLOCK_InitSysPfd(kCLOCK_Pfd2, 24); + /* Init System pfd3. */ + CLOCK_InitSysPfd(kCLOCK_Pfd3, 16); +#endif + /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. + * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged. + * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/ +#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) + /* Init Usb1 PLL. */ + CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN); + /* Init Usb1 pfd0. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33); + /* Init Usb1 pfd1. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16); + /* Init Usb1 pfd2. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17); + /* Init Usb1 pfd3. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19); + /* Disable Usb1 PLL output for USBPHY1. */ + CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK; +#endif + /* DeInit Audio PLL. */ + CLOCK_DeinitAudioPll(); + /* Bypass Audio PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1); + /* Set divider for Audio PLL. */ + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK; + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK; + /* Enable Audio PLL output. */ + CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK; + /* DeInit Video PLL. */ + CLOCK_DeinitVideoPll(); + /* Bypass Video PLL. */ + CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_BYPASS_MASK; + /* Set divider for Video PLL. */ + CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(0); + /* Enable Video PLL output. */ + CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_ENABLE_MASK; + /* DeInit Enet PLL. */ + CLOCK_DeinitEnetPll(); + /* Bypass Enet PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1); + /* Set Enet output divider. */ + CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1); + /* Enable Enet output. */ + CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK; + /* Set Enet2 output divider. */ + CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT(0); + /* Enable Enet2 output. */ + CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET2_REF_EN_MASK; + /* Enable Enet25M output. */ + CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK; + /* DeInit Usb2 PLL. */ + CLOCK_DeinitUsb2Pll(); + /* Bypass Usb2 PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllUsb2, 1); + /* Enable Usb2 PLL output. */ + CCM_ANALOG->PLL_USB2 |= CCM_ANALOG_PLL_USB2_ENABLE_MASK; + /* Set preperiph clock source. */ + CLOCK_SetMux(kCLOCK_PrePeriphMux, 3); + /* Set periph clock source. */ + CLOCK_SetMux(kCLOCK_PeriphMux, 0); + /* Set periph clock2 clock source. */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0); + /* Set per clock source. */ + CLOCK_SetMux(kCLOCK_PerclkMux, 0); + /* Set lvds1 clock source. */ + CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0); + /* Set clock out1 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0); + /* Set clock out1 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1); + /* Set clock out2 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); + /* Set clock out2 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18); + /* Set clock out1 drives clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK; + /* Disable clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; + /* Disable clock out2. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK; + /* Set SAI1 MCLK1 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0); + /* Set SAI1 MCLK2 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0); + /* Set SAI1 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0); + /* Set SAI2 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0); + /* Set SAI3 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0); + /* Set MQS configuration. */ + IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0); + /* Set ENET1 Tx clock source. */ + IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1RefClkMode, false); + /* Set ENET2 Tx clock source. */ +#if defined(FSL_IOMUXC_DRIVER_VERSION) && (FSL_IOMUXC_DRIVER_VERSION != (MAKE_VERSION(2, 0, 0))) + IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET2RefClkMode, false); +#else + IOMUXC_EnableMode(IOMUXC_GPR, IOMUXC_GPR_GPR1_ENET2_CLK_SEL_MASK, false); +#endif + /* Set GPT1 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK; + /* Set GPT2 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK; + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; + + CLOCK_EnableClock(kCLOCK_Iomuxc); +} diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c new file mode 100644 index 000000000..fc90e2374 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c @@ -0,0 +1,270 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS R COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/periph.h" + +LPI2C_Type *mcu_i2c_banks[] = { LPI2C1, LPI2C2, LPI2C3, LPI2C4 }; + +const mcu_periph_obj_t mcu_i2c_sda_list[9] = { + PERIPH_PIN(1, 2, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_SD_B1_05), + PERIPH_PIN(1, 3, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 1, &pin_GPIO_AD_B1_01), + + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 0, &pin_GPIO_SD_B1_10), + PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 1, &pin_GPIO_B0_05), + + PERIPH_PIN(3, 2, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 0, &pin_GPIO_EMC_21), + PERIPH_PIN(3, 2, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 1, &pin_GPIO_SD_B0_01), + PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 2, &pin_GPIO_AD_B1_06), + + PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 0, &pin_GPIO_EMC_11), + PERIPH_PIN(4, 0, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 1, &pin_GPIO_AD_B0_13), +}; + +const mcu_periph_obj_t mcu_i2c_scl_list[9] = { + PERIPH_PIN(1, 2, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 0, &pin_GPIO_SD_B1_04), + PERIPH_PIN(1, 3, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_B1_00), + + PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 0, &pin_GPIO_SD_B1_11), + PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 1, &pin_GPIO_B0_04), + + PERIPH_PIN(3, 2, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 0, &pin_GPIO_EMC_22), + PERIPH_PIN(3, 2, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_B0_00), + PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 2, &pin_GPIO_AD_B1_07), + + PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 0, &pin_GPIO_EMC_12), + PERIPH_PIN(4, 0, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_B0_12), +}; + +LPSPI_Type *mcu_spi_banks[] = { LPSPI1, LPSPI2, LPSPI3, LPSPI4 }; + +const mcu_periph_obj_t mcu_spi_sck_list[8] = { + PERIPH_PIN(1, 3, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_EMC_27), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 1, &pin_GPIO_SD_B0_00), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_SD_B1_07), + PERIPH_PIN(2, 2, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_EMC_00), + + PERIPH_PIN(3, 7, kIOMUXC_LPSPI3_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B0_00), + PERIPH_PIN(3, 2, kIOMUXC_LPSPI3_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B1_15), + + PERIPH_PIN(4, 3, kIOMUXC_LPSPI4_SCK_SELECT_INPUT, 0, &pin_GPIO_B0_03), + PERIPH_PIN(4, 1, kIOMUXC_LPSPI4_SCK_SELECT_INPUT, 1, &pin_GPIO_B1_07), +}; + +const mcu_periph_obj_t mcu_spi_mosi_list[8] = { + PERIPH_PIN(1, 3, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 0, &pin_GPIO_EMC_28), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 1, &pin_GPIO_SD_B0_02), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_SD_B1_08), + PERIPH_PIN(2, 2, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_EMC_02), + + PERIPH_PIN(3, 7, kIOMUXC_LPSPI3_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B0_01), + PERIPH_PIN(3, 2, kIOMUXC_LPSPI3_SDO_SELECT_INPUT, 1, &pin_GPIO_AD_B1_14), + + PERIPH_PIN(4, 3, kIOMUXC_LPSPI4_SDO_SELECT_INPUT, 0, &pin_GPIO_B0_02), + PERIPH_PIN(4, 1, kIOMUXC_LPSPI4_SDO_SELECT_INPUT, 1, &pin_GPIO_B1_06), +}; + +const mcu_periph_obj_t mcu_spi_miso_list[8] = { + PERIPH_PIN(1, 3, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 0, &pin_GPIO_EMC_29), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 1, &pin_GPIO_SD_B0_03), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_SD_B1_09), + PERIPH_PIN(2, 2, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_03), + + PERIPH_PIN(3, 7, kIOMUXC_LPSPI3_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B0_02), + PERIPH_PIN(3, 2, kIOMUXC_LPSPI3_SDI_SELECT_INPUT, 1, &pin_GPIO_AD_B1_13), + + PERIPH_PIN(4, 3, kIOMUXC_LPSPI4_SDI_SELECT_INPUT, 0, &pin_GPIO_B0_01), + PERIPH_PIN(4, 1, kIOMUXC_LPSPI4_SDI_SELECT_INPUT, 1, &pin_GPIO_B1_05), +}; + +LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 }; + +const mcu_periph_obj_t mcu_uart_rx_list[18] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_13), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_10), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_03), + + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 0, &pin_GPIO_AD_B1_07), + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_14), + PERIPH_PIN(3, 3, kIOMUXC_LPUART3_RX_SELECT_INPUT, 2, &pin_GPIO_B0_09), + + PERIPH_PIN(4, 4, kIOMUXC_LPUART4_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_01), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_20), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 2, &pin_GPIO_B1_01), + + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_24), + PERIPH_PIN(5, 1, kIOMUXC_LPUART5_RX_SELECT_INPUT, 1, &pin_GPIO_B1_13), + + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_26), + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_03), + + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_32), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_09), + + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B0_05), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_11), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 2, &pin_GPIO_EMC_39), +}; + +const mcu_periph_obj_t mcu_uart_tx_list[18] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_12), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_11), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_02), + + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 0, &pin_GPIO_AD_B1_06), + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_13), + PERIPH_PIN(3, 3, kIOMUXC_LPUART3_TX_SELECT_INPUT, 2, &pin_GPIO_B0_08), + + PERIPH_PIN(4, 4, kIOMUXC_LPUART4_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_00), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_19), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 2, &pin_GPIO_B1_00), + + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_23), + PERIPH_PIN(5, 1, kIOMUXC_LPUART5_TX_SELECT_INPUT, 1, &pin_GPIO_B1_12), + + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_25), + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_02), + + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_08), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_31), + + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B0_04), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_10), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 2, &pin_GPIO_EMC_38), +}; + +const mcu_pwm_obj_t mcu_pwm_list[67] = { + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_23), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_SD_B0_00), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_24), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_SD_B0_01), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 4, &pin_GPIO_AD_B0_02), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_25), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_SD_B0_02), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_26), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_SD_B0_03), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 4, &pin_GPIO_AD_B0_03), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_27), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_SD_B0_04), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_28), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_SD_B0_05), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 4, &pin_GPIO_AD_B0_12), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_AD_B0_10), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_38), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_SD_B1_00), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 4, &pin_GPIO_EMC_12), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 6, &pin_GPIO_B1_00), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_AD_B0_11), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_39), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_SD_B1_01), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 4, &pin_GPIO_EMC_13), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 6, &pin_GPIO_B1_01), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmX, 4, &pin_GPIO_AD_B0_13), + + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_06), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_B0_06), + + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_07), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 2, &pin_GPIO_B0_07), + + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_08), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 2, &pin_GPIO_B0_08), + + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_09), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 2, &pin_GPIO_B0_09), + + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_10), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 2, &pin_GPIO_B0_10), + + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_11), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 2, &pin_GPIO_B0_11), + + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 0, &pin_GPIO_AD_B0_00), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_AD_B0_09), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_19), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_SD_B1_02), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 6, &pin_GPIO_B1_02), + + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 0, &pin_GPIO_AD_B0_01), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_20), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_SD_B1_03), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 6, &pin_GPIO_B1_03), + + PWM_PIN(PWM3, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_29), + + PWM_PIN(PWM3, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_30), + + PWM_PIN(PWM3, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_31), + + PWM_PIN(PWM3, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_32), + + PWM_PIN(PWM3, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_33), + + PWM_PIN(PWM3, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_34), + + PWM_PIN(PWM3, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_21), + + PWM_PIN(PWM3, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_22), + + PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_AD_B1_08), + PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_00), + + PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_01), + + PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_AD_B1_09), + PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_02), + + PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_03), + + PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_B1_14), + PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_04), + + PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_05), + + PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_B1_15), + PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_17), + + PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_18), + +}; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h new file mode 100644 index 000000000..b069ca76b --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h @@ -0,0 +1,42 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H + +extern const mcu_periph_obj_t mcu_i2c_sda_list[9]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[9]; + +extern const mcu_periph_obj_t mcu_spi_sck_list[8]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[8]; +extern const mcu_periph_obj_t mcu_spi_miso_list[8]; + +extern const mcu_periph_obj_t mcu_uart_rx_list[18]; +extern const mcu_periph_obj_t mcu_uart_tx_list[18]; + +extern const mcu_pwm_obj_t mcu_pwm_list[67]; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.c new file mode 100644 index 000000000..c622e759a --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.c @@ -0,0 +1,161 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/pins.h" + +const mcu_pin_obj_t pin_GPIO_EMC_00 = PIN(GPIO4, 0, GPIO_EMC_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_01 = PIN(GPIO4, 1, GPIO_EMC_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_02 = PIN(GPIO4, 2, GPIO_EMC_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_03 = PIN(GPIO4, 3, GPIO_EMC_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_04 = PIN(GPIO4, 4, GPIO_EMC_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_05 = PIN(GPIO4, 5, GPIO_EMC_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_06 = PIN(GPIO4, 6, GPIO_EMC_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_07 = PIN(GPIO4, 7, GPIO_EMC_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_08 = PIN(GPIO4, 8, GPIO_EMC_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_09 = PIN(GPIO4, 9, GPIO_EMC_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_10 = PIN(GPIO4, 10, GPIO_EMC_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_11 = PIN(GPIO4, 11, GPIO_EMC_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_12 = PIN(GPIO4, 12, GPIO_EMC_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_13 = PIN(GPIO4, 13, GPIO_EMC_13, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_14 = PIN(GPIO4, 14, GPIO_EMC_14, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_15 = PIN(GPIO4, 15, GPIO_EMC_15, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_16 = PIN(GPIO4, 16, GPIO_EMC_16, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_17 = PIN(GPIO4, 17, GPIO_EMC_17, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_18 = PIN(GPIO4, 18, GPIO_EMC_18, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_19 = PIN(GPIO4, 19, GPIO_EMC_19, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_20 = PIN(GPIO4, 20, GPIO_EMC_20, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_21 = PIN(GPIO4, 21, GPIO_EMC_21, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_22 = PIN(GPIO4, 22, GPIO_EMC_22, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_23 = PIN(GPIO4, 23, GPIO_EMC_23, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_24 = PIN(GPIO4, 24, GPIO_EMC_24, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_25 = PIN(GPIO4, 25, GPIO_EMC_25, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_26 = PIN(GPIO4, 26, GPIO_EMC_26, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_27 = PIN(GPIO4, 27, GPIO_EMC_27, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_28 = PIN(GPIO4, 28, GPIO_EMC_28, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_29 = PIN(GPIO4, 29, GPIO_EMC_29, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_30 = PIN(GPIO4, 30, GPIO_EMC_30, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_31 = PIN(GPIO4, 31, GPIO_EMC_31, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_32 = PIN(GPIO3, 18, GPIO_EMC_32, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_33 = PIN(GPIO3, 19, GPIO_EMC_33, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_34 = PIN(GPIO3, 20, GPIO_EMC_34, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_35 = PIN(GPIO3, 21, GPIO_EMC_35, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_36 = PIN(GPIO3, 22, GPIO_EMC_36, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_37 = PIN(GPIO3, 23, GPIO_EMC_37, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_38 = PIN(GPIO3, 24, GPIO_EMC_38, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_39 = PIN(GPIO3, 25, GPIO_EMC_39, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_40 = PIN(GPIO3, 26, GPIO_EMC_40, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_41 = PIN(GPIO3, 27, GPIO_EMC_41, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_AD_B0_00 = PIN(GPIO1, 0, GPIO_AD_B0_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_01 = PIN(GPIO1, 1, GPIO_AD_B0_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_02 = PIN(GPIO1, 2, GPIO_AD_B0_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_03 = PIN(GPIO1, 3, GPIO_AD_B0_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_04 = PIN(GPIO1, 4, GPIO_AD_B0_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_05 = PIN(GPIO1, 5, GPIO_AD_B0_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_06 = PIN(GPIO1, 6, GPIO_AD_B0_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_07 = PIN(GPIO1, 7, GPIO_AD_B0_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_08 = PIN(GPIO1, 8, GPIO_AD_B0_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_09 = PIN(GPIO1, 9, GPIO_AD_B0_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_10 = PIN(GPIO1, 10, GPIO_AD_B0_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_11 = PIN(GPIO1, 11, GPIO_AD_B0_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_12 = PIN(GPIO1, 12, GPIO_AD_B0_12, ADC1, 1); +const mcu_pin_obj_t pin_GPIO_AD_B0_13 = PIN(GPIO1, 13, GPIO_AD_B0_13, ADC1, 2); +const mcu_pin_obj_t pin_GPIO_AD_B0_14 = PIN(GPIO1, 14, GPIO_AD_B0_14, ADC1, 3); +const mcu_pin_obj_t pin_GPIO_AD_B0_15 = PIN(GPIO1, 15, GPIO_AD_B0_15, ADC1, 4); + +const mcu_pin_obj_t pin_GPIO_AD_B1_00 = PIN(GPIO1, 16, GPIO_AD_B1_00, ADC1, 5); +const mcu_pin_obj_t pin_GPIO_AD_B1_01 = PIN(GPIO1, 17, GPIO_AD_B1_01, ADC1, 6); +const mcu_pin_obj_t pin_GPIO_AD_B1_02 = PIN(GPIO1, 18, GPIO_AD_B1_02, ADC1, 7); +const mcu_pin_obj_t pin_GPIO_AD_B1_03 = PIN(GPIO1, 19, GPIO_AD_B1_03, ADC1, 8); +const mcu_pin_obj_t pin_GPIO_AD_B1_04 = PIN(GPIO1, 20, GPIO_AD_B1_04, ADC1, 9); +const mcu_pin_obj_t pin_GPIO_AD_B1_05 = PIN(GPIO1, 21, GPIO_AD_B1_05, ADC1, 10); +const mcu_pin_obj_t pin_GPIO_AD_B1_06 = PIN(GPIO1, 22, GPIO_AD_B1_06, ADC1, 11); +const mcu_pin_obj_t pin_GPIO_AD_B1_07 = PIN(GPIO1, 23, GPIO_AD_B1_07, ADC1, 12); +const mcu_pin_obj_t pin_GPIO_AD_B1_08 = PIN(GPIO1, 24, GPIO_AD_B1_08, ADC1, 13); +const mcu_pin_obj_t pin_GPIO_AD_B1_09 = PIN(GPIO1, 25, GPIO_AD_B1_09, ADC1, 14); +const mcu_pin_obj_t pin_GPIO_AD_B1_10 = PIN(GPIO1, 26, GPIO_AD_B1_10, ADC1, 15); +const mcu_pin_obj_t pin_GPIO_AD_B1_11 = PIN(GPIO1, 27, GPIO_AD_B1_11, ADC1, 0); +const mcu_pin_obj_t pin_GPIO_AD_B1_12 = PIN(GPIO1, 28, GPIO_AD_B1_12, ADC2, 1); +const mcu_pin_obj_t pin_GPIO_AD_B1_13 = PIN(GPIO1, 29, GPIO_AD_B1_13, ADC2, 2); +const mcu_pin_obj_t pin_GPIO_AD_B1_14 = PIN(GPIO1, 30, GPIO_AD_B1_14, ADC2, 3); +const mcu_pin_obj_t pin_GPIO_AD_B1_15 = PIN(GPIO1, 31, GPIO_AD_B1_15, ADC2, 4); + +const mcu_pin_obj_t pin_GPIO_B0_00 = PIN(GPIO2, 0, GPIO_B0_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_01 = PIN(GPIO2, 1, GPIO_B0_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_02 = PIN(GPIO2, 2, GPIO_B0_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_03 = PIN(GPIO2, 3, GPIO_B0_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_04 = PIN(GPIO2, 4, GPIO_B0_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_05 = PIN(GPIO2, 5, GPIO_B0_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_06 = PIN(GPIO2, 6, GPIO_B0_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_07 = PIN(GPIO2, 7, GPIO_B0_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_08 = PIN(GPIO2, 8, GPIO_B0_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_09 = PIN(GPIO2, 9, GPIO_B0_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_10 = PIN(GPIO2, 10, GPIO_B0_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_11 = PIN(GPIO2, 11, GPIO_B0_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_12 = PIN(GPIO2, 12, GPIO_B0_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_13 = PIN(GPIO2, 13, GPIO_B0_13, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_14 = PIN(GPIO2, 14, GPIO_B0_14, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B0_15 = PIN(GPIO2, 15, GPIO_B0_15, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_B1_00 = PIN(GPIO2, 16, GPIO_B1_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_01 = PIN(GPIO2, 17, GPIO_B1_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_02 = PIN(GPIO2, 18, GPIO_B1_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_03 = PIN(GPIO2, 19, GPIO_B1_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_04 = PIN(GPIO2, 20, GPIO_B1_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_05 = PIN(GPIO2, 21, GPIO_B1_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_06 = PIN(GPIO2, 22, GPIO_B1_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_07 = PIN(GPIO2, 23, GPIO_B1_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_08 = PIN(GPIO2, 24, GPIO_B1_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_09 = PIN(GPIO2, 25, GPIO_B1_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_10 = PIN(GPIO2, 26, GPIO_B1_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_11 = PIN(GPIO2, 27, GPIO_B1_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_12 = PIN(GPIO2, 28, GPIO_B1_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_13 = PIN(GPIO2, 29, GPIO_B1_13, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_14 = PIN(GPIO2, 30, GPIO_B1_14, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_B1_15 = PIN(GPIO2, 31, GPIO_B1_15, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_SD_B0_00 = PIN(GPIO3, 12, GPIO_SD_B0_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_01 = PIN(GPIO3, 13, GPIO_SD_B0_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_02 = PIN(GPIO3, 14, GPIO_SD_B0_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_03 = PIN(GPIO3, 15, GPIO_SD_B0_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_04 = PIN(GPIO3, 16, GPIO_SD_B0_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_05 = PIN(GPIO3, 17, GPIO_SD_B0_05, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_SD_B1_00 = PIN(GPIO3, 0, GPIO_B1_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_01 = PIN(GPIO3, 1, GPIO_B1_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_02 = PIN(GPIO3, 2, GPIO_B1_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_03 = PIN(GPIO3, 3, GPIO_B1_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_04 = PIN(GPIO3, 4, GPIO_B1_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_05 = PIN(GPIO3, 5, GPIO_B1_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_06 = PIN(GPIO3, 6, GPIO_B1_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_07 = PIN(GPIO3, 7, GPIO_B1_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_08 = PIN(GPIO3, 8, GPIO_B1_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_09 = PIN(GPIO3, 9, GPIO_B1_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_10 = PIN(GPIO3, 10, GPIO_B1_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_11 = PIN(GPIO3, 11, GPIO_B1_11, NO_ADC, 0); diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.h new file mode 100644 index 000000000..1e6922459 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/pins.h @@ -0,0 +1,161 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1062_PINS_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1062_PINS_H + +extern const mcu_pin_obj_t pin_GPIO_EMC_00; +extern const mcu_pin_obj_t pin_GPIO_EMC_01; +extern const mcu_pin_obj_t pin_GPIO_EMC_02; +extern const mcu_pin_obj_t pin_GPIO_EMC_03; +extern const mcu_pin_obj_t pin_GPIO_EMC_04; +extern const mcu_pin_obj_t pin_GPIO_EMC_05; +extern const mcu_pin_obj_t pin_GPIO_EMC_06; +extern const mcu_pin_obj_t pin_GPIO_EMC_07; +extern const mcu_pin_obj_t pin_GPIO_EMC_08; +extern const mcu_pin_obj_t pin_GPIO_EMC_09; +extern const mcu_pin_obj_t pin_GPIO_EMC_10; +extern const mcu_pin_obj_t pin_GPIO_EMC_11; +extern const mcu_pin_obj_t pin_GPIO_EMC_12; +extern const mcu_pin_obj_t pin_GPIO_EMC_13; +extern const mcu_pin_obj_t pin_GPIO_EMC_14; +extern const mcu_pin_obj_t pin_GPIO_EMC_15; +extern const mcu_pin_obj_t pin_GPIO_EMC_16; +extern const mcu_pin_obj_t pin_GPIO_EMC_17; +extern const mcu_pin_obj_t pin_GPIO_EMC_18; +extern const mcu_pin_obj_t pin_GPIO_EMC_19; +extern const mcu_pin_obj_t pin_GPIO_EMC_20; +extern const mcu_pin_obj_t pin_GPIO_EMC_21; +extern const mcu_pin_obj_t pin_GPIO_EMC_22; +extern const mcu_pin_obj_t pin_GPIO_EMC_23; +extern const mcu_pin_obj_t pin_GPIO_EMC_24; +extern const mcu_pin_obj_t pin_GPIO_EMC_25; +extern const mcu_pin_obj_t pin_GPIO_EMC_26; +extern const mcu_pin_obj_t pin_GPIO_EMC_27; +extern const mcu_pin_obj_t pin_GPIO_EMC_28; +extern const mcu_pin_obj_t pin_GPIO_EMC_29; +extern const mcu_pin_obj_t pin_GPIO_EMC_30; +extern const mcu_pin_obj_t pin_GPIO_EMC_31; +extern const mcu_pin_obj_t pin_GPIO_EMC_32; +extern const mcu_pin_obj_t pin_GPIO_EMC_33; +extern const mcu_pin_obj_t pin_GPIO_EMC_34; +extern const mcu_pin_obj_t pin_GPIO_EMC_35; +extern const mcu_pin_obj_t pin_GPIO_EMC_36; +extern const mcu_pin_obj_t pin_GPIO_EMC_37; +extern const mcu_pin_obj_t pin_GPIO_EMC_38; +extern const mcu_pin_obj_t pin_GPIO_EMC_39; +extern const mcu_pin_obj_t pin_GPIO_EMC_40; +extern const mcu_pin_obj_t pin_GPIO_EMC_41; + +extern const mcu_pin_obj_t pin_GPIO_AD_B0_00; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_01; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_02; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_03; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_04; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_05; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_06; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_07; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_08; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_09; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_10; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_11; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_12; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_13; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_14; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_15; + +extern const mcu_pin_obj_t pin_GPIO_AD_B1_00; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_01; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_02; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_03; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_04; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_05; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_06; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_07; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_08; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_09; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_10; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_11; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_12; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_13; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_14; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_15; + +extern const mcu_pin_obj_t pin_GPIO_B0_00; +extern const mcu_pin_obj_t pin_GPIO_B0_01; +extern const mcu_pin_obj_t pin_GPIO_B0_02; +extern const mcu_pin_obj_t pin_GPIO_B0_03; +extern const mcu_pin_obj_t pin_GPIO_B0_04; +extern const mcu_pin_obj_t pin_GPIO_B0_05; +extern const mcu_pin_obj_t pin_GPIO_B0_06; +extern const mcu_pin_obj_t pin_GPIO_B0_07; +extern const mcu_pin_obj_t pin_GPIO_B0_08; +extern const mcu_pin_obj_t pin_GPIO_B0_09; +extern const mcu_pin_obj_t pin_GPIO_B0_10; +extern const mcu_pin_obj_t pin_GPIO_B0_11; +extern const mcu_pin_obj_t pin_GPIO_B0_12; +extern const mcu_pin_obj_t pin_GPIO_B0_13; +extern const mcu_pin_obj_t pin_GPIO_B0_14; +extern const mcu_pin_obj_t pin_GPIO_B0_15; + +extern const mcu_pin_obj_t pin_GPIO_B1_00; +extern const mcu_pin_obj_t pin_GPIO_B1_01; +extern const mcu_pin_obj_t pin_GPIO_B1_02; +extern const mcu_pin_obj_t pin_GPIO_B1_03; +extern const mcu_pin_obj_t pin_GPIO_B1_04; +extern const mcu_pin_obj_t pin_GPIO_B1_05; +extern const mcu_pin_obj_t pin_GPIO_B1_06; +extern const mcu_pin_obj_t pin_GPIO_B1_07; +extern const mcu_pin_obj_t pin_GPIO_B1_08; +extern const mcu_pin_obj_t pin_GPIO_B1_09; +extern const mcu_pin_obj_t pin_GPIO_B1_10; +extern const mcu_pin_obj_t pin_GPIO_B1_11; +extern const mcu_pin_obj_t pin_GPIO_B1_12; +extern const mcu_pin_obj_t pin_GPIO_B1_13; +extern const mcu_pin_obj_t pin_GPIO_B1_14; +extern const mcu_pin_obj_t pin_GPIO_B1_15; + +extern const mcu_pin_obj_t pin_GPIO_SD_B0_00; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_01; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_02; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_03; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_04; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_05; + +extern const mcu_pin_obj_t pin_GPIO_SD_B1_00; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_01; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_02; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_03; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_04; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_05; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_06; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_07; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_08; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_09; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_10; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_11; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1062_PINS_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/clocks.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/clocks.h new file mode 100644 index 000000000..ccbba2edd --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/clocks.h @@ -0,0 +1,29 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +extern uint32_t SystemCoreClock; + +void clocks_init(void); diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h new file mode 100644 index 000000000..301eb0db4 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h @@ -0,0 +1,77 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PERIPH_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PERIPH_H + +#include "pins.h" + +typedef struct { + uint8_t bank_idx:4; + uint8_t mux_mode:4; + uint32_t input_reg; + uint8_t input_idx; + const mcu_pin_obj_t *pin; +} mcu_periph_obj_t; + +#define PERIPH_PIN(p_bank_idx, p_mux_mode, p_input_reg, p_input_idx, p_pin) \ +{ \ + .bank_idx = p_bank_idx, \ + .mux_mode = p_mux_mode, \ + .input_reg = p_input_reg == 0 ? 0 : (uint32_t)&(IOMUXC->SELECT_INPUT[p_input_reg]), \ + .input_idx = p_input_idx, \ + .pin = p_pin, \ +} + +typedef struct { + PWM_Type *pwm; + pwm_submodule_t submodule:4; + pwm_channels_t channel:4; + uint8_t mux_mode; + const mcu_pin_obj_t *pin; +} mcu_pwm_obj_t; + +#define PWM_PIN(p_pwm, p_submodule, p_channel, p_mux_mode, p_pin) \ +{ \ + .pwm = p_pwm, \ + .submodule = p_submodule, \ + .channel = p_channel, \ + .mux_mode = p_mux_mode, \ + .pin = p_pin, \ +} + +extern LPI2C_Type *mcu_i2c_banks[]; +extern LPSPI_Type *mcu_spi_banks[]; +extern LPUART_Type *mcu_uart_banks[]; + +#ifdef MIMXRT1011_SERIES +#include "MIMXRT1011/periph.h" +#elif defined(MIMXRT1062_SERIES) +#include "MIMXRT1062/periph.h" +#endif + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PERIPH_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h new file mode 100644 index 000000000..64a8324bd --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h @@ -0,0 +1,75 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// DO NOT include this file directly. Use shared-bindings/microcontroller/Pin.h instead to ensure +// that all necessary includes are already included. + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PINS_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PINS_H + +#include +#include + +#include "fsl_iomuxc.h" +#include "fsl_pwm.h" +#include "py/obj.h" + +extern const mp_obj_type_t mcu_pin_type; + +// Use illegal pin value to mark unassigned pins. +#define NO_PIN 0xff +#define NO_ADC NULL +#define NO_PWM NULL + +typedef struct { + mp_obj_base_t base; + GPIO_Type *gpio; + uint8_t number; + uint32_t mux_reg; + uint32_t cfg_reg; + ADC_Type *adc; + uint8_t adc_channel; +} mcu_pin_obj_t; + +#define PIN(p_gpio, p_number, p_enum, p_adc, p_adc_channel) \ +{ \ + { &mcu_pin_type }, \ + .gpio = p_gpio, \ + .number = p_number, \ + .mux_reg = (uint32_t)&(IOMUXC->SW_MUX_CTL_PAD[kIOMUXC_SW_MUX_CTL_PAD_ ## p_enum]), \ + .cfg_reg = (uint32_t)&(IOMUXC->SW_PAD_CTL_PAD[kIOMUXC_SW_PAD_CTL_PAD_ ## p_enum]), \ + .adc = p_adc, \ + .adc_channel = p_adc_channel, \ +} + +#ifdef MIMXRT1011_SERIES +#include "MIMXRT1011/pins.h" +#elif defined(MIMXRT1062_SERIES) +#include "MIMXRT1062/pins.h" +#endif + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_PINS_H diff --git a/ports/mimxrt10xx/qstrdefsport.h b/ports/mimxrt10xx/qstrdefsport.h new file mode 100644 index 000000000..3ba897069 --- /dev/null +++ b/ports/mimxrt10xx/qstrdefsport.h @@ -0,0 +1 @@ +// qstrs specific to this port diff --git a/ports/mimxrt10xx/reset.c b/ports/mimxrt10xx/reset.c new file mode 100644 index 000000000..dc4a1dce1 --- /dev/null +++ b/ports/mimxrt10xx/reset.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "reset.h" +#include "supervisor/filesystem.h" + +#include "fsl_common.h" + +void reset(void) { + filesystem_flush(); + NVIC_SystemReset(); +} + +bool bootloader_available(void) { + return &_bootloader_dbl_tap >= 0; +} diff --git a/ports/mimxrt10xx/reset.h b/ports/mimxrt10xx/reset.h new file mode 100644 index 000000000..b6dfc38cc --- /dev/null +++ b/ports/mimxrt10xx/reset.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_MIMXRT10XX_RESET_H +#define MICROPY_INCLUDED_MIMXRT10XX_RESET_H + +#include +#include + +// Copied from inc/uf2.h in https://github.com/Microsoft/uf2-samd21 +#define DBL_TAP_MAGIC 0xf01669ef // Randomly selected, adjusted to have first and last bit set +#define DBL_TAP_MAGIC_QUICK_BOOT 0xf02669ef + +extern volatile uint32_t _bootloader_dbl_tap; + +void reset_to_bootloader(void); +void reset(void); +bool bootloader_available(void); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_RESET_H diff --git a/ports/mimxrt10xx/sdk b/ports/mimxrt10xx/sdk new file mode 160000 index 000000000..2251c7b79 --- /dev/null +++ b/ports/mimxrt10xx/sdk @@ -0,0 +1 @@ +Subproject commit 2251c7b79343966a57a0f36d897873dd40b692b9 diff --git a/ports/mimxrt10xx/supervisor/cpu.S b/ports/mimxrt10xx/supervisor/cpu.S new file mode 100755 index 000000000..9e6807a5e --- /dev/null +++ b/ports/mimxrt10xx/supervisor/cpu.S @@ -0,0 +1,27 @@ +.syntax unified +.cpu cortex-m4 +.thumb +.text +.align 2 + +@ uint cpu_get_regs_and_sp(r0=uint regs[10]) +.global cpu_get_regs_and_sp +.thumb +.thumb_func +.type cpu_get_regs_and_sp, %function +cpu_get_regs_and_sp: +@ store registers into given array +str r4, [r0], #4 +str r5, [r0], #4 +str r6, [r0], #4 +str r7, [r0], #4 +str r8, [r0], #4 +str r9, [r0], #4 +str r10, [r0], #4 +str r11, [r0], #4 +str r12, [r0], #4 +str r13, [r0], #4 + +@ return the sp +mov r0, sp +bx lr diff --git a/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c new file mode 100644 index 000000000..e20c67fa3 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c @@ -0,0 +1,347 @@ +/* + * Copyright (c) 2016, Freescale Semiconductor, Inc. + * Copyright 2016-2019 NXP + * All rights reserved. + * + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi.h" +#include "internal_flash.h" + +#define FLASH_QUAD_ENABLE 0x02 +#define FLASH_BUSY_STATUS_POL 1 +#define FLASH_BUSY_STATUS_OFFSET 0 + +static inline void flexspi_clock_init(void) +{ +#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1) + /* Switch to PLL2 for XIP to avoid hardfault during re-initialize clock. */ + CLOCK_InitSysPfd(kCLOCK_Pfd2, 24); /* Set PLL2 PFD2 clock 396MHZ. */ + CLOCK_SetMux(kCLOCK_FlexspiMux, 0x2); /* Choose PLL2 PFD2 clock as flexspi source clock. */ + CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2); /* flexspi clock 133M. */ +#else + const clock_usb_pll_config_t g_ccmConfigUsbPll = {.loopDivider = 0U}; + + CLOCK_InitUsb1Pll(&g_ccmConfigUsbPll); + CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 24); /* Set PLL3 PFD0 clock 360MHZ. */ + CLOCK_SetMux(kCLOCK_FlexspiMux, 0x3); /* Choose PLL3 PFD0 clock as flexspi source clock. */ + CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2); /* flexspi clock 120M. */ +#endif +} + +extern flexspi_device_config_t deviceconfig; +extern const uint32_t customLUT[CUSTOM_LUT_LENGTH]; + +status_t flexspi_nor_write_enable(FLEXSPI_Type *base, uint32_t baseAddr) +{ + flexspi_transfer_t flashXfer; + status_t status; + + /* Write enable */ + flashXfer.deviceAddress = baseAddr; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Command; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; + + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + return status; +} + +status_t flexspi_nor_wait_bus_busy(FLEXSPI_Type *base) +{ + /* Wait status ready. */ + bool isBusy; + uint32_t readValue; + status_t status; + flexspi_transfer_t flashXfer; + + flashXfer.deviceAddress = 0; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Read; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_READSTATUSREG; + flashXfer.data = &readValue; + flashXfer.dataSize = 1; + + do + { + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + if (FLASH_BUSY_STATUS_POL) + { + if (readValue & (1U << FLASH_BUSY_STATUS_OFFSET)) + { + isBusy = true; + } + else + { + isBusy = false; + } + } + else + { + if (readValue & (1U << FLASH_BUSY_STATUS_OFFSET)) + { + isBusy = false; + } + else + { + isBusy = true; + } + } + + } while (isBusy); + + return status; +} + +status_t flexspi_nor_enable_quad_mode(FLEXSPI_Type *base) +{ + flexspi_transfer_t flashXfer; + status_t status; + uint32_t writeValue = FLASH_QUAD_ENABLE; + + /* Write enable */ + status = flexspi_nor_write_enable(base, 0); + + if (status != kStatus_Success) + { + return status; + } + + /* Enable quad mode. */ + flashXfer.deviceAddress = 0; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Write; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG; + flashXfer.data = &writeValue; + flashXfer.dataSize = 1; + + status = FLEXSPI_TransferBlocking(base, &flashXfer); + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + /* Do software reset. */ + FLEXSPI_SoftwareReset(base); + + return status; +} + +status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address) +{ + status_t status; + flexspi_transfer_t flashXfer; + + /* Write enable */ + flashXfer.deviceAddress = address; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Command; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; + + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + flashXfer.deviceAddress = address; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Command; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_ERASESECTOR; + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + /* Do software reset. */ + FLEXSPI_SoftwareReset(base); + + return status; +} + +status_t flexspi_nor_flash_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src, uint32_t length) +{ + status_t status; + flexspi_transfer_t flashXfer; + + /* Write enable */ + status = flexspi_nor_write_enable(base, dstAddr); + + if (status != kStatus_Success) + { + return status; + } + + /* Prepare page program command */ + flashXfer.deviceAddress = dstAddr; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Write; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD; + flashXfer.data = (uint32_t *)src; + flashXfer.dataSize = length; + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + /* Do software reset. */ +#if defined(FSL_FEATURE_SOC_OTFAD_COUNT) + base->AHBCR |= FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK; + base->AHBCR &= ~(FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK); +#else + FLEXSPI_SoftwareReset(base); +#endif + + return status; +} + +status_t flexspi_nor_flash_page_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src) +{ + status_t status; + flexspi_transfer_t flashXfer; + + /* Write enable */ + status = flexspi_nor_write_enable(base, dstAddr); + + if (status != kStatus_Success) + { + return status; + } + + /* Prepare page program command */ + flashXfer.deviceAddress = dstAddr; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Write; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD; + flashXfer.data = (uint32_t *)src; + flashXfer.dataSize = FLASH_PAGE_SIZE; + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + /* Do software reset. */ +#if defined(FSL_FEATURE_SOC_OTFAD_COUNT) + base->AHBCR |= FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK; + base->AHBCR &= ~(FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK); +#else + FLEXSPI_SoftwareReset(base); +#endif + + return status; +} + +status_t flexspi_nor_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId) +{ + uint32_t temp; + flexspi_transfer_t flashXfer; + flashXfer.deviceAddress = 0; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Read; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_READID; + flashXfer.data = &temp; + flashXfer.dataSize = 1; + + status_t status = FLEXSPI_TransferBlocking(base, &flashXfer); + + *vendorId = temp; + + /* Do software reset. */ +#if defined(FSL_FEATURE_SOC_OTFAD_COUNT) + base->AHBCR |= FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK; + base->AHBCR &= ~(FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK); +#else + FLEXSPI_SoftwareReset(base); +#endif + + return status; +} + +status_t flexspi_nor_erase_chip(FLEXSPI_Type *base) +{ + status_t status; + flexspi_transfer_t flashXfer; + + /* Write enable */ + status = flexspi_nor_write_enable(base, 0); + + if (status != kStatus_Success) + { + return status; + } + + flashXfer.deviceAddress = 0; + flashXfer.port = kFLEXSPI_PortA1; + flashXfer.cmdType = kFLEXSPI_Command; + flashXfer.SeqNumber = 1; + flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_ERASECHIP; + + status = FLEXSPI_TransferBlocking(base, &flashXfer); + + if (status != kStatus_Success) + { + return status; + } + + status = flexspi_nor_wait_bus_busy(base); + + return status; +} + +void flexspi_nor_flash_init(FLEXSPI_Type *base) +{ + flexspi_config_t config; + + flexspi_clock_init(); + + /*Get FLEXSPI default settings and configure the flexspi. */ + FLEXSPI_GetDefaultConfig(&config); + + /*Set AHB buffer size for reading data through AHB bus. */ + config.ahbConfig.enableAHBPrefetch = true; + config.ahbConfig.enableAHBBufferable = true; + config.ahbConfig.enableReadAddressOpt = true; + config.ahbConfig.enableAHBCachable = true; + config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackFromDqsPad; + FLEXSPI_Init(base, &config); + + /* Configure flash settings according to serial flash feature. */ + FLEXSPI_SetFlashConfig(base, &deviceconfig, kFLEXSPI_PortA1); + + /* Update LUT table. */ + FLEXSPI_UpdateLUT(base, 0, customLUT, CUSTOM_LUT_LENGTH); + + /* Do software reset. */ + FLEXSPI_SoftwareReset(base); +} diff --git a/ports/mimxrt10xx/supervisor/internal_flash.c b/ports/mimxrt10xx/supervisor/internal_flash.c new file mode 100644 index 000000000..e15b4962e --- /dev/null +++ b/ports/mimxrt10xx/supervisor/internal_flash.c @@ -0,0 +1,255 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "supervisor/flash.h" + +#include +#include +#include + +#include "extmod/vfs.h" +#include "extmod/vfs_fat.h" +#include "py/mphal.h" +#include "py/obj.h" +#include "py/runtime.h" +#include "lib/oofatfs/ff.h" + +#include "fsl_cache.h" +#include "fsl_flexspi.h" +#include "fsl_iomuxc.h" + +// defined in linker +extern uint32_t __fatfs_flash_start_addr[]; +extern uint32_t __fatfs_flash_length[]; + +#define NO_CACHE 0xffffffff +#define SECTOR_SIZE 0x1000 /* 4K */ + +uint8_t _flash_cache[SECTOR_SIZE] __attribute__((aligned(4))); +uint32_t _flash_page_addr = NO_CACHE; +static bool init_done = false; + +flexspi_device_config_t deviceconfig = { + .flexspiRootClk = 133000000, + .flashSize = (BOARD_FLASH_SIZE / 1024), + .CSIntervalUnit = kFLEXSPI_CsIntervalUnit1SckCycle, + .CSInterval = 2, + .CSHoldTime = 3, + .CSSetupTime = 3, + .dataValidTime = 0, + .columnspace = 0, + .enableWordAddress = 0, + .AWRSeqIndex = 0, + .AWRSeqNumber = 0, + .ARDSeqIndex = NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD, + .ARDSeqNumber = 1, + .AHBWriteWaitUnit = kFLEXSPI_AhbWriteWaitUnit2AhbCycle, + .AHBWriteWaitInterval = 0, +}; + +const uint32_t customLUT[CUSTOM_LUT_LENGTH] = { + /* Normal read mode -SDR */ + /* Normal read mode -SDR */ + [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x03, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL + 1] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), + + /* Fast read mode - SDR */ + [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x0B, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST + 1] = FLEXSPI_LUT_SEQ( + kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_1PAD, 0x08, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), + + /* Fast read quad mode - SDR */ + [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xEB, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD + 1] = FLEXSPI_LUT_SEQ( + kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 0x06, kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04), + + /* Read extend parameters */ + [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x81, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), + + /* Write Enable */ + [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x06, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), + + /* Erase Sector */ + [4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x20, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + + /* Page Program - single mode */ + [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x02, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE + 1] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), + + /* Page Program - quad mode */ + [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x32, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), + [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD + 1] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_4PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), + + /* Read ID */ + [4 * NOR_CMD_LUT_SEQ_IDX_READID] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x9F, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), + + /* Enable Quad mode */ + [4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x31, kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04), + + /* Read status register */ + [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUSREG] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x05, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), + + /* Erase whole chip */ + [4 * NOR_CMD_LUT_SEQ_IDX_ERASECHIP] = + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xC7, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), +}; + +extern status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address); +extern status_t flexspi_nor_flash_page_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src); +extern status_t flexspi_nor_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId); +extern status_t flexspi_nor_enable_quad_mode(FLEXSPI_Type *base); +extern status_t flexspi_nor_erase_chip(FLEXSPI_Type *base); +extern void flexspi_nor_flash_init(FLEXSPI_Type *base); + +void supervisor_flash_init(void) { + if (init_done) + return; + + SCB_DisableDCache(); + + status_t status; + uint8_t vendorID = 0; + + flexspi_nor_flash_init(FLEXSPI); + + /* Get vendor ID. */ + status = flexspi_nor_get_vendor_id(FLEXSPI, &vendorID); + if (status != kStatus_Success) { + printf("flexspi_nor_get_vendor_id fail %ld\r\n", status); + return; + } + + /* Enter quad mode. */ + __disable_irq(); + status = flexspi_nor_enable_quad_mode(FLEXSPI); + if (status != kStatus_Success) + { + printf("flexspi_nor_enable_quad_mode fail %ld\r\n", status); + return; + } + __enable_irq(); + + init_done = true; +} + +static inline uint32_t lba2addr(uint32_t block) { + return ((uint32_t)__fatfs_flash_start_addr) + block * FILESYSTEM_BLOCK_SIZE; +} + +uint32_t supervisor_flash_get_block_size(void) { + return FILESYSTEM_BLOCK_SIZE; +} + +uint32_t supervisor_flash_get_block_count(void) { + return ((uint32_t) __fatfs_flash_length) / FILESYSTEM_BLOCK_SIZE; +} + +void supervisor_flash_flush(void) { + if (_flash_page_addr == NO_CACHE) return; + status_t status; + + // Skip if data is the same + if (memcmp(_flash_cache, (void *)_flash_page_addr, SECTOR_SIZE) != 0) { + volatile uint32_t sector_addr = (_flash_page_addr - FlexSPI_AMBA_BASE); + + __disable_irq(); + status = flexspi_nor_flash_erase_sector(FLEXSPI, sector_addr); + if (status != kStatus_Success) { + printf("Page erase failure %ld!\r\n", status); + return; + } + __enable_irq(); + + for (int i = 0; i < SECTOR_SIZE / FLASH_PAGE_SIZE; ++i) { + __disable_irq(); + status = flexspi_nor_flash_page_program(FLEXSPI, sector_addr + i * FLASH_PAGE_SIZE, (void *)_flash_cache + i * FLASH_PAGE_SIZE); + if (status != kStatus_Success) { + printf("Page program failure %ld!\r\n", status); + return; + } + __enable_irq(); + } + + DCACHE_CleanInvalidateByRange(_flash_page_addr, SECTOR_SIZE); + } +} + +mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { + // Must write out anything in cache before trying to read. + supervisor_flash_flush(); + + uint32_t src = lba2addr(block); + memcpy(dest, (uint8_t*)src, FILESYSTEM_BLOCK_SIZE * num_blocks); + return 0; // success +} + +mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32_t num_blocks) { + while (num_blocks) { + uint32_t const addr = lba2addr(lba); + uint32_t const page_addr = addr & ~(SECTOR_SIZE - 1); + + uint32_t count = 8 - (lba % 8); // up to page boundary + count = MIN(num_blocks, count); + + if (page_addr != _flash_page_addr) { + // Write out anything in cache before overwriting it. + supervisor_flash_flush(); + + _flash_page_addr = page_addr; + + // Copy the current contents of the entire page into the cache. + memcpy(_flash_cache, (void *)page_addr, SECTOR_SIZE); + } + + // Overwrite part or all of the page cache with the src data. + memcpy(_flash_cache + (addr & (SECTOR_SIZE - 1)), src, count * FILESYSTEM_BLOCK_SIZE); + + // adjust for next run + lba += count; + src += count * FILESYSTEM_BLOCK_SIZE; + num_blocks -= count; + } + + return 0; // success +} + +void supervisor_flash_release_cache(void) { +} + diff --git a/ports/mimxrt10xx/supervisor/internal_flash.h b/ports/mimxrt10xx/supervisor/internal_flash.h new file mode 100644 index 000000000..dfbfe1d4b --- /dev/null +++ b/ports/mimxrt10xx/supervisor/internal_flash.h @@ -0,0 +1,53 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_H +#define MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_H + +#include +#include + +#include "py/mpconfig.h" + +#define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms +#define INTERNAL_FLASH_IDLE_TICK(tick) (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2) + +#define CUSTOM_LUT_LENGTH 60 +#define FLASH_PAGE_SIZE 256 + +#define NOR_CMD_LUT_SEQ_IDX_READ_NORMAL 7 +#define NOR_CMD_LUT_SEQ_IDX_READ_FAST 13 +#define NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD 0 +#define NOR_CMD_LUT_SEQ_IDX_READSTATUS 1 +#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 2 +#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 3 +#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE 6 +#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD 4 +#define NOR_CMD_LUT_SEQ_IDX_READID 8 +#define NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG 9 +#define NOR_CMD_LUT_SEQ_IDX_READSTATUSREG 12 +#define NOR_CMD_LUT_SEQ_IDX_ERASECHIP 5 + +#endif // MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_H diff --git a/ports/mimxrt10xx/supervisor/internal_flash_root_pointers.h b/ports/mimxrt10xx/supervisor/internal_flash_root_pointers.h new file mode 100644 index 000000000..c8173175e --- /dev/null +++ b/ports/mimxrt10xx/supervisor/internal_flash_root_pointers.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_ROOT_POINTERS_H +#define MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_ROOT_POINTERS_H + +#define FLASH_ROOT_POINTERS + +#endif // MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_ROOT_POINTERS_H diff --git a/ports/mimxrt10xx/supervisor/port.c b/ports/mimxrt10xx/supervisor/port.c new file mode 100644 index 000000000..357307427 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/port.c @@ -0,0 +1,168 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2017 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "supervisor/port.h" + +#include "fsl_device_registers.h" + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/pulseio/PulseIn.h" +#include "common-hal/pulseio/PulseOut.h" +#include "common-hal/pulseio/PWMOut.h" +#include "common-hal/rtc/RTC.h" + +#include "reset.h" +#include "tick.h" + +#include "tusb.h" + +#if CIRCUITPY_GAMEPAD +#include "shared-module/gamepad/__init__.h" +#endif +#if CIRCUITPY_GAMEPADSHIFT +#include "shared-module/gamepadshift/__init__.h" +#endif +#include "shared-module/_pew/PewPew.h" + +#include "clocks.h" + +#include "fsl_gpio.h" +#include "fsl_lpuart.h" + +void mpu_init(void) +{ + ARM_MPU_Disable(); + + SCB_EnableDCache(); + SCB_EnableICache(); +} + +safe_mode_t port_init(void) { + mpu_init(); + clocks_init(); + + // Configure millisecond timer initialization. + tick_init(); + +#if CIRCUITPY_RTC + rtc_init(); +#endif + + // Reset everything into a known state before board_init. + reset_port(); + + // Init the board last so everything else is ready + board_init(); + + if (board_requests_safe_mode()) { + return USER_SAFE_MODE; + } + + return NO_SAFE_MODE; +} + +void reset_port(void) { + //reset_sercoms(); + +#if CIRCUITPY_AUDIOIO + audio_dma_reset(); + audioout_reset(); +#endif +#if CIRCUITPY_AUDIOBUSIO + i2sout_reset(); + //pdmin_reset(); +#endif + +#if CIRCUITPY_TOUCHIO && CIRCUITPY_TOUCHIO_USE_NATIVE + touchin_reset(); +#endif + +// eic_reset(); + +#if CIRCUITPY_PULSEIO + pulseout_reset(); + pwmout_reset(); +#endif + +#if CIRCUITPY_RTC + rtc_reset(); +#endif + +#if CIRCUITPY_GAMEPAD + gamepad_reset(); +#endif +#if CIRCUITPY_GAMEPADSHIFT + gamepadshift_reset(); +#endif +#if CIRCUITPY_PEW + pew_reset(); +#endif + + //reset_event_system(); + + reset_all_pins(); +} + +void reset_to_bootloader(void) { + _bootloader_dbl_tap = DBL_TAP_MAGIC; + reset(); +} + +void reset_cpu(void) { + reset(); +} + +extern uint32_t _heap_start, _estack; +uint32_t *port_stack_get_limit(void) { + return &_heap_start; +} + +uint32_t *port_stack_get_top(void) { + return &_estack; +} + +extern uint32_t __bss_end__; +// Place the word to save just after our BSS section that gets blanked. +void port_set_saved_word(uint32_t value) { + __bss_end__ = value; +} + +uint32_t port_get_saved_word(void) { + return __bss_end__; +} + +/** + * \brief Default interrupt handler for unused IRQs. + */ +__attribute__((used)) void HardFault_Handler(void) +{ + reset_into_safe_mode(HARD_CRASH); + while (true) { + asm("nop;"); + } +} diff --git a/ports/mimxrt10xx/supervisor/serial.c b/ports/mimxrt10xx/supervisor/serial.c new file mode 100644 index 000000000..22c979cf9 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/serial.c @@ -0,0 +1,93 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mphal.h" +#include +#include "supervisor/serial.h" + +#include "fsl_clock.h" +#include "fsl_lpuart.h" + +// static LPUART_Type *uart_instance = LPUART1; // evk +static LPUART_Type *uart_instance = LPUART4; // feather 1011 +//static LPUART_Type *uart_instance = LPUART2; // feather 1062 + +static uint32_t UartSrcFreq(void) { + uint32_t freq; + + /* To make it simple, we assume default PLL and divider settings, and the only variable + from application is use PLL3 source or OSC source */ + /* PLL3 div6 80M */ + if (CLOCK_GetMux(kCLOCK_UartMux) == 0) { + freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U); + } else { + freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U); + } + + return freq; +} + +void serial_init(void) { + lpuart_config_t config; + + LPUART_GetDefaultConfig(&config); + config.baudRate_Bps = 115200; + config.enableTx = true; + config.enableRx = true; + + LPUART_Init(uart_instance, &config, UartSrcFreq()); +} + +bool serial_connected(void) { + return true; +} + +char serial_read(void) { + uint8_t data; + + LPUART_ReadBlocking(uart_instance, &data, sizeof(data)); + + return data; +} + +bool serial_bytes_available(void) { + return LPUART_GetStatusFlags(uart_instance) & kLPUART_RxDataRegFullFlag; +} + +void serial_write(const char* text) { + LPUART_WriteBlocking(uart_instance, (uint8_t*)text, strlen(text)); +} + +void serial_write_substring(const char *text, uint32_t len) { + if (len == 0) { + return; + } + + LPUART_WriteBlocking(uart_instance, (uint8_t*)text, len); +} + diff --git a/ports/mimxrt10xx/supervisor/usb.c b/ports/mimxrt10xx/supervisor/usb.c new file mode 100644 index 000000000..c38dd55b9 --- /dev/null +++ b/ports/mimxrt10xx/supervisor/usb.c @@ -0,0 +1,56 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "fsl_clock.h" +#include "tusb.h" + +void init_usb_hardware(void) { + CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 480000000U); + CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, 480000000U); + +#ifdef USBPHY + USBPHY_Type *usb_phy = USBPHY; +#else + USBPHY_Type *usb_phy = USBPHY1; +#endif + + // Enable PHY support for Low speed device + LS via FS Hub + usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK; + + // Enable all power for normal operation + usb_phy->PWD = 0; + + // TX Timing + uint32_t phytx = usb_phy->TX; + phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK); + phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06); + usb_phy->TX = phytx; +} + +void USB_OTG1_IRQHandler(void) { + tud_isr(0); +} diff --git a/ports/mimxrt10xx/tick.c b/ports/mimxrt10xx/tick.c new file mode 100644 index 000000000..c19ce796e --- /dev/null +++ b/ports/mimxrt10xx/tick.c @@ -0,0 +1,92 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "tick.h" + +#include "fsl_common.h" + +#include "supervisor/shared/tick.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/microcontroller/Processor.h" + +void SysTick_Handler(void) { + // SysTick interrupt handler called when the SysTick timer reaches zero + // (every millisecond). + common_hal_mcu_disable_interrupts(); + + // Read the control register to reset the COUNTFLAG. + (void) SysTick->CTRL; + + common_hal_mcu_enable_interrupts(); + + // Do things common to all ports when the tick occurs + supervisor_tick(); +} + +void tick_init() { + uint32_t ticks_per_ms = common_hal_mcu_processor_get_frequency() / 1000; + SysTick_Config(ticks_per_ms-1); +} + +void tick_delay(uint32_t us) { + uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; + uint32_t us_until_next_tick = SysTick->VAL / ticks_per_us; + uint32_t start_tick; + while (us >= us_until_next_tick) { + start_tick = SysTick->VAL; // wait for SysTick->VAL to RESET + while (SysTick->VAL < start_tick) {} + us -= us_until_next_tick; + us_until_next_tick = 1000; + } + while (SysTick->VAL > ((us_until_next_tick - us) * ticks_per_us)) {} +} + +// us counts down! +void current_tick(uint64_t* ms, uint32_t* us_until_ms) { + uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; + + // We disable interrupts to prevent ticks_ms from changing while we grab it. + common_hal_mcu_disable_interrupts(); + uint32_t tick_status = SysTick->CTRL; + uint32_t current_us = SysTick->VAL; + uint32_t tick_status2 = SysTick->CTRL; + uint64_t current_ms = supervisor_ticks_ms64(); + // The second clause ensures our value actually rolled over. Its possible it hit zero between + // the VAL read and CTRL read. + if ((tick_status & SysTick_CTRL_COUNTFLAG_Msk) != 0 || + ((tick_status2 & SysTick_CTRL_COUNTFLAG_Msk) != 0 && current_us > ticks_per_us)) { + current_ms++; + } + common_hal_mcu_enable_interrupts(); + *ms = current_ms; + *us_until_ms = current_us / ticks_per_us; +} + +void wait_until(uint64_t ms, uint32_t us_until_ms) { + uint32_t ticks_per_us = common_hal_mcu_processor_get_frequency() / 1000 / 1000; + while (supervisor_ticks_ms64() <= ms && SysTick->VAL / ticks_per_us >= us_until_ms) {} +} diff --git a/ports/mimxrt10xx/tick.h b/ports/mimxrt10xx/tick.h new file mode 100644 index 000000000..6660d5b4a --- /dev/null +++ b/ports/mimxrt10xx/tick.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_MIMXRT10XX_TICK_H +#define MICROPY_INCLUDED_MIMXRT10XX_TICK_H + +#include "py/mpconfig.h" + +extern struct timer_descriptor ms_timer; + +void tick_init(void); + +void tick_delay(uint32_t us); + +void current_tick(uint64_t* ms, uint32_t* us_until_ms); +// Do not call this with interrupts disabled because it may be waiting for +// ticks_ms to increment. +void wait_until(uint64_t ms, uint32_t us_until_ms); + +#endif // MICROPY_INCLUDED_MIMXRT10XX_TICK_H diff --git a/tools/uf2 b/tools/uf2 index 968716efd..84da66ce6 160000 --- a/tools/uf2 +++ b/tools/uf2 @@ -1 +1 @@ -Subproject commit 968716efd30600984139d706bcbd8ec1a1b2336d +Subproject commit 84da66ce62215c1daa62204f2c3fa83c05143a42 -- cgit v1.2.3 From e1840f6abcca0e2ef085332663fc7c0f42c41829 Mon Sep 17 00:00:00 2001 From: Radomir Dopieralski Date: Tue, 21 Jan 2020 22:03:47 +0100 Subject: Fix entry overrides in support matrix generation Fix #2539 The entries in the board's mpconfigboard.mk override any other entries. Also, fixed a warning for bad use of backslash in a string. --- docs/shared_bindings_matrix.py | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index ba0ec0e4f..1e631c469 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -185,7 +185,7 @@ def get_excluded_boards(base): board_is_excluded = True # check if module is specifically disabled for this board - re_pattern = "CIRCUITPY_{}\s=\s(\w)".format(module.upper()) + re_pattern = r"CIRCUITPY_{}\s=\s(\w)".format(module.upper()) find_module = re.search(re_pattern, contents) if not find_module: if base[module]["default_value"].isdigit(): @@ -204,9 +204,7 @@ def get_excluded_boards(base): ]): check_dependent_modules[module] = base[module]["default_value"] else: - if (find_module.group(1) == "0" and - find_module.group(1) != base[module]["default_value"]): - board_is_excluded = True + board_is_excluded = find_module.group(1) == "0" if board_is_excluded: if board_chip in base[module]["excluded"]: -- cgit v1.2.3 From 3c50098dfc353b0f30f3a743d45dce9de95e060a Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Thu, 6 Feb 2020 15:17:42 -0500 Subject: add stm32f4 to docs --- docs/shared_bindings_matrix.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index e327d6ec6..ab26366c2 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -26,7 +26,7 @@ import os import re -SUPPORTED_PORTS = ["atmel-samd", "nrf", "mimxrt10xx"] +SUPPORTED_PORTS = ["atmel-samd", "nrf", "stm32f4", "mimxrt10xx"] def parse_port_config(contents, chip_keyword=None): -- cgit v1.2.3 From d0a210654767677d6d26f1d4d40c378e03e9ca8e Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Mon, 20 Apr 2020 09:44:16 -0400 Subject: Remove old build flags, add fixes for shared_matrix --- docs/porting.rst | 41 +++++++++++- docs/shared_bindings_matrix.py | 13 ++-- ports/stm/mpconfigport.mk | 140 +++++++++++++---------------------------- py/circuitpy_mpconfig.h | 12 +--- py/circuitpy_mpconfig.mk | 82 ++++++++---------------- 5 files changed, 117 insertions(+), 171 deletions(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/porting.rst b/docs/porting.rst index 6bb514458..1fb9d13bc 100644 --- a/docs/porting.rst +++ b/docs/porting.rst @@ -1,5 +1,5 @@ We love CircuitPython and would love to see it come to more microcontroller -platforms. With 3.0 we've reworked CircuitPython to make it easier than ever to +platforms. Since 3.0 we've reworked CircuitPython to make it easier than ever to add support. While there are some major differences between ports, this page covers the similarities that make CircuitPython what it is and how that core fits into a variety of microcontrollers. @@ -19,7 +19,7 @@ prepping file systems and automatically running user code on boot. In CircuitPython we've dubbed this component the supervisor because it monitors and facilitates the VMs which run user Python code. Porting involves the supervisor because many of the tasks it does while interfacing with the -hardware. Once its going though, the REPL works and debugging can migrate to a +hardware. Once complete, the REPL works and debugging can migrate to a Python based approach rather than C. The third core piece is the plethora of low level APIs that CircuitPython @@ -42,6 +42,43 @@ to the port's directory (in the top level until the ``ports`` directory is present). This includes the Makefile and any C library resources. Make sure these resources are compatible with the MIT License of the rest of the code! +Circuitpython has a number of modules enabled by default in +``py/circuitpy_mpconfig.mk``. Most of these modules will need to be disabled in +``mpconfigboard.mk`` during the early stages of a port in order for it to +compile. As the port progresses in module support, this list can be pruned down +as a natural "TODO" list. An example minimal build list is shown below: + +.. code-block:: makefile + + # Items requiring ports//common-hal implementation: + CIRCUITPY_MICROCONTROLLER = 0 # Typically the first module to create + CIRCUITPY_DIGITALIO = 0 # Typically the second module to create + CIRCUITPY_ANALOGIO = 0 + CIRCUITPY_BUSIO = 0 + CIRCUITPY_NEOPIXEL_WRITE = 0 + CIRCUITPY_PULSEIO = 0 + CIRCUITPY_OS = 0 + CIRCUITPY_NVM = 0 + CIRCUITPY_AUDIOBUSIO = 0 + CIRCUITPY_AUDIOIO = 0 + CIRCUITPY_ROTARYIO = 0 + CIRCUITPY_RTC = 0 + CIRCUITPY_FREQUENCYIO = 0 + CIRCUITPY_I2CSLAVE = 0 + CIRCUITPY_DISPLAYIO = 0 # Requires SPI, PulseIO (stub ok) + + # Modules with no common-hal implementation, but depend on something else + CIRCUITPY_BITBANGIO = 0 # Requires DigitalIO + CIRCUITPY_GAMEPAD = 0 # Requires DigitalIO + CIRCUITPY_PIXELBUF = 0 # Does nothing without a neopixel or dotstar + CIRCUITPY_RANDOM = 0 # Requires OS + CIRCUITPY_STORAGE = 0 # Requires OS, filesystem + CIRCUITPY_TOUCHIO = 0 # Requires Microcontroller + CIRCUITPY_USB_HID = 0 # Requires USB + CIRCUITPY_USB_MIDI = 0 # Requires USB + CIRCUITPY_REQUIRE_I2C_PULLUPS = 0 # Does nothing without I2C + CIRCUITPY_ULAB = 0 # No requirements, but takes extra flash + Step 2: Init -------------- Once your build is setup, the next step should be to get your clocks going as diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index ab26366c2..0473c5119 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -26,7 +26,7 @@ import os import re -SUPPORTED_PORTS = ["atmel-samd", "nrf", "stm32f4", "mimxrt10xx"] +SUPPORTED_PORTS = ["atmel-samd", "nrf", "stm", "mimxrt10xx"] def parse_port_config(contents, chip_keyword=None): @@ -140,6 +140,9 @@ def get_excluded_boards(base): chip_keyword = "CHIP_FAMILY" elif port in ["nrf"]: re_board_chip = re.compile("MCU_VARIANT\s=\s(\w+)") + elif port in ["stm"]: + re_board_chip = re.compile("MCU_SERIES\s*=\s*(\w+)") + chip_keyword = "MCU_SERIES" port_dir = "ports/{}".format(port) @@ -158,10 +161,10 @@ def get_excluded_boards(base): contents = board.read() board_chip = re_board_chip.search(contents) - #print(entry.name, board_chip.group(1)) if not board_chip: board_chip = "Unknown Chip" else: + #print(entry.name, board_chip.group(1)) board_chip = board_chip.group(1) # add port_config results to contents @@ -178,12 +181,6 @@ def get_excluded_boards(base): if small_build and base[module]["full_build"] == "1": board_is_excluded = True - # check if board uses `MINIMAL_BUILD`. if yes, and current - # module is marked as `DEFAULT_BUILD`, board is excluded - min_build = re.search("CIRCUITPY_MINIMAL_BUILD = 1", contents) - if min_build and base[module]["default_value"] == "CIRCUITPY_DEFAULT_BUILD": - board_is_excluded = True - # check if module is specifically disabled for this board re_pattern = r"CIRCUITPY_{}\s=\s(\w)".format(module.upper()) find_module = re.search(re_pattern, contents) diff --git a/ports/stm/mpconfigport.mk b/ports/stm/mpconfigport.mk index 323fd7646..15254f917 100644 --- a/ports/stm/mpconfigport.mk +++ b/ports/stm/mpconfigport.mk @@ -1,106 +1,56 @@ -# Define an equivalent for MICROPY_LONGINT_IMPL, to pass to $(MPY-TOOL) in py/mkrules.mk -# $(MPY-TOOL) needs to know what kind of longint to use (if any) to freeze long integers. -# This should correspond to the MICROPY_LONGINT_IMPL definition in mpconfigport.h. MPY_TOOL_LONGINT_IMPL = -mlongint-impl=mpz - -# Internal math library is substantially smaller than toolchain one +LONGINT_IMPL = MPZ INTERNAL_LIBM = 1 - -# Chip supplied serial number, in bytes USB_SERIAL_NUMBER_LENGTH = 24 -# Longints can be implemented as mpz, as longlong, or not -LONGINT_IMPL = MPZ - -# Reduced feature set for early port -CIRCUITPY_MINIMAL_BUILD = 1 - -# The ifndef's allow overriding in mpconfigboard.mk. - -ifndef CIRCUITPY_BOARD -CIRCUITPY_BOARD = 1 -endif - -ifndef CIRCUITPY_DIGITALIO -CIRCUITPY_DIGITALIO = 1 -endif - -ifndef CIRCUITPY_ANALOGIO -CIRCUITPY_ANALOGIO = 1 -endif - -ifndef CIRCUITPY_MICROCONTROLLER -CIRCUITPY_MICROCONTROLLER = 1 -endif - -ifndef CIRCUITPY_BUSIO -CIRCUITPY_BUSIO = 1 -endif - -ifndef CIRCUITPY_PULSEIO -CIRCUITPY_PULSEIO = 1 -endif - -ifndef CIRCUITPY_OS -CIRCUITPY_OS = 1 -endif - -ifndef CIRCUITPY_STORAGE -CIRCUITPY_STORAGE = 1 -endif - -ifndef CIRCUITPY_RANDOM -CIRCUITPY_RANDOM = 1 -endif - -ifndef CRICUITPY_USB_HID -CIRCUITPY_USB_HID = 1 -endif - -ifndef CIRCUITPY_USB_MIDI -CIRCUITPY_USB_MIDI = 1 -endif - -ifndef CIRCUITPY_NEOPIXEL_WRITE -CIRCUITPY_NEOPIXEL_WRITE = 1 -endif - -ifndef CIRCUITPY_DISPLAYIO -CIRCUITPY_DISPLAYIO = 1 -endif - -CFLAGS += -DMICROPY_CPYTHON_COMPAT=1 - -CIRCUITPY_ULAB = 1 - -ifeq ($(MCU_SERIES), H7) - CIRCUITPY_BOARD = 1 - CIRCUITPY_DIGITALIO = 1 +ifeq ($(MCU_SERIES),F4) + # Items requiring common-hal implementation: + CIRCUITPY_AUDIOBUSIO = 0 + CIRCUITPY_AUDIOIO = 0 + CIRCUITPY_ROTARYIO = 0 + CIRCUITPY_RTC = 0 + CIRCUITPY_FREQUENCYIO = 0 + CIRCUITPY_I2CSLAVE = 0 + # Can be overridden on board level + ifndef CIRCUITPY_NVM + CIRCUITPY_NVM = 0 + endif +endif + +ifeq ($(MCU_SERIES),H7) + # Items requiring common-hal implementation: CIRCUITPY_ANALOGIO = 0 - CIRCUITPY_MICROCONTROLLER = 1 - CIRCUITPY_BUSIO = 1 + CIRCUITPY_NEOPIXEL_WRITE = 0 CIRCUITPY_PULSEIO = 0 CIRCUITPY_OS = 0 - CIRCUITPY_STORAGE = 0 - CIRCUITPY_RANDOM = 0 - CIRCUITPY_USB_HID = 0 - CIRCUITPY_USB_MIDI = 0 - CIRCUITPY_NEOPIXEL_WRITE = 0 - CIRCUITPY_DISPLAYIO = 0 -endif - -ifeq ($(MCU_SERIES), F7) - CIRCUITPY_BOARD = 1 - CIRCUITPY_DIGITALIO = 1 + CIRCUITPY_NVM = 0 + CIRCUITPY_AUDIOBUSIO = 0 + CIRCUITPY_AUDIOIO = 0 + CIRCUITPY_ROTARYIO = 0 + CIRCUITPY_RTC = 0 + CIRCUITPY_FREQUENCYIO = 0 + CIRCUITPY_I2CSLAVE = 0 + # Modules with no common-hal implementation that depend on something else + CIRCUITPY_DISPLAYIO = 0 # Requires SPI, PulseIO, and common-hal module (stub ok) + CIRCUITPY_RANDOM = 0 # Requires OS + CIRCUITPY_STORAGE = 0 # Requires OS, filesystem +endif + +ifeq ($(MCU_SERIES),F7) + # Items requiring common-hal implementation: CIRCUITPY_ANALOGIO = 0 - CIRCUITPY_MICROCONTROLLER = 1 - CIRCUITPY_BUSIO = 1 + CIRCUITPY_NEOPIXEL_WRITE = 0 CIRCUITPY_PULSEIO = 0 CIRCUITPY_OS = 0 - CIRCUITPY_STORAGE = 0 - CIRCUITPY_RANDOM = 0 - CIRCUITPY_USB_HID = 0 - CIRCUITPY_USB_MIDI = 0 - CIRCUITPY_NEOPIXEL_WRITE = 0 - CIRCUITPY_DISPLAYIO = 0 + CIRCUITPY_NVM = 0 + CIRCUITPY_AUDIOBUSIO = 0 + CIRCUITPY_AUDIOIO = 0 + CIRCUITPY_ROTARYIO = 0 + CIRCUITPY_RTC = 0 + CIRCUITPY_FREQUENCYIO = 0 + CIRCUITPY_I2CSLAVE = 0 + # Modules with no common-hal implementation that depend on something else + CIRCUITPY_DISPLAYIO = 0 # Requires SPI, PulseIO, and common-hal module (stub ok) + CIRCUITPY_RANDOM = 0 # Requires OS + CIRCUITPY_STORAGE = 0 # Requires OS, filesystem endif diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 06289258d..89e9396dd 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -179,17 +179,11 @@ typedef long mp_off_t; // board-specific definitions, which control and may override definitions below. #include "mpconfigboard.h" -// CIRCUITPY_FULL_BUILD is defined in a *.mk file. - +// CIRCUITPY_FULL_BUILD is defined in py/circuitpy_mpconfig.mk // Remove some lesser-used functionality to make small builds fit. #define MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG (CIRCUITPY_FULL_BUILD) -//TODO: replace this with a rework of the FULL_BUILD system -#if !defined(MICROPY_CPYTHON_COMPAT) - #define MICROPY_CPYTHON_COMPAT (CIRCUITPY_FULL_BUILD) -#endif -#if !defined(MICROPY_COMP_FSTRING_LITERAL) +#define MICROPY_CPYTHON_COMPAT (CIRCUITPY_FULL_BUILD) #define MICROPY_COMP_FSTRING_LITERAL (MICROPY_CPYTHON_COMPAT) -#endif #define MICROPY_MODULE_WEAK_LINKS (CIRCUITPY_FULL_BUILD) #define MICROPY_PY_ALL_SPECIAL_METHODS (CIRCUITPY_FULL_BUILD) #define MICROPY_PY_BUILTINS_COMPLEX (CIRCUITPY_FULL_BUILD) @@ -223,7 +217,7 @@ typedef long mp_off_t; #define MP_SSIZE_MAX (0x7fffffff) #endif -#if INTERNAL_FLASH_FILESYSTEM == 0 && QSPI_FLASH_FILESYSTEM == 0 && SPI_FLASH_FILESYSTEM == 0 && !CIRCUITPY_MINIMAL_BUILD +#if INTERNAL_FLASH_FILESYSTEM == 0 && QSPI_FLASH_FILESYSTEM == 0 && SPI_FLASH_FILESYSTEM == 0 && !DISABLE_FILESYSTEM #error No *_FLASH_FILESYSTEM set! #endif diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk index ba94f9784..1c2afc33e 100644 --- a/py/circuitpy_mpconfig.mk +++ b/py/circuitpy_mpconfig.mk @@ -23,13 +23,12 @@ # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN # THE SOFTWARE. -# mpconfigboard.mk files can specify: -# CIRCUITPY_FULL_BUILD = 1 (which is the default) -# or -# CIRCUITPY_SMALL_BUILD = 1 -# which is the same as: -# CIRCUITPY_FULL_BUILD = 0 +# Boards default to all modules enabled (with exceptions) +# Manually disable by overriding in #mpconfigboard.mk +# Smaller builds can be forced for resource constrained chips, typically SAMD21s +# without external flash. Avoid using this for incomplete ports, as it changes +# settings in other files. ifndef CIRCUITPY_FULL_BUILD ifeq ($(CIRCUITPY_SMALL_BUILD),1) CIRCUITPY_FULL_BUILD = 0 @@ -39,38 +38,8 @@ ifndef CIRCUITPY_FULL_BUILD endif CFLAGS += -DCIRCUITPY_FULL_BUILD=$(CIRCUITPY_FULL_BUILD) -# Setting CIRCUITPY_MINIMAL_BUILD = 1 will disable all features -# Use for for early stage or highly restricted ports -ifndef CIRCUITPY_MINIMAL_BUILD -CIRCUITPY_MINIMAL_BUILD = 0 -endif -CFLAGS += -DCIRCUITPY_MINIMAL_BUILD=$(CIRCUITPY_MINIMAL_BUILD) - -ifndef CIRCUITPY_DEFAULT_BUILD - ifeq ($(CIRCUITPY_MINIMAL_BUILD),1) - CIRCUITPY_FULL_BUILD = 0 - CIRCUITPY_DEFAULT_BUILD = 0 - else - CIRCUITPY_DEFAULT_BUILD = 1 - endif -endif -CFLAGS += -DCIRCUITPY_DEFAULT_BUILD=$(CIRCUITPY_DEFAULT_BUILD) - -# Some features have no unique HAL component, and thus there's never -# a reason to not include them. -ifndef CIRCUITPY_ALWAYS_BUILD - CIRCUITPY_ALWAYS_BUILD = 1 -endif -CFLAGS += -DCIRCUITPY_ALWAYS_BUILD=$(CIRCUITPY_ALWAYS_BUILD) - - -# All builtin modules are listed below, with default values (0 for off, 1 for on) -# Some are always on, some are always off, and some depend on CIRCUITPY_FULL_BUILD. -# -# *** You can override any of the defaults by defining them in your mpconfigboard.mk. - ifndef CIRCUITPY_ANALOGIO -CIRCUITPY_ANALOGIO = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_ANALOGIO = 1 endif CFLAGS += -DCIRCUITPY_ANALOGIO=$(CIRCUITPY_ANALOGIO) @@ -89,7 +58,6 @@ CIRCUITPY_AUDIOIO_COMPAT = $(CIRCUITPY_AUDIOIO) endif CFLAGS += -DCIRCUITPY_AUDIOIO_COMPAT=$(CIRCUITPY_AUDIOIO_COMPAT) - ifndef CIRCUITPY_AUDIOPWMIO CIRCUITPY_AUDIOPWMIO = 0 endif @@ -130,17 +98,17 @@ endif CFLAGS += -DCIRCUITPY_BLEIO=$(CIRCUITPY_BLEIO) ifndef CIRCUITPY_BOARD -CIRCUITPY_BOARD = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_BOARD = 1 endif CFLAGS += -DCIRCUITPY_BOARD=$(CIRCUITPY_BOARD) ifndef CIRCUITPY_BUSIO -CIRCUITPY_BUSIO = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_BUSIO = 1 endif CFLAGS += -DCIRCUITPY_BUSIO=$(CIRCUITPY_BUSIO) ifndef CIRCUITPY_DIGITALIO -CIRCUITPY_DIGITALIO = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_DIGITALIO = 1 endif CFLAGS += -DCIRCUITPY_DIGITALIO=$(CIRCUITPY_DIGITALIO) @@ -175,7 +143,7 @@ endif CFLAGS += -DCIRCUITPY_I2CSLAVE=$(CIRCUITPY_I2CSLAVE) ifndef CIRCUITPY_MATH -CIRCUITPY_MATH = $(CIRCUITPY_ALWAYS_BUILD) +CIRCUITPY_MATH = 1 endif CFLAGS += -DCIRCUITPY_MATH=$(CIRCUITPY_MATH) @@ -185,12 +153,12 @@ endif CFLAGS += -DCIRCUITPY__EVE=$(CIRCUITPY__EVE) ifndef CIRCUITPY_MICROCONTROLLER -CIRCUITPY_MICROCONTROLLER = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_MICROCONTROLLER = 1 endif CFLAGS += -DCIRCUITPY_MICROCONTROLLER=$(CIRCUITPY_MICROCONTROLLER) ifndef CIRCUITPY_NEOPIXEL_WRITE -CIRCUITPY_NEOPIXEL_WRITE = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_NEOPIXEL_WRITE = 1 endif CFLAGS += -DCIRCUITPY_NEOPIXEL_WRITE=$(CIRCUITPY_NEOPIXEL_WRITE) @@ -201,12 +169,12 @@ endif CFLAGS += -DCIRCUITPY_NETWORK=$(CIRCUITPY_NETWORK) ifndef CIRCUITPY_NVM -CIRCUITPY_NVM = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_NVM = 1 endif CFLAGS += -DCIRCUITPY_NVM=$(CIRCUITPY_NVM) ifndef CIRCUITPY_OS -CIRCUITPY_OS = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_OS = 1 endif CFLAGS += -DCIRCUITPY_OS=$(CIRCUITPY_OS) @@ -222,7 +190,7 @@ endif CFLAGS += -DCIRCUITPY_PROTOMATTER=$(CIRCUITPY_PROTOMATTER) ifndef CIRCUITPY_PULSEIO -CIRCUITPY_PULSEIO = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_PULSEIO = 1 endif CFLAGS += -DCIRCUITPY_PULSEIO=$(CIRCUITPY_PULSEIO) @@ -233,17 +201,17 @@ endif CFLAGS += -DCIRCUITPY_PS2IO=$(CIRCUITPY_PS2IO) ifndef CIRCUITPY_RANDOM -CIRCUITPY_RANDOM = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_RANDOM = 1 endif CFLAGS += -DCIRCUITPY_RANDOM=$(CIRCUITPY_RANDOM) ifndef CIRCUITPY_ROTARYIO -CIRCUITPY_ROTARYIO = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_ROTARYIO = 1 endif CFLAGS += -DCIRCUITPY_ROTARYIO=$(CIRCUITPY_ROTARYIO) ifndef CIRCUITPY_RTC -CIRCUITPY_RTC = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_RTC = 1 endif CFLAGS += -DCIRCUITPY_RTC=$(CIRCUITPY_RTC) @@ -262,22 +230,22 @@ endif CFLAGS += -DCIRCUITPY_STAGE=$(CIRCUITPY_STAGE) ifndef CIRCUITPY_STORAGE -CIRCUITPY_STORAGE = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_STORAGE = 1 endif CFLAGS += -DCIRCUITPY_STORAGE=$(CIRCUITPY_STORAGE) ifndef CIRCUITPY_STRUCT -CIRCUITPY_STRUCT = $(CIRCUITPY_ALWAYS_BUILD) +CIRCUITPY_STRUCT = 1 endif CFLAGS += -DCIRCUITPY_STRUCT=$(CIRCUITPY_STRUCT) ifndef CIRCUITPY_SUPERVISOR -CIRCUITPY_SUPERVISOR = $(CIRCUITPY_ALWAYS_BUILD) +CIRCUITPY_SUPERVISOR = 1 endif CFLAGS += -DCIRCUITPY_SUPERVISOR=$(CIRCUITPY_SUPERVISOR) ifndef CIRCUITPY_TIME -CIRCUITPY_TIME = $(CIRCUITPY_ALWAYS_BUILD) +CIRCUITPY_TIME = 1 endif CFLAGS += -DCIRCUITPY_TIME=$(CIRCUITPY_TIME) @@ -288,7 +256,7 @@ endif CFLAGS += -DCIRCUITPY_TOUCHIO_USE_NATIVE=$(CIRCUITPY_TOUCHIO_USE_NATIVE) ifndef CIRCUITPY_TOUCHIO -CIRCUITPY_TOUCHIO = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_TOUCHIO = 1 endif CFLAGS += -DCIRCUITPY_TOUCHIO=$(CIRCUITPY_TOUCHIO) @@ -299,12 +267,12 @@ endif CFLAGS += -DCIRCUITPY_UHEAP=$(CIRCUITPY_UHEAP) ifndef CIRCUITPY_USB_HID -CIRCUITPY_USB_HID = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_USB_HID = 1 endif CFLAGS += -DCIRCUITPY_USB_HID=$(CIRCUITPY_USB_HID) ifndef CIRCUITPY_USB_MIDI -CIRCUITPY_USB_MIDI = $(CIRCUITPY_DEFAULT_BUILD) +CIRCUITPY_USB_MIDI = 1 endif CFLAGS += -DCIRCUITPY_USB_MIDI=$(CIRCUITPY_USB_MIDI) -- cgit v1.2.3 From 8791ca6af3f5a63d286d9f5c3e26f55a1619ff86 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Thu, 23 Apr 2020 13:33:41 -0400 Subject: implement requested changes --- docs/porting.rst | 7 ++++--- docs/shared_bindings_matrix.py | 8 ++++---- ports/atmel-samd/Makefile | 4 ++-- ports/atmel-samd/boards/8086_commander/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/datum_distance/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/datum_imu/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/datum_light/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/datum_weather/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/escornabot_makech/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/meowmeow/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/nfc_copy_cat/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/pewpew10/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/pirkey_m0/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/pyruler/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/shirtty/mpconfigboard.mk | 2 +- .../boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk | 2 +- .../boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/uchip/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk | 2 +- ports/atmel-samd/mpconfigport.mk | 6 +++--- ports/stm/mpconfigport.mk | 10 +++++----- py/circuitpy_mpconfig.h | 3 +-- py/circuitpy_mpconfig.mk | 11 ++++------- 41 files changed, 57 insertions(+), 60 deletions(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/porting.rst b/docs/porting.rst index 1fb9d13bc..d28f56f47 100644 --- a/docs/porting.rst +++ b/docs/porting.rst @@ -50,7 +50,7 @@ as a natural "TODO" list. An example minimal build list is shown below: .. code-block:: makefile - # Items requiring ports//common-hal implementation: + # These modules are implemented in ports//common-hal: CIRCUITPY_MICROCONTROLLER = 0 # Typically the first module to create CIRCUITPY_DIGITALIO = 0 # Typically the second module to create CIRCUITPY_ANALOGIO = 0 @@ -67,10 +67,11 @@ as a natural "TODO" list. An example minimal build list is shown below: CIRCUITPY_I2CSLAVE = 0 CIRCUITPY_DISPLAYIO = 0 # Requires SPI, PulseIO (stub ok) - # Modules with no common-hal implementation, but depend on something else + # These modules are implemented in shared-module/ - they can be included in + # any port once their prerequisites in common-hal are complete. CIRCUITPY_BITBANGIO = 0 # Requires DigitalIO CIRCUITPY_GAMEPAD = 0 # Requires DigitalIO - CIRCUITPY_PIXELBUF = 0 # Does nothing without a neopixel or dotstar + CIRCUITPY_PIXELBUF = 0 # Requires neopixel_write or SPI (dotstar) CIRCUITPY_RANDOM = 0 # Requires OS CIRCUITPY_STORAGE = 0 # Requires OS, filesystem CIRCUITPY_TOUCHIO = 0 # Requires Microcontroller diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index 0473c5119..d5f838f75 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -139,9 +139,9 @@ def get_excluded_boards(base): re_board_chip = re.compile("CHIP_FAMILY\s=\s(\w+)") chip_keyword = "CHIP_FAMILY" elif port in ["nrf"]: - re_board_chip = re.compile("MCU_VARIANT\s=\s(\w+)") + re_board_chip = re.compile(r"MCU_VARIANT\s=\s(\w+)") elif port in ["stm"]: - re_board_chip = re.compile("MCU_SERIES\s*=\s*(\w+)") + re_board_chip = re.compile(r"MCU_SERIES\s*=\s*(\w+)") chip_keyword = "MCU_SERIES" port_dir = "ports/{}".format(port) @@ -175,9 +175,9 @@ def get_excluded_boards(base): check_dependent_modules = dict() for module in modules: board_is_excluded = False - # check if board uses `SMALL_BUILD`. if yes, and current + # check if board turns off `FULL_BUILD`. if yes, and current # module is marked as `FULL_BUILD`, board is excluded - small_build = re.search("CIRCUITPY_SMALL_BUILD = 1", contents) + small_build = re.search("CIRCUITPY_FULL_BUILD = 0", contents) if small_build and base[module]["full_build"] == "1": board_is_excluded = True diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile index f4886f96e..7a626dff7 100644 --- a/ports/atmel-samd/Makefile +++ b/ports/atmel-samd/Makefile @@ -114,7 +114,7 @@ else # Do a default shrink for small builds. ifndef CFLAGS_INLINE_LIMIT - ifeq ($(CIRCUITPY_SMALL_BUILD),1) + ifeq ($(CIRCUITPY_FULL_BUILD),0) CFLAGS_INLINE_LIMIT = 50 endif endif @@ -125,7 +125,7 @@ else CFLAGS += -flto -flto-partition=none - ifeq ($(CIRCUITPY_SMALL_BUILD),1) + ifeq ($(CIRCUITPY_FULL_BUILD),0) CFLAGS += --param inline-unit-growth=15 --param max-inline-insns-auto=20 endif diff --git a/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk b/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk index 3e865657a..dcc62fc9b 100644 --- a/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk +++ b/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk @@ -13,7 +13,7 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = "W25Q128JV_SQ" LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk index bd682ade0..d31d1f54a 100644 --- a/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk +++ b/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk @@ -8,5 +8,5 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk index 894b9b011..7eb83a123 100644 --- a/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk +++ b/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk index 8a29b0ace..fd24edafa 100644 --- a/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk +++ b/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk index f94ec13b7..a5722c9ad 100644 --- a/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk +++ b/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk b/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk index c3f0750a9..055e6b19e 100644 --- a/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk @@ -8,4 +8,4 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 diff --git a/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk b/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk index adae4beb2..8724e0d4b 100644 --- a/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk +++ b/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk @@ -8,4 +8,4 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 diff --git a/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk b/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk index 4f6c7ab82..ae05d32f2 100644 --- a/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk +++ b/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk b/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk index 336a1b832..6fd05f403 100644 --- a/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk +++ b/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/datum_light/mpconfigboard.mk b/ports/atmel-samd/boards/datum_light/mpconfigboard.mk index 7ec2efcf9..d42a7869d 100644 --- a/ports/atmel-samd/boards/datum_light/mpconfigboard.mk +++ b/ports/atmel-samd/boards/datum_light/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk b/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk index d3ec1b0fd..d92cbc71b 100644 --- a/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk +++ b/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.mk b/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.mk index dedd49ff7..93f6b1c90 100644 --- a/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.mk +++ b/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk index 134abf723..54c5bff6a 100644 --- a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk index 364374350..69ebdfc23 100644 --- a/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk index 40a461b27..7556b9517 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk index 736161047..de79638bd 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk index d64938632..ca3eccbe4 100644 --- a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/meowmeow/mpconfigboard.mk b/ports/atmel-samd/boards/meowmeow/mpconfigboard.mk index 4b452ecbf..bd0afb60e 100644 --- a/ports/atmel-samd/boards/meowmeow/mpconfigboard.mk +++ b/ports/atmel-samd/boards/meowmeow/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk index b73f0951e..5e5f0ff5f 100644 --- a/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk +++ b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk @@ -9,7 +9,7 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/nfc_copy_cat/mpconfigboard.mk b/ports/atmel-samd/boards/nfc_copy_cat/mpconfigboard.mk index 4f6d1e70d..1b4a16a08 100644 --- a/ports/atmel-samd/boards/nfc_copy_cat/mpconfigboard.mk +++ b/ports/atmel-samd/boards/nfc_copy_cat/mpconfigboard.mk @@ -11,4 +11,4 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = "GD25Q16C" LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 diff --git a/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk b/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk index b3271d062..7305abf73 100644 --- a/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk @@ -8,7 +8,7 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 CIRCUITPY_PEW = 1 CIRCUITPY_ANALOGIO = 1 diff --git a/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk b/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk index 51b4fc993..f5b6ca389 100644 --- a/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk @@ -9,7 +9,7 @@ CHIP_FAMILY = samd51 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 # TODO: Turn off analogio for now for space reasons, but restore it # when frozen module gets smaller. CIRCUITPY_ANALOGIO = 0 diff --git a/ports/atmel-samd/boards/pirkey_m0/mpconfigboard.mk b/ports/atmel-samd/boards/pirkey_m0/mpconfigboard.mk index e6c227b13..8b7066ac7 100644 --- a/ports/atmel-samd/boards/pirkey_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pirkey_m0/mpconfigboard.mk @@ -20,7 +20,7 @@ CIRCUITPY_RTC = 0 CIRCUITPY_SAMD = 0 CIRCUITPY_USB_MIDI = 1 CIRCUITPY_TOUCHIO = 0 -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 # Make more room. SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/pyruler/mpconfigboard.mk b/ports/atmel-samd/boards/pyruler/mpconfigboard.mk index ca7ed4bdc..b79940673 100644 --- a/ports/atmel-samd/boards/pyruler/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pyruler/mpconfigboard.mk @@ -8,7 +8,7 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk index 2741454ce..bedec87f4 100644 --- a/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk +++ b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/shirtty/mpconfigboard.mk b/ports/atmel-samd/boards/shirtty/mpconfigboard.mk index bc37b5943..295ba4bce 100644 --- a/ports/atmel-samd/boards/shirtty/mpconfigboard.mk +++ b/ports/atmel-samd/boards/shirtty/mpconfigboard.mk @@ -8,7 +8,7 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 CIRCUITPY_I2CSLAVE = 1 CIRCUITPY_TOUCHIO = 0 diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk index 632cd095c..22e2059a9 100644 --- a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk @@ -9,5 +9,5 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.mk index ccf5a4149..dd01c9985 100644 --- a/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_with_flash/mpconfigboard.mk @@ -11,5 +11,5 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = "W25Q32FV" LONGINT_IMPL = MPZ -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk index 0c33ef960..a2bd577cd 100644 --- a/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk index d09785fb8..9460d0009 100644 --- a/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk @@ -8,6 +8,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk index 5c942901a..aab5efd5d 100644 --- a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk @@ -8,7 +8,7 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/uchip/mpconfigboard.mk b/ports/atmel-samd/boards/uchip/mpconfigboard.mk index 950910e48..90b5600dc 100644 --- a/ports/atmel-samd/boards/uchip/mpconfigboard.mk +++ b/ports/atmel-samd/boards/uchip/mpconfigboard.mk @@ -8,4 +8,4 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 diff --git a/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.mk b/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.mk index 941d88b45..fdcde4a07 100644 --- a/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.mk +++ b/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.mk @@ -9,7 +9,7 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = MPZ -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk b/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk index 5c418d312..c1dbf514d 100644 --- a/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk +++ b/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk @@ -9,7 +9,7 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = MPZ -CIRCUITPY_SMALL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/mpconfigport.mk b/ports/atmel-samd/mpconfigport.mk index 61f7c206a..d043ee242 100644 --- a/ports/atmel-samd/mpconfigport.mk +++ b/ports/atmel-samd/mpconfigport.mk @@ -65,19 +65,19 @@ CIRCUITPY_SAMD = 1 endif ifndef CIRCUITPY_ULAB -ifneq ($(CIRCUITPY_SMALL_BUILD),1) +ifneq ($(CIRCUITPY_FULL_BUILD),0) CIRCUITPY_ULAB = 1 endif endif ifndef CIRCUITPY_PROTOMATTER -ifneq ($(CIRCUITPY_SMALL_BUILD),1) +ifneq ($(CIRCUITPY_FULL_BUILD),0) CIRCUITPY_PROTOMATTER = 1 endif endif ifndef CIRCUITPY_FRAMEBUFFERIO -ifneq ($(CIRCUITPY_SMALL_BUILD),1) +ifneq ($(CIRCUITPY_FULL_BUILD),0) CIRCUITPY_FRAMEBUFFERIO = 1 endif endif diff --git a/ports/stm/mpconfigport.mk b/ports/stm/mpconfigport.mk index 15254f917..7ed2aa49a 100644 --- a/ports/stm/mpconfigport.mk +++ b/ports/stm/mpconfigport.mk @@ -4,7 +4,7 @@ INTERNAL_LIBM = 1 USB_SERIAL_NUMBER_LENGTH = 24 ifeq ($(MCU_SERIES),F4) - # Items requiring common-hal implementation: + # Not yet implemented common-hal modules: CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 CIRCUITPY_ROTARYIO = 0 @@ -18,7 +18,7 @@ ifeq ($(MCU_SERIES),F4) endif ifeq ($(MCU_SERIES),H7) - # Items requiring common-hal implementation: + # Not yet implemented common-hal modules: CIRCUITPY_ANALOGIO = 0 CIRCUITPY_NEOPIXEL_WRITE = 0 CIRCUITPY_PULSEIO = 0 @@ -30,14 +30,14 @@ ifeq ($(MCU_SERIES),H7) CIRCUITPY_RTC = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CSLAVE = 0 - # Modules with no common-hal implementation that depend on something else + # shared-module modules that still need prerequisites filled CIRCUITPY_DISPLAYIO = 0 # Requires SPI, PulseIO, and common-hal module (stub ok) CIRCUITPY_RANDOM = 0 # Requires OS CIRCUITPY_STORAGE = 0 # Requires OS, filesystem endif ifeq ($(MCU_SERIES),F7) - # Items requiring common-hal implementation: + # Not yet implemented common-hal modules: CIRCUITPY_ANALOGIO = 0 CIRCUITPY_NEOPIXEL_WRITE = 0 CIRCUITPY_PULSEIO = 0 @@ -49,7 +49,7 @@ ifeq ($(MCU_SERIES),F7) CIRCUITPY_RTC = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CSLAVE = 0 - # Modules with no common-hal implementation that depend on something else + # shared-module modules that still need prerequisites filled CIRCUITPY_DISPLAYIO = 0 # Requires SPI, PulseIO, and common-hal module (stub ok) CIRCUITPY_RANDOM = 0 # Requires OS CIRCUITPY_STORAGE = 0 # Requires OS, filesystem diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 89e9396dd..e09a6309f 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -179,8 +179,7 @@ typedef long mp_off_t; // board-specific definitions, which control and may override definitions below. #include "mpconfigboard.h" -// CIRCUITPY_FULL_BUILD is defined in py/circuitpy_mpconfig.mk -// Remove some lesser-used functionality to make small builds fit. +// Turning off FULL_BUILD removes some functionality to reduce flash size on tiny SAMD21s #define MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG (CIRCUITPY_FULL_BUILD) #define MICROPY_CPYTHON_COMPAT (CIRCUITPY_FULL_BUILD) #define MICROPY_COMP_FSTRING_LITERAL (MICROPY_CPYTHON_COMPAT) diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk index 1c2afc33e..61dd9e6da 100644 --- a/py/circuitpy_mpconfig.mk +++ b/py/circuitpy_mpconfig.mk @@ -26,18 +26,15 @@ # Boards default to all modules enabled (with exceptions) # Manually disable by overriding in #mpconfigboard.mk -# Smaller builds can be forced for resource constrained chips, typically SAMD21s -# without external flash. Avoid using this for incomplete ports, as it changes -# settings in other files. +# Smaller builds can be forced for resource constrained chips (typically SAMD21s +# without external flash) by setting CIRCUITPY_FULL_BUILD=0. Avoid using this +# for merely incomplete ports, as it changes settings in other files. ifndef CIRCUITPY_FULL_BUILD - ifeq ($(CIRCUITPY_SMALL_BUILD),1) - CIRCUITPY_FULL_BUILD = 0 - else CIRCUITPY_FULL_BUILD = 1 - endif endif CFLAGS += -DCIRCUITPY_FULL_BUILD=$(CIRCUITPY_FULL_BUILD) + ifndef CIRCUITPY_ANALOGIO CIRCUITPY_ANALOGIO = 1 endif -- cgit v1.2.3 From 7337ea4955132db7006727b2da3f0e8fe834b475 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 30 Apr 2020 00:54:46 -0400 Subject: fix support_matrix.py to handle ?= --- docs/shared_bindings_matrix.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index d5f838f75..aa5ef02e2 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -98,7 +98,7 @@ def build_module_map(): for module in modules: full_name = module search_name = module.lstrip("_") - re_pattern = "CIRCUITPY_{}\s=\s(.+)".format(search_name.upper()) + re_pattern = "CIRCUITPY_{}\s*\??=\s*(.+)".format(search_name.upper()) find_config = re.findall(re_pattern, configs) if not find_config: continue -- cgit v1.2.3 From 32de8b437ccdadf0b18990d0f3f9fbf624475f46 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 25 May 2020 09:37:35 -0500 Subject: shared_bindings_matrix: Work from parsed 'make' output Revisiting this because I noticed the support matrix said that pyruler had several modules it obviously didn't, such as the recently added vectorio. It is less error-prone because we can use the final values instead of re-coding the Makefile logic in python. The only things we need to do are invoke make in "print-database" mode, then chase any indirect references like CIRCUITPY_VECTORIO = $(CIRCUITPY_DISPLAYIO) It does take longer, about 45s on my laptop. --- docs/shared_bindings_matrix.py | 222 +++++++++-------------------------------- 1 file changed, 48 insertions(+), 174 deletions(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index aa5ef02e2..e48c71813 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -24,50 +24,12 @@ import json import os import re +import subprocess +import sys SUPPORTED_PORTS = ["atmel-samd", "nrf", "stm", "mimxrt10xx"] - -def parse_port_config(contents, chip_keyword=None): - """ Compile a dictionary of port-wide module configs, which may - be categorized by chipset. - """ - chip_fam = "all" - ifeq_found = False - port_config_results = {"all": []} - - chip_pattern = "" - if chip_keyword: - chip_pattern = ( - re.compile("(?<=ifeq\s\(\$\({}\)\,)(\w+)".format(chip_keyword)) - ) - - for line in contents: - if chip_keyword: - if not ifeq_found: - check_ifeq = chip_pattern.search(line) - if check_ifeq: - ifeq_found = True - chip_fam = check_ifeq.group(1) - #print("found chip:", chip_fam) - else: - ifeq_found = False - chip_fam = "all" - else: - if "endif" in line: - ifeq_found = False - chip_fam = "all" - - if "CIRCUITPY_" in line: - if chip_fam in port_config_results: - port_config_results[chip_fam].append(line.rstrip("\n")) - else: - port_config_results[chip_fam] = [line.rstrip("\n")] - - #print(port_config_results) - return port_config_results - def get_shared_bindings(): """ Get a list of modules in shared-bindings based on folder names """ @@ -117,149 +79,64 @@ def build_module_map(): "excluded": {} } - #print(base) return base +def get_settings_from_makefile(port_dir, board_name): + """ Invoke make in a mode which prints the database, then parse it for + settings. -def get_excluded_boards(base): - """ Cycles through each board's `mpconfigboard.mk` file to determine - if each module is included or not. Boards are selected by existence - in a port listed in `SUPPORTED_PORTS` (e.g. `/port/nrf/feather_52840`) - - Boards are further categorized by their respective chipset (SAMD21, - SAMD51, nRF52840, etc.) + This means that the effect of all Makefile directives is taken + into account, without having to re-encode the logic that sets them + in this script, something that has proved error-prone """ - modules = list(base.keys()) - - re_board_chip = None - chip_keyword = None - for port in SUPPORTED_PORTS: - # each port appears to use its own define for the chipset - if port in ["atmel-samd"]: - re_board_chip = re.compile("CHIP_FAMILY\s=\s(\w+)") - chip_keyword = "CHIP_FAMILY" - elif port in ["nrf"]: - re_board_chip = re.compile(r"MCU_VARIANT\s=\s(\w+)") - elif port in ["stm"]: - re_board_chip = re.compile(r"MCU_SERIES\s*=\s*(\w+)") - chip_keyword = "MCU_SERIES" - - port_dir = "ports/{}".format(port) - - port_config_contents = "" - with open(os.path.join(port_dir, "mpconfigport.mk")) as port_config: - port_config_contents = port_config.readlines() - port_config = parse_port_config(port_config_contents, chip_keyword) - - for entry in os.scandir(os.path.join(port_dir, "boards")): - if not entry.is_dir(): - continue - - contents = "" - board_dir = os.path.join(entry.path, "mpconfigboard.mk") - with open(board_dir) as board: - contents = board.read() - - board_chip = re_board_chip.search(contents) - if not board_chip: - board_chip = "Unknown Chip" - else: - #print(entry.name, board_chip.group(1)) - board_chip = board_chip.group(1) - - # add port_config results to contents - contents += "\n" + "\n".join(port_config["all"]) - if board_chip in port_config: - contents += "\n" + "\n".join(port_config[board_chip]) - - check_dependent_modules = dict() - for module in modules: - board_is_excluded = False - # check if board turns off `FULL_BUILD`. if yes, and current - # module is marked as `FULL_BUILD`, board is excluded - small_build = re.search("CIRCUITPY_FULL_BUILD = 0", contents) - if small_build and base[module]["full_build"] == "1": - board_is_excluded = True - # check if module is specifically disabled for this board - re_pattern = r"CIRCUITPY_{}\s=\s(\w)".format(module.upper()) - find_module = re.search(re_pattern, contents) - if not find_module: - if base[module]["default_value"].isdigit(): - # check if default inclusion is off ('0'). if the board doesn't - # have it explicitly enabled, its excluded. - if base[module]["default_value"] == "0": - board_is_excluded = True - else: - # this module is dependent on another module. add it - # to the list to check after processing all other modules. - # only need to check exclusion if it isn't already excluded. - if (not board_is_excluded and - base[module]["default_value"] not in [ - "None", - "CIRCUITPY_DEFAULT_BUILD" - ]): - check_dependent_modules[module] = base[module]["default_value"] - else: - board_is_excluded = find_module.group(1) == "0" - - if board_is_excluded: - if board_chip in base[module]["excluded"]: - base[module]["excluded"][board_chip].append(entry.name) - else: - base[module]["excluded"][board_chip] = [entry.name] - - for module in check_dependent_modules: - depend_results = set() - - parents = check_dependent_modules[module].split("CIRCUITPY_") - parents = [item.strip(", ").lower() for item in parents if item] - - for parent in parents: - if parent in base: - if (board_chip in base[parent]["excluded"] and - entry.name in base[parent]["excluded"][board_chip]): - depend_results.add(False) - else: - depend_results.add(True) - - # only exclude the module if there were zero parents enabled - # as determined by the 'depend_results' set. - if not any(depend_results): - if board_chip in base[module]["excluded"]: - base[module]["excluded"][board_chip].append(entry.name) - else: - base[module]["excluded"][board_chip] = [entry.name] - - #print(json.dumps(base, indent=2)) - return base - - -def support_matrix_excluded_boards(): - """ Compiles a list of available modules, and which board definitions - do not include them. - """ - base = build_module_map() - - return get_excluded_boards(base) + status, contents = subprocess.getstatusoutput(f"make -C {port_dir} BOARD={board_name} -qp") + # Make signals errors with exit status 2; 0 and 1 are "non-error" statuses + if status not in (0, 1): + raise RuntimeError(f'Invoking make exited with {status}') + if isinstance(contents, bytes): + contents = contents.decode('utf-8', errors='replace') + settings = {} + for line in contents.split('\n'): + m = re.match(r'^([A-Z][A-Z0-9_]*) = (.*)$', line) + if m: + settings[m.group(1)] = m.group(2) + return settings + +def lookup_setting(settings, key, default=''): + while True: + value = settings.get(key, default) + if not value.startswith('$'): + break + key = value[2:-1] + return value def support_matrix_by_board(): """ Compiles a list of the available core modules available for each board. """ base = build_module_map() - base_with_exclusions = get_excluded_boards(base) boards = dict() for port in SUPPORTED_PORTS: + # each port appears to use its own define for the chipset + if port in ["atmel-samd"]: + chip_keyword = "CHIP_FAMILY" + elif port in ["nrf"]: + chip_keyword = "MCU_VARIANT" + elif port in ["stm"]: + chip_keyword = "MCU_SERIES" + port_dir = "ports/{}/boards".format(port) for entry in os.scandir(port_dir): if not entry.is_dir(): continue board_modules = [] - board_name = entry.name - board_contents = "" + settings = get_settings_from_makefile(f'ports/{port}', entry.name) + + board_chip = lookup_setting(settings, chip_keyword, 'Unknown Chip') + with open(os.path.join(entry.path, "mpconfigboard.h")) as get_name: board_contents = get_name.read() board_name_re = re.search("(?<=MICROPY_HW_BOARD_NAME)\s+(.+)", @@ -267,18 +144,15 @@ def support_matrix_by_board(): if board_name_re: board_name = board_name_re.group(1).strip('"') - for module in base_with_exclusions.keys(): - #print(module) - board_has_module = True - if base_with_exclusions[module]["excluded"]: - for port in base_with_exclusions[module]["excluded"].values(): - #print(port) - if entry.name in port: - board_has_module = False - - if board_has_module: - board_modules.append(base_with_exclusions[module]["name"]) + board_modules = [] + for module in base: + key = f'CIRCUITPY_{module.upper()}' + if int(lookup_setting(settings, key, '0')): + board_modules.append(base[module]['name']) boards[board_name] = sorted(board_modules) #print(json.dumps(boards, indent=2)) return boards + +if __name__ == '__main__': + print(json.dumps(support_matrix_by_board(), indent=2)) -- cgit v1.2.3 From 894bb3c003a5f34adc54c4ce7d8a1d95e41c87c5 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 25 May 2020 09:58:57 -0500 Subject: Add esp32s2, litex to SUPPORTED_PORTS, sort it --- docs/shared_bindings_matrix.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index e48c71813..10423d87d 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -28,7 +28,7 @@ import subprocess import sys -SUPPORTED_PORTS = ["atmel-samd", "nrf", "stm", "mimxrt10xx"] +SUPPORTED_PORTS = ['atmel-samd', 'esp32s2', 'litex', 'mimxrt10xx', 'nrf', 'stm'] def get_shared_bindings(): """ Get a list of modules in shared-bindings based on folder names -- cgit v1.2.3 From 76149ebf570a108f4b09c3624129fd1b2c7e26ad Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 25 May 2020 09:59:13 -0500 Subject: Remove board_chip logic Not sure why I moved it, the computed value is never required --- docs/shared_bindings_matrix.py | 9 --------- 1 file changed, 9 deletions(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index 10423d87d..7768296a1 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -119,13 +119,6 @@ def support_matrix_by_board(): boards = dict() for port in SUPPORTED_PORTS: - # each port appears to use its own define for the chipset - if port in ["atmel-samd"]: - chip_keyword = "CHIP_FAMILY" - elif port in ["nrf"]: - chip_keyword = "MCU_VARIANT" - elif port in ["stm"]: - chip_keyword = "MCU_SERIES" port_dir = "ports/{}/boards".format(port) for entry in os.scandir(port_dir): @@ -135,8 +128,6 @@ def support_matrix_by_board(): settings = get_settings_from_makefile(f'ports/{port}', entry.name) - board_chip = lookup_setting(settings, chip_keyword, 'Unknown Chip') - with open(os.path.join(entry.path, "mpconfigboard.h")) as get_name: board_contents = get_name.read() board_name_re = re.search("(?<=MICROPY_HW_BOARD_NAME)\s+(.+)", -- cgit v1.2.3 From 8f81beea7e83b33664d5ab6fc5e210723b10bb04 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 25 May 2020 13:46:30 -0500 Subject: shared_bindings_matrix: Use a trivial target Sommersoft noticed that without submodules (as RTD currently does), the "make -qp" failed due to trying to find files within submodules. The "print-VAR" target doesn't have any dependencies, so it sidesteps the problem. If we move ulab's pyi files into the submodule, though, we'll need to fetch submodules anyway during doc building. --- docs/shared_bindings_matrix.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index 7768296a1..0c838fedb 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -90,7 +90,7 @@ def get_settings_from_makefile(port_dir, board_name): in this script, something that has proved error-prone """ - status, contents = subprocess.getstatusoutput(f"make -C {port_dir} BOARD={board_name} -qp") + status, contents = subprocess.getstatusoutput(f"make -C {port_dir} BOARD={board_name} -qp print-CC") # Make signals errors with exit status 2; 0 and 1 are "non-error" statuses if status not in (0, 1): raise RuntimeError(f'Invoking make exited with {status}') -- cgit v1.2.3 From 9966bf86da6abcc6a43b3415737dcf0284f9e998 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 26 May 2020 09:55:23 -0500 Subject: shared_bindings_matrix: sommersoft's suggestions --- docs/shared_bindings_matrix.py | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) (limited to 'docs/shared_bindings_matrix.py') diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index 0c838fedb..02ef68349 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -89,18 +89,27 @@ def get_settings_from_makefile(port_dir, board_name): into account, without having to re-encode the logic that sets them in this script, something that has proved error-prone """ - - status, contents = subprocess.getstatusoutput(f"make -C {port_dir} BOARD={board_name} -qp print-CC") + contents = subprocess.run( + ["make", "-C", port_dir, f"BOARD={board_name}", "-qp", "print-CC"], + encoding="utf-8", + errors="replace", + stdout=subprocess.PIPE, + stderr=subprocess.PIPE + ) # Make signals errors with exit status 2; 0 and 1 are "non-error" statuses - if status not in (0, 1): - raise RuntimeError(f'Invoking make exited with {status}') - if isinstance(contents, bytes): - contents = contents.decode('utf-8', errors='replace') + if contents.returncode not in (0, 1): + error_msg = ( + f"Invoking '{' '.join(contents.args)}' exited with " + f"{contents.returncode}: {contents.stderr}" + ) + raise RuntimeError(error_msg) + settings = {} - for line in contents.split('\n'): + for line in contents.stdout.split('\n'): m = re.match(r'^([A-Z][A-Z0-9_]*) = (.*)$', line) if m: settings[m.group(1)] = m.group(2) + return settings def lookup_setting(settings, key, default=''): -- cgit v1.2.3