From 539502c891c163205d11e116928078d792bfa152 Mon Sep 17 00:00:00 2001 From: Chris Osterwood Date: Thu, 4 Jul 2019 13:22:36 -0400 Subject: Remove pin reservations. Prevents used from inside of CircuitPython code --- ports/atmel-samd/boards/capablerobot_usbhub/board.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/capablerobot_usbhub/board.c b/ports/atmel-samd/boards/capablerobot_usbhub/board.c index 9a19e02d1..46385f094 100644 --- a/ports/atmel-samd/boards/capablerobot_usbhub/board.c +++ b/ports/atmel-samd/boards/capablerobot_usbhub/board.c @@ -30,13 +30,6 @@ #include "common-hal/microcontroller/Pin.h" void board_init(void) { - // Don't reset: - // - USB Host Enable Pin - // - reset pin of the USB Hub - // - // If either are reset, USB devices will disconnect when the MCU restarts - never_reset_pin_number(PIN_PA07); - never_reset_pin_number(PIN_PB08); } bool board_requests_safe_mode(void) { -- cgit v1.2.3 From 97e7fea517cef72926ac4e8d30c711a59226f259 Mon Sep 17 00:00:00 2001 From: Chris Osterwood Date: Thu, 4 Jul 2019 13:23:57 -0400 Subject: Change pin names to be more descriptive --- ports/atmel-samd/boards/capablerobot_usbhub/pins.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/capablerobot_usbhub/pins.c b/ports/atmel-samd/boards/capablerobot_usbhub/pins.c index 1fde60940..31df7000f 100644 --- a/ports/atmel-samd/boards/capablerobot_usbhub/pins.c +++ b/ports/atmel-samd/boards/capablerobot_usbhub/pins.c @@ -17,8 +17,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA16) }, { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA17) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_USBHEN), MP_ROM_PTR(&pin_PA07) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_USBRST), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_USBHOSTEN), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_USBRESET), MP_ROM_PTR(&pin_PB08) }, { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, -- cgit v1.2.3 From d5658860aa5427717c3aecfc631a39ce3a892da1 Mon Sep 17 00:00:00 2001 From: Chris Osterwood Date: Thu, 8 Aug 2019 14:39:50 -0400 Subject: Added pin definition for battery change enable. Pin used to switch in a 10 ohm resistor during Hub reset & strapping. --- ports/atmel-samd/boards/capablerobot_usbhub/pins.c | 1 + 1 file changed, 1 insertion(+) (limited to 'ports') diff --git a/ports/atmel-samd/boards/capablerobot_usbhub/pins.c b/ports/atmel-samd/boards/capablerobot_usbhub/pins.c index 31df7000f..b1966930c 100644 --- a/ports/atmel-samd/boards/capablerobot_usbhub/pins.c +++ b/ports/atmel-samd/boards/capablerobot_usbhub/pins.c @@ -19,6 +19,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_USBHOSTEN), MP_ROM_PTR(&pin_PA07) }, { MP_OBJ_NEW_QSTR(MP_QSTR_USBRESET), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_USBBCEN), MP_ROM_PTR(&pin_PB22) }, { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, -- cgit v1.2.3 From 137a4f8a5d21f5e37277031887a3908e6c4e371e Mon Sep 17 00:00:00 2001 From: Chris Osterwood Date: Mon, 7 Oct 2019 14:50:39 -0400 Subject: Added new flash SKU for production hardware --- ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.mk b/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.mk index 97c8eb863..8d57c9ccc 100644 --- a/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.mk +++ b/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.mk @@ -8,8 +8,8 @@ CHIP_VARIANT = SAMD51G19A CHIP_FAMILY = samd51 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICE_COUNT = 1 -EXTERNAL_FLASH_DEVICES = GD25Q16C +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "GD25Q16C, W25Q16JV_IQ" LONGINT_IMPL = MPZ # No I2S on SAMD51G -- cgit v1.2.3 From b3d7467719ad432614efd725f937f70cdf444cd3 Mon Sep 17 00:00:00 2001 From: ndgarage Date: Tue, 19 Nov 2019 14:52:09 -0700 Subject: add-ndbit6 --- .github/workflows/build.yml | 1 + ports/atmel-samd/boards/ndbit6/board.c | 39 ++++++++++++++++++++++++ ports/atmel-samd/boards/ndbit6/mpconfigboard.h | 36 ++++++++++++++++++++++ ports/atmel-samd/boards/ndbit6/mpconfigboard.mk | 17 +++++++++++ ports/atmel-samd/boards/ndbit6/pins.c | 40 +++++++++++++++++++++++++ 5 files changed, 133 insertions(+) create mode 100644 ports/atmel-samd/boards/ndbit6/board.c create mode 100644 ports/atmel-samd/boards/ndbit6/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/ndbit6/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/ndbit6/pins.c (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 10c34355d..3356b6842 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -121,6 +121,7 @@ jobs: - "metro_nrf52840_express" - "mini_sam_m4" - "monster_m4sk" + - "ndbit6" - "particle_argon" - "particle_boron" - "particle_xenon" diff --git a/ports/atmel-samd/boards/ndbit6/board.c b/ports/atmel-samd/boards/ndbit6/board.c new file mode 100644 index 000000000..0f60736a2 --- /dev/null +++ b/ports/atmel-samd/boards/ndbit6/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/ndbit6/mpconfigboard.h b/ports/atmel-samd/boards/ndbit6/mpconfigboard.h new file mode 100644 index 000000000..98c64def7 --- /dev/null +++ b/ports/atmel-samd/boards/ndbit6/mpconfigboard.h @@ -0,0 +1,36 @@ +#define MICROPY_HW_BOARD_NAME "NDBit6" +#define MICROPY_HW_MCU_NAME "samd21e18" + +// LED status +#define MICROPY_HW_LED_STATUS (&pin_PA23) + +// These are pins not to reset. +//#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01) +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code. +#define CIRCUITPY_INTERNAL_NVM_SIZE 256 + +#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA17) +#define DEFAULT_I2C_BUS_SDA (&pin_PA16) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA16) +#define DEFAULT_SPI_BUS_MISO (&pin_PA18) + +#define DEFAULT_UART_BUS_RX (&pin_PA17) +#define DEFAULT_UART_BUS_TX (&pin_PA16) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + +// Not connected +//#define IGNORE_PIN_PA13 1 +//#define IGNORE_PIN_PA28 1 + diff --git a/ports/atmel-samd/boards/ndbit6/mpconfigboard.mk b/ports/atmel-samd/boards/ndbit6/mpconfigboard.mk new file mode 100644 index 000000000..484d61762 --- /dev/null +++ b/ports/atmel-samd/boards/ndbit6/mpconfigboard.mk @@ -0,0 +1,17 @@ +LD_FILE = boards/samd21x18-bootloader-crystalless.ld +USB_VID = 0x239A +USB_PID = 0x8066 +USB_PRODUCT = "ndbit6" +USB_MANUFACTURER = "ndGarage" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_GAMEPAD = 0 diff --git a/ports/atmel-samd/boards/ndbit6/pins.c b/ports/atmel-samd/boards/ndbit6/pins.c new file mode 100644 index 000000000..0bf686656 --- /dev/null +++ b/ports/atmel-samd/boards/ndbit6/pins.c @@ -0,0 +1,40 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_LED_R), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_LED_B), MP_ROM_PTR(&pin_PA23) }, + + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); + -- cgit v1.2.3 From d8d95d99984caa083a9f14754460065152eaa365 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 20 Nov 2019 15:55:13 -0500 Subject: Minor meowbit changes --- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 4 ++-- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index 67ddc885a..b2d53d999 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -26,8 +26,8 @@ //Micropython setup -#define MICROPY_HW_BOARD_NAME "Feather STM32F405 Express" -#define MICROPY_HW_MCU_NAME "STM32F405RG" +#define MICROPY_HW_BOARD_NAME "MEOWBIT" +#define MICROPY_HW_MCU_NAME "STM32F401xE" #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (0x4000) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index 5bad4e81f..7998e0452 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -11,9 +11,9 @@ LONGINT_IMPL = MPZ MCU_SERIES = m4 MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f405xx +MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 -CMSIS_MCU = STM32F405xx +CMSIS_MCU = STM32F401xE LD_FILE = boards/STM32F405.ld TEXT0_ADDR = 0x08000000 TEXT1_ADDR = 0x08010000 \ No newline at end of file -- cgit v1.2.3 From 00e953e86cb1871a29b3e4329c1de816f7a1d897 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 9 Dec 2019 12:28:25 -0500 Subject: delete old boards --- ports/stm32f4/boards/pyb_nano_v2/board.c | 39 -- ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h | 52 --- ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk | 19 - ports/stm32f4/boards/pyb_nano_v2/pins.c | 33 -- .../boards/pyb_nano_v2/stm32f4xx_hal_conf.h | 440 --------------------- ports/stm32f4/boards/stm32f411ce_blackpill/board.c | 39 -- .../boards/stm32f411ce_blackpill/mpconfigboard.h | 52 --- .../boards/stm32f411ce_blackpill/mpconfigboard.mk | 19 - ports/stm32f4/boards/stm32f411ce_blackpill/pins.c | 33 -- .../stm32f411ce_blackpill/stm32f4xx_hal_conf.h | 440 --------------------- 10 files changed, 1166 deletions(-) delete mode 100644 ports/stm32f4/boards/pyb_nano_v2/board.c delete mode 100644 ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h delete mode 100644 ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk delete mode 100644 ports/stm32f4/boards/pyb_nano_v2/pins.c delete mode 100644 ports/stm32f4/boards/pyb_nano_v2/stm32f4xx_hal_conf.h delete mode 100644 ports/stm32f4/boards/stm32f411ce_blackpill/board.c delete mode 100644 ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h delete mode 100644 ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk delete mode 100644 ports/stm32f4/boards/stm32f411ce_blackpill/pins.c delete mode 100644 ports/stm32f4/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h (limited to 'ports') diff --git a/ports/stm32f4/boards/pyb_nano_v2/board.c b/ports/stm32f4/boards/pyb_nano_v2/board.c deleted file mode 100644 index 82b0c506e..000000000 --- a/ports/stm32f4/boards/pyb_nano_v2/board.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "boards/board.h" -#include "mpconfigboard.h" - -void board_init(void) { -} - -bool board_requests_safe_mode(void) { - return false; -} - -void reset_board(void) { - -} diff --git a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h deleted file mode 100644 index 67ddc885a..000000000 --- a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Lucian Copeland for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -//Micropython setup - -#define MICROPY_HW_BOARD_NAME "Feather STM32F405 Express" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define FLASH_SIZE (0x100000) -#define FLASH_PAGE_SIZE (0x4000) - -#define AUTORESET_DELAY_MS 500 -#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) - -// On-board flash -#define SPI_FLASH_MOSI_PIN &pin_PB05 -#define SPI_FLASH_MISO_PIN &pin_PB04 -#define SPI_FLASH_SCK_PIN &pin_PB03 -#define SPI_FLASH_CS_PIN &pin_PA15 - -#define DEFAULT_I2C_BUS_SCL (&pin_PB06) -#define DEFAULT_I2C_BUS_SDA (&pin_PB07) - -#define DEFAULT_SPI_BUS_SCK (&pin_PB13) -#define DEFAULT_SPI_BUS_MOSI (&pin_PB15) -#define DEFAULT_SPI_BUS_MISO (&pin_PB14) - -#define DEFAULT_UART_BUS_RX (&pin_PB11) -#define DEFAULT_UART_BUS_TX (&pin_PB10) diff --git a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk deleted file mode 100644 index 5bad4e81f..000000000 --- a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk +++ /dev/null @@ -1,19 +0,0 @@ -USB_VID = 0x239A -USB_PID = 0x805A -USB_PRODUCT = "Feather STM32F405 Express" -USB_MANUFACTURER = "Adafruit Industries LLC" -USB_DEVICES = "CDC,MSC" - -SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICE_COUNT = 1 -EXTERNAL_FLASH_DEVICES = GD25Q16C -LONGINT_IMPL = MPZ - -MCU_SERIES = m4 -MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f405xx -MCU_PACKAGE = 64 -CMSIS_MCU = STM32F405xx -LD_FILE = boards/STM32F405.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08010000 \ No newline at end of file diff --git a/ports/stm32f4/boards/pyb_nano_v2/pins.c b/ports/stm32f4/boards/pyb_nano_v2/pins.c deleted file mode 100644 index 4aa1f362a..000000000 --- a/ports/stm32f4/boards/pyb_nano_v2/pins.c +++ /dev/null @@ -1,33 +0,0 @@ -#include "shared-bindings/board/__init__.h" - -STATIC const mp_rom_map_elem_t board_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC04) }, - { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC05) }, - - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC07) }, - { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PC06) }, - { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB08) }, - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB09) }, - { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PC03) }, - { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PC02) }, - { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PC01) }, - - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, - - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB13) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB14) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB15) }, - - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB10) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB11) }, - - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, -}; -MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm32f4/boards/pyb_nano_v2/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/pyb_nano_v2/stm32f4xx_hal_conf.h deleted file mode 100644 index 68a49b4ba..000000000 --- a/ports/stm32f4/boards/pyb_nano_v2/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,440 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf_template.h - * @author MCD Application Team - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32f4xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2017 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED - -#define HAL_ADC_MODULE_ENABLED -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_CAN_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -/* #define HAL_RNG_MODULE_ENABLED */ -/* #define HAL_RTC_MODULE_ENABLED */ -/* #define HAL_SAI_MODULE_ENABLED */ -/* #define HAL_SD_MODULE_ENABLED */ -/* #define HAL_MMC_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -#define HAL_USART_MODULE_ENABLED -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_DSI_MODULE_ENABLED */ -/* #define HAL_QSPI_MODULE_ENABLED */ -/* #define HAL_QSPI_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_FMPI2C_MODULE_ENABLED */ -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -/* #define HAL_DFSDM_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_EXTI_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_EXTI_MODULE_ENABLED -#define HAL_DMA_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -#define HAL_CORTEX_MODULE_ENABLED - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U -#define INSTRUCTION_CACHE_ENABLE 1U -#define DATA_CACHE_ENABLE 1U - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1U */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2U -#define MAC_ADDR1 0U -#define MAC_ADDR2 0U -#define MAC_ADDR3 0U -#define MAC_ADDR4 0U -#define MAC_ADDR5 0U - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848_PHY_ADDRESS Address*/ -#define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) - -#define PHY_READ_TO ((uint32_t)0x0000FFFFU) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ -#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ - -#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ - -/* ################## SPI peripheral configuration ########################## */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver -* Activated: CRC code is present inside driver -* Deactivated: CRC code cleaned from driver -*/ - -#define USE_SPI_CRC 0U - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_EXTI_MODULE_ENABLED - #include "stm32f4xx_hal_exti.h" -#endif /* HAL_EXTI_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_MMC_MODULE_ENABLED - #include "stm32f4xx_hal_mmc.h" -#endif /* HAL_MMC_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_DSI_MODULE_ENABLED - #include "stm32f4xx_hal_dsi.h" -#endif /* HAL_DSI_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f4xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_FMPI2C_MODULE_ENABLED - #include "stm32f4xx_hal_fmpi2c.h" -#endif /* HAL_FMPI2C_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f4xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32f4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/board.c b/ports/stm32f4/boards/stm32f411ce_blackpill/board.c deleted file mode 100644 index 82b0c506e..000000000 --- a/ports/stm32f4/boards/stm32f411ce_blackpill/board.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "boards/board.h" -#include "mpconfigboard.h" - -void board_init(void) { -} - -bool board_requests_safe_mode(void) { - return false; -} - -void reset_board(void) { - -} diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h deleted file mode 100644 index 67ddc885a..000000000 --- a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Lucian Copeland for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -//Micropython setup - -#define MICROPY_HW_BOARD_NAME "Feather STM32F405 Express" -#define MICROPY_HW_MCU_NAME "STM32F405RG" - -#define FLASH_SIZE (0x100000) -#define FLASH_PAGE_SIZE (0x4000) - -#define AUTORESET_DELAY_MS 500 -#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) - -// On-board flash -#define SPI_FLASH_MOSI_PIN &pin_PB05 -#define SPI_FLASH_MISO_PIN &pin_PB04 -#define SPI_FLASH_SCK_PIN &pin_PB03 -#define SPI_FLASH_CS_PIN &pin_PA15 - -#define DEFAULT_I2C_BUS_SCL (&pin_PB06) -#define DEFAULT_I2C_BUS_SDA (&pin_PB07) - -#define DEFAULT_SPI_BUS_SCK (&pin_PB13) -#define DEFAULT_SPI_BUS_MOSI (&pin_PB15) -#define DEFAULT_SPI_BUS_MISO (&pin_PB14) - -#define DEFAULT_UART_BUS_RX (&pin_PB11) -#define DEFAULT_UART_BUS_TX (&pin_PB10) diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk deleted file mode 100644 index 5bad4e81f..000000000 --- a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk +++ /dev/null @@ -1,19 +0,0 @@ -USB_VID = 0x239A -USB_PID = 0x805A -USB_PRODUCT = "Feather STM32F405 Express" -USB_MANUFACTURER = "Adafruit Industries LLC" -USB_DEVICES = "CDC,MSC" - -SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICE_COUNT = 1 -EXTERNAL_FLASH_DEVICES = GD25Q16C -LONGINT_IMPL = MPZ - -MCU_SERIES = m4 -MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f405xx -MCU_PACKAGE = 64 -CMSIS_MCU = STM32F405xx -LD_FILE = boards/STM32F405.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08010000 \ No newline at end of file diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c b/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c deleted file mode 100644 index 4aa1f362a..000000000 --- a/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c +++ /dev/null @@ -1,33 +0,0 @@ -#include "shared-bindings/board/__init__.h" - -STATIC const mp_rom_map_elem_t board_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC04) }, - { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC05) }, - - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC07) }, - { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PC06) }, - { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB08) }, - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB09) }, - { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PC03) }, - { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PC02) }, - { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PC01) }, - - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, - - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB13) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB14) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB15) }, - - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB10) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB11) }, - - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, -}; -MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h deleted file mode 100644 index 68a49b4ba..000000000 --- a/ports/stm32f4/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,440 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf_template.h - * @author MCD Application Team - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32f4xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2017 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED - -#define HAL_ADC_MODULE_ENABLED -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_CAN_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -/* #define HAL_RNG_MODULE_ENABLED */ -/* #define HAL_RTC_MODULE_ENABLED */ -/* #define HAL_SAI_MODULE_ENABLED */ -/* #define HAL_SD_MODULE_ENABLED */ -/* #define HAL_MMC_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -#define HAL_USART_MODULE_ENABLED -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_DSI_MODULE_ENABLED */ -/* #define HAL_QSPI_MODULE_ENABLED */ -/* #define HAL_QSPI_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_FMPI2C_MODULE_ENABLED */ -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -/* #define HAL_DFSDM_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_EXTI_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_EXTI_MODULE_ENABLED -#define HAL_DMA_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -#define HAL_CORTEX_MODULE_ENABLED - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U -#define INSTRUCTION_CACHE_ENABLE 1U -#define DATA_CACHE_ENABLE 1U - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1U */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2U -#define MAC_ADDR1 0U -#define MAC_ADDR2 0U -#define MAC_ADDR3 0U -#define MAC_ADDR4 0U -#define MAC_ADDR5 0U - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848_PHY_ADDRESS Address*/ -#define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) - -#define PHY_READ_TO ((uint32_t)0x0000FFFFU) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ -#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ - -#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ - -/* ################## SPI peripheral configuration ########################## */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver -* Activated: CRC code is present inside driver -* Deactivated: CRC code cleaned from driver -*/ - -#define USE_SPI_CRC 0U - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_EXTI_MODULE_ENABLED - #include "stm32f4xx_hal_exti.h" -#endif /* HAL_EXTI_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_MMC_MODULE_ENABLED - #include "stm32f4xx_hal_mmc.h" -#endif /* HAL_MMC_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_DSI_MODULE_ENABLED - #include "stm32f4xx_hal_dsi.h" -#endif /* HAL_DSI_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f4xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_FMPI2C_MODULE_ENABLED - #include "stm32f4xx_hal_fmpi2c.h" -#endif /* HAL_FMPI2C_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f4xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32f4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -- cgit v1.2.3 From e328e9c1063a42f1605d29a043063e16b74a7a32 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Tue, 10 Dec 2019 15:02:38 -0500 Subject: minor text changes --- ports/stm32f4/boards/meowbit_v121/pins.c | 22 ---------------------- 1 file changed, 22 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c index 4aa1f362a..169fbf274 100644 --- a/ports/stm32f4/boards/meowbit_v121/pins.c +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -2,29 +2,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC04) }, - { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC05) }, - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC07) }, - { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PC06) }, - { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB08) }, - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB09) }, - { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PC03) }, - { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PC02) }, - { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PC01) }, - - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, - - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB13) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB14) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB15) }, - - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB10) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB11) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, -- cgit v1.2.3 From 70d899d3540b39fa743c5f5aa81d5ab8b647b713 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 11 Dec 2019 17:58:21 -0500 Subject: WIP to successful USB test --- ports/stm32f4/Makefile | 2 +- ports/stm32f4/boards/STM32F401.ld | 106 +++++ ports/stm32f4/boards/STM32F401_boot.ld | 106 +++++ ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 20 +- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 12 +- ports/stm32f4/boards/meowbit_v121/pins.c | 8 +- ports/stm32f4/boards/startup_stm32f401xe.s | 448 +++++++++++++++++++++ .../stm32f4/common-hal/microcontroller/__init__.c | 4 +- ports/stm32f4/peripherals/stm32f4/pins.h | 8 +- .../peripherals/stm32f4/stm32f401xe/clocks.c | 2 +- .../stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c | 2 - ports/stm32f4/supervisor/port.c | 11 + 12 files changed, 694 insertions(+), 35 deletions(-) create mode 100644 ports/stm32f4/boards/STM32F401.ld create mode 100644 ports/stm32f4/boards/STM32F401_boot.ld create mode 100644 ports/stm32f4/boards/startup_stm32f401xe.s (limited to 'ports') diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index 2727ea954..3943944cc 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -22,7 +22,7 @@ # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN # THE SOFTWARE. -DEBUG = 1 +#DEBUG = 1 # Select the board to build for. ifeq ($(BOARD),) diff --git a/ports/stm32f4/boards/STM32F401.ld b/ports/stm32f4/boards/STM32F401.ld new file mode 100644 index 000000000..b3d772a78 --- /dev/null +++ b/ports/stm32f4/boards/STM32F401.ld @@ -0,0 +1,106 @@ +/* + GNU linker script for STM32F401 with bootloader (such as the Meowbit) +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K - 64K /* entire flash, sans bootloader */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 64K /* sector 4, 0-3 used by bootloader*/ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 /* more bootloader schnenaigans */ +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/STM32F401_boot.ld b/ports/stm32f4/boards/STM32F401_boot.ld new file mode 100644 index 000000000..7f582fdf9 --- /dev/null +++ b/ports/stm32f4/boards/STM32F401_boot.ld @@ -0,0 +1,106 @@ +/* + GNU linker script for STM32F401 with bootloader (such as the Meowbit) +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash, sans bootloader */ + FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4, 0-3 used by bootloader*/ + FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 /* more bootloader schnenaigans */ +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index b2d53d999..f2fe3ca80 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -29,24 +29,14 @@ #define MICROPY_HW_BOARD_NAME "MEOWBIT" #define MICROPY_HW_MCU_NAME "STM32F401xE" -#define FLASH_SIZE (0x100000) +#define FLASH_SIZE (0x80000) #define FLASH_PAGE_SIZE (0x4000) #define AUTORESET_DELAY_MS 500 #define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) // On-board flash -#define SPI_FLASH_MOSI_PIN &pin_PB05 -#define SPI_FLASH_MISO_PIN &pin_PB04 -#define SPI_FLASH_SCK_PIN &pin_PB03 -#define SPI_FLASH_CS_PIN &pin_PA15 - -#define DEFAULT_I2C_BUS_SCL (&pin_PB06) -#define DEFAULT_I2C_BUS_SDA (&pin_PB07) - -#define DEFAULT_SPI_BUS_SCK (&pin_PB13) -#define DEFAULT_SPI_BUS_MOSI (&pin_PB15) -#define DEFAULT_SPI_BUS_MISO (&pin_PB14) - -#define DEFAULT_UART_BUS_RX (&pin_PB11) -#define DEFAULT_UART_BUS_TX (&pin_PB10) +#define SPI_FLASH_MOSI_PIN (&pin_PB15) +#define SPI_FLASH_MISO_PIN (&pin_PB14) +#define SPI_FLASH_SCK_PIN (&pin_PB13) +#define SPI_FLASH_CS_PIN (&pin_PB01) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index 7998e0452..8b605975d 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -1,12 +1,12 @@ USB_VID = 0x239A USB_PID = 0x805A -USB_PRODUCT = "Feather STM32F405 Express" -USB_MANUFACTURER = "Adafruit Industries LLC" +USB_PRODUCT = "Meowbit" +USB_MANUFACTURER = "Kittenbot" USB_DEVICES = "CDC,MSC" SPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 -EXTERNAL_FLASH_DEVICES = GD25Q16C +EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ LONGINT_IMPL = MPZ MCU_SERIES = m4 @@ -14,6 +14,6 @@ MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE -LD_FILE = boards/STM32F405.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08010000 \ No newline at end of file +LD_FILE = boards/STM32F401.ld +TEXT0_ADDR = 0x08010000 +TEXT1_ADDR = 0x08020000 \ No newline at end of file diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c index 169fbf274..dc0003dd1 100644 --- a/ports/stm32f4/boards/meowbit_v121/pins.c +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -1,11 +1,7 @@ #include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) }, - - - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_PB05) } }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm32f4/boards/startup_stm32f401xe.s b/ports/stm32f4/boards/startup_stm32f401xe.s new file mode 100644 index 000000000..815ac1719 --- /dev/null +++ b/ports/stm32f4/boards/startup_stm32f401xe.s @@ -0,0 +1,448 @@ +/** + ****************************************************************************** + * @file startup_stm32f401xe.s + * @author MCD Application Team + * @brief STM32F401xExx Devices vector table for GCC based toolchains. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + /* bl __libc_init_array */ +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word 0 /* Reserved */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word 0 /* Reserved */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word FPU_IRQHandler /* FPU */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SPI4_IRQHandler /* SPI4 */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/ports/stm32f4/common-hal/microcontroller/__init__.c b/ports/stm32f4/common-hal/microcontroller/__init__.c index ffab5d1e5..b9a3c16e4 100644 --- a/ports/stm32f4/common-hal/microcontroller/__init__.c +++ b/ports/stm32f4/common-hal/microcontroller/__init__.c @@ -169,8 +169,8 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) }, #endif { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, -#if MCU_PACKAGE != 100 - { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, +#if (0) +// { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, #endif { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, diff --git a/ports/stm32f4/peripherals/stm32f4/pins.h b/ports/stm32f4/peripherals/stm32f4/pins.h index ced83562e..e6a32b64e 100644 --- a/ports/stm32f4/peripherals/stm32f4/pins.h +++ b/ports/stm32f4/peripherals/stm32f4/pins.h @@ -77,13 +77,17 @@ extern const mp_obj_type_t mcu_pin_type; #define NO_PIN 0xff // Choose based on chip -#ifdef STM32F412Zx -#include "stm32f412zx/pins.h" +#ifdef STM32F401xE +#include "stm32f401xe/pins.h" #endif #ifdef STM32F411xE #include "stm32f411xe/pins.h" #endif +#ifdef STM32F412Zx +#include "stm32f412zx/pins.h" +#endif #ifdef STM32F405xx #include "stm32f405xx/pins.h" #endif + #endif // __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PINS_H__ diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c index 883c252d5..53af29b3b 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c @@ -44,7 +44,7 @@ void stm32f4_peripherals_clocks_init(void) { RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLM = 12; RCC_OscInitStruct.PLL.PLLN = 336; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; RCC_OscInitStruct.PLL.PLLQ = 7; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c index 45dc8fc6f..28afee5d8 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c @@ -29,8 +29,6 @@ #include "common-hal/microcontroller/Pin.h" void stm32f4_peripherals_gpio_init(void) { - //Enable all GPIO for now - GPIO_InitTypeDef GPIO_InitStruct = {0}; /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOB_CLK_ENABLE(); diff --git a/ports/stm32f4/supervisor/port.c b/ports/stm32f4/supervisor/port.c index df5a70cd1..3962f6fa6 100644 --- a/ports/stm32f4/supervisor/port.c +++ b/ports/stm32f4/supervisor/port.c @@ -52,6 +52,17 @@ safe_mode_t port_init(void) { tick_init(); board_init(); + //Configure LED pins + GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, 0); + HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, 1); + return NO_SAFE_MODE; } -- cgit v1.2.3 From 9339903a30908fcf4f1e06dfa466d72761c62955 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Thu, 12 Dec 2019 13:24:46 -0500 Subject: Revert "delete old boards" This reverts commit 00e953e86cb1871a29b3e4329c1de816f7a1d897. --- ports/stm32f4/boards/pyb_nano_v2/board.c | 39 ++ ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h | 52 +++ ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk | 19 + ports/stm32f4/boards/pyb_nano_v2/pins.c | 33 ++ .../boards/pyb_nano_v2/stm32f4xx_hal_conf.h | 440 +++++++++++++++++++++ ports/stm32f4/boards/stm32f411ce_blackpill/board.c | 39 ++ .../boards/stm32f411ce_blackpill/mpconfigboard.h | 52 +++ .../boards/stm32f411ce_blackpill/mpconfigboard.mk | 19 + ports/stm32f4/boards/stm32f411ce_blackpill/pins.c | 33 ++ .../stm32f411ce_blackpill/stm32f4xx_hal_conf.h | 440 +++++++++++++++++++++ 10 files changed, 1166 insertions(+) create mode 100644 ports/stm32f4/boards/pyb_nano_v2/board.c create mode 100644 ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h create mode 100644 ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk create mode 100644 ports/stm32f4/boards/pyb_nano_v2/pins.c create mode 100644 ports/stm32f4/boards/pyb_nano_v2/stm32f4xx_hal_conf.h create mode 100644 ports/stm32f4/boards/stm32f411ce_blackpill/board.c create mode 100644 ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h create mode 100644 ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk create mode 100644 ports/stm32f4/boards/stm32f411ce_blackpill/pins.c create mode 100644 ports/stm32f4/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h (limited to 'ports') diff --git a/ports/stm32f4/boards/pyb_nano_v2/board.c b/ports/stm32f4/boards/pyb_nano_v2/board.c new file mode 100644 index 000000000..82b0c506e --- /dev/null +++ b/ports/stm32f4/boards/pyb_nano_v2/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h new file mode 100644 index 000000000..67ddc885a --- /dev/null +++ b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h @@ -0,0 +1,52 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "Feather STM32F405 Express" +#define MICROPY_HW_MCU_NAME "STM32F405RG" + +#define FLASH_SIZE (0x100000) +#define FLASH_PAGE_SIZE (0x4000) + +#define AUTORESET_DELAY_MS 500 +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) + +// On-board flash +#define SPI_FLASH_MOSI_PIN &pin_PB05 +#define SPI_FLASH_MISO_PIN &pin_PB04 +#define SPI_FLASH_SCK_PIN &pin_PB03 +#define SPI_FLASH_CS_PIN &pin_PA15 + +#define DEFAULT_I2C_BUS_SCL (&pin_PB06) +#define DEFAULT_I2C_BUS_SDA (&pin_PB07) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB15) +#define DEFAULT_SPI_BUS_MISO (&pin_PB14) + +#define DEFAULT_UART_BUS_RX (&pin_PB11) +#define DEFAULT_UART_BUS_TX (&pin_PB10) diff --git a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk new file mode 100644 index 000000000..5bad4e81f --- /dev/null +++ b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk @@ -0,0 +1,19 @@ +USB_VID = 0x239A +USB_PID = 0x805A +USB_PRODUCT = "Feather STM32F405 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" +USB_DEVICES = "CDC,MSC" + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C +LONGINT_IMPL = MPZ + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f405xx +MCU_PACKAGE = 64 +CMSIS_MCU = STM32F405xx +LD_FILE = boards/STM32F405.ld +TEXT0_ADDR = 0x08000000 +TEXT1_ADDR = 0x08010000 \ No newline at end of file diff --git a/ports/stm32f4/boards/pyb_nano_v2/pins.c b/ports/stm32f4/boards/pyb_nano_v2/pins.c new file mode 100644 index 000000000..4aa1f362a --- /dev/null +++ b/ports/stm32f4/boards/pyb_nano_v2/pins.c @@ -0,0 +1,33 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC05) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PC01) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB15) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB11) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm32f4/boards/pyb_nano_v2/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/pyb_nano_v2/stm32f4xx_hal_conf.h new file mode 100644 index 000000000..68a49b4ba --- /dev/null +++ b/ports/stm32f4/boards/pyb_nano_v2/stm32f4xx_hal_conf.h @@ -0,0 +1,440 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/board.c b/ports/stm32f4/boards/stm32f411ce_blackpill/board.c new file mode 100644 index 000000000..82b0c506e --- /dev/null +++ b/ports/stm32f4/boards/stm32f411ce_blackpill/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h new file mode 100644 index 000000000..67ddc885a --- /dev/null +++ b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h @@ -0,0 +1,52 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "Feather STM32F405 Express" +#define MICROPY_HW_MCU_NAME "STM32F405RG" + +#define FLASH_SIZE (0x100000) +#define FLASH_PAGE_SIZE (0x4000) + +#define AUTORESET_DELAY_MS 500 +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) + +// On-board flash +#define SPI_FLASH_MOSI_PIN &pin_PB05 +#define SPI_FLASH_MISO_PIN &pin_PB04 +#define SPI_FLASH_SCK_PIN &pin_PB03 +#define SPI_FLASH_CS_PIN &pin_PA15 + +#define DEFAULT_I2C_BUS_SCL (&pin_PB06) +#define DEFAULT_I2C_BUS_SDA (&pin_PB07) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB15) +#define DEFAULT_SPI_BUS_MISO (&pin_PB14) + +#define DEFAULT_UART_BUS_RX (&pin_PB11) +#define DEFAULT_UART_BUS_TX (&pin_PB10) diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk new file mode 100644 index 000000000..5bad4e81f --- /dev/null +++ b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk @@ -0,0 +1,19 @@ +USB_VID = 0x239A +USB_PID = 0x805A +USB_PRODUCT = "Feather STM32F405 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" +USB_DEVICES = "CDC,MSC" + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C +LONGINT_IMPL = MPZ + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f405xx +MCU_PACKAGE = 64 +CMSIS_MCU = STM32F405xx +LD_FILE = boards/STM32F405.ld +TEXT0_ADDR = 0x08000000 +TEXT1_ADDR = 0x08010000 \ No newline at end of file diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c b/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c new file mode 100644 index 000000000..4aa1f362a --- /dev/null +++ b/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c @@ -0,0 +1,33 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC05) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PC01) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB15) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB11) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h new file mode 100644 index 000000000..68a49b4ba --- /dev/null +++ b/ports/stm32f4/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h @@ -0,0 +1,440 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -- cgit v1.2.3 From 842f8b2d3dd3db3b29929840afcb9a23072a99b3 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Thu, 12 Dec 2019 16:27:32 -0500 Subject: Revert "Remove meowbit for now" This reverts commit 006182f4e867840266a0c3a669fc7938ef03a9fc. --- ports/stm32f4/boards/meowbit_v121/board.c | 39 ++ ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 52 +++ ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 19 + ports/stm32f4/boards/meowbit_v121/pins.c | 33 ++ .../boards/meowbit_v121/stm32f4xx_hal_conf.h | 440 +++++++++++++++++++++ 5 files changed, 583 insertions(+) create mode 100644 ports/stm32f4/boards/meowbit_v121/board.c create mode 100644 ports/stm32f4/boards/meowbit_v121/mpconfigboard.h create mode 100644 ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk create mode 100644 ports/stm32f4/boards/meowbit_v121/pins.c create mode 100644 ports/stm32f4/boards/meowbit_v121/stm32f4xx_hal_conf.h (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/board.c b/ports/stm32f4/boards/meowbit_v121/board.c new file mode 100644 index 000000000..82b0c506e --- /dev/null +++ b/ports/stm32f4/boards/meowbit_v121/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h new file mode 100644 index 000000000..67ddc885a --- /dev/null +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -0,0 +1,52 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "Feather STM32F405 Express" +#define MICROPY_HW_MCU_NAME "STM32F405RG" + +#define FLASH_SIZE (0x100000) +#define FLASH_PAGE_SIZE (0x4000) + +#define AUTORESET_DELAY_MS 500 +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) + +// On-board flash +#define SPI_FLASH_MOSI_PIN &pin_PB05 +#define SPI_FLASH_MISO_PIN &pin_PB04 +#define SPI_FLASH_SCK_PIN &pin_PB03 +#define SPI_FLASH_CS_PIN &pin_PA15 + +#define DEFAULT_I2C_BUS_SCL (&pin_PB06) +#define DEFAULT_I2C_BUS_SDA (&pin_PB07) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB15) +#define DEFAULT_SPI_BUS_MISO (&pin_PB14) + +#define DEFAULT_UART_BUS_RX (&pin_PB11) +#define DEFAULT_UART_BUS_TX (&pin_PB10) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk new file mode 100644 index 000000000..5bad4e81f --- /dev/null +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -0,0 +1,19 @@ +USB_VID = 0x239A +USB_PID = 0x805A +USB_PRODUCT = "Feather STM32F405 Express" +USB_MANUFACTURER = "Adafruit Industries LLC" +USB_DEVICES = "CDC,MSC" + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C +LONGINT_IMPL = MPZ + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f405xx +MCU_PACKAGE = 64 +CMSIS_MCU = STM32F405xx +LD_FILE = boards/STM32F405.ld +TEXT0_ADDR = 0x08000000 +TEXT1_ADDR = 0x08010000 \ No newline at end of file diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c new file mode 100644 index 000000000..4aa1f362a --- /dev/null +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -0,0 +1,33 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC05) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PC01) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB15) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB11) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm32f4/boards/meowbit_v121/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/meowbit_v121/stm32f4xx_hal_conf.h new file mode 100644 index 000000000..68a49b4ba --- /dev/null +++ b/ports/stm32f4/boards/meowbit_v121/stm32f4xx_hal_conf.h @@ -0,0 +1,440 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -- cgit v1.2.3 From 2be18a7b530149926d492f7b8d5c583849906964 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Thu, 12 Dec 2019 16:30:24 -0500 Subject: revert dumb thing --- ...board.h~parent of 352bd95f5... remove blackpill | 41 ++++++++++++++++++++++ ports/stm32f4/boards/stm32f411ce_blackpill/pins.c | 1 - 2 files changed, 41 insertions(+), 1 deletion(-) create mode 100644 ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h~parent of 352bd95f5... remove blackpill (limited to 'ports') diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h~parent of 352bd95f5... remove blackpill b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h~parent of 352bd95f5... remove blackpill new file mode 100644 index 000000000..8a482ce7d --- /dev/null +++ b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h~parent of 352bd95f5... remove blackpill @@ -0,0 +1,41 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "stm32f411ce-blackpill" +#define MICROPY_HW_MCU_NAME "STM32F411CE" + +#define FLASH_SIZE (0x80000) +#define FLASH_PAGE_SIZE (0x4000) + +#define BOARD_OSC_DIV 25 + +#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 + +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x2000 - 0xC000) + +#define AUTORESET_DELAY_MS 500 diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c b/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c index 5797a9762..aa9736fc4 100644 --- a/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c +++ b/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c @@ -34,7 +34,6 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_C15), MP_ROM_PTR(&pin_PC15) }, { MP_ROM_QSTR(MP_QSTR_C14), MP_ROM_PTR(&pin_PC14) }, { MP_ROM_QSTR(MP_QSTR_C13), MP_ROM_PTR(&pin_PC13) }, - { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PC13) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From 7e0719117bca20ab4345504d888aa5638abdb98c Mon Sep 17 00:00:00 2001 From: Hierophect Date: Thu, 12 Dec 2019 16:32:33 -0500 Subject: Revert "remove F401 additions to streamline" This reverts commit 12737e282152d7bed7dac540029af9dd5b423ec6. --- ports/stm32f4/peripherals/stm32f4/periph.h | 6 + .../peripherals/stm32f4/stm32f401xe/clocks.c | 61 ++++++++ .../stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c | 54 +++++++ .../peripherals/stm32f4/stm32f401xe/periph.c | 172 +++++++++++++++++++++ .../peripherals/stm32f4/stm32f401xe/periph.h | 57 +++++++ .../stm32f4/peripherals/stm32f4/stm32f401xe/pins.c | 123 +++++++++++++++ .../stm32f4/peripherals/stm32f4/stm32f401xe/pins.h | 121 +++++++++++++++ 7 files changed, 594 insertions(+) create mode 100644 ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c create mode 100644 ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c create mode 100644 ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.c create mode 100644 ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.h create mode 100644 ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.c create mode 100644 ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.h (limited to 'ports') diff --git a/ports/stm32f4/peripherals/stm32f4/periph.h b/ports/stm32f4/peripherals/stm32f4/periph.h index 0d1374e85..ac98b8932 100644 --- a/ports/stm32f4/peripherals/stm32f4/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/periph.h @@ -140,6 +140,12 @@ typedef struct { //Starter Lines +#ifdef STM32F401xE +#define HAS_DAC 0 +#define HAS_TRNG 0 +#include "stm32f401xe/periph.h" +#endif + #ifdef STM32F411xE #define HAS_DAC 0 #define HAS_TRNG 0 diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c new file mode 100644 index 000000000..883c252d5 --- /dev/null +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c @@ -0,0 +1,61 @@ + +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "stm32f4xx_hal.h" + +void stm32f4_peripherals_clocks_init(void) { + //System clock init + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + + /* Enable Power Control clock */ + __HAL_RCC_PWR_CLK_ENABLE(); + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + + /* Enable HSE Oscillator and activate PLL with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; + RCC_OscInitStruct.PLL.PLLQ = 7; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3); +} diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c new file mode 100644 index 000000000..45dc8fc6f --- /dev/null +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c @@ -0,0 +1,54 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "stm32f4xx_hal.h" +#include "stm32f4/gpio.h" +#include "common-hal/microcontroller/Pin.h" + +void stm32f4_peripherals_gpio_init(void) { + //Enable all GPIO for now + GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + __HAL_RCC_GPIOE_CLK_ENABLE(); + __HAL_RCC_GPIOH_CLK_ENABLE(); + + //Never reset pins + never_reset_pin_number(2,13); //PC13 anti tamp + never_reset_pin_number(2,14); //PC14 OSC32_IN + never_reset_pin_number(2,15); //PC15 OSC32_OUT + never_reset_pin_number(0,13); //PA13 SWDIO + never_reset_pin_number(0,14); //PA14 SWCLK +} + +//LEDs are inverted on F411 DISCO +void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) { +} + + diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.c new file mode 100644 index 000000000..859e9a1ad --- /dev/null +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.c @@ -0,0 +1,172 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" +#include "stm32f4/periph.h" + +// I2C + +I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; + +const mcu_i2c_sda_obj_t mcu_i2c_sda_list[5] = { + I2C_SDA(1, 4, &pin_PB07), + I2C_SDA(1, 4, &pin_PB09), + I2C_SDA(2, 9, &pin_PB03), + I2C_SDA(3, 4, &pin_PC09), + I2C_SDA(3, 9, &pin_PB04), +}; + +const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { + I2C_SCL(1, 4, &pin_PB06), + I2C_SCL(1, 4, &pin_PB08), + I2C_SCL(2, 4, &pin_PB10), + I2C_SCL(3, 4, &pin_PA08) +}; + +// SPI + +SPI_TypeDef * mcu_spi_banks[4] = {SPI1, SPI2, SPI3, SPI4}; + +const mcu_spi_sck_obj_t mcu_spi_sck_list[9] = { + SPI(1, 5, &pin_PA05), + SPI(1, 5, &pin_PB03), + SPI(2, 5, &pin_PB10), + SPI(2, 5, &pin_PB13), + SPI(2, 5, &pin_PD03), + SPI(3, 6, &pin_PB03), + SPI(3, 6, &pin_PC10), + SPI(4, 5, &pin_PE02), + SPI(4, 5, &pin_PE12), +}; + +const mcu_spi_mosi_obj_t mcu_spi_mosi_list[9] = { + SPI(1, 5, &pin_PA07), + SPI(1, 5, &pin_PB05), + SPI(2, 5, &pin_PB15), + SPI(2, 5, &pin_PC03), + SPI(3, 6, &pin_PB05), + SPI(3, 6, &pin_PC12), + SPI(3, 5, &pin_PD06), + SPI(4, 5, &pin_PE06), + SPI(4, 5, &pin_PE14), +}; + +const mcu_spi_miso_obj_t mcu_spi_miso_list[8] = { + SPI(1, 5, &pin_PA06), + SPI(1, 5, &pin_PB04), + SPI(2, 5, &pin_PB14), + SPI(2, 5, &pin_PC02), + SPI(3, 6, &pin_PB04), + SPI(3, 6, &pin_PC11), + SPI(4, 5, &pin_PE05), + SPI(4, 5, &pin_PE13), +}; + +const mcu_spi_nss_obj_t mcu_spi_nss_list[9] = { + SPI(1, 5, &pin_PA04), + SPI(1, 5, &pin_PA15), + SPI(2, 5, &pin_PB09), + SPI(2, 5, &pin_PB12), + SPI(3, 6, &pin_PA04), + SPI(3, 6, &pin_PA15), + SPI(4, 6, &pin_PB12), + SPI(4, 5, &pin_PE04), + SPI(4, 5, &pin_PE11), +}; + +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, NULL, NULL, NULL, USART6}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, false, false, false, true}; + +const mcu_uart_tx_obj_t mcu_uart_tx_list[6] = { + UART(2, 7, &pin_PA02), + UART(1, 7, &pin_PA09), + UART(6, 8, &pin_PA11), + UART(1, 7, &pin_PB06), + UART(6, 8, &pin_PC06), + UART(2, 7, &pin_PD05), +}; + +const mcu_uart_rx_obj_t mcu_uart_rx_list[6] = { + UART(2, 7, &pin_PA03), + UART(1, 7, &pin_PA10), + UART(6, 8, &pin_PA12), + UART(1, 7, &pin_PB07), + UART(6, 8, &pin_PC07), + UART(2, 7, &pin_PD06), +}; + +//Timers +//TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins +TIM_TypeDef * mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, NULL, TIM9, TIM10, + TIM11, NULL, NULL, NULL}; + +const mcu_tim_pin_obj_t mcu_tim_pin_list[44] = { + TIM(2,1,1,&pin_PA00), + TIM(5,2,1,&pin_PA00), + TIM(2,1,2,&pin_PA01), + TIM(5,2,2,&pin_PA01), + TIM(2,1,3,&pin_PA02), + TIM(5,2,3,&pin_PA02), + TIM(2,1,4,&pin_PA03), + TIM(5,2,4,&pin_PA03), + TIM(9,3,1,&pin_PA02), + TIM(9,3,2,&pin_PA03), + TIM(3,2,1,&pin_PA06), + TIM(3,2,2,&pin_PA07), + TIM(1,1,1,&pin_PA08), + TIM(1,1,2,&pin_PA09), + TIM(1,1,3,&pin_PA10), + TIM(1,1,4,&pin_PA11), + TIM(2,1,1,&pin_PA15), + TIM(3,2,3,&pin_PB00), + TIM(3,2,4,&pin_PB01), + TIM(2,1,2,&pin_PB03), + TIM(3,2,1,&pin_PB04), + TIM(3,2,2,&pin_PB05), + TIM(4,2,1,&pin_PB06), + TIM(4,2,2,&pin_PB07), + TIM(4,2,3,&pin_PB08), + TIM(10,2,1,&pin_PB08), + TIM(4,2,4,&pin_PB09), + TIM(11,2,1,&pin_PB09), + TIM(2,1,3,&pin_PB10), + TIM(3,2,1,&pin_PC06), + TIM(3,2,2,&pin_PC07), + TIM(3,2,3,&pin_PC08), + TIM(3,2,4,&pin_PC09), + TIM(4,2,1,&pin_PD12), + TIM(4,2,2,&pin_PD13), + TIM(4,2,3,&pin_PD14), + TIM(4,2,4,&pin_PD15), + TIM(9,3,1,&pin_PE05), + TIM(9,3,2,&pin_PE06), + TIM(1,1,1,&pin_PE09), + TIM(1,1,2,&pin_PE11), + TIM(1,1,3,&pin_PE13), + TIM(1,1,4,&pin_PE14), +}; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.h new file mode 100644 index 000000000..7d3f4dca2 --- /dev/null +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.h @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H + +//I2C +extern I2C_TypeDef * mcu_i2c_banks[3]; + +extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[5]; +extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; + +//SPI +extern SPI_TypeDef * mcu_spi_banks[4]; + +extern const mcu_spi_sck_obj_t mcu_spi_sck_list[9]; +extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[9]; +extern const mcu_spi_miso_obj_t mcu_spi_miso_list[8]; +extern const mcu_spi_nss_obj_t mcu_spi_nss_list[9]; + +//UART +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; + +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[6]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[6]; + +//Timers +#define TIM_BANK_ARRAY_LEN 14 +#define TIM_PIN_ARRAY_LEN 44 +TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; +const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H \ No newline at end of file diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.c b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.c new file mode 100644 index 000000000..7e88c3dcb --- /dev/null +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.c @@ -0,0 +1,123 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" + +const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); +const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); +const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC); +const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC); +const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC); + +const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); //anti-tamp +const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); //OSC32_IN +const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT + +const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_1,10)); +const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_1,11)); +const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_1,12)); +const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_1,13)); + +const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_1,0)); +const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_1,1)); +const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_1,2)); +const mcu_pin_obj_t pin_PA03 = PIN(0, 3, ADC_INPUT(ADC_1,3)); +const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_1,4)); +const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_1,5)); +const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_1,6)); +const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_1,7)); + +const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_1,14)); +const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_1,15)); + +const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_1,8)); +const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_1,9)); +const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); + +const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC); +const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC); +const mcu_pin_obj_t pin_PE09 = PIN(4, 9, NO_ADC); +const mcu_pin_obj_t pin_PE10 = PIN(4, 10, NO_ADC); +const mcu_pin_obj_t pin_PE11 = PIN(4, 11, NO_ADC); +const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC); +const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC); +const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC); +const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC); + +const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC); +const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC); +const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC); +const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC); +const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC); + +const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC); +const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC); +const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC); +const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC); +const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC); +const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC); +const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC); +const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC); + +const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC); +const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC); +const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC); +const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC); + +const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC); +const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC); +const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC); +const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC); +const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC); +const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC); //SWDIO +const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC); //SWCLK +const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC); //JTDI + +const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC); +const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC); +const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC); + +const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC); +const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC); +const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC); +const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC); +const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC); +const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC); +const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC); +const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC); + +const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC); +const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC); +const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC); +const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC); +const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC); +const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC); +const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC); + +const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC); +const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC); \ No newline at end of file diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.h b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.h new file mode 100644 index 000000000..37d3a5cf1 --- /dev/null +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.h @@ -0,0 +1,121 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PINS_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PINS_H + +//Pins in datasheet order: DocID026289 Rev 7 page 38. LQFP100 only +//pg 38 +extern const mcu_pin_obj_t pin_PE02; +extern const mcu_pin_obj_t pin_PE03; +extern const mcu_pin_obj_t pin_PE04; +extern const mcu_pin_obj_t pin_PE05; +//pg 39 +extern const mcu_pin_obj_t pin_PE06; +extern const mcu_pin_obj_t pin_PC13; +extern const mcu_pin_obj_t pin_PC14; +extern const mcu_pin_obj_t pin_PC15; +extern const mcu_pin_obj_t pin_PC00; +extern const mcu_pin_obj_t pin_PC01; +extern const mcu_pin_obj_t pin_PC02; +extern const mcu_pin_obj_t pin_PC03; +//pg 40 +extern const mcu_pin_obj_t pin_PA00; +extern const mcu_pin_obj_t pin_PA01; +extern const mcu_pin_obj_t pin_PA02; +extern const mcu_pin_obj_t pin_PA03; +extern const mcu_pin_obj_t pin_PA04; +extern const mcu_pin_obj_t pin_PA05; +extern const mcu_pin_obj_t pin_PA06; +extern const mcu_pin_obj_t pin_PA07; +//pg 41 +extern const mcu_pin_obj_t pin_PC04; +extern const mcu_pin_obj_t pin_PC05; +extern const mcu_pin_obj_t pin_PB00; +extern const mcu_pin_obj_t pin_PB01; +extern const mcu_pin_obj_t pin_PB02; +extern const mcu_pin_obj_t pin_PE07; +extern const mcu_pin_obj_t pin_PE08; +extern const mcu_pin_obj_t pin_PE09; +extern const mcu_pin_obj_t pin_PE10; +extern const mcu_pin_obj_t pin_PE11; +extern const mcu_pin_obj_t pin_PE12; +extern const mcu_pin_obj_t pin_PE13; +extern const mcu_pin_obj_t pin_PE14; +extern const mcu_pin_obj_t pin_PE15; +//pg 42 +extern const mcu_pin_obj_t pin_PB10; +extern const mcu_pin_obj_t pin_PB12; +extern const mcu_pin_obj_t pin_PB13; +extern const mcu_pin_obj_t pin_PB14; +extern const mcu_pin_obj_t pin_PB15; +extern const mcu_pin_obj_t pin_PD08; +extern const mcu_pin_obj_t pin_PD09; +extern const mcu_pin_obj_t pin_PD10; +extern const mcu_pin_obj_t pin_PD11; +extern const mcu_pin_obj_t pin_PD12; +//pg 43 +extern const mcu_pin_obj_t pin_PD13; +extern const mcu_pin_obj_t pin_PD14; +extern const mcu_pin_obj_t pin_PD15; +extern const mcu_pin_obj_t pin_PC06; +extern const mcu_pin_obj_t pin_PC07; +extern const mcu_pin_obj_t pin_PC08; +extern const mcu_pin_obj_t pin_PC09; +extern const mcu_pin_obj_t pin_PA08; +extern const mcu_pin_obj_t pin_PA09; +//pg 44 +extern const mcu_pin_obj_t pin_PA10; +extern const mcu_pin_obj_t pin_PA11; +extern const mcu_pin_obj_t pin_PA12; +extern const mcu_pin_obj_t pin_PA13; +extern const mcu_pin_obj_t pin_PA14; +extern const mcu_pin_obj_t pin_PA15; +extern const mcu_pin_obj_t pin_PC10; +extern const mcu_pin_obj_t pin_PC11; +extern const mcu_pin_obj_t pin_PC12; +//pg 45 +extern const mcu_pin_obj_t pin_PD00; +extern const mcu_pin_obj_t pin_PD01; +extern const mcu_pin_obj_t pin_PD02; +extern const mcu_pin_obj_t pin_PD03; +extern const mcu_pin_obj_t pin_PD04; +extern const mcu_pin_obj_t pin_PD05; +extern const mcu_pin_obj_t pin_PD06; +extern const mcu_pin_obj_t pin_PD07; +extern const mcu_pin_obj_t pin_PB03; +extern const mcu_pin_obj_t pin_PB04; +extern const mcu_pin_obj_t pin_PB05; +extern const mcu_pin_obj_t pin_PB06; +//pg 46 +extern const mcu_pin_obj_t pin_PB07; +extern const mcu_pin_obj_t pin_PB08; +extern const mcu_pin_obj_t pin_PB09; +extern const mcu_pin_obj_t pin_PE00; +extern const mcu_pin_obj_t pin_PE01; + + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PINS_H -- cgit v1.2.3 From e4fb414b913c9a5f0cdaa3aa0b715595a88ac3a9 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Thu, 12 Dec 2019 17:17:29 -0500 Subject: clean up definitions post merge --- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 3 +++ ports/stm32f4/common-hal/microcontroller/__init__.c | 2 +- ports/stm32f4/supervisor/usb.c | 20 ++++++++++---------- 3 files changed, 14 insertions(+), 11 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index f2fe3ca80..eb526d0a7 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -35,6 +35,9 @@ #define AUTORESET_DELAY_MS 500 #define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) +#define BOARD_OSC_DIV 12 +#define BOARD_NO_VBUS + // On-board flash #define SPI_FLASH_MOSI_PIN (&pin_PB15) #define SPI_FLASH_MISO_PIN (&pin_PB14) diff --git a/ports/stm32f4/common-hal/microcontroller/__init__.c b/ports/stm32f4/common-hal/microcontroller/__init__.c index 16cc056c1..0c680eb05 100644 --- a/ports/stm32f4/common-hal/microcontroller/__init__.c +++ b/ports/stm32f4/common-hal/microcontroller/__init__.c @@ -169,7 +169,7 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) }, #endif { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, -#if MCU_PACKAGE == 144 +#if MCU_PACKAGE == 144 || defined STM32F405xx { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, #endif { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, diff --git a/ports/stm32f4/supervisor/usb.c b/ports/stm32f4/supervisor/usb.c index 6e9b233a4..3ebb74dc7 100644 --- a/ports/stm32f4/supervisor/usb.c +++ b/ports/stm32f4/supervisor/usb.c @@ -36,6 +36,16 @@ #include "common-hal/microcontroller/Pin.h" +STATIC void disable_usb_vbus(void) { +#ifdef USB_OTG_GCCFG_VBDEN + USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN; +#else + USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS; + USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN; + USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN; +#endif +} + void init_usb_hardware(void) { //TODO: if future chips overload this with options, move to peripherals management. @@ -89,13 +99,3 @@ void init_usb_hardware(void) { /* Peripheral clock enable */ __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); } - -STATIC void disable_usb_vbus(void) { -#ifdef USB_OTG_GCCFG_VBDEN - USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN; -#else - USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS; - USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN; - USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN; -#endif -} -- cgit v1.2.3 From 99c02b5afb9d79fa4e4c31067acca219f73ee4ff Mon Sep 17 00:00:00 2001 From: Hierophect Date: Thu, 12 Dec 2019 17:53:04 -0500 Subject: usb not working... --- ports/stm32f4/boards/meowbit_v121/pins.c | 11 ++++++++++- ports/stm32f4/supervisor/usb.c | 30 +++++++++++++++++++----------- 2 files changed, 29 insertions(+), 12 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c index dc0003dd1..3a26b232a 100644 --- a/ports/stm32f4/boards/meowbit_v121/pins.c +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -2,6 +2,15 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PB04) }, - { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_PB05) } + { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_PB05) }, + + // { MP_ROM_QSTR(MP_QSTR_LED_DISP_SCK), MP_ROM_PTR(&pin_PB13) }, + // { MP_ROM_QSTR(MP_QSTR_LED_DISP_MISO), MP_ROM_PTR(&pin_PB14) }, + // { MP_ROM_QSTR(MP_QSTR_LED_DISP_MOSI), MP_ROM_PTR(&pin_PB15) }, + // { MP_ROM_QSTR(MP_QSTR_LED_DISP_CS), MP_ROM_PTR(&pin_PB12) }, + // { MP_ROM_QSTR(MP_QSTR_LED_DISP_DC), MP_ROM_PTR(&pin_PA08) }, + // { MP_ROM_QSTR(MP_QSTR_LED_DISP_RST), MP_ROM_PTR(&pin_PB10) }, + // { MP_ROM_QSTR(MP_QSTR_LED_DISP_BL), MP_ROM_PTR(&pin_PB03) } + }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm32f4/supervisor/usb.c b/ports/stm32f4/supervisor/usb.c index 3ebb74dc7..483dddcfc 100644 --- a/ports/stm32f4/supervisor/usb.c +++ b/ports/stm32f4/supervisor/usb.c @@ -36,15 +36,15 @@ #include "common-hal/microcontroller/Pin.h" -STATIC void disable_usb_vbus(void) { -#ifdef USB_OTG_GCCFG_VBDEN - USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN; -#else - USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS; - USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN; - USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN; -#endif -} +// STATIC void disable_usb_vbus(void) { +// #ifdef USB_OTG_GCCFG_VBDEN +// USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN; +// #else +// USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS; +// USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN; +// USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN; +// #endif +// } void init_usb_hardware(void) { //TODO: if future chips overload this with options, move to peripherals management. @@ -92,8 +92,16 @@ void init_usb_hardware(void) { never_reset_pin_number(0, 8); #endif -#ifdef BOARD_NO_VBUS - disable_usb_vbus(); +// #ifdef BOARD_NO_VBUS +// disable_usb_vbus(); +// #endif + +#ifdef USB_OTG_GCCFG_VBDEN + USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN; +#else + USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS; + USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN; + USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN; #endif /* Peripheral clock enable */ -- cgit v1.2.3 From f136ef2b9137fa8586ff30e9fe704fccbbdcc198 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Tue, 17 Dec 2019 14:00:35 -0500 Subject: add most remaining pindefs --- ports/stm32f4/boards/meowbit_v121/pins.c | 61 ++++++++++++++++++++++++++++---- 1 file changed, 54 insertions(+), 7 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c index 3a26b232a..8a798dcb4 100644 --- a/ports/stm32f4/boards/meowbit_v121/pins.c +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -4,13 +4,60 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PB04) }, { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_PB05) }, - // { MP_ROM_QSTR(MP_QSTR_LED_DISP_SCK), MP_ROM_PTR(&pin_PB13) }, - // { MP_ROM_QSTR(MP_QSTR_LED_DISP_MISO), MP_ROM_PTR(&pin_PB14) }, - // { MP_ROM_QSTR(MP_QSTR_LED_DISP_MOSI), MP_ROM_PTR(&pin_PB15) }, - // { MP_ROM_QSTR(MP_QSTR_LED_DISP_CS), MP_ROM_PTR(&pin_PB12) }, - // { MP_ROM_QSTR(MP_QSTR_LED_DISP_DC), MP_ROM_PTR(&pin_PA08) }, - // { MP_ROM_QSTR(MP_QSTR_LED_DISP_RST), MP_ROM_PTR(&pin_PB10) }, - // { MP_ROM_QSTR(MP_QSTR_LED_DISP_BL), MP_ROM_PTR(&pin_PB03) } + { MP_ROM_QSTR(MP_QSTR_DISP_SCK), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_DISP_MISO), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_DISP_MOSI), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_DISP_CS), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_DISP_DC), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_DISP_RST), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_DISP_BL), MP_ROM_PTR(&pin_PB03) }, //what is this, backlight? + + { MP_ROM_QSTR(MP_QSTR_BUZZ), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_BTNA), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_BTNB), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_RIGHT), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_DOWN), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_LEFT), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_TEMP), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_UP), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_MENU), MP_ROM_PTR(&pin_PC15) }, + + { MP_ROM_QSTR(MP_QSTR_JACK_TX), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_JACK_PWREN), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_JACK_SND), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_ACC_INT), MP_ROM_PTR(&pin_PC14) }, + { MP_ROM_QSTR(MP_QSTR_ACC_SCL), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_ACC_SDA), MP_ROM_PTR(&pin_PB07) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, + // { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PC06) }, //these are wrong on Meowbit diagram. + // { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA03) }, //they cannot be used together (UART2 vs 6) + { MP_ROM_QSTR(MP_QSTR_NSS), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PC10) }, + + { MP_ROM_QSTR(MP_QSTR_P20), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_P19), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_P16), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_P15), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_P14), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_P13), MP_ROM_PTR(&pin_PC10) }, + { MP_ROM_QSTR(MP_QSTR_P2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_P12), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_P11), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_P10), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_P9), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_P8), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_P1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_P7), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_P6), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_P5), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_P4), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_P0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_PB00) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From ba19cd9ecb12c4f1771b8b5e56f46d0bb208dcd6 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Tue, 17 Dec 2019 17:33:49 -0500 Subject: Internal filesystem displayIO test --- ports/stm32f4/boards/STM32F401_fs.ld | 107 +++++++++++++++++++++ ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 8 +- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 13 ++- ports/stm32f4/supervisor/internal_flash.h | 5 + 4 files changed, 124 insertions(+), 9 deletions(-) create mode 100644 ports/stm32f4/boards/STM32F401_fs.ld (limited to 'ports') diff --git a/ports/stm32f4/boards/STM32F401_fs.ld b/ports/stm32f4/boards/STM32F401_fs.ld new file mode 100644 index 000000000..fd30e1622 --- /dev/null +++ b/ports/stm32f4/boards/STM32F401_fs.ld @@ -0,0 +1,107 @@ +/* + GNU linker script for STM32F401 with bootloader (such as the Meowbit) +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index eb526d0a7..89cdee6d9 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -39,7 +39,7 @@ #define BOARD_NO_VBUS // On-board flash -#define SPI_FLASH_MOSI_PIN (&pin_PB15) -#define SPI_FLASH_MISO_PIN (&pin_PB14) -#define SPI_FLASH_SCK_PIN (&pin_PB13) -#define SPI_FLASH_CS_PIN (&pin_PB01) +// #define SPI_FLASH_MOSI_PIN (&pin_PB15) +// #define SPI_FLASH_MISO_PIN (&pin_PB14) +// #define SPI_FLASH_SCK_PIN (&pin_PB13) +// #define SPI_FLASH_CS_PIN (&pin_PB01) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index 8b605975d..1642120e8 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -4,16 +4,19 @@ USB_PRODUCT = "Meowbit" USB_MANUFACTURER = "Kittenbot" USB_DEVICES = "CDC,MSC" -SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICE_COUNT = 1 -EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ -LONGINT_IMPL = MPZ +# SPI_FLASH_FILESYSTEM = 1 +# EXTERNAL_FLASH_DEVICE_COUNT = 1 +# EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ +# LONGINT_IMPL = MPZ + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE MCU_SERIES = m4 MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE -LD_FILE = boards/STM32F401.ld +LD_FILE = boards/STM32F401_fs.ld TEXT0_ADDR = 0x08010000 TEXT1_ADDR = 0x08020000 \ No newline at end of file diff --git a/ports/stm32f4/supervisor/internal_flash.h b/ports/stm32f4/supervisor/internal_flash.h index b6d26a07f..8991fb8aa 100644 --- a/ports/stm32f4/supervisor/internal_flash.h +++ b/ports/stm32f4/supervisor/internal_flash.h @@ -32,6 +32,11 @@ #include "py/mpconfig.h" +#ifdef STM32F401xE +#define STM32_FLASH_SIZE 0x80000 //512KiB +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB +#endif + #ifdef STM32F411xE #define STM32_FLASH_SIZE 0x80000 //512KiB #define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB -- cgit v1.2.3 From 3a5de7effd5713ce562ad4a84d81a53fb36bc61f Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 18 Dec 2019 14:46:12 -0500 Subject: Remove merge overflow --- ...board.h~parent of 352bd95f5... remove blackpill | 41 ---------------------- 1 file changed, 41 deletions(-) delete mode 100644 ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h~parent of 352bd95f5... remove blackpill (limited to 'ports') diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h~parent of 352bd95f5... remove blackpill b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h~parent of 352bd95f5... remove blackpill deleted file mode 100644 index 8a482ce7d..000000000 --- a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h~parent of 352bd95f5... remove blackpill +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Lucian Copeland for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -//Micropython setup - -#define MICROPY_HW_BOARD_NAME "stm32f411ce-blackpill" -#define MICROPY_HW_MCU_NAME "STM32F411CE" - -#define FLASH_SIZE (0x80000) -#define FLASH_PAGE_SIZE (0x4000) - -#define BOARD_OSC_DIV 25 - -#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 - -#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x2000 - 0xC000) - -#define AUTORESET_DELAY_MS 500 -- cgit v1.2.3 From 5b70fa0a64c076f8c1b894893d02fad49ad6bf5b Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 18 Dec 2019 15:40:08 -0500 Subject: enable internal SPI intercepts. can brick USB --- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 8 ++++---- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 14 +++++++------- ports/stm32f4/boards/meowbit_v121/pins.c | 2 ++ supervisor/spi_flash_api.h | 4 ++++ 4 files changed, 17 insertions(+), 11 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index 89cdee6d9..eb526d0a7 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -39,7 +39,7 @@ #define BOARD_NO_VBUS // On-board flash -// #define SPI_FLASH_MOSI_PIN (&pin_PB15) -// #define SPI_FLASH_MISO_PIN (&pin_PB14) -// #define SPI_FLASH_SCK_PIN (&pin_PB13) -// #define SPI_FLASH_CS_PIN (&pin_PB01) +#define SPI_FLASH_MOSI_PIN (&pin_PB15) +#define SPI_FLASH_MISO_PIN (&pin_PB14) +#define SPI_FLASH_SCK_PIN (&pin_PB13) +#define SPI_FLASH_CS_PIN (&pin_PB01) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index 1642120e8..20cad80a0 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -4,19 +4,19 @@ USB_PRODUCT = "Meowbit" USB_MANUFACTURER = "Kittenbot" USB_DEVICES = "CDC,MSC" -# SPI_FLASH_FILESYSTEM = 1 -# EXTERNAL_FLASH_DEVICE_COUNT = 1 -# EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ -# LONGINT_IMPL = MPZ +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ +LONGINT_IMPL = MPZ -INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE +# INTERNAL_FLASH_FILESYSTEM = 1 +# LONGINT_IMPL = NONE MCU_SERIES = m4 MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE -LD_FILE = boards/STM32F401_fs.ld +LD_FILE = boards/STM32F401.ld TEXT0_ADDR = 0x08010000 TEXT1_ADDR = 0x08020000 \ No newline at end of file diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c index 8a798dcb4..2d5f2e8fa 100644 --- a/ports/stm32f4/boards/meowbit_v121/pins.c +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -1,4 +1,5 @@ #include "shared-bindings/board/__init__.h" +#include "supervisor/spi_flash_api.h" STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PB04) }, @@ -59,5 +60,6 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0), MP_ROM_PTR(&pin_PA00) }, { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_INTERNAL_SPI), MP_ROM_PTR(&spi) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/supervisor/spi_flash_api.h b/supervisor/spi_flash_api.h index 28cccb1b1..b477308ba 100644 --- a/supervisor/spi_flash_api.h +++ b/supervisor/spi_flash_api.h @@ -31,6 +31,10 @@ #include "supervisor/shared/external_flash/devices.h" +#include "shared-bindings/busio/SPI.h" + +extern busio_spi_obj_t spi; //Used to share SPI bus on some boards + // This API is implemented for both normal SPI peripherals and QSPI peripherals. bool spi_flash_command(uint8_t command); -- cgit v1.2.3 From 902e2422376a454ba9e088e86dc81bce8509623d Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 18 Dec 2019 17:17:06 -0500 Subject: Revert "enable internal SPI intercepts. can brick USB" This reverts commit 5b70fa0a64c076f8c1b894893d02fad49ad6bf5b. --- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 8 ++++---- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 14 +++++++------- ports/stm32f4/boards/meowbit_v121/pins.c | 2 -- supervisor/spi_flash_api.h | 4 ---- 4 files changed, 11 insertions(+), 17 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index eb526d0a7..89cdee6d9 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -39,7 +39,7 @@ #define BOARD_NO_VBUS // On-board flash -#define SPI_FLASH_MOSI_PIN (&pin_PB15) -#define SPI_FLASH_MISO_PIN (&pin_PB14) -#define SPI_FLASH_SCK_PIN (&pin_PB13) -#define SPI_FLASH_CS_PIN (&pin_PB01) +// #define SPI_FLASH_MOSI_PIN (&pin_PB15) +// #define SPI_FLASH_MISO_PIN (&pin_PB14) +// #define SPI_FLASH_SCK_PIN (&pin_PB13) +// #define SPI_FLASH_CS_PIN (&pin_PB01) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index 20cad80a0..1642120e8 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -4,19 +4,19 @@ USB_PRODUCT = "Meowbit" USB_MANUFACTURER = "Kittenbot" USB_DEVICES = "CDC,MSC" -SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICE_COUNT = 1 -EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ -LONGINT_IMPL = MPZ +# SPI_FLASH_FILESYSTEM = 1 +# EXTERNAL_FLASH_DEVICE_COUNT = 1 +# EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ +# LONGINT_IMPL = MPZ -# INTERNAL_FLASH_FILESYSTEM = 1 -# LONGINT_IMPL = NONE +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE MCU_SERIES = m4 MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE -LD_FILE = boards/STM32F401.ld +LD_FILE = boards/STM32F401_fs.ld TEXT0_ADDR = 0x08010000 TEXT1_ADDR = 0x08020000 \ No newline at end of file diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c index 2d5f2e8fa..8a798dcb4 100644 --- a/ports/stm32f4/boards/meowbit_v121/pins.c +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -1,5 +1,4 @@ #include "shared-bindings/board/__init__.h" -#include "supervisor/spi_flash_api.h" STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PB04) }, @@ -60,6 +59,5 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0), MP_ROM_PTR(&pin_PA00) }, { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_PB00) }, - { MP_ROM_QSTR(MP_QSTR_INTERNAL_SPI), MP_ROM_PTR(&spi) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/supervisor/spi_flash_api.h b/supervisor/spi_flash_api.h index b477308ba..28cccb1b1 100644 --- a/supervisor/spi_flash_api.h +++ b/supervisor/spi_flash_api.h @@ -31,10 +31,6 @@ #include "supervisor/shared/external_flash/devices.h" -#include "shared-bindings/busio/SPI.h" - -extern busio_spi_obj_t spi; //Used to share SPI bus on some boards - // This API is implemented for both normal SPI peripherals and QSPI peripherals. bool spi_flash_command(uint8_t command); -- cgit v1.2.3 From 16688180c6be77dc93a5b8603b0d0fb760955f46 Mon Sep 17 00:00:00 2001 From: ndgarage Date: Thu, 19 Dec 2019 07:17:43 -0700 Subject: add-ndbit6 --- ports/atmel-samd/boards/ndbit6/mpconfigboard.h | 36 +++++++++----------- ports/atmel-samd/boards/ndbit6/mpconfigboard.mk | 8 ++--- ports/atmel-samd/boards/ndbit6/pins.c | 45 ++++++++++++------------- 3 files changed, 41 insertions(+), 48 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/ndbit6/mpconfigboard.h b/ports/atmel-samd/boards/ndbit6/mpconfigboard.h index 98c64def7..869f207a1 100644 --- a/ports/atmel-samd/boards/ndbit6/mpconfigboard.h +++ b/ports/atmel-samd/boards/ndbit6/mpconfigboard.h @@ -1,36 +1,32 @@ -#define MICROPY_HW_BOARD_NAME "NDBit6" +#define MICROPY_HW_BOARD_NAME "ndGarage[n°]Bit6:FeatherSnow" #define MICROPY_HW_MCU_NAME "samd21e18" -// LED status #define MICROPY_HW_LED_STATUS (&pin_PA23) -// These are pins not to reset. -//#define MICROPY_PORT_A (PORT_PA00 | PORT_PA01) -#define MICROPY_PORT_A (0) +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_MISO_PIN &pin_PA18 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA15 + +#define MICROPY_PORT_A (PORT_PA24 | PORT_PA25) #define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) -// If you change this, then make sure to update the linker scripts as well to -// make sure you don't overwrite code. #define CIRCUITPY_INTERNAL_NVM_SIZE 256 -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE) +#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000 CIRCUITPY_INTERNAL_NVM_SIZE) -#define DEFAULT_I2C_BUS_SCL (&pin_PA17) -#define DEFAULT_I2C_BUS_SDA (&pin_PA16) +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) -#define DEFAULT_SPI_BUS_SCK (&pin_PA17) -#define DEFAULT_SPI_BUS_MOSI (&pin_PA16) -#define DEFAULT_SPI_BUS_MISO (&pin_PA18) +#define DEFAULT_SPI_BUS_SCK (&pin_PA05) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA04) +#define DEFAULT_SPI_BUS_MISO (&pin_PA06) -#define DEFAULT_UART_BUS_RX (&pin_PA17) -#define DEFAULT_UART_BUS_TX (&pin_PA16) +#define DEFAULT_UART_BUS_RX (&pin_PA09) +#define DEFAULT_UART_BUS_TX (&pin_PA08) -// USB is always used internally so skip the pin objects for it. +// USB is always used. #define IGNORE_PIN_PA24 1 #define IGNORE_PIN_PA25 1 -// Not connected -//#define IGNORE_PIN_PA13 1 -//#define IGNORE_PIN_PA28 1 - diff --git a/ports/atmel-samd/boards/ndbit6/mpconfigboard.mk b/ports/atmel-samd/boards/ndbit6/mpconfigboard.mk index 484d61762..42840ac2a 100644 --- a/ports/atmel-samd/boards/ndbit6/mpconfigboard.mk +++ b/ports/atmel-samd/boards/ndbit6/mpconfigboard.mk @@ -1,7 +1,7 @@ -LD_FILE = boards/samd21x18-bootloader-crystalless.ld +LD_FILE = boards/samd21x18-bootloader.ld USB_VID = 0x239A USB_PID = 0x8066 -USB_PRODUCT = "ndbit6" +USB_PRODUCT = "ndBit6" USB_MANUFACTURER = "ndGarage" CHIP_VARIANT = SAMD21E18A @@ -12,6 +12,4 @@ LONGINT_IMPL = NONE CIRCUITPY_SMALL_BUILD = 1 SUPEROPT_GC = 0 -CIRCUITPY_AUDIOBUSIO = 0 -CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_GAMEPAD = 0 + diff --git a/ports/atmel-samd/boards/ndbit6/pins.c b/ports/atmel-samd/boards/ndbit6/pins.c index 0bf686656..6d1fc53b6 100644 --- a/ports/atmel-samd/boards/ndbit6/pins.c +++ b/ports/atmel-samd/boards/ndbit6/pins.c @@ -1,40 +1,39 @@ #include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA09) }, - - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA09) }, - - { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_PA19) }, - { MP_ROM_QSTR(MP_QSTR_LED_R), MP_ROM_PTR(&pin_PA22) }, - { MP_ROM_QSTR(MP_QSTR_LED_B), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA28) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PA02) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA04) }, { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) }, { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) }, - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA08) }, - - { MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_PA23) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); - -- cgit v1.2.3 From 5aa3e3eabb90bb9845204b2287e311d5923d30a5 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 24 Dec 2019 09:36:19 -0600 Subject: samd/peripherals: update --- ports/atmel-samd/peripherals | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals index 4c0deecf8..28ad937da 160000 --- a/ports/atmel-samd/peripherals +++ b/ports/atmel-samd/peripherals @@ -1 +1 @@ -Subproject commit 4c0deecf889da0074c1dbc9a5e2d24cb7c7a31c6 +Subproject commit 28ad937da258993359f0e91a4cb19db899a1e46a -- cgit v1.2.3 From 28b1d718a36e02af4d1a7d68e92da3c942848a47 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 30 Dec 2019 15:15:55 -0500 Subject: Tests for PWM issues, style changes --- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 2 +- ports/stm32f4/boards/meowbit_v121/pins.c | 2 +- ports/stm32f4/common-hal/pulseio/PWMOut.c | 5 +++++ ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.c | 1 + 4 files changed, 8 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index 89cdee6d9..e97d793be 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -36,7 +36,7 @@ #define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) #define BOARD_OSC_DIV 12 -#define BOARD_NO_VBUS +#define BOARD_NO_VBUS_SENSE // On-board flash // #define SPI_FLASH_MOSI_PIN (&pin_PB15) diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c index 8a798dcb4..7b896bd70 100644 --- a/ports/stm32f4/boards/meowbit_v121/pins.c +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -52,7 +52,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P9), MP_ROM_PTR(&pin_PC06) }, { MP_ROM_QSTR(MP_QSTR_P8), MP_ROM_PTR(&pin_PA04) }, { MP_ROM_QSTR(MP_QSTR_P1), MP_ROM_PTR(&pin_PA01) }, - { MP_ROM_QSTR(MP_QSTR_P7), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_P7), MP_ROM_PTR(&pin_PA10) }, //in use by USB { MP_ROM_QSTR(MP_QSTR_P6), MP_ROM_PTR(&pin_PC07) }, { MP_ROM_QSTR(MP_QSTR_P5), MP_ROM_PTR(&pin_PB05) }, { MP_ROM_QSTR(MP_QSTR_P4), MP_ROM_PTR(&pin_PC01) }, diff --git a/ports/stm32f4/common-hal/pulseio/PWMOut.c b/ports/stm32f4/common-hal/pulseio/PWMOut.c index 16b1b5b89..301f8cd49 100644 --- a/ports/stm32f4/common-hal/pulseio/PWMOut.c +++ b/ports/stm32f4/common-hal/pulseio/PWMOut.c @@ -124,6 +124,7 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, uint16_t duty, uint32_t frequency, bool variable_frequency) { + mp_printf(&mp_plat_print, "Construct PWM\n"); TIM_TypeDef * TIMx; uint8_t tim_num = sizeof(mcu_tim_pin_list)/sizeof(*mcu_tim_pin_list); bool tim_chan_taken = false; @@ -194,6 +195,8 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, GPIO_InitStruct.Alternate = self->tim->altfn_index; HAL_GPIO_Init(pin_port(pin->port), &GPIO_InitStruct); + mp_printf(&mp_plat_print, "PWM Pin:%d Port:%d\n", pin->number, pin->port); + tim_clock_enable(1<<(self->tim->tim_index - 1)); //translate channel into handle value @@ -203,6 +206,8 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, uint32_t period = 0; //period is 16 bit timer_get_optimal_divisors(&period, &prescaler,frequency,timer_get_source_freq(self->tim->tim_index)); + mp_printf(&mp_plat_print, "Per:%d presc:%d\n", period, prescaler); + //Timer init self->handle.Instance = TIMx; self->handle.Init.Period = period - 1; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.c index 859e9a1ad..b12084186 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.c @@ -125,6 +125,7 @@ const mcu_uart_rx_obj_t mcu_uart_rx_list[6] = { TIM_TypeDef * mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, NULL, TIM9, TIM10, TIM11, NULL, NULL, NULL}; +//#define TIM(index, alt, channel, tim_pin) const mcu_tim_pin_obj_t mcu_tim_pin_list[44] = { TIM(2,1,1,&pin_PA00), TIM(5,2,1,&pin_PA00), -- cgit v1.2.3 From bd8650d35be493bfbfef34976784d1d614b09ed1 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 2 Jan 2020 17:55:50 -0600 Subject: samd/peripherals: take upstream update --- ports/atmel-samd/peripherals | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals index 28ad937da..b89811f22 160000 --- a/ports/atmel-samd/peripherals +++ b/ports/atmel-samd/peripherals @@ -1 +1 @@ -Subproject commit 28ad937da258993359f0e91a4cb19db899a1e46a +Subproject commit b89811f22a24ac350079ceaf0cdf0e62aa03f4f4 -- cgit v1.2.3 From 242d572470b20a06c5b0be5e07a84aefaa4abbe1 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Fri, 3 Jan 2020 10:24:07 -0500 Subject: wip --- ports/atmel-samd/common-hal/nvm/ByteArray.c | 4 +- ports/nrf/common-hal/_bleio/Characteristic.c | 23 +++ ports/nrf/common-hal/_bleio/Connection.c | 53 ++++-- ports/nrf/common-hal/_bleio/Connection.h | 3 +- ports/nrf/common-hal/_bleio/bonding.c | 240 +++++++++++++++++++++++++++ ports/nrf/common-hal/_bleio/bonding.h | 43 +++++ ports/nrf/common-hal/nvm/ByteArray.c | 14 +- ports/nrf/peripherals/nrf/nvm.c | 6 + tools/preprocess_frozen_modules.py | 1 + 9 files changed, 359 insertions(+), 28 deletions(-) create mode 100644 ports/nrf/common-hal/_bleio/bonding.c create mode 100644 ports/nrf/common-hal/_bleio/bonding.h (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/nvm/ByteArray.c b/ports/atmel-samd/common-hal/nvm/ByteArray.c index 12a127f53..ac896a9d5 100644 --- a/ports/atmel-samd/common-hal/nvm/ByteArray.c +++ b/ports/atmel-samd/common-hal/nvm/ByteArray.c @@ -43,9 +43,9 @@ bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, // whenever we need it instead of storing it long term. struct flash_descriptor desc; desc.dev.hw = NVMCTRL; - flash_write(&desc, (uint32_t) self->start_address + start_index, values, len); + bool status = flash_write(&desc, (uint32_t) self->start_address + start_index, values, len) == ERR_NONE; assert_heap_ok(); - return true; + return status; } // NVM memory is memory mapped so reading it is easy. diff --git a/ports/nrf/common-hal/_bleio/Characteristic.c b/ports/nrf/common-hal/_bleio/Characteristic.c index 9f1255e32..f80c52ae4 100644 --- a/ports/nrf/common-hal/_bleio/Characteristic.c +++ b/ports/nrf/common-hal/_bleio/Characteristic.c @@ -82,6 +82,27 @@ STATIC void characteristic_gatts_notify_indicate(uint16_t handle, uint16_t conn_ } } +STATIC bool characteristic_on_ble_evt(ble_evt_t *ble_evt, void *param) { + bleio_characteristic_obj_t *self = (bleio_characteristic_obj_t *) param; + switch (ble_evt->header.evt_id) { + case BLE_GATTS_EVT_WRITE: { + // A client wrote to this server characteristic. + // If we are bonded, stored the CCCD value. + if (self->service != MP_OBJ_NULL) { + bleio_connection_obj_t *connection = self->service->connection; + uint16_t conn_handle = bleio_connection_get_conn_handle(connection); + if (conn_handle != BLE_CONN_HANDLE_INVALID && + connection->pairing_status == PAIR_PAIRED && + ble_evt->gatts_evt.params.write.handle == self->cccd_handle) { + bonding_save_cccd_later(connection->is_central, conn_handle, connection->ediv); + } + break; + } + } + + return true; +} + void common_hal_bleio_characteristic_construct(bleio_characteristic_obj_t *self, bleio_service_obj_t *service, uint16_t handle, bleio_uuid_obj_t *uuid, bleio_characteristic_properties_t props, bleio_attribute_security_mode_t read_perm, bleio_attribute_security_mode_t write_perm, mp_int_t max_length, bool fixed_length, mp_buffer_info_t *initial_value_bufinfo) { self->service = service; self->uuid = uuid; @@ -108,6 +129,8 @@ void common_hal_bleio_characteristic_construct(bleio_characteristic_obj_t *self, if (initial_value_bufinfo != NULL) { common_hal_bleio_characteristic_set_value(self, initial_value_bufinfo); } + + ble_drv_add_event_handler(characteristic_on_ble_evt, self); } bleio_descriptor_obj_t *common_hal_bleio_characteristic_get_descriptor_list(bleio_characteristic_obj_t *self) { diff --git a/ports/nrf/common-hal/_bleio/Connection.c b/ports/nrf/common-hal/_bleio/Connection.c index e0b50901a..725a9a11a 100644 --- a/ports/nrf/common-hal/_bleio/Connection.c +++ b/ports/nrf/common-hal/_bleio/Connection.c @@ -171,6 +171,15 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { break; } case BLE_GAP_EVT_SEC_PARAMS_REQUEST: { + // First time pairing. + // 1. Either we or peer initiate the process + // 2. Peer asks for security parameters using BLE_GAP_EVT_SEC_PARAMS_REQUEST. + // 3. Pair Key exchange ("just works" implemented now; TODO key pairing) + // 4. Connection is secured: BLE_GAP_EVT_CONN_SEC_UPDATE + // 5. Long-term Keys exchanged: BLE_GAP_EVT_AUTH_STATUS + + bonding_clear_keys(&self->bonding_keys); + self->ediv = EDIV_INVALID; ble_gap_sec_keyset_t keyset = { .keys_own = { .p_enc_key = &self->bonding_keys.own_enc, @@ -188,7 +197,8 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { }; sd_ble_gap_sec_params_reply(self->conn_handle, BLE_GAP_SEC_STATUS_SUCCESS, - &pairing_sec_params, &keyset); + self->is_central ? NULL : &pairing_sec_params, + &keyset); break; } @@ -202,8 +212,9 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { ble_gap_evt_auth_status_t* status = &ble_evt->evt.gap_evt.params.auth_status; self->sec_status = status->auth_status; if (status->auth_status == BLE_GAP_SEC_STATUS_SUCCESS) { - // TODO _ediv = bonding_keys->own_enc.master_id.ediv; + self->ediv = bonding_keys->own_enc.master_id.ediv; self->pair_status = PAIR_PAIRED; + bonding_save_keys(self->is_central, self->conn_handle, &self->bonding_keys); } else { self->pair_status = PAIR_NOT_PAIRED; } @@ -216,14 +227,17 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { // - Else return NULL --> Initiate key exchange ble_gap_evt_sec_info_request_t* sec_info_request = &ble_evt->evt.gap_evt.params.sec_info_request; (void) sec_info_request; - //if ( bond_load_keys(_role, sec_req->master_id.ediv, &bkeys) ) { - //sd_ble_gap_sec_info_reply(_conn_hdl, &bkeys.own_enc.enc_info, &bkeys.peer_id.id_info, NULL); - // - //_ediv = bkeys.own_enc.master_id.ediv; - // } else { + bond_keys bond_keys_t; + if ( bonding_load_keys(self->is_central, sec_info_request->master_id.ediv, &self->bonding_keys) ) { + sd_ble_gap_sec_info_reply(self->conn_handle + &self->bonding_keys.own_enc.enc_info, + &self->bonding_keys.peer_id.id_info, + NULL); + self->ediv = bond_keys.own_enc.master_id.ediv; + } else { sd_ble_gap_sec_info_reply(self->conn_handle, NULL, NULL, NULL); - // } - break; + } + break; } case BLE_GAP_EVT_CONN_SEC_UPDATE: { // 0x1a @@ -235,17 +249,23 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { // mode >=1 and/or level >=1 means encryption is set up self->pair_status = PAIR_NOT_PAIRED; } else { - //if ( !bond_load_cccd(_role, _conn_hdl, _ediv) ) { - if (true) { // TODO: no bonding yet - // Initialize system attributes fresh. - sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); - } + uint8_t *sys_attr; + uint16_t sys_attr_len; + if (bonding_load_cccd_info(self->is_central, self->conn_handle, self->ediv, sys_attr, sys_attr_len)) { + sd_ble_gatts_sys_attr_set(self->conn_handle, sys_attr, sys_attr_len, SVC_CONTEXT_FLAG); // Not quite paired yet: wait for BLE_GAP_EVT_AUTH_STATUS SUCCESS. self->ediv = self->bonding_keys.own_enc.master_id.ediv; + } else { + // No matching bonding found, so use fresh system attributes. + sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); + } } break; } + case BLE_GATTS_EVT_WRITE: { + if (self->pair_status == PAIR_PAIRED) && + default: return false; @@ -258,8 +278,7 @@ void bleio_connection_clear(bleio_connection_internal_t *self) { self->conn_handle = BLE_CONN_HANDLE_INVALID; self->pair_status = PAIR_NOT_PAIRED; - - memset(&self->bonding_keys, 0, sizeof(self->bonding_keys)); + bonding_clear_keys(self); } bool common_hal_bleio_connection_get_paired(bleio_connection_obj_t *self) { @@ -480,7 +499,7 @@ STATIC void on_desc_discovery_rsp(ble_gattc_evt_desc_disc_rsp_t *response, bleio default: // TODO: sd_ble_gattc_descriptors_discover() can return things that are not descriptors, // so ignore those. - // https://devzone.nordicsemi.com/f/nordic-q-a/49500/sd_ble_gattc_descriptors_discover-is-returning-attributes-that-are-not-descriptors + // htts:p//devzone.nordicsemi.com/f/nordic-q-a/49500/sd_ble_gattc_descriptors_discover-is-returning-attributes-that-are-not-descriptors break; } diff --git a/ports/nrf/common-hal/_bleio/Connection.h b/ports/nrf/common-hal/_bleio/Connection.h index 1474a0a6c..daa7f6446 100644 --- a/ports/nrf/common-hal/_bleio/Connection.h +++ b/ports/nrf/common-hal/_bleio/Connection.h @@ -36,6 +36,7 @@ #include "py/objlist.h" #include "common-hal/_bleio/__init__.h" +#include "common-hal/_bleio/bonding.h" #include "shared-module/_bleio/Address.h" #include "common-hal/_bleio/Service.h" @@ -59,7 +60,7 @@ typedef struct { // EDIV: Encrypted Diversifier: Identifies LTK during legacy pairing. bonding_keys_t bonding_keys; uint16_t ediv; - pair_status_t pair_status; + volatile pair_status_t pair_status; uint8_t sec_status; // Internal security status. mp_obj_t connection_obj; ble_drv_evt_handler_entry_t handler_entry; diff --git a/ports/nrf/common-hal/_bleio/bonding.c b/ports/nrf/common-hal/_bleio/bonding.c new file mode 100644 index 000000000..c717d0816 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/bonding.c @@ -0,0 +1,240 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "ble.h" +#include "ble_drv.h" +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Adapter.h" +#include "shared-bindings/nvm/ByteArray.h" + +#include "bonding.h" + +// Internal flash area reserved for bonding storage. +#define BONDING_PAGES_START_ADDR CIRCUITPY_BLE_CONFIG_START_ADDR +#define BONDING_PAGES_END_ADDR (CIRCUITPY_BLE_CONFIG_START_ADDR + CIRCUITPY_BLE_CONFIG_SIZE) + +// First and last four bytes are magic bytes for id and version. Start data after that. +// 'BD01' +const uint32_t BONDING_START_FLAG ('1' | '0' << 8 | 'D' << 16 | 'B' << 24); +// 'ED01' +const uint32_t BONDING_END_FLAG ('1' | '0' << 8 | 'D' << 16 | 'E' << 24); + +#define BONDING_DATA_START_ADDR (BONDING_DATA_START_ADDR + sizeof(BONDING_START_BYTES)) +#define BONDING_DATA_END_ADDR (BONDING_PAGES_END_ADDR - sizeof(BONDING_END_BYTES)) + +#define BONDING_START_FLAG_ADDR BONDING_DATA_START_ADDR +#define BONDING_END_FLAG_ADDR BONDING_DATA_END_ADDR + +// Bonding data is stored in variable-length blocks consecutively in erased flash. +// The blocks are 32-bit aligned, though the data may be any number of bytes. +// You can hop through the blocks using the size field to find the next block. +// When you hit a word that is all one's, you have reached the end of the blocks. +// You can write a new block there. + +typdef enum { + BLOCK_INVALID = 0, // Ignore this block + BLOCK_KEYS = 1, // Block contains bonding keys. + BLOCK_SYS_ATTR = 2, // Block contains sys_attr values (CCCD settings, etc.). + BLOCK_UNUSED = 0xff, // Initial erased value. +} bonding_block_type_t; + +typedef struct { + uint16_t central:1; // 1 if data is for a central role. + uint16_t reserved: 7; // Not currently used + bonding_block_type_t type: 8; // What kind of data is stored in. + uint16_t ediv; // ediv value; used as a lookup key. + uint32_t data_length; // Length of data in bytes, including ediv, not including padding. + // data_length only needs to be 16 bits, but easier to write a word at a time. + uint8_t data[]; // Rest of data in the block. Needs to be 32-bit aligned. + // Block is padded to 32-bit alignment. +} bonding_block_t; + +STATIC inline size_t bonding_block_size(uint16_t data_length) { + // Round data size up to the nearest 32-bit address. + return sizeof(bonding_block_t) + ((data_length + 3) & 0x3); + + +void bonding_clear_keys(bonding_keys_t *bonding_keys) { + memset(bonding_keys, 0, sizeof(bonding_keys)); +} + +STATIC void bonding_erase_storage(void) { + // Erase all pages in the bonding area. + for(uint32_t page_address = BONDING_PAGES_START_ADDR; + page_address < BONDING_PAGES_END_ADDR; + page_address += FLASH_PAGE) { + nrf_nvmc_page_erase(page_address); + } + // Write marker words at the beginning and the end of the bonding area. + nrf_nvmc_write_word(BONDING_DATA_START_ADDR, BONDING_START_FLAG_ADDR); + nrf_nvmc_write_word(BONDING_DATA_END_ADDR, BONDING_END_FLAG_ADDR); + // First unused block is at the beginning. + bonding_unused_block = BONDING_DATA_START_ADDR; +} + +STATIC bonding_block_t *bonding_unused_block = NULL; + +void bonding_init(void) { + if (BONDING_START_BYTES != *((uint32_t *) BONDING_START_FLAG_ADDR) || + BONDING_END_BYTES != *((uint32_t *) BONDING_END_FLAG_ADDR)) { + bonding_erase_storage(); + } else { + bonding_unused_block = bonding_find_block(BLOCK_UNUSED, EDIV_INVALID); + } +} + +// Given NULL to start or block address, return the address of the next valid block. +// The last block returned is the unused block at the end. +// Return NULL if we have run off the end of the bonding space. +STATIC bonding_block_t *bonding_next_block(bonding_block_t *block) { + while (1) { + // Advance to next block. + if (block == NULL) { + // Return first block (which might be unused if block list is empty). + return BONDING_DATA_START_ADDR; + } else if (block->type == BLOCK_UNUSED) { + // Already at last block (the unused block). + return NULL; + } + + // Advance to next block. + block += (bonding_block_t *) ((uint8_t *) block + bonding_block_word_size(block->data_length)); + + } + if (block >= (bonding_block_t *) BONDING_DATA_END_ADDR) { + // Went past end of bonding space. + return NULL; + } + if (block.valid) { + // Found an empty or a valid block. + return block; + } + // Invalid block (was erased); try again. + } +} + +// Find the block with given type and ediv value. +// If type == BLOCK_UNUSED, ediv is ignored and the the sole unused block at the end is returned. +// If not found, return NULL. +STATIC bonding_block_t *bonding_find_block(bonding_block_type_t type, uint16_t ediv) { + bonding_block_t *block = NULL; + while (1) { + block = bonding_next_block(block); + if (block == NULL) { + return NULL; + } + if (block.type == BLOCK_UNUSED) { + return block; + } + if (type == block.type && ediv = block.ediv) { + return block; + } + } +} + +// Set the header word to all 0's, to mark the block as invalid. +// We don't change data_length, so we can still skip over this block. +STATIC void bonding_invalidate_block(bonding_block_t *block) { + nrf_nvmc_write_word((uint32_t) bonding_unused_block, 0x00000000); +} + +// Try to write a new block. If no room, erase everything and start again. +// TODO: could do garbage collection instead. +STATIC bool bonding_write_block(bonding_block_type_t type, uint16_t ediv, uint8_t *data, uint16_t data_length) { + size_t block_size = bonding_block_word_size(data_length); + if (block_size > BONDING_DATA_END_ADDR - BONDING_DATA_START_ADDR) { + // Ridiculous size. + return false; + } + + // No more room. Erase all existing bonding info and start over. + if (bonding_unused_block == NULL || bonding_unused_block + block_size >= BONDING_DATA_END_ADDR) { + bonding_erase_storage(); + } + + bonding_block_t block_without_data; + block_without_data.valid = 1; + block_without_data.type = type; + block_without_data.ediv = ediv; + block_without_data.data_length = data_length; + + // Write header data. + nrf_nvmc_write_words((uint32_t) bonding_unused_block, (uint32_t *) &block_without_data, + sizeof(block_without_data) / 4); + + // Write variable-length data. + // Minimize the number of writes. Datasheet says no more than two writes per word before erasing again. + uint32_t *word_p = (uint32_t) bonding_unused_block + sizeof(block_without_data); + while (1) { + uint32_t word = 0xffffffff; + memcpy(&word, data, data_length >= 4 ? 4 : data_length); + nrf_nvmc_write_word(word_p, word); + if (data_length <= 4) { + break; + } + data_length -= 4; + word_p++; + } + return true; +} + + + +bool bonding_load_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv, + uint8_t **sys_attr, uint16_t *sys_attr_len) { + bonding_block_t *block = bonding_find_matching_block(BLOCK_SYS_ATTR, ediv); + if (block) { + *sys_attr = block.data; + *sys_attr_len = block.data_length; + return true; + } else { + return false; + } +} + +bool bonding_load_keys(bool is_central, uint16_t ediv, bonding_keys_t *bonding_keys) { + bonding_block_t *block = bonding_find_matching_block(BLOCK_SYS_ATTR, ediv); + if (block) { + memcpy(bonding_keys, block.data, block.data_length); + return true; + } else { + return false; + } +} + +bool bonding_save_cccd_info_later(bool is_central, uint16_t conn_handle, uint16_t ediv, uint8_t *sys_attr, uint16_t sys_attr_len) { + // save in id role/ediv + // sys_attr + +bool bonding_save_keys(bool is_central, uint16_t conn_handle, bonding_keys_t *bonding_keys) { + // save in id role/ediv: + // bonding keys + // peer name, or if no name, then human-readable address +} diff --git a/ports/nrf/common-hal/_bleio/bonding.h b/ports/nrf/common-hal/_bleio/bonding.h new file mode 100644 index 000000000..906d9d194 --- /dev/null +++ b/ports/nrf/common-hal/_bleio/bonding.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "ble.h" +#include "ble_drv.h" +#include "shared-bindings/_bleio/__init__.h" +#include "shared-bindings/_bleio/Adapter.h" +#include "shared-bindings/nvm/ByteArray.h" + +#define EDIV_INVALID (0xffff) + +void bonding_clear_keys(bonding_keys_t *bonding_keys); +bool bonding_load_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv); +bool bonding_load_keys(bool is_central, uint16_t ediv, bonding_keys_t *bonding_keys); +bool bonding_save_cccd_info_later(bool is_central, uint16_t conn_handle, uint16_t ediv, uint8_t *sys_attr, uint16_t sys_attr_len); +bool bonding_save_keys(bool is_central, uint16_t conn_handle, bonding_keys_t *bonding_keys); diff --git a/ports/nrf/common-hal/nvm/ByteArray.c b/ports/nrf/common-hal/nvm/ByteArray.c index 7d733ce7b..6b2f04a61 100644 --- a/ports/nrf/common-hal/nvm/ByteArray.c +++ b/ports/nrf/common-hal/nvm/ByteArray.c @@ -36,21 +36,17 @@ uint32_t common_hal_nvm_bytearray_get_length(nvm_bytearray_obj_t *self) { return self->len; } -static void write_page(uint32_t page_addr, uint32_t offset, uint32_t len, uint8_t *bytes) { +static bool write_page(uint32_t page_addr, uint32_t offset, uint32_t len, uint8_t *bytes) { // Write a whole page to flash, buffering it first and then erasing and rewriting // it since we can only clear a whole page at a time. - bool status; if (offset == 0 && len == FLASH_PAGE_SIZE) { - status = nrf_nvm_safe_flash_page_write(page_addr, bytes); + return nrf_nvm_safe_flash_page_write(page_addr, bytes); } else { uint8_t buffer[FLASH_PAGE_SIZE]; memcpy(buffer, (uint8_t *)page_addr, FLASH_PAGE_SIZE); memcpy(buffer + offset, bytes, len); - status = nrf_nvm_safe_flash_page_write(page_addr, buffer); - } - if (!status) { - mp_raise_OSError_msg(translate("Flash write failed")); + return nrf_nvm_safe_flash_page_write(page_addr, buffer); } } @@ -63,7 +59,9 @@ bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, while (len) { uint32_t write_len = MIN(len, FLASH_PAGE_SIZE - offset); - write_page(page_addr, offset, write_len, values); + if (!write_page(page_addr, offset, write_len, values)) { + return false; + } len -= write_len; values += write_len; page_addr += FLASH_PAGE_SIZE; diff --git a/ports/nrf/peripherals/nrf/nvm.c b/ports/nrf/peripherals/nrf/nvm.c index 7118b9c87..d13775d4d 100644 --- a/ports/nrf/peripherals/nrf/nvm.c +++ b/ports/nrf/peripherals/nrf/nvm.c @@ -50,6 +50,12 @@ STATIC sd_flash_operation_status_t sd_flash_operation_wait_until_done(void) { } #endif +// The nRF52840 datasheet specifies a maximum of two writes to a flash +// location before an erase is necessary, even if the write is all +// ones (erased state). So we can't avoid erases even if the page +// appears to be already erased (all ones), unless we keep track of +// writes to a page. + bool nrf_nvm_safe_flash_page_write(uint32_t page_addr, uint8_t *data) { #ifdef BLUETOOTH_SD uint8_t sd_en = 0; diff --git a/tools/preprocess_frozen_modules.py b/tools/preprocess_frozen_modules.py index 2199e9d39..90ea49ca4 100755 --- a/tools/preprocess_frozen_modules.py +++ b/tools/preprocess_frozen_modules.py @@ -47,6 +47,7 @@ def copy_and_process(in_dir, out_dir): output_file_path = Path(out_dir, input_file_path.relative_to(in_dir)) if file.endswith(".py"): + print(file) if not output_file_path.parent.exists(): output_file_path.parent.mkdir(parents=True) with input_file_path.open("r") as input, output_file_path.open("w") as output: -- cgit v1.2.3 From 36088becc953fe1a417833dd6d243622d6f95de0 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Sat, 4 Jan 2020 13:35:53 -0500 Subject: PWM Fix, plus debugging --- ports/stm32f4/Makefile | 5 + ports/stm32f4/boards/meowbit_v121/pins.c | 6 +- ports/stm32f4/common-hal/pulseio/PWMOut.c | 199 ++++++++++++++++++--- .../peripherals/stm32f4/stm32f401xe/periph.h | 6 +- .../stm32f4/peripherals/stm32f4/stm32f401xe/pins.h | 6 +- ports/stm32f4/supervisor/port.c | 11 -- 6 files changed, 185 insertions(+), 48 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index 3943944cc..cb2cdd8d3 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -85,6 +85,11 @@ ifeq ($(DEBUG), 1) CFLAGS += -fno-inline -fno-ipa-sra else CFLAGS += -Os -DNDEBUG + CFLAGS += -ggdb +# CFLAGS += -fno-inline -fno-ipa-sra + + + #CFLAGS += -Os -DNDEBUG # TODO: Test with -flto ### CFLAGS += -flto endif diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c index 7b896bd70..1216f4a80 100644 --- a/ports/stm32f4/boards/meowbit_v121/pins.c +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -10,7 +10,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_DISP_CS), MP_ROM_PTR(&pin_PB12) }, { MP_ROM_QSTR(MP_QSTR_DISP_DC), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_DISP_RST), MP_ROM_PTR(&pin_PB10) }, - { MP_ROM_QSTR(MP_QSTR_DISP_BL), MP_ROM_PTR(&pin_PB03) }, //what is this, backlight? + { MP_ROM_QSTR(MP_QSTR_DISP_BL), MP_ROM_PTR(&pin_PB03) }, //what is this, backlight? { MP_ROM_QSTR(MP_QSTR_BUZZ), MP_ROM_PTR(&pin_PB08) }, { MP_ROM_QSTR(MP_QSTR_BTNA), MP_ROM_PTR(&pin_PB09) }, @@ -32,8 +32,8 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, - // { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PC06) }, //these are wrong on Meowbit diagram. - // { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA03) }, //they cannot be used together (UART2 vs 6) + // { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PC06) }, //these are wrong on Meowbit diagram. + // { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA03) }, //they cannot be used together (UART2 vs 6) { MP_ROM_QSTR(MP_QSTR_NSS), MP_ROM_PTR(&pin_PA15) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PC12) }, { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PC11) }, diff --git a/ports/stm32f4/common-hal/pulseio/PWMOut.c b/ports/stm32f4/common-hal/pulseio/PWMOut.c index 301f8cd49..5bb34b7c0 100644 --- a/ports/stm32f4/common-hal/pulseio/PWMOut.c +++ b/ports/stm32f4/common-hal/pulseio/PWMOut.c @@ -26,6 +26,7 @@ */ #include +#include //add #include "py/runtime.h" #include "common-hal/pulseio/PWMOut.h" #include "shared-bindings/pulseio/PWMOut.h" @@ -88,6 +89,7 @@ STATIC void timer_get_optimal_divisors(uint32_t*period, uint32_t*prescaler, } void pwmout_reset(void) { + mp_printf(&mp_plat_print, "reset\n"); uint16_t never_reset_mask = 0x00; for(int i=0;inumber); GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; @@ -194,63 +200,195 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; GPIO_InitStruct.Alternate = self->tim->altfn_index; HAL_GPIO_Init(pin_port(pin->port), &GPIO_InitStruct); + mp_printf(&mp_plat_print, "Good GPIO init\n"); + + // __HAL_RCC_GPIOA_CLK_ENABLE(); + // /**TIM2 GPIO Configuration + // PA1 ------> TIM2_CH2 + // */ + // GPIO_InitTypeDef GPIO_InitStruct = {0}; + // GPIO_InitStruct.Pin = GPIO_PIN_1; + // GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + // GPIO_InitStruct.Pull = GPIO_NOPULL; + // GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + // GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; + // HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + + mp_printf(&mp_plat_print, "PWM Pin:%d Port:%d\n", pin->number, pin->port); + + + + +//OG tim_clock_enable(1<<(self->tim->tim_index - 1)); - //translate channel into handle value - self->channel = 4 * (self->tim->channel_index - 1); + //__HAL_RCC_TIM2_CLK_ENABLE(); - uint32_t prescaler = 0; //prescaler is 15 bit - uint32_t period = 0; //period is 16 bit - timer_get_optimal_divisors(&period, &prescaler,frequency,timer_get_source_freq(self->tim->tim_index)); + mp_printf(&mp_plat_print, "Good clock init\n"); - mp_printf(&mp_plat_print, "Per:%d presc:%d\n", period, prescaler); + - //Timer init - self->handle.Instance = TIMx; - self->handle.Init.Period = period - 1; - self->handle.Init.Prescaler = prescaler - 1; +//OG + // //translate channel into handle value + self->channel = 4 * (self->tim->channel_index - 1); + + // uint32_t prescaler = 0; //prescaler is 15 bit + // uint32_t period = 0; //period is 16 bit + // timer_get_optimal_divisors(&period, &prescaler,frequency,timer_get_source_freq(self->tim->tim_index)); + // //Timer init + self->handle.Instance = TIM2; //TIMx; + self->handle.Init.Period = 8749;//period - 1; + self->handle.Init.Prescaler = 0;//prescaler - 1; self->handle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; self->handle.Init.CounterMode = TIM_COUNTERMODE_UP; - self->handle.Init.RepetitionCounter = 0; - + self->handle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + //self->handle.Init.RepetitionCounter = 0; //only run init if this is the first instance of this timer - if (first_time_setup) { + // if (first_time_setup) { if (HAL_TIM_PWM_Init(&self->handle) != HAL_OK) { mp_raise_ValueError(translate("Could not initialize timer")); } + // } + + /* USER CODE END TIM2_Init 1 */ + // TIM_HandleTypeDef htim2; + // htim2.Instance = TIM2; + // htim2.Init.Prescaler = 0; + // htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + // htim2.Init.Period = 8749; + // htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + // htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + // if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) + // { + // mp_raise_ValueError(translate("Could not start PWM1")); + // } + +//OG not needed + TIM_MasterConfigTypeDef sMasterConfig = {0}; + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&self->handle, &sMasterConfig) != HAL_OK) + { + mp_raise_ValueError(translate("Internal Error")); } - //Channel/PWM init +//OG + // //Channel/PWM init + //memset(&(self->chan_handle), 0, sizeof(TIM_OC_InitTypeDef)); //doesn't seem to affect it + self->chan_handle.OCNPolarity = 0; + self->chan_handle.OCIdleState = 0; + self->chan_handle.OCNIdleState = 0; self->chan_handle.OCMode = TIM_OCMODE_PWM1; - self->chan_handle.Pulse = timer_get_internal_duty(duty, period); - self->chan_handle.OCPolarity = TIM_OCPOLARITY_LOW; + self->chan_handle.Pulse = 7000; + self->chan_handle.OCPolarity = TIM_OCPOLARITY_HIGH; self->chan_handle.OCFastMode = TIM_OCFAST_DISABLE; - self->chan_handle.OCNPolarity = TIM_OCNPOLARITY_LOW; // needed for TIM1 and TIM8 - self->chan_handle.OCIdleState = TIM_OCIDLESTATE_SET; // needed for TIM1 and TIM8 - self->chan_handle.OCNIdleState = TIM_OCNIDLESTATE_SET; // needed for TIM1 and TIM8 - if (HAL_TIM_PWM_ConfigChannel(&self->handle, &self->chan_handle, self->channel) != HAL_OK) { + //TIM_OC_InitTypeDef sConfigOC = self->chan_handle; + mp_printf(&mp_plat_print, "Complete"); + if (HAL_TIM_PWM_ConfigChannel(&self->handle, &(self->chan_handle), (uint32_t)self->channel) != HAL_OK) + { mp_raise_ValueError(translate("Could not initialize channel")); } - if (HAL_TIM_PWM_Start(&self->handle, self->channel) != HAL_OK) { - mp_raise_ValueError(translate("Could not start PWM")); - } - self->variable_frequency = variable_frequency; - self->frequency = frequency; - self->duty_cycle = duty; - self->period = period; + // TIM_OC_InitTypeDef sConfigOC = {0}; + // sConfigOC.OCNPolarity = 0; + // sConfigOC.OCIdleState = 0; + // sConfigOC.OCNIdleState = 0; + // sConfigOC.OCMode = TIM_OCMODE_PWM1; + // sConfigOC.Pulse = 7000; + // sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + // sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + // if (HAL_TIM_PWM_ConfigChannel(&self->handle, &sConfigOC, self->channel) != HAL_OK) + // { + // mp_raise_ValueError(translate("Could not initialize channel")); + // } + + +//OG + // if (HAL_TIM_PWM_Start(&self->handle, self->channel) != HAL_OK) { + // mp_raise_ValueError(translate("Could not start PWM")); + // } +//HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2); +HAL_TIM_PWM_Start(&self->handle, self->channel); + + +mp_printf(&mp_plat_print, "Complete"); + // period, prescaler, timer_get_internal_duty(duty, period)); + // mp_printf(&mp_plat_print, "SrcFreq: %d Per:%d presc:%d, doot:%d \n",timer_get_source_freq(self->tim->tim_index), + // period, prescaler, timer_get_internal_duty(duty, period)); + + // self->variable_frequency = variable_frequency; + // self->frequency = frequency; + // self->duty_cycle = duty; + // self->period = period; + + + //FULL REPLACE + + // __HAL_RCC_TIM2_CLK_ENABLE(); + + // TIM_MasterConfigTypeDef sMasterConfig = {0}; + // TIM_OC_InitTypeDef sConfigOC = {0}; + // TIM_HandleTypeDef htim2; + + // /* USER CODE BEGIN TIM2_Init 1 */ + + // /* USER CODE END TIM2_Init 1 */ + // htim2.Instance = TIM2; + // htim2.Init.Prescaler = 0; + // htim2.Init.CounterMode = TIM_COUNTERMODE_UP; + // htim2.Init.Period = 8749; + // htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + // htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + // if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) + // { + // mp_raise_ValueError(translate("Could not start PWM1")); + // } + // sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + // sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + // if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) + // { + // mp_raise_ValueError(translate("Could not start PWM2")); + // } + // sConfigOC.OCMode = TIM_OCMODE_PWM1; + // sConfigOC.Pulse = 7000; + // sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + // sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + // if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) + // { + // mp_raise_ValueError(translate("Could not start PWM3")); + // } + + // /* USER CODE BEGIN TIM2_Init 2 */ + + // /* USER CODE END TIM2_Init 2 */ + // __HAL_RCC_GPIOA_CLK_ENABLE(); + // /**TIM2 GPIO Configuration + // PA1 ------> TIM2_CH2 + // */ + // GPIO_InitTypeDef GPIO_InitStruct = {0}; + // GPIO_InitStruct.Pin = GPIO_PIN_1; + // GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + // GPIO_InitStruct.Pull = GPIO_NOPULL; + // GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + // GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; + // HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + // HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2); return PWMOUT_OK; } bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) { + mp_printf(&mp_plat_print, "Deinited\n"); return self->tim == mp_const_none; } void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { + mp_printf(&mp_plat_print, "Deinit\n"); if (common_hal_pulseio_pwmout_deinited(self)) { return; } @@ -272,16 +410,19 @@ void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { } void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, uint16_t duty) { + mp_printf(&mp_plat_print, "setduty\n"); uint32_t internal_duty_cycle = timer_get_internal_duty(duty, self->period); __HAL_TIM_SET_COMPARE(&self->handle, self->channel, internal_duty_cycle); self->duty_cycle = duty; } uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { + mp_printf(&mp_plat_print, "getduty\n"); return self->duty_cycle; } void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_t frequency) { + mp_printf(&mp_plat_print, "setfreq\n"); //don't halt setup for the same frequency if (frequency == self->frequency) return; @@ -316,10 +457,12 @@ void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_ } uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) { + mp_printf(&mp_plat_print, "getfreq\n"); return self->frequency; } bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self) { + mp_printf(&mp_plat_print, "getvarfreq\n"); return self->variable_frequency; } diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.h index 7d3f4dca2..6085f1ff2 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.h @@ -24,8 +24,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H -#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PERIPH_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PERIPH_H //I2C extern I2C_TypeDef * mcu_i2c_banks[3]; @@ -54,4 +54,4 @@ extern const mcu_uart_rx_obj_t mcu_uart_rx_list[6]; TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; -#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H \ No newline at end of file +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PERIPH_H \ No newline at end of file diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.h b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.h index 37d3a5cf1..09bc8f13e 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.h @@ -24,8 +24,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PINS_H -#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PINS_H +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PINS_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PINS_H //Pins in datasheet order: DocID026289 Rev 7 page 38. LQFP100 only //pg 38 @@ -118,4 +118,4 @@ extern const mcu_pin_obj_t pin_PE00; extern const mcu_pin_obj_t pin_PE01; -#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PINS_H +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PINS_H diff --git a/ports/stm32f4/supervisor/port.c b/ports/stm32f4/supervisor/port.c index 3962f6fa6..df5a70cd1 100644 --- a/ports/stm32f4/supervisor/port.c +++ b/ports/stm32f4/supervisor/port.c @@ -52,17 +52,6 @@ safe_mode_t port_init(void) { tick_init(); board_init(); - //Configure LED pins - GPIO_InitTypeDef GPIO_InitStruct = {0}; - GPIO_InitStruct.Pin = GPIO_PIN_4 | GPIO_PIN_5; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, 0); - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, 1); - return NO_SAFE_MODE; } -- cgit v1.2.3 From d0fab1c728b9620e6acef45e08b650fd2ba43cae Mon Sep 17 00:00:00 2001 From: Hierophect Date: Sat, 4 Jan 2020 13:53:31 -0500 Subject: Clean up debugging edits --- ports/stm32f4/Makefile | 7 +- ports/stm32f4/common-hal/pulseio/PWMOut.c | 199 ++++-------------------------- 2 files changed, 27 insertions(+), 179 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index cb2cdd8d3..2727ea954 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -22,7 +22,7 @@ # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN # THE SOFTWARE. -#DEBUG = 1 +DEBUG = 1 # Select the board to build for. ifeq ($(BOARD),) @@ -85,11 +85,6 @@ ifeq ($(DEBUG), 1) CFLAGS += -fno-inline -fno-ipa-sra else CFLAGS += -Os -DNDEBUG - CFLAGS += -ggdb -# CFLAGS += -fno-inline -fno-ipa-sra - - - #CFLAGS += -Os -DNDEBUG # TODO: Test with -flto ### CFLAGS += -flto endif diff --git a/ports/stm32f4/common-hal/pulseio/PWMOut.c b/ports/stm32f4/common-hal/pulseio/PWMOut.c index 5bb34b7c0..7bff8de76 100644 --- a/ports/stm32f4/common-hal/pulseio/PWMOut.c +++ b/ports/stm32f4/common-hal/pulseio/PWMOut.c @@ -26,7 +26,6 @@ */ #include -#include //add #include "py/runtime.h" #include "common-hal/pulseio/PWMOut.h" #include "shared-bindings/pulseio/PWMOut.h" @@ -89,7 +88,6 @@ STATIC void timer_get_optimal_divisors(uint32_t*period, uint32_t*prescaler, } void pwmout_reset(void) { - mp_printf(&mp_plat_print, "reset\n"); uint16_t never_reset_mask = 0x00; for(int i=0;inumber); GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; @@ -200,195 +194,59 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; GPIO_InitStruct.Alternate = self->tim->altfn_index; HAL_GPIO_Init(pin_port(pin->port), &GPIO_InitStruct); - mp_printf(&mp_plat_print, "Good GPIO init\n"); - - // __HAL_RCC_GPIOA_CLK_ENABLE(); - // /**TIM2 GPIO Configuration - // PA1 ------> TIM2_CH2 - // */ - // GPIO_InitTypeDef GPIO_InitStruct = {0}; - // GPIO_InitStruct.Pin = GPIO_PIN_1; - // GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - // GPIO_InitStruct.Pull = GPIO_NOPULL; - // GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - // GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; - // HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - - - - mp_printf(&mp_plat_print, "PWM Pin:%d Port:%d\n", pin->number, pin->port); - - - - -//OG tim_clock_enable(1<<(self->tim->tim_index - 1)); - //__HAL_RCC_TIM2_CLK_ENABLE(); - - mp_printf(&mp_plat_print, "Good clock init\n"); - - - -//OG - // //translate channel into handle value + //translate channel into handle value self->channel = 4 * (self->tim->channel_index - 1); - // uint32_t prescaler = 0; //prescaler is 15 bit - // uint32_t period = 0; //period is 16 bit - // timer_get_optimal_divisors(&period, &prescaler,frequency,timer_get_source_freq(self->tim->tim_index)); - // //Timer init - self->handle.Instance = TIM2; //TIMx; - self->handle.Init.Period = 8749;//period - 1; - self->handle.Init.Prescaler = 0;//prescaler - 1; + uint32_t prescaler = 0; //prescaler is 15 bit + uint32_t period = 0; //period is 16 bit + timer_get_optimal_divisors(&period, &prescaler,frequency,timer_get_source_freq(self->tim->tim_index)); + + //Timer init + self->handle.Instance = TIMx; + self->handle.Init.Period = period - 1; + self->handle.Init.Prescaler = prescaler - 1; self->handle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; self->handle.Init.CounterMode = TIM_COUNTERMODE_UP; - self->handle.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - //self->handle.Init.RepetitionCounter = 0; + self->handle.Init.RepetitionCounter = 0; + //only run init if this is the first instance of this timer - // if (first_time_setup) { + if (first_time_setup) { if (HAL_TIM_PWM_Init(&self->handle) != HAL_OK) { mp_raise_ValueError(translate("Could not initialize timer")); } - // } - - /* USER CODE END TIM2_Init 1 */ - // TIM_HandleTypeDef htim2; - // htim2.Instance = TIM2; - // htim2.Init.Prescaler = 0; - // htim2.Init.CounterMode = TIM_COUNTERMODE_UP; - // htim2.Init.Period = 8749; - // htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - // htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - // if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) - // { - // mp_raise_ValueError(translate("Could not start PWM1")); - // } - -//OG not needed - TIM_MasterConfigTypeDef sMasterConfig = {0}; - sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - if (HAL_TIMEx_MasterConfigSynchronization(&self->handle, &sMasterConfig) != HAL_OK) - { - mp_raise_ValueError(translate("Internal Error")); } -//OG - // //Channel/PWM init - //memset(&(self->chan_handle), 0, sizeof(TIM_OC_InitTypeDef)); //doesn't seem to affect it - self->chan_handle.OCNPolarity = 0; - self->chan_handle.OCIdleState = 0; - self->chan_handle.OCNIdleState = 0; + //Channel/PWM init self->chan_handle.OCMode = TIM_OCMODE_PWM1; - self->chan_handle.Pulse = 7000; - self->chan_handle.OCPolarity = TIM_OCPOLARITY_HIGH; + self->chan_handle.Pulse = timer_get_internal_duty(duty, period); + self->chan_handle.OCPolarity = TIM_OCPOLARITY_LOW; self->chan_handle.OCFastMode = TIM_OCFAST_DISABLE; - //TIM_OC_InitTypeDef sConfigOC = self->chan_handle; - mp_printf(&mp_plat_print, "Complete"); - if (HAL_TIM_PWM_ConfigChannel(&self->handle, &(self->chan_handle), (uint32_t)self->channel) != HAL_OK) - { + self->chan_handle.OCNPolarity = TIM_OCNPOLARITY_LOW; // needed for TIM1 and TIM8 + self->chan_handle.OCIdleState = TIM_OCIDLESTATE_SET; // needed for TIM1 and TIM8 + self->chan_handle.OCNIdleState = TIM_OCNIDLESTATE_SET; // needed for TIM1 and TIM8 + if (HAL_TIM_PWM_ConfigChannel(&self->handle, &self->chan_handle, self->channel) != HAL_OK) { mp_raise_ValueError(translate("Could not initialize channel")); } + if (HAL_TIM_PWM_Start(&self->handle, self->channel) != HAL_OK) { + mp_raise_ValueError(translate("Could not start PWM")); + } - // TIM_OC_InitTypeDef sConfigOC = {0}; - // sConfigOC.OCNPolarity = 0; - // sConfigOC.OCIdleState = 0; - // sConfigOC.OCNIdleState = 0; - // sConfigOC.OCMode = TIM_OCMODE_PWM1; - // sConfigOC.Pulse = 7000; - // sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - // sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - // if (HAL_TIM_PWM_ConfigChannel(&self->handle, &sConfigOC, self->channel) != HAL_OK) - // { - // mp_raise_ValueError(translate("Could not initialize channel")); - // } - - -//OG - // if (HAL_TIM_PWM_Start(&self->handle, self->channel) != HAL_OK) { - // mp_raise_ValueError(translate("Could not start PWM")); - // } -//HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2); -HAL_TIM_PWM_Start(&self->handle, self->channel); - - -mp_printf(&mp_plat_print, "Complete"); - // period, prescaler, timer_get_internal_duty(duty, period)); - // mp_printf(&mp_plat_print, "SrcFreq: %d Per:%d presc:%d, doot:%d \n",timer_get_source_freq(self->tim->tim_index), - // period, prescaler, timer_get_internal_duty(duty, period)); - - // self->variable_frequency = variable_frequency; - // self->frequency = frequency; - // self->duty_cycle = duty; - // self->period = period; - - - //FULL REPLACE - - // __HAL_RCC_TIM2_CLK_ENABLE(); - - // TIM_MasterConfigTypeDef sMasterConfig = {0}; - // TIM_OC_InitTypeDef sConfigOC = {0}; - // TIM_HandleTypeDef htim2; - - // /* USER CODE BEGIN TIM2_Init 1 */ - - // /* USER CODE END TIM2_Init 1 */ - // htim2.Instance = TIM2; - // htim2.Init.Prescaler = 0; - // htim2.Init.CounterMode = TIM_COUNTERMODE_UP; - // htim2.Init.Period = 8749; - // htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - // htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - // if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) - // { - // mp_raise_ValueError(translate("Could not start PWM1")); - // } - // sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - // sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - // if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) - // { - // mp_raise_ValueError(translate("Could not start PWM2")); - // } - // sConfigOC.OCMode = TIM_OCMODE_PWM1; - // sConfigOC.Pulse = 7000; - // sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - // sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - // if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) - // { - // mp_raise_ValueError(translate("Could not start PWM3")); - // } - - // /* USER CODE BEGIN TIM2_Init 2 */ - - // /* USER CODE END TIM2_Init 2 */ - // __HAL_RCC_GPIOA_CLK_ENABLE(); - // /**TIM2 GPIO Configuration - // PA1 ------> TIM2_CH2 - // */ - // GPIO_InitTypeDef GPIO_InitStruct = {0}; - // GPIO_InitStruct.Pin = GPIO_PIN_1; - // GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - // GPIO_InitStruct.Pull = GPIO_NOPULL; - // GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - // GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; - // HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - // HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2); + self->variable_frequency = variable_frequency; + self->frequency = frequency; + self->duty_cycle = duty; + self->period = period; return PWMOUT_OK; } bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) { - mp_printf(&mp_plat_print, "Deinited\n"); return self->tim == mp_const_none; } void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { - mp_printf(&mp_plat_print, "Deinit\n"); if (common_hal_pulseio_pwmout_deinited(self)) { return; } @@ -410,19 +268,16 @@ void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { } void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, uint16_t duty) { - mp_printf(&mp_plat_print, "setduty\n"); uint32_t internal_duty_cycle = timer_get_internal_duty(duty, self->period); __HAL_TIM_SET_COMPARE(&self->handle, self->channel, internal_duty_cycle); self->duty_cycle = duty; } uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { - mp_printf(&mp_plat_print, "getduty\n"); return self->duty_cycle; } void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_t frequency) { - mp_printf(&mp_plat_print, "setfreq\n"); //don't halt setup for the same frequency if (frequency == self->frequency) return; @@ -457,12 +312,10 @@ void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_ } uint32_t common_hal_pulseio_pwmout_get_frequency(pulseio_pwmout_obj_t* self) { - mp_printf(&mp_plat_print, "getfreq\n"); return self->frequency; } bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self) { - mp_printf(&mp_plat_print, "getvarfreq\n"); return self->variable_frequency; } -- cgit v1.2.3 From f355642eabf3b408f25a3b098d0eec84ad915988 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Sat, 4 Jan 2020 16:23:36 -0500 Subject: Boot linker edits --- ports/stm32f4/boards/STM32F401.ld | 65 +++++++++++++++++++++++++++------- ports/stm32f4/boards/STM32F401_boot.ld | 6 ++-- 2 files changed, 55 insertions(+), 16 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/STM32F401.ld b/ports/stm32f4/boards/STM32F401.ld index b3d772a78..be72ecc09 100644 --- a/ports/stm32f4/boards/STM32F401.ld +++ b/ports/stm32f4/boards/STM32F401.ld @@ -1,28 +1,52 @@ /* - GNU linker script for STM32F401 with bootloader (such as the Meowbit) + GNU linker script for STM32F401 with bootloader (from Meowbit Micropython) + Doesn't work: + + Traceback (most recent call last): + File "../../tools/build_memory_info.py", line 64, in + regions[region] = int(eval(space)) + File "", line 1, in +NameError: name 'FLASH_ISR' is not defined */ /* Specify the memory areas */ +/* FLASH_FS (rx) : ORIGIN = 0x08020000, LENGTH = 128K */ +/* sectors 5 128K */ MEMORY { - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K - 64K /* entire flash, sans bootloader */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 64K /* sector 4, 0-3 used by bootloader*/ - FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */ - RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 /* more bootloader schnenaigans */ + FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4, sec 0~3 reserved for booloader */ + FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5, 6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 } /* produce a link error if there is not this amount of RAM for these sections */ _minimum_stack_size = 2K; _minimum_heap_size = 16K; -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); +/* Define the stack. The stack is full descending so begins just above last byte + of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve; +_sstack = _estack - 16K; /* tunable */ /* RAM extents for the garbage collector */ _ram_start = ORIGIN(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); +_heap_start = _ebss; /* heap starts just after statically allocated memory */ +_heap_end = _sstack; + +/* Memory layout for internal flash storage configuration: + + FLASH_ISR .isr_vector + + FLASH_TEXT .text + FLASH_TEXT .data + + RAM .data + RAM .bss + RAM .heap + RAM .stack +*/ ENTRY(Reset_Handler) @@ -36,8 +60,25 @@ SECTIONS KEEP(*(.isr_vector)) /* Startup code */ /* This first flash block is 16K annd the isr vectors only take up - about 400 bytes. Micropython pads this with files, but this didn't - work with the size of Circuitpython's ff object. */ + about 400 bytes. So we pull in a couple of object files to pad it + out. */ + + . = ALIGN(4); + + /* NOTE: If you update the list of files contained in .isr_vector, + then be sure to also update smhal/Makefile where it forcibly + builds each of these files with -Os */ + + */ff.o(.text*) + */vfs_fat_*.o(.text*) + */py/formatfloat.o(.text*) + */py/parsenum.o(.text*) + */py/mpprint.o(.text*) + + */py/compile.o(.text*) + */py/objset.o(.text*) + */py/mpz.o(.text*) + */py/vm.o(.text*) . = ALIGN(4); } >FLASH_ISR @@ -102,5 +143,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - - diff --git a/ports/stm32f4/boards/STM32F401_boot.ld b/ports/stm32f4/boards/STM32F401_boot.ld index 7f582fdf9..64f78451a 100644 --- a/ports/stm32f4/boards/STM32F401_boot.ld +++ b/ports/stm32f4/boards/STM32F401_boot.ld @@ -5,10 +5,10 @@ /* Specify the memory areas */ MEMORY { - FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash, sans bootloader */ - FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4, 0-3 used by bootloader*/ + FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */ - RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 /* more bootloader schnenaigans */ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K } /* produce a link error if there is not this amount of RAM for these sections */ -- cgit v1.2.3 From 390337b9a518eaa4416458bce9f4a39b60b23372 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Sun, 5 Jan 2020 23:33:42 -0500 Subject: wip; compiles --- ports/nrf/Makefile | 3 +- ports/nrf/background.c | 2 + ports/nrf/common-hal/_bleio/Adapter.c | 2 + ports/nrf/common-hal/_bleio/Characteristic.c | 9 +- ports/nrf/common-hal/_bleio/Connection.c | 25 +-- ports/nrf/common-hal/_bleio/__init__.h | 6 +- ports/nrf/common-hal/_bleio/bonding.c | 297 ++++++++++++++++++--------- ports/nrf/common-hal/_bleio/bonding.h | 54 ++++- ports/nrf/mpconfigport.h | 5 +- 9 files changed, 274 insertions(+), 129 deletions(-) (limited to 'ports') diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile index e6070fc32..92985e4e9 100755 --- a/ports/nrf/Makefile +++ b/ports/nrf/Makefile @@ -73,8 +73,6 @@ INC += -I$(BUILD) INC += -I$(BUILD)/genhdr INC += -I./../../lib/cmsis/inc INC += -I./boards/$(BOARD) -INC += -I./modules/ubluepy -INC += -I./modules/ble INC += -I./nrfx INC += -I./nrfx/hal INC += -I./nrfx/mdk @@ -156,6 +154,7 @@ SRC_C += \ boards/$(BOARD)/pins.c \ device/$(MCU_VARIANT)/startup_$(MCU_SUB_VARIANT).c \ bluetooth/ble_drv.c \ + common-hal/_bleio/bonding.c \ lib/libc/string0.c \ lib/mp-readline/readline.c \ lib/oofatfs/ff.c \ diff --git a/ports/nrf/background.c b/ports/nrf/background.c index 629967b3d..966c56e0b 100644 --- a/ports/nrf/background.c +++ b/ports/nrf/background.c @@ -43,6 +43,7 @@ #if CIRCUITPY_BLEIO #include "supervisor/shared/bluetooth.h" +#include "common-hal/_bleio/bonding.h" #endif static bool running_background_tasks = false; @@ -68,6 +69,7 @@ void run_background_tasks(void) { #if CIRCUITPY_BLEIO supervisor_bluetooth_background(); + bonding_background(); #endif #if CIRCUITPY_DISPLAYIO diff --git a/ports/nrf/common-hal/_bleio/Adapter.c b/ports/nrf/common-hal/_bleio/Adapter.c index cee40a5a0..12d509073 100644 --- a/ports/nrf/common-hal/_bleio/Adapter.c +++ b/ports/nrf/common-hal/_bleio/Adapter.c @@ -32,6 +32,7 @@ #include "ble.h" #include "ble_drv.h" +#include "bonding.h" #include "nrfx_power.h" #include "nrf_nvic.h" #include "nrf_sdm.h" @@ -669,4 +670,5 @@ void bleio_adapter_reset(bleio_adapter_obj_t* adapter) { bleio_connection_internal_t *connection = &connections[i]; connection->connection_obj = mp_const_none; } + bonding_reset(); } diff --git a/ports/nrf/common-hal/_bleio/Characteristic.c b/ports/nrf/common-hal/_bleio/Characteristic.c index f80c52ae4..81639898f 100644 --- a/ports/nrf/common-hal/_bleio/Characteristic.c +++ b/ports/nrf/common-hal/_bleio/Characteristic.c @@ -33,6 +33,7 @@ #include "shared-bindings/_bleio/Service.h" #include "common-hal/_bleio/Adapter.h" +#include "common-hal/_bleio/bonding.h" STATIC uint16_t characteristic_get_cccd(uint16_t cccd_handle, uint16_t conn_handle) { uint16_t cccd; @@ -92,9 +93,11 @@ STATIC bool characteristic_on_ble_evt(ble_evt_t *ble_evt, void *param) { bleio_connection_obj_t *connection = self->service->connection; uint16_t conn_handle = bleio_connection_get_conn_handle(connection); if (conn_handle != BLE_CONN_HANDLE_INVALID && - connection->pairing_status == PAIR_PAIRED && - ble_evt->gatts_evt.params.write.handle == self->cccd_handle) { - bonding_save_cccd_later(connection->is_central, conn_handle, connection->ediv); + common_hal_bleio_connection_get_paired(connection) && + ble_evt->evt.gatts_evt.params.write.handle == self->cccd_handle) { + bonding_save_cccd_info( + connection->connection->is_central, conn_handle, connection->connection->ediv); + } } break; } diff --git a/ports/nrf/common-hal/_bleio/Connection.c b/ports/nrf/common-hal/_bleio/Connection.c index 725a9a11a..6c49823c2 100644 --- a/ports/nrf/common-hal/_bleio/Connection.c +++ b/ports/nrf/common-hal/_bleio/Connection.c @@ -47,6 +47,8 @@ #include "shared-bindings/_bleio/Service.h" #include "shared-bindings/_bleio/UUID.h" +#include "common-hal/_bleio/bonding.h" + #define BLE_ADV_LENGTH_FIELD_SIZE 1 #define BLE_ADV_AD_TYPE_FIELD_SIZE 1 #define BLE_AD_TYPE_FLAGS_DATA_SIZE 1 @@ -212,7 +214,7 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { ble_gap_evt_auth_status_t* status = &ble_evt->evt.gap_evt.params.auth_status; self->sec_status = status->auth_status; if (status->auth_status == BLE_GAP_SEC_STATUS_SUCCESS) { - self->ediv = bonding_keys->own_enc.master_id.ediv; + self->ediv = self->bonding_keys.own_enc.master_id.ediv; self->pair_status = PAIR_PAIRED; bonding_save_keys(self->is_central, self->conn_handle, &self->bonding_keys); } else { @@ -227,13 +229,12 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { // - Else return NULL --> Initiate key exchange ble_gap_evt_sec_info_request_t* sec_info_request = &ble_evt->evt.gap_evt.params.sec_info_request; (void) sec_info_request; - bond_keys bond_keys_t; if ( bonding_load_keys(self->is_central, sec_info_request->master_id.ediv, &self->bonding_keys) ) { - sd_ble_gap_sec_info_reply(self->conn_handle + sd_ble_gap_sec_info_reply(self->conn_handle, &self->bonding_keys.own_enc.enc_info, &self->bonding_keys.peer_id.id_info, NULL); - self->ediv = bond_keys.own_enc.master_id.ediv; + self->ediv = self->bonding_keys.own_enc.master_id.ediv; } else { sd_ble_gap_sec_info_reply(self->conn_handle, NULL, NULL, NULL); } @@ -249,12 +250,10 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { // mode >=1 and/or level >=1 means encryption is set up self->pair_status = PAIR_NOT_PAIRED; } else { - uint8_t *sys_attr; - uint16_t sys_attr_len; - if (bonding_load_cccd_info(self->is_central, self->conn_handle, self->ediv, sys_attr, sys_attr_len)) { - sd_ble_gatts_sys_attr_set(self->conn_handle, sys_attr, sys_attr_len, SVC_CONTEXT_FLAG); - // Not quite paired yet: wait for BLE_GAP_EVT_AUTH_STATUS SUCCESS. - self->ediv = self->bonding_keys.own_enc.master_id.ediv; + // Does an sd_ble_gatts_sys_attr_set() with the stored values. + if (bonding_load_cccd_info(self->is_central, self->conn_handle, self->ediv)) { + // Not quite paired yet: wait for BLE_GAP_EVT_AUTH_STATUS SUCCESS. + self->ediv = self->bonding_keys.own_enc.master_id.ediv; } else { // No matching bonding found, so use fresh system attributes. sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); @@ -263,10 +262,6 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { break; } - case BLE_GATTS_EVT_WRITE: { - if (self->pair_status == PAIR_PAIRED) && - - default: return false; } @@ -278,7 +273,7 @@ void bleio_connection_clear(bleio_connection_internal_t *self) { self->conn_handle = BLE_CONN_HANDLE_INVALID; self->pair_status = PAIR_NOT_PAIRED; - bonding_clear_keys(self); + bonding_clear_keys(&self->bonding_keys); } bool common_hal_bleio_connection_get_paired(bleio_connection_obj_t *self) { diff --git a/ports/nrf/common-hal/_bleio/__init__.h b/ports/nrf/common-hal/_bleio/__init__.h index ecacf7c85..e216795fc 100644 --- a/ports/nrf/common-hal/_bleio/__init__.h +++ b/ports/nrf/common-hal/_bleio/__init__.h @@ -30,9 +30,9 @@ void bleio_reset(void); typedef struct { - ble_gap_enc_key_t own_enc; - ble_gap_enc_key_t peer_enc; - ble_gap_id_key_t peer_id; + ble_gap_enc_key_t own_enc; + ble_gap_enc_key_t peer_enc; + ble_gap_id_key_t peer_id; } bonding_keys_t; // We assume variable length data. diff --git a/ports/nrf/common-hal/_bleio/bonding.c b/ports/nrf/common-hal/_bleio/bonding.c index c717d0816..1675ade43 100644 --- a/ports/nrf/common-hal/_bleio/bonding.c +++ b/ports/nrf/common-hal/_bleio/bonding.c @@ -34,6 +34,9 @@ #include "shared-bindings/_bleio/Adapter.h" #include "shared-bindings/nvm/ByteArray.h" +#include "nrf_nvmc.h" +#include "sd_mutex.h" + #include "bonding.h" // Internal flash area reserved for bonding storage. @@ -42,97 +45,64 @@ // First and last four bytes are magic bytes for id and version. Start data after that. // 'BD01' -const uint32_t BONDING_START_FLAG ('1' | '0' << 8 | 'D' << 16 | 'B' << 24); +const uint32_t BONDING_START_FLAG = ('1' | '0' << 8 | 'D' << 16 | 'B' << 24); // 'ED01' -const uint32_t BONDING_END_FLAG ('1' | '0' << 8 | 'D' << 16 | 'E' << 24); +const uint32_t BONDING_END_FLAG = ('1' | '0' << 8 | 'D' << 16 | 'E' << 24); -#define BONDING_DATA_START_ADDR (BONDING_DATA_START_ADDR + sizeof(BONDING_START_BYTES)) -#define BONDING_DATA_END_ADDR (BONDING_PAGES_END_ADDR - sizeof(BONDING_END_BYTES)) +#define BONDING_DATA_START_ADDR (BONDING_PAGES_START_ADDR + sizeof(BONDING_START_FLAG)) +#define BONDING_DATA_END_ADDR (BONDING_PAGES_END_ADDR - sizeof(BONDING_END_FLAG)) -#define BONDING_START_FLAG_ADDR BONDING_DATA_START_ADDR +#define BONDING_START_FLAG_ADDR BONDING_PAGES_START_ADDR #define BONDING_END_FLAG_ADDR BONDING_DATA_END_ADDR -// Bonding data is stored in variable-length blocks consecutively in erased flash. -// The blocks are 32-bit aligned, though the data may be any number of bytes. -// You can hop through the blocks using the size field to find the next block. -// When you hit a word that is all one's, you have reached the end of the blocks. -// You can write a new block there. - -typdef enum { - BLOCK_INVALID = 0, // Ignore this block - BLOCK_KEYS = 1, // Block contains bonding keys. - BLOCK_SYS_ATTR = 2, // Block contains sys_attr values (CCCD settings, etc.). - BLOCK_UNUSED = 0xff, // Initial erased value. -} bonding_block_type_t; - -typedef struct { - uint16_t central:1; // 1 if data is for a central role. - uint16_t reserved: 7; // Not currently used - bonding_block_type_t type: 8; // What kind of data is stored in. - uint16_t ediv; // ediv value; used as a lookup key. - uint32_t data_length; // Length of data in bytes, including ediv, not including padding. - // data_length only needs to be 16 bits, but easier to write a word at a time. - uint8_t data[]; // Rest of data in the block. Needs to be 32-bit aligned. - // Block is padded to 32-bit alignment. -} bonding_block_t; - -STATIC inline size_t bonding_block_size(uint16_t data_length) { - // Round data size up to the nearest 32-bit address. - return sizeof(bonding_block_t) + ((data_length + 3) & 0x3); +// Save both system and user service info. +#define SYS_ATTR_FLAGS (BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS | BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS) +STATIC bonding_block_t *bonding_unused_block = NULL; +nrf_mutex_t queued_bonding_block_list_mutex; -void bonding_clear_keys(bonding_keys_t *bonding_keys) { - memset(bonding_keys, 0, sizeof(bonding_keys)); +STATIC inline size_t compute_block_size(uint16_t data_length) { + // Round data size up to the nearest 32-bit address. + return sizeof(bonding_block_t) + ((data_length + 3) & 0x3); } -STATIC void bonding_erase_storage(void) { +STATIC void erase_bonding_storage(void) { // Erase all pages in the bonding area. + BONDING_DEBUG_PRINTF("erase_bonding_storage()\n"); for(uint32_t page_address = BONDING_PAGES_START_ADDR; page_address < BONDING_PAGES_END_ADDR; - page_address += FLASH_PAGE) { + page_address += FLASH_PAGE_SIZE) { nrf_nvmc_page_erase(page_address); } // Write marker words at the beginning and the end of the bonding area. nrf_nvmc_write_word(BONDING_DATA_START_ADDR, BONDING_START_FLAG_ADDR); nrf_nvmc_write_word(BONDING_DATA_END_ADDR, BONDING_END_FLAG_ADDR); // First unused block is at the beginning. - bonding_unused_block = BONDING_DATA_START_ADDR; -} - -STATIC bonding_block_t *bonding_unused_block = NULL; - -void bonding_init(void) { - if (BONDING_START_BYTES != *((uint32_t *) BONDING_START_FLAG_ADDR) || - BONDING_END_BYTES != *((uint32_t *) BONDING_END_FLAG_ADDR)) { - bonding_erase_storage(); - } else { - bonding_unused_block = bonding_find_block(BLOCK_UNUSED, EDIV_INVALID); - } + bonding_unused_block = (bonding_block_t *) BONDING_DATA_START_ADDR; } // Given NULL to start or block address, return the address of the next valid block. // The last block returned is the unused block at the end. // Return NULL if we have run off the end of the bonding space. -STATIC bonding_block_t *bonding_next_block(bonding_block_t *block) { +STATIC bonding_block_t *next_block(bonding_block_t *block) { while (1) { // Advance to next block. if (block == NULL) { // Return first block (which might be unused if block list is empty). - return BONDING_DATA_START_ADDR; + return (bonding_block_t *) BONDING_DATA_START_ADDR; } else if (block->type == BLOCK_UNUSED) { // Already at last block (the unused block). return NULL; } // Advance to next block. - block += (bonding_block_t *) ((uint8_t *) block + bonding_block_word_size(block->data_length)); + block = (bonding_block_t *) ((uint8_t *) block + compute_block_size(block->data_length)); - } if (block >= (bonding_block_t *) BONDING_DATA_END_ADDR) { // Went past end of bonding space. return NULL; } - if (block.valid) { + if (block->type != BLOCK_INVALID) { // Found an empty or a valid block. return block; } @@ -143,17 +113,19 @@ STATIC bonding_block_t *bonding_next_block(bonding_block_t *block) { // Find the block with given type and ediv value. // If type == BLOCK_UNUSED, ediv is ignored and the the sole unused block at the end is returned. // If not found, return NULL. -STATIC bonding_block_t *bonding_find_block(bonding_block_type_t type, uint16_t ediv) { +STATIC bonding_block_t *find_block(bool is_central, bonding_block_type_t type, uint16_t ediv) { bonding_block_t *block = NULL; while (1) { - block = bonding_next_block(block); + block = next_block(block); if (block == NULL) { return NULL; } - if (block.type == BLOCK_UNUSED) { + if (block->type == BLOCK_UNUSED) { return block; } - if (type == block.type && ediv = block.ediv) { + if (is_central == block->is_central && + type == block->type && + ediv == block->ediv) { return block; } } @@ -161,80 +133,207 @@ STATIC bonding_block_t *bonding_find_block(bonding_block_type_t type, uint16_t e // Set the header word to all 0's, to mark the block as invalid. // We don't change data_length, so we can still skip over this block. -STATIC void bonding_invalidate_block(bonding_block_t *block) { - nrf_nvmc_write_word((uint32_t) bonding_unused_block, 0x00000000); +STATIC void invalidate_block(bonding_block_t *block) { + BONDING_DEBUG_PRINTF("invalidate_block()\n"); + nrf_nvmc_write_word((uint32_t) block, 0x00000000); } -// Try to write a new block. If no room, erase everything and start again. -// TODO: could do garbage collection instead. -STATIC bool bonding_write_block(bonding_block_type_t type, uint16_t ediv, uint8_t *data, uint16_t data_length) { - size_t block_size = bonding_block_word_size(data_length); - if (block_size > BONDING_DATA_END_ADDR - BONDING_DATA_START_ADDR) { +STATIC void queue_write_block(bool is_central, bonding_block_type_t type, uint16_t ediv, uint16_t conn_handle, uint8_t *data, uint16_t data_length) { + if (compute_block_size(data_length) > BONDING_DATA_END_ADDR - BONDING_DATA_START_ADDR) { // Ridiculous size. - return false; + return; + } + + queued_bonding_block_list_elt_t* queued_elt = + m_malloc_maybe(sizeof(queued_bonding_block_list_elt_t) + data_length, false); + + if (!queued_elt) { + // Failed to allocate. Not much we can do, since this might be during an evt handler. + return; } - // No more room. Erase all existing bonding info and start over. - if (bonding_unused_block == NULL || bonding_unused_block + block_size >= BONDING_DATA_END_ADDR) { - bonding_erase_storage(); + // Add this new element to the front of the list. + sd_mutex_acquire_wait(&queued_bonding_block_list_mutex); + queued_elt->next_queued_block = MP_STATE_VM(queued_bonding_block_list); + MP_STATE_VM(queued_bonding_block_list) = queued_elt; + sd_mutex_release(&queued_bonding_block_list_mutex); + + // + queued_elt->bonding_block.is_central = is_central; + queued_elt->bonding_block.type = type; + queued_elt->bonding_block.ediv = ediv; + queued_elt->bonding_block.conn_handle = conn_handle; + queued_elt->bonding_block.data_length = data_length; + if (data && data_length != 0) { + memcpy(&queued_elt->bonding_block.data, data, data_length); } +} - bonding_block_t block_without_data; - block_without_data.valid = 1; - block_without_data.type = type; - block_without_data.ediv = ediv; - block_without_data.data_length = data_length; +// Write bonding block header. +STATIC void write_block_header(bonding_block_t *block) { + // If no more room, erase all existing blocks and start over. + if (bonding_unused_block == NULL || + (uint8_t *) bonding_unused_block + compute_block_size(block->data_length) >= + (uint8_t *)BONDING_DATA_END_ADDR) { + erase_bonding_storage(); + } - // Write header data. - nrf_nvmc_write_words((uint32_t) bonding_unused_block, (uint32_t *) &block_without_data, - sizeof(block_without_data) / 4); + nrf_nvmc_write_words((uint32_t) bonding_unused_block, (uint32_t *) block, sizeof(bonding_block_t) / 4); +} - // Write variable-length data. +// Write variable-length data at end of bonding block. +STATIC void write_block_data(uint8_t *data, uint16_t data_length) { // Minimize the number of writes. Datasheet says no more than two writes per word before erasing again. - uint32_t *word_p = (uint32_t) bonding_unused_block + sizeof(block_without_data); + + // Start writing after the current header. + uint32_t *flash_word_p = (uint32_t *) ((uint8_t *) bonding_unused_block + sizeof(bonding_block_t)); while (1) { uint32_t word = 0xffffffff; memcpy(&word, data, data_length >= 4 ? 4 : data_length); - nrf_nvmc_write_word(word_p, word); + nrf_nvmc_write_word((uint32_t) flash_word_p, word); if (data_length <= 4) { break; } data_length -= 4; - word_p++; + // Increment by word size. + flash_word_p++; + } + bonding_unused_block = (bonding_block_t *) flash_word_p; +} + +STATIC bool write_sys_attr_block(bonding_block_t *block) { + BONDING_DEBUG_PRINTF("write_sys_attr_block()\n"); + uint16_t length = 0; + // First find out how big a buffer we need, then fetch the data. + if(sd_ble_gatts_sys_attr_get(block->conn_handle, NULL, &length, SYS_ATTR_FLAGS) != NRF_SUCCESS) { + return false; } + + uint8_t sys_attr[length]; + if(sd_ble_gatts_sys_attr_get(block->conn_handle, sys_attr, &length, SYS_ATTR_FLAGS) != NRF_SUCCESS) { + return false; + } + + // Now we know the data size. + block->data_length = length; + write_block_header(block); + write_block_data(sys_attr, length); return true; } +STATIC bool write_keys_block(bonding_block_t *block) { + BONDING_DEBUG_PRINTF("write_keys_block()\n"); + if (block->data_length != sizeof(bonding_keys_t)) { + return false; + } + bonding_keys_t *bonding_keys = (bonding_keys_t *) block->data; + block->ediv = block->is_central + ? bonding_keys->peer_enc.master_id.ediv + : bonding_keys->own_enc.master_id.ediv; -bool bonding_load_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv, - uint8_t **sys_attr, uint16_t *sys_attr_len) { - bonding_block_t *block = bonding_find_matching_block(BLOCK_SYS_ATTR, ediv); - if (block) { - *sys_attr = block.data; - *sys_attr_len = block.data_length; - return true; + write_block_header(block); + write_block_data((uint8_t *) bonding_keys, sizeof(bonding_keys_t)); + return true; +} + + +void bonding_clear_keys(bonding_keys_t *bonding_keys) { + memset((uint8_t*) bonding_keys, 0, sizeof(bonding_keys_t)); +} + +void bonding_reset(void) { + BONDING_DEBUG_PRINTF("bonding_reset()\n"); + sd_mutex_new(&queued_bonding_block_list_mutex); + if (BONDING_START_FLAG != *((uint32_t *) BONDING_START_FLAG_ADDR) || + BONDING_END_FLAG != *((uint32_t *) BONDING_END_FLAG_ADDR)) { + erase_bonding_storage(); } else { + bonding_unused_block = find_block(true, BLOCK_UNUSED, EDIV_INVALID); + } +} + +// Write bonding blocks to flash. These have been queued during event handlers. +// We do one at a time, on each background call. +void bonding_background(void) { + + // Get block at front of list. + sd_mutex_acquire_wait(&queued_bonding_block_list_mutex); + bonding_block_t *block = &(MP_STATE_VM(queued_bonding_block_list)->bonding_block); + if (block) { + // Remove written block from front of list. + MP_STATE_VM(queued_bonding_block_list) = MP_STATE_VM(queued_bonding_block_list)->next_queued_block; + } + sd_mutex_release(&queued_bonding_block_list_mutex); + + if (!block) { + // No blocks in queue. + return; + } + + // Is there an existing block whose keys match? + bonding_block_t *matching_block = find_block(block->is_central, block->type, block->ediv); + if (matching_block) { + if (block->data_length == matching_block->data_length && + memcmp(block->data, matching_block->data, block->data_length) == 0) { + // Identical block found. No need to store again. + BONDING_DEBUG_PRINTF("bonding_background(): identical block found\n"); + return; + } + // Block keys match but data doesn't. Invalidate block and store a new one. + BONDING_DEBUG_PRINTF("bonding_background(): invalidating block\n"); + invalidate_block(matching_block); + } + + switch (block->type) { + case BLOCK_SYS_ATTR: + write_sys_attr_block(block); + break; + + case BLOCK_KEYS: + write_keys_block(block); + break; + + default: + break; + } +} + +bool bonding_load_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv) { + bonding_block_t *block = find_block(is_central, BLOCK_SYS_ATTR, ediv); + if (block == NULL) { + BONDING_DEBUG_PRINTF("bonding_load_cccd_info(): block not found\n"); return false; } + + BONDING_DEBUG_PRINTF("bonding_load_cccd_info(): block found\n"); + return NRF_SUCCESS == + sd_ble_gatts_sys_attr_set(conn_handle, block->data, block->data_length, SYS_ATTR_FLAGS); } bool bonding_load_keys(bool is_central, uint16_t ediv, bonding_keys_t *bonding_keys) { - bonding_block_t *block = bonding_find_matching_block(BLOCK_SYS_ATTR, ediv); - if (block) { - memcpy(bonding_keys, block.data, block.data_length); - return true; - } else { + bonding_block_t *block = find_block(is_central, BLOCK_SYS_ATTR, ediv); + if (block == NULL) { + BONDING_DEBUG_PRINTF("bonding_load_keys(): block not found\n"); + return false; + } + if (sizeof(bonding_keys_t) != block->data_length) { + // bonding_keys_t is a fixed length, so lengths should match. return false; } + + BONDING_DEBUG_PRINTF("bonding_load_keys(): block found\n"); + memcpy(bonding_keys, block->data, block->data_length); + return true; } -bool bonding_save_cccd_info_later(bool is_central, uint16_t conn_handle, uint16_t ediv, uint8_t *sys_attr, uint16_t sys_attr_len) { - // save in id role/ediv - // sys_attr +void bonding_save_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv) { + queue_write_block(is_central, ediv, conn_handle, BLOCK_SYS_ATTR, NULL, 0); +} -bool bonding_save_keys(bool is_central, uint16_t conn_handle, bonding_keys_t *bonding_keys) { - // save in id role/ediv: - // bonding keys - // peer name, or if no name, then human-readable address +void bonding_save_keys(bool is_central, uint16_t conn_handle, bonding_keys_t *bonding_keys) { + uint16_t const ediv = is_central + ? bonding_keys->peer_enc.master_id.ediv + : bonding_keys->own_enc.master_id.ediv; + queue_write_block(is_central, BLOCK_KEYS, ediv, conn_handle, (uint8_t *) bonding_keys, sizeof(bonding_keys_t)); } diff --git a/ports/nrf/common-hal/_bleio/bonding.h b/ports/nrf/common-hal/_bleio/bonding.h index 906d9d194..1b0083865 100644 --- a/ports/nrf/common-hal/_bleio/bonding.h +++ b/ports/nrf/common-hal/_bleio/bonding.h @@ -24,20 +24,64 @@ * THE SOFTWARE. */ +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_BONDING_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_BONDING_H + #include #include #include #include "ble.h" #include "ble_drv.h" -#include "shared-bindings/_bleio/__init__.h" -#include "shared-bindings/_bleio/Adapter.h" -#include "shared-bindings/nvm/ByteArray.h" +#include "common-hal/_bleio/__init__.h" #define EDIV_INVALID (0xffff) +#define BONDING_DEBUG (1) +#if BONDING_DEBUG + #define BONDING_DEBUG_PRINTF(...) printf(__VA_ARGS__) +#else + #define BONDING_DEBUG_PRINTF(...) +#endif + +// Bonding data is stored in variable-length blocks consecutively in erased flash. +// The blocks are 32-bit aligned, though the data may be any number of bytes. +// You can hop through the blocks using the size field to find the next block. +// When you hit a word that is all one's, you have reached the end of the blocks. +// You can write a new block there. + +typedef enum { + BLOCK_INVALID = 0, // Ignore this block + BLOCK_KEYS = 1, // Block contains bonding keys. + BLOCK_SYS_ATTR = 2, // Block contains sys_attr values (CCCD settings, etc.). + BLOCK_UNUSED = 0xff, // Initial erased value. +} bonding_block_type_t; + +typedef struct { + bool is_central: 1; // 1 if data is for a central role. + uint16_t reserved: 7; // Not currently used + bonding_block_type_t type: 8; // What kind of data is stored in. + uint16_t ediv; // ediv value; used as a lookup key. + uint16_t conn_handle; // Connection handle: used when a BLOCK_SYS_ATTR is queued to write. + // Not used as a key, etc. + uint16_t data_length; // Length of data in bytes, including ediv, not including padding. + // 32-bit boundary here. + uint8_t data[]; // Rest of data in the block. Needs to be 32-bit aligned. + // Block is padded to 32-bit alignment. +} bonding_block_t; + +// Bonding blocks that need to be written are stored in a linked list. +typedef struct _queued_bonding_block_list_elt_t { + struct _queued_bonding_block_list_elt_t *next_queued_block; + bonding_block_t bonding_block; // variable length, based on data_length. +} queued_bonding_block_list_elt_t; + +void bonding_background(void); +void bonding_reset(void); void bonding_clear_keys(bonding_keys_t *bonding_keys); bool bonding_load_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv); bool bonding_load_keys(bool is_central, uint16_t ediv, bonding_keys_t *bonding_keys); -bool bonding_save_cccd_info_later(bool is_central, uint16_t conn_handle, uint16_t ediv, uint8_t *sys_attr, uint16_t sys_attr_len); -bool bonding_save_keys(bool is_central, uint16_t conn_handle, bonding_keys_t *bonding_keys); +void bonding_save_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv); +void bonding_save_keys(bool is_central, uint16_t conn_handle, bonding_keys_t *bonding_keys); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_BONDING_H diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h index cb25870dc..14f7632fd 100644 --- a/ports/nrf/mpconfigport.h +++ b/ports/nrf/mpconfigport.h @@ -29,6 +29,7 @@ #define NRF5_MPCONFIGPORT_H__ #include "ble_drv.h" +#include "common-hal/_bleio/bonding.h" #include "nrf_mbr.h" // for MBR_SIZE #include "nrf_sdm.h" // for SD_FLASH_SIZE @@ -152,10 +153,10 @@ #endif - - #define MICROPY_PORT_ROOT_POINTERS \ CIRCUITPY_COMMON_ROOT_POINTERS \ ble_drv_evt_handler_entry_t* ble_drv_evt_handler_entries; \ + queued_bonding_block_list_elt_t* queued_bonding_block_list; \ + #endif // NRF5_MPCONFIGPORT_H__ -- cgit v1.2.3 From 7198cc8ed6d079aa54fa975b6c781c865271c136 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 6 Jan 2020 11:30:10 -0500 Subject: Changes to UF2 settings, reboot working, no usb --- ports/stm32f4/Makefile | 4 ++-- ports/stm32f4/boards/STM32F401_boot.ld | 2 +- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 8 ++++---- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 18 +++++++++--------- 4 files changed, 16 insertions(+), 16 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index 2727ea954..6c5190668 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -22,7 +22,7 @@ # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN # THE SOFTWARE. -DEBUG = 1 +#DEBUG = 1 # Select the board to build for. ifeq ($(BOARD),) @@ -256,7 +256,7 @@ $(BUILD)/firmware.hex: $(BUILD)/firmware.elf $(BUILD)/firmware.uf2: $(BUILD)/firmware.hex $(ECHO) "Create $@" - $(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0xADA52840 -c -o "$(BUILD)/firmware.uf2" $^ + $(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0x57755a57 -b 0x08010000 -c -o "$(BUILD)/firmware.uf2" $^ include $(TOP)/py/mkrules.mk diff --git a/ports/stm32f4/boards/STM32F401_boot.ld b/ports/stm32f4/boards/STM32F401_boot.ld index 64f78451a..ffdd7097c 100644 --- a/ports/stm32f4/boards/STM32F401_boot.ld +++ b/ports/stm32f4/boards/STM32F401_boot.ld @@ -8,7 +8,7 @@ MEMORY FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */ FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K + RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 } /* produce a link error if there is not this amount of RAM for these sections */ diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index e97d793be..0371685d8 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -39,7 +39,7 @@ #define BOARD_NO_VBUS_SENSE // On-board flash -// #define SPI_FLASH_MOSI_PIN (&pin_PB15) -// #define SPI_FLASH_MISO_PIN (&pin_PB14) -// #define SPI_FLASH_SCK_PIN (&pin_PB13) -// #define SPI_FLASH_CS_PIN (&pin_PB01) +#define SPI_FLASH_MOSI_PIN (&pin_PB15) +#define SPI_FLASH_MISO_PIN (&pin_PB14) +#define SPI_FLASH_SCK_PIN (&pin_PB13) +#define SPI_FLASH_CS_PIN (&pin_PB01) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index 1642120e8..e40f9d80c 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -2,21 +2,21 @@ USB_VID = 0x239A USB_PID = 0x805A USB_PRODUCT = "Meowbit" USB_MANUFACTURER = "Kittenbot" -USB_DEVICES = "CDC,MSC" +USB_DEVICES = "CDC" -# SPI_FLASH_FILESYSTEM = 1 -# EXTERNAL_FLASH_DEVICE_COUNT = 1 -# EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ -# LONGINT_IMPL = MPZ +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ +LONGINT_IMPL = MPZ -INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE +# INTERNAL_FLASH_FILESYSTEM = 1 +# LONGINT_IMPL = NONE MCU_SERIES = m4 MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE -LD_FILE = boards/STM32F401_fs.ld +LD_FILE = boards/STM32F401_boot.ld #STM32F401_fs.ld TEXT0_ADDR = 0x08010000 -TEXT1_ADDR = 0x08020000 \ No newline at end of file +TEXT1_ADDR = 0x08040000 \ No newline at end of file -- cgit v1.2.3 From 0bbeae1786ed4c1527733ed625c0ec0dd3bb2838 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 6 Jan 2020 15:37:37 -0500 Subject: WIP edits --- ports/stm32f4/Makefile | 4 ++-- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 5 +++-- 2 files changed, 5 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index 6c5190668..93cde6737 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -22,7 +22,7 @@ # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN # THE SOFTWARE. -#DEBUG = 1 +DEBUG = 1 # Select the board to build for. ifeq ($(BOARD),) @@ -256,7 +256,7 @@ $(BUILD)/firmware.hex: $(BUILD)/firmware.elf $(BUILD)/firmware.uf2: $(BUILD)/firmware.hex $(ECHO) "Create $@" - $(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0x57755a57 -b 0x08010000 -c -o "$(BUILD)/firmware.uf2" $^ + $(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0x57755a57 -b 0x08000000 -c -o "$(BUILD)/firmware.uf2" $^ include $(TOP)/py/mkrules.mk diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index e40f9d80c..73f1d722a 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -2,7 +2,7 @@ USB_VID = 0x239A USB_PID = 0x805A USB_PRODUCT = "Meowbit" USB_MANUFACTURER = "Kittenbot" -USB_DEVICES = "CDC" +USB_DEVICES = "CDC,MSC" SPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 @@ -17,6 +17,7 @@ MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE -LD_FILE = boards/STM32F401_boot.ld #STM32F401_fs.ld +# LD_FILE = boards/STM32F401_boot.ld +LD_FILE = boards/STM32F401_fs.ld TEXT0_ADDR = 0x08010000 TEXT1_ADDR = 0x08040000 \ No newline at end of file -- cgit v1.2.3 From b778aee21d7facb8ced147086a2bc5225a319d80 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 6 Jan 2020 17:08:52 -0500 Subject: Make inclusion non-conditional --- ports/stm32f4/mpconfigport.mk | 2 -- 1 file changed, 2 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/mpconfigport.mk b/ports/stm32f4/mpconfigport.mk index 42f390572..48bd3ad61 100644 --- a/ports/stm32f4/mpconfigport.mk +++ b/ports/stm32f4/mpconfigport.mk @@ -69,9 +69,7 @@ ifndef CIRCUITPY_DISPLAYIO CIRCUITPY_DISPLAYIO = 1 endif -ifndef MICROPY_CPYTHON_COMPAT MICROPY_CPYTHON_COMPAT = 1 -endif #ifeq ($(MCU_SUB_VARIANT), stm32f412zx) #endif -- cgit v1.2.3 From 6ab75fe8c5e2e4ca930323f0e1e8ef0fcf009627 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Tue, 7 Jan 2020 13:19:00 -0500 Subject: Allow MOSI/MISO exclusion --- ports/stm32f4/common-hal/busio/SPI.c | 143 +++++++++++++++++++++++------------ 1 file changed, 95 insertions(+), 48 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index 32089887f..fe2041683 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -36,6 +36,9 @@ #include "supervisor/shared/translate.h" #include "common-hal/microcontroller/Pin.h" +// Note that any bugs introduced in this file can cause crashes at startup +// for chips using external SPI flash. + #define MAX_SPI 6 //TODO; replace this as part of periph cleanup #define ALL_CLOCKS 0xFF @@ -79,38 +82,80 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, uint8_t sck_len = sizeof(mcu_spi_sck_list)/sizeof(*mcu_spi_sck_list); uint8_t mosi_len = sizeof(mcu_spi_mosi_list)/sizeof(*mcu_spi_mosi_list); uint8_t miso_len = sizeof(mcu_spi_miso_list)/sizeof(*mcu_spi_miso_list); - bool spi_taken = false; - //sck + + //sck is not optional. MOSI and MISO are for(uint i=0; isck = &mcu_spi_sck_list[i]; + self->mosi = &mcu_spi_mosi_list[j]; + self->miso = &mcu_spi_miso_list[k]; + break; } - //store pins if not - self->sck = &mcu_spi_sck_list[i]; - self->mosi = &mcu_spi_mosi_list[j]; - self->miso = &mcu_spi_miso_list[k]; - break; - } - } + } + } } + // if just miso, reduce search + } else if (miso != mp_const_none) { + for(uint j=0; jsck = &mcu_spi_sck_list[i]; + self->mosi = NULL; + self->miso = &mcu_spi_miso_list[j]; + break; + } + } + // if just mosi, reduce search + } else if (mosi != mp_const_none) { + for(uint j=0; jsck = &mcu_spi_sck_list[i]; + self->mosi = &mcu_spi_mosi_list[j]; + self->miso = NULL; + break; + } + } + } else { + //throw an error immediately + mp_raise_ValueError(translate("Must provide MISO or MOSI pin")); } } } //handle typedef selection, errors - if(self->sck!=NULL && self->mosi!=NULL && self->miso!=NULL ) { + if( (self->sck!=NULL && self->mosi!=NULL && self->miso != NULL) || + (self->sck!=NULL && self->mosi!=NULL && miso == mp_const_none) || + (self->sck!=NULL && self->miso!=NULL && mosi == mp_const_none)) { SPIx = mcu_spi_banks[self->sck->spi_index-1]; } else { if (spi_taken) { @@ -129,26 +174,31 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, GPIO_InitStruct.Alternate = self->sck->altfn_index; HAL_GPIO_Init(pin_port(sck->port), &GPIO_InitStruct); - GPIO_InitStruct.Pin = pin_mask(mosi->number); - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = self->mosi->altfn_index; - HAL_GPIO_Init(pin_port(mosi->port), &GPIO_InitStruct); + if (self->mosi != NULL) { + GPIO_InitStruct.Pin = pin_mask(mosi->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->mosi->altfn_index; + HAL_GPIO_Init(pin_port(mosi->port), &GPIO_InitStruct); + } - GPIO_InitStruct.Pin = pin_mask(miso->number); - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = self->miso->altfn_index; - HAL_GPIO_Init(pin_port(miso->port), &GPIO_InitStruct); + if (self->miso != NULL) { + GPIO_InitStruct.Pin = pin_mask(miso->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->miso->altfn_index; + HAL_GPIO_Init(pin_port(miso->port), &GPIO_InitStruct); + } spi_clock_enable(1<<(self->sck->spi_index - 1)); reserved_spi[self->sck->spi_index - 1] = true; self->handle.Instance = SPIx; self->handle.Init.Mode = SPI_MODE_MASTER; - self->handle.Init.Direction = SPI_DIRECTION_2LINES; + // Direction change only required for RX only, see RefMan RM0090:884 + self->handle.Init.Direction = (self->mosi == NULL) ? SPI_CR1_RXONLY : SPI_DIRECTION_2LINES; self->handle.Init.DataSize = SPI_DATASIZE_8BIT; self->handle.Init.CLKPolarity = SPI_POLARITY_LOW; self->handle.Init.CLKPhase = SPI_PHASE_1EDGE; @@ -169,8 +219,8 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, self->bits = 8; claim_pin(sck); - claim_pin(mosi); - claim_pin(miso); + if (self->mosi != NULL) claim_pin(mosi); + if (self->miso != NULL) claim_pin(miso); } void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { @@ -178,8 +228,8 @@ void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { if (mcu_spi_banks[i] == self->handle.Instance) { never_reset_spi[i] = true; never_reset_pin_number(self->sck->pin->port, self->sck->pin->number); - never_reset_pin_number(self->mosi->pin->port, self->mosi->pin->number); - never_reset_pin_number(self->miso->pin->port, self->miso->pin->number); + if (self->mosi != NULL) never_reset_pin_number(self->mosi->pin->port, self->mosi->pin->number); + if (self->miso != NULL) never_reset_pin_number(self->miso->pin->port, self->miso->pin->number); break; } } @@ -195,8 +245,8 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { never_reset_spi[self->sck->spi_index - 1] = false; reset_pin_number(self->sck->pin->port,self->sck->pin->number); - reset_pin_number(self->mosi->pin->port,self->mosi->pin->number); - reset_pin_number(self->miso->pin->port,self->miso->pin->number); + if (self->mosi != NULL) reset_pin_number(self->mosi->pin->port,self->mosi->pin->number); + if (self->miso != NULL) reset_pin_number(self->miso->pin->port,self->miso->pin->number); self->sck = mp_const_none; self->mosi = mp_const_none; self->miso = mp_const_none; @@ -243,13 +293,6 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self, self->handle.Init.BaudRatePrescaler = stm32_baud_to_spi_div(baudrate, &self->prescaler, get_busclock(self->handle.Instance)); - self->handle.Init.Mode = SPI_MODE_MASTER; - self->handle.Init.Direction = SPI_DIRECTION_2LINES; - self->handle.Init.NSS = SPI_NSS_SOFT; - self->handle.Init.FirstBit = SPI_FIRSTBIT_MSB; - self->handle.Init.TIMode = SPI_TIMODE_DISABLE; - self->handle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - self->handle.Init.CRCPolynomial = 10; if (HAL_SPI_Init(&self->handle) != HAL_OK) { @@ -292,18 +335,22 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { + if (self->mosi == NULL) mp_raise_ValueError(translate("No MOSI Pin")); HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, HAL_MAX_DELAY); return result == HAL_OK; } bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { + if (self->miso == NULL) mp_raise_ValueError(translate("No MISO Pin")); HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, HAL_MAX_DELAY); return result == HAL_OK; } bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { + if (self->miso == NULL) mp_raise_ValueError(translate("No MISO Pin")); + if (self->mosi == NULL) mp_raise_ValueError(translate("No MOSI Pin")); HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle, data_out, data_in, (uint16_t)len,HAL_MAX_DELAY); return result == HAL_OK; -- cgit v1.2.3 From d645ea222d121fef0d82be309f917ea856eef030 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Tue, 7 Jan 2020 13:25:24 -0500 Subject: Text fixes for consistency --- ports/stm32f4/common-hal/busio/SPI.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index fe2041683..d1218c9ab 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -84,15 +84,15 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, uint8_t miso_len = sizeof(mcu_spi_miso_list)/sizeof(*mcu_spi_miso_list); bool spi_taken = false; - //sck is not optional. MOSI and MISO are + //SCK is not optional. MOSI and MISO are for(uint i=0; ihandle.Instance = SPIx; self->handle.Init.Mode = SPI_MODE_MASTER; - // Direction change only required for RX only, see RefMan RM0090:884 + // Direction change only required for RX-only, see RefMan RM0090:884 self->handle.Init.Direction = (self->mosi == NULL) ? SPI_CR1_RXONLY : SPI_DIRECTION_2LINES; self->handle.Init.DataSize = SPI_DATASIZE_8BIT; self->handle.Init.CLKPolarity = SPI_POLARITY_LOW; -- cgit v1.2.3 From 3d5528b88f07b3ebb621d2c525bff3cadc3232b4 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 8 Jan 2020 10:53:53 -0500 Subject: style edits --- ports/stm32f4/common-hal/busio/SPI.c | 65 +++++++++++++++++++++++------------- 1 file changed, 42 insertions(+), 23 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index d1218c9ab..deacedb50 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -52,10 +52,10 @@ STATIC void spi_clock_disable(uint8_t mask); STATIC uint32_t get_busclock(SPI_TypeDef * instance) { //SPI2 and 3 are on PCLK1, if they exist. #ifdef SPI2 - if(instance == SPI2) return HAL_RCC_GetPCLK1Freq(); + if (instance == SPI2) return HAL_RCC_GetPCLK1Freq(); #endif #ifdef SPI3 - if(instance == SPI3) return HAL_RCC_GetPCLK1Freq(); + if (instance == SPI3) return HAL_RCC_GetPCLK1Freq(); #endif return HAL_RCC_GetPCLK2Freq(); } @@ -85,20 +85,20 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, bool spi_taken = false; //SCK is not optional. MOSI and MISO are - for(uint i=0; isck!=NULL && self->mosi!=NULL && self->miso != NULL) || + if ( (self->sck!=NULL && self->mosi!=NULL && self->miso != NULL) || (self->sck!=NULL && self->mosi!=NULL && miso == mp_const_none) || (self->sck!=NULL && self->miso!=NULL && mosi == mp_const_none)) { SPIx = mcu_spi_banks[self->sck->spi_index-1]; @@ -219,17 +219,25 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, self->bits = 8; claim_pin(sck); - if (self->mosi != NULL) claim_pin(mosi); - if (self->miso != NULL) claim_pin(miso); + if (self->mosi != NULL) { + claim_pin(mosi); + } + if (self->miso != NULL) { + claim_pin(miso); + } } void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { - for(size_t i = 0 ; i < MP_ARRAY_SIZE(mcu_spi_banks); i++) { + for (size_t i = 0 ; i < MP_ARRAY_SIZE(mcu_spi_banks); i++) { if (mcu_spi_banks[i] == self->handle.Instance) { never_reset_spi[i] = true; never_reset_pin_number(self->sck->pin->port, self->sck->pin->number); - if (self->mosi != NULL) never_reset_pin_number(self->mosi->pin->port, self->mosi->pin->number); - if (self->miso != NULL) never_reset_pin_number(self->miso->pin->port, self->miso->pin->number); + if (self->mosi != NULL) { + never_reset_pin_number(self->mosi->pin->port, self->mosi->pin->number); + } + if (self->miso != NULL) { + never_reset_pin_number(self->miso->pin->port, self->miso->pin->number); + } break; } } @@ -245,8 +253,12 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { never_reset_spi[self->sck->spi_index - 1] = false; reset_pin_number(self->sck->pin->port,self->sck->pin->number); - if (self->mosi != NULL) reset_pin_number(self->mosi->pin->port,self->mosi->pin->number); - if (self->miso != NULL) reset_pin_number(self->miso->pin->port,self->miso->pin->number); + if (self->mosi != NULL) { + reset_pin_number(self->mosi->pin->port,self->mosi->pin->number); + } + if (self->miso != NULL) { + reset_pin_number(self->miso->pin->port,self->miso->pin->number); + } self->sck = mp_const_none; self->mosi = mp_const_none; self->miso = mp_const_none; @@ -282,7 +294,9 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { //This resets the SPI, so check before updating it redundantly if (baudrate == self->baudrate && polarity== self->polarity - && phase == self->phase && bits == self->bits) return true; + && phase == self->phase && bits == self->bits) { + return true; + } //Deinit SPI HAL_SPI_DeInit(&self->handle); @@ -335,22 +349,27 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { - if (self->mosi == NULL) mp_raise_ValueError(translate("No MOSI Pin")); + if (self->mosi == NULL) { + mp_raise_ValueError(translate("No MOSI Pin")); + } HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, HAL_MAX_DELAY); return result == HAL_OK; } bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { - if (self->miso == NULL) mp_raise_ValueError(translate("No MISO Pin")); + if (self->miso == NULL) { + mp_raise_ValueError(translate("No MISO Pin")); + } HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, HAL_MAX_DELAY); return result == HAL_OK; } bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { - if (self->miso == NULL) mp_raise_ValueError(translate("No MISO Pin")); - if (self->mosi == NULL) mp_raise_ValueError(translate("No MOSI Pin")); + if (self->miso == NULL || self->mosi == NULL) { + mp_raise_ValueError(translate("Missing MISO or MOSI Pin")); + } HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle, data_out, data_in, (uint16_t)len,HAL_MAX_DELAY); return result == HAL_OK; -- cgit v1.2.3 From b3fb0243011a2797ef41c3014c7fcdaca4331765 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Wed, 8 Jan 2020 10:06:55 -0600 Subject: nrf: Call into sd as many times as necessary to fill urandom request Generating 51200 bytes in one go takes 4.966s, so that's a rate of about 10KiB/s. --- ports/nrf/common-hal/os/__init__.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/nrf/common-hal/os/__init__.c b/ports/nrf/common-hal/os/__init__.c index e38226f94..1d89c73b6 100644 --- a/ports/nrf/common-hal/os/__init__.c +++ b/ports/nrf/common-hal/os/__init__.c @@ -31,6 +31,7 @@ #ifdef BLUETOOTH_SD #include "nrf_sdm.h" +#include "tick.h" #endif #include "nrf_rng.h" @@ -66,8 +67,25 @@ bool common_hal_os_urandom(uint8_t *buffer, uint32_t length) { uint8_t sd_en = 0; (void) sd_softdevice_is_enabled(&sd_en); - if (sd_en) - return NRF_SUCCESS == sd_rand_application_vector_get(buffer, length); + if (sd_en) { + while (length != 0) { + uint8_t available = 0; + sd_rand_application_bytes_available_get(&available); + if (available) { + uint32_t request = MIN(length, available); + uint32_t result = sd_rand_application_vector_get(buffer, request); + if (result != NRF_SUCCESS) { + return false; + } + buffer += request; + length -= request; + } else { + RUN_BACKGROUND_TASKS; + tick_delay(500); + } + } + return true; + } #endif nrf_rng_event_clear(NRF_RNG, NRF_RNG_EVENT_VALRDY); -- cgit v1.2.3 From b0f08ba465f2585d03e445b920a86ceda1a20ea5 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 8 Jan 2020 12:32:43 -0500 Subject: Close algorithm edge case to match SPI --- ports/stm32f4/common-hal/busio/I2C.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/busio/I2C.c b/ports/stm32f4/common-hal/busio/I2C.c index d2292845e..dc82c19a0 100644 --- a/ports/stm32f4/common-hal/busio/I2C.c +++ b/ports/stm32f4/common-hal/busio/I2C.c @@ -66,20 +66,26 @@ void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { } } - void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, uint32_t frequency, uint32_t timeout) { //match pins to I2C objects I2C_TypeDef * I2Cx; - uint8_t sda_len = sizeof(mcu_i2c_sda_list)/sizeof(*mcu_i2c_sda_list); uint8_t scl_len = sizeof(mcu_i2c_scl_list)/sizeof(*mcu_i2c_scl_list); + bool i2c_taken = false; + for(uint i=0; iscl = &mcu_i2c_scl_list[j]; self->sda = &mcu_i2c_sda_list[i]; break; @@ -92,11 +98,11 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, if(self->sda!=NULL && self->scl!=NULL ) { I2Cx = mcu_i2c_banks[self->sda->i2c_index-1]; } else { - mp_raise_RuntimeError(translate("Invalid I2C pin selection")); - } - - if(reserved_i2c[self->sda->i2c_index-1]) { - mp_raise_RuntimeError(translate("Hardware busy, try alternative pins")); + if (i2c_taken) { + mp_raise_ValueError(translate("Hardware busy, try alternative pins")); + } else { + mp_raise_ValueError(translate("Invalid I2C pin selection")); + } } //Start GPIO for each pin -- cgit v1.2.3 From 90613aa5fb97344004bd59601dde927d7804702b Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 8 Jan 2020 13:03:25 -0500 Subject: more cleanup and style syncing --- ports/stm32f4/common-hal/busio/I2C.c | 78 +++++++++++++++++++++---------- ports/stm32f4/common-hal/busio/SPI.c | 62 +++++++++++++----------- ports/stm32f4/common-hal/busio/UART.c | 22 ++++++--- ports/stm32f4/common-hal/pulseio/PWMOut.c | 46 ++++++++++-------- 4 files changed, 130 insertions(+), 78 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/busio/I2C.c b/ports/stm32f4/common-hal/busio/I2C.c index dc82c19a0..4aff3b822 100644 --- a/ports/stm32f4/common-hal/busio/I2C.c +++ b/ports/stm32f4/common-hal/busio/I2C.c @@ -35,35 +35,28 @@ #include "supervisor/shared/translate.h" #include "common-hal/microcontroller/Pin.h" -STATIC bool reserved_i2c[3]; -STATIC bool never_reset[3]; +#define MAX_I2C 3 +STATIC bool reserved_i2c[MAX_I2C]; +STATIC bool never_reset_i2c[MAX_I2C]; -void i2c_reset(void) { - //Note: I2Cs are also forcibly reset in construct, due to silicon error - #ifdef I2C1 - reserved_i2c[0] = false; - __HAL_RCC_I2C1_CLK_DISABLE(); - #endif - #ifdef I2C2 - reserved_i2c[1] = false; - __HAL_RCC_I2C2_CLK_DISABLE(); - #endif - #ifdef I2C3 - reserved_i2c[2] = false; - __HAL_RCC_I2C3_CLK_DISABLE(); - #endif -} +#define ALL_CLOCKS 0xFF +STATIC void i2c_clock_enable(uint8_t mask); +STATIC void i2c_clock_disable(uint8_t mask); -void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { - for (size_t i = 0 ; i < MP_ARRAY_SIZE(mcu_i2c_banks); i++) { - if (self->handle.Instance == mcu_i2c_banks[i]) { - never_reset[i] = true; +//-------- +//COMMON HAL +//-------- - never_reset_pin_number(self->scl->pin->port, self->scl->pin->number); - never_reset_pin_number(self->sda->pin->port, self->scl->pin->number); - break; +void i2c_reset(void) { + uint16_t never_reset_mask = 0x00; + for(int i=0;iscl = &mcu_i2c_scl_list[j]; self->sda = &mcu_i2c_sda_list[i]; break; @@ -176,6 +168,18 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, claim_pin(scl); } +void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { + for (size_t i = 0 ; i < MP_ARRAY_SIZE(mcu_i2c_banks); i++) { + if (self->handle.Instance == mcu_i2c_banks[i]) { + never_reset[i] = true; + + never_reset_pin_number(self->scl->pin->port, self->scl->pin->number); + never_reset_pin_number(self->sda->pin->port, self->scl->pin->number); + break; + } + } +} + bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) { return self->sda->pin == mp_const_none; } @@ -252,3 +256,27 @@ uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, uint8_t *data, size_t len) { return HAL_I2C_Master_Receive(&(self->handle), (uint16_t)(addr<<1), data, (uint16_t)len, 500) == HAL_OK ? 0 : MP_EIO; } + +STATIC void i2c_clock_enable(uint8_t mask) { + #ifdef I2C1 + if (mask & 1<<0) __HAL_RCC_I2C1_CLK_ENABLE(); + #endif + #ifdef I2C2 + if (mask & 1<<1) __HAL_RCC_I2C2_CLK_ENABLE(); + #endif + #ifdef I2C3 + if (mask & 1<<2) __HAL_RCC_I2C3_CLK_ENABLE(); + #endif +} + +STATIC void i2c_clock_disable(uint8_t mask) { + #ifdef I2C1 + if (mask & 1<<0) __HAL_RCC_I2C1_CLK_DISABLE(); + #endif + #ifdef I2C2 + if (mask & 1<<1) __HAL_RCC_I2C2_CLK_DISABLE(); + #endif + #ifdef I2C3 + if (mask & 1<<2) __HAL_RCC_I2C3_CLK_DISABLE(); + #endif +} diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index 32089887f..09d382bc0 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -46,6 +46,10 @@ STATIC bool never_reset_spi[MAX_SPI]; STATIC void spi_clock_enable(uint8_t mask); STATIC void spi_clock_disable(uint8_t mask); +//-------- +//STATICS +//-------- + STATIC uint32_t get_busclock(SPI_TypeDef * instance) { //SPI2 and 3 are on PCLK1, if they exist. #ifdef SPI2 @@ -57,11 +61,41 @@ STATIC uint32_t get_busclock(SPI_TypeDef * instance) { return HAL_RCC_GetPCLK2Freq(); } +STATIC uint32_t stm32_baud_to_spi_div(uint32_t baudrate, uint16_t * prescaler, uint32_t busclock) { + static const uint32_t baud_map[8][2] = { + {2,SPI_BAUDRATEPRESCALER_2}, + {4,SPI_BAUDRATEPRESCALER_4}, + {8,SPI_BAUDRATEPRESCALER_8}, + {16,SPI_BAUDRATEPRESCALER_16}, + {32,SPI_BAUDRATEPRESCALER_32}, + {64,SPI_BAUDRATEPRESCALER_64}, + {128,SPI_BAUDRATEPRESCALER_128}, + {256,SPI_BAUDRATEPRESCALER_256} + }; + size_t i = 0; + uint16_t divisor; + do { + divisor = baud_map[i][0]; + if (baudrate >= (busclock/divisor)) { + *prescaler = divisor; + return baud_map[i][1]; + } + i++; + } while (divisor != 256); + //only gets here if requested baud is lower than minimum + *prescaler = 256; + return SPI_BAUDRATEPRESCALER_256; +} + +//-------- +//COMMON HAL +//-------- + void spi_reset(void) { uint16_t never_reset_mask = 0x00; for(int i=0;imiso = mp_const_none; } -STATIC uint32_t stm32_baud_to_spi_div(uint32_t baudrate, uint16_t * prescaler, uint32_t busclock) { - static const uint32_t baud_map[8][2] = { - {2,SPI_BAUDRATEPRESCALER_2}, - {4,SPI_BAUDRATEPRESCALER_4}, - {8,SPI_BAUDRATEPRESCALER_8}, - {16,SPI_BAUDRATEPRESCALER_16}, - {32,SPI_BAUDRATEPRESCALER_32}, - {64,SPI_BAUDRATEPRESCALER_64}, - {128,SPI_BAUDRATEPRESCALER_128}, - {256,SPI_BAUDRATEPRESCALER_256} - }; - size_t i = 0; - uint16_t divisor; - do { - divisor = baud_map[i][0]; - if (baudrate >= (busclock/divisor)) { - *prescaler = divisor; - return baud_map[i][1]; - } - i++; - } while (divisor != 256); - //only gets here if requested baud is lower than minimum - *prescaler = 256; - return SPI_BAUDRATEPRESCALER_256; -} - bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { //This resets the SPI, so check before updating it redundantly diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index aa792dae1..71867ac63 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -47,13 +47,9 @@ STATIC void uart_clock_enable(uint16_t mask); STATIC void uart_clock_disable(uint16_t mask); STATIC void uart_assign_irq(busio_uart_obj_t* self, USART_TypeDef* USARTx); -void uart_reset(void) { - for (uint8_t i = 0; i < MAX_UART; i++) { - reserved_uart[i] = false; - MP_STATE_PORT(cpy_uart_obj_all)[i] = NULL; - } - uart_clock_disable(ALL_UARTS); -} +//-------- +//STATICS +//-------- STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t* self, bool pin_eval, int uart_index, bool uart_taken) { @@ -70,6 +66,18 @@ STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t* self, bool pin_eva } } +//-------- +//COMMON HAL +//-------- + +void uart_reset(void) { + for (uint8_t i = 0; i < MAX_UART; i++) { + reserved_uart[i] = false; + MP_STATE_PORT(cpy_uart_obj_all)[i] = NULL; + } + uart_clock_disable(ALL_UARTS); +} + void common_hal_busio_uart_construct(busio_uart_obj_t* self, const mcu_pin_obj_t* tx, const mcu_pin_obj_t* rx, uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, diff --git a/ports/stm32f4/common-hal/pulseio/PWMOut.c b/ports/stm32f4/common-hal/pulseio/PWMOut.c index 16b1b5b89..2a071d078 100644 --- a/ports/stm32f4/common-hal/pulseio/PWMOut.c +++ b/ports/stm32f4/common-hal/pulseio/PWMOut.c @@ -44,6 +44,10 @@ STATIC bool never_reset_tim[TIM_BANK_ARRAY_LEN]; STATIC void tim_clock_enable(uint16_t mask); STATIC void tim_clock_disable(uint16_t mask); +//-------- +//STATICS +//-------- + // Get the frequency (in Hz) of the source clock for the given timer. // On STM32F405/407/415/417 there are 2 cases for how the clock freq is set. // If the APB prescaler is 1, then the timer clock is equal to its respective @@ -87,6 +91,10 @@ STATIC void timer_get_optimal_divisors(uint32_t*period, uint32_t*prescaler, } } +//-------- +//COMMON HAL +//-------- + void pwmout_reset(void) { uint16_t never_reset_mask = 0x00; for(int i=0;ihandle.Instance) { - never_reset_tim[i] = true; - never_reset_pin_number(self->tim->pin->port, self->tim->pin->number); - break; - } - } -} - -void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) { - for(size_t i = 0 ; i < TIM_BANK_ARRAY_LEN; i++) { - if (mcu_tim_banks[i] == self->handle.Instance) { - never_reset_tim[i] = false; - break; - } - } -} - pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, const mcu_pin_obj_t* pin, uint16_t duty, @@ -241,6 +230,25 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, return PWMOUT_OK; } +void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) { + for(size_t i = 0 ; i < TIM_BANK_ARRAY_LEN; i++) { + if (mcu_tim_banks[i] == self->handle.Instance) { + never_reset_tim[i] = true; + never_reset_pin_number(self->tim->pin->port, self->tim->pin->number); + break; + } + } +} + +void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) { + for(size_t i = 0 ; i < TIM_BANK_ARRAY_LEN; i++) { + if (mcu_tim_banks[i] == self->handle.Instance) { + never_reset_tim[i] = false; + break; + } + } +} + bool common_hal_pulseio_pwmout_deinited(pulseio_pwmout_obj_t* self) { return self->tim == mp_const_none; } -- cgit v1.2.3 From a9633a3c948bdbfa2c43a67ffb7782236a0eda57 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 8 Jan 2020 15:33:35 -0500 Subject: Reorganize I2C workaround, style changes --- ports/stm32f4/common-hal/busio/I2C.c | 83 ++++++++++++----------------------- ports/stm32f4/common-hal/busio/SPI.c | 59 ++++++++++++++++--------- ports/stm32f4/common-hal/busio/UART.c | 48 ++++++++++++-------- 3 files changed, 98 insertions(+), 92 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/busio/I2C.c b/ports/stm32f4/common-hal/busio/I2C.c index 4aff3b822..46c9728a8 100644 --- a/ports/stm32f4/common-hal/busio/I2C.c +++ b/ports/stm32f4/common-hal/busio/I2C.c @@ -43,10 +43,6 @@ STATIC bool never_reset_i2c[MAX_I2C]; STATIC void i2c_clock_enable(uint8_t mask); STATIC void i2c_clock_disable(uint8_t mask); -//-------- -//COMMON HAL -//-------- - void i2c_reset(void) { uint16_t never_reset_mask = 0x00; for(int i=0;isda->i2c_index - 1)); + reserved_i2c[self->sda->i2c_index - 1] = true; + //Start GPIO for each pin GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitStruct.Pin = pin_mask(sda->number); @@ -113,9 +113,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, GPIO_InitStruct.Alternate = self->scl->altfn_index; HAL_GPIO_Init(pin_port(scl->port), &GPIO_InitStruct); - //Fix for HAL error caused by soft reboot GPIO init SDA pin voltage drop. See Eratta. - //Must be in this exact spot or I2C will get stuck in infinite loop. - //TODO: See git issue #2172 + //still needed? #ifdef I2C1 __HAL_RCC_I2C1_FORCE_RESET(); HAL_Delay(2); @@ -126,32 +124,12 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, HAL_Delay(2); __HAL_RCC_I2C2_RELEASE_RESET(); #endif - #ifdef I2C3 + #ifdef I2C2 __HAL_RCC_I2C3_FORCE_RESET(); HAL_Delay(2); __HAL_RCC_I2C3_RELEASE_RESET(); #endif - //Keep separate so above hack can be cleanly replaced - #ifdef I2C1 - if(I2Cx==I2C1) { - reserved_i2c[0] = true; - __HAL_RCC_I2C1_CLK_ENABLE(); - } - #endif - #ifdef I2C2 - if(I2Cx==I2C2) { - reserved_i2c[1] = true; - __HAL_RCC_I2C2_CLK_ENABLE(); - } - #endif - #ifdef I2C3 - if(I2Cx==I2C3) { - reserved_i2c[2] = true; - __HAL_RCC_I2C3_CLK_ENABLE(); - } - #endif - self->handle.Instance = I2Cx; self->handle.Init.ClockSpeed = 100000; self->handle.Init.DutyCycle = I2C_DUTYCYCLE_2; @@ -171,7 +149,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { for (size_t i = 0 ; i < MP_ARRAY_SIZE(mcu_i2c_banks); i++) { if (self->handle.Instance == mcu_i2c_banks[i]) { - never_reset[i] = true; + never_reset_i2c[i] = true; never_reset_pin_number(self->scl->pin->port, self->scl->pin->number); never_reset_pin_number(self->sda->pin->port, self->scl->pin->number); @@ -188,27 +166,11 @@ void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { if (common_hal_busio_i2c_deinited(self)) { return; } - #ifdef I2C1 - if(self->handle.Instance==I2C1) { - never_reset[0] = false; - reserved_i2c[0] = false; - __HAL_RCC_I2C1_CLK_DISABLE(); - } - #endif - #ifdef I2C2 - if(self->handle.Instance==I2C2) { - never_reset[1] = false; - reserved_i2c[1] = false; - __HAL_RCC_I2C2_CLK_DISABLE(); - } - #endif - #ifdef I2C3 - if(self->handle.Instance==I2C3) { - never_reset[2] = false; - reserved_i2c[2] = false; - __HAL_RCC_I2C3_CLK_DISABLE(); - } - #endif + + i2c_clock_disable(1<<(self->sda->i2c_index - 1)); + reserved_i2c[self->sda->i2c_index - 1] = false; + never_reset_i2c[self->sda->i2c_index - 1] = false; + reset_pin_number(self->sda->pin->port,self->sda->pin->number); reset_pin_number(self->scl->pin->port,self->scl->pin->number); self->sda = mp_const_none; @@ -258,14 +220,27 @@ uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, } STATIC void i2c_clock_enable(uint8_t mask) { + //Note: hard reset required due to soft reboot issue. #ifdef I2C1 - if (mask & 1<<0) __HAL_RCC_I2C1_CLK_ENABLE(); + if (mask & 1<<0) { + __HAL_RCC_I2C1_CLK_ENABLE(); + __HAL_RCC_I2C1_FORCE_RESET(); + __HAL_RCC_I2C1_RELEASE_RESET(); + } #endif #ifdef I2C2 - if (mask & 1<<1) __HAL_RCC_I2C2_CLK_ENABLE(); + if (mask & 1<<1) { + __HAL_RCC_I2C2_CLK_ENABLE(); + __HAL_RCC_I2C2_FORCE_RESET(); + __HAL_RCC_I2C2_RELEASE_RESET(); + } #endif #ifdef I2C3 - if (mask & 1<<2) __HAL_RCC_I2C3_CLK_ENABLE(); + if (mask & 1<<2) { + __HAL_RCC_I2C3_CLK_ENABLE(); + __HAL_RCC_I2C3_FORCE_RESET(); + __HAL_RCC_I2C3_RELEASE_RESET(); + } #endif } diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index 441b29296..0d1bcb168 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -49,10 +49,6 @@ STATIC bool never_reset_spi[MAX_SPI]; STATIC void spi_clock_enable(uint8_t mask); STATIC void spi_clock_disable(uint8_t mask); -//-------- -//STATICS -//-------- - STATIC uint32_t get_busclock(SPI_TypeDef * instance) { //SPI2 and 3 are on PCLK1, if they exist. #ifdef SPI2 @@ -90,10 +86,6 @@ STATIC uint32_t stm32_baud_to_spi_div(uint32_t baudrate, uint16_t * prescaler, u return SPI_BAUDRATEPRESCALER_256; } -//-------- -//COMMON HAL -//-------- - void spi_reset(void) { uint16_t never_reset_mask = 0x00; for(int i=0;isck->spi_index - 1)); reserved_spi[self->sck->spi_index - 1] = false; never_reset_spi[self->sck->spi_index - 1] = false; @@ -399,42 +394,66 @@ uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { STATIC void spi_clock_enable(uint8_t mask) { #ifdef SPI1 - if (mask & 1<<0) __HAL_RCC_SPI1_CLK_ENABLE(); + if (mask & 1<<0) { + __HAL_RCC_SPI1_CLK_ENABLE(); + } #endif #ifdef SPI2 - if (mask & 1<<1) __HAL_RCC_SPI2_CLK_ENABLE(); + if (mask & 1<<1) { + __HAL_RCC_SPI2_CLK_ENABLE(); + } #endif #ifdef SPI3 - if (mask & 1<<2) __HAL_RCC_SPI3_CLK_ENABLE(); + if (mask & 1<<2) { + __HAL_RCC_SPI3_CLK_ENABLE(); + } #endif #ifdef SPI4 - if (mask & 1<<3) __HAL_RCC_SPI4_CLK_ENABLE(); + if (mask & 1<<3) { + __HAL_RCC_SPI4_CLK_ENABLE(); + } #endif #ifdef SPI5 - if (mask & 1<<4) __HAL_RCC_SPI5_CLK_ENABLE(); + if (mask & 1<<4) { + __HAL_RCC_SPI5_CLK_ENABLE(); + } #endif #ifdef SPI6 - if (mask & 1<<5) __HAL_RCC_SPI6_CLK_ENABLE(); + if (mask & 1<<5) { + __HAL_RCC_SPI6_CLK_ENABLE(); + } #endif } STATIC void spi_clock_disable(uint8_t mask) { #ifdef SPI1 - if (mask & 1<<0) __HAL_RCC_SPI1_CLK_DISABLE(); + if (mask & 1<<0) { + __HAL_RCC_SPI1_CLK_DISABLE(); + } #endif #ifdef SPI2 - if (mask & 1<<1) __HAL_RCC_SPI2_CLK_DISABLE(); + if (mask & 1<<1) { + __HAL_RCC_SPI2_CLK_DISABLE(); + } #endif #ifdef SPI3 - if (mask & 1<<2) __HAL_RCC_SPI3_CLK_DISABLE(); + if (mask & 1<<2) { + __HAL_RCC_SPI3_CLK_DISABLE(); + } #endif #ifdef SPI4 - if (mask & 1<<3) __HAL_RCC_SPI4_CLK_DISABLE(); + if (mask & 1<<3) { + __HAL_RCC_SPI4_CLK_DISABLE(); + } #endif #ifdef SPI5 - if (mask & 1<<4) __HAL_RCC_SPI5_CLK_DISABLE(); + if (mask & 1<<4) { + __HAL_RCC_SPI5_CLK_DISABLE(); + } #endif #ifdef SPI6 - if (mask & 1<<5) __HAL_RCC_SPI6_CLK_DISABLE(); + if (mask & 1<<5) { + __HAL_RCC_SPI6_CLK_DISABLE(); + } #endif } diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 71867ac63..44ef5efdd 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -47,10 +47,6 @@ STATIC void uart_clock_enable(uint16_t mask); STATIC void uart_clock_disable(uint16_t mask); STATIC void uart_assign_irq(busio_uart_obj_t* self, USART_TypeDef* USARTx); -//-------- -//STATICS -//-------- - STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t* self, bool pin_eval, int uart_index, bool uart_taken) { if (pin_eval) { @@ -66,10 +62,6 @@ STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t* self, bool pin_eva } } -//-------- -//COMMON HAL -//-------- - void uart_reset(void) { for (uint8_t i = 0; i < MAX_UART; i++) { reserved_uart[i] = false; @@ -575,33 +567,53 @@ STATIC void uart_clock_disable(uint16_t mask) { STATIC void uart_assign_irq(busio_uart_obj_t *self, USART_TypeDef * USARTx) { #ifdef USART1 - if (USARTx == USART1) self->irq = USART1_IRQn; + if (USARTx == USART1) { + self->irq = USART1_IRQn; + } #endif #ifdef USART2 - if (USARTx == USART2) self->irq = USART2_IRQn; + if (USARTx == USART2) { + self->irq = USART2_IRQn; + } #endif #ifdef USART3 - if (USARTx == USART3) self->irq = USART3_IRQn; + if (USARTx == USART3) { + self->irq = USART3_IRQn; + } #endif #ifdef UART4 - if (USARTx == UART4) self->irq = UART4_IRQn; + if (USARTx == UART4) { + self->irq = UART4_IRQn; + } #endif #ifdef UART5 - if (USARTx == UART5) self->irq = UART5_IRQn; + if (USARTx == UART5) { + self->irq = UART5_IRQn; + } #endif #ifdef USART6 - if (USARTx == USART6) self->irq = USART6_IRQn; + if (USARTx == USART6) { + self->irq = USART6_IRQn; + } #endif #ifdef UART7 - if (USARTx == UART7) self->irq = UART7_IRQn; + if (USARTx == UART7) { + self->irq = UART7_IRQn; + } #endif #ifdef UART8 - if (USARTx == UART8) self->irq = UART8_IRQn; + if (USARTx == UART8) { + self->irq = UART8_IRQn; + } #endif #ifdef UART9 - if (USARTx == UART9) self->irq = UART9_IRQn; + if (USARTx == UART9) { + self->irq = UART9_IRQn; + } #endif #ifdef UART10 - if (USARTx == UART10) self->irq = UART10_IRQn; + if (USARTx == UART10) { + self->irq = UART10_IRQn; + } #endif } -- cgit v1.2.3 From ae22305869f382c8a1cc088fbf3cb12bcc2d5a6c Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 8 Jan 2020 15:55:53 -0500 Subject: Corrections to I2C, style --- ports/stm32f4/common-hal/busio/I2C.c | 25 ++----- ports/stm32f4/common-hal/busio/SPI.c | 5 +- ports/stm32f4/common-hal/busio/UART.c | 1 + ports/stm32f4/common-hal/pulseio/PWMOut.c | 104 +++++++++++++++++++++--------- 4 files changed, 80 insertions(+), 55 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/busio/I2C.c b/ports/stm32f4/common-hal/busio/I2C.c index 46c9728a8..37c13a9c4 100644 --- a/ports/stm32f4/common-hal/busio/I2C.c +++ b/ports/stm32f4/common-hal/busio/I2C.c @@ -35,6 +35,7 @@ #include "supervisor/shared/translate.h" #include "common-hal/microcontroller/Pin.h" +//arrays use 0 based numbering: I2C1 is stored at index 0 #define MAX_I2C 3 STATIC bool reserved_i2c[MAX_I2C]; STATIC bool never_reset_i2c[MAX_I2C]; @@ -93,10 +94,6 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, } } - //Note: clock reset must be before GPIO init, due to I2C soft reboot issue - i2c_clock_enable(1<<(self->sda->i2c_index - 1)); - reserved_i2c[self->sda->i2c_index - 1] = true; - //Start GPIO for each pin GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitStruct.Pin = pin_mask(sda->number); @@ -113,22 +110,9 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, GPIO_InitStruct.Alternate = self->scl->altfn_index; HAL_GPIO_Init(pin_port(scl->port), &GPIO_InitStruct); - //still needed? - #ifdef I2C1 - __HAL_RCC_I2C1_FORCE_RESET(); - HAL_Delay(2); - __HAL_RCC_I2C1_RELEASE_RESET(); - #endif - #ifdef I2C2 - __HAL_RCC_I2C2_FORCE_RESET(); - HAL_Delay(2); - __HAL_RCC_I2C2_RELEASE_RESET(); - #endif - #ifdef I2C2 - __HAL_RCC_I2C3_FORCE_RESET(); - HAL_Delay(2); - __HAL_RCC_I2C3_RELEASE_RESET(); - #endif + //Note: clock reset must be before GPIO init, due to I2C soft reboot issue + i2c_clock_enable(1<<(self->sda->i2c_index - 1)); + reserved_i2c[self->sda->i2c_index - 1] = true; self->handle.Instance = I2Cx; self->handle.Init.ClockSpeed = 100000; @@ -139,6 +123,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, self->handle.Init.OwnAddress2 = 0; self->handle.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; self->handle.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; + self->handle.State = HAL_I2C_STATE_RESET; if(HAL_I2C_Init(&(self->handle)) != HAL_OK) { mp_raise_RuntimeError(translate("I2C Init Error")); } diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index 0d1bcb168..78c635263 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -39,13 +39,12 @@ // Note that any bugs introduced in this file can cause crashes at startup // for chips using external SPI flash. -#define MAX_SPI 6 //TODO; replace this as part of periph cleanup -#define ALL_CLOCKS 0xFF - //arrays use 0 based numbering: SPI1 is stored at index 0 +#define MAX_SPI 6 STATIC bool reserved_spi[MAX_SPI]; STATIC bool never_reset_spi[MAX_SPI]; +#define ALL_CLOCKS 0xFF STATIC void spi_clock_enable(uint8_t mask); STATIC void spi_clock_disable(uint8_t mask); diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 44ef5efdd..a3e2d96be 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -40,6 +40,7 @@ #define ALL_UARTS 0xFFFF +//arrays use 0 based numbering: UART1 is stored at index 0 STATIC bool reserved_uart[MAX_UART]; int errflag; //Used to restart read halts diff --git a/ports/stm32f4/common-hal/pulseio/PWMOut.c b/ports/stm32f4/common-hal/pulseio/PWMOut.c index 2a071d078..309848236 100644 --- a/ports/stm32f4/common-hal/pulseio/PWMOut.c +++ b/ports/stm32f4/common-hal/pulseio/PWMOut.c @@ -44,10 +44,6 @@ STATIC bool never_reset_tim[TIM_BANK_ARRAY_LEN]; STATIC void tim_clock_enable(uint16_t mask); STATIC void tim_clock_disable(uint16_t mask); -//-------- -//STATICS -//-------- - // Get the frequency (in Hz) of the source clock for the given timer. // On STM32F405/407/415/417 there are 2 cases for how the clock freq is set. // If the APB prescaler is 1, then the timer clock is equal to its respective @@ -91,10 +87,6 @@ STATIC void timer_get_optimal_divisors(uint32_t*period, uint32_t*prescaler, } } -//-------- -//COMMON HAL -//-------- - void pwmout_reset(void) { uint16_t never_reset_mask = 0x00; for(int i=0;i Date: Wed, 8 Jan 2020 15:58:20 -0500 Subject: text fix --- ports/stm32f4/common-hal/busio/I2C.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/busio/I2C.c b/ports/stm32f4/common-hal/busio/I2C.c index 37c13a9c4..68a27c673 100644 --- a/ports/stm32f4/common-hal/busio/I2C.c +++ b/ports/stm32f4/common-hal/busio/I2C.c @@ -110,7 +110,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, GPIO_InitStruct.Alternate = self->scl->altfn_index; HAL_GPIO_Init(pin_port(scl->port), &GPIO_InitStruct); - //Note: clock reset must be before GPIO init, due to I2C soft reboot issue + //Note: due to I2C soft reboot issue, do not relocate clock init. i2c_clock_enable(1<<(self->sda->i2c_index - 1)); reserved_i2c[self->sda->i2c_index - 1] = true; -- cgit v1.2.3 From 10eed78dd8047f406d3be26f540e39eecba437c7 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 8 Jan 2020 17:37:20 -0500 Subject: use CFLAG to properly set define --- ports/stm32f4/mpconfigport.mk | 2 +- py/circuitpy_mpconfig.h | 5 ++++- 2 files changed, 5 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/mpconfigport.mk b/ports/stm32f4/mpconfigport.mk index 48bd3ad61..f214282cb 100644 --- a/ports/stm32f4/mpconfigport.mk +++ b/ports/stm32f4/mpconfigport.mk @@ -69,7 +69,7 @@ ifndef CIRCUITPY_DISPLAYIO CIRCUITPY_DISPLAYIO = 1 endif -MICROPY_CPYTHON_COMPAT = 1 +CFLAGS += -DMICROPY_CPYTHON_COMPAT=1 #ifeq ($(MCU_SUB_VARIANT), stm32f412zx) #endif diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 8c7454cf2..5b705a088 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -182,7 +182,10 @@ typedef long mp_off_t; // Remove some lesser-used functionality to make small builds fit. #define MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG (CIRCUITPY_FULL_BUILD) -#define MICROPY_CPYTHON_COMPAT (CIRCUITPY_FULL_BUILD) +//TODO: replace this with a rework of the FULL_BUILD system +#if !defined(MICROPY_CPYTHON_COMPAT) + #define MICROPY_CPYTHON_COMPAT (CIRCUITPY_FULL_BUILD) +#endif #define MICROPY_MODULE_WEAK_LINKS (CIRCUITPY_FULL_BUILD) #define MICROPY_PY_ALL_SPECIAL_METHODS (CIRCUITPY_FULL_BUILD) #define MICROPY_PY_BUILTINS_COMPLEX (CIRCUITPY_FULL_BUILD) -- cgit v1.2.3 From 1c6efb9e662fcfb59afa9cac6c562082248a7560 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Wed, 8 Jan 2020 16:48:17 -0600 Subject: os.urandom: remove unneeded sleep --- ports/nrf/common-hal/os/__init__.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'ports') diff --git a/ports/nrf/common-hal/os/__init__.c b/ports/nrf/common-hal/os/__init__.c index 1d89c73b6..b2ad00a5c 100644 --- a/ports/nrf/common-hal/os/__init__.c +++ b/ports/nrf/common-hal/os/__init__.c @@ -31,7 +31,6 @@ #ifdef BLUETOOTH_SD #include "nrf_sdm.h" -#include "tick.h" #endif #include "nrf_rng.h" @@ -81,7 +80,6 @@ bool common_hal_os_urandom(uint8_t *buffer, uint32_t length) { length -= request; } else { RUN_BACKGROUND_TASKS; - tick_delay(500); } } return true; -- cgit v1.2.3 From 4ec588bb37f1f8a0ed2233863afa85b9f98768e2 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Thu, 9 Jan 2020 16:17:57 -0500 Subject: spacing changes and text fix --- ports/stm32f4/common-hal/busio/I2C.c | 46 +++++++++++++---------- ports/stm32f4/common-hal/busio/SPI.c | 34 ++++++++--------- ports/stm32f4/common-hal/busio/UART.c | 4 +- ports/stm32f4/common-hal/pulseio/PWMOut.c | 62 ++++++++++++++++--------------- 4 files changed, 79 insertions(+), 67 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/busio/I2C.c b/ports/stm32f4/common-hal/busio/I2C.c index 68a27c673..bf843ff5c 100644 --- a/ports/stm32f4/common-hal/busio/I2C.c +++ b/ports/stm32f4/common-hal/busio/I2C.c @@ -46,11 +46,11 @@ STATIC void i2c_clock_disable(uint8_t mask); void i2c_reset(void) { uint16_t never_reset_mask = 0x00; - for(int i=0;isda!=NULL && self->scl!=NULL ) { - I2Cx = mcu_i2c_banks[self->sda->i2c_index-1]; + if (self->sda != NULL && self->scl != NULL ) { + I2Cx = mcu_i2c_banks[self->sda->i2c_index - 1]; } else { if (i2c_taken) { mp_raise_ValueError(translate("Hardware busy, try alternative pins")); @@ -111,7 +111,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, HAL_GPIO_Init(pin_port(scl->port), &GPIO_InitStruct); //Note: due to I2C soft reboot issue, do not relocate clock init. - i2c_clock_enable(1<<(self->sda->i2c_index - 1)); + i2c_clock_enable(1 << (self->sda->i2c_index - 1)); reserved_i2c[self->sda->i2c_index - 1] = true; self->handle.Instance = I2Cx; @@ -124,7 +124,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, self->handle.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; self->handle.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; self->handle.State = HAL_I2C_STATE_RESET; - if(HAL_I2C_Init(&(self->handle)) != HAL_OK) { + if (HAL_I2C_Init(&(self->handle)) != HAL_OK) { mp_raise_RuntimeError(translate("I2C Init Error")); } claim_pin(sda); @@ -132,7 +132,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, } void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { - for (size_t i = 0 ; i < MP_ARRAY_SIZE(mcu_i2c_banks); i++) { + for (size_t i = 0; i < MP_ARRAY_SIZE(mcu_i2c_banks); i++) { if (self->handle.Instance == mcu_i2c_banks[i]) { never_reset_i2c[i] = true; @@ -152,7 +152,7 @@ void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { return; } - i2c_clock_disable(1<<(self->sda->i2c_index - 1)); + i2c_clock_disable(1 << (self->sda->i2c_index - 1)); reserved_i2c[self->sda->i2c_index - 1] = false; never_reset_i2c[self->sda->i2c_index - 1] = false; @@ -163,7 +163,7 @@ void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { } bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) { - return HAL_I2C_IsDeviceReady(&(self->handle), (uint16_t)(addr<<1),2,2) == HAL_OK; + return HAL_I2C_IsDeviceReady(&(self->handle), (uint16_t)(addr << 1), 2, 2) == HAL_OK; } bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) { @@ -195,13 +195,15 @@ void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) { uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, const uint8_t *data, size_t len, bool transmit_stop_bit) { - HAL_StatusTypeDef result = HAL_I2C_Master_Transmit(&(self->handle), (uint16_t)(addr<<1), (uint8_t *)data, (uint16_t)len, 500); + HAL_StatusTypeDef result = HAL_I2C_Master_Transmit(&(self->handle), (uint16_t)(addr << 1), + (uint8_t *)data, (uint16_t)len, 500); return result == HAL_OK ? 0 : MP_EIO; } uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, uint8_t *data, size_t len) { - return HAL_I2C_Master_Receive(&(self->handle), (uint16_t)(addr<<1), data, (uint16_t)len, 500) == HAL_OK ? 0 : MP_EIO; + return HAL_I2C_Master_Receive(&(self->handle), (uint16_t)(addr<<1), data, (uint16_t)len, 500) + == HAL_OK ? 0 : MP_EIO; } STATIC void i2c_clock_enable(uint8_t mask) { @@ -231,12 +233,18 @@ STATIC void i2c_clock_enable(uint8_t mask) { STATIC void i2c_clock_disable(uint8_t mask) { #ifdef I2C1 - if (mask & 1<<0) __HAL_RCC_I2C1_CLK_DISABLE(); + if (mask & 1<<0) { + __HAL_RCC_I2C1_CLK_DISABLE(); + } #endif #ifdef I2C2 - if (mask & 1<<1) __HAL_RCC_I2C2_CLK_DISABLE(); + if (mask & 1<<1) { + __HAL_RCC_I2C2_CLK_DISABLE(); + } #endif #ifdef I2C3 - if (mask & 1<<2) __HAL_RCC_I2C3_CLK_DISABLE(); + if (mask & 1<<2) { + __HAL_RCC_I2C3_CLK_DISABLE(); + } #endif } diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index 78c635263..b7d61fbf9 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -87,11 +87,11 @@ STATIC uint32_t stm32_baud_to_spi_div(uint32_t baudrate, uint16_t * prescaler, u void spi_reset(void) { uint16_t never_reset_mask = 0x00; - for(int i=0;isck!=NULL && self->mosi!=NULL && self->miso != NULL) || - (self->sck!=NULL && self->mosi!=NULL && miso == mp_const_none) || - (self->sck!=NULL && self->miso!=NULL && mosi == mp_const_none)) { - SPIx = mcu_spi_banks[self->sck->spi_index-1]; + if ( (self->sck != NULL && self->mosi != NULL && self->miso != NULL) || + (self->sck != NULL && self->mosi != NULL && miso == mp_const_none) || + (self->sck != NULL && self->miso != NULL && mosi == mp_const_none)) { + SPIx = mcu_spi_banks[self->sck->spi_index - 1]; } else { if (spi_taken) { mp_raise_ValueError(translate("Hardware busy, try alternative pins")); @@ -217,7 +217,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, HAL_GPIO_Init(pin_port(miso->port), &GPIO_InitStruct); } - spi_clock_enable(1<<(self->sck->spi_index - 1)); + spi_clock_enable(1 << (self->sck->spi_index - 1)); reserved_spi[self->sck->spi_index - 1] = true; self->handle.Instance = SPIx; @@ -237,7 +237,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, { mp_raise_ValueError(translate("SPI Init Error")); } - self->baudrate = (get_busclock(SPIx)/16); + self->baudrate = (get_busclock(SPIx) / 16); self->prescaler = 16; self->polarity = 0; self->phase = 0; @@ -253,7 +253,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, } void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { - for (size_t i = 0 ; i < MP_ARRAY_SIZE(mcu_spi_banks); i++) { + for (size_t i = 0; i < MP_ARRAY_SIZE(mcu_spi_banks); i++) { if (mcu_spi_banks[i] == self->handle.Instance) { never_reset_spi[i] = true; never_reset_pin_number(self->sck->pin->port, self->sck->pin->number); diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index a3e2d96be..44139a642 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -79,8 +79,8 @@ void common_hal_busio_uart_construct(busio_uart_obj_t* self, //match pins to UART objects USART_TypeDef * USARTx; - uint8_t tx_len = sizeof(mcu_uart_tx_list)/sizeof(*mcu_uart_tx_list); - uint8_t rx_len = sizeof(mcu_uart_rx_list)/sizeof(*mcu_uart_rx_list); + uint8_t tx_len = sizeof(mcu_uart_tx_list) / sizeof(*mcu_uart_tx_list); + uint8_t rx_len = sizeof(mcu_uart_rx_list) / sizeof(*mcu_uart_rx_list); bool uart_taken = false; uint8_t uart_index = 0; //origin 0 corrected diff --git a/ports/stm32f4/common-hal/pulseio/PWMOut.c b/ports/stm32f4/common-hal/pulseio/PWMOut.c index 309848236..a53bfc423 100644 --- a/ports/stm32f4/common-hal/pulseio/PWMOut.c +++ b/ports/stm32f4/common-hal/pulseio/PWMOut.c @@ -69,15 +69,15 @@ STATIC uint32_t timer_get_source_freq(uint32_t tim_id) { STATIC uint32_t timer_get_internal_duty(uint16_t duty, uint32_t period) { //duty cycle is duty/0xFFFF fraction x (number of pulses per period) - return (duty*period)/((1<<16)-1); + return (duty*period) / ((1 << 16) - 1); } STATIC void timer_get_optimal_divisors(uint32_t*period, uint32_t*prescaler, uint32_t frequency, uint32_t source_freq) { //Find the largest possible period supported by this frequency - for (int i=0; i<(1 << 16);i++) { - *period = source_freq/(i*frequency); - if (*period < (1 << 16) && *period>=2) { + for (int i = 0; i < (1 << 16); i++) { + *period = source_freq / (i * frequency); + if (*period < (1 << 16) && *period >= 2) { *prescaler = i; break; } @@ -89,12 +89,12 @@ STATIC void timer_get_optimal_divisors(uint32_t*period, uint32_t*prescaler, void pwmout_reset(void) { uint16_t never_reset_mask = 0x00; - for(int i=0;itim!=NULL) { + if (self->tim != NULL) { //create instance - TIMx = mcu_tim_banks[self->tim->tim_index-1]; + TIMx = mcu_tim_banks[self->tim->tim_index - 1]; //reserve timer/channel if (variable_frequency) { - reserved_tim[self->tim->tim_index-1] = 0x0F; + reserved_tim[self->tim->tim_index - 1] = 0x0F; } else { - reserved_tim[self->tim->tim_index-1] |= 1<<(self->tim->channel_index-1); + reserved_tim[self->tim->tim_index - 1] |= 1 << (self->tim->channel_index - 1); } - tim_frequencies[self->tim->tim_index-1] = frequency; + tim_frequencies[self->tim->tim_index - 1] = frequency; } else { //no match found if (tim_chan_taken) { mp_raise_ValueError(translate("No more timers available on this pin.")); } else if (tim_taken_f_mismatch) { - mp_raise_ValueError(translate("Frequency must be the same as as the existing PWMOut using this timer")); + mp_raise_ValueError(translate("Frequency must match existing PWMOut using this timer")); } else if (var_freq_mismatch) { mp_raise_ValueError(translate("Cannot vary frequency on a timer that is already in use")); } else { @@ -175,14 +175,15 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, GPIO_InitStruct.Alternate = self->tim->altfn_index; HAL_GPIO_Init(pin_port(pin->port), &GPIO_InitStruct); - tim_clock_enable(1<<(self->tim->tim_index - 1)); + tim_clock_enable(1 << (self->tim->tim_index - 1)); //translate channel into handle value self->channel = 4 * (self->tim->channel_index - 1); uint32_t prescaler = 0; //prescaler is 15 bit uint32_t period = 0; //period is 16 bit - timer_get_optimal_divisors(&period, &prescaler,frequency,timer_get_source_freq(self->tim->tim_index)); + timer_get_optimal_divisors(&period, &prescaler, frequency, + timer_get_source_freq(self->tim->tim_index)); //Timer init self->handle.Instance = TIMx; @@ -223,7 +224,7 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, } void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) { - for(size_t i = 0 ; i < TIM_BANK_ARRAY_LEN; i++) { + for (size_t i = 0; i < TIM_BANK_ARRAY_LEN; i++) { if (mcu_tim_banks[i] == self->handle.Instance) { never_reset_tim[i] = true; never_reset_pin_number(self->tim->pin->port, self->tim->pin->number); @@ -233,7 +234,7 @@ void common_hal_pulseio_pwmout_never_reset(pulseio_pwmout_obj_t *self) { } void common_hal_pulseio_pwmout_reset_ok(pulseio_pwmout_obj_t *self) { - for(size_t i = 0 ; i < TIM_BANK_ARRAY_LEN; i++) { + for(size_t i = 0; i < TIM_BANK_ARRAY_LEN; i++) { if (mcu_tim_banks[i] == self->handle.Instance) { never_reset_tim[i] = false; break; @@ -251,18 +252,18 @@ void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { } //var freq shuts down entire timer, others just their channel if (self->variable_frequency) { - reserved_tim[self->tim->tim_index-1] = 0x00; + reserved_tim[self->tim->tim_index - 1] = 0x00; } else { - reserved_tim[self->tim->tim_index-1] &= ~(1<tim->channel_index); + reserved_tim[self->tim->tim_index - 1] &= ~(1 << self->tim->channel_index); HAL_TIM_PWM_Stop(&self->handle, self->channel); } reset_pin_number(self->tim->pin->port,self->tim->pin->number); self->tim = mp_const_none; //if reserved timer has no active channels, we can disable it - if (!reserved_tim[self->tim->tim_index-1]) { - tim_frequencies[self->tim->tim_index-1] = 0x00; - tim_clock_disable(1<<(self->tim->tim_index-1)); + if (!reserved_tim[self->tim->tim_index - 1]) { + tim_frequencies[self->tim->tim_index - 1] = 0x00; + tim_clock_disable(1 << (self->tim->tim_index - 1)); } } @@ -278,11 +279,14 @@ uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_t frequency) { //don't halt setup for the same frequency - if (frequency == self->frequency) return; + if (frequency == self->frequency) { + return; + } uint32_t prescaler = 0; uint32_t period = 0; - timer_get_optimal_divisors(&period, &prescaler,frequency,timer_get_source_freq(self->tim->tim_index)); + timer_get_optimal_divisors(&period, &prescaler, frequency, + timer_get_source_freq(self->tim->tim_index)); //shut down HAL_TIM_PWM_Stop(&self->handle, self->channel); @@ -305,7 +309,7 @@ void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, uint32_ mp_raise_ValueError(translate("Could not restart PWM")); } - tim_frequencies[self->tim->tim_index-1] = frequency; + tim_frequencies[self->tim->tim_index - 1] = frequency; self->frequency = frequency; self->period = period; } -- cgit v1.2.3 From 189f2d5f077cd4c30e6ad0fe6033869b580ea9a6 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 9 Jan 2020 17:31:50 -0500 Subject: Make requiring I2C pullups be optional --- ports/atmel-samd/common-hal/busio/I2C.c | 3 +++ ports/nrf/common-hal/busio/I2C.c | 2 ++ py/circuitpy_mpconfig.mk | 7 +++++++ 3 files changed, 12 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/busio/I2C.c b/ports/atmel-samd/common-hal/busio/I2C.c index b0e5714a7..ffe74a274 100644 --- a/ports/atmel-samd/common-hal/busio/I2C.c +++ b/ports/atmel-samd/common-hal/busio/I2C.c @@ -76,6 +76,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, mp_raise_ValueError(translate("Invalid pins")); } +#if CIRCUITPY_REQUIRE_I2C_PULLUPS // Test that the pins are in a high state. (Hopefully indicating they are pulled up.) gpio_set_pin_function(sda->number, GPIO_PIN_FUNCTION_OFF); gpio_set_pin_function(scl->number, GPIO_PIN_FUNCTION_OFF); @@ -98,6 +99,8 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, reset_pin_number(scl->number); mp_raise_RuntimeError(translate("SDA or SCL needs a pull up")); } +#endif + gpio_set_pin_function(sda->number, sda_pinmux); gpio_set_pin_function(scl->number, scl_pinmux); diff --git a/ports/nrf/common-hal/busio/I2C.c b/ports/nrf/common-hal/busio/I2C.c index f6f686cdf..219fbf447 100644 --- a/ports/nrf/common-hal/busio/I2C.c +++ b/ports/nrf/common-hal/busio/I2C.c @@ -115,6 +115,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t * mp_raise_ValueError(translate("All I2C peripherals are in use")); } +#if CIRCUITPY_REQUIRE_I2C_PULLUPS // Test that the pins are in a high state. (Hopefully indicating they are pulled up.) nrf_gpio_cfg_input(scl->number, NRF_GPIO_PIN_PULLDOWN); nrf_gpio_cfg_input(sda->number, NRF_GPIO_PIN_PULLDOWN); @@ -132,6 +133,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t * reset_pin_number(scl->number); mp_raise_RuntimeError(translate("SDA or SCL needs a pull up")); } +#endif nrfx_twim_config_t config = NRFX_TWIM_DEFAULT_CONFIG(scl->number, sda->number); diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk index a464583f3..93175e136 100644 --- a/py/circuitpy_mpconfig.mk +++ b/py/circuitpy_mpconfig.mk @@ -310,6 +310,13 @@ CIRCUITPY_BITBANG_APA102 = 0 endif CFLAGS += -DCIRCUITPY_BITBANG_APA102=$(CIRCUITPY_BITBANG_APA102) +# Should busio.I2C() check for pullups? +# Some boards in combination with certain peripherals may not want this. +ifndef CIRCUITPY_REQUIRE_I2C_PULLUPS +CIRCUITPY_REQUIRE_I2C_PULLUPS = 1 +endif +CFLAGS += -DCIRCUITPY_REQUIRE_I2C_PULLUPS=$(CIRCUITPY_REQUIRE_I2C_PULLUPS) + # REPL over BLE ifndef CIRCUITPY_SERIAL_BLE CIRCUITPY_SERIAL_BLE = 0 -- cgit v1.2.3 From 9c167af17a4dd8670a457ab25bda4bba1d9eaa6e Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 9 Jan 2020 17:40:02 -0500 Subject: wip; redid flash writing to be compatible with SD --- ports/nrf/common-hal/_bleio/Adapter.c | 1 - ports/nrf/common-hal/_bleio/Characteristic.c | 8 ++++- ports/nrf/common-hal/_bleio/Characteristic.h | 1 + ports/nrf/common-hal/_bleio/__init__.c | 1 + ports/nrf/common-hal/_bleio/bonding.c | 34 ++++++++++-------- ports/nrf/peripherals/nrf/nvm.c | 45 +++++++++++++++++++---- ports/nrf/peripherals/nrf/nvm.h | 5 +++ ports/nrf/sd.c | 54 ++++++++++++++++++++++++++++ ports/nrf/sd.h | 46 ++++++++++++++++++++++++ shared-bindings/_bleio/Characteristic.c | 12 ++++++- shared-bindings/_bleio/Characteristic.h | 1 + 11 files changed, 185 insertions(+), 23 deletions(-) create mode 100644 ports/nrf/sd.c create mode 100644 ports/nrf/sd.h (limited to 'ports') diff --git a/ports/nrf/common-hal/_bleio/Adapter.c b/ports/nrf/common-hal/_bleio/Adapter.c index 12d509073..05cd0260b 100644 --- a/ports/nrf/common-hal/_bleio/Adapter.c +++ b/ports/nrf/common-hal/_bleio/Adapter.c @@ -670,5 +670,4 @@ void bleio_adapter_reset(bleio_adapter_obj_t* adapter) { bleio_connection_internal_t *connection = &connections[i]; connection->connection_obj = mp_const_none; } - bonding_reset(); } diff --git a/ports/nrf/common-hal/_bleio/Characteristic.c b/ports/nrf/common-hal/_bleio/Characteristic.c index 81639898f..a87cd6e18 100644 --- a/ports/nrf/common-hal/_bleio/Characteristic.c +++ b/ports/nrf/common-hal/_bleio/Characteristic.c @@ -133,7 +133,8 @@ void common_hal_bleio_characteristic_construct(bleio_characteristic_obj_t *self, common_hal_bleio_characteristic_set_value(self, initial_value_bufinfo); } - ble_drv_add_event_handler(characteristic_on_ble_evt, self); + self->handler_entry.next = NULL; +//////////////// ble_drv_add_event_handler_entry(&self->handler_entry, characteristic_on_ble_evt, self); } bleio_descriptor_obj_t *common_hal_bleio_characteristic_get_descriptor_list(bleio_characteristic_obj_t *self) { @@ -287,3 +288,8 @@ void common_hal_bleio_characteristic_set_cccd(bleio_characteristic_obj_t *self, } } + +void common_hal_bleio_characteristic_del(bleio_characteristic_obj_t *self) { + // Remove from event handler list, since the evt handler entry is built-in and not a heap object. + ble_drv_remove_event_handler(characteristic_on_ble_evt, self); +} diff --git a/ports/nrf/common-hal/_bleio/Characteristic.h b/ports/nrf/common-hal/_bleio/Characteristic.h index bb8f28495..5759321aa 100644 --- a/ports/nrf/common-hal/_bleio/Characteristic.h +++ b/ports/nrf/common-hal/_bleio/Characteristic.h @@ -47,6 +47,7 @@ typedef struct _bleio_characteristic_obj { bleio_attribute_security_mode_t read_perm; bleio_attribute_security_mode_t write_perm; bleio_descriptor_obj_t *descriptor_list; + ble_drv_evt_handler_entry_t handler_entry; uint16_t user_desc_handle; uint16_t cccd_handle; uint16_t sccd_handle; diff --git a/ports/nrf/common-hal/_bleio/__init__.c b/ports/nrf/common-hal/_bleio/__init__.c index 4b2780ded..b9fbaa7c3 100644 --- a/ports/nrf/common-hal/_bleio/__init__.c +++ b/ports/nrf/common-hal/_bleio/__init__.c @@ -94,6 +94,7 @@ void bleio_reset() { common_hal_bleio_adapter_set_enabled(&common_hal_bleio_adapter_obj, false); } supervisor_start_bluetooth(); + bonding_reset(); } // The singleton _bleio.Adapter object, bound to _bleio.adapter diff --git a/ports/nrf/common-hal/_bleio/bonding.c b/ports/nrf/common-hal/_bleio/bonding.c index 1675ade43..1175f72e4 100644 --- a/ports/nrf/common-hal/_bleio/bonding.c +++ b/ports/nrf/common-hal/_bleio/bonding.c @@ -34,7 +34,7 @@ #include "shared-bindings/_bleio/Adapter.h" #include "shared-bindings/nvm/ByteArray.h" -#include "nrf_nvmc.h" +#include "nrf_soc.h" #include "sd_mutex.h" #include "bonding.h" @@ -68,15 +68,17 @@ STATIC inline size_t compute_block_size(uint16_t data_length) { STATIC void erase_bonding_storage(void) { // Erase all pages in the bonding area. - BONDING_DEBUG_PRINTF("erase_bonding_storage()\n"); for(uint32_t page_address = BONDING_PAGES_START_ADDR; page_address < BONDING_PAGES_END_ADDR; page_address += FLASH_PAGE_SIZE) { - nrf_nvmc_page_erase(page_address); + // Argument is page number, not address. + sd_flash_page_erase_sync(page_address / FLASH_PAGE_SIZE); } // Write marker words at the beginning and the end of the bonding area. - nrf_nvmc_write_word(BONDING_DATA_START_ADDR, BONDING_START_FLAG_ADDR); - nrf_nvmc_write_word(BONDING_DATA_END_ADDR, BONDING_END_FLAG_ADDR); + uint32_t flag = BONDING_START_FLAG; + sd_flash_write_sync((uint32_t *) BONDING_DATA_START_ADDR, &flag, 1); + flag = BONDING_END_FLAG; + sd_flash_write_sync((uint32_t *) BONDING_DATA_END_ADDR, &flag, 1); // First unused block is at the beginning. bonding_unused_block = (bonding_block_t *) BONDING_DATA_START_ADDR; } @@ -135,7 +137,8 @@ STATIC bonding_block_t *find_block(bool is_central, bonding_block_type_t type, u // We don't change data_length, so we can still skip over this block. STATIC void invalidate_block(bonding_block_t *block) { BONDING_DEBUG_PRINTF("invalidate_block()\n"); - nrf_nvmc_write_word((uint32_t) block, 0x00000000); + uint32_t zero = 0; + sd_flash_write_sync((uint32_t *) block, &zero, 1); } STATIC void queue_write_block(bool is_central, bonding_block_type_t type, uint16_t ediv, uint16_t conn_handle, uint8_t *data, uint16_t data_length) { @@ -178,7 +181,7 @@ STATIC void write_block_header(bonding_block_t *block) { erase_bonding_storage(); } - nrf_nvmc_write_words((uint32_t) bonding_unused_block, (uint32_t *) block, sizeof(bonding_block_t) / 4); + sd_flash_write_sync((uint32_t *) bonding_unused_block, (uint32_t *) block, sizeof(bonding_block_t) / 4); } // Write variable-length data at end of bonding block. @@ -190,7 +193,7 @@ STATIC void write_block_data(uint8_t *data, uint16_t data_length) { while (1) { uint32_t word = 0xffffffff; memcpy(&word, data, data_length >= 4 ? 4 : data_length); - nrf_nvmc_write_word((uint32_t) flash_word_p, word); + sd_flash_write_sync(flash_word_p, &word, 1); if (data_length <= 4) { break; } @@ -242,8 +245,9 @@ void bonding_clear_keys(bonding_keys_t *bonding_keys) { memset((uint8_t*) bonding_keys, 0, sizeof(bonding_keys_t)); } +// Call only when SD is enabled. void bonding_reset(void) { - BONDING_DEBUG_PRINTF("bonding_reset()\n"); + MP_STATE_VM(queued_bonding_block_list) = NULL; sd_mutex_new(&queued_bonding_block_list_mutex); if (BONDING_START_FLAG != *((uint32_t *) BONDING_START_FLAG_ADDR) || BONDING_END_FLAG != *((uint32_t *) BONDING_END_FLAG_ADDR)) { @@ -256,18 +260,20 @@ void bonding_reset(void) { // Write bonding blocks to flash. These have been queued during event handlers. // We do one at a time, on each background call. void bonding_background(void) { - + uint8_t sd_en = 0; + (void) sd_softdevice_is_enabled(&sd_en); + if (!sd_en) { + return; + } // Get block at front of list. sd_mutex_acquire_wait(&queued_bonding_block_list_mutex); - bonding_block_t *block = &(MP_STATE_VM(queued_bonding_block_list)->bonding_block); + bonding_block_t *block = (bonding_block_t *) MP_STATE_VM(queued_bonding_block_list); if (block) { - // Remove written block from front of list. + // Remove block from list. MP_STATE_VM(queued_bonding_block_list) = MP_STATE_VM(queued_bonding_block_list)->next_queued_block; } sd_mutex_release(&queued_bonding_block_list_mutex); - if (!block) { - // No blocks in queue. return; } diff --git a/ports/nrf/peripherals/nrf/nvm.c b/ports/nrf/peripherals/nrf/nvm.c index d13775d4d..2417ec66a 100644 --- a/ports/nrf/peripherals/nrf/nvm.c +++ b/ports/nrf/peripherals/nrf/nvm.c @@ -38,29 +38,62 @@ #include "ble_drv.h" #include "nrf_sdm.h" +STATIC bool sd_is_enabled(void) { + uint8_t sd_en = 0; + (void) sd_softdevice_is_enabled(&sd_en); + return sd_en; +} + STATIC void sd_flash_operation_start(void) { sd_flash_operation_status = SD_FLASH_OPERATION_IN_PROGRESS; } STATIC sd_flash_operation_status_t sd_flash_operation_wait_until_done(void) { - while (sd_flash_operation_status == SD_FLASH_OPERATION_IN_PROGRESS) { - sd_app_evt_wait(); + // If the SD is not enabled, no events are generated, so just return immediately. + if (sd_is_enabled()) { + while (sd_flash_operation_status == SD_FLASH_OPERATION_IN_PROGRESS) { + sd_app_evt_wait(); + } + } else { + sd_flash_operation_status = SD_FLASH_OPERATION_DONE; } return sd_flash_operation_status; + } + +bool sd_flash_page_erase_sync(uint32_t page_number) { + sd_flash_operation_start(); + if (sd_flash_page_erase(page_number) != NRF_SUCCESS) { + return false; + } + if (sd_flash_operation_wait_until_done() == SD_FLASH_OPERATION_ERROR) { + return false; + } + return true; +} + +bool sd_flash_write_sync(uint32_t *dest_words, uint32_t* src_words, uint32_t num_words) { + sd_flash_operation_start(); + if (sd_flash_write(dest_words, src_words, num_words) != NRF_SUCCESS) { + return false; + } + if (sd_flash_operation_wait_until_done() == SD_FLASH_OPERATION_ERROR) { + return false; + } + return true; +} + #endif // The nRF52840 datasheet specifies a maximum of two writes to a flash // location before an erase is necessary, even if the write is all // ones (erased state). So we can't avoid erases even if the page // appears to be already erased (all ones), unless we keep track of -// writes to a page. +// writes to a page.g bool nrf_nvm_safe_flash_page_write(uint32_t page_addr, uint8_t *data) { #ifdef BLUETOOTH_SD - uint8_t sd_en = 0; - (void) sd_softdevice_is_enabled(&sd_en); - if (sd_en) { + if (sd_is_enabled()) { uint32_t err_code; sd_flash_operation_status_t status; diff --git a/ports/nrf/peripherals/nrf/nvm.h b/ports/nrf/peripherals/nrf/nvm.h index e54e953df..8ba95773d 100644 --- a/ports/nrf/peripherals/nrf/nvm.h +++ b/ports/nrf/peripherals/nrf/nvm.h @@ -27,4 +27,9 @@ #define FLASH_PAGE_SIZE (4096) +#if BLUETOOTH_SD +bool sd_flash_page_erase_sync(uint32_t page_number); +bool sd_flash_write_sync(uint32_t *dest_words, uint32_t* src_words, uint32_t num_words); +#endif + bool nrf_nvm_safe_flash_page_write(uint32_t page_addr, uint8_t *data); diff --git a/ports/nrf/sd.c b/ports/nrf/sd.c new file mode 100644 index 000000000..b3162e6af --- /dev/null +++ b/ports/nrf/sd.c @@ -0,0 +1,54 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/mpconfig.h" +#include "py/runtime.h" +#include "nrf_soc.h" + +void sd_mutex_acquire_check(nrf_mutex_t* p_mutex) { + uint32_t err_code = sd_mutex_acquire(p_mutex); + if (err_code != NRF_SUCCESS) { + mp_raise_OSError_msg_varg(translate("Failed to acquire mutex, err 0x%04x"), err_code); + } +} + +void sd_mutex_acquire_wait(nrf_mutex_t* p_mutex) { + while (sd_mutex_acquire(p_mutex) == NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN) { + RUN_BACKGROUND_TASKS; + } +} + +void sd_mutex_acquire_wait_no_vm(nrf_mutex_t* p_mutex) { + while (sd_mutex_acquire(p_mutex) == NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN) { + } +} + +void sd_mutex_release_check(nrf_mutex_t* p_mutex) { + uint32_t err_code = sd_mutex_release(p_mutex); + if (err_code != NRF_SUCCESS) { + mp_raise_OSError_msg_varg(translate("Failed to release mutex, err 0x%04x"), err_code); + } +} diff --git a/ports/nrf/sd.h b/ports/nrf/sd.h new file mode 100644 index 000000000..ca4691720 --- /dev/null +++ b/ports/nrf/sd.h @@ -0,0 +1,46 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_SD_MUTEX_H +#define MICROPY_INCLUDED_NRF_SD_MUTEX_H + +#include "nrf_soc.h" + +// Helpers for common usage of nrf_mutex. + +// Try to acquire a mutex right now. Raise exception if we can't get it. +void sd_mutex_acquire_check(nrf_mutex_t* p_mutex); + +// Wait for a mutex to become available. Run VM background tasks while waiting. +void sd_mutex_acquire_wait(nrf_mutex_t* p_mutex); + +// Wait for a mutex to become available.. Block VM while waiting. +void sd_mutex_acquire_wait_no_vm(nrf_mutex_t* p_mutex); + +// Release a mutex, and raise exception on error. +void sd_mutex_release_check(nrf_mutex_t* p_mutex); + +#endif // MICROPY_INCLUDED_NRF_SD_MUTEX_H diff --git a/shared-bindings/_bleio/Characteristic.c b/shared-bindings/_bleio/Characteristic.c index 7fcf274da..0434368f2 100644 --- a/shared-bindings/_bleio/Characteristic.c +++ b/shared-bindings/_bleio/Characteristic.c @@ -128,7 +128,8 @@ STATIC mp_obj_t bleio_characteristic_add_to_service(size_t n_args, const mp_obj_ } mp_get_buffer_raise(initial_value, &initial_value_bufinfo, MP_BUFFER_READ); - bleio_characteristic_obj_t *characteristic = m_new_obj(bleio_characteristic_obj_t); + // There may be some cleanup needed when a characteristic is gc'd, so enable finaliser. + bleio_characteristic_obj_t *characteristic = m_new_obj_with_finaliser(bleio_characteristic_obj_t); characteristic->base.type = &bleio_characteristic_type; // Range checking on max_length arg is done by the common_hal layer, because @@ -292,8 +293,17 @@ STATIC mp_obj_t bleio_characteristic_set_cccd(mp_uint_t n_args, const mp_obj_t * } STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_characteristic_set_cccd_obj, 1, bleio_characteristic_set_cccd); +// Cleanup on gc. +STATIC mp_obj_t bleio_characteristic_del(mp_obj_t self_in) { + bleio_characteristic_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_bleio_characteristic_del(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_characteristic_del_obj, bleio_characteristic_del); + STATIC const mp_rom_map_elem_t bleio_characteristic_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&bleio_characteristic_del_obj) }, { MP_ROM_QSTR(MP_QSTR_add_to_service), MP_ROM_PTR(&bleio_characteristic_add_to_service_obj) }, { MP_ROM_QSTR(MP_QSTR_properties), MP_ROM_PTR(&bleio_characteristic_properties_obj) }, { MP_ROM_QSTR(MP_QSTR_uuid), MP_ROM_PTR(&bleio_characteristic_uuid_obj) }, diff --git a/shared-bindings/_bleio/Characteristic.h b/shared-bindings/_bleio/Characteristic.h index c4356fd4b..60ab57572 100644 --- a/shared-bindings/_bleio/Characteristic.h +++ b/shared-bindings/_bleio/Characteristic.h @@ -45,5 +45,6 @@ extern bleio_descriptor_obj_t *common_hal_bleio_characteristic_get_descriptor_li extern bleio_service_obj_t *common_hal_bleio_characteristic_get_service(bleio_characteristic_obj_t *self); extern void common_hal_bleio_characteristic_add_descriptor(bleio_characteristic_obj_t *self, bleio_descriptor_obj_t *descriptor); extern void common_hal_bleio_characteristic_set_cccd(bleio_characteristic_obj_t *self, bool notify, bool indicate); +extern void common_hal_bleio_characteristic_del(bleio_characteristic_obj_t *self); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CHARACTERISTIC_H -- cgit v1.2.3 From 357506dd9a66060a497d4b38d916511cb1524a57 Mon Sep 17 00:00:00 2001 From: Kamil Tomaszewski Date: Fri, 10 Jan 2020 13:59:10 +0100 Subject: Fix board_timerhook --- ports/cxd56/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'ports') diff --git a/ports/cxd56/Makefile b/ports/cxd56/Makefile index d65c2e266..3355332a8 100644 --- a/ports/cxd56/Makefile +++ b/ports/cxd56/Makefile @@ -131,6 +131,7 @@ LDFLAGS = \ -o $(BUILD)/firmware.elf \ --start-group \ -u spresense_main \ + -u board_timerhook \ $(BUILD)/libmpy.a \ $(SPRESENSE_SDK)/sdk/libs/libapps.a \ $(SPRESENSE_SDK)/sdk/libs/libsdk.a \ -- cgit v1.2.3 From 360c876be406eb039c995e0b31d1c4ebe5e70323 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Fri, 10 Jan 2020 09:20:21 -0500 Subject: add flag to i.mx port --- ports/mimxrt10xx/common-hal/busio/I2C.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'ports') diff --git a/ports/mimxrt10xx/common-hal/busio/I2C.c b/ports/mimxrt10xx/common-hal/busio/I2C.c index 3c555df45..2de996f9a 100644 --- a/ports/mimxrt10xx/common-hal/busio/I2C.c +++ b/ports/mimxrt10xx/common-hal/busio/I2C.c @@ -98,11 +98,13 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, LPI2C_MasterInit(self->i2c, &config, I2C_CLOCK_FREQ); +#if CIRCUITPY_REQUIRE_I2C_PULLUPS // if (!gpio_get_pin_level(sda->number) || !gpio_get_pin_level(scl->number)) { // reset_pin_number(sda->number); // reset_pin_number(scl->number); // mp_raise_RuntimeError(translate("SDA or SCL needs a pull up")); // } +#endif claim_pin(self->sda_pin->pin); claim_pin(self->scl_pin->pin); -- cgit v1.2.3 From 1229de44995fe25d78b3eb3885f6d9ccfce078d9 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Fri, 10 Jan 2020 12:56:22 -0500 Subject: attempt to get control going again --- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 8 ++++---- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 16 +++++++--------- 2 files changed, 11 insertions(+), 13 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index 0371685d8..e97d793be 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -39,7 +39,7 @@ #define BOARD_NO_VBUS_SENSE // On-board flash -#define SPI_FLASH_MOSI_PIN (&pin_PB15) -#define SPI_FLASH_MISO_PIN (&pin_PB14) -#define SPI_FLASH_SCK_PIN (&pin_PB13) -#define SPI_FLASH_CS_PIN (&pin_PB01) +// #define SPI_FLASH_MOSI_PIN (&pin_PB15) +// #define SPI_FLASH_MISO_PIN (&pin_PB14) +// #define SPI_FLASH_SCK_PIN (&pin_PB13) +// #define SPI_FLASH_CS_PIN (&pin_PB01) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index 73f1d722a..fc9209d15 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -4,13 +4,13 @@ USB_PRODUCT = "Meowbit" USB_MANUFACTURER = "Kittenbot" USB_DEVICES = "CDC,MSC" -SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICE_COUNT = 1 -EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ -LONGINT_IMPL = MPZ +# SPI_FLASH_FILESYSTEM = 1 +# EXTERNAL_FLASH_DEVICE_COUNT = 1 +# EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ +# LONGINT_IMPL = MPZ -# INTERNAL_FLASH_FILESYSTEM = 1 -# LONGINT_IMPL = NONE +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE MCU_SERIES = m4 MCU_VARIANT = stm32f4 @@ -18,6 +18,4 @@ MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE # LD_FILE = boards/STM32F401_boot.ld -LD_FILE = boards/STM32F401_fs.ld -TEXT0_ADDR = 0x08010000 -TEXT1_ADDR = 0x08040000 \ No newline at end of file +LD_FILE = boards/STM32F401_fs.ld \ No newline at end of file -- cgit v1.2.3 From 346ce3b73b532d2776e660e0e92c5d79c699880e Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Fri, 10 Jan 2020 23:55:45 -0500 Subject: wip: HID bonding works! --- ports/nrf/common-hal/_bleio/Adapter.c | 5 + ports/nrf/common-hal/_bleio/Connection.c | 44 +++++++-- ports/nrf/common-hal/_bleio/bonding.c | 158 ++++++++++++++++++------------- ports/nrf/common-hal/_bleio/bonding.h | 13 ++- ports/nrf/mpconfigport.h | 2 +- shared-bindings/_bleio/Adapter.c | 25 +++-- shared-bindings/_bleio/Adapter.h | 14 +-- 7 files changed, 170 insertions(+), 91 deletions(-) (limited to 'ports') diff --git a/ports/nrf/common-hal/_bleio/Adapter.c b/ports/nrf/common-hal/_bleio/Adapter.c index 05cd0260b..8c732e73b 100644 --- a/ports/nrf/common-hal/_bleio/Adapter.c +++ b/ports/nrf/common-hal/_bleio/Adapter.c @@ -224,6 +224,7 @@ STATIC bool adapter_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { } ble_drv_remove_event_handler(connection_on_ble_evt, connection); connection->conn_handle = BLE_CONN_HANDLE_INVALID; + connection->pair_status = PAIR_NOT_PAIRED; if (connection->connection_obj != mp_const_none) { bleio_connection_obj_t* obj = connection->connection_obj; obj->connection = NULL; @@ -657,6 +658,10 @@ mp_obj_t common_hal_bleio_adapter_get_connections(bleio_adapter_obj_t *self) { return self->connection_objs; } +void common_hal_bleio_adapter_erase_bonding(bleio_adapter_obj_t *self) { + bonding_erase_storage(); +} + void bleio_adapter_gc_collect(bleio_adapter_obj_t* adapter) { gc_collect_root((void**)adapter, sizeof(bleio_adapter_obj_t) / sizeof(size_t)); gc_collect_root((void**)connections, sizeof(connections) / sizeof(size_t)); diff --git a/ports/nrf/common-hal/_bleio/Connection.c b/ports/nrf/common-hal/_bleio/Connection.c index 6c49823c2..664805b66 100644 --- a/ports/nrf/common-hal/_bleio/Connection.c +++ b/ports/nrf/common-hal/_bleio/Connection.c @@ -54,7 +54,7 @@ #define BLE_AD_TYPE_FLAGS_DATA_SIZE 1 static const ble_gap_sec_params_t pairing_sec_params = { - .bond = 0, + .bond = 1, .mitm = 0, .lesc = 0, .keypress = 0, @@ -66,6 +66,13 @@ static const ble_gap_sec_params_t pairing_sec_params = { .kdist_peer = { .enc = 1, .id = 1}, }; +#define CONNECTION_DEBUG (1) +#if CONNECTION_DEBUG + #define CONNECTION_DEBUG_PRINTF(...) printf(__VA_ARGS__) +#else + #define CONNECTION_DEBUG_PRINTF(...) +#endif + static volatile bool m_discovery_in_process; static volatile bool m_discovery_successful; @@ -86,7 +93,10 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { switch (ble_evt->header.evt_id) { case BLE_GAP_EVT_DISCONNECTED: + CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_DISCONNECTED\n"); + // Adapter.c does the work for this event. break; + case BLE_GAP_EVT_PHY_UPDATE_REQUEST: { ble_gap_phys_t const phys = { .rx_phys = BLE_GAP_PHY_AUTO, @@ -173,10 +183,11 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { break; } case BLE_GAP_EVT_SEC_PARAMS_REQUEST: { + CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_SEC_PARAMS_REQUEST\n"); // First time pairing. // 1. Either we or peer initiate the process // 2. Peer asks for security parameters using BLE_GAP_EVT_SEC_PARAMS_REQUEST. - // 3. Pair Key exchange ("just works" implemented now; TODO key pairing) + // 3. Pair Key exchange ("just works" implemented now; TODO: out-of-band key pairing) // 4. Connection is secured: BLE_GAP_EVT_CONN_SEC_UPDATE // 5. Long-term Keys exchanged: BLE_GAP_EVT_AUTH_STATUS @@ -205,43 +216,55 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { } case BLE_GAP_EVT_LESC_DHKEY_REQUEST: + CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_LESC_DHKEY_REQUEST\n"); // TODO for LESC pairing: // sd_ble_gap_lesc_dhkey_reply(...); break; case BLE_GAP_EVT_AUTH_STATUS: { // 0x19 + CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_AUTH_STATUS\n"); // Pairing process completed ble_gap_evt_auth_status_t* status = &ble_evt->evt.gap_evt.params.auth_status; self->sec_status = status->auth_status; if (status->auth_status == BLE_GAP_SEC_STATUS_SUCCESS) { self->ediv = self->bonding_keys.own_enc.master_id.ediv; self->pair_status = PAIR_PAIRED; + CONNECTION_DEBUG_PRINTF("PAIR_PAIRED\n"); bonding_save_keys(self->is_central, self->conn_handle, &self->bonding_keys); } else { + // Inform busy-waiter pairing has failed. self->pair_status = PAIR_NOT_PAIRED; + CONNECTION_DEBUG_PRINTF("PAIR_NOT_PAIRED\n"); } break; } case BLE_GAP_EVT_SEC_INFO_REQUEST: { // 0x14 + CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_SEC_INFO_REQUEST\n"); // Peer asks for the stored keys. // - load key and return if bonded previously. // - Else return NULL --> Initiate key exchange ble_gap_evt_sec_info_request_t* sec_info_request = &ble_evt->evt.gap_evt.params.sec_info_request; (void) sec_info_request; if ( bonding_load_keys(self->is_central, sec_info_request->master_id.ediv, &self->bonding_keys) ) { - sd_ble_gap_sec_info_reply(self->conn_handle, - &self->bonding_keys.own_enc.enc_info, - &self->bonding_keys.peer_id.id_info, - NULL); + CONNECTION_DEBUG_PRINTF("keys found\n"); + uint32_t err_code = sd_ble_gap_sec_info_reply( + self->conn_handle, + &self->bonding_keys.own_enc.enc_info, + &self->bonding_keys.peer_id.id_info, + NULL); + CONNECTION_DEBUG_PRINTF("sd_ble_gap_sec_info_reply err_code: %0lx\n", err_code); self->ediv = self->bonding_keys.own_enc.master_id.ediv; } else { + CONNECTION_DEBUG_PRINTF("keys not found\n"); + // We don't have stored keys. Ask for keys. sd_ble_gap_sec_info_reply(self->conn_handle, NULL, NULL, NULL); } break; } case BLE_GAP_EVT_CONN_SEC_UPDATE: { // 0x1a + CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_CONN_SEC_UPDATE\n"); ble_gap_conn_sec_t* conn_sec = &ble_evt->evt.gap_evt.params.conn_sec_update.conn_sec; if (conn_sec->sec_mode.sm <= 1 && conn_sec->sec_mode.lv <= 1) { // Security setup did not succeed: @@ -250,12 +273,13 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { // mode >=1 and/or level >=1 means encryption is set up self->pair_status = PAIR_NOT_PAIRED; } else { - // Does an sd_ble_gatts_sys_attr_set() with the stored values. if (bonding_load_cccd_info(self->is_central, self->conn_handle, self->ediv)) { - // Not quite paired yet: wait for BLE_GAP_EVT_AUTH_STATUS SUCCESS. - self->ediv = self->bonding_keys.own_enc.master_id.ediv; + // Did an sd_ble_gatts_sys_attr_set() with the stored sys_attr values. + // Not quite paired yet: wait for BLE_GAP_EVT_AUTH_STATUS with BLE_GAP_SEC_STATUS_SUCCESS. + CONNECTION_DEBUG_PRINTF("did bonding_load_cccd_info()\n"); } else { // No matching bonding found, so use fresh system attributes. + CONNECTION_DEBUG_PRINTF("bonding_load_cccd_info() failed\n"); sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); } } @@ -263,8 +287,10 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { } default: + CONNECTION_DEBUG_PRINTF("Unhandled event: %04x\n", ble_evt->header.evt_id); return false; } + CONNECTION_DEBUG_PRINTF("Handled event: %04x\n", ble_evt->header.evt_id); return true; } diff --git a/ports/nrf/common-hal/_bleio/bonding.c b/ports/nrf/common-hal/_bleio/bonding.c index 1175f72e4..0476d722b 100644 --- a/ports/nrf/common-hal/_bleio/bonding.c +++ b/ports/nrf/common-hal/_bleio/bonding.c @@ -43,14 +43,12 @@ #define BONDING_PAGES_START_ADDR CIRCUITPY_BLE_CONFIG_START_ADDR #define BONDING_PAGES_END_ADDR (CIRCUITPY_BLE_CONFIG_START_ADDR + CIRCUITPY_BLE_CONFIG_SIZE) -// First and last four bytes are magic bytes for id and version. Start data after that. +// First and last four bytes are magic bytes for id and version. Data is in between. // 'BD01' -const uint32_t BONDING_START_FLAG = ('1' | '0' << 8 | 'D' << 16 | 'B' << 24); -// 'ED01' -const uint32_t BONDING_END_FLAG = ('1' | '0' << 8 | 'D' << 16 | 'E' << 24); +const uint32_t BONDING_FLAG = ('1' | '0' << 8 | 'D' << 16 | 'B' << 24); -#define BONDING_DATA_START_ADDR (BONDING_PAGES_START_ADDR + sizeof(BONDING_START_FLAG)) -#define BONDING_DATA_END_ADDR (BONDING_PAGES_END_ADDR - sizeof(BONDING_END_FLAG)) +#define BONDING_DATA_START_ADDR (BONDING_PAGES_START_ADDR + sizeof(BONDING_FLAG)) +#define BONDING_DATA_END_ADDR (BONDING_PAGES_END_ADDR - sizeof(BONDING_FLAG)) #define BONDING_START_FLAG_ADDR BONDING_PAGES_START_ADDR #define BONDING_END_FLAG_ADDR BONDING_DATA_END_ADDR @@ -59,14 +57,28 @@ const uint32_t BONDING_END_FLAG = ('1' | '0' << 8 | 'D' << 16 | 'E' << 24); #define SYS_ATTR_FLAGS (BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS | BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS) STATIC bonding_block_t *bonding_unused_block = NULL; -nrf_mutex_t queued_bonding_block_list_mutex; +nrf_mutex_t queued_bonding_block_entries_mutex; -STATIC inline size_t compute_block_size(uint16_t data_length) { +#if BONDING_DEBUG +void bonding_print_block(bonding_block_t *block) { + printf("at 0x%08lx: is_central: %1d, type: 0x%x, ediv: 0x%04x, data_length: %d\n", + (uint32_t) block, block->is_central, block->type, block->ediv, block->data_length); +} + +void bonding_print_keys(bonding_keys_t *keys) { + for (size_t i = 0; i < sizeof(bonding_keys_t); i ++) { + printf("%x", ((uint8_t*) keys)[i]); + } + printf("\n"); +} +#endif + +STATIC size_t compute_block_size(uint16_t data_length) { // Round data size up to the nearest 32-bit address. - return sizeof(bonding_block_t) + ((data_length + 3) & 0x3); + return sizeof(bonding_block_t) + ((data_length + 3) & ~0x3); } -STATIC void erase_bonding_storage(void) { +void bonding_erase_storage(void) { // Erase all pages in the bonding area. for(uint32_t page_address = BONDING_PAGES_START_ADDR; page_address < BONDING_PAGES_END_ADDR; @@ -75,10 +87,9 @@ STATIC void erase_bonding_storage(void) { sd_flash_page_erase_sync(page_address / FLASH_PAGE_SIZE); } // Write marker words at the beginning and the end of the bonding area. - uint32_t flag = BONDING_START_FLAG; - sd_flash_write_sync((uint32_t *) BONDING_DATA_START_ADDR, &flag, 1); - flag = BONDING_END_FLAG; - sd_flash_write_sync((uint32_t *) BONDING_DATA_END_ADDR, &flag, 1); + uint32_t flag = BONDING_FLAG; + sd_flash_write_sync((uint32_t *) BONDING_START_FLAG_ADDR, &flag, 1); + sd_flash_write_sync((uint32_t *) BONDING_END_FLAG_ADDR, &flag, 1); // First unused block is at the beginning. bonding_unused_block = (bonding_block_t *) BONDING_DATA_START_ADDR; } @@ -90,7 +101,6 @@ STATIC bonding_block_t *next_block(bonding_block_t *block) { while (1) { // Advance to next block. if (block == NULL) { - // Return first block (which might be unused if block list is empty). return (bonding_block_t *) BONDING_DATA_START_ADDR; } else if (block->type == BLOCK_UNUSED) { // Already at last block (the unused block). @@ -115,20 +125,26 @@ STATIC bonding_block_t *next_block(bonding_block_t *block) { // Find the block with given type and ediv value. // If type == BLOCK_UNUSED, ediv is ignored and the the sole unused block at the end is returned. // If not found, return NULL. -STATIC bonding_block_t *find_block(bool is_central, bonding_block_type_t type, uint16_t ediv) { +STATIC bonding_block_t *find_block_with_keys(bool is_central, bonding_block_type_t type, uint16_t ediv) { bonding_block_t *block = NULL; + BONDING_DEBUG_PRINTF("find_block_with_keys(): looking through blocks:\n"); while (1) { block = next_block(block); if (block == NULL) { return NULL; } - if (block->type == BLOCK_UNUSED) { - return block; + BONDING_DEBUG_PRINT_BLOCK(block); + if (block->type == BLOCK_INVALID) { + // Skip discarded blocks. + continue; } - if (is_central == block->is_central && - type == block->type && - ediv == block->ediv) { + // If types match, and block is unused, just return it. + // Otherwise check that is_central and ediv match. + if (type == block->type) { + if (type == BLOCK_UNUSED || + (is_central == block->is_central && ediv == block->ediv)) { return block; + } } } } @@ -137,6 +153,7 @@ STATIC bonding_block_t *find_block(bool is_central, bonding_block_type_t type, u // We don't change data_length, so we can still skip over this block. STATIC void invalidate_block(bonding_block_t *block) { BONDING_DEBUG_PRINTF("invalidate_block()\n"); + BONDING_DEBUG_PRINT_BLOCK(block); uint32_t zero = 0; sd_flash_write_sync((uint32_t *) block, &zero, 1); } @@ -147,29 +164,28 @@ STATIC void queue_write_block(bool is_central, bonding_block_type_t type, uint16 return; } - queued_bonding_block_list_elt_t* queued_elt = - m_malloc_maybe(sizeof(queued_bonding_block_list_elt_t) + data_length, false); + queued_bonding_block_entry_t* queued_entry = + m_malloc_maybe(sizeof(queued_bonding_block_entry_t) + data_length, false); - if (!queued_elt) { + if (!queued_entry) { // Failed to allocate. Not much we can do, since this might be during an evt handler. return; } - // Add this new element to the front of the list. - sd_mutex_acquire_wait(&queued_bonding_block_list_mutex); - queued_elt->next_queued_block = MP_STATE_VM(queued_bonding_block_list); - MP_STATE_VM(queued_bonding_block_list) = queued_elt; - sd_mutex_release(&queued_bonding_block_list_mutex); - - // - queued_elt->bonding_block.is_central = is_central; - queued_elt->bonding_block.type = type; - queued_elt->bonding_block.ediv = ediv; - queued_elt->bonding_block.conn_handle = conn_handle; - queued_elt->bonding_block.data_length = data_length; + queued_entry->block.is_central = is_central; + queued_entry->block.type = type; + queued_entry->block.ediv = ediv; + queued_entry->block.conn_handle = conn_handle; + queued_entry->block.data_length = data_length; if (data && data_length != 0) { - memcpy(&queued_elt->bonding_block.data, data, data_length); + memcpy(&queued_entry->block.data, data, data_length); } + + // Add this new element to the front of the list. + sd_mutex_acquire_wait(&queued_bonding_block_entries_mutex); + queued_entry->next = MP_STATE_VM(queued_bonding_block_entries); + MP_STATE_VM(queued_bonding_block_entries) = queued_entry; + sd_mutex_release(&queued_bonding_block_entries_mutex); } // Write bonding block header. @@ -178,7 +194,7 @@ STATIC void write_block_header(bonding_block_t *block) { if (bonding_unused_block == NULL || (uint8_t *) bonding_unused_block + compute_block_size(block->data_length) >= (uint8_t *)BONDING_DATA_END_ADDR) { - erase_bonding_storage(); + bonding_erase_storage(); } sd_flash_write_sync((uint32_t *) bonding_unused_block, (uint32_t *) block, sizeof(bonding_block_t) / 4); @@ -198,6 +214,7 @@ STATIC void write_block_data(uint8_t *data, uint16_t data_length) { break; } data_length -= 4; + data += 4; // Increment by word size. flash_word_p++; } @@ -231,10 +248,10 @@ STATIC bool write_keys_block(bonding_block_t *block) { } bonding_keys_t *bonding_keys = (bonding_keys_t *) block->data; + BONDING_DEBUG_PRINT_KEYS(bonding_keys); block->ediv = block->is_central ? bonding_keys->peer_enc.master_id.ediv : bonding_keys->own_enc.master_id.ediv; - write_block_header(block); write_block_data((uint8_t *) bonding_keys, sizeof(bonding_keys_t)); return true; @@ -247,13 +264,13 @@ void bonding_clear_keys(bonding_keys_t *bonding_keys) { // Call only when SD is enabled. void bonding_reset(void) { - MP_STATE_VM(queued_bonding_block_list) = NULL; - sd_mutex_new(&queued_bonding_block_list_mutex); - if (BONDING_START_FLAG != *((uint32_t *) BONDING_START_FLAG_ADDR) || - BONDING_END_FLAG != *((uint32_t *) BONDING_END_FLAG_ADDR)) { - erase_bonding_storage(); + MP_STATE_VM(queued_bonding_block_entries) = NULL; + sd_mutex_new(&queued_bonding_block_entries_mutex); + if (BONDING_FLAG != *((uint32_t *) BONDING_START_FLAG_ADDR) || + BONDING_FLAG != *((uint32_t *) BONDING_END_FLAG_ADDR)) { + bonding_erase_storage(); } else { - bonding_unused_block = find_block(true, BLOCK_UNUSED, EDIV_INVALID); + bonding_unused_block = find_block_with_keys(true, BLOCK_UNUSED, EDIV_INVALID); } } @@ -266,29 +283,34 @@ void bonding_background(void) { return; } // Get block at front of list. - sd_mutex_acquire_wait(&queued_bonding_block_list_mutex); - bonding_block_t *block = (bonding_block_t *) MP_STATE_VM(queued_bonding_block_list); - if (block) { - // Remove block from list. - MP_STATE_VM(queued_bonding_block_list) = MP_STATE_VM(queued_bonding_block_list)->next_queued_block; + bonding_block_t *block = NULL; + sd_mutex_acquire_wait(&queued_bonding_block_entries_mutex); + if (MP_STATE_VM(queued_bonding_block_entries)) { + block = &(MP_STATE_VM(queued_bonding_block_entries)->block); + // Remove entry from list. + MP_STATE_VM(queued_bonding_block_entries) = MP_STATE_VM(queued_bonding_block_entries)->next; } - sd_mutex_release(&queued_bonding_block_list_mutex); + sd_mutex_release(&queued_bonding_block_entries_mutex); if (!block) { return; } // Is there an existing block whose keys match? - bonding_block_t *matching_block = find_block(block->is_central, block->type, block->ediv); - if (matching_block) { - if (block->data_length == matching_block->data_length && - memcmp(block->data, matching_block->data, block->data_length) == 0) { + BONDING_DEBUG_PRINTF("bonding_background(): processing queued block:\n"); + BONDING_DEBUG_PRINT_BLOCK(block); + bonding_block_t *block_with_keys = find_block_with_keys(block->is_central, block->type, block->ediv); + if (block_with_keys) { + BONDING_DEBUG_PRINTF("bonding_background(): block with same keys found:\n"); + BONDING_DEBUG_PRINT_BLOCK(block_with_keys); + if (block->data_length == block_with_keys->data_length && + memcmp(block->data, block_with_keys->data, block->data_length) == 0) { // Identical block found. No need to store again. - BONDING_DEBUG_PRINTF("bonding_background(): identical block found\n"); + BONDING_DEBUG_PRINTF("bonding_background(): block is identical to block_with_keys\n"); return; } // Block keys match but data doesn't. Invalidate block and store a new one. - BONDING_DEBUG_PRINTF("bonding_background(): invalidating block\n"); - invalidate_block(matching_block); + BONDING_DEBUG_PRINTF("bonding_background(): invalidating block_with_keys\n"); + invalidate_block(block_with_keys); } switch (block->type) { @@ -301,26 +323,27 @@ void bonding_background(void) { break; default: + BONDING_DEBUG_PRINTF("unknown block type: %x\n", block->type); break; } } bool bonding_load_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv) { - bonding_block_t *block = find_block(is_central, BLOCK_SYS_ATTR, ediv); + bonding_block_t *block = find_block_with_keys(is_central, BLOCK_SYS_ATTR, ediv); if (block == NULL) { - BONDING_DEBUG_PRINTF("bonding_load_cccd_info(): block not found\n"); + BONDING_DEBUG_PRINTF("bonding_load_cccd_info(): block not found, ediv: %04x\n", ediv); return false; } - BONDING_DEBUG_PRINTF("bonding_load_cccd_info(): block found\n"); + BONDING_DEBUG_PRINTF("bonding_load_cccd_info(): block found, ediv: %04x\n", ediv); return NRF_SUCCESS == sd_ble_gatts_sys_attr_set(conn_handle, block->data, block->data_length, SYS_ATTR_FLAGS); } bool bonding_load_keys(bool is_central, uint16_t ediv, bonding_keys_t *bonding_keys) { - bonding_block_t *block = find_block(is_central, BLOCK_SYS_ATTR, ediv); + bonding_block_t *block = find_block_with_keys(is_central, BLOCK_KEYS, ediv); if (block == NULL) { - BONDING_DEBUG_PRINTF("bonding_load_keys(): block not found\n"); + BONDING_DEBUG_PRINTF("bonding_load_keys(): block not found, ediv: %04x\n", ediv); return false; } if (sizeof(bonding_keys_t) != block->data_length) { @@ -328,18 +351,23 @@ bool bonding_load_keys(bool is_central, uint16_t ediv, bonding_keys_t *bonding_k return false; } - BONDING_DEBUG_PRINTF("bonding_load_keys(): block found\n"); + BONDING_DEBUG_PRINTF("bonding_load_keys(): block found, ediv: %04x\n", ediv); memcpy(bonding_keys, block->data, block->data_length); + BONDING_DEBUG_PRINT_KEYS(bonding_keys); return true; } void bonding_save_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv) { - queue_write_block(is_central, ediv, conn_handle, BLOCK_SYS_ATTR, NULL, 0); + BONDING_DEBUG_PRINTF("bonding_save_cccd_info: is_central: %d, conn_handle: %04x, ediv: %04x\n", + is_central, conn_handle, ediv); + queue_write_block(is_central, BLOCK_SYS_ATTR, ediv, conn_handle, NULL, 0); } void bonding_save_keys(bool is_central, uint16_t conn_handle, bonding_keys_t *bonding_keys) { uint16_t const ediv = is_central ? bonding_keys->peer_enc.master_id.ediv : bonding_keys->own_enc.master_id.ediv; + BONDING_DEBUG_PRINTF("bonding_save_keys: is_central: %d, conn_handle: %04x, ediv: %04x\n", + is_central, conn_handle, ediv); queue_write_block(is_central, BLOCK_KEYS, ediv, conn_handle, (uint8_t *) bonding_keys, sizeof(bonding_keys_t)); } diff --git a/ports/nrf/common-hal/_bleio/bonding.h b/ports/nrf/common-hal/_bleio/bonding.h index 1b0083865..35347af2a 100644 --- a/ports/nrf/common-hal/_bleio/bonding.h +++ b/ports/nrf/common-hal/_bleio/bonding.h @@ -40,8 +40,12 @@ #define BONDING_DEBUG (1) #if BONDING_DEBUG #define BONDING_DEBUG_PRINTF(...) printf(__VA_ARGS__) + #define BONDING_DEBUG_PRINT_BLOCK(block) bonding_print_block(block) + #define BONDING_DEBUG_PRINT_KEYS(keys) bonding_print_keys(keys) #else #define BONDING_DEBUG_PRINTF(...) + #define BONDING_DEBUG_PRINT_BLOCK(block) + #define BONDING_DEBUG_PRINT_KEYS(keys) #endif // Bonding data is stored in variable-length blocks consecutively in erased flash. @@ -71,12 +75,13 @@ typedef struct { } bonding_block_t; // Bonding blocks that need to be written are stored in a linked list. -typedef struct _queued_bonding_block_list_elt_t { - struct _queued_bonding_block_list_elt_t *next_queued_block; - bonding_block_t bonding_block; // variable length, based on data_length. -} queued_bonding_block_list_elt_t; +typedef struct _queued_bonding_block_entry_t { + struct _queued_bonding_block_entry_t *next; + bonding_block_t block; // variable length, based on data_length. +} queued_bonding_block_entry_t; void bonding_background(void); +void bonding_erase_storage(void); void bonding_reset(void); void bonding_clear_keys(bonding_keys_t *bonding_keys); bool bonding_load_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv); diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h index 14f7632fd..a480ec1e0 100644 --- a/ports/nrf/mpconfigport.h +++ b/ports/nrf/mpconfigport.h @@ -156,7 +156,7 @@ #define MICROPY_PORT_ROOT_POINTERS \ CIRCUITPY_COMMON_ROOT_POINTERS \ ble_drv_evt_handler_entry_t* ble_drv_evt_handler_entries; \ - queued_bonding_block_list_elt_t* queued_bonding_block_list; \ + queued_bonding_block_entry_t* queued_bonding_block_entries; \ #endif // NRF5_MPCONFIGPORT_H__ diff --git a/shared-bindings/_bleio/Adapter.c b/shared-bindings/_bleio/Adapter.c index 5d3211b0c..500055cf3 100644 --- a/shared-bindings/_bleio/Adapter.c +++ b/shared-bindings/_bleio/Adapter.c @@ -360,22 +360,35 @@ STATIC mp_obj_t bleio_adapter_connect(mp_uint_t n_args, const mp_obj_t *pos_args } STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_adapter_connect_obj, 2, bleio_adapter_connect); +//| .. method:: erase_bonding() +//| +//| Erase all bonding information stored in flash memory. +STATIC mp_obj_t bleio_adapter_erase_bonding(mp_obj_t self_in) { + bleio_adapter_obj_t *self = MP_OBJ_TO_PTR(self_in); + + common_hal_bleio_adapter_erase_bonding(self); + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_adapter_erase_bonding_obj, bleio_adapter_erase_bonding); STATIC const mp_rom_map_elem_t bleio_adapter_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_enabled), MP_ROM_PTR(&bleio_adapter_enabled_obj) }, { MP_ROM_QSTR(MP_QSTR_address), MP_ROM_PTR(&bleio_adapter_address_obj) }, - { MP_ROM_QSTR(MP_QSTR_name), MP_ROM_PTR(&bleio_adapter_name_obj) }, + { MP_ROM_QSTR(MP_QSTR_name), MP_ROM_PTR(&bleio_adapter_name_obj) }, - { MP_ROM_QSTR(MP_QSTR_start_advertising), MP_ROM_PTR(&bleio_adapter_start_advertising_obj) }, - { MP_ROM_QSTR(MP_QSTR_stop_advertising), MP_ROM_PTR(&bleio_adapter_stop_advertising_obj) }, + { MP_ROM_QSTR(MP_QSTR_start_advertising), MP_ROM_PTR(&bleio_adapter_start_advertising_obj) }, + { MP_ROM_QSTR(MP_QSTR_stop_advertising), MP_ROM_PTR(&bleio_adapter_stop_advertising_obj) }, { MP_ROM_QSTR(MP_QSTR_start_scan), MP_ROM_PTR(&bleio_adapter_start_scan_obj) }, - { MP_ROM_QSTR(MP_QSTR_stop_scan), MP_ROM_PTR(&bleio_adapter_stop_scan_obj) }, + { MP_ROM_QSTR(MP_QSTR_stop_scan), MP_ROM_PTR(&bleio_adapter_stop_scan_obj) }, - { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&bleio_adapter_connect_obj) }, + { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&bleio_adapter_connect_obj) }, - { MP_ROM_QSTR(MP_QSTR_connected), MP_ROM_PTR(&bleio_adapter_connected_obj) }, + { MP_ROM_QSTR(MP_QSTR_connected), MP_ROM_PTR(&bleio_adapter_connected_obj) }, { MP_ROM_QSTR(MP_QSTR_connections), MP_ROM_PTR(&bleio_adapter_connections_obj) }, + + { MP_ROM_QSTR(MP_QSTR_erase_bonding), MP_ROM_PTR(&bleio_adapter_erase_bonding_obj) }, }; STATIC MP_DEFINE_CONST_DICT(bleio_adapter_locals_dict, bleio_adapter_locals_dict_table); diff --git a/shared-bindings/_bleio/Adapter.h b/shared-bindings/_bleio/Adapter.h index 4340d82c1..9b20a461a 100644 --- a/shared-bindings/_bleio/Adapter.h +++ b/shared-bindings/_bleio/Adapter.h @@ -48,13 +48,15 @@ extern void common_hal_bleio_adapter_set_name(bleio_adapter_obj_t *self, const c extern uint32_t _common_hal_bleio_adapter_start_advertising(bleio_adapter_obj_t *self, bool connectable, float interval, uint8_t *advertising_data, uint16_t advertising_data_len, uint8_t *scan_response_data, uint16_t scan_response_data_len); extern void common_hal_bleio_adapter_start_advertising(bleio_adapter_obj_t *self, bool connectable, mp_float_t interval, mp_buffer_info_t *advertising_data_bufinfo, mp_buffer_info_t *scan_response_data_bufinfo); -void common_hal_bleio_adapter_stop_advertising(bleio_adapter_obj_t *self); +extern void common_hal_bleio_adapter_stop_advertising(bleio_adapter_obj_t *self); -mp_obj_t common_hal_bleio_adapter_start_scan(bleio_adapter_obj_t *self, uint8_t* prefixes, size_t prefix_length, bool extended, mp_int_t buffer_size, mp_float_t timeout, mp_float_t interval, mp_float_t window, mp_int_t minimum_rssi, bool active); -void common_hal_bleio_adapter_stop_scan(bleio_adapter_obj_t *self); +extern mp_obj_t common_hal_bleio_adapter_start_scan(bleio_adapter_obj_t *self, uint8_t* prefixes, size_t prefix_length, bool extended, mp_int_t buffer_size, mp_float_t timeout, mp_float_t interval, mp_float_t window, mp_int_t minimum_rssi, bool active); +extern void common_hal_bleio_adapter_stop_scan(bleio_adapter_obj_t *self); -bool common_hal_bleio_adapter_get_connected(bleio_adapter_obj_t *self); -mp_obj_t common_hal_bleio_adapter_get_connections(bleio_adapter_obj_t *self); -mp_obj_t common_hal_bleio_adapter_connect(bleio_adapter_obj_t *self, bleio_address_obj_t *address, mp_float_t timeout); +extern bool common_hal_bleio_adapter_get_connected(bleio_adapter_obj_t *self); +extern mp_obj_t common_hal_bleio_adapter_get_connections(bleio_adapter_obj_t *self); +extern mp_obj_t common_hal_bleio_adapter_connect(bleio_adapter_obj_t *self, bleio_address_obj_t *address, mp_float_t timeout); + +extern void common_hal_bleio_adapter_erase_bonding(bleio_adapter_obj_t *self); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_ADAPTER_H -- cgit v1.2.3 From 9e7f8743c2725c1818033e348e8d542ec7539045 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Sun, 12 Jan 2020 23:32:51 -0500 Subject: fix CCCD bonding store; avoid excessive bonding writes --- ports/nrf/common-hal/_bleio/Characteristic.c | 31 ------ ports/nrf/common-hal/_bleio/Characteristic.h | 1 - ports/nrf/common-hal/_bleio/Connection.c | 18 ++- ports/nrf/common-hal/_bleio/bonding.c | 161 ++++++++++++++++----------- py/gc.c | 4 + py/gc.h | 2 + shared-bindings/_bleio/Characteristic.c | 13 +-- shared-bindings/_bleio/Characteristic.h | 1 - 8 files changed, 117 insertions(+), 114 deletions(-) (limited to 'ports') diff --git a/ports/nrf/common-hal/_bleio/Characteristic.c b/ports/nrf/common-hal/_bleio/Characteristic.c index a87cd6e18..4d5cab5c5 100644 --- a/ports/nrf/common-hal/_bleio/Characteristic.c +++ b/ports/nrf/common-hal/_bleio/Characteristic.c @@ -83,29 +83,6 @@ STATIC void characteristic_gatts_notify_indicate(uint16_t handle, uint16_t conn_ } } -STATIC bool characteristic_on_ble_evt(ble_evt_t *ble_evt, void *param) { - bleio_characteristic_obj_t *self = (bleio_characteristic_obj_t *) param; - switch (ble_evt->header.evt_id) { - case BLE_GATTS_EVT_WRITE: { - // A client wrote to this server characteristic. - // If we are bonded, stored the CCCD value. - if (self->service != MP_OBJ_NULL) { - bleio_connection_obj_t *connection = self->service->connection; - uint16_t conn_handle = bleio_connection_get_conn_handle(connection); - if (conn_handle != BLE_CONN_HANDLE_INVALID && - common_hal_bleio_connection_get_paired(connection) && - ble_evt->evt.gatts_evt.params.write.handle == self->cccd_handle) { - bonding_save_cccd_info( - connection->connection->is_central, conn_handle, connection->connection->ediv); - } - } - break; - } - } - - return true; -} - void common_hal_bleio_characteristic_construct(bleio_characteristic_obj_t *self, bleio_service_obj_t *service, uint16_t handle, bleio_uuid_obj_t *uuid, bleio_characteristic_properties_t props, bleio_attribute_security_mode_t read_perm, bleio_attribute_security_mode_t write_perm, mp_int_t max_length, bool fixed_length, mp_buffer_info_t *initial_value_bufinfo) { self->service = service; self->uuid = uuid; @@ -132,9 +109,6 @@ void common_hal_bleio_characteristic_construct(bleio_characteristic_obj_t *self, if (initial_value_bufinfo != NULL) { common_hal_bleio_characteristic_set_value(self, initial_value_bufinfo); } - - self->handler_entry.next = NULL; -//////////////// ble_drv_add_event_handler_entry(&self->handler_entry, characteristic_on_ble_evt, self); } bleio_descriptor_obj_t *common_hal_bleio_characteristic_get_descriptor_list(bleio_characteristic_obj_t *self) { @@ -288,8 +262,3 @@ void common_hal_bleio_characteristic_set_cccd(bleio_characteristic_obj_t *self, } } - -void common_hal_bleio_characteristic_del(bleio_characteristic_obj_t *self) { - // Remove from event handler list, since the evt handler entry is built-in and not a heap object. - ble_drv_remove_event_handler(characteristic_on_ble_evt, self); -} diff --git a/ports/nrf/common-hal/_bleio/Characteristic.h b/ports/nrf/common-hal/_bleio/Characteristic.h index 5759321aa..bb8f28495 100644 --- a/ports/nrf/common-hal/_bleio/Characteristic.h +++ b/ports/nrf/common-hal/_bleio/Characteristic.h @@ -47,7 +47,6 @@ typedef struct _bleio_characteristic_obj { bleio_attribute_security_mode_t read_perm; bleio_attribute_security_mode_t write_perm; bleio_descriptor_obj_t *descriptor_list; - ble_drv_evt_handler_entry_t handler_entry; uint16_t user_desc_handle; uint16_t cccd_handle; uint16_t sccd_handle; diff --git a/ports/nrf/common-hal/_bleio/Connection.c b/ports/nrf/common-hal/_bleio/Connection.c index 664805b66..b9a9cf2c4 100644 --- a/ports/nrf/common-hal/_bleio/Connection.c +++ b/ports/nrf/common-hal/_bleio/Connection.c @@ -123,6 +123,17 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { break; } + case BLE_GATTS_EVT_WRITE: + // A client wrote a value. + // If we are bonded and it's a CCCD (UUID 0x2902), store the CCCD value. + if (self->conn_handle != BLE_CONN_HANDLE_INVALID && + self->pair_status == PAIR_PAIRED && + ble_evt->evt.gatts_evt.params.write.uuid.type == BLE_UUID_TYPE_BLE && + ble_evt->evt.gatts_evt.params.write.uuid.uuid == 0x2902) { + bonding_save_cccd_info(self->is_central, self->conn_handle, self->ediv); + } + break; + case BLE_GATTS_EVT_SYS_ATTR_MISSING: sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); break; @@ -223,7 +234,7 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { case BLE_GAP_EVT_AUTH_STATUS: { // 0x19 CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_AUTH_STATUS\n"); - // Pairing process completed + // Key exchange completed. ble_gap_evt_auth_status_t* status = &ble_evt->evt.gap_evt.params.auth_status; self->sec_status = status->auth_status; if (status->auth_status == BLE_GAP_SEC_STATUS_SUCCESS) { @@ -264,8 +275,10 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { } case BLE_GAP_EVT_CONN_SEC_UPDATE: { // 0x1a - CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_CONN_SEC_UPDATE\n"); + // We get this both on first-time pairing and on subsequent pairings using stored keys. ble_gap_conn_sec_t* conn_sec = &ble_evt->evt.gap_evt.params.conn_sec_update.conn_sec; + CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_CONN_SEC_UPDATE, sm: %d, lv: %d\n", + conn_sec->sec_mode.sm, conn_sec->sec_mode.lv); if (conn_sec->sec_mode.sm <= 1 && conn_sec->sec_mode.lv <= 1) { // Security setup did not succeed: // mode 0, level 0 means no access @@ -282,6 +295,7 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { CONNECTION_DEBUG_PRINTF("bonding_load_cccd_info() failed\n"); sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); } + self->pair_status = PAIR_PAIRED; } break; } diff --git a/ports/nrf/common-hal/_bleio/bonding.c b/ports/nrf/common-hal/_bleio/bonding.c index 0476d722b..56f77af85 100644 --- a/ports/nrf/common-hal/_bleio/bonding.c +++ b/ports/nrf/common-hal/_bleio/bonding.c @@ -33,6 +33,7 @@ #include "shared-bindings/_bleio/__init__.h" #include "shared-bindings/_bleio/Adapter.h" #include "shared-bindings/nvm/ByteArray.h" +#include "supervisor/shared/tick.h" #include "nrf_soc.h" #include "sd_mutex.h" @@ -56,8 +57,8 @@ const uint32_t BONDING_FLAG = ('1' | '0' << 8 | 'D' << 16 | 'B' << 24); // Save both system and user service info. #define SYS_ATTR_FLAGS (BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS | BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS) -STATIC bonding_block_t *bonding_unused_block = NULL; -nrf_mutex_t queued_bonding_block_entries_mutex; +STATIC nrf_mutex_t queued_bonding_block_entries_mutex; +STATIC uint64_t block_queued_at_ticks_ms = 0; #if BONDING_DEBUG void bonding_print_block(bonding_block_t *block) { @@ -79,6 +80,7 @@ STATIC size_t compute_block_size(uint16_t data_length) { } void bonding_erase_storage(void) { + BONDING_DEBUG_PRINTF("bonding_erase_storage()\n"); // Erase all pages in the bonding area. for(uint32_t page_address = BONDING_PAGES_START_ADDR; page_address < BONDING_PAGES_END_ADDR; @@ -90,8 +92,6 @@ void bonding_erase_storage(void) { uint32_t flag = BONDING_FLAG; sd_flash_write_sync((uint32_t *) BONDING_START_FLAG_ADDR, &flag, 1); sd_flash_write_sync((uint32_t *) BONDING_END_FLAG_ADDR, &flag, 1); - // First unused block is at the beginning. - bonding_unused_block = (bonding_block_t *) BONDING_DATA_START_ADDR; } // Given NULL to start or block address, return the address of the next valid block. @@ -122,18 +122,16 @@ STATIC bonding_block_t *next_block(bonding_block_t *block) { } } -// Find the block with given type and ediv value. +// Find the block with given is_central, type and ediv value. // If type == BLOCK_UNUSED, ediv is ignored and the the sole unused block at the end is returned. // If not found, return NULL. -STATIC bonding_block_t *find_block_with_keys(bool is_central, bonding_block_type_t type, uint16_t ediv) { +STATIC bonding_block_t *find_candidate_block(bool is_central, bonding_block_type_t type, uint16_t ediv) { bonding_block_t *block = NULL; - BONDING_DEBUG_PRINTF("find_block_with_keys(): looking through blocks:\n"); while (1) { block = next_block(block); if (block == NULL) { return NULL; } - BONDING_DEBUG_PRINT_BLOCK(block); if (block->type == BLOCK_INVALID) { // Skip discarded blocks. continue; @@ -149,11 +147,22 @@ STATIC bonding_block_t *find_block_with_keys(bool is_central, bonding_block_type } } +// Get an empty block large enough to store data_length data. +STATIC bonding_block_t* find_unused_block(uint16_t data_length) { + bonding_block_t *unused_block = find_candidate_block(true, BLOCK_UNUSED, EDIV_INVALID); + // If no more room, erase all existing blocks and start over. + if (!unused_block || + (uint8_t *) unused_block + compute_block_size(data_length) >= (uint8_t *) BONDING_DATA_END_ADDR) { + bonding_erase_storage(); + unused_block = (bonding_block_t *) BONDING_DATA_START_ADDR; + } + return unused_block; +} + // Set the header word to all 0's, to mark the block as invalid. // We don't change data_length, so we can still skip over this block. STATIC void invalidate_block(bonding_block_t *block) { BONDING_DEBUG_PRINTF("invalidate_block()\n"); - BONDING_DEBUG_PRINT_BLOCK(block); uint32_t zero = 0; sd_flash_write_sync((uint32_t *) block, &zero, 1); } @@ -164,6 +173,10 @@ STATIC void queue_write_block(bool is_central, bonding_block_type_t type, uint16 return; } + // No heap available, so never mind. This might be called between VM instantiations. + if (!gc_alloc_possible()) { + return; + } queued_bonding_block_entry_t* queued_entry = m_malloc_maybe(sizeof(queued_bonding_block_entry_t) + data_length, false); @@ -181,31 +194,35 @@ STATIC void queue_write_block(bool is_central, bonding_block_type_t type, uint16 memcpy(&queued_entry->block.data, data, data_length); } + // Note: blocks are added in LIFO order, for simplicity and speed. + // The assumption is that there won't be stale blocks on the + // list. The sys_attr blocks don't contain sys_attr data, just a + // request to store the latest value. The key blocks are assumed + // not to be superseded quickly. If this assumption becomes + // invalid, the queue should be changed to FIFO. + // Add this new element to the front of the list. sd_mutex_acquire_wait(&queued_bonding_block_entries_mutex); queued_entry->next = MP_STATE_VM(queued_bonding_block_entries); MP_STATE_VM(queued_bonding_block_entries) = queued_entry; sd_mutex_release(&queued_bonding_block_entries_mutex); + + // Remember when we last queued a block, so we avoid excesive + // sys_attr writes. + block_queued_at_ticks_ms = supervisor_ticks_ms64(); } // Write bonding block header. -STATIC void write_block_header(bonding_block_t *block) { - // If no more room, erase all existing blocks and start over. - if (bonding_unused_block == NULL || - (uint8_t *) bonding_unused_block + compute_block_size(block->data_length) >= - (uint8_t *)BONDING_DATA_END_ADDR) { - bonding_erase_storage(); - } - - sd_flash_write_sync((uint32_t *) bonding_unused_block, (uint32_t *) block, sizeof(bonding_block_t) / 4); +STATIC void write_block_header(bonding_block_t *dest_block, bonding_block_t *source_block_header) { + sd_flash_write_sync((uint32_t *) dest_block, (uint32_t *) source_block_header, sizeof(bonding_block_t) / 4); } // Write variable-length data at end of bonding block. -STATIC void write_block_data(uint8_t *data, uint16_t data_length) { +STATIC void write_block_data(bonding_block_t *dest_block, uint8_t *data, uint16_t data_length) { // Minimize the number of writes. Datasheet says no more than two writes per word before erasing again. // Start writing after the current header. - uint32_t *flash_word_p = (uint32_t *) ((uint8_t *) bonding_unused_block + sizeof(bonding_block_t)); + uint32_t *flash_word_p = (uint32_t *) ((uint8_t *) dest_block + sizeof(bonding_block_t)); while (1) { uint32_t word = 0xffffffff; memcpy(&word, data, data_length >= 4 ? 4 : data_length); @@ -218,43 +235,68 @@ STATIC void write_block_data(uint8_t *data, uint16_t data_length) { // Increment by word size. flash_word_p++; } - bonding_unused_block = (bonding_block_t *) flash_word_p; } -STATIC bool write_sys_attr_block(bonding_block_t *block) { - BONDING_DEBUG_PRINTF("write_sys_attr_block()\n"); +STATIC void write_sys_attr_block(bonding_block_t *block) { uint16_t length = 0; // First find out how big a buffer we need, then fetch the data. if(sd_ble_gatts_sys_attr_get(block->conn_handle, NULL, &length, SYS_ATTR_FLAGS) != NRF_SUCCESS) { - return false; + return; } uint8_t sys_attr[length]; if(sd_ble_gatts_sys_attr_get(block->conn_handle, sys_attr, &length, SYS_ATTR_FLAGS) != NRF_SUCCESS) { - return false; + return; } // Now we know the data size. block->data_length = length; - write_block_header(block); - write_block_data(sys_attr, length); - return true; + + // Is there an existing sys_attr block that matches the current sys_attr data? + bonding_block_t *candidate_block = find_candidate_block(block->is_central, block->type, block->ediv); + if (candidate_block) { + if (length == candidate_block->data_length && + memcmp(sys_attr, candidate_block->data, block->data_length) == 0) { + BONDING_DEBUG_PRINTF("Identical sys_attr block already stored.\n"); + // Identical block found. No need to store again. + return; + } + // Data doesn't match. Invalidate block and store a new one. + invalidate_block(candidate_block); + } + + bonding_block_t *new_block = find_unused_block(length); + write_block_header(new_block, block); + write_block_data(new_block, sys_attr, length); + return; } -STATIC bool write_keys_block(bonding_block_t *block) { - BONDING_DEBUG_PRINTF("write_keys_block()\n"); +STATIC void write_keys_block(bonding_block_t *block) { if (block->data_length != sizeof(bonding_keys_t)) { - return false; + // Bad length. + return; + } + + // Is there an existing keys block that matches? + bonding_block_t *candidate_block = find_candidate_block(block->is_central, block->type, block->ediv); + if (candidate_block) { + if (block->data_length == candidate_block->data_length && + memcmp(block->data, candidate_block->data, block->data_length) == 0) { + BONDING_DEBUG_PRINTF("Identical keys block already stored.\n"); + // Identical block found. No need to store again. + return; + } + // Data doesn't match. Invalidate block and store a new one. + invalidate_block(candidate_block); } bonding_keys_t *bonding_keys = (bonding_keys_t *) block->data; - BONDING_DEBUG_PRINT_KEYS(bonding_keys); block->ediv = block->is_central ? bonding_keys->peer_enc.master_id.ediv : bonding_keys->own_enc.master_id.ediv; - write_block_header(block); - write_block_data((uint8_t *) bonding_keys, sizeof(bonding_keys_t)); - return true; + bonding_block_t *new_block = find_unused_block(sizeof(bonding_keys_t)); + write_block_header(new_block, block); + write_block_data(new_block, (uint8_t *) bonding_keys, sizeof(bonding_keys_t)); } @@ -269,8 +311,6 @@ void bonding_reset(void) { if (BONDING_FLAG != *((uint32_t *) BONDING_START_FLAG_ADDR) || BONDING_FLAG != *((uint32_t *) BONDING_END_FLAG_ADDR)) { bonding_erase_storage(); - } else { - bonding_unused_block = find_block_with_keys(true, BLOCK_UNUSED, EDIV_INVALID); } } @@ -282,6 +322,19 @@ void bonding_background(void) { if (!sd_en) { return; } + + if (block_queued_at_ticks_ms == 0) { + // No writes have been queued yet. + return; + } + + // Wait at least one second before writing a block, to consolidate writes + // that will be duplicates. + uint64_t current_ticks_ms = supervisor_ticks_ms64(); + if (current_ticks_ms - block_queued_at_ticks_ms < 1000) { + return; + } + // Get block at front of list. bonding_block_t *block = NULL; sd_mutex_acquire_wait(&queued_bonding_block_entries_mutex); @@ -292,27 +345,10 @@ void bonding_background(void) { } sd_mutex_release(&queued_bonding_block_entries_mutex); if (!block) { + // List is empty. return; } - // Is there an existing block whose keys match? - BONDING_DEBUG_PRINTF("bonding_background(): processing queued block:\n"); - BONDING_DEBUG_PRINT_BLOCK(block); - bonding_block_t *block_with_keys = find_block_with_keys(block->is_central, block->type, block->ediv); - if (block_with_keys) { - BONDING_DEBUG_PRINTF("bonding_background(): block with same keys found:\n"); - BONDING_DEBUG_PRINT_BLOCK(block_with_keys); - if (block->data_length == block_with_keys->data_length && - memcmp(block->data, block_with_keys->data, block->data_length) == 0) { - // Identical block found. No need to store again. - BONDING_DEBUG_PRINTF("bonding_background(): block is identical to block_with_keys\n"); - return; - } - // Block keys match but data doesn't. Invalidate block and store a new one. - BONDING_DEBUG_PRINTF("bonding_background(): invalidating block_with_keys\n"); - invalidate_block(block_with_keys); - } - switch (block->type) { case BLOCK_SYS_ATTR: write_sys_attr_block(block); @@ -323,27 +359,23 @@ void bonding_background(void) { break; default: - BONDING_DEBUG_PRINTF("unknown block type: %x\n", block->type); break; } } bool bonding_load_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv) { - bonding_block_t *block = find_block_with_keys(is_central, BLOCK_SYS_ATTR, ediv); + bonding_block_t *block = find_candidate_block(is_central, BLOCK_SYS_ATTR, ediv); if (block == NULL) { - BONDING_DEBUG_PRINTF("bonding_load_cccd_info(): block not found, ediv: %04x\n", ediv); return false; } - BONDING_DEBUG_PRINTF("bonding_load_cccd_info(): block found, ediv: %04x\n", ediv); return NRF_SUCCESS == sd_ble_gatts_sys_attr_set(conn_handle, block->data, block->data_length, SYS_ATTR_FLAGS); } bool bonding_load_keys(bool is_central, uint16_t ediv, bonding_keys_t *bonding_keys) { - bonding_block_t *block = find_block_with_keys(is_central, BLOCK_KEYS, ediv); + bonding_block_t *block = find_candidate_block(is_central, BLOCK_KEYS, ediv); if (block == NULL) { - BONDING_DEBUG_PRINTF("bonding_load_keys(): block not found, ediv: %04x\n", ediv); return false; } if (sizeof(bonding_keys_t) != block->data_length) { @@ -351,15 +383,12 @@ bool bonding_load_keys(bool is_central, uint16_t ediv, bonding_keys_t *bonding_k return false; } - BONDING_DEBUG_PRINTF("bonding_load_keys(): block found, ediv: %04x\n", ediv); memcpy(bonding_keys, block->data, block->data_length); - BONDING_DEBUG_PRINT_KEYS(bonding_keys); return true; } void bonding_save_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv) { - BONDING_DEBUG_PRINTF("bonding_save_cccd_info: is_central: %d, conn_handle: %04x, ediv: %04x\n", - is_central, conn_handle, ediv); + BONDING_DEBUG_PRINTF("bonding_save_cccd_info()\n"); queue_write_block(is_central, BLOCK_SYS_ATTR, ediv, conn_handle, NULL, 0); } @@ -367,7 +396,5 @@ void bonding_save_keys(bool is_central, uint16_t conn_handle, bonding_keys_t *bo uint16_t const ediv = is_central ? bonding_keys->peer_enc.master_id.ediv : bonding_keys->own_enc.master_id.ediv; - BONDING_DEBUG_PRINTF("bonding_save_keys: is_central: %d, conn_handle: %04x, ediv: %04x\n", - is_central, conn_handle, ediv); queue_write_block(is_central, BLOCK_KEYS, ediv, conn_handle, (uint8_t *) bonding_keys, sizeof(bonding_keys_t)); } diff --git a/py/gc.c b/py/gc.c index 5e631f5ed..fef67f61b 100755 --- a/py/gc.c +++ b/py/gc.c @@ -464,6 +464,10 @@ void gc_info(gc_info_t *info) { GC_EXIT(); } +bool gc_alloc_possible(void) { + return MP_STATE_MEM(gc_pool_start) != 0; +} + // We place long lived objects at the end of the heap rather than the start. This reduces // fragmentation by localizing the heap churn to one portion of memory (the start of the heap.) void *gc_alloc(size_t n_bytes, bool has_finaliser, bool long_lived) { diff --git a/py/gc.h b/py/gc.h index cd63ba94c..2a0811f4e 100644 --- a/py/gc.h +++ b/py/gc.h @@ -58,6 +58,8 @@ void gc_collect_ptr(void *ptr); void gc_collect_root(void **ptrs, size_t len); void gc_collect_end(void); +// Is the gc heap available? +bool gc_alloc_possible(void); void *gc_alloc(size_t n_bytes, bool has_finaliser, bool long_lived); // Use this function to sweep the whole heap and run all finalisers diff --git a/shared-bindings/_bleio/Characteristic.c b/shared-bindings/_bleio/Characteristic.c index 0434368f2..2b1dc1f78 100644 --- a/shared-bindings/_bleio/Characteristic.c +++ b/shared-bindings/_bleio/Characteristic.c @@ -128,8 +128,7 @@ STATIC mp_obj_t bleio_characteristic_add_to_service(size_t n_args, const mp_obj_ } mp_get_buffer_raise(initial_value, &initial_value_bufinfo, MP_BUFFER_READ); - // There may be some cleanup needed when a characteristic is gc'd, so enable finaliser. - bleio_characteristic_obj_t *characteristic = m_new_obj_with_finaliser(bleio_characteristic_obj_t); + bleio_characteristic_obj_t *characteristic = m_new_obj(bleio_characteristic_obj_t); characteristic->base.type = &bleio_characteristic_type; // Range checking on max_length arg is done by the common_hal layer, because @@ -293,17 +292,7 @@ STATIC mp_obj_t bleio_characteristic_set_cccd(mp_uint_t n_args, const mp_obj_t * } STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bleio_characteristic_set_cccd_obj, 1, bleio_characteristic_set_cccd); -// Cleanup on gc. -STATIC mp_obj_t bleio_characteristic_del(mp_obj_t self_in) { - bleio_characteristic_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_bleio_characteristic_del(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_characteristic_del_obj, bleio_characteristic_del); - - STATIC const mp_rom_map_elem_t bleio_characteristic_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&bleio_characteristic_del_obj) }, { MP_ROM_QSTR(MP_QSTR_add_to_service), MP_ROM_PTR(&bleio_characteristic_add_to_service_obj) }, { MP_ROM_QSTR(MP_QSTR_properties), MP_ROM_PTR(&bleio_characteristic_properties_obj) }, { MP_ROM_QSTR(MP_QSTR_uuid), MP_ROM_PTR(&bleio_characteristic_uuid_obj) }, diff --git a/shared-bindings/_bleio/Characteristic.h b/shared-bindings/_bleio/Characteristic.h index 60ab57572..c4356fd4b 100644 --- a/shared-bindings/_bleio/Characteristic.h +++ b/shared-bindings/_bleio/Characteristic.h @@ -45,6 +45,5 @@ extern bleio_descriptor_obj_t *common_hal_bleio_characteristic_get_descriptor_li extern bleio_service_obj_t *common_hal_bleio_characteristic_get_service(bleio_characteristic_obj_t *self); extern void common_hal_bleio_characteristic_add_descriptor(bleio_characteristic_obj_t *self, bleio_descriptor_obj_t *descriptor); extern void common_hal_bleio_characteristic_set_cccd(bleio_characteristic_obj_t *self, bool notify, bool indicate); -extern void common_hal_bleio_characteristic_del(bleio_characteristic_obj_t *self); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BLEIO_CHARACTERISTIC_H -- cgit v1.2.3 From 402f6f66bd7bd0a22fd6e0a725d356559f4957be Mon Sep 17 00:00:00 2001 From: Kamil Tomaszewski Date: Thu, 9 Jan 2020 11:01:45 +0100 Subject: Add mkspk source files --- ports/cxd56/Makefile | 11 +- ports/cxd56/mkspk/.gitignore | 3 + ports/cxd56/mkspk/Makefile | 51 +++++ ports/cxd56/mkspk/clefia.c | 517 +++++++++++++++++++++++++++++++++++++++++++ ports/cxd56/mkspk/clefia.h | 65 ++++++ ports/cxd56/mkspk/mkspk.c | 383 ++++++++++++++++++++++++++++++++ ports/cxd56/mkspk/mkspk.h | 83 +++++++ 7 files changed, 1109 insertions(+), 4 deletions(-) create mode 100644 ports/cxd56/mkspk/.gitignore create mode 100644 ports/cxd56/mkspk/Makefile create mode 100644 ports/cxd56/mkspk/clefia.c create mode 100644 ports/cxd56/mkspk/clefia.h create mode 100644 ports/cxd56/mkspk/mkspk.c create mode 100644 ports/cxd56/mkspk/mkspk.h (limited to 'ports') diff --git a/ports/cxd56/Makefile b/ports/cxd56/Makefile index 3355332a8..a0782c4e9 100644 --- a/ports/cxd56/Makefile +++ b/ports/cxd56/Makefile @@ -67,13 +67,13 @@ PLATFORM := $(firstword $(subst _, ,$(shell uname -s 2>/dev/null))) ifeq ($(PLATFORM),Darwin) # macOS - MKSPK = $(SPRESENSE_SDK)/sdk/tools/macos/mkspk + MKSPK = mkspk/mkspk else ifeq ($(PLATFORM),Linux) # Linux - MKSPK = $(SPRESENSE_SDK)/sdk/tools/linux/mkspk + MKSPK = mkspk/mkspk else # Cygwin/MSYS2 - MKSPK = $(SPRESENSE_SDK)/sdk/tools/windows/mkspk.exe + MKSPK = mkspk/mkspk.exe endif SERIAL ?= /dev/ttyUSB0 @@ -201,7 +201,10 @@ $(BUILD)/firmware.elf: $(BUILD)/libmpy.a $(ECHO) "LD $@" $(Q)$(LD) $(LDFLAGS) -$(BUILD)/firmware.spk: $(BUILD)/firmware.elf +$(MKSPK): + $(MAKE) -C mkspk + +$(BUILD)/firmware.spk: $(BUILD)/firmware.elf $(MKSPK) $(ECHO) "Creating $@" $(MKSPK) -c 2 $(BUILD)/firmware.elf nuttx $(BUILD)/firmware.spk diff --git a/ports/cxd56/mkspk/.gitignore b/ports/cxd56/mkspk/.gitignore new file mode 100644 index 000000000..e9a6ab18f --- /dev/null +++ b/ports/cxd56/mkspk/.gitignore @@ -0,0 +1,3 @@ +/mkspk +/mkspk.exe + diff --git a/ports/cxd56/mkspk/Makefile b/ports/cxd56/mkspk/Makefile new file mode 100644 index 000000000..d91d17a3c --- /dev/null +++ b/ports/cxd56/mkspk/Makefile @@ -0,0 +1,51 @@ +############################################################################ +# tools/mkspk/Makefile +# +# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +all: mkspk +default: mkspk +.PHONY: clean + +# Add CFLAGS=-g on the make command line to build debug versions + +CFLAGS = -O2 -Wall -I. + +# mkspk - Convert nuttx.hex image to nuttx.spk image + +mkspk: + @gcc $(CFLAGS) -o mkspk mkspk.c clefia.c + +clean: + @rm -f *.o *.a *.dSYM *~ .*.swp + @rm -f mkspk mkspk.exe diff --git a/ports/cxd56/mkspk/clefia.c b/ports/cxd56/mkspk/clefia.c new file mode 100644 index 000000000..02a175505 --- /dev/null +++ b/ports/cxd56/mkspk/clefia.c @@ -0,0 +1,517 @@ +/**************************************************************************** + * tools/cxd56/clefia.c + * + * Copyright (C) 2007, 2008 Sony Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include + +#include "clefia.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define clefiamul4(_x) (clefiamul2(clefiamul2((_x)))) +#define clefiamul6(_x) (clefiamul2((_x)) ^ clefiamul4((_x))) +#define clefiamul8(_x) (clefiamul2(clefiamul4((_x)))) +#define clefiamula(_x) (clefiamul2((_x)) ^ clefiamul8((_x))) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* S0 (8-bit S-box based on four 4-bit S-boxes) */ + +static const unsigned char clefia_s0[256] = +{ + 0x57u, 0x49u, 0xd1u, 0xc6u, 0x2fu, 0x33u, 0x74u, 0xfbu, + 0x95u, 0x6du, 0x82u, 0xeau, 0x0eu, 0xb0u, 0xa8u, 0x1cu, + 0x28u, 0xd0u, 0x4bu, 0x92u, 0x5cu, 0xeeu, 0x85u, 0xb1u, + 0xc4u, 0x0au, 0x76u, 0x3du, 0x63u, 0xf9u, 0x17u, 0xafu, + 0xbfu, 0xa1u, 0x19u, 0x65u, 0xf7u, 0x7au, 0x32u, 0x20u, + 0x06u, 0xceu, 0xe4u, 0x83u, 0x9du, 0x5bu, 0x4cu, 0xd8u, + 0x42u, 0x5du, 0x2eu, 0xe8u, 0xd4u, 0x9bu, 0x0fu, 0x13u, + 0x3cu, 0x89u, 0x67u, 0xc0u, 0x71u, 0xaau, 0xb6u, 0xf5u, + 0xa4u, 0xbeu, 0xfdu, 0x8cu, 0x12u, 0x00u, 0x97u, 0xdau, + 0x78u, 0xe1u, 0xcfu, 0x6bu, 0x39u, 0x43u, 0x55u, 0x26u, + 0x30u, 0x98u, 0xccu, 0xddu, 0xebu, 0x54u, 0xb3u, 0x8fu, + 0x4eu, 0x16u, 0xfau, 0x22u, 0xa5u, 0x77u, 0x09u, 0x61u, + 0xd6u, 0x2au, 0x53u, 0x37u, 0x45u, 0xc1u, 0x6cu, 0xaeu, + 0xefu, 0x70u, 0x08u, 0x99u, 0x8bu, 0x1du, 0xf2u, 0xb4u, + 0xe9u, 0xc7u, 0x9fu, 0x4au, 0x31u, 0x25u, 0xfeu, 0x7cu, + 0xd3u, 0xa2u, 0xbdu, 0x56u, 0x14u, 0x88u, 0x60u, 0x0bu, + 0xcdu, 0xe2u, 0x34u, 0x50u, 0x9eu, 0xdcu, 0x11u, 0x05u, + 0x2bu, 0xb7u, 0xa9u, 0x48u, 0xffu, 0x66u, 0x8au, 0x73u, + 0x03u, 0x75u, 0x86u, 0xf1u, 0x6au, 0xa7u, 0x40u, 0xc2u, + 0xb9u, 0x2cu, 0xdbu, 0x1fu, 0x58u, 0x94u, 0x3eu, 0xedu, + 0xfcu, 0x1bu, 0xa0u, 0x04u, 0xb8u, 0x8du, 0xe6u, 0x59u, + 0x62u, 0x93u, 0x35u, 0x7eu, 0xcau, 0x21u, 0xdfu, 0x47u, + 0x15u, 0xf3u, 0xbau, 0x7fu, 0xa6u, 0x69u, 0xc8u, 0x4du, + 0x87u, 0x3bu, 0x9cu, 0x01u, 0xe0u, 0xdeu, 0x24u, 0x52u, + 0x7bu, 0x0cu, 0x68u, 0x1eu, 0x80u, 0xb2u, 0x5au, 0xe7u, + 0xadu, 0xd5u, 0x23u, 0xf4u, 0x46u, 0x3fu, 0x91u, 0xc9u, + 0x6eu, 0x84u, 0x72u, 0xbbu, 0x0du, 0x18u, 0xd9u, 0x96u, + 0xf0u, 0x5fu, 0x41u, 0xacu, 0x27u, 0xc5u, 0xe3u, 0x3au, + 0x81u, 0x6fu, 0x07u, 0xa3u, 0x79u, 0xf6u, 0x2du, 0x38u, + 0x1au, 0x44u, 0x5eu, 0xb5u, 0xd2u, 0xecu, 0xcbu, 0x90u, + 0x9au, 0x36u, 0xe5u, 0x29u, 0xc3u, 0x4fu, 0xabu, 0x64u, + 0x51u, 0xf8u, 0x10u, 0xd7u, 0xbcu, 0x02u, 0x7du, 0x8eu +}; + +/* S1 (8-bit S-box based on inverse function) */ + +static const unsigned char clefia_s1[256] = +{ + 0x6cu, 0xdau, 0xc3u, 0xe9u, 0x4eu, 0x9du, 0x0au, 0x3du, + 0xb8u, 0x36u, 0xb4u, 0x38u, 0x13u, 0x34u, 0x0cu, 0xd9u, + 0xbfu, 0x74u, 0x94u, 0x8fu, 0xb7u, 0x9cu, 0xe5u, 0xdcu, + 0x9eu, 0x07u, 0x49u, 0x4fu, 0x98u, 0x2cu, 0xb0u, 0x93u, + 0x12u, 0xebu, 0xcdu, 0xb3u, 0x92u, 0xe7u, 0x41u, 0x60u, + 0xe3u, 0x21u, 0x27u, 0x3bu, 0xe6u, 0x19u, 0xd2u, 0x0eu, + 0x91u, 0x11u, 0xc7u, 0x3fu, 0x2au, 0x8eu, 0xa1u, 0xbcu, + 0x2bu, 0xc8u, 0xc5u, 0x0fu, 0x5bu, 0xf3u, 0x87u, 0x8bu, + 0xfbu, 0xf5u, 0xdeu, 0x20u, 0xc6u, 0xa7u, 0x84u, 0xceu, + 0xd8u, 0x65u, 0x51u, 0xc9u, 0xa4u, 0xefu, 0x43u, 0x53u, + 0x25u, 0x5du, 0x9bu, 0x31u, 0xe8u, 0x3eu, 0x0du, 0xd7u, + 0x80u, 0xffu, 0x69u, 0x8au, 0xbau, 0x0bu, 0x73u, 0x5cu, + 0x6eu, 0x54u, 0x15u, 0x62u, 0xf6u, 0x35u, 0x30u, 0x52u, + 0xa3u, 0x16u, 0xd3u, 0x28u, 0x32u, 0xfau, 0xaau, 0x5eu, + 0xcfu, 0xeau, 0xedu, 0x78u, 0x33u, 0x58u, 0x09u, 0x7bu, + 0x63u, 0xc0u, 0xc1u, 0x46u, 0x1eu, 0xdfu, 0xa9u, 0x99u, + 0x55u, 0x04u, 0xc4u, 0x86u, 0x39u, 0x77u, 0x82u, 0xecu, + 0x40u, 0x18u, 0x90u, 0x97u, 0x59u, 0xddu, 0x83u, 0x1fu, + 0x9au, 0x37u, 0x06u, 0x24u, 0x64u, 0x7cu, 0xa5u, 0x56u, + 0x48u, 0x08u, 0x85u, 0xd0u, 0x61u, 0x26u, 0xcau, 0x6fu, + 0x7eu, 0x6au, 0xb6u, 0x71u, 0xa0u, 0x70u, 0x05u, 0xd1u, + 0x45u, 0x8cu, 0x23u, 0x1cu, 0xf0u, 0xeeu, 0x89u, 0xadu, + 0x7au, 0x4bu, 0xc2u, 0x2fu, 0xdbu, 0x5au, 0x4du, 0x76u, + 0x67u, 0x17u, 0x2du, 0xf4u, 0xcbu, 0xb1u, 0x4au, 0xa8u, + 0xb5u, 0x22u, 0x47u, 0x3au, 0xd5u, 0x10u, 0x4cu, 0x72u, + 0xccu, 0x00u, 0xf9u, 0xe0u, 0xfdu, 0xe2u, 0xfeu, 0xaeu, + 0xf8u, 0x5fu, 0xabu, 0xf1u, 0x1bu, 0x42u, 0x81u, 0xd6u, + 0xbeu, 0x44u, 0x29u, 0xa6u, 0x57u, 0xb9u, 0xafu, 0xf2u, + 0xd4u, 0x75u, 0x66u, 0xbbu, 0x68u, 0x9fu, 0x50u, 0x02u, + 0x01u, 0x3cu, 0x7fu, 0x8du, 0x1au, 0x88u, 0xbdu, 0xacu, + 0xf7u, 0xe4u, 0x79u, 0x96u, 0xa2u, 0xfcu, 0x6du, 0xb2u, + 0x6bu, 0x03u, 0xe1u, 0x2eu, 0x7du, 0x14u, 0x95u, 0x1du +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static void bytecpy(unsigned char *dst, const unsigned char *src, int bytelen) +{ + while (bytelen-- > 0) + { + *dst++ = *src++; + } +} + +static unsigned char clefiamul2(unsigned char x) +{ + /* multiplication over GF(2^8) (p(x) = '11d') */ + + if (x & 0x80u) + { + x ^= 0x0eu; + } + + return ((x << 1) | (x >> 7)); +} + +static void clefiaf0xor(unsigned char *dst, const unsigned char *src, + const unsigned char *rk) +{ + unsigned char x[4]; + unsigned char y[4]; + unsigned char z[4]; + + /* F0 */ + + /* Key addition */ + + bytexor(x, src, rk, 4); + + /* Substitution layer */ + + z[0] = clefia_s0[x[0]]; + z[1] = clefia_s1[x[1]]; + z[2] = clefia_s0[x[2]]; + z[3] = clefia_s1[x[3]]; + + /* Diffusion layer (M0) */ + + y[0] = z[0] ^ clefiamul2(z[1]) ^ clefiamul4(z[2]) ^ clefiamul6(z[3]); + y[1] = clefiamul2(z[0]) ^ z[1] ^ clefiamul6(z[2]) ^ clefiamul4(z[3]); + y[2] = clefiamul4(z[0]) ^ clefiamul6(z[1]) ^ z[2] ^ clefiamul2(z[3]); + y[3] = clefiamul6(z[0]) ^ clefiamul4(z[1]) ^ clefiamul2(z[2]) ^ z[3]; + + /* Xoring after F0 */ + + bytecpy(dst + 0, src + 0, 4); + bytexor(dst + 4, src + 4, y, 4); +} + +static void clefiaf1xor(unsigned char *dst, const unsigned char *src, + const unsigned char *rk) +{ + unsigned char x[4]; + unsigned char y[4]; + unsigned char z[4]; + + /* F1 */ + + /* Key addition */ + + bytexor(x, src, rk, 4); + + /* Substitution layer */ + + z[0] = clefia_s1[x[0]]; + z[1] = clefia_s0[x[1]]; + z[2] = clefia_s1[x[2]]; + z[3] = clefia_s0[x[3]]; + + /* Diffusion layer (M1) */ + + y[0] = z[0] ^ clefiamul8(z[1]) ^ clefiamul2(z[2]) ^ clefiamula(z[3]); + y[1] = clefiamul8(z[0]) ^ z[1] ^ clefiamula(z[2]) ^ clefiamul2(z[3]); + y[2] = clefiamul2(z[0]) ^ clefiamula(z[1]) ^ z[2] ^ clefiamul8(z[3]); + y[3] = clefiamula(z[0]) ^ clefiamul2(z[1]) ^ clefiamul8(z[2]) ^ z[3]; + + /* Xoring after F1 */ + + bytecpy(dst + 0, src + 0, 4); + bytexor(dst + 4, src + 4, y, 4); +} + +static void clefiagfn4(unsigned char *y, const unsigned char *x, + const unsigned char *rk, int r) +{ + unsigned char fin[16]; + unsigned char fout[16]; + + bytecpy(fin, x, 16); + while (r-- > 0) + { + clefiaf0xor(fout + 0, fin + 0, rk + 0); + clefiaf1xor(fout + 8, fin + 8, rk + 4); + rk += 8; + if (r) + { + /* swapping for encryption */ + + bytecpy(fin + 0, fout + 4, 12); + bytecpy(fin + 12, fout + 0, 4); + } + } + + bytecpy(y, fout, 16); +} + +#if 0 /* Not used */ +static void clefiagfn8(unsigned char *y, const unsigned char *x, + const unsigned char *rk, int r) +{ + unsigned char fin[32]; + unsigned char fout[32]; + + bytecpy(fin, x, 32); + while (r-- > 0) + { + clefiaf0xor(fout + 0, fin + 0, rk + 0); + clefiaf1xor(fout + 8, fin + 8, rk + 4); + clefiaf0xor(fout + 16, fin + 16, rk + 8); + clefiaf1xor(fout + 24, fin + 24, rk + 12); + rk += 16; + if (r) + { + /* swapping for encryption */ + + bytecpy(fin + 0, fout + 4, 28); + bytecpy(fin + 28, fout + 0, 4); + } + } + + bytecpy(y, fout, 32); +} +#endif + +#if 0 /* Not used */ +static void clefiagfn4inv(unsigned char *y, const unsigned char *x, + const unsigned char *rk, int r) +{ + unsigned char fin[16]; + unsigned char fout[16]; + + rk += (r - 1) * 8; + bytecpy(fin, x, 16); + while (r-- > 0) + { + clefiaf0xor(fout + 0, fin + 0, rk + 0); + clefiaf1xor(fout + 8, fin + 8, rk + 4); + rk -= 8; + if (r) + { + /* swapping for decryption */ + + bytecpy(fin + 0, fout + 12, 4); + bytecpy(fin + 4, fout + 0, 12); + } + } + + bytecpy(y, fout, 16); +} +#endif + +static void clefiadoubleswap(unsigned char *lk) +{ + unsigned char t[16]; + + t[0] = (lk[0] << 7) | (lk[1] >> 1); + t[1] = (lk[1] << 7) | (lk[2] >> 1); + t[2] = (lk[2] << 7) | (lk[3] >> 1); + t[3] = (lk[3] << 7) | (lk[4] >> 1); + t[4] = (lk[4] << 7) | (lk[5] >> 1); + t[5] = (lk[5] << 7) | (lk[6] >> 1); + t[6] = (lk[6] << 7) | (lk[7] >> 1); + t[7] = (lk[7] << 7) | (lk[15] & 0x7fu); + + t[8] = (lk[8] >> 7) | (lk[0] & 0xfeu); + t[9] = (lk[9] >> 7) | (lk[8] << 1); + t[10] = (lk[10] >> 7) | (lk[9] << 1); + t[11] = (lk[11] >> 7) | (lk[10] << 1); + t[12] = (lk[12] >> 7) | (lk[11] << 1); + t[13] = (lk[13] >> 7) | (lk[12] << 1); + t[14] = (lk[14] >> 7) | (lk[13] << 1); + t[15] = (lk[15] >> 7) | (lk[14] << 1); + + bytecpy(lk, t, 16); +} + +static void clefiaconset(unsigned char *con, const unsigned char *iv, int lk) +{ + unsigned char t[2]; + unsigned char tmp; + + bytecpy(t, iv, 2); + while (lk-- > 0) + { + con[0] = t[0] ^ 0xb7u; /* P_16 = 0xb7e1 (natural logarithm) */ + con[1] = t[1] ^ 0xe1u; + con[2] = ~((t[0] << 1) | (t[1] >> 7)); + con[3] = ~((t[1] << 1) | (t[0] >> 7)); + con[4] = ~t[0] ^ 0x24u; /* Q_16 = 0x243f (circle ratio) */ + con[5] = ~t[1] ^ 0x3fu; + con[6] = t[1]; + con[7] = t[0]; + con += 8; + + /* updating T */ + + if (t[1] & 0x01u) + { + t[0] ^= 0xa8u; + t[1] ^= 0x30u; + } + + tmp = t[0] << 7; + t[0] = (t[0] >> 1) | (t[1] << 7); + t[1] = (t[1] >> 1) | tmp; + } +} + +static void left_shift_one(uint8_t * in, uint8_t * out) +{ + int i; + int overflow; + + overflow = 0; + for (i = 15; i >= 0; i--) + { + out[i] = in[i] << 1; + out[i] |= overflow; + overflow = (in[i] >> 7) & 1; + } +} + +static void gen_subkey(struct cipher *c) +{ + uint8_t L[16]; + + memset(L, 0, 16); + clefiaencrypt(L, L, c->rk, c->round); + + left_shift_one(L, c->k1); + if (L[0] & 0x80) + { + c->k1[15] = c->k1[15] ^ 0x87; + } + + left_shift_one(c->k1, c->k2); + if (c->k1[0] & 0x80) + { + c->k2[15] = c->k2[15] ^ 0x87; + } + + memset(L, 0, 16); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +struct cipher *cipher_init(uint8_t * key, uint8_t * iv) +{ + struct cipher *c; + + c = (struct cipher *)malloc(sizeof(*c)); + if (!c) + { + return NULL; + } + + c->round = clefiakeyset(c->rk, key); + + gen_subkey(c); + memset(c->vector, 0, 16); + + return c; +} + +void cipher_deinit(struct cipher *c) +{ + memset(c, 0, sizeof(*c)); + free(c); +} + +int cipher_calc_cmac(struct cipher *c, void *data, int size, void *cmac) +{ + uint8_t m[16]; + uint8_t *p; + + if (size & 0xf) + { + return -1; + } + + p = (uint8_t *) data; + while (size) + { + bytexor(m, c->vector, p, 16); + clefiaencrypt(c->vector, m, c->rk, c->round); + size -= 16; + p += 16; + } + + bytexor(cmac, m, c->k1, 16); + clefiaencrypt(cmac, cmac, c->rk, c->round); + memset(m, 0, 16); + + return 0; +} + +void bytexor(unsigned char *dst, const unsigned char *a, + const unsigned char *b, int bytelen) +{ + while (bytelen-- > 0) + { + *dst++ = *a++ ^ *b++; + } +} + +int clefiakeyset(unsigned char *rk, const unsigned char *skey) +{ + const unsigned char iv[2] = + { + 0x42u, 0x8au /* cubic root of 2 */ + }; + + unsigned char lk[16]; + unsigned char con128[4 * 60]; + int i; + + /* generating CONi^(128) (0 <= i < 60, lk = 30) */ + + clefiaconset(con128, iv, 30); + + /* GFN_{4,12} (generating L from K) */ + + clefiagfn4(lk, skey, con128, 12); + + bytecpy(rk, skey, 8); /* initial whitening key (WK0, WK1) */ + rk += 8; + for (i = 0; i < 9; i++) + { + /* round key (RKi (0 <= i < 36)) */ + + bytexor(rk, lk, con128 + i * 16 + (4 * 24), 16); + if (i % 2) + { + bytexor(rk, rk, skey, 16); /* Xoring K */ + } + + clefiadoubleswap(lk); /* Updating L (DoubleSwap function) */ + rk += 16; + } + + bytecpy(rk, skey + 8, 8); /* final whitening key (WK2, WK3) */ + + return 18; +} + +void clefiaencrypt(unsigned char *ct, const unsigned char *pt, + const unsigned char *rk, const int r) +{ + unsigned char rin[16]; + unsigned char rout[16]; + + bytecpy(rin, pt, 16); + + bytexor(rin + 4, rin + 4, rk + 0, 4); /* initial key whitening */ + bytexor(rin + 12, rin + 12, rk + 4, 4); + rk += 8; + + clefiagfn4(rout, rin, rk, r); /* GFN_{4,r} */ + + bytecpy(ct, rout, 16); + bytexor(ct + 4, ct + 4, rk + r * 8 + 0, 4); /* final key whitening */ + bytexor(ct + 12, ct + 12, rk + r * 8 + 4, 4); +} diff --git a/ports/cxd56/mkspk/clefia.h b/ports/cxd56/mkspk/clefia.h new file mode 100644 index 000000000..a0e02587d --- /dev/null +++ b/ports/cxd56/mkspk/clefia.h @@ -0,0 +1,65 @@ +/**************************************************************************** + * tools/cxd56/clefia.h + * + * Copyright (C) 2007, 2008 Sony Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ + +#ifndef _TOOLS_CXD56_CLEFIA_H_ +#define _TOOLS_CXD56_CLEFIA_H_ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +struct cipher + { + int mode; + int dir; + uint8_t rk[8 * 26 + 16]; + uint8_t vector[16]; + int round; + uint8_t k1[16]; + uint8_t k2[16]; + }; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +struct cipher *cipher_init(uint8_t * key, uint8_t * iv); +void cipher_deinit(struct cipher *c); +int cipher_calc_cmac(struct cipher *c, void *data, int size, void *cmac); +void bytexor(unsigned char *dst, const unsigned char *a, + const unsigned char *b, int bytelen); +int clefiakeyset(unsigned char *rk, const unsigned char *skey); +void clefiaencrypt(unsigned char *ct, const unsigned char *pt, + const unsigned char *rk, const int r); + +#endif diff --git a/ports/cxd56/mkspk/mkspk.c b/ports/cxd56/mkspk/mkspk.c new file mode 100644 index 000000000..c447ad7da --- /dev/null +++ b/ports/cxd56/mkspk/mkspk.c @@ -0,0 +1,383 @@ +/**************************************************************************** + * tools/cxd56/mkspk.c + * + * Copyright (C) 2007, 2008 Sony Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mkspk.h" + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct args +{ + int core; + char *elffile; + char *savename; + char *outputfile; +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static uint8_t vmk[16] = + "\x27\xc0\xaf\x1b\x5d\xcb\xc6\xc5\x58\x22\x1c\xdd\xaf\xf3\x20\x21"; + +static struct args g_options = +{ + 0 +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static struct args *parse_args(int argc, char **argv) +{ + int opt; + int show_help; + struct args *args = &g_options; + char *endp; + + show_help = 0; + + if (argc < 2) + { + show_help = 1; + } + + memset(args, 0, sizeof(*args)); + args->core = -1; + + while ((opt = getopt(argc, argv, "h:c:")) != -1) + { + switch (opt) + { + case 'c': + args->core = strtol(optarg, &endp, 0); + if (*endp) + { + fprintf(stderr, "Invalid core number \"%s\"\n", optarg); + show_help = 1; + } + break; + + case 'h': + default: + show_help = 1; + } + } + + argc -= optind; + argv += optind; + + args->elffile = argv[0]; + args->savename = argv[1]; + argc -= 2; + argv += 2; + + if (argc > 0) + { + args->outputfile = strdup(argv[0]); + } + else + { + show_help = 1; + } + + /* Sanity checks for options */ + + if (show_help == 1) + { + fprintf(stderr, + "mkspk [-c ] []\n"); + exit(EXIT_FAILURE); + } + + if (args->core < 0) + { + fprintf(stderr, "Core number is not set. Please use -c option.\n"); + exit(EXIT_FAILURE); + } + + if (strlen(args->savename) > 63) + { + fprintf(stderr, "savename too long.\n"); + exit(EXIT_FAILURE); + } + + return args; +} + +static struct elf_file *load_elf(const char *filename) +{ + size_t fsize; + int pos; + char *buf; + FILE *fp; + struct elf_file *ef; + Elf32_Shdr *sh; + uint16_t i; + int ret; + + fp = fopen(filename, "rb"); + if (!fp) + { + return NULL; + } + + ef = (struct elf_file *)malloc(sizeof(*ef)); + if (!ef) + { + return NULL; + } + + pos = fseek(fp, 0, SEEK_END); + fsize = (size_t) ftell(fp); + fseek(fp, pos, SEEK_SET); + + buf = (char *)malloc(fsize); + if (!buf) + { + return NULL; + } + + ret = fread(buf, fsize, 1, fp); + fclose(fp); + if (ret != 1) + { + return NULL; + } + + ef->data = buf; + + ef->ehdr = (Elf32_Ehdr *) buf; + + Elf32_Ehdr *h = (Elf32_Ehdr *) buf; + + if (!(h->e_ident[EI_MAG0] == 0x7f && + h->e_ident[EI_MAG1] == 'E' && + h->e_ident[EI_MAG2] == 'L' && h->e_ident[EI_MAG3] == 'F')) + { + free(ef); + free(buf); + return NULL; + } + + ef->phdr = (Elf32_Phdr *) (buf + ef->ehdr->e_phoff); + ef->shdr = (Elf32_Shdr *) (buf + ef->ehdr->e_shoff); + ef->shstring = buf + ef->shdr[ef->ehdr->e_shstrndx].sh_offset; + + for (i = 0, sh = ef->shdr; i < ef->ehdr->e_shnum; i++, sh++) + { + if (sh->sh_type == SHT_SYMTAB) + { + ef->symtab = (Elf32_Sym *) (buf + sh->sh_offset); + ef->nsyms = sh->sh_size / sh->sh_entsize; + continue; + } + + if (sh->sh_type == SHT_STRTAB) + { + if (!strcmp(".strtab", ef->shstring + sh->sh_name)) + { + ef->string = buf + sh->sh_offset; + } + } + } + + return ef; +} + +static void *create_image(struct elf_file *elf, int core, char *savename, + int *image_size) +{ + char *img; + struct spk_header *header; + struct spk_prog_info *pi; + Elf32_Phdr *ph; + Elf32_Sym *sym; + char *name; + int snlen; + int nphs, psize, imgsize; + int i; + int j; + uint32_t offset; + uint32_t sp; + + snlen = alignup(strlen(savename) + 1, 16); + + nphs = 0; + psize = 0; + for (i = 0, ph = elf->phdr; i < elf->ehdr->e_phnum; i++, ph++) + { + if (ph->p_type != PT_LOAD || ph->p_filesz == 0) + { + continue; + } + + nphs++; + psize += alignup(ph->p_filesz, 16); + } + + imgsize = sizeof(*header) + snlen + (nphs * 16) + psize; + + img = (char *)malloc(imgsize + 32); + if (!img) + { + return NULL; + } + + *image_size = imgsize; + sym = elf->symtab; + name = elf->string; + sp = 0; + + for (j = 0; j < elf->nsyms; j++, sym++) + { + if (!strcmp("__stack", name + sym->st_name)) + { + sp = sym->st_value; + } + } + + memset(img, 0, imgsize); + + header = (struct spk_header *)img; + header->magic[0] = 0xef; + header->magic[1] = 'M'; + header->magic[2] = 'O'; + header->magic[3] = 'D'; + header->cpu = core; + + header->entry = elf->ehdr->e_entry; + header->stack = sp; + header->core = core; + + header->binaries = nphs; + header->phoffs = sizeof(*header) + snlen; + header->mode = 0777; + + strncpy(img + sizeof(*header), savename, 63); + + ph = elf->phdr; + pi = (struct spk_prog_info *)(img + header->phoffs); + offset = ((char *)pi - img) + (nphs * sizeof(*pi)); + for (i = 0; i < elf->ehdr->e_phnum; i++, ph++) + { + if (ph->p_type != PT_LOAD || ph->p_filesz == 0) + continue; + pi->load_address = ph->p_paddr; + pi->offset = offset; + pi->size = alignup(ph->p_filesz, 16); /* need 16 bytes align for + * decryption */ + pi->memsize = ph->p_memsz; + + memcpy(img + pi->offset, elf->data + ph->p_offset, ph->p_filesz); + + offset += alignup(ph->p_filesz, 16); + pi++; + } + + return img; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +int main(int argc, char **argv) +{ + struct args *args; + struct elf_file *elf; + struct cipher *c; + uint8_t *spkimage; + int size = 0; + FILE *fp; + char footer[16]; + + args = parse_args(argc, argv); + + elf = load_elf(args->elffile); + if (!elf) + { + fprintf(stderr, "Loading ELF %s failure.\n", args->elffile); + exit(EXIT_FAILURE); + } + + spkimage = create_image(elf, args->core, args->savename, &size); + free(elf); + + c = cipher_init(vmk, NULL); + cipher_calc_cmac(c, spkimage, size, (uint8_t *) spkimage + size); + cipher_deinit(c); + + size += 16; /* Extend CMAC size */ + + snprintf(footer, 16, "MKSPK_BN_HOOTER"); + footer[15] = '\0'; + + fp = fopen(args->outputfile, "wb"); + if (!fp) + { + fprintf(stderr, "Output file open error.\n"); + free(spkimage); + exit(EXIT_FAILURE); + } + + fwrite(spkimage, size, 1, fp); + fwrite(footer, 16, 1, fp); + + fclose(fp); + + printf("File %s is successfully created.\n", args->outputfile); + free(args->outputfile); + + memset(spkimage, 0, size); + free(spkimage); + + exit(EXIT_SUCCESS); +} diff --git a/ports/cxd56/mkspk/mkspk.h b/ports/cxd56/mkspk/mkspk.h new file mode 100644 index 000000000..5a67bb3dd --- /dev/null +++ b/ports/cxd56/mkspk/mkspk.h @@ -0,0 +1,83 @@ +/**************************************************************************** + * tools/cxd56/mkspk.h + * + * Copyright (C) 2007, 2008 Sony Corporation + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + *****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include "clefia.h" +#include "elf.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define alignup(x, a) (((x) + ((a) - 1)) & ~((a) - 1)) +#define swap(a, b) { (a) ^= (b); (b) ^= (a); (a) ^= (b); } + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +struct spk_header + { + uint8_t magic[4]; + uint8_t cpu; + uint8_t reserved[11]; + uint32_t entry; + uint32_t stack; + uint16_t core; + uint16_t binaries; + uint16_t phoffs; + uint16_t mode; + }; + +struct spk_prog_info + { + uint32_t load_address; + uint32_t offset; + uint32_t size; + uint32_t memsize; + }; + +struct elf_file + { + Elf32_Ehdr *ehdr; + Elf32_Phdr *phdr; + Elf32_Shdr *shdr; + Elf32_Sym *symtab; + int nsyms; + char *shstring; + char *string; + char *data; + }; -- cgit v1.2.3 From de2379bc30534c402836881b2e9b25dada41ca41 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Mon, 13 Jan 2020 17:24:52 -0500 Subject: minor WIP debug edits --- ports/stm32f4/Makefile | 5 ++- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 4 +- ports/stm32f4/boards/openocd_stm32f4.cfg | 44 ++++++++++++++++++++++ ports/stm32f4/supervisor/usb.c | 1 + 4 files changed, 50 insertions(+), 4 deletions(-) create mode 100644 ports/stm32f4/boards/openocd_stm32f4.cfg (limited to 'ports') diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index 93cde6737..c3eb4aa3b 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -22,7 +22,7 @@ # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN # THE SOFTWARE. -DEBUG = 1 +#DEBUG = 1 # Select the board to build for. ifeq ($(BOARD),) @@ -85,6 +85,7 @@ ifeq ($(DEBUG), 1) CFLAGS += -fno-inline -fno-ipa-sra else CFLAGS += -Os -DNDEBUG + CFLAGS += -ggdb # TODO: Test with -flto ### CFLAGS += -flto endif @@ -256,7 +257,7 @@ $(BUILD)/firmware.hex: $(BUILD)/firmware.elf $(BUILD)/firmware.uf2: $(BUILD)/firmware.hex $(ECHO) "Create $@" - $(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0x57755a57 -b 0x08000000 -c -o "$(BUILD)/firmware.uf2" $^ + $(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0x57755a57 -b 0x08010000 -c -o "$(BUILD)/firmware.uf2" $^ include $(TOP)/py/mkrules.mk diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index e8a257983..c033d1d4b 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -17,5 +17,5 @@ MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE -# LD_FILE = boards/STM32F401_boot.ld -LD_FILE = boards/STM32F401_fs.ld \ No newline at end of file +LD_FILE = boards/STM32F401_boot.ld +#LD_FILE = boards/STM32F401_fs.ld \ No newline at end of file diff --git a/ports/stm32f4/boards/openocd_stm32f4.cfg b/ports/stm32f4/boards/openocd_stm32f4.cfg new file mode 100644 index 000000000..19631a7c8 --- /dev/null +++ b/ports/stm32f4/boards/openocd_stm32f4.cfg @@ -0,0 +1,44 @@ +# This script configures OpenOCD for use with an ST-Link V2 programmer/debugger +# and an STM32F4 target microcontroller. +# +# To flash your firmware: +# +# $ openocd -f openocd_stm32f4.cfg \ +# -c "stm_flash build-BOARD/firmware0.bin 0x08000000 build-BOARD/firmware1.bin 0x08020000" +# +# For a gdb server on port 3333: +# +# $ openocd -f openocd_stm32f4.cfg + + +source [find interface/stlink-v2.cfg] +transport select hla_swd +source [find target/stm32f4x.cfg] +reset_config srst_only +init + +proc stm_flash { BIN0 ADDR0 {BIN1 ""} {ADDR1 ""} } { + reset halt + sleep 100 + wait_halt 2 + flash write_image erase $BIN0 $ADDR0 + sleep 100 + verify_image $BIN0 $ADDR0 + sleep 100 + if {$BIN1 ne ""} { + flash write_image erase $BIN1 $ADDR1 + sleep 100 + verify_image $BIN1 $ADDR1 + sleep 100 + } + reset run + shutdown +} + +proc stm_erase {} { + reset halt + sleep 100 + stm32f4x mass_erase 0 + sleep 100 + shutdown +} diff --git a/ports/stm32f4/supervisor/usb.c b/ports/stm32f4/supervisor/usb.c index 5733527c2..afafe26a9 100644 --- a/ports/stm32f4/supervisor/usb.c +++ b/ports/stm32f4/supervisor/usb.c @@ -105,6 +105,7 @@ void init_usb_hardware(void) { #endif /* Peripheral clock enable */ + __HAL_RCC_USB_OTG_FS_CLK_DISABLE(); __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); init_usb_vbus_sense(); -- cgit v1.2.3 From 4ad004f24eb79a382f1e6230f8ff02784d469d87 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Mon, 13 Jan 2020 17:52:32 -0500 Subject: put bonding to-do flags into Connection objects instead of using a heap-allocated queue --- ports/nrf/common-hal/_bleio/Connection.c | 32 ++--- ports/nrf/common-hal/_bleio/Connection.h | 9 +- ports/nrf/common-hal/_bleio/bonding.c | 204 +++++++++---------------------- ports/nrf/common-hal/_bleio/bonding.h | 21 ++-- ports/nrf/mpconfigport.h | 1 - 5 files changed, 84 insertions(+), 183 deletions(-) (limited to 'ports') diff --git a/ports/nrf/common-hal/_bleio/Connection.c b/ports/nrf/common-hal/_bleio/Connection.c index b9a9cf2c4..ac5c7ecba 100644 --- a/ports/nrf/common-hal/_bleio/Connection.c +++ b/ports/nrf/common-hal/_bleio/Connection.c @@ -46,6 +46,7 @@ #include "shared-bindings/_bleio/Characteristic.h" #include "shared-bindings/_bleio/Service.h" #include "shared-bindings/_bleio/UUID.h" +#include "supervisor/shared/tick.h" #include "common-hal/_bleio/bonding.h" @@ -93,7 +94,6 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { switch (ble_evt->header.evt_id) { case BLE_GAP_EVT_DISCONNECTED: - CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_DISCONNECTED\n"); // Adapter.c does the work for this event. break; @@ -130,7 +130,12 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { self->pair_status == PAIR_PAIRED && ble_evt->evt.gatts_evt.params.write.uuid.type == BLE_UUID_TYPE_BLE && ble_evt->evt.gatts_evt.params.write.uuid.uuid == 0x2902) { - bonding_save_cccd_info(self->is_central, self->conn_handle, self->ediv); + // + // Save sys_attr data (CCCD state) in bonding area at + // next opportunity, but also remember time of this + // request, so we can consolidate closely-spaced requests. + self->do_bond_cccds = true; + self->do_bond_cccds_request_time = supervisor_ticks_ms64(); } break; @@ -194,7 +199,6 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { break; } case BLE_GAP_EVT_SEC_PARAMS_REQUEST: { - CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_SEC_PARAMS_REQUEST\n"); // First time pairing. // 1. Either we or peer initiate the process // 2. Peer asks for security parameters using BLE_GAP_EVT_SEC_PARAMS_REQUEST. @@ -227,47 +231,40 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { } case BLE_GAP_EVT_LESC_DHKEY_REQUEST: - CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_LESC_DHKEY_REQUEST\n"); // TODO for LESC pairing: // sd_ble_gap_lesc_dhkey_reply(...); break; case BLE_GAP_EVT_AUTH_STATUS: { // 0x19 - CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_AUTH_STATUS\n"); // Key exchange completed. ble_gap_evt_auth_status_t* status = &ble_evt->evt.gap_evt.params.auth_status; self->sec_status = status->auth_status; if (status->auth_status == BLE_GAP_SEC_STATUS_SUCCESS) { self->ediv = self->bonding_keys.own_enc.master_id.ediv; self->pair_status = PAIR_PAIRED; - CONNECTION_DEBUG_PRINTF("PAIR_PAIRED\n"); - bonding_save_keys(self->is_central, self->conn_handle, &self->bonding_keys); + // Save keys in bonding area at next opportunity. + self->do_bond_keys = true; } else { // Inform busy-waiter pairing has failed. self->pair_status = PAIR_NOT_PAIRED; - CONNECTION_DEBUG_PRINTF("PAIR_NOT_PAIRED\n"); } break; } case BLE_GAP_EVT_SEC_INFO_REQUEST: { // 0x14 - CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_SEC_INFO_REQUEST\n"); // Peer asks for the stored keys. // - load key and return if bonded previously. // - Else return NULL --> Initiate key exchange ble_gap_evt_sec_info_request_t* sec_info_request = &ble_evt->evt.gap_evt.params.sec_info_request; (void) sec_info_request; if ( bonding_load_keys(self->is_central, sec_info_request->master_id.ediv, &self->bonding_keys) ) { - CONNECTION_DEBUG_PRINTF("keys found\n"); - uint32_t err_code = sd_ble_gap_sec_info_reply( + sd_ble_gap_sec_info_reply( self->conn_handle, &self->bonding_keys.own_enc.enc_info, &self->bonding_keys.peer_id.id_info, NULL); - CONNECTION_DEBUG_PRINTF("sd_ble_gap_sec_info_reply err_code: %0lx\n", err_code); self->ediv = self->bonding_keys.own_enc.master_id.ediv; } else { - CONNECTION_DEBUG_PRINTF("keys not found\n"); // We don't have stored keys. Ask for keys. sd_ble_gap_sec_info_reply(self->conn_handle, NULL, NULL, NULL); } @@ -277,8 +274,6 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { case BLE_GAP_EVT_CONN_SEC_UPDATE: { // 0x1a // We get this both on first-time pairing and on subsequent pairings using stored keys. ble_gap_conn_sec_t* conn_sec = &ble_evt->evt.gap_evt.params.conn_sec_update.conn_sec; - CONNECTION_DEBUG_PRINTF("BLE_GAP_EVT_CONN_SEC_UPDATE, sm: %d, lv: %d\n", - conn_sec->sec_mode.sm, conn_sec->sec_mode.lv); if (conn_sec->sec_mode.sm <= 1 && conn_sec->sec_mode.lv <= 1) { // Security setup did not succeed: // mode 0, level 0 means no access @@ -289,10 +284,8 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { if (bonding_load_cccd_info(self->is_central, self->conn_handle, self->ediv)) { // Did an sd_ble_gatts_sys_attr_set() with the stored sys_attr values. // Not quite paired yet: wait for BLE_GAP_EVT_AUTH_STATUS with BLE_GAP_SEC_STATUS_SUCCESS. - CONNECTION_DEBUG_PRINTF("did bonding_load_cccd_info()\n"); } else { // No matching bonding found, so use fresh system attributes. - CONNECTION_DEBUG_PRINTF("bonding_load_cccd_info() failed\n"); sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); } self->pair_status = PAIR_PAIRED; @@ -301,10 +294,8 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { } default: - CONNECTION_DEBUG_PRINTF("Unhandled event: %04x\n", ble_evt->header.evt_id); return false; } - CONNECTION_DEBUG_PRINTF("Handled event: %04x\n", ble_evt->header.evt_id); return true; } @@ -590,8 +581,7 @@ STATIC bool discovery_on_ble_evt(ble_evt_t *ble_evt, mp_obj_t payload) { break; default: - // For debugging. - // mp_printf(&mp_plat_print, "Unhandled discovery event: 0x%04x\n", ble_evt->header.evt_id); + // CONNECTION_DEBUG_PRINTF(&mp_plat_print, "Unhandled discovery event: 0x%04x\n", ble_evt->header.evt_id); return false; break; } diff --git a/ports/nrf/common-hal/_bleio/Connection.h b/ports/nrf/common-hal/_bleio/Connection.h index daa7f6446..a9e82dd39 100644 --- a/ports/nrf/common-hal/_bleio/Connection.h +++ b/ports/nrf/common-hal/_bleio/Connection.h @@ -57,8 +57,8 @@ typedef struct { // The advertising data and scan response buffers are held by us, not by the SD, so we must // maintain them and not change it. If we need to change the contents during advertising, // there are tricks to get the SD to notice (see DevZone - TBS). - // EDIV: Encrypted Diversifier: Identifies LTK during legacy pairing. bonding_keys_t bonding_keys; + // EDIV: Encrypted Diversifier: Identifies LTK during legacy pairing. uint16_t ediv; volatile pair_status_t pair_status; uint8_t sec_status; // Internal security status. @@ -66,6 +66,13 @@ typedef struct { ble_drv_evt_handler_entry_t handler_entry; ble_gap_conn_params_t conn_params; volatile bool conn_params_updating; + // Request that CCCD info for this connection be saved. + volatile bool do_bond_cccds; + // Request that security key info for this connection be saved. + volatile bool do_bond_keys; + // Time of setting do_bond_ccds: we delay a bit to consolidate multiple CCCD changes + // into one write. Time is currently in ticks_ms. + uint64_t do_bond_cccds_request_time; } bleio_connection_internal_t; typedef struct { diff --git a/ports/nrf/common-hal/_bleio/bonding.c b/ports/nrf/common-hal/_bleio/bonding.c index 56f77af85..eb30ee8b1 100644 --- a/ports/nrf/common-hal/_bleio/bonding.c +++ b/ports/nrf/common-hal/_bleio/bonding.c @@ -36,7 +36,6 @@ #include "supervisor/shared/tick.h" #include "nrf_soc.h" -#include "sd_mutex.h" #include "bonding.h" @@ -57,9 +56,6 @@ const uint32_t BONDING_FLAG = ('1' | '0' << 8 | 'D' << 16 | 'B' << 24); // Save both system and user service info. #define SYS_ATTR_FLAGS (BLE_GATTS_SYS_ATTR_FLAG_SYS_SRVCS | BLE_GATTS_SYS_ATTR_FLAG_USR_SRVCS) -STATIC nrf_mutex_t queued_bonding_block_entries_mutex; -STATIC uint64_t block_queued_at_ticks_ms = 0; - #if BONDING_DEBUG void bonding_print_block(bonding_block_t *block) { printf("at 0x%08lx: is_central: %1d, type: 0x%x, ediv: 0x%04x, data_length: %d\n", @@ -80,7 +76,6 @@ STATIC size_t compute_block_size(uint16_t data_length) { } void bonding_erase_storage(void) { - BONDING_DEBUG_PRINTF("bonding_erase_storage()\n"); // Erase all pages in the bonding area. for(uint32_t page_address = BONDING_PAGES_START_ADDR; page_address < BONDING_PAGES_END_ADDR; @@ -125,7 +120,7 @@ STATIC bonding_block_t *next_block(bonding_block_t *block) { // Find the block with given is_central, type and ediv value. // If type == BLOCK_UNUSED, ediv is ignored and the the sole unused block at the end is returned. // If not found, return NULL. -STATIC bonding_block_t *find_candidate_block(bool is_central, bonding_block_type_t type, uint16_t ediv) { +STATIC bonding_block_t *find_existing_block(bool is_central, bonding_block_type_t type, uint16_t ediv) { bonding_block_t *block = NULL; while (1) { block = next_block(block); @@ -149,7 +144,7 @@ STATIC bonding_block_t *find_candidate_block(bool is_central, bonding_block_type // Get an empty block large enough to store data_length data. STATIC bonding_block_t* find_unused_block(uint16_t data_length) { - bonding_block_t *unused_block = find_candidate_block(true, BLOCK_UNUSED, EDIV_INVALID); + bonding_block_t *unused_block = find_existing_block(true, BLOCK_UNUSED, EDIV_INVALID); // If no more room, erase all existing blocks and start over. if (!unused_block || (uint8_t *) unused_block + compute_block_size(data_length) >= (uint8_t *) BONDING_DATA_END_ADDR) { @@ -162,56 +157,10 @@ STATIC bonding_block_t* find_unused_block(uint16_t data_length) { // Set the header word to all 0's, to mark the block as invalid. // We don't change data_length, so we can still skip over this block. STATIC void invalidate_block(bonding_block_t *block) { - BONDING_DEBUG_PRINTF("invalidate_block()\n"); uint32_t zero = 0; sd_flash_write_sync((uint32_t *) block, &zero, 1); } -STATIC void queue_write_block(bool is_central, bonding_block_type_t type, uint16_t ediv, uint16_t conn_handle, uint8_t *data, uint16_t data_length) { - if (compute_block_size(data_length) > BONDING_DATA_END_ADDR - BONDING_DATA_START_ADDR) { - // Ridiculous size. - return; - } - - // No heap available, so never mind. This might be called between VM instantiations. - if (!gc_alloc_possible()) { - return; - } - queued_bonding_block_entry_t* queued_entry = - m_malloc_maybe(sizeof(queued_bonding_block_entry_t) + data_length, false); - - if (!queued_entry) { - // Failed to allocate. Not much we can do, since this might be during an evt handler. - return; - } - - queued_entry->block.is_central = is_central; - queued_entry->block.type = type; - queued_entry->block.ediv = ediv; - queued_entry->block.conn_handle = conn_handle; - queued_entry->block.data_length = data_length; - if (data && data_length != 0) { - memcpy(&queued_entry->block.data, data, data_length); - } - - // Note: blocks are added in LIFO order, for simplicity and speed. - // The assumption is that there won't be stale blocks on the - // list. The sys_attr blocks don't contain sys_attr data, just a - // request to store the latest value. The key blocks are assumed - // not to be superseded quickly. If this assumption becomes - // invalid, the queue should be changed to FIFO. - - // Add this new element to the front of the list. - sd_mutex_acquire_wait(&queued_bonding_block_entries_mutex); - queued_entry->next = MP_STATE_VM(queued_bonding_block_entries); - MP_STATE_VM(queued_bonding_block_entries) = queued_entry; - sd_mutex_release(&queued_bonding_block_entries_mutex); - - // Remember when we last queued a block, so we avoid excesive - // sys_attr writes. - block_queued_at_ticks_ms = supervisor_ticks_ms64(); -} - // Write bonding block header. STATIC void write_block_header(bonding_block_t *dest_block, bonding_block_t *source_block_header) { sd_flash_write_sync((uint32_t *) dest_block, (uint32_t *) source_block_header, sizeof(bonding_block_t) / 4); @@ -237,134 +186,109 @@ STATIC void write_block_data(bonding_block_t *dest_block, uint8_t *data, uint16_ } } -STATIC void write_sys_attr_block(bonding_block_t *block) { +STATIC void write_sys_attr_block(bleio_connection_internal_t *connection) { uint16_t length = 0; // First find out how big a buffer we need, then fetch the data. - if(sd_ble_gatts_sys_attr_get(block->conn_handle, NULL, &length, SYS_ATTR_FLAGS) != NRF_SUCCESS) { + if(sd_ble_gatts_sys_attr_get(connection->conn_handle, NULL, &length, SYS_ATTR_FLAGS) != NRF_SUCCESS) { return; } - uint8_t sys_attr[length]; - if(sd_ble_gatts_sys_attr_get(block->conn_handle, sys_attr, &length, SYS_ATTR_FLAGS) != NRF_SUCCESS) { + if(sd_ble_gatts_sys_attr_get(connection->conn_handle, sys_attr, &length, SYS_ATTR_FLAGS) != NRF_SUCCESS) { return; } - // Now we know the data size. - block->data_length = length; - // Is there an existing sys_attr block that matches the current sys_attr data? - bonding_block_t *candidate_block = find_candidate_block(block->is_central, block->type, block->ediv); - if (candidate_block) { - if (length == candidate_block->data_length && - memcmp(sys_attr, candidate_block->data, block->data_length) == 0) { - BONDING_DEBUG_PRINTF("Identical sys_attr block already stored.\n"); + bonding_block_t *existing_block = + find_existing_block(connection->is_central, BLOCK_SYS_ATTR, connection->ediv); + if (existing_block) { + if (length == existing_block->data_length && + memcmp(sys_attr, existing_block->data, length) == 0) { // Identical block found. No need to store again. return; } // Data doesn't match. Invalidate block and store a new one. - invalidate_block(candidate_block); + invalidate_block(existing_block); } + bonding_block_t block_header = { + .is_central = connection->is_central, + .type = BLOCK_SYS_ATTR, + .ediv = connection->ediv, + .conn_handle = connection->conn_handle, + .data_length = length, + }; bonding_block_t *new_block = find_unused_block(length); - write_block_header(new_block, block); + write_block_header(new_block, &block_header); write_block_data(new_block, sys_attr, length); return; } -STATIC void write_keys_block(bonding_block_t *block) { - if (block->data_length != sizeof(bonding_keys_t)) { - // Bad length. - return; - } +STATIC void write_keys_block(bleio_connection_internal_t *connection) { + uint16_t const ediv = connection->is_central + ? connection->bonding_keys.peer_enc.master_id.ediv + : connection->bonding_keys.own_enc.master_id.ediv; // Is there an existing keys block that matches? - bonding_block_t *candidate_block = find_candidate_block(block->is_central, block->type, block->ediv); - if (candidate_block) { - if (block->data_length == candidate_block->data_length && - memcmp(block->data, candidate_block->data, block->data_length) == 0) { - BONDING_DEBUG_PRINTF("Identical keys block already stored.\n"); + bonding_block_t *existing_block = find_existing_block(connection->is_central, BLOCK_KEYS, ediv); + if (existing_block) { + if (existing_block->data_length == sizeof(bonding_keys_t) && + memcmp(existing_block->data, &connection->bonding_keys, sizeof(bonding_keys_t)) == 0) { // Identical block found. No need to store again. return; } // Data doesn't match. Invalidate block and store a new one. - invalidate_block(candidate_block); + invalidate_block(existing_block); } - bonding_keys_t *bonding_keys = (bonding_keys_t *) block->data; - block->ediv = block->is_central - ? bonding_keys->peer_enc.master_id.ediv - : bonding_keys->own_enc.master_id.ediv; + bonding_block_t block_header = { + .is_central = connection->is_central, + .type = BLOCK_KEYS, + .ediv = ediv, + .conn_handle = connection->conn_handle, + .data_length = sizeof(bonding_keys_t), + }; bonding_block_t *new_block = find_unused_block(sizeof(bonding_keys_t)); - write_block_header(new_block, block); - write_block_data(new_block, (uint8_t *) bonding_keys, sizeof(bonding_keys_t)); + write_block_header(new_block, &block_header); + write_block_data(new_block, (uint8_t *) &connection->bonding_keys, sizeof(bonding_keys_t)); } - void bonding_clear_keys(bonding_keys_t *bonding_keys) { memset((uint8_t*) bonding_keys, 0, sizeof(bonding_keys_t)); } -// Call only when SD is enabled. void bonding_reset(void) { - MP_STATE_VM(queued_bonding_block_entries) = NULL; - sd_mutex_new(&queued_bonding_block_entries_mutex); if (BONDING_FLAG != *((uint32_t *) BONDING_START_FLAG_ADDR) || BONDING_FLAG != *((uint32_t *) BONDING_END_FLAG_ADDR)) { bonding_erase_storage(); } } -// Write bonding blocks to flash. These have been queued during event handlers. -// We do one at a time, on each background call. +// Write bonding blocks to flash. Requests have been queued during evt handlers. void bonding_background(void) { - uint8_t sd_en = 0; - (void) sd_softdevice_is_enabled(&sd_en); - if (!sd_en) { - return; - } - - if (block_queued_at_ticks_ms == 0) { - // No writes have been queued yet. - return; - } - - // Wait at least one second before writing a block, to consolidate writes - // that will be duplicates. - uint64_t current_ticks_ms = supervisor_ticks_ms64(); - if (current_ticks_ms - block_queued_at_ticks_ms < 1000) { - return; - } - - // Get block at front of list. - bonding_block_t *block = NULL; - sd_mutex_acquire_wait(&queued_bonding_block_entries_mutex); - if (MP_STATE_VM(queued_bonding_block_entries)) { - block = &(MP_STATE_VM(queued_bonding_block_entries)->block); - // Remove entry from list. - MP_STATE_VM(queued_bonding_block_entries) = MP_STATE_VM(queued_bonding_block_entries)->next; - } - sd_mutex_release(&queued_bonding_block_entries_mutex); - if (!block) { - // List is empty. - return; - } - - switch (block->type) { - case BLOCK_SYS_ATTR: - write_sys_attr_block(block); - break; - - case BLOCK_KEYS: - write_keys_block(block); - break; + // A paired connection will request that its keys and CCCD values be stored. + // The CCCD store whenever a CCCD value is written. + for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { + bleio_connection_internal_t *connection = &connections[i]; + + uint64_t current_ticks_ms = supervisor_ticks_ms64(); + // Wait at least one second before saving CCCD, to consolidate + // writes that involve multiple CCCDs. For instance, for HID, + // three CCCD's are set in short succession by the HID client. + if (connection->do_bond_cccds && + current_ticks_ms - connection->do_bond_cccds_request_time >= 1000) { + write_sys_attr_block(connection); + connection->do_bond_cccds = false; + } - default: - break; + if (connection->do_bond_keys) { + write_keys_block(connection); + connection->do_bond_keys = false; + } } } bool bonding_load_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv) { - bonding_block_t *block = find_candidate_block(is_central, BLOCK_SYS_ATTR, ediv); + bonding_block_t *block = find_existing_block(is_central, BLOCK_SYS_ATTR, ediv); if (block == NULL) { return false; } @@ -374,7 +298,7 @@ bool bonding_load_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv } bool bonding_load_keys(bool is_central, uint16_t ediv, bonding_keys_t *bonding_keys) { - bonding_block_t *block = find_candidate_block(is_central, BLOCK_KEYS, ediv); + bonding_block_t *block = find_existing_block(is_central, BLOCK_KEYS, ediv); if (block == NULL) { return false; } @@ -386,15 +310,3 @@ bool bonding_load_keys(bool is_central, uint16_t ediv, bonding_keys_t *bonding_k memcpy(bonding_keys, block->data, block->data_length); return true; } - -void bonding_save_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv) { - BONDING_DEBUG_PRINTF("bonding_save_cccd_info()\n"); - queue_write_block(is_central, BLOCK_SYS_ATTR, ediv, conn_handle, NULL, 0); -} - -void bonding_save_keys(bool is_central, uint16_t conn_handle, bonding_keys_t *bonding_keys) { - uint16_t const ediv = is_central - ? bonding_keys->peer_enc.master_id.ediv - : bonding_keys->own_enc.master_id.ediv; - queue_write_block(is_central, BLOCK_KEYS, ediv, conn_handle, (uint8_t *) bonding_keys, sizeof(bonding_keys_t)); -} diff --git a/ports/nrf/common-hal/_bleio/bonding.h b/ports/nrf/common-hal/_bleio/bonding.h index 35347af2a..cb8e7c427 100644 --- a/ports/nrf/common-hal/_bleio/bonding.h +++ b/ports/nrf/common-hal/_bleio/bonding.h @@ -48,11 +48,12 @@ #define BONDING_DEBUG_PRINT_KEYS(keys) #endif -// Bonding data is stored in variable-length blocks consecutively in erased flash. -// The blocks are 32-bit aligned, though the data may be any number of bytes. -// You can hop through the blocks using the size field to find the next block. -// When you hit a word that is all one's, you have reached the end of the blocks. -// You can write a new block there. +// Bonding data is stored in variable-length blocks consecutively in +// erased flash (all 1's). The blocks are 32-bit aligned, though the +// data may be any number of bytes. We hop through the blocks using +// the size field to find the next block. When we hit a word that is +// all 1's, we have reached the end of the blocks. We can write a new +// block there. typedef enum { BLOCK_INVALID = 0, // Ignore this block @@ -69,24 +70,16 @@ typedef struct { uint16_t conn_handle; // Connection handle: used when a BLOCK_SYS_ATTR is queued to write. // Not used as a key, etc. uint16_t data_length; // Length of data in bytes, including ediv, not including padding. - // 32-bit boundary here. + // End of block header. 32-bit boundary here. uint8_t data[]; // Rest of data in the block. Needs to be 32-bit aligned. // Block is padded to 32-bit alignment. } bonding_block_t; -// Bonding blocks that need to be written are stored in a linked list. -typedef struct _queued_bonding_block_entry_t { - struct _queued_bonding_block_entry_t *next; - bonding_block_t block; // variable length, based on data_length. -} queued_bonding_block_entry_t; - void bonding_background(void); void bonding_erase_storage(void); void bonding_reset(void); void bonding_clear_keys(bonding_keys_t *bonding_keys); bool bonding_load_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv); bool bonding_load_keys(bool is_central, uint16_t ediv, bonding_keys_t *bonding_keys); -void bonding_save_cccd_info(bool is_central, uint16_t conn_handle, uint16_t ediv); -void bonding_save_keys(bool is_central, uint16_t conn_handle, bonding_keys_t *bonding_keys); #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_BLEIO_BONDING_H diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h index a480ec1e0..70b9ab63e 100644 --- a/ports/nrf/mpconfigport.h +++ b/ports/nrf/mpconfigport.h @@ -156,7 +156,6 @@ #define MICROPY_PORT_ROOT_POINTERS \ CIRCUITPY_COMMON_ROOT_POINTERS \ ble_drv_evt_handler_entry_t* ble_drv_evt_handler_entries; \ - queued_bonding_block_entry_t* queued_bonding_block_entries; \ #endif // NRF5_MPCONFIGPORT_H__ -- cgit v1.2.3 From 0367ba7495e209e38ff80934affe9e7fb3f04cff Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Mon, 13 Jan 2020 18:29:34 -0500 Subject: fix some typos and leftovers --- locale/circuitpython.pot | 22 ++++++------- ports/nrf/common-hal/_bleio/Connection.c | 3 +- ports/nrf/common-hal/_bleio/Connection.h | 1 + ports/nrf/mpconfigport.h | 1 - ports/nrf/sd.c | 54 -------------------------------- ports/nrf/sd.h | 46 --------------------------- tools/preprocess_frozen_modules.py | 1 - 7 files changed, 11 insertions(+), 117 deletions(-) delete mode 100644 ports/nrf/sd.c delete mode 100644 ports/nrf/sd.h (limited to 'ports') diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 085101ff1..a60d95aa2 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-07 14:31-0800\n" +"POT-Creation-Date: 2020-01-13 18:15-0500\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -513,21 +513,21 @@ msgstr "" msgid "Could not initialize UART" msgstr "" -#: shared-module/audiomp3/MP3File.c +#: shared-module/audiomp3/MP3Decoder.c msgid "Couldn't allocate decoder" msgstr "" #: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c -#: shared-module/audiomp3/MP3File.c +#: shared-module/audiomp3/MP3Decoder.c msgid "Couldn't allocate first buffer" msgstr "" -#: shared-module/audiomp3/MP3File.c +#: shared-module/audiomp3/MP3Decoder.c msgid "Couldn't allocate input buffer" msgstr "" #: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c -#: shared-module/audiomp3/MP3File.c +#: shared-module/audiomp3/MP3Decoder.c msgid "Couldn't allocate second buffer" msgstr "" @@ -620,7 +620,7 @@ msgstr "" msgid "Failed sending command." msgstr "" -#: ports/nrf/sd_mutex.c +#: ports/nrf/sd.c ports/nrf/sd_mutex.c #, c-format msgid "Failed to acquire mutex, err 0x%04x" msgstr "" @@ -643,11 +643,11 @@ msgstr "" msgid "Failed to connect: timeout" msgstr "" -#: shared-module/audiomp3/MP3File.c +#: shared-module/audiomp3/MP3Decoder.c msgid "Failed to parse MP3 file" msgstr "" -#: ports/nrf/sd_mutex.c +#: ports/nrf/sd.c ports/nrf/sd_mutex.c #, c-format msgid "Failed to release mutex, err 0x%04x" msgstr "" @@ -660,10 +660,6 @@ msgstr "" msgid "File exists" msgstr "" -#: ports/nrf/common-hal/nvm/ByteArray.c -msgid "Flash write failed" -msgstr "" - #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c msgid "Frequency captured is above capability. Capture Paused." msgstr "" @@ -1776,7 +1772,7 @@ msgstr "" msgid "extra positional arguments given" msgstr "" -#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3File.c +#: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c #: shared-bindings/displayio/OnDiskBitmap.c msgid "file must be a file opened in byte mode" msgstr "" diff --git a/ports/nrf/common-hal/_bleio/Connection.c b/ports/nrf/common-hal/_bleio/Connection.c index b8fa77cd3..96e8b8fbe 100644 --- a/ports/nrf/common-hal/_bleio/Connection.c +++ b/ports/nrf/common-hal/_bleio/Connection.c @@ -308,7 +308,6 @@ bool connection_on_ble_evt(ble_evt_t *ble_evt, void *self_in) { } else { if (bonding_load_cccd_info(self->is_central, self->conn_handle, self->ediv)) { // Did an sd_ble_gatts_sys_attr_set() with the stored sys_attr values. - // Not quite paired yet: wait for BLE_GAP_EVT_AUTH_STATUS with BLE_GAP_SEC_STATUS_SUCCESS. } else { // No matching bonding found, so use fresh system attributes. sd_ble_gatts_sys_attr_set(self->conn_handle, NULL, 0, 0); @@ -553,7 +552,7 @@ STATIC void on_desc_discovery_rsp(ble_gattc_evt_desc_disc_rsp_t *response, bleio default: // TODO: sd_ble_gattc_descriptors_discover() can return things that are not descriptors, // so ignore those. - // htts:p//devzone.nordicsemi.com/f/nordic-q-a/49500/sd_ble_gattc_descriptors_discover-is-returning-attributes-that-are-not-descriptors + // https://devzone.nordicsemi.com/f/nordic-q-a/49500/sd_ble_gattc_descriptors_discover-is-returning-attributes-that-are-not-descriptors break; } diff --git a/ports/nrf/common-hal/_bleio/Connection.h b/ports/nrf/common-hal/_bleio/Connection.h index 1f40cc644..282e0c4b5 100644 --- a/ports/nrf/common-hal/_bleio/Connection.h +++ b/ports/nrf/common-hal/_bleio/Connection.h @@ -67,6 +67,7 @@ typedef struct { ble_gap_conn_params_t conn_params; volatile bool conn_params_updating; uint16_t mtu; + // Request that CCCD values for this conenction be saved, using sys_attr values. volatile bool do_bond_cccds; // Request that security key info for this connection be saved. volatile bool do_bond_keys; diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h index 70b9ab63e..b6635965d 100644 --- a/ports/nrf/mpconfigport.h +++ b/ports/nrf/mpconfigport.h @@ -29,7 +29,6 @@ #define NRF5_MPCONFIGPORT_H__ #include "ble_drv.h" -#include "common-hal/_bleio/bonding.h" #include "nrf_mbr.h" // for MBR_SIZE #include "nrf_sdm.h" // for SD_FLASH_SIZE diff --git a/ports/nrf/sd.c b/ports/nrf/sd.c deleted file mode 100644 index b3162e6af..000000000 --- a/ports/nrf/sd.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Dan Halbert for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/mpconfig.h" -#include "py/runtime.h" -#include "nrf_soc.h" - -void sd_mutex_acquire_check(nrf_mutex_t* p_mutex) { - uint32_t err_code = sd_mutex_acquire(p_mutex); - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg_varg(translate("Failed to acquire mutex, err 0x%04x"), err_code); - } -} - -void sd_mutex_acquire_wait(nrf_mutex_t* p_mutex) { - while (sd_mutex_acquire(p_mutex) == NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN) { - RUN_BACKGROUND_TASKS; - } -} - -void sd_mutex_acquire_wait_no_vm(nrf_mutex_t* p_mutex) { - while (sd_mutex_acquire(p_mutex) == NRF_ERROR_SOC_MUTEX_ALREADY_TAKEN) { - } -} - -void sd_mutex_release_check(nrf_mutex_t* p_mutex) { - uint32_t err_code = sd_mutex_release(p_mutex); - if (err_code != NRF_SUCCESS) { - mp_raise_OSError_msg_varg(translate("Failed to release mutex, err 0x%04x"), err_code); - } -} diff --git a/ports/nrf/sd.h b/ports/nrf/sd.h deleted file mode 100644 index ca4691720..000000000 --- a/ports/nrf/sd.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Dan Halbert for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_NRF_SD_MUTEX_H -#define MICROPY_INCLUDED_NRF_SD_MUTEX_H - -#include "nrf_soc.h" - -// Helpers for common usage of nrf_mutex. - -// Try to acquire a mutex right now. Raise exception if we can't get it. -void sd_mutex_acquire_check(nrf_mutex_t* p_mutex); - -// Wait for a mutex to become available. Run VM background tasks while waiting. -void sd_mutex_acquire_wait(nrf_mutex_t* p_mutex); - -// Wait for a mutex to become available.. Block VM while waiting. -void sd_mutex_acquire_wait_no_vm(nrf_mutex_t* p_mutex); - -// Release a mutex, and raise exception on error. -void sd_mutex_release_check(nrf_mutex_t* p_mutex); - -#endif // MICROPY_INCLUDED_NRF_SD_MUTEX_H diff --git a/tools/preprocess_frozen_modules.py b/tools/preprocess_frozen_modules.py index 974ccecd1..7ae20c4d6 100755 --- a/tools/preprocess_frozen_modules.py +++ b/tools/preprocess_frozen_modules.py @@ -48,7 +48,6 @@ def copy_and_process(in_dir, out_dir): output_file_path = Path(out_dir, input_file_path.relative_to(in_dir)) if file.endswith(".py"): - print(file) if not output_file_path.parent.exists(): output_file_path.parent.mkdir(parents=True) with input_file_path.open("r") as input, output_file_path.open("w") as output: -- cgit v1.2.3 From c735289ddfe4c1a87f051d930e149fa93d09535d Mon Sep 17 00:00:00 2001 From: scs217 Date: Mon, 13 Jan 2020 21:19:17 -0500 Subject: Added Dxx names to analog pins on Feather M4 Express pins.c file --- ports/atmel-samd/boards/feather_m4_express/pins.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/boards/feather_m4_express/pins.c b/ports/atmel-samd/boards/feather_m4_express/pins.c index d9496ecfc..83b447ea7 100644 --- a/ports/atmel-samd/boards/feather_m4_express/pins.c +++ b/ports/atmel-samd/boards/feather_m4_express/pins.c @@ -2,14 +2,23 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA02) }, { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA05) }, { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PB08) }, { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PB09) }, { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PA04) }, { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_PA17) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_PB23) }, { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_PB22) }, { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB17) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB17) }, { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB16) }, -- cgit v1.2.3 From 18957786f24ac2d198a793fcffb02d71b474b401 Mon Sep 17 00:00:00 2001 From: scs217 Date: Mon, 13 Jan 2020 22:00:42 -0500 Subject: inserted line breaks between different pins (grouping together aliases for legibility) per request by dhalbert --- ports/atmel-samd/boards/feather_m4_express/pins.c | 25 +++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/boards/feather_m4_express/pins.c b/ports/atmel-samd/boards/feather_m4_express/pins.c index 83b447ea7..314b6f1c6 100644 --- a/ports/atmel-samd/boards/feather_m4_express/pins.c +++ b/ports/atmel-samd/boards/feather_m4_express/pins.c @@ -3,41 +3,66 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08) }, { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22) }, { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB17) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB17) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB16) }, { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB16) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PB01) }, { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From 50e718be99f340bcf7ab003d36d920d1de4b0dd3 Mon Sep 17 00:00:00 2001 From: scs217 Date: Mon, 13 Jan 2020 22:13:39 -0500 Subject: second revision to line breaks for visibility per dhalbert --- ports/atmel-samd/boards/feather_m4_express/pins.c | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/feather_m4_express/pins.c b/ports/atmel-samd/boards/feather_m4_express/pins.c index 314b6f1c6..61bd8abad 100644 --- a/ports/atmel-samd/boards/feather_m4_express/pins.c +++ b/ports/atmel-samd/boards/feather_m4_express/pins.c @@ -35,23 +35,14 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB16) }, { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, - { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14) }, - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA16) }, - { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18) }, - { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) }, - { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) }, - { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) }, - { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB03) }, @@ -60,9 +51,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PB01) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From c0dacba80f3c7490f36dda3fa2c7b0df842c8bcf Mon Sep 17 00:00:00 2001 From: Hierophect Date: Tue, 14 Jan 2020 13:06:10 -0500 Subject: remove comment confusing py tools --- ports/stm32f4/boards/STM32F401.ld | 13 ------------- 1 file changed, 13 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/STM32F401.ld b/ports/stm32f4/boards/STM32F401.ld index be72ecc09..bf1f21cf6 100644 --- a/ports/stm32f4/boards/STM32F401.ld +++ b/ports/stm32f4/boards/STM32F401.ld @@ -35,19 +35,6 @@ _ram_end = ORIGIN(RAM) + LENGTH(RAM); _heap_start = _ebss; /* heap starts just after statically allocated memory */ _heap_end = _sstack; -/* Memory layout for internal flash storage configuration: - - FLASH_ISR .isr_vector - - FLASH_TEXT .text - FLASH_TEXT .data - - RAM .data - RAM .bss - RAM .heap - RAM .stack -*/ - ENTRY(Reset_Handler) /* define output sections */ -- cgit v1.2.3 From 5aae8df5d7cd7edf18f6ff6ac81c16facba178c7 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Tue, 14 Jan 2020 13:30:16 -0500 Subject: style changes, fix i2c typo --- ports/stm32f4/common-hal/busio/I2C.c | 18 +++++------ ports/stm32f4/common-hal/busio/SPI.c | 30 +++++++++---------- ports/stm32f4/common-hal/busio/UART.c | 4 +-- ports/stm32f4/common-hal/pulseio/PWMOut.c | 50 +++++++++++++++---------------- 4 files changed, 51 insertions(+), 51 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/busio/I2C.c b/ports/stm32f4/common-hal/busio/I2C.c index bf843ff5c..1437e5e78 100644 --- a/ports/stm32f4/common-hal/busio/I2C.c +++ b/ports/stm32f4/common-hal/busio/I2C.c @@ -61,8 +61,8 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, //match pins to I2C objects I2C_TypeDef * I2Cx; - uint8_t sda_len = sizeof(mcu_i2c_sda_list) / sizeof(*mcu_i2c_sda_list); - uint8_t scl_len = sizeof(mcu_i2c_scl_list) / sizeof(*mcu_i2c_scl_list); + uint8_t sda_len = MP_ARRAY_SIZE(mcu_i2c_sda_list); + uint8_t scl_len = MP_ARRAY_SIZE(mcu_i2c_scl_list); bool i2c_taken = false; for (uint i = 0; i < sda_len; i++) { @@ -137,7 +137,7 @@ void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { never_reset_i2c[i] = true; never_reset_pin_number(self->scl->pin->port, self->scl->pin->number); - never_reset_pin_number(self->sda->pin->port, self->scl->pin->number); + never_reset_pin_number(self->sda->pin->port, self->sda->pin->number); break; } } @@ -209,21 +209,21 @@ uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, STATIC void i2c_clock_enable(uint8_t mask) { //Note: hard reset required due to soft reboot issue. #ifdef I2C1 - if (mask & 1<<0) { + if (mask & (1 << 0)) { __HAL_RCC_I2C1_CLK_ENABLE(); __HAL_RCC_I2C1_FORCE_RESET(); __HAL_RCC_I2C1_RELEASE_RESET(); } #endif #ifdef I2C2 - if (mask & 1<<1) { + if (mask & (1 << 1)) { __HAL_RCC_I2C2_CLK_ENABLE(); __HAL_RCC_I2C2_FORCE_RESET(); __HAL_RCC_I2C2_RELEASE_RESET(); } #endif #ifdef I2C3 - if (mask & 1<<2) { + if (mask & (1 << 2)) { __HAL_RCC_I2C3_CLK_ENABLE(); __HAL_RCC_I2C3_FORCE_RESET(); __HAL_RCC_I2C3_RELEASE_RESET(); @@ -233,17 +233,17 @@ STATIC void i2c_clock_enable(uint8_t mask) { STATIC void i2c_clock_disable(uint8_t mask) { #ifdef I2C1 - if (mask & 1<<0) { + if (mask & (1 << 0)) { __HAL_RCC_I2C1_CLK_DISABLE(); } #endif #ifdef I2C2 - if (mask & 1<<1) { + if (mask & (1 << 1)) { __HAL_RCC_I2C2_CLK_DISABLE(); } #endif #ifdef I2C3 - if (mask & 1<<2) { + if (mask & (1 << 2)) { __HAL_RCC_I2C3_CLK_DISABLE(); } #endif diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index b7d61fbf9..afc6cfcbd 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -104,9 +104,9 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, //match pins to SPI objects SPI_TypeDef * SPIx; - uint8_t sck_len = sizeof(mcu_spi_sck_list)/sizeof(*mcu_spi_sck_list); - uint8_t mosi_len = sizeof(mcu_spi_mosi_list)/sizeof(*mcu_spi_mosi_list); - uint8_t miso_len = sizeof(mcu_spi_miso_list)/sizeof(*mcu_spi_miso_list); + uint8_t sck_len = MP_ARRAY_SIZE(mcu_spi_sck_list); + uint8_t mosi_len = MP_ARRAY_SIZE(mcu_spi_mosi_list); + uint8_t miso_len = MP_ARRAY_SIZE(mcu_spi_miso_list); bool spi_taken = false; //SCK is not optional. MOSI and MISO are @@ -393,32 +393,32 @@ uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { STATIC void spi_clock_enable(uint8_t mask) { #ifdef SPI1 - if (mask & 1<<0) { + if (mask & (1 << 0)) { __HAL_RCC_SPI1_CLK_ENABLE(); } #endif #ifdef SPI2 - if (mask & 1<<1) { + if (mask & (1 << 1)) { __HAL_RCC_SPI2_CLK_ENABLE(); } #endif #ifdef SPI3 - if (mask & 1<<2) { + if (mask & (1 << 2)) { __HAL_RCC_SPI3_CLK_ENABLE(); } #endif #ifdef SPI4 - if (mask & 1<<3) { + if (mask & (1 << 3)) { __HAL_RCC_SPI4_CLK_ENABLE(); } #endif #ifdef SPI5 - if (mask & 1<<4) { + if (mask & (1 << 4)) { __HAL_RCC_SPI5_CLK_ENABLE(); } #endif #ifdef SPI6 - if (mask & 1<<5) { + if (mask & (1 << 5)) { __HAL_RCC_SPI6_CLK_ENABLE(); } #endif @@ -426,32 +426,32 @@ STATIC void spi_clock_enable(uint8_t mask) { STATIC void spi_clock_disable(uint8_t mask) { #ifdef SPI1 - if (mask & 1<<0) { + if (mask & (1 << 0)) { __HAL_RCC_SPI1_CLK_DISABLE(); } #endif #ifdef SPI2 - if (mask & 1<<1) { + if (mask & (1 << 1)) { __HAL_RCC_SPI2_CLK_DISABLE(); } #endif #ifdef SPI3 - if (mask & 1<<2) { + if (mask & (1 << 2)) { __HAL_RCC_SPI3_CLK_DISABLE(); } #endif #ifdef SPI4 - if (mask & 1<<3) { + if (mask & (1 << 3)) { __HAL_RCC_SPI4_CLK_DISABLE(); } #endif #ifdef SPI5 - if (mask & 1<<4) { + if (mask & (1 << 4)) { __HAL_RCC_SPI5_CLK_DISABLE(); } #endif #ifdef SPI6 - if (mask & 1<<5) { + if (mask & (1 << 5)) { __HAL_RCC_SPI6_CLK_DISABLE(); } #endif diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index 44139a642..bfa541c17 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -79,8 +79,8 @@ void common_hal_busio_uart_construct(busio_uart_obj_t* self, //match pins to UART objects USART_TypeDef * USARTx; - uint8_t tx_len = sizeof(mcu_uart_tx_list) / sizeof(*mcu_uart_tx_list); - uint8_t rx_len = sizeof(mcu_uart_rx_list) / sizeof(*mcu_uart_rx_list); + uint8_t tx_len = MP_ARRAY_SIZE(mcu_uart_tx_list); + uint8_t rx_len = MP_ARRAY_SIZE(mcu_uart_rx_list); bool uart_taken = false; uint8_t uart_index = 0; //origin 0 corrected diff --git a/ports/stm32f4/common-hal/pulseio/PWMOut.c b/ports/stm32f4/common-hal/pulseio/PWMOut.c index a53bfc423..a750314e1 100644 --- a/ports/stm32f4/common-hal/pulseio/PWMOut.c +++ b/ports/stm32f4/common-hal/pulseio/PWMOut.c @@ -106,7 +106,7 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, uint32_t frequency, bool variable_frequency) { TIM_TypeDef * TIMx; - uint8_t tim_num = sizeof(mcu_tim_pin_list) / sizeof(*mcu_tim_pin_list); + uint8_t tim_num = MP_ARRAY_SIZE(mcu_tim_pin_list); bool tim_chan_taken = false; bool tim_taken_f_mismatch = false; bool var_freq_mismatch = false; @@ -324,63 +324,63 @@ bool common_hal_pulseio_pwmout_get_variable_frequency(pulseio_pwmout_obj_t* self STATIC void tim_clock_enable(uint16_t mask) { #ifdef TIM1 - if (mask & 1<<0) { + if (mask & (1 << 0)) { __HAL_RCC_TIM1_CLK_ENABLE(); } #endif #ifdef TIM2 - if (mask & 1<<1) { + if (mask & (1 << 1)) { __HAL_RCC_TIM2_CLK_ENABLE(); } #endif #ifdef TIM3 - if (mask & 1<<2) { + if (mask & (1 << 2)) { __HAL_RCC_TIM3_CLK_ENABLE(); } #endif #ifdef TIM4 - if (mask & 1<<3) { + if (mask & (1 << 3)) { __HAL_RCC_TIM4_CLK_ENABLE(); } #endif #ifdef TIM5 - if (mask & 1<<4) { + if (mask & (1 << 4)) { __HAL_RCC_TIM5_CLK_ENABLE(); } #endif //6 and 7 are reserved ADC timers #ifdef TIM8 - if (mask & 1<<7) { + if (mask & (1 << 7)) { __HAL_RCC_TIM8_CLK_ENABLE(); } #endif #ifdef TIM9 - if (mask & 1<<8) { + if (mask & (1 << 8)) { __HAL_RCC_TIM9_CLK_ENABLE(); } #endif #ifdef TIM10 - if (mask & 1<<9) { + if (mask & (1 << 9)) { __HAL_RCC_TIM10_CLK_ENABLE(); } #endif #ifdef TIM11 - if (mask & 1<<10) { + if (mask & (1 << 10)) { __HAL_RCC_TIM11_CLK_ENABLE(); } #endif #ifdef TIM12 - if (mask & 1<<11) { + if (mask & (1 << 11)) { __HAL_RCC_TIM12_CLK_ENABLE(); } #endif #ifdef TIM13 - if (mask & 1<<12) { + if (mask & (1 << 12)) { __HAL_RCC_TIM13_CLK_ENABLE(); } #endif #ifdef TIM14 - if (mask & 1<<13) { + if (mask & (1 << 13)) { __HAL_RCC_TIM14_CLK_ENABLE(); } #endif @@ -388,63 +388,63 @@ STATIC void tim_clock_enable(uint16_t mask) { STATIC void tim_clock_disable(uint16_t mask) { #ifdef TIM1 - if (mask & 1<<0) { + if (mask & (1 << 0)) { __HAL_RCC_TIM1_CLK_DISABLE(); } #endif #ifdef TIM2 - if (mask & 1<<1) { + if (mask & (1 << 1)) { __HAL_RCC_TIM2_CLK_DISABLE(); } #endif #ifdef TIM3 - if (mask & 1<<2) { + if (mask & (1 << 2)) { __HAL_RCC_TIM3_CLK_DISABLE(); } #endif #ifdef TIM4 - if (mask & 1<<3) { + if (mask & (1 << 3)) { __HAL_RCC_TIM4_CLK_DISABLE(); } #endif #ifdef TIM5 - if (mask & 1<<4) { + if (mask & (1 << 4)) { __HAL_RCC_TIM5_CLK_DISABLE(); } #endif //6 and 7 are reserved ADC timers #ifdef TIM8 - if (mask & 1<<7) { + if (mask & (1 << 7)) { __HAL_RCC_TIM8_CLK_DISABLE(); } #endif #ifdef TIM9 - if (mask & 1<<8) { + if (mask & (1 << 8)) { __HAL_RCC_TIM9_CLK_DISABLE(); } #endif #ifdef TIM10 - if (mask & 1<<9) { + if (mask & (1 << 9)) { __HAL_RCC_TIM10_CLK_DISABLE(); } #endif #ifdef TIM11 - if (mask & 1<<10) { + if (mask & (1 << 10)) { __HAL_RCC_TIM11_CLK_DISABLE(); } #endif #ifdef TIM12 - if (mask & 1<<11) { + if (mask & (1 << 11)) { __HAL_RCC_TIM12_CLK_DISABLE(); } #endif #ifdef TIM13 - if (mask & 1<<12) { + if (mask & (1 << 12)) { __HAL_RCC_TIM13_CLK_DISABLE(); } #endif #ifdef TIM14 - if (mask & 1<<13) { + if (mask & (1 << 13)) { __HAL_RCC_TIM14_CLK_DISABLE(); } #endif -- cgit v1.2.3 From 05093f7f54d5f0a375d120df40e3335fa92e0a22 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Tue, 14 Jan 2020 15:50:00 -0500 Subject: Fix VTOR relocate, add bootloader makefile handling --- ports/stm32f4/Makefile | 6 +++- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 1 + ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 2 ++ ports/stm32f4/system_stm32f4xx.c | 35 +++++++++++++++++++--- 4 files changed, 39 insertions(+), 5 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index c3eb4aa3b..d948996ea 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -90,6 +90,10 @@ else ### CFLAGS += -flto endif +ifndef BOOTLOADER_OFFSET + BOOTLOADER_OFFSET := 0x8000000 +endif + C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(CMSIS_MCU) CFLAGS += $(INC) -Werror -Wall -std=gnu11 -nostdlib $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT) @@ -257,7 +261,7 @@ $(BUILD)/firmware.hex: $(BUILD)/firmware.elf $(BUILD)/firmware.uf2: $(BUILD)/firmware.hex $(ECHO) "Create $@" - $(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0x57755a57 -b 0x08010000 -c -o "$(BUILD)/firmware.uf2" $^ + $(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0x57755a57 -b $(BOOTLOADER_OFFSET) -c -o "$(BUILD)/firmware.uf2" $^ include $(TOP)/py/mkrules.mk diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index 0371685d8..0de74a946 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -37,6 +37,7 @@ #define BOARD_OSC_DIV 12 #define BOARD_NO_VBUS_SENSE +#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader // On-board flash #define SPI_FLASH_MOSI_PIN (&pin_PB15) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index c033d1d4b..1d6f68b13 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -9,6 +9,8 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ LONGINT_IMPL = MPZ +BOOTLOADER_OFFSET = 0x8010000 + # INTERNAL_FLASH_FILESYSTEM = 1 # LONGINT_IMPL = NONE diff --git a/ports/stm32f4/system_stm32f4xx.c b/ports/stm32f4/system_stm32f4xx.c index 3303f969d..bce420056 100644 --- a/ports/stm32f4/system_stm32f4xx.c +++ b/ports/stm32f4/system_stm32f4xx.c @@ -1,3 +1,27 @@ +/* + * Taken from ST Cube library and modified. See below for original header. + * + * Modifications copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + /** ****************************************************************************** * @file system_stm32f4xx.c @@ -63,6 +87,7 @@ #include "stm32f4xx.h" +#include "py/mpconfig.h" #if !defined (HSE_VALUE) #define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */ @@ -193,10 +218,12 @@ void SystemInit(void) #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ /* Configure the Vector Table location add offset address ------------------*/ -#ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#if !defined(BOARD_VTOR_DEFER) //only set VTOR if the bootloader hasn't already + #ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ + #else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ + #endif #endif } -- cgit v1.2.3 From eb481c9247fb10e5f34eedcaf5d14eed5598b4a9 Mon Sep 17 00:00:00 2001 From: Joey Castillo Date: Tue, 14 Jan 2020 15:35:23 -0500 Subject: add support for the Open Book --- .github/workflows/build.yml | 1 + ports/atmel-samd/boards/openbook_m4/board.c | 107 +++++++++++++++++++++ .../atmel-samd/boards/openbook_m4/mpconfigboard.h | 28 ++++++ .../atmel-samd/boards/openbook_m4/mpconfigboard.mk | 14 +++ ports/atmel-samd/boards/openbook_m4/pins.c | 71 ++++++++++++++ 5 files changed, 221 insertions(+) create mode 100644 ports/atmel-samd/boards/openbook_m4/board.c create mode 100644 ports/atmel-samd/boards/openbook_m4/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/openbook_m4/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/openbook_m4/pins.c (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 041b8b27c..d85d5fc6d 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -125,6 +125,7 @@ jobs: - "metro_nrf52840_express" - "mini_sam_m4" - "monster_m4sk" + - "openbook_m4" - "particle_argon" - "particle_boron" - "particle_xenon" diff --git a/ports/atmel-samd/boards/openbook_m4/board.c b/ports/atmel-samd/boards/openbook_m4/board.c new file mode 100644 index 000000000..2d9b31647 --- /dev/null +++ b/ports/atmel-samd/boards/openbook_m4/board.c @@ -0,0 +1,107 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Joey Castillo + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-bindings/time/__init__.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 +#define HEIGHT 400 +#define WIDTH 300 + +uint8_t start_sequence[] = { + 0x01, 0x04, 0x03, 0x00, 0x2b, 0x2b, // power setting + 0x06, 0x03, 0x17, 0x17, 0x17, // booster soft start + 0x04, 0x80, 0xc8, // power on and wait 200 ms + 0x00, 0x01, 0x0f, // panel setting + 0x61, 0x04, (HEIGHT >> 8) & 0xFF, HEIGHT & 0xFF, (WIDTH >> 8) & 0xFF, WIDTH & 0xFF // Resolution +}; + +uint8_t stop_sequence[] = { + 0x50, 0x01, 0xf7, // CDI setting + 0x02, 0x80, 0xf0 // Power off +}; + +void board_init(void) { + busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, NULL); + common_hal_busio_spi_never_reset(spi); + + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_PB05, // EPD_DC Command or data + &pin_PB07, // EPD_CS Chip select + &pin_PA00, // EPD_RST Reset + 1000000); + + displayio_epaperdisplay_obj_t* display = &displays[0].epaper_display; + display->base.type = &displayio_epaperdisplay_type; + common_hal_displayio_epaperdisplay_construct(display, + bus, + start_sequence, + sizeof(start_sequence), + stop_sequence, + sizeof(stop_sequence), + 400, // width + 300, // height + 400, // RAM width + 300, // RAM height + 0, // colstart + 0, // rowstart + 0, // rotation + NO_COMMAND, // set_column_window_command + NO_COMMAND, // set_row_window_command + NO_COMMAND, // set_current_column_command + NO_COMMAND, // set_current_row_command + 0x13, // write_black_ram_command + false, // black_bits_inverted + NO_COMMAND, // write_color_ram_command (can add this for grayscale eventually) + false, // color_bits_inverted + 0x000000, // highlight_color + 0x12, // refresh_display_command + 40, // refresh_time + &pin_PA01, // busy_pin + false, // busy_state + 5, // seconds_per_frame + false); // chip_select (don't always toggle chip select) +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/openbook_m4/mpconfigboard.h b/ports/atmel-samd/boards/openbook_m4/mpconfigboard.h new file mode 100644 index 000000000..6d75c086e --- /dev/null +++ b/ports/atmel-samd/boards/openbook_m4/mpconfigboard.h @@ -0,0 +1,28 @@ +#define MICROPY_HW_BOARD_NAME "The Open Book Feather" +#define MICROPY_HW_MCU_NAME "samd51j19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PA23) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// DotStar pins, QSPI CS, and QSPI SCK +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB23) +#define DEFAULT_SPI_BUS_MISO (&pin_PB22) + +#define DEFAULT_UART_BUS_RX (&pin_PB17) +#define DEFAULT_UART_BUS_TX (&pin_PB16) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/openbook_m4/mpconfigboard.mk b/ports/atmel-samd/boards/openbook_m4/mpconfigboard.mk new file mode 100644 index 000000000..e5fa0cd84 --- /dev/null +++ b/ports/atmel-samd/boards/openbook_m4/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x239A +USB_PID = 0x807E +USB_PRODUCT = "The Open Book Feather" +USB_MANUFACTURER = "Oddly Specific Objects" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C +LONGINT_IMPL = MPZ + +CIRCUITPY_GAMEPADSHIFT = 1 diff --git a/ports/atmel-samd/boards/openbook_m4/pins.c b/ports/atmel-samd/boards/openbook_m4/pins.c new file mode 100644 index 000000000..3fbb67860 --- /dev/null +++ b/ports/atmel-samd/boards/openbook_m4/pins.c @@ -0,0 +1,71 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" +#include "shared-module/displayio/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, // A0 = audio right channel + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, // A1 = audio left channel + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB01) }, // A6 = VBAT Monitor + { MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB04) }, // A7 = Raw mic input + { MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB03) }, // A8 = Bottom STEMMA Port + { MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB02) }, // A9 = Top STEMMA Port + { MP_OBJ_NEW_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA07) }, // A10 = Amplified mic input + { MP_OBJ_NEW_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PB00) }, // A11 = VBUS Monitor + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D48), MP_ROM_PTR(&pin_PB31) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB16) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, + + // e-paper SPI and control pins + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK1), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI1), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ECS), MP_ROM_PTR(&pin_PB07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_EDC), MP_ROM_PTR(&pin_PB05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ERST), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_EBSY), MP_ROM_PTR(&pin_PA01) }, + + // Special named pins + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LOCK_BUTTON), MP_ROM_PTR(&pin_PA27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_LATCH), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_OUT), MP_ROM_PTR(&pin_PB30) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_CLOCK), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDCS), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MIC_SHUTDOWN), MP_ROM_PTR(&pin_PB31) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BCS), MP_ROM_PTR(&pin_PB06) }, // BCS = Babel Chip Select, the second flash chip + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].epaper_display)} +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From d6e657b593addf4009169e6ebc124d52666d0baf Mon Sep 17 00:00:00 2001 From: dalegrover Date: Tue, 14 Jan 2020 16:51:27 -0500 Subject: Initial commit. --- .github/workflows/build.yml | 1 + ports/atmel-samd/boards/seeeduino_xiao/board.c | 39 ++++++++++++++++ .../boards/seeeduino_xiao/mpconfigboard.h | 20 ++++++++ .../boards/seeeduino_xiao/mpconfigboard.mk | 13 ++++++ ports/atmel-samd/boards/seeeduino_xiao/pins.c | 54 ++++++++++++++++++++++ 5 files changed, 127 insertions(+) create mode 100644 ports/atmel-samd/boards/seeeduino_xiao/board.c create mode 100644 ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/seeeduino_xiao/pins.c (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 041b8b27c..a78fec4dd 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -144,6 +144,7 @@ jobs: - "pyruler" - "robohatmm1_m4" - "sam32" + - "seeeduino_xiao" - "serpente" - "shirtty" - "snekboard" diff --git a/ports/atmel-samd/boards/seeeduino_xiao/board.c b/ports/atmel-samd/boards/seeeduino_xiao/board.c new file mode 100644 index 000000000..0f60736a2 --- /dev/null +++ b/ports/atmel-samd/boards/seeeduino_xiao/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.h b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.h new file mode 100644 index 000000000..4bd10ca41 --- /dev/null +++ b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.h @@ -0,0 +1,20 @@ +#define MICROPY_HW_BOARD_NAME "Seeeduino XIAO" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) // was PA23 +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) // was PA22 + +#define DEFAULT_SPI_BUS_SCK (&pin_PA07) // was PA17 +#define DEFAULT_SPI_BUS_MOSI (&pin_PA06) // was PA16 +#define DEFAULT_SPI_BUS_MISO (&pin_PA05) // was PA19 + +#define DEFAULT_UART_BUS_RX (&pin_PB09) // was PA11 +#define DEFAULT_UART_BUS_TX (&pin_PB08) // was PA10 + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk new file mode 100644 index 000000000..2741454ce --- /dev/null +++ b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk @@ -0,0 +1,13 @@ +USB_VID = 0x2886 +USB_PID = 0x002f +USB_PRODUCT = "Seeeduino XIAO" +USB_MANUFACTURER = "Seeed" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/seeeduino_xiao/pins.c b/ports/atmel-samd/boards/seeeduino_xiao/pins.c new file mode 100644 index 000000000..8b9690253 --- /dev/null +++ b/ports/atmel-samd/boards/seeeduino_xiao/pins.c @@ -0,0 +1,54 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + // Analog pins + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA06) }, + + // Digital pins + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + + // UART pins + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB09) }, + + // SPI pins + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA05) }, + + // I2C pins + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + + // LED pins + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA17) }, // status + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_PA17) }, + + // Comm objects + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From 85dc4089b9b2d721a3e4bfc68e252c0dda450137 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Tue, 14 Jan 2020 17:23:16 -0500 Subject: address review comments --- ports/nrf/common-hal/_bleio/bonding.c | 5 +---- ports/nrf/peripherals/nrf/nvm.c | 2 +- 2 files changed, 2 insertions(+), 5 deletions(-) (limited to 'ports') diff --git a/ports/nrf/common-hal/_bleio/bonding.c b/ports/nrf/common-hal/_bleio/bonding.c index 7ba589623..9716b3988 100644 --- a/ports/nrf/common-hal/_bleio/bonding.c +++ b/ports/nrf/common-hal/_bleio/bonding.c @@ -92,6 +92,7 @@ void bonding_erase_storage(void) { // Given NULL to start or block address, return the address of the next valid block. // The last block returned is the unused block at the end. // Return NULL if we have run off the end of the bonding space. + STATIC bonding_block_t *next_block(bonding_block_t *block) { while (1) { // Advance to next block. @@ -127,10 +128,6 @@ STATIC bonding_block_t *find_existing_block(bool is_central, bonding_block_type_ if (block == NULL) { return NULL; } - if (block->type == BLOCK_INVALID) { - // Skip discarded blocks. - continue; - } // If types match, and block is unused, just return it. // Otherwise check that is_central and ediv match. if (type == block->type) { diff --git a/ports/nrf/peripherals/nrf/nvm.c b/ports/nrf/peripherals/nrf/nvm.c index e8fcc9008..63b168f14 100644 --- a/ports/nrf/peripherals/nrf/nvm.c +++ b/ports/nrf/peripherals/nrf/nvm.c @@ -89,7 +89,7 @@ bool sd_flash_write_sync(uint32_t *dest_words, uint32_t* src_words, uint32_t num // location before an erase is necessary, even if the write is all // ones (erased state). So we can't avoid erases even if the page // appears to be already erased (all ones), unless we keep track of -// writes to a page.g +// writes to a page. bool nrf_nvm_safe_flash_page_write(uint32_t page_addr, uint8_t *data) { #ifdef BLUETOOTH_SD -- cgit v1.2.3 From 4bf10a75c748b7f92f8325cd26501a916d904980 Mon Sep 17 00:00:00 2001 From: Benny Meisels Date: Tue, 7 Jan 2020 00:31:37 +0200 Subject: Add board definition files for AramCon Badge 2019 --- .github/workflows/build.yml | 1 + ports/nrf/boards/aramcon_badge_2019/board.c | 40 ++++++++++++++++++++++ .../nrf/boards/aramcon_badge_2019/mpconfigboard.h | 31 +++++++++++++++++ .../nrf/boards/aramcon_badge_2019/mpconfigboard.mk | 14 ++++++++ ports/nrf/boards/aramcon_badge_2019/pins.c | 34 ++++++++++++++++++ 5 files changed, 120 insertions(+) create mode 100644 ports/nrf/boards/aramcon_badge_2019/board.c create mode 100644 ports/nrf/boards/aramcon_badge_2019/mpconfigboard.h create mode 100644 ports/nrf/boards/aramcon_badge_2019/mpconfigboard.mk create mode 100644 ports/nrf/boards/aramcon_badge_2019/pins.c (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 041b8b27c..507842bac 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -73,6 +73,7 @@ jobs: fail-fast: false matrix: board: + - "aramcon_badge_2019" - "arduino_mkr1300" - "arduino_mkrzero" - "arduino_nano_33_ble" diff --git a/ports/nrf/boards/aramcon_badge_2019/board.c b/ports/nrf/boards/aramcon_badge_2019/board.c new file mode 100644 index 000000000..efb449285 --- /dev/null +++ b/ports/nrf/boards/aramcon_badge_2019/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Uri Shaked + * Copyright (c) 2019 Benjamin Meisels + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "common-hal/microcontroller/Pin.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/aramcon_badge_2019/mpconfigboard.h b/ports/nrf/boards/aramcon_badge_2019/mpconfigboard.h new file mode 100644 index 000000000..51d14721c --- /dev/null +++ b/ports/nrf/boards/aramcon_badge_2019/mpconfigboard.h @@ -0,0 +1,31 @@ +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "ARAMCON Badge 2019" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_LED_STATUS (&pin_P1_11) + +#ifdef QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 20) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(1, 4) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(1, 6) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(1, 0) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(1, 2) +#endif + +#ifdef SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_20 +#define SPI_FLASH_MISO_PIN &pin_P0_22 +#define SPI_FLASH_SCK_PIN &pin_P1_00 +#define SPI_FLASH_CS_PIN &pin_P1_02 +#endif + +#define BOARD_HAS_32KHZ_XTAL 0 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_28) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_03) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_01) +#define DEFAULT_SPI_BUS_MOSI (&pin_P1_10) +#define DEFAULT_SPI_BUS_MISO (&pin_P1_09) diff --git a/ports/nrf/boards/aramcon_badge_2019/mpconfigboard.mk b/ports/nrf/boards/aramcon_badge_2019/mpconfigboard.mk new file mode 100644 index 000000000..09252ab4b --- /dev/null +++ b/ports/nrf/boards/aramcon_badge_2019/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x239A +USB_PID = 0x807A +USB_PRODUCT = "ARAMCON Badge 2019" +USB_MANUFACTURER = "ARAMCON Badge Team" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "GD25Q16C" + +CIRCUITPY_DISPLAYIO = 1 + +CIRCUITPY_REQUIRE_I2C_PULLUPS = 0 diff --git a/ports/nrf/boards/aramcon_badge_2019/pins.c b/ports/nrf/boards/aramcon_badge_2019/pins.c new file mode 100644 index 000000000..82ab20013 --- /dev/null +++ b/ports/nrf/boards/aramcon_badge_2019/pins.c @@ -0,0 +1,34 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_LEFT_BUTTON), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_MIDDLE_BUTTON), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_RIGHT_BUTTON), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_P1_11) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_SND_CS), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_SND_DREQ), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_SND_RESET), MP_ROM_PTR(&pin_P0_00) }, + { MP_ROM_QSTR(MP_QSTR_SND_XDCS), MP_ROM_PTR(&pin_P0_24) }, + + { MP_ROM_QSTR(MP_QSTR_DISP_BUSY), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_DISP_CS), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_DISP_DC), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_DISP_RESET), MP_ROM_PTR(&pin_P0_06) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_P0_08) }, + + { MP_ROM_QSTR(MP_QSTR_VIBRATION_MOTOR), MP_ROM_PTR(&pin_P0_17) }, + + { MP_ROM_QSTR(MP_QSTR_BATTERY_SENSE), MP_ROM_PTR(&pin_P0_30) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From 86d454adf3842e0d0e4c49546f1aaeb3455080b4 Mon Sep 17 00:00:00 2001 From: Michael Welling Date: Thu, 16 Jan 2020 13:46:56 -0800 Subject: Initial board support for OHS2020 Badge Not tested but builds. Signed-off-by: Michael Welling --- ports/nrf/boards/ohs2020_badge/board.c | 99 +++++++++++++++++++++++++ ports/nrf/boards/ohs2020_badge/mpconfigboard.h | 57 ++++++++++++++ ports/nrf/boards/ohs2020_badge/mpconfigboard.mk | 10 +++ ports/nrf/boards/ohs2020_badge/pins.c | 18 +++++ 4 files changed, 184 insertions(+) create mode 100644 ports/nrf/boards/ohs2020_badge/board.c create mode 100644 ports/nrf/boards/ohs2020_badge/mpconfigboard.h create mode 100644 ports/nrf/boards/ohs2020_badge/mpconfigboard.mk create mode 100644 ports/nrf/boards/ohs2020_badge/pins.c (limited to 'ports') diff --git a/ports/nrf/boards/ohs2020_badge/board.c b/ports/nrf/boards/ohs2020_badge/board.c new file mode 100644 index 000000000..ee1f28459 --- /dev/null +++ b/ports/nrf/boards/ohs2020_badge/board.c @@ -0,0 +1,99 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0x36, 1, 0x00, // _MADCTL bottom to top refresh in vsync aligned order. + 0x3a, 1, 0x55, // COLMOD - 16bit color + 0x21, 0 | DELAY, 10, // _INVON + 0x13, 0 | DELAY, 10, // _NORON + 0x29, 0 | DELAY, 255, // _DISPON +}; + +void board_init(void) { + busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, NULL); + common_hal_busio_spi_never_reset(spi); + + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_P0_08, // TFT_DC Command or data + &pin_P0_14, // TFT_CS Chip select + &pin_P0_13, // TFT_RST Reset + 60000000); + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 240, // Width (after rotation) + 240, // Height (after rotation) + 0, // column start + 0, // row start + 270, // rotation + 16, // Color depth + false, // Grayscale + false, // Pixels in a byte share a row. Only used for depth < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_P1_05, // backlight pin + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60); // native_frames_per_second +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/nrf/boards/ohs2020_badge/mpconfigboard.h b/ports/nrf/boards/ohs2020_badge/mpconfigboard.h new file mode 100644 index 000000000..8e4e68dea --- /dev/null +++ b/ports/nrf/boards/ohs2020_badge/mpconfigboard.h @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * Copyright (c) 2020 Michael Welling + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Open Hardware Summit 2020 Badge" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(1, 0) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 20) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(1, 2) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(1, 1) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 23) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P1_00 +#define SPI_FLASH_MISO_PIN &pin_P0_22 +#define SPI_FLASH_SCK_PIN &pin_P1_01 +#define SPI_FLASH_CS_PIN &pin_P0_23 +#endif + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_P1_14) +#define DEFAULT_I2C_BUS_SDA (&pin_P1_15) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_11) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_12) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_07) diff --git a/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk b/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk new file mode 100644 index 000000000..ed96b1164 --- /dev/null +++ b/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk @@ -0,0 +1,10 @@ +USB_VID = 0x239A +USB_PID = 0x8072 +USB_PRODUCT = "OHS2020 Badge" +USB_MANUFACTURER = "Adafruit Industries LLC" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q32JV_IQ" diff --git a/ports/nrf/boards/ohs2020_badge/pins.c b/ports/nrf/boards/ohs2020_badge/pins.c new file mode 100644 index 000000000..c3752d06b --- /dev/null +++ b/ports/nrf/boards/ohs2020_badge/pins.c @@ -0,0 +1,18 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_CLOCK), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_DATA), MP_ROM_PTR(&pin_P0_28) }, + + { MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_TFT_MOSI), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From cc03d689846035c5c2973dbf393cd46a6b67f91d Mon Sep 17 00:00:00 2001 From: Michael Welling Date: Thu, 16 Jan 2020 14:53:07 -0800 Subject: Fix backlight pin registration Signed-off-by: Michael Welling --- ports/nrf/boards/ohs2020_badge/board.c | 2 +- ports/nrf/boards/ohs2020_badge/pins.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/ohs2020_badge/board.c b/ports/nrf/boards/ohs2020_badge/board.c index ee1f28459..189f7acdf 100644 --- a/ports/nrf/boards/ohs2020_badge/board.c +++ b/ports/nrf/boards/ohs2020_badge/board.c @@ -81,7 +81,7 @@ void board_init(void) { 0x37, // set vertical scroll command display_init_sequence, sizeof(display_init_sequence), - &pin_P1_05, // backlight pin + &pin_P0_02, // backlight pin NO_BRIGHTNESS_COMMAND, 1.0f, // brightness (ignored) true, // auto_brightness diff --git a/ports/nrf/boards/ohs2020_badge/pins.c b/ports/nrf/boards/ohs2020_badge/pins.c index c3752d06b..df87deeeb 100644 --- a/ports/nrf/boards/ohs2020_badge/pins.c +++ b/ports/nrf/boards/ohs2020_badge/pins.c @@ -5,7 +5,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_MICROPHONE_DATA), MP_ROM_PTR(&pin_P0_28) }, { MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_P0_13) }, - { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_P0_02) }, { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_P0_14) }, { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_P0_08) }, { MP_ROM_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_P0_11) }, -- cgit v1.2.3 From cc77e86408f3502ce353e30ee0fc8f006afb048e Mon Sep 17 00:00:00 2001 From: Michael Welling Date: Thu, 16 Jan 2020 15:43:49 -0800 Subject: Update the VID and USB company string Signed-off-by: Michael Welling --- ports/nrf/boards/ohs2020_badge/mpconfigboard.mk | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk b/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk index ed96b1164..46a4c3be6 100644 --- a/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk +++ b/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk @@ -1,7 +1,7 @@ USB_VID = 0x239A -USB_PID = 0x8072 +USB_PID = 0x8080 USB_PRODUCT = "OHS2020 Badge" -USB_MANUFACTURER = "Adafruit Industries LLC" +USB_MANUFACTURER = "OSHWA" MCU_CHIP = nrf52840 -- cgit v1.2.3 From 69785cccfe966ebae54aeb1e038dd553a0fd1b4a Mon Sep 17 00:00:00 2001 From: arturo182 Date: Fri, 17 Jan 2020 14:45:29 +0100 Subject: mimxrt1011: Fix pin definition --- ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c index 0b219468f..8e68e7702 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/pins.c @@ -41,8 +41,8 @@ const mcu_pin_obj_t pin_GPIO_08 = PIN(GPIO1, 8, GPIO_08, NO_ADC, 0); const mcu_pin_obj_t pin_GPIO_09 = PIN(GPIO1, 9, GPIO_09, NO_ADC, 0); const mcu_pin_obj_t pin_GPIO_10 = PIN(GPIO1, 10, GPIO_10, NO_ADC, 0); const mcu_pin_obj_t pin_GPIO_11 = PIN(GPIO1, 11, GPIO_11, NO_ADC, 0); -const mcu_pin_obj_t pin_GPIO_12 = PIN(GPIO1, 12, GPIO_11, NO_ADC, 0); -const mcu_pin_obj_t pin_GPIO_13 = PIN(GPIO1, 13, GPIO_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_12 = PIN(GPIO1, 12, GPIO_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_13 = PIN(GPIO1, 13, GPIO_13, NO_ADC, 0); const mcu_pin_obj_t pin_GPIO_AD_00 = PIN(GPIO1, 14, GPIO_AD_00, ADC1, 0); const mcu_pin_obj_t pin_GPIO_AD_01 = PIN(GPIO1, 15, GPIO_AD_01, ADC1, 1); -- cgit v1.2.3 From 3f43155b636a61f204d10dafa6bed733f86be4ec Mon Sep 17 00:00:00 2001 From: Hierophect Date: Fri, 17 Jan 2020 13:31:12 -0500 Subject: Meowbit bus conflict WIP --- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 10 +++++----- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 18 +++++++++--------- ports/stm32f4/boards/meowbit_v121/pins.c | 2 ++ supervisor/spi_flash_api.h | 4 ++++ 4 files changed, 20 insertions(+), 14 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index 0de74a946..7c7f4ad74 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -37,10 +37,10 @@ #define BOARD_OSC_DIV 12 #define BOARD_NO_VBUS_SENSE -#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader +//#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader // On-board flash -#define SPI_FLASH_MOSI_PIN (&pin_PB15) -#define SPI_FLASH_MISO_PIN (&pin_PB14) -#define SPI_FLASH_SCK_PIN (&pin_PB13) -#define SPI_FLASH_CS_PIN (&pin_PB01) +// #define SPI_FLASH_MOSI_PIN (&pin_PB15) +// #define SPI_FLASH_MISO_PIN (&pin_PB14) +// #define SPI_FLASH_SCK_PIN (&pin_PB13) +// #define SPI_FLASH_CS_PIN (&pin_PB01) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index 1d6f68b13..f24a2690c 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -4,20 +4,20 @@ USB_PRODUCT = "Meowbit" USB_MANUFACTURER = "Kittenbot" USB_DEVICES = "CDC,MSC" -SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICE_COUNT = 1 -EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ -LONGINT_IMPL = MPZ +# SPI_FLASH_FILESYSTEM = 1 +# EXTERNAL_FLASH_DEVICE_COUNT = 1 +# EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ +# LONGINT_IMPL = MPZ -BOOTLOADER_OFFSET = 0x8010000 +# BOOTLOADER_OFFSET = 0x8010000 -# INTERNAL_FLASH_FILESYSTEM = 1 -# LONGINT_IMPL = NONE +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE MCU_SERIES = m4 MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE -LD_FILE = boards/STM32F401_boot.ld -#LD_FILE = boards/STM32F401_fs.ld \ No newline at end of file +#LD_FILE = boards/STM32F401_boot.ld +LD_FILE = boards/STM32F401_fs.ld \ No newline at end of file diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c index 1216f4a80..66cbcd7d6 100644 --- a/ports/stm32f4/boards/meowbit_v121/pins.c +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -1,4 +1,5 @@ #include "shared-bindings/board/__init__.h" +#include "supervisor/spi_flash_api.h" STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PB04) }, @@ -59,5 +60,6 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0), MP_ROM_PTR(&pin_PA00) }, { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_PB00) }, + //{ MP_ROM_QSTR(MP_QSTR_INTERNAL_SPI), MP_ROM_PTR(&spi) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/supervisor/spi_flash_api.h b/supervisor/spi_flash_api.h index 28cccb1b1..b477308ba 100644 --- a/supervisor/spi_flash_api.h +++ b/supervisor/spi_flash_api.h @@ -31,6 +31,10 @@ #include "supervisor/shared/external_flash/devices.h" +#include "shared-bindings/busio/SPI.h" + +extern busio_spi_obj_t spi; //Used to share SPI bus on some boards + // This API is implemented for both normal SPI peripherals and QSPI peripherals. bool spi_flash_command(uint8_t command); -- cgit v1.2.3 From 7d8dac9211dab92d750a0351335b4ad3fffc05e2 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Wed, 8 Jan 2020 20:32:45 -0800 Subject: Refine iMX RT memory layout and add three boards Introduces a way to place CircuitPython code and data into tightly coupled memory (TCM) which is accessible by the CPU in a single cycle. It also frees up room in the corresponding cache for intermittent data. Loading from external flash is slow! The data cache is also now enabled. Adds support for the iMX RT 1021 chip. Adds three new boards: * iMX RT 1020 EVK * iMX RT 1060 EVK * Teensy 4.0 Related to #2492, #2472 and #2477. Fixes #2475. --- .github/workflows/build.yml | 3 + .gitmodules | 2 +- lib/tinyusb | 2 +- ports/mimxrt10xx/Makefile | 20 +- ports/mimxrt10xx/background.c | 3 +- ports/mimxrt10xx/boards/feather_mimxrt1011/board.c | 16 - .../boards/feather_mimxrt1011/flash_config.c | 122 +++++++ .../boards/feather_mimxrt1011/mpconfigboard.h | 11 - .../boards/feather_mimxrt1011/mpconfigboard.mk | 15 +- ports/mimxrt10xx/boards/feather_mimxrt1062/board.c | 16 - .../boards/feather_mimxrt1062/flash_config.c | 122 +++++++ .../boards/feather_mimxrt1062/mpconfigboard.h | 8 - .../boards/feather_mimxrt1062/mpconfigboard.mk | 15 +- ports/mimxrt10xx/boards/imxrt1010_evk/board.c | 16 - .../mimxrt10xx/boards/imxrt1010_evk/flash_config.c | 141 ++++++++ .../boards/imxrt1010_evk/mpconfigboard.h | 17 - .../boards/imxrt1010_evk/mpconfigboard.mk | 16 +- ports/mimxrt10xx/boards/imxrt1010_evk/pins.c | 30 +- ports/mimxrt10xx/boards/imxrt1020_evk/board.c | 39 +++ .../mimxrt10xx/boards/imxrt1020_evk/flash_config.c | 122 +++++++ .../boards/imxrt1020_evk/mpconfigboard.h | 14 + .../boards/imxrt1020_evk/mpconfigboard.mk | 8 + ports/mimxrt10xx/boards/imxrt1020_evk/pins.c | 84 +++++ ports/mimxrt10xx/boards/imxrt1060_evk/board.c | 39 +++ .../mimxrt10xx/boards/imxrt1060_evk/flash_config.c | 141 ++++++++ .../boards/imxrt1060_evk/mpconfigboard.h | 14 + .../boards/imxrt1060_evk/mpconfigboard.mk | 8 + ports/mimxrt10xx/boards/imxrt1060_evk/pins.c | 128 +++++++ .../boards/mimxrt1011-bootloader-external-flash.ld | 106 ------ .../mimxrt10xx/boards/mimxrt1011-external-flash.ld | 123 ------- .../boards/mimxrt1062-bootloader-external-flash.ld | 106 ------ ports/mimxrt10xx/boards/teensy40/board.c | 39 +++ ports/mimxrt10xx/boards/teensy40/board.ld | 1 + ports/mimxrt10xx/boards/teensy40/flash_config.c | 141 ++++++++ ports/mimxrt10xx/boards/teensy40/mpconfigboard.h | 18 + ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk | 8 + ports/mimxrt10xx/boards/teensy40/pins.c | 87 +++++ .../common-hal/microcontroller/__init__.c | 6 +- ports/mimxrt10xx/linking/chip_family/MIMXRT1011.ld | 2 + ports/mimxrt10xx/linking/chip_family/MIMXRT1021.ld | 2 + ports/mimxrt10xx/linking/chip_family/MIMXRT1062.ld | 2 + ports/mimxrt10xx/linking/common.ld | 158 +++++++++ ports/mimxrt10xx/linking/flash/AT25SF128A.ld | 1 + ports/mimxrt10xx/linking/flash/IS25LP064A.ld | 1 + ports/mimxrt10xx/linking/flash/IS25WP064A.ld | 1 + ports/mimxrt10xx/linking/flash/W25Q16JV.ld | 1 + ports/mimxrt10xx/linking/flash/W25Q64JV.ld | 1 + ports/mimxrt10xx/mpconfigport.h | 12 +- ports/mimxrt10xx/mpconfigport.mk | 17 +- ports/mimxrt10xx/mphalport.c | 2 +- .../peripherals/mimxrt10xx/MIMXRT1021/clocks.c | 371 +++++++++++++++++++++ .../peripherals/mimxrt10xx/MIMXRT1021/periph.c | 218 ++++++++++++ .../peripherals/mimxrt10xx/MIMXRT1021/periph.h | 43 +++ .../peripherals/mimxrt10xx/MIMXRT1021/pins.c | 128 +++++++ .../peripherals/mimxrt10xx/MIMXRT1021/pins.h | 129 +++++++ .../peripherals/mimxrt10xx/MIMXRT1062/periph.c | 2 +- ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h | 2 + ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h | 2 + ports/mimxrt10xx/reset.c | 2 +- ports/mimxrt10xx/reset.h | 2 - ports/mimxrt10xx/sdk | 2 +- ports/mimxrt10xx/supervisor/internal_flash.c | 10 +- ports/mimxrt10xx/supervisor/port.c | 201 ++++++++++- py/map.c | 4 +- py/mpstate.c | 3 +- py/obj.c | 3 +- py/objdict.c | 5 +- py/objfun.c | 4 +- py/qstr.c | 4 +- py/runtime.c | 8 +- py/runtime.h | 10 +- py/vm.c | 4 +- py/vmentrytable.h | 4 +- supervisor/linker.h | 42 +++ supervisor/port.h | 6 + supervisor/shared/filesystem.c | 2 +- supervisor/shared/memory.c | 7 +- supervisor/shared/safe_mode.c | 3 + supervisor/shared/safe_mode.h | 1 + supervisor/shared/stack.c | 7 + supervisor/shared/tick.c | 8 +- tools/build_board_info.py | 3 +- 82 files changed, 2717 insertions(+), 530 deletions(-) create mode 100644 ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c create mode 100644 ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c create mode 100644 ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c create mode 100644 ports/mimxrt10xx/boards/imxrt1020_evk/board.c create mode 100644 ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c create mode 100644 ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.h create mode 100644 ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk create mode 100644 ports/mimxrt10xx/boards/imxrt1020_evk/pins.c create mode 100644 ports/mimxrt10xx/boards/imxrt1060_evk/board.c create mode 100644 ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c create mode 100644 ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.h create mode 100644 ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk create mode 100644 ports/mimxrt10xx/boards/imxrt1060_evk/pins.c delete mode 100644 ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld delete mode 100644 ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld delete mode 100644 ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld create mode 100644 ports/mimxrt10xx/boards/teensy40/board.c create mode 100644 ports/mimxrt10xx/boards/teensy40/board.ld create mode 100644 ports/mimxrt10xx/boards/teensy40/flash_config.c create mode 100644 ports/mimxrt10xx/boards/teensy40/mpconfigboard.h create mode 100644 ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk create mode 100644 ports/mimxrt10xx/boards/teensy40/pins.c create mode 100644 ports/mimxrt10xx/linking/chip_family/MIMXRT1011.ld create mode 100644 ports/mimxrt10xx/linking/chip_family/MIMXRT1021.ld create mode 100644 ports/mimxrt10xx/linking/chip_family/MIMXRT1062.ld create mode 100644 ports/mimxrt10xx/linking/common.ld create mode 100644 ports/mimxrt10xx/linking/flash/AT25SF128A.ld create mode 100644 ports/mimxrt10xx/linking/flash/IS25LP064A.ld create mode 100644 ports/mimxrt10xx/linking/flash/IS25WP064A.ld create mode 100644 ports/mimxrt10xx/linking/flash/W25Q16JV.ld create mode 100644 ports/mimxrt10xx/linking/flash/W25Q64JV.ld create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.c create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.h create mode 100755 supervisor/linker.h (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 921a40d27..cfb6c2f08 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -113,6 +113,8 @@ jobs: - "hallowing_m0_express" - "hallowing_m4_express" - "imxrt1010_evk" + - "imxrt1020_evk" + - "imxrt1060_evk" - "itsybitsy_m0_express" - "itsybitsy_m4_express" - "itsybitsy_nrf52840_express" @@ -163,6 +165,7 @@ jobs: - "stm32f411ve_discovery" - "stm32f412zg_discovery" - "stringcar_m0_express" + - "teensy40" - "teknikio_bluebird" - "trellis_m4_express" - "trinket_m0" diff --git a/.gitmodules b/.gitmodules index 44fc818c8..cb36ad4c4 100644 --- a/.gitmodules +++ b/.gitmodules @@ -110,4 +110,4 @@ url = https://github.com/adafruit/Adafruit_MP3 [submodule "ports/mimxrt10xx/sdk"] path = ports/mimxrt10xx/sdk - url = https://github.com/arturo182/MIMXRT10xx_SDK + url = https://github.com/adafruit/MIMXRT10xx_SDK diff --git a/lib/tinyusb b/lib/tinyusb index dda4c9a94..1f95f439e 160000 --- a/lib/tinyusb +++ b/lib/tinyusb @@ -1 +1 @@ -Subproject commit dda4c9a94b509238faa7b5ab5b9464c1d2e63ff0 +Subproject commit 1f95f439e11f519e69d75a4a8b7b9f28eaf5060e diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile index 68ddea565..d46806dc6 100644 --- a/ports/mimxrt10xx/Makefile +++ b/ports/mimxrt10xx/Makefile @@ -71,6 +71,7 @@ INC += \ -Isdk/CMSIS/Include \ -Isdk/devices/$(CHIP_FAMILY) \ -Isdk/devices/$(CHIP_FAMILY)/drivers \ + -Isdk/devices/$(CHIP_FAMILY)/xip \ # NDEBUG disables assert() statements. This reduces code size pretty dramatically, per tannewt. @@ -114,6 +115,7 @@ CFLAGS += \ -mfpu=fpv5-sp-d16 \ -DCPU_$(CHIP_VARIANT) \ -DDEBUG \ + -DIMXRT10XX \ -DXIP_EXTERNAL_FLASH=1 \ -DXIP_BOOT_HEADER_ENABLE=1 \ -D__START=main \ @@ -121,7 +123,11 @@ CFLAGS += \ -ffunction-sections -fdata-sections -fstack-usage \ -D__STARTUP_CLEAR_BSS -LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs +LD_FILES = $(wildcard boards/$(BOARD)/*.ld) $(addprefix linking/, flash/$(FLASH).ld chip_family/$(CHIP_FAMILY).ld common.ld) + +LD_SCRIPT_FLAG := -Wl,-T, + +LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib $(addprefix $(LD_SCRIPT_FLAG), $(LD_FILES)) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs LIBS := -lgcc -lc -lnosys -lm # Use toolchain libm if we're not using our own. @@ -154,6 +160,7 @@ SRC_SDK := $(addprefix sdk/devices/$(CHIP_FAMILY)/, $(SRC_SDK)) SRC_C = \ background.c \ boards/$(BOARD)/board.c \ + boards/$(BOARD)/flash_config.c \ boards/$(BOARD)/pins.c \ fatfs_port.c \ lib/mp-readline/readline.c \ @@ -231,20 +238,23 @@ OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) -all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 +all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 $(BUILD)/firmware.hex -$(BUILD)/firmware.elf: $(LD_FILE) $(OBJ) +$(BUILD)/firmware.elf: $(OBJ) $(LD_FILES) $(STEPECHO) "LINK $@" - $(Q)$(CC) -o $@ $(LDFLAGS) $(filter-out $<,$^) -Wl,--start-group $(LIBS) -Wl,--end-group + $(Q)$(CC) -o $@ $(LDFLAGS) $(filter-out %.ld, $^) -Wl,--start-group $(LIBS) -Wl,--end-group $(BUILD)/firmware.bin: $(BUILD)/firmware.elf $(STEPECHO) "Create $@" - $(Q)$(OBJCOPY) -O binary -j .interrupts -j .text -j .ARM.exidx -j .data $^ $@ + $(Q)$(OBJCOPY) -O binary -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $^ $@ $(BUILD)/firmware.uf2: $(BUILD)/firmware.bin $(STEPECHO) "Create $@" $(Q)$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -b $(BOOTLOADER_SIZE) -f MIMXRT10XX -c -o $@ $^ +$(BUILD)/firmware.hex: $(BUILD)/firmware.elf + $(Q)$(OBJCOPY) -O ihex -j .flash_config -j .ivt -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $< $@ + include $(TOP)/py/mkrules.mk # Print out the value of a make variable. diff --git a/ports/mimxrt10xx/background.c b/ports/mimxrt10xx/background.c index 8c7333cf8..c0b217685 100644 --- a/ports/mimxrt10xx/background.c +++ b/ports/mimxrt10xx/background.c @@ -34,6 +34,7 @@ #include "py/runtime.h" #include "shared-module/network/__init__.h" +#include "supervisor/linker.h" #include "supervisor/shared/stack.h" // TODO @@ -51,7 +52,7 @@ void background_tasks_reset(void) { running_background_tasks = false; } -void run_background_tasks(void) { +void PLACE_IN_ITCM(run_background_tasks)(void) { // Don't call ourselves recursively. if (running_background_tasks) { return; diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c b/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c index 8e73df4ad..52dd498b3 100644 --- a/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c @@ -27,24 +27,8 @@ #include "boards/board.h" #include "mpconfigboard.h" -#include "fsl_iomuxc.h" void board_init(void) { - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1,1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 1U); - - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B,0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 0x10E1U); } bool board_requests_safe_mode(void) { diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c b/ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c new file mode 100644 index 000000000..b74c0b151 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c @@ -0,0 +1,122 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + + +__attribute__((section(".boot_hdr.ivt"))) +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +__attribute__((section(".boot_hdr.boot_data"))) +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; + +__attribute__((section(".boot_hdr.conf"))) +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h index 98d1f478b..a715a2c56 100644 --- a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h @@ -1,19 +1,8 @@ #define MICROPY_HW_BOARD_NAME "Feather MIMXRT1011" #define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A" -//TODO -//#define MICROPY_HW_LED_STATUS (&pin_PA27) - #define MICROPY_HW_NEOPIXEL (&pin_GPIO_SD_05) -// These are pins not to reset. -// QSPI Data pins -//#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 ) -// QSPI CS, and QSPI SCK -//#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 ) -//#define MICROPY_PORT_C ( 0 ) -//#define MICROPY_PORT_D ( 0 ) - // If you change this, then make sure to update the linker scripts as well to // make sure you don't overwrite code #define CIRCUITPY_INTERNAL_NVM_SIZE 0 diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk index 6efd3f329..08164b140 100644 --- a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk @@ -1,21 +1,8 @@ -LD_FILE = boards/mimxrt1011-bootloader-external-flash.ld USB_VID = 0x239A USB_PID = 0x8074 USB_PRODUCT = "Feather MIMXRT1011" USB_MANUFACTURER = "arturo182" -USB_DEVICES = "CDC,MSC,HID" CHIP_VARIANT = MIMXRT1011DAE5A CHIP_FAMILY = MIMXRT1011 - -INTERNAL_FLASH_FILESYSTEM = 1 - -CIRCUITPY_DISPLAYIO = 0 -CIRCUITPY_AUDIOIO = 0 -CIRCUITPY_AUDIOBUSIO = 0 -CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 -CIRCUITPY_NVM = 0 -CIRCUITPY_ROTARYIO = 0 - -LONGINT_IMPL = MPZ +FLASH = W25Q64JV diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c b/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c index 979dd82ce..52dd498b3 100644 --- a/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c @@ -27,24 +27,8 @@ #include "boards/board.h" #include "mpconfigboard.h" -#include "fsl_iomuxc.h" void board_init(void) { - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK,1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, 1U); - - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B,0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, 0x10E1U); } bool board_requests_safe_mode(void) { diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c b/ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c new file mode 100644 index 000000000..b74c0b151 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c @@ -0,0 +1,122 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + + +__attribute__((section(".boot_hdr.ivt"))) +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +__attribute__((section(".boot_hdr.boot_data"))) +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; + +__attribute__((section(".boot_hdr.conf"))) +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h index b91209c82..4c3953187 100644 --- a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h @@ -6,14 +6,6 @@ //#define MICROPY_HW_NEOPIXEL (&pin_PB22) -// These are pins not to reset. -// QSPI Data pins -//#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 ) -// QSPI CS, and QSPI SCK -//#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 ) -//#define MICROPY_PORT_C ( 0 ) -//#define MICROPY_PORT_D ( 0 ) - // If you change this, then make sure to update the linker scripts as well to // make sure you don't overwrite code #define CIRCUITPY_INTERNAL_NVM_SIZE 0 diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk index b2e356e55..1c8646991 100644 --- a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk @@ -1,21 +1,8 @@ -LD_FILE = boards/mimxrt1062-bootloader-external-flash.ld USB_VID = 0x239A USB_PID = 0x8076 USB_PRODUCT = "Feather MIMXRT1062" USB_MANUFACTURER = "arturo182" -USB_DEVICES = "CDC,MSC,HID" CHIP_VARIANT = MIMXRT1062DVJ6A CHIP_FAMILY = MIMXRT1062 - -INTERNAL_FLASH_FILESYSTEM = 1 - -CIRCUITPY_DISPLAYIO = 0 -CIRCUITPY_AUDIOIO = 0 -CIRCUITPY_AUDIOBUSIO = 0 -CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 -CIRCUITPY_NVM = 0 -CIRCUITPY_ROTARYIO = 0 - -LONGINT_IMPL = MPZ +FLASH = W25Q64JV diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/board.c b/ports/mimxrt10xx/boards/imxrt1010_evk/board.c index 8e73df4ad..52dd498b3 100644 --- a/ports/mimxrt10xx/boards/imxrt1010_evk/board.c +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/board.c @@ -27,24 +27,8 @@ #include "boards/board.h" #include "mpconfigboard.h" -#include "fsl_iomuxc.h" void board_init(void) { - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1,1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 1U); - IOMUXC_SetPinMux(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 1U); - - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B,0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 0x10E1U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 0x10E1U); } bool board_requests_safe_mode(void) { diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c new file mode 100644 index 000000000..c281d4541 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c @@ -0,0 +1,141 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + +/* Component ID definition, used by tools. */ +#ifndef FSL_COMPONENT_ID +#define FSL_COMPONENT_ID "platform.drivers.xip_device" +#endif + +#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1) +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) + __attribute__((section(".boot_hdr.ivt"))) +#elif defined(__ICCARM__) +#pragma location=".boot_hdr.ivt" +#endif +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) + __attribute__((section(".boot_hdr.boot_data"))) +#elif defined(__ICCARM__) +#pragma location=".boot_hdr.boot_data" +#endif +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; +#endif + +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) +__attribute__((section(".boot_hdr.conf"))) +#elif defined(__ICCARM__) +#pragma location = ".boot_hdr.conf" +#endif + +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h index 12cb5e8a8..128e33111 100644 --- a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h @@ -1,19 +1,6 @@ #define MICROPY_HW_BOARD_NAME "IMXRT1010-EVK" #define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A" -//TODO -//#define MICROPY_HW_LED_STATUS (&pin_PA27) - -//#define MICROPY_HW_NEOPIXEL (&pin_PB22) - -// These are pins not to reset. -// QSPI Data pins -//#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 ) -// QSPI CS, and QSPI SCK -//#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 ) -//#define MICROPY_PORT_C ( 0 ) -//#define MICROPY_PORT_D ( 0 ) - // If you change this, then make sure to update the linker scripts as well to // make sure you don't overwrite code #define CIRCUITPY_INTERNAL_NVM_SIZE 0 @@ -23,9 +10,5 @@ #define DEFAULT_I2C_BUS_SCL (&pin_GPIO_02) #define DEFAULT_I2C_BUS_SDA (&pin_GPIO_01) -#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_AD_06) -#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_04) -#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_03) - #define DEFAULT_UART_BUS_RX (&pin_GPIO_09) #define DEFAULT_UART_BUS_TX (&pin_GPIO_10) diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk index 4401647c4..81eb63597 100644 --- a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk @@ -1,22 +1,8 @@ -LD_FILE = boards/mimxrt1011-bootloader-external-flash.ld USB_VID = 0x239A USB_PID = 0x8078 USB_PRODUCT = "IMXRT1010-EVK" USB_MANUFACTURER = "NXP" -USB_DEVICES = "CDC,MSC,HID" CHIP_VARIANT = MIMXRT1011DAE5A CHIP_FAMILY = MIMXRT1011 - -INTERNAL_FLASH_FILESYSTEM = 1 - -CIRCUITPY_DISPLAYIO = 0 -CIRCUITPY_AUDIOIO = 0 -CIRCUITPY_AUDIOBUSIO = 0 -CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 -CIRCUITPY_NEOPIXEL_WRITE = 0 -CIRCUITPY_NVM = 0 -CIRCUITPY_ROTARYIO = 0 - -LONGINT_IMPL = MPZ +FLASH = AT25SF128A diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c b/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c index cfc876369..a5a598760 100644 --- a/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c @@ -4,21 +4,25 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_09) }, { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_10) }, { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_AD_05) }, { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_AD_06) }, - //{ MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_08) }, // Connected to audio codec - //{ MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_01) }, // Connected to audio codec + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_01) }, { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_AD_01) }, { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_AD_02) }, { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_SD_02) }, - //{ MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_03) }, // Connected to audio codec + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_03) }, { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_AD_05) }, { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_AD_04) }, { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_AD_03) }, { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_AD_06) }, { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_01) }, { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_02) }, { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_07) }, { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_09) }, @@ -27,8 +31,24 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_01) }, { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_02) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_USR_LED), MP_ROM_PTR(&pin_GPIO_11) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_USR_SW), MP_ROM_PTR(&pin_GPIO_SD_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_USER_LED), MP_ROM_PTR(&pin_GPIO_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_USER_SW), MP_ROM_PTR(&pin_GPIO_SD_05) }, + + // Audio Interface + { MP_ROM_QSTR(MP_QSTR_AUDIO_INT), MP_ROM_PTR(&pin_GPIO_00) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_SYNC), MP_ROM_PTR(&pin_GPIO_07) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_BCLK), MP_ROM_PTR(&pin_GPIO_06) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_RXD), MP_ROM_PTR(&pin_GPIO_03) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_TXD), MP_ROM_PTR(&pin_GPIO_04) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_MCLK), MP_ROM_PTR(&pin_GPIO_08) }, + + // SPDIF + { MP_ROM_QSTR(MP_QSTR_SPDIF_IN), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_ROM_QSTR(MP_QSTR_SPDIF_OUT), MP_ROM_PTR(&pin_GPIO_11) }, + + // Freelink UART + { MP_ROM_QSTR(MP_QSTR_FREELINK_TX), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_ROM_QSTR(MP_QSTR_FREELINK_RX), MP_ROM_PTR(&pin_GPIO_09) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/board.c b/ports/mimxrt10xx/boards/imxrt1020_evk/board.c new file mode 100644 index 000000000..52dd498b3 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c new file mode 100644 index 000000000..b74c0b151 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c @@ -0,0 +1,122 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + + +__attribute__((section(".boot_hdr.ivt"))) +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +__attribute__((section(".boot_hdr.boot_data"))) +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; + +__attribute__((section(".boot_hdr.conf"))) +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.h b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.h new file mode 100644 index 000000000..a40df100e --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.h @@ -0,0 +1,14 @@ +#define MICROPY_HW_BOARD_NAME "iMX RT 1020 EVK" +#define MICROPY_HW_MCU_NAME "IMXRT1021DAG5A" + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (8 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_SD_B1_03) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_SD_B1_02) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_B1_09) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_B1_08) diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk new file mode 100644 index 000000000..62a2c90de --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x16C0 +USB_PID = 0x8888 +USB_PRODUCT = "iMX RT 1020 EVK" +USB_MANUFACTURER = "NXP" + +CHIP_VARIANT = MIMXRT1021DAG5A +CHIP_FAMILY = MIMXRT1021 +FLASH = IS25LP064A diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/pins.c b/ports/mimxrt10xx/boards/imxrt1020_evk/pins.c new file mode 100644 index 000000000..ef8115a64 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/pins.c @@ -0,0 +1,84 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_AD_B0_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_AD_B0_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_AD_B0_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_AD_B0_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_AD_B0_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_AD_B0_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_AD_B0_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_SD_B1_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_SD_B1_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_SD_B1_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_SD_B1_02) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B1_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_USER_LED), MP_ROM_PTR(&pin_GPIO_AD_B0_05) }, + + // SD Card + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_GPIO_SD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_SW), MP_ROM_PTR(&pin_GPIO_SD_B0_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CMD), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D0), MP_ROM_PTR(&pin_GPIO_SD_B0_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D1), MP_ROM_PTR(&pin_GPIO_SD_B0_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D2), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D3), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_PWREN), MP_ROM_PTR(&pin_GPIO_SD_B1_04) }, + + // // Audio Interface + { MP_ROM_QSTR(MP_QSTR_AUDIO_INT), MP_ROM_PTR(&pin_GPIO_AD_B1_04) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_SYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_BCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_RXD), MP_ROM_PTR(&pin_GPIO_AD_B1_05) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_TXD), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_MCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + + // // Ethernet + { MP_ROM_QSTR(MP_QSTR_ETHERNET_MDIO), MP_ROM_PTR(&pin_GPIO_EMC_40) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_MDC), MP_ROM_PTR(&pin_GPIO_EMC_41) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD0), MP_ROM_PTR(&pin_GPIO_AD_B0_10) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD1), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_CRS_DV), MP_ROM_PTR(&pin_GPIO_AD_B0_11) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD0), MP_ROM_PTR(&pin_GPIO_AD_B0_14) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD1), MP_ROM_PTR(&pin_GPIO_AD_B0_15) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXEN), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_INT), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RST), MP_ROM_PTR(&pin_GPIO_AD_B0_04) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_CLK), MP_ROM_PTR(&pin_GPIO_AD_B0_08) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXER), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + + // // Freelink UART + { MP_ROM_QSTR(MP_QSTR_FREELINK_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_06) }, + { MP_ROM_QSTR(MP_QSTR_FREELINK_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_07) }, + + // CAN + { MP_ROM_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_GPIO_SD_B1_00) }, + { MP_ROM_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_GPIO_SD_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_CAN_STBY), MP_ROM_PTR(&pin_GPIO_AD_B1_13) }, + + // + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SDA), MP_ROM_PTR(&pin_GPIO_SD_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SCL), MP_ROM_PTR(&pin_GPIO_SD_B1_02) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/board.c b/ports/mimxrt10xx/boards/imxrt1060_evk/board.c new file mode 100644 index 000000000..52dd498b3 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c new file mode 100644 index 000000000..c281d4541 --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c @@ -0,0 +1,141 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + +/* Component ID definition, used by tools. */ +#ifndef FSL_COMPONENT_ID +#define FSL_COMPONENT_ID "platform.drivers.xip_device" +#endif + +#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1) +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) + __attribute__((section(".boot_hdr.ivt"))) +#elif defined(__ICCARM__) +#pragma location=".boot_hdr.ivt" +#endif +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) + __attribute__((section(".boot_hdr.boot_data"))) +#elif defined(__ICCARM__) +#pragma location=".boot_hdr.boot_data" +#endif +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; +#endif + +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) +__attribute__((section(".boot_hdr.conf"))) +#elif defined(__ICCARM__) +#pragma location = ".boot_hdr.conf" +#endif + +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.h b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.h new file mode 100644 index 000000000..8eccd8aee --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.h @@ -0,0 +1,14 @@ +#define MICROPY_HW_BOARD_NAME "iMX RT 1060 EVK" +#define MICROPY_HW_MCU_NAME "IMXRT1062DVJ6A" + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (8 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_AD_B1_00) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_AD_B1_01) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_B1_07) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_B1_06) diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk new file mode 100644 index 000000000..a70d1deeb --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x16C0 +USB_PID = 0x8888 +USB_PRODUCT = "iMX RT 1060 EVK" +USB_MANUFACTURER = "NXP" + +CHIP_VARIANT = MIMXRT1062DVJ6A +CHIP_FAMILY = MIMXRT1062 +FLASH = IS25WP064A diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/pins.c b/ports/mimxrt10xx/boards/imxrt1060_evk/pins.c new file mode 100644 index 000000000..2d268952d --- /dev/null +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/pins.c @@ -0,0 +1,128 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_AD_B0_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, // Connected to audio codec + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_AD_B0_10) }, // Connected to audio codec + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_AD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, // Connected to audio codec + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_SD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + + // i2c sensor is on I2C1_SCL/SDA + + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B1_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_USER_LED), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, + + // Camera Sensor Interface + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_VSYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_PWDN), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_HSYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D9), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_MCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D8), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D7), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_PIXCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D6), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D2), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D5), MP_ROM_PTR(&pin_GPIO_AD_B1_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D3), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D4), MP_ROM_PTR(&pin_GPIO_AD_B1_13) }, + + // SD Card + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_SW), MP_ROM_PTR(&pin_GPIO_B1_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CMD), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D0), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D1), MP_ROM_PTR(&pin_GPIO_SD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D2), MP_ROM_PTR(&pin_GPIO_SD_B0_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D3), MP_ROM_PTR(&pin_GPIO_SD_B0_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_PWREN), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + + // LCD Interface + { MP_ROM_QSTR(MP_QSTR_LCD_BACKLIGHT), MP_ROM_PTR(&pin_GPIO_B1_15) }, + { MP_ROM_QSTR(MP_QSTR_LCD_RST), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, + { MP_ROM_QSTR(MP_QSTR_LCD_ENABLE), MP_ROM_PTR(&pin_GPIO_B0_01) }, + { MP_ROM_QSTR(MP_QSTR_LCD_VSYNC), MP_ROM_PTR(&pin_GPIO_B0_03) }, + { MP_ROM_QSTR(MP_QSTR_LCD_HSYNC), MP_ROM_PTR(&pin_GPIO_B0_02) }, + { MP_ROM_QSTR(MP_QSTR_LCD_CLK), MP_ROM_PTR(&pin_GPIO_B0_00) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D0), MP_ROM_PTR(&pin_GPIO_B0_04) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D1), MP_ROM_PTR(&pin_GPIO_B0_05) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D2), MP_ROM_PTR(&pin_GPIO_B0_06) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D3), MP_ROM_PTR(&pin_GPIO_B0_07) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D4), MP_ROM_PTR(&pin_GPIO_B0_08) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D5), MP_ROM_PTR(&pin_GPIO_B0_09) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D6), MP_ROM_PTR(&pin_GPIO_B0_10) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D7), MP_ROM_PTR(&pin_GPIO_B0_11) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D8), MP_ROM_PTR(&pin_GPIO_B0_12) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D9), MP_ROM_PTR(&pin_GPIO_B0_13) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D10), MP_ROM_PTR(&pin_GPIO_B0_14) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D11), MP_ROM_PTR(&pin_GPIO_B0_15) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D12), MP_ROM_PTR(&pin_GPIO_B1_00) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D13), MP_ROM_PTR(&pin_GPIO_B1_01) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D14), MP_ROM_PTR(&pin_GPIO_B1_02) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D15), MP_ROM_PTR(&pin_GPIO_B1_03) }, + + // Touch Interface + { MP_ROM_QSTR(MP_QSTR_LCD_TOUCH_INT), MP_ROM_PTR(&pin_GPIO_AD_B0_11) }, + + // Audio Interface + { MP_ROM_QSTR(MP_QSTR_AUDIO_INT), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_SYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_BCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_RXD), MP_ROM_PTR(&pin_GPIO_AD_B1_12) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_TXD), MP_ROM_PTR(&pin_GPIO_AD_B1_13) }, + { MP_ROM_QSTR(MP_QSTR_AUDIO_MCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + + // SPDIF + { MP_ROM_QSTR(MP_QSTR_SPDIF_IN), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + { MP_ROM_QSTR(MP_QSTR_SPDIF_OUT), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + + // Ethernet + { MP_ROM_QSTR(MP_QSTR_ETHERNET_MDIO), MP_ROM_PTR(&pin_GPIO_EMC_41) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_MDC), MP_ROM_PTR(&pin_GPIO_EMC_40) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD0), MP_ROM_PTR(&pin_GPIO_B1_04) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD1), MP_ROM_PTR(&pin_GPIO_B1_05) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_CRS_DV), MP_ROM_PTR(&pin_GPIO_B1_06) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD0), MP_ROM_PTR(&pin_GPIO_B1_07) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD1), MP_ROM_PTR(&pin_GPIO_B1_08) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXEN), MP_ROM_PTR(&pin_GPIO_B1_09) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_INT), MP_ROM_PTR(&pin_GPIO_AD_B0_10) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RST), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_CLK), MP_ROM_PTR(&pin_GPIO_B1_10) }, + { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXER), MP_ROM_PTR(&pin_GPIO_B1_11) }, + + // Freelink UART + { MP_ROM_QSTR(MP_QSTR_FREELINK_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_ROM_QSTR(MP_QSTR_FREELINK_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + + // CAN + { MP_ROM_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_14) }, + { MP_ROM_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_15) }, + { MP_ROM_QSTR(MP_QSTR_CAN_STBY), MP_ROM_PTR(&pin_GPIO_AD_B0_05) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld b/ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld deleted file mode 100644 index d36ee1239..000000000 --- a/ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld +++ /dev/null @@ -1,106 +0,0 @@ -ENTRY(Reset_Handler) - -_minimum_stack_size = 64K; -_minimum_heap_size = 0; - -MEMORY -{ - FLASH (rx) : ORIGIN = 0x60000000, LENGTH = 8M - FLASH_BOOTLOADER (rx) : ORIGIN = 0x60000000, LENGTH = 48K - FLASH_ISR (rx) : ORIGIN = 0x6000C000, LENGTH = 1K - FLASH_TEXT (rx) : ORIGIN = 0x6000C400, LENGTH = 975K - FLASH_FATFS (r) : ORIGIN = 0x60100000, LENGTH = 7M - RAM (rwx) : ORIGIN = 0x00000000, LENGTH = 32K - OCRAM (rwx) : ORIGIN = 0x20200000, LENGTH = 64K -} - -_estack = ORIGIN(OCRAM) + LENGTH(OCRAM); -_bootloader_dbl_tap = ORIGIN(RAM) + LENGTH(RAM) - 4; - -__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS); -__fatfs_flash_length = LENGTH(FLASH_FATFS); - -__RAM_VECTOR_TABLE_SIZE_BYTES = 0; - -SECTIONS -{ - .interrupts : - { - __VECTOR_TABLE = .; - __VECTOR_RAM = .; - - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } > FLASH_ISR - - .text : - { - . = ALIGN(4); - *(EXCLUDE_FILE( - *flexspi_nor_flash_ops.o - *fsl_flexspi.o - ) .text*) /* .text* sections (code) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - . = ALIGN(4); - } > FLASH_TEXT - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - __etext = .; /* define a global symbol at end of code */ - } > FLASH_TEXT - - /* used by the startup to initialize data */ - _sidata = .; - - .data : AT (_sidata) - { - . = ALIGN(4); - __data_start__ = .; /* create a global symbol at data start */ - - *(.data*) /* .data* sections */ - *flexspi_nor_flash_ops.o(.text*) - *fsl_flexspi.o(.text*) - . = ALIGN(4); - - __data_end__ = .; /* define a global symbol at data end */ - } > RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - __bss_start__ = .; - - *(.bss*) - *(COMMON) - - . = ALIGN(4); - __bss_end__ = .; - PROVIDE(end = .); - } > RAM - - .heap : - { - . = ALIGN(8); - _heap_start = .; /* define a global symbol at heap start */ - - . += _minimum_heap_size; - - __HeapLimit = .; - } > OCRAM - - .stack : - { - . = ALIGN(8); - . += _minimum_stack_size; - } > OCRAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} - -ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data") -ASSERT(_estack - _minimum_stack_size >= __HeapLimit, "region OCRAM overflowed with stack and heap") diff --git a/ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld b/ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld deleted file mode 100644 index f1b0d8554..000000000 --- a/ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld +++ /dev/null @@ -1,123 +0,0 @@ -ENTRY(Reset_Handler) - -_minimum_stack_size = 64K; -_minimum_heap_size = 0; - -MEMORY -{ - FLASH (rx) : ORIGIN = 0x60000000, LENGTH = 8M - FLASH_CONFIG (rx) : ORIGIN = 0x60000400, LENGTH = 3K - FLASH_IVT (rx) : ORIGIN = 0x60001000, LENGTH = 4K - FLASH_ISR (rx) : ORIGIN = 0x60002000, LENGTH = 1K - FLASH_TEXT (rx) : ORIGIN = 0x60002400, LENGTH = 1015K - FLASH_FATFS (r) : ORIGIN = 0x60100000, LENGTH = 7M - RAM (rwx) : ORIGIN = 0x00000000, LENGTH = 32K - OCRAM (rwx) : ORIGIN = 0x20200000, LENGTH = 64K -} - -_estack = ORIGIN(OCRAM) + LENGTH(OCRAM); -_bootloader_dbl_tap = 0; - -__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS); -__fatfs_flash_length = LENGTH(FLASH_FATFS); - -__RAM_VECTOR_TABLE_SIZE_BYTES = 0; - -SECTIONS -{ - .flash_config : - { - . = ALIGN(4); - KEEP(* (.boot_hdr.conf)) - . = ALIGN(4); - } > FLASH_CONFIG - - .ivt : - { - . = ALIGN(4); - KEEP(* (.boot_hdr.ivt)) - KEEP(* (.boot_hdr.boot_data)) - KEEP(* (.boot_hdr.dcd_data)) - . = ALIGN(4); - } > FLASH_IVT - - .interrupts : - { - __VECTOR_TABLE = .; - __VECTOR_RAM = .; - - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } > FLASH_ISR - - .text : - { - . = ALIGN(4); - *(EXCLUDE_FILE( - *flexspi_nor_flash_ops.o - *fsl_flexspi.o - ) .text*) /* .text* sections (code) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - . = ALIGN(4); - } > FLASH_TEXT - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - __etext = .; /* define a global symbol at end of code */ - } > FLASH_TEXT - - /* used by the startup to initialize data */ - _sidata = .; - - .data : AT (_sidata) - { - . = ALIGN(4); - __data_start__ = .; /* create a global symbol at data start */ - - *(.data*) /* .data* sections */ - *flexspi_nor_flash_ops.o(.text*) - *fsl_flexspi.o(.text*) - . = ALIGN(4); - - __data_end__ = .; /* define a global symbol at data end */ - } > RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - __bss_start__ = .; - - *(.bss*) - *(COMMON) - - . = ALIGN(4); - __bss_end__ = .; - PROVIDE(end = .); - } > RAM - - .heap : - { - . = ALIGN(8); - _heap_start = .; /* define a global symbol at heap start */ - - . += _minimum_heap_size; - - __HeapLimit = .; - } > OCRAM - - .stack : - { - . = ALIGN(8); - . += _minimum_stack_size; - } > OCRAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} - -ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data") -ASSERT(_estack - _minimum_stack_size >= __HeapLimit, "region OCRAM overflowed with stack and heap") diff --git a/ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld b/ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld deleted file mode 100644 index 16442607f..000000000 --- a/ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld +++ /dev/null @@ -1,106 +0,0 @@ -ENTRY(Reset_Handler) - -_minimum_stack_size = 64K; -_minimum_heap_size = 0; - -MEMORY -{ - FLASH (rx) : ORIGIN = 0x60000000, LENGTH = 8M - FLASH_BOOTLOADER (rx) : ORIGIN = 0x60000000, LENGTH = 48K - FLASH_ISR (rx) : ORIGIN = 0x6000C000, LENGTH = 1K - FLASH_TEXT (rx) : ORIGIN = 0x6000C400, LENGTH = 975K - FLASH_FATFS (r) : ORIGIN = 0x60100000, LENGTH = 7M - RAM (rwx) : ORIGIN = 0x00000000, LENGTH = 128K - OCRAM (rwx) : ORIGIN = 0x20200000, LENGTH = 768K -} - -_estack = ORIGIN(OCRAM) + LENGTH(OCRAM); -_bootloader_dbl_tap = ORIGIN(RAM) + LENGTH(RAM) - 4; - -__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS); -__fatfs_flash_length = LENGTH(FLASH_FATFS); - -__RAM_VECTOR_TABLE_SIZE_BYTES = 0; - -SECTIONS -{ - .interrupts : - { - __VECTOR_TABLE = .; - __VECTOR_RAM = .; - - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } > FLASH_ISR - - .text : - { - . = ALIGN(4); - *(EXCLUDE_FILE( - *flexspi_nor_flash_ops.o - *fsl_flexspi.o - ) .text*) /* .text* sections (code) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - . = ALIGN(4); - } > FLASH_TEXT - - .ARM.exidx : - { - *(.ARM.exidx*) - *(.gnu.linkonce.armexidx.*) - _etext = .; /* define a global symbol at end of code */ - __etext = .; /* define a global symbol at end of code */ - } > FLASH_TEXT - - /* used by the startup to initialize data */ - _sidata = .; - - .data : AT (_sidata) - { - . = ALIGN(4); - __data_start__ = .; /* create a global symbol at data start */ - - *(.data*) /* .data* sections */ - *flexspi_nor_flash_ops.o(.text*) - *fsl_flexspi.o(.text*) - . = ALIGN(4); - - __data_end__ = .; /* define a global symbol at data end */ - } > RAM - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - __bss_start__ = .; - - *(.bss*) - *(COMMON) - - . = ALIGN(4); - __bss_end__ = .; - PROVIDE(end = .); - } > RAM - - .heap : - { - . = ALIGN(8); - _heap_start = .; /* define a global symbol at heap start */ - - . += _minimum_heap_size; - - __HeapLimit = .; - } > OCRAM - - .stack : - { - . = ALIGN(8); - . += _minimum_stack_size; - } > OCRAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} - -ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data") -ASSERT(_estack - _minimum_stack_size >= __HeapLimit, "region OCRAM overflowed with stack and heap") diff --git a/ports/mimxrt10xx/boards/teensy40/board.c b/ports/mimxrt10xx/boards/teensy40/board.c new file mode 100644 index 000000000..52dd498b3 --- /dev/null +++ b/ports/mimxrt10xx/boards/teensy40/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/teensy40/board.ld b/ports/mimxrt10xx/boards/teensy40/board.ld new file mode 100644 index 000000000..8f19810a3 --- /dev/null +++ b/ports/mimxrt10xx/boards/teensy40/board.ld @@ -0,0 +1 @@ +_ld_reserved_flash_size = 4K; diff --git a/ports/mimxrt10xx/boards/teensy40/flash_config.c b/ports/mimxrt10xx/boards/teensy40/flash_config.c new file mode 100644 index 000000000..a0661280b --- /dev/null +++ b/ports/mimxrt10xx/boards/teensy40/flash_config.c @@ -0,0 +1,141 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + +/* Component ID definition, used by tools. */ +#ifndef FSL_COMPONENT_ID +#define FSL_COMPONENT_ID "platform.drivers.xip_device" +#endif + +#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1) +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) + __attribute__((section(".boot_hdr.ivt"))) +#elif defined(__ICCARM__) +#pragma location=".boot_hdr.ivt" +#endif +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) + __attribute__((section(".boot_hdr.boot_data"))) +#elif defined(__ICCARM__) +#pragma location=".boot_hdr.boot_data" +#endif +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; +#endif + +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) +__attribute__((section(".boot_hdr.conf"))) +#elif defined(__ICCARM__) +#pragma location = ".boot_hdr.conf" +#endif + +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = 0x00200000, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/teensy40/mpconfigboard.h b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.h new file mode 100644 index 000000000..718d9b967 --- /dev/null +++ b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.h @@ -0,0 +1,18 @@ +#define MICROPY_HW_BOARD_NAME "Teensy 4.0" +#define MICROPY_HW_MCU_NAME "IMXRT1062DVJ6A" + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (2 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_AD_B1_00) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_AD_B1_01) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_B0_03) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_B0_02) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_B0_01) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_B0_03) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_B0_02) diff --git a/ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk new file mode 100644 index 000000000..5913f9c9c --- /dev/null +++ b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x8888 +USB_PRODUCT = "Teensy 4.0" +USB_MANUFACTURER = "PJRC" + +CHIP_VARIANT = MIMXRT1062DVJ6A +CHIP_FAMILY = MIMXRT1062 +FLASH = W25Q16JV diff --git a/ports/mimxrt10xx/boards/teensy40/pins.c b/ports/mimxrt10xx/boards/teensy40/pins.c new file mode 100644 index 000000000..9066ce0d2 --- /dev/null +++ b/ports/mimxrt10xx/boards/teensy40/pins.c @@ -0,0 +1,87 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + // With USB on left. Bottom edge. + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_AD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_GPIO_AD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_EMC_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_EMC_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_EMC_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_EMC_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_B0_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_B1_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_B0_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_B0_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_B0_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_B0_01) }, + + // Top edge + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B1_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B1_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA0), MP_ROM_PTR(&pin_GPIO_AD_B1_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL0), MP_ROM_PTR(&pin_GPIO_AD_B1_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO_AD_B1_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO_AD_B1_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO_AD_B1_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO_AD_B1_09) }, + + // Back side + { MP_OBJ_NEW_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_GPIO_AD_B0_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_GPIO_AD_B0_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A13), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_GPIO_EMC_32) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D29), MP_ROM_PTR(&pin_GPIO_EMC_31) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_GPIO_EMC_37) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_GPIO_EMC_36) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D32), MP_ROM_PTR(&pin_GPIO_B0_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_GPIO_EMC_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D34), MP_ROM_PTR(&pin_GPIO_SD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_DAT1), MP_ROM_PTR(&pin_GPIO_SD_B0_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_DAT0), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CLK), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CMD), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D38), MP_ROM_PTR(&pin_GPIO_SD_B0_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_DAT3), MP_ROM_PTR(&pin_GPIO_SD_B0_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D39), MP_ROM_PTR(&pin_GPIO_SD_B0_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_DAT2), MP_ROM_PTR(&pin_GPIO_SD_B0_05) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/common-hal/microcontroller/__init__.c b/ports/mimxrt10xx/common-hal/microcontroller/__init__.c index 68de3a890..a9f4c740f 100644 --- a/ports/mimxrt10xx/common-hal/microcontroller/__init__.c +++ b/ports/mimxrt10xx/common-hal/microcontroller/__init__.c @@ -72,10 +72,10 @@ void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { } // Pretend to be the first of the two reset presses needed to enter the // bootloader. That way one reset will end in the bootloader. - _bootloader_dbl_tap = DBL_TAP_MAGIC; + SNVS->LPGPR[0] = DBL_TAP_MAGIC; } else { // Set up the default. - _bootloader_dbl_tap = DBL_TAP_MAGIC_QUICK_BOOT; + SNVS->LPGPR[0] = DBL_TAP_MAGIC_QUICK_BOOT; } if (runmode == RUNMODE_SAFE_MODE) { safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE); @@ -229,6 +229,7 @@ STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_13), MP_ROM_PTR(&pin_GPIO_AD_B1_13) }, { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_14), MP_ROM_PTR(&pin_GPIO_AD_B1_14) }, { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_15), MP_ROM_PTR(&pin_GPIO_AD_B1_15) }, + #ifdef MIMXRT1062_SERIES { MP_ROM_QSTR(MP_QSTR_GPIO_B0_00), MP_ROM_PTR(&pin_GPIO_B0_00) }, { MP_ROM_QSTR(MP_QSTR_GPIO_B0_01), MP_ROM_PTR(&pin_GPIO_B0_01) }, { MP_ROM_QSTR(MP_QSTR_GPIO_B0_02), MP_ROM_PTR(&pin_GPIO_B0_02) }, @@ -261,6 +262,7 @@ STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_GPIO_B1_13), MP_ROM_PTR(&pin_GPIO_B1_13) }, { MP_ROM_QSTR(MP_QSTR_GPIO_B1_14), MP_ROM_PTR(&pin_GPIO_B1_14) }, { MP_ROM_QSTR(MP_QSTR_GPIO_B1_15), MP_ROM_PTR(&pin_GPIO_B1_15) }, + #endif { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_00), MP_ROM_PTR(&pin_GPIO_SD_B0_00) }, { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_01), MP_ROM_PTR(&pin_GPIO_SD_B0_01) }, { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_02), MP_ROM_PTR(&pin_GPIO_SD_B0_02) }, diff --git a/ports/mimxrt10xx/linking/chip_family/MIMXRT1011.ld b/ports/mimxrt10xx/linking/chip_family/MIMXRT1011.ld new file mode 100644 index 000000000..0d0beebaa --- /dev/null +++ b/ports/mimxrt10xx/linking/chip_family/MIMXRT1011.ld @@ -0,0 +1,2 @@ +ram_size = 128K; +flash_config_location = 0x60000400; diff --git a/ports/mimxrt10xx/linking/chip_family/MIMXRT1021.ld b/ports/mimxrt10xx/linking/chip_family/MIMXRT1021.ld new file mode 100644 index 000000000..21f2ea872 --- /dev/null +++ b/ports/mimxrt10xx/linking/chip_family/MIMXRT1021.ld @@ -0,0 +1,2 @@ +ram_size = 256K; +flash_config_location = 0x60000000; diff --git a/ports/mimxrt10xx/linking/chip_family/MIMXRT1062.ld b/ports/mimxrt10xx/linking/chip_family/MIMXRT1062.ld new file mode 100644 index 000000000..e07c5c2c3 --- /dev/null +++ b/ports/mimxrt10xx/linking/chip_family/MIMXRT1062.ld @@ -0,0 +1,2 @@ +ram_size = 1M; +flash_config_location = 0x60000000; diff --git a/ports/mimxrt10xx/linking/common.ld b/ports/mimxrt10xx/linking/common.ld new file mode 100644 index 000000000..5cead9ed0 --- /dev/null +++ b/ports/mimxrt10xx/linking/common.ld @@ -0,0 +1,158 @@ +/* Template for iMX RT 10xx linking. This is the last of four linker scripts passed in. + +The first three provide variables for this one. + +Boards can setup reserved flash with _ld_reserved_flash_size in board.ld. */ + +ENTRY(Reset_Handler) + +code_size = 1M; +_ld_default_stack_size = 20K; + +/* Default reserved flash to nothing. */ +_ld_reserved_flash_size = DEFINED(_ld_reserved_flash_size) ? _ld_reserved_flash_size : 0K ; + +MEMORY +{ + /* These next two sections are included in place of a bootloader. If a UF2 is used to load, it + will ignore these two sections because it lives there. */ + /* This is the first block and is read so that the bootrom knows the optimal way to interface with the flash chip. */ + FLASH_CONFIG (rx) : ORIGIN = flash_config_location, LENGTH = 512 + /* This can't move because the bootrom looks at this address. */ + FLASH_IVT (rx) : ORIGIN = 0x60001000, LENGTH = 4K + /* Place the ISRs 48k in to leave room for the bootloader when it is available. */ + FLASH_TEXT (rx) : ORIGIN = 0x6000C000, LENGTH = code_size - 48K + FLASH_FATFS (r) : ORIGIN = 0x60100000, LENGTH = _ld_flash_size - code_size - _ld_reserved_flash_size + /* Teensy uses the last bit of flash for recovery. */ + RESERVED_FLASH : ORIGIN = 0x60100000 + _ld_flash_size - _ld_reserved_flash_size, LENGTH = _ld_reserved_flash_size + OCRAM (rwx) : ORIGIN = 0x20200000, LENGTH = ram_size - 64K + DTCM (x) : ORIGIN = 0x20000000, LENGTH = 32K + ITCM (x) : ORIGIN = 0x00000000, LENGTH = 32K +} + +__RAM_VECTOR_TABLE_SIZE_BYTES = 0; + +SECTIONS +{ + .flash_config : + { + . = ALIGN(4); + KEEP(* (.boot_hdr.conf)) + . = ALIGN(4); + } > FLASH_CONFIG + + .ivt : + { + . = ALIGN(4); + KEEP(* (.boot_hdr.ivt)) + KEEP(* (.boot_hdr.boot_data)) + KEEP(* (.boot_hdr.dcd_data)) + . = ALIGN(4); + } > FLASH_IVT + image_vector_table = LOADADDR(.ivt); + + .text : + { + . = ALIGN(4); + __VECTOR_TABLE = .; + __VECTOR_RAM = .; + _ld_isr_table = .; + + KEEP(*(.isr_vector)) /* Startup code */ + *(EXCLUDE_FILE( + *flexspi_nor_flash_ops.o + *fsl_flexspi.o + ) .text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } > FLASH_TEXT + + .ARM.exidx : + { + *(.ARM.exidx*) + *(.gnu.linkonce.armexidx.*) + _etext = .; /* define a global symbol at end of code */ + __etext = .; /* define a global symbol at end of code */ + } > FLASH_TEXT + + _ld_filesystem_start = ORIGIN(FLASH_FATFS); + _ld_filesystem_end = _ld_filesystem_start + LENGTH(FLASH_FATFS); + + .data : + { + . = ALIGN(4); + _sidata = .; + __data_start__ = .; /* create a global symbol at data start */ + + *(.data*) /* .data* sections */ + *flexspi_nor_flash_ops.o(.text*) + *fsl_flexspi.o(.text*) + . = ALIGN(4); + + __data_end__ = .; /* define a global symbol at data end */ + } > OCRAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + + *(.bss*) + *(COMMON) + + . = ALIGN(4); + __bss_end__ = .; + _ld_heap_start = .; + PROVIDE(end = .); + } > OCRAM + _ld_heap_end = ORIGIN(OCRAM) + LENGTH(OCRAM); + + .itcm : + { + . = ALIGN(4); + + *(.itcm.*) + + . = ALIGN(4); + } > ITCM AT> FLASH_TEXT + _ld_itcm_destination = ADDR(.itcm); + _ld_itcm_flash_copy = LOADADDR(.itcm); + _ld_itcm_size = SIZEOF(.itcm); + + .dtcm_data : + { + . = ALIGN(4); + + *(.dtcm_data.*) + + . = ALIGN(4); + } > DTCM AT> FLASH_TEXT + _ld_dtcm_data_destination = ADDR(.dtcm_data); + _ld_dtcm_data_flash_copy = LOADADDR(.dtcm_data); + _ld_dtcm_data_size = SIZEOF(.dtcm_data); + + .dtcm_bss : + { + . = ALIGN(4); + + *(.dtcm_bss.*) + + . = ALIGN(4); + } > DTCM AT> DTCM + _ld_dtcm_bss_start = ADDR(.dtcm_bss); + _ld_dtcm_bss_end = ADDR(.dtcm_bss) + SIZEOF(.dtcm_bss); + + .stack : + { + . = ALIGN(8); + _ld_stack_bottom = .; + . += _ld_default_stack_size; + } > DTCM + _ld_stack_top = ORIGIN(DTCM) + LENGTH(DTCM); + _estack = _ld_stack_top; + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + +ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data") diff --git a/ports/mimxrt10xx/linking/flash/AT25SF128A.ld b/ports/mimxrt10xx/linking/flash/AT25SF128A.ld new file mode 100644 index 000000000..205d9dd83 --- /dev/null +++ b/ports/mimxrt10xx/linking/flash/AT25SF128A.ld @@ -0,0 +1 @@ +_ld_flash_size = 16M; diff --git a/ports/mimxrt10xx/linking/flash/IS25LP064A.ld b/ports/mimxrt10xx/linking/flash/IS25LP064A.ld new file mode 100644 index 000000000..53d296ec8 --- /dev/null +++ b/ports/mimxrt10xx/linking/flash/IS25LP064A.ld @@ -0,0 +1 @@ +_ld_flash_size = 8M; diff --git a/ports/mimxrt10xx/linking/flash/IS25WP064A.ld b/ports/mimxrt10xx/linking/flash/IS25WP064A.ld new file mode 100644 index 000000000..53d296ec8 --- /dev/null +++ b/ports/mimxrt10xx/linking/flash/IS25WP064A.ld @@ -0,0 +1 @@ +_ld_flash_size = 8M; diff --git a/ports/mimxrt10xx/linking/flash/W25Q16JV.ld b/ports/mimxrt10xx/linking/flash/W25Q16JV.ld new file mode 100644 index 000000000..9ce06b44a --- /dev/null +++ b/ports/mimxrt10xx/linking/flash/W25Q16JV.ld @@ -0,0 +1 @@ +_ld_flash_size = 2M; diff --git a/ports/mimxrt10xx/linking/flash/W25Q64JV.ld b/ports/mimxrt10xx/linking/flash/W25Q64JV.ld new file mode 100644 index 000000000..53d296ec8 --- /dev/null +++ b/ports/mimxrt10xx/linking/flash/W25Q64JV.ld @@ -0,0 +1 @@ +_ld_flash_size = 8M; diff --git a/ports/mimxrt10xx/mpconfigport.h b/ports/mimxrt10xx/mpconfigport.h index 47b793fed..745c12f7d 100644 --- a/ports/mimxrt10xx/mpconfigport.h +++ b/ports/mimxrt10xx/mpconfigport.h @@ -28,11 +28,17 @@ #ifndef __INCLUDED_MPCONFIGPORT_H #define __INCLUDED_MPCONFIGPORT_H +#include + #define MICROPY_PY_SYS_PLATFORM "NXP IMXRT10XX" #define SPI_FLASH_MAX_BAUDRATE 24000000 +extern uint8_t _ld_filesystem_start; +extern uint8_t _ld_filesystem_end; +extern uint8_t _ld_default_stack_size; + // 20kiB stack -#define CIRCUITPY_DEFAULT_STACK_SIZE 0x5000 +#define CIRCUITPY_DEFAULT_STACK_SIZE ((uint32_t) &_ld_default_stack_size) #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (0) #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) #define MICROPY_PY_FUNCTION_ATTRS (0) @@ -40,6 +46,10 @@ #define MICROPY_PY_UJSON (1) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (0) + +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR ((uint32_t) &_ld_filesystem_start) +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE ((uint32_t) (&_ld_filesystem_end - &_ld_filesystem_start)) + #include "py/circuitpy_mpconfig.h" #define MICROPY_PORT_ROOT_POINTERS \ diff --git a/ports/mimxrt10xx/mpconfigport.mk b/ports/mimxrt10xx/mpconfigport.mk index f1106e88f..b928ce3bb 100644 --- a/ports/mimxrt10xx/mpconfigport.mk +++ b/ports/mimxrt10xx/mpconfigport.mk @@ -1,6 +1,4 @@ -# Define an equivalent for MICROPY_LONGINT_IMPL, to pass to $(MPY-TOOL) in py/mkrules.mk -# $(MPY-TOOL) needs to know what kind of longint to use (if any) to freeze long integers. -# This should correspond to the MICROPY_LONGINT_IMPL definition in mpconfigport.h. +LD_FILE = $(FLASH).ld $(CHIP_FAMILY).ld imxrt10xx.ld ifeq ($(LONGINT_IMPL),NONE) MPY_TOOL_LONGINT_IMPL = -mlongint-impl=none @@ -16,5 +14,18 @@ endif INTERNAL_LIBM = 1 +USB_DEVICES = "CDC,MSC,HID" USB_SERIAL_NUMBER_LENGTH = 32 USB_MSC_MAX_PACKET_SIZE = 512 + +INTERNAL_FLASH_FILESYSTEM = 1 + +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_NVM = 0 +CIRCUITPY_ROTARYIO = 0 + +LONGINT_IMPL = MPZ diff --git a/ports/mimxrt10xx/mphalport.c b/ports/mimxrt10xx/mphalport.c index b333730b9..06275cd83 100644 --- a/ports/mimxrt10xx/mphalport.c +++ b/ports/mimxrt10xx/mphalport.c @@ -49,7 +49,7 @@ void mp_hal_delay_ms(mp_uint_t delay) { } void mp_hal_delay_us(mp_uint_t delay) { -#ifdef MIMXRT1011_SERIES +#if defined(MIMXRT1011_SERIES) || defined(MIMXRT1021_SERIES) SDK_DelayAtLeastUs(delay, SystemCoreClock); #else SDK_DelayAtLeastUs(delay); diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c new file mode 100644 index 000000000..7dc08f6dd --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c @@ -0,0 +1,371 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * Copyright (c) 2020 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +/* + * Copyright 2019 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "mpconfigport.h" + +#include "fsl_clock.h" +#include "fsl_iomuxc.h" + +// These values are pulled from the SDK's devices/MIMXRT1021/project_template/clock_config.* files. + +#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */ +#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */ + +#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 500000000U /*!< Core clock frequency: 500000000Hz */ + +/* Clock outputs (values are in Hz): */ +#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT 500000000UL +#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT 40000000UL +#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL +#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL +#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL +#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL +#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL +#define BOARD_BOOTCLOCKRUN_ENET1_TX_CLK 0UL +#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK 0UL +#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK 0UL +#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK 500000000UL +#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL +#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 132000000UL +#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 62500000UL +#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 62500000UL +#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 125000000UL +#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL +#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL +#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL +#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 62500000UL +#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL +#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL +#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL +#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 62500000UL +#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL +#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL +#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL +#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL +#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL +#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 176000000UL +#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 176000000UL + +const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = { + .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */ + .numerator = 0, /* 30 bit numerator of fractional loop divider */ + .denominator = 1, /* 30 bit denominator of fractional loop divider */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; +const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = { + .loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; +const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN = { + .enableClkOutput = false, /* Disable the PLL providing the ENET 125MHz reference clock */ + .enableClkOutput500M = true, /* Enable the PLL providing the ENET 500MHz reference clock */ + .enableClkOutput25M = false, /* Disable the PLL providing the ENET 25MHz reference clock */ + .loopDivider = 1, /* Set frequency of ethernet reference clock to 50 MHz */ + .src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */ +}; + +// Based on the hello_world example in the SDK +void clocks_init(void) { + /* Init RTC OSC clock frequency. */ + CLOCK_SetRtcXtalFreq(32768U); + /* Enable 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK; + /* Use free 1MHz clock output. */ + XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK; + /* Set XTAL 24MHz clock frequency. */ + CLOCK_SetXtalFreq(24000000U); + /* Enable XTAL 24MHz clock source. */ + CLOCK_InitExternalClk(0); + /* Enable internal RC. */ + CLOCK_InitRcOsc24M(); + /* Switch clock source to external OSC. */ + CLOCK_SwitchOsc(kCLOCK_XtalOsc); + /* Set Oscillator ready counter value. */ + CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127); + /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */ + CLOCK_SetMux(kCLOCK_PeriphMux, 1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */ + /* Setting the VDD_SOC to 1.5V. It is necessary to config AHB to 500Mhz. */ + DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12); + /* Waiting for DCDC_STS_DC_OK bit is asserted */ + while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0)) + { + } + /* Set AHB_PODF. */ + CLOCK_SetDiv(kCLOCK_AhbDiv, 0); + /* Disable IPG clock gate. */ + CLOCK_DisableClock(kCLOCK_Adc1); + CLOCK_DisableClock(kCLOCK_Adc2); + CLOCK_DisableClock(kCLOCK_Xbar1); + CLOCK_DisableClock(kCLOCK_Xbar2); + /* Set IPG_PODF. */ + CLOCK_SetDiv(kCLOCK_IpgDiv, 3); + /* Set ARM_PODF. */ + CLOCK_SetDiv(kCLOCK_ArmDiv, 0); + /* Set PERIPH_CLK2_PODF. */ + CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0); + /* Disable PERCLK clock gate. */ + CLOCK_DisableClock(kCLOCK_Gpt1); + CLOCK_DisableClock(kCLOCK_Gpt1S); + CLOCK_DisableClock(kCLOCK_Gpt2); + CLOCK_DisableClock(kCLOCK_Gpt2S); + CLOCK_DisableClock(kCLOCK_Pit); + /* Set PERCLK_PODF. */ + CLOCK_SetDiv(kCLOCK_PerclkDiv, 1); + /* Disable USDHC1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Usdhc1); + /* Set USDHC1_PODF. */ + CLOCK_SetDiv(kCLOCK_Usdhc1Div, 2); + /* Set Usdhc1 clock source. */ + CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0); + /* Disable USDHC2 clock gate. */ + CLOCK_DisableClock(kCLOCK_Usdhc2); + /* Set USDHC2_PODF. */ + CLOCK_SetDiv(kCLOCK_Usdhc2Div, 2); + /* Set Usdhc2 clock source. */ + CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0); + /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. + * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left + * unchanged. Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as + * well.*/ +#ifndef SKIP_SYSCLK_INIT + /* Disable Semc clock gate. */ + CLOCK_DisableClock(kCLOCK_Semc); + /* Set SEMC_PODF. */ + CLOCK_SetDiv(kCLOCK_SemcDiv, 7); + /* Set Semc alt clock source. */ + CLOCK_SetMux(kCLOCK_SemcAltMux, 0); + /* Set Semc clock source. */ + CLOCK_SetMux(kCLOCK_SemcMux, 0); +#endif + /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. + * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left + * unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as + * well.*/ +#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) + /* Disable Flexspi clock gate. */ + CLOCK_DisableClock(kCLOCK_FlexSpi); + /* Set FLEXSPI_PODF. */ + CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3); + /* Set Flexspi clock source. */ + CLOCK_SetMux(kCLOCK_FlexspiMux, 2); +#endif + /* Disable LPSPI clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpspi1); + CLOCK_DisableClock(kCLOCK_Lpspi2); + CLOCK_DisableClock(kCLOCK_Lpspi3); + CLOCK_DisableClock(kCLOCK_Lpspi4); + /* Set LPSPI_PODF. */ + CLOCK_SetDiv(kCLOCK_LpspiDiv, 4); + /* Set Lpspi clock source. */ + CLOCK_SetMux(kCLOCK_LpspiMux, 2); + /* Disable TRACE clock gate. */ + CLOCK_DisableClock(kCLOCK_Trace); + /* Set TRACE_PODF. */ + CLOCK_SetDiv(kCLOCK_TraceDiv, 2); + /* Set Trace clock source. */ + CLOCK_SetMux(kCLOCK_TraceMux, 2); + /* Disable SAI1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai1); + /* Set SAI1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3); + /* Set SAI1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai1Div, 1); + /* Set Sai1 clock source. */ + CLOCK_SetMux(kCLOCK_Sai1Mux, 0); + /* Disable SAI2 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai2); + /* Set SAI2_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3); + /* Set SAI2_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai2Div, 1); + /* Set Sai2 clock source. */ + CLOCK_SetMux(kCLOCK_Sai2Mux, 0); + /* Disable SAI3 clock gate. */ + CLOCK_DisableClock(kCLOCK_Sai3); + /* Set SAI3_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3); + /* Set SAI3_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Sai3Div, 1); + /* Set Sai3 clock source. */ + CLOCK_SetMux(kCLOCK_Sai3Mux, 0); + /* Disable Lpi2c clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpi2c1); + CLOCK_DisableClock(kCLOCK_Lpi2c2); + CLOCK_DisableClock(kCLOCK_Lpi2c3); + /* Set LPI2C_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0); + /* Set Lpi2c clock source. */ + CLOCK_SetMux(kCLOCK_Lpi2cMux, 0); + /* Disable CAN clock gate. */ + CLOCK_DisableClock(kCLOCK_Can1); + CLOCK_DisableClock(kCLOCK_Can2); + CLOCK_DisableClock(kCLOCK_Can1S); + CLOCK_DisableClock(kCLOCK_Can2S); + /* Set CAN_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_CanDiv, 1); + /* Set Can clock source. */ + CLOCK_SetMux(kCLOCK_CanMux, 2); + /* Disable UART clock gate. */ + CLOCK_DisableClock(kCLOCK_Lpuart1); + CLOCK_DisableClock(kCLOCK_Lpuart2); + CLOCK_DisableClock(kCLOCK_Lpuart3); + CLOCK_DisableClock(kCLOCK_Lpuart4); + CLOCK_DisableClock(kCLOCK_Lpuart5); + CLOCK_DisableClock(kCLOCK_Lpuart6); + CLOCK_DisableClock(kCLOCK_Lpuart7); + CLOCK_DisableClock(kCLOCK_Lpuart8); + /* Set UART_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_UartDiv, 0); + /* Set Uart clock source. */ + CLOCK_SetMux(kCLOCK_UartMux, 0); + /* Disable SPDIF clock gate. */ + CLOCK_DisableClock(kCLOCK_Spdif); + /* Set SPDIF0_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1); + /* Set SPDIF0_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Spdif0Div, 7); + /* Set Spdif clock source. */ + CLOCK_SetMux(kCLOCK_SpdifMux, 3); + /* Disable Flexio1 clock gate. */ + CLOCK_DisableClock(kCLOCK_Flexio1); + /* Set FLEXIO1_CLK_PRED. */ + CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1); + /* Set FLEXIO1_CLK_PODF. */ + CLOCK_SetDiv(kCLOCK_Flexio1Div, 7); + /* Set Flexio1 clock source. */ + CLOCK_SetMux(kCLOCK_Flexio1Mux, 3); + /* Set Pll3 sw clock source. */ + CLOCK_SetMux(kCLOCK_Pll3SwMux, 0); + /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd. + * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left + * unchanged. Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as + * well.*/ +#ifndef SKIP_SYSCLK_INIT +#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1) + #warning "SKIP_SYSCLK_INIT should be defined to keep system pll (selected to be SEMC source clock in SDK projects) unchanged." +#endif + /* Init System PLL. */ + CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN); + /* Init System pfd0. */ + CLOCK_InitSysPfd(kCLOCK_Pfd0, 27); + /* Init System pfd1. */ + CLOCK_InitSysPfd(kCLOCK_Pfd1, 16); + /* Init System pfd2. */ + CLOCK_InitSysPfd(kCLOCK_Pfd2, 18); + /* Init System pfd3. */ + CLOCK_InitSysPfd(kCLOCK_Pfd3, 18); +#endif + /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. + * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left + * unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as + * well.*/ +#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) + /* Init Usb1 PLL. */ + CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN); + /* Init Usb1 pfd0. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22); + /* Init Usb1 pfd1. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16); + /* Init Usb1 pfd2. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17); + /* Init Usb1 pfd3. */ + CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18); + /* Disable Usb1 PLL output for USBPHY1. */ + CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK; +#endif + /* DeInit Audio PLL. */ + CLOCK_DeinitAudioPll(); + /* Bypass Audio PLL. */ + CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1); + /* Set divider for Audio PLL. */ + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK; + CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK; + /* Enable Audio PLL output. */ + CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK; + /* Init Enet PLL. */ + CLOCK_InitEnetPll(&enetPllConfig_BOARD_BootClockRUN); + /* Set preperiph clock source. */ + CLOCK_SetMux(kCLOCK_PrePeriphMux, 3); + /* Set periph clock source. */ + CLOCK_SetMux(kCLOCK_PeriphMux, 0); + /* Set periph clock2 clock source. */ + CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0); + /* Set per clock source. */ + CLOCK_SetMux(kCLOCK_PerclkMux, 0); + /* Set clock out1 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0); + /* Set clock out1 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1); + /* Set clock out2 divider. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0); + /* Set clock out2 source. */ + CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(3); + /* Set clock out1 drives clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK; + /* Disable clock out1. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK; + /* Disable clock out2. */ + CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK; + /* Set SAI1 MCLK1 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0); + /* Set SAI1 MCLK2 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0); + /* Set SAI1 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0); + /* Set SAI2 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0); + /* Set SAI3 MCLK3 clock source. */ + IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0); + /* Set MQS configuration. */ + IOMUXC_MQSConfig(IOMUXC_GPR, kIOMUXC_MqsPwmOverSampleRate32, 0); + /* Set ENET Tx clock source. */ + IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1RefClkMode, false); + /* Set GPT1 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK; + /* Set GPT2 High frequency reference clock source. */ + IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK; + /* Set SystemCoreClock variable. */ + SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; + + CLOCK_EnableClock(kCLOCK_Iomuxc); +} diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c new file mode 100644 index 000000000..39e4f0131 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c @@ -0,0 +1,218 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * Copyright (c) 2020 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/periph.h" + +LPI2C_Type *mcu_i2c_banks[] = { LPI2C1, LPI2C2, LPI2C3, LPI2C4 }; + +const mcu_periph_obj_t mcu_i2c_sda_list[8] = { + PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_B1_15), + PERIPH_PIN(1, 6, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 1, &pin_GPIO_EMC_03), + + PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_B1_09), + PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 1, &pin_GPIO_EMC_18), + + PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_B0_09), + PERIPH_PIN(3, 4, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 1, &pin_GPIO_SD_B0_01), + + PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 0, &pin_GPIO_EMC_10), + PERIPH_PIN(4, 3, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 1, &pin_GPIO_SD_B1_03), +}; + +const mcu_periph_obj_t mcu_i2c_scl_list[8] = { + PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_B1_14), + PERIPH_PIN(1, 6, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 1, &pin_GPIO_EMC_02), + + PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_B1_08), + PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 1, &pin_GPIO_EMC_19), + + PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_B0_08), + PERIPH_PIN(3, 4, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_B0_00), + + PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 0, &pin_GPIO_EMC_11), + PERIPH_PIN(4, 3, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_B1_02), +}; + +LPSPI_Type *mcu_spi_banks[] = { LPSPI1, LPSPI2, LPSPI3, LPSPI4 }; + +const mcu_periph_obj_t mcu_spi_sck_list[8] = { + PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B0_10), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 1, &pin_GPIO_SD_B0_02), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_EMC_00), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_EMC_10), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 2, &pin_GPIO_SD_B1_07), + + PERIPH_PIN(3, 2, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B1_12), + + PERIPH_PIN(4, 2, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B1_02), + PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_EMC_32), +}; + +const mcu_periph_obj_t mcu_spi_mosi_list[8] = { + PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B0_13), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 1, &pin_GPIO_SD_B0_05), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_EMC_03), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_EMC_13), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 2, &pin_GPIO_SD_B1_09), + + PERIPH_PIN(3, 2, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B1_15), + + PERIPH_PIN(4, 2, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B1_05), + PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_EMC_35), +}; + +const mcu_periph_obj_t mcu_spi_miso_list[8] = { + PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B0_12), + PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 1, &pin_GPIO_SD_B0_04), + + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_EMC_02), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_12), + PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 2, &pin_GPIO_SD_B1_08), + + PERIPH_PIN(3, 2, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B1_14), + + PERIPH_PIN(4, 2, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B1_04), + PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_34), +}; + +LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 }; + +const mcu_periph_obj_t mcu_uart_rx_list[16] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_07), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_23), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_09), + + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_07), + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_15), + + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_03), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_33), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 2, &pin_GPIO_AD_B1_11), + + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_39), + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_11), + + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_13), + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_01), + + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_35), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_SD_B0_05), + + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_27), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_03), +}; + +const mcu_periph_obj_t mcu_uart_tx_list[16] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_06), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_22), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_08), + + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_06), + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_14), + + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_02), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_32), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 2, &pin_GPIO_AD_B1_10), + + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_38), + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_10), + + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_12), + PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_00), + + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_34), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 1, &pin_GPIO_SD_B0_04), + + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_26), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_02), +}; + +const mcu_pwm_obj_t mcu_pwm_list[39] = { + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_26), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_AD_B1_06), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_24), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_AD_B1_08), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_22), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_AD_B1_10), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_20), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 6, &pin_GPIO_AD_B1_12), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_27), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_AD_B1_07), + + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_25), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_AD_B1_09), + + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_23), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_AD_B1_11), + + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_21), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 6, &pin_GPIO_AD_B1_13), + + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 7, &pin_GPIO_EMC_28), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 7, &pin_GPIO_EMC_29), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 7, &pin_GPIO_EMC_30), + + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_38), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 4, &pin_GPIO_AD_B0_14), + + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_36), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 4, &pin_GPIO_AD_B0_12), + + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_30), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 4, &pin_GPIO_AD_B0_10), + + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_28), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 4, &pin_GPIO_AD_B0_06), + + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_39), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 4, &pin_GPIO_AD_B0_15), + + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_37), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 4, &pin_GPIO_AD_B0_13), + + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_31), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 4, &pin_GPIO_AD_B0_11), + + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_29), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 4, &pin_GPIO_AD_B0_07), + + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmX, 6, &pin_GPIO_EMC_10), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmX, 6, &pin_GPIO_EMC_11), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmX, 6, &pin_GPIO_EMC_12), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmX, 6, &pin_GPIO_EMC_13), +}; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h new file mode 100644 index 000000000..1d720f633 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * Copyright (c) 2020 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PERIPH_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PERIPH_H + +extern const mcu_periph_obj_t mcu_i2c_sda_list[8]; +extern const mcu_periph_obj_t mcu_i2c_scl_list[8]; + +extern const mcu_periph_obj_t mcu_spi_sck_list[8]; +extern const mcu_periph_obj_t mcu_spi_mosi_list[8]; +extern const mcu_periph_obj_t mcu_spi_miso_list[8]; + +extern const mcu_periph_obj_t mcu_uart_rx_list[16]; +extern const mcu_periph_obj_t mcu_uart_tx_list[16]; + +extern const mcu_pwm_obj_t mcu_pwm_list[39]; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PERIP_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.c new file mode 100644 index 000000000..4106c9bad --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.c @@ -0,0 +1,128 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "mimxrt10xx/pins.h" + +const mcu_pin_obj_t pin_GPIO_AD_B0_00 = PIN(GPIO1, 0, GPIO_AD_B0_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_01 = PIN(GPIO1, 1, GPIO_AD_B0_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_02 = PIN(GPIO1, 2, GPIO_AD_B0_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_03 = PIN(GPIO1, 3, GPIO_AD_B0_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_04 = PIN(GPIO1, 4, GPIO_AD_B0_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_05 = PIN(GPIO1, 5, GPIO_AD_B0_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_06 = PIN(GPIO1, 6, GPIO_AD_B0_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_07 = PIN(GPIO1, 7, GPIO_AD_B0_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_08 = PIN(GPIO1, 8, GPIO_AD_B0_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_09 = PIN(GPIO1, 9, GPIO_AD_B0_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_10 = PIN(GPIO1, 10, GPIO_AD_B0_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_11 = PIN(GPIO1, 11, GPIO_AD_B0_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_12 = PIN(GPIO1, 12, GPIO_AD_B0_12, ADC1, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_13 = PIN(GPIO1, 13, GPIO_AD_B0_13, ADC2, 0); +const mcu_pin_obj_t pin_GPIO_AD_B0_14 = PIN(GPIO1, 14, GPIO_AD_B0_14, ADC2, 1); +const mcu_pin_obj_t pin_GPIO_AD_B0_15 = PIN(GPIO1, 15, GPIO_AD_B0_15, ADC1, 2); + +const mcu_pin_obj_t pin_GPIO_AD_B1_00 = PIN(GPIO1, 16, GPIO_AD_B1_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_AD_B1_01 = PIN(GPIO1, 17, GPIO_AD_B1_01, ADC1, 3); +const mcu_pin_obj_t pin_GPIO_AD_B1_02 = PIN(GPIO1, 18, GPIO_AD_B1_02, ADC2, 3); +const mcu_pin_obj_t pin_GPIO_AD_B1_03 = PIN(GPIO1, 19, GPIO_AD_B1_03, ADC1, 4); +const mcu_pin_obj_t pin_GPIO_AD_B1_04 = PIN(GPIO1, 20, GPIO_AD_B1_04, ADC2, 4); +const mcu_pin_obj_t pin_GPIO_AD_B1_05 = PIN(GPIO1, 21, GPIO_AD_B1_05, ADC2, 5); +const mcu_pin_obj_t pin_GPIO_AD_B1_06 = PIN(GPIO1, 22, GPIO_AD_B1_06, ADC2, 6); +const mcu_pin_obj_t pin_GPIO_AD_B1_07 = PIN(GPIO1, 23, GPIO_AD_B1_07, ADC2, 7); +const mcu_pin_obj_t pin_GPIO_AD_B1_08 = PIN(GPIO1, 24, GPIO_AD_B1_08, ADC2, 8); +const mcu_pin_obj_t pin_GPIO_AD_B1_09 = PIN(GPIO1, 25, GPIO_AD_B1_09, ADC2, 9); +const mcu_pin_obj_t pin_GPIO_AD_B1_10 = PIN(GPIO1, 26, GPIO_AD_B1_10, ADC2, 10); +const mcu_pin_obj_t pin_GPIO_AD_B1_11 = PIN(GPIO1, 27, GPIO_AD_B1_11, ADC2, 11); +const mcu_pin_obj_t pin_GPIO_AD_B1_12 = PIN(GPIO1, 28, GPIO_AD_B1_12, ADC2, 12); +const mcu_pin_obj_t pin_GPIO_AD_B1_13 = PIN(GPIO1, 29, GPIO_AD_B1_13, ADC2, 13); +const mcu_pin_obj_t pin_GPIO_AD_B1_14 = PIN(GPIO1, 30, GPIO_AD_B1_14, ADC2, 14); +const mcu_pin_obj_t pin_GPIO_AD_B1_15 = PIN(GPIO1, 31, GPIO_AD_B1_15, ADC2, 15); + +const mcu_pin_obj_t pin_GPIO_EMC_00 = PIN(GPIO2, 0, GPIO_EMC_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_01 = PIN(GPIO2, 1, GPIO_EMC_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_02 = PIN(GPIO2, 2, GPIO_EMC_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_03 = PIN(GPIO2, 3, GPIO_EMC_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_04 = PIN(GPIO2, 4, GPIO_EMC_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_05 = PIN(GPIO2, 5, GPIO_EMC_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_06 = PIN(GPIO2, 6, GPIO_EMC_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_07 = PIN(GPIO2, 7, GPIO_EMC_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_08 = PIN(GPIO2, 8, GPIO_EMC_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_09 = PIN(GPIO2, 9, GPIO_EMC_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_10 = PIN(GPIO2, 10, GPIO_EMC_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_11 = PIN(GPIO2, 11, GPIO_EMC_11, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_12 = PIN(GPIO2, 12, GPIO_EMC_12, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_13 = PIN(GPIO2, 13, GPIO_EMC_13, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_14 = PIN(GPIO2, 14, GPIO_EMC_14, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_15 = PIN(GPIO2, 15, GPIO_EMC_15, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_16 = PIN(GPIO2, 16, GPIO_EMC_16, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_17 = PIN(GPIO2, 17, GPIO_EMC_17, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_18 = PIN(GPIO2, 18, GPIO_EMC_18, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_19 = PIN(GPIO2, 19, GPIO_EMC_19, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_20 = PIN(GPIO2, 20, GPIO_EMC_20, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_21 = PIN(GPIO2, 21, GPIO_EMC_21, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_22 = PIN(GPIO2, 22, GPIO_EMC_22, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_23 = PIN(GPIO2, 23, GPIO_EMC_23, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_24 = PIN(GPIO2, 24, GPIO_EMC_24, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_25 = PIN(GPIO2, 25, GPIO_EMC_25, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_26 = PIN(GPIO2, 26, GPIO_EMC_26, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_27 = PIN(GPIO2, 27, GPIO_EMC_27, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_28 = PIN(GPIO2, 28, GPIO_EMC_28, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_29 = PIN(GPIO2, 29, GPIO_EMC_29, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_30 = PIN(GPIO2, 30, GPIO_EMC_30, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_31 = PIN(GPIO2, 31, GPIO_EMC_31, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_32 = PIN(GPIO3, 0, GPIO_EMC_32, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_33 = PIN(GPIO3, 1, GPIO_EMC_33, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_34 = PIN(GPIO3, 2, GPIO_EMC_34, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_35 = PIN(GPIO3, 3, GPIO_EMC_35, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_36 = PIN(GPIO3, 4, GPIO_EMC_36, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_37 = PIN(GPIO3, 5, GPIO_EMC_37, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_38 = PIN(GPIO3, 6, GPIO_EMC_38, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_39 = PIN(GPIO3, 7, GPIO_EMC_39, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_40 = PIN(GPIO3, 8, GPIO_EMC_40, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_EMC_41 = PIN(GPIO3, 9, GPIO_EMC_41, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_SD_B0_00 = PIN(GPIO3, 13, GPIO_SD_B0_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_01 = PIN(GPIO3, 14, GPIO_SD_B0_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_02 = PIN(GPIO3, 15, GPIO_SD_B0_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_03 = PIN(GPIO3, 16, GPIO_SD_B0_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_04 = PIN(GPIO3, 17, GPIO_SD_B0_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_05 = PIN(GPIO3, 18, GPIO_SD_B0_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B0_06 = PIN(GPIO3, 19, GPIO_SD_B0_06, NO_ADC, 0); + +const mcu_pin_obj_t pin_GPIO_SD_B1_00 = PIN(GPIO3, 20, GPIO_SD_B1_00, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_01 = PIN(GPIO3, 21, GPIO_SD_B1_01, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_02 = PIN(GPIO3, 22, GPIO_SD_B1_02, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_03 = PIN(GPIO3, 23, GPIO_SD_B1_03, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_04 = PIN(GPIO3, 24, GPIO_SD_B1_04, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_05 = PIN(GPIO3, 25, GPIO_SD_B1_05, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_06 = PIN(GPIO3, 26, GPIO_SD_B1_06, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_07 = PIN(GPIO3, 27, GPIO_SD_B1_07, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_08 = PIN(GPIO3, 28, GPIO_SD_B1_08, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_09 = PIN(GPIO3, 29, GPIO_SD_B1_09, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_10 = PIN(GPIO3, 30, GPIO_SD_B1_10, NO_ADC, 0); +const mcu_pin_obj_t pin_GPIO_SD_B1_11 = PIN(GPIO3, 31, GPIO_SD_B1_11, NO_ADC, 0); diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.h new file mode 100644 index 000000000..a13bacfc3 --- /dev/null +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.h @@ -0,0 +1,129 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Artur Pacholec + * Copyright (c) 2020 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PINS_H +#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PINS_H + +extern const mcu_pin_obj_t pin_GPIO_AD_B0_00; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_01; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_02; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_03; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_04; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_05; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_06; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_07; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_08; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_09; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_10; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_11; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_12; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_13; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_14; +extern const mcu_pin_obj_t pin_GPIO_AD_B0_15; + +extern const mcu_pin_obj_t pin_GPIO_AD_B1_00; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_01; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_02; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_03; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_04; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_05; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_06; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_07; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_08; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_09; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_10; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_11; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_12; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_13; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_14; +extern const mcu_pin_obj_t pin_GPIO_AD_B1_15; + +extern const mcu_pin_obj_t pin_GPIO_EMC_00; +extern const mcu_pin_obj_t pin_GPIO_EMC_01; +extern const mcu_pin_obj_t pin_GPIO_EMC_02; +extern const mcu_pin_obj_t pin_GPIO_EMC_03; +extern const mcu_pin_obj_t pin_GPIO_EMC_04; +extern const mcu_pin_obj_t pin_GPIO_EMC_05; +extern const mcu_pin_obj_t pin_GPIO_EMC_06; +extern const mcu_pin_obj_t pin_GPIO_EMC_07; +extern const mcu_pin_obj_t pin_GPIO_EMC_08; +extern const mcu_pin_obj_t pin_GPIO_EMC_09; +extern const mcu_pin_obj_t pin_GPIO_EMC_10; +extern const mcu_pin_obj_t pin_GPIO_EMC_11; +extern const mcu_pin_obj_t pin_GPIO_EMC_12; +extern const mcu_pin_obj_t pin_GPIO_EMC_13; +extern const mcu_pin_obj_t pin_GPIO_EMC_14; +extern const mcu_pin_obj_t pin_GPIO_EMC_15; +extern const mcu_pin_obj_t pin_GPIO_EMC_16; +extern const mcu_pin_obj_t pin_GPIO_EMC_17; +extern const mcu_pin_obj_t pin_GPIO_EMC_18; +extern const mcu_pin_obj_t pin_GPIO_EMC_19; +extern const mcu_pin_obj_t pin_GPIO_EMC_20; +extern const mcu_pin_obj_t pin_GPIO_EMC_21; +extern const mcu_pin_obj_t pin_GPIO_EMC_22; +extern const mcu_pin_obj_t pin_GPIO_EMC_23; +extern const mcu_pin_obj_t pin_GPIO_EMC_24; +extern const mcu_pin_obj_t pin_GPIO_EMC_25; +extern const mcu_pin_obj_t pin_GPIO_EMC_26; +extern const mcu_pin_obj_t pin_GPIO_EMC_27; +extern const mcu_pin_obj_t pin_GPIO_EMC_28; +extern const mcu_pin_obj_t pin_GPIO_EMC_29; +extern const mcu_pin_obj_t pin_GPIO_EMC_30; +extern const mcu_pin_obj_t pin_GPIO_EMC_31; +extern const mcu_pin_obj_t pin_GPIO_EMC_32; +extern const mcu_pin_obj_t pin_GPIO_EMC_33; +extern const mcu_pin_obj_t pin_GPIO_EMC_34; +extern const mcu_pin_obj_t pin_GPIO_EMC_35; +extern const mcu_pin_obj_t pin_GPIO_EMC_36; +extern const mcu_pin_obj_t pin_GPIO_EMC_37; +extern const mcu_pin_obj_t pin_GPIO_EMC_38; +extern const mcu_pin_obj_t pin_GPIO_EMC_39; +extern const mcu_pin_obj_t pin_GPIO_EMC_40; +extern const mcu_pin_obj_t pin_GPIO_EMC_41; + +extern const mcu_pin_obj_t pin_GPIO_SD_B0_00; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_01; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_02; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_03; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_04; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_05; +extern const mcu_pin_obj_t pin_GPIO_SD_B0_06; + +extern const mcu_pin_obj_t pin_GPIO_SD_B1_00; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_01; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_02; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_03; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_04; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_05; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_06; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_07; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_08; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_09; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_10; +extern const mcu_pin_obj_t pin_GPIO_SD_B1_11; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PINS_H diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c index fc90e2374..3f0473a88 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c @@ -71,7 +71,7 @@ const mcu_periph_obj_t mcu_spi_sck_list[8] = { PERIPH_PIN(2, 2, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_EMC_00), PERIPH_PIN(3, 7, kIOMUXC_LPSPI3_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B0_00), - PERIPH_PIN(3, 2, kIOMUXC_LPSPI3_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B1_15), + PERIPH_PIN(3, 2, kIOMUXC_LPSPI3_SCK_SELECT_INPUT, 1, &pin_GPIO_AD_B1_15), PERIPH_PIN(4, 3, kIOMUXC_LPSPI4_SCK_SELECT_INPUT, 0, &pin_GPIO_B0_03), PERIPH_PIN(4, 1, kIOMUXC_LPSPI4_SCK_SELECT_INPUT, 1, &pin_GPIO_B1_07), diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h index 301eb0db4..9b9713bb4 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h @@ -70,6 +70,8 @@ extern LPUART_Type *mcu_uart_banks[]; #ifdef MIMXRT1011_SERIES #include "MIMXRT1011/periph.h" +#elif defined(MIMXRT1021_SERIES) +#include "MIMXRT1021/periph.h" #elif defined(MIMXRT1062_SERIES) #include "MIMXRT1062/periph.h" #endif diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h index 64a8324bd..404a411e1 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h @@ -68,6 +68,8 @@ typedef struct { #ifdef MIMXRT1011_SERIES #include "MIMXRT1011/pins.h" +#elif defined(MIMXRT1021_SERIES) +#include "MIMXRT1021/pins.h" #elif defined(MIMXRT1062_SERIES) #include "MIMXRT1062/pins.h" #endif diff --git a/ports/mimxrt10xx/reset.c b/ports/mimxrt10xx/reset.c index dc4a1dce1..a3a4f667d 100644 --- a/ports/mimxrt10xx/reset.c +++ b/ports/mimxrt10xx/reset.c @@ -35,5 +35,5 @@ void reset(void) { } bool bootloader_available(void) { - return &_bootloader_dbl_tap >= 0; + return SNVS->LPGPR[0] >= 0; } diff --git a/ports/mimxrt10xx/reset.h b/ports/mimxrt10xx/reset.h index b6dfc38cc..dc3106cf0 100644 --- a/ports/mimxrt10xx/reset.h +++ b/ports/mimxrt10xx/reset.h @@ -34,8 +34,6 @@ #define DBL_TAP_MAGIC 0xf01669ef // Randomly selected, adjusted to have first and last bit set #define DBL_TAP_MAGIC_QUICK_BOOT 0xf02669ef -extern volatile uint32_t _bootloader_dbl_tap; - void reset_to_bootloader(void); void reset(void); bool bootloader_available(void); diff --git a/ports/mimxrt10xx/sdk b/ports/mimxrt10xx/sdk index 2251c7b79..4e7438e65 160000 --- a/ports/mimxrt10xx/sdk +++ b/ports/mimxrt10xx/sdk @@ -1 +1 @@ -Subproject commit 2251c7b79343966a57a0f36d897873dd40b692b9 +Subproject commit 4e7438e654f4a6b4f386b4bb9e817d74a0fbffc7 diff --git a/ports/mimxrt10xx/supervisor/internal_flash.c b/ports/mimxrt10xx/supervisor/internal_flash.c index e15b4962e..7e9d8fa37 100644 --- a/ports/mimxrt10xx/supervisor/internal_flash.c +++ b/ports/mimxrt10xx/supervisor/internal_flash.c @@ -166,11 +166,13 @@ void supervisor_flash_init(void) { } __enable_irq(); + SCB_EnableDCache(); + init_done = true; } static inline uint32_t lba2addr(uint32_t block) { - return ((uint32_t)__fatfs_flash_start_addr) + block * FILESYSTEM_BLOCK_SIZE; + return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR + block * FILESYSTEM_BLOCK_SIZE; } uint32_t supervisor_flash_get_block_size(void) { @@ -178,7 +180,7 @@ uint32_t supervisor_flash_get_block_size(void) { } uint32_t supervisor_flash_get_block_count(void) { - return ((uint32_t) __fatfs_flash_length) / FILESYSTEM_BLOCK_SIZE; + return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE; } void supervisor_flash_flush(void) { @@ -191,20 +193,20 @@ void supervisor_flash_flush(void) { __disable_irq(); status = flexspi_nor_flash_erase_sector(FLEXSPI, sector_addr); + __enable_irq(); if (status != kStatus_Success) { printf("Page erase failure %ld!\r\n", status); return; } - __enable_irq(); for (int i = 0; i < SECTOR_SIZE / FLASH_PAGE_SIZE; ++i) { __disable_irq(); status = flexspi_nor_flash_page_program(FLEXSPI, sector_addr + i * FLASH_PAGE_SIZE, (void *)_flash_cache + i * FLASH_PAGE_SIZE); + __enable_irq(); if (status != kStatus_Success) { printf("Page program failure %ld!\r\n", status); return; } - __enable_irq(); } DCACHE_CleanInvalidateByRange(_flash_page_addr, SECTOR_SIZE); diff --git a/ports/mimxrt10xx/supervisor/port.c b/ports/mimxrt10xx/supervisor/port.c index 357307427..555b78359 100644 --- a/ports/mimxrt10xx/supervisor/port.c +++ b/ports/mimxrt10xx/supervisor/port.c @@ -3,8 +3,8 @@ * * The MIT License (MIT) * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * Copyright (c) 2017 Artur Pacholec + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2020 Artur Pacholec * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,6 +24,12 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ +/* + * Copyright 2018 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ #include "boards/board.h" #include "supervisor/port.h" @@ -54,16 +60,139 @@ #include "fsl_gpio.h" #include "fsl_lpuart.h" -void mpu_init(void) -{ - ARM_MPU_Disable(); +// Device memories must be accessed in order. +#define DEVICE 2 +// Normal memory can have accesses reorder and prefetched. +#define NORMAL 0 + +// Prevents instruction access. +#define NO_EXECUTION 1 +#define EXECUTION 0 + +// Shareable if the memory system manages coherency. +#define NOT_SHAREABLE 0 +#define SHAREABLE 1 + +// +#define NOT_CACHEABLE 0 +#define CACHEABLE 1 + +#define NOT_BUFFERABLE 0 +#define BUFFERABLE 1 + +#define NO_SUBREGIONS 0 + +extern uint32_t _ld_flash_size; + +extern uint8_t _ld_dtcm_bss_start; +extern uint8_t _ld_dtcm_bss_end; +extern uint8_t _ld_dtcm_data_destination; +extern uint8_t _ld_dtcm_data_size; +extern uint8_t _ld_dtcm_data_flash_copy; +extern uint8_t _ld_itcm_destination; +extern uint8_t _ld_itcm_size; +extern uint8_t _ld_itcm_flash_copy; + +// This is called before RAM is setup! Be very careful what you do here. +void SystemInitHook(void) { + // asm("bkpt"); + /* Disable I cache and D cache */ + if (SCB_CCR_IC_Msk == (SCB_CCR_IC_Msk & SCB->CCR)) + { + SCB_DisableICache(); + } + if (SCB_CCR_DC_Msk == (SCB_CCR_DC_Msk & SCB->CCR)) + { + SCB_DisableDCache(); + } + // Configure FlexRAM. The e is one block of ITCM (0b11) and DTCM (0b10). The rest is two OCRAM + // (0b01). We shift in zeroes for all unimplemented banks. + IOMUXC_GPR->GPR17 = (0xe5555555) >> (32 - 2 * FSL_FEATURE_FLEXRAM_INTERNAL_RAM_TOTAL_BANK_NUMBERS); + + // Switch from FlexRAM fuse config to the IOMUXC values. + IOMUXC_GPR->GPR16 |= IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL(1); + + // Let the core know the TCM sizes changed. + uint32_t current_gpr14 = IOMUXC_GPR->GPR14; + current_gpr14 &= ~IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_MASK; + current_gpr14 |= IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ(0x6); + current_gpr14 &= ~IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK; + current_gpr14 |= IOMUXC_GPR_GPR14_CM7_CFGITCMSZ(0x6); + IOMUXC_GPR->GPR14 = current_gpr14; + + /* Disable MPU */ + ARM_MPU_Disable(); + + // Copy all of the code to run from ITCM. + memcpy(&_ld_itcm_destination, &_ld_itcm_flash_copy, (size_t) &_ld_itcm_size); + + // Copy all of the data to run from DTCM. + memcpy(&_ld_dtcm_data_destination, &_ld_dtcm_data_flash_copy, (size_t) &_ld_dtcm_data_size); + + // Clear DTCM bss. + memset(&_ld_dtcm_bss_start, 0, (size_t) (&_ld_dtcm_bss_end - &_ld_dtcm_bss_start)); + + // The first number in RBAR is the region number. When searching for a policy, the region with + // the highest number wins. If none match, then the default policy set at enable applies. - SCB_EnableDCache(); - SCB_EnableICache(); + // This is an undocumented region and is likely more registers. + MPU->RBAR = ARM_MPU_RBAR(8, 0xC0000000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, DEVICE, NOT_SHAREABLE, NOT_CACHEABLE, NOT_BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_512MB); + + // This is the SEMC region where external RAM and 8+ flash would live. Disable for now, even though the EVKs have stuff here. + MPU->RBAR = ARM_MPU_RBAR(9, 0x80000000U); + MPU->RASR = ARM_MPU_RASR(NO_EXECUTION, ARM_MPU_AP_NONE, DEVICE, NOT_SHAREABLE, NOT_CACHEABLE, NOT_BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_1GB); + + // FlexSPI2 is 0x70000000 + + // This the first 1MB of flash is the bootloader and CircuitPython read-only data. + MPU->RBAR = ARM_MPU_RBAR(10, 0x60000000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_1MB); + + // The remainder of flash is the fat filesystem which could have code on it too. Make sure that + // we set the region to the minimal size so that bad data doesn't get speculatively fetched. + // Thanks to Damien for the tip! + uint32_t region_size = ARM_MPU_REGION_SIZE_32B; + uint32_t filesystem_size = &_ld_filesystem_end - &_ld_filesystem_start; + while (filesystem_size > (1u << (region_size + 1))) { + region_size += 1; + } + // Mask out as much of the remainder as we can. For example on an 8MB flash, 7MB are for the + // filesystem. The region_size here must be a power of 2 so it is 8MB. Using the subregion mask + // we can ignore 1/8th size chunks. So, we ignore the last 1MB using the subregion. + uint32_t remainder = (1u << (region_size + 1)) - filesystem_size; + uint32_t subregion_size = (1u << (region_size + 1)) / 8; + uint16_t subregion_mask = 0xff00 >> (remainder / subregion_size); + + MPU->RBAR = ARM_MPU_RBAR(11, 0x60100000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, (uint8_t) subregion_mask, region_size); + + // This the ITCM. Set it to read-only because we've loaded everything already and it's easy to + // accidentally write the wrong value to 0x00000000 (aka NULL). + MPU->RBAR = ARM_MPU_RBAR(12, 0x00000000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_RO, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_32KB); + + // This the DTCM. + MPU->RBAR = ARM_MPU_RBAR(13, 0x20000000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_32KB); + + // This is OCRAM. + MPU->RBAR = ARM_MPU_RBAR(14, 0x20200000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_512KB); + + // We steal 64k from FlexRAM for ITCM and DTCM so disable those memory regions here. + MPU->RBAR = ARM_MPU_RBAR(15, 0x20280000U); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, 0x80, ARM_MPU_REGION_SIZE_512KB); + + /* Enable MPU */ + ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk); + + /* Enable I cache and D cache */ + SCB_EnableDCache(); + SCB_EnableICache(); } safe_mode_t port_init(void) { - mpu_init(); clocks_init(); // Configure millisecond timer initialization. @@ -129,7 +258,7 @@ void reset_port(void) { } void reset_to_bootloader(void) { - _bootloader_dbl_tap = DBL_TAP_MAGIC; + SNVS->LPGPR[0] = DBL_TAP_MAGIC; reset(); } @@ -137,23 +266,64 @@ void reset_cpu(void) { reset(); } -extern uint32_t _heap_start, _estack; +extern uint32_t _ld_heap_start, _ld_heap_end, _ld_stack_top, _ld_stack_bottom; uint32_t *port_stack_get_limit(void) { - return &_heap_start; + return &_ld_heap_start; } uint32_t *port_stack_get_top(void) { - return &_estack; + return &_ld_stack_top; +} + +uint32_t *port_heap_get_bottom(void) { + return &_ld_heap_start; +} + +// Get heap top address +uint32_t *port_heap_get_top(void) { + return &_ld_heap_end; } -extern uint32_t __bss_end__; // Place the word to save just after our BSS section that gets blanked. void port_set_saved_word(uint32_t value) { - __bss_end__ = value; + SNVS->LPGPR[1] = value; } uint32_t port_get_saved_word(void) { - return __bss_end__; + return SNVS->LPGPR[1]; +} + +/** + * \brief Default interrupt handler for unused IRQs. + */ +__attribute__((used)) void MemManage_Handler(void) +{ + reset_into_safe_mode(MEM_MANAGE); + while (true) { + asm("nop;"); + } +} + +/** + * \brief Default interrupt handler for unused IRQs. + */ +__attribute__((used)) void BusFault_Handler(void) +{ + reset_into_safe_mode(MEM_MANAGE); + while (true) { + asm("nop;"); + } +} + +/** + * \brief Default interrupt handler for unused IRQs. + */ +__attribute__((used)) void UsageFault_Handler(void) +{ + reset_into_safe_mode(MEM_MANAGE); + while (true) { + asm("nop;"); + } } /** @@ -166,3 +336,4 @@ __attribute__((used)) void HardFault_Handler(void) asm("nop;"); } } + diff --git a/py/map.c b/py/map.c index 6abf4853f..57c11dbc9 100644 --- a/py/map.c +++ b/py/map.c @@ -33,6 +33,8 @@ #include "py/misc.h" #include "py/runtime.h" +#include "supervisor/linker.h" + #if MICROPY_DEBUG_VERBOSE // print debugging info #define DEBUG_PRINT (1) #else // don't print debugging info @@ -143,7 +145,7 @@ STATIC void mp_map_rehash(mp_map_t *map) { // - returns slot, with key non-null and value=MP_OBJ_NULL if it was added // MP_MAP_LOOKUP_REMOVE_IF_FOUND behaviour: // - returns NULL if not found, else the slot if was found in with key null and value non-null -mp_map_elem_t *mp_map_lookup(mp_map_t *map, mp_obj_t index, mp_map_lookup_kind_t lookup_kind) { +mp_map_elem_t *PLACE_IN_ITCM(mp_map_lookup)(mp_map_t *map, mp_obj_t index, mp_map_lookup_kind_t lookup_kind) { // If the map is a fixed array then we must only be called for a lookup assert(!map->is_fixed || lookup_kind == MP_MAP_LOOKUP); diff --git a/py/mpstate.c b/py/mpstate.c index 6ce64adfd..32f1d60a5 100644 --- a/py/mpstate.c +++ b/py/mpstate.c @@ -25,9 +25,10 @@ */ #include "py/mpstate.h" +#include "supervisor/linker.h" #if MICROPY_DYNAMIC_COMPILER mp_dynamic_compiler_t mp_dynamic_compiler = {0}; #endif -mp_state_ctx_t mp_state_ctx; +mp_state_ctx_t PLACE_IN_DTCM_BSS(mp_state_ctx); diff --git a/py/obj.c b/py/obj.c index 09e71be4d..f1e00de1a 100644 --- a/py/obj.c +++ b/py/obj.c @@ -38,6 +38,7 @@ #include "py/stackctrl.h" #include "py/stream.h" // for mp_obj_print +#include "supervisor/linker.h" #include "supervisor/shared/stack.h" #include "supervisor/shared/translate.h" @@ -128,7 +129,7 @@ void mp_obj_print_exception(const mp_print_t *print, mp_obj_t exc) { mp_print_str(print, "\n"); } -bool mp_obj_is_true(mp_obj_t arg) { +bool PLACE_IN_ITCM(mp_obj_is_true)(mp_obj_t arg) { if (arg == mp_const_false) { return 0; } else if (arg == mp_const_true) { diff --git a/py/objdict.c b/py/objdict.c index 683fcb748..3ec3cbe80 100644 --- a/py/objdict.c +++ b/py/objdict.c @@ -31,6 +31,7 @@ #include "py/builtin.h" #include "py/objtype.h" +#include "supervisor/linker.h" #include "supervisor/shared/translate.h" #define MP_OBJ_IS_DICT_TYPE(o) (MP_OBJ_IS_OBJ(o) && ((mp_obj_base_t*)MP_OBJ_TO_PTR(o))->type->make_new == dict_make_new) @@ -324,7 +325,7 @@ STATIC mp_obj_t dict_popitem(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(dict_popitem_obj, dict_popitem); -STATIC mp_obj_t dict_update(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { +STATIC mp_obj_t PLACE_IN_ITCM(dict_update)(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) { mp_check_self(MP_OBJ_IS_DICT_TYPE(args[0])); mp_obj_dict_t *self = MP_OBJ_TO_PTR(args[0]); mp_ensure_not_fixed(self); @@ -590,7 +591,7 @@ size_t mp_obj_dict_len(mp_obj_t self_in) { return self->map.used; } -mp_obj_t mp_obj_dict_store(mp_obj_t self_in, mp_obj_t key, mp_obj_t value) { +mp_obj_t PLACE_IN_ITCM(mp_obj_dict_store)(mp_obj_t self_in, mp_obj_t key, mp_obj_t value) { mp_check_self(MP_OBJ_IS_DICT_TYPE(self_in)); mp_obj_dict_t *self = MP_OBJ_TO_PTR(self_in); mp_ensure_not_fixed(self); diff --git a/py/objfun.c b/py/objfun.c index 7e5899456..c586a290a 100644 --- a/py/objfun.c +++ b/py/objfun.c @@ -34,6 +34,8 @@ #include "py/bc.h" #include "py/stackctrl.h" +#include "supervisor/linker.h" + #if MICROPY_DEBUG_VERBOSE // print debugging info #define DEBUG_PRINT (1) #else // don't print debugging info @@ -249,7 +251,7 @@ mp_code_state_t *mp_obj_fun_bc_prepare_codestate(mp_obj_t self_in, size_t n_args } #endif -STATIC mp_obj_t fun_bc_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { +STATIC mp_obj_t PLACE_IN_ITCM(fun_bc_call)(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { MP_STACK_CHECK(); DEBUG_printf("Input n_args: " UINT_FMT ", n_kw: " UINT_FMT "\n", n_args, n_kw); diff --git a/py/qstr.c b/py/qstr.c index eea57c1e0..bb8024435 100755 --- a/py/qstr.c +++ b/py/qstr.c @@ -33,6 +33,8 @@ #include "py/qstr.h" #include "py/gc.h" +#include "supervisor/linker.h" + // NOTE: we are using linear arrays to store and search for qstr's (unique strings, interned strings) // ultimately we will replace this with a static hash table of some kind // also probably need to include the length in the string data, to allow null bytes in the string @@ -248,7 +250,7 @@ qstr qstr_from_strn(const char *str, size_t len) { return q; } -mp_uint_t qstr_hash(qstr q) { +mp_uint_t PLACE_IN_ITCM(qstr_hash)(qstr q) { return Q_GET_HASH(find_qstr(q)); } diff --git a/py/runtime.c b/py/runtime.c index a786619bf..48416bab2 100644 --- a/py/runtime.c +++ b/py/runtime.c @@ -200,7 +200,7 @@ mp_obj_t mp_load_build_class(void) { return MP_OBJ_FROM_PTR(&mp_builtin___build_class___obj); } -void mp_store_name(qstr qst, mp_obj_t obj) { +void PLACE_IN_ITCM(mp_store_name)(qstr qst, mp_obj_t obj) { DEBUG_OP_printf("store name %s <- %p\n", qstr_str(qst), obj); mp_obj_dict_store(MP_OBJ_FROM_PTR(mp_locals_get()), MP_OBJ_NEW_QSTR(qst), obj); } @@ -211,7 +211,7 @@ void mp_delete_name(qstr qst) { mp_obj_dict_delete(MP_OBJ_FROM_PTR(mp_locals_get()), MP_OBJ_NEW_QSTR(qst)); } -void mp_store_global(qstr qst, mp_obj_t obj) { +void PLACE_IN_ITCM(mp_store_global)(qstr qst, mp_obj_t obj) { DEBUG_OP_printf("store global %s <- %p\n", qstr_str(qst), obj); mp_obj_dict_store(MP_OBJ_FROM_PTR(mp_globals_get()), MP_OBJ_NEW_QSTR(qst), obj); } @@ -283,7 +283,7 @@ mp_obj_t mp_unary_op(mp_unary_op_t op, mp_obj_t arg) { } } -mp_obj_t mp_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { +mp_obj_t PLACE_IN_ITCM(mp_binary_op)(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) { DEBUG_OP_printf("binary " UINT_FMT " %q %p %p\n", op, mp_binary_op_method_name[op], lhs, rhs); // TODO correctly distinguish inplace operators for mutable objects @@ -641,7 +641,7 @@ mp_obj_t mp_call_method_n_kw(size_t n_args, size_t n_kw, const mp_obj_t *args) { #if !MICROPY_STACKLESS STATIC #endif -void mp_call_prepare_args_n_kw_var(bool have_self, size_t n_args_n_kw, const mp_obj_t *args, mp_call_args_t *out_args) { +void PLACE_IN_ITCM(mp_call_prepare_args_n_kw_var)(bool have_self, size_t n_args_n_kw, const mp_obj_t *args, mp_call_args_t *out_args) { mp_obj_t fun = *args++; mp_obj_t self = MP_OBJ_NULL; if (have_self) { diff --git a/py/runtime.h b/py/runtime.h index e8398cf0e..4121352df 100644 --- a/py/runtime.h +++ b/py/runtime.h @@ -29,6 +29,8 @@ #include "py/mpstate.h" #include "py/pystack.h" +#include "supervisor/linker.h" + typedef enum { MP_VM_RETURN_NORMAL, MP_VM_RETURN_YIELD, @@ -84,10 +86,10 @@ void mp_arg_parse_all_kw_array(size_t n_pos, size_t n_kw, const mp_obj_t *args, NORETURN void mp_arg_error_terse_mismatch(void); NORETURN void mp_arg_error_unimpl_kw(void); -static inline mp_obj_dict_t *mp_locals_get(void) { return MP_STATE_THREAD(dict_locals); } -static inline void mp_locals_set(mp_obj_dict_t *d) { MP_STATE_THREAD(dict_locals) = d; } -static inline mp_obj_dict_t *mp_globals_get(void) { return MP_STATE_THREAD(dict_globals); } -static inline void mp_globals_set(mp_obj_dict_t *d) { MP_STATE_THREAD(dict_globals) = d; } +static inline mp_obj_dict_t *PLACE_IN_ITCM(mp_locals_get)(void) { return MP_STATE_THREAD(dict_locals); } +static inline void PLACE_IN_ITCM(mp_locals_set)(mp_obj_dict_t *d) { MP_STATE_THREAD(dict_locals) = d; } +static inline mp_obj_dict_t *PLACE_IN_ITCM(mp_globals_get)(void) { return MP_STATE_THREAD(dict_globals); } +static inline void PLACE_IN_ITCM(mp_globals_set)(mp_obj_dict_t *d) { MP_STATE_THREAD(dict_globals) = d; } mp_obj_t mp_load_name(qstr qst); mp_obj_t mp_load_global(qstr qst); diff --git a/py/vm.c b/py/vm.c index 353fc8810..4f0340681 100644 --- a/py/vm.c +++ b/py/vm.c @@ -35,6 +35,8 @@ #include "py/bc0.h" #include "py/bc.h" +#include "supervisor/linker.h" + #if 0 #define TRACE(ip) printf("sp=%d ", (int)(sp - &code_state->state[0] + 1)); mp_bytecode_print2(ip, 1, code_state->fun_bc->const_table); #else @@ -116,7 +118,7 @@ // MP_VM_RETURN_NORMAL, sp valid, return value in *sp // MP_VM_RETURN_YIELD, ip, sp valid, yielded value in *sp // MP_VM_RETURN_EXCEPTION, exception in fastn[0] -mp_vm_return_kind_t mp_execute_bytecode(mp_code_state_t *code_state, volatile mp_obj_t inject_exc) { +mp_vm_return_kind_t PLACE_IN_ITCM(mp_execute_bytecode)(mp_code_state_t *code_state, volatile mp_obj_t inject_exc) { #define SELECTIVE_EXC_IP (0) #if SELECTIVE_EXC_IP #define MARK_EXC_IP_SELECTIVE() { code_state->ip = ip; } /* stores ip 1 byte past last opcode */ diff --git a/py/vmentrytable.h b/py/vmentrytable.h index a0e2d4065..31a96dbec 100644 --- a/py/vmentrytable.h +++ b/py/vmentrytable.h @@ -29,7 +29,9 @@ #pragma clang diagnostic ignored "-Winitializer-overrides" #endif // __clang__ -static const void *const entry_table[256] = { +#include "supervisor/linker.h" + +static const void *const PLACE_IN_DTCM_DATA(entry_table[256]) = { [0 ... 255] = &&entry_default, [MP_BC_LOAD_CONST_FALSE] = &&entry_MP_BC_LOAD_CONST_FALSE, [MP_BC_LOAD_CONST_NONE] = &&entry_MP_BC_LOAD_CONST_NONE, diff --git a/supervisor/linker.h b/supervisor/linker.h new file mode 100755 index 000000000..b58414433 --- /dev/null +++ b/supervisor/linker.h @@ -0,0 +1,42 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// These macros are used to place code and data into different linking sections. + +#ifndef MICROPY_INCLUDED_SUPERVISOR_LINKER_H +#define MICROPY_INCLUDED_SUPERVISOR_LINKER_H + +#if defined(IMXRT10XX) +#define PLACE_IN_DTCM_DATA(name) name __attribute__((section(".dtcm_data." #name ))) +#define PLACE_IN_DTCM_BSS(name) name __attribute__((section(".dtcm_bss." #name ))) +#define PLACE_IN_ITCM(name) __attribute__((section(".itcm." #name ))) name +#else +#define PLACE_IN_DTCM_DATA(name) name +#define PLACE_IN_DTCM_BSS(name) name +#define PLACE_IN_ITCM(name) name +#endif + +#endif // MICROPY_INCLUDED_SUPERVISOR_LINKER_H diff --git a/supervisor/port.h b/supervisor/port.h index c8a011978..b289583dd 100644 --- a/supervisor/port.h +++ b/supervisor/port.h @@ -60,6 +60,12 @@ uint32_t *port_stack_get_limit(void); // Get stack top address uint32_t *port_stack_get_top(void); +// Get heap bottom address +uint32_t *port_heap_get_bottom(void); + +// Get heap top address +uint32_t *port_heap_get_top(void); + // Save and retrieve a word from memory that is preserved over reset. Used for safe mode. void port_set_saved_word(uint32_t); uint32_t port_get_saved_word(void); diff --git a/supervisor/shared/filesystem.c b/supervisor/shared/filesystem.c index 92727f6fb..3b799619f 100644 --- a/supervisor/shared/filesystem.c +++ b/supervisor/shared/filesystem.c @@ -75,7 +75,7 @@ static void make_sample_code_file(FATFS *fatfs) { FIL fs; UINT char_written = 0; const byte buffer[] = "print('Hello World!')\n"; - //Create or modify existing code.py file + //Create or modify existing code.py file f_open(fatfs, &fs, "/code.py", FA_WRITE | FA_CREATE_ALWAYS); f_write(&fs, buffer, sizeof(buffer) - 1, &char_written); f_close(&fs); diff --git a/supervisor/shared/memory.c b/supervisor/shared/memory.c index 38040d11d..14c3b4979 100755 --- a/supervisor/shared/memory.c +++ b/supervisor/shared/memory.c @@ -39,11 +39,14 @@ uint32_t* low_address; uint32_t* high_address; void memory_init(void) { - low_address = port_stack_get_limit(); - high_address = port_stack_get_top(); + low_address = port_heap_get_bottom(); + high_address = port_heap_get_top(); } void free_memory(supervisor_allocation* allocation) { + if (allocation == NULL) { + return; + } int32_t index = 0; bool found = false; for (index = 0; index < CIRCUITPY_SUPERVISOR_ALLOC_COUNT; index++) { diff --git a/supervisor/shared/safe_mode.c b/supervisor/shared/safe_mode.c index aba31e9c9..c957aee53 100644 --- a/supervisor/shared/safe_mode.c +++ b/supervisor/shared/safe_mode.c @@ -157,6 +157,9 @@ void print_safe_mode_message(safe_mode_t reason) { case FLASH_WRITE_FAIL: serial_write_compressed(translate("Failed to write internal flash.")); break; + case MEM_MANAGE: + serial_write_compressed(translate("Invalid memory access.")); + break; default: serial_write_compressed(translate("Unknown reason.")); break; diff --git a/supervisor/shared/safe_mode.h b/supervisor/shared/safe_mode.h index e05fca0e4..5b09c4b54 100644 --- a/supervisor/shared/safe_mode.h +++ b/supervisor/shared/safe_mode.h @@ -40,6 +40,7 @@ typedef enum { PROGRAMMATIC_SAFE_MODE, NORDIC_SOFT_DEVICE_ASSERT, FLASH_WRITE_FAIL, + MEM_MANAGE, } safe_mode_t; safe_mode_t wait_for_safe_mode_reset(void); diff --git a/supervisor/shared/stack.c b/supervisor/shared/stack.c index dcecf2067..2b7b1c03a 100755 --- a/supervisor/shared/stack.c +++ b/supervisor/shared/stack.c @@ -46,6 +46,10 @@ void allocate_stack(void) { mp_uint_t c_size = (uint32_t) port_stack_get_top() - sp; + if (port_stack_get_top() != port_heap_get_top()) { + return; + } + stack_alloc = allocate_memory(c_size + next_stack_size + EXCEPTION_STACK_SIZE, true); if (stack_alloc == NULL) { stack_alloc = allocate_memory(c_size + CIRCUITPY_DEFAULT_STACK_SIZE + EXCEPTION_STACK_SIZE, true); @@ -71,6 +75,9 @@ void stack_init(void) { } void stack_resize(void) { + if (stack_alloc == NULL) { + return; + } if (next_stack_size == current_stack_size) { *stack_alloc->ptr = STACK_CANARY_VALUE; return; diff --git a/supervisor/shared/tick.c b/supervisor/shared/tick.c index 69256081c..5668f8fa1 100644 --- a/supervisor/shared/tick.c +++ b/supervisor/shared/tick.c @@ -25,11 +25,13 @@ */ #include "supervisor/shared/tick.h" + +#include "supervisor/linker.h" #include "supervisor/filesystem.h" #include "supervisor/shared/autoreload.h" -static volatile uint64_t ticks_ms; -static volatile uint32_t background_ticks_ms32; +static volatile uint64_t PLACE_IN_DTCM_BSS(ticks_ms); +static volatile uint32_t PLACE_IN_DTCM_BSS(background_ticks_ms32); #if CIRCUITPY_GAMEPAD #include "shared-module/gamepad/__init__.h" @@ -77,7 +79,7 @@ uint32_t supervisor_ticks_ms32() { extern void run_background_tasks(void); -void supervisor_run_background_tasks_if_tick() { +void PLACE_IN_ITCM(supervisor_run_background_tasks_if_tick)() { uint32_t now32 = ticks_ms; if (now32 == background_ticks_ms32) { diff --git a/tools/build_board_info.py b/tools/build_board_info.py index d583fc63f..1f074dddf 100644 --- a/tools/build_board_info.py +++ b/tools/build_board_info.py @@ -18,6 +18,7 @@ BIN = ('bin',) UF2 = ('uf2',) BIN_UF2 = ('bin', 'uf2') HEX = ('hex',) +HEX_UF2 = ('hex', 'uf2') SPK = ('spk',) # Default extensions @@ -26,7 +27,7 @@ extension_by_port = { "atmel-samd": UF2, "stm32f4": BIN, "cxd56": SPK, - "mimxrt10xx": UF2, + "mimxrt10xx": HEX_UF2, } # Per board overrides -- cgit v1.2.3 From 9f4ea2122a346040d3a82b90e8eaaf63f44b23ce Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Fri, 17 Jan 2020 18:35:09 -0800 Subject: teensy fixes --- ports/mimxrt10xx/boards/teensy40/flash_config.c | 2 +- ports/mimxrt10xx/supervisor/port.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/mimxrt10xx/boards/teensy40/flash_config.c b/ports/mimxrt10xx/boards/teensy40/flash_config.c index a0661280b..c281d4541 100644 --- a/ports/mimxrt10xx/boards/teensy40/flash_config.c +++ b/ports/mimxrt10xx/boards/teensy40/flash_config.c @@ -68,7 +68,7 @@ const flexspi_nor_config_t qspiflash_config = { .deviceType = kFlexSpiDeviceType_SerialNOR, .sflashPadType = kSerialFlash_4Pads, .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 - .sflashA1Size = 0x00200000, + .sflashA1Size = FLASH_SIZE, .lookupTable = { // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) diff --git a/ports/mimxrt10xx/supervisor/port.c b/ports/mimxrt10xx/supervisor/port.c index 555b78359..e141bc6b8 100644 --- a/ports/mimxrt10xx/supervisor/port.c +++ b/ports/mimxrt10xx/supervisor/port.c @@ -162,10 +162,10 @@ void SystemInitHook(void) { // we can ignore 1/8th size chunks. So, we ignore the last 1MB using the subregion. uint32_t remainder = (1u << (region_size + 1)) - filesystem_size; uint32_t subregion_size = (1u << (region_size + 1)) / 8; - uint16_t subregion_mask = 0xff00 >> (remainder / subregion_size); + uint8_t subregion_mask = (0xff00 >> (remainder / subregion_size)) & 0xff; MPU->RBAR = ARM_MPU_RBAR(11, 0x60100000U); - MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, (uint8_t) subregion_mask, region_size); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, subregion_mask, region_size); // This the ITCM. Set it to read-only because we've loaded everything already and it's easy to // accidentally write the wrong value to 0x00000000 (aka NULL). -- cgit v1.2.3 From 9d5742ebd19441c3cfb15be1b65a2b0a27b4e475 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Sat, 18 Jan 2020 11:54:01 -0800 Subject: Fix start on power up by providing Reset_Handler ourselves. On power up the FlexRAM banks are in an unknown config so we can't rely on the stack until after we configure FlexRAM. --- ports/mimxrt10xx/Makefile | 22 +---- .../mimxrt10xx/boards/imxrt1010_evk/flash_config.c | 18 +--- .../mimxrt10xx/boards/imxrt1060_evk/flash_config.c | 19 +--- ports/mimxrt10xx/boards/teensy40/flash_config.c | 19 +--- ports/mimxrt10xx/linking/common.ld | 24 ++--- .../peripherals/mimxrt10xx/MIMXRT1011/clocks.c | 31 ------ .../peripherals/mimxrt10xx/MIMXRT1021/clocks.c | 30 ------ .../peripherals/mimxrt10xx/MIMXRT1062/clocks.c | 28 ------ .../mimxrt10xx/supervisor/flexspi_nor_flash_ops.c | 9 -- ports/mimxrt10xx/supervisor/port.c | 109 +++++++++++++++------ 10 files changed, 99 insertions(+), 210 deletions(-) (limited to 'ports') diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile index d46806dc6..66a540a40 100644 --- a/ports/mimxrt10xx/Makefile +++ b/ports/mimxrt10xx/Makefile @@ -84,24 +84,10 @@ CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_ ifeq ($(DEBUG), 1) CFLAGS += -ggdb # You may want to disable -flto if it interferes with debugging. - #CFLAGS += -flto -flto-partition=none + # CFLAGS += -flto -flto-partition=none # You may want to enable these flags to make setting breakpoints easier. CFLAGS += -fno-inline -fno-ipa-sra else - # -finline-limit can shrink the image size. - # -finline-limit=80 or so is similar to not having it on. - # There is no simple default value, though. - - # Do a default shrink for small builds. - ifndef CFLAGS_INLINE_LIMIT - ifeq ($(CIRCUITPY_SMALL_BUILD),1) - CFLAGS_INLINE_LIMIT = 50 - endif - endif - - ifdef CFLAGS_INLINE_LIMIT - CFLAGS += -finline-limit=$(CFLAGS_INLINE_LIMIT) - endif #CFLAGS += -flto -flto-partition=none endif @@ -116,12 +102,8 @@ CFLAGS += \ -DCPU_$(CHIP_VARIANT) \ -DDEBUG \ -DIMXRT10XX \ - -DXIP_EXTERNAL_FLASH=1 \ - -DXIP_BOOT_HEADER_ENABLE=1 \ - -D__START=main \ -Os -g3 -Wno-unused-parameter \ - -ffunction-sections -fdata-sections -fstack-usage \ - -D__STARTUP_CLEAR_BSS + -ffunction-sections -fdata-sections -fstack-usage LD_FILES = $(wildcard boards/$(BOARD)/*.ld) $(addprefix linking/, flash/$(FLASH).ld chip_family/$(CHIP_FAMILY).ld common.ld) diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c index c281d4541..805e62f01 100644 --- a/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c @@ -13,12 +13,7 @@ #define FSL_COMPONENT_ID "platform.drivers.xip_device" #endif -#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1) -#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) - __attribute__((section(".boot_hdr.ivt"))) -#elif defined(__ICCARM__) -#pragma location=".boot_hdr.ivt" -#endif +__attribute__((section(".boot_hdr.ivt"))) /************************************* * IVT Data *************************************/ @@ -33,11 +28,7 @@ const ivt image_vector_table = { IVT_RSVD /* Reserved = 0 */ }; -#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) - __attribute__((section(".boot_hdr.boot_data"))) -#elif defined(__ICCARM__) -#pragma location=".boot_hdr.boot_data" -#endif +__attribute__((section(".boot_hdr.boot_data"))) /************************************* * Boot Data *************************************/ @@ -49,12 +40,7 @@ const BOOT_DATA_T boot_data = { }; #endif -#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) __attribute__((section(".boot_hdr.conf"))) -#elif defined(__ICCARM__) -#pragma location = ".boot_hdr.conf" -#endif - // Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 const flexspi_nor_config_t qspiflash_config = { .memConfig = diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c index c281d4541..c51c59a51 100644 --- a/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c @@ -13,12 +13,8 @@ #define FSL_COMPONENT_ID "platform.drivers.xip_device" #endif -#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1) -#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) - __attribute__((section(".boot_hdr.ivt"))) -#elif defined(__ICCARM__) -#pragma location=".boot_hdr.ivt" -#endif +__attribute__((section(".boot_hdr.ivt"))) + /************************************* * IVT Data *************************************/ @@ -33,11 +29,7 @@ const ivt image_vector_table = { IVT_RSVD /* Reserved = 0 */ }; -#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) - __attribute__((section(".boot_hdr.boot_data"))) -#elif defined(__ICCARM__) -#pragma location=".boot_hdr.boot_data" -#endif +__attribute__((section(".boot_hdr.boot_data"))) /************************************* * Boot Data *************************************/ @@ -49,12 +41,7 @@ const BOOT_DATA_T boot_data = { }; #endif -#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) __attribute__((section(".boot_hdr.conf"))) -#elif defined(__ICCARM__) -#pragma location = ".boot_hdr.conf" -#endif - // Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 const flexspi_nor_config_t qspiflash_config = { .memConfig = diff --git a/ports/mimxrt10xx/boards/teensy40/flash_config.c b/ports/mimxrt10xx/boards/teensy40/flash_config.c index c281d4541..426deb884 100644 --- a/ports/mimxrt10xx/boards/teensy40/flash_config.c +++ b/ports/mimxrt10xx/boards/teensy40/flash_config.c @@ -13,12 +13,7 @@ #define FSL_COMPONENT_ID "platform.drivers.xip_device" #endif -#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1) -#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) - __attribute__((section(".boot_hdr.ivt"))) -#elif defined(__ICCARM__) -#pragma location=".boot_hdr.ivt" -#endif +__attribute__((section(".boot_hdr.ivt"))) /************************************* * IVT Data *************************************/ @@ -33,11 +28,7 @@ const ivt image_vector_table = { IVT_RSVD /* Reserved = 0 */ }; -#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) - __attribute__((section(".boot_hdr.boot_data"))) -#elif defined(__ICCARM__) -#pragma location=".boot_hdr.boot_data" -#endif +__attribute__((section(".boot_hdr.boot_data"))) /************************************* * Boot Data *************************************/ @@ -47,14 +38,8 @@ const BOOT_DATA_T boot_data = { PLUGIN_FLAG, /* Plugin flag*/ 0xFFFFFFFF /* empty - extra data word */ }; -#endif -#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__) __attribute__((section(".boot_hdr.conf"))) -#elif defined(__ICCARM__) -#pragma location = ".boot_hdr.conf" -#endif - // Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 const flexspi_nor_config_t qspiflash_config = { .memConfig = diff --git a/ports/mimxrt10xx/linking/common.ld b/ports/mimxrt10xx/linking/common.ld index 5cead9ed0..10568bfb8 100644 --- a/ports/mimxrt10xx/linking/common.ld +++ b/ports/mimxrt10xx/linking/common.ld @@ -30,7 +30,9 @@ MEMORY ITCM (x) : ORIGIN = 0x00000000, LENGTH = 32K } -__RAM_VECTOR_TABLE_SIZE_BYTES = 0; +__data_start__ = 0; +__data_end__ = 0; +_start = 0; SECTIONS { @@ -81,31 +83,28 @@ SECTIONS .data : { . = ALIGN(4); - _sidata = .; - __data_start__ = .; /* create a global symbol at data start */ - *(.data*) /* .data* sections */ *flexspi_nor_flash_ops.o(.text*) *fsl_flexspi.o(.text*) . = ALIGN(4); - - __data_end__ = .; /* define a global symbol at data end */ } > OCRAM AT> FLASH_TEXT + _ld_ocram_data_destination = ADDR(.data); + _ld_ocram_data_flash_copy = LOADADDR(.data); + _ld_ocram_data_size = SIZEOF(.data); /* Uninitialized data section */ .bss : { . = ALIGN(4); - __bss_start__ = .; *(.bss*) *(COMMON) . = ALIGN(4); - __bss_end__ = .; - _ld_heap_start = .; - PROVIDE(end = .); } > OCRAM + _ld_ocram_bss_start = ADDR(.bss); + _ld_ocram_bss_size = SIZEOF(.bss); + _ld_heap_start = _ld_ocram_bss_start + _ld_ocram_bss_size; _ld_heap_end = ORIGIN(OCRAM) + LENGTH(OCRAM); .itcm : @@ -141,7 +140,7 @@ SECTIONS . = ALIGN(4); } > DTCM AT> DTCM _ld_dtcm_bss_start = ADDR(.dtcm_bss); - _ld_dtcm_bss_end = ADDR(.dtcm_bss) + SIZEOF(.dtcm_bss); + _ld_dtcm_bss_size = SIZEOF(.dtcm_bss); .stack : { @@ -150,9 +149,6 @@ SECTIONS . += _ld_default_stack_size; } > DTCM _ld_stack_top = ORIGIN(DTCM) + LENGTH(DTCM); - _estack = _ld_stack_top; .ARM.attributes 0 : { *(.ARM.attributes) } } - -ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data") diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c index c03991785..854ae4dee 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c @@ -129,19 +129,6 @@ void clocks_init(void) { CLOCK_DisableClock(kCLOCK_Pit); /* Set PERCLK_PODF. */ CLOCK_SetDiv(kCLOCK_PerclkDiv, 1); - /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. - * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left - * unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as - * well.*/ -#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) - /* Disable Flexspi clock gate. */ - CLOCK_DisableClock(kCLOCK_FlexSpi); - /* Set FLEXSPI_PODF. */ - CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3); - /* Set Flexspi clock source. */ - CLOCK_SetMux(kCLOCK_FlexspiMux, 0); - CLOCK_SetMux(kCLOCK_FlexspiSrcMux, 0); -#endif /* Disable ADC_ACLK_EN clock gate. */ CCM->CSCMR2 &= ~CCM_CSCMR2_ADC_ACLK_EN_MASK; /* Set ADC_ACLK_PODF. */ @@ -219,24 +206,6 @@ void clocks_init(void) { CLOCK_InitSysPfd(kCLOCK_Pfd2, 18); /* Init System pfd3. */ CLOCK_InitSysPfd(kCLOCK_Pfd3, 18); - /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. - * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left - * unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as - * well.*/ -#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) - /* Init Usb1 PLL. */ - CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN); - /* Init Usb1 pfd0. */ - CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22); - /* Init Usb1 pfd1. */ - CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16); - /* Init Usb1 pfd2. */ - CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17); - /* Init Usb1 pfd3. */ - CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18); - /* Disable Usb1 PLL output for USBPHY1. */ - CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK; -#endif /* DeInit Audio PLL. */ CLOCK_DeinitAudioPll(); /* Bypass Audio PLL. */ diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c index 7dc08f6dd..cb9dd34c9 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c @@ -176,18 +176,6 @@ void clocks_init(void) { CLOCK_SetMux(kCLOCK_SemcAltMux, 0); /* Set Semc clock source. */ CLOCK_SetMux(kCLOCK_SemcMux, 0); -#endif - /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. - * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left - * unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as - * well.*/ -#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) - /* Disable Flexspi clock gate. */ - CLOCK_DisableClock(kCLOCK_FlexSpi); - /* Set FLEXSPI_PODF. */ - CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3); - /* Set Flexspi clock source. */ - CLOCK_SetMux(kCLOCK_FlexspiMux, 2); #endif /* Disable LPSPI clock gate. */ CLOCK_DisableClock(kCLOCK_Lpspi1); @@ -294,24 +282,6 @@ void clocks_init(void) { CLOCK_InitSysPfd(kCLOCK_Pfd2, 18); /* Init System pfd3. */ CLOCK_InitSysPfd(kCLOCK_Pfd3, 18); -#endif - /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. - * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left - * unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as - * well.*/ -#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) - /* Init Usb1 PLL. */ - CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN); - /* Init Usb1 pfd0. */ - CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22); - /* Init Usb1 pfd1. */ - CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16); - /* Init Usb1 pfd2. */ - CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17); - /* Init Usb1 pfd3. */ - CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18); - /* Disable Usb1 PLL output for USBPHY1. */ - CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK; #endif /* DeInit Audio PLL. */ CLOCK_DeinitAudioPll(); diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c index cafc8efc3..7b9af3a6a 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c @@ -129,17 +129,6 @@ void clocks_init(void) { CLOCK_SetMux(kCLOCK_SemcAltMux, 0); /* Set Semc clock source. */ CLOCK_SetMux(kCLOCK_SemcMux, 0); -#endif - /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. - * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged. - * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/ -#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) - /* Disable Flexspi clock gate. */ - CLOCK_DisableClock(kCLOCK_FlexSpi); - /* Set FLEXSPI_PODF. */ - CLOCK_SetDiv(kCLOCK_FlexspiDiv, 1); - /* Set Flexspi clock source. */ - CLOCK_SetMux(kCLOCK_FlexspiMux, 3); #endif /* Disable LPSPI clock gate. */ CLOCK_DisableClock(kCLOCK_Lpspi1); @@ -254,23 +243,6 @@ void clocks_init(void) { CLOCK_InitSysPfd(kCLOCK_Pfd2, 24); /* Init System pfd3. */ CLOCK_InitSysPfd(kCLOCK_Pfd3, 16); -#endif - /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd. - * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged. - * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/ -#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)) - /* Init Usb1 PLL. */ - CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN); - /* Init Usb1 pfd0. */ - CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33); - /* Init Usb1 pfd1. */ - CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16); - /* Init Usb1 pfd2. */ - CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17); - /* Init Usb1 pfd3. */ - CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19); - /* Disable Usb1 PLL output for USBPHY1. */ - CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK; #endif /* DeInit Audio PLL. */ CLOCK_DeinitAudioPll(); diff --git a/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c index e20c67fa3..71252d677 100644 --- a/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c +++ b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c @@ -16,19 +16,10 @@ static inline void flexspi_clock_init(void) { -#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1) /* Switch to PLL2 for XIP to avoid hardfault during re-initialize clock. */ CLOCK_InitSysPfd(kCLOCK_Pfd2, 24); /* Set PLL2 PFD2 clock 396MHZ. */ CLOCK_SetMux(kCLOCK_FlexspiMux, 0x2); /* Choose PLL2 PFD2 clock as flexspi source clock. */ CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2); /* flexspi clock 133M. */ -#else - const clock_usb_pll_config_t g_ccmConfigUsbPll = {.loopDivider = 0U}; - - CLOCK_InitUsb1Pll(&g_ccmConfigUsbPll); - CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 24); /* Set PLL3 PFD0 clock 360MHZ. */ - CLOCK_SetMux(kCLOCK_FlexspiMux, 0x3); /* Choose PLL3 PFD0 clock as flexspi source clock. */ - CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2); /* flexspi clock 120M. */ -#endif } extern flexspi_device_config_t deviceconfig; diff --git a/ports/mimxrt10xx/supervisor/port.c b/ports/mimxrt10xx/supervisor/port.c index e141bc6b8..2c5e838e2 100644 --- a/ports/mimxrt10xx/supervisor/port.c +++ b/ports/mimxrt10xx/supervisor/port.c @@ -83,28 +83,38 @@ #define NO_SUBREGIONS 0 extern uint32_t _ld_flash_size; +extern uint32_t _ld_stack_top; + +extern uint32_t __isr_vector[]; + +extern uint32_t _ld_ocram_bss_start; +extern uint32_t _ld_ocram_bss_size; +extern uint32_t _ld_ocram_data_destination; +extern uint32_t _ld_ocram_data_size; +extern uint32_t _ld_ocram_data_flash_copy; +extern uint32_t _ld_dtcm_bss_start; +extern uint32_t _ld_dtcm_bss_size; +extern uint32_t _ld_dtcm_data_destination; +extern uint32_t _ld_dtcm_data_size; +extern uint32_t _ld_dtcm_data_flash_copy; +extern uint32_t _ld_itcm_destination; +extern uint32_t _ld_itcm_size; +extern uint32_t _ld_itcm_flash_copy; + +extern void main(void); + +// This replaces the Reset_Handler in startup_*.S and SystemInit in system_*.c. +__attribute__((used, naked)) void Reset_Handler(void) { + __disable_irq(); + SCB->VTOR = (uint32_t) &__isr_vector; + __set_MSP((uint32_t) &_ld_stack_top); -extern uint8_t _ld_dtcm_bss_start; -extern uint8_t _ld_dtcm_bss_end; -extern uint8_t _ld_dtcm_data_destination; -extern uint8_t _ld_dtcm_data_size; -extern uint8_t _ld_dtcm_data_flash_copy; -extern uint8_t _ld_itcm_destination; -extern uint8_t _ld_itcm_size; -extern uint8_t _ld_itcm_flash_copy; - -// This is called before RAM is setup! Be very careful what you do here. -void SystemInitHook(void) { - // asm("bkpt"); /* Disable I cache and D cache */ - if (SCB_CCR_IC_Msk == (SCB_CCR_IC_Msk & SCB->CCR)) - { - SCB_DisableICache(); - } - if (SCB_CCR_DC_Msk == (SCB_CCR_DC_Msk & SCB->CCR)) - { - SCB_DisableDCache(); - } + SCB_DisableICache(); + SCB_DisableDCache(); + + // Changing the FlexRAM must happen here where the stack is empty. If it is in a function call, + // then the return will jump to an invalid address. // Configure FlexRAM. The e is one block of ITCM (0b11) and DTCM (0b10). The rest is two OCRAM // (0b01). We shift in zeroes for all unimplemented banks. IOMUXC_GPR->GPR17 = (0xe5555555) >> (32 - 2 * FSL_FEATURE_FLEXRAM_INTERNAL_RAM_TOTAL_BANK_NUMBERS); @@ -120,17 +130,35 @@ void SystemInitHook(void) { current_gpr14 |= IOMUXC_GPR_GPR14_CM7_CFGITCMSZ(0x6); IOMUXC_GPR->GPR14 = current_gpr14; - /* Disable MPU */ - ARM_MPU_Disable(); + #if ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) + SCB->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); /* set CP10, CP11 Full Access */ + #endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */ - // Copy all of the code to run from ITCM. - memcpy(&_ld_itcm_destination, &_ld_itcm_flash_copy, (size_t) &_ld_itcm_size); + /* Disable Watchdog Power Down Counter */ + WDOG1->WMCR &= ~WDOG_WMCR_PDE_MASK; + WDOG2->WMCR &= ~WDOG_WMCR_PDE_MASK; - // Copy all of the data to run from DTCM. - memcpy(&_ld_dtcm_data_destination, &_ld_dtcm_data_flash_copy, (size_t) &_ld_dtcm_data_size); + /* Watchdog disable */ + WDOG1->WCR &= ~WDOG_WCR_WDE_MASK; + WDOG2->WCR &= ~WDOG_WCR_WDE_MASK; + RTWDOG->CNT = 0xD928C520U; /* 0xD928C520U is the update key */ + RTWDOG->TOVAL = 0xFFFF; + RTWDOG->CS = (uint32_t) ((RTWDOG->CS) & ~RTWDOG_CS_EN_MASK) | RTWDOG_CS_UPDATE_MASK; - // Clear DTCM bss. - memset(&_ld_dtcm_bss_start, 0, (size_t) (&_ld_dtcm_bss_end - &_ld_dtcm_bss_start)); + /* Disable Systick which might be enabled by bootrom */ + if (SysTick->CTRL & SysTick_CTRL_ENABLE_Msk) + { + SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; + } + + /* Disable MPU */ + ARM_MPU_Disable(); + + // Copy all of the code to run from ITCM. Do this while the MPU is disabled because we write + // protect it. + for (uint32_t i = 0; i < ((size_t) &_ld_itcm_size) / 4; i++) { + (&_ld_itcm_destination)[i] = (&_ld_itcm_flash_copy)[i]; + } // The first number in RBAR is the region number. When searching for a policy, the region with // the highest number wins. If none match, then the default policy set at enable applies. @@ -187,9 +215,32 @@ void SystemInitHook(void) { /* Enable MPU */ ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk); - /* Enable I cache and D cache */ + /* We're done mucking with memory so enable I cache and D cache */ SCB_EnableDCache(); SCB_EnableICache(); + + // Copy all of the data to run from DTCM. + for (uint32_t i = 0; i < ((size_t) &_ld_dtcm_data_size) / 4; i++) { + (&_ld_dtcm_data_destination)[i] = (&_ld_dtcm_data_flash_copy)[i]; + } + + // Clear DTCM bss. + for (uint32_t i = 0; i < ((size_t) &_ld_dtcm_bss_size) / 4; i++) { + (&_ld_dtcm_bss_start)[i] = 0; + } + + // Copy all of the data to run from OCRAM. + for (uint32_t i = 0; i < ((size_t) &_ld_ocram_data_size) / 4; i++) { + (&_ld_ocram_data_destination)[i] = (&_ld_ocram_data_flash_copy)[i]; + } + + // Clear OCRAM bss. + for (uint32_t i = 0; i < ((size_t) &_ld_ocram_bss_size) / 4; i++) { + (&_ld_ocram_bss_start)[i] = 0; + } + + __enable_irq(); + main(); } safe_mode_t port_init(void) { -- cgit v1.2.3 From 1c3960634520749180e349cee5fe4ea76fb75937 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Sat, 18 Jan 2020 18:06:56 -0800 Subject: Fix other builds missing new heap bounds functions --- ports/atmel-samd/supervisor/port.c | 8 ++++++++ ports/cxd56/supervisor/port.c | 8 ++++++++ ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c | 6 ------ ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c | 6 ------ ports/nrf/supervisor/port.c | 8 ++++++++ ports/stm32f4/supervisor/port.c | 10 +++++++++- 6 files changed, 33 insertions(+), 13 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c index 5662b159b..0a4cc8c19 100644 --- a/ports/atmel-samd/supervisor/port.c +++ b/ports/atmel-samd/supervisor/port.c @@ -331,6 +331,14 @@ uint32_t *port_stack_get_top(void) { return &_estack; } +uint32_t *port_heap_get_bottom(void) { + return port_stack_get_limit(); +} + +uint32_t *port_heap_get_top(void) { + return port_stack_get_top(); +} + // Place the word to save 8k from the end of RAM so we and the bootloader don't clobber it. #ifdef SAMD21 uint32_t* safe_word = (uint32_t*) (HMCRAMC0_ADDR + HMCRAMC0_SIZE - 0x2000); diff --git a/ports/cxd56/supervisor/port.c b/ports/cxd56/supervisor/port.c index f06133468..5d2957f35 100644 --- a/ports/cxd56/supervisor/port.c +++ b/ports/cxd56/supervisor/port.c @@ -85,6 +85,14 @@ uint32_t *port_stack_get_top(void) { return rtcb->adj_stack_ptr; } +uint32_t *port_heap_get_bottom(void) { + return port_stack_get_limit(); +} + +uint32_t *port_heap_get_top(void) { + return port_stack_get_top(); +} + extern uint32_t _ebss; // Place the word to save just after our BSS section that gets blanked. diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c index 805e62f01..7e8fb75b2 100644 --- a/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c @@ -8,11 +8,6 @@ #include "fsl_flexspi_nor_boot.h" #include "fsl_flexspi_nor_config.h" -/* Component ID definition, used by tools. */ -#ifndef FSL_COMPONENT_ID -#define FSL_COMPONENT_ID "platform.drivers.xip_device" -#endif - __attribute__((section(".boot_hdr.ivt"))) /************************************* * IVT Data @@ -38,7 +33,6 @@ const BOOT_DATA_T boot_data = { PLUGIN_FLAG, /* Plugin flag*/ 0xFFFFFFFF /* empty - extra data word */ }; -#endif __attribute__((section(".boot_hdr.conf"))) // Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c index c51c59a51..7e046d494 100644 --- a/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c @@ -8,11 +8,6 @@ #include "fsl_flexspi_nor_boot.h" #include "fsl_flexspi_nor_config.h" -/* Component ID definition, used by tools. */ -#ifndef FSL_COMPONENT_ID -#define FSL_COMPONENT_ID "platform.drivers.xip_device" -#endif - __attribute__((section(".boot_hdr.ivt"))) /************************************* @@ -39,7 +34,6 @@ const BOOT_DATA_T boot_data = { PLUGIN_FLAG, /* Plugin flag*/ 0xFFFFFFFF /* empty - extra data word */ }; -#endif __attribute__((section(".boot_hdr.conf"))) // Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 diff --git a/ports/nrf/supervisor/port.c b/ports/nrf/supervisor/port.c index af858aa4a..84bf9cbb6 100644 --- a/ports/nrf/supervisor/port.c +++ b/ports/nrf/supervisor/port.c @@ -146,6 +146,14 @@ void reset_cpu(void) { NVIC_SystemReset(); } +uint32_t *port_heap_get_bottom(void) { + return port_stack_get_limit(); +} + +uint32_t *port_heap_get_top(void) { + return port_stack_get_top(); +} + uint32_t *port_stack_get_limit(void) { return &_ebss; } diff --git a/ports/stm32f4/supervisor/port.c b/ports/stm32f4/supervisor/port.c index df5a70cd1..6df261b35 100644 --- a/ports/stm32f4/supervisor/port.c +++ b/ports/stm32f4/supervisor/port.c @@ -50,7 +50,7 @@ safe_mode_t port_init(void) { stm32f4_peripherals_gpio_init(); tick_init(); - board_init(); + board_init(); return NO_SAFE_MODE; } @@ -71,6 +71,14 @@ void reset_cpu(void) { NVIC_SystemReset(); } +uint32_t *port_heap_get_bottom(void) { + return port_stack_get_limit(); +} + +uint32_t *port_heap_get_top(void) { + return port_stack_get_top(); +} + uint32_t *port_stack_get_limit(void) { return &_ebss; } -- cgit v1.2.3 From 4923caf85e8fcda662f0ca4b0785a790f9a1d724 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Tue, 21 Jan 2020 18:53:55 -0500 Subject: Increase CPX stack size by 256 --- ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h | 2 +- .../atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h | 2 +- .../boards/circuitplayground_express_displayio/mpconfigboard.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h index 6eb49b02c..1d4fc9893 100644 --- a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h @@ -28,7 +28,7 @@ #define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" // Increase stack size slightly due to CPX library import nesting -#define CIRCUITPY_DEFAULT_STACK_SIZE (4504) +#define CIRCUITPY_DEFAULT_STACK_SIZE (4760) //divisible by 8 #define DEFAULT_I2C_BUS_SCL (&pin_PB03) #define DEFAULT_I2C_BUS_SDA (&pin_PB02) diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h index e64997c0e..1e657bb03 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h @@ -28,7 +28,7 @@ #define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" // Increase stack size slightly due to CPX library import nesting -#define CIRCUITPY_DEFAULT_STACK_SIZE (4504) +#define CIRCUITPY_DEFAULT_STACK_SIZE (4760) // divisible by 8 #define DEFAULT_I2C_BUS_SCL (&pin_PB03) #define DEFAULT_I2C_BUS_SDA (&pin_PB02) diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h index c9a7ce040..5dbcf61aa 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h @@ -28,7 +28,7 @@ #define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" // Increase stack size slightly due to CPX library import nesting. -#define CIRCUITPY_DEFAULT_STACK_SIZE (4504) // divisible by 8 +#define CIRCUITPY_DEFAULT_STACK_SIZE (4760) // divisible by 8 #define DEFAULT_I2C_BUS_SCL (&pin_PB03) #define DEFAULT_I2C_BUS_SDA (&pin_PB02) -- cgit v1.2.3 From 87344ff53a30ed2c41d58b6e30692f80a3968ee1 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Tue, 21 Jan 2020 18:32:19 -0800 Subject: Disable the DCache when USB is initialized. There are still issues enabling it. --- ports/mimxrt10xx/supervisor/usb.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'ports') diff --git a/ports/mimxrt10xx/supervisor/usb.c b/ports/mimxrt10xx/supervisor/usb.c index c38dd55b9..051fcca9d 100644 --- a/ports/mimxrt10xx/supervisor/usb.c +++ b/ports/mimxrt10xx/supervisor/usb.c @@ -49,6 +49,10 @@ void init_usb_hardware(void) { phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK); phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06); usb_phy->TX = phytx; + + // Temporarily disable the data cache until we can sort out all of the spots in TinyUSB that + // need the cache invalidated or cleaned. + SCB_DisableDCache(); } void USB_OTG1_IRQHandler(void) { -- cgit v1.2.3 From 085242bf5c05fec4ae0450712879e78b7e35ac38 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Tue, 21 Jan 2020 18:45:00 -0800 Subject: Use new USB PIDs that aren't used yet. --- ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk | 4 ++-- ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk | 4 ++-- ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) (limited to 'ports') diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk index 62a2c90de..7147fdf48 100644 --- a/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk @@ -1,5 +1,5 @@ -USB_VID = 0x16C0 -USB_PID = 0x8888 +USB_VID = 0x239A +USB_PID = 0x8082 USB_PRODUCT = "iMX RT 1020 EVK" USB_MANUFACTURER = "NXP" diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk index a70d1deeb..e82d8ee74 100644 --- a/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk @@ -1,5 +1,5 @@ -USB_VID = 0x16C0 -USB_PID = 0x8888 +USB_VID = 0x239A +USB_PID = 0x8084 USB_PRODUCT = "iMX RT 1060 EVK" USB_MANUFACTURER = "NXP" diff --git a/ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk index 5913f9c9c..7900d327a 100644 --- a/ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk +++ b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x8888 +USB_PID = 0x8086 USB_PRODUCT = "Teensy 4.0" USB_MANUFACTURER = "PJRC" -- cgit v1.2.3 From b326ee0a3d0f41d67a1d9dd4fc0ac6fd50d8e5f1 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 22 Jan 2020 12:12:27 -0500 Subject: fix microcontroller pin ommission --- ports/stm32f4/common-hal/microcontroller/Pin.c | 1 + 1 file changed, 1 insertion(+) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/microcontroller/Pin.c b/ports/stm32f4/common-hal/microcontroller/Pin.c index 615e48358..1d4d45b97 100644 --- a/ports/stm32f4/common-hal/microcontroller/Pin.c +++ b/ports/stm32f4/common-hal/microcontroller/Pin.c @@ -76,6 +76,7 @@ void reset_pin_number(uint8_t pin_port, uint8_t pin_number) { } // Clear claimed bit & reset claimed_pins[pin_port] &= ~(1< Date: Wed, 22 Jan 2020 14:41:37 -0500 Subject: Revert dangling pointer issue in PWMOut --- ports/stm32f4/common-hal/pulseio/PWMOut.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/pulseio/PWMOut.c b/ports/stm32f4/common-hal/pulseio/PWMOut.c index ea9f67881..0a5d0cc85 100644 --- a/ports/stm32f4/common-hal/pulseio/PWMOut.c +++ b/ports/stm32f4/common-hal/pulseio/PWMOut.c @@ -111,15 +111,13 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, bool tim_taken_f_mismatch = false; bool var_freq_mismatch = false; bool first_time_setup = true; - mcu_tim_pin_obj_t l_tim = {0}; for (uint i = 0; i < tim_num; i++) { - l_tim = mcu_tim_pin_list[i]; - uint8_t l_tim_index = l_tim.tim_index - 1; - uint8_t l_tim_channel = l_tim.channel_index - 1; + uint8_t l_tim_index = mcu_tim_pin_list[i].tim_index - 1; + uint8_t l_tim_channel = mcu_tim_pin_list[i].channel_index - 1; //if pin is same - if (l_tim.pin == pin) { + if (mcu_tim_pin_list[i].pin == pin) { //check if the timer has a channel active if (reserved_tim[l_tim_index] != 0) { //is it the same channel? (or all channels reserved by a var-freq) @@ -140,7 +138,7 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, first_time_setup = false; //skip setting up the timer } //No problems taken, so set it up - self->tim = &l_tim; + self->tim = &mcu_tim_pin_list[i]; break; } } -- cgit v1.2.3 From e9f9cee4d66ccfb81b4a0b1e8503e2bbbdb57077 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 22 Jan 2020 18:47:41 -0500 Subject: Invert duty cycle intensity --- ports/stm32f4/common-hal/pulseio/PWMOut.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/pulseio/PWMOut.c b/ports/stm32f4/common-hal/pulseio/PWMOut.c index 0a5d0cc85..000325be3 100644 --- a/ports/stm32f4/common-hal/pulseio/PWMOut.c +++ b/ports/stm32f4/common-hal/pulseio/PWMOut.c @@ -68,8 +68,9 @@ STATIC uint32_t timer_get_source_freq(uint32_t tim_id) { } STATIC uint32_t timer_get_internal_duty(uint16_t duty, uint32_t period) { - //duty cycle is duty/0xFFFF fraction x (number of pulses per period) - return (duty*period) / ((1 << 16) - 1); + //duty cycle is (0xFFFF - duty)/0xFFFF fraction x (number of pulses per period) + //Note that pulses are inverted, so duty cycle is inverted + return ((0xFFFF - duty)*period) / ((1 << 16) - 1); } STATIC void timer_get_optimal_divisors(uint32_t*period, uint32_t*prescaler, -- cgit v1.2.3 From 4675783545d782540d5e3d064dfe1a96b9e6c91e Mon Sep 17 00:00:00 2001 From: ndgarage Date: Thu, 23 Jan 2020 09:55:17 -0700 Subject: change-name-to-ndgarage_ndbit6 --- .github/workflows/build.yml | 2 +- ports/atmel-samd/boards/ndbit6/board.c | 39 ---------------------- ports/atmel-samd/boards/ndbit6/mpconfigboard.h | 32 ------------------ ports/atmel-samd/boards/ndbit6/mpconfigboard.mk | 15 --------- ports/atmel-samd/boards/ndbit6/pins.c | 39 ---------------------- ports/atmel-samd/boards/ndgarage_ndbit6/board.c | 39 ++++++++++++++++++++++ .../boards/ndgarage_ndbit6/mpconfigboard.h | 32 ++++++++++++++++++ .../boards/ndgarage_ndbit6/mpconfigboard.mk | 15 +++++++++ ports/atmel-samd/boards/ndgarage_ndbit6/pins.c | 39 ++++++++++++++++++++++ 9 files changed, 126 insertions(+), 126 deletions(-) delete mode 100644 ports/atmel-samd/boards/ndbit6/board.c delete mode 100644 ports/atmel-samd/boards/ndbit6/mpconfigboard.h delete mode 100644 ports/atmel-samd/boards/ndbit6/mpconfigboard.mk delete mode 100644 ports/atmel-samd/boards/ndbit6/pins.c create mode 100644 ports/atmel-samd/boards/ndgarage_ndbit6/board.c create mode 100644 ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/ndgarage_ndbit6/pins.c (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 3356b6842..e37963a63 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -121,7 +121,7 @@ jobs: - "metro_nrf52840_express" - "mini_sam_m4" - "monster_m4sk" - - "ndbit6" + - "ndgarage_ndbit6" - "particle_argon" - "particle_boron" - "particle_xenon" diff --git a/ports/atmel-samd/boards/ndbit6/board.c b/ports/atmel-samd/boards/ndbit6/board.c deleted file mode 100644 index 0f60736a2..000000000 --- a/ports/atmel-samd/boards/ndbit6/board.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "boards/board.h" -#include "mpconfigboard.h" -#include "hal/include/hal_gpio.h" - -void board_init(void) { -} - -bool board_requests_safe_mode(void) { - return false; -} - -void reset_board(void) { -} diff --git a/ports/atmel-samd/boards/ndbit6/mpconfigboard.h b/ports/atmel-samd/boards/ndbit6/mpconfigboard.h deleted file mode 100644 index 869f207a1..000000000 --- a/ports/atmel-samd/boards/ndbit6/mpconfigboard.h +++ /dev/null @@ -1,32 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "ndGarage[n°]Bit6:FeatherSnow" -#define MICROPY_HW_MCU_NAME "samd21e18" - -#define MICROPY_HW_LED_STATUS (&pin_PA23) - -#define SPI_FLASH_MOSI_PIN &pin_PA16 -#define SPI_FLASH_MISO_PIN &pin_PA18 -#define SPI_FLASH_SCK_PIN &pin_PA17 -#define SPI_FLASH_CS_PIN &pin_PA15 - -#define MICROPY_PORT_A (PORT_PA24 | PORT_PA25) -#define MICROPY_PORT_B (0) -#define MICROPY_PORT_C (0) - -#define CIRCUITPY_INTERNAL_NVM_SIZE 256 - -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000 CIRCUITPY_INTERNAL_NVM_SIZE) - -#define DEFAULT_I2C_BUS_SCL (&pin_PA09) -#define DEFAULT_I2C_BUS_SDA (&pin_PA08) - -#define DEFAULT_SPI_BUS_SCK (&pin_PA05) -#define DEFAULT_SPI_BUS_MOSI (&pin_PA04) -#define DEFAULT_SPI_BUS_MISO (&pin_PA06) - -#define DEFAULT_UART_BUS_RX (&pin_PA09) -#define DEFAULT_UART_BUS_TX (&pin_PA08) - -// USB is always used. -#define IGNORE_PIN_PA24 1 -#define IGNORE_PIN_PA25 1 - diff --git a/ports/atmel-samd/boards/ndbit6/mpconfigboard.mk b/ports/atmel-samd/boards/ndbit6/mpconfigboard.mk deleted file mode 100644 index 42840ac2a..000000000 --- a/ports/atmel-samd/boards/ndbit6/mpconfigboard.mk +++ /dev/null @@ -1,15 +0,0 @@ -LD_FILE = boards/samd21x18-bootloader.ld -USB_VID = 0x239A -USB_PID = 0x8066 -USB_PRODUCT = "ndBit6" -USB_MANUFACTURER = "ndGarage" - -CHIP_VARIANT = SAMD21E18A -CHIP_FAMILY = samd21 - -INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE -CIRCUITPY_SMALL_BUILD = 1 - -SUPEROPT_GC = 0 - diff --git a/ports/atmel-samd/boards/ndbit6/pins.c b/ports/atmel-samd/boards/ndbit6/pins.c deleted file mode 100644 index 6d1fc53b6..000000000 --- a/ports/atmel-samd/boards/ndbit6/pins.c +++ /dev/null @@ -1,39 +0,0 @@ -#include "shared-bindings/board/__init__.h" - -STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA11) }, - { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA22) }, - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA28) }, - { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA00) }, - { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA03) }, - { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA09) }, - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA15) }, - { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA23) }, - { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA01) }, - { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA10) }, - { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA14) }, - { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PA27) }, - { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PA02) }, - - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, - - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) }, - - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, - - { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_PA23) }, - - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, -}; -MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/ndgarage_ndbit6/board.c b/ports/atmel-samd/boards/ndgarage_ndbit6/board.c new file mode 100644 index 000000000..0f60736a2 --- /dev/null +++ b/ports/atmel-samd/boards/ndgarage_ndbit6/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.h b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.h new file mode 100644 index 000000000..869f207a1 --- /dev/null +++ b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.h @@ -0,0 +1,32 @@ +#define MICROPY_HW_BOARD_NAME "ndGarage[n°]Bit6:FeatherSnow" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_LED_STATUS (&pin_PA23) + +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_MISO_PIN &pin_PA18 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA15 + +#define MICROPY_PORT_A (PORT_PA24 | PORT_PA25) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define CIRCUITPY_INTERNAL_NVM_SIZE 256 + +#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000 CIRCUITPY_INTERNAL_NVM_SIZE) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA05) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA04) +#define DEFAULT_SPI_BUS_MISO (&pin_PA06) + +#define DEFAULT_UART_BUS_RX (&pin_PA09) +#define DEFAULT_UART_BUS_TX (&pin_PA08) + +// USB is always used. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 + diff --git a/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk new file mode 100644 index 000000000..b73f0951e --- /dev/null +++ b/ports/atmel-samd/boards/ndgarage_ndbit6/mpconfigboard.mk @@ -0,0 +1,15 @@ +LD_FILE = boards/samd21x18-bootloader.ld +USB_VID = 0x239A +USB_PID = 0x8066 +USB_PRODUCT = "Bit6" +USB_MANUFACTURER = "ndGarage" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_SMALL_BUILD = 1 + +SUPEROPT_GC = 0 + diff --git a/ports/atmel-samd/boards/ndgarage_ndbit6/pins.c b/ports/atmel-samd/boards/ndgarage_ndbit6/pins.c new file mode 100644 index 000000000..6d1fc53b6 --- /dev/null +++ b/ports/atmel-samd/boards/ndgarage_ndbit6/pins.c @@ -0,0 +1,39 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA28) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_PA23) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From d8bc57c1dc159e8493b615fe8091f2722c513cf1 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Thu, 23 Jan 2020 17:17:02 -0500 Subject: Flash and display control --- ports/stm32f4/Makefile | 2 +- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 8 ++++---- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 12 ++++++------ ports/stm32f4/boards/meowbit_v121/pins.c | 2 +- 4 files changed, 12 insertions(+), 12 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index d948996ea..1b5b2eee2 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -22,7 +22,7 @@ # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN # THE SOFTWARE. -#DEBUG = 1 +DEBUG = 1 # Select the board to build for. ifeq ($(BOARD),) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index 7c7f4ad74..72d4f1c88 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -40,7 +40,7 @@ //#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader // On-board flash -// #define SPI_FLASH_MOSI_PIN (&pin_PB15) -// #define SPI_FLASH_MISO_PIN (&pin_PB14) -// #define SPI_FLASH_SCK_PIN (&pin_PB13) -// #define SPI_FLASH_CS_PIN (&pin_PB01) +#define SPI_FLASH_MOSI_PIN (&pin_PB15) +#define SPI_FLASH_MISO_PIN (&pin_PB14) +#define SPI_FLASH_SCK_PIN (&pin_PB13) +#define SPI_FLASH_CS_PIN (&pin_PB01) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index f24a2690c..e45d2803f 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -4,15 +4,15 @@ USB_PRODUCT = "Meowbit" USB_MANUFACTURER = "Kittenbot" USB_DEVICES = "CDC,MSC" -# SPI_FLASH_FILESYSTEM = 1 -# EXTERNAL_FLASH_DEVICE_COUNT = 1 -# EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ -# LONGINT_IMPL = MPZ +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ +LONGINT_IMPL = MPZ # BOOTLOADER_OFFSET = 0x8010000 -INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE +# INTERNAL_FLASH_FILESYSTEM = 1 +# LONGINT_IMPL = NONE MCU_SERIES = m4 MCU_VARIANT = stm32f4 diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c index 66cbcd7d6..0cdbefd59 100644 --- a/ports/stm32f4/boards/meowbit_v121/pins.c +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -60,6 +60,6 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0), MP_ROM_PTR(&pin_PA00) }, { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_PB00) }, - //{ MP_ROM_QSTR(MP_QSTR_INTERNAL_SPI), MP_ROM_PTR(&spi) }, + { MP_ROM_QSTR(MP_QSTR_INTERNAL_SPI), MP_ROM_PTR(&spi) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From 68f9aee992ffcc12ed2e9f143f353b18fa12c1c3 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 23 Jan 2020 20:03:55 -0500 Subject: reset NeoPixels on CPB on soft reload --- .../boards/circuitplayground_express/board.c | 12 +----- .../circuitplayground_express/mpconfigboard.h | 2 + .../circuitplayground_express_crickit/board.c | 12 +----- .../mpconfigboard.h | 2 + .../circuitplayground_express_displayio/board.c | 12 +----- .../mpconfigboard.h | 2 + .../nrf/boards/circuitplayground_bluefruit/board.c | 3 ++ .../circuitplayground_bluefruit/mpconfigboard.h | 2 + ports/nrf/common-hal/neopixel_write/__init__.c | 18 ++++++--- supervisor/shared/board.c | 45 ++++++++++++++++++++++ supervisor/shared/board.h | 38 ++++++++++++++++++ supervisor/supervisor.mk | 1 + 12 files changed, 113 insertions(+), 36 deletions(-) create mode 100644 supervisor/shared/board.c create mode 100644 supervisor/shared/board.h (limited to 'ports') diff --git a/ports/atmel-samd/boards/circuitplayground_express/board.c b/ports/atmel-samd/boards/circuitplayground_express/board.c index 578963642..85c37ee62 100644 --- a/ports/atmel-samd/boards/circuitplayground_express/board.c +++ b/ports/atmel-samd/boards/circuitplayground_express/board.c @@ -28,9 +28,8 @@ #include "boards/board.h" #include "common-hal/microcontroller/Pin.h" +#include "supervisor/shared/board.h" #include "hal/include/hal_gpio.h" -#include "shared-bindings/digitalio/DigitalInOut.h" -#include "shared-bindings/neopixel_write/__init__.h" void board_init(void) { @@ -54,12 +53,5 @@ bool board_requests_safe_mode(void) { } void reset_board(void) { - uint8_t empty[30]; - memset(empty, 0, 30); - digitalio_digitalinout_obj_t neopixel_pin; - common_hal_digitalio_digitalinout_construct(&neopixel_pin, &pin_PB23); - common_hal_digitalio_digitalinout_switch_to_output(&neopixel_pin, false, - DRIVE_MODE_PUSH_PULL); - common_hal_neopixel_write(&neopixel_pin, empty, 30); - common_hal_digitalio_digitalinout_deinit(&neopixel_pin); + board_reset_user_neopixels(); } diff --git a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h index 1d4fc9893..0c5e5b762 100644 --- a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h @@ -30,6 +30,8 @@ // Increase stack size slightly due to CPX library import nesting #define CIRCUITPY_DEFAULT_STACK_SIZE (4760) //divisible by 8 +#define USER_NEOPIXELS_PIN (&pin_PB23) + #define DEFAULT_I2C_BUS_SCL (&pin_PB03) #define DEFAULT_I2C_BUS_SDA (&pin_PB02) diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/board.c b/ports/atmel-samd/boards/circuitplayground_express_crickit/board.c index 578963642..21217caac 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_crickit/board.c +++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/board.c @@ -29,8 +29,7 @@ #include "boards/board.h" #include "common-hal/microcontroller/Pin.h" #include "hal/include/hal_gpio.h" -#include "shared-bindings/digitalio/DigitalInOut.h" -#include "shared-bindings/neopixel_write/__init__.h" +#include "supervisor/shared/board.h" void board_init(void) { @@ -54,12 +53,5 @@ bool board_requests_safe_mode(void) { } void reset_board(void) { - uint8_t empty[30]; - memset(empty, 0, 30); - digitalio_digitalinout_obj_t neopixel_pin; - common_hal_digitalio_digitalinout_construct(&neopixel_pin, &pin_PB23); - common_hal_digitalio_digitalinout_switch_to_output(&neopixel_pin, false, - DRIVE_MODE_PUSH_PULL); - common_hal_neopixel_write(&neopixel_pin, empty, 30); - common_hal_digitalio_digitalinout_deinit(&neopixel_pin); + board_reset_user_neopixels(); } diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h index 1e657bb03..312fd2626 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h @@ -24,6 +24,8 @@ #define CALIBRATE_CRYSTALLESS 1 +#define USER_NEOPIXELS_PIN (&pin_PB23) + // Explanation of how a user got into safe mode. #define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/board.c b/ports/atmel-samd/boards/circuitplayground_express_displayio/board.c index 578963642..21217caac 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_displayio/board.c +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/board.c @@ -29,8 +29,7 @@ #include "boards/board.h" #include "common-hal/microcontroller/Pin.h" #include "hal/include/hal_gpio.h" -#include "shared-bindings/digitalio/DigitalInOut.h" -#include "shared-bindings/neopixel_write/__init__.h" +#include "supervisor/shared/board.h" void board_init(void) { @@ -54,12 +53,5 @@ bool board_requests_safe_mode(void) { } void reset_board(void) { - uint8_t empty[30]; - memset(empty, 0, 30); - digitalio_digitalinout_obj_t neopixel_pin; - common_hal_digitalio_digitalinout_construct(&neopixel_pin, &pin_PB23); - common_hal_digitalio_digitalinout_switch_to_output(&neopixel_pin, false, - DRIVE_MODE_PUSH_PULL); - common_hal_neopixel_write(&neopixel_pin, empty, 30); - common_hal_digitalio_digitalinout_deinit(&neopixel_pin); + board_reset_user_neopixels(); } diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h index 5dbcf61aa..4796e90a5 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h @@ -30,6 +30,8 @@ // Increase stack size slightly due to CPX library import nesting. #define CIRCUITPY_DEFAULT_STACK_SIZE (4760) // divisible by 8 +#define USER_NEOPIXELS_PIN (&pin_PB23) + #define DEFAULT_I2C_BUS_SCL (&pin_PB03) #define DEFAULT_I2C_BUS_SDA (&pin_PB02) diff --git a/ports/nrf/boards/circuitplayground_bluefruit/board.c b/ports/nrf/boards/circuitplayground_bluefruit/board.c index 7c8ec8e9a..3aa6857da 100644 --- a/ports/nrf/boards/circuitplayground_bluefruit/board.c +++ b/ports/nrf/boards/circuitplayground_bluefruit/board.c @@ -28,6 +28,7 @@ #include "mpconfigboard.h" #include "py/obj.h" #include "peripherals/nrf/pins.h" +#include "supervisor/shared/board.h" #include "nrf_gpio.h" @@ -47,4 +48,6 @@ void reset_board(void) { NRF_GPIO_PIN_S0S1, NRF_GPIO_PIN_NOSENSE); nrf_gpio_pin_write(POWER_SWITCH_PIN->number, false); + + board_reset_user_neopixels(); } diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h index 7f9933b42..e401cecc1 100644 --- a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h +++ b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h @@ -54,6 +54,8 @@ // Disables onboard peripherals and neopixels to save power. #define POWER_SWITCH_PIN (&pin_P0_06) +#define USER_NEOPIXELS_PIN (&pin_P0_13) + #define DEFAULT_I2C_BUS_SCL (&pin_P0_04) #define DEFAULT_I2C_BUS_SDA (&pin_P0_05) diff --git a/ports/nrf/common-hal/neopixel_write/__init__.c b/ports/nrf/common-hal/neopixel_write/__init__.c index 3052e908d..8495a359d 100644 --- a/ports/nrf/common-hal/neopixel_write/__init__.c +++ b/ports/nrf/common-hal/neopixel_write/__init__.c @@ -102,7 +102,7 @@ uint32_t next_start_tick_us = 1000; void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, uint32_t numBytes) { // To support both the SoftDevice + Neopixels we use the EasyDMA - // feature from the NRF25. However this technique implies to + // feature from the NRF52. However this technique implies to // generate a pattern and store it on the memory. The actual // memory used in bytes corresponds to the following formula: // totalMem = numBytes*8*2+(2*2) @@ -113,22 +113,28 @@ void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout // using DWT #define PATTERN_SIZE(numBytes) (numBytes * 8 * sizeof(uint16_t) + 2 * sizeof(uint16_t)) +// Allocate PWM space for up to STACK_PIXELS on the stack, to avoid malloc'ing. +// We may need to write to the status neopixel or to Circuit Playground NeoPixels +// when we cannot malloc, between VM instantiations. +// We need space for at least 10 pixels for Circuit Playground, but let's choose 24 +// to handle larger NeoPixel rings without malloc'ing. +#define STACK_PIXELS 24 uint32_t pattern_size = PATTERN_SIZE(numBytes); uint16_t* pixels_pattern = NULL; bool pattern_on_heap = false; - // Use the stack to store 1 pixels worth of PWM data for the status led. uint32_t to ensure alignment. - // Make it at least as big as PATTERN_SIZE(3), for one pixel of RGB data. + // Use the stack to store STACK_PIXEL's worth of PWM data. uint32_t to ensure alignment. + // It is 3*STACK_PIXELS to handle RGB. // PATTERN_SIZE is a multiple of 4, so we don't need round up to make sure one_pixel is large enough. - uint32_t one_pixel[PATTERN_SIZE(3)/sizeof(uint32_t)]; + uint32_t stack_pixels[PATTERN_SIZE(3 * STACK_PIXELS) / sizeof(uint32_t)]; NRF_PWM_Type* pwm = find_free_pwm(); // only malloc if there is PWM device available if ( pwm != NULL ) { - if (pattern_size <= sizeof(one_pixel)) { - pixels_pattern = (uint16_t *) one_pixel; + if (pattern_size <= sizeof(stack_pixels)) { + pixels_pattern = (uint16_t *) stack_pixels; } else { uint8_t sd_en = 0; (void) sd_softdevice_is_enabled(&sd_en); diff --git a/supervisor/shared/board.c b/supervisor/shared/board.c new file mode 100644 index 000000000..9e0f5a21e --- /dev/null +++ b/supervisor/shared/board.c @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/shared/board.h" + +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/neopixel_write/__init__.h" + +#ifdef USER_NEOPIXELS_PIN + +void board_reset_user_neopixels(void) { + // Turn off on-board NeoPixel string + uint8_t empty[30] = { 0 }; + digitalio_digitalinout_obj_t neopixel_pin; + common_hal_digitalio_digitalinout_construct(&neopixel_pin, USER_NEOPIXELS_PIN); + common_hal_digitalio_digitalinout_switch_to_output(&neopixel_pin, false, + DRIVE_MODE_PUSH_PULL); + common_hal_neopixel_write(&neopixel_pin, empty, 30); + common_hal_digitalio_digitalinout_deinit(&neopixel_pin); +} + +#endif diff --git a/supervisor/shared/board.h b/supervisor/shared/board.h new file mode 100644 index 000000000..0e4d73455 --- /dev/null +++ b/supervisor/shared/board.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SUPERVISOR_BOARD_H +#define MICROPY_INCLUDED_SUPERVISOR_BOARD_H + +#include "py/mpconfig.h" + +#ifdef USER_NEOPIXELS_PIN + +void board_reset_user_neopixels(void); + +#endif + +#endif // MICROPY_INCLUDED_SUPERVISOR_BOARD_H diff --git a/supervisor/supervisor.mk b/supervisor/supervisor.mk index 96a14c25b..52d60b52b 100644 --- a/supervisor/supervisor.mk +++ b/supervisor/supervisor.mk @@ -2,6 +2,7 @@ SRC_SUPERVISOR = \ main.c \ supervisor/port.c \ supervisor/shared/autoreload.c \ + supervisor/shared/board.c \ supervisor/shared/display.c \ supervisor/shared/filesystem.c \ supervisor/shared/flash.c \ -- cgit v1.2.3 From 6f13979c9bed6f0810cfca9a9fd70cd9a196e6cd Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Fri, 24 Jan 2020 09:32:28 -0500 Subject: pygamer and pybadge boards were not resetting neopixels --- ports/atmel-samd/boards/pybadge/board.c | 2 ++ ports/atmel-samd/boards/pybadge/mpconfigboard.h | 2 ++ ports/atmel-samd/boards/pybadge_airlift/board.c | 2 ++ ports/atmel-samd/boards/pybadge_airlift/mpconfigboard.h | 2 ++ ports/atmel-samd/boards/pygamer/board.c | 2 ++ ports/atmel-samd/boards/pygamer/mpconfigboard.h | 2 ++ ports/atmel-samd/boards/pygamer_advance/board.c | 2 ++ ports/atmel-samd/boards/pygamer_advance/mpconfigboard.h | 2 ++ supervisor/shared/board.c | 8 ++++++-- 9 files changed, 22 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/pybadge/board.c b/ports/atmel-samd/boards/pybadge/board.c index 37f7991d1..f3ac7176a 100644 --- a/ports/atmel-samd/boards/pybadge/board.c +++ b/ports/atmel-samd/boards/pybadge/board.c @@ -31,6 +31,7 @@ #include "shared-bindings/displayio/FourWire.h" #include "shared-module/displayio/__init__.h" #include "shared-module/displayio/mipi_constants.h" +#include "supervisor/shared/board.h" #include "tick.h" displayio_fourwire_obj_t board_display_obj; @@ -118,4 +119,5 @@ bool board_requests_safe_mode(void) { } void reset_board(void) { + board_reset_user_neopixels(); } diff --git a/ports/atmel-samd/boards/pybadge/mpconfigboard.h b/ports/atmel-samd/boards/pybadge/mpconfigboard.h index 435185322..74a13eb1c 100644 --- a/ports/atmel-samd/boards/pybadge/mpconfigboard.h +++ b/ports/atmel-samd/boards/pybadge/mpconfigboard.h @@ -14,6 +14,8 @@ #define MICROPY_PORT_C (0) #define MICROPY_PORT_D (0) +#define USER_NEOPIXELS_PIN (&pin_PA15) + #define DEFAULT_I2C_BUS_SCL (&pin_PA13) #define DEFAULT_I2C_BUS_SDA (&pin_PA12) diff --git a/ports/atmel-samd/boards/pybadge_airlift/board.c b/ports/atmel-samd/boards/pybadge_airlift/board.c index 7622de6f0..061f3d777 100644 --- a/ports/atmel-samd/boards/pybadge_airlift/board.c +++ b/ports/atmel-samd/boards/pybadge_airlift/board.c @@ -31,6 +31,7 @@ #include "shared-bindings/displayio/FourWire.h" #include "shared-module/displayio/__init__.h" #include "shared-module/displayio/mipi_constants.h" +#include "supervisor/shared/board.h" #include "tick.h" displayio_fourwire_obj_t board_display_obj; @@ -96,4 +97,5 @@ bool board_requests_safe_mode(void) { } void reset_board(void) { + board_reset_user_neopixels(); } diff --git a/ports/atmel-samd/boards/pybadge_airlift/mpconfigboard.h b/ports/atmel-samd/boards/pybadge_airlift/mpconfigboard.h index 229cfa335..c6ab4ed8e 100644 --- a/ports/atmel-samd/boards/pybadge_airlift/mpconfigboard.h +++ b/ports/atmel-samd/boards/pybadge_airlift/mpconfigboard.h @@ -14,6 +14,8 @@ #define MICROPY_PORT_C (0) #define MICROPY_PORT_D (0) +#define USER_NEOPIXELS_PIN (&pin_PA15) + #define DEFAULT_I2C_BUS_SCL (&pin_PA13) #define DEFAULT_I2C_BUS_SDA (&pin_PA12) diff --git a/ports/atmel-samd/boards/pygamer/board.c b/ports/atmel-samd/boards/pygamer/board.c index b33ae4fb0..8c6fbca06 100644 --- a/ports/atmel-samd/boards/pygamer/board.c +++ b/ports/atmel-samd/boards/pygamer/board.c @@ -31,6 +31,7 @@ #include "shared-bindings/displayio/FourWire.h" #include "shared-module/displayio/__init__.h" #include "shared-module/displayio/mipi_constants.h" +#include "supervisor/shared/board.h" #include "tick.h" displayio_fourwire_obj_t board_display_obj; @@ -118,4 +119,5 @@ bool board_requests_safe_mode(void) { } void reset_board(void) { + board_reset_user_neopixels(); } diff --git a/ports/atmel-samd/boards/pygamer/mpconfigboard.h b/ports/atmel-samd/boards/pygamer/mpconfigboard.h index 102c25956..21f75d272 100644 --- a/ports/atmel-samd/boards/pygamer/mpconfigboard.h +++ b/ports/atmel-samd/boards/pygamer/mpconfigboard.h @@ -13,6 +13,8 @@ #define MICROPY_PORT_C (0) #define MICROPY_PORT_D (0) +#define USER_NEOPIXELS_PIN (&pin_PA15) + #define DEFAULT_I2C_BUS_SCL (&pin_PA13) #define DEFAULT_I2C_BUS_SDA (&pin_PA12) diff --git a/ports/atmel-samd/boards/pygamer_advance/board.c b/ports/atmel-samd/boards/pygamer_advance/board.c index 8eb501243..ff2da34a2 100644 --- a/ports/atmel-samd/boards/pygamer_advance/board.c +++ b/ports/atmel-samd/boards/pygamer_advance/board.c @@ -31,6 +31,7 @@ #include "shared-bindings/displayio/FourWire.h" #include "shared-module/displayio/__init__.h" #include "shared-module/displayio/mipi_constants.h" +#include "supervisor/shared/board.h" #include "tick.h" displayio_fourwire_obj_t board_display_obj; @@ -96,4 +97,5 @@ bool board_requests_safe_mode(void) { } void reset_board(void) { + board_reset_user_neopixels(); } diff --git a/ports/atmel-samd/boards/pygamer_advance/mpconfigboard.h b/ports/atmel-samd/boards/pygamer_advance/mpconfigboard.h index fbe946b72..7c631d1c3 100644 --- a/ports/atmel-samd/boards/pygamer_advance/mpconfigboard.h +++ b/ports/atmel-samd/boards/pygamer_advance/mpconfigboard.h @@ -13,6 +13,8 @@ #define MICROPY_PORT_C (0) #define MICROPY_PORT_D (0) +#define USER_NEOPIXELS_PIN (&pin_PA15) + #define DEFAULT_I2C_BUS_SCL (&pin_PA13) #define DEFAULT_I2C_BUS_SDA (&pin_PA12) diff --git a/supervisor/shared/board.c b/supervisor/shared/board.c index 9e0f5a21e..e3eb8fd0d 100644 --- a/supervisor/shared/board.c +++ b/supervisor/shared/board.c @@ -31,14 +31,18 @@ #ifdef USER_NEOPIXELS_PIN +// The maximum number of user neopixels right now is 10, on Circuit Playgrounds. +// PyBadge and PyGamer have max 5 +#define USER_NEOPIXELS_MAX_COUNT 10 + void board_reset_user_neopixels(void) { // Turn off on-board NeoPixel string - uint8_t empty[30] = { 0 }; + uint8_t empty[USER_NEOPIXELS_MAX_COUNT * 3] = { 0 }; digitalio_digitalinout_obj_t neopixel_pin; common_hal_digitalio_digitalinout_construct(&neopixel_pin, USER_NEOPIXELS_PIN); common_hal_digitalio_digitalinout_switch_to_output(&neopixel_pin, false, DRIVE_MODE_PUSH_PULL); - common_hal_neopixel_write(&neopixel_pin, empty, 30); + common_hal_neopixel_write(&neopixel_pin, empty, USER_NEOPIXELS_MAX_COUNT * 3); common_hal_digitalio_digitalinout_deinit(&neopixel_pin); } -- cgit v1.2.3 From 2afca4e942df2f4aa656f6c8a6aa84de581682c9 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 24 Jan 2020 14:25:36 -0500 Subject: Fix flash-display conflict error --- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 1 + ports/stm32f4/common-hal/busio/SPI.c | 12 ++++++++++++ py/circuitpy_mpconfig.h | 1 + shared-bindings/board/__init__.h | 2 ++ shared-module/board/__init__.c | 11 +++++++++++ shared-module/displayio/__init__.c | 5 +++++ 6 files changed, 32 insertions(+) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index 72d4f1c88..bf738e961 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -38,6 +38,7 @@ #define BOARD_OSC_DIV 12 #define BOARD_NO_VBUS_SENSE //#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader +#define SHOW_FLASH_SPI // On-board flash #define SPI_FLASH_MOSI_PIN (&pin_PB15) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index afc6cfcbd..e00b5e9f0 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -428,31 +428,43 @@ STATIC void spi_clock_disable(uint8_t mask) { #ifdef SPI1 if (mask & (1 << 0)) { __HAL_RCC_SPI1_CLK_DISABLE(); + __HAL_RCC_SPI1_FORCE_RESET(); + __HAL_RCC_SPI1_RELEASE_RESET(); } #endif #ifdef SPI2 if (mask & (1 << 1)) { __HAL_RCC_SPI2_CLK_DISABLE(); + __HAL_RCC_SPI2_FORCE_RESET(); + __HAL_RCC_SPI2_RELEASE_RESET(); } #endif #ifdef SPI3 if (mask & (1 << 2)) { __HAL_RCC_SPI3_CLK_DISABLE(); + __HAL_RCC_SPI3_FORCE_RESET(); + __HAL_RCC_SPI3_RELEASE_RESET(); } #endif #ifdef SPI4 if (mask & (1 << 3)) { __HAL_RCC_SPI4_CLK_DISABLE(); + __HAL_RCC_SPI4_FORCE_RESET(); + __HAL_RCC_SPI4_RELEASE_RESET(); } #endif #ifdef SPI5 if (mask & (1 << 4)) { __HAL_RCC_SPI5_CLK_DISABLE(); + __HAL_RCC_SPI5_FORCE_RESET(); + __HAL_RCC_SPI5_RELEASE_RESET(); } #endif #ifdef SPI6 if (mask & (1 << 5)) { __HAL_RCC_SPI6_CLK_DISABLE(); + __HAL_RCC_SPI6_FORCE_RESET(); + __HAL_RCC_SPI6_RELEASE_RESET(); } #endif } diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 5b705a088..b5d9bb9a8 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -296,6 +296,7 @@ extern const struct _mp_obj_module_t board_module; #define BOARD_I2C (defined(DEFAULT_I2C_BUS_SDA) && defined(DEFAULT_I2C_BUS_SCL)) #define BOARD_SPI (defined(DEFAULT_SPI_BUS_SCK) && defined(DEFAULT_SPI_BUS_MISO) && defined(DEFAULT_SPI_BUS_MOSI)) #define BOARD_UART (defined(DEFAULT_UART_BUS_RX) && defined(DEFAULT_UART_BUS_TX)) +#define BOARD_INTERNAL_SPI (defined(SHOW_FLASH_SPI)) // I2C and SPI are always allocated off the heap. diff --git a/shared-bindings/board/__init__.h b/shared-bindings/board/__init__.h index a9b652ba8..2842057ad 100644 --- a/shared-bindings/board/__init__.h +++ b/shared-bindings/board/__init__.h @@ -37,6 +37,8 @@ mp_obj_t common_hal_board_get_i2c(void); mp_obj_t common_hal_board_create_i2c(void); MP_DECLARE_CONST_FUN_OBJ_0(board_i2c_obj); +mp_obj_t common_hal_board_get_internal_spi(void); + mp_obj_t common_hal_board_get_spi(void); mp_obj_t common_hal_board_create_spi(void); MP_DECLARE_CONST_FUN_OBJ_0(board_spi_obj); diff --git a/shared-module/board/__init__.c b/shared-module/board/__init__.c index 914bc4313..8d87a98eb 100644 --- a/shared-module/board/__init__.c +++ b/shared-module/board/__init__.c @@ -29,6 +29,8 @@ #include "mpconfigboard.h" #include "py/runtime.h" +#include "supervisor/spi_flash_api.h" + #if CIRCUITPY_BUSIO #include "shared-bindings/busio/I2C.h" #include "shared-bindings/busio/SPI.h" @@ -89,6 +91,15 @@ mp_obj_t common_hal_board_create_spi(void) { } #endif +#if BOARD_INTERNAL_SPI +//Provide a reference to the internal SPI, if required. +mp_obj_t common_hal_board_get_internal_spi(void) { + //TODO: can we change the name of this without having to change every instance of spi in every + //flash file? + return (mp_obj_t)(&spi); +} +#endif + #if BOARD_UART mp_obj_t common_hal_board_get_uart(void) { return MP_STATE_VM(shared_uart_bus); diff --git a/shared-module/displayio/__init__.c b/shared-module/displayio/__init__.c index af22cb0df..795de7b87 100644 --- a/shared-module/displayio/__init__.c +++ b/shared-module/displayio/__init__.c @@ -100,6 +100,11 @@ void reset_displays(void) { continue; } #endif + #if BOARD_INTERNAL_SPI + if (original_spi == common_hal_board_get_internal_spi()) { + continue; + } + #endif memcpy(&fourwire->inline_bus, original_spi, sizeof(busio_spi_obj_t)); fourwire->bus = &fourwire->inline_bus; // Check for other displays that use the same spi bus and swap them too. -- cgit v1.2.3 From 70932cab4223463816974e57945f6f803bbe7371 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 24 Jan 2020 14:33:28 -0500 Subject: Simplify the flash-display conflict fix --- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 2 +- py/circuitpy_mpconfig.h | 1 - shared-bindings/board/__init__.h | 2 -- shared-module/board/__init__.c | 11 ----------- shared-module/displayio/__init__.c | 7 +++++-- 5 files changed, 6 insertions(+), 17 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index bf738e961..2d8ff8761 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -38,7 +38,7 @@ #define BOARD_OSC_DIV 12 #define BOARD_NO_VBUS_SENSE //#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader -#define SHOW_FLASH_SPI +#define BOARD_USE_INTERNAL_SPI // On-board flash #define SPI_FLASH_MOSI_PIN (&pin_PB15) diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index b5d9bb9a8..5b705a088 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -296,7 +296,6 @@ extern const struct _mp_obj_module_t board_module; #define BOARD_I2C (defined(DEFAULT_I2C_BUS_SDA) && defined(DEFAULT_I2C_BUS_SCL)) #define BOARD_SPI (defined(DEFAULT_SPI_BUS_SCK) && defined(DEFAULT_SPI_BUS_MISO) && defined(DEFAULT_SPI_BUS_MOSI)) #define BOARD_UART (defined(DEFAULT_UART_BUS_RX) && defined(DEFAULT_UART_BUS_TX)) -#define BOARD_INTERNAL_SPI (defined(SHOW_FLASH_SPI)) // I2C and SPI are always allocated off the heap. diff --git a/shared-bindings/board/__init__.h b/shared-bindings/board/__init__.h index 2842057ad..a9b652ba8 100644 --- a/shared-bindings/board/__init__.h +++ b/shared-bindings/board/__init__.h @@ -37,8 +37,6 @@ mp_obj_t common_hal_board_get_i2c(void); mp_obj_t common_hal_board_create_i2c(void); MP_DECLARE_CONST_FUN_OBJ_0(board_i2c_obj); -mp_obj_t common_hal_board_get_internal_spi(void); - mp_obj_t common_hal_board_get_spi(void); mp_obj_t common_hal_board_create_spi(void); MP_DECLARE_CONST_FUN_OBJ_0(board_spi_obj); diff --git a/shared-module/board/__init__.c b/shared-module/board/__init__.c index 8d87a98eb..914bc4313 100644 --- a/shared-module/board/__init__.c +++ b/shared-module/board/__init__.c @@ -29,8 +29,6 @@ #include "mpconfigboard.h" #include "py/runtime.h" -#include "supervisor/spi_flash_api.h" - #if CIRCUITPY_BUSIO #include "shared-bindings/busio/I2C.h" #include "shared-bindings/busio/SPI.h" @@ -91,15 +89,6 @@ mp_obj_t common_hal_board_create_spi(void) { } #endif -#if BOARD_INTERNAL_SPI -//Provide a reference to the internal SPI, if required. -mp_obj_t common_hal_board_get_internal_spi(void) { - //TODO: can we change the name of this without having to change every instance of spi in every - //flash file? - return (mp_obj_t)(&spi); -} -#endif - #if BOARD_UART mp_obj_t common_hal_board_get_uart(void) { return MP_STATE_VM(shared_uart_bus); diff --git a/shared-module/displayio/__init__.c b/shared-module/displayio/__init__.c index 795de7b87..8d9f14883 100644 --- a/shared-module/displayio/__init__.c +++ b/shared-module/displayio/__init__.c @@ -16,6 +16,9 @@ #include "supervisor/shared/display.h" #include "supervisor/memory.h" +#include "supervisor/spi_flash_api.h" +#include "py/mpconfig.h" + primary_display_t displays[CIRCUITPY_DISPLAY_LIMIT]; // Check for recursive calls to displayio_background. @@ -100,8 +103,8 @@ void reset_displays(void) { continue; } #endif - #if BOARD_INTERNAL_SPI - if (original_spi == common_hal_board_get_internal_spi()) { + #ifdef BOARD_USE_INTERNAL_SPI + if (original_spi == (mp_obj_t)(&spi)) { continue; } #endif -- cgit v1.2.3 From b5b94b72c1cef10de16d4c30761791238ce204da Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 24 Jan 2020 14:47:13 -0500 Subject: Return to bootloader options --- ports/stm32f4/Makefile | 2 +- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 2 +- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 6 +++--- 3 files changed, 5 insertions(+), 5 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index 1b5b2eee2..ccadeac8a 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -22,7 +22,7 @@ # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN # THE SOFTWARE. -DEBUG = 1 +# DEBUG = 1 # Select the board to build for. ifeq ($(BOARD),) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index 2d8ff8761..c849e03b6 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -37,7 +37,7 @@ #define BOARD_OSC_DIV 12 #define BOARD_NO_VBUS_SENSE -//#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader +#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader #define BOARD_USE_INTERNAL_SPI // On-board flash diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index e45d2803f..340fd9d3b 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -9,7 +9,7 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ LONGINT_IMPL = MPZ -# BOOTLOADER_OFFSET = 0x8010000 +BOOTLOADER_OFFSET = 0x8010000 # INTERNAL_FLASH_FILESYSTEM = 1 # LONGINT_IMPL = NONE @@ -19,5 +19,5 @@ MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE -#LD_FILE = boards/STM32F401_boot.ld -LD_FILE = boards/STM32F401_fs.ld \ No newline at end of file +LD_FILE = boards/STM32F401_boot.ld +# LD_FILE = boards/STM32F401_fs.ld #use for internal flash \ No newline at end of file -- cgit v1.2.3 From cb6193bbc76ee702128c44a95bc8184abcb04177 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Sun, 26 Jan 2020 15:36:12 -0600 Subject: samd: When possible, use one DMA channel for stereo AudioOut .. the documentation doesn't make this clear, but in practice it works to write both of the DATABUF registers at the same time. This should also reduce the amount of wear and tear DMA puts on the system, as the number of transfers is cut in half. (the number of bytes transferred remains the same, though) In principle, this could cover all stereo cases if audio_dma_convert_signed also learned to 16-bit extend and swap values. However, this is the case that matters for stereo mp3 playback on PyGamer. Testing performed: Listened to some tracks with good stereo separation. --- ports/atmel-samd/common-hal/audioio/AudioOut.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/audioio/AudioOut.c b/ports/atmel-samd/common-hal/audioio/AudioOut.c index 36ab52006..b75c2b335 100644 --- a/ports/atmel-samd/common-hal/audioio/AudioOut.c +++ b/ports/atmel-samd/common-hal/audioio/AudioOut.c @@ -397,15 +397,22 @@ void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, if (self->right_channel == &pin_PA02) { right_channel_reg = (uint32_t) &DAC->DATABUF[0].reg; } - result = audio_dma_setup_playback(&self->left_dma, sample, loop, true, 0, - false /* output unsigned */, - left_channel_reg, - left_channel_trigger); - if (right_channel_reg != 0 && result == AUDIO_DMA_OK) { - result = audio_dma_setup_playback(&self->right_dma, sample, loop, true, 1, + if(right_channel_reg == left_channel_reg + 2 && audiosample_bits_per_sample(sample) == 16) { + result = audio_dma_setup_playback(&self->left_dma, sample, loop, false, 0, false /* output unsigned */, - right_channel_reg, - right_channel_trigger); + left_channel_reg, + left_channel_trigger); + } else { + result = audio_dma_setup_playback(&self->left_dma, sample, loop, true, 0, + false /* output unsigned */, + left_channel_reg, + left_channel_trigger); + if (right_channel_reg != 0 && result == AUDIO_DMA_OK) { + result = audio_dma_setup_playback(&self->right_dma, sample, loop, true, 1, + false /* output unsigned */, + right_channel_reg, + right_channel_trigger); + } } #endif if (result != AUDIO_DMA_OK) { -- cgit v1.2.3 From f2dfcee04241faad5edb7ef678c95cecf7408c60 Mon Sep 17 00:00:00 2001 From: Lady Ada Date: Sun, 26 Jan 2020 20:10:20 -0500 Subject: add missing displayref --- ports/nrf/boards/clue_nrf52840_express/pins.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'ports') diff --git a/ports/nrf/boards/clue_nrf52840_express/pins.c b/ports/nrf/boards/clue_nrf52840_express/pins.c index b13d1977f..2926f46e0 100644 --- a/ports/nrf/boards/clue_nrf52840_express/pins.c +++ b/ports/nrf/boards/clue_nrf52840_express/pins.c @@ -1,5 +1,8 @@ #include "shared-bindings/board/__init__.h" +#include "boards/board.h" +#include "shared-module/displayio/__init__.h" + STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0), MP_ROM_PTR(&pin_P0_04) }, { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_04) }, @@ -96,6 +99,8 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)} }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From c8f969feb5f8dcdbe7716403e0a48d63ebb19352 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 27 Jan 2020 08:49:41 -0600 Subject: samd: audio-dma: avoid memory allocations With the previous change, stereo mp3 playback changed from needing 4 2304-byte allocations to needing 2 4604-byte allocations. This was enough to cause MemoryErrors with regularity. By using m_realloc() here, the existing memory region can be used. m_realloc() also works on the first invocation, because m_realloc(NULL, sz) just calls m_malloc of sz. --- ports/atmel-samd/audio_dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/audio_dma.c b/ports/atmel-samd/audio_dma.c index 0478cc9bf..352af8980 100644 --- a/ports/atmel-samd/audio_dma.c +++ b/ports/atmel-samd/audio_dma.c @@ -203,13 +203,13 @@ audio_dma_result audio_dma_setup_playback(audio_dma_t* dma, if (output_signed != samples_signed) { output_spacing = 1; max_buffer_length /= dma->spacing; - dma->first_buffer = (uint8_t*) m_malloc(max_buffer_length, false); + dma->first_buffer = (uint8_t*) m_realloc(dma->first_buffer, max_buffer_length); if (dma->first_buffer == NULL) { return AUDIO_DMA_MEMORY_ERROR; } dma->first_buffer_free = true; if (!single_buffer) { - dma->second_buffer = (uint8_t*) m_malloc(max_buffer_length, false); + dma->second_buffer = (uint8_t*) m_realloc(dma->second_buffer, max_buffer_length); if (dma->second_buffer == NULL) { return AUDIO_DMA_MEMORY_ERROR; } -- cgit v1.2.3 From df5e58fc6ed0c09668498da768f0d4ad2bbbefb3 Mon Sep 17 00:00:00 2001 From: Wojtek Siudzinski Date: Tue, 28 Jan 2020 10:53:50 +0100 Subject: Add support for the Particle Ethernet FeatherWing --- ports/nrf/Makefile | 26 ++++++++++++++++++++++++ ports/nrf/boards/particle_argon/mpconfigboard.mk | 4 ++++ ports/nrf/boards/particle_boron/mpconfigboard.mk | 4 ++++ ports/nrf/boards/particle_xenon/mpconfigboard.mk | 4 ++++ 4 files changed, 38 insertions(+) (limited to 'ports') diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile index 75bf23fc8..47a5b8653 100755 --- a/ports/nrf/Makefile +++ b/ports/nrf/Makefile @@ -183,6 +183,32 @@ SRC_C += \ lib/tinyusb/src/portable/nordic/nrf5x/dcd_nrf5x.c endif +ifeq ($(CIRCUITPY_NETWORK),1) +CFLAGS += -DMICROPY_PY_NETWORK=1 + +SRC_MOD += lib/netutils/netutils.c + +ifneq ($(MICROPY_PY_WIZNET5K),0) +WIZNET5K_DIR=drivers/wiznet5k +INC += -I$(TOP)/$(WIZNET5K_DIR) +CFLAGS_MOD += -DMICROPY_PY_WIZNET5K=$(MICROPY_PY_WIZNET5K) -D_WIZCHIP_=$(MICROPY_PY_WIZNET5K) +SRC_MOD += $(addprefix $(WIZNET5K_DIR)/,\ + ethernet/w$(MICROPY_PY_WIZNET5K)/w$(MICROPY_PY_WIZNET5K).c \ + ethernet/wizchip_conf.c \ + ethernet/socket.c \ + internet/dns/dns.c \ + internet/dhcp/dhcp.c \ + ) + +endif # MICROPY_PY_WIZNET5K +endif # CIRCUITPY_NETWORK + +ifeq ($(CIRCUITPY_NETWORK),1) +ifneq ($(MICROPY_PY_WIZNET5K),0) +SRC_SHARED_MODULE += wiznet/__init__.c wiznet/wiznet5k.c +endif +endif + SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ $(addprefix common-hal/, $(SRC_COMMON_HAL)) diff --git a/ports/nrf/boards/particle_argon/mpconfigboard.mk b/ports/nrf/boards/particle_argon/mpconfigboard.mk index f8d3d2aca..a0edfda95 100644 --- a/ports/nrf/boards/particle_argon/mpconfigboard.mk +++ b/ports/nrf/boards/particle_argon/mpconfigboard.mk @@ -8,3 +8,7 @@ MCU_CHIP = nrf52840 QSPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = "MX25L3233F" + +# Support for the Ethernet FeatherWing +CIRCUITPY_NETWORK = 1 +MICROPY_PY_WIZNET5K = 5500 \ No newline at end of file diff --git a/ports/nrf/boards/particle_boron/mpconfigboard.mk b/ports/nrf/boards/particle_boron/mpconfigboard.mk index eada97a73..ccb2d63a1 100644 --- a/ports/nrf/boards/particle_boron/mpconfigboard.mk +++ b/ports/nrf/boards/particle_boron/mpconfigboard.mk @@ -8,3 +8,7 @@ MCU_CHIP = nrf52840 QSPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = "MX25L3233F" + +# Support for the Ethernet FeatherWing +CIRCUITPY_NETWORK = 1 +MICROPY_PY_WIZNET5K = 5500 \ No newline at end of file diff --git a/ports/nrf/boards/particle_xenon/mpconfigboard.mk b/ports/nrf/boards/particle_xenon/mpconfigboard.mk index 6062da378..3970b1d05 100644 --- a/ports/nrf/boards/particle_xenon/mpconfigboard.mk +++ b/ports/nrf/boards/particle_xenon/mpconfigboard.mk @@ -8,3 +8,7 @@ MCU_CHIP = nrf52840 QSPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = "MX25L3233F" + +# Support for the Ethernet FeatherWing +CIRCUITPY_NETWORK = 1 +MICROPY_PY_WIZNET5K = 5500 \ No newline at end of file -- cgit v1.2.3 From ab9483b7fb50db46d9cb6abe54641787f5acd7c9 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Tue, 28 Jan 2020 16:00:34 -0500 Subject: Add internal display definitions, fails at startup --- ports/stm32f4/boards/meowbit_v121/board.c | 82 ++++++++++++++++++++++ ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 2 +- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 6 +- ports/stm32f4/boards/meowbit_v121/pins.c | 4 ++ 4 files changed, 90 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/board.c b/ports/stm32f4/boards/meowbit_v121/board.c index 82b0c506e..2fa372980 100644 --- a/ports/stm32f4/boards/meowbit_v121/board.c +++ b/ports/stm32f4/boards/meowbit_v121/board.c @@ -27,7 +27,89 @@ #include "boards/board.h" #include "mpconfigboard.h" +#include "shared-bindings/board/__init__.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" +#include "shared-bindings/busio/SPI.h" + +#include "supervisor/spi_flash_api.h" + +#include "tick.h" + +displayio_fourwire_obj_t board_display_obj; + +#define DELAY 0x80 + +uint8_t display_init_sequence[] = { + 0x01, 0 | DELAY, 150, // SWRESET + 0x11, 0 | DELAY, 255, // SLPOUT + 0xb1, 3, 0x01, 0x2C, 0x2D, // _FRMCTR1 + 0xb2, 3, 0x01, 0x2C, 0x2D, // + 0xb3, 6, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D, + 0xb4, 1, 0x07, // _INVCTR line inversion + 0xc0, 3, 0xa2, 0x02, 0x84, // _PWCTR1 GVDD = 4.7V, 1.0uA + 0xc1, 1, 0xc5, // _PWCTR2 VGH=14.7V, VGL=-7.35V + 0xc2, 2, 0x0a, 0x00, // _PWCTR3 Opamp current small, Boost frequency + 0xc3, 2, 0x8a, 0x2a, + 0xc4, 2, 0x8a, 0xee, + 0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V + 0x20, 0, // _INVOFF //MISMATCh 0x2a vs 0x20 + 0x36, 1, 0x18, // _MADCTL bottom to top refresh + // 1 clk cycle nonoverlap, 2 cycle gate rise, 3 sycle osc equalie, + // fix on VTL + 0x3a, 1, 0x05, // COLMOD - 16bit color + 0xe0, 0x10, 0x02, 0x1c, 0x07, 0x12, + 0x37, 0x32, 0x29, 0x2d, + 0x29, 0x25, 0x2B, 0x39, + 0x00, 0x01, 0x03, 0x10, // _GMCTRP1 Gamma + 0xe1, 0x10, 0x03, 0x1d, 0x07, 0x06, + 0x2E, 0x2C, 0x29, 0x2D, + 0x2E, 0x2E, 0x37, 0x3F, + 0x00, 0x00, 0x02, 0x10, // _GMCTRN1 + 0x13, 0 | DELAY, 10, // _NORON + 0x29, 0 | DELAY, 100, // _DISPON +}; + void board_init(void) { + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + busio_spi_obj_t *internal_spi = &spi; + common_hal_displayio_fourwire_construct(bus, + internal_spi, + &pin_PA08, // Command or data + &pin_PB12, // Chip select + &pin_PB10, // Reset + 24000000); + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 160, // Width + 128, // Height + 0, // column start + 0, // row start + 90, // rotation + 16, // Color depth + false, // Grayscale + false, // Pixels in a byte share a row. Only used for depth < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_PB03, + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60); // native_frames_per_second } bool board_requests_safe_mode(void) { diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index c849e03b6..b80715383 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -37,7 +37,7 @@ #define BOARD_OSC_DIV 12 #define BOARD_NO_VBUS_SENSE -#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader +// #define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader #define BOARD_USE_INTERNAL_SPI // On-board flash diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index 340fd9d3b..c813b4120 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -9,7 +9,7 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ LONGINT_IMPL = MPZ -BOOTLOADER_OFFSET = 0x8010000 +# BOOTLOADER_OFFSET = 0x8010000 # INTERNAL_FLASH_FILESYSTEM = 1 # LONGINT_IMPL = NONE @@ -19,5 +19,5 @@ MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE -LD_FILE = boards/STM32F401_boot.ld -# LD_FILE = boards/STM32F401_fs.ld #use for internal flash \ No newline at end of file +# LD_FILE = boards/STM32F401_boot.ld +LD_FILE = boards/STM32F401_fs.ld #use for internal flash \ No newline at end of file diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c index 0cdbefd59..def551c3b 100644 --- a/ports/stm32f4/boards/meowbit_v121/pins.c +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -1,6 +1,8 @@ #include "shared-bindings/board/__init__.h" #include "supervisor/spi_flash_api.h" +#include "shared-module/displayio/__init__.h" + STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PB04) }, { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_PB05) }, @@ -61,5 +63,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_PB00) }, { MP_ROM_QSTR(MP_QSTR_INTERNAL_SPI), MP_ROM_PTR(&spi) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)}, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From 3c8600554654926fe88d65fc0b5d668c0bea476a Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Tue, 28 Jan 2020 17:11:25 -0500 Subject: Implement requested changes --- ports/stm32f4/boards/meowbit_v121/pins.c | 2 +- ports/stm32f4/common-hal/pulseio/PWMOut.c | 6 +++--- shared-module/displayio/__init__.c | 2 +- supervisor/shared/external_flash/spi_flash.c | 32 ++++++++++++++-------------- supervisor/spi_flash_api.h | 2 +- 5 files changed, 22 insertions(+), 22 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c index 0cdbefd59..1489c23f1 100644 --- a/ports/stm32f4/boards/meowbit_v121/pins.c +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -60,6 +60,6 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0), MP_ROM_PTR(&pin_PA00) }, { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_PB00) }, - { MP_ROM_QSTR(MP_QSTR_INTERNAL_SPI), MP_ROM_PTR(&spi) }, + { MP_ROM_QSTR(MP_QSTR_INTERNAL_SPI), MP_ROM_PTR(&supervisor_flash_spi_bus) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm32f4/common-hal/pulseio/PWMOut.c b/ports/stm32f4/common-hal/pulseio/PWMOut.c index 000325be3..29376691b 100644 --- a/ports/stm32f4/common-hal/pulseio/PWMOut.c +++ b/ports/stm32f4/common-hal/pulseio/PWMOut.c @@ -68,9 +68,9 @@ STATIC uint32_t timer_get_source_freq(uint32_t tim_id) { } STATIC uint32_t timer_get_internal_duty(uint16_t duty, uint32_t period) { - //duty cycle is (0xFFFF - duty)/0xFFFF fraction x (number of pulses per period) + //duty cycle is duty/0xFFFF fraction x (number of pulses per period) //Note that pulses are inverted, so duty cycle is inverted - return ((0xFFFF - duty)*period) / ((1 << 16) - 1); + return (duty*period) / ((1 << 16) - 1); } STATIC void timer_get_optimal_divisors(uint32_t*period, uint32_t*prescaler, @@ -203,7 +203,7 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, //Channel/PWM init self->chan_handle.OCMode = TIM_OCMODE_PWM1; self->chan_handle.Pulse = timer_get_internal_duty(duty, period); - self->chan_handle.OCPolarity = TIM_OCPOLARITY_LOW; + self->chan_handle.OCPolarity = TIM_OCPOLARITY_HIGH; self->chan_handle.OCFastMode = TIM_OCFAST_DISABLE; self->chan_handle.OCNPolarity = TIM_OCNPOLARITY_LOW; // needed for TIM1 and TIM8 self->chan_handle.OCIdleState = TIM_OCIDLESTATE_SET; // needed for TIM1 and TIM8 diff --git a/shared-module/displayio/__init__.c b/shared-module/displayio/__init__.c index 8d9f14883..efa61265e 100644 --- a/shared-module/displayio/__init__.c +++ b/shared-module/displayio/__init__.c @@ -104,7 +104,7 @@ void reset_displays(void) { } #endif #ifdef BOARD_USE_INTERNAL_SPI - if (original_spi == (mp_obj_t)(&spi)) { + if (original_spi == (mp_obj_t)(&supervisor_flash_spi_bus)) { continue; } #endif diff --git a/supervisor/shared/external_flash/spi_flash.c b/supervisor/shared/external_flash/spi_flash.c index 12888f2d3..67e64c970 100644 --- a/supervisor/shared/external_flash/spi_flash.c +++ b/supervisor/shared/external_flash/spi_flash.c @@ -36,33 +36,33 @@ #include "py/mpconfig.h" digitalio_digitalinout_obj_t cs_pin; -busio_spi_obj_t spi; +busio_spi_obj_t supervisor_flash_spi_bus; const external_flash_device* flash_device; uint32_t spi_flash_baudrate; // Enable the flash over SPI. static void flash_enable(void) { - while (!common_hal_busio_spi_try_lock(&spi)) {} + while (!common_hal_busio_spi_try_lock(&supervisor_flash_spi_bus)) {} common_hal_digitalio_digitalinout_set_value(&cs_pin, false); } // Disable the flash over SPI. static void flash_disable(void) { common_hal_digitalio_digitalinout_set_value(&cs_pin, true); - common_hal_busio_spi_unlock(&spi); + common_hal_busio_spi_unlock(&supervisor_flash_spi_bus); } static bool transfer(uint8_t* command, uint32_t command_length, uint8_t* data_in, uint8_t* data_out, uint32_t data_length) { flash_enable(); - bool status = common_hal_busio_spi_write(&spi, command, command_length); + bool status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, command, command_length); if (status) { if (data_in != NULL && data_out != NULL) { - status = common_hal_busio_spi_transfer(&spi, data_out, data_in, data_length); + status = common_hal_busio_spi_transfer(&supervisor_flash_spi_bus, data_out, data_in, data_length); } else if (data_out != NULL) { - status = common_hal_busio_spi_read(&spi, data_out, data_length, 0xff); + status = common_hal_busio_spi_read(&supervisor_flash_spi_bus, data_out, data_length, 0xff); } else if (data_in != NULL) { - status = common_hal_busio_spi_write(&spi, data_in, data_length); + status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, data_in, data_length); } } flash_disable(); @@ -103,10 +103,10 @@ bool spi_flash_write_data(uint32_t address, uint8_t* data, uint32_t data_length) // Write the SPI flash write address into the bytes following the command byte. address_to_bytes(address, request + 1); flash_enable(); - common_hal_busio_spi_configure(&spi, spi_flash_baudrate, 0, 0, 8); - bool status = common_hal_busio_spi_write(&spi, request, 4); + common_hal_busio_spi_configure(&supervisor_flash_spi_bus, spi_flash_baudrate, 0, 0, 8); + bool status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, request, 4); if (status) { - status = common_hal_busio_spi_write(&spi, data, data_length); + status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, data, data_length); } flash_disable(); return status; @@ -122,10 +122,10 @@ bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t data_length) // Write the SPI flash write address into the bytes following the command byte. address_to_bytes(address, request + 1); flash_enable(); - common_hal_busio_spi_configure(&spi, spi_flash_baudrate, 0, 0, 8); - bool status = common_hal_busio_spi_write(&spi, request, command_length); + common_hal_busio_spi_configure(&supervisor_flash_spi_bus, spi_flash_baudrate, 0, 0, 8); + bool status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, request, command_length); if (status) { - status = common_hal_busio_spi_read(&spi, data, data_length, 0xff); + status = common_hal_busio_spi_read(&supervisor_flash_spi_bus, data, data_length, 0xff); } flash_disable(); return status; @@ -140,9 +140,9 @@ void spi_flash_init(void) { common_hal_digitalio_digitalinout_switch_to_output(&cs_pin, true, DRIVE_MODE_PUSH_PULL); common_hal_digitalio_digitalinout_never_reset(&cs_pin); - spi.base.type = &busio_spi_type; - common_hal_busio_spi_construct(&spi, SPI_FLASH_SCK_PIN, SPI_FLASH_MOSI_PIN, SPI_FLASH_MISO_PIN); - common_hal_busio_spi_never_reset(&spi); + supervisor_flash_spi_bus.base.type = &busio_spi_type; + common_hal_busio_spi_construct(&supervisor_flash_spi_bus, SPI_FLASH_SCK_PIN, SPI_FLASH_MOSI_PIN, SPI_FLASH_MISO_PIN); + common_hal_busio_spi_never_reset(&supervisor_flash_spi_bus); } void spi_flash_init_device(const external_flash_device* device) { diff --git a/supervisor/spi_flash_api.h b/supervisor/spi_flash_api.h index b477308ba..f59346e25 100644 --- a/supervisor/spi_flash_api.h +++ b/supervisor/spi_flash_api.h @@ -33,7 +33,7 @@ #include "shared-bindings/busio/SPI.h" -extern busio_spi_obj_t spi; //Used to share SPI bus on some boards +extern busio_spi_obj_t supervisor_flash_spi_bus; //Used to share SPI bus on some boards // This API is implemented for both normal SPI peripherals and QSPI peripherals. -- cgit v1.2.3 From 947c2243bdc88fed001723939ed6f91851236e8d Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 29 Jan 2020 15:30:35 -0500 Subject: add feather bootloader settings, cleanup --- ports/stm32f4/boards/STM32F401.ld | 132 --------------------- ports/stm32f4/boards/STM32F401_boot.ld | 6 +- ports/stm32f4/boards/STM32F405.ld | 108 ----------------- ports/stm32f4/boards/STM32F405_boot.ld | 108 +++++++++++++++++ ports/stm32f4/boards/STM32F405_fs.ld | 108 +++++++++++++++++ .../feather_stm32f405_express/mpconfigboard.h | 3 + .../feather_stm32f405_express/mpconfigboard.mk | 7 +- ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 2 +- 8 files changed, 227 insertions(+), 247 deletions(-) delete mode 100644 ports/stm32f4/boards/STM32F401.ld delete mode 100644 ports/stm32f4/boards/STM32F405.ld create mode 100644 ports/stm32f4/boards/STM32F405_boot.ld create mode 100644 ports/stm32f4/boards/STM32F405_fs.ld (limited to 'ports') diff --git a/ports/stm32f4/boards/STM32F401.ld b/ports/stm32f4/boards/STM32F401.ld deleted file mode 100644 index bf1f21cf6..000000000 --- a/ports/stm32f4/boards/STM32F401.ld +++ /dev/null @@ -1,132 +0,0 @@ -/* - GNU linker script for STM32F401 with bootloader (from Meowbit Micropython) - Doesn't work: - - Traceback (most recent call last): - File "../../tools/build_memory_info.py", line 64, in - regions[region] = int(eval(space)) - File "", line 1, in -NameError: name 'FLASH_ISR' is not defined -*/ - -/* Specify the memory areas */ -/* FLASH_FS (rx) : ORIGIN = 0x08020000, LENGTH = 128K */ -/* sectors 5 128K */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4, sec 0~3 reserved for booloader */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5, 6,7 are 128K */ - RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define the stack. The stack is full descending so begins just above last byte - of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve; -_sstack = _estack - 16K; /* tunable */ - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); -_heap_start = _ebss; /* heap starts just after statically allocated memory */ -_heap_end = _sstack; - -ENTRY(Reset_Handler) - -/* define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - - /* This first flash block is 16K annd the isr vectors only take up - about 400 bytes. So we pull in a couple of object files to pad it - out. */ - - . = ALIGN(4); - - /* NOTE: If you update the list of files contained in .isr_vector, - then be sure to also update smhal/Makefile where it forcibly - builds each of these files with -Os */ - - */ff.o(.text*) - */vfs_fat_*.o(.text*) - */py/formatfloat.o(.text*) - */py/parsenum.o(.text*) - */py/mpprint.o(.text*) - - */py/compile.o(.text*) - */py/objset.o(.text*) - */py/mpz.o(.text*) - */py/vm.o(.text*) - - . = ALIGN(4); - } >FLASH_ISR - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text*) /* .text* sections (code) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - /* *(.glue_7) */ /* glue arm to thumb code */ - /* *(.glue_7t) */ /* glue thumb to arm code */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - } >FLASH_TEXT - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM AT> FLASH_TEXT - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ - } >RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - . = . + _minimum_heap_size; - . = ALIGN(4); - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/ports/stm32f4/boards/STM32F401_boot.ld b/ports/stm32f4/boards/STM32F401_boot.ld index ffdd7097c..125d785fc 100644 --- a/ports/stm32f4/boards/STM32F401_boot.ld +++ b/ports/stm32f4/boards/STM32F401_boot.ld @@ -5,9 +5,9 @@ /* Specify the memory areas */ MEMORY { - FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash, sans bootloader region */ + FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4 */ + FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5,6,7 are 128K */ RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 } diff --git a/ports/stm32f4/boards/STM32F405.ld b/ports/stm32f4/boards/STM32F405.ld deleted file mode 100644 index 7f7c91784..000000000 --- a/ports/stm32f4/boards/STM32F405.ld +++ /dev/null @@ -1,108 +0,0 @@ -/* - GNU linker script for STM32F405 via Micropython -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ - FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */ - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); - -ENTRY(Reset_Handler) - -/* define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - - /* This first flash block is 16K annd the isr vectors only take up - about 400 bytes. Micropython pads this with files, but this didn't - work with the size of Circuitpython's ff object. */ - - . = ALIGN(4); - } >FLASH_ISR - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text*) /* .text* sections (code) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - /* *(.glue_7) */ /* glue arm to thumb code */ - /* *(.glue_7t) */ /* glue thumb to arm code */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - } >FLASH_TEXT - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM AT> FLASH_TEXT - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ - } >RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - . = . + _minimum_heap_size; - . = ALIGN(4); - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} - - diff --git a/ports/stm32f4/boards/STM32F405_boot.ld b/ports/stm32f4/boards/STM32F405_boot.ld new file mode 100644 index 000000000..cff2af388 --- /dev/null +++ b/ports/stm32f4/boards/STM32F405_boot.ld @@ -0,0 +1,108 @@ +/* + GNU linker script for STM32F405 with bootloader + Based on Micropython +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 1024K - 64K /* entire flash, sans bootloader region */ + FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 0 */ + FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 1024K - 64K - 64K /* sectors 5+ */ + CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/STM32F405_fs.ld b/ports/stm32f4/boards/STM32F405_fs.ld new file mode 100644 index 000000000..7f7c91784 --- /dev/null +++ b/ports/stm32f4/boards/STM32F405_fs.ld @@ -0,0 +1,108 @@ +/* + GNU linker script for STM32F405 via Micropython +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h index a1d83a25a..fb98397a9 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h @@ -40,6 +40,9 @@ #define SPI_FLASH_SCK_PIN (&pin_PB03) #define SPI_FLASH_CS_PIN (&pin_PA15) +// Bootloader only +#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader + #define DEFAULT_I2C_BUS_SCL (&pin_PB06) #define DEFAULT_I2C_BUS_SDA (&pin_PB07) diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk index 5bad4e81f..4fa59d70f 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk @@ -9,11 +9,12 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = GD25Q16C LONGINT_IMPL = MPZ +BOOTLOADER_OFFSET = 0x8010000 + MCU_SERIES = m4 MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f405xx MCU_PACKAGE = 64 CMSIS_MCU = STM32F405xx -LD_FILE = boards/STM32F405.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08010000 \ No newline at end of file +LD_FILE = boards/STM32F405_boot.ld # use for bootloader (external fs only) +# LD_FILE = boards/STM32F405_fs.ld # use for internal filesystem \ No newline at end of file diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index 340fd9d3b..8c24222f3 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -20,4 +20,4 @@ MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE LD_FILE = boards/STM32F401_boot.ld -# LD_FILE = boards/STM32F401_fs.ld #use for internal flash \ No newline at end of file +# LD_FILE = boards/STM32F401_fs.ld # use for internal flash \ No newline at end of file -- cgit v1.2.3 From 8a9c3097e3f622d965dfd55b121c4cce6a66344c Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 29 Jan 2020 16:00:38 -0500 Subject: Add port-specific requested changes --- ports/stm32f4/boards/meowbit_v121/pins.c | 2 +- ports/stm32f4/common-hal/pulseio/PWMOut.c | 13 +++++-------- 2 files changed, 6 insertions(+), 9 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/pins.c b/ports/stm32f4/boards/meowbit_v121/pins.c index 1489c23f1..5d077a04c 100644 --- a/ports/stm32f4/boards/meowbit_v121/pins.c +++ b/ports/stm32f4/boards/meowbit_v121/pins.c @@ -11,7 +11,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_DISP_CS), MP_ROM_PTR(&pin_PB12) }, { MP_ROM_QSTR(MP_QSTR_DISP_DC), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_DISP_RST), MP_ROM_PTR(&pin_PB10) }, - { MP_ROM_QSTR(MP_QSTR_DISP_BL), MP_ROM_PTR(&pin_PB03) }, //what is this, backlight? + { MP_ROM_QSTR(MP_QSTR_DISP_BL), MP_ROM_PTR(&pin_PB03) }, { MP_ROM_QSTR(MP_QSTR_BUZZ), MP_ROM_PTR(&pin_PB08) }, { MP_ROM_QSTR(MP_QSTR_BTNA), MP_ROM_PTR(&pin_PB09) }, diff --git a/ports/stm32f4/common-hal/pulseio/PWMOut.c b/ports/stm32f4/common-hal/pulseio/PWMOut.c index 29376691b..50bacbb51 100644 --- a/ports/stm32f4/common-hal/pulseio/PWMOut.c +++ b/ports/stm32f4/common-hal/pulseio/PWMOut.c @@ -69,7 +69,6 @@ STATIC uint32_t timer_get_source_freq(uint32_t tim_id) { STATIC uint32_t timer_get_internal_duty(uint16_t duty, uint32_t period) { //duty cycle is duty/0xFFFF fraction x (number of pulses per period) - //Note that pulses are inverted, so duty cycle is inverted return (duty*period) / ((1 << 16) - 1); } @@ -114,11 +113,12 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, bool first_time_setup = true; for (uint i = 0; i < tim_num; i++) { - uint8_t l_tim_index = mcu_tim_pin_list[i].tim_index - 1; - uint8_t l_tim_channel = mcu_tim_pin_list[i].channel_index - 1; + const mcu_tim_pin_obj_t * l_tim = &mcu_tim_pin_list[i]; + uint8_t l_tim_index = l_tim->tim_index - 1; + uint8_t l_tim_channel = l_tim->channel_index - 1; //if pin is same - if (mcu_tim_pin_list[i].pin == pin) { + if (l_tim->pin == pin) { //check if the timer has a channel active if (reserved_tim[l_tim_index] != 0) { //is it the same channel? (or all channels reserved by a var-freq) @@ -139,7 +139,7 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, first_time_setup = false; //skip setting up the timer } //No problems taken, so set it up - self->tim = &mcu_tim_pin_list[i]; + self->tim = l_tim; break; } } @@ -205,9 +205,6 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, self->chan_handle.Pulse = timer_get_internal_duty(duty, period); self->chan_handle.OCPolarity = TIM_OCPOLARITY_HIGH; self->chan_handle.OCFastMode = TIM_OCFAST_DISABLE; - self->chan_handle.OCNPolarity = TIM_OCNPOLARITY_LOW; // needed for TIM1 and TIM8 - self->chan_handle.OCIdleState = TIM_OCIDLESTATE_SET; // needed for TIM1 and TIM8 - self->chan_handle.OCNIdleState = TIM_OCNIDLESTATE_SET; // needed for TIM1 and TIM8 if (HAL_TIM_PWM_ConfigChannel(&self->handle, &self->chan_handle, self->channel) != HAL_OK) { mp_raise_ValueError(translate("Could not initialize channel")); } -- cgit v1.2.3 From 100409961aa32e84810d6c86309e66277b4ea902 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 29 Jan 2020 16:29:43 -0500 Subject: Move board_init to main.c --- main.c | 5 +++++ ports/atmel-samd/supervisor/port.c | 3 --- ports/mimxrt10xx/supervisor/port.c | 3 --- ports/nrf/supervisor/port.c | 3 --- ports/stm32f4/supervisor/port.c | 1 - 5 files changed, 5 insertions(+), 10 deletions(-) (limited to 'ports') diff --git a/main.c b/main.c index 805888ddd..52870cc8e 100755 --- a/main.c +++ b/main.c @@ -57,6 +57,8 @@ #include "supervisor/shared/stack.h" #include "supervisor/serial.h" +#include "boards/board.h" + #if CIRCUITPY_DISPLAYIO #include "shared-module/displayio/__init__.h" #endif @@ -425,6 +427,9 @@ int __attribute__((used)) main(void) { // no SPI flash filesystem, and we might erase the existing one. filesystem_init(safe_mode == NO_SAFE_MODE, false); + // displays init after filesystem, since they could share the flash SPI + board_init(); + // Reset everything and prep MicroPython to run boot.py. reset_port(); reset_board(); diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c index 5662b159b..dd812dfeb 100644 --- a/ports/atmel-samd/supervisor/port.c +++ b/ports/atmel-samd/supervisor/port.c @@ -232,9 +232,6 @@ safe_mode_t port_init(void) { // Reset everything into a known state before board_init. reset_port(); - // Init the board last so everything else is ready - board_init(); - #ifdef SAMD21 if (PM->RCAUSE.bit.BOD33 == 1 || PM->RCAUSE.bit.BOD12 == 1) { return BROWNOUT; diff --git a/ports/mimxrt10xx/supervisor/port.c b/ports/mimxrt10xx/supervisor/port.c index 357307427..0399ee61d 100644 --- a/ports/mimxrt10xx/supervisor/port.c +++ b/ports/mimxrt10xx/supervisor/port.c @@ -76,9 +76,6 @@ safe_mode_t port_init(void) { // Reset everything into a known state before board_init. reset_port(); - // Init the board last so everything else is ready - board_init(); - if (board_requests_safe_mode()) { return USER_SAFE_MODE; } diff --git a/ports/nrf/supervisor/port.c b/ports/nrf/supervisor/port.c index af858aa4a..637ab8c36 100644 --- a/ports/nrf/supervisor/port.c +++ b/ports/nrf/supervisor/port.c @@ -92,9 +92,6 @@ safe_mode_t port_init(void) { rtc_init(); #endif - // Will do usb_init() if chip supports USB. - board_init(); - return NO_SAFE_MODE; } diff --git a/ports/stm32f4/supervisor/port.c b/ports/stm32f4/supervisor/port.c index df5a70cd1..19520255e 100644 --- a/ports/stm32f4/supervisor/port.c +++ b/ports/stm32f4/supervisor/port.c @@ -50,7 +50,6 @@ safe_mode_t port_init(void) { stm32f4_peripherals_gpio_init(); tick_init(); - board_init(); return NO_SAFE_MODE; } -- cgit v1.2.3 From 1a25d3ca83e1c50c44d8d6179e4fe092fe96a401 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 29 Jan 2020 18:46:14 -0500 Subject: fix merge issue --- ports/stm32f4/supervisor/port.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/supervisor/port.c b/ports/stm32f4/supervisor/port.c index 397923f23..e9e4720d7 100644 --- a/ports/stm32f4/supervisor/port.c +++ b/ports/stm32f4/supervisor/port.c @@ -51,8 +51,6 @@ safe_mode_t port_init(void) { tick_init(); - board_init(); - return NO_SAFE_MODE; } -- cgit v1.2.3 From 5d24ade5c9f7b1771b5b914835bd7ededc6fcdc0 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Wed, 29 Jan 2020 17:32:07 -0800 Subject: Tweak error messages to reduce code size. --- locale/ID.po | 42 ++------------------ locale/circuitpython.pot | 42 ++------------------ locale/de_DE.po | 58 ++++++++++------------------ locale/en_US.po | 42 ++------------------ locale/en_x_pirate.po | 42 ++------------------ locale/es.po | 65 +++++++++++++------------------ locale/fil.po | 56 ++++++++------------------- locale/fr.po | 65 +++++++++++++------------------ locale/it_IT.po | 56 ++++++++------------------- locale/ko.po | 42 ++------------------ locale/pl.po | 63 ++++++++++++------------------ locale/pt_BR.po | 42 ++------------------ locale/zh_Latn_pinyin.po | 66 ++++++++++++++------------------ ports/atmel-samd/common-hal/busio/UART.c | 2 +- py/objstr.c | 4 +- shared-bindings/displayio/I2CDisplay.c | 2 +- 16 files changed, 187 insertions(+), 502 deletions(-) (limited to 'ports') diff --git a/locale/ID.po b/locale/ID.po index 6bdb0d4c0..36bfc4df6 100644 --- a/locale/ID.po +++ b/locale/ID.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-18 11:56-0800\n" +"POT-Creation-Date: 2020-01-29 17:27-0800\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -512,11 +512,8 @@ msgstr "Clock unit sedang digunakan" msgid "Column entry must be digitalio.DigitalInOut" msgstr "" -#: shared-bindings/displayio/I2CDisplay.c -msgid "Command must be 0-255" -msgstr "" - -#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c msgid "Command must be an int between 0 and 255" msgstr "" @@ -661,10 +658,6 @@ msgstr "" msgid "Expected a Characteristic" msgstr "" -#: shared-bindings/_pixelbuf/__init__.c -msgid "Expected a PixelBuf instance" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -692,11 +685,11 @@ msgstr "" msgid "Failed to acquire mutex, err 0x%04x" msgstr "Gagal untuk mendapatkan mutex, status: 0x%08lX" -#: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Gagal untuk mengalokasikan buffer RX" +#: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -1148,10 +1141,6 @@ msgstr "" msgid "Pin does not have ADC capabilities" msgstr "Pin tidak mempunya kemampuan untuk ADC (Analog Digital Converter)" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Pixel beyond bounds of buffer" -msgstr "" - #: py/builtinhelp.c msgid "Plus any modules on the filesystem\n" msgstr "Tambahkan module apapun pada filesystem\n" @@ -1203,10 +1192,6 @@ msgstr "" msgid "Random number generation error" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Range out of bounds" -msgstr "" - #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" msgstr "" @@ -1632,11 +1617,6 @@ msgstr "" msgid "branch not in range" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, c-format -msgid "buf is too small. need %d bytes" -msgstr "" - #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" msgstr "" @@ -2528,10 +2508,6 @@ msgstr "" msgid "queue overflow" msgstr "antrian meluap (overflow)" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "rawbuf is not the same size as buf" -msgstr "" - #: py/builtinimport.c msgid "relative import" msgstr "relative import" @@ -2765,16 +2741,6 @@ msgstr "" msgid "unknown format code '%c' for object of type '%s'" msgstr "" -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'float'" -msgstr "" - -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'str'" -msgstr "" - #: py/compile.c msgid "unknown type" msgstr "tipe tidak diketahui" diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 35cd63edd..f85bcba83 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-18 11:56-0800\n" +"POT-Creation-Date: 2020-01-29 17:27-0800\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -502,11 +502,8 @@ msgstr "" msgid "Column entry must be digitalio.DigitalInOut" msgstr "" -#: shared-bindings/displayio/I2CDisplay.c -msgid "Command must be 0-255" -msgstr "" - -#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c msgid "Command must be an int between 0 and 255" msgstr "" @@ -650,10 +647,6 @@ msgstr "" msgid "Expected a Characteristic" msgstr "" -#: shared-bindings/_pixelbuf/__init__.c -msgid "Expected a PixelBuf instance" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -681,11 +674,11 @@ msgstr "" msgid "Failed to acquire mutex, err 0x%04x" msgstr "" -#: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "" +#: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -1136,10 +1129,6 @@ msgstr "" msgid "Pin does not have ADC capabilities" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Pixel beyond bounds of buffer" -msgstr "" - #: py/builtinhelp.c msgid "Plus any modules on the filesystem\n" msgstr "" @@ -1189,10 +1178,6 @@ msgstr "" msgid "Random number generation error" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Range out of bounds" -msgstr "" - #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" msgstr "" @@ -1609,11 +1594,6 @@ msgstr "" msgid "branch not in range" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, c-format -msgid "buf is too small. need %d bytes" -msgstr "" - #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" msgstr "" @@ -2503,10 +2483,6 @@ msgstr "" msgid "queue overflow" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "rawbuf is not the same size as buf" -msgstr "" - #: py/builtinimport.c msgid "relative import" msgstr "" @@ -2739,16 +2715,6 @@ msgstr "" msgid "unknown format code '%c' for object of type '%s'" msgstr "" -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'float'" -msgstr "" - -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'str'" -msgstr "" - #: py/compile.c msgid "unknown type" msgstr "" diff --git a/locale/de_DE.po b/locale/de_DE.po index 8fa78d64e..ba1915e43 100644 --- a/locale/de_DE.po +++ b/locale/de_DE.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-18 11:56-0800\n" +"POT-Creation-Date: 2020-01-29 17:27-0800\n" "PO-Revision-Date: 2018-07-27 11:55-0700\n" "Last-Translator: Pascal Deneaux\n" "Language-Team: Sebastian Plamauer, Pascal Deneaux\n" @@ -506,11 +506,8 @@ msgstr "Clock unit wird benutzt" msgid "Column entry must be digitalio.DigitalInOut" msgstr "Spalteneintrag muss digitalio.DigitalInOut sein" -#: shared-bindings/displayio/I2CDisplay.c -msgid "Command must be 0-255" -msgstr "Der Befehl muss zwischen 0 und 255 liegen" - -#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c msgid "Command must be an int between 0 and 255" msgstr "Der Befehl muss ein int zwischen 0 und 255 sein" @@ -654,10 +651,6 @@ msgstr "Erwartet ein(e) %q" msgid "Expected a Characteristic" msgstr "Characteristic wird erwartet" -#: shared-bindings/_pixelbuf/__init__.c -msgid "Expected a PixelBuf instance" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "Ein Service wird erwartet" @@ -685,11 +678,11 @@ msgstr "Kommando nicht gesendet." msgid "Failed to acquire mutex, err 0x%04x" msgstr "Mutex konnte nicht akquiriert werden. Status: 0x%04x" -#: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Konnte keinen RX Buffer allozieren" +#: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -1151,10 +1144,6 @@ msgstr "Zugang verweigert" msgid "Pin does not have ADC capabilities" msgstr "Pin hat keine ADC Funktionalität" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Pixel beyond bounds of buffer" -msgstr "Pixel außerhalb der Puffergrenzen" - #: py/builtinhelp.c msgid "Plus any modules on the filesystem\n" msgstr "und alle Module im Dateisystem \n" @@ -1206,10 +1195,6 @@ msgstr "Eine RTC wird auf diesem Board nicht unterstützt" msgid "Random number generation error" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Range out of bounds" -msgstr "Bereich außerhalb der Grenzen" - #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" msgstr "Nur lesen möglich, da Schreibgeschützt" @@ -1637,11 +1622,6 @@ msgstr "Es müssen 8 oder 16 bits_per_sample sein" msgid "branch not in range" msgstr "Zweig ist außerhalb der Reichweite" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, c-format -msgid "buf is too small. need %d bytes" -msgstr "buf ist zu klein. brauche %d Bytes" - #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" msgstr "Puffer muss ein bytes-artiges Objekt sein" @@ -2541,10 +2521,6 @@ msgstr "" msgid "queue overflow" msgstr "Warteschlangenüberlauf" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "rawbuf is not the same size as buf" -msgstr "rawbuf hat nicht die gleiche Größe wie buf" - #: py/builtinimport.c msgid "relative import" msgstr "relativer Import" @@ -2784,16 +2760,6 @@ msgstr "" msgid "unknown format code '%c' for object of type '%s'" msgstr "" -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'float'" -msgstr "" - -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'str'" -msgstr "" - #: py/compile.c msgid "unknown type" msgstr "unbekannter Typ" @@ -2921,6 +2887,9 @@ msgstr "" #~ msgid "Characteristic already in use by another Service." #~ msgstr "Characteristic wird bereits von einem anderen Dienst verwendet." +#~ msgid "Command must be 0-255" +#~ msgstr "Der Befehl muss zwischen 0 und 255 liegen" + #~ msgid "Could not decode ble_uuid, err 0x%04x" #~ msgstr "Konnte ble_uuid nicht decodieren. Status: 0x%04x" @@ -3122,6 +3091,12 @@ msgstr "" #~ msgid "Pins not valid for SPI" #~ msgstr "Pins nicht gültig für SPI" +#~ msgid "Pixel beyond bounds of buffer" +#~ msgstr "Pixel außerhalb der Puffergrenzen" + +#~ msgid "Range out of bounds" +#~ msgstr "Bereich außerhalb der Grenzen" + #~ msgid "STA must be active" #~ msgstr "STA muss aktiv sein" @@ -3192,6 +3167,10 @@ msgstr "" #~ "Sie laufen im abgesicherten Modus, was bedeutet, dass etwas Unerwartetes " #~ "passiert ist.\n" +#, c-format +#~ msgid "buf is too small. need %d bytes" +#~ msgstr "buf ist zu klein. brauche %d Bytes" + #~ msgid "buffer too long" #~ msgstr "Buffer zu lang" @@ -3251,6 +3230,9 @@ msgstr "" #~ msgid "pin does not have IRQ capabilities" #~ msgstr "Pin hat keine IRQ Fähigkeiten" +#~ msgid "rawbuf is not the same size as buf" +#~ msgstr "rawbuf hat nicht die gleiche Größe wie buf" + #~ msgid "readonly attribute" #~ msgstr "Readonly-Attribut" diff --git a/locale/en_US.po b/locale/en_US.po index df73627e6..c6a78b505 100644 --- a/locale/en_US.po +++ b/locale/en_US.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-18 11:56-0800\n" +"POT-Creation-Date: 2020-01-29 17:27-0800\n" "PO-Revision-Date: 2018-07-27 11:55-0700\n" "Last-Translator: \n" "Language-Team: \n" @@ -502,11 +502,8 @@ msgstr "" msgid "Column entry must be digitalio.DigitalInOut" msgstr "" -#: shared-bindings/displayio/I2CDisplay.c -msgid "Command must be 0-255" -msgstr "" - -#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c msgid "Command must be an int between 0 and 255" msgstr "" @@ -650,10 +647,6 @@ msgstr "" msgid "Expected a Characteristic" msgstr "" -#: shared-bindings/_pixelbuf/__init__.c -msgid "Expected a PixelBuf instance" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -681,11 +674,11 @@ msgstr "" msgid "Failed to acquire mutex, err 0x%04x" msgstr "" -#: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "" +#: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -1136,10 +1129,6 @@ msgstr "" msgid "Pin does not have ADC capabilities" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Pixel beyond bounds of buffer" -msgstr "" - #: py/builtinhelp.c msgid "Plus any modules on the filesystem\n" msgstr "" @@ -1189,10 +1178,6 @@ msgstr "" msgid "Random number generation error" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Range out of bounds" -msgstr "" - #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" msgstr "" @@ -1609,11 +1594,6 @@ msgstr "" msgid "branch not in range" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, c-format -msgid "buf is too small. need %d bytes" -msgstr "" - #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" msgstr "" @@ -2503,10 +2483,6 @@ msgstr "" msgid "queue overflow" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "rawbuf is not the same size as buf" -msgstr "" - #: py/builtinimport.c msgid "relative import" msgstr "" @@ -2739,16 +2715,6 @@ msgstr "" msgid "unknown format code '%c' for object of type '%s'" msgstr "" -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'float'" -msgstr "" - -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'str'" -msgstr "" - #: py/compile.c msgid "unknown type" msgstr "" diff --git a/locale/en_x_pirate.po b/locale/en_x_pirate.po index 58fdf9f70..12ca1d608 100644 --- a/locale/en_x_pirate.po +++ b/locale/en_x_pirate.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-18 11:56-0800\n" +"POT-Creation-Date: 2020-01-29 17:27-0800\n" "PO-Revision-Date: 2018-07-27 11:55-0700\n" "Last-Translator: \n" "Language-Team: @sommersoft, @MrCertainly\n" @@ -506,11 +506,8 @@ msgstr "" msgid "Column entry must be digitalio.DigitalInOut" msgstr "" -#: shared-bindings/displayio/I2CDisplay.c -msgid "Command must be 0-255" -msgstr "" - -#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c msgid "Command must be an int between 0 and 255" msgstr "" @@ -654,10 +651,6 @@ msgstr "" msgid "Expected a Characteristic" msgstr "" -#: shared-bindings/_pixelbuf/__init__.c -msgid "Expected a PixelBuf instance" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -685,11 +678,11 @@ msgstr "" msgid "Failed to acquire mutex, err 0x%04x" msgstr "" -#: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "" +#: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -1140,10 +1133,6 @@ msgstr "" msgid "Pin does not have ADC capabilities" msgstr "Belay that! Th' Pin be not ADC capable" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Pixel beyond bounds of buffer" -msgstr "" - #: py/builtinhelp.c msgid "Plus any modules on the filesystem\n" msgstr "" @@ -1193,10 +1182,6 @@ msgstr "" msgid "Random number generation error" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Range out of bounds" -msgstr "" - #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" msgstr "" @@ -1613,11 +1598,6 @@ msgstr "" msgid "branch not in range" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, c-format -msgid "buf is too small. need %d bytes" -msgstr "" - #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" msgstr "" @@ -2507,10 +2487,6 @@ msgstr "" msgid "queue overflow" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "rawbuf is not the same size as buf" -msgstr "" - #: py/builtinimport.c msgid "relative import" msgstr "" @@ -2743,16 +2719,6 @@ msgstr "" msgid "unknown format code '%c' for object of type '%s'" msgstr "" -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'float'" -msgstr "" - -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'str'" -msgstr "" - #: py/compile.c msgid "unknown type" msgstr "" diff --git a/locale/es.po b/locale/es.po index 6521921a9..b4e098165 100644 --- a/locale/es.po +++ b/locale/es.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-18 11:56-0800\n" +"POT-Creation-Date: 2020-01-29 17:27-0800\n" "PO-Revision-Date: 2018-08-24 22:56-0500\n" "Last-Translator: \n" "Language-Team: \n" @@ -508,11 +508,8 @@ msgstr "Clock unit está siendo utilizado" msgid "Column entry must be digitalio.DigitalInOut" msgstr "Entrada de columna debe ser digitalio.DigitalInOut" -#: shared-bindings/displayio/I2CDisplay.c -msgid "Command must be 0-255" -msgstr "" - -#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c msgid "Command must be an int between 0 and 255" msgstr "Command debe estar entre 0 y 255." @@ -656,10 +653,6 @@ msgstr "Se espera un %q" msgid "Expected a Characteristic" msgstr "Se esperaba una Característica." -#: shared-bindings/_pixelbuf/__init__.c -msgid "Expected a PixelBuf instance" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -687,11 +680,11 @@ msgstr "Fallo enviando comando" msgid "Failed to acquire mutex, err 0x%04x" msgstr "No se puede adquirir el mutex, status: 0x%08lX" -#: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Ha fallado la asignación del buffer RX" +#: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -1150,10 +1143,6 @@ msgstr "Permiso denegado" msgid "Pin does not have ADC capabilities" msgstr "Pin no tiene capacidad ADC" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Pixel beyond bounds of buffer" -msgstr "Pixel beyond bounds of buffer" - #: py/builtinhelp.c #, fuzzy msgid "Plus any modules on the filesystem\n" @@ -1205,11 +1194,6 @@ msgstr "RTC no soportado en esta placa" msgid "Random number generation error" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, fuzzy -msgid "Range out of bounds" -msgstr "address fuera de límites" - #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" msgstr "Solo-lectura" @@ -1634,11 +1618,6 @@ msgstr "bits_per_sample debe ser 8 ó 16" msgid "branch not in range" msgstr "El argumento de chr() no esta en el rango(256)" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, c-format -msgid "buf is too small. need %d bytes" -msgstr "buf es demasiado pequeño. necesita %d bytes" - #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" msgstr "buffer debe de ser un objeto bytes-like" @@ -2542,10 +2521,6 @@ msgstr "pow() con 3 argumentos requiere enteros" msgid "queue overflow" msgstr "desbordamiento de cola(queue)" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "rawbuf is not the same size as buf" -msgstr "rawbuf no es el mismo tamaño que buf" - #: py/builtinimport.c msgid "relative import" msgstr "import relativo" @@ -2781,16 +2756,6 @@ msgstr "especificador de conversión %c desconocido" msgid "unknown format code '%c' for object of type '%s'" msgstr "codigo format desconocido '%c' para el typo de objeto '%s'" -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'float'" -msgstr "codigo format desconocido '%c' para el typo de objeto 'float'" - -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'str'" -msgstr "codigo format desconocido '%c' para objeto de tipo 'str'" - #: py/compile.c msgid "unknown type" msgstr "tipo desconocido" @@ -3143,6 +3108,13 @@ msgstr "paso cero" #~ msgid "Pins not valid for SPI" #~ msgstr "Pines no válidos para SPI" +#~ msgid "Pixel beyond bounds of buffer" +#~ msgstr "Pixel beyond bounds of buffer" + +#, fuzzy +#~ msgid "Range out of bounds" +#~ msgstr "address fuera de límites" + #~ msgid "STA must be active" #~ msgstr "STA debe estar activo" @@ -3222,6 +3194,10 @@ msgstr "paso cero" #~ msgid "bad GATT role" #~ msgstr "mal GATT role" +#, c-format +#~ msgid "buf is too small. need %d bytes" +#~ msgstr "buf es demasiado pequeño. necesita %d bytes" + #~ msgid "buffer too long" #~ msgstr "buffer demasiado largo" @@ -3305,6 +3281,9 @@ msgstr "paso cero" #~ msgid "position must be 2-tuple" #~ msgstr "posición debe ser 2-tuple" +#~ msgid "rawbuf is not the same size as buf" +#~ msgstr "rawbuf no es el mismo tamaño que buf" + #, fuzzy #~ msgid "readonly attribute" #~ msgstr "atributo no legible" @@ -3333,6 +3312,14 @@ msgstr "paso cero" #~ msgid "unknown config param" #~ msgstr "parámetro config desconocido" +#, c-format +#~ msgid "unknown format code '%c' for object of type 'float'" +#~ msgstr "codigo format desconocido '%c' para el typo de objeto 'float'" + +#, c-format +#~ msgid "unknown format code '%c' for object of type 'str'" +#~ msgstr "codigo format desconocido '%c' para objeto de tipo 'str'" + #~ msgid "unknown status param" #~ msgstr "status param desconocido" diff --git a/locale/fil.po b/locale/fil.po index 69d7e169a..86378ba10 100644 --- a/locale/fil.po +++ b/locale/fil.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-18 11:56-0800\n" +"POT-Creation-Date: 2020-01-29 17:27-0800\n" "PO-Revision-Date: 2018-12-20 22:15-0800\n" "Last-Translator: Timothy \n" "Language-Team: fil\n" @@ -510,11 +510,8 @@ msgstr "Clock unit ginagamit" msgid "Column entry must be digitalio.DigitalInOut" msgstr "" -#: shared-bindings/displayio/I2CDisplay.c -msgid "Command must be 0-255" -msgstr "" - -#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c #, fuzzy msgid "Command must be an int between 0 and 255" msgstr "Sa gitna ng 0 o 255 dapat ang bytes." @@ -663,10 +660,6 @@ msgstr "Umasa ng %q" msgid "Expected a Characteristic" msgstr "Hindi mabasa and Characteristic." -#: shared-bindings/_pixelbuf/__init__.c -msgid "Expected a PixelBuf instance" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -695,11 +688,11 @@ msgstr "" msgid "Failed to acquire mutex, err 0x%04x" msgstr "Nabigo sa pag kuha ng mutex, status: 0x%08lX" -#: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Nabigong ilaan ang RX buffer" +#: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -1156,10 +1149,6 @@ msgstr "Walang pahintulot" msgid "Pin does not have ADC capabilities" msgstr "Ang pin ay walang kakayahan sa ADC" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Pixel beyond bounds of buffer" -msgstr "" - #: py/builtinhelp.c msgid "Plus any modules on the filesystem\n" msgstr "Kasama ang kung ano pang modules na sa filesystem\n" @@ -1211,11 +1200,6 @@ msgstr "Hindi supportado ang RTC sa board na ito" msgid "Random number generation error" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, fuzzy -msgid "Range out of bounds" -msgstr "wala sa sakop ang address" - #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" msgstr "Basahin-lamang" @@ -1643,11 +1627,6 @@ msgstr "bits_per_sample ay dapat 8 o 16" msgid "branch not in range" msgstr "branch wala sa range" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, c-format -msgid "buf is too small. need %d bytes" -msgstr "" - #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" msgstr "buffer ay dapat bytes-like object" @@ -2556,10 +2535,6 @@ msgstr "pow() na may 3 argumento kailangan ng integers" msgid "queue overflow" msgstr "puno na ang pila (overflow)" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "rawbuf is not the same size as buf" -msgstr "" - #: py/builtinimport.c msgid "relative import" msgstr "relative import" @@ -2796,16 +2771,6 @@ msgstr "hindi alam ang conversion specifier na %c" msgid "unknown format code '%c' for object of type '%s'" msgstr "hindi alam ang format code '%c' para sa object na ang type ay '%s'" -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'float'" -msgstr "hindi alam ang format code '%c' sa object na ang type ay 'float'" - -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'str'" -msgstr "hindi alam ang format ng code na '%c' para sa object ng type ay 'str'" - #: py/compile.c msgid "unknown type" msgstr "hindi malaman ang type (unknown type)" @@ -3123,6 +3088,10 @@ msgstr "zero step" #~ msgid "Pins not valid for SPI" #~ msgstr "Mali ang pins para sa SPI" +#, fuzzy +#~ msgid "Range out of bounds" +#~ msgstr "wala sa sakop ang address" + #~ msgid "STA must be active" #~ msgstr "Dapat aktibo ang STA" @@ -3285,6 +3254,15 @@ msgstr "zero step" #~ msgid "unknown config param" #~ msgstr "hindi alam na config param" +#, c-format +#~ msgid "unknown format code '%c' for object of type 'float'" +#~ msgstr "hindi alam ang format code '%c' sa object na ang type ay 'float'" + +#, c-format +#~ msgid "unknown format code '%c' for object of type 'str'" +#~ msgstr "" +#~ "hindi alam ang format ng code na '%c' para sa object ng type ay 'str'" + #~ msgid "unknown status param" #~ msgstr "hindi alam na status param" diff --git a/locale/fr.po b/locale/fr.po index a9124679f..b522b253d 100644 --- a/locale/fr.po +++ b/locale/fr.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: 0.1\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-18 11:56-0800\n" +"POT-Creation-Date: 2020-01-29 17:27-0800\n" "PO-Revision-Date: 2019-04-14 20:05+0100\n" "Last-Translator: Pierrick Couturier \n" "Language-Team: fr\n" @@ -515,11 +515,8 @@ msgstr "Horloge en cours d'utilisation" msgid "Column entry must be digitalio.DigitalInOut" msgstr "L'entrée 'Column' doit être un digitalio.DigitalInOut" -#: shared-bindings/displayio/I2CDisplay.c -msgid "Command must be 0-255" -msgstr "" - -#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c #, fuzzy msgid "Command must be an int between 0 and 255" msgstr "La commande doit être un entier entre 0 et 255" @@ -666,10 +663,6 @@ msgstr "Attendu un %q" msgid "Expected a Characteristic" msgstr "Une 'Characteristic' est attendue" -#: shared-bindings/_pixelbuf/__init__.c -msgid "Expected a PixelBuf instance" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -698,11 +691,11 @@ msgstr "" msgid "Failed to acquire mutex, err 0x%04x" msgstr "Echec de l'obtention de mutex, err 0x%04x" -#: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Echec de l'allocation du tampon RX" +#: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -1170,10 +1163,6 @@ msgstr "Permission refusée" msgid "Pin does not have ADC capabilities" msgstr "La broche ne peut être utilisée pour l'ADC" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Pixel beyond bounds of buffer" -msgstr "Pixel au-delà des limites du tampon" - #: py/builtinhelp.c #, fuzzy msgid "Plus any modules on the filesystem\n" @@ -1224,11 +1213,6 @@ msgstr "RTC non supportée sur cette carte" msgid "Random number generation error" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, fuzzy -msgid "Range out of bounds" -msgstr "adresse hors limites" - #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" msgstr "Lecture seule" @@ -1662,11 +1646,6 @@ msgstr "'bits_per_sample' doivent être 8 ou 16" msgid "branch not in range" msgstr "branche hors-bornes" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, c-format -msgid "buf is too small. need %d bytes" -msgstr "'buf' est trop petit. Besoin de %d octets" - #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" msgstr "le tampon doit être un objet bytes-like" @@ -2589,10 +2568,6 @@ msgstr "pow() avec 3 arguments nécessite des entiers" msgid "queue overflow" msgstr "dépassement de file" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "rawbuf is not the same size as buf" -msgstr "'rawbuf' n'est pas de la même taille que 'buf'" - #: py/builtinimport.c msgid "relative import" msgstr "import relatif" @@ -2830,16 +2805,6 @@ msgstr "spécification %c de conversion inconnue" msgid "unknown format code '%c' for object of type '%s'" msgstr "code de format '%c' inconnu pour un objet de type '%s'" -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'float'" -msgstr "code de format '%c' inconnu pour un objet de type 'float'" - -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'str'" -msgstr "code de format '%c' inconnu pour un objet de type 'str'" - #: py/compile.c msgid "unknown type" msgstr "type inconnu" @@ -3201,6 +3166,13 @@ msgstr "'step' nul" #~ msgid "Pins not valid for SPI" #~ msgstr "Broche invalide pour le SPI" +#~ msgid "Pixel beyond bounds of buffer" +#~ msgstr "Pixel au-delà des limites du tampon" + +#, fuzzy +#~ msgid "Range out of bounds" +#~ msgstr "adresse hors limites" + #~ msgid "STA must be active" #~ msgstr "'STA' doit être actif" @@ -3281,6 +3253,10 @@ msgstr "'step' nul" #~ msgid "bad GATT role" #~ msgstr "mauvais rôle GATT" +#, c-format +#~ msgid "buf is too small. need %d bytes" +#~ msgstr "'buf' est trop petit. Besoin de %d octets" + #~ msgid "buffer too long" #~ msgstr "tampon trop long" @@ -3364,6 +3340,9 @@ msgstr "'step' nul" #~ msgid "position must be 2-tuple" #~ msgstr "position doit être un 2-tuple" +#~ msgid "rawbuf is not the same size as buf" +#~ msgstr "'rawbuf' n'est pas de la même taille que 'buf'" + #, fuzzy #~ msgid "readonly attribute" #~ msgstr "attribut en lecture seule" @@ -3389,6 +3368,14 @@ msgstr "'step' nul" #~ msgid "unknown config param" #~ msgstr "paramètre de config. inconnu" +#, c-format +#~ msgid "unknown format code '%c' for object of type 'float'" +#~ msgstr "code de format '%c' inconnu pour un objet de type 'float'" + +#, c-format +#~ msgid "unknown format code '%c' for object of type 'str'" +#~ msgstr "code de format '%c' inconnu pour un objet de type 'str'" + #~ msgid "unknown status param" #~ msgstr "paramètre de statut inconnu" diff --git a/locale/it_IT.po b/locale/it_IT.po index 6164f6cf8..e4a06b769 100644 --- a/locale/it_IT.po +++ b/locale/it_IT.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-18 11:56-0800\n" +"POT-Creation-Date: 2020-01-29 17:27-0800\n" "PO-Revision-Date: 2018-10-02 16:27+0200\n" "Last-Translator: Enrico Paganin \n" "Language-Team: \n" @@ -511,11 +511,8 @@ msgstr "Unità di clock in uso" msgid "Column entry must be digitalio.DigitalInOut" msgstr "" -#: shared-bindings/displayio/I2CDisplay.c -msgid "Command must be 0-255" -msgstr "" - -#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c #, fuzzy msgid "Command must be an int between 0 and 255" msgstr "I byte devono essere compresi tra 0 e 255" @@ -663,10 +660,6 @@ msgstr "Atteso un %q" msgid "Expected a Characteristic" msgstr "Non è possibile aggiungere Characteristic." -#: shared-bindings/_pixelbuf/__init__.c -msgid "Expected a PixelBuf instance" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -695,11 +688,11 @@ msgstr "" msgid "Failed to acquire mutex, err 0x%04x" msgstr "Impossibile leggere valore dell'attributo. status: 0x%02x" -#: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Impossibile allocare buffer RX" +#: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -1165,10 +1158,6 @@ msgstr "Permesso negato" msgid "Pin does not have ADC capabilities" msgstr "Il pin non ha capacità di ADC" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Pixel beyond bounds of buffer" -msgstr "" - #: py/builtinhelp.c #, fuzzy msgid "Plus any modules on the filesystem\n" @@ -1220,11 +1209,6 @@ msgstr "RTC non supportato su questa scheda" msgid "Random number generation error" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, fuzzy -msgid "Range out of bounds" -msgstr "indirizzo fuori limite" - #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" msgstr "Sola lettura" @@ -1648,11 +1632,6 @@ msgstr "i bit devono essere 7, 8 o 9" msgid "branch not in range" msgstr "argomento di chr() non è in range(256)" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, c-format -msgid "buf is too small. need %d bytes" -msgstr "" - #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" msgstr "" @@ -2563,10 +2542,6 @@ msgstr "pow() con 3 argomenti richiede interi" msgid "queue overflow" msgstr "overflow della coda" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "rawbuf is not the same size as buf" -msgstr "" - #: py/builtinimport.c msgid "relative import" msgstr "importazione relativa" @@ -2803,16 +2778,6 @@ msgstr "specificatore di conversione %s sconosciuto" msgid "unknown format code '%c' for object of type '%s'" msgstr "codice di formattaione '%c' sconosciuto per oggetto di tipo '%s'" -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'float'" -msgstr "codice di formattazione '%c' sconosciuto per oggetto di tipo 'float'" - -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'str'" -msgstr "codice di formattazione '%c' sconosciuto per oggetto di tipo 'str'" - #: py/compile.c msgid "unknown type" msgstr "tipo sconosciuto" @@ -3134,6 +3099,10 @@ msgstr "zero step" #~ msgid "Pins not valid for SPI" #~ msgstr "Pin non validi per SPI" +#, fuzzy +#~ msgid "Range out of bounds" +#~ msgstr "indirizzo fuori limite" + #~ msgid "STA must be active" #~ msgstr "STA deve essere attiva" @@ -3272,6 +3241,15 @@ msgstr "zero step" #~ msgid "unknown config param" #~ msgstr "parametro di configurazione sconosciuto" +#, c-format +#~ msgid "unknown format code '%c' for object of type 'float'" +#~ msgstr "" +#~ "codice di formattazione '%c' sconosciuto per oggetto di tipo 'float'" + +#, c-format +#~ msgid "unknown format code '%c' for object of type 'str'" +#~ msgstr "codice di formattazione '%c' sconosciuto per oggetto di tipo 'str'" + #~ msgid "unknown status param" #~ msgstr "prametro di stato sconosciuto" diff --git a/locale/ko.po b/locale/ko.po index ee4800626..fa4936682 100644 --- a/locale/ko.po +++ b/locale/ko.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-18 11:56-0800\n" +"POT-Creation-Date: 2020-01-29 17:27-0800\n" "PO-Revision-Date: 2019-05-06 14:22-0700\n" "Last-Translator: \n" "Language-Team: LANGUAGE \n" @@ -506,11 +506,8 @@ msgstr "" msgid "Column entry must be digitalio.DigitalInOut" msgstr "" -#: shared-bindings/displayio/I2CDisplay.c -msgid "Command must be 0-255" -msgstr "" - -#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c msgid "Command must be an int between 0 and 255" msgstr "명령은 0에서 255 사이의 정수(int) 여야합니다" @@ -654,10 +651,6 @@ msgstr "%q 이 예상되었습니다." msgid "Expected a Characteristic" msgstr "특성(Characteristic)이 예상되었습니다." -#: shared-bindings/_pixelbuf/__init__.c -msgid "Expected a PixelBuf instance" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -685,11 +678,11 @@ msgstr "" msgid "Failed to acquire mutex, err 0x%04x" msgstr "" -#: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "" +#: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -1140,10 +1133,6 @@ msgstr "" msgid "Pin does not have ADC capabilities" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Pixel beyond bounds of buffer" -msgstr "" - #: py/builtinhelp.c msgid "Plus any modules on the filesystem\n" msgstr "" @@ -1193,10 +1182,6 @@ msgstr "" msgid "Random number generation error" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Range out of bounds" -msgstr "" - #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" msgstr "" @@ -1614,11 +1599,6 @@ msgstr "bits_per_sample은 8 또는 16이어야합니다." msgid "branch not in range" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, c-format -msgid "buf is too small. need %d bytes" -msgstr "" - #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" msgstr "" @@ -2508,10 +2488,6 @@ msgstr "" msgid "queue overflow" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "rawbuf is not the same size as buf" -msgstr "" - #: py/builtinimport.c msgid "relative import" msgstr "" @@ -2744,16 +2720,6 @@ msgstr "" msgid "unknown format code '%c' for object of type '%s'" msgstr "" -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'float'" -msgstr "" - -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'str'" -msgstr "" - #: py/compile.c msgid "unknown type" msgstr "" diff --git a/locale/pl.po b/locale/pl.po index 6a009357d..70106112e 100644 --- a/locale/pl.po +++ b/locale/pl.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-18 11:56-0800\n" +"POT-Creation-Date: 2020-01-29 17:27-0800\n" "PO-Revision-Date: 2019-03-19 18:37-0700\n" "Last-Translator: Radomir Dopieralski \n" "Language-Team: pl\n" @@ -505,11 +505,8 @@ msgstr "Jednostka zegara w użyciu" msgid "Column entry must be digitalio.DigitalInOut" msgstr "Kolumny muszą być typu digitalio.DigitalInOut" -#: shared-bindings/displayio/I2CDisplay.c -msgid "Command must be 0-255" -msgstr "" - -#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c msgid "Command must be an int between 0 and 255" msgstr "Komenda musi być int pomiędzy 0 a 255" @@ -653,10 +650,6 @@ msgstr "Oczekiwano %q" msgid "Expected a Characteristic" msgstr "Oczekiwano charakterystyki" -#: shared-bindings/_pixelbuf/__init__.c -msgid "Expected a PixelBuf instance" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -684,11 +677,11 @@ msgstr "" msgid "Failed to acquire mutex, err 0x%04x" msgstr "Nie udało się uzyskać blokady, błąd 0x$04x" -#: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Nie udała się alokacja bufora RX" +#: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -1141,10 +1134,6 @@ msgstr "Odmowa dostępu" msgid "Pin does not have ADC capabilities" msgstr "Nóżka nie obsługuje ADC" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Pixel beyond bounds of buffer" -msgstr "Piksel poza granicami bufora" - #: py/builtinhelp.c msgid "Plus any modules on the filesystem\n" msgstr "Oraz moduły w systemie plików\n" @@ -1194,10 +1183,6 @@ msgstr "Brak obsługi RTC" msgid "Random number generation error" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Range out of bounds" -msgstr "Zakres poza granicami" - #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" msgstr "Tylko do odczytu" @@ -1617,11 +1602,6 @@ msgstr "bits_per_sample musi być 8 lub 16" msgid "branch not in range" msgstr "skok poza zakres" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, c-format -msgid "buf is too small. need %d bytes" -msgstr "buf zbyt mały. Wymagane %d bajtów" - #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" msgstr "bufor mysi być typu bytes" @@ -2513,10 +2493,6 @@ msgstr "trzyargumentowe pow() wymaga liczb całkowitych" msgid "queue overflow" msgstr "przepełnienie kolejki" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "rawbuf is not the same size as buf" -msgstr "rawbuf nie jest tej samej wielkości co buf" - #: py/builtinimport.c msgid "relative import" msgstr "relatywny import" @@ -2750,16 +2726,6 @@ msgstr "zła specyfikacja konwersji %c" msgid "unknown format code '%c' for object of type '%s'" msgstr "zły kod formatowania '%c' dla obiektu typu '%s'" -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'float'" -msgstr "zły kod foratowania '%c' dla obiektu typu 'float'" - -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'str'" -msgstr "zły kod formatowania '%c' dla obiektu typu 'str'" - #: py/compile.c msgid "unknown type" msgstr "zły typ" @@ -3009,6 +2975,12 @@ msgstr "zerowy krok" #~ msgid "Only slices with step=1 (aka None) are supported" #~ msgstr "Wspierane są tylko fragmenty z step=1 (albo None)" +#~ msgid "Pixel beyond bounds of buffer" +#~ msgstr "Piksel poza granicami bufora" + +#~ msgid "Range out of bounds" +#~ msgstr "Zakres poza granicami" + #~ msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" #~ msgstr "Soft device assert, id: 0x%08lX, pc: 0x%08lX" @@ -3063,6 +3035,10 @@ msgstr "zerowy krok" #~ msgid "bad GATT role" #~ msgstr "zła rola GATT" +#, c-format +#~ msgid "buf is too small. need %d bytes" +#~ msgstr "buf zbyt mały. Wymagane %d bajtów" + #, c-format #~ msgid "byteorder is not an instance of ByteOrder (got a %s)" #~ msgstr "byteorder musi być typu ByteOrder (jest %s)" @@ -3077,6 +3053,9 @@ msgstr "zerowy krok" #~ msgid "name must be a string" #~ msgstr "nazwa musi być łańcuchem" +#~ msgid "rawbuf is not the same size as buf" +#~ msgstr "rawbuf nie jest tej samej wielkości co buf" + #~ msgid "services includes an object that is not a Service" #~ msgstr "obiekt typu innego niż Service w services" @@ -3089,5 +3068,13 @@ msgstr "zerowy krok" #~ msgid "timeout >100 (units are now seconds, not msecs)" #~ msgstr "timeout > 100 (jednostkami są sekundy)" +#, c-format +#~ msgid "unknown format code '%c' for object of type 'float'" +#~ msgstr "zły kod foratowania '%c' dla obiektu typu 'float'" + +#, c-format +#~ msgid "unknown format code '%c' for object of type 'str'" +#~ msgstr "zły kod formatowania '%c' dla obiektu typu 'str'" + #~ msgid "write_args must be a list, tuple, or None" #~ msgstr "write_args musi być listą, krotką lub None" diff --git a/locale/pt_BR.po b/locale/pt_BR.po index 0d6592201..755dc6d97 100644 --- a/locale/pt_BR.po +++ b/locale/pt_BR.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-18 11:56-0800\n" +"POT-Creation-Date: 2020-01-29 17:27-0800\n" "PO-Revision-Date: 2018-10-02 21:14-0000\n" "Last-Translator: \n" "Language-Team: \n" @@ -507,11 +507,8 @@ msgstr "Unidade de Clock em uso" msgid "Column entry must be digitalio.DigitalInOut" msgstr "" -#: shared-bindings/displayio/I2CDisplay.c -msgid "Command must be 0-255" -msgstr "" - -#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c #, fuzzy msgid "Command must be an int between 0 and 255" msgstr "Os bytes devem estar entre 0 e 255." @@ -658,10 +655,6 @@ msgstr "Esperado um" msgid "Expected a Characteristic" msgstr "Não é possível adicionar Característica." -#: shared-bindings/_pixelbuf/__init__.c -msgid "Expected a PixelBuf instance" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "" @@ -690,11 +683,11 @@ msgstr "Falha ao enviar comando." msgid "Failed to acquire mutex, err 0x%04x" msgstr "Não é possível ler o valor do atributo. status: 0x%02x" -#: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Falha ao alocar buffer RX" +#: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -1151,10 +1144,6 @@ msgstr "Permissão negada" msgid "Pin does not have ADC capabilities" msgstr "O pino não tem recursos de ADC" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Pixel beyond bounds of buffer" -msgstr "" - #: py/builtinhelp.c #, fuzzy msgid "Plus any modules on the filesystem\n" @@ -1205,10 +1194,6 @@ msgstr "O RTC não é suportado nesta placa" msgid "Random number generation error" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Range out of bounds" -msgstr "" - #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" msgstr "Somente leitura" @@ -1629,11 +1614,6 @@ msgstr "bits devem ser 8" msgid "branch not in range" msgstr "Calibração está fora do intervalo" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, c-format -msgid "buf is too small. need %d bytes" -msgstr "" - #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" msgstr "" @@ -2525,10 +2505,6 @@ msgstr "" msgid "queue overflow" msgstr "estouro de fila" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "rawbuf is not the same size as buf" -msgstr "" - #: py/builtinimport.c msgid "relative import" msgstr "" @@ -2763,16 +2739,6 @@ msgstr "" msgid "unknown format code '%c' for object of type '%s'" msgstr "" -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'float'" -msgstr "" - -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'str'" -msgstr "" - #: py/compile.c msgid "unknown type" msgstr "" diff --git a/locale/zh_Latn_pinyin.po b/locale/zh_Latn_pinyin.po index d3ecc630c..369ce4426 100644 --- a/locale/zh_Latn_pinyin.po +++ b/locale/zh_Latn_pinyin.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: circuitpython-cn\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-01-18 11:56-0800\n" +"POT-Creation-Date: 2020-01-29 17:27-0800\n" "PO-Revision-Date: 2019-04-13 10:10-0700\n" "Last-Translator: hexthat\n" "Language-Team: Chinese Hanyu Pinyin\n" @@ -506,11 +506,8 @@ msgstr "Shǐyòng shízhōng dānwèi" msgid "Column entry must be digitalio.DigitalInOut" msgstr "Liè tiáomù bìxū shì digitalio.DigitalInOut" -#: shared-bindings/displayio/I2CDisplay.c -msgid "Command must be 0-255" -msgstr "Mìnglìng bìxū wèi 0-255" - -#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/ParallelBus.c +#: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c +#: shared-bindings/displayio/ParallelBus.c msgid "Command must be an int between 0 and 255" msgstr "Mìnglìng bìxū shì 0 dào 255 zhī jiān de int" @@ -654,10 +651,6 @@ msgstr "Yùqí %q" msgid "Expected a Characteristic" msgstr "Yùqí de tèdiǎn" -#: shared-bindings/_pixelbuf/__init__.c -msgid "Expected a PixelBuf instance" -msgstr "" - #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" msgstr "Yùqí fúwù" @@ -685,11 +678,11 @@ msgstr "Fāsòng mìnglìng shībài." msgid "Failed to acquire mutex, err 0x%04x" msgstr "Wúfǎ huòdé mutex, err 0x%04x" -#: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" msgstr "Fēnpèi RX huǎnchōng shībài" +#: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -1146,10 +1139,6 @@ msgstr "Quánxiàn bèi jùjué" msgid "Pin does not have ADC capabilities" msgstr "Pin méiyǒu ADC nénglì" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Pixel beyond bounds of buffer" -msgstr "Xiàngsù chāochū huǎnchōng qū biānjiè" - #: py/builtinhelp.c msgid "Plus any modules on the filesystem\n" msgstr "Zài wénjiàn xìtǒng shàng tiānjiā rènhé mókuài\n" @@ -1199,10 +1188,6 @@ msgstr "Cǐ bǎn bù zhīchí RTC" msgid "Random number generation error" msgstr "" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "Range out of bounds" -msgstr "Fànwéi chāochū biānjiè" - #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" msgstr "Zhǐ dú" @@ -1626,11 +1611,6 @@ msgstr "měi jiàn yàngběn bìxū wèi 8 huò 16" msgid "branch not in range" msgstr "fēnzhī bùzài fànwéi nèi" -#: shared-bindings/_pixelbuf/PixelBuf.c -#, c-format -msgid "buf is too small. need %d bytes" -msgstr "huǎnchōng tài xiǎo. Xūyào%d zì jié" - #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" msgstr "huǎnchōng qū bìxū shì zì jié lèi duìxiàng" @@ -2525,10 +2505,6 @@ msgstr "pow() yǒu 3 cānshù xūyào zhěngshù" msgid "queue overflow" msgstr "duìliè yìchū" -#: shared-bindings/_pixelbuf/PixelBuf.c -msgid "rawbuf is not the same size as buf" -msgstr "yuánshǐ huǎnchōng qū hé huǎnchōng qū de dàxiǎo bùtóng" - #: py/builtinimport.c msgid "relative import" msgstr "xiāngduì dǎorù" @@ -2763,16 +2739,6 @@ msgstr "wèizhī de zhuǎnhuàn biāozhù %c" msgid "unknown format code '%c' for object of type '%s'" msgstr "lèixíng '%s' duìxiàng wèizhī de géshì dàimǎ '%c'" -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'float'" -msgstr "lèixíng 'float' duìxiàng wèizhī de géshì dàimǎ '%c'" - -#: py/objstr.c -#, c-format -msgid "unknown format code '%c' for object of type 'str'" -msgstr "lèixíng 'str' duìxiàng wèizhī de géshì dàimǎ '%c'" - #: py/compile.c msgid "unknown type" msgstr "wèizhī lèixíng" @@ -2888,6 +2854,9 @@ msgstr "líng bù" #~ msgid "Characteristic already in use by another Service." #~ msgstr "Qítā fúwù bùmén yǐ shǐyòng de gōngnéng." +#~ msgid "Command must be 0-255" +#~ msgstr "Mìnglìng bìxū wèi 0-255" + #~ msgid "Could not decode ble_uuid, err 0x%04x" #~ msgstr "Wúfǎ jiěmǎ kě dú_uuid, err 0x%04x" @@ -3060,6 +3029,12 @@ msgstr "líng bù" #~ msgid "Only slices with step=1 (aka None) are supported" #~ msgstr "Jǐn zhīchí 1 bù qiēpiàn" +#~ msgid "Pixel beyond bounds of buffer" +#~ msgstr "Xiàngsù chāochū huǎnchōng qū biānjiè" + +#~ msgid "Range out of bounds" +#~ msgstr "Fànwéi chāochū biānjiè" + #~ msgid "Soft device assert, id: 0x%08lX, pc: 0x%08lX" #~ msgstr "Ruǎn shèbèi wéihù, id: 0X%08lX, pc: 0X%08lX" @@ -3116,6 +3091,10 @@ msgstr "líng bù" #~ msgid "bad GATT role" #~ msgstr "zǒng xiédìng de bùliáng juésè" +#, c-format +#~ msgid "buf is too small. need %d bytes" +#~ msgstr "huǎnchōng tài xiǎo. Xūyào%d zì jié" + #, c-format #~ msgid "byteorder is not an instance of ByteOrder (got a %s)" #~ msgstr "zì jié bùshì zì jié xù shílì (yǒu %s)" @@ -3132,6 +3111,9 @@ msgstr "líng bù" #~ msgid "name must be a string" #~ msgstr "míngchēng bìxū shì yīgè zìfú chuàn" +#~ msgid "rawbuf is not the same size as buf" +#~ msgstr "yuánshǐ huǎnchōng qū hé huǎnchōng qū de dàxiǎo bùtóng" + #~ msgid "row must be packed and word aligned" #~ msgstr "xíng bìxū dǎbāo bìngqiě zì duìqí" @@ -3150,6 +3132,14 @@ msgstr "líng bù" #~ msgid "too many arguments" #~ msgstr "tài duō cānshù" +#, c-format +#~ msgid "unknown format code '%c' for object of type 'float'" +#~ msgstr "lèixíng 'float' duìxiàng wèizhī de géshì dàimǎ '%c'" + +#, c-format +#~ msgid "unknown format code '%c' for object of type 'str'" +#~ msgstr "lèixíng 'str' duìxiàng wèizhī de géshì dàimǎ '%c'" + #~ msgid "unsupported bitmap type" #~ msgstr "bù zhīchí de bitmap lèixíng" diff --git a/ports/atmel-samd/common-hal/busio/UART.c b/ports/atmel-samd/common-hal/busio/UART.c index 4ad47a58d..70857de6d 100644 --- a/ports/atmel-samd/common-hal/busio/UART.c +++ b/ports/atmel-samd/common-hal/busio/UART.c @@ -150,7 +150,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, self->buffer = (uint8_t *) gc_alloc(self->buffer_length * sizeof(uint8_t), false, true); if (self->buffer == NULL) { common_hal_busio_uart_deinit(self); - mp_raise_msg(&mp_type_MemoryError, translate("Failed to allocate RX buffer")); + mp_raise_msg_varg(&mp_type_MemoryError, translate("Failed to allocate RX buffer of %d bytes"), self->buffer_length * sizeof(uint8_t)); } } else { self->buffer_length = 0; diff --git a/py/objstr.c b/py/objstr.c index fde264681..a60f507e9 100644 --- a/py/objstr.c +++ b/py/objstr.c @@ -1352,7 +1352,7 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar terse_str_format_value_error(); } else { mp_raise_ValueError_varg( - translate("unknown format code '%c' for object of type 'float'"), + translate("unknown format code '%c' for object of type '%s'"), type, mp_obj_get_type_str(arg)); } } @@ -1388,7 +1388,7 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar terse_str_format_value_error(); } else { mp_raise_ValueError_varg( - translate("unknown format code '%c' for object of type 'str'"), + translate("unknown format code '%c' for object of type '%s'"), type, mp_obj_get_type_str(arg)); } } diff --git a/shared-bindings/displayio/I2CDisplay.c b/shared-bindings/displayio/I2CDisplay.c index 4339d182f..9b863f656 100644 --- a/shared-bindings/displayio/I2CDisplay.c +++ b/shared-bindings/displayio/I2CDisplay.c @@ -118,7 +118,7 @@ MP_DEFINE_CONST_FUN_OBJ_1(displayio_i2cdisplay_reset_obj, displayio_i2cdisplay_o STATIC mp_obj_t displayio_i2cdisplay_obj_send(mp_obj_t self, mp_obj_t command_obj, mp_obj_t data_obj) { mp_int_t command_int = MP_OBJ_SMALL_INT_VALUE(command_obj); if (!MP_OBJ_IS_SMALL_INT(command_obj) || command_int > 255 || command_int < 0) { - mp_raise_ValueError(translate("Command must be 0-255")); + mp_raise_ValueError(translate("Command must be an int between 0 and 255")); } uint8_t command = command_int; mp_buffer_info_t bufinfo; -- cgit v1.2.3 From 87f73e2729be3158ea3bb030644cbc42a4913c4c Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 30 Jan 2020 09:52:06 -0500 Subject: track vm_used_ble better --- ports/nrf/bluetooth/ble_drv.c | 3 +++ ports/nrf/common-hal/_bleio/Adapter.c | 8 +++++++ ports/nrf/common-hal/_bleio/__init__.c | 10 ++++++--- ports/nrf/common-hal/_bleio/bonding.c | 11 ++++----- ports/nrf/common-hal/microcontroller/__init__.c | 30 +++++++++++++++++++++++++ 5 files changed, 54 insertions(+), 8 deletions(-) (limited to 'ports') diff --git a/ports/nrf/bluetooth/ble_drv.c b/ports/nrf/bluetooth/ble_drv.c index 28a265b7f..e410ac3b4 100644 --- a/ports/nrf/bluetooth/ble_drv.c +++ b/ports/nrf/bluetooth/ble_drv.c @@ -145,6 +145,9 @@ void SD_EVT_IRQHandler(void) { ble_drv_evt_handler_entry_t *it = MP_STATE_VM(ble_drv_evt_handler_entries); bool done = false; while (it != NULL) { + #if CIRCUITPY_VERBOSE_BLE + // mp_printf(&mp_plat_print, " calling handler: 0x%08lx, param: 0x%08lx\n", it->func-1, it->param); + #endif done = it->func(event, it->param) || done; it = it->next; } diff --git a/ports/nrf/common-hal/_bleio/Adapter.c b/ports/nrf/common-hal/_bleio/Adapter.c index 361fbbf3b..c92ce12a5 100644 --- a/ports/nrf/common-hal/_bleio/Adapter.c +++ b/ports/nrf/common-hal/_bleio/Adapter.c @@ -437,6 +437,7 @@ mp_obj_t common_hal_bleio_adapter_start_scan(bleio_adapter_obj_t *self, uint8_t* .active = active }; uint32_t err_code; + vm_used_ble = true; err_code = sd_ble_gap_scan_start(&scan_params, sd_data); if (err_code != NRF_SUCCESS) { @@ -511,6 +512,7 @@ mp_obj_t common_hal_bleio_adapter_connect(bleio_adapter_obj_t *self, bleio_addre ble_drv_add_event_handler(connect_on_ble_evt, &event_info); event_info.done = false; + vm_used_ble = true; uint32_t err_code = sd_ble_gap_connect(&addr, &scan_params, &conn_params, BLE_CONN_CFG_TAG_CUSTOM); if (err_code != NRF_SUCCESS) { @@ -615,6 +617,7 @@ uint32_t _common_hal_bleio_adapter_start_advertising(bleio_adapter_obj_t *self, return err_code; } + vm_used_ble = true; err_code = sd_ble_gap_adv_start(adv_handle, BLE_CONN_CFG_TAG_CUSTOM); if (err_code != NRF_SUCCESS) { return err_code; @@ -709,6 +712,11 @@ void bleio_adapter_reset(bleio_adapter_obj_t* adapter) { adapter->connection_objs = NULL; for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { bleio_connection_internal_t *connection = &bleio_connections[i]; + // Disconnect all connections with Python state cleanly. Keep any supervisor-only connections. + if (connection->connection_obj != mp_const_none && + connection->conn_handle != BLE_CONN_HANDLE_INVALID) { + common_hal_bleio_connection_disconnect(connection); + } connection->connection_obj = mp_const_none; } } diff --git a/ports/nrf/common-hal/_bleio/__init__.c b/ports/nrf/common-hal/_bleio/__init__.c index a000c3e7e..58e28c8c1 100644 --- a/ports/nrf/common-hal/_bleio/__init__.c +++ b/ports/nrf/common-hal/_bleio/__init__.c @@ -91,13 +91,14 @@ void check_sec_status(uint8_t sec_status) { void bleio_reset() { bleio_adapter_reset(&common_hal_bleio_adapter_obj); if (!vm_used_ble) { + // No user-code BLE operations were done, so we can maintain the supervisor state. return; } if (common_hal_bleio_adapter_get_enabled(&common_hal_bleio_adapter_obj)) { common_hal_bleio_adapter_set_enabled(&common_hal_bleio_adapter_obj, false); } - supervisor_start_bluetooth(); bonding_reset(); + supervisor_start_bluetooth(); } // The singleton _bleio.Adapter object, bound to _bleio.adapter @@ -195,14 +196,17 @@ size_t common_hal_bleio_gattc_read(uint16_t handle, uint16_t conn_handle, uint8_ while (nrf_error == NRF_ERROR_BUSY) { nrf_error = sd_ble_gattc_read(conn_handle, handle, 0); } - check_nrf_error(nrf_error); + if (nrf_error != NRF_SUCCESS) { + ble_drv_remove_event_handler(_on_gattc_read_rsp_evt, &read_info); + check_nrf_error(nrf_error); + } while (!read_info.done) { RUN_BACKGROUND_TASKS; } - check_gatt_status(read_info.status); ble_drv_remove_event_handler(_on_gattc_read_rsp_evt, &read_info); + check_gatt_status(read_info.status); return read_info.final_len; } diff --git a/ports/nrf/common-hal/_bleio/bonding.c b/ports/nrf/common-hal/_bleio/bonding.c index 9716b3988..081ba992f 100644 --- a/ports/nrf/common-hal/_bleio/bonding.c +++ b/ports/nrf/common-hal/_bleio/bonding.c @@ -267,14 +267,15 @@ void bonding_background(void) { for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) { bleio_connection_internal_t *connection = &bleio_connections[i]; - uint64_t current_ticks_ms = supervisor_ticks_ms64(); // Wait at least one second before saving CCCD, to consolidate // writes that involve multiple CCCDs. For instance, for HID, // three CCCD's are set in short succession by the HID client. - if (connection->do_bond_cccds && - current_ticks_ms - connection->do_bond_cccds_request_time >= 1000) { - write_sys_attr_block(connection); - connection->do_bond_cccds = false; + if (connection->do_bond_cccds) { + uint64_t current_ticks_ms = supervisor_ticks_ms64(); + if (current_ticks_ms - connection->do_bond_cccds_request_time >= 1000) { + write_sys_attr_block(connection); + connection->do_bond_cccds = false; + } } if (connection->do_bond_keys) { diff --git a/ports/nrf/common-hal/microcontroller/__init__.c b/ports/nrf/common-hal/microcontroller/__init__.c index de924566c..7eb1c0614 100644 --- a/ports/nrf/common-hal/microcontroller/__init__.c +++ b/ports/nrf/common-hal/microcontroller/__init__.c @@ -37,8 +37,10 @@ #include "shared-bindings/microcontroller/Processor.h" #include "supervisor/filesystem.h" +#include "supervisor/port.h" #include "supervisor/shared/safe_mode.h" #include "nrfx_glue.h" +#include "nrf_nvic.h" // This routine should work even when interrupts are disabled. Used by OneWire // for precise timing. @@ -46,10 +48,38 @@ void common_hal_mcu_delay_us(uint32_t delay) { NRFX_DELAY_US(delay); } +static volatile uint32_t nesting_count = 0; +static uint8_t is_nested_critical_region; +static uint8_t sd_is_enabled = false; void common_hal_mcu_disable_interrupts() { + sd_softdevice_is_enabled(&sd_is_enabled); + if (sd_is_enabled) { + sd_nvic_critical_region_enter(&is_nested_critical_region); + } else { + __disable_irq(); + __DMB(); + nesting_count++; + } } void common_hal_mcu_enable_interrupts() { + // Don't check here if SD is enabled, because we'll crash if interrupts + // were turned off and sd_softdevice_is_enabled is called. + if (sd_is_enabled) { + sd_nvic_critical_region_exit(is_nested_critical_region); + } else { + if (nesting_count == 0) { + // This is very very bad because it means there was mismatched disable/enables so we + // crash. + reset_into_safe_mode(HARD_CRASH); + } + nesting_count--; + if (nesting_count > 0) { + return; + } + __DMB(); + __enable_irq(); + } } void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { -- cgit v1.2.3 From b6358182d3972cd514fa6dad9165e612c6d02f5d Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 30 Jan 2020 15:14:05 -0500 Subject: Update CLUE to Rev C --- ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h | 2 +- ports/nrf/boards/clue_nrf52840_express/mpconfigboard.h | 3 ++- ports/nrf/boards/clue_nrf52840_express/pins.c | 11 +++++++++-- 3 files changed, 12 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h index e401cecc1..17b044b14 100644 --- a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h +++ b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h @@ -32,7 +32,7 @@ #define MICROPY_HW_LED_STATUS (&pin_P1_14) -// Unusually, board does not have a 32 kHz xtal. Nearly all boards do. +// Board does not have a 32kHz crystal. It does have a 32MHz crystal. #define BOARD_HAS_32KHZ_XTAL (0) #if QSPI_FLASH_FILESYSTEM diff --git a/ports/nrf/boards/clue_nrf52840_express/mpconfigboard.h b/ports/nrf/boards/clue_nrf52840_express/mpconfigboard.h index a239ca7ce..9cb05de09 100644 --- a/ports/nrf/boards/clue_nrf52840_express/mpconfigboard.h +++ b/ports/nrf/boards/clue_nrf52840_express/mpconfigboard.h @@ -50,7 +50,8 @@ #define SPI_FLASH_CS_PIN &pin_P0_20 #endif -#define BOARD_HAS_CRYSTAL 1 +// No 32kHz crystal. THere's a 32MHz crystal in the nRF module. +#define BOARD_HAS_32KHZ_XTAL (0) #define DEFAULT_I2C_BUS_SCL (&pin_P0_25) #define DEFAULT_I2C_BUS_SDA (&pin_P0_24) diff --git a/ports/nrf/boards/clue_nrf52840_express/pins.c b/ports/nrf/boards/clue_nrf52840_express/pins.c index 2926f46e0..ab0738893 100644 --- a/ports/nrf/boards/clue_nrf52840_express/pins.c +++ b/ports/nrf/boards/clue_nrf52840_express/pins.c @@ -86,8 +86,15 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_P0_24) }, { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_24) }, - { MP_ROM_QSTR(MP_QSTR_MICROPHONE_CLOCK), MP_ROM_PTR(&pin_P0_11) }, - { MP_ROM_QSTR(MP_QSTR_MICROPHONE_DATA), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_CLOCK), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_DATA), MP_ROM_PTR(&pin_P0_00) }, + + { MP_ROM_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_P1_00) }, + + { MP_ROM_QSTR(MP_QSTR_PROXIMITY_LIGHT_INTERRUPT), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_GYRO_INTERRUPT), MP_ROM_PTR(&pin_P1_06) }, + + { MP_ROM_QSTR(MP_QSTR_WHITE_LEDS), MP_ROM_PTR(&pin_P0_10) }, { MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_P1_03) }, { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_P1_05) }, -- cgit v1.2.3 From 3b95d7c16a44bc0543d8436e19e792472c654774 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 30 Jan 2020 21:00:47 -0500 Subject: add gamepad to specialty cpx builds; update frozen libs --- frozen/Adafruit_CircuitPython_BusDevice | 2 +- frozen/Adafruit_CircuitPython_CircuitPlayground | 2 +- frozen/Adafruit_CircuitPython_Crickit | 2 +- frozen/Adafruit_CircuitPython_DotStar | 2 +- frozen/Adafruit_CircuitPython_HID | 2 +- frozen/Adafruit_CircuitPython_IRRemote | 2 +- frozen/Adafruit_CircuitPython_LIS3DH | 2 +- frozen/Adafruit_CircuitPython_Motor | 2 +- frozen/Adafruit_CircuitPython_NeoPixel | 2 +- frozen/Adafruit_CircuitPython_SD | 2 +- frozen/Adafruit_CircuitPython_Thermistor | 2 +- frozen/Adafruit_CircuitPython_seesaw | 2 +- .../boards/circuitplayground_express_crickit/mpconfigboard.mk | 2 +- .../boards/circuitplayground_express_displayio/mpconfigboard.mk | 1 - 14 files changed, 13 insertions(+), 14 deletions(-) (limited to 'ports') diff --git a/frozen/Adafruit_CircuitPython_BusDevice b/frozen/Adafruit_CircuitPython_BusDevice index 805d41a02..0b0d1e999 160000 --- a/frozen/Adafruit_CircuitPython_BusDevice +++ b/frozen/Adafruit_CircuitPython_BusDevice @@ -1 +1 @@ -Subproject commit 805d41a021c70df7609da772a6f6131810e5d6ba +Subproject commit 0b0d1e999a6c7944e55bed59a30ccc21b3c96666 diff --git a/frozen/Adafruit_CircuitPython_CircuitPlayground b/frozen/Adafruit_CircuitPython_CircuitPlayground index 82ba9e40d..2cf0f40ab 160000 --- a/frozen/Adafruit_CircuitPython_CircuitPlayground +++ b/frozen/Adafruit_CircuitPython_CircuitPlayground @@ -1 +1 @@ -Subproject commit 82ba9e40dfff41fdc0541636afde4936c930d86c +Subproject commit 2cf0f40ab818fddbc2cecf3ec495ed16067c5f7e diff --git a/frozen/Adafruit_CircuitPython_Crickit b/frozen/Adafruit_CircuitPython_Crickit index 553466290..09bd10e94 160000 --- a/frozen/Adafruit_CircuitPython_Crickit +++ b/frozen/Adafruit_CircuitPython_Crickit @@ -1 +1 @@ -Subproject commit 5534662902a223ac8562e6f999d6359e4c17dab1 +Subproject commit 09bd10e94894a4eec7e3a02b51ffb5d8581b3024 diff --git a/frozen/Adafruit_CircuitPython_DotStar b/frozen/Adafruit_CircuitPython_DotStar index 01e89a843..84eadeafa 160000 --- a/frozen/Adafruit_CircuitPython_DotStar +++ b/frozen/Adafruit_CircuitPython_DotStar @@ -1 +1 @@ -Subproject commit 01e89a8437c78b62d4d655c745ded57e26dc747a +Subproject commit 84eadeafa9144829b8c6faf903b4282d58a77353 diff --git a/frozen/Adafruit_CircuitPython_HID b/frozen/Adafruit_CircuitPython_HID index 2d1dce6ad..f044548d6 160000 --- a/frozen/Adafruit_CircuitPython_HID +++ b/frozen/Adafruit_CircuitPython_HID @@ -1 +1 @@ -Subproject commit 2d1dce6ad6ca7e091fd8b5c3f102693c24af8b88 +Subproject commit f044548d6d3aa21650b50232bb16e0b29f540b8f diff --git a/frozen/Adafruit_CircuitPython_IRRemote b/frozen/Adafruit_CircuitPython_IRRemote index 8b7611a2c..9dac9628e 160000 --- a/frozen/Adafruit_CircuitPython_IRRemote +++ b/frozen/Adafruit_CircuitPython_IRRemote @@ -1 +1 @@ -Subproject commit 8b7611a2cc076a2ac1b368c70227519f69f1e3e9 +Subproject commit 9dac9628e48675308d447b70b2005f7d1f0ddf6b diff --git a/frozen/Adafruit_CircuitPython_LIS3DH b/frozen/Adafruit_CircuitPython_LIS3DH index 53146ab2e..42a55eafc 160000 --- a/frozen/Adafruit_CircuitPython_LIS3DH +++ b/frozen/Adafruit_CircuitPython_LIS3DH @@ -1 +1 @@ -Subproject commit 53146ab2e82c318c3c37bd76bac34035a597b311 +Subproject commit 42a55eafcb29f563b31e23af902c31dac8289900 diff --git a/frozen/Adafruit_CircuitPython_Motor b/frozen/Adafruit_CircuitPython_Motor index f69fc9b47..ddcd1e715 160000 --- a/frozen/Adafruit_CircuitPython_Motor +++ b/frozen/Adafruit_CircuitPython_Motor @@ -1 +1 @@ -Subproject commit f69fc9b47fa25ba1414eb3d5c82f05013280c0d2 +Subproject commit ddcd1e7154f1b27f9a87daffb6e691e1e7051b64 diff --git a/frozen/Adafruit_CircuitPython_NeoPixel b/frozen/Adafruit_CircuitPython_NeoPixel index ff99d5511..10db851c8 160000 --- a/frozen/Adafruit_CircuitPython_NeoPixel +++ b/frozen/Adafruit_CircuitPython_NeoPixel @@ -1 +1 @@ -Subproject commit ff99d55115f81899902c2c4a84fdfbea9ae83823 +Subproject commit 10db851c81873fd8db207ff0c4d9342426ee25a4 diff --git a/frozen/Adafruit_CircuitPython_SD b/frozen/Adafruit_CircuitPython_SD index dd0fe8530..efd548b1e 160000 --- a/frozen/Adafruit_CircuitPython_SD +++ b/frozen/Adafruit_CircuitPython_SD @@ -1 +1 @@ -Subproject commit dd0fe8530a2dcc64ac95bb3e116af2158dcd7cd2 +Subproject commit efd548b1e36c534bbce494f4cb0d9a625dd170cd diff --git a/frozen/Adafruit_CircuitPython_Thermistor b/frozen/Adafruit_CircuitPython_Thermistor index 2e5aedf18..ac83a3dc7 160000 --- a/frozen/Adafruit_CircuitPython_Thermistor +++ b/frozen/Adafruit_CircuitPython_Thermistor @@ -1 +1 @@ -Subproject commit 2e5aedf18eb417a4120d4998ac1f387a4f600730 +Subproject commit ac83a3dc703ec50b2236c773d22c47a0c0aaba43 diff --git a/frozen/Adafruit_CircuitPython_seesaw b/frozen/Adafruit_CircuitPython_seesaw index ea5e445ed..dc01285aa 160000 --- a/frozen/Adafruit_CircuitPython_seesaw +++ b/frozen/Adafruit_CircuitPython_seesaw @@ -1 +1 @@ -Subproject commit ea5e445edd4441cacd207aa2d2bfd724b813a253 +Subproject commit dc01285aa45dd8260bb3ae35a657e4cdcbf325b8 diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk index 04b4b7792..1516c149b 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk @@ -14,9 +14,9 @@ EXTERNAL_FLASH_DEVICES = "S25FL216K, GD25Q16C" LONGINT_IMPL = NONE CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_GAMEPAD = 0 CIRCUITPY_I2CSLAVE = 0 CIRCUITPY_PIXELBUF = 0 +CIRCUITPY_RTC = 0 SUPEROPT_GC = 0 CFLAGS_INLINE_LIMIT = 55 diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk index b5a7c2424..d65dc993f 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk @@ -16,7 +16,6 @@ CIRCUITPY_BITBANGIO = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CSLAVE = 0 CIRCUITPY_PIXELBUF = 0 -CIRCUITPY_GAMEPAD = 0 CIRCUITPY_RTC = 0 SUPEROPT_GC = 0 -- cgit v1.2.3 From b4dcecb266bd1aba0a94d11ac6d8a044f6822b69 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 31 Jan 2020 13:12:58 -0500 Subject: Add build option for UF2 flash offset --- ports/stm32f4/Makefile | 49 ++++++++++++++-------- .../feather_stm32f405_express/mpconfigboard.h | 4 +- .../feather_stm32f405_express/mpconfigboard.mk | 8 ++-- ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk | 3 +- .../boards/stm32f411ce_blackpill/mpconfigboard.mk | 3 +- .../boards/stm32f411ve_discovery/mpconfigboard.mk | 2 - .../boards/stm32f412zg_discovery/mpconfigboard.mk | 3 +- 7 files changed, 41 insertions(+), 31 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index ccadeac8a..082d05039 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -26,11 +26,11 @@ # Select the board to build for. ifeq ($(BOARD),) - $(error You must provide a BOARD parameter) + $(error You must provide a BOARD parameter) else - ifeq ($(wildcard boards/$(BOARD)/.),) - $(error Invalid BOARD specified) - endif + ifeq ($(wildcard boards/$(BOARD)/.),) + $(error Invalid BOARD specified) + endif endif # If the build directory is not given, make it reflect the board name. @@ -80,19 +80,16 @@ INC += -I../../supervisor/shared/usb #Debugging/Optimization ifeq ($(DEBUG), 1) - CFLAGS += -ggdb - # You may want to enable these flags to make setting breakpoints easier. - CFLAGS += -fno-inline -fno-ipa-sra + CFLAGS += -ggdb + # You may want to enable these flags to make setting breakpoints easier. + CFLAGS += -fno-inline -fno-ipa-sra else - CFLAGS += -Os -DNDEBUG - CFLAGS += -ggdb - # TODO: Test with -flto - ### CFLAGS += -flto + CFLAGS += -Os -DNDEBUG + CFLAGS += -ggdb + # TODO: Test with -flto + ### CFLAGS += -flto endif -ifndef BOOTLOADER_OFFSET - BOOTLOADER_OFFSET := 0x8000000 -endif C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(CMSIS_MCU) @@ -115,6 +112,22 @@ CFLAGS += \ # TODO: check this CFLAGS += -D__START=main +#need both command and valid file to use uf2 bootloader +ifndef LD_FILE + ifneq ($(and $(UF2_BOOTLOADER),$(LD_BOOT)),) + LD_FILE = $(LD_BOOT) + BOOTLOADER_OFFSET = $(UF2_OFFSET) + CFLAGS += -DUF2_BOOTLOADER_ENABLED + else + LD_FILE = $(LD_FS) + endif +endif + +# Add bootloader specific items +ifndef BOOTLOADER_OFFSET + BOOTLOADER_OFFSET := 0x8000000 +endif + LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs LIBS := -lgcc -lc @@ -210,12 +223,12 @@ SRC_S = \ boards/startup_$(MCU_SUB_VARIANT).s SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ - $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ - $(addprefix common-hal/, $(SRC_COMMON_HAL)) + $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \ + $(addprefix common-hal/, $(SRC_COMMON_HAL)) SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \ - $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \ - $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL)) + $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \ + $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL)) ifneq ($(FROZEN_MPY_DIR),) diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h index fb98397a9..ad9bba7b0 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h @@ -41,7 +41,9 @@ #define SPI_FLASH_CS_PIN (&pin_PA15) // Bootloader only -#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader +#ifdef UF2_BOOTLOADER_ENABLED + #define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader +#endif #define DEFAULT_I2C_BUS_SCL (&pin_PB06) #define DEFAULT_I2C_BUS_SDA (&pin_PB07) diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk index 4fa59d70f..95bc6c75e 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk @@ -9,12 +9,12 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = GD25Q16C LONGINT_IMPL = MPZ -BOOTLOADER_OFFSET = 0x8010000 - MCU_SERIES = m4 MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f405xx MCU_PACKAGE = 64 CMSIS_MCU = STM32F405xx -LD_FILE = boards/STM32F405_boot.ld # use for bootloader (external fs only) -# LD_FILE = boards/STM32F405_fs.ld # use for internal filesystem \ No newline at end of file + +LD_FS = boards/STM32F405_fs.ld # Default to internal FS +LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option +UF2_OFFSET = 0x8010000 diff --git a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk index a01ff7923..b83852c4c 100644 --- a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk +++ b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk @@ -13,5 +13,4 @@ MCU_SUB_VARIANT = stm32f405xx MCU_PACKAGE = 64 CMSIS_MCU = STM32F405xx LD_FILE = boards/STM32F405.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08010000 + diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk index d4f0f9577..68c6a1eea 100644 --- a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk @@ -18,5 +18,4 @@ MCU_SUB_VARIANT = stm32f411xe MCU_PACKAGE = 48 CMSIS_MCU = STM32F411xE LD_FILE = boards/STM32F411VETx_FLASH.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 + diff --git a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk index d6f369b6e..1f91bd8bc 100644 --- a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk @@ -13,5 +13,3 @@ MCU_SUB_VARIANT = stm32f411xe MCU_PACKAGE = 100 CMSIS_MCU = STM32F411xE LD_FILE = boards/STM32F411VETx_FLASH.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 \ No newline at end of file diff --git a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk index d642f243e..b0205fc73 100644 --- a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk @@ -18,6 +18,5 @@ MCU_SUB_VARIANT = stm32f412zx MCU_PACKAGE = 144 CMSIS_MCU = STM32F412Zx LD_FILE = boards/STM32F412ZGTx_FLASH.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 + -- cgit v1.2.3 From 7085d912786ffa5cd3919dcfcff2f37d247c3f30 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 31 Jan 2020 13:13:51 -0500 Subject: dangling edit --- ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk | 2 -- 1 file changed, 2 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk index d46ee0b08..d761d9dbe 100644 --- a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk +++ b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk @@ -15,5 +15,3 @@ MCU_SUB_VARIANT = stm32f411xe MCU_PACKAGE = 48 CMSIS_MCU = STM32F411xE LD_FILE = boards/STM32F411VETx_FLASH.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 \ No newline at end of file -- cgit v1.2.3 From a10e5d1da2f0fa29c3588bda5c791ca47fbe53bd Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 31 Jan 2020 13:17:43 -0500 Subject: text fixes --- ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk | 1 + ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 3 ++- ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk | 1 + ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk | 1 + 4 files changed, 5 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk index 95bc6c75e..e7c5353b4 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk @@ -18,3 +18,4 @@ CMSIS_MCU = STM32F405xx LD_FS = boards/STM32F405_fs.ld # Default to internal FS LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option UF2_OFFSET = 0x8010000 + diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index 8c24222f3..dce69276d 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -20,4 +20,5 @@ MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE LD_FILE = boards/STM32F401_boot.ld -# LD_FILE = boards/STM32F401_fs.ld # use for internal flash \ No newline at end of file +# LD_FILE = boards/STM32F401_fs.ld # use for internal flash + diff --git a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk index d761d9dbe..a8472608b 100644 --- a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk +++ b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk @@ -15,3 +15,4 @@ MCU_SUB_VARIANT = stm32f411xe MCU_PACKAGE = 48 CMSIS_MCU = STM32F411xE LD_FILE = boards/STM32F411VETx_FLASH.ld + diff --git a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk index 1f91bd8bc..64e2b4dc5 100644 --- a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk @@ -13,3 +13,4 @@ MCU_SUB_VARIANT = stm32f411xe MCU_PACKAGE = 100 CMSIS_MCU = STM32F411xE LD_FILE = boards/STM32F411VETx_FLASH.ld + -- cgit v1.2.3 From f38e12f0abaf9a1a0ae84a0240958a27d99425ff Mon Sep 17 00:00:00 2001 From: hierophect Date: Fri, 31 Jan 2020 13:56:08 -0500 Subject: Update ports/stm32f4/boards/STM32F405_boot.ld Co-Authored-By: Scott Shawcroft --- ports/stm32f4/boards/STM32F405_boot.ld | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/STM32F405_boot.ld b/ports/stm32f4/boards/STM32F405_boot.ld index cff2af388..64da3b652 100644 --- a/ports/stm32f4/boards/STM32F405_boot.ld +++ b/ports/stm32f4/boards/STM32F405_boot.ld @@ -17,7 +17,7 @@ MEMORY _minimum_stack_size = 2K; _minimum_heap_size = 16K; -/* Define tho top end of the stack. The stack is full descending so begins just +/* Define the top end of the stack. The stack is full descending so begins just above last byte of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */ _estack = ORIGIN(RAM) + LENGTH(RAM); @@ -105,4 +105,3 @@ SECTIONS .ARM.attributes 0 : { *(.ARM.attributes) } } - -- cgit v1.2.3 From ab031bc25fe9f57f8f08db0d6d2400e1cef72b09 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 31 Jan 2020 14:04:54 -0500 Subject: Create basic board profile --- ports/stm32f4/boards/stm32f4_discovery/board.c | 38 ++ .../boards/stm32f4_discovery/mpconfigboard.h | 35 ++ .../boards/stm32f4_discovery/mpconfigboard.mk | 18 + ports/stm32f4/boards/stm32f4_discovery/pins.c | 107 +++++ .../boards/stm32f4_discovery/stm32f4xx_hal_conf.h | 439 +++++++++++++++++++++ 5 files changed, 637 insertions(+) create mode 100644 ports/stm32f4/boards/stm32f4_discovery/board.c create mode 100644 ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h create mode 100644 ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk create mode 100644 ports/stm32f4/boards/stm32f4_discovery/pins.c create mode 100644 ports/stm32f4/boards/stm32f4_discovery/stm32f4xx_hal_conf.h (limited to 'ports') diff --git a/ports/stm32f4/boards/stm32f4_discovery/board.c b/ports/stm32f4/boards/stm32f4_discovery/board.c new file mode 100644 index 000000000..4421970ee --- /dev/null +++ b/ports/stm32f4/boards/stm32f4_discovery/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h new file mode 100644 index 000000000..8a22a874e --- /dev/null +++ b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "STM32F4_DISCO" +#define MICROPY_HW_MCU_NAME "STM32F407VG" + +#define FLASH_SIZE (0x80000) //512K +#define FLASH_PAGE_SIZE (0x4000) //16K + +#define BOARD_OSC_DIV 8 diff --git a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk new file mode 100644 index 000000000..e5bc84adc --- /dev/null +++ b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk @@ -0,0 +1,18 @@ +USB_VID = 0x239A +USB_PID = 0x805E +USB_PRODUCT = "STM32F407VG Discovery Board - CPy" +USB_MANUFACTURER = "STMicroelectronics" +USB_DEVICES = "CDC,MSC" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +#This is technically a F407 but there's no difference. +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f405xx +MCU_PACKAGE = 100 +CMSIS_MCU = STM32F405xx +LD_FILE = boards/STM32F405.ld +TEXT0_ADDR = 0x08000000 +TEXT1_ADDR = 0x08020000 \ No newline at end of file diff --git a/ports/stm32f4/boards/stm32f4_discovery/pins.c b/ports/stm32f4/boards/stm32f4_discovery/pins.c new file mode 100644 index 000000000..712932145 --- /dev/null +++ b/ports/stm32f4/boards/stm32f4_discovery/pins.c @@ -0,0 +1,107 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + //P1 + { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_PA00), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_PA01), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA02), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, + { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_PE07), MP_ROM_PTR(&pin_PE07) }, + { MP_ROM_QSTR(MP_QSTR_PE08), MP_ROM_PTR(&pin_PE08) }, + { MP_ROM_QSTR(MP_QSTR_PE09), MP_ROM_PTR(&pin_PE09) }, + { MP_ROM_QSTR(MP_QSTR_PE10), MP_ROM_PTR(&pin_PE10) }, + { MP_ROM_QSTR(MP_QSTR_PE11), MP_ROM_PTR(&pin_PE11) }, + { MP_ROM_QSTR(MP_QSTR_PE12), MP_ROM_PTR(&pin_PE12) }, + { MP_ROM_QSTR(MP_QSTR_PE13), MP_ROM_PTR(&pin_PE13) }, + { MP_ROM_QSTR(MP_QSTR_PE14), MP_ROM_PTR(&pin_PE14) }, + { MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) }, + { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) }, // Differs from F411 + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, + { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, + { MP_ROM_QSTR(MP_QSTR_PD10), MP_ROM_PTR(&pin_PD10) }, + { MP_ROM_QSTR(MP_QSTR_PD11), MP_ROM_PTR(&pin_PD11) }, + { MP_ROM_QSTR(MP_QSTR_PD12), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_PD13), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_PD14), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_PD15), MP_ROM_PTR(&pin_PD15) }, + //P2 + { MP_ROM_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_PC14) }, + { MP_ROM_QSTR(MP_QSTR_PC15), MP_ROM_PTR(&pin_PC15) }, + { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_PE06), MP_ROM_PTR(&pin_PE06) }, + { MP_ROM_QSTR(MP_QSTR_PE05), MP_ROM_PTR(&pin_PE05) }, + { MP_ROM_QSTR(MP_QSTR_PE04), MP_ROM_PTR(&pin_PE04) }, + { MP_ROM_QSTR(MP_QSTR_PE03), MP_ROM_PTR(&pin_PE03) }, + { MP_ROM_QSTR(MP_QSTR_PE02), MP_ROM_PTR(&pin_PE02) }, + { MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_PE01) }, + { MP_ROM_QSTR(MP_QSTR_PE00), MP_ROM_PTR(&pin_PE00) }, + { MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_PB03), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_PD07), MP_ROM_PTR(&pin_PD07) }, + { MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_PD06) }, + { MP_ROM_QSTR(MP_QSTR_PD05), MP_ROM_PTR(&pin_PD05) }, + { MP_ROM_QSTR(MP_QSTR_PD04), MP_ROM_PTR(&pin_PD04) }, + { MP_ROM_QSTR(MP_QSTR_PD03), MP_ROM_PTR(&pin_PD03) }, + { MP_ROM_QSTR(MP_QSTR_PD02), MP_ROM_PTR(&pin_PD02) }, + { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) }, + { MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_PD00) }, + { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA09), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA08), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PC09), MP_ROM_PTR(&pin_PC09) }, + { MP_ROM_QSTR(MP_QSTR_PC08), MP_ROM_PTR(&pin_PC08) }, + { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, + { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, + //ST LED names + { MP_ROM_QSTR(MP_QSTR_LD3), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_LD4), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_LD5), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_LD6), MP_ROM_PTR(&pin_PD15) }, + //more useful LED names + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_PD15) }, + //AnalogIO names + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA05) }, + //actual LED names + { MP_ROM_QSTR(MP_QSTR_LED_ORANGE), MP_ROM_PTR(&pin_PD13) }, + { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_PD12) }, + { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PD14) }, + { MP_ROM_QSTR(MP_QSTR_LED_BLUE), MP_ROM_PTR(&pin_PD15) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm32f4/boards/stm32f4_discovery/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/stm32f4_discovery/stm32f4xx_hal_conf.h new file mode 100644 index 000000000..18d9d60eb --- /dev/null +++ b/ports/stm32f4/boards/stm32f4_discovery/stm32f4xx_hal_conf.h @@ -0,0 +1,439 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -- cgit v1.2.3 From 19553b8f7c8155c8b3cd201980a7c8d0f2df59ee Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 31 Jan 2020 14:33:10 -0500 Subject: WIP --- ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk index e5bc84adc..68ba3905f 100644 --- a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk @@ -13,6 +13,5 @@ MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f405xx MCU_PACKAGE = 100 CMSIS_MCU = STM32F405xx -LD_FILE = boards/STM32F405.ld -TEXT0_ADDR = 0x08000000 -TEXT1_ADDR = 0x08020000 \ No newline at end of file +LD_FILE = boards/STM32F405_fs.ld + -- cgit v1.2.3 From 41aefc819bd177865d7114d58a00e8b67cbd6cb1 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 31 Jan 2020 14:35:54 -0500 Subject: Fix pyboard --- ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk | 3 ++- ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk index e7c5353b4..3fc8581ef 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk @@ -15,7 +15,8 @@ MCU_SUB_VARIANT = stm32f405xx MCU_PACKAGE = 64 CMSIS_MCU = STM32F405xx -LD_FS = boards/STM32F405_fs.ld # Default to internal FS +# Default includes filesystem, but uses external flash +LD_FS = boards/STM32F405_fs.ld LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option UF2_OFFSET = 0x8010000 diff --git a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk index b83852c4c..ef1b8f0ca 100644 --- a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk +++ b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk @@ -12,5 +12,5 @@ MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f405xx MCU_PACKAGE = 64 CMSIS_MCU = STM32F405xx -LD_FILE = boards/STM32F405.ld +LD_FILE = boards/STM32F405_fs.ld -- cgit v1.2.3 From 4abd5f1f7b54d2fb3641ce2ab807db1d45e82731 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Fri, 31 Jan 2020 14:40:50 -0500 Subject: increase max connections from 2 to 5 --- ports/nrf/bluetooth/ble_drv.h | 2 -- ports/nrf/boards/common.template.ld | 9 ++++----- ports/nrf/common-hal/_bleio/Adapter.c | 23 +++++++++++++++++------ ports/nrf/common-hal/_bleio/Adapter.h | 2 +- 4 files changed, 22 insertions(+), 14 deletions(-) (limited to 'ports') diff --git a/ports/nrf/bluetooth/ble_drv.h b/ports/nrf/bluetooth/ble_drv.h index 91990da6d..ece4b2436 100644 --- a/ports/nrf/bluetooth/ble_drv.h +++ b/ports/nrf/bluetooth/ble_drv.h @@ -33,8 +33,6 @@ #include "ble.h" -#define MAX_TX_IN_PROGRESS 10 - #ifndef BLE_GATT_ATT_MTU_DEFAULT #define BLE_GATT_ATT_MTU_DEFAULT GATT_MTU_SIZE_DEFAULT #endif diff --git a/ports/nrf/boards/common.template.ld b/ports/nrf/boards/common.template.ld index b110e6052..607a1dc93 100644 --- a/ports/nrf/boards/common.template.ld +++ b/ports/nrf/boards/common.template.ld @@ -19,14 +19,13 @@ MEMORY /* 0x2000000 - RAM:ORIGIN is reserved for Softdevice */ - /* SoftDevice 6.1.0 takes 0x7b78 bytes (30.86 kb) minimum with high ATT MTU. */ + /* SoftDevice 6.1.0 with 5 connections and various increases takes just under 64kiB. /* To measure the minimum required amount of memory for given configuration, set this number high enough to work and then check the mutation of the value done by sd_ble_enable. */ - RAM (xrw) : ORIGIN = 0x20000000 + 32K, LENGTH = 256K - 32K + RAM (xrw) : ORIGIN = 0x20000000 + 64K, LENGTH = 256K - 64K } -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 40K; +/* produce a link error if there is not this amount of RAM available */ _minimum_heap_size = 0; /* top end of the stack */ @@ -125,7 +124,7 @@ SECTIONS .stack : { . = ALIGN(4); - . = . + _minimum_stack_size; + . = . + ${CIRCUITPY_DEFAULT_STACK_SIZE}; . = ALIGN(4); } >RAM diff --git a/ports/nrf/common-hal/_bleio/Adapter.c b/ports/nrf/common-hal/_bleio/Adapter.c index c92ce12a5..4aa8678a3 100644 --- a/ports/nrf/common-hal/_bleio/Adapter.c +++ b/ports/nrf/common-hal/_bleio/Adapter.c @@ -108,6 +108,9 @@ STATIC uint32_t ble_stack_enable(void) { ble_cfg_t ble_conf; ble_conf.conn_cfg.conn_cfg_tag = BLE_CONN_CFG_TAG_CUSTOM; + // Each additional connection costs: + // about 3700-4300 bytes when .hvn_tx_queue_size is 1 + // about 9000 bytes when .hvn_tx_queue_size is 10 ble_conf.conn_cfg.params.gap_conn_cfg.conn_count = BLEIO_TOTAL_CONNECTION_COUNT; // Event length here can influence throughput so perhaps make multiple connection profiles // available. @@ -118,9 +121,12 @@ STATIC uint32_t ble_stack_enable(void) { } memset(&ble_conf, 0, sizeof(ble_conf)); + // adv_set_count must be == 1 for S140. Cannot be increased. ble_conf.gap_cfg.role_count_cfg.adv_set_count = 1; - ble_conf.gap_cfg.role_count_cfg.periph_role_count = 2; - ble_conf.gap_cfg.role_count_cfg.central_role_count = 1; + // periph_role_count costs 1232 bytes for 2 to 3, then ~1840 for each further increment. + ble_conf.gap_cfg.role_count_cfg.periph_role_count = 4; + // central_role_count costs 648 bytes for 1 to 2, then ~1250 for each further increment. + ble_conf.gap_cfg.role_count_cfg.central_role_count = 4; err_code = sd_ble_cfg_set(BLE_GAP_CFG_ROLE_COUNT, &ble_conf, app_ram_start); if (err_code != NRF_SUCCESS) { return err_code; @@ -128,7 +134,10 @@ STATIC uint32_t ble_stack_enable(void) { memset(&ble_conf, 0, sizeof(ble_conf)); ble_conf.conn_cfg.conn_cfg_tag = BLE_CONN_CFG_TAG_CUSTOM; - ble_conf.conn_cfg.params.gatts_conn_cfg.hvn_tx_queue_size = MAX_TX_IN_PROGRESS; + // Each increment to hvn_tx_queue_size costs 2064 bytes. + // DevZone recommends not setting this directly, but instead changing gap_conn_cfg.event_length. + // However, we are setting connection extension, so this seems to make sense. + ble_conf.conn_cfg.params.gatts_conn_cfg.hvn_tx_queue_size = 9; err_code = sd_ble_cfg_set(BLE_CONN_CFG_GATTS, &ble_conf, app_ram_start); if (err_code != NRF_SUCCESS) { return err_code; @@ -143,10 +152,11 @@ STATIC uint32_t ble_stack_enable(void) { return err_code; } - // Triple the GATT Server attribute size to accomodate both the CircuitPython built-in service + // Increase the GATT Server attribute size to accomodate both the CircuitPython built-in service // and anything the user does. memset(&ble_conf, 0, sizeof(ble_conf)); - ble_conf.gatts_cfg.attr_tab_size.attr_tab_size = BLE_GATTS_ATTR_TAB_SIZE_DEFAULT * 3; + // Each increment to the BLE_GATTS_ATTR_TAB_SIZE_DEFAULT multiplier costs 1408 bytes. + ble_conf.gatts_cfg.attr_tab_size.attr_tab_size = BLE_GATTS_ATTR_TAB_SIZE_DEFAULT * 5; err_code = sd_ble_cfg_set(BLE_GATTS_CFG_ATTR_TAB_SIZE, &ble_conf, app_ram_start); if (err_code != NRF_SUCCESS) { return err_code; @@ -155,7 +165,8 @@ STATIC uint32_t ble_stack_enable(void) { // Increase the number of vendor UUIDs supported. Apple uses a complete random number per // service and characteristic. memset(&ble_conf, 0, sizeof(ble_conf)); - ble_conf.common_cfg.vs_uuid_cfg.vs_uuid_count = 32; // Defaults to 10. + // Each additional vs_uuid_count costs 16 bytes. + ble_conf.common_cfg.vs_uuid_cfg.vs_uuid_count = 75; // Defaults to 10. err_code = sd_ble_cfg_set(BLE_COMMON_CFG_VS_UUID, &ble_conf, app_ram_start); if (err_code != NRF_SUCCESS) { return err_code; diff --git a/ports/nrf/common-hal/_bleio/Adapter.h b/ports/nrf/common-hal/_bleio/Adapter.h index 2ac568d66..90c88dcbe 100644 --- a/ports/nrf/common-hal/_bleio/Adapter.h +++ b/ports/nrf/common-hal/_bleio/Adapter.h @@ -35,7 +35,7 @@ #include "shared-bindings/_bleio/Connection.h" #include "shared-bindings/_bleio/ScanResults.h" -#define BLEIO_TOTAL_CONNECTION_COUNT 2 +#define BLEIO_TOTAL_CONNECTION_COUNT 5 extern bleio_connection_internal_t bleio_connections[BLEIO_TOTAL_CONNECTION_COUNT]; -- cgit v1.2.3 From fa11912b9b7c1636b097459529c587a4533ea1ea Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 31 Jan 2020 17:28:42 -0500 Subject: New configuration values --- ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h | 6 ++++-- ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk | 3 ++- ports/stm32f4/boards/stm32f4_discovery/stm32f4xx_hal_conf.h | 6 +++--- 3 files changed, 9 insertions(+), 6 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h index 8a22a874e..70f89d7e8 100644 --- a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h +++ b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h @@ -29,7 +29,9 @@ #define MICROPY_HW_BOARD_NAME "STM32F4_DISCO" #define MICROPY_HW_MCU_NAME "STM32F407VG" -#define FLASH_SIZE (0x80000) //512K -#define FLASH_PAGE_SIZE (0x4000) //16K +#define FLASH_SIZE (0x100000) +#define FLASH_PAGE_SIZE (0x4000) + +#define BOARD_NO_VBUS_SENSE #define BOARD_OSC_DIV 8 diff --git a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk index 68ba3905f..3e3dba6e8 100644 --- a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk @@ -7,7 +7,8 @@ USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE -#This is technically a F407 but there's no difference. +# This is technically a F407 but there's no difference +# other than the camera and ethernet, which aren't supported. MCU_SERIES = m4 MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f405xx diff --git a/ports/stm32f4/boards/stm32f4_discovery/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/stm32f4_discovery/stm32f4xx_hal_conf.h index 18d9d60eb..ee5832d49 100644 --- a/ports/stm32f4/boards/stm32f4_discovery/stm32f4xx_hal_conf.h +++ b/ports/stm32f4/boards/stm32f4_discovery/stm32f4xx_hal_conf.h @@ -41,7 +41,7 @@ /* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CRC_MODULE_ENABLED */ /* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_DAC_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED /* #define HAL_DCMI_MODULE_ENABLED */ /* #define HAL_DMA2D_MODULE_ENABLED */ /* #define HAL_ETH_MODULE_ENABLED */ @@ -55,7 +55,7 @@ #define HAL_I2S_MODULE_ENABLED /* #define HAL_IWDG_MODULE_ENABLED */ /* #define HAL_LTDC_MODULE_ENABLED */ -/* #define HAL_RNG_MODULE_ENABLED */ +#define HAL_RNG_MODULE_ENABLED /* #define HAL_RTC_MODULE_ENABLED */ /* #define HAL_SAI_MODULE_ENABLED */ /* #define HAL_SD_MODULE_ENABLED */ @@ -63,7 +63,7 @@ #define HAL_SPI_MODULE_ENABLED #define HAL_TIM_MODULE_ENABLED #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +#define HAL_USART_MODULE_ENABLED /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ -- cgit v1.2.3 From be4e681d07cb89228dbf3f623b202413eb5cd19e Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Fri, 31 Jan 2020 18:57:41 -0500 Subject: fix UICR check; do not use NULL for no MISO --- ports/atmel-samd/boards/hallowing_m4_express/board.c | 2 +- ports/atmel-samd/boards/monster_m4sk/board.c | 2 +- ports/atmel-samd/boards/openbook_m4/board.c | 2 +- ports/atmel-samd/boards/pewpew_m4/board.c | 2 +- ports/atmel-samd/boards/pybadge/board.c | 2 +- ports/atmel-samd/boards/pybadge_airlift/board.c | 2 +- ports/atmel-samd/boards/pygamer/board.c | 2 +- ports/atmel-samd/boards/pygamer_advance/board.c | 2 +- ports/nrf/boards/clue_nrf52840_express/board.c | 2 +- ports/nrf/boards/ohs2020_badge/board.c | 2 +- ports/nrf/common-hal/busio/SPI.c | 4 ++-- ports/nrf/peripherals/nrf/nrf52840/power.c | 18 ++++++++++++++---- 12 files changed, 26 insertions(+), 16 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/hallowing_m4_express/board.c b/ports/atmel-samd/boards/hallowing_m4_express/board.c index 6bb2a591f..5d1ef6d9b 100644 --- a/ports/atmel-samd/boards/hallowing_m4_express/board.c +++ b/ports/atmel-samd/boards/hallowing_m4_express/board.c @@ -49,7 +49,7 @@ uint8_t display_init_sequence[] = { void board_init(void) { busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_PA01, &pin_PA00, NULL); + common_hal_busio_spi_construct(spi, &pin_PA01, &pin_PA00, mp_const_none); common_hal_busio_spi_never_reset(spi); displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; diff --git a/ports/atmel-samd/boards/monster_m4sk/board.c b/ports/atmel-samd/boards/monster_m4sk/board.c index 2377f4a9d..40141ca15 100644 --- a/ports/atmel-samd/boards/monster_m4sk/board.c +++ b/ports/atmel-samd/boards/monster_m4sk/board.c @@ -50,7 +50,7 @@ uint8_t display_init_sequence[] = { void board_init(void) { busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_PA13, &pin_PA12, NULL); + common_hal_busio_spi_construct(spi, &pin_PA13, &pin_PA12, mp_const_none); common_hal_busio_spi_never_reset(spi); displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; diff --git a/ports/atmel-samd/boards/openbook_m4/board.c b/ports/atmel-samd/boards/openbook_m4/board.c index 2d9b31647..85a588879 100644 --- a/ports/atmel-samd/boards/openbook_m4/board.c +++ b/ports/atmel-samd/boards/openbook_m4/board.c @@ -55,7 +55,7 @@ uint8_t stop_sequence[] = { void board_init(void) { busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, NULL); + common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, mp_const_none); common_hal_busio_spi_never_reset(spi); displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; diff --git a/ports/atmel-samd/boards/pewpew_m4/board.c b/ports/atmel-samd/boards/pewpew_m4/board.c index 5f5a01e48..1872d1876 100644 --- a/ports/atmel-samd/boards/pewpew_m4/board.c +++ b/ports/atmel-samd/boards/pewpew_m4/board.c @@ -97,7 +97,7 @@ uint8_t display_init_sequence[] = { void board_init(void) { busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_PA13, &pin_PA15, NULL); + common_hal_busio_spi_construct(spi, &pin_PA13, &pin_PA15, mp_const_none); common_hal_busio_spi_never_reset(spi); displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; diff --git a/ports/atmel-samd/boards/pybadge/board.c b/ports/atmel-samd/boards/pybadge/board.c index f3ac7176a..3725f0ec3 100644 --- a/ports/atmel-samd/boards/pybadge/board.c +++ b/ports/atmel-samd/boards/pybadge/board.c @@ -72,7 +72,7 @@ uint8_t display_init_sequence[] = { void board_init(void) { busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, NULL); + common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, mp_const_none); common_hal_busio_spi_never_reset(spi); displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; diff --git a/ports/atmel-samd/boards/pybadge_airlift/board.c b/ports/atmel-samd/boards/pybadge_airlift/board.c index 061f3d777..fbb4441f0 100644 --- a/ports/atmel-samd/boards/pybadge_airlift/board.c +++ b/ports/atmel-samd/boards/pybadge_airlift/board.c @@ -50,7 +50,7 @@ uint8_t display_init_sequence[] = { void board_init(void) { busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, NULL); + common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, mp_const_none); common_hal_busio_spi_never_reset(spi); displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; diff --git a/ports/atmel-samd/boards/pygamer/board.c b/ports/atmel-samd/boards/pygamer/board.c index 8c6fbca06..b364ffccf 100644 --- a/ports/atmel-samd/boards/pygamer/board.c +++ b/ports/atmel-samd/boards/pygamer/board.c @@ -72,7 +72,7 @@ uint8_t display_init_sequence[] = { void board_init(void) { busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, NULL); + common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB15, mp_const_none); common_hal_busio_spi_never_reset(spi); displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; diff --git a/ports/atmel-samd/boards/pygamer_advance/board.c b/ports/atmel-samd/boards/pygamer_advance/board.c index ff2da34a2..a138c7e50 100644 --- a/ports/atmel-samd/boards/pygamer_advance/board.c +++ b/ports/atmel-samd/boards/pygamer_advance/board.c @@ -50,7 +50,7 @@ uint8_t display_init_sequence[] = { void board_init(void) { busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB12, NULL); + common_hal_busio_spi_construct(spi, &pin_PB13, &pin_PB12, mp_const_none); common_hal_busio_spi_never_reset(spi); displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; diff --git a/ports/nrf/boards/clue_nrf52840_express/board.c b/ports/nrf/boards/clue_nrf52840_express/board.c index c118fe92f..abc4e3cfa 100644 --- a/ports/nrf/boards/clue_nrf52840_express/board.c +++ b/ports/nrf/boards/clue_nrf52840_express/board.c @@ -49,7 +49,7 @@ uint8_t display_init_sequence[] = { void board_init(void) { busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, NULL); + common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, mp_const_none); common_hal_busio_spi_never_reset(spi); displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; diff --git a/ports/nrf/boards/ohs2020_badge/board.c b/ports/nrf/boards/ohs2020_badge/board.c index 189f7acdf..457edf44a 100644 --- a/ports/nrf/boards/ohs2020_badge/board.c +++ b/ports/nrf/boards/ohs2020_badge/board.c @@ -49,7 +49,7 @@ uint8_t display_init_sequence[] = { void board_init(void) { busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, NULL); + common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, mp_const_none); common_hal_busio_spi_never_reset(spi); displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; diff --git a/ports/nrf/common-hal/busio/SPI.c b/ports/nrf/common-hal/busio/SPI.c index 639bbcdd0..8e1d73bf0 100644 --- a/ports/nrf/common-hal/busio/SPI.c +++ b/ports/nrf/common-hal/busio/SPI.c @@ -143,7 +143,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * self->clock_pin_number = clock->number; claim_pin(clock); - if (mosi != (mcu_pin_obj_t*)&mp_const_none_obj) { + if (mosi != mp_const_none) { config.mosi_pin = mosi->number; self->MOSI_pin_number = mosi->number; claim_pin(mosi); @@ -151,7 +151,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * self->MOSI_pin_number = NO_PIN; } - if (miso != (mcu_pin_obj_t*)&mp_const_none_obj) { + if (miso != mp_const_none) { config.miso_pin = miso->number; self->MISO_pin_number = mosi->number; claim_pin(miso); diff --git a/ports/nrf/peripherals/nrf/nrf52840/power.c b/ports/nrf/peripherals/nrf/nrf52840/power.c index 794872c5d..d64c536bb 100644 --- a/ports/nrf/peripherals/nrf/nrf52840/power.c +++ b/ports/nrf/peripherals/nrf/nrf52840/power.c @@ -25,16 +25,26 @@ */ #include "nrfx.h" -#include "nrfx_nvmc.h" +#include "hal/nrf_nvmc.h" void nrf_peripherals_power_init(void) { // Set GPIO reference voltage to 3.3V if it isn't already. REGOUT0 will get reset to 0xfffffff // if flash is erased, which sets the default to 1.8V // This matters only when "high voltage mode" is enabled, which is true on the PCA10059, // and might be true on other boards. - if (NRF_UICR->REGOUT0 == 0xffffffff) { - nrfx_nvmc_word_write((uint32_t) &NRF_UICR->REGOUT0, UICR_REGOUT0_VOUT_3V3 << UICR_REGOUT0_VOUT_Pos); - // Must reset to make enable change. + if (NRF_UICR->REGOUT0 == 0xffffffff && NRF_POWER->MAINREGSTATUS & 1) { + // Expand what nrf_nvmc_word_write() did. + // It's missing from nrfx V2.0.0, and nrfx_nvmc_word_write() does bounds + // checking which prevents writes to UICR. + // Reported: https://devzone.nordicsemi.com/f/nordic-q-a/57243/nrfx_nvmc-h-api-cannot-write-to-uicr + NRF_NVMC->CONFIG = NRF_NVMC_MODE_WRITE; + while (!(NRF_NVMC->READY & NVMC_READY_READY_Msk)) {} + NRF_UICR->REGOUT0 = UICR_REGOUT0_VOUT_3V3 << UICR_REGOUT0_VOUT_Pos; + __DMB(); + while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {} + NRF_NVMC->CONFIG = NRF_NVMC_MODE_READONLY; + + // Must reset to enable change. NVIC_SystemReset(); } } -- cgit v1.2.3 From dc964b346ca03405b6be768bc54820509477d17f Mon Sep 17 00:00:00 2001 From: Lady Ada Date: Fri, 31 Jan 2020 20:17:39 -0500 Subject: adjust CLUE madctl so rotation 0 is 'right' --- ports/nrf/boards/clue_nrf52840_express/board.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/clue_nrf52840_express/board.c b/ports/nrf/boards/clue_nrf52840_express/board.c index abc4e3cfa..5f5337a3d 100644 --- a/ports/nrf/boards/clue_nrf52840_express/board.c +++ b/ports/nrf/boards/clue_nrf52840_express/board.c @@ -40,7 +40,7 @@ displayio_fourwire_obj_t board_display_obj; uint8_t display_init_sequence[] = { 0x01, 0 | DELAY, 150, // SWRESET 0x11, 0 | DELAY, 255, // SLPOUT - 0x36, 1, 0x00, // _MADCTL bottom to top refresh in vsync aligned order. + 0x36, 1, 0b10100000, // _MADCTL for rotation 0 0x3a, 1, 0x55, // COLMOD - 16bit color 0x21, 0 | DELAY, 10, // _INVON 0x13, 0 | DELAY, 10, // _NORON @@ -67,9 +67,9 @@ void board_init(void) { bus, 240, // Width (after rotation) 240, // Height (after rotation) - 0, // column start + 80, // column start 0, // row start - 270, // rotation + 0, // rotation 16, // Color depth false, // Grayscale false, // Pixels in a byte share a row. Only used for depth < 8 -- cgit v1.2.3 From d99c2ffe4f37ad6a41f7f6fe4c55ae20f79c816f Mon Sep 17 00:00:00 2001 From: Michael Welling Date: Sat, 1 Feb 2020 17:23:35 -0800 Subject: QSPI flash fixes We had the pin names swapped on the schematic and a different flash was populated. Signed-off-by: Michael Welling --- ports/nrf/boards/ohs2020_badge/mpconfigboard.h | 4 ++-- ports/nrf/boards/ohs2020_badge/mpconfigboard.mk | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/ohs2020_badge/mpconfigboard.h b/ports/nrf/boards/ohs2020_badge/mpconfigboard.h index 8e4e68dea..8edc40423 100644 --- a/ports/nrf/boards/ohs2020_badge/mpconfigboard.h +++ b/ports/nrf/boards/ohs2020_badge/mpconfigboard.h @@ -32,8 +32,8 @@ #define MICROPY_HW_MCU_NAME "nRF52840" #if QSPI_FLASH_FILESYSTEM -#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 22) -#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(1, 0) +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(1, 0) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 22) #define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 20) #define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(1, 2) #define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(1, 1) diff --git a/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk b/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk index 46a4c3be6..7d2c6de98 100644 --- a/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk +++ b/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk @@ -7,4 +7,4 @@ MCU_CHIP = nrf52840 QSPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 -EXTERNAL_FLASH_DEVICES = "W25Q32JV_IQ" +EXTERNAL_FLASH_DEVICES = "W25Q128JV_SQ" -- cgit v1.2.3 From 33dcdd7c031a1f92d57ef08dda0aba5e8c7a424b Mon Sep 17 00:00:00 2001 From: Michael Welling Date: Sat, 1 Feb 2020 18:28:22 -0800 Subject: Updates to enable working SPI TFT The backlight enable is active low on our board so the driver doesn't like it. Toggling to GPIO manually for now. As fixed the improper SPI bus pins definitions and it works! Signed-off-by: Michael Welling --- ports/nrf/boards/ohs2020_badge/board.c | 4 ++-- ports/nrf/boards/ohs2020_badge/pins.c | 3 +++ 2 files changed, 5 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/ohs2020_badge/board.c b/ports/nrf/boards/ohs2020_badge/board.c index 457edf44a..4ea11f163 100644 --- a/ports/nrf/boards/ohs2020_badge/board.c +++ b/ports/nrf/boards/ohs2020_badge/board.c @@ -49,7 +49,7 @@ uint8_t display_init_sequence[] = { void board_init(void) { busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, mp_const_none); + common_hal_busio_spi_construct(spi, &pin_P0_11, &pin_P0_12, mp_const_none); common_hal_busio_spi_never_reset(spi); displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; @@ -81,7 +81,7 @@ void board_init(void) { 0x37, // set vertical scroll command display_init_sequence, sizeof(display_init_sequence), - &pin_P0_02, // backlight pin + NULL, // backlight pin NO_BRIGHTNESS_COMMAND, 1.0f, // brightness (ignored) true, // auto_brightness diff --git a/ports/nrf/boards/ohs2020_badge/pins.c b/ports/nrf/boards/ohs2020_badge/pins.c index df87deeeb..f5cd64acc 100644 --- a/ports/nrf/boards/ohs2020_badge/pins.c +++ b/ports/nrf/boards/ohs2020_badge/pins.c @@ -1,4 +1,5 @@ #include "shared-bindings/board/__init__.h" +#include "shared-module/displayio/__init__.h" STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_MICROPHONE_CLOCK), MP_ROM_PTR(&pin_P0_25) }, @@ -13,6 +14,8 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + + { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From 6804b2a7fd1c6c167e1f10316655e2ffaaca1f73 Mon Sep 17 00:00:00 2001 From: Michael Welling Date: Sun, 2 Feb 2020 21:10:39 -0800 Subject: Add I2C pin definitions for interoperability with Adafruit libraries Signed-off-by: Michael Welling --- ports/nrf/boards/ohs2020_badge/pins.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'ports') diff --git a/ports/nrf/boards/ohs2020_badge/pins.c b/ports/nrf/boards/ohs2020_badge/pins.c index f5cd64acc..e984e3070 100644 --- a/ports/nrf/boards/ohs2020_badge/pins.c +++ b/ports/nrf/boards/ohs2020_badge/pins.c @@ -12,6 +12,9 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_P0_11) }, { MP_ROM_QSTR(MP_QSTR_TFT_MOSI), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, -- cgit v1.2.3 From 64cafe82bcbffc54d882765d47df4a093b6e43aa Mon Sep 17 00:00:00 2001 From: Michael Welling Date: Sun, 2 Feb 2020 22:01:09 -0800 Subject: Adjust OHS2020 madctl for default rotation Make to go faster I guess. Signed-off-by: Michael Welling --- ports/nrf/boards/ohs2020_badge/board.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/ohs2020_badge/board.c b/ports/nrf/boards/ohs2020_badge/board.c index 4ea11f163..7e3e05814 100644 --- a/ports/nrf/boards/ohs2020_badge/board.c +++ b/ports/nrf/boards/ohs2020_badge/board.c @@ -40,7 +40,7 @@ displayio_fourwire_obj_t board_display_obj; uint8_t display_init_sequence[] = { 0x01, 0 | DELAY, 150, // SWRESET 0x11, 0 | DELAY, 255, // SLPOUT - 0x36, 1, 0x00, // _MADCTL bottom to top refresh in vsync aligned order. + 0x36, 1, 0b10100000, // _MADCTL bottom to top refresh in vsync aligned order. 0x3a, 1, 0x55, // COLMOD - 16bit color 0x21, 0 | DELAY, 10, // _INVON 0x13, 0 | DELAY, 10, // _NORON @@ -67,9 +67,9 @@ void board_init(void) { bus, 240, // Width (after rotation) 240, // Height (after rotation) - 0, // column start + 80, // column start 0, // row start - 270, // rotation + 0, // rotation 16, // Color depth false, // Grayscale false, // Pixels in a byte share a row. Only used for depth < 8 -- cgit v1.2.3 From 5a29b222eb460f58e09615772da2b3fbbcb804aa Mon Sep 17 00:00:00 2001 From: Lady Ada Date: Sat, 1 Feb 2020 13:29:49 -0500 Subject: add bluefruit sense - tested --- ports/nrf/boards/feather_bluefruit_sense/board.c | 38 ++++++++++++ .../boards/feather_bluefruit_sense/mpconfigboard.h | 70 ++++++++++++++++++++++ .../feather_bluefruit_sense/mpconfigboard.mk | 10 ++++ ports/nrf/boards/feather_bluefruit_sense/pins.c | 58 ++++++++++++++++++ 4 files changed, 176 insertions(+) create mode 100644 ports/nrf/boards/feather_bluefruit_sense/board.c create mode 100644 ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.h create mode 100644 ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.mk create mode 100644 ports/nrf/boards/feather_bluefruit_sense/pins.c (limited to 'ports') diff --git a/ports/nrf/boards/feather_bluefruit_sense/board.c b/ports/nrf/boards/feather_bluefruit_sense/board.c new file mode 100644 index 000000000..4421970ee --- /dev/null +++ b/ports/nrf/boards/feather_bluefruit_sense/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.h b/ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.h new file mode 100644 index 000000000..4b2b69e7e --- /dev/null +++ b/ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.h @@ -0,0 +1,70 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Adafruit Feather Bluefruit Sense" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_NEOPIXEL (&pin_P0_16) + +#define MICROPY_HW_LED_STATUS (&pin_P1_11) + +// Board does not have a 32kHz crystal. It does have a 32MHz crystal. +#define BOARD_HAS_32KHZ_XTAL (0) + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 17) +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 22) +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 23) +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 21) +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 20) +#endif + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN &pin_P0_17 +#define SPI_FLASH_MISO_PIN &pin_P0_22 +#define SPI_FLASH_SCK_PIN &pin_P0_19 +#define SPI_FLASH_CS_PIN &pin_P0_20 +#endif + +#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 + +#define CIRCUITPY_INTERNAL_NVM_SIZE (4096) + +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_11) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_12) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_14) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_13) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_15) + +#define DEFAULT_UART_BUS_RX (&pin_P0_24) +#define DEFAULT_UART_BUS_TX (&pin_P0_25) diff --git a/ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.mk b/ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.mk new file mode 100644 index 000000000..5813e6136 --- /dev/null +++ b/ports/nrf/boards/feather_bluefruit_sense/mpconfigboard.mk @@ -0,0 +1,10 @@ +USB_VID = 0x239A +USB_PID = 0x8088 +USB_PRODUCT = "Feather Bluefruit Sense" +USB_MANUFACTURER = "Adafruit Industries LLC" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "GD25Q16C" diff --git a/ports/nrf/boards/feather_bluefruit_sense/pins.c b/ports/nrf/boards/feather_bluefruit_sense/pins.c new file mode 100644 index 000000000..55eb76463 --- /dev/null +++ b/ports/nrf/boards/feather_bluefruit_sense/pins.c @@ -0,0 +1,58 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_P0_29) }, + + { MP_ROM_QSTR(MP_QSTR_SWITCH), MP_ROM_PTR(&pin_P1_02) }, + + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_P0_16) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_15) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_24) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_RED_LED), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P1_11) }, + + { MP_ROM_QSTR(MP_QSTR_BLUE_LED), MP_ROM_PTR(&pin_P1_10) }, + + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_CLOCK), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_MICROPHONE_DATA), MP_ROM_PTR(&pin_P0_00) }, + + { MP_ROM_QSTR(MP_QSTR_PROXIMITY_LIGHT_INTERRUPT), MP_ROM_PTR(&pin_P1_00) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From 7fd30e7d2067bc0d94a57bd44519a59469a9f08b Mon Sep 17 00:00:00 2001 From: James Bowman Date: Mon, 3 Feb 2020 16:46:14 -0800 Subject: First draft of eveL, the low-level module of the Gameduino (and BridgeTek EVE) bindings. [adafruit/circuitpython#2578] --- .../boards/metro_m4_express/mpconfigboard.mk | 2 + .../boards/metro_nrf52840_express/mpconfigboard.mk | 2 + py/circuitpy_defns.mk | 4 + py/circuitpy_mpconfig.h | 8 + py/circuitpy_mpconfig.mk | 5 + shared-bindings/eveL/__init__.c | 225 +++++++++++ shared-bindings/eveL/modeveL-gen.h | 412 +++++++++++++++++++++ 7 files changed, 658 insertions(+) create mode 100644 shared-bindings/eveL/__init__.c create mode 100644 shared-bindings/eveL/modeveL-gen.h (limited to 'ports') diff --git a/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.mk index 62e6b7c72..d4593f83a 100644 --- a/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.mk @@ -10,3 +10,5 @@ QSPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 3 EXTERNAL_FLASH_DEVICES = "S25FL116K, S25FL216K, GD25Q16C" LONGINT_IMPL = MPZ + +CIRCUITPY_EVEL = 1 diff --git a/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.mk b/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.mk index d421e5210..ade77f076 100644 --- a/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.mk +++ b/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.mk @@ -8,3 +8,5 @@ MCU_CHIP = nrf52840 QSPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = "GD25Q16C" + +CIRCUITPY_EVEL = 1 diff --git a/py/circuitpy_defns.mk b/py/circuitpy_defns.mk index 1f2d6c73e..859d3837b 100644 --- a/py/circuitpy_defns.mk +++ b/py/circuitpy_defns.mk @@ -157,6 +157,9 @@ endif ifeq ($(CIRCUITPY_MATH),1) SRC_PATTERNS += math/% endif +ifeq ($(CIRCUITPY_EVEL),1) +SRC_PATTERNS += eveL/% +endif ifeq ($(CIRCUITPY_MICROCONTROLLER),1) SRC_PATTERNS += microcontroller/% endif @@ -298,6 +301,7 @@ $(filter $(SRC_PATTERNS), \ fontio/Glyph.c \ microcontroller/RunMode.c \ math/__init__.c \ + eveL/__init__.c \ ) SRC_BINDINGS_ENUMS += \ diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 5b705a088..8b7ac46b0 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -384,6 +384,13 @@ extern const struct _mp_obj_module_t math_module; #define MATH_MODULE #endif +#if CIRCUITPY_EVEL +extern const struct _mp_obj_module_t eveL_module; +#define EVEL_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_eveL), (mp_obj_t)&eveL_module }, +#else +#define EVEL_MODULE +#endif + #if CIRCUITPY_MICROCONTROLLER extern const struct _mp_obj_module_t microcontroller_module; #define MICROCONTROLLER_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_microcontroller), (mp_obj_t)µcontroller_module }, @@ -617,6 +624,7 @@ extern const struct _mp_obj_module_t ustack_module; I2CSLAVE_MODULE \ JSON_MODULE \ MATH_MODULE \ + EVEL_MODULE \ MICROCONTROLLER_MODULE \ NEOPIXEL_WRITE_MODULE \ NETWORK_MODULE \ diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk index 93175e136..f56d99478 100644 --- a/py/circuitpy_mpconfig.mk +++ b/py/circuitpy_mpconfig.mk @@ -174,6 +174,11 @@ CIRCUITPY_MATH = $(CIRCUITPY_ALWAYS_BUILD) endif CFLAGS += -DCIRCUITPY_MATH=$(CIRCUITPY_MATH) +ifndef CIRCUITPY_EVEL +CIRCUITPY_EVEL = $(CIRCUITPY_ALWAYS_BUILD) +endif +CFLAGS += -DCIRCUITPY_EVEL=$(CIRCUITPY_EVEL) + ifndef CIRCUITPY_MICROCONTROLLER CIRCUITPY_MICROCONTROLLER = $(CIRCUITPY_DEFAULT_BUILD) endif diff --git a/shared-bindings/eveL/__init__.c b/shared-bindings/eveL/__init__.c new file mode 100644 index 000000000..3bbffa257 --- /dev/null +++ b/shared-bindings/eveL/__init__.c @@ -0,0 +1,225 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2014 Paul Sokolovsky + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/runtime.h" +#include "py/binary.h" + +// #if MICROPY_PY_BUILTINS_EVEL + +typedef struct _mp_obj_EVEL_t { + mp_obj_base_t base; + mp_obj_t writer; + mp_obj_t dest[3]; + + size_t n; + uint8_t buf[512]; +} mp_obj_EVEL_t; + +STATIC void _write(mp_obj_EVEL_t *EVEL, mp_obj_t b) { + EVEL->dest[2] = b; + mp_call_method_n_kw(1, 0, EVEL->dest); +} + +STATIC mp_obj_t _register(mp_obj_t self, mp_obj_t o) { + mp_obj_EVEL_t *EVEL = self; + EVEL->n = 0; + mp_printf(&mp_plat_print, "register %p %d\n", EVEL, EVEL->n); + mp_load_method(o, MP_QSTR_write, EVEL->dest); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(register_obj, _register); + +STATIC mp_obj_t _flush(mp_obj_t self) { + mp_obj_EVEL_t *EVEL = self; + // mp_printf(&mp_plat_print, "flush %p %d\n", EVEL, EVEL->n); + if (EVEL->n != 0) { + _write(EVEL, mp_obj_new_bytearray_by_ref(EVEL->n, EVEL->buf)); + EVEL->n = 0; + } + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(flush_obj, _flush); + +STATIC void *append(mp_obj_EVEL_t *EVEL, size_t m) { + if ((EVEL->n + m) > sizeof(EVEL->buf)) + _flush((mp_obj_t)EVEL); + uint8_t *r = EVEL->buf + EVEL->n; + EVEL->n += m; + return (void*)r; +} + +STATIC mp_obj_t _cc(mp_obj_t self, mp_obj_t b) { + mp_obj_EVEL_t *EVEL = self; + mp_buffer_info_t buffer_info; + mp_get_buffer_raise(b, &buffer_info, MP_BUFFER_READ); + // mp_printf(&mp_plat_print, "flush %p %d %p\n", EVEL, buffer_info.len, EVEL->writer); + if (buffer_info.len <= sizeof(EVEL->buf)) { + uint8_t *p = (uint8_t*)append(EVEL, buffer_info.len); + // memcpy(p, buffer_info.buf, buffer_info.len); + uint8_t *s = buffer_info.buf; + for (size_t i = 0; i < buffer_info.len; i++) + *p++ = *s++; + } else { + _flush(self); + _write(EVEL, b); + } + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(cc_obj, _cc); + +#define C4(self, u) (*(uint32_t*)append((self), sizeof(uint32_t)) = (u)) + +#include "modeveL-gen.h" + +// Hand-written functions { + +STATIC mp_obj_t _cmd0(mp_obj_t self, mp_obj_t n) { + C4(self, (0xffffff00 | mp_obj_get_int_truncated(n))); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(cmd0_obj, _cmd0); + +STATIC mp_obj_t _vertex2f(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + int16_t x = (int16_t)(16 * mp_obj_get_float(a0)); + int16_t y = (int16_t)(16 * mp_obj_get_float(a1)); + C4(self, (0x40000000 | ((x & 32767) << 15) | (y & 32767))); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(vertex2f_obj, _vertex2f); + +STATIC mp_obj_t _cmd(size_t n_args, const mp_obj_t *args) { + mp_obj_t self = args[0]; + mp_obj_t num = args[1]; + mp_buffer_info_t fmt; + mp_get_buffer_raise(args[2], &fmt, MP_BUFFER_READ); + size_t len; + mp_obj_t *items; + mp_obj_tuple_get(args[3], &len, &items); + + // Count how many 32-bit words required + size_t n = 0; + for (size_t i = 0; i < fmt.len; n++) { + switch (((char*)fmt.buf)[i]) { + case 'I': + case 'i': + i += 1; + break; + case 'H': + case 'h': + i += 2; + break; + default: + break; + } + } + mp_printf(&mp_plat_print, "n=%d\n", n); + + uint32_t *p = (uint32_t*)append(self, sizeof(uint32_t) * (1 + n)); + *p++ = 0xffffff00 | mp_obj_get_int_truncated(num); + mp_obj_t *a = items; + uint32_t lo; + + for (size_t i = 0; i < fmt.len; ) { + switch (((char*)fmt.buf)[i]) { + case 'I': + case 'i': + *p++ = mp_obj_get_int_truncated(*a++); + mp_printf(&mp_plat_print, " %d %08x\n", p[-1]); + i += 1; + break; + case 'H': + case 'h': + lo = mp_obj_get_int_truncated(*a++) & 0xffff; + *p++ = lo | (mp_obj_get_int_truncated(*a++) << 16); + i += 2; + break; + default: + break; + } + } + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(cmd_obj, 4, 4, _cmd); + +STATIC const mp_rom_map_elem_t EVEL_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_register), MP_ROM_PTR(®ister_obj) }, + { MP_ROM_QSTR(MP_QSTR_cc), MP_ROM_PTR(&cc_obj) }, + { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&flush_obj) }, + { MP_ROM_QSTR(MP_QSTR_Vertex2f), MP_ROM_PTR(&vertex2f_obj) }, + { MP_ROM_QSTR(MP_QSTR_cmd), MP_ROM_PTR(&cmd_obj) }, + { MP_ROM_QSTR(MP_QSTR_cmd0), MP_ROM_PTR(&cmd0_obj) }, + ROM_DECLS +}; +STATIC MP_DEFINE_CONST_DICT(EVEL_locals_dict, EVEL_locals_dict_table); + +STATIC void EVEL_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { + (void)self_in; + (void)kind; + mp_printf(print, ""); +} + +STATIC mp_obj_t EVEL_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + // mp_arg_check_num(n_args, kw_args, 1, 1, false); + mp_obj_EVEL_t *o = m_new_obj(mp_obj_EVEL_t); + mp_printf(&mp_plat_print, "EVEL init\n"); + o->base.type = type; + return o; +} + +// STATIC void EVEL_attr(mp_obj_t self_in, qstr attr, mp_obj_t *dest) { +// printf("HERE\n"); +// mp_type_type.attr(self_in, attr, dest); +// printf("THERE %p %p\n", dest[0], dest[1]); +// } + +STATIC const mp_obj_type_t EVEL_type = { + { &mp_type_type }, + // Save on qstr's, reuse same as for module + .name = MP_QSTR_EVEL, + .print = EVEL_print, + .make_new = EVEL_make_new, + // .attr = EVEL_attr, + .locals_dict = (void*)&EVEL_locals_dict, +}; + +STATIC const mp_rom_map_elem_t mp_module_eveL_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_eveL) }, + { MP_ROM_QSTR(MP_QSTR_EVEL), MP_OBJ_FROM_PTR(&EVEL_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(mp_module_eveL_globals, mp_module_eveL_globals_table); + +const mp_obj_module_t eveL_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&mp_module_eveL_globals, +}; + +// #endif // MICROPY_PY_BUILTINS_EVEL diff --git a/shared-bindings/eveL/modeveL-gen.h b/shared-bindings/eveL/modeveL-gen.h new file mode 100644 index 000000000..1c8d5ae12 --- /dev/null +++ b/shared-bindings/eveL/modeveL-gen.h @@ -0,0 +1,412 @@ + +STATIC mp_obj_t _alphafunc(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t func = mp_obj_get_int_truncated(a0); + uint32_t ref = mp_obj_get_int_truncated(a1); + C4(self, ((9 << 24) | ((func & 7) << 8) | ((ref & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(alphafunc_obj, _alphafunc); + +STATIC mp_obj_t _begin(mp_obj_t self , mp_obj_t a0) { + uint32_t prim = mp_obj_get_int_truncated(a0); + C4(self, ((31 << 24) | ((prim & 15))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(begin_obj, _begin); + +STATIC mp_obj_t _bitmapextformat(mp_obj_t self , mp_obj_t a0) { + uint32_t fmt = mp_obj_get_int_truncated(a0); + C4(self, ((46 << 24) | (fmt & 65535)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmapextformat_obj, _bitmapextformat); + +STATIC mp_obj_t _bitmaphandle(mp_obj_t self , mp_obj_t a0) { + uint32_t handle = mp_obj_get_int_truncated(a0); + C4(self, ((5 << 24) | ((handle & 31))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmaphandle_obj, _bitmaphandle); + +STATIC mp_obj_t _bitmaplayouth(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t linestride = mp_obj_get_int_truncated(a0); + uint32_t height = mp_obj_get_int_truncated(a1); + C4(self, ((40 << 24) | (((linestride) & 3) << 2) | (((height) & 3))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaplayouth_obj, _bitmaplayouth); + +STATIC mp_obj_t _bitmaplayout(size_t n_args, const mp_obj_t *args) { + uint32_t format = mp_obj_get_int_truncated(args[1]); + uint32_t linestride = mp_obj_get_int_truncated(args[2]); + uint32_t height = mp_obj_get_int_truncated(args[3]); + C4(args[0], ((7 << 24) | ((format & 31) << 19) | ((linestride & 1023) << 9) | ((height & 511))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitmaplayout_obj, 4, 4, _bitmaplayout); + +STATIC mp_obj_t _bitmapsizeh(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t width = mp_obj_get_int_truncated(a0); + uint32_t height = mp_obj_get_int_truncated(a1); + C4(self, ((41 << 24) | (((width) & 3) << 2) | (((height) & 3))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmapsizeh_obj, _bitmapsizeh); + +STATIC mp_obj_t _bitmapsize(size_t n_args, const mp_obj_t *args) { + uint32_t filter = mp_obj_get_int_truncated(args[1]); + uint32_t wrapx = mp_obj_get_int_truncated(args[2]); + uint32_t wrapy = mp_obj_get_int_truncated(args[3]); + uint32_t width = mp_obj_get_int_truncated(args[4]); + uint32_t height = mp_obj_get_int_truncated(args[5]); + C4(args[0], ((8 << 24) | ((filter & 1) << 20) | ((wrapx & 1) << 19) | ((wrapy & 1) << 18) | ((width & 511) << 9) | ((height & 511))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitmapsize_obj, 6, 6, _bitmapsize); + +STATIC mp_obj_t _bitmapsource(mp_obj_t self , mp_obj_t a0) { + uint32_t addr = mp_obj_get_int_truncated(a0); + C4(self, ((1 << 24) | ((addr & 0xffffff))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmapsource_obj, _bitmapsource); + +STATIC mp_obj_t _bitmapswizzle(size_t n_args, const mp_obj_t *args) { + uint32_t r = mp_obj_get_int_truncated(args[1]); + uint32_t g = mp_obj_get_int_truncated(args[2]); + uint32_t b = mp_obj_get_int_truncated(args[3]); + uint32_t a = mp_obj_get_int_truncated(args[4]); + C4(args[0], ((47 << 24) | ((r & 7) << 9) | ((g & 7) << 6) | ((b & 7) << 3) | ((a & 7))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitmapswizzle_obj, 5, 5, _bitmapswizzle); + +STATIC mp_obj_t _bitmaptransforma(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t a = mp_obj_get_int_truncated(a0); + uint32_t p = mp_obj_get_int_truncated(a1); + C4(self, ((21 << 24) | ((p & 1) << 17) | ((a & 131071))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransforma_obj, _bitmaptransforma); + +STATIC mp_obj_t _bitmaptransformb(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t b = mp_obj_get_int_truncated(a0); + uint32_t p = mp_obj_get_int_truncated(a1); + C4(self, ((22 << 24) | ((p & 1) << 17) | ((b & 131071))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformb_obj, _bitmaptransformb); + +STATIC mp_obj_t _bitmaptransformc(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t c = mp_obj_get_int_truncated(a0); + uint32_t p = mp_obj_get_int_truncated(a1); + C4(self, ((23 << 24) | ((p & 1) << 17) | ((c & 16777215))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformc_obj, _bitmaptransformc); + +STATIC mp_obj_t _bitmaptransformd(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t d = mp_obj_get_int_truncated(a0); + uint32_t p = mp_obj_get_int_truncated(a1); + C4(self, ((24 << 24) | ((p & 1) << 17) | ((d & 131071))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformd_obj, _bitmaptransformd); + +STATIC mp_obj_t _bitmaptransforme(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t e = mp_obj_get_int_truncated(a0); + uint32_t p = mp_obj_get_int_truncated(a1); + C4(self, ((25 << 24) | ((p & 1) << 17) | ((e & 131071))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransforme_obj, _bitmaptransforme); + +STATIC mp_obj_t _bitmaptransformf(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t f = mp_obj_get_int_truncated(a0); + uint32_t p = mp_obj_get_int_truncated(a1); + C4(self, ((26 << 24) | ((p & 1) << 17) | ((f & 16777215))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformf_obj, _bitmaptransformf); + +STATIC mp_obj_t _blendfunc(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t src = mp_obj_get_int_truncated(a0); + uint32_t dst = mp_obj_get_int_truncated(a1); + C4(self, ((11 << 24) | ((src & 7) << 3) | ((dst & 7))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(blendfunc_obj, _blendfunc); + +STATIC mp_obj_t _call(mp_obj_t self , mp_obj_t a0) { + uint32_t dest = mp_obj_get_int_truncated(a0); + C4(self, ((29 << 24) | ((dest & 65535))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(call_obj, _call); + +STATIC mp_obj_t _cell(mp_obj_t self , mp_obj_t a0) { + uint32_t cell = mp_obj_get_int_truncated(a0); + C4(self, ((6 << 24) | ((cell & 127))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(cell_obj, _cell); + +STATIC mp_obj_t _clearcolora(mp_obj_t self , mp_obj_t a0) { + uint32_t alpha = mp_obj_get_int_truncated(a0); + C4(self, ((15 << 24) | ((alpha & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(clearcolora_obj, _clearcolora); + +STATIC mp_obj_t _clearcolorrgb(size_t n_args, const mp_obj_t *args) { + uint32_t red = mp_obj_get_int_truncated(args[1]); + uint32_t green = mp_obj_get_int_truncated(args[2]); + uint32_t blue = mp_obj_get_int_truncated(args[3]); + C4(args[0], ((2 << 24) | ((red & 255) << 16) | ((green & 255) << 8) | ((blue & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(clearcolorrgb_obj, 4, 4, _clearcolorrgb); + +STATIC mp_obj_t _clear(size_t n_args, const mp_obj_t *args) { + uint32_t c = mp_obj_get_int_truncated(args[1]); + uint32_t s = mp_obj_get_int_truncated(args[2]); + uint32_t t = mp_obj_get_int_truncated(args[3]); + C4(args[0], ((38 << 24) | ((c & 1) << 2) | ((s & 1) << 1) | ((t & 1))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(clear_obj, 4, 4, _clear); + +STATIC mp_obj_t _clearstencil(mp_obj_t self , mp_obj_t a0) { + uint32_t s = mp_obj_get_int_truncated(a0); + C4(self, ((17 << 24) | ((s & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(clearstencil_obj, _clearstencil); + +STATIC mp_obj_t _cleartag(mp_obj_t self , mp_obj_t a0) { + uint32_t s = mp_obj_get_int_truncated(a0); + C4(self, ((18 << 24) | ((s & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(cleartag_obj, _cleartag); + +STATIC mp_obj_t _colora(mp_obj_t self , mp_obj_t a0) { + uint32_t alpha = mp_obj_get_int_truncated(a0); + C4(self, ((16 << 24) | ((alpha & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(colora_obj, _colora); + +STATIC mp_obj_t _colormask(size_t n_args, const mp_obj_t *args) { + uint32_t r = mp_obj_get_int_truncated(args[1]); + uint32_t g = mp_obj_get_int_truncated(args[2]); + uint32_t b = mp_obj_get_int_truncated(args[3]); + uint32_t a = mp_obj_get_int_truncated(args[4]); + C4(args[0], ((32 << 24) | ((r & 1) << 3) | ((g & 1) << 2) | ((b & 1) << 1) | ((a & 1))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(colormask_obj, 5, 5, _colormask); + +STATIC mp_obj_t _colorrgb(size_t n_args, const mp_obj_t *args) { + uint32_t red = mp_obj_get_int_truncated(args[1]); + uint32_t green = mp_obj_get_int_truncated(args[2]); + uint32_t blue = mp_obj_get_int_truncated(args[3]); + C4(args[0], ((4 << 24) | ((red & 255) << 16) | ((green & 255) << 8) | ((blue & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(colorrgb_obj, 4, 4, _colorrgb); + +STATIC mp_obj_t _display(mp_obj_t self ) { + + C4(self, ((0 << 24)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(display_obj, _display); + +STATIC mp_obj_t _end(mp_obj_t self ) { + + C4(self, ((33 << 24)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(end_obj, _end); + +STATIC mp_obj_t _jump(mp_obj_t self , mp_obj_t a0) { + uint32_t dest = mp_obj_get_int_truncated(a0); + C4(self, ((30 << 24) | ((dest & 65535))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(jump_obj, _jump); + +STATIC mp_obj_t _linewidth(mp_obj_t self , mp_obj_t a0) { + uint32_t width = mp_obj_get_int_truncated(a0); + C4(self, ((14 << 24) | ((width & 4095))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(linewidth_obj, _linewidth); + +STATIC mp_obj_t _macro(mp_obj_t self , mp_obj_t a0) { + uint32_t m = mp_obj_get_int_truncated(a0); + C4(self, ((37 << 24) | ((m & 1))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(macro_obj, _macro); + +STATIC mp_obj_t _nop(mp_obj_t self ) { + + C4(self, ((45 << 24)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(nop_obj, _nop); + +STATIC mp_obj_t _palettesource(mp_obj_t self , mp_obj_t a0) { + uint32_t addr = mp_obj_get_int_truncated(a0); + C4(self, ((42 << 24) | (((addr) & 4194303))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(palettesource_obj, _palettesource); + +STATIC mp_obj_t _pointsize(mp_obj_t self , mp_obj_t a0) { + uint32_t size = mp_obj_get_int_truncated(a0); + C4(self, ((13 << 24) | ((size & 8191))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(pointsize_obj, _pointsize); + +STATIC mp_obj_t _restorecontext(mp_obj_t self ) { + + C4(self, ((35 << 24)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(restorecontext_obj, _restorecontext); + +STATIC mp_obj_t _return(mp_obj_t self ) { + + C4(self, ((36 << 24)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(return_obj, _return); + +STATIC mp_obj_t _savecontext(mp_obj_t self ) { + + C4(self, ((34 << 24)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(savecontext_obj, _savecontext); + +STATIC mp_obj_t _scissorsize(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t width = mp_obj_get_int_truncated(a0); + uint32_t height = mp_obj_get_int_truncated(a1); + C4(self, ((28 << 24) | ((width & 4095) << 12) | ((height & 4095))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(scissorsize_obj, _scissorsize); + +STATIC mp_obj_t _scissorxy(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t x = mp_obj_get_int_truncated(a0); + uint32_t y = mp_obj_get_int_truncated(a1); + C4(self, ((27 << 24) | ((x & 2047) << 11) | ((y & 2047))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(scissorxy_obj, _scissorxy); + +STATIC mp_obj_t _stencilfunc(size_t n_args, const mp_obj_t *args) { + uint32_t func = mp_obj_get_int_truncated(args[1]); + uint32_t ref = mp_obj_get_int_truncated(args[2]); + uint32_t mask = mp_obj_get_int_truncated(args[3]); + C4(args[0], ((10 << 24) | ((func & 7) << 16) | ((ref & 255) << 8) | ((mask & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(stencilfunc_obj, 4, 4, _stencilfunc); + +STATIC mp_obj_t _stencilmask(mp_obj_t self , mp_obj_t a0) { + uint32_t mask = mp_obj_get_int_truncated(a0); + C4(self, ((19 << 24) | ((mask & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(stencilmask_obj, _stencilmask); + +STATIC mp_obj_t _stencilop(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t sfail = mp_obj_get_int_truncated(a0); + uint32_t spass = mp_obj_get_int_truncated(a1); + C4(self, ((12 << 24) | ((sfail & 7) << 3) | ((spass & 7))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(stencilop_obj, _stencilop); + +STATIC mp_obj_t _tagmask(mp_obj_t self , mp_obj_t a0) { + uint32_t mask = mp_obj_get_int_truncated(a0); + C4(self, ((20 << 24) | ((mask & 1))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(tagmask_obj, _tagmask); + +STATIC mp_obj_t _tag(mp_obj_t self , mp_obj_t a0) { + uint32_t s = mp_obj_get_int_truncated(a0); + C4(self, ((3 << 24) | ((s & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(tag_obj, _tag); + +STATIC mp_obj_t _vertextranslatex(mp_obj_t self , mp_obj_t a0) { + uint32_t x = mp_obj_get_int_truncated(a0); + C4(self, ((43 << 24) | (((x) & 131071))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vertextranslatex_obj, _vertextranslatex); + +STATIC mp_obj_t _vertextranslatey(mp_obj_t self , mp_obj_t a0) { + uint32_t y = mp_obj_get_int_truncated(a0); + C4(self, ((44 << 24) | (((y) & 131071))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vertextranslatey_obj, _vertextranslatey); +#define N_METHODS 47 +#define METHOD_SETUP do { stem_locals_dict_table[0] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_AlphaFunc), MP_OBJ_FROM_PTR(&alphafunc_obj) }; stem_locals_dict_table[1] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Begin), MP_OBJ_FROM_PTR(&begin_obj) }; stem_locals_dict_table[2] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapExtFormat), MP_OBJ_FROM_PTR(&bitmapextformat_obj) }; stem_locals_dict_table[3] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapHandle), MP_OBJ_FROM_PTR(&bitmaphandle_obj) }; stem_locals_dict_table[4] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapLayoutH), MP_OBJ_FROM_PTR(&bitmaplayouth_obj) }; stem_locals_dict_table[5] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapLayout), MP_OBJ_FROM_PTR(&bitmaplayout_obj) }; stem_locals_dict_table[6] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapSizeH), MP_OBJ_FROM_PTR(&bitmapsizeh_obj) }; stem_locals_dict_table[7] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapSize), MP_OBJ_FROM_PTR(&bitmapsize_obj) }; stem_locals_dict_table[8] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapSource), MP_OBJ_FROM_PTR(&bitmapsource_obj) }; stem_locals_dict_table[9] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapSwizzle), MP_OBJ_FROM_PTR(&bitmapswizzle_obj) }; stem_locals_dict_table[10] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformA), MP_OBJ_FROM_PTR(&bitmaptransforma_obj) }; stem_locals_dict_table[11] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformB), MP_OBJ_FROM_PTR(&bitmaptransformb_obj) }; stem_locals_dict_table[12] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformC), MP_OBJ_FROM_PTR(&bitmaptransformc_obj) }; stem_locals_dict_table[13] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformD), MP_OBJ_FROM_PTR(&bitmaptransformd_obj) }; stem_locals_dict_table[14] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformE), MP_OBJ_FROM_PTR(&bitmaptransforme_obj) }; stem_locals_dict_table[15] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformF), MP_OBJ_FROM_PTR(&bitmaptransformf_obj) }; stem_locals_dict_table[16] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BlendFunc), MP_OBJ_FROM_PTR(&blendfunc_obj) }; stem_locals_dict_table[17] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Call), MP_OBJ_FROM_PTR(&call_obj) }; stem_locals_dict_table[18] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Cell), MP_OBJ_FROM_PTR(&cell_obj) }; stem_locals_dict_table[19] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ClearColorA), MP_OBJ_FROM_PTR(&clearcolora_obj) }; stem_locals_dict_table[20] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ClearColorRGB), MP_OBJ_FROM_PTR(&clearcolorrgb_obj) }; stem_locals_dict_table[21] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Clear), MP_OBJ_FROM_PTR(&clear_obj) }; stem_locals_dict_table[22] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ClearStencil), MP_OBJ_FROM_PTR(&clearstencil_obj) }; stem_locals_dict_table[23] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ClearTag), MP_OBJ_FROM_PTR(&cleartag_obj) }; stem_locals_dict_table[24] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ColorA), MP_OBJ_FROM_PTR(&colora_obj) }; stem_locals_dict_table[25] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ColorMask), MP_OBJ_FROM_PTR(&colormask_obj) }; stem_locals_dict_table[26] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ColorRGB), MP_OBJ_FROM_PTR(&colorrgb_obj) }; stem_locals_dict_table[27] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Display), MP_OBJ_FROM_PTR(&display_obj) }; stem_locals_dict_table[28] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_End), MP_OBJ_FROM_PTR(&end_obj) }; stem_locals_dict_table[29] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Jump), MP_OBJ_FROM_PTR(&jump_obj) }; stem_locals_dict_table[30] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_LineWidth), MP_OBJ_FROM_PTR(&linewidth_obj) }; stem_locals_dict_table[31] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Macro), MP_OBJ_FROM_PTR(¯o_obj) }; stem_locals_dict_table[32] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Nop), MP_OBJ_FROM_PTR(&nop_obj) }; stem_locals_dict_table[33] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_PaletteSource), MP_OBJ_FROM_PTR(&palettesource_obj) }; stem_locals_dict_table[34] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_PointSize), MP_OBJ_FROM_PTR(&pointsize_obj) }; stem_locals_dict_table[35] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_RestoreContext), MP_OBJ_FROM_PTR(&restorecontext_obj) }; stem_locals_dict_table[36] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Return), MP_OBJ_FROM_PTR(&return_obj) }; stem_locals_dict_table[37] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_SaveContext), MP_OBJ_FROM_PTR(&savecontext_obj) }; stem_locals_dict_table[38] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ScissorSize), MP_OBJ_FROM_PTR(&scissorsize_obj) }; stem_locals_dict_table[39] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ScissorXY), MP_OBJ_FROM_PTR(&scissorxy_obj) }; stem_locals_dict_table[40] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_StencilFunc), MP_OBJ_FROM_PTR(&stencilfunc_obj) }; stem_locals_dict_table[41] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_StencilMask), MP_OBJ_FROM_PTR(&stencilmask_obj) }; stem_locals_dict_table[42] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_StencilOp), MP_OBJ_FROM_PTR(&stencilop_obj) }; stem_locals_dict_table[43] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_TagMask), MP_OBJ_FROM_PTR(&tagmask_obj) }; stem_locals_dict_table[44] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Tag), MP_OBJ_FROM_PTR(&tag_obj) }; stem_locals_dict_table[45] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_VertexTranslateX), MP_OBJ_FROM_PTR(&vertextranslatex_obj) }; stem_locals_dict_table[46] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_VertexTranslateY), MP_OBJ_FROM_PTR(&vertextranslatey_obj) }; } while (0) +#define ROM_DECLS { MP_ROM_QSTR(MP_QSTR_AlphaFunc), MP_ROM_PTR(&alphafunc_obj) }, { MP_ROM_QSTR(MP_QSTR_Begin), MP_ROM_PTR(&begin_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapExtFormat), MP_ROM_PTR(&bitmapextformat_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapHandle), MP_ROM_PTR(&bitmaphandle_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapLayoutH), MP_ROM_PTR(&bitmaplayouth_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapLayout), MP_ROM_PTR(&bitmaplayout_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapSizeH), MP_ROM_PTR(&bitmapsizeh_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapSize), MP_ROM_PTR(&bitmapsize_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapSource), MP_ROM_PTR(&bitmapsource_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapSwizzle), MP_ROM_PTR(&bitmapswizzle_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformA), MP_ROM_PTR(&bitmaptransforma_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformB), MP_ROM_PTR(&bitmaptransformb_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformC), MP_ROM_PTR(&bitmaptransformc_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformD), MP_ROM_PTR(&bitmaptransformd_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformE), MP_ROM_PTR(&bitmaptransforme_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformF), MP_ROM_PTR(&bitmaptransformf_obj) }, { MP_ROM_QSTR(MP_QSTR_BlendFunc), MP_ROM_PTR(&blendfunc_obj) }, { MP_ROM_QSTR(MP_QSTR_Call), MP_ROM_PTR(&call_obj) }, { MP_ROM_QSTR(MP_QSTR_Cell), MP_ROM_PTR(&cell_obj) }, { MP_ROM_QSTR(MP_QSTR_ClearColorA), MP_ROM_PTR(&clearcolora_obj) }, { MP_ROM_QSTR(MP_QSTR_ClearColorRGB), MP_ROM_PTR(&clearcolorrgb_obj) }, { MP_ROM_QSTR(MP_QSTR_Clear), MP_ROM_PTR(&clear_obj) }, { MP_ROM_QSTR(MP_QSTR_ClearStencil), MP_ROM_PTR(&clearstencil_obj) }, { MP_ROM_QSTR(MP_QSTR_ClearTag), MP_ROM_PTR(&cleartag_obj) }, { MP_ROM_QSTR(MP_QSTR_ColorA), MP_ROM_PTR(&colora_obj) }, { MP_ROM_QSTR(MP_QSTR_ColorMask), MP_ROM_PTR(&colormask_obj) }, { MP_ROM_QSTR(MP_QSTR_ColorRGB), MP_ROM_PTR(&colorrgb_obj) }, { MP_ROM_QSTR(MP_QSTR_Display), MP_ROM_PTR(&display_obj) }, { MP_ROM_QSTR(MP_QSTR_End), MP_ROM_PTR(&end_obj) }, { MP_ROM_QSTR(MP_QSTR_Jump), MP_ROM_PTR(&jump_obj) }, { MP_ROM_QSTR(MP_QSTR_LineWidth), MP_ROM_PTR(&linewidth_obj) }, { MP_ROM_QSTR(MP_QSTR_Macro), MP_ROM_PTR(¯o_obj) }, { MP_ROM_QSTR(MP_QSTR_Nop), MP_ROM_PTR(&nop_obj) }, { MP_ROM_QSTR(MP_QSTR_PaletteSource), MP_ROM_PTR(&palettesource_obj) }, { MP_ROM_QSTR(MP_QSTR_PointSize), MP_ROM_PTR(&pointsize_obj) }, { MP_ROM_QSTR(MP_QSTR_RestoreContext), MP_ROM_PTR(&restorecontext_obj) }, { MP_ROM_QSTR(MP_QSTR_Return), MP_ROM_PTR(&return_obj) }, { MP_ROM_QSTR(MP_QSTR_SaveContext), MP_ROM_PTR(&savecontext_obj) }, { MP_ROM_QSTR(MP_QSTR_ScissorSize), MP_ROM_PTR(&scissorsize_obj) }, { MP_ROM_QSTR(MP_QSTR_ScissorXY), MP_ROM_PTR(&scissorxy_obj) }, { MP_ROM_QSTR(MP_QSTR_StencilFunc), MP_ROM_PTR(&stencilfunc_obj) }, { MP_ROM_QSTR(MP_QSTR_StencilMask), MP_ROM_PTR(&stencilmask_obj) }, { MP_ROM_QSTR(MP_QSTR_StencilOp), MP_ROM_PTR(&stencilop_obj) }, { MP_ROM_QSTR(MP_QSTR_TagMask), MP_ROM_PTR(&tagmask_obj) }, { MP_ROM_QSTR(MP_QSTR_Tag), MP_ROM_PTR(&tag_obj) }, { MP_ROM_QSTR(MP_QSTR_VertexTranslateX), MP_ROM_PTR(&vertextranslatex_obj) }, { MP_ROM_QSTR(MP_QSTR_VertexTranslateY), MP_ROM_PTR(&vertextranslatey_obj) } -- cgit v1.2.3 From a4ebd2f7c112dc5d185d198e28e00edabd395a84 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Mon, 3 Feb 2020 22:09:53 -0500 Subject: allow tuple or list for Palette color --- ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk | 3 +++ shared-bindings/displayio/Palette.c | 12 ++++++++++-- 2 files changed, 13 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk b/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk index 1d1891e8e..51b4fc993 100644 --- a/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk @@ -10,6 +10,9 @@ INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_SMALL_BUILD = 1 +# TODO: Turn off analogio for now for space reasons, but restore it +# when frozen module gets smaller. +CIRCUITPY_ANALOGIO = 0 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_BITBANGIO = 0 CIRCUITPY_FREQUENCYIO = 0 diff --git a/shared-bindings/displayio/Palette.c b/shared-bindings/displayio/Palette.c index dda58e3c5..67a7db85b 100644 --- a/shared-bindings/displayio/Palette.c +++ b/shared-bindings/displayio/Palette.c @@ -86,7 +86,8 @@ STATIC mp_obj_t group_unary_op(mp_unary_op_t op, mp_obj_t self_in) { //| Sets the pixel color at the given index. The index should be an integer in the range 0 to color_count-1. //| //| The value argument represents a color, and can be from 0x000000 to 0xFFFFFF (to represent an RGB value). -//| Value can be an int, bytes (3 bytes (RGB) or 4 bytes (RGB + pad byte)), or bytearray. +//| Value can be an int, bytes (3 bytes (RGB) or 4 bytes (RGB + pad byte)), bytearray, +//| or a tuple or list of 3 integers. //| //| This allows you to:: //| @@ -94,6 +95,7 @@ STATIC mp_obj_t group_unary_op(mp_unary_op_t op, mp_obj_t self_in) { //| palette[1] = b'\xff\xff\x00' # set using 3 bytes //| palette[2] = b'\xff\xff\x00\x00' # set using 4 bytes //| palette[3] = bytearray(b'\x00\x00\xFF') # set using a bytearay of 3 or 4 bytes +//| palette[4] = (10, 20, 30) # set using a tuple of 3 integers //| STATIC mp_obj_t palette_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj_t value) { if (value == MP_OBJ_NULL) { @@ -111,6 +113,12 @@ STATIC mp_obj_t palette_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj_t val return MP_OBJ_NEW_SMALL_INT(common_hal_displayio_palette_get_color(self, index)); } + // Convert a tuple or list to a bytearray. + if (MP_OBJ_IS_TYPE(value, &mp_type_tuple) || + MP_OBJ_IS_TYPE(value, &mp_type_list)) { + value = mp_type_bytes.make_new(&mp_type_bytes, 1, &value, NULL); + } + uint32_t color; mp_int_t int_value; mp_buffer_info_t bufinfo; @@ -130,7 +138,7 @@ STATIC mp_obj_t palette_subscr(mp_obj_t self_in, mp_obj_t index_in, mp_obj_t val } color = int_value; } else { - mp_raise_TypeError(translate("color buffer must be a buffer or int")); + mp_raise_TypeError(translate("color buffer must be a buffer, tuple, list, or int")); } common_hal_displayio_palette_set_color(self, index, color); return mp_const_none; -- cgit v1.2.3 From 3ce6fc89a4b5bb97edc8568d1cd41aed04635b94 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Tue, 4 Feb 2020 10:38:45 -0500 Subject: Implement new linker for external flash only --- ports/stm32f4/Makefile | 2 +- ports/stm32f4/boards/STM32F405_default.ld | 107 +++++++++++++++++++++ .../feather_stm32f405_express/mpconfigboard.mk | 2 +- 3 files changed, 109 insertions(+), 2 deletions(-) create mode 100644 ports/stm32f4/boards/STM32F405_default.ld (limited to 'ports') diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile index 082d05039..3a6191c85 100755 --- a/ports/stm32f4/Makefile +++ b/ports/stm32f4/Makefile @@ -119,7 +119,7 @@ ifndef LD_FILE BOOTLOADER_OFFSET = $(UF2_OFFSET) CFLAGS += -DUF2_BOOTLOADER_ENABLED else - LD_FILE = $(LD_FS) + LD_FILE = $(LD_DEFAULT) endif endif diff --git a/ports/stm32f4/boards/STM32F405_default.ld b/ports/stm32f4/boards/STM32F405_default.ld new file mode 100644 index 000000000..c2b8c843e --- /dev/null +++ b/ports/stm32f4/boards/STM32F405_default.ld @@ -0,0 +1,107 @@ +/* + GNU linker script for STM32F405 via Micropython +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 1008K /* sectors 0-7*/ + CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk index 3fc8581ef..312ca6b48 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk @@ -16,7 +16,7 @@ MCU_PACKAGE = 64 CMSIS_MCU = STM32F405xx # Default includes filesystem, but uses external flash -LD_FS = boards/STM32F405_fs.ld +LD_DEFAULT = boards/STM32F405_default.ld LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option UF2_OFFSET = 0x8010000 -- cgit v1.2.3 From 6f731267562a78a5451e631eacfce5056e13f214 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Tue, 4 Feb 2020 10:46:44 -0500 Subject: add correct PID --- ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk index 3e3dba6e8..9bdc62404 100644 --- a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x805E +USB_PID = 0x808A USB_PRODUCT = "STM32F407VG Discovery Board - CPy" USB_MANUFACTURER = "STMicroelectronics" USB_DEVICES = "CDC,MSC" -- cgit v1.2.3 From 4ba050d46d2b6e9cd347f1b749a1a102affbd0b5 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Tue, 4 Feb 2020 16:26:24 -0500 Subject: Add ADC for temp sensor --- .../stm32f4/common-hal/microcontroller/Processor.c | 92 +++++++++++++++++++++- 1 file changed, 90 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/microcontroller/Processor.c b/ports/stm32f4/common-hal/microcontroller/Processor.c index 3ab746685..0f8824ee5 100644 --- a/ports/stm32f4/common-hal/microcontroller/Processor.c +++ b/ports/stm32f4/common-hal/microcontroller/Processor.c @@ -3,7 +3,6 @@ * * The MIT License (MIT) * - * Copyright (c) 2017 Dan Halbert for Adafruit Industries * Copyright (c) 2019 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy @@ -34,11 +33,100 @@ #define STM32_UUID ((uint32_t *)0x1FFF7A10) +//Factory calibration locations +#define ADC_CAL_ADDRESS (0x1fff7a2a) +#define ADC_CAL1 ((uint16_t*)(ADC_CAL_ADDRESS + 2)) +#define ADC_CAL2 ((uint16_t*)(ADC_CAL_ADDRESS + 4)) + +// correction factor for reference value +STATIC volatile float adc_refcor = 1.0f; + +#define CORE_TEMP_V25 (943) /* (0.76v/3.3v)*(2^ADC resoultion) */ +#define CORE_TEMP_AVG_SLOPE (3) /* (2.5mv/3.3v)*(2^ADC resoultion) */ + float common_hal_mcu_processor_get_temperature(void) { - return NAN; + __HAL_RCC_ADC1_CLK_ENABLE(); + + //HAL Implementation + ADC_HandleTypeDef AdcHandle; + ADC_ChannelConfTypeDef sConfig; + + AdcHandle.Instance = ADC1; + AdcHandle.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; + AdcHandle.Init.Resolution = ADC_RESOLUTION_12B; + AdcHandle.Init.ScanConvMode = DISABLE; + AdcHandle.Init.ContinuousConvMode = DISABLE; + AdcHandle.Init.DiscontinuousConvMode = DISABLE; + AdcHandle.Init.NbrOfDiscConversion = 0; + AdcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + AdcHandle.Init.ExternalTrigConv = ADC_SOFTWARE_START; + AdcHandle.Init.DataAlign = ADC_DATAALIGN_RIGHT; + AdcHandle.Init.NbrOfConversion = 1; + AdcHandle.Init.DMAContinuousRequests = DISABLE; + AdcHandle.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + HAL_ADC_Init(&AdcHandle); + + ADC->CCR |= ADC_CCR_TSVREFE; + ADC->CCR &= ~ADC_CCR_VBATE; // If this somehow got turned on, it'll return bad values. + + sConfig.Channel = ADC_CHANNEL_TEMPSENSOR; //either 16 or 18, depending on chip + sConfig.Rank = 1; + sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; //Taken from micropython + HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); + + HAL_ADC_Start(&AdcHandle); + if (HAL_ADC_PollForConversion(&AdcHandle,1) != HAL_OK) { + mp_raise_RuntimeError(translate("Temperature read timed out")); + } + uint32_t value = (uint32_t)HAL_ADC_GetValue(&AdcHandle); + HAL_ADC_Stop(&AdcHandle); + + //There's no F4 specific appnote for this but it works the same as the L1 in AN3964 + float core_temp_avg_slope = (*ADC_CAL2 - *ADC_CAL1) / 80.0; + return (((float)value * adc_refcor - *ADC_CAL1) / core_temp_avg_slope) + 30.0f; + + // STATIC uint32_t adc_config_and_read_channel(ADC_HandleTypeDef *adcHandle, uint32_t channel) { + // adc_config_channel(adcHandle, channel); + // uint32_t raw_value = adc_read_channel(adcHandle); + + // #if defined(STM32F4) || defined(STM32F7) + // // ST docs say that (at least on STM32F42x and STM32F43x), VBATE must + // // be disabled when TSVREFE is enabled for TEMPSENSOR and VREFINT + // // conversions to work. VBATE is enabled by the above call to read + // // the channel, and here we disable VBATE so a subsequent call for + // // TEMPSENSOR or VREFINT works correctly. + // if (channel == ADC_CHANNEL_VBAT) { + // ADC->CCR &= ~ADC_CCR_VBATE; + // } + // #endif + + // return raw_value; + + // int adc_read_core_temp(ADC_HandleTypeDef *adcHandle) { + // int32_t raw_value = adc_config_and_read_ref(adcHandle, ADC_CHANNEL_TEMPSENSOR); + // return ((raw_value - CORE_TEMP_V25) / CORE_TEMP_AVG_SLOPE) + 25; + // } + + // #if MICROPY_PY_BUILTINS_FLOAT + // // correction factor for reference value + // STATIC volatile float adc_refcor = 1.0f; + + // float adc_read_core_temp_float(ADC_HandleTypeDef *adcHandle) { + // int32_t raw_value = adc_config_and_read_ref(adcHandle, ADC_CHANNEL_TEMPSENSOR); + // float core_temp_avg_slope = (*ADC_CAL2 - *ADC_CAL1) / 80.0; + // return (((float)raw_value * adc_refcor - *ADC_CAL1) / core_temp_avg_slope) + 30.0f; + // } } float common_hal_mcu_processor_get_voltage(void) { +// float adc_read_core_vref(ADC_HandleTypeDef *adcHandle) { +// uint32_t raw_value = adc_config_and_read_ref(adcHandle, ADC_CHANNEL_VREFINT); + +// // update the reference correction factor +// adc_refcor = ((float)(*VREFIN_CAL)) / ((float)raw_value); + +// return (*VREFIN_CAL) * ADC_SCALE; +// } return NAN; } -- cgit v1.2.3 From b6da2fa17321305d957d54cd278910a81cfb9392 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Wed, 5 Feb 2020 11:25:31 -0500 Subject: nrf: fix i2c frequency setting --- ports/nrf/common-hal/busio/I2C.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/nrf/common-hal/busio/I2C.c b/ports/nrf/common-hal/busio/I2C.c index 219fbf447..37cb192df 100644 --- a/ports/nrf/common-hal/busio/I2C.c +++ b/ports/nrf/common-hal/busio/I2C.c @@ -137,11 +137,17 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t * nrfx_twim_config_t config = NRFX_TWIM_DEFAULT_CONFIG(scl->number, sda->number); - // change freq. only if it's less than the default 400K - if (frequency < 100000) { - config.frequency = NRF_TWIM_FREQ_100K; - } else if (frequency < 250000) { +#if defined(TWIM_FREQUENCY_FREQUENCY_K1000) + if (frequency >= 1000000) { + config.frequency = NRF_TWIM_FREQ_1000K; + } else +#endif + if (frequency >= 400000) { + config.frequency = NRF_TWIM_FREQ_400K; + } else if (frequency >= 250000) { config.frequency = NRF_TWIM_FREQ_250K; + } else { + config.frequency = NRF_TWIM_FREQ_100K; } self->scl_pin_number = scl->number; -- cgit v1.2.3 From cedf6489f7ed04e403afff7d9edbbfa83b2c337c Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 5 Feb 2020 12:39:12 -0500 Subject: Add voltage ADC, standardize mphalport --- .../stm32f4/common-hal/microcontroller/Processor.c | 98 ++++++++++------------ ports/stm32f4/mphalport.c | 21 +++-- ports/stm32f4/mphalport.h | 28 ++++--- 3 files changed, 75 insertions(+), 72 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/common-hal/microcontroller/Processor.c b/ports/stm32f4/common-hal/microcontroller/Processor.c index 0f8824ee5..324659cef 100644 --- a/ports/stm32f4/common-hal/microcontroller/Processor.c +++ b/ports/stm32f4/common-hal/microcontroller/Processor.c @@ -37,12 +37,26 @@ #define ADC_CAL_ADDRESS (0x1fff7a2a) #define ADC_CAL1 ((uint16_t*)(ADC_CAL_ADDRESS + 2)) #define ADC_CAL2 ((uint16_t*)(ADC_CAL_ADDRESS + 4)) +#define VREFIN_CAL ((uint16_t *)ADC_CAL_ADDRESS) // correction factor for reference value STATIC volatile float adc_refcor = 1.0f; -#define CORE_TEMP_V25 (943) /* (0.76v/3.3v)*(2^ADC resoultion) */ -#define CORE_TEMP_AVG_SLOPE (3) /* (2.5mv/3.3v)*(2^ADC resoultion) */ +STATIC void set_adc_params(ADC_HandleTypeDef *AdcHandle) { + AdcHandle->Instance = ADC1; + AdcHandle->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; + AdcHandle->Init.Resolution = ADC_RESOLUTION_12B; + AdcHandle->Init.ScanConvMode = DISABLE; + AdcHandle->Init.ContinuousConvMode = DISABLE; + AdcHandle->Init.DiscontinuousConvMode = DISABLE; + AdcHandle->Init.NbrOfDiscConversion = 0; + AdcHandle->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + AdcHandle->Init.ExternalTrigConv = ADC_SOFTWARE_START; + AdcHandle->Init.DataAlign = ADC_DATAALIGN_RIGHT; + AdcHandle->Init.NbrOfConversion = 1; + AdcHandle->Init.DMAContinuousRequests = DISABLE; + AdcHandle->Init.EOCSelection = ADC_EOC_SINGLE_CONV; +} float common_hal_mcu_processor_get_temperature(void) { __HAL_RCC_ADC1_CLK_ENABLE(); @@ -50,20 +64,7 @@ float common_hal_mcu_processor_get_temperature(void) { //HAL Implementation ADC_HandleTypeDef AdcHandle; ADC_ChannelConfTypeDef sConfig; - - AdcHandle.Instance = ADC1; - AdcHandle.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; - AdcHandle.Init.Resolution = ADC_RESOLUTION_12B; - AdcHandle.Init.ScanConvMode = DISABLE; - AdcHandle.Init.ContinuousConvMode = DISABLE; - AdcHandle.Init.DiscontinuousConvMode = DISABLE; - AdcHandle.Init.NbrOfDiscConversion = 0; - AdcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - AdcHandle.Init.ExternalTrigConv = ADC_SOFTWARE_START; - AdcHandle.Init.DataAlign = ADC_DATAALIGN_RIGHT; - AdcHandle.Init.NbrOfConversion = 1; - AdcHandle.Init.DMAContinuousRequests = DISABLE; - AdcHandle.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + set_adc_params(&AdcHandle); HAL_ADC_Init(&AdcHandle); ADC->CCR |= ADC_CCR_TSVREFE; @@ -71,7 +72,7 @@ float common_hal_mcu_processor_get_temperature(void) { sConfig.Channel = ADC_CHANNEL_TEMPSENSOR; //either 16 or 18, depending on chip sConfig.Rank = 1; - sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; //Taken from micropython + sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; // Temp sensor likes 10us minimum HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); HAL_ADC_Start(&AdcHandle); @@ -84,50 +85,35 @@ float common_hal_mcu_processor_get_temperature(void) { //There's no F4 specific appnote for this but it works the same as the L1 in AN3964 float core_temp_avg_slope = (*ADC_CAL2 - *ADC_CAL1) / 80.0; return (((float)value * adc_refcor - *ADC_CAL1) / core_temp_avg_slope) + 30.0f; - - // STATIC uint32_t adc_config_and_read_channel(ADC_HandleTypeDef *adcHandle, uint32_t channel) { - // adc_config_channel(adcHandle, channel); - // uint32_t raw_value = adc_read_channel(adcHandle); - - // #if defined(STM32F4) || defined(STM32F7) - // // ST docs say that (at least on STM32F42x and STM32F43x), VBATE must - // // be disabled when TSVREFE is enabled for TEMPSENSOR and VREFINT - // // conversions to work. VBATE is enabled by the above call to read - // // the channel, and here we disable VBATE so a subsequent call for - // // TEMPSENSOR or VREFINT works correctly. - // if (channel == ADC_CHANNEL_VBAT) { - // ADC->CCR &= ~ADC_CCR_VBATE; - // } - // #endif - - // return raw_value; - - // int adc_read_core_temp(ADC_HandleTypeDef *adcHandle) { - // int32_t raw_value = adc_config_and_read_ref(adcHandle, ADC_CHANNEL_TEMPSENSOR); - // return ((raw_value - CORE_TEMP_V25) / CORE_TEMP_AVG_SLOPE) + 25; - // } - - // #if MICROPY_PY_BUILTINS_FLOAT - // // correction factor for reference value - // STATIC volatile float adc_refcor = 1.0f; - - // float adc_read_core_temp_float(ADC_HandleTypeDef *adcHandle) { - // int32_t raw_value = adc_config_and_read_ref(adcHandle, ADC_CHANNEL_TEMPSENSOR); - // float core_temp_avg_slope = (*ADC_CAL2 - *ADC_CAL1) / 80.0; - // return (((float)raw_value * adc_refcor - *ADC_CAL1) / core_temp_avg_slope) + 30.0f; - // } } float common_hal_mcu_processor_get_voltage(void) { -// float adc_read_core_vref(ADC_HandleTypeDef *adcHandle) { -// uint32_t raw_value = adc_config_and_read_ref(adcHandle, ADC_CHANNEL_VREFINT); + __HAL_RCC_ADC1_CLK_ENABLE(); + + //HAL Implementation + ADC_HandleTypeDef AdcHandle; + ADC_ChannelConfTypeDef sConfig; + set_adc_params(&AdcHandle); + HAL_ADC_Init(&AdcHandle); + + ADC->CCR |= ADC_CCR_TSVREFE; + + sConfig.Channel = ADC_CHANNEL_VREFINT; + sConfig.Rank = 1; + sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + HAL_ADC_ConfigChannel(&AdcHandle, &sConfig); + + HAL_ADC_Start(&AdcHandle); + if (HAL_ADC_PollForConversion(&AdcHandle,1) != HAL_OK) { + mp_raise_RuntimeError(translate("Voltage read timed out")); + } + uint32_t value = (uint32_t)HAL_ADC_GetValue(&AdcHandle); + HAL_ADC_Stop(&AdcHandle); -// // update the reference correction factor -// adc_refcor = ((float)(*VREFIN_CAL)) / ((float)raw_value); + //This value could be used to actively correct ADC values. + adc_refcor = ((float)(*VREFIN_CAL)) / ((float)value); -// return (*VREFIN_CAL) * ADC_SCALE; -// } - return NAN; + return adc_refcor * 3.3f; } uint32_t common_hal_mcu_processor_get_frequency(void) { diff --git a/ports/stm32f4/mphalport.c b/ports/stm32f4/mphalport.c index f78e9c750..47ff493e2 100644 --- a/ports/stm32f4/mphalport.c +++ b/ports/stm32f4/mphalport.c @@ -31,18 +31,15 @@ #include "py/mpstate.h" #include "py/gc.h" +#include "shared-bindings/microcontroller/__init__.h" #include "supervisor/shared/tick.h" +#include "stm32f4xx_hal.h" -/*------------------------------------------------------------------*/ -/* delay - *------------------------------------------------------------------*/ void mp_hal_delay_ms(mp_uint_t delay) { uint64_t start_tick = supervisor_ticks_ms64(); uint64_t duration = 0; while (duration < delay) { - #ifdef MICROPY_VM_HOOK_LOOP - MICROPY_VM_HOOK_LOOP - #endif + RUN_BACKGROUND_TASKS; // Check to see if we've been CTRL-Ced by autoreload or the user. if(MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)) || MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception))) { @@ -52,3 +49,15 @@ void mp_hal_delay_ms(mp_uint_t delay) { // TODO(tannewt): Go to sleep for a little while while we wait. } } + +void mp_hal_delay_us(mp_uint_t delay) { + common_hal_mcu_delay_us(); +} + +void mp_hal_disable_all_interrupts(void) { + common_hal_mcu_disable_interrupts(); +} + +void mp_hal_enable_all_interrupts(void) { + common_hal_mcu_enable_interrupts(); +} diff --git a/ports/stm32f4/mphalport.h b/ports/stm32f4/mphalport.h index df2f0ca65..b392cb0f8 100644 --- a/ports/stm32f4/mphalport.h +++ b/ports/stm32f4/mphalport.h @@ -24,20 +24,28 @@ * THE SOFTWARE. */ -#ifndef __STM32F4_HAL -#define __STM32F4_HAL +#ifndef MICROPY_INCLUDED_STM32F4_MPHALPORT_H +#define MICROPY_INCLUDED_STM32F4_MPHALPORT_H -#include -#include +#include "py/obj.h" + +#include "lib/oofatfs/ff.h" -#include "lib/utils/interrupt_char.h" -#include "py/mpconfig.h" #include "supervisor/shared/tick.h" +// Global millisecond tick count (driven by SysTick interrupt). +static inline mp_uint_t mp_hal_ticks_ms(void) { + return supervisor_ticks_ms32(); +} +// Number of bytes in receive buffer +volatile uint8_t usb_rx_count; +volatile bool mp_cdc_enabled; + +int receive_usb(void); -#define mp_hal_ticks_ms() ((mp_uint_t) supervisor_ticks_ms32()) -//#define mp_hal_delay_us(us) NRFX_DELAY_US((uint32_t) (us)) +void mp_hal_set_interrupt_char(int c); -bool mp_hal_stdin_any(void); +void mp_hal_disable_all_interrupts(void); +void mp_hal_enable_all_interrupts(void); -#endif +#endif // MICROPY_INCLUDED_STM32F4_MPHALPORT_H -- cgit v1.2.3 From 788464a59499c89959fbaae515070e1a34b5f255 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 5 Feb 2020 15:45:27 -0500 Subject: board uses VBUS --- ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h index 70f89d7e8..c51fa2e04 100644 --- a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h +++ b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h @@ -32,6 +32,4 @@ #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (0x4000) -#define BOARD_NO_VBUS_SENSE - #define BOARD_OSC_DIV 8 -- cgit v1.2.3 From f3188669e4f5c839b0cf8c49f21edd3b2a2a7d57 Mon Sep 17 00:00:00 2001 From: neubauek Date: Wed, 5 Feb 2020 14:52:47 -0600 Subject: Added CircuitBrains Basic and Deluxe Boards --- .../boards/circuitbrains_basic_m0/board.c | 40 ++++++++++++++++ .../boards/circuitbrains_basic_m0/mpconfigboard.h | 41 ++++++++++++++++ .../boards/circuitbrains_basic_m0/mpconfigboard.mk | 17 +++++++ .../boards/circuitbrains_basic_m0/pins.c | 35 ++++++++++++++ .../boards/circuitbrains_deluxe_m4/board.c | 40 ++++++++++++++++ .../boards/circuitbrains_deluxe_m4/mpconfigboard.h | 38 +++++++++++++++ .../circuitbrains_deluxe_m4/mpconfigboard.mk | 17 +++++++ .../boards/circuitbrains_deluxe_m4/pins.c | 55 ++++++++++++++++++++++ 8 files changed, 283 insertions(+) create mode 100755 ports/atmel-samd/boards/circuitbrains_basic_m0/board.c create mode 100755 ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h create mode 100755 ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk create mode 100755 ports/atmel-samd/boards/circuitbrains_basic_m0/pins.c create mode 100755 ports/atmel-samd/boards/circuitbrains_deluxe_m4/board.c create mode 100755 ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.h create mode 100755 ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk create mode 100755 ports/atmel-samd/boards/circuitbrains_deluxe_m4/pins.c (limited to 'ports') diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/board.c b/ports/atmel-samd/boards/circuitbrains_basic_m0/board.c new file mode 100755 index 000000000..efafd152d --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Original work copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Modified work copyright (c) 2019 Kevin Neubauer for Null Byte Labs LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h new file mode 100755 index 000000000..e58dfa2fd --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h @@ -0,0 +1,41 @@ +#define MICROPY_HW_BOARD_NAME "CircuitBrains Basic" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define CIRCUITPY_MCU_FAMILY samd21 + +#define MICROPY_HW_LED_STATUS (&pin_PA14) + +#define SPI_FLASH_BAUDRATE (8000000) + +// On-board flash +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_MISO_PIN &pin_PA18 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA19 + +// These are pins not to reset. +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code. +#define CIRCUITPY_INTERNAL_NVM_SIZE 256 + +#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define CALIBRATE_CRYSTALLESS 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA05) +#define DEFAULT_I2C_BUS_SDA (&pin_PA04) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA09) + +#define DEFAULT_UART_BUS_RX (&pin_PA07) +#define DEFAULT_UART_BUS_TX (&pin_PA06) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 \ No newline at end of file diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk new file mode 100755 index 000000000..0e75efd08 --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk @@ -0,0 +1,17 @@ +LD_FILE = boards/samd21x18-bootloader-external-flash-crystalless.ld +USB_VID = 0x04D8 +USB_PID = 0xEC63 +USB_PRODUCT = "CircuitBrains Basic" +USB_MANUFACTURER = "Kevin Neubauer" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q32JV_IQ" +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CSLAVE = 0 \ No newline at end of file diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/pins.c b/ports/atmel-samd/boards/circuitbrains_basic_m0/pins.c new file mode 100755 index 000000000..5acad5e98 --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/pins.c @@ -0,0 +1,35 @@ +#include "shared-bindings/board/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA08) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA28) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_STATUS_LED),MP_ROM_PTR(&pin_PA14) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_PA05) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK),MP_ROM_PTR(&pin_PA11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_PA10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/board.c b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/board.c new file mode 100755 index 000000000..efafd152d --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Original work copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * Modified work copyright (c) 2019 Kevin Neubauer for Null Byte Labs LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.h b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.h new file mode 100755 index 000000000..6a9dc8ebe --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.h @@ -0,0 +1,38 @@ +#define MICROPY_HW_BOARD_NAME "CircuitBrains Deluxe" +#define MICROPY_HW_MCU_NAME "samd51j19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_LED_STATUS (&pin_PB13) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// QSPI CS, QSPI SCK +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define AUTORESET_DELAY_MS 500 + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 8192 + +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PB03) +#define DEFAULT_I2C_BUS_SDA (&pin_PB02) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA12) +#define DEFAULT_SPI_BUS_MISO (&pin_PA14) + +#define DEFAULT_UART_BUS_RX (&pin_PA23) +#define DEFAULT_UART_BUS_TX (&pin_PA22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 \ No newline at end of file diff --git a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk new file mode 100755 index 000000000..2dcfed1f6 --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk @@ -0,0 +1,17 @@ +LD_FILE = boards/samd51x19-bootloader-external-flash.ld +USB_VID = 0x04D8 +USB_PID = 0xEC64 +USB_PRODUCT = "CircuitBrains Deluxe" +USB_MANUFACTURER = "Kevin Neubauer" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, S25FL064L" +LONGINT_IMPL = MPZ + +CIRCUITPY_NETWORK = 1 +MICROPY_PY_WIZNET5K = 5500 +CIRCUITPY_PS2IO = 1 \ No newline at end of file diff --git a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/pins.c b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/pins.c new file mode 100755 index 000000000..45fcd0464 --- /dev/null +++ b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/pins.c @@ -0,0 +1,55 @@ +#include "shared-bindings/board/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PB00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_PB01) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_STATUS_LED),MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PB31) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PB23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PB22) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_PB03) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK),MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_PA14) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From e28d244a0d03998f664e7fecec84853dc3249f0e Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 5 Feb 2020 18:03:54 -0500 Subject: Add espruino pico pinout --- ports/stm32f4/boards/STM32F401_fs.ld | 4 +- ports/stm32f4/boards/STM32F401xd_fs.ld | 107 +++++ ports/stm32f4/boards/espruino_pico/board.c | 39 ++ ports/stm32f4/boards/espruino_pico/mpconfigboard.h | 39 ++ .../stm32f4/boards/espruino_pico/mpconfigboard.mk | 16 + ports/stm32f4/boards/espruino_pico/pins.c | 29 ++ .../boards/espruino_pico/stm32f4xx_hal_conf.h | 440 +++++++++++++++++++++ 7 files changed, 672 insertions(+), 2 deletions(-) create mode 100644 ports/stm32f4/boards/STM32F401xd_fs.ld create mode 100644 ports/stm32f4/boards/espruino_pico/board.c create mode 100644 ports/stm32f4/boards/espruino_pico/mpconfigboard.h create mode 100644 ports/stm32f4/boards/espruino_pico/mpconfigboard.mk create mode 100644 ports/stm32f4/boards/espruino_pico/pins.c create mode 100644 ports/stm32f4/boards/espruino_pico/stm32f4xx_hal_conf.h (limited to 'ports') diff --git a/ports/stm32f4/boards/STM32F401_fs.ld b/ports/stm32f4/boards/STM32F401_fs.ld index fd30e1622..c42dfcca8 100644 --- a/ports/stm32f4/boards/STM32F401_fs.ld +++ b/ports/stm32f4/boards/STM32F401_fs.ld @@ -5,10 +5,10 @@ /* Specify the memory areas */ MEMORY { - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 384K /* entire flash */ FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ - FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 320K /* sector 4 is 64K, sectors 5,6,7 are 128K */ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K } diff --git a/ports/stm32f4/boards/STM32F401xd_fs.ld b/ports/stm32f4/boards/STM32F401xd_fs.ld new file mode 100644 index 000000000..fd30e1622 --- /dev/null +++ b/ports/stm32f4/boards/STM32F401xd_fs.ld @@ -0,0 +1,107 @@ +/* + GNU linker script for STM32F401 with bootloader (such as the Meowbit) +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/espruino_pico/board.c b/ports/stm32f4/boards/espruino_pico/board.c new file mode 100644 index 000000000..82b0c506e --- /dev/null +++ b/ports/stm32f4/boards/espruino_pico/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm32f4/boards/espruino_pico/mpconfigboard.h b/ports/stm32f4/boards/espruino_pico/mpconfigboard.h new file mode 100644 index 000000000..aa179c793 --- /dev/null +++ b/ports/stm32f4/boards/espruino_pico/mpconfigboard.h @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "Espruino Pico" +#define MICROPY_HW_MCU_NAME "STM32F401xD" + +#define FLASH_SIZE (0x60000) +#define FLASH_PAGE_SIZE (0x4000) + +#define AUTORESET_DELAY_MS 500 +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) + +#define BOARD_OSC_DIV 8 + diff --git a/ports/stm32f4/boards/espruino_pico/mpconfigboard.mk b/ports/stm32f4/boards/espruino_pico/mpconfigboard.mk new file mode 100644 index 000000000..1db393911 --- /dev/null +++ b/ports/stm32f4/boards/espruino_pico/mpconfigboard.mk @@ -0,0 +1,16 @@ +USB_VID = 0x239A +USB_PID = 0x805A +USB_PRODUCT = "Espruino Pico" +USB_MANUFACTURER = "Espruino" +USB_DEVICES = "CDC,MSC" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f401xe +MCU_PACKAGE = 48 +CMSIS_MCU = STM32F401xE +LD_FILE = boards/STM32F401xd_fs.ld # use for internal flash + diff --git a/ports/stm32f4/boards/espruino_pico/pins.c b/ports/stm32f4/boards/espruino_pico/pins.c new file mode 100644 index 000000000..89f618c25 --- /dev/null +++ b/ports/stm32f4/boards/espruino_pico/pins.c @@ -0,0 +1,29 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_B15), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_B14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_B13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_B10), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_B1), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_B3), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_B4), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_B5), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_B6), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_B7), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_B9), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_B8), MP_ROM_PTR(&pin_PB08) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm32f4/boards/espruino_pico/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/espruino_pico/stm32f4xx_hal_conf.h new file mode 100644 index 000000000..ab04df318 --- /dev/null +++ b/ports/stm32f4/boards/espruino_pico/stm32f4xx_hal_conf.h @@ -0,0 +1,440 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -- cgit v1.2.3 From cdd1622350fb8413f2d26977a4bcdfd436233eb9 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 5 Feb 2020 18:12:48 -0500 Subject: Fix oscillator oversight in clocks.c --- ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h | 2 ++ ports/stm32f4/boards/pyboard_v11/mpconfigboard.h | 1 + ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h | 2 ++ ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c | 3 ++- ports/stm32f4/peripherals/stm32f4/stm32f405xx/clocks.c | 3 ++- ports/stm32f4/peripherals/stm32f4/stm32f412zx/clocks.c | 3 ++- 6 files changed, 11 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h index ad9bba7b0..3ea469383 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h @@ -34,6 +34,8 @@ #define MICROPY_HW_NEOPIXEL (&pin_PC00) +#define BOARD_OSC_DIV 12 + // On-board flash #define SPI_FLASH_MOSI_PIN (&pin_PB05) #define SPI_FLASH_MISO_PIN (&pin_PB04) diff --git a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.h b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.h index 7093442d0..2da2c6da9 100644 --- a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.h +++ b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.h @@ -32,6 +32,7 @@ #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (0x4000) +#define BOARD_OSC_DIV 12 #define DEFAULT_I2C_BUS_SCL (&pin_PB06) #define DEFAULT_I2C_BUS_SDA (&pin_PB07) diff --git a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h index 3ab9a5585..b6d28cb12 100644 --- a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h +++ b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h @@ -32,5 +32,7 @@ #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (0x4000) +#define BOARD_OSC_DIV 8 + #define DEFAULT_I2C_BUS_SCL (&pin_PB10) #define DEFAULT_I2C_BUS_SDA (&pin_PB09) diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c index 53af29b3b..53810af26 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c @@ -25,6 +25,7 @@ * THE SOFTWARE. */ #include "stm32f4xx_hal.h" +#include "py/mpconfig.h" void stm32f4_peripherals_clocks_init(void) { //System clock init @@ -44,7 +45,7 @@ void stm32f4_peripherals_clocks_init(void) { RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 12; + RCC_OscInitStruct.PLL.PLLM = BOARD_OSC_DIV; RCC_OscInitStruct.PLL.PLLN = 336; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; RCC_OscInitStruct.PLL.PLLQ = 7; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/clocks.c b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/clocks.c index c259f54fa..2afca64e8 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/clocks.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/clocks.c @@ -25,6 +25,7 @@ * THE SOFTWARE. */ #include "stm32f4xx_hal.h" +#include "py/mpconfig.h" void stm32f4_peripherals_clocks_init(void) { //TODO: All parameters must be moved to board level, due to relationship with HSE Osc. @@ -46,7 +47,7 @@ void stm32f4_peripherals_clocks_init(void) { RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 12; + RCC_OscInitStruct.PLL.PLLM = BOARD_OSC_DIV; RCC_OscInitStruct.PLL.PLLN = 336; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLQ = 7; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/clocks.c b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/clocks.c index 107056550..b208f9dfb 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/clocks.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/clocks.c @@ -25,6 +25,7 @@ * THE SOFTWARE. */ #include "stm32f4xx_hal.h" +#include "py/mpconfig.h" void stm32f4_peripherals_clocks_init(void) { //System clock init @@ -46,7 +47,7 @@ void stm32f4_peripherals_clocks_init(void) { RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLM = BOARD_OSC_DIV; RCC_OscInitStruct.PLL.PLLN = 200; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLQ = 7; -- cgit v1.2.3 From 72a1bdab30cc93bcef16c6c81cad4eee175531f0 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Wed, 5 Feb 2020 15:54:31 -0800 Subject: Add another error message for extended advertisements at the same time as scan response. The SD can't do it. --- locale/ID.po | 6 +++++- locale/circuitpython.pot | 6 +++++- locale/de_DE.po | 6 +++++- locale/en_US.po | 6 +++++- locale/en_x_pirate.po | 6 +++++- locale/es.po | 6 +++++- locale/fil.po | 6 +++++- locale/fr.po | 6 +++++- locale/it_IT.po | 6 +++++- locale/ko.po | 6 +++++- locale/pl.po | 6 +++++- locale/pt_BR.po | 6 +++++- locale/zh_Latn_pinyin.po | 6 +++++- ports/nrf/common-hal/_bleio/Adapter.c | 4 ++++ 14 files changed, 69 insertions(+), 13 deletions(-) (limited to 'ports') diff --git a/locale/ID.po b/locale/ID.po index 02b7376cc..bcdad2994 100644 --- a/locale/ID.po +++ b/locale/ID.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-03 23:41-0500\n" +"POT-Creation-Date: 2020-02-05 15:55-0800\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -676,6 +676,10 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index acd4c3eb0..6069bdd97 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-03 23:41-0500\n" +"POT-Creation-Date: 2020-02-05 15:55-0800\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -665,6 +665,10 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" diff --git a/locale/de_DE.po b/locale/de_DE.po index 435050c8d..f2d8537f6 100644 --- a/locale/de_DE.po +++ b/locale/de_DE.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-03 23:41-0500\n" +"POT-Creation-Date: 2020-02-05 15:55-0800\n" "PO-Revision-Date: 2018-07-27 11:55-0700\n" "Last-Translator: Pascal Deneaux\n" "Language-Team: Sebastian Plamauer, Pascal Deneaux\n" @@ -669,6 +669,10 @@ msgstr "Erwartet eine Adresse" msgid "Expected tuple of length %d, got %d" msgstr "Habe ein Tupel der Länge %d erwartet aber %d erhalten" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "Kommando nicht gesendet." diff --git a/locale/en_US.po b/locale/en_US.po index 7c44dc02f..680c535a9 100644 --- a/locale/en_US.po +++ b/locale/en_US.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-03 23:41-0500\n" +"POT-Creation-Date: 2020-02-05 15:55-0800\n" "PO-Revision-Date: 2018-07-27 11:55-0700\n" "Last-Translator: \n" "Language-Team: \n" @@ -665,6 +665,10 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" diff --git a/locale/en_x_pirate.po b/locale/en_x_pirate.po index e84725f4f..5ff575cdf 100644 --- a/locale/en_x_pirate.po +++ b/locale/en_x_pirate.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-03 23:41-0500\n" +"POT-Creation-Date: 2020-02-05 15:55-0800\n" "PO-Revision-Date: 2018-07-27 11:55-0700\n" "Last-Translator: \n" "Language-Team: @sommersoft, @MrCertainly\n" @@ -669,6 +669,10 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" diff --git a/locale/es.po b/locale/es.po index c86a1e1e3..873c4d3e7 100644 --- a/locale/es.po +++ b/locale/es.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-03 23:41-0500\n" +"POT-Creation-Date: 2020-02-05 15:55-0800\n" "PO-Revision-Date: 2018-08-24 22:56-0500\n" "Last-Translator: \n" "Language-Team: \n" @@ -671,6 +671,10 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "Se esperaba un tuple de %d, se obtuvo %d" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "Fallo enviando comando" diff --git a/locale/fil.po b/locale/fil.po index 27c0accbf..63feb3316 100644 --- a/locale/fil.po +++ b/locale/fil.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-03 23:41-0500\n" +"POT-Creation-Date: 2020-02-05 15:55-0800\n" "PO-Revision-Date: 2018-12-20 22:15-0800\n" "Last-Translator: Timothy \n" "Language-Team: fil\n" @@ -679,6 +679,10 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" diff --git a/locale/fr.po b/locale/fr.po index 504cc8a29..ba1d56211 100644 --- a/locale/fr.po +++ b/locale/fr.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: 0.1\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-03 23:41-0500\n" +"POT-Creation-Date: 2020-02-05 15:55-0800\n" "PO-Revision-Date: 2019-04-14 20:05+0100\n" "Last-Translator: Pierrick Couturier \n" "Language-Team: fr\n" @@ -682,6 +682,10 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "Tuple de longueur %d attendu, obtenu %d" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" diff --git a/locale/it_IT.po b/locale/it_IT.po index 65e733c8b..6bc116f21 100644 --- a/locale/it_IT.po +++ b/locale/it_IT.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-03 23:41-0500\n" +"POT-Creation-Date: 2020-02-05 15:55-0800\n" "PO-Revision-Date: 2018-10-02 16:27+0200\n" "Last-Translator: Enrico Paganin \n" "Language-Team: \n" @@ -679,6 +679,10 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" diff --git a/locale/ko.po b/locale/ko.po index 68df09152..64bd2e9dd 100644 --- a/locale/ko.po +++ b/locale/ko.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-03 23:41-0500\n" +"POT-Creation-Date: 2020-02-05 15:55-0800\n" "PO-Revision-Date: 2019-05-06 14:22-0700\n" "Last-Translator: \n" "Language-Team: LANGUAGE \n" @@ -669,6 +669,10 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" diff --git a/locale/pl.po b/locale/pl.po index 7570a47b5..77357d05d 100644 --- a/locale/pl.po +++ b/locale/pl.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-03 23:41-0500\n" +"POT-Creation-Date: 2020-02-05 15:55-0800\n" "PO-Revision-Date: 2019-03-19 18:37-0700\n" "Last-Translator: Radomir Dopieralski \n" "Language-Team: pl\n" @@ -668,6 +668,10 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "Oczekiwano krotkę długości %d, otrzymano %d" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" diff --git a/locale/pt_BR.po b/locale/pt_BR.po index 772aba089..e5dde29f4 100644 --- a/locale/pt_BR.po +++ b/locale/pt_BR.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-03 23:41-0500\n" +"POT-Creation-Date: 2020-02-05 15:55-0800\n" "PO-Revision-Date: 2018-10-02 21:14-0000\n" "Last-Translator: \n" "Language-Team: \n" @@ -674,6 +674,10 @@ msgstr "" msgid "Expected tuple of length %d, got %d" msgstr "" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "Falha ao enviar comando." diff --git a/locale/zh_Latn_pinyin.po b/locale/zh_Latn_pinyin.po index b7375d48c..dbe1605b6 100644 --- a/locale/zh_Latn_pinyin.po +++ b/locale/zh_Latn_pinyin.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: circuitpython-cn\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-03 23:41-0500\n" +"POT-Creation-Date: 2020-02-05 15:55-0800\n" "PO-Revision-Date: 2019-04-13 10:10-0700\n" "Last-Translator: hexthat\n" "Language-Team: Chinese Hanyu Pinyin\n" @@ -669,6 +669,10 @@ msgstr "Qídài yīgè dìzhǐ" msgid "Expected tuple of length %d, got %d" msgstr "Qīwàng de chángdù wèi %d de yuán zǔ, dédào %d" +#: ports/nrf/common-hal/_bleio/Adapter.c +msgid "Extended advertisements with scan response not supported." +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "Fāsòng mìnglìng shībài." diff --git a/ports/nrf/common-hal/_bleio/Adapter.c b/ports/nrf/common-hal/_bleio/Adapter.c index 4aa8678a3..09b7c95b9 100644 --- a/ports/nrf/common-hal/_bleio/Adapter.c +++ b/ports/nrf/common-hal/_bleio/Adapter.c @@ -646,6 +646,10 @@ void common_hal_bleio_adapter_start_advertising(bleio_adapter_obj_t *self, bool check_data_fit(advertising_data_bufinfo->len, connectable); check_data_fit(scan_response_data_bufinfo->len, connectable); + + if (advertising_data_bufinfo->len > 31 && scan_response_data_bufinfo->len > 0) { + mp_raise_bleio_BluetoothError(translate("Extended advertisements with scan response not supported.")); + } // The advertising data buffers must not move, because the SoftDevice depends on them. // So make them long-lived and reuse them onwards. if (self->advertising_data == NULL) { -- cgit v1.2.3 From acef93a25391594111c1ded0614c440e04e23d26 Mon Sep 17 00:00:00 2001 From: James Bowman Date: Wed, 5 Feb 2020 18:17:58 -0800 Subject: Rename eveL to _eve, EVEL to _EVE --- .../boards/metro_m4_express/mpconfigboard.mk | 2 +- .../boards/metro_nrf52840_express/mpconfigboard.mk | 2 +- py/circuitpy_defns.mk | 6 +- py/circuitpy_mpconfig.h | 10 +- py/circuitpy_mpconfig.mk | 6 +- shared-bindings/_eve/__init__.c | 223 +++++++++++ shared-bindings/_eve/mod_eve-gen.h | 412 +++++++++++++++++++++ shared-bindings/eveL/__init__.c | 223 ----------- shared-bindings/eveL/modeveL-gen.h | 412 --------------------- 9 files changed, 648 insertions(+), 648 deletions(-) create mode 100644 shared-bindings/_eve/__init__.c create mode 100644 shared-bindings/_eve/mod_eve-gen.h delete mode 100644 shared-bindings/eveL/__init__.c delete mode 100644 shared-bindings/eveL/modeveL-gen.h (limited to 'ports') diff --git a/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.mk index d4593f83a..c2603002c 100644 --- a/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.mk @@ -11,4 +11,4 @@ EXTERNAL_FLASH_DEVICE_COUNT = 3 EXTERNAL_FLASH_DEVICES = "S25FL116K, S25FL216K, GD25Q16C" LONGINT_IMPL = MPZ -CIRCUITPY_EVEL = 1 +CIRCUITPY__EVE = 1 diff --git a/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.mk b/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.mk index ade77f076..b972bcbed 100644 --- a/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.mk +++ b/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.mk @@ -9,4 +9,4 @@ QSPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = "GD25Q16C" -CIRCUITPY_EVEL = 1 +CIRCUITPY__EVE = 1 diff --git a/py/circuitpy_defns.mk b/py/circuitpy_defns.mk index 859d3837b..e7d49ae24 100644 --- a/py/circuitpy_defns.mk +++ b/py/circuitpy_defns.mk @@ -157,8 +157,8 @@ endif ifeq ($(CIRCUITPY_MATH),1) SRC_PATTERNS += math/% endif -ifeq ($(CIRCUITPY_EVEL),1) -SRC_PATTERNS += eveL/% +ifeq ($(CIRCUITPY__EVE),1) +SRC_PATTERNS += _eve/% endif ifeq ($(CIRCUITPY_MICROCONTROLLER),1) SRC_PATTERNS += microcontroller/% @@ -301,7 +301,7 @@ $(filter $(SRC_PATTERNS), \ fontio/Glyph.c \ microcontroller/RunMode.c \ math/__init__.c \ - eveL/__init__.c \ + _eve/__init__.c \ ) SRC_BINDINGS_ENUMS += \ diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 8b7ac46b0..c1ac2cddb 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -384,11 +384,11 @@ extern const struct _mp_obj_module_t math_module; #define MATH_MODULE #endif -#if CIRCUITPY_EVEL -extern const struct _mp_obj_module_t eveL_module; -#define EVEL_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_eveL), (mp_obj_t)&eveL_module }, +#if CIRCUITPY__EVE +extern const struct _mp_obj_module_t _eve_module; +#define _EVE_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR__eve), (mp_obj_t)&_eve_module }, #else -#define EVEL_MODULE +#define _EVE_MODULE #endif #if CIRCUITPY_MICROCONTROLLER @@ -624,7 +624,7 @@ extern const struct _mp_obj_module_t ustack_module; I2CSLAVE_MODULE \ JSON_MODULE \ MATH_MODULE \ - EVEL_MODULE \ + _EVE_MODULE \ MICROCONTROLLER_MODULE \ NEOPIXEL_WRITE_MODULE \ NETWORK_MODULE \ diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk index b72eec7c5..93e5982d5 100644 --- a/py/circuitpy_mpconfig.mk +++ b/py/circuitpy_mpconfig.mk @@ -174,10 +174,10 @@ CIRCUITPY_MATH = $(CIRCUITPY_ALWAYS_BUILD) endif CFLAGS += -DCIRCUITPY_MATH=$(CIRCUITPY_MATH) -ifndef CIRCUITPY_EVEL -CIRCUITPY_EVEL = 0 +ifndef CIRCUITPY__EVE +CIRCUITPY__EVE = 0 endif -CFLAGS += -DCIRCUITPY_EVEL=$(CIRCUITPY_EVEL) +CFLAGS += -DCIRCUITPY__EVE=$(CIRCUITPY__EVE) ifndef CIRCUITPY_MICROCONTROLLER CIRCUITPY_MICROCONTROLLER = $(CIRCUITPY_DEFAULT_BUILD) diff --git a/shared-bindings/_eve/__init__.c b/shared-bindings/_eve/__init__.c new file mode 100644 index 000000000..5263fe127 --- /dev/null +++ b/shared-bindings/_eve/__init__.c @@ -0,0 +1,223 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 James Bowman + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include +#include + +#include "py/runtime.h" +#include "py/binary.h" + +//| :mod:`_eve` --- low-level BridgeTek EVE bindings +//| ================================================ +//| +//| .. module:: _eve +//| :synopsis: low-level BridgeTek EVE bindings +//| :platform: SAMD21/SAMD51 +//| +//| The `_eve` module provides a class _EVE which +//| contains methods for constructing EVE command +//| buffers and appending basic graphics commands. +//| + +typedef struct _mp_obj__EVE_t { + mp_obj_base_t base; + mp_obj_t dest[3]; + size_t n; + uint8_t buf[512]; +} mp_obj__EVE_t; + +STATIC const mp_obj_type_t _EVE_type; + +STATIC void _write(mp_obj__EVE_t *_EVE, mp_obj_t b) { + _EVE->dest[2] = b; + mp_call_method_n_kw(1, 0, _EVE->dest); +} + +STATIC mp_obj_t _register(mp_obj_t self, mp_obj_t o) { + mp_obj__EVE_t *_EVE = mp_instance_cast_to_native_base(self, &_EVE_type); + _EVE->n = 0; + mp_load_method(o, MP_QSTR_write, _EVE->dest); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(register_obj, _register); + +STATIC mp_obj_t _flush(mp_obj_t self) { + mp_obj__EVE_t *_EVE = mp_instance_cast_to_native_base(self, &_EVE_type); + if (_EVE->n != 0) { + _write(_EVE, mp_obj_new_bytearray_by_ref(_EVE->n, _EVE->buf)); + _EVE->n = 0; + } + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(flush_obj, _flush); + +STATIC void *append(mp_obj_t self, size_t m) { + mp_obj__EVE_t *_EVE = mp_instance_cast_to_native_base(self, &_EVE_type); + if ((_EVE->n + m) > sizeof(_EVE->buf)) + _flush((mp_obj_t)_EVE); + uint8_t *r = _EVE->buf + _EVE->n; + _EVE->n += m; + return (void*)r; +} + +STATIC mp_obj_t _cc(mp_obj_t self, mp_obj_t b) { + mp_obj__EVE_t *_EVE = mp_instance_cast_to_native_base(self, &_EVE_type); + mp_buffer_info_t buffer_info; + mp_get_buffer_raise(b, &buffer_info, MP_BUFFER_READ); + if (buffer_info.len <= sizeof(_EVE->buf)) { + uint8_t *p = (uint8_t*)append(_EVE, buffer_info.len); + // memcpy(p, buffer_info.buf, buffer_info.len); + uint8_t *s = buffer_info.buf; + for (size_t i = 0; i < buffer_info.len; i++) + *p++ = *s++; + } else { + _flush(self); + _write(_EVE, b); + } + + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(cc_obj, _cc); + +#define C4(self, u) (*(uint32_t*)append((self), sizeof(uint32_t)) = (u)) + +#include "mod_eve-gen.h" + +// Hand-written functions { + +STATIC mp_obj_t _cmd0(mp_obj_t self, mp_obj_t n) { + C4(self, (0xffffff00 | mp_obj_get_int_truncated(n))); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(cmd0_obj, _cmd0); + +STATIC mp_obj_t _vertex2f(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + int16_t x = (int16_t)(16 * mp_obj_get_float(a0)); + int16_t y = (int16_t)(16 * mp_obj_get_float(a1)); + C4(self, (0x40000000 | ((x & 32767) << 15) | (y & 32767))); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(vertex2f_obj, _vertex2f); + +STATIC mp_obj_t _cmd(size_t n_args, const mp_obj_t *args) { + mp_obj_t self = args[0]; + mp_obj_t num = args[1]; + mp_buffer_info_t fmt; + mp_get_buffer_raise(args[2], &fmt, MP_BUFFER_READ); + size_t len; + mp_obj_t *items; + mp_obj_tuple_get(args[3], &len, &items); + + // Count how many 32-bit words required + size_t n = 0; + for (size_t i = 0; i < fmt.len; n++) { + switch (((char*)fmt.buf)[i]) { + case 'I': + case 'i': + i += 1; + break; + case 'H': + case 'h': + i += 2; + break; + default: + break; + } + } + + uint32_t *p = (uint32_t*)append(self, sizeof(uint32_t) * (1 + n)); + *p++ = 0xffffff00 | mp_obj_get_int_truncated(num); + mp_obj_t *a = items; + uint32_t lo; + + for (size_t i = 0; i < fmt.len; ) { + switch (((char*)fmt.buf)[i]) { + case 'I': + case 'i': + *p++ = mp_obj_get_int_truncated(*a++); + i += 1; + break; + case 'H': + case 'h': + lo = mp_obj_get_int_truncated(*a++) & 0xffff; + *p++ = lo | (mp_obj_get_int_truncated(*a++) << 16); + i += 2; + break; + default: + break; + } + } + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(cmd_obj, 4, 4, _cmd); + +STATIC const mp_rom_map_elem_t _EVE_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_register), MP_ROM_PTR(®ister_obj) }, + { MP_ROM_QSTR(MP_QSTR_cc), MP_ROM_PTR(&cc_obj) }, + { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&flush_obj) }, + { MP_ROM_QSTR(MP_QSTR_Vertex2f), MP_ROM_PTR(&vertex2f_obj) }, + { MP_ROM_QSTR(MP_QSTR_cmd), MP_ROM_PTR(&cmd_obj) }, + { MP_ROM_QSTR(MP_QSTR_cmd0), MP_ROM_PTR(&cmd0_obj) }, + ROM_DECLS +}; +STATIC MP_DEFINE_CONST_DICT(_EVE_locals_dict, _EVE_locals_dict_table); + +STATIC void _EVE_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { + (void)self_in; + (void)kind; + mp_printf(print, "<_EVE>"); +} + +STATIC mp_obj_t _EVE_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { + // mp_arg_check_num(n_args, kw_args, 1, 1, false); + mp_obj__EVE_t *o = m_new_obj(mp_obj__EVE_t); + mp_printf(&mp_plat_print, "_EVE %p make_new\n", o); + o->base.type = &_EVE_type; + return MP_OBJ_FROM_PTR(o); +} + +STATIC const mp_obj_type_t _EVE_type = { + { &mp_type_type }, + // Save on qstr's, reuse same as for module + .name = MP_QSTR__EVE, + .print = _EVE_print, + .make_new = _EVE_make_new, + // .attr = _EVE_attr, + .locals_dict = (void*)&_EVE_locals_dict, +}; + +STATIC const mp_rom_map_elem_t mp_module__eve_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR__eve) }, + { MP_ROM_QSTR(MP_QSTR__EVE), MP_OBJ_FROM_PTR(&_EVE_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(mp_module__eve_globals, mp_module__eve_globals_table); + +const mp_obj_module_t _eve_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&mp_module__eve_globals, +}; diff --git a/shared-bindings/_eve/mod_eve-gen.h b/shared-bindings/_eve/mod_eve-gen.h new file mode 100644 index 000000000..1c8d5ae12 --- /dev/null +++ b/shared-bindings/_eve/mod_eve-gen.h @@ -0,0 +1,412 @@ + +STATIC mp_obj_t _alphafunc(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t func = mp_obj_get_int_truncated(a0); + uint32_t ref = mp_obj_get_int_truncated(a1); + C4(self, ((9 << 24) | ((func & 7) << 8) | ((ref & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(alphafunc_obj, _alphafunc); + +STATIC mp_obj_t _begin(mp_obj_t self , mp_obj_t a0) { + uint32_t prim = mp_obj_get_int_truncated(a0); + C4(self, ((31 << 24) | ((prim & 15))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(begin_obj, _begin); + +STATIC mp_obj_t _bitmapextformat(mp_obj_t self , mp_obj_t a0) { + uint32_t fmt = mp_obj_get_int_truncated(a0); + C4(self, ((46 << 24) | (fmt & 65535)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmapextformat_obj, _bitmapextformat); + +STATIC mp_obj_t _bitmaphandle(mp_obj_t self , mp_obj_t a0) { + uint32_t handle = mp_obj_get_int_truncated(a0); + C4(self, ((5 << 24) | ((handle & 31))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmaphandle_obj, _bitmaphandle); + +STATIC mp_obj_t _bitmaplayouth(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t linestride = mp_obj_get_int_truncated(a0); + uint32_t height = mp_obj_get_int_truncated(a1); + C4(self, ((40 << 24) | (((linestride) & 3) << 2) | (((height) & 3))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaplayouth_obj, _bitmaplayouth); + +STATIC mp_obj_t _bitmaplayout(size_t n_args, const mp_obj_t *args) { + uint32_t format = mp_obj_get_int_truncated(args[1]); + uint32_t linestride = mp_obj_get_int_truncated(args[2]); + uint32_t height = mp_obj_get_int_truncated(args[3]); + C4(args[0], ((7 << 24) | ((format & 31) << 19) | ((linestride & 1023) << 9) | ((height & 511))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitmaplayout_obj, 4, 4, _bitmaplayout); + +STATIC mp_obj_t _bitmapsizeh(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t width = mp_obj_get_int_truncated(a0); + uint32_t height = mp_obj_get_int_truncated(a1); + C4(self, ((41 << 24) | (((width) & 3) << 2) | (((height) & 3))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmapsizeh_obj, _bitmapsizeh); + +STATIC mp_obj_t _bitmapsize(size_t n_args, const mp_obj_t *args) { + uint32_t filter = mp_obj_get_int_truncated(args[1]); + uint32_t wrapx = mp_obj_get_int_truncated(args[2]); + uint32_t wrapy = mp_obj_get_int_truncated(args[3]); + uint32_t width = mp_obj_get_int_truncated(args[4]); + uint32_t height = mp_obj_get_int_truncated(args[5]); + C4(args[0], ((8 << 24) | ((filter & 1) << 20) | ((wrapx & 1) << 19) | ((wrapy & 1) << 18) | ((width & 511) << 9) | ((height & 511))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitmapsize_obj, 6, 6, _bitmapsize); + +STATIC mp_obj_t _bitmapsource(mp_obj_t self , mp_obj_t a0) { + uint32_t addr = mp_obj_get_int_truncated(a0); + C4(self, ((1 << 24) | ((addr & 0xffffff))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmapsource_obj, _bitmapsource); + +STATIC mp_obj_t _bitmapswizzle(size_t n_args, const mp_obj_t *args) { + uint32_t r = mp_obj_get_int_truncated(args[1]); + uint32_t g = mp_obj_get_int_truncated(args[2]); + uint32_t b = mp_obj_get_int_truncated(args[3]); + uint32_t a = mp_obj_get_int_truncated(args[4]); + C4(args[0], ((47 << 24) | ((r & 7) << 9) | ((g & 7) << 6) | ((b & 7) << 3) | ((a & 7))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitmapswizzle_obj, 5, 5, _bitmapswizzle); + +STATIC mp_obj_t _bitmaptransforma(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t a = mp_obj_get_int_truncated(a0); + uint32_t p = mp_obj_get_int_truncated(a1); + C4(self, ((21 << 24) | ((p & 1) << 17) | ((a & 131071))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransforma_obj, _bitmaptransforma); + +STATIC mp_obj_t _bitmaptransformb(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t b = mp_obj_get_int_truncated(a0); + uint32_t p = mp_obj_get_int_truncated(a1); + C4(self, ((22 << 24) | ((p & 1) << 17) | ((b & 131071))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformb_obj, _bitmaptransformb); + +STATIC mp_obj_t _bitmaptransformc(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t c = mp_obj_get_int_truncated(a0); + uint32_t p = mp_obj_get_int_truncated(a1); + C4(self, ((23 << 24) | ((p & 1) << 17) | ((c & 16777215))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformc_obj, _bitmaptransformc); + +STATIC mp_obj_t _bitmaptransformd(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t d = mp_obj_get_int_truncated(a0); + uint32_t p = mp_obj_get_int_truncated(a1); + C4(self, ((24 << 24) | ((p & 1) << 17) | ((d & 131071))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformd_obj, _bitmaptransformd); + +STATIC mp_obj_t _bitmaptransforme(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t e = mp_obj_get_int_truncated(a0); + uint32_t p = mp_obj_get_int_truncated(a1); + C4(self, ((25 << 24) | ((p & 1) << 17) | ((e & 131071))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransforme_obj, _bitmaptransforme); + +STATIC mp_obj_t _bitmaptransformf(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t f = mp_obj_get_int_truncated(a0); + uint32_t p = mp_obj_get_int_truncated(a1); + C4(self, ((26 << 24) | ((p & 1) << 17) | ((f & 16777215))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformf_obj, _bitmaptransformf); + +STATIC mp_obj_t _blendfunc(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t src = mp_obj_get_int_truncated(a0); + uint32_t dst = mp_obj_get_int_truncated(a1); + C4(self, ((11 << 24) | ((src & 7) << 3) | ((dst & 7))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(blendfunc_obj, _blendfunc); + +STATIC mp_obj_t _call(mp_obj_t self , mp_obj_t a0) { + uint32_t dest = mp_obj_get_int_truncated(a0); + C4(self, ((29 << 24) | ((dest & 65535))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(call_obj, _call); + +STATIC mp_obj_t _cell(mp_obj_t self , mp_obj_t a0) { + uint32_t cell = mp_obj_get_int_truncated(a0); + C4(self, ((6 << 24) | ((cell & 127))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(cell_obj, _cell); + +STATIC mp_obj_t _clearcolora(mp_obj_t self , mp_obj_t a0) { + uint32_t alpha = mp_obj_get_int_truncated(a0); + C4(self, ((15 << 24) | ((alpha & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(clearcolora_obj, _clearcolora); + +STATIC mp_obj_t _clearcolorrgb(size_t n_args, const mp_obj_t *args) { + uint32_t red = mp_obj_get_int_truncated(args[1]); + uint32_t green = mp_obj_get_int_truncated(args[2]); + uint32_t blue = mp_obj_get_int_truncated(args[3]); + C4(args[0], ((2 << 24) | ((red & 255) << 16) | ((green & 255) << 8) | ((blue & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(clearcolorrgb_obj, 4, 4, _clearcolorrgb); + +STATIC mp_obj_t _clear(size_t n_args, const mp_obj_t *args) { + uint32_t c = mp_obj_get_int_truncated(args[1]); + uint32_t s = mp_obj_get_int_truncated(args[2]); + uint32_t t = mp_obj_get_int_truncated(args[3]); + C4(args[0], ((38 << 24) | ((c & 1) << 2) | ((s & 1) << 1) | ((t & 1))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(clear_obj, 4, 4, _clear); + +STATIC mp_obj_t _clearstencil(mp_obj_t self , mp_obj_t a0) { + uint32_t s = mp_obj_get_int_truncated(a0); + C4(self, ((17 << 24) | ((s & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(clearstencil_obj, _clearstencil); + +STATIC mp_obj_t _cleartag(mp_obj_t self , mp_obj_t a0) { + uint32_t s = mp_obj_get_int_truncated(a0); + C4(self, ((18 << 24) | ((s & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(cleartag_obj, _cleartag); + +STATIC mp_obj_t _colora(mp_obj_t self , mp_obj_t a0) { + uint32_t alpha = mp_obj_get_int_truncated(a0); + C4(self, ((16 << 24) | ((alpha & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(colora_obj, _colora); + +STATIC mp_obj_t _colormask(size_t n_args, const mp_obj_t *args) { + uint32_t r = mp_obj_get_int_truncated(args[1]); + uint32_t g = mp_obj_get_int_truncated(args[2]); + uint32_t b = mp_obj_get_int_truncated(args[3]); + uint32_t a = mp_obj_get_int_truncated(args[4]); + C4(args[0], ((32 << 24) | ((r & 1) << 3) | ((g & 1) << 2) | ((b & 1) << 1) | ((a & 1))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(colormask_obj, 5, 5, _colormask); + +STATIC mp_obj_t _colorrgb(size_t n_args, const mp_obj_t *args) { + uint32_t red = mp_obj_get_int_truncated(args[1]); + uint32_t green = mp_obj_get_int_truncated(args[2]); + uint32_t blue = mp_obj_get_int_truncated(args[3]); + C4(args[0], ((4 << 24) | ((red & 255) << 16) | ((green & 255) << 8) | ((blue & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(colorrgb_obj, 4, 4, _colorrgb); + +STATIC mp_obj_t _display(mp_obj_t self ) { + + C4(self, ((0 << 24)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(display_obj, _display); + +STATIC mp_obj_t _end(mp_obj_t self ) { + + C4(self, ((33 << 24)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(end_obj, _end); + +STATIC mp_obj_t _jump(mp_obj_t self , mp_obj_t a0) { + uint32_t dest = mp_obj_get_int_truncated(a0); + C4(self, ((30 << 24) | ((dest & 65535))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(jump_obj, _jump); + +STATIC mp_obj_t _linewidth(mp_obj_t self , mp_obj_t a0) { + uint32_t width = mp_obj_get_int_truncated(a0); + C4(self, ((14 << 24) | ((width & 4095))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(linewidth_obj, _linewidth); + +STATIC mp_obj_t _macro(mp_obj_t self , mp_obj_t a0) { + uint32_t m = mp_obj_get_int_truncated(a0); + C4(self, ((37 << 24) | ((m & 1))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(macro_obj, _macro); + +STATIC mp_obj_t _nop(mp_obj_t self ) { + + C4(self, ((45 << 24)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(nop_obj, _nop); + +STATIC mp_obj_t _palettesource(mp_obj_t self , mp_obj_t a0) { + uint32_t addr = mp_obj_get_int_truncated(a0); + C4(self, ((42 << 24) | (((addr) & 4194303))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(palettesource_obj, _palettesource); + +STATIC mp_obj_t _pointsize(mp_obj_t self , mp_obj_t a0) { + uint32_t size = mp_obj_get_int_truncated(a0); + C4(self, ((13 << 24) | ((size & 8191))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(pointsize_obj, _pointsize); + +STATIC mp_obj_t _restorecontext(mp_obj_t self ) { + + C4(self, ((35 << 24)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(restorecontext_obj, _restorecontext); + +STATIC mp_obj_t _return(mp_obj_t self ) { + + C4(self, ((36 << 24)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(return_obj, _return); + +STATIC mp_obj_t _savecontext(mp_obj_t self ) { + + C4(self, ((34 << 24)) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(savecontext_obj, _savecontext); + +STATIC mp_obj_t _scissorsize(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t width = mp_obj_get_int_truncated(a0); + uint32_t height = mp_obj_get_int_truncated(a1); + C4(self, ((28 << 24) | ((width & 4095) << 12) | ((height & 4095))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(scissorsize_obj, _scissorsize); + +STATIC mp_obj_t _scissorxy(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t x = mp_obj_get_int_truncated(a0); + uint32_t y = mp_obj_get_int_truncated(a1); + C4(self, ((27 << 24) | ((x & 2047) << 11) | ((y & 2047))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(scissorxy_obj, _scissorxy); + +STATIC mp_obj_t _stencilfunc(size_t n_args, const mp_obj_t *args) { + uint32_t func = mp_obj_get_int_truncated(args[1]); + uint32_t ref = mp_obj_get_int_truncated(args[2]); + uint32_t mask = mp_obj_get_int_truncated(args[3]); + C4(args[0], ((10 << 24) | ((func & 7) << 16) | ((ref & 255) << 8) | ((mask & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(stencilfunc_obj, 4, 4, _stencilfunc); + +STATIC mp_obj_t _stencilmask(mp_obj_t self , mp_obj_t a0) { + uint32_t mask = mp_obj_get_int_truncated(a0); + C4(self, ((19 << 24) | ((mask & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(stencilmask_obj, _stencilmask); + +STATIC mp_obj_t _stencilop(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { + uint32_t sfail = mp_obj_get_int_truncated(a0); + uint32_t spass = mp_obj_get_int_truncated(a1); + C4(self, ((12 << 24) | ((sfail & 7) << 3) | ((spass & 7))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_3(stencilop_obj, _stencilop); + +STATIC mp_obj_t _tagmask(mp_obj_t self , mp_obj_t a0) { + uint32_t mask = mp_obj_get_int_truncated(a0); + C4(self, ((20 << 24) | ((mask & 1))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(tagmask_obj, _tagmask); + +STATIC mp_obj_t _tag(mp_obj_t self , mp_obj_t a0) { + uint32_t s = mp_obj_get_int_truncated(a0); + C4(self, ((3 << 24) | ((s & 255))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(tag_obj, _tag); + +STATIC mp_obj_t _vertextranslatex(mp_obj_t self , mp_obj_t a0) { + uint32_t x = mp_obj_get_int_truncated(a0); + C4(self, ((43 << 24) | (((x) & 131071))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vertextranslatex_obj, _vertextranslatex); + +STATIC mp_obj_t _vertextranslatey(mp_obj_t self , mp_obj_t a0) { + uint32_t y = mp_obj_get_int_truncated(a0); + C4(self, ((44 << 24) | (((y) & 131071))) +); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(vertextranslatey_obj, _vertextranslatey); +#define N_METHODS 47 +#define METHOD_SETUP do { stem_locals_dict_table[0] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_AlphaFunc), MP_OBJ_FROM_PTR(&alphafunc_obj) }; stem_locals_dict_table[1] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Begin), MP_OBJ_FROM_PTR(&begin_obj) }; stem_locals_dict_table[2] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapExtFormat), MP_OBJ_FROM_PTR(&bitmapextformat_obj) }; stem_locals_dict_table[3] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapHandle), MP_OBJ_FROM_PTR(&bitmaphandle_obj) }; stem_locals_dict_table[4] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapLayoutH), MP_OBJ_FROM_PTR(&bitmaplayouth_obj) }; stem_locals_dict_table[5] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapLayout), MP_OBJ_FROM_PTR(&bitmaplayout_obj) }; stem_locals_dict_table[6] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapSizeH), MP_OBJ_FROM_PTR(&bitmapsizeh_obj) }; stem_locals_dict_table[7] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapSize), MP_OBJ_FROM_PTR(&bitmapsize_obj) }; stem_locals_dict_table[8] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapSource), MP_OBJ_FROM_PTR(&bitmapsource_obj) }; stem_locals_dict_table[9] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapSwizzle), MP_OBJ_FROM_PTR(&bitmapswizzle_obj) }; stem_locals_dict_table[10] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformA), MP_OBJ_FROM_PTR(&bitmaptransforma_obj) }; stem_locals_dict_table[11] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformB), MP_OBJ_FROM_PTR(&bitmaptransformb_obj) }; stem_locals_dict_table[12] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformC), MP_OBJ_FROM_PTR(&bitmaptransformc_obj) }; stem_locals_dict_table[13] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformD), MP_OBJ_FROM_PTR(&bitmaptransformd_obj) }; stem_locals_dict_table[14] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformE), MP_OBJ_FROM_PTR(&bitmaptransforme_obj) }; stem_locals_dict_table[15] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformF), MP_OBJ_FROM_PTR(&bitmaptransformf_obj) }; stem_locals_dict_table[16] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BlendFunc), MP_OBJ_FROM_PTR(&blendfunc_obj) }; stem_locals_dict_table[17] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Call), MP_OBJ_FROM_PTR(&call_obj) }; stem_locals_dict_table[18] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Cell), MP_OBJ_FROM_PTR(&cell_obj) }; stem_locals_dict_table[19] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ClearColorA), MP_OBJ_FROM_PTR(&clearcolora_obj) }; stem_locals_dict_table[20] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ClearColorRGB), MP_OBJ_FROM_PTR(&clearcolorrgb_obj) }; stem_locals_dict_table[21] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Clear), MP_OBJ_FROM_PTR(&clear_obj) }; stem_locals_dict_table[22] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ClearStencil), MP_OBJ_FROM_PTR(&clearstencil_obj) }; stem_locals_dict_table[23] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ClearTag), MP_OBJ_FROM_PTR(&cleartag_obj) }; stem_locals_dict_table[24] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ColorA), MP_OBJ_FROM_PTR(&colora_obj) }; stem_locals_dict_table[25] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ColorMask), MP_OBJ_FROM_PTR(&colormask_obj) }; stem_locals_dict_table[26] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ColorRGB), MP_OBJ_FROM_PTR(&colorrgb_obj) }; stem_locals_dict_table[27] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Display), MP_OBJ_FROM_PTR(&display_obj) }; stem_locals_dict_table[28] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_End), MP_OBJ_FROM_PTR(&end_obj) }; stem_locals_dict_table[29] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Jump), MP_OBJ_FROM_PTR(&jump_obj) }; stem_locals_dict_table[30] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_LineWidth), MP_OBJ_FROM_PTR(&linewidth_obj) }; stem_locals_dict_table[31] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Macro), MP_OBJ_FROM_PTR(¯o_obj) }; stem_locals_dict_table[32] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Nop), MP_OBJ_FROM_PTR(&nop_obj) }; stem_locals_dict_table[33] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_PaletteSource), MP_OBJ_FROM_PTR(&palettesource_obj) }; stem_locals_dict_table[34] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_PointSize), MP_OBJ_FROM_PTR(&pointsize_obj) }; stem_locals_dict_table[35] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_RestoreContext), MP_OBJ_FROM_PTR(&restorecontext_obj) }; stem_locals_dict_table[36] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Return), MP_OBJ_FROM_PTR(&return_obj) }; stem_locals_dict_table[37] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_SaveContext), MP_OBJ_FROM_PTR(&savecontext_obj) }; stem_locals_dict_table[38] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ScissorSize), MP_OBJ_FROM_PTR(&scissorsize_obj) }; stem_locals_dict_table[39] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ScissorXY), MP_OBJ_FROM_PTR(&scissorxy_obj) }; stem_locals_dict_table[40] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_StencilFunc), MP_OBJ_FROM_PTR(&stencilfunc_obj) }; stem_locals_dict_table[41] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_StencilMask), MP_OBJ_FROM_PTR(&stencilmask_obj) }; stem_locals_dict_table[42] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_StencilOp), MP_OBJ_FROM_PTR(&stencilop_obj) }; stem_locals_dict_table[43] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_TagMask), MP_OBJ_FROM_PTR(&tagmask_obj) }; stem_locals_dict_table[44] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Tag), MP_OBJ_FROM_PTR(&tag_obj) }; stem_locals_dict_table[45] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_VertexTranslateX), MP_OBJ_FROM_PTR(&vertextranslatex_obj) }; stem_locals_dict_table[46] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_VertexTranslateY), MP_OBJ_FROM_PTR(&vertextranslatey_obj) }; } while (0) +#define ROM_DECLS { MP_ROM_QSTR(MP_QSTR_AlphaFunc), MP_ROM_PTR(&alphafunc_obj) }, { MP_ROM_QSTR(MP_QSTR_Begin), MP_ROM_PTR(&begin_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapExtFormat), MP_ROM_PTR(&bitmapextformat_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapHandle), MP_ROM_PTR(&bitmaphandle_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapLayoutH), MP_ROM_PTR(&bitmaplayouth_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapLayout), MP_ROM_PTR(&bitmaplayout_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapSizeH), MP_ROM_PTR(&bitmapsizeh_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapSize), MP_ROM_PTR(&bitmapsize_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapSource), MP_ROM_PTR(&bitmapsource_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapSwizzle), MP_ROM_PTR(&bitmapswizzle_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformA), MP_ROM_PTR(&bitmaptransforma_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformB), MP_ROM_PTR(&bitmaptransformb_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformC), MP_ROM_PTR(&bitmaptransformc_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformD), MP_ROM_PTR(&bitmaptransformd_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformE), MP_ROM_PTR(&bitmaptransforme_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformF), MP_ROM_PTR(&bitmaptransformf_obj) }, { MP_ROM_QSTR(MP_QSTR_BlendFunc), MP_ROM_PTR(&blendfunc_obj) }, { MP_ROM_QSTR(MP_QSTR_Call), MP_ROM_PTR(&call_obj) }, { MP_ROM_QSTR(MP_QSTR_Cell), MP_ROM_PTR(&cell_obj) }, { MP_ROM_QSTR(MP_QSTR_ClearColorA), MP_ROM_PTR(&clearcolora_obj) }, { MP_ROM_QSTR(MP_QSTR_ClearColorRGB), MP_ROM_PTR(&clearcolorrgb_obj) }, { MP_ROM_QSTR(MP_QSTR_Clear), MP_ROM_PTR(&clear_obj) }, { MP_ROM_QSTR(MP_QSTR_ClearStencil), MP_ROM_PTR(&clearstencil_obj) }, { MP_ROM_QSTR(MP_QSTR_ClearTag), MP_ROM_PTR(&cleartag_obj) }, { MP_ROM_QSTR(MP_QSTR_ColorA), MP_ROM_PTR(&colora_obj) }, { MP_ROM_QSTR(MP_QSTR_ColorMask), MP_ROM_PTR(&colormask_obj) }, { MP_ROM_QSTR(MP_QSTR_ColorRGB), MP_ROM_PTR(&colorrgb_obj) }, { MP_ROM_QSTR(MP_QSTR_Display), MP_ROM_PTR(&display_obj) }, { MP_ROM_QSTR(MP_QSTR_End), MP_ROM_PTR(&end_obj) }, { MP_ROM_QSTR(MP_QSTR_Jump), MP_ROM_PTR(&jump_obj) }, { MP_ROM_QSTR(MP_QSTR_LineWidth), MP_ROM_PTR(&linewidth_obj) }, { MP_ROM_QSTR(MP_QSTR_Macro), MP_ROM_PTR(¯o_obj) }, { MP_ROM_QSTR(MP_QSTR_Nop), MP_ROM_PTR(&nop_obj) }, { MP_ROM_QSTR(MP_QSTR_PaletteSource), MP_ROM_PTR(&palettesource_obj) }, { MP_ROM_QSTR(MP_QSTR_PointSize), MP_ROM_PTR(&pointsize_obj) }, { MP_ROM_QSTR(MP_QSTR_RestoreContext), MP_ROM_PTR(&restorecontext_obj) }, { MP_ROM_QSTR(MP_QSTR_Return), MP_ROM_PTR(&return_obj) }, { MP_ROM_QSTR(MP_QSTR_SaveContext), MP_ROM_PTR(&savecontext_obj) }, { MP_ROM_QSTR(MP_QSTR_ScissorSize), MP_ROM_PTR(&scissorsize_obj) }, { MP_ROM_QSTR(MP_QSTR_ScissorXY), MP_ROM_PTR(&scissorxy_obj) }, { MP_ROM_QSTR(MP_QSTR_StencilFunc), MP_ROM_PTR(&stencilfunc_obj) }, { MP_ROM_QSTR(MP_QSTR_StencilMask), MP_ROM_PTR(&stencilmask_obj) }, { MP_ROM_QSTR(MP_QSTR_StencilOp), MP_ROM_PTR(&stencilop_obj) }, { MP_ROM_QSTR(MP_QSTR_TagMask), MP_ROM_PTR(&tagmask_obj) }, { MP_ROM_QSTR(MP_QSTR_Tag), MP_ROM_PTR(&tag_obj) }, { MP_ROM_QSTR(MP_QSTR_VertexTranslateX), MP_ROM_PTR(&vertextranslatex_obj) }, { MP_ROM_QSTR(MP_QSTR_VertexTranslateY), MP_ROM_PTR(&vertextranslatey_obj) } diff --git a/shared-bindings/eveL/__init__.c b/shared-bindings/eveL/__init__.c deleted file mode 100644 index fa4439cbe..000000000 --- a/shared-bindings/eveL/__init__.c +++ /dev/null @@ -1,223 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 James Bowman - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include -#include - -#include "py/runtime.h" -#include "py/binary.h" - -//| :mod:`eveL` --- low-level BridgeTek EVE bindings -//| ================================================ -//| -//| .. module:: eveL -//| :synopsis: low-level BridgeTek EVE bindings -//| :platform: SAMD21/SAMD51 -//| -//| The `eveL` module provides a class EVEL which -//| contains methods for constructing EVE command -//| buffers and appending basic graphics commands. -//| - -typedef struct _mp_obj_EVEL_t { - mp_obj_base_t base; - mp_obj_t dest[3]; - size_t n; - uint8_t buf[512]; -} mp_obj_EVEL_t; - -STATIC const mp_obj_type_t EVEL_type; - -STATIC void _write(mp_obj_EVEL_t *EVEL, mp_obj_t b) { - EVEL->dest[2] = b; - mp_call_method_n_kw(1, 0, EVEL->dest); -} - -STATIC mp_obj_t _register(mp_obj_t self, mp_obj_t o) { - mp_obj_EVEL_t *EVEL = mp_instance_cast_to_native_base(self, &EVEL_type); - EVEL->n = 0; - mp_load_method(o, MP_QSTR_write, EVEL->dest); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(register_obj, _register); - -STATIC mp_obj_t _flush(mp_obj_t self) { - mp_obj_EVEL_t *EVEL = mp_instance_cast_to_native_base(self, &EVEL_type); - if (EVEL->n != 0) { - _write(EVEL, mp_obj_new_bytearray_by_ref(EVEL->n, EVEL->buf)); - EVEL->n = 0; - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(flush_obj, _flush); - -STATIC void *append(mp_obj_t self, size_t m) { - mp_obj_EVEL_t *EVEL = mp_instance_cast_to_native_base(self, &EVEL_type); - if ((EVEL->n + m) > sizeof(EVEL->buf)) - _flush((mp_obj_t)EVEL); - uint8_t *r = EVEL->buf + EVEL->n; - EVEL->n += m; - return (void*)r; -} - -STATIC mp_obj_t _cc(mp_obj_t self, mp_obj_t b) { - mp_obj_EVEL_t *EVEL = mp_instance_cast_to_native_base(self, &EVEL_type); - mp_buffer_info_t buffer_info; - mp_get_buffer_raise(b, &buffer_info, MP_BUFFER_READ); - if (buffer_info.len <= sizeof(EVEL->buf)) { - uint8_t *p = (uint8_t*)append(EVEL, buffer_info.len); - // memcpy(p, buffer_info.buf, buffer_info.len); - uint8_t *s = buffer_info.buf; - for (size_t i = 0; i < buffer_info.len; i++) - *p++ = *s++; - } else { - _flush(self); - _write(EVEL, b); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(cc_obj, _cc); - -#define C4(self, u) (*(uint32_t*)append((self), sizeof(uint32_t)) = (u)) - -#include "modeveL-gen.h" - -// Hand-written functions { - -STATIC mp_obj_t _cmd0(mp_obj_t self, mp_obj_t n) { - C4(self, (0xffffff00 | mp_obj_get_int_truncated(n))); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(cmd0_obj, _cmd0); - -STATIC mp_obj_t _vertex2f(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - int16_t x = (int16_t)(16 * mp_obj_get_float(a0)); - int16_t y = (int16_t)(16 * mp_obj_get_float(a1)); - C4(self, (0x40000000 | ((x & 32767) << 15) | (y & 32767))); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(vertex2f_obj, _vertex2f); - -STATIC mp_obj_t _cmd(size_t n_args, const mp_obj_t *args) { - mp_obj_t self = args[0]; - mp_obj_t num = args[1]; - mp_buffer_info_t fmt; - mp_get_buffer_raise(args[2], &fmt, MP_BUFFER_READ); - size_t len; - mp_obj_t *items; - mp_obj_tuple_get(args[3], &len, &items); - - // Count how many 32-bit words required - size_t n = 0; - for (size_t i = 0; i < fmt.len; n++) { - switch (((char*)fmt.buf)[i]) { - case 'I': - case 'i': - i += 1; - break; - case 'H': - case 'h': - i += 2; - break; - default: - break; - } - } - - uint32_t *p = (uint32_t*)append(self, sizeof(uint32_t) * (1 + n)); - *p++ = 0xffffff00 | mp_obj_get_int_truncated(num); - mp_obj_t *a = items; - uint32_t lo; - - for (size_t i = 0; i < fmt.len; ) { - switch (((char*)fmt.buf)[i]) { - case 'I': - case 'i': - *p++ = mp_obj_get_int_truncated(*a++); - i += 1; - break; - case 'H': - case 'h': - lo = mp_obj_get_int_truncated(*a++) & 0xffff; - *p++ = lo | (mp_obj_get_int_truncated(*a++) << 16); - i += 2; - break; - default: - break; - } - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(cmd_obj, 4, 4, _cmd); - -STATIC const mp_rom_map_elem_t EVEL_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_register), MP_ROM_PTR(®ister_obj) }, - { MP_ROM_QSTR(MP_QSTR_cc), MP_ROM_PTR(&cc_obj) }, - { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&flush_obj) }, - { MP_ROM_QSTR(MP_QSTR_Vertex2f), MP_ROM_PTR(&vertex2f_obj) }, - { MP_ROM_QSTR(MP_QSTR_cmd), MP_ROM_PTR(&cmd_obj) }, - { MP_ROM_QSTR(MP_QSTR_cmd0), MP_ROM_PTR(&cmd0_obj) }, - ROM_DECLS -}; -STATIC MP_DEFINE_CONST_DICT(EVEL_locals_dict, EVEL_locals_dict_table); - -STATIC void EVEL_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - (void)self_in; - (void)kind; - mp_printf(print, ""); -} - -STATIC mp_obj_t EVEL_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // mp_arg_check_num(n_args, kw_args, 1, 1, false); - mp_obj_EVEL_t *o = m_new_obj(mp_obj_EVEL_t); - mp_printf(&mp_plat_print, "EVEL %p make_new\n", o); - o->base.type = &EVEL_type; - return MP_OBJ_FROM_PTR(o); -} - -STATIC const mp_obj_type_t EVEL_type = { - { &mp_type_type }, - // Save on qstr's, reuse same as for module - .name = MP_QSTR_EVEL, - .print = EVEL_print, - .make_new = EVEL_make_new, - // .attr = EVEL_attr, - .locals_dict = (void*)&EVEL_locals_dict, -}; - -STATIC const mp_rom_map_elem_t mp_module_eveL_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_eveL) }, - { MP_ROM_QSTR(MP_QSTR_EVEL), MP_OBJ_FROM_PTR(&EVEL_type) }, -}; - -STATIC MP_DEFINE_CONST_DICT(mp_module_eveL_globals, mp_module_eveL_globals_table); - -const mp_obj_module_t eveL_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&mp_module_eveL_globals, -}; diff --git a/shared-bindings/eveL/modeveL-gen.h b/shared-bindings/eveL/modeveL-gen.h deleted file mode 100644 index 1c8d5ae12..000000000 --- a/shared-bindings/eveL/modeveL-gen.h +++ /dev/null @@ -1,412 +0,0 @@ - -STATIC mp_obj_t _alphafunc(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - uint32_t func = mp_obj_get_int_truncated(a0); - uint32_t ref = mp_obj_get_int_truncated(a1); - C4(self, ((9 << 24) | ((func & 7) << 8) | ((ref & 255))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(alphafunc_obj, _alphafunc); - -STATIC mp_obj_t _begin(mp_obj_t self , mp_obj_t a0) { - uint32_t prim = mp_obj_get_int_truncated(a0); - C4(self, ((31 << 24) | ((prim & 15))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(begin_obj, _begin); - -STATIC mp_obj_t _bitmapextformat(mp_obj_t self , mp_obj_t a0) { - uint32_t fmt = mp_obj_get_int_truncated(a0); - C4(self, ((46 << 24) | (fmt & 65535)) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmapextformat_obj, _bitmapextformat); - -STATIC mp_obj_t _bitmaphandle(mp_obj_t self , mp_obj_t a0) { - uint32_t handle = mp_obj_get_int_truncated(a0); - C4(self, ((5 << 24) | ((handle & 31))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmaphandle_obj, _bitmaphandle); - -STATIC mp_obj_t _bitmaplayouth(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - uint32_t linestride = mp_obj_get_int_truncated(a0); - uint32_t height = mp_obj_get_int_truncated(a1); - C4(self, ((40 << 24) | (((linestride) & 3) << 2) | (((height) & 3))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaplayouth_obj, _bitmaplayouth); - -STATIC mp_obj_t _bitmaplayout(size_t n_args, const mp_obj_t *args) { - uint32_t format = mp_obj_get_int_truncated(args[1]); - uint32_t linestride = mp_obj_get_int_truncated(args[2]); - uint32_t height = mp_obj_get_int_truncated(args[3]); - C4(args[0], ((7 << 24) | ((format & 31) << 19) | ((linestride & 1023) << 9) | ((height & 511))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitmaplayout_obj, 4, 4, _bitmaplayout); - -STATIC mp_obj_t _bitmapsizeh(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - uint32_t width = mp_obj_get_int_truncated(a0); - uint32_t height = mp_obj_get_int_truncated(a1); - C4(self, ((41 << 24) | (((width) & 3) << 2) | (((height) & 3))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmapsizeh_obj, _bitmapsizeh); - -STATIC mp_obj_t _bitmapsize(size_t n_args, const mp_obj_t *args) { - uint32_t filter = mp_obj_get_int_truncated(args[1]); - uint32_t wrapx = mp_obj_get_int_truncated(args[2]); - uint32_t wrapy = mp_obj_get_int_truncated(args[3]); - uint32_t width = mp_obj_get_int_truncated(args[4]); - uint32_t height = mp_obj_get_int_truncated(args[5]); - C4(args[0], ((8 << 24) | ((filter & 1) << 20) | ((wrapx & 1) << 19) | ((wrapy & 1) << 18) | ((width & 511) << 9) | ((height & 511))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitmapsize_obj, 6, 6, _bitmapsize); - -STATIC mp_obj_t _bitmapsource(mp_obj_t self , mp_obj_t a0) { - uint32_t addr = mp_obj_get_int_truncated(a0); - C4(self, ((1 << 24) | ((addr & 0xffffff))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(bitmapsource_obj, _bitmapsource); - -STATIC mp_obj_t _bitmapswizzle(size_t n_args, const mp_obj_t *args) { - uint32_t r = mp_obj_get_int_truncated(args[1]); - uint32_t g = mp_obj_get_int_truncated(args[2]); - uint32_t b = mp_obj_get_int_truncated(args[3]); - uint32_t a = mp_obj_get_int_truncated(args[4]); - C4(args[0], ((47 << 24) | ((r & 7) << 9) | ((g & 7) << 6) | ((b & 7) << 3) | ((a & 7))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(bitmapswizzle_obj, 5, 5, _bitmapswizzle); - -STATIC mp_obj_t _bitmaptransforma(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - uint32_t a = mp_obj_get_int_truncated(a0); - uint32_t p = mp_obj_get_int_truncated(a1); - C4(self, ((21 << 24) | ((p & 1) << 17) | ((a & 131071))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransforma_obj, _bitmaptransforma); - -STATIC mp_obj_t _bitmaptransformb(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - uint32_t b = mp_obj_get_int_truncated(a0); - uint32_t p = mp_obj_get_int_truncated(a1); - C4(self, ((22 << 24) | ((p & 1) << 17) | ((b & 131071))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformb_obj, _bitmaptransformb); - -STATIC mp_obj_t _bitmaptransformc(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - uint32_t c = mp_obj_get_int_truncated(a0); - uint32_t p = mp_obj_get_int_truncated(a1); - C4(self, ((23 << 24) | ((p & 1) << 17) | ((c & 16777215))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformc_obj, _bitmaptransformc); - -STATIC mp_obj_t _bitmaptransformd(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - uint32_t d = mp_obj_get_int_truncated(a0); - uint32_t p = mp_obj_get_int_truncated(a1); - C4(self, ((24 << 24) | ((p & 1) << 17) | ((d & 131071))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformd_obj, _bitmaptransformd); - -STATIC mp_obj_t _bitmaptransforme(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - uint32_t e = mp_obj_get_int_truncated(a0); - uint32_t p = mp_obj_get_int_truncated(a1); - C4(self, ((25 << 24) | ((p & 1) << 17) | ((e & 131071))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransforme_obj, _bitmaptransforme); - -STATIC mp_obj_t _bitmaptransformf(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - uint32_t f = mp_obj_get_int_truncated(a0); - uint32_t p = mp_obj_get_int_truncated(a1); - C4(self, ((26 << 24) | ((p & 1) << 17) | ((f & 16777215))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(bitmaptransformf_obj, _bitmaptransformf); - -STATIC mp_obj_t _blendfunc(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - uint32_t src = mp_obj_get_int_truncated(a0); - uint32_t dst = mp_obj_get_int_truncated(a1); - C4(self, ((11 << 24) | ((src & 7) << 3) | ((dst & 7))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(blendfunc_obj, _blendfunc); - -STATIC mp_obj_t _call(mp_obj_t self , mp_obj_t a0) { - uint32_t dest = mp_obj_get_int_truncated(a0); - C4(self, ((29 << 24) | ((dest & 65535))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(call_obj, _call); - -STATIC mp_obj_t _cell(mp_obj_t self , mp_obj_t a0) { - uint32_t cell = mp_obj_get_int_truncated(a0); - C4(self, ((6 << 24) | ((cell & 127))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(cell_obj, _cell); - -STATIC mp_obj_t _clearcolora(mp_obj_t self , mp_obj_t a0) { - uint32_t alpha = mp_obj_get_int_truncated(a0); - C4(self, ((15 << 24) | ((alpha & 255))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(clearcolora_obj, _clearcolora); - -STATIC mp_obj_t _clearcolorrgb(size_t n_args, const mp_obj_t *args) { - uint32_t red = mp_obj_get_int_truncated(args[1]); - uint32_t green = mp_obj_get_int_truncated(args[2]); - uint32_t blue = mp_obj_get_int_truncated(args[3]); - C4(args[0], ((2 << 24) | ((red & 255) << 16) | ((green & 255) << 8) | ((blue & 255))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(clearcolorrgb_obj, 4, 4, _clearcolorrgb); - -STATIC mp_obj_t _clear(size_t n_args, const mp_obj_t *args) { - uint32_t c = mp_obj_get_int_truncated(args[1]); - uint32_t s = mp_obj_get_int_truncated(args[2]); - uint32_t t = mp_obj_get_int_truncated(args[3]); - C4(args[0], ((38 << 24) | ((c & 1) << 2) | ((s & 1) << 1) | ((t & 1))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(clear_obj, 4, 4, _clear); - -STATIC mp_obj_t _clearstencil(mp_obj_t self , mp_obj_t a0) { - uint32_t s = mp_obj_get_int_truncated(a0); - C4(self, ((17 << 24) | ((s & 255))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(clearstencil_obj, _clearstencil); - -STATIC mp_obj_t _cleartag(mp_obj_t self , mp_obj_t a0) { - uint32_t s = mp_obj_get_int_truncated(a0); - C4(self, ((18 << 24) | ((s & 255))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(cleartag_obj, _cleartag); - -STATIC mp_obj_t _colora(mp_obj_t self , mp_obj_t a0) { - uint32_t alpha = mp_obj_get_int_truncated(a0); - C4(self, ((16 << 24) | ((alpha & 255))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(colora_obj, _colora); - -STATIC mp_obj_t _colormask(size_t n_args, const mp_obj_t *args) { - uint32_t r = mp_obj_get_int_truncated(args[1]); - uint32_t g = mp_obj_get_int_truncated(args[2]); - uint32_t b = mp_obj_get_int_truncated(args[3]); - uint32_t a = mp_obj_get_int_truncated(args[4]); - C4(args[0], ((32 << 24) | ((r & 1) << 3) | ((g & 1) << 2) | ((b & 1) << 1) | ((a & 1))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(colormask_obj, 5, 5, _colormask); - -STATIC mp_obj_t _colorrgb(size_t n_args, const mp_obj_t *args) { - uint32_t red = mp_obj_get_int_truncated(args[1]); - uint32_t green = mp_obj_get_int_truncated(args[2]); - uint32_t blue = mp_obj_get_int_truncated(args[3]); - C4(args[0], ((4 << 24) | ((red & 255) << 16) | ((green & 255) << 8) | ((blue & 255))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(colorrgb_obj, 4, 4, _colorrgb); - -STATIC mp_obj_t _display(mp_obj_t self ) { - - C4(self, ((0 << 24)) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(display_obj, _display); - -STATIC mp_obj_t _end(mp_obj_t self ) { - - C4(self, ((33 << 24)) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(end_obj, _end); - -STATIC mp_obj_t _jump(mp_obj_t self , mp_obj_t a0) { - uint32_t dest = mp_obj_get_int_truncated(a0); - C4(self, ((30 << 24) | ((dest & 65535))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(jump_obj, _jump); - -STATIC mp_obj_t _linewidth(mp_obj_t self , mp_obj_t a0) { - uint32_t width = mp_obj_get_int_truncated(a0); - C4(self, ((14 << 24) | ((width & 4095))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(linewidth_obj, _linewidth); - -STATIC mp_obj_t _macro(mp_obj_t self , mp_obj_t a0) { - uint32_t m = mp_obj_get_int_truncated(a0); - C4(self, ((37 << 24) | ((m & 1))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(macro_obj, _macro); - -STATIC mp_obj_t _nop(mp_obj_t self ) { - - C4(self, ((45 << 24)) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(nop_obj, _nop); - -STATIC mp_obj_t _palettesource(mp_obj_t self , mp_obj_t a0) { - uint32_t addr = mp_obj_get_int_truncated(a0); - C4(self, ((42 << 24) | (((addr) & 4194303))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(palettesource_obj, _palettesource); - -STATIC mp_obj_t _pointsize(mp_obj_t self , mp_obj_t a0) { - uint32_t size = mp_obj_get_int_truncated(a0); - C4(self, ((13 << 24) | ((size & 8191))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(pointsize_obj, _pointsize); - -STATIC mp_obj_t _restorecontext(mp_obj_t self ) { - - C4(self, ((35 << 24)) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(restorecontext_obj, _restorecontext); - -STATIC mp_obj_t _return(mp_obj_t self ) { - - C4(self, ((36 << 24)) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(return_obj, _return); - -STATIC mp_obj_t _savecontext(mp_obj_t self ) { - - C4(self, ((34 << 24)) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(savecontext_obj, _savecontext); - -STATIC mp_obj_t _scissorsize(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - uint32_t width = mp_obj_get_int_truncated(a0); - uint32_t height = mp_obj_get_int_truncated(a1); - C4(self, ((28 << 24) | ((width & 4095) << 12) | ((height & 4095))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(scissorsize_obj, _scissorsize); - -STATIC mp_obj_t _scissorxy(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - uint32_t x = mp_obj_get_int_truncated(a0); - uint32_t y = mp_obj_get_int_truncated(a1); - C4(self, ((27 << 24) | ((x & 2047) << 11) | ((y & 2047))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(scissorxy_obj, _scissorxy); - -STATIC mp_obj_t _stencilfunc(size_t n_args, const mp_obj_t *args) { - uint32_t func = mp_obj_get_int_truncated(args[1]); - uint32_t ref = mp_obj_get_int_truncated(args[2]); - uint32_t mask = mp_obj_get_int_truncated(args[3]); - C4(args[0], ((10 << 24) | ((func & 7) << 16) | ((ref & 255) << 8) | ((mask & 255))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(stencilfunc_obj, 4, 4, _stencilfunc); - -STATIC mp_obj_t _stencilmask(mp_obj_t self , mp_obj_t a0) { - uint32_t mask = mp_obj_get_int_truncated(a0); - C4(self, ((19 << 24) | ((mask & 255))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(stencilmask_obj, _stencilmask); - -STATIC mp_obj_t _stencilop(mp_obj_t self , mp_obj_t a0, mp_obj_t a1) { - uint32_t sfail = mp_obj_get_int_truncated(a0); - uint32_t spass = mp_obj_get_int_truncated(a1); - C4(self, ((12 << 24) | ((sfail & 7) << 3) | ((spass & 7))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_3(stencilop_obj, _stencilop); - -STATIC mp_obj_t _tagmask(mp_obj_t self , mp_obj_t a0) { - uint32_t mask = mp_obj_get_int_truncated(a0); - C4(self, ((20 << 24) | ((mask & 1))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(tagmask_obj, _tagmask); - -STATIC mp_obj_t _tag(mp_obj_t self , mp_obj_t a0) { - uint32_t s = mp_obj_get_int_truncated(a0); - C4(self, ((3 << 24) | ((s & 255))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(tag_obj, _tag); - -STATIC mp_obj_t _vertextranslatex(mp_obj_t self , mp_obj_t a0) { - uint32_t x = mp_obj_get_int_truncated(a0); - C4(self, ((43 << 24) | (((x) & 131071))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(vertextranslatex_obj, _vertextranslatex); - -STATIC mp_obj_t _vertextranslatey(mp_obj_t self , mp_obj_t a0) { - uint32_t y = mp_obj_get_int_truncated(a0); - C4(self, ((44 << 24) | (((y) & 131071))) -); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(vertextranslatey_obj, _vertextranslatey); -#define N_METHODS 47 -#define METHOD_SETUP do { stem_locals_dict_table[0] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_AlphaFunc), MP_OBJ_FROM_PTR(&alphafunc_obj) }; stem_locals_dict_table[1] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Begin), MP_OBJ_FROM_PTR(&begin_obj) }; stem_locals_dict_table[2] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapExtFormat), MP_OBJ_FROM_PTR(&bitmapextformat_obj) }; stem_locals_dict_table[3] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapHandle), MP_OBJ_FROM_PTR(&bitmaphandle_obj) }; stem_locals_dict_table[4] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapLayoutH), MP_OBJ_FROM_PTR(&bitmaplayouth_obj) }; stem_locals_dict_table[5] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapLayout), MP_OBJ_FROM_PTR(&bitmaplayout_obj) }; stem_locals_dict_table[6] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapSizeH), MP_OBJ_FROM_PTR(&bitmapsizeh_obj) }; stem_locals_dict_table[7] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapSize), MP_OBJ_FROM_PTR(&bitmapsize_obj) }; stem_locals_dict_table[8] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapSource), MP_OBJ_FROM_PTR(&bitmapsource_obj) }; stem_locals_dict_table[9] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapSwizzle), MP_OBJ_FROM_PTR(&bitmapswizzle_obj) }; stem_locals_dict_table[10] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformA), MP_OBJ_FROM_PTR(&bitmaptransforma_obj) }; stem_locals_dict_table[11] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformB), MP_OBJ_FROM_PTR(&bitmaptransformb_obj) }; stem_locals_dict_table[12] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformC), MP_OBJ_FROM_PTR(&bitmaptransformc_obj) }; stem_locals_dict_table[13] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformD), MP_OBJ_FROM_PTR(&bitmaptransformd_obj) }; stem_locals_dict_table[14] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformE), MP_OBJ_FROM_PTR(&bitmaptransforme_obj) }; stem_locals_dict_table[15] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BitmapTransformF), MP_OBJ_FROM_PTR(&bitmaptransformf_obj) }; stem_locals_dict_table[16] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_BlendFunc), MP_OBJ_FROM_PTR(&blendfunc_obj) }; stem_locals_dict_table[17] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Call), MP_OBJ_FROM_PTR(&call_obj) }; stem_locals_dict_table[18] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Cell), MP_OBJ_FROM_PTR(&cell_obj) }; stem_locals_dict_table[19] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ClearColorA), MP_OBJ_FROM_PTR(&clearcolora_obj) }; stem_locals_dict_table[20] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ClearColorRGB), MP_OBJ_FROM_PTR(&clearcolorrgb_obj) }; stem_locals_dict_table[21] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Clear), MP_OBJ_FROM_PTR(&clear_obj) }; stem_locals_dict_table[22] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ClearStencil), MP_OBJ_FROM_PTR(&clearstencil_obj) }; stem_locals_dict_table[23] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ClearTag), MP_OBJ_FROM_PTR(&cleartag_obj) }; stem_locals_dict_table[24] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ColorA), MP_OBJ_FROM_PTR(&colora_obj) }; stem_locals_dict_table[25] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ColorMask), MP_OBJ_FROM_PTR(&colormask_obj) }; stem_locals_dict_table[26] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ColorRGB), MP_OBJ_FROM_PTR(&colorrgb_obj) }; stem_locals_dict_table[27] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Display), MP_OBJ_FROM_PTR(&display_obj) }; stem_locals_dict_table[28] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_End), MP_OBJ_FROM_PTR(&end_obj) }; stem_locals_dict_table[29] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Jump), MP_OBJ_FROM_PTR(&jump_obj) }; stem_locals_dict_table[30] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_LineWidth), MP_OBJ_FROM_PTR(&linewidth_obj) }; stem_locals_dict_table[31] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Macro), MP_OBJ_FROM_PTR(¯o_obj) }; stem_locals_dict_table[32] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Nop), MP_OBJ_FROM_PTR(&nop_obj) }; stem_locals_dict_table[33] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_PaletteSource), MP_OBJ_FROM_PTR(&palettesource_obj) }; stem_locals_dict_table[34] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_PointSize), MP_OBJ_FROM_PTR(&pointsize_obj) }; stem_locals_dict_table[35] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_RestoreContext), MP_OBJ_FROM_PTR(&restorecontext_obj) }; stem_locals_dict_table[36] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Return), MP_OBJ_FROM_PTR(&return_obj) }; stem_locals_dict_table[37] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_SaveContext), MP_OBJ_FROM_PTR(&savecontext_obj) }; stem_locals_dict_table[38] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ScissorSize), MP_OBJ_FROM_PTR(&scissorsize_obj) }; stem_locals_dict_table[39] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_ScissorXY), MP_OBJ_FROM_PTR(&scissorxy_obj) }; stem_locals_dict_table[40] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_StencilFunc), MP_OBJ_FROM_PTR(&stencilfunc_obj) }; stem_locals_dict_table[41] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_StencilMask), MP_OBJ_FROM_PTR(&stencilmask_obj) }; stem_locals_dict_table[42] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_StencilOp), MP_OBJ_FROM_PTR(&stencilop_obj) }; stem_locals_dict_table[43] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_TagMask), MP_OBJ_FROM_PTR(&tagmask_obj) }; stem_locals_dict_table[44] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_Tag), MP_OBJ_FROM_PTR(&tag_obj) }; stem_locals_dict_table[45] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_VertexTranslateX), MP_OBJ_FROM_PTR(&vertextranslatex_obj) }; stem_locals_dict_table[46] = (mp_map_elem_t){ MP_OBJ_NEW_QSTR(MP_QSTR_VertexTranslateY), MP_OBJ_FROM_PTR(&vertextranslatey_obj) }; } while (0) -#define ROM_DECLS { MP_ROM_QSTR(MP_QSTR_AlphaFunc), MP_ROM_PTR(&alphafunc_obj) }, { MP_ROM_QSTR(MP_QSTR_Begin), MP_ROM_PTR(&begin_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapExtFormat), MP_ROM_PTR(&bitmapextformat_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapHandle), MP_ROM_PTR(&bitmaphandle_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapLayoutH), MP_ROM_PTR(&bitmaplayouth_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapLayout), MP_ROM_PTR(&bitmaplayout_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapSizeH), MP_ROM_PTR(&bitmapsizeh_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapSize), MP_ROM_PTR(&bitmapsize_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapSource), MP_ROM_PTR(&bitmapsource_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapSwizzle), MP_ROM_PTR(&bitmapswizzle_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformA), MP_ROM_PTR(&bitmaptransforma_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformB), MP_ROM_PTR(&bitmaptransformb_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformC), MP_ROM_PTR(&bitmaptransformc_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformD), MP_ROM_PTR(&bitmaptransformd_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformE), MP_ROM_PTR(&bitmaptransforme_obj) }, { MP_ROM_QSTR(MP_QSTR_BitmapTransformF), MP_ROM_PTR(&bitmaptransformf_obj) }, { MP_ROM_QSTR(MP_QSTR_BlendFunc), MP_ROM_PTR(&blendfunc_obj) }, { MP_ROM_QSTR(MP_QSTR_Call), MP_ROM_PTR(&call_obj) }, { MP_ROM_QSTR(MP_QSTR_Cell), MP_ROM_PTR(&cell_obj) }, { MP_ROM_QSTR(MP_QSTR_ClearColorA), MP_ROM_PTR(&clearcolora_obj) }, { MP_ROM_QSTR(MP_QSTR_ClearColorRGB), MP_ROM_PTR(&clearcolorrgb_obj) }, { MP_ROM_QSTR(MP_QSTR_Clear), MP_ROM_PTR(&clear_obj) }, { MP_ROM_QSTR(MP_QSTR_ClearStencil), MP_ROM_PTR(&clearstencil_obj) }, { MP_ROM_QSTR(MP_QSTR_ClearTag), MP_ROM_PTR(&cleartag_obj) }, { MP_ROM_QSTR(MP_QSTR_ColorA), MP_ROM_PTR(&colora_obj) }, { MP_ROM_QSTR(MP_QSTR_ColorMask), MP_ROM_PTR(&colormask_obj) }, { MP_ROM_QSTR(MP_QSTR_ColorRGB), MP_ROM_PTR(&colorrgb_obj) }, { MP_ROM_QSTR(MP_QSTR_Display), MP_ROM_PTR(&display_obj) }, { MP_ROM_QSTR(MP_QSTR_End), MP_ROM_PTR(&end_obj) }, { MP_ROM_QSTR(MP_QSTR_Jump), MP_ROM_PTR(&jump_obj) }, { MP_ROM_QSTR(MP_QSTR_LineWidth), MP_ROM_PTR(&linewidth_obj) }, { MP_ROM_QSTR(MP_QSTR_Macro), MP_ROM_PTR(¯o_obj) }, { MP_ROM_QSTR(MP_QSTR_Nop), MP_ROM_PTR(&nop_obj) }, { MP_ROM_QSTR(MP_QSTR_PaletteSource), MP_ROM_PTR(&palettesource_obj) }, { MP_ROM_QSTR(MP_QSTR_PointSize), MP_ROM_PTR(&pointsize_obj) }, { MP_ROM_QSTR(MP_QSTR_RestoreContext), MP_ROM_PTR(&restorecontext_obj) }, { MP_ROM_QSTR(MP_QSTR_Return), MP_ROM_PTR(&return_obj) }, { MP_ROM_QSTR(MP_QSTR_SaveContext), MP_ROM_PTR(&savecontext_obj) }, { MP_ROM_QSTR(MP_QSTR_ScissorSize), MP_ROM_PTR(&scissorsize_obj) }, { MP_ROM_QSTR(MP_QSTR_ScissorXY), MP_ROM_PTR(&scissorxy_obj) }, { MP_ROM_QSTR(MP_QSTR_StencilFunc), MP_ROM_PTR(&stencilfunc_obj) }, { MP_ROM_QSTR(MP_QSTR_StencilMask), MP_ROM_PTR(&stencilmask_obj) }, { MP_ROM_QSTR(MP_QSTR_StencilOp), MP_ROM_PTR(&stencilop_obj) }, { MP_ROM_QSTR(MP_QSTR_TagMask), MP_ROM_PTR(&tagmask_obj) }, { MP_ROM_QSTR(MP_QSTR_Tag), MP_ROM_PTR(&tag_obj) }, { MP_ROM_QSTR(MP_QSTR_VertexTranslateX), MP_ROM_PTR(&vertextranslatex_obj) }, { MP_ROM_QSTR(MP_QSTR_VertexTranslateY), MP_ROM_PTR(&vertextranslatey_obj) } -- cgit v1.2.3 From 698ad745f6f707cf759a617990d186e1a8527b68 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Thu, 6 Feb 2020 10:49:03 -0500 Subject: Fix oscillator issue, add button and LED pins --- ports/stm32f4/boards/espruino_pico/pins.c | 4 ++++ ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c | 3 ++- ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c | 1 - 3 files changed, 6 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/espruino_pico/pins.c b/ports/stm32f4/boards/espruino_pico/pins.c index 89f618c25..55c0336c5 100644 --- a/ports/stm32f4/boards/espruino_pico/pins.c +++ b/ports/stm32f4/boards/espruino_pico/pins.c @@ -25,5 +25,9 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA10) }, { MP_ROM_QSTR(MP_QSTR_B9), MP_ROM_PTR(&pin_PB09) }, { MP_ROM_QSTR(MP_QSTR_B8), MP_ROM_PTR(&pin_PB08) }, + + { MP_ROM_QSTR(MP_QSTR_BTN), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PB12) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c index 53af29b3b..53810af26 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c @@ -25,6 +25,7 @@ * THE SOFTWARE. */ #include "stm32f4xx_hal.h" +#include "py/mpconfig.h" void stm32f4_peripherals_clocks_init(void) { //System clock init @@ -44,7 +45,7 @@ void stm32f4_peripherals_clocks_init(void) { RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 12; + RCC_OscInitStruct.PLL.PLLM = BOARD_OSC_DIV; RCC_OscInitStruct.PLL.PLLN = 336; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; RCC_OscInitStruct.PLL.PLLQ = 7; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c index 28afee5d8..7bd619662 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c @@ -38,7 +38,6 @@ void stm32f4_peripherals_gpio_init(void) { __HAL_RCC_GPIOH_CLK_ENABLE(); //Never reset pins - never_reset_pin_number(2,13); //PC13 anti tamp never_reset_pin_number(2,14); //PC14 OSC32_IN never_reset_pin_number(2,15); //PC15 OSC32_OUT never_reset_pin_number(0,13); //PA13 SWDIO -- cgit v1.2.3 From 08cf152aa82eb3b982088b0f4cba10cf1bd70b0a Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Thu, 6 Feb 2020 11:11:51 -0500 Subject: Document flashing process --- ports/stm32f4/boards/espruino_pico/README.md | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 ports/stm32f4/boards/espruino_pico/README.md (limited to 'ports') diff --git a/ports/stm32f4/boards/espruino_pico/README.md b/ports/stm32f4/boards/espruino_pico/README.md new file mode 100644 index 000000000..69225721e --- /dev/null +++ b/ports/stm32f4/boards/espruino_pico/README.md @@ -0,0 +1,15 @@ +# Flashing the Espruino Pico + +The Espruino Pico is normally updated via a bootloader activated by the Espruino web app. This approach is not practical for Circuitpython as it takes too much space from the internal filesystem - thus, you will need to follow the instructions for advanced reflashing using the built-in ROM bootloader on all STM32F4 MCUs (instructions sourced from https://www.espruino.com/Pico#advanced-reflashing) + + - Short out the BOOT0/BTN solder jumper on the back of the board - you can do this by drawing over it with a pencil. + - Install ST's DFU utility on Windows, or dfu-util for Mac or Linux + - **Mac**: install Homebrew: `brew install dfu-util` + - **Linux**: install with apt-get: `sudo apt-get install dfu-util` + - **Windows**: download [ST's application](https://www.st.com/en/development-tools/stsw-stm32080.html) or install the Linux subsystem for Windows 10 and follow the linux instructions. + - Hold down the Pico's button while plugging it into USB (when overwriting Espruino's default firmware) + - Navigate to the same directory as your firmware.bin file for Circuitpython and run the following command: `sudo dfu-util -a 0 -s 0x08000000 -D firmware.bin` or use the ST utility on Windows. + - Restart the board. + + +To reinstall Espruino, follow the same steps with the latest Espruino Pico binary from espruino.com/binaries. This will reinstall the usual Espruino bootloader. You must un-short the BOOT0/BTN jumper to re-use the original Espruino Bootloader again. If you used a Pencil mark then you may need to use cleaning fluid and a small brush to totally clear out the graphite. \ No newline at end of file -- cgit v1.2.3 From 383854ac5076efa90a6ac3b3312de3858a580ecf Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Thu, 6 Feb 2020 11:25:07 -0500 Subject: Add espruino pico to board list --- .github/workflows/build.yml | 1 + ports/stm32f4/boards/espruino_pico/README.md | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 369c26a53..fa9a6f7e0 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -144,6 +144,7 @@ jobs: - "electronut_labs_blip" - "electronut_labs_papyr" - "escornabot_makech" + - "espruino_pico" - "feather_bluefruit_sense" - "feather_m0_adalogger" - "feather_m0_basic" diff --git a/ports/stm32f4/boards/espruino_pico/README.md b/ports/stm32f4/boards/espruino_pico/README.md index 69225721e..9f0321c47 100644 --- a/ports/stm32f4/boards/espruino_pico/README.md +++ b/ports/stm32f4/boards/espruino_pico/README.md @@ -4,7 +4,7 @@ The Espruino Pico is normally updated via a bootloader activated by the Espruino - Short out the BOOT0/BTN solder jumper on the back of the board - you can do this by drawing over it with a pencil. - Install ST's DFU utility on Windows, or dfu-util for Mac or Linux - - **Mac**: install Homebrew: `brew install dfu-util` + - **Mac**: install with Homebrew: `brew install dfu-util` - **Linux**: install with apt-get: `sudo apt-get install dfu-util` - **Windows**: download [ST's application](https://www.st.com/en/development-tools/stsw-stm32080.html) or install the Linux subsystem for Windows 10 and follow the linux instructions. - Hold down the Pico's button while plugging it into USB (when overwriting Espruino's default firmware) -- cgit v1.2.3 From 4122f858887c1757e95690e11cb2cc440abee793 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Thu, 6 Feb 2020 12:19:19 -0500 Subject: Create board definitions, add to board list --- .github/workflows/build.yml | 1 + ports/stm32f4/boards/espruino_wifi/README.MD | 15 + ports/stm32f4/boards/espruino_wifi/board.c | 38 ++ ports/stm32f4/boards/espruino_wifi/mpconfigboard.h | 36 ++ .../stm32f4/boards/espruino_wifi/mpconfigboard.mk | 16 + ports/stm32f4/boards/espruino_wifi/pins.c | 39 ++ .../boards/espruino_wifi/stm32f4xx_hal_conf.h | 439 +++++++++++++++++++++ .../stm32f4/peripherals/stm32f4/stm32f411xe/gpio.c | 4 + 8 files changed, 588 insertions(+) create mode 100644 ports/stm32f4/boards/espruino_wifi/README.MD create mode 100644 ports/stm32f4/boards/espruino_wifi/board.c create mode 100644 ports/stm32f4/boards/espruino_wifi/mpconfigboard.h create mode 100644 ports/stm32f4/boards/espruino_wifi/mpconfigboard.mk create mode 100644 ports/stm32f4/boards/espruino_wifi/pins.c create mode 100644 ports/stm32f4/boards/espruino_wifi/stm32f4xx_hal_conf.h (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 369c26a53..6398793a9 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -144,6 +144,7 @@ jobs: - "electronut_labs_blip" - "electronut_labs_papyr" - "escornabot_makech" + - "espruino_wifi" - "feather_bluefruit_sense" - "feather_m0_adalogger" - "feather_m0_basic" diff --git a/ports/stm32f4/boards/espruino_wifi/README.MD b/ports/stm32f4/boards/espruino_wifi/README.MD new file mode 100644 index 000000000..8c2cd3be2 --- /dev/null +++ b/ports/stm32f4/boards/espruino_wifi/README.MD @@ -0,0 +1,15 @@ +# Flashing the Espruino Wifi + +The Espruino Wifi is normally updated via a bootloader activated by the Espruino web app. This approach is not practical for Circuitpython as it takes too much space from the internal filesystem - thus, you will need to follow the instructions for advanced reflashing using the built-in ROM bootloader on all STM32F4 MCUs (instructions sourced from https://www.espruino.com/Wifi#advanced-reflashing) + + - Short out the BOOT0/BTN solder jumper on the back of the board - you can do this by drawing over it with a pencil. + - Install ST's DFU utility on Windows, or dfu-util for Mac or Linux + - **Mac**: install with Homebrew: `brew install dfu-util` + - **Linux**: install with apt-get: `sudo apt-get install dfu-util` + - **Windows**: download [ST's application](https://www.st.com/en/development-tools/stsw-stm32080.html) or install the Linux subsystem for Windows 10 and follow the linux instructions. + - Hold down the Wifi's button while plugging it into USB (when overwriting Espruino's default firmware) + - Navigate to the same directory as your firmware.bin file for Circuitpython and run the following command: `sudo dfu-util -a 0 -s 0x08000000 -D firmware.bin` or use the ST utility on Windows. + - Restart the board. + + +To reinstall Espruino, follow the same steps with the latest Espruino Wifi binary from espruino.com/binaries. This will reinstall the usual Espruino bootloader. You must un-short the BOOT0/BTN jumper to re-use the original Espruino Bootloader again. If you used a Pencil mark then you may need to use cleaning fluid and a small brush to totally clear out the graphite. \ No newline at end of file diff --git a/ports/stm32f4/boards/espruino_wifi/board.c b/ports/stm32f4/boards/espruino_wifi/board.c new file mode 100644 index 000000000..4421970ee --- /dev/null +++ b/ports/stm32f4/boards/espruino_wifi/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm32f4/boards/espruino_wifi/mpconfigboard.h b/ports/stm32f4/boards/espruino_wifi/mpconfigboard.h new file mode 100644 index 000000000..611a41d93 --- /dev/null +++ b/ports/stm32f4/boards/espruino_wifi/mpconfigboard.h @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "Espruino Wifi" +#define MICROPY_HW_MCU_NAME "STM32F411xE" + +#define FLASH_SIZE (0x80000) //512K +#define FLASH_PAGE_SIZE (0x4000) //16K + +#define BOARD_OSC_DIV 8 +#define BOARD_OVERWRITE_SWD diff --git a/ports/stm32f4/boards/espruino_wifi/mpconfigboard.mk b/ports/stm32f4/boards/espruino_wifi/mpconfigboard.mk new file mode 100644 index 000000000..9dbb097c0 --- /dev/null +++ b/ports/stm32f4/boards/espruino_wifi/mpconfigboard.mk @@ -0,0 +1,16 @@ +USB_VID = 0x239A +USB_PID = 0x805E +USB_PRODUCT = "Espruino Wifi" +USB_MANUFACTURER = "Espruino" +USB_DEVICES = "CDC,MSC" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +MCU_SERIES = m4 +MCU_VARIANT = stm32f4 +MCU_SUB_VARIANT = stm32f411xe +MCU_PACKAGE = 48 +CMSIS_MCU = STM32F411xE +LD_FILE = boards/STM32F411VETx_FLASH.ld + diff --git a/ports/stm32f4/boards/espruino_wifi/pins.c b/ports/stm32f4/boards/espruino_wifi/pins.c new file mode 100644 index 000000000..8800317d5 --- /dev/null +++ b/ports/stm32f4/boards/espruino_wifi/pins.c @@ -0,0 +1,39 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + //P1 + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_B1), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_B10), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_B13), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_B14), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_B15), MP_ROM_PTR(&pin_PB15) }, + + { MP_ROM_QSTR(MP_QSTR_B0), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_B9), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_B8), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_B7), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_B6), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_B5), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_B4), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_B3), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_BTN), MP_ROM_PTR(&pin_PC13) }, + + { MP_ROM_QSTR(MP_QSTR_ESP_RX), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_ESP_TX), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_ESP_GPIO0), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_ESP_CHPD), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_ESP_GPIO13), MP_ROM_PTR(&pin_PA15) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm32f4/boards/espruino_wifi/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/espruino_wifi/stm32f4xx_hal_conf.h new file mode 100644 index 000000000..18d9d60eb --- /dev/null +++ b/ports/stm32f4/boards/espruino_wifi/stm32f4xx_hal_conf.h @@ -0,0 +1,439 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/gpio.c b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/gpio.c index 651aea269..77888c465 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/gpio.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/gpio.c @@ -26,6 +26,7 @@ #include "stm32f4xx_hal.h" #include "stm32f4/gpio.h" +#include "py/mpconfig.h" #include "common-hal/microcontroller/Pin.h" void stm32f4_peripherals_gpio_init(void) { @@ -40,8 +41,11 @@ void stm32f4_peripherals_gpio_init(void) { //Never reset pins never_reset_pin_number(2,14); //PC14 OSC32_IN never_reset_pin_number(2,15); //PC15 OSC32_OUT + + #if !defined(BOARD_OVERWRITE_SWD) never_reset_pin_number(0,13); //PA13 SWDIO never_reset_pin_number(0,14); //PA14 SWCLK + #endif // Port H is not included in GPIO port array // never_reset_pin_number(5,0); //PH0 JTDO -- cgit v1.2.3 From aee26b1c79e23b723b73857b31a77a3431956ab4 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Thu, 6 Feb 2020 12:25:17 -0500 Subject: Add proper PID --- ports/stm32f4/boards/espruino_pico/mpconfigboard.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/espruino_pico/mpconfigboard.mk b/ports/stm32f4/boards/espruino_pico/mpconfigboard.mk index 1db393911..151ca1437 100644 --- a/ports/stm32f4/boards/espruino_pico/mpconfigboard.mk +++ b/ports/stm32f4/boards/espruino_pico/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x805A +USB_PID = 0x808E USB_PRODUCT = "Espruino Pico" USB_MANUFACTURER = "Espruino" USB_DEVICES = "CDC,MSC" -- cgit v1.2.3 From 848577e830b10ff226900f978a5fdd39089c8dc0 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Thu, 6 Feb 2020 12:55:36 -0500 Subject: Update PID --- ports/stm32f4/boards/espruino_wifi/mpconfigboard.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/espruino_wifi/mpconfigboard.mk b/ports/stm32f4/boards/espruino_wifi/mpconfigboard.mk index 9dbb097c0..8b28cf07c 100644 --- a/ports/stm32f4/boards/espruino_wifi/mpconfigboard.mk +++ b/ports/stm32f4/boards/espruino_wifi/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x805E +USB_PID = 0x8090 USB_PRODUCT = "Espruino Wifi" USB_MANUFACTURER = "Espruino" USB_DEVICES = "CDC,MSC" -- cgit v1.2.3 From d93d491a611f2d987c818909810d30314762c3b6 Mon Sep 17 00:00:00 2001 From: neubauek Date: Thu, 6 Feb 2020 14:47:22 -0600 Subject: Cleaned up CircuitBrains Basic and Deluxe board definitions --- ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h | 8 +------- ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk | 3 +-- ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.h | 8 +------- ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk | 3 +-- 4 files changed, 4 insertions(+), 18 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h index e58dfa2fd..592160b84 100755 --- a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.h @@ -5,8 +5,6 @@ #define MICROPY_HW_LED_STATUS (&pin_PA14) -#define SPI_FLASH_BAUDRATE (8000000) - // On-board flash #define SPI_FLASH_MOSI_PIN &pin_PA16 #define SPI_FLASH_MISO_PIN &pin_PA18 @@ -18,11 +16,7 @@ #define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) -// If you change this, then make sure to update the linker scripts as well to -// make sure you don't overwrite code. -#define CIRCUITPY_INTERNAL_NVM_SIZE 256 - -#define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - CIRCUITPY_INTERNAL_NVM_SIZE) +#define SPI_FLASH_BAUDRATE (8000000) #define CALIBRATE_CRYSTALLESS 1 diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk index 0e75efd08..3587f1a33 100755 --- a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk @@ -1,4 +1,3 @@ -LD_FILE = boards/samd21x18-bootloader-external-flash-crystalless.ld USB_VID = 0x04D8 USB_PID = 0xEC63 USB_PRODUCT = "CircuitBrains Basic" @@ -14,4 +13,4 @@ LONGINT_IMPL = MPZ CIRCUITPY_BITBANGIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 \ No newline at end of file +CIRCUITPY_I2CSLAVE = 0 diff --git a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.h b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.h index 6a9dc8ebe..687e97a5a 100755 --- a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.h @@ -15,12 +15,6 @@ #define AUTORESET_DELAY_MS 500 -// If you change this, then make sure to update the linker scripts as well to -// make sure you don't overwrite code -#define CIRCUITPY_INTERNAL_NVM_SIZE 8192 - -#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) - #define BOARD_HAS_CRYSTAL 1 #define DEFAULT_I2C_BUS_SCL (&pin_PB03) @@ -35,4 +29,4 @@ // USB is always used internally so skip the pin objects for it. #define IGNORE_PIN_PA24 1 -#define IGNORE_PIN_PA25 1 \ No newline at end of file +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk index 2dcfed1f6..7a9e5a780 100755 --- a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk @@ -1,4 +1,3 @@ -LD_FILE = boards/samd51x19-bootloader-external-flash.ld USB_VID = 0x04D8 USB_PID = 0xEC64 USB_PRODUCT = "CircuitBrains Deluxe" @@ -14,4 +13,4 @@ LONGINT_IMPL = MPZ CIRCUITPY_NETWORK = 1 MICROPY_PY_WIZNET5K = 5500 -CIRCUITPY_PS2IO = 1 \ No newline at end of file +CIRCUITPY_PS2IO = 1 -- cgit v1.2.3 From 789e311b63688d7dd49d1963bf736e9dbf2cf690 Mon Sep 17 00:00:00 2001 From: Lady Ada Date: Thu, 6 Feb 2020 16:28:02 -0500 Subject: update rotation so 0 is the default, for much faster ondiskbitmaps --- ports/atmel-samd/boards/pybadge/board.c | 4 ++-- ports/atmel-samd/boards/pygamer/board.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/pybadge/board.c b/ports/atmel-samd/boards/pybadge/board.c index 3725f0ec3..28e1aec13 100644 --- a/ports/atmel-samd/boards/pybadge/board.c +++ b/ports/atmel-samd/boards/pybadge/board.c @@ -52,7 +52,7 @@ uint8_t display_init_sequence[] = { 0xc4, 2, 0x8a, 0xee, 0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V 0x2a, 0, // _INVOFF - 0x36, 1, 0x00, // _MADCTL top to bottom refresh in vsync aligned order. + 0x36, 1, 0b10100000, // _MADCTL for rotation 0 // 1 clk cycle nonoverlap, 2 cycle gate rise, 3 sycle osc equalie, // fix on VTL 0x3a, 1, 0x05, // COLMOD - 16bit color @@ -92,7 +92,7 @@ void board_init(void) { 128, // Height (after rotation) 0, // column start 0, // row start - 270, // rotation + 0, // rotation 16, // Color depth false, // grayscale false, // pixels in byte share row. only used for depth < 8 diff --git a/ports/atmel-samd/boards/pygamer/board.c b/ports/atmel-samd/boards/pygamer/board.c index b364ffccf..c052614db 100644 --- a/ports/atmel-samd/boards/pygamer/board.c +++ b/ports/atmel-samd/boards/pygamer/board.c @@ -52,7 +52,7 @@ uint8_t display_init_sequence[] = { 0xc4, 2, 0x8a, 0xee, 0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V 0x2a, 0, // _INVOFF - 0x36, 1, 0x00, // _MADCTL top to bottom refresh in vsync aligned order. + 0x36, 1, 0b10100000, // _MADCTL for rotation 0 // 1 clk cycle nonoverlap, 2 cycle gate rise, 3 sycle osc equalie, // fix on VTL 0x3a, 1, 0x05, // COLMOD - 16bit color @@ -92,7 +92,7 @@ void board_init(void) { 128, // Height 0, // column start 0, // row start - 270, // rotation + 0, // rotation 16, // Color depth false, // Grayscale false, // pixels in a byte share a row. Only valid for depths < 8 -- cgit v1.2.3 From 41b5f737850d77fc56f9272159dc7765f5942968 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Thu, 6 Feb 2020 18:47:06 -0500 Subject: revert mixed up linkers --- ports/stm32f4/boards/STM32F401_boot.ld | 106 -------------------- ports/stm32f4/boards/STM32F401_fs.ld | 107 --------------------- ports/stm32f4/boards/STM32F401xd_fs.ld | 4 +- ports/stm32f4/boards/STM32F401xe_boot.ld | 106 ++++++++++++++++++++ ports/stm32f4/boards/STM32F401xe_fs.ld | 107 +++++++++++++++++++++ ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk | 4 +- 6 files changed, 217 insertions(+), 217 deletions(-) delete mode 100644 ports/stm32f4/boards/STM32F401_boot.ld delete mode 100644 ports/stm32f4/boards/STM32F401_fs.ld create mode 100644 ports/stm32f4/boards/STM32F401xe_boot.ld create mode 100644 ports/stm32f4/boards/STM32F401xe_fs.ld (limited to 'ports') diff --git a/ports/stm32f4/boards/STM32F401_boot.ld b/ports/stm32f4/boards/STM32F401_boot.ld deleted file mode 100644 index 125d785fc..000000000 --- a/ports/stm32f4/boards/STM32F401_boot.ld +++ /dev/null @@ -1,106 +0,0 @@ -/* - GNU linker script for STM32F401 with bootloader (such as the Meowbit) -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash, sans bootloader region */ - FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4 */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5,6,7 are 128K */ - RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); - -ENTRY(Reset_Handler) - -/* define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - - /* This first flash block is 16K annd the isr vectors only take up - about 400 bytes. Micropython pads this with files, but this didn't - work with the size of Circuitpython's ff object. */ - - . = ALIGN(4); - } >FLASH_ISR - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text*) /* .text* sections (code) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - /* *(.glue_7) */ /* glue arm to thumb code */ - /* *(.glue_7t) */ /* glue thumb to arm code */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - } >FLASH_TEXT - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM AT> FLASH_TEXT - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ - } >RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - . = . + _minimum_heap_size; - . = ALIGN(4); - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} - - diff --git a/ports/stm32f4/boards/STM32F401_fs.ld b/ports/stm32f4/boards/STM32F401_fs.ld deleted file mode 100644 index c42dfcca8..000000000 --- a/ports/stm32f4/boards/STM32F401_fs.ld +++ /dev/null @@ -1,107 +0,0 @@ -/* - GNU linker script for STM32F401 with bootloader (such as the Meowbit) -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 384K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ - FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 320K /* sector 4 is 64K, sectors 5,6,7 are 128K */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 2K; -_minimum_heap_size = 16K; - -/* Define tho top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); - -ENTRY(Reset_Handler) - -/* define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - - /* This first flash block is 16K annd the isr vectors only take up - about 400 bytes. Micropython pads this with files, but this didn't - work with the size of Circuitpython's ff object. */ - - . = ALIGN(4); - } >FLASH_ISR - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text*) /* .text* sections (code) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - /* *(.glue_7) */ /* glue arm to thumb code */ - /* *(.glue_7t) */ /* glue thumb to arm code */ - - . = ALIGN(4); - _etext = .; /* define a global symbol at end of code */ - } >FLASH_TEXT - - /* used by the startup to initialize data */ - _sidata = LOADADDR(.data); - - /* This is the initialized data section - The program executes knowing that the data is in the RAM - but the loader puts the initial values in the FLASH (inidata). - It is one task of the startup to copy the initial values from FLASH to RAM. */ - .data : - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ - } >RAM AT> FLASH_TEXT - - /* Uninitialized data section */ - .bss : - { - . = ALIGN(4); - _sbss = .; /* define a global symbol at bss start; used by startup code */ - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ - } >RAM - - /* this is to define the start of the heap, and make sure we have a minimum size */ - .heap : - { - . = ALIGN(4); - . = . + _minimum_heap_size; - . = ALIGN(4); - } >RAM - - /* this just checks there is enough RAM for the stack */ - .stack : - { - . = ALIGN(4); - . = . + _minimum_stack_size; - . = ALIGN(4); - } >RAM - - .ARM.attributes 0 : { *(.ARM.attributes) } -} - - diff --git a/ports/stm32f4/boards/STM32F401xd_fs.ld b/ports/stm32f4/boards/STM32F401xd_fs.ld index fd30e1622..c42dfcca8 100644 --- a/ports/stm32f4/boards/STM32F401xd_fs.ld +++ b/ports/stm32f4/boards/STM32F401xd_fs.ld @@ -5,10 +5,10 @@ /* Specify the memory areas */ MEMORY { - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 384K /* entire flash */ FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ - FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 320K /* sector 4 is 64K, sectors 5,6,7 are 128K */ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K } diff --git a/ports/stm32f4/boards/STM32F401xe_boot.ld b/ports/stm32f4/boards/STM32F401xe_boot.ld new file mode 100644 index 000000000..125d785fc --- /dev/null +++ b/ports/stm32f4/boards/STM32F401xe_boot.ld @@ -0,0 +1,106 @@ +/* + GNU linker script for STM32F401 with bootloader (such as the Meowbit) +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash, sans bootloader region */ + FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4 */ + FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/STM32F401xe_fs.ld b/ports/stm32f4/boards/STM32F401xe_fs.ld new file mode 100644 index 000000000..fd30e1622 --- /dev/null +++ b/ports/stm32f4/boards/STM32F401xe_fs.ld @@ -0,0 +1,107 @@ +/* + GNU linker script for STM32F401 with bootloader (such as the Meowbit) +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk index dce69276d..16268ba11 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk @@ -19,6 +19,6 @@ MCU_VARIANT = stm32f4 MCU_SUB_VARIANT = stm32f401xe MCU_PACKAGE = 64 CMSIS_MCU = STM32F401xE -LD_FILE = boards/STM32F401_boot.ld -# LD_FILE = boards/STM32F401_fs.ld # use for internal flash +LD_FILE = boards/STM32F401xe_boot.ld +# LD_FILE = boards/STM32F401xe_fs.ld # use for internal flash -- cgit v1.2.3 From 857d8ab40a6e4ef7d0cc78f481511070c1af15e3 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Fri, 7 Feb 2020 10:02:50 -0500 Subject: improve time.monotonic_ns() accuracy from ms to us --- locale/circuitpython.pot | 2 +- ports/atmel-samd/common-hal/time/__init__.c | 9 +++++++++ ports/cxd56/common-hal/time/__init__.c | 8 ++++++++ ports/mimxrt10xx/common-hal/time/__init__.c | 10 ++++++++++ ports/nrf/common-hal/time/__init__.c | 8 ++++++++ ports/stm32f4/common-hal/time/__init__.c | 8 ++++++++ shared-bindings/time/__init__.c | 2 +- shared-bindings/time/__init__.h | 1 + 8 files changed, 46 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 6069bdd97..3e4413068 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-05 15:55-0800\n" +"POT-Creation-Date: 2020-02-07 10:02-0500\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" diff --git a/ports/atmel-samd/common-hal/time/__init__.c b/ports/atmel-samd/common-hal/time/__init__.c index 2d82b3d1a..149996452 100644 --- a/ports/atmel-samd/common-hal/time/__init__.c +++ b/ports/atmel-samd/common-hal/time/__init__.c @@ -29,11 +29,20 @@ #include "shared-bindings/time/__init__.h" #include "supervisor/shared/tick.h" +#include "tick.h" inline uint64_t common_hal_time_monotonic() { return supervisor_ticks_ms64(); } +uint64_t common_hal_time_monotonic_ns() { + uint64_t ms; + uint32_t us_until_ms; + current_tick(&ms, &us_until_ms); + // us counts down. + return 1000 * (ms * 1000 + (1000 - us_until_ms)); +} + void common_hal_time_delay_ms(uint32_t delay) { mp_hal_delay_ms(delay); } diff --git a/ports/cxd56/common-hal/time/__init__.c b/ports/cxd56/common-hal/time/__init__.c index 6f5eedd41..fa915782d 100644 --- a/ports/cxd56/common-hal/time/__init__.c +++ b/ports/cxd56/common-hal/time/__init__.c @@ -24,6 +24,8 @@ * THE SOFTWARE. */ +#include + #include "py/mphal.h" #include "supervisor/shared/tick.h" @@ -32,6 +34,12 @@ uint64_t common_hal_time_monotonic(void) { return supervisor_ticks_ms64(); } +uint64_t common_hal_time_monotonic_ns() { + struct timeval tv; + gettimeofday(&tv, NULL); + return 1000 * ((uint64_t) tv.tv_sec * 1000000 + (uint64_t) tv.tv_usec); +} + void common_hal_time_delay_ms(uint32_t delay) { mp_hal_delay_ms(delay); } diff --git a/ports/mimxrt10xx/common-hal/time/__init__.c b/ports/mimxrt10xx/common-hal/time/__init__.c index 2d82b3d1a..4497d8e86 100644 --- a/ports/mimxrt10xx/common-hal/time/__init__.c +++ b/ports/mimxrt10xx/common-hal/time/__init__.c @@ -30,10 +30,20 @@ #include "supervisor/shared/tick.h" +#include "tick.h" + inline uint64_t common_hal_time_monotonic() { return supervisor_ticks_ms64(); } +uint64_t common_hal_time_monotonic_ns() { + uint64_t ms; + uint32_t us_until_ms; + current_tick(&ms, &us_until_ms); + // us counts down. + return 1000 * (ms * 1000 + (1000 - us_until_ms)); +} + void common_hal_time_delay_ms(uint32_t delay) { mp_hal_delay_ms(delay); } diff --git a/ports/nrf/common-hal/time/__init__.c b/ports/nrf/common-hal/time/__init__.c index 976f519db..dcfe55eca 100644 --- a/ports/nrf/common-hal/time/__init__.c +++ b/ports/nrf/common-hal/time/__init__.c @@ -32,6 +32,14 @@ uint64_t common_hal_time_monotonic(void) { return supervisor_ticks_ms64(); } +uint64_t common_hal_time_monotonic_ns() { + uint64_t ms; + uint32_t us_until_ms; + current_tick(&ms, &us_until_ms); + // us counts down. + return 1000 * (ms * 1000 + (1000 - us_until_ms)); +} + void common_hal_time_delay_ms(uint32_t delay) { mp_hal_delay_ms(delay); } diff --git a/ports/stm32f4/common-hal/time/__init__.c b/ports/stm32f4/common-hal/time/__init__.c index 976f519db..dcfe55eca 100644 --- a/ports/stm32f4/common-hal/time/__init__.c +++ b/ports/stm32f4/common-hal/time/__init__.c @@ -32,6 +32,14 @@ uint64_t common_hal_time_monotonic(void) { return supervisor_ticks_ms64(); } +uint64_t common_hal_time_monotonic_ns() { + uint64_t ms; + uint32_t us_until_ms; + current_tick(&ms, &us_until_ms); + // us counts down. + return 1000 * (ms * 1000 + (1000 - us_until_ms)); +} + void common_hal_time_delay_ms(uint32_t delay) { mp_hal_delay_ms(delay); } diff --git a/shared-bindings/time/__init__.c b/shared-bindings/time/__init__.c index b3e4604b5..2c1aebc2e 100644 --- a/shared-bindings/time/__init__.c +++ b/shared-bindings/time/__init__.c @@ -216,7 +216,7 @@ MP_DEFINE_CONST_FUN_OBJ_0(time_time_obj, time_time); //| :rtype: int //| STATIC mp_obj_t time_monotonic_ns(void) { - uint64_t time64 = common_hal_time_monotonic() * 1000000llu; + uint64_t time64 = common_hal_time_monotonic_ns(); return mp_obj_new_int_from_ll((long long) time64); } MP_DEFINE_CONST_FUN_OBJ_0(time_monotonic_ns_obj, time_monotonic_ns); diff --git a/shared-bindings/time/__init__.h b/shared-bindings/time/__init__.h index c5a0b47fc..ec96aea24 100644 --- a/shared-bindings/time/__init__.h +++ b/shared-bindings/time/__init__.h @@ -36,6 +36,7 @@ extern mp_obj_t struct_time_from_tm(timeutils_struct_time_t *tm); extern void struct_time_to_tm(mp_obj_t t, timeutils_struct_time_t *tm); extern uint64_t common_hal_time_monotonic(void); +extern uint64_t common_hal_time_monotonic_ns(void); extern void common_hal_time_delay_ms(uint32_t); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_TIME___INIT___H -- cgit v1.2.3 From 005c4caf8c5c76deab661a1f8bc2ea743ba40c6d Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Fri, 7 Feb 2020 10:32:37 -0500 Subject: fix function defs for compiler --- ports/atmel-samd/common-hal/time/__init__.c | 4 ++-- ports/cxd56/common-hal/time/__init__.c | 2 +- ports/mimxrt10xx/common-hal/time/__init__.c | 4 ++-- ports/nrf/common-hal/time/__init__.c | 2 +- ports/stm32f4/common-hal/time/__init__.c | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/time/__init__.c b/ports/atmel-samd/common-hal/time/__init__.c index 149996452..652e455fc 100644 --- a/ports/atmel-samd/common-hal/time/__init__.c +++ b/ports/atmel-samd/common-hal/time/__init__.c @@ -31,11 +31,11 @@ #include "supervisor/shared/tick.h" #include "tick.h" -inline uint64_t common_hal_time_monotonic() { +inline uint64_t common_hal_time_monotonic(void) { return supervisor_ticks_ms64(); } -uint64_t common_hal_time_monotonic_ns() { +uint64_t common_hal_time_monotonic_ns(void) { uint64_t ms; uint32_t us_until_ms; current_tick(&ms, &us_until_ms); diff --git a/ports/cxd56/common-hal/time/__init__.c b/ports/cxd56/common-hal/time/__init__.c index fa915782d..31c63cbb2 100644 --- a/ports/cxd56/common-hal/time/__init__.c +++ b/ports/cxd56/common-hal/time/__init__.c @@ -34,7 +34,7 @@ uint64_t common_hal_time_monotonic(void) { return supervisor_ticks_ms64(); } -uint64_t common_hal_time_monotonic_ns() { +uint64_t common_hal_time_monotonic_ns(void) { struct timeval tv; gettimeofday(&tv, NULL); return 1000 * ((uint64_t) tv.tv_sec * 1000000 + (uint64_t) tv.tv_usec); diff --git a/ports/mimxrt10xx/common-hal/time/__init__.c b/ports/mimxrt10xx/common-hal/time/__init__.c index 4497d8e86..524e31d1a 100644 --- a/ports/mimxrt10xx/common-hal/time/__init__.c +++ b/ports/mimxrt10xx/common-hal/time/__init__.c @@ -32,11 +32,11 @@ #include "tick.h" -inline uint64_t common_hal_time_monotonic() { +inline uint64_t common_hal_time_monotonic(void) { return supervisor_ticks_ms64(); } -uint64_t common_hal_time_monotonic_ns() { +uint64_t common_hal_time_monotonic_ns(void) { uint64_t ms; uint32_t us_until_ms; current_tick(&ms, &us_until_ms); diff --git a/ports/nrf/common-hal/time/__init__.c b/ports/nrf/common-hal/time/__init__.c index dcfe55eca..c85077868 100644 --- a/ports/nrf/common-hal/time/__init__.c +++ b/ports/nrf/common-hal/time/__init__.c @@ -32,7 +32,7 @@ uint64_t common_hal_time_monotonic(void) { return supervisor_ticks_ms64(); } -uint64_t common_hal_time_monotonic_ns() { +uint64_t common_hal_time_monotonic_ns(void) { uint64_t ms; uint32_t us_until_ms; current_tick(&ms, &us_until_ms); diff --git a/ports/stm32f4/common-hal/time/__init__.c b/ports/stm32f4/common-hal/time/__init__.c index dcfe55eca..c85077868 100644 --- a/ports/stm32f4/common-hal/time/__init__.c +++ b/ports/stm32f4/common-hal/time/__init__.c @@ -32,7 +32,7 @@ uint64_t common_hal_time_monotonic(void) { return supervisor_ticks_ms64(); } -uint64_t common_hal_time_monotonic_ns() { +uint64_t common_hal_time_monotonic_ns(void) { uint64_t ms; uint32_t us_until_ms; current_tick(&ms, &us_until_ms); -- cgit v1.2.3 From 84fa0c187e9801c39c669b87004542accb20f5c4 Mon Sep 17 00:00:00 2001 From: Max Holliday Date: Sat, 8 Feb 2020 15:33:25 -0800 Subject: adding new board - PyCubed open source and radiation tested hardware + software platform for small satellites called CubeSats. See pycubed.org for more info. See quickstart.pycubed.org for lots of circuitpython examples --- ports/atmel-samd/boards/pycubed/board.c | 55 ++++++++++++++++++++++++ ports/atmel-samd/boards/pycubed/mpconfigboard.h | 34 +++++++++++++++ ports/atmel-samd/boards/pycubed/mpconfigboard.mk | 24 +++++++++++ ports/atmel-samd/boards/pycubed/pins.c | 55 ++++++++++++++++++++++++ 4 files changed, 168 insertions(+) create mode 100644 ports/atmel-samd/boards/pycubed/board.c create mode 100644 ports/atmel-samd/boards/pycubed/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/pycubed/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/pycubed/pins.c (limited to 'ports') diff --git a/ports/atmel-samd/boards/pycubed/board.c b/ports/atmel-samd/boards/pycubed/board.c new file mode 100644 index 000000000..da37252d8 --- /dev/null +++ b/ports/atmel-samd/boards/pycubed/board.c @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include + +#include "boards/board.h" +#include "py/mpconfig.h" +#include "shared-bindings/nvm/ByteArray.h" + +nvm_bytearray_obj_t bootcnt = { + .base = { + .type = &nvm_bytearray_type + }, + .len = ( uint32_t) 8192, + .start_address = (uint8_t*) (0x00080000 - 8192) + }; + + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + uint8_t value_out = 0; + common_hal_nvm_bytearray_get_bytes(&bootcnt,0,1,&value_out); + ++value_out; + common_hal_nvm_bytearray_set_bytes(&bootcnt,0,&value_out,1); +} \ No newline at end of file diff --git a/ports/atmel-samd/boards/pycubed/mpconfigboard.h b/ports/atmel-samd/boards/pycubed/mpconfigboard.h new file mode 100644 index 000000000..49a98e8d4 --- /dev/null +++ b/ports/atmel-samd/boards/pycubed/mpconfigboard.h @@ -0,0 +1,34 @@ + +#define MICROPY_HW_BOARD_NAME "PyCubedv04" +#define MICROPY_HW_MCU_NAME "samd51j19" +#define CIRCUITPY_MCU_FAMILY samd51 + +#define MICROPY_HW_NEOPIXEL (&pin_PA21) + +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define AUTORESET_DELAY_MS 500 + +#define CIRCUITPY_INTERNAL_NVM_SIZE 8192 + +#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE) + +#define EXTERNAL_FLASH_QSPI_DUAL + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PB13) +#define DEFAULT_I2C_BUS_SDA (&pin_PB12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA13) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA12) +#define DEFAULT_SPI_BUS_MISO (&pin_PA14) + +#define DEFAULT_UART_BUS_TX (&pin_PB02) +#define DEFAULT_UART_BUS_RX (&pin_PB03) + +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/pycubed/mpconfigboard.mk b/ports/atmel-samd/boards/pycubed/mpconfigboard.mk new file mode 100644 index 000000000..adbb4aedb --- /dev/null +++ b/ports/atmel-samd/boards/pycubed/mpconfigboard.mk @@ -0,0 +1,24 @@ +LD_FILE = boards/samd51x19-bootloader-external-flash.ld +USB_VID = 0x04D8 +USB_PID = 0xEC44 +USB_PRODUCT = "PyCubed" +USB_MANUFACTURER = "maholli" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = W25Q80DV +LONGINT_IMPL = MPZ + +# Not needed. +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_PS2IO = 0 + +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Register +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SD \ No newline at end of file diff --git a/ports/atmel-samd/boards/pycubed/pins.c b/ports/atmel-samd/boards/pycubed/pins.c new file mode 100644 index 000000000..4c97f58a8 --- /dev/null +++ b/ports/atmel-samd/boards/pycubed/pins.c @@ -0,0 +1,55 @@ +#include "shared-bindings/board/__init__.h" +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_xSDCS), MP_ROM_PTR(&pin_PA27) }, + + { MP_ROM_QSTR(MP_QSTR_RELAY_A), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_BURN1), MP_ROM_PTR(&pin_PB31) }, + { MP_ROM_QSTR(MP_QSTR_BURN2), MP_ROM_PTR(&pin_PA15) }, + + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_L1PROG), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_AIN4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_AIN5), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_CHRG), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_DAC0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_PA17), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_PA18), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_PA19), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_PA20), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_PA22), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_PB16), MP_ROM_PTR(&pin_PB16) }, + { MP_ROM_QSTR(MP_QSTR_PB17), MP_ROM_PTR(&pin_PB17) }, + { MP_ROM_QSTR(MP_QSTR_PB22), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_PB23), MP_ROM_PTR(&pin_PB23) }, + + { MP_ROM_QSTR(MP_QSTR_RF1_RST), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_RF1_CS), MP_ROM_PTR(&pin_PB30) }, + { MP_ROM_QSTR(MP_QSTR_RF1_IO0), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_RF1_IO4), MP_ROM_PTR(&pin_PB04) }, + + { MP_ROM_QSTR(MP_QSTR_RF2_RST), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_RF2_CS), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_RF2_IO1), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_RF2_BSY), MP_ROM_PTR(&pin_PB07) }, + + { MP_ROM_QSTR(MP_QSTR_EN_GPS), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB13) }, + + { MP_ROM_QSTR(MP_QSTR_WDT_WDI), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA21) }, + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); \ No newline at end of file -- cgit v1.2.3 From b91c4e66cb1e6672b21a6dff359041d5b4e91b59 Mon Sep 17 00:00:00 2001 From: Max Holliday Date: Sat, 8 Feb 2020 16:09:47 -0800 Subject: adding Adafruit_CircuitPython_Register to frozen + updating SAM32 --- ports/atmel-samd/boards/sam32/mpconfigboard.h | 15 ++++++------ ports/atmel-samd/boards/sam32/mpconfigboard.mk | 7 ++++++ ports/atmel-samd/boards/sam32/pins.c | 33 ++++++++++++++++---------- 3 files changed, 35 insertions(+), 20 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/sam32/mpconfigboard.h b/ports/atmel-samd/boards/sam32/mpconfigboard.h index bd9f5e398..6378e4162 100644 --- a/ports/atmel-samd/boards/sam32/mpconfigboard.h +++ b/ports/atmel-samd/boards/sam32/mpconfigboard.h @@ -1,23 +1,22 @@ - -#define MICROPY_HW_BOARD_NAME "SAM32v2a" +#define MICROPY_HW_BOARD_NAME "SAM32v26" #define MICROPY_HW_MCU_NAME "samd51j20" #define CIRCUITPY_MCU_FAMILY samd51 #define MICROPY_HW_LED_STATUS (&pin_PA27) -#define MICROPY_HW_NEOPIXEL (&pin_PA15) +#define MICROPY_HW_NEOPIXEL (&pin_PA15) #define MICROPY_PORT_A (PORT_PA24 | PORT_PA25) #define MICROPY_PORT_B (0) #define MICROPY_PORT_C (0) -#define MICROPY_PORT_D (0) +#define MICROPY_PORT_D (0) -// No microcontroller.nvm -#define CIRCUITPY_INTERNAL_NVM_SIZE 0 +#define CIRCUITPY_INTERNAL_NVM_SIZE 1024 +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (128*1024) #define BOARD_HAS_CRYSTAL 1 -#define DEFAULT_I2C_BUS_SCL (&pin_PA04) -#define DEFAULT_I2C_BUS_SDA (&pin_PA07) +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) #define DEFAULT_SPI_BUS_SCK (&pin_PB13) #define DEFAULT_SPI_BUS_MOSI (&pin_PB12) diff --git a/ports/atmel-samd/boards/sam32/mpconfigboard.mk b/ports/atmel-samd/boards/sam32/mpconfigboard.mk index 0d6be6437..118744935 100644 --- a/ports/atmel-samd/boards/sam32/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sam32/mpconfigboard.mk @@ -8,3 +8,10 @@ CHIP_FAMILY = samd51 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = MPZ + +# No I2S on SAMD51 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_USTACK = 1 + +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel \ No newline at end of file diff --git a/ports/atmel-samd/boards/sam32/pins.c b/ports/atmel-samd/boards/sam32/pins.c index f32057d75..f0a5b2b62 100644 --- a/ports/atmel-samd/boards/sam32/pins.c +++ b/ports/atmel-samd/boards/sam32/pins.c @@ -1,10 +1,8 @@ #include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PB08) }, - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB09) }, - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_PB09) }, { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB04) }, { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB05) }, { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB06) }, @@ -13,15 +11,14 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB13) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB12) }, { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB14) }, - { MP_ROM_QSTR(MP_QSTR_xSDCS),MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_xSDCS),MP_ROM_PTR(&pin_PA04) }, { MP_ROM_QSTR(MP_QSTR_DAC0), MP_ROM_PTR(&pin_PA02) }, { MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_PA10) }, { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_PA11) }, - { MP_ROM_QSTR(MP_QSTR_D29), MP_ROM_PTR(&pin_PA12) }, - { MP_ROM_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_PA13) }, { MP_ROM_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_PA14) }, { MP_ROM_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_PA16) }, { MP_ROM_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_PA17) }, @@ -35,12 +32,24 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D50), MP_ROM_PTR(&pin_PB23) }, { MP_ROM_QSTR(MP_QSTR_D59), MP_ROM_PTR(&pin_PB30) }, { MP_ROM_QSTR(MP_QSTR_D60), MP_ROM_PTR(&pin_PB31) }, - { MP_ROM_QSTR(MP_QSTR_D64), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_D61), MP_ROM_PTR(&pin_PB00) }, + + { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_TCK), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_TDI), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_TMS), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_ESP_CS),MP_ROM_PTR(&pin_PB15) }, + + { MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_PB16) }, + { MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_PB17) }, - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB16) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB17) }, - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_PTR(&pin_PB11) }, { MP_ROM_QSTR(MP_QSTR_DTR), MP_ROM_PTR(&pin_PB10) }, -- cgit v1.2.3 From 0a54f8875127abd334eff4f9173719da812f2e7d Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Mon, 10 Feb 2020 00:12:37 +0100 Subject: add pin defs for buttons on the OHS2020 badge --- ports/nrf/boards/ohs2020_badge/pins.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'ports') diff --git a/ports/nrf/boards/ohs2020_badge/pins.c b/ports/nrf/boards/ohs2020_badge/pins.c index e984e3070..c92d77a92 100644 --- a/ports/nrf/boards/ohs2020_badge/pins.c +++ b/ports/nrf/boards/ohs2020_badge/pins.c @@ -19,6 +19,11 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display) }, + + { MP_ROM_QSTR(MP_QSTR_BUTTON_A), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_B), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_C), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_D), MP_ROM_PTR(&pin_P1_03) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From 3bf4b42e2e99a7a1afac20aa4e0daf97d1d4e734 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Mon, 10 Feb 2020 00:49:13 +0100 Subject: change OH20 badge pin defs to use SWn for buttons Rather than use A, B, C and D Use the buttons according to silkscreen references: SW1 SW2 SW3 SW4 --- ports/nrf/boards/ohs2020_badge/pins.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/ohs2020_badge/pins.c b/ports/nrf/boards/ohs2020_badge/pins.c index c92d77a92..2cf783cc1 100644 --- a/ports/nrf/boards/ohs2020_badge/pins.c +++ b/ports/nrf/boards/ohs2020_badge/pins.c @@ -20,10 +20,10 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display) }, - { MP_ROM_QSTR(MP_QSTR_BUTTON_A), MP_ROM_PTR(&pin_P0_29) }, - { MP_ROM_QSTR(MP_QSTR_BUTTON_B), MP_ROM_PTR(&pin_P0_03) }, - { MP_ROM_QSTR(MP_QSTR_BUTTON_C), MP_ROM_PTR(&pin_P0_17) }, - { MP_ROM_QSTR(MP_QSTR_BUTTON_D), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_SW1), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_SW2), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_SW3), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_SW4), MP_ROM_PTR(&pin_P1_03) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From 3f700e7e6811f3c1ee15a9620c93ae024563ef2c Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Mon, 10 Feb 2020 12:16:00 -0500 Subject: fix missing parameter --- ports/stm32f4/mphalport.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/stm32f4/mphalport.c b/ports/stm32f4/mphalport.c index 47ff493e2..a3cf501c0 100644 --- a/ports/stm32f4/mphalport.c +++ b/ports/stm32f4/mphalport.c @@ -51,7 +51,7 @@ void mp_hal_delay_ms(mp_uint_t delay) { } void mp_hal_delay_us(mp_uint_t delay) { - common_hal_mcu_delay_us(); + common_hal_mcu_delay_us(delay); } void mp_hal_disable_all_interrupts(void) { -- cgit v1.2.3 From c4436910c3cea5b67dc207d1ad80f3d2c4372844 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Mon, 10 Feb 2020 12:44:23 -0500 Subject: create F407 specific files --- ports/stm32f4/boards/STM32F407_fs.ld | 108 +++++ ports/stm32f4/boards/startup_stm32f407xx.s | 516 +++++++++++++++++++++ .../boards/stm32f4_discovery/mpconfigboard.mk | 6 +- ports/stm32f4/peripherals/stm32f4/periph.h | 6 + ports/stm32f4/peripherals/stm32f4/pins.h | 3 + .../peripherals/stm32f4/stm32f407xx/clocks.c | 64 +++ .../stm32f4/peripherals/stm32f4/stm32f407xx/gpio.c | 56 +++ .../peripherals/stm32f4/stm32f407xx/periph.c | 194 ++++++++ .../peripherals/stm32f4/stm32f407xx/periph.h | 57 +++ .../stm32f4/peripherals/stm32f4/stm32f407xx/pins.c | 161 +++++++ .../stm32f4/peripherals/stm32f4/stm32f407xx/pins.h | 158 +++++++ ports/stm32f4/supervisor/internal_flash.h | 5 + 12 files changed, 1331 insertions(+), 3 deletions(-) create mode 100644 ports/stm32f4/boards/STM32F407_fs.ld create mode 100644 ports/stm32f4/boards/startup_stm32f407xx.s create mode 100644 ports/stm32f4/peripherals/stm32f4/stm32f407xx/clocks.c create mode 100644 ports/stm32f4/peripherals/stm32f4/stm32f407xx/gpio.c create mode 100644 ports/stm32f4/peripherals/stm32f4/stm32f407xx/periph.c create mode 100644 ports/stm32f4/peripherals/stm32f4/stm32f407xx/periph.h create mode 100644 ports/stm32f4/peripherals/stm32f4/stm32f407xx/pins.c create mode 100644 ports/stm32f4/peripherals/stm32f4/stm32f407xx/pins.h (limited to 'ports') diff --git a/ports/stm32f4/boards/STM32F407_fs.ld b/ports/stm32f4/boards/STM32F407_fs.ld new file mode 100644 index 000000000..7f7c91784 --- /dev/null +++ b/ports/stm32f4/boards/STM32F407_fs.ld @@ -0,0 +1,108 @@ +/* + GNU linker script for STM32F405 via Micropython +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define tho top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); + +ENTRY(Reset_Handler) + +/* define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + + /* This first flash block is 16K annd the isr vectors only take up + about 400 bytes. Micropython pads this with files, but this didn't + work with the size of Circuitpython's ff object. */ + + . = ALIGN(4); + } >FLASH_ISR + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text*) /* .text* sections (code) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + /* *(.glue_7) */ /* glue arm to thumb code */ + /* *(.glue_7t) */ /* glue thumb to arm code */ + + . = ALIGN(4); + _etext = .; /* define a global symbol at end of code */ + } >FLASH_TEXT + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */ + } >RAM AT> FLASH_TEXT + + /* Uninitialized data section */ + .bss : + { + . = ALIGN(4); + _sbss = .; /* define a global symbol at bss start; used by startup code */ + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end; used by startup code and GC */ + } >RAM + + /* this is to define the start of the heap, and make sure we have a minimum size */ + .heap : + { + . = ALIGN(4); + . = . + _minimum_heap_size; + . = ALIGN(4); + } >RAM + + /* this just checks there is enough RAM for the stack */ + .stack : + { + . = ALIGN(4); + . = . + _minimum_stack_size; + . = ALIGN(4); + } >RAM + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ports/stm32f4/boards/startup_stm32f407xx.s b/ports/stm32f4/boards/startup_stm32f407xx.s new file mode 100644 index 000000000..6b77655ca --- /dev/null +++ b/ports/stm32f4/boards/startup_stm32f407xx.s @@ -0,0 +1,516 @@ +/** + ****************************************************************************** + * @file startup_stm32f405xx.s + * @author MCD Application Team + * @brief STM32F405xx Devices vector table for GCC based toolchains. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ +/* bl __libc_init_array */ +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + + +g_pfnVectors: + .word _estack + .word Reset_Handler + + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word CAN1_TX_IRQHandler /* CAN1 TX */ + .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /* CAN1 SCE */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word FSMC_IRQHandler /* FSMC */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word UART4_IRQHandler /* UART4 */ + .word UART5_IRQHandler /* UART5 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .word TIM7_IRQHandler /* TIM7 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word CAN2_TX_IRQHandler /* CAN2 TX */ + .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /* CAN2 SCE */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .word OTG_HS_IRQHandler /* USB OTG HS */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word HASH_RNG_IRQHandler /* Hash and Rng */ + .word FPU_IRQHandler /* FPU */ + + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FSMC_IRQHandler + .thumb_set FSMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + + diff --git a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk index 9bdc62404..312a20f65 100644 --- a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.mk @@ -11,8 +11,8 @@ LONGINT_IMPL = NONE # other than the camera and ethernet, which aren't supported. MCU_SERIES = m4 MCU_VARIANT = stm32f4 -MCU_SUB_VARIANT = stm32f405xx +MCU_SUB_VARIANT = stm32f407xx MCU_PACKAGE = 100 -CMSIS_MCU = STM32F405xx -LD_FILE = boards/STM32F405_fs.ld +CMSIS_MCU = STM32F407xx +LD_FILE = boards/STM32F407_fs.ld diff --git a/ports/stm32f4/peripherals/stm32f4/periph.h b/ports/stm32f4/peripherals/stm32f4/periph.h index ac98b8932..969a8e79b 100644 --- a/ports/stm32f4/peripherals/stm32f4/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/periph.h @@ -166,4 +166,10 @@ typedef struct { #include "stm32f405xx/periph.h" #endif +#ifdef STM32F407xx +#define HAS_DAC 1 +#define HAS_TRNG 1 +#include "stm32f407xx/periph.h" +#endif + #endif // __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PERIPH_H__ diff --git a/ports/stm32f4/peripherals/stm32f4/pins.h b/ports/stm32f4/peripherals/stm32f4/pins.h index e6a32b64e..44ef4c1ba 100644 --- a/ports/stm32f4/peripherals/stm32f4/pins.h +++ b/ports/stm32f4/peripherals/stm32f4/pins.h @@ -89,5 +89,8 @@ extern const mp_obj_type_t mcu_pin_type; #ifdef STM32F405xx #include "stm32f405xx/pins.h" #endif +#ifdef STM32F407xx +#include "stm32f407xx/pins.h" +#endif #endif // __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PINS_H__ diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f407xx/clocks.c b/ports/stm32f4/peripherals/stm32f4/stm32f407xx/clocks.c new file mode 100644 index 000000000..2afca64e8 --- /dev/null +++ b/ports/stm32f4/peripherals/stm32f4/stm32f407xx/clocks.c @@ -0,0 +1,64 @@ + +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "stm32f4xx_hal.h" +#include "py/mpconfig.h" + +void stm32f4_peripherals_clocks_init(void) { + //TODO: All parameters must be moved to board level, due to relationship with HSE Osc. + + //System clock init + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + + /* Enable Power Control clock */ + __HAL_RCC_PWR_CLK_ENABLE(); + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + /* Enable HSE Oscillator and activate PLL with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = BOARD_OSC_DIV; + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 7; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5); +} diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f407xx/gpio.c b/ports/stm32f4/peripherals/stm32f4/stm32f407xx/gpio.c new file mode 100644 index 000000000..f9be3b4ec --- /dev/null +++ b/ports/stm32f4/peripherals/stm32f4/stm32f407xx/gpio.c @@ -0,0 +1,56 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "stm32f4xx_hal.h" +#include "stm32f4/gpio.h" +#include "common-hal/microcontroller/Pin.h" + +void stm32f4_peripherals_gpio_init(void) { + //Enable all GPIO for now + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + + //Never reset pins + never_reset_pin_number(2,13); //PC13 anti tamp + never_reset_pin_number(2,14); //PC14 OSC32_IN + never_reset_pin_number(2,15); //PC15 OSC32_OUT + never_reset_pin_number(0,13); //PA13 SWDIO + never_reset_pin_number(0,14); //PA14 SWCLK + // never_reset_pin_number(0,15); //PA15 JTDI + // never_reset_pin_number(1,3); //PB3 JTDO + // never_reset_pin_number(1,4); //PB4 JTRST + + // Port H is not included in GPIO port array + // never_reset_pin_number(5,0); //PH0 JTDO + // never_reset_pin_number(5,1); //PH1 JTRST +} + +void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) { + +} + + diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f407xx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f407xx/periph.c new file mode 100644 index 000000000..bc03f7c7b --- /dev/null +++ b/ports/stm32f4/peripherals/stm32f4/stm32f407xx/periph.c @@ -0,0 +1,194 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" +#include "stm32f4/periph.h" + +// I2C + +I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3}; + +const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4] = { + I2C_SDA(1, 4, &pin_PB07), + I2C_SDA(1, 4, &pin_PB09), + I2C_SDA(2, 4, &pin_PB11), + I2C_SDA(3, 4, &pin_PC09), +}; + +const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = { + I2C_SCL(1, 4, &pin_PB06), + I2C_SCL(1, 4, &pin_PB08), + I2C_SCL(2, 4, &pin_PB10), + I2C_SCL(3, 4, &pin_PA08) +}; + +SPI_TypeDef * mcu_spi_banks[3] = {SPI1, SPI2, SPI3}; + +const mcu_spi_sck_obj_t mcu_spi_sck_list[7] = { + SPI(1, 5, &pin_PA05), + SPI(1, 5, &pin_PB03), + SPI(2, 5, &pin_PB10), + SPI(2, 5, &pin_PB13), + SPI(2, 5, &pin_PC07), + SPI(3, 6, &pin_PB03), + SPI(3, 6, &pin_PC10), +}; + +const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6] = { + SPI(1, 5, &pin_PA07), + SPI(1, 5, &pin_PB05), + SPI(2, 5, &pin_PB15), + SPI(2, 5, &pin_PC03), + SPI(3, 6, &pin_PB05), + SPI(3, 6, &pin_PC12), +}; + +const mcu_spi_miso_obj_t mcu_spi_miso_list[6] = { + SPI(1, 5, &pin_PA06), + SPI(1, 5, &pin_PB04), + SPI(2, 5, &pin_PB14), + SPI(2, 5, &pin_PC02), + SPI(3, 6, &pin_PB04), + SPI(3, 6, &pin_PC11), +}; + +const mcu_spi_nss_obj_t mcu_spi_nss_list[6] = { + SPI(1, 5, &pin_PA04), + SPI(1, 5, &pin_PA15), + SPI(2, 5, &pin_PB09), + SPI(2, 5, &pin_PB12), + SPI(3, 6, &pin_PA04), + SPI(3, 6, &pin_PA15), +}; + +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, UART4, UART5, USART6}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true}; + +const mcu_uart_tx_obj_t mcu_uart_tx_list[12] = { + UART(4, 8, &pin_PA00), + UART(2, 7, &pin_PA02), + UART(1, 7, &pin_PA09), + UART(1, 7, &pin_PB06), + UART(3, 7, &pin_PB10), + UART(6, 8, &pin_PC06), + UART(3, 7, &pin_PC10), + UART(4, 8, &pin_PC10), + UART(5, 8, &pin_PC12), + UART(2, 7, &pin_PD05), + UART(3, 7, &pin_PD08), + UART(6, 8, &pin_PG14), +}; + +const mcu_uart_rx_obj_t mcu_uart_rx_list[12] = { + UART(4, 8, &pin_PA01), + UART(2, 7, &pin_PA03), + UART(1, 7, &pin_PA10), + UART(1, 7, &pin_PB07), + UART(3, 7, &pin_PB11), + UART(6, 8, &pin_PC07), + UART(3, 7, &pin_PC11), + UART(4, 8, &pin_PC11), + UART(5, 8, &pin_PD02), + UART(2, 7, &pin_PD06), + UART(3, 7, &pin_PD09), + UART(6, 8, &pin_PG09), +}; + +//Timers +//TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins +TIM_TypeDef * mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, TIM8, TIM9, TIM10, + TIM11, TIM12, TIM13, TIM14}; + +const mcu_tim_pin_obj_t mcu_tim_pin_list[56] = { + TIM(2,1,1,&pin_PA00), + TIM(5,2,1,&pin_PA00), + TIM(2,1,2,&pin_PA01), + TIM(5,2,2,&pin_PA01), + TIM(2,1,3,&pin_PA02), + TIM(5,2,3,&pin_PA02), + TIM(2,1,4,&pin_PA03), + TIM(5,2,4,&pin_PA03), + TIM(9,3,1,&pin_PA02), + TIM(9,3,2,&pin_PA03), + TIM(3,2,1,&pin_PA06), + TIM(13,9,1,&pin_PA06), + TIM(3,2,2,&pin_PA07), + TIM(14,9,1,&pin_PA07), + TIM(1,1,1,&pin_PA08), + TIM(1,1,2,&pin_PA09), + TIM(1,1,3,&pin_PA10), + TIM(1,1,4,&pin_PA11), + TIM(2,1,1,&pin_PA15), + TIM(3,2,3,&pin_PB00), + TIM(3,2,4,&pin_PB01), + TIM(2,1,2,&pin_PB03), + TIM(3,2,1,&pin_PB04), + TIM(3,2,2,&pin_PB05), + TIM(4,2,1,&pin_PB06), + TIM(4,2,2,&pin_PB07), + TIM(4,2,3,&pin_PB08), + TIM(10,2,1,&pin_PB08), + TIM(4,2,4,&pin_PB09), + TIM(11,2,1,&pin_PB09), + TIM(2,1,3,&pin_PB10), + TIM(2,1,4,&pin_PB11), + TIM(12,9,1,&pin_PB14), + TIM(12,9,2,&pin_PB15), + TIM(3,2,1,&pin_PC06), + TIM(3,2,2,&pin_PC07), + TIM(3,2,3,&pin_PC08), + TIM(3,2,4,&pin_PC09), + TIM(8,3,1,&pin_PC06), + TIM(8,3,2,&pin_PC07), + TIM(8,3,3,&pin_PC08), + TIM(8,3,4,&pin_PC09), + TIM(4,2,1,&pin_PD12), + TIM(4,2,2,&pin_PD13), + TIM(4,2,3,&pin_PD14), + TIM(4,2,4,&pin_PD15), + TIM(9,3,1,&pin_PE05), + TIM(9,3,2,&pin_PE06), + TIM(1,1,1,&pin_PE09), + TIM(1,1,2,&pin_PE11), + TIM(1,1,3,&pin_PE13), + TIM(1,1,4,&pin_PE14), + TIM(10,3,1,&pin_PF06), + TIM(11,3,1,&pin_PF07), + TIM(13,9,1,&pin_PF08), + TIM(14,9,1,&pin_PF09), + // TIM(12,9,1,&pin_PH06), //TODO: include these when pin map is expanded + // TIM(12,9,2,&pin_PH09), + // TIM(5,2,1,&pin_PH10), + // TIM(5,2,2,&pin_PH11), + // TIM(5,2,3,&pin_PH12), + // TIM(5,2,4,&pin_PI00), + // TIM(8,3,4,&pin_PI02), + // TIM(8,3,1,&pin_PI05), + // TIM(8,3,2,&pin_PI06), + // TIM(8,3,3,&pin_PI07), +}; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f407xx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f407xx/periph.h new file mode 100644 index 000000000..e87e79857 --- /dev/null +++ b/ports/stm32f4/peripherals/stm32f4/stm32f407xx/periph.h @@ -0,0 +1,57 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H + +//I2C +extern I2C_TypeDef * mcu_i2c_banks[3]; + +extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4]; +extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4]; + +//SPI +extern SPI_TypeDef * mcu_spi_banks[3]; + +extern const mcu_spi_sck_obj_t mcu_spi_sck_list[7]; +extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6]; +extern const mcu_spi_miso_obj_t mcu_spi_miso_list[6]; +extern const mcu_spi_nss_obj_t mcu_spi_nss_list[6]; + +//UART +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; + +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[12]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; + +//Timers +#define TIM_BANK_ARRAY_LEN 14 +#define TIM_PIN_ARRAY_LEN 56 +TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; +const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H \ No newline at end of file diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f407xx/pins.c b/ports/stm32f4/peripherals/stm32f4/stm32f407xx/pins.c new file mode 100644 index 000000000..86445fe14 --- /dev/null +++ b/ports/stm32f4/peripherals/stm32f4/stm32f407xx/pins.c @@ -0,0 +1,161 @@ + /* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "stm32f4/pins.h" + +const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC); +const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC); +const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC); +const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC); +const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC); + +const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); //anti-tamp +const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); //OSC32_IN +const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT + +const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF03 = PIN(5, 3, ADC_INPUT(ADC_3,9)); // 144 only +const mcu_pin_obj_t pin_PF04 = PIN(5, 4, ADC_INPUT(ADC_3,14)); // 144 only +const mcu_pin_obj_t pin_PF05 = PIN(5, 5, ADC_INPUT(ADC_3,15)); // 144 only +const mcu_pin_obj_t pin_PF06 = PIN(5, 6, ADC_INPUT(ADC_3,4)); // 144 only +const mcu_pin_obj_t pin_PF07 = PIN(5, 7, ADC_INPUT(ADC_3,5)); // 144 only +const mcu_pin_obj_t pin_PF08 = PIN(5, 8, ADC_INPUT(ADC_3,6)); // 144 only +const mcu_pin_obj_t pin_PF09 = PIN(5, 9, ADC_INPUT(ADC_3,7)); // 144 only +const mcu_pin_obj_t pin_PF10 = PIN(5, 10, ADC_INPUT(ADC_3,8)); // 144 only + +const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_123,10)); +const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_123,11)); +const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_123,12)); +const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_123,13)); + +const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_123,0)); +const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_123,1)); +const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_123,2)); +const mcu_pin_obj_t pin_PA03 = PIN(0, 3, ADC_INPUT(ADC_123,3)); +const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_12,4)); +const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_12,5)); +const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_12,6)); +const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_12,7)); + +const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_12,14)); +const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_12,15)); + +const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_12,8)); +const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_12,9)); +const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); //BOOT1 + +const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF13 = PIN(5, 13, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF14 = PIN(5, 14, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PF15 = PIN(5, 15, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PG00 = PIN(6, 0, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG01 = PIN(6, 1, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC); +const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC); +const mcu_pin_obj_t pin_PE09 = PIN(4, 9, NO_ADC); +const mcu_pin_obj_t pin_PE10 = PIN(4, 10, NO_ADC); +const mcu_pin_obj_t pin_PE11 = PIN(4, 11, NO_ADC); +const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC); +const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC); +const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC); +const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC); + +const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC); +const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC); +const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC); +const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC); +const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC); +const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC); + +const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC); +const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC); +const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC); +const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC); +const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC); +const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC); +const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC); +const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC); + +const mcu_pin_obj_t pin_PG02 = PIN(6, 2, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG03 = PIN(6, 3, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG04 = PIN(6, 4, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG05 = PIN(6, 5, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG06 = PIN(6, 6, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG07 = PIN(6, 7, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG08 = PIN(6, 8, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC); +const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC); +const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC); +const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC); + +const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC); +const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC); +const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC); +const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC); +const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC); +const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC); +const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC); +const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC); + +const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC); +const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC); +const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC); + +const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC); +const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC); +const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC); +const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC); +const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC); +const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC); +const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC); +const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC); + +const mcu_pin_obj_t pin_PG09 = PIN(6, 9, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG10 = PIN(6, 10, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG11 = PIN(6, 11, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG12 = PIN(6, 12, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG13 = PIN(6, 13, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG14 = PIN(6, 14, NO_ADC); // 144 only +const mcu_pin_obj_t pin_PG15 = PIN(6, 15, NO_ADC); // 144 only + +const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC); +const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC); +const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC); +const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC); +const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC); +const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC); +const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC); + +const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC); +const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC); diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f407xx/pins.h b/ports/stm32f4/peripherals/stm32f4/stm32f407xx/pins.h new file mode 100644 index 000000000..180f5c316 --- /dev/null +++ b/ports/stm32f4/peripherals/stm32f4/stm32f407xx/pins.h @@ -0,0 +1,158 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H +#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H + +//Pins in datasheet order: DocID028087 Rev 7 page 50. LQFP100 only +//pg 50 +extern const mcu_pin_obj_t pin_PE02; +extern const mcu_pin_obj_t pin_PE03; +extern const mcu_pin_obj_t pin_PE04; +extern const mcu_pin_obj_t pin_PE05; +extern const mcu_pin_obj_t pin_PE06; +extern const mcu_pin_obj_t pin_PC13; +extern const mcu_pin_obj_t pin_PC14; +//pg 51 +extern const mcu_pin_obj_t pin_PC15; +extern const mcu_pin_obj_t pin_PF00; // 144 only +extern const mcu_pin_obj_t pin_PF01; // 144 only +extern const mcu_pin_obj_t pin_PF02; // 144 only +extern const mcu_pin_obj_t pin_PF03; // 144 only +extern const mcu_pin_obj_t pin_PF04; // 144 only +extern const mcu_pin_obj_t pin_PF05; // 144 only +extern const mcu_pin_obj_t pin_PF06; // 144 only +extern const mcu_pin_obj_t pin_PF07; // 144 only +extern const mcu_pin_obj_t pin_PF08; // 144 only +extern const mcu_pin_obj_t pin_PF09; // 144 only +extern const mcu_pin_obj_t pin_PF10; // 144 only +//pg 52 +extern const mcu_pin_obj_t pin_PC00; +extern const mcu_pin_obj_t pin_PC01; +extern const mcu_pin_obj_t pin_PC02; +extern const mcu_pin_obj_t pin_PC03; +extern const mcu_pin_obj_t pin_PA00; +extern const mcu_pin_obj_t pin_PA01; +extern const mcu_pin_obj_t pin_PA02; +//pg 53 +extern const mcu_pin_obj_t pin_PA03; +extern const mcu_pin_obj_t pin_PA04; +extern const mcu_pin_obj_t pin_PA05; +extern const mcu_pin_obj_t pin_PA06; +extern const mcu_pin_obj_t pin_PA07; +extern const mcu_pin_obj_t pin_PC04; +//pg 54 +extern const mcu_pin_obj_t pin_PC05; +extern const mcu_pin_obj_t pin_PB00; +extern const mcu_pin_obj_t pin_PB01; +extern const mcu_pin_obj_t pin_PB02; +extern const mcu_pin_obj_t pin_PF11; // 144 only +extern const mcu_pin_obj_t pin_PF12; // 144 only +extern const mcu_pin_obj_t pin_PF13; // 144 only +extern const mcu_pin_obj_t pin_PF14; // 144 only +extern const mcu_pin_obj_t pin_PF15; // 144 only +extern const mcu_pin_obj_t pin_PG00; // 144 only +extern const mcu_pin_obj_t pin_PG01; // 144 only +//pg 55 +extern const mcu_pin_obj_t pin_PE07; +extern const mcu_pin_obj_t pin_PE08; +extern const mcu_pin_obj_t pin_PE09; +extern const mcu_pin_obj_t pin_PE10; +extern const mcu_pin_obj_t pin_PE11; +extern const mcu_pin_obj_t pin_PE12; +extern const mcu_pin_obj_t pin_PE13; +extern const mcu_pin_obj_t pin_PE14; +//pg 56 +extern const mcu_pin_obj_t pin_PE15; +extern const mcu_pin_obj_t pin_PB10; +extern const mcu_pin_obj_t pin_PB11; // 144 only +extern const mcu_pin_obj_t pin_PB12; +extern const mcu_pin_obj_t pin_PB13; +//pg 57 +extern const mcu_pin_obj_t pin_PB14; +extern const mcu_pin_obj_t pin_PB15; +extern const mcu_pin_obj_t pin_PD08; +extern const mcu_pin_obj_t pin_PD09; +extern const mcu_pin_obj_t pin_PD10; +extern const mcu_pin_obj_t pin_PD11; +extern const mcu_pin_obj_t pin_PD12; +//pg 58 +extern const mcu_pin_obj_t pin_PD13; +extern const mcu_pin_obj_t pin_PD14; +extern const mcu_pin_obj_t pin_PD15; +extern const mcu_pin_obj_t pin_PG02; // 144 only +extern const mcu_pin_obj_t pin_PG03; // 144 only +extern const mcu_pin_obj_t pin_PG04; // 144 only +extern const mcu_pin_obj_t pin_PG05; // 144 only +extern const mcu_pin_obj_t pin_PG06; // 144 only +extern const mcu_pin_obj_t pin_PG07; // 144 only +extern const mcu_pin_obj_t pin_PG08; // 144 only +//pg 59 +extern const mcu_pin_obj_t pin_PC06; +extern const mcu_pin_obj_t pin_PC07; +extern const mcu_pin_obj_t pin_PC08; +extern const mcu_pin_obj_t pin_PC09; +extern const mcu_pin_obj_t pin_PA08; +extern const mcu_pin_obj_t pin_PA09; +extern const mcu_pin_obj_t pin_PA10; +//pg 60 +extern const mcu_pin_obj_t pin_PA11; +extern const mcu_pin_obj_t pin_PA12; +extern const mcu_pin_obj_t pin_PA13; +extern const mcu_pin_obj_t pin_PA14; +extern const mcu_pin_obj_t pin_PA15; +extern const mcu_pin_obj_t pin_PC10; +extern const mcu_pin_obj_t pin_PC11; +//pg 61 +extern const mcu_pin_obj_t pin_PC12; +extern const mcu_pin_obj_t pin_PD00; +extern const mcu_pin_obj_t pin_PD01; +extern const mcu_pin_obj_t pin_PD02; +extern const mcu_pin_obj_t pin_PD03; +extern const mcu_pin_obj_t pin_PD04; +extern const mcu_pin_obj_t pin_PD05; +extern const mcu_pin_obj_t pin_PD06; +extern const mcu_pin_obj_t pin_PD07; +//pg 62 +extern const mcu_pin_obj_t pin_PG09; // 144 only +extern const mcu_pin_obj_t pin_PG10; // 144 only +extern const mcu_pin_obj_t pin_PG11; // 144 only +extern const mcu_pin_obj_t pin_PG12; // 144 only +extern const mcu_pin_obj_t pin_PG13; // 144 only +extern const mcu_pin_obj_t pin_PG14; // 144 only +extern const mcu_pin_obj_t pin_PG15; // 144 only +extern const mcu_pin_obj_t pin_PB03; +extern const mcu_pin_obj_t pin_PB04; +//pg 63 +extern const mcu_pin_obj_t pin_PB05; +extern const mcu_pin_obj_t pin_PB06; +extern const mcu_pin_obj_t pin_PB07; +extern const mcu_pin_obj_t pin_PB08; +extern const mcu_pin_obj_t pin_PB09; +extern const mcu_pin_obj_t pin_PE00; +extern const mcu_pin_obj_t pin_PE01; + +#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F412ZG_PINS_H diff --git a/ports/stm32f4/supervisor/internal_flash.h b/ports/stm32f4/supervisor/internal_flash.h index 8991fb8aa..9f16a799d 100644 --- a/ports/stm32f4/supervisor/internal_flash.h +++ b/ports/stm32f4/supervisor/internal_flash.h @@ -52,6 +52,11 @@ #define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB #endif +#ifdef STM32F407xx +#define STM32_FLASH_SIZE 0x100000 //1MB +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB +#endif + #define STM32_FLASH_OFFSET 0x8000000 //All STM32 chips map to this flash location #define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000 -- cgit v1.2.3 From f3e4fbd7bacf609292fdf49e3fa7f70b97e81bac Mon Sep 17 00:00:00 2001 From: Dave Marples Date: Tue, 11 Feb 2020 23:01:08 +0000 Subject: Add directly loadable binary target --- ports/mimxrt10xx/Makefile | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile index 66a540a40..9303089f9 100644 --- a/ports/mimxrt10xx/Makefile +++ b/ports/mimxrt10xx/Makefile @@ -220,7 +220,7 @@ OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) -all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 $(BUILD)/firmware.hex +all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 $(BUILD)/firmware.hex $(BUILD)/firmware-bootable.bin $(BUILD)/firmware.elf: $(OBJ) $(LD_FILES) $(STEPECHO) "LINK $@" @@ -237,6 +237,10 @@ $(BUILD)/firmware.uf2: $(BUILD)/firmware.bin $(BUILD)/firmware.hex: $(BUILD)/firmware.elf $(Q)$(OBJCOPY) -O ihex -j .flash_config -j .ivt -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $< $@ +$(BUILD)/firmware-bootable.bin: $(BUILD)/firmware.elf + $(STEPECHO) "Create $@" + $(Q)$(OBJCOPY) -O binary -j .flash_config -j .ivt -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $< $@ + include $(TOP)/py/mkrules.mk # Print out the value of a make variable. -- cgit v1.2.3 From 2e029d55fc0396a33fcf8ac73124f571aea34eee Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Tue, 11 Feb 2020 19:19:31 -0500 Subject: nrf: add SPIM3 support --- locale/circuitpython.pot | 2 +- ports/nrf/boards/common.template.ld | 8 ++++- ports/nrf/common-hal/busio/SPI.c | 72 ++++++++++++++++++++++++++++--------- ports/nrf/common-hal/busio/SPI.h | 2 +- ports/nrf/nrfx_config.h | 18 +++++----- shared-bindings/busio/SPI.c | 7 ++++ 6 files changed, 79 insertions(+), 30 deletions(-) (limited to 'ports') diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 3e4413068..1a378e331 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-02-07 10:02-0500\n" +"POT-Creation-Date: 2020-02-11 19:18-0500\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" diff --git a/ports/nrf/boards/common.template.ld b/ports/nrf/boards/common.template.ld index 607a1dc93..427b6b35b 100644 --- a/ports/nrf/boards/common.template.ld +++ b/ports/nrf/boards/common.template.ld @@ -22,7 +22,9 @@ MEMORY /* SoftDevice 6.1.0 with 5 connections and various increases takes just under 64kiB. /* To measure the minimum required amount of memory for given configuration, set this number high enough to work and then check the mutation of the value done by sd_ble_enable. */ - RAM (xrw) : ORIGIN = 0x20000000 + 64K, LENGTH = 256K - 64K + SPIM3_RAM (rw) : ORIGIN = 0x20000000 + 64K, LENGTH = 8K + RAM (xrw) : ORIGIN = 0x20000000 + 64K + 8K, LENGTH = 256K - 64K -8K + } /* produce a link error if there is not this amount of RAM available */ @@ -37,6 +39,10 @@ _estack = ORIGIN(RAM) + LENGTH(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); _heap_end = 0x20020000; /* tunable */ +/* nrf52840 SPIM3 needs its own area to work around hardware problems. Nothing else may use this space. */ +_spim3_ram = ORIGIN(SPIM3_RAM); +_spim3_ram_end = ORIGIN(SPIM3_RAM) + LENGTH(RAM); + /* define output sections */ SECTIONS { diff --git a/ports/nrf/common-hal/busio/SPI.c b/ports/nrf/common-hal/busio/SPI.c index 8e1d73bf0..fe943a221 100644 --- a/ports/nrf/common-hal/busio/SPI.c +++ b/ports/nrf/common-hal/busio/SPI.c @@ -22,6 +22,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include + #include "shared-bindings/busio/SPI.h" #include "py/mperrno.h" #include "py/runtime.h" @@ -29,33 +31,34 @@ #include "nrfx_spim.h" #include "nrf_gpio.h" +// These are in order from ighest available frequency to lowest (32MHz first, then 8MHz). STATIC spim_peripheral_t spim_peripherals[] = { #if NRFX_CHECK(NRFX_SPIM3_ENABLED) // SPIM3 exists only on nRF52840 and supports 32MHz max. All other SPIM's are only 8MHz max. // Allocate SPIM3 first. { .spim = NRFX_SPIM_INSTANCE(3), - .max_frequency_MHz = 32, + .max_frequency = 32000000, .max_xfer_size = SPIM3_EASYDMA_MAXCNT_SIZE, }, #endif #if NRFX_CHECK(NRFX_SPIM2_ENABLED) // SPIM2 is not shared with a TWIM, so allocate before the shared ones. { .spim = NRFX_SPIM_INSTANCE(2), - .max_frequency_MHz = 8, + .max_frequency = 8000000, .max_xfer_size = SPIM2_EASYDMA_MAXCNT_SIZE, }, #endif #if NRFX_CHECK(NRFX_SPIM1_ENABLED) // SPIM1 and TWIM1 share an address. { .spim = NRFX_SPIM_INSTANCE(1), - .max_frequency_MHz = 8, + .max_frequency = 8000000, .max_xfer_size = SPIM1_EASYDMA_MAXCNT_SIZE, }, #endif #if NRFX_CHECK(NRFX_SPIM0_ENABLED) // SPIM0 and TWIM0 share an address. { .spim = NRFX_SPIM_INSTANCE(0), - .max_frequency_MHz = 8, + .max_frequency = 8000000, .max_xfer_size = SPIM0_EASYDMA_MAXCNT_SIZE, }, #endif @@ -63,6 +66,11 @@ STATIC spim_peripheral_t spim_peripherals[] = { STATIC bool never_reset[MP_ARRAY_SIZE(spim_peripherals)]; +// Separate RAM area for SPIM3 transmit buffer to avoid SPIM3 hardware errata. +// https://infocenter.nordicsemi.com/index.jsp?topic=%2Ferrata_nRF52840_Rev2%2FERR%2FnRF52840%2FRev2%2Flatest%2Fanomaly_840_198.html +extern uint32_t _spim3_ram; +STATIC uint8_t *spim3_transmit_buffer = (uint8_t *) &_spim3_ram; + void spi_reset(void) { for (size_t i = 0 ; i < MP_ARRAY_SIZE(spim_peripherals); i++) { if (never_reset[i]) { @@ -122,7 +130,7 @@ static nrf_spim_frequency_t baudrate_to_spim_frequency(const uint32_t baudrate) } void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) { - // Find a free instance. + // Find a free instance, with most desirable (highest freq and not shared) allocated first. self->spim_peripheral = NULL; for (size_t i = 0 ; i < MP_ARRAY_SIZE(spim_peripherals); i++) { if ((spim_peripherals[i].spim.p_reg->ENABLE & SPIM_ENABLE_ENABLE_Msk) == 0) { @@ -137,7 +145,8 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * nrfx_spim_config_t config = NRFX_SPIM_DEFAULT_CONFIG(NRFX_SPIM_PIN_NOT_USED, NRFX_SPIM_PIN_NOT_USED, NRFX_SPIM_PIN_NOT_USED, NRFX_SPIM_PIN_NOT_USED); - config.frequency = NRF_SPIM_FREQ_8M; + + config.frequency = baudrate_to_spim_frequency(self->spim_peripheral->max_frequency); config.sck_pin = clock->number; self->clock_pin_number = clock->number; @@ -189,8 +198,7 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, ui // Set desired frequency, rounding down, and don't go above available frequency for this SPIM. nrf_spim_frequency_set(self->spim_peripheral->spim.p_reg, - baudrate_to_spim_frequency(MIN(baudrate, - self->spim_peripheral->max_frequency_MHz * 1000000))); + baudrate_to_spim_frequency(MIN(baudrate, self->spim_peripheral->max_frequency))); nrf_spim_mode_t mode = NRF_SPIM_MODE_0; if (polarity) { @@ -224,21 +232,36 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { } bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { - if (len == 0) + if (len == 0) { return true; + } + + const bool is_spim3 = self->spim_peripheral->spim.p_reg == NRF_SPIM3; const uint32_t max_xfer_size = self->spim_peripheral->max_xfer_size; const uint32_t parts = len / max_xfer_size; const uint32_t remainder = len % max_xfer_size; for (uint32_t i = 0; i < parts; ++i) { - const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_TX(data + i * max_xfer_size, max_xfer_size); + uint8_t *start = (uint8_t *) (data + i * max_xfer_size); + if (is_spim3) { + // If SPIM3, copy into unused RAM block, and do DMA from there. + memcpy(spim3_transmit_buffer, start, max_xfer_size); + start = spim3_transmit_buffer; + } + const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_TX(start, max_xfer_size); if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) return false; } if (remainder > 0) { - const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_TX(data + parts * max_xfer_size, remainder); + uint8_t *start = (uint8_t *) (data + parts * max_xfer_size); + if (is_spim3) { + // If SPIM3, copy into unused RAM block, and do DMA from there. + memcpy(spim3_transmit_buffer, start, remainder); + start = spim3_transmit_buffer; + } + const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_TX(start, remainder); if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) return false; } @@ -247,8 +270,9 @@ bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size } bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { - if (len == 0) + if (len == 0) { return true; + } const uint32_t max_xfer_size = self->spim_peripheral->max_xfer_size; const uint32_t parts = len / max_xfer_size; @@ -270,23 +294,37 @@ bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, } bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { - if (len == 0) + if (len == 0) { return true; + } + const bool is_spim3 = self->spim_peripheral->spim.p_reg == NRF_SPIM3; const uint32_t max_xfer_size = self->spim_peripheral->max_xfer_size; const uint32_t parts = len / max_xfer_size; const uint32_t remainder = len % max_xfer_size; for (uint32_t i = 0; i < parts; ++i) { - const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_SINGLE_XFER(data_out + i * max_xfer_size, max_xfer_size, + uint8_t *out_start = (uint8_t *) (data_out + i * max_xfer_size); + if (is_spim3) { + // If SPIM3, copy into unused RAM block, and do DMA from there. + memcpy(spim3_transmit_buffer, out_start, max_xfer_size); + out_start = spim3_transmit_buffer; + } + const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_SINGLE_XFER(out_start, max_xfer_size, data_in + i * max_xfer_size, max_xfer_size); if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) return false; } if (remainder > 0) { - const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_SINGLE_XFER(data_out + parts * max_xfer_size, remainder, + uint8_t *out_start = (uint8_t *) (data_out + parts * max_xfer_size); + if (is_spim3) { + // If SPIM3, copy into unused RAM block, and do DMA from there. + memcpy(spim3_transmit_buffer, out_start, remainder); + out_start = spim3_transmit_buffer; + } + const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_SINGLE_XFER(out_start, remainder, data_in + parts * max_xfer_size, remainder); if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) return false; @@ -325,9 +363,9 @@ uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { } uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { - return 0; + return (self->spim_peripheral->spim.p_reg->CONFIG & SPIM_CONFIG_CPHA_Msk) >> SPIM_CONFIG_CPHA_Pos; } uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { - return 0; + return (self->spim_peripheral->spim.p_reg->CONFIG & SPIM_CONFIG_CPOL_Msk) >> SPIM_CONFIG_CPOL_Pos; } diff --git a/ports/nrf/common-hal/busio/SPI.h b/ports/nrf/common-hal/busio/SPI.h index 1b0de8acf..738a1de78 100644 --- a/ports/nrf/common-hal/busio/SPI.h +++ b/ports/nrf/common-hal/busio/SPI.h @@ -32,7 +32,7 @@ typedef struct { nrfx_spim_t spim; - uint8_t max_frequency_MHz; + uint32_t max_frequency; uint8_t max_xfer_size; } spim_peripheral_t; diff --git a/ports/nrf/nrfx_config.h b/ports/nrf/nrfx_config.h index 82f6514df..e37c60934 100644 --- a/ports/nrf/nrfx_config.h +++ b/ports/nrf/nrfx_config.h @@ -26,10 +26,9 @@ // CIRCUITPY_NRF_NUM_I2C is 1 or 2 to choose how many I2C (TWIM) peripherals // to provide. -// This can go away once we have SPIM3 working: then we can have two -// I2C and two SPI. +// With SPIM3 working we can have two I2C and two SPI. #ifndef CIRCUITPY_NRF_NUM_I2C -#define CIRCUITPY_NRF_NUM_I2C 1 +#define CIRCUITPY_NRF_NUM_I2C 2 #endif #if CIRCUITPY_NRF_NUM_I2C != 1 && CIRCUITPY_NRF_NUM_I2C != 2 @@ -42,13 +41,12 @@ #define NRFX_SPIM1_ENABLED 1 #endif #define NRFX_SPIM2_ENABLED 1 -// DON'T ENABLE SPIM3 DUE TO ANOMALY WORKAROUND FAILURE (SEE ABOVE). -// #ifdef NRF52840_XXAA -// #define NRFX_SPIM_EXTENDED_ENABLED 1 -// #define NRFX_SPIM3_ENABLED 1 -// #else -// #define NRFX_SPIM3_ENABLED 0 -// #endif +#ifdef NRF52840_XXAA + #define NRFX_SPIM_EXTENDED_ENABLED 1 + #define NRFX_SPIM3_ENABLED 1 +#else + #define NRFX_SPIM3_ENABLED 0 +#endif #define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 7 diff --git a/shared-bindings/busio/SPI.c b/shared-bindings/busio/SPI.c index d1791bef3..2ae312a35 100644 --- a/shared-bindings/busio/SPI.c +++ b/shared-bindings/busio/SPI.c @@ -56,6 +56,13 @@ //| .. class:: SPI(clock, MOSI=None, MISO=None) //| //| Construct an SPI object on the given pins. + +//| ..note:: The SPI peripherals allocated in order of desirability, if possible, +//| such as highest speed and not shared use first. For instance, on the nRF52840, +//| there is a single 32MHz SPI peripheral, and multiple 8MHz peripherals, +//| some of which may also be used for I2C. The 32MHz SPI peripheral is returned +//| first, then the exclusive 8MHz SPI peripheral, and finally the shared 8MHz +//| peripherals. //| //| .. seealso:: Using this class directly requires careful lock management. //| Instead, use :class:`~adafruit_bus_device.spi_device.SPIDevice` to -- cgit v1.2.3 From d0870ce484e2f340b4816bfc3636ce4679d983ea Mon Sep 17 00:00:00 2001 From: Dave Marples Date: Wed, 12 Feb 2020 09:03:11 +0000 Subject: Update main .bin output file to be bootable artefact --- ports/mimxrt10xx/Makefile | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) (limited to 'ports') diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile index 9303089f9..80d1da1aa 100644 --- a/ports/mimxrt10xx/Makefile +++ b/ports/mimxrt10xx/Makefile @@ -220,7 +220,7 @@ OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) -all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 $(BUILD)/firmware.hex $(BUILD)/firmware-bootable.bin +all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 $(BUILD)/firmware.hex $(BUILD)/firmware.elf: $(OBJ) $(LD_FILES) $(STEPECHO) "LINK $@" @@ -228,19 +228,17 @@ $(BUILD)/firmware.elf: $(OBJ) $(LD_FILES) $(BUILD)/firmware.bin: $(BUILD)/firmware.elf $(STEPECHO) "Create $@" - $(Q)$(OBJCOPY) -O binary -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $^ $@ + $(Q)$(OBJCOPY) -O binary -j .flash_config -j .ivt -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $^ $@ -$(BUILD)/firmware.uf2: $(BUILD)/firmware.bin +$(BUILD)/firmware.uf2: $(BUILD)/firmware.elf $(STEPECHO) "Create $@" - $(Q)$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -b $(BOOTLOADER_SIZE) -f MIMXRT10XX -c -o $@ $^ + $(Q)$(OBJCOPY) -O binary -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $^ $@-binpart + $(Q)$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -b $(BOOTLOADER_SIZE) -f MIMXRT10XX -c -o $@ $@-binpart + $(Q)rm $@-binpart $(BUILD)/firmware.hex: $(BUILD)/firmware.elf $(Q)$(OBJCOPY) -O ihex -j .flash_config -j .ivt -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $< $@ -$(BUILD)/firmware-bootable.bin: $(BUILD)/firmware.elf - $(STEPECHO) "Create $@" - $(Q)$(OBJCOPY) -O binary -j .flash_config -j .ivt -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $< $@ - include $(TOP)/py/mkrules.mk # Print out the value of a make variable. -- cgit v1.2.3 From 7831c475b9f38d8db8e2b8b62bc110f99185b8cb Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 12 Feb 2020 14:30:29 -0500 Subject: change flag styling --- ports/stm32f4/boards/espruino_pico/mpconfigboard.h | 4 ++-- ports/stm32f4/boards/espruino_wifi/mpconfigboard.h | 4 ++-- .../boards/feather_stm32f405_express/mpconfigboard.h | 2 +- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 8 ++++---- ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h | 6 +++--- ports/stm32f4/boards/pyboard_v11/mpconfigboard.h | 1 - ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h | 8 ++++---- ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.h | 2 +- ports/stm32f4/mpconfigport.h | 14 ++++++++++++++ ports/stm32f4/peripherals/stm32f4/stm32f411xe/gpio.c | 2 +- ports/stm32f4/supervisor/usb.c | 2 +- ports/stm32f4/system_stm32f4xx.c | 2 +- shared-module/displayio/__init__.c | 2 +- 13 files changed, 35 insertions(+), 22 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/espruino_pico/mpconfigboard.h b/ports/stm32f4/boards/espruino_pico/mpconfigboard.h index aa179c793..d4430380c 100644 --- a/ports/stm32f4/boards/espruino_pico/mpconfigboard.h +++ b/ports/stm32f4/boards/espruino_pico/mpconfigboard.h @@ -32,8 +32,8 @@ #define FLASH_SIZE (0x60000) #define FLASH_PAGE_SIZE (0x4000) -#define AUTORESET_DELAY_MS 500 +#define AUTORESET_DELAY_MS (500) #define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) -#define BOARD_OSC_DIV 8 +#define BOARD_OSC_DIV (8) diff --git a/ports/stm32f4/boards/espruino_wifi/mpconfigboard.h b/ports/stm32f4/boards/espruino_wifi/mpconfigboard.h index 611a41d93..abdc9e8fa 100644 --- a/ports/stm32f4/boards/espruino_wifi/mpconfigboard.h +++ b/ports/stm32f4/boards/espruino_wifi/mpconfigboard.h @@ -32,5 +32,5 @@ #define FLASH_SIZE (0x80000) //512K #define FLASH_PAGE_SIZE (0x4000) //16K -#define BOARD_OSC_DIV 8 -#define BOARD_OVERWRITE_SWD +#define BOARD_OSC_DIV (8) +#define BOARD_OVERWRITE_SWD (1) diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h index ad9bba7b0..4670b9893 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h @@ -42,7 +42,7 @@ // Bootloader only #ifdef UF2_BOOTLOADER_ENABLED - #define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader + #define BOARD_VTOR_DEFER (1) //Leave VTOR relocation to bootloader #endif #define DEFAULT_I2C_BUS_SCL (&pin_PB06) diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index c849e03b6..70ae866fe 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -35,10 +35,10 @@ #define AUTORESET_DELAY_MS 500 #define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) -#define BOARD_OSC_DIV 12 -#define BOARD_NO_VBUS_SENSE -#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader -#define BOARD_USE_INTERNAL_SPI +#define BOARD_OSC_DIV (12) +#define BOARD_NO_VBUS_SENSE (1) +#define BOARD_VTOR_DEFER (1) //Leave VTOR relocation to bootloader +#define BOARD_USE_INTERNAL_SPI (1) // On-board flash #define SPI_FLASH_MOSI_PIN (&pin_PB15) diff --git a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h index 7980ca93d..965e7d5ff 100644 --- a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h +++ b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h @@ -32,7 +32,7 @@ #define FLASH_SIZE (0x80000) #define FLASH_PAGE_SIZE (0x4000) -#define BOARD_OSC_DIV 8 +#define BOARD_OSC_DIV (8) // On-board flash #define SPI_FLASH_MOSI_PIN (&pin_PB15) @@ -40,8 +40,8 @@ #define SPI_FLASH_SCK_PIN (&pin_PB13) #define SPI_FLASH_CS_PIN (&pin_PB12) -#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 +#define CIRCUITPY_AUTORELOAD_DELAY_MS (500) #define BOARD_FLASH_SIZE (FLASH_SIZE - 0x2000 - 0xC000) -#define AUTORESET_DELAY_MS 500 +#define AUTORESET_DELAY_MS (500) diff --git a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.h b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.h index 7093442d0..b48a775ae 100644 --- a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.h +++ b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.h @@ -32,6 +32,5 @@ #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (0x4000) - #define DEFAULT_I2C_BUS_SCL (&pin_PB06) #define DEFAULT_I2C_BUS_SDA (&pin_PB07) diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h index 05e2a384a..2ae1a2926 100644 --- a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h +++ b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h @@ -32,8 +32,8 @@ #define FLASH_SIZE (0x80000) #define FLASH_PAGE_SIZE (0x4000) -#define BOARD_OSC_DIV 25 -#define BOARD_NO_VBUS_SENSE +#define BOARD_OSC_DIV (25) +#define BOARD_NO_VBUS_SENSE (1) // On-board flash // #define SPI_FLASH_MOSI_PIN (&pin_PA07) @@ -41,8 +41,8 @@ // #define SPI_FLASH_SCK_PIN (&pin_PA05) // #define SPI_FLASH_CS_PIN (&pin_PA04) -#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 +#define CIRCUITPY_AUTORELOAD_DELAY_MS (500) #define BOARD_FLASH_SIZE (FLASH_SIZE - 0x2000 - 0xC000) -#define AUTORESET_DELAY_MS 500 +#define AUTORESET_DELAY_MS (500) diff --git a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.h b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.h index 7a5335407..49ef80cdd 100644 --- a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.h +++ b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.h @@ -32,4 +32,4 @@ #define FLASH_SIZE (0x80000) //512K #define FLASH_PAGE_SIZE (0x4000) //16K -#define BOARD_OSC_DIV 8 +#define BOARD_OSC_DIV (8) diff --git a/ports/stm32f4/mpconfigport.h b/ports/stm32f4/mpconfigport.h index 7737bda8d..931a56ed2 100644 --- a/ports/stm32f4/mpconfigport.h +++ b/ports/stm32f4/mpconfigport.h @@ -37,6 +37,20 @@ // 24kiB stack #define CIRCUITPY_DEFAULT_STACK_SIZE 0x6000 +//Board flags: +#ifndef BOARD_OVERWRITE_SWD +#define BOARD_OVERWRITE_SWD (0) +#endif +#ifndef BOARD_VTOR_DEFER +#define BOARD_VTOR_DEFER (0) +#endif +#ifndef BOARD_NO_VBUS_SENSE +#define BOARD_NO_VBUS_SENSE (0) +#endif +#ifndef BOARD_USE_INTERNAL_SPI +#define BOARD_USE_INTERNAL_SPI (0) +#endif + #include "py/circuitpy_mpconfig.h" #define MAX_UART 10 //how many UART are implemented diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/gpio.c b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/gpio.c index 77888c465..aee0bd5eb 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/gpio.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/gpio.c @@ -42,7 +42,7 @@ void stm32f4_peripherals_gpio_init(void) { never_reset_pin_number(2,14); //PC14 OSC32_IN never_reset_pin_number(2,15); //PC15 OSC32_OUT - #if !defined(BOARD_OVERWRITE_SWD) + #if !(BOARD_OVERWRITE_SWD) never_reset_pin_number(0,13); //PA13 SWDIO never_reset_pin_number(0,14); //PA14 SWCLK #endif diff --git a/ports/stm32f4/supervisor/usb.c b/ports/stm32f4/supervisor/usb.c index afafe26a9..358c2de5b 100644 --- a/ports/stm32f4/supervisor/usb.c +++ b/ports/stm32f4/supervisor/usb.c @@ -38,7 +38,7 @@ STATIC void init_usb_vbus_sense(void) { -#ifdef BOARD_NO_VBUS_SENSE +#if (BOARD_NO_VBUS_SENSE) // Disable VBUS sensing #ifdef USB_OTG_GCCFG_VBDEN USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN; diff --git a/ports/stm32f4/system_stm32f4xx.c b/ports/stm32f4/system_stm32f4xx.c index bce420056..caa4f9caf 100644 --- a/ports/stm32f4/system_stm32f4xx.c +++ b/ports/stm32f4/system_stm32f4xx.c @@ -218,7 +218,7 @@ void SystemInit(void) #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ /* Configure the Vector Table location add offset address ------------------*/ -#if !defined(BOARD_VTOR_DEFER) //only set VTOR if the bootloader hasn't already +#if !(BOARD_VTOR_DEFER) //only set VTOR if the bootloader hasn't already #ifdef VECT_TAB_SRAM SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #else diff --git a/shared-module/displayio/__init__.c b/shared-module/displayio/__init__.c index efa61265e..daf7a2046 100644 --- a/shared-module/displayio/__init__.c +++ b/shared-module/displayio/__init__.c @@ -103,7 +103,7 @@ void reset_displays(void) { continue; } #endif - #ifdef BOARD_USE_INTERNAL_SPI + #if (BOARD_USE_INTERNAL_SPI) if (original_spi == (mp_obj_t)(&supervisor_flash_spi_bus)) { continue; } -- cgit v1.2.3 From b248486c3b9e2eca9b9fd3c43e4f3dc7fdaa0779 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 12 Feb 2020 14:32:50 -0500 Subject: cleanup flag changes --- ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h | 2 +- ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h | 2 +- ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h index 1ae951874..6600fcf67 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h +++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h @@ -34,7 +34,7 @@ #define MICROPY_HW_NEOPIXEL (&pin_PC00) -#define BOARD_OSC_DIV 12 +#define BOARD_OSC_DIV (12) // On-board flash #define SPI_FLASH_MOSI_PIN (&pin_PB05) diff --git a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h index b6d28cb12..f34b830fb 100644 --- a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h +++ b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.h @@ -32,7 +32,7 @@ #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (0x4000) -#define BOARD_OSC_DIV 8 +#define BOARD_OSC_DIV (8) #define DEFAULT_I2C_BUS_SCL (&pin_PB10) #define DEFAULT_I2C_BUS_SDA (&pin_PB09) diff --git a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h index c51fa2e04..fcd7aa09c 100644 --- a/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h +++ b/ports/stm32f4/boards/stm32f4_discovery/mpconfigboard.h @@ -32,4 +32,4 @@ #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (0x4000) -#define BOARD_OSC_DIV 8 +#define BOARD_OSC_DIV (8) -- cgit v1.2.3 From 6d91ed21563bd72938d7e5e6aa5d23265429d56f Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 12 Feb 2020 14:38:27 -0500 Subject: move defaults to avoid conflict --- ports/stm32f4/mpconfigport.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/mpconfigport.h b/ports/stm32f4/mpconfigport.h index 931a56ed2..2e1af47ec 100644 --- a/ports/stm32f4/mpconfigport.h +++ b/ports/stm32f4/mpconfigport.h @@ -37,6 +37,8 @@ // 24kiB stack #define CIRCUITPY_DEFAULT_STACK_SIZE 0x6000 +#include "py/circuitpy_mpconfig.h" + //Board flags: #ifndef BOARD_OVERWRITE_SWD #define BOARD_OVERWRITE_SWD (0) @@ -51,8 +53,6 @@ #define BOARD_USE_INTERNAL_SPI (0) #endif -#include "py/circuitpy_mpconfig.h" - #define MAX_UART 10 //how many UART are implemented #define MICROPY_PORT_ROOT_POINTERS \ -- cgit v1.2.3 From e00b3269febff0d7e1224d76d8301d8c95850536 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Wed, 12 Feb 2020 15:04:19 -0500 Subject: use properly-sized SPI transactions --- ports/nrf/boards/common.template.ld | 4 +- ports/nrf/common-hal/busio/SPI.c | 114 ++++++++++++------------------------ ports/nrf/common-hal/busio/SPI.h | 2 +- ports/nrf/ld_defines.c | 3 + ports/nrf/mpconfigport.h | 7 +++ 5 files changed, 51 insertions(+), 79 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/common.template.ld b/ports/nrf/boards/common.template.ld index 427b6b35b..2fca16707 100644 --- a/ports/nrf/boards/common.template.ld +++ b/ports/nrf/boards/common.template.ld @@ -22,8 +22,8 @@ MEMORY /* SoftDevice 6.1.0 with 5 connections and various increases takes just under 64kiB. /* To measure the minimum required amount of memory for given configuration, set this number high enough to work and then check the mutation of the value done by sd_ble_enable. */ - SPIM3_RAM (rw) : ORIGIN = 0x20000000 + 64K, LENGTH = 8K - RAM (xrw) : ORIGIN = 0x20000000 + 64K + 8K, LENGTH = 256K - 64K -8K + SPIM3_RAM (rw) : ORIGIN = 0x20000000 + ${SOFTDEVICE_RAM_SIZE}, LENGTH = ${SPIM3_BUFFER_SIZE} + RAM (xrw) : ORIGIN = 0x20000000 + ${SOFTDEVICE_RAM_SIZE} + ${SPIM3_BUFFER_SIZE}, LENGTH = 256K - ${SOFTDEVICE_RAM_SIZE} -${SPIM3_BUFFER_SIZE} } diff --git a/ports/nrf/common-hal/busio/SPI.c b/ports/nrf/common-hal/busio/SPI.c index fe943a221..43aced1a5 100644 --- a/ports/nrf/common-hal/busio/SPI.c +++ b/ports/nrf/common-hal/busio/SPI.c @@ -31,35 +31,35 @@ #include "nrfx_spim.h" #include "nrf_gpio.h" -// These are in order from ighest available frequency to lowest (32MHz first, then 8MHz). +// These are in order from highest available frequency to lowest (32MHz first, then 8MHz). STATIC spim_peripheral_t spim_peripherals[] = { #if NRFX_CHECK(NRFX_SPIM3_ENABLED) // SPIM3 exists only on nRF52840 and supports 32MHz max. All other SPIM's are only 8MHz max. // Allocate SPIM3 first. { .spim = NRFX_SPIM_INSTANCE(3), .max_frequency = 32000000, - .max_xfer_size = SPIM3_EASYDMA_MAXCNT_SIZE, + .max_xfer_size = MIN(SPIM3_BUFFER_SIZE, (1UL << SPIM3_EASYDMA_MAXCNT_SIZE) - 1) }, #endif #if NRFX_CHECK(NRFX_SPIM2_ENABLED) // SPIM2 is not shared with a TWIM, so allocate before the shared ones. { .spim = NRFX_SPIM_INSTANCE(2), .max_frequency = 8000000, - .max_xfer_size = SPIM2_EASYDMA_MAXCNT_SIZE, + .max_xfer_size = (1UL << SPIM2_EASYDMA_MAXCNT_SIZE) - 1 }, #endif #if NRFX_CHECK(NRFX_SPIM1_ENABLED) // SPIM1 and TWIM1 share an address. { .spim = NRFX_SPIM_INSTANCE(1), .max_frequency = 8000000, - .max_xfer_size = SPIM1_EASYDMA_MAXCNT_SIZE, + .max_xfer_size = (1UL << SPIM1_EASYDMA_MAXCNT_SIZE) - 1 }, #endif #if NRFX_CHECK(NRFX_SPIM0_ENABLED) // SPIM0 and TWIM0 share an address. { .spim = NRFX_SPIM_INSTANCE(0), .max_frequency = 8000000, - .max_xfer_size = SPIM0_EASYDMA_MAXCNT_SIZE, + .max_xfer_size = (1UL << SPIM0_EASYDMA_MAXCNT_SIZE) - 1 }, #endif }; @@ -232,104 +232,66 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { } bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { - if (len == 0) { - return true; - } - const bool is_spim3 = self->spim_peripheral->spim.p_reg == NRF_SPIM3; + uint8_t *next_chunk = (uint8_t *) data; - const uint32_t max_xfer_size = self->spim_peripheral->max_xfer_size; - const uint32_t parts = len / max_xfer_size; - const uint32_t remainder = len % max_xfer_size; - - for (uint32_t i = 0; i < parts; ++i) { - uint8_t *start = (uint8_t *) (data + i * max_xfer_size); + while (len > 0) { + size_t chunk_size = MIN(len, self->spim_peripheral->max_xfer_size); + uint8_t *chunk = next_chunk; if (is_spim3) { // If SPIM3, copy into unused RAM block, and do DMA from there. - memcpy(spim3_transmit_buffer, start, max_xfer_size); - start = spim3_transmit_buffer; + memcpy(spim3_transmit_buffer, chunk, chunk_size); + chunk = spim3_transmit_buffer; } - const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_TX(start, max_xfer_size); - if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) + const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_TX(chunk, chunk_size); + if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) { return false; - } - - if (remainder > 0) { - uint8_t *start = (uint8_t *) (data + parts * max_xfer_size); - if (is_spim3) { - // If SPIM3, copy into unused RAM block, and do DMA from there. - memcpy(spim3_transmit_buffer, start, remainder); - start = spim3_transmit_buffer; } - const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_TX(start, remainder); - if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) - return false; + next_chunk += chunk_size; + len -= chunk_size; } - return true; } bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { - if (len == 0) { - return true; - } - - const uint32_t max_xfer_size = self->spim_peripheral->max_xfer_size; - const uint32_t parts = len / max_xfer_size; - const uint32_t remainder = len % max_xfer_size; - - for (uint32_t i = 0; i < parts; ++i) { - const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_RX(data + i * max_xfer_size, max_xfer_size); - if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) - return false; - } + uint8_t *next_chunk = data; - if (remainder > 0) { - const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_RX(data + parts * max_xfer_size, remainder); - if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) + while (len > 0) { + size_t chunk_size = MIN(len, self->spim_peripheral->max_xfer_size); + const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_RX(next_chunk, chunk_size); + if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) { return false; + } + next_chunk += chunk_size; + len -= chunk_size; } - return true; } bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { - if (len == 0) { - return true; - } - const bool is_spim3 = self->spim_peripheral->spim.p_reg == NRF_SPIM3; + uint8_t *next_chunk_out = data_out; + uint8_t *next_chunk_in = data_in; - const uint32_t max_xfer_size = self->spim_peripheral->max_xfer_size; - const uint32_t parts = len / max_xfer_size; - const uint32_t remainder = len % max_xfer_size; - - for (uint32_t i = 0; i < parts; ++i) { - uint8_t *out_start = (uint8_t *) (data_out + i * max_xfer_size); + while (len > 0) { + uint8_t *chunk_out = next_chunk_out; + size_t chunk_size = MIN(len, self->spim_peripheral->max_xfer_size); if (is_spim3) { // If SPIM3, copy into unused RAM block, and do DMA from there. - memcpy(spim3_transmit_buffer, out_start, max_xfer_size); - out_start = spim3_transmit_buffer; + memcpy(spim3_transmit_buffer, chunk_out, chunk_size); + chunk_out = spim3_transmit_buffer; } - const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_SINGLE_XFER(out_start, max_xfer_size, - data_in + i * max_xfer_size, max_xfer_size); - if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) + const nrfx_spim_xfer_desc_t xfer = + NRFX_SPIM_SINGLE_XFER(next_chunk_out, chunk_size, + next_chunk_in, chunk_size); + if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) { return false; - } - - if (remainder > 0) { - uint8_t *out_start = (uint8_t *) (data_out + parts * max_xfer_size); - if (is_spim3) { - // If SPIM3, copy into unused RAM block, and do DMA from there. - memcpy(spim3_transmit_buffer, out_start, remainder); - out_start = spim3_transmit_buffer; } - const nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_SINGLE_XFER(out_start, remainder, - data_in + parts * max_xfer_size, remainder); - if (nrfx_spim_xfer(&self->spim_peripheral->spim, &xfer, 0) != NRFX_SUCCESS) - return false; - } + next_chunk_out += chunk_size; + next_chunk_in += chunk_size; + len -= chunk_size; + } return true; } diff --git a/ports/nrf/common-hal/busio/SPI.h b/ports/nrf/common-hal/busio/SPI.h index 738a1de78..ef3ac9531 100644 --- a/ports/nrf/common-hal/busio/SPI.h +++ b/ports/nrf/common-hal/busio/SPI.h @@ -33,7 +33,7 @@ typedef struct { nrfx_spim_t spim; uint32_t max_frequency; - uint8_t max_xfer_size; + uint32_t max_xfer_size; } spim_peripheral_t; typedef struct { diff --git a/ports/nrf/ld_defines.c b/ports/nrf/ld_defines.c index 0ec6dfdb5..ebe9c4929 100644 --- a/ports/nrf/ld_defines.c +++ b/ports/nrf/ld_defines.c @@ -37,3 +37,6 @@ /*BOOTLOADER_SETTINGS_START_ADDR=*/ BOOTLOADER_SETTINGS_START_ADDR; /*BOOTLOADER_SETTINGS_SIZE=*/ BOOTLOADER_SETTINGS_SIZE; + +/*SOFTDEVICE_RAM_SIZE=*/ SOFTDEVICE_RAM_SIZE; +/*SPIM3_BUFFER_SIZE=*/ SPIM3_BUFFER_SIZE; diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h index b6635965d..db082ab51 100644 --- a/ports/nrf/mpconfigport.h +++ b/ports/nrf/mpconfigport.h @@ -34,9 +34,16 @@ #include "nrf_sdm.h" // for SD_FLASH_SIZE #include "peripherals/nrf/nvm.h" // for FLASH_PAGE_SIZE +// Max RAM used by SoftDevice. Can be changed when SoftDevice parameters are changed. +// See common.template.ld. +#define SOFTDEVICE_RAM_SIZE (64*1024) + #ifdef NRF52840 #define MICROPY_PY_SYS_PLATFORM "nRF52840" #define FLASH_SIZE (0x100000) // 1MiB +// Special RAM area for SPIM3 transmit buffer, to work around hardware bug. +// See common.template.ld. +#define SPIM3_BUFFER_SIZE (8192) #endif #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) -- cgit v1.2.3 From fd2982f5c951b7a61ab82e6a103c7a060affd50c Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 12 Feb 2020 15:12:05 -0500 Subject: revert cross-board flag strategy --- ports/stm32f4/boards/meowbit_v121/mpconfigboard.h | 2 +- shared-module/displayio/__init__.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h index 70ae866fe..babf54a3a 100644 --- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h +++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.h @@ -38,7 +38,7 @@ #define BOARD_OSC_DIV (12) #define BOARD_NO_VBUS_SENSE (1) #define BOARD_VTOR_DEFER (1) //Leave VTOR relocation to bootloader -#define BOARD_USE_INTERNAL_SPI (1) +#define BOARD_USE_INTERNAL_SPI // On-board flash #define SPI_FLASH_MOSI_PIN (&pin_PB15) diff --git a/shared-module/displayio/__init__.c b/shared-module/displayio/__init__.c index daf7a2046..efa61265e 100644 --- a/shared-module/displayio/__init__.c +++ b/shared-module/displayio/__init__.c @@ -103,7 +103,7 @@ void reset_displays(void) { continue; } #endif - #if (BOARD_USE_INTERNAL_SPI) + #ifdef BOARD_USE_INTERNAL_SPI if (original_spi == (mp_obj_t)(&supervisor_flash_spi_bus)) { continue; } -- cgit v1.2.3 From afc1c88046540427f6a2bcd19b02b13e04871bdc Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 12 Feb 2020 15:56:24 -0500 Subject: remove bad define --- ports/stm32f4/mpconfigport.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'ports') diff --git a/ports/stm32f4/mpconfigport.h b/ports/stm32f4/mpconfigport.h index 2e1af47ec..283984ea9 100644 --- a/ports/stm32f4/mpconfigport.h +++ b/ports/stm32f4/mpconfigport.h @@ -49,9 +49,6 @@ #ifndef BOARD_NO_VBUS_SENSE #define BOARD_NO_VBUS_SENSE (0) #endif -#ifndef BOARD_USE_INTERNAL_SPI -#define BOARD_USE_INTERNAL_SPI (0) -#endif #define MAX_UART 10 //how many UART are implemented -- cgit v1.2.3 From 4de2a1eb6224dbb218c80f652bf0ed36f2ac29f4 Mon Sep 17 00:00:00 2001 From: Dave Marples Date: Wed, 12 Feb 2020 22:36:34 +0000 Subject: Fix alignment warning --- ports/mimxrt10xx/common-hal/microcontroller/Processor.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Processor.c b/ports/mimxrt10xx/common-hal/microcontroller/Processor.c index 23493f766..6b0a15185 100644 --- a/ports/mimxrt10xx/common-hal/microcontroller/Processor.c +++ b/ports/mimxrt10xx/common-hal/microcontroller/Processor.c @@ -58,8 +58,17 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { OCOTP_Init(OCOTP, CLOCK_GetFreq(kCLOCK_IpgClk)); // Reads shadow registers 0x01 - 0x04 (Configuration and Manufacturing Info) + // into 8 bit wide destination, avoiding punning. for (int i = 0; i < 4; ++i) - ((uint32_t*) raw_id)[i] = OCOTP_ReadFuseShadowRegister(OCOTP, i + 1); + { + uint32_t wr = OCOTP_ReadFuseShadowRegister(OCOTP, i + 1); + + for (int j = 0; j < 4; j++) + { + raw_id[i*4+j] = wr&0xff; + wr>>=8; + } + } OCOTP_Deinit(OCOTP); } -- cgit v1.2.3 From dc97b0d844011876db286d1388c7ac0dd006f143 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 13 Feb 2020 17:41:05 -0500 Subject: correct chec^Cfor flash erase boundaries --- ports/atmel-samd/mpconfigport.h | 30 ++++++++++++++++++------------ ports/nrf/mpconfigport.h | 31 +++++++++++++++++-------------- 2 files changed, 35 insertions(+), 26 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h index 28a844ffc..04ad98c22 100644 --- a/ports/atmel-samd/mpconfigport.h +++ b/ports/atmel-samd/mpconfigport.h @@ -109,6 +109,9 @@ #define CIRCUITPY_DEFAULT_STACK_SIZE 4096 #endif +// Smallest unit of flash that can be erased. +#define FLASH_ERASE_SIZE NVMCTRL_ROW_SIZE + #endif // SAMD21 //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -123,6 +126,9 @@ #define CIRCUITPY_DEFAULT_STACK_SIZE (24*1024) #endif +// Smallest unit of flash that can be erased. +#define FLASH_ERASE_SIZE NVMCTRL_BLOCK_SIZE + // If CIRCUITPY is internal, use half of flash for it. #if INTERNAL_FLASH_FILESYSTEM #ifndef CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE @@ -187,25 +193,25 @@ #error BOOTLOADER_START_ADDR must be on a flash page boundary. #endif -#if CIRCUITPY_INTERNAL_NVM_START_ADDR % FLASH_PAGE_SIZE != 0 -#error CIRCUITPY_INTERNAL_NVM_START_ADDR must be on a flash page boundary. +#if CIRCUITPY_INTERNAL_NVM_START_ADDR % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_NVM_START_ADDR must be on a flash erase (row or block) boundary. #endif -#if CIRCUITPY_INTERNAL_NVM_SIZE % FLASH_PAGE_SIZE != 0 -#error CIRCUITPY_INTERNAL_NVM_SIZE must be a multiple of FLASH_PAGE_SIZE. +#if CIRCUITPY_INTERNAL_NVM_SIZE % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_NVM_SIZE must be a multiple of FLASH_ERASE_SIZE. #endif -#if CIRCUITPY_INTERNAL_CONFIG_START_ADDR % FLASH_PAGE_SIZE != 0 -#error CIRCUITPY_INTERNAL_CONFIG_SIZE must be on a flash page boundary. +#if CIRCUITPY_INTERNAL_CONFIG_START_ADDR % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_CONFIG_SIZE must be on a flash erase (row or block) boundary. #endif -#if CIRCUITPY_INTERNAL_CONFIG_SIZE % FLASH_PAGE_SIZE != 0 -#error CIRCUITPY_INTERNAL_CONFIG_SIZE must be a multiple of FLASH_PAGE_SIZE. +#if CIRCUITPY_INTERNAL_CONFIG_SIZE % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_CONFIG_SIZE must be a multiple of FLASH_ERASE_SIZE. #endif -#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR % FLASH_PAGE_SIZE != 0 -#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be on a flash page boundary. +#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be on a flash erase (row or block) boundary. #endif -#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE % FLASH_PAGE_SIZE != 0 -#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be a multiple of FLASH_PAGE_SIZE. +#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be a multiple of FLASH_ERASE_SIZE. #endif #if CIRCUITPY_FIRMWARE_SIZE < 0 diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h index db082ab51..473169e94 100644 --- a/ports/nrf/mpconfigport.h +++ b/ports/nrf/mpconfigport.h @@ -104,6 +104,9 @@ #define ISR_START_ADDR (SD_FLASH_START_ADDR + SD_FLASH_SIZE) #define ISR_SIZE (0x1000) // 4kiB +// Smallest unit of flash that can be erased. +#define FLASH_ERASE_SIZE FLASH_PAGE_SIZE + #define CIRCUITPY_FIRMWARE_START_ADDR (ISR_START_ADDR + ISR_SIZE) // Define these regions starting down from the bootloader: @@ -129,29 +132,29 @@ // The firmware space is the space left over between the fixed lower and upper regions. #define CIRCUITPY_FIRMWARE_SIZE (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR - CIRCUITPY_FIRMWARE_START_ADDR) -#if BOOTLOADER_START_ADDR % FLASH_PAGE_SIZE != 0 -#error BOOTLOADER_START_ADDR must be on a flash page boundary. +#if BOOTLOADER_START_ADDR % FLASH_ERASE_SIZE != 0 +#error BOOTLOADER_START_ADDR must be on a flash erase boundary. #endif -#if CIRCUITPY_INTERNAL_NVM_START_ADDR % FLASH_PAGE_SIZE != 0 -#error CIRCUITPY_INTERNAL_NVM_START_ADDR must be on a flash page boundary. +#if CIRCUITPY_INTERNAL_NVM_START_ADDR % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_NVM_START_ADDR must be on a flash erase boundary. #endif -#if CIRCUITPY_INTERNAL_NVM_SIZE % FLASH_PAGE_SIZE != 0 -#error CIRCUITPY_INTERNAL_NVM_SIZE must be a multiple of FLASH_PAGE_SIZE. +#if CIRCUITPY_INTERNAL_NVM_SIZE % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_NVM_SIZE must be a multiple of FLASH_ERASE_SIZE. #endif -#if CIRCUITPY_BLE_CONFIG_START_ADDR % FLASH_PAGE_SIZE != 0 -#error CIRCUITPY_BLE_CONFIG_SIZE must be on a flash page boundary. +#if CIRCUITPY_BLE_CONFIG_START_ADDR % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_BLE_CONFIG_SIZE must be on a flash erase boundary. #endif -#if CIRCUITPY_BLE_CONFIG_SIZE % FLASH_PAGE_SIZE != 0 -#error CIRCUITPY_BLE_CONFIG_SIZE must be a multiple of FLASH_PAGE_SIZE. +#if CIRCUITPY_BLE_CONFIG_SIZE % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_BLE_CONFIG_SIZE must be a multiple of FLASH_ERASE_SIZE. #endif -#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR % FLASH_PAGE_SIZE != 0 -#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be on a flash page boundary. +#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be on a flash erase boundary. #endif -#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE % FLASH_PAGE_SIZE != 0 -#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be a multiple of FLASH_PAGE_SIZE. +#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE % FLASH_ERASE_SIZE != 0 +#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be a multiple of FLASH_ERASE_SIZE. #endif #if CIRCUITPY_FIRMWARE_SIZE < 0 -- cgit v1.2.3 From d13f04f9534813ab1c1d975350961bfc0f5b7f67 Mon Sep 17 00:00:00 2001 From: Dave Marples Date: Fri, 14 Feb 2020 23:02:02 +0000 Subject: Updated formatting --- .../mimxrt10xx/common-hal/microcontroller/Processor.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) (limited to 'ports') diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Processor.c b/ports/mimxrt10xx/common-hal/microcontroller/Processor.c index 6b0a15185..fdec73f47 100644 --- a/ports/mimxrt10xx/common-hal/microcontroller/Processor.c +++ b/ports/mimxrt10xx/common-hal/microcontroller/Processor.c @@ -59,16 +59,12 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { // Reads shadow registers 0x01 - 0x04 (Configuration and Manufacturing Info) // into 8 bit wide destination, avoiding punning. - for (int i = 0; i < 4; ++i) - { - uint32_t wr = OCOTP_ReadFuseShadowRegister(OCOTP, i + 1); - - for (int j = 0; j < 4; j++) - { - raw_id[i*4+j] = wr&0xff; - wr>>=8; - } - } - + for (int i = 0; i < 4; ++i) { + uint32_t wr = OCOTP_ReadFuseShadowRegister(OCOTP, i + 1); + for (int j = 0; j < 4; j++) { + raw_id[i*4+j] = wr&0xff; + wr>>=8; + } + } OCOTP_Deinit(OCOTP); } -- cgit v1.2.3 From 77ad9aff3cd91d1f81f81ab7369fc5996277cdcd Mon Sep 17 00:00:00 2001 From: Dave Marples Date: Sun, 16 Feb 2020 00:40:04 +0000 Subject: Formatting updates --- ports/mimxrt10xx/common-hal/microcontroller/Processor.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Processor.c b/ports/mimxrt10xx/common-hal/microcontroller/Processor.c index fdec73f47..0c8131ef4 100644 --- a/ports/mimxrt10xx/common-hal/microcontroller/Processor.c +++ b/ports/mimxrt10xx/common-hal/microcontroller/Processor.c @@ -62,8 +62,8 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { for (int i = 0; i < 4; ++i) { uint32_t wr = OCOTP_ReadFuseShadowRegister(OCOTP, i + 1); for (int j = 0; j < 4; j++) { - raw_id[i*4+j] = wr&0xff; - wr>>=8; + raw_id[i*4+j] = wr & 0xff; + wr >>= 8; } } OCOTP_Deinit(OCOTP); -- cgit v1.2.3 From 93760042fa9793d79e4490dc665593b608d5b334 Mon Sep 17 00:00:00 2001 From: Max Holliday Date: Sun, 16 Feb 2020 11:43:19 -0800 Subject: no current need for NVM --- ports/atmel-samd/boards/sam32/mpconfigboard.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/sam32/mpconfigboard.h b/ports/atmel-samd/boards/sam32/mpconfigboard.h index 6378e4162..364d380d1 100644 --- a/ports/atmel-samd/boards/sam32/mpconfigboard.h +++ b/ports/atmel-samd/boards/sam32/mpconfigboard.h @@ -10,7 +10,7 @@ #define MICROPY_PORT_C (0) #define MICROPY_PORT_D (0) -#define CIRCUITPY_INTERNAL_NVM_SIZE 1024 +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (128*1024) #define BOARD_HAS_CRYSTAL 1 -- cgit v1.2.3 From 2b79d8ffe90f89a32c791fbd8192f9104c2ea1b7 Mon Sep 17 00:00:00 2001 From: Max Holliday Date: Tue, 18 Feb 2020 14:16:54 -0800 Subject: adding PWM to board.c for external WDT --- ports/atmel-samd/boards/pycubed/board.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/boards/pycubed/board.c b/ports/atmel-samd/boards/pycubed/board.c index da37252d8..31b081209 100644 --- a/ports/atmel-samd/boards/pycubed/board.c +++ b/ports/atmel-samd/boards/pycubed/board.c @@ -30,6 +30,9 @@ #include "boards/board.h" #include "py/mpconfig.h" #include "shared-bindings/nvm/ByteArray.h" +#include "common-hal/microcontroller/Pin.h" +#include "hal/include/hal_gpio.h" +#include "shared-bindings/pulseio/PWMOut.h" nvm_bytearray_obj_t bootcnt = { .base = { @@ -41,6 +44,9 @@ nvm_bytearray_obj_t bootcnt = { void board_init(void) { + pulseio_pwmout_obj_t pwm; + common_hal_pulseio_pwmout_construct(&pwm, &pin_PA23, 4096, 2, false); + common_hal_pulseio_pwmout_never_reset(&pwm); } bool board_requests_safe_mode(void) { -- cgit v1.2.3 From 84ad3d8393db46eacfe3432d6476f1c5c48077e3 Mon Sep 17 00:00:00 2001 From: Dave Marples Date: Sun, 16 Feb 2020 00:23:43 +0000 Subject: Addition of RTS/CTS/RS485 UART functionality --- ports/mimxrt10xx/common-hal/busio/UART.c | 62 ++++++++++++++--- .../peripherals/mimxrt10xx/MIMXRT1021/periph.c | 80 ++++++++++++++++------ .../peripherals/mimxrt10xx/MIMXRT1021/periph.h | 2 + shared-bindings/busio/UART.c | 13 +++- shared-bindings/busio/UART.h | 7 +- shared-module/board/__init__.c | 17 ++++- 6 files changed, 145 insertions(+), 36 deletions(-) (limited to 'ports') diff --git a/ports/mimxrt10xx/common-hal/busio/UART.c b/ports/mimxrt10xx/common-hal/busio/UART.c index a4819798b..2842b2cd9 100644 --- a/ports/mimxrt10xx/common-hal/busio/UART.c +++ b/ports/mimxrt10xx/common-hal/busio/UART.c @@ -53,8 +53,8 @@ static void config_periph_pin(const mcu_periph_obj_t *periph) { IOMUXC_SetPinConfig(0, 0, 0, 0, periph->pin->cfg_reg, IOMUXC_SW_PAD_CTL_PAD_HYS(0) - | IOMUXC_SW_PAD_CTL_PAD_PUS(0) - | IOMUXC_SW_PAD_CTL_PAD_PUE(0) + | IOMUXC_SW_PAD_CTL_PAD_PUS(1) + | IOMUXC_SW_PAD_CTL_PAD_PUE(1) | IOMUXC_SW_PAD_CTL_PAD_PKE(1) | IOMUXC_SW_PAD_CTL_PAD_ODE(0) | IOMUXC_SW_PAD_CTL_PAD_SPEED(1) @@ -72,9 +72,10 @@ void LPUART_UserCallback(LPUART_Type *base, lpuart_handle_t *handle, status_t st } void common_hal_busio_uart_construct(busio_uart_obj_t *self, - const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, - uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, - uint16_t receiver_buffer_size) { + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, bool rs485_mode, + uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + mp_float_t timeout, uint16_t receiver_buffer_size) { // TODO: Allow none rx or tx @@ -111,12 +112,48 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if(self->rx_pin == NULL || self->tx_pin == NULL) { mp_raise_RuntimeError(translate("Invalid UART pin selection")); - } else { - self->uart = mcu_uart_banks[self->tx_pin->bank_idx - 1]; } + // Now check for RTS/CTS pin(s) + const uint32_t rts_count = sizeof(mcu_uart_rts_list) / sizeof(mcu_periph_obj_t); + const uint32_t cts_count = sizeof(mcu_uart_cts_list) / sizeof(mcu_periph_obj_t); + + if (rts != mp_const_none) { + for (uint32_t i=0; i < rts_count; ++i) + { + if (mcu_uart_rts_list[i].bank_idx == self->rx_pin->bank_idx) { + if (mcu_uart_rts_list[i].pin == rts) { + self->rts_pin = &mcu_uart_rts_list[i]; + break; + } + } + } + if (self->rts_pin == NULL) + mp_raise_ValueError(translate("Selected RTS pin not valid")); + } + + if (cts != mp_const_none) { + for (uint32_t i=0; i < cts_count; ++i) + { + if (mcu_uart_cts_list[i].bank_idx == self->rx_pin->bank_idx) { + if (mcu_uart_cts_list[i].pin == cts) { + self->cts_pin = &mcu_uart_cts_list[i]; + break; + } + } + } + if (self->cts_pin == NULL) + mp_raise_ValueError(translate("Selected CTS pin not valid")); + } + + self->uart = mcu_uart_banks[self->tx_pin->bank_idx - 1]; + config_periph_pin(self->rx_pin); config_periph_pin(self->tx_pin); + if (self->rts_pin) + config_periph_pin(self->rts_pin); + if (self->cts_pin) + config_periph_pin(self->cts_pin); lpuart_config_t config = { 0 }; LPUART_GetDefaultConfig(&config); @@ -125,10 +162,13 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, config.baudRate_Bps = self->baudrate; config.enableTx = self->tx_pin != NULL; config.enableRx = self->rx_pin != NULL; - + config.enableRxRTS = self->rts_pin != NULL; + config.enableTxCTS = self->cts_pin != NULL; + LPUART_Init(self->uart, &config, UART_CLOCK_FREQ); - claim_pin(self->tx_pin->pin); + if (self->tx_pin != NULL) + claim_pin(self->tx_pin->pin); if (self->rx_pin != NULL) { ringbuf_alloc(&self->rbuf, receiver_buffer_size, true); @@ -203,7 +243,9 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t LPUART_TransferAbortReceive(self->uart, &self->handle); } - return len - self->handle.rxDataSize; + // The only place we can reliably tell how many bytes have been received is from the current + // wp in the handle (because the abort nukes rxDataSize, and reading it before abort is a race.) + return self->handle.rxData-data; } // Write characters. diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c index 39e4f0131..0417f29cc 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c @@ -109,53 +109,93 @@ LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, L const mcu_periph_obj_t mcu_uart_rx_list[16] = { PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_07), - PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_23), - PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_09), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 0, &pin_GPIO_AD_B1_09), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_23), PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_07), PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_15), PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_03), - PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_33), - PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 2, &pin_GPIO_AD_B1_11), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_11), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 2, &pin_GPIO_EMC_33), - PERIPH_PIN(5, 2, kIOMUXC_LPUART5_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_39), - PERIPH_PIN(5, 2, kIOMUXC_LPUART5_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_11), + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_RX_SELECT_INPUT, 0, &pin_GPIO_AD_B0_11), + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_39), PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_13), PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_01), - PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_35), - PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_SD_B0_05), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B0_05), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_35), - PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_27), - PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_03), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_03), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_27), }; const mcu_periph_obj_t mcu_uart_tx_list[16] = { PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_06), - PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_22), - PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_08), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 0, &pin_GPIO_AD_B1_08), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_22), PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_06), PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_14), PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_02), - PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_32), - PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 2, &pin_GPIO_AD_B1_10), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_10), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 2, &pin_GPIO_EMC_32), - PERIPH_PIN(5, 2, kIOMUXC_LPUART5_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_38), - PERIPH_PIN(5, 2, kIOMUXC_LPUART5_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_10), + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_TX_SELECT_INPUT, 0, &pin_GPIO_AD_B0_10), + PERIPH_PIN(5, 2, kIOMUXC_LPUART5_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_38), PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_12), PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_00), - PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_34), - PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 1, &pin_GPIO_SD_B0_04), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B0_04), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_34), - PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_26), - PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_02), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_02), + PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_26), +}; + +const mcu_periph_obj_t mcu_uart_rts_list[10] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_09), + + PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_EMC_21), + PERIPH_PIN(2, 2, 0, 1, &pin_GPIO_AD_B1_07), + + PERIPH_PIN(3, 2, 0, 1, &pin_GPIO_AD_B0_13), + + PERIPH_PIN(4, 2, 0, 0, &pin_GPIO_EMC_01), + PERIPH_PIN(4, 2, 0, 1, &pin_GPIO_EMC_31), + + PERIPH_PIN(5, 2, 0, 0, &pin_GPIO_EMC_37), + + PERIPH_PIN(6, 2, 0, 0, &pin_GPIO_EMC_15), + + PERIPH_PIN(7, 2, 0, 1, &pin_GPIO_SD_B0_03), + + PERIPH_PIN(8, 2, 0, 0, &pin_GPIO_EMC_25), +}; + +const mcu_periph_obj_t mcu_uart_cts_list[10] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_08), + + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_CTS_B_SELECT_INPUT, 0, &pin_GPIO_AD_B1_06), + PERIPH_PIN(2, 2, kIOMUXC_LPUART2_CTS_B_SELECT_INPUT, 1, &pin_GPIO_EMC_20), + + PERIPH_PIN(3, 2, 0, 1, &pin_GPIO_AD_B0_12), + + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_CTS_B_SELECT_INPUT, 0, &pin_GPIO_EMC_00), + PERIPH_PIN(4, 2, kIOMUXC_LPUART4_CTS_B_SELECT_INPUT, 0, &pin_GPIO_EMC_30), + + PERIPH_PIN(5, 2, 0, 0, &pin_GPIO_EMC_36), + + PERIPH_PIN(6, 2, 0, 0, &pin_GPIO_EMC_14), + + PERIPH_PIN(7, 2, 0, 0, &pin_GPIO_SD_B0_02), + + PERIPH_PIN(8, 2, 0, 0, &pin_GPIO_EMC_24), }; const mcu_pwm_obj_t mcu_pwm_list[39] = { diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h index 1d720f633..ba88ef4c6 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h @@ -37,6 +37,8 @@ extern const mcu_periph_obj_t mcu_spi_miso_list[8]; extern const mcu_periph_obj_t mcu_uart_rx_list[16]; extern const mcu_periph_obj_t mcu_uart_tx_list[16]; +extern const mcu_periph_obj_t mcu_uart_rts_list[10]; +extern const mcu_periph_obj_t mcu_uart_cts_list[10]; extern const mcu_pwm_obj_t mcu_pwm_list[39]; diff --git a/shared-bindings/busio/UART.c b/shared-bindings/busio/UART.c index 1fc81e78e..529d2d3ce 100644 --- a/shared-bindings/busio/UART.c +++ b/shared-bindings/busio/UART.c @@ -82,7 +82,7 @@ STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, co // https://github.com/adafruit/circuitpython/issues/1056) busio_uart_obj_t *self = m_new_ll_obj(busio_uart_obj_t); self->base.type = &busio_uart_type; - enum { ARG_tx, ARG_rx, ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_timeout, ARG_receiver_buffer_size}; + enum { ARG_tx, ARG_rx, ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_timeout, ARG_receiver_buffer_size, ARG_rts, ARG_cts, ARG_rs485}; static const mp_arg_t allowed_args[] = { { MP_QSTR_tx, MP_ARG_REQUIRED | MP_ARG_OBJ }, { MP_QSTR_rx, MP_ARG_REQUIRED | MP_ARG_OBJ }, @@ -92,6 +92,9 @@ STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, co { MP_QSTR_stop, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1} }, { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NEW_SMALL_INT(1)} }, { MP_QSTR_receiver_buffer_size, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 64} }, + { MP_QSTR_rts, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, + { MP_QSTR_cts, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, + { MP_QSTR_rs485, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false } }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); @@ -124,7 +127,13 @@ STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, co mp_float_t timeout = mp_obj_get_float(args[ARG_timeout].u_obj); validate_timeout(timeout); - common_hal_busio_uart_construct(self, tx, rx, + const mcu_pin_obj_t* rts = MP_OBJ_TO_PTR(args[ARG_rts].u_obj); + + const mcu_pin_obj_t* cts = MP_OBJ_TO_PTR(args[ARG_cts].u_obj); + + bool rs485 = args[ARG_rs485].u_bool; + + common_hal_busio_uart_construct(self, tx, rx, rts, cts, rs485, args[ARG_baudrate].u_int, bits, parity, stop, timeout, args[ARG_receiver_buffer_size].u_int); return (mp_obj_t)self; diff --git a/shared-bindings/busio/UART.h b/shared-bindings/busio/UART.h index cfd2c800c..1d748ecc7 100644 --- a/shared-bindings/busio/UART.h +++ b/shared-bindings/busio/UART.h @@ -40,9 +40,10 @@ typedef enum { // Construct an underlying UART object. extern void common_hal_busio_uart_construct(busio_uart_obj_t *self, - const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, - uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, - uint16_t receiver_buffer_size); + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, bool rs485_mode, + uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + mp_float_t timeout, uint16_t receiver_buffer_size); extern void common_hal_busio_uart_deinit(busio_uart_obj_t *self); extern bool common_hal_busio_uart_deinited(busio_uart_obj_t *self); diff --git a/shared-module/board/__init__.c b/shared-module/board/__init__.c index 914bc4313..05567d7ab 100644 --- a/shared-module/board/__init__.c +++ b/shared-module/board/__init__.c @@ -100,8 +100,23 @@ mp_obj_t common_hal_board_create_uart(void) { const mcu_pin_obj_t* rx = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_RX); const mcu_pin_obj_t* tx = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_TX); +#ifdef DEFAULT_UART_BUS_RTS + const mcu_pin_obj_t* rts = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_RTS); +#else + const mcu_pin_obj_t* rts = mp_const_none; +#endif +#ifdef DEFAULT_UART_BUS_CTS + const mcu_pin_obj_t* cts = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_CTS); +#else + const mcu_pin_obj_t* cts = mp_const_none; +#endif +#ifdef DEFAULT_UART_IS_RS485 + const bool rs485 = true; +#else + const bool rs485 = false; +#endif - common_hal_busio_uart_construct(self, tx, rx, 9600, 8, PARITY_NONE, 1, 1.0f, 64); + common_hal_busio_uart_construct(self, tx, rx, rts, cts, rs485, 9600, 8, PARITY_NONE, 1, 1.0f, 64); MP_STATE_VM(shared_uart_bus) = MP_OBJ_FROM_PTR(self); return MP_STATE_VM(shared_uart_bus); } -- cgit v1.2.3 From d388899985b24530cc08cdf10ed15e3c7ba41349 Mon Sep 17 00:00:00 2001 From: Dave Marples Date: Tue, 18 Feb 2020 00:09:35 +0000 Subject: Addition of RS485 support --- ports/mimxrt10xx/common-hal/busio/UART.c | 38 +++++++++++++++++++--- .../mimxrt10xx/supervisor/flexspi_nor_flash_ops.c | 2 +- shared-bindings/busio/UART.c | 15 ++++++--- shared-bindings/busio/UART.h | 3 +- shared-module/board/__init__.c | 11 +++++-- 5 files changed, 56 insertions(+), 13 deletions(-) (limited to 'ports') diff --git a/ports/mimxrt10xx/common-hal/busio/UART.c b/ports/mimxrt10xx/common-hal/busio/UART.c index 2842b2cd9..3609a9998 100644 --- a/ports/mimxrt10xx/common-hal/busio/UART.c +++ b/ports/mimxrt10xx/common-hal/busio/UART.c @@ -73,7 +73,8 @@ void LPUART_UserCallback(LPUART_Type *base, lpuart_handle_t *handle, status_t st void common_hal_busio_uart_construct(busio_uart_obj_t *self, const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, - const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, bool rs485_mode, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, + const mcu_pin_obj_t * rs485_dir, bool rs485_invert, uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size) { @@ -114,7 +115,22 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, mp_raise_RuntimeError(translate("Invalid UART pin selection")); } - // Now check for RTS/CTS pin(s) + // Filter for sane settings for RS485 + if (rs485_dir != mp_const_none) { + if ((rts != mp_const_none) || (cts != mp_const_none)) { + mp_raise_ValueError(translate("Cannot specify RTS or CTS in RS485 mode")); + } + // For IMXRT the RTS pin is used for RS485 direction + rts = rs485_dir; + } + else + { + if (rs485_invert == true) { + mp_raise_ValueError(translate("RS485 inversion specified when not in RS485 mode")); + } + } + + // Now check for RTS/CTS (or overloaded RS485 direction) pin(s) const uint32_t rts_count = sizeof(mcu_uart_rts_list) / sizeof(mcu_periph_obj_t); const uint32_t cts_count = sizeof(mcu_uart_cts_list) / sizeof(mcu_periph_obj_t); @@ -163,10 +179,24 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, config.enableTx = self->tx_pin != NULL; config.enableRx = self->rx_pin != NULL; config.enableRxRTS = self->rts_pin != NULL; - config.enableTxCTS = self->cts_pin != NULL; - + config.enableTxCTS = self->cts_pin != NULL; + if (self->rts_pin != NULL) + claim_pin(self->rts_pin->pin); + if (self->cts_pin != NULL) + claim_pin(self->cts_pin->pin); + LPUART_Init(self->uart, &config, UART_CLOCK_FREQ); + // Before we init, setup RS485 direction pin + // ..unfortunately this isn't done by the driver library + uint32_t modir = (self->uart->MODIR) & ~(LPUART_MODIR_TXRTSPOL_MASK | LPUART_MODIR_TXRTSE_MASK); + if (rs485_dir != mp_const_none) { + modir |= LPUART_MODIR_TXRTSE_MASK; + if ( rs485_invert == true ) + modir |= LPUART_MODIR_TXRTSPOL_MASK; + } + self->uart->MODIR = modir; + if (self->tx_pin != NULL) claim_pin(self->tx_pin->pin); diff --git a/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c index 71252d677..f97a54a89 100644 --- a/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c +++ b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c @@ -324,7 +324,7 @@ void flexspi_nor_flash_init(FLEXSPI_Type *base) config.ahbConfig.enableAHBBufferable = true; config.ahbConfig.enableReadAddressOpt = true; config.ahbConfig.enableAHBCachable = true; - config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackFromDqsPad; + config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackInternally; //kFLEXSPI_ReadSampleClkLoopbackFromDqsPad; FLEXSPI_Init(base, &config); /* Configure flash settings according to serial flash feature. */ diff --git a/shared-bindings/busio/UART.c b/shared-bindings/busio/UART.c index 529d2d3ce..02c5afb16 100644 --- a/shared-bindings/busio/UART.c +++ b/shared-bindings/busio/UART.c @@ -53,6 +53,10 @@ //| //| :param ~microcontroller.Pin tx: the pin to transmit with, or ``None`` if this ``UART`` is receive-only. //| :param ~microcontroller.Pin rx: the pin to receive on, or ``None`` if this ``UART`` is transmit-only. +//| :param ~microcontroller.Pin rts: the pin for rts, or ``None`` if rts not in use. +//| :param ~microcontroller.Pin cts: the pin for cts, or ``None`` if cts not in use. +//| :param ~microcontroller.Pin rs485_dir: the pin for rs485 direction setting, or ``None`` if rs485 not in use. +//| :param bool rs485_invert: set to invert the sense of the rs485_dir pin. //| :param int baudrate: the transmit and receive speed. //| :param int bits: the number of bits per byte, 7, 8 or 9. //| :param Parity parity: the parity used for error checking. @@ -82,7 +86,8 @@ STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, co // https://github.com/adafruit/circuitpython/issues/1056) busio_uart_obj_t *self = m_new_ll_obj(busio_uart_obj_t); self->base.type = &busio_uart_type; - enum { ARG_tx, ARG_rx, ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_timeout, ARG_receiver_buffer_size, ARG_rts, ARG_cts, ARG_rs485}; + enum { ARG_tx, ARG_rx, ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_timeout, ARG_receiver_buffer_size, + ARG_rts, ARG_cts, ARG_rs485_dir,ARG_rs485_invert}; static const mp_arg_t allowed_args[] = { { MP_QSTR_tx, MP_ARG_REQUIRED | MP_ARG_OBJ }, { MP_QSTR_rx, MP_ARG_REQUIRED | MP_ARG_OBJ }, @@ -94,7 +99,8 @@ STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, co { MP_QSTR_receiver_buffer_size, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 64} }, { MP_QSTR_rts, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, { MP_QSTR_cts, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_rs485, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false } }, + { MP_QSTR_rs485_dir, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none } }, + { MP_QSTR_rs485_invert, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false } }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); @@ -131,9 +137,10 @@ STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, co const mcu_pin_obj_t* cts = MP_OBJ_TO_PTR(args[ARG_cts].u_obj); - bool rs485 = args[ARG_rs485].u_bool; + const mcu_pin_obj_t* rs485_dir = args[ARG_rs485_dir].u_obj; + bool rs485_invert = args[ARG_rs485_invert].u_bool; - common_hal_busio_uart_construct(self, tx, rx, rts, cts, rs485, + common_hal_busio_uart_construct(self, tx, rx, rts, cts, rs485_dir, rs485_invert, args[ARG_baudrate].u_int, bits, parity, stop, timeout, args[ARG_receiver_buffer_size].u_int); return (mp_obj_t)self; diff --git a/shared-bindings/busio/UART.h b/shared-bindings/busio/UART.h index 1d748ecc7..fe71e8668 100644 --- a/shared-bindings/busio/UART.h +++ b/shared-bindings/busio/UART.h @@ -41,7 +41,8 @@ typedef enum { // Construct an underlying UART object. extern void common_hal_busio_uart_construct(busio_uart_obj_t *self, const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, - const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, bool rs485_mode, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, + const mcu_pin_obj_t * rs485_dir, bool rs485_invert, uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size); diff --git a/shared-module/board/__init__.c b/shared-module/board/__init__.c index 05567d7ab..952e1fc10 100644 --- a/shared-module/board/__init__.c +++ b/shared-module/board/__init__.c @@ -111,12 +111,17 @@ mp_obj_t common_hal_board_create_uart(void) { const mcu_pin_obj_t* cts = mp_const_none; #endif #ifdef DEFAULT_UART_IS_RS485 - const bool rs485 = true; + const mcu_pin_obj_t* rs485_dir = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_RS485DIR); +#ifdef DEFAULT_UART_RS485_INVERT + const bool rs485_invert = true; +#endif #else - const bool rs485 = false; + const mcu_pin_obj_t* rs485_dir = mp_const_none; + const bool rs485_invert = true; #endif - common_hal_busio_uart_construct(self, tx, rx, rts, cts, rs485, 9600, 8, PARITY_NONE, 1, 1.0f, 64); + common_hal_busio_uart_construct(self, tx, rx, rts, cts, rs485_dir, rs485_invert, + 9600, 8, PARITY_NONE, 1, 1.0f, 64); MP_STATE_VM(shared_uart_bus) = MP_OBJ_FROM_PTR(self); return MP_STATE_VM(shared_uart_bus); } -- cgit v1.2.3 From f0e5341b0f6ad09a03dec4a9d38669cc2fea6343 Mon Sep 17 00:00:00 2001 From: Dave Marples Date: Tue, 18 Feb 2020 15:21:49 +0000 Subject: Addition of support for imxt1010, 1050 and 1060 families --- .../mimxrt10xx/boards/imxrt1020_evk/flash_config.c | 6 +++- .../peripherals/mimxrt10xx/MIMXRT1011/periph.c | 20 +++++++++++ .../peripherals/mimxrt10xx/MIMXRT1011/periph.h | 2 ++ .../peripherals/mimxrt10xx/MIMXRT1062/periph.c | 40 +++++++++++++++++++++- .../peripherals/mimxrt10xx/MIMXRT1062/periph.h | 2 ++ .../mimxrt10xx/supervisor/flexspi_nor_flash_ops.c | 6 +++- 6 files changed, 73 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c index b74c0b151..80a57f17b 100644 --- a/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c @@ -42,7 +42,11 @@ const flexspi_nor_config_t qspiflash_config = { { .tag = FLEXSPI_CFG_BLK_TAG, .version = FLEXSPI_CFG_BLK_VERSION, - .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, +#ifdef BOARD_USING_SECONDARY_QSPI_PINMUX + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromInternally, +#else + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, +#endif .csHoldTime = 1u, .csSetupTime = 2u, // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c index e9d735830..2fed6dfc6 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c @@ -113,6 +113,26 @@ const mcu_periph_obj_t mcu_uart_tx_list[9] = { PERIPH_PIN(4, 3, kIOMUXC_LPUART4_TXD_SELECT_INPUT, 1, &pin_GPIO_06), }; +const mcu_periph_obj_t mcu_uart_rts_list[4] = { + PERIPH_PIN(1, 6, 0, 0, &pin_GPIO_07), + + PERIPH_PIN(2, 3, 0, 0, &pin_GPIO_AD_07), + + PERIPH_PIN(3, 1, 0, 0, &pin_GPIO_AD_13), + + PERIPH_PIN(4, 3, 0, 0, &pin_GPIO_AD_13) +}; + +const mcu_periph_obj_t mcu_uart_cts_list[4] = { + PERIPH_PIN(1, 6, 0, 0, &pin_GPIO_08), + + PERIPH_PIN(2, 3, 0, 0, &pin_GPIO_AD_08), + + PERIPH_PIN(3, 1, 0, 0, &pin_GPIO_AD_14), + + PERIPH_PIN(4, 3, 0, 0, &pin_GPIO_AD_14), +}; + const mcu_pwm_obj_t mcu_pwm_list[20] = { PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_02), PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_SD_02), diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h index c91d5808a..a791aa294 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h @@ -36,6 +36,8 @@ extern const mcu_periph_obj_t mcu_spi_miso_list[4]; extern const mcu_periph_obj_t mcu_uart_rx_list[9]; extern const mcu_periph_obj_t mcu_uart_tx_list[9]; +const mcu_periph_obj_t mcu_uart_rts_list[4]; +const mcu_periph_obj_t mcu_uart_cts_list[4]; extern const mcu_pwm_obj_t mcu_pwm_list[20]; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c index 3f0473a88..9a1a4ab65 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c @@ -127,8 +127,8 @@ const mcu_periph_obj_t mcu_uart_rx_list[18] = { PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_26), PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_03), - PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_32), PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_09), + PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_32), PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B0_05), PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_11), @@ -163,6 +163,44 @@ const mcu_periph_obj_t mcu_uart_tx_list[18] = { PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 2, &pin_GPIO_EMC_38), }; +const mcu_periph_obj_t mcu_uart_rts_list[9] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_15), + + PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_AD_B1_01), + + PERIPH_PIN(3, 2, 0, 0, &pin_GPIO_AD_B1_05), + PERIPH_PIN(3, 2, 0, 0, &pin_GPIO_EMC_16), + + PERIPH_PIN(4, 2, 0, 0, &pin_GPIO_EMC_18), + + PERIPH_PIN(5, 2, 0, 0, &pin_GPIO_EMC_27), + + PERIPH_PIN(6, 2, 0, 0, &pin_GPIO_EMC_29), + + PERIPH_PIN(7, 2, 0, 0, &pin_GPIO_SD_B1_07), + + PERIPH_PIN(8, 2, 0, 0, &pin_GPIO_SD_B0_03), +}; + +const mcu_periph_obj_t mcu_uart_cts_list[9] = { + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_14), + + PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_AD_B1_00), + + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 0, &pin_GPIO_EMC_15), + PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 1, &pin_GPIO_AD_B1_04), + + PERIPH_PIN(4, 2, 0, 0, &pin_GPIO_EMC_17), + + PERIPH_PIN(5, 2, 0, 0, &pin_GPIO_EMC_28), + + PERIPH_PIN(6, 2, 0, 0, &pin_GPIO_EMC_30), + + PERIPH_PIN(7, 2, 0, 0, &pin_GPIO_SD_B1_06), + + PERIPH_PIN(8, 2, 0, 0, &pin_GPIO_SD_B0_02), +}; + const mcu_pwm_obj_t mcu_pwm_list[67] = { PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_23), PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_SD_B0_00), diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h index b069ca76b..dbda2edb1 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h @@ -36,6 +36,8 @@ extern const mcu_periph_obj_t mcu_spi_miso_list[8]; extern const mcu_periph_obj_t mcu_uart_rx_list[18]; extern const mcu_periph_obj_t mcu_uart_tx_list[18]; +const mcu_periph_obj_t mcu_uart_rts_list[9]; +const mcu_periph_obj_t mcu_uart_cts_list[9]; extern const mcu_pwm_obj_t mcu_pwm_list[67]; diff --git a/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c index f97a54a89..28d5115ac 100644 --- a/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c +++ b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c @@ -324,7 +324,11 @@ void flexspi_nor_flash_init(FLEXSPI_Type *base) config.ahbConfig.enableAHBBufferable = true; config.ahbConfig.enableReadAddressOpt = true; config.ahbConfig.enableAHBCachable = true; - config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackInternally; //kFLEXSPI_ReadSampleClkLoopbackFromDqsPad; +#ifdef BOARD_USING_SECONDARY_QSPI_PINMUX + config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackInternally; +#else + config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackFromDqsPad; +#endif FLEXSPI_Init(base, &config); /* Configure flash settings according to serial flash feature. */ -- cgit v1.2.3 From 490a808bf668a849eca3d42bd14254cef7a48a1a Mon Sep 17 00:00:00 2001 From: Dave Marples Date: Tue, 18 Feb 2020 16:00:25 +0000 Subject: Addition of stubs for rs485/CTS/RTS handling on non-implemented chips --- ports/atmel-samd/common-hal/busio/UART.c | 13 ++++++++++--- ports/cxd56/common-hal/busio/UART.c | 12 +++++++++--- ports/nrf/common-hal/busio/UART.c | 15 +++++++++++---- ports/stm32f4/common-hal/busio/UART.c | 14 ++++++++++---- 4 files changed, 40 insertions(+), 14 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/busio/UART.c b/ports/atmel-samd/common-hal/busio/UART.c index 70857de6d..c4e70787a 100644 --- a/ports/atmel-samd/common-hal/busio/UART.c +++ b/ports/atmel-samd/common-hal/busio/UART.c @@ -52,9 +52,12 @@ static void usart_async_rxc_callback(const struct usart_async_descriptor *const } void common_hal_busio_uart_construct(busio_uart_obj_t *self, - const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, - uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, - uint16_t receiver_buffer_size) { + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, + const mcu_pin_obj_t * rs485_dir, bool rs485_invert, + uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + mp_float_t timeout, uint16_t receiver_buffer_size) { + Sercom* sercom = NULL; uint8_t sercom_index = 255; // Unset index uint32_t rx_pinmux = 0; @@ -62,6 +65,10 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, uint32_t tx_pinmux = 0; uint8_t tx_pad = 255; // Unset pad + if ((rts != mp_const_none) || (cts != mp_const_none) || (rs485_dir != mp_const_none) || (rs485_invert == true)) { + mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device")); + } + if (bits > 8) { mp_raise_NotImplementedError(translate("bytes > 8 bits not supported")); } diff --git a/ports/cxd56/common-hal/busio/UART.c b/ports/cxd56/common-hal/busio/UART.c index 40ae3b761..688a35542 100644 --- a/ports/cxd56/common-hal/busio/UART.c +++ b/ports/cxd56/common-hal/busio/UART.c @@ -53,11 +53,17 @@ STATIC busio_uart_dev_t busio_uart_dev[] = { }; void common_hal_busio_uart_construct(busio_uart_obj_t *self, - const mcu_pin_obj_t *tx, const mcu_pin_obj_t *rx, uint32_t baudrate, - uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, - uint16_t receiver_buffer_size) { + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, + const mcu_pin_obj_t * rs485_dir, bool rs485_invert, + uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + mp_float_t timeout, uint16_t receiver_buffer_size) { struct termios tio; + if ((rts != mp_const_none) || (cts != mp_const_none) || (rs485_dir != mp_const_none) || (rs485_invert == true)) { + mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device")); + } + if (bits != 8) { mp_raise_ValueError(translate("Could not initialize UART")); } diff --git a/ports/nrf/common-hal/busio/UART.c b/ports/nrf/common-hal/busio/UART.c index d79b65ff8..c422a187f 100644 --- a/ports/nrf/common-hal/busio/UART.c +++ b/ports/nrf/common-hal/busio/UART.c @@ -128,10 +128,17 @@ void uart_reset(void) { } } -void common_hal_busio_uart_construct (busio_uart_obj_t *self, - const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, - uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, - uint16_t receiver_buffer_size) { +void common_hal_busio_uart_construct(busio_uart_obj_t *self, + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, + const mcu_pin_obj_t * rs485_dir, bool rs485_invert, + uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + mp_float_t timeout, uint16_t receiver_buffer_size) { + + if ((rts != mp_const_none) || (cts != mp_const_none) || (rs485_dir != mp_const_none) || (rs485_invert == true)) { + mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device")); + } + // Find a free UART peripheral. self->uarte = NULL; for (size_t i = 0 ; i < MP_ARRAY_SIZE(nrfx_uartes); i++) { diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index bfa541c17..3c1909259 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -71,10 +71,12 @@ void uart_reset(void) { uart_clock_disable(ALL_UARTS); } -void common_hal_busio_uart_construct(busio_uart_obj_t* self, - const mcu_pin_obj_t* tx, const mcu_pin_obj_t* rx, uint32_t baudrate, - uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, - uint16_t receiver_buffer_size) { +void common_hal_busio_uart_construct(busio_uart_obj_t *self, + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, + const mcu_pin_obj_t * rs485_dir, bool rs485_invert, + uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + mp_float_t timeout, uint16_t receiver_buffer_size) { //match pins to UART objects USART_TypeDef * USARTx; @@ -84,6 +86,10 @@ void common_hal_busio_uart_construct(busio_uart_obj_t* self, bool uart_taken = false; uint8_t uart_index = 0; //origin 0 corrected + if ((rts != mp_const_none) || (cts != mp_const_none) || (rs485_dir != mp_const_none) || (rs485_invert == true)) { + mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device")); + } + //Can have both pins, or either if ((tx != mp_const_none) && (rx != mp_const_none)) { //normal find loop if both pins exist -- cgit v1.2.3 From 24405cabafd4c9481118cd77e1a13ee98ab48565 Mon Sep 17 00:00:00 2001 From: Dave Marples Date: Wed, 19 Feb 2020 00:07:01 +0000 Subject: Edits as a result of review --- ports/atmel-samd/common-hal/busio/UART.c | 2 +- ports/cxd56/common-hal/busio/UART.c | 2 +- ports/mimxrt10xx/common-hal/busio/UART.c | 37 ++++++++++------------ .../peripherals/mimxrt10xx/MIMXRT1011/periph.h | 4 +-- .../peripherals/mimxrt10xx/MIMXRT1062/periph.h | 4 +-- ports/nrf/common-hal/busio/UART.c | 2 +- 6 files changed, 24 insertions(+), 27 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/busio/UART.c b/ports/atmel-samd/common-hal/busio/UART.c index c4e70787a..fb9968605 100644 --- a/ports/atmel-samd/common-hal/busio/UART.c +++ b/ports/atmel-samd/common-hal/busio/UART.c @@ -65,7 +65,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, uint32_t tx_pinmux = 0; uint8_t tx_pad = 255; // Unset pad - if ((rts != mp_const_none) || (cts != mp_const_none) || (rs485_dir != mp_const_none) || (rs485_invert == true)) { + if ((rts != mp_const_none) || (cts != mp_const_none) || (rs485_dir != mp_const_none) || (rs485_invert)) { mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device")); } diff --git a/ports/cxd56/common-hal/busio/UART.c b/ports/cxd56/common-hal/busio/UART.c index 688a35542..3ed980952 100644 --- a/ports/cxd56/common-hal/busio/UART.c +++ b/ports/cxd56/common-hal/busio/UART.c @@ -60,7 +60,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, mp_float_t timeout, uint16_t receiver_buffer_size) { struct termios tio; - if ((rts != mp_const_none) || (cts != mp_const_none) || (rs485_dir != mp_const_none) || (rs485_invert == true)) { + if ((rts != mp_const_none) || (cts != mp_const_none) || (rs485_dir != mp_const_none) || (rs485_invert)) { mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device")); } diff --git a/ports/mimxrt10xx/common-hal/busio/UART.c b/ports/mimxrt10xx/common-hal/busio/UART.c index 3609a9998..4fd7afecb 100644 --- a/ports/mimxrt10xx/common-hal/busio/UART.c +++ b/ports/mimxrt10xx/common-hal/busio/UART.c @@ -123,41 +123,38 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, // For IMXRT the RTS pin is used for RS485 direction rts = rs485_dir; } - else - { - if (rs485_invert == true) { - mp_raise_ValueError(translate("RS485 inversion specified when not in RS485 mode")); - } + else { + if (rs485_invert) { + mp_raise_ValueError(translate("RS485 inversion specified when not in RS485 mode")); } + } // Now check for RTS/CTS (or overloaded RS485 direction) pin(s) const uint32_t rts_count = sizeof(mcu_uart_rts_list) / sizeof(mcu_periph_obj_t); const uint32_t cts_count = sizeof(mcu_uart_cts_list) / sizeof(mcu_periph_obj_t); if (rts != mp_const_none) { - for (uint32_t i=0; i < rts_count; ++i) - { - if (mcu_uart_rts_list[i].bank_idx == self->rx_pin->bank_idx) { - if (mcu_uart_rts_list[i].pin == rts) { - self->rts_pin = &mcu_uart_rts_list[i]; - break; - } + for (uint32_t i=0; i < rts_count; ++i) { + if (mcu_uart_rts_list[i].bank_idx == self->rx_pin->bank_idx) { + if (mcu_uart_rts_list[i].pin == rts) { + self->rts_pin = &mcu_uart_rts_list[i]; + break; } } + } if (self->rts_pin == NULL) mp_raise_ValueError(translate("Selected RTS pin not valid")); } if (cts != mp_const_none) { - for (uint32_t i=0; i < cts_count; ++i) - { - if (mcu_uart_cts_list[i].bank_idx == self->rx_pin->bank_idx) { - if (mcu_uart_cts_list[i].pin == cts) { - self->cts_pin = &mcu_uart_cts_list[i]; - break; - } + for (uint32_t i=0; i < cts_count; ++i) { + if (mcu_uart_cts_list[i].bank_idx == self->rx_pin->bank_idx) { + if (mcu_uart_cts_list[i].pin == cts) { + self->cts_pin = &mcu_uart_cts_list[i]; + break; } } + } if (self->cts_pin == NULL) mp_raise_ValueError(translate("Selected CTS pin not valid")); } @@ -192,7 +189,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, uint32_t modir = (self->uart->MODIR) & ~(LPUART_MODIR_TXRTSPOL_MASK | LPUART_MODIR_TXRTSE_MASK); if (rs485_dir != mp_const_none) { modir |= LPUART_MODIR_TXRTSE_MASK; - if ( rs485_invert == true ) + if (rs485_invert) modir |= LPUART_MODIR_TXRTSPOL_MASK; } self->uart->MODIR = modir; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h index a791aa294..d6d489537 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h @@ -36,8 +36,8 @@ extern const mcu_periph_obj_t mcu_spi_miso_list[4]; extern const mcu_periph_obj_t mcu_uart_rx_list[9]; extern const mcu_periph_obj_t mcu_uart_tx_list[9]; -const mcu_periph_obj_t mcu_uart_rts_list[4]; -const mcu_periph_obj_t mcu_uart_cts_list[4]; +extern const mcu_periph_obj_t mcu_uart_rts_list[4]; +extern const mcu_periph_obj_t mcu_uart_cts_list[4]; extern const mcu_pwm_obj_t mcu_pwm_list[20]; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h index dbda2edb1..45b92f247 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h @@ -36,8 +36,8 @@ extern const mcu_periph_obj_t mcu_spi_miso_list[8]; extern const mcu_periph_obj_t mcu_uart_rx_list[18]; extern const mcu_periph_obj_t mcu_uart_tx_list[18]; -const mcu_periph_obj_t mcu_uart_rts_list[9]; -const mcu_periph_obj_t mcu_uart_cts_list[9]; +extern const mcu_periph_obj_t mcu_uart_rts_list[9]; +extern const mcu_periph_obj_t mcu_uart_cts_list[9]; extern const mcu_pwm_obj_t mcu_pwm_list[67]; diff --git a/ports/nrf/common-hal/busio/UART.c b/ports/nrf/common-hal/busio/UART.c index c422a187f..933faf17b 100644 --- a/ports/nrf/common-hal/busio/UART.c +++ b/ports/nrf/common-hal/busio/UART.c @@ -135,7 +135,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size) { - if ((rts != mp_const_none) || (cts != mp_const_none) || (rs485_dir != mp_const_none) || (rs485_invert == true)) { + if ((rts != mp_const_none) || (cts != mp_const_none) || (rs485_dir != mp_const_none) || (rs485_invert)) { mp_raise_ValueError(translate("RTS/CTS/RS485 Not yet supported on this device")); } -- cgit v1.2.3 From aa0cf38084035c9b6080a4a97385dbcd6ae475c8 Mon Sep 17 00:00:00 2001 From: arturo182 Date: Wed, 19 Feb 2020 21:58:10 +0100 Subject: mimxrt10xx: Add Feather M7 1011 board config --- .github/workflows/build.yml | 1 + ports/mimxrt10xx/boards/feather_m7_1011/board.c | 39 +++++++ .../boards/feather_m7_1011/flash_config.c | 122 +++++++++++++++++++++ .../boards/feather_m7_1011/mpconfigboard.h | 20 ++++ .../boards/feather_m7_1011/mpconfigboard.mk | 8 ++ ports/mimxrt10xx/boards/feather_m7_1011/pins.c | 43 ++++++++ ports/mimxrt10xx/linking/flash/W25Q32JV.ld | 1 + 7 files changed, 234 insertions(+) create mode 100644 ports/mimxrt10xx/boards/feather_m7_1011/board.c create mode 100644 ports/mimxrt10xx/boards/feather_m7_1011/flash_config.c create mode 100644 ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.h create mode 100644 ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.mk create mode 100644 ports/mimxrt10xx/boards/feather_m7_1011/pins.c create mode 100644 ports/mimxrt10xx/linking/flash/W25Q32JV.ld (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 2ebe4753e..ea99de249 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -157,6 +157,7 @@ jobs: - "feather_m0_rfm9x" - "feather_m0_supersized" - "feather_m4_express" + - "feather_m7_1011" - "feather_mimxrt1011" - "feather_mimxrt1062" - "feather_nrf52840_express" diff --git a/ports/mimxrt10xx/boards/feather_m7_1011/board.c b/ports/mimxrt10xx/boards/feather_m7_1011/board.c new file mode 100644 index 000000000..52dd498b3 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_m7_1011/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/feather_m7_1011/flash_config.c b/ports/mimxrt10xx/boards/feather_m7_1011/flash_config.c new file mode 100644 index 000000000..b74c0b151 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_m7_1011/flash_config.c @@ -0,0 +1,122 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "fsl_flexspi_nor_config.h" + + +__attribute__((section(".boot_hdr.ivt"))) +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +__attribute__((section(".boot_hdr.boot_data"))) +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; + +__attribute__((section(".boot_hdr.conf"))) +// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 +const flexspi_nor_config_t qspiflash_config = { + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 1u, + .csSetupTime = 2u, + // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | + // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) + // Read LUTs + FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), + 0, + 0, + + 0x24040405, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000406, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x08180420, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x081804D8, + 0, + 0, + 0, + + 0x08180402, + 0x00002004, + 0, + 0, + + 0, + 0, + 0, + 0, + + 0x00000460, + }, + }, + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, +}; diff --git a/ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.h b/ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.h new file mode 100644 index 000000000..e96ec13dd --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.h @@ -0,0 +1,20 @@ +#define MICROPY_HW_BOARD_NAME "Feather MIMXRT1011" +#define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A" + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO_00) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (4 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_12) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_11) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_AD_06) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_04) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_03) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_01) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_02) diff --git a/ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.mk b/ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.mk new file mode 100644 index 000000000..670b48b60 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_m7_1011/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x8092 +USB_PRODUCT = "Feather M7 1011" +USB_MANUFACTURER = "Adafruit" + +CHIP_VARIANT = MIMXRT1011DAE5A +CHIP_FAMILY = MIMXRT1011 +FLASH = W25Q32JV diff --git a/ports/mimxrt10xx/boards/feather_m7_1011/pins.c b/ports/mimxrt10xx/boards/feather_m7_1011/pins.c new file mode 100644 index 000000000..09e321761 --- /dev/null +++ b/ports/mimxrt10xx/boards/feather_m7_1011/pins.c @@ -0,0 +1,43 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + // Analog + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_05) }, + + // Digital + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_00) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_AD_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_AD_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_AD_04) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_01) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_12) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO_00) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/linking/flash/W25Q32JV.ld b/ports/mimxrt10xx/linking/flash/W25Q32JV.ld new file mode 100644 index 000000000..3fa395c66 --- /dev/null +++ b/ports/mimxrt10xx/linking/flash/W25Q32JV.ld @@ -0,0 +1 @@ +_ld_flash_size = 4M; -- cgit v1.2.3 From feac87901ab738bae94b1bd5a1265a2084acc37a Mon Sep 17 00:00:00 2001 From: arturo182 Date: Wed, 19 Feb 2020 22:23:32 +0100 Subject: mimxrt10xx: Enable displayio Closes #2466 --- ports/mimxrt10xx/background.c | 3 +- .../mimxrt10xx/common-hal/displayio/ParallelBus.c | 68 ++++++++++++++++++++++ .../mimxrt10xx/common-hal/displayio/ParallelBus.h | 36 ++++++++++++ ports/mimxrt10xx/common-hal/microcontroller/Pin.c | 4 ++ ports/mimxrt10xx/mpconfigport.mk | 1 - 5 files changed, 109 insertions(+), 3 deletions(-) create mode 100644 ports/mimxrt10xx/common-hal/displayio/ParallelBus.c create mode 100644 ports/mimxrt10xx/common-hal/displayio/ParallelBus.h (limited to 'ports') diff --git a/ports/mimxrt10xx/background.c b/ports/mimxrt10xx/background.c index c0b217685..71dd79521 100644 --- a/ports/mimxrt10xx/background.c +++ b/ports/mimxrt10xx/background.c @@ -37,9 +37,8 @@ #include "supervisor/linker.h" #include "supervisor/shared/stack.h" -// TODO #ifdef CIRCUITPY_DISPLAYIO -//#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/__init__.h" #endif volatile uint64_t last_finished_tick = 0; diff --git a/ports/mimxrt10xx/common-hal/displayio/ParallelBus.c b/ports/mimxrt10xx/common-hal/displayio/ParallelBus.c new file mode 100644 index 000000000..87fc511af --- /dev/null +++ b/ports/mimxrt10xx/common-hal/displayio/ParallelBus.c @@ -0,0 +1,68 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/ParallelBus.h" + +#include + +#include "common-hal/microcontroller/Pin.h" +#include "py/runtime.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/microcontroller/__init__.h" + +#include "tick.h" + +void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* self, + const mcu_pin_obj_t* data0, const mcu_pin_obj_t* command, const mcu_pin_obj_t* chip_select, + const mcu_pin_obj_t* write, const mcu_pin_obj_t* read, const mcu_pin_obj_t* reset) { + + mp_raise_NotImplementedError(translate("ParallelBus not yet supported")); +} + +void common_hal_displayio_parallelbus_deinit(displayio_parallelbus_obj_t* self) { + +} + +bool common_hal_displayio_parallelbus_reset(mp_obj_t obj) { + return false; +} + +bool common_hal_displayio_parallelbus_bus_free(mp_obj_t obj) { + return false; +} + +bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t obj) { + + return false; +} + +void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length) { + +} + +void common_hal_displayio_parallelbus_end_transaction(mp_obj_t obj) { + +} diff --git a/ports/mimxrt10xx/common-hal/displayio/ParallelBus.h b/ports/mimxrt10xx/common-hal/displayio/ParallelBus.h new file mode 100644 index 000000000..845e44df0 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/displayio/ParallelBus.h @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DISPLAYIO_PARALLELBUS_H +#define MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DISPLAYIO_PARALLELBUS_H + +#include "common-hal/digitalio/DigitalInOut.h" + +typedef struct { + mp_obj_base_t base; +} displayio_parallelbus_obj_t; + +#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_DISPLAYIO_PARALLELBUS_H diff --git a/ports/mimxrt10xx/common-hal/microcontroller/Pin.c b/ports/mimxrt10xx/common-hal/microcontroller/Pin.c index 04dd99739..21e61d29d 100644 --- a/ports/mimxrt10xx/common-hal/microcontroller/Pin.c +++ b/ports/mimxrt10xx/common-hal/microcontroller/Pin.c @@ -224,3 +224,7 @@ bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) { void common_hal_reset_pin(const mcu_pin_obj_t* pin) { // reset_pin_number(pin->number); } + +void common_hal_never_reset_pin(const mcu_pin_obj_t* pin) { +// never_reset_pin_number(pin->port, pin->number); +} diff --git a/ports/mimxrt10xx/mpconfigport.mk b/ports/mimxrt10xx/mpconfigport.mk index b928ce3bb..5881ac302 100644 --- a/ports/mimxrt10xx/mpconfigport.mk +++ b/ports/mimxrt10xx/mpconfigport.mk @@ -20,7 +20,6 @@ USB_MSC_MAX_PACKET_SIZE = 512 INTERNAL_FLASH_FILESYSTEM = 1 -CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_AUDIOIO = 0 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_FREQUENCYIO = 0 -- cgit v1.2.3 From 634d24691093950d08efc029eefb65fa15ef6865 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 20 Feb 2020 16:00:21 -0500 Subject: relicense nrf SPI.c to MIT --- ports/nrf/common-hal/busio/SPI.c | 33 ++++++++++++++++++--------------- 1 file changed, 18 insertions(+), 15 deletions(-) (limited to 'ports') diff --git a/ports/nrf/common-hal/busio/SPI.c b/ports/nrf/common-hal/busio/SPI.c index 43aced1a5..b4ebddde1 100644 --- a/ports/nrf/common-hal/busio/SPI.c +++ b/ports/nrf/common-hal/busio/SPI.c @@ -1,25 +1,28 @@ /* - * SPI Master library for nRF5x. + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) * * Copyright (c) 2019 Dan Halbert for Adafruit Industries * Copyright (c) 2018 Artur Pacholec - * Copyright (c) 2017 hathach - * Copyright (c) 2016 Sandeep Mistry All right reserved. - * Copyright (c) 2015 Arduino LLC * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. */ #include -- cgit v1.2.3