From 49e059cdaf8cedccf175cf00d8286788c2077ac1 Mon Sep 17 00:00:00 2001 From: gamblor21 Date: Sat, 16 Jan 2021 16:37:42 -0600 Subject: Removing frozen libraries --- ports/atmel-samd/boards/8086_commander/mpconfigboard.mk | 1 - ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk | 1 - .../atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk | 1 - .../boards/circuitplayground_express_displayio/mpconfigboard.mk | 1 - ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk | 1 - ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk | 1 - ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk | 1 - ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk | 1 - ports/atmel-samd/boards/pycubed/mpconfigboard.mk | 1 - ports/atmel-samd/boards/pycubed_mram/mpconfigboard.mk | 1 - ports/atmel-samd/boards/sam32/mpconfigboard.mk | 1 - ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.mk | 1 - ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk | 1 - 13 files changed, 13 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk b/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk index b5a4bc735..f976dfe78 100644 --- a/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk +++ b/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk @@ -22,7 +22,6 @@ CIRCUITPY_GAMEPAD = 1 CIRCUITPY_BUSDEVICE = 1 # Include these Python libraries in firmware. -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_HID FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SD #FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_ADXL34x diff --git a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk index 505f5c145..0b150a5fb 100644 --- a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk @@ -22,7 +22,6 @@ SUPEROPT_GC = 0 CFLAGS_INLINE_LIMIT = 55 # Include these Python libraries in firmware. -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_CircuitPlayground FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_HID FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_LIS3DH diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk index c3be33134..35b6f1229 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk @@ -26,7 +26,6 @@ CFLAGS_INLINE_LIMIT = 50 # Include these Python libraries in firmware. -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_CircuitPlayground FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Crickit FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_LIS3DH diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk index 51e9b05af..f754f3513 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk @@ -27,7 +27,6 @@ SUPEROPT_GC = 0 CFLAGS_INLINE_LIMIT = 55 # Include these Python libraries in firmware. -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_CircuitPlayground FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_LIS3DH FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel diff --git a/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk index f06163b84..309563ff4 100644 --- a/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk @@ -21,7 +21,6 @@ CFLAGS_INLINE_LIMIT = 50 CIRCUITPY_MSGPACK = 0 # Include these Python libraries in firmware. -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Crickit FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Motor FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel diff --git a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk index 6e089bb90..6ea21ed82 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk @@ -28,5 +28,4 @@ CFLAGS_INLINE_LIMIT = 35 SUPEROPT_GC = 0 # Include these Python libraries in firmware. -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_RFM69 diff --git a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk index 383b6a6df..76a6be2e3 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk @@ -29,5 +29,4 @@ CFLAGS_INLINE_LIMIT = 35 SUPEROPT_GC = 0 # Include these Python libraries in firmware. -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_RFM9x diff --git a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk index 1931ceb9a..2b211abd4 100644 --- a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk @@ -27,7 +27,6 @@ CFLAGS_INLINE_LIMIT = 55 SUPEROPT_GC = 0 # Include these Python libraries in firmware. -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_LIS3DH FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel diff --git a/ports/atmel-samd/boards/pycubed/mpconfigboard.mk b/ports/atmel-samd/boards/pycubed/mpconfigboard.mk index b7b8073ab..a82362b8d 100644 --- a/ports/atmel-samd/boards/pycubed/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pycubed/mpconfigboard.mk @@ -21,7 +21,6 @@ CIRCUITPY_GAMEPAD = 0 CIRCUITPY_RGBMATRIX = 0 CIRCUITPY_PS2IO = 0 -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Register FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SD diff --git a/ports/atmel-samd/boards/pycubed_mram/mpconfigboard.mk b/ports/atmel-samd/boards/pycubed_mram/mpconfigboard.mk index f49bb3fef..3bf42d705 100644 --- a/ports/atmel-samd/boards/pycubed_mram/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pycubed_mram/mpconfigboard.mk @@ -21,7 +21,6 @@ CIRCUITPY_GAMEPAD = 0 CIRCUITPY_RGBMATRIX = 0 CIRCUITPY_PS2IO = 0 -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Register FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SD diff --git a/ports/atmel-samd/boards/sam32/mpconfigboard.mk b/ports/atmel-samd/boards/sam32/mpconfigboard.mk index 1dc686ef8..9ac24a014 100644 --- a/ports/atmel-samd/boards/sam32/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sam32/mpconfigboard.mk @@ -13,5 +13,4 @@ LONGINT_IMPL = MPZ CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_USTACK = 1 -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel diff --git a/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.mk b/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.mk index 3562228c7..d6f333b5b 100644 --- a/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.mk +++ b/ports/atmel-samd/boards/xinabox_cc03/mpconfigboard.mk @@ -24,4 +24,3 @@ CIRCUITPY_TOUCHIO=0 CIRCUITPY_BUSDEVICE=1 # Include these Python libraries in firmware. -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice diff --git a/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk b/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk index 53908293f..fd2fa044a 100644 --- a/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk +++ b/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk @@ -27,5 +27,4 @@ CIRCUITPY_COUNTIO=0 CIRCUITPY_BUSDEVICE=1 # Include these Python libraries in firmware. -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SD -- cgit v1.2.3 From 41b9196167576c9a593d51e601edd51cba5b72c4 Mon Sep 17 00:00:00 2001 From: gamblor21 Date: Sun, 17 Jan 2021 00:00:06 -0600 Subject: Disabling in more small boards --- ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk | 1 + ports/atmel-samd/boards/serpente/mpconfigboard.mk | 1 + ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.mk | 1 + ports/atmel-samd/boards/ugame10/mpconfigboard.mk | 1 + ports/nrf/boards/pca10100/mpconfigboard.mk | 1 + ports/stm/boards/espruino_pico/mpconfigboard.mk | 1 + 6 files changed, 6 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk index 178258b6c..2ace30fb5 100755 --- a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk @@ -16,6 +16,7 @@ CIRCUITPY_COUNTIO = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_VECTORIO = 0 +CIRCUITPY_BUSDEVICE = 0 MICROPY_PY_ASYNC_AWAIT = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/serpente/mpconfigboard.mk b/ports/atmel-samd/boards/serpente/mpconfigboard.mk index 6e953adf7..09036875f 100644 --- a/ports/atmel-samd/boards/serpente/mpconfigboard.mk +++ b/ports/atmel-samd/boards/serpente/mpconfigboard.mk @@ -14,6 +14,7 @@ LONGINT_IMPL = NONE CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_BUSDEVICE = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.mk index e71bb0739..2e15bc042 100755 --- a/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.mk @@ -14,6 +14,7 @@ LONGINT_IMPL = MPZ CIRCUITPY_AUDIOIO = 0 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_VECTORIO = 0 +CIRCUITPY_BUSDEVICE = 0 FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DotStar diff --git a/ports/atmel-samd/boards/ugame10/mpconfigboard.mk b/ports/atmel-samd/boards/ugame10/mpconfigboard.mk index b1242d206..640d421e8 100644 --- a/ports/atmel-samd/boards/ugame10/mpconfigboard.mk +++ b/ports/atmel-samd/boards/ugame10/mpconfigboard.mk @@ -28,6 +28,7 @@ CIRCUITPY_RTC = 0 CIRCUITPY_TOUCHIO = 0 CIRCUITPY_USB_HID = 0 CIRCUITPY_USB_MIDI = 0 +CIRCUITPY_BUSDEVICE = 0 FROZEN_MPY_DIRS += $(TOP)/frozen/circuitpython-stage/ugame10 diff --git a/ports/nrf/boards/pca10100/mpconfigboard.mk b/ports/nrf/boards/pca10100/mpconfigboard.mk index 76d15e608..c8cba2877 100644 --- a/ports/nrf/boards/pca10100/mpconfigboard.mk +++ b/ports/nrf/boards/pca10100/mpconfigboard.mk @@ -25,6 +25,7 @@ CIRCUITPY_RTC = 1 CIRCUITPY_SDCARDIO = 0 CIRCUITPY_TOUCHIO = 0 CIRCUITPY_ULAB = 0 +CIRCUITPY_BUSDEVICE = 0 MICROPY_PY_ASYNC_AWAIT = 0 SUPEROPT_GC = 0 diff --git a/ports/stm/boards/espruino_pico/mpconfigboard.mk b/ports/stm/boards/espruino_pico/mpconfigboard.mk index 14f9323fd..81c3772e7 100644 --- a/ports/stm/boards/espruino_pico/mpconfigboard.mk +++ b/ports/stm/boards/espruino_pico/mpconfigboard.mk @@ -20,5 +20,6 @@ LD_FILE = boards/STM32F401xd_fs.ld # lto for this port, and if other stuff hasn't been added in the # meantime CIRCUITPY_ULAB = 0 +CIRCUITPY_BUSDEVICE = 0 SUPEROPT_GC = 0 -- cgit v1.2.3 From 811a34fc3db4761d4bb184b545f8930df02d296e Mon Sep 17 00:00:00 2001 From: Kevin Matocha Date: Fri, 22 Jan 2021 14:42:09 -0600 Subject: Add initial ParallelBus support for ESP32-S2 --- ports/esp32s2/common-hal/displayio/ParallelBus.c | 162 ++++++++++++++++++++++- ports/esp32s2/common-hal/displayio/ParallelBus.h | 9 ++ 2 files changed, 164 insertions(+), 7 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/displayio/ParallelBus.c b/ports/esp32s2/common-hal/displayio/ParallelBus.c index d0c98f361..d734c030f 100644 --- a/ports/esp32s2/common-hal/displayio/ParallelBus.c +++ b/ports/esp32s2/common-hal/displayio/ParallelBus.c @@ -33,35 +33,183 @@ #include "shared-bindings/digitalio/DigitalInOut.h" #include "shared-bindings/microcontroller/__init__.h" +/* +* Current pin limitations: +* data0 pin must be byte aligned and use pin numbers < 32 (data0 options: 0, 8, 16 or 24) +* write pin must be pin number < 32. +* +* Future extensions: +* 1. Allow data0 pin numbers >= 32. +* 2. Allow write pin numbers >= 32. +*/ + void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* self, const mcu_pin_obj_t* data0, const mcu_pin_obj_t* command, const mcu_pin_obj_t* chip_select, const mcu_pin_obj_t* write, const mcu_pin_obj_t* read, const mcu_pin_obj_t* reset) { - mp_raise_NotImplementedError(translate("ParallelBus not yet supported")); + + uint8_t data_pin = data0->number; + if ( (data_pin % 8 != 0) && (data_pin >= 32) ) { + mp_raise_ValueError(translate("Data 0 pin must be byte aligned and < 32")); + } + + for (uint8_t i = 0; i < 8; i++) { + if (!pin_number_is_free(data_pin + i)) { + mp_raise_ValueError_varg(translate("Bus pin %d is already in use"), i); + } + } + + if (write->number >= 32) { + mp_raise_ValueError(translate("Write pin must be < 32")); + } + + gpio_dev_t *g = &GPIO; /* this is the GPIO registers, see "extern gpio_dev_t GPIO" from file:gpio_struct.h */ + + /* Setup the pins as "Simple GPIO outputs" see section 19.3.3 of the ESP32-S2 Reference Manual */ + /* Enable pins with "enable_w1ts" */ + + for (uint8_t i = 0; i < 8; i++) { + g->enable_w1ts = (0x1 << (data_pin + i)); + g->func_out_sel_cfg[data_pin + i].val= 256; /* setup output pin for simple GPIO Output, (0x100 = 256) */ + + } + + /* I think there is a limitation of the ESP32-S2 that does not allow single-byte writes into + the GPIO registers. See section 10.3.3 regarding "non-aligned writes" into the registers. + If a method for writing single-byte writes is uncovered, this code can be modified to provide + single-byte access into the output register */ + + self->bus = (uint32_t*) &g->out; //pointer to GPIO output register (for pins 0-31) + + /* SNIP - common setup of command, chip select, write and read pins, same as from SAMD and NRF ports */ + self->command.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->command, command); + common_hal_digitalio_digitalinout_switch_to_output(&self->command, true, DRIVE_MODE_PUSH_PULL); + + self->chip_select.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->chip_select, chip_select); + common_hal_digitalio_digitalinout_switch_to_output(&self->chip_select, true, DRIVE_MODE_PUSH_PULL); + + self->write.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->write, write); + common_hal_digitalio_digitalinout_switch_to_output(&self->write, true, DRIVE_MODE_PUSH_PULL); + + self->read.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->read, read); + common_hal_digitalio_digitalinout_switch_to_output(&self->read, true, DRIVE_MODE_PUSH_PULL); + + self->data0_pin = data_pin; + self->write_group = &GPIO; + /* Should modify the .h structure definitions if want to allow a write pin >= 32. + If so, consider putting separate "clear_write" and "set_write" pointers into the .h in place of "write_group" + to select between out_w1tc/out1_w1tc (clear) and out_w1ts/out1_w1ts (set) registers. */ + + self->write_mask = 1 << (write->number % 32); /* the write pin triggers the LCD to latch the data */ + /* Note: As currently written for the ESP32-S2 port, the write pin must be a pin number less than 32 + This could be updated to accommodate 32 and higher by using the different construction of the + address for writing to output pins >= 32, see related note above for 'self->write_group' */ + + /* SNIP - common setup of the reset pin, same as from SAMD and NRF ports */ + self->reset.base.type = &mp_type_NoneType; + if (reset != NULL) { + self->reset.base.type = &digitalio_digitalinout_type; + common_hal_digitalio_digitalinout_construct(&self->reset, reset); + common_hal_digitalio_digitalinout_switch_to_output(&self->reset, true, DRIVE_MODE_PUSH_PULL); + never_reset_pin_number(reset->number); + common_hal_displayio_parallelbus_reset(self); + } + + never_reset_pin_number(command->number); + never_reset_pin_number(chip_select->number); + never_reset_pin_number(write->number); + never_reset_pin_number(read->number); + for (uint8_t i = 0; i < 8; i++) { + never_reset_pin_number(data_pin + i); + } + } void common_hal_displayio_parallelbus_deinit(displayio_parallelbus_obj_t* self) { + /* SNIP - same as from SAMD and NRF ports */ + for (uint8_t i = 0; i < 8; i++) { + reset_pin_number(self->data0_pin + i); + } + reset_pin_number(self->command.pin->number); + reset_pin_number(self->chip_select.pin->number); + reset_pin_number(self->write.pin->number); + reset_pin_number(self->read.pin->number); + reset_pin_number(self->reset.pin->number); } bool common_hal_displayio_parallelbus_reset(mp_obj_t obj) { - return false; + /* SNIP - same as from SAMD and NRF ports */ + displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj); + if (self->reset.base.type == &mp_type_NoneType) { + return false; + } + + common_hal_digitalio_digitalinout_set_value(&self->reset, false); + common_hal_mcu_delay_us(4); + common_hal_digitalio_digitalinout_set_value(&self->reset, true); + return true; + } bool common_hal_displayio_parallelbus_bus_free(mp_obj_t obj) { - return false; + /* SNIP - same as from SAMD and NRF ports */ + return true; } bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t obj) { - - return false; + /* SNIP - same as from SAMD and NRF ports */ + displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj); + common_hal_digitalio_digitalinout_set_value(&self->chip_select, false); + return true; } void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type, - display_chip_select_behavior_t chip_select, const uint8_t *data, uint32_t data_length) { + display_chip_select_behavior_t chip_select, const uint8_t *data, uint32_t data_length) { + displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj); + common_hal_digitalio_digitalinout_set_value(&self->command, byte_type == DISPLAY_DATA); + + /* Currently the write pin number must be < 32. + Future: To accommodate write pin numbers >= 32, will need to update to choose a different register + for set/reset (out1_w1tc and out1_w1ts) */ + + uint32_t* clear_write = (uint32_t*) &self->write_group->out_w1tc; + uint32_t* set_write = (uint32_t*) &self->write_group->out_w1ts; + uint32_t mask = self->write_mask; + + /* Setup structures for data writing. The ESP32-S2 port differs from the SAMD and NRF ports + because I have not found a way to write a single byte into the ESP32-S2 registers. + For the ESP32-S2, I create a 32-bit data_buffer that is used to transfer the data bytes. */ + + *clear_write = mask; // Clear the write pin to prepare the registers before storing register settings into data_buffer + uint32_t data_buffer = *self->bus; // store the initial output register values into the data output buffer + uint8_t* data_address = ((uint8_t*) &data_buffer) + (self->data0_pin / 8); /* address inside data_buffer where + each data byte will be written (as offset by (data0_pin/8) number of bytes) */ + + for (uint32_t i = 0; i < data_length; i++) { + + /* Question: Is there a faster way of stuffing the data byte into the data_buffer, is bit arithmetic + faster than writing to the byte address? */ + + /* Note: May be able to eliminate either the clear_write or set_write since the data buffer + can be written with the write pin cleared or set already, and depending upon whether the display + latches the data on the rising or falling edge of the write pin. Remember: This method + will require the write pin to be controlled by the same GPIO register as the data pins. */ + + *clear_write = mask; // clear the write pin (See comment above, this may not be necessary). + *(data_address) = data[i]; // stuff the data byte into the data_buffer at the correct offset byte location + *self->bus = data_buffer; // write the data to the output register + *set_write = mask; // set the write pin + } } void common_hal_displayio_parallelbus_end_transaction(mp_obj_t obj) { - + /* SNIP - same as from SAMD and NRF ports */ + displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj); + common_hal_digitalio_digitalinout_set_value(&self->chip_select, true); } diff --git a/ports/esp32s2/common-hal/displayio/ParallelBus.h b/ports/esp32s2/common-hal/displayio/ParallelBus.h index cd636921d..20fc2f1bc 100644 --- a/ports/esp32s2/common-hal/displayio/ParallelBus.h +++ b/ports/esp32s2/common-hal/displayio/ParallelBus.h @@ -31,6 +31,15 @@ typedef struct { mp_obj_base_t base; + uint32_t* bus; // pointer where 8 bits of data are written to the display + digitalio_digitalinout_obj_t command; + digitalio_digitalinout_obj_t chip_select; + digitalio_digitalinout_obj_t reset; + digitalio_digitalinout_obj_t write; // write pin, must be a pin number < 32 currently + digitalio_digitalinout_obj_t read; + uint8_t data0_pin; // pin number for the lowest number pin. Must be 0, 8, 16 or 24 with current + gpio_dev_t* write_group; // pointer to the write group for setting/clearing the write bit to latch the data on the LCD + uint32_t write_mask; // bit mask for the single bit for the write pin, currently write pin must be a pin number < 32 } displayio_parallelbus_obj_t; #endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_DISPLAYIO_PARALLELBUS_H -- cgit v1.2.3 From 34aa01c5f9c45a85f4c6c73bc4e094a717b68451 Mon Sep 17 00:00:00 2001 From: Kevin Matocha Date: Fri, 22 Jan 2021 22:29:51 -0600 Subject: Remove redundant clear_write, add make translate --- locale/circuitpython.pot | 10 ++++++++- ports/esp32s2/common-hal/displayio/ParallelBus.c | 28 +++++++++++++++++++++--- 2 files changed, 34 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 434684e13..4dfce747d 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -527,6 +527,7 @@ msgid "Buffer too short by %d bytes" msgstr "" #: ports/atmel-samd/common-hal/displayio/ParallelBus.c +#: ports/esp32s2/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c #, c-format msgid "Bus pin %d is already in use" @@ -796,6 +797,10 @@ msgstr "" msgid "Data 0 pin must be byte aligned" msgstr "" +#: ports/esp32s2/common-hal/displayio/ParallelBus.c +msgid "Data 0 pin must be byte aligned and < 32" +msgstr "" + #: shared-module/audiocore/WaveFile.c msgid "Data chunk must follow fmt chunk" msgstr "" @@ -1564,7 +1569,6 @@ msgid "" "PWM frequency not writable when variable_frequency is False on construction." msgstr "" -#: ports/esp32s2/common-hal/displayio/ParallelBus.c #: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c #: ports/stm/common-hal/displayio/ParallelBus.c msgid "ParallelBus not yet supported" @@ -2136,6 +2140,10 @@ msgstr "" msgid "Woken up by alarm.\n" msgstr "" +#: ports/esp32s2/common-hal/displayio/ParallelBus.c +msgid "Write pin must be < 32" +msgstr "" + #: ports/nrf/common-hal/_bleio/PacketBuffer.c msgid "Writes not supported on Characteristic" msgstr "" diff --git a/ports/esp32s2/common-hal/displayio/ParallelBus.c b/ports/esp32s2/common-hal/displayio/ParallelBus.c index d734c030f..04e24b291 100644 --- a/ports/esp32s2/common-hal/displayio/ParallelBus.c +++ b/ports/esp32s2/common-hal/displayio/ParallelBus.c @@ -177,19 +177,33 @@ void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byt Future: To accommodate write pin numbers >= 32, will need to update to choose a different register for set/reset (out1_w1tc and out1_w1ts) */ + // **** Bit shifting trial + // uint32_t* output_register = self->bus; + // const uint8_t bit_shift=self->data0_pin; + uint32_t* clear_write = (uint32_t*) &self->write_group->out_w1tc; uint32_t* set_write = (uint32_t*) &self->write_group->out_w1ts; - uint32_t mask = self->write_mask; + + const uint32_t mask = self->write_mask; + /* Setup structures for data writing. The ESP32-S2 port differs from the SAMD and NRF ports because I have not found a way to write a single byte into the ESP32-S2 registers. For the ESP32-S2, I create a 32-bit data_buffer that is used to transfer the data bytes. */ *clear_write = mask; // Clear the write pin to prepare the registers before storing register settings into data_buffer - uint32_t data_buffer = *self->bus; // store the initial output register values into the data output buffer + + const uint32_t data_buffer = *self->bus; // store the initial output register values into the data output buffer uint8_t* data_address = ((uint8_t*) &data_buffer) + (self->data0_pin / 8); /* address inside data_buffer where each data byte will be written (as offset by (data0_pin/8) number of bytes) */ + // *** Bit shifting trial + // *data_address = 0; //clear the 8 data bits + + //mp_printf(&mp_plat_print, "\n\ndata_buffer: %x\n", data_buffer); + //mp_printf(&mp_plat_print, "data[0]: %x\n", data[0]); + //mp_printf(&mp_plat_print, "data_buffer[0]: %x\n\n", (data_buffer | (((uint32_t) data[0]) << self->data0_pin))); + for (uint32_t i = 0; i < data_length; i++) { /* Question: Is there a faster way of stuffing the data byte into the data_buffer, is bit arithmetic @@ -200,9 +214,17 @@ void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byt latches the data on the rising or falling edge of the write pin. Remember: This method will require the write pin to be controlled by the same GPIO register as the data pins. */ - *clear_write = mask; // clear the write pin (See comment above, this may not be necessary). + // Can ignore this line if the write pin is in the same register as the data pins + // *clear_write = mask; // clear the write pin (See comment above, this may not be necessary). + + // *** Original code *(data_address) = data[i]; // stuff the data byte into the data_buffer at the correct offset byte location *self->bus = data_buffer; // write the data to the output register + + // *** Bit shifting trial - didn't have much improvement in performance + // *output_register = (data_buffer | (((uint32_t) data[i]) << bit_shift)); + + *set_write = mask; // set the write pin } -- cgit v1.2.3 From 10965e59896b9fd7b1261792d5ed450beae6c1eb Mon Sep 17 00:00:00 2001 From: Kevin Matocha Date: Sat, 23 Jan 2021 11:30:17 -0600 Subject: Delete unnecessary comments --- ports/esp32s2/common-hal/displayio/ParallelBus.c | 90 ++++++++++-------------- 1 file changed, 39 insertions(+), 51 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/displayio/ParallelBus.c b/ports/esp32s2/common-hal/displayio/ParallelBus.c index 04e24b291..b644610f2 100644 --- a/ports/esp32s2/common-hal/displayio/ParallelBus.c +++ b/ports/esp32s2/common-hal/displayio/ParallelBus.c @@ -34,20 +34,18 @@ #include "shared-bindings/microcontroller/__init__.h" /* -* Current pin limitations: -* data0 pin must be byte aligned and use pin numbers < 32 (data0 options: 0, 8, 16 or 24) -* write pin must be pin number < 32. -* -* Future extensions: -* 1. Allow data0 pin numbers >= 32. -* 2. Allow write pin numbers >= 32. -*/ + * + * Current pin limitations for ESP32-S2 ParallelBus: + * 1. data0 pin must be byte aligned (data0 pin options: 0, 8, 16 or 24) + * 2. The 8 data lines must use pin numbers < 32 + * 3. The write pin must be pin number < 32. + * + */ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* self, const mcu_pin_obj_t* data0, const mcu_pin_obj_t* command, const mcu_pin_obj_t* chip_select, const mcu_pin_obj_t* write, const mcu_pin_obj_t* read, const mcu_pin_obj_t* reset) { - uint8_t data_pin = data0->number; if ( (data_pin % 8 != 0) && (data_pin >= 32) ) { mp_raise_ValueError(translate("Data 0 pin must be byte aligned and < 32")); @@ -63,10 +61,10 @@ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* sel mp_raise_ValueError(translate("Write pin must be < 32")); } - gpio_dev_t *g = &GPIO; /* this is the GPIO registers, see "extern gpio_dev_t GPIO" from file:gpio_struct.h */ + gpio_dev_t *g = &GPIO; // this is the GPIO registers, see "extern gpio_dev_t GPIO" from file:gpio_struct.h - /* Setup the pins as "Simple GPIO outputs" see section 19.3.3 of the ESP32-S2 Reference Manual */ - /* Enable pins with "enable_w1ts" */ + // Setup the pins as "Simple GPIO outputs" see section 19.3.3 of the ESP32-S2 Reference Manual + // Enable pins with "enable_w1ts" for (uint8_t i = 0; i < 8; i++) { g->enable_w1ts = (0x1 << (data_pin + i)); @@ -74,10 +72,11 @@ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* sel } - /* I think there is a limitation of the ESP32-S2 that does not allow single-byte writes into - the GPIO registers. See section 10.3.3 regarding "non-aligned writes" into the registers. - If a method for writing single-byte writes is uncovered, this code can be modified to provide - single-byte access into the output register */ + /* From my understanding, there is a limitation of the ESP32-S2 that does not allow single-byte writes + * into the GPIO registers. See section 10.3.3 regarding "non-aligned writes" into the registers. + * If a method for writing single-byte writes is uncovered, this code can be modified to provide + * single-byte access into the output register + */ self->bus = (uint32_t*) &g->out; //pointer to GPIO output register (for pins 0-31) @@ -100,14 +99,16 @@ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* sel self->data0_pin = data_pin; self->write_group = &GPIO; - /* Should modify the .h structure definitions if want to allow a write pin >= 32. - If so, consider putting separate "clear_write" and "set_write" pointers into the .h in place of "write_group" - to select between out_w1tc/out1_w1tc (clear) and out_w1ts/out1_w1ts (set) registers. */ + /* If we want to allow a write pin >= 32, should consider putting separate "clear_write" and + * "set_write" pointers into the .h in place of "write_group" + * to select between out_w1tc/out1_w1tc (clear) and out_w1ts/out1_w1ts (set) registers. + */ self->write_mask = 1 << (write->number % 32); /* the write pin triggers the LCD to latch the data */ /* Note: As currently written for the ESP32-S2 port, the write pin must be a pin number less than 32 - This could be updated to accommodate 32 and higher by using the different construction of the - address for writing to output pins >= 32, see related note above for 'self->write_group' */ + * This could be updated to accommodate 32 and higher by using the different construction of the + * address for writing to output pins >= 32, see related note above for 'self->write_group' + */ /* SNIP - common setup of the reset pin, same as from SAMD and NRF ports */ self->reset.base.type = &mp_type_NoneType; @@ -174,57 +175,44 @@ void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byt common_hal_digitalio_digitalinout_set_value(&self->command, byte_type == DISPLAY_DATA); /* Currently the write pin number must be < 32. - Future: To accommodate write pin numbers >= 32, will need to update to choose a different register - for set/reset (out1_w1tc and out1_w1ts) */ - - // **** Bit shifting trial - // uint32_t* output_register = self->bus; - // const uint8_t bit_shift=self->data0_pin; + * Future: To accommodate write pin numbers >= 32, will need to update to choose the correct register + * for the write pin set/clear (out_w1ts/out1_w1ts and out_w1tc/out1_w1tc) + */ uint32_t* clear_write = (uint32_t*) &self->write_group->out_w1tc; uint32_t* set_write = (uint32_t*) &self->write_group->out_w1ts; const uint32_t mask = self->write_mask; - /* Setup structures for data writing. The ESP32-S2 port differs from the SAMD and NRF ports - because I have not found a way to write a single byte into the ESP32-S2 registers. - For the ESP32-S2, I create a 32-bit data_buffer that is used to transfer the data bytes. */ + * because I have not found a way to write a single byte into the ESP32-S2 registers. + * For the ESP32-S2, I create a 32-bit data_buffer that is used to transfer the data bytes. + */ - *clear_write = mask; // Clear the write pin to prepare the registers before storing register settings into data_buffer + *clear_write = mask; // Clear the write pin to prepare the registers before storing the + // register value into data_buffer const uint32_t data_buffer = *self->bus; // store the initial output register values into the data output buffer uint8_t* data_address = ((uint8_t*) &data_buffer) + (self->data0_pin / 8); /* address inside data_buffer where - each data byte will be written (as offset by (data0_pin/8) number of bytes) */ - - // *** Bit shifting trial - // *data_address = 0; //clear the 8 data bits - - //mp_printf(&mp_plat_print, "\n\ndata_buffer: %x\n", data_buffer); - //mp_printf(&mp_plat_print, "data[0]: %x\n", data[0]); - //mp_printf(&mp_plat_print, "data_buffer[0]: %x\n\n", (data_buffer | (((uint32_t) data[0]) << self->data0_pin))); + * each data byte will be written to the data pin registers + */ for (uint32_t i = 0; i < data_length; i++) { /* Question: Is there a faster way of stuffing the data byte into the data_buffer, is bit arithmetic - faster than writing to the byte address? */ + * faster than writing to the byte address? + */ - /* Note: May be able to eliminate either the clear_write or set_write since the data buffer - can be written with the write pin cleared or set already, and depending upon whether the display - latches the data on the rising or falling edge of the write pin. Remember: This method - will require the write pin to be controlled by the same GPIO register as the data pins. */ + /* Note: If the write pin and data pins are controlled by the same GPIO register, we can eliminate + * the "clear_write" step below, since the write pin is cleared when the data_buffer is written + * to the bus. + * Remember: This method requires the write pin to be controlled by the same GPIO register as the data pins. + */ - // Can ignore this line if the write pin is in the same register as the data pins // *clear_write = mask; // clear the write pin (See comment above, this may not be necessary). - // *** Original code *(data_address) = data[i]; // stuff the data byte into the data_buffer at the correct offset byte location *self->bus = data_buffer; // write the data to the output register - - // *** Bit shifting trial - didn't have much improvement in performance - // *output_register = (data_buffer | (((uint32_t) data[i]) << bit_shift)); - - *set_write = mask; // set the write pin } -- cgit v1.2.3 From abd9f7894df4118dc70dca0f1fa3aa3c0349edae Mon Sep 17 00:00:00 2001 From: David Glaude Date: Sun, 24 Jan 2021 12:53:06 +0100 Subject: Permit Gameduino 3X Dazzler support on that board. Totally untested, change request based on change made in #2581. It might be my first PR in CircuitPython core... Maybe this should be confirmed by @jamesbowman Those are the two boards that seems supported: * Metro M4 Express * Metro nRF52840 Express The only Metro that this PR concern: * Metro M4 AirLift Lite Other Metro I found and are maybe not supported: * Metro ESP32-S2 * Metro M0 Express * Metro M7 1011 --- ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.mk | 2 ++ 1 file changed, 2 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.mk b/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.mk index 4895cda77..58d4e4980 100644 --- a/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.mk +++ b/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.mk @@ -10,3 +10,5 @@ QSPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 3 EXTERNAL_FLASH_DEVICES = "S25FL116K, S25FL216K, GD25Q16C" LONGINT_IMPL = MPZ + +CIRCUITPY__EVE = 1 -- cgit v1.2.3 From 69869e1439a1ebad383b75b28e7e88f21ccab732 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Sun, 24 Jan 2021 22:49:28 -0500 Subject: CIRCUITPY_* switches for JSON, RE, etc. Doc cleanup --- docs/library/errno.rst | 32 ++++++ docs/library/index.rst | 51 +++------ docs/library/io.rst | 114 ++++++++++++++++++++ docs/library/json.rst | 35 +++++++ docs/library/re.rst | 101 ++++++++++++++++++ docs/library/uerrno.rst | 34 ------ docs/library/uio.rst | 116 --------------------- docs/library/ujson.rst | 37 ------- docs/library/ure.rst | 103 ------------------ docs/shared_bindings_matrix.py | 4 +- .../mpconfigboard.h | 3 +- ports/atmel-samd/mpconfigport.h | 7 -- ports/atmel-samd/mpconfigport.mk | 52 +++------ ports/esp32s2/mpconfigport.h | 1 - ports/litex/mpconfigport.h | 2 - ports/mimxrt10xx/mpconfigport.h | 2 - ports/nrf/mpconfigport.h | 3 - ports/raspberrypi/mpconfigport.h | 4 +- ports/stm/mpconfigport.h | 2 - py/circuitpy_mpconfig.h | 73 ++++++------- py/circuitpy_mpconfig.mk | 12 +++ shared-bindings/support_matrix.rst | 4 +- 22 files changed, 367 insertions(+), 425 deletions(-) create mode 100644 docs/library/errno.rst create mode 100644 docs/library/io.rst create mode 100644 docs/library/json.rst create mode 100644 docs/library/re.rst delete mode 100644 docs/library/uerrno.rst delete mode 100644 docs/library/uio.rst delete mode 100644 docs/library/ujson.rst delete mode 100644 docs/library/ure.rst (limited to 'ports') diff --git a/docs/library/errno.rst b/docs/library/errno.rst new file mode 100644 index 000000000..96777b205 --- /dev/null +++ b/docs/library/errno.rst @@ -0,0 +1,32 @@ +:mod:`errno` -- system error codes +=================================== + +.. module:: errno + :synopsis: system error codes + +|see_cpython_module| :mod:`cpython:errno`. + +This module provides access to symbolic error codes for `OSError` exception. + +Constants +--------- + +.. data:: EEXIST, EAGAIN, etc. + + Error codes, based on ANSI C/POSIX standard. All error codes start with + "E". Errors are usually accessible as ``exc.args[0]`` + where ``exc`` is an instance of `OSError`. Usage example:: + + try: + os.mkdir("my_dir") + except OSError as exc: + if exc.args[0] == errno.EEXIST: + print("Directory already exists") + +.. data:: errorcode + + Dictionary mapping numeric error codes to strings with symbolic error + code (see above):: + + >>> print(errno.errorcode[uerrno.EEXIST]) + EEXIST diff --git a/docs/library/index.rst b/docs/library/index.rst index e91387242..94bd8a656 100644 --- a/docs/library/index.rst +++ b/docs/library/index.rst @@ -7,34 +7,20 @@ Python standard libraries and micro-libraries --------------------------------------------- These libraries are inherited from MicroPython. -They are similar to the standard Python libraries with the same name -or with the "u" prefix dropped. +They are similar to the standard Python libraries with the same name. They implement a subset of or a variant of the corresponding standard Python library. -.. warning:: - - Though these MicroPython-based libraries are available in CircuitPython, - their functionality may change in the future, perhaps significantly. - As CircuitPython continues to develop, new versions of these libraries will - be created that are more compliant with the standard Python libraries. - You may need to change your code later if you rely - on any non-standard functionality they currently provide. - CircuitPython's long-term goal is that code written in CircuitPython using Python standard libraries will be runnable on CPython without changes. -Some libraries below are not enabled on CircuitPython builds with +These libraries are not enabled on CircuitPython builds with limited flash memory, usually on non-Express builds: -``uerrno``, ``ure``. - -Some libraries are not currently enabled in any CircuitPython build, but may be in the future: -``uio``, ``ujson``, ``uzlib``. +``binascii``, ``errno``, ``json``, ``re``. -Some libraries are only enabled only WiFi-capable ports (ESP8266, nRF) -because they are typically used for network software: -``binascii``, ``hashlib``, ``uheapq``, ``uselect``, ``ussl``. -Not all of these are enabled on all WiFi-capable ports. +These libraries are not currently enabled in any CircuitPython build, but may be in the future, +with the ``u`` prefix dropped: +``uctypes`, ``uhashlib``, ``uio``, ``uzlib``. .. toctree:: :maxdepth: 1 @@ -44,13 +30,14 @@ Not all of these are enabled on all WiFi-capable ports. array.rst binascii.rst collections.rst + errno.rst gc.rst hashlib.rst + io.rst + json.rst + re.rst sys.rst - uerrno.rst - uio.rst - ujson.rst - ure.rst + uctypes.rst uselect.rst usocket.rst ussl.rst @@ -59,8 +46,8 @@ Not all of these are enabled on all WiFi-capable ports. Omitted functions in the ``string`` library ------------------------------------------- -A few string operations are not enabled on CircuitPython -M0 non-Express builds, due to limited flash memory: +A few string operations are not enabled on small builds +(usually non-Express), due to limited flash memory: ``string.center()``, ``string.partition()``, ``string.splitlines()``, ``string.reversed()``. @@ -78,15 +65,3 @@ versions of CircuitPython. btree.rst framebuf.rst micropython.rst - network.rst - uctypes.rst - -Libraries specific to the ESP8266 ---------------------------------- - -The following libraries are specific to the ESP8266. - -.. toctree:: - :maxdepth: 2 - - esp.rst diff --git a/docs/library/io.rst b/docs/library/io.rst new file mode 100644 index 000000000..37e3eb7c9 --- /dev/null +++ b/docs/library/io.rst @@ -0,0 +1,114 @@ +:mod:`io` -- input/output streams +================================== + +.. module:: io + :synopsis: input/output streams + +|see_cpython_module| :mod:`cpython:io`. + +This module contains additional types of ``stream`` (file-like) objects +and helper functions. + +Conceptual hierarchy +-------------------- + +.. admonition:: Difference to CPython + :class: attention + + Conceptual hierarchy of stream base classes is simplified in MicroPython, + as described in this section. + +(Abstract) base stream classes, which serve as a foundation for behavior +of all the concrete classes, adhere to few dichotomies (pair-wise +classifications) in CPython. In MicroPython, they are somewhat simplified +and made implicit to achieve higher efficiencies and save resources. + +An important dichotomy in CPython is unbuffered vs buffered streams. In +MicroPython, all streams are currently unbuffered. This is because all +modern OSes, and even many RTOSes and filesystem drivers already perform +buffering on their side. Adding another layer of buffering is counter- +productive (an issue known as "bufferbloat") and takes precious memory. +Note that there still cases where buffering may be useful, so we may +introduce optional buffering support at a later time. + +But in CPython, another important dichotomy is tied with "bufferedness" - +it's whether a stream may incur short read/writes or not. A short read +is when a user asks e.g. 10 bytes from a stream, but gets less, similarly +for writes. In CPython, unbuffered streams are automatically short +operation susceptible, while buffered are guarantee against them. The +no short read/writes is an important trait, as it allows to develop +more concise and efficient programs - something which is highly desirable +for MicroPython. So, while MicroPython doesn't support buffered streams, +it still provides for no-short-operations streams. Whether there will +be short operations or not depends on each particular class' needs, but +developers are strongly advised to favor no-short-operations behavior +for the reasons stated above. For example, MicroPython sockets are +guaranteed to avoid short read/writes. Actually, at this time, there is +no example of a short-operations stream class in the core, and one would +be a port-specific class, where such a need is governed by hardware +peculiarities. + +The no-short-operations behavior gets tricky in case of non-blocking +streams, blocking vs non-blocking behavior being another CPython dichotomy, +fully supported by MicroPython. Non-blocking streams never wait for +data either to arrive or be written - they read/write whatever possible, +or signal lack of data (or ability to write data). Clearly, this conflicts +with "no-short-operations" policy, and indeed, a case of non-blocking +buffered (and this no-short-ops) streams is convoluted in CPython - in +some places, such combination is prohibited, in some it's undefined or +just not documented, in some cases it raises verbose exceptions. The +matter is much simpler in MicroPython: non-blocking stream are important +for efficient asynchronous operations, so this property prevails on +the "no-short-ops" one. So, while blocking streams will avoid short +reads/writes whenever possible (the only case to get a short read is +if end of file is reached, or in case of error (but errors don't +return short data, but raise exceptions)), non-blocking streams may +produce short data to avoid blocking the operation. + +The final dichotomy is binary vs text streams. MicroPython of course +supports these, but while in CPython text streams are inherently +buffered, they aren't in MicroPython. (Indeed, that's one of the cases +for which we may introduce buffering support.) + +Note that for efficiency, MicroPython doesn't provide abstract base +classes corresponding to the hierarchy above, and it's not possible +to implement, or subclass, a stream class in pure Python. + +Functions +--------- + +.. function:: open(name, mode='r', **kwargs) + + Open a file. Builtin ``open()`` function is aliased to this function. + All ports (which provide access to file system) are required to support + ``mode`` parameter, but support for other arguments vary by port. + +Classes +------- + +.. class:: FileIO(...) + + This is type of a file open in binary mode, e.g. using ``open(name, "rb")``. + You should not instantiate this class directly. + +.. class:: TextIOWrapper(...) + + This is type of a file open in text mode, e.g. using ``open(name, "rt")``. + You should not instantiate this class directly. + +.. class:: StringIO([string]) +.. class:: BytesIO([string]) + + In-memory file-like objects for input/output. `StringIO` is used for + text-mode I/O (similar to a normal file opened with "t" modifier). + `BytesIO` is used for binary-mode I/O (similar to a normal file + opened with "b" modifier). Initial contents of file-like objects + can be specified with `string` parameter (should be normal string + for `StringIO` or bytes object for `BytesIO`). All the usual file + methods like ``read()``, ``write()``, ``seek()``, ``flush()``, + ``close()`` are available on these objects, and additionally, a + following method: + + .. method:: getvalue() + + Get the current contents of the underlying buffer which holds data. diff --git a/docs/library/json.rst b/docs/library/json.rst new file mode 100644 index 000000000..21574e556 --- /dev/null +++ b/docs/library/json.rst @@ -0,0 +1,35 @@ +:mod:`json` -- JSON encoding and decoding +========================================== + +.. module:: json + :synopsis: JSON encoding and decoding + +|see_cpython_module| :mod:`cpython:json`. + +This modules allows to convert between Python objects and the JSON +data format. + +Functions +--------- + +.. function:: dump(obj, stream) + + Serialise ``obj`` to a JSON string, writing it to the given *stream*. + +.. function:: dumps(obj) + + Return ``obj`` represented as a JSON string. + +.. function:: load(stream) + + Parse the given ``stream``, interpreting it as a JSON string and + deserialising the data to a Python object. The resulting object is + returned. + + Parsing continues until end-of-file is encountered. + A :exc:`ValueError` is raised if the data in ``stream`` is not correctly formed. + +.. function:: loads(str) + + Parse the JSON *str* and return an object. Raises :exc:`ValueError` if the + string is not correctly formed. diff --git a/docs/library/re.rst b/docs/library/re.rst new file mode 100644 index 000000000..bdcc9f52c --- /dev/null +++ b/docs/library/re.rst @@ -0,0 +1,101 @@ +:mod:`re` -- simple regular expressions +======================================== + +.. module:: re + :synopsis: regular expressions + +|see_cpython_module| :mod:`cpython:re`. + +This module implements regular expression operations. Regular expression +syntax supported is a subset of CPython ``re`` module (and actually is +a subset of POSIX extended regular expressions). + +Supported operators are: + +``'.'`` + Match any character. + +``'[...]'`` + Match set of characters. Individual characters and ranges are supported, + including negated sets (e.g. ``[^a-c]``). + +``'^'`` + +``'$'`` + +``'?'`` + +``'*'`` + +``'+'`` + +``'??'`` + +``'*?'`` + +``'+?'`` + +``'|'`` + +``'(...)'`` + Grouping. Each group is capturing (a substring it captures can be accessed + with `match.group()` method). + +**NOT SUPPORTED**: Counted repetitions (``{m,n}``), more advanced assertions +(``\b``, ``\B``), named groups (``(?P...)``), non-capturing groups +(``(?:...)``), etc. + + +Functions +--------- + +.. function:: compile(regex_str, [flags]) + + Compile regular expression, return `regex ` object. + +.. function:: match(regex_str, string) + + Compile *regex_str* and match against *string*. Match always happens + from starting position in a string. + +.. function:: search(regex_str, string) + + Compile *regex_str* and search it in a *string*. Unlike `match`, this will search + string for first position which matches regex (which still may be + 0 if regex is anchored). + +.. data:: DEBUG + + Flag value, display debug information about compiled expression. + + +.. _regex: + +Regex objects +------------- + +Compiled regular expression. Instances of this class are created using +`re.compile()`. + +.. method:: regex.match(string) + regex.search(string) + + Similar to the module-level functions :meth:`match` and :meth:`search`. + Using methods is (much) more efficient if the same regex is applied to + multiple strings. + +.. method:: regex.split(string, max_split=-1) + + Split a *string* using regex. If *max_split* is given, it specifies + maximum number of splits to perform. Returns list of strings (there + may be up to *max_split+1* elements if it's specified). + +Match objects +------------- + +Match objects as returned by `match()` and `search()` methods. + +.. method:: match.group([index]) + + Return matching (sub)string. *index* is 0 for entire match, + 1 and above for each capturing group. Only numeric groups are supported. diff --git a/docs/library/uerrno.rst b/docs/library/uerrno.rst deleted file mode 100644 index 72f71f0aa..000000000 --- a/docs/library/uerrno.rst +++ /dev/null @@ -1,34 +0,0 @@ -:mod:`uerrno` -- system error codes -=================================== - -.. include:: ../templates/unsupported_in_circuitpython.inc - -.. module:: uerrno - :synopsis: system error codes - -|see_cpython_module| :mod:`cpython:errno`. - -This module provides access to symbolic error codes for `OSError` exception. - -Constants ---------- - -.. data:: EEXIST, EAGAIN, etc. - - Error codes, based on ANSI C/POSIX standard. All error codes start with - "E". Errors are usually accessible as ``exc.args[0]`` - where ``exc`` is an instance of `OSError`. Usage example:: - - try: - os.mkdir("my_dir") - except OSError as exc: - if exc.args[0] == uerrno.EEXIST: - print("Directory already exists") - -.. data:: errorcode - - Dictionary mapping numeric error codes to strings with symbolic error - code (see above):: - - >>> print(uerrno.errorcode[uerrno.EEXIST]) - EEXIST diff --git a/docs/library/uio.rst b/docs/library/uio.rst deleted file mode 100644 index d1f7c111f..000000000 --- a/docs/library/uio.rst +++ /dev/null @@ -1,116 +0,0 @@ -:mod:`uio` -- input/output streams -================================== - -.. include:: ../templates/unsupported_in_circuitpython.inc - -.. module:: uio - :synopsis: input/output streams - -|see_cpython_module| :mod:`cpython:io`. - -This module contains additional types of ``stream`` (file-like) objects -and helper functions. - -Conceptual hierarchy --------------------- - -.. admonition:: Difference to CPython - :class: attention - - Conceptual hierarchy of stream base classes is simplified in MicroPython, - as described in this section. - -(Abstract) base stream classes, which serve as a foundation for behavior -of all the concrete classes, adhere to few dichotomies (pair-wise -classifications) in CPython. In MicroPython, they are somewhat simplified -and made implicit to achieve higher efficiencies and save resources. - -An important dichotomy in CPython is unbuffered vs buffered streams. In -MicroPython, all streams are currently unbuffered. This is because all -modern OSes, and even many RTOSes and filesystem drivers already perform -buffering on their side. Adding another layer of buffering is counter- -productive (an issue known as "bufferbloat") and takes precious memory. -Note that there still cases where buffering may be useful, so we may -introduce optional buffering support at a later time. - -But in CPython, another important dichotomy is tied with "bufferedness" - -it's whether a stream may incur short read/writes or not. A short read -is when a user asks e.g. 10 bytes from a stream, but gets less, similarly -for writes. In CPython, unbuffered streams are automatically short -operation susceptible, while buffered are guarantee against them. The -no short read/writes is an important trait, as it allows to develop -more concise and efficient programs - something which is highly desirable -for MicroPython. So, while MicroPython doesn't support buffered streams, -it still provides for no-short-operations streams. Whether there will -be short operations or not depends on each particular class' needs, but -developers are strongly advised to favor no-short-operations behavior -for the reasons stated above. For example, MicroPython sockets are -guaranteed to avoid short read/writes. Actually, at this time, there is -no example of a short-operations stream class in the core, and one would -be a port-specific class, where such a need is governed by hardware -peculiarities. - -The no-short-operations behavior gets tricky in case of non-blocking -streams, blocking vs non-blocking behavior being another CPython dichotomy, -fully supported by MicroPython. Non-blocking streams never wait for -data either to arrive or be written - they read/write whatever possible, -or signal lack of data (or ability to write data). Clearly, this conflicts -with "no-short-operations" policy, and indeed, a case of non-blocking -buffered (and this no-short-ops) streams is convoluted in CPython - in -some places, such combination is prohibited, in some it's undefined or -just not documented, in some cases it raises verbose exceptions. The -matter is much simpler in MicroPython: non-blocking stream are important -for efficient asynchronous operations, so this property prevails on -the "no-short-ops" one. So, while blocking streams will avoid short -reads/writes whenever possible (the only case to get a short read is -if end of file is reached, or in case of error (but errors don't -return short data, but raise exceptions)), non-blocking streams may -produce short data to avoid blocking the operation. - -The final dichotomy is binary vs text streams. MicroPython of course -supports these, but while in CPython text streams are inherently -buffered, they aren't in MicroPython. (Indeed, that's one of the cases -for which we may introduce buffering support.) - -Note that for efficiency, MicroPython doesn't provide abstract base -classes corresponding to the hierarchy above, and it's not possible -to implement, or subclass, a stream class in pure Python. - -Functions ---------- - -.. function:: open(name, mode='r', **kwargs) - - Open a file. Builtin ``open()`` function is aliased to this function. - All ports (which provide access to file system) are required to support - ``mode`` parameter, but support for other arguments vary by port. - -Classes -------- - -.. class:: FileIO(...) - - This is type of a file open in binary mode, e.g. using ``open(name, "rb")``. - You should not instantiate this class directly. - -.. class:: TextIOWrapper(...) - - This is type of a file open in text mode, e.g. using ``open(name, "rt")``. - You should not instantiate this class directly. - -.. class:: StringIO([string]) -.. class:: BytesIO([string]) - - In-memory file-like objects for input/output. `StringIO` is used for - text-mode I/O (similar to a normal file opened with "t" modifier). - `BytesIO` is used for binary-mode I/O (similar to a normal file - opened with "b" modifier). Initial contents of file-like objects - can be specified with `string` parameter (should be normal string - for `StringIO` or bytes object for `BytesIO`). All the usual file - methods like ``read()``, ``write()``, ``seek()``, ``flush()``, - ``close()`` are available on these objects, and additionally, a - following method: - - .. method:: getvalue() - - Get the current contents of the underlying buffer which holds data. diff --git a/docs/library/ujson.rst b/docs/library/ujson.rst deleted file mode 100644 index 4ed91f053..000000000 --- a/docs/library/ujson.rst +++ /dev/null @@ -1,37 +0,0 @@ -:mod:`ujson` -- JSON encoding and decoding -========================================== - -.. include:: ../templates/unsupported_in_circuitpython.inc - -.. module:: ujson - :synopsis: JSON encoding and decoding - -|see_cpython_module| :mod:`cpython:json`. - -This modules allows to convert between Python objects and the JSON -data format. - -Functions ---------- - -.. function:: dump(obj, stream) - - Serialise ``obj`` to a JSON string, writing it to the given *stream*. - -.. function:: dumps(obj) - - Return ``obj`` represented as a JSON string. - -.. function:: load(stream) - - Parse the given ``stream``, interpreting it as a JSON string and - deserialising the data to a Python object. The resulting object is - returned. - - Parsing continues until end-of-file is encountered. - A :exc:`ValueError` is raised if the data in ``stream`` is not correctly formed. - -.. function:: loads(str) - - Parse the JSON *str* and return an object. Raises :exc:`ValueError` if the - string is not correctly formed. diff --git a/docs/library/ure.rst b/docs/library/ure.rst deleted file mode 100644 index 4af182b01..000000000 --- a/docs/library/ure.rst +++ /dev/null @@ -1,103 +0,0 @@ -:mod:`ure` -- simple regular expressions -======================================== - -.. include:: ../templates/unsupported_in_circuitpython.inc - -.. module:: ure - :synopsis: regular expressions - -|see_cpython_module| :mod:`cpython:re`. - -This module implements regular expression operations. Regular expression -syntax supported is a subset of CPython ``re`` module (and actually is -a subset of POSIX extended regular expressions). - -Supported operators are: - -``'.'`` - Match any character. - -``'[...]'`` - Match set of characters. Individual characters and ranges are supported, - including negated sets (e.g. ``[^a-c]``). - -``'^'`` - -``'$'`` - -``'?'`` - -``'*'`` - -``'+'`` - -``'??'`` - -``'*?'`` - -``'+?'`` - -``'|'`` - -``'(...)'`` - Grouping. Each group is capturing (a substring it captures can be accessed - with `match.group()` method). - -**NOT SUPPORTED**: Counted repetitions (``{m,n}``), more advanced assertions -(``\b``, ``\B``), named groups (``(?P...)``), non-capturing groups -(``(?:...)``), etc. - - -Functions ---------- - -.. function:: compile(regex_str, [flags]) - - Compile regular expression, return `regex ` object. - -.. function:: match(regex_str, string) - - Compile *regex_str* and match against *string*. Match always happens - from starting position in a string. - -.. function:: search(regex_str, string) - - Compile *regex_str* and search it in a *string*. Unlike `match`, this will search - string for first position which matches regex (which still may be - 0 if regex is anchored). - -.. data:: DEBUG - - Flag value, display debug information about compiled expression. - - -.. _regex: - -Regex objects -------------- - -Compiled regular expression. Instances of this class are created using -`ure.compile()`. - -.. method:: regex.match(string) - regex.search(string) - - Similar to the module-level functions :meth:`match` and :meth:`search`. - Using methods is (much) more efficient if the same regex is applied to - multiple strings. - -.. method:: regex.split(string, max_split=-1) - - Split a *string* using regex. If *max_split* is given, it specifies - maximum number of splits to perform. Returns list of strings (there - may be up to *max_split+1* elements if it's specified). - -Match objects -------------- - -Match objects as returned by `match()` and `search()` methods. - -.. method:: match.group([index]) - - Return matching (sub)string. *index* is 0 for entire match, - 1 and above for each capturing group. Only numeric groups are supported. diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index f38c0b64a..ca6ddd3ed 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -30,7 +30,7 @@ import sys from concurrent.futures import ThreadPoolExecutor -SUPPORTED_PORTS = ['atmel-samd', 'esp32s2', 'litex', 'mimxrt10xx', 'nrf', 'stm'] +SUPPORTED_PORTS = ['atmel-samd', 'esp32s2', 'litex', 'mimxrt10xx', 'nrf', 'raspberrypi', 'stm'] def get_circuitpython_root_dir(): """ The path to the root './circuitpython' directory @@ -44,7 +44,7 @@ def get_shared_bindings(): """ Get a list of modules in shared-bindings based on folder names """ shared_bindings_dir = get_circuitpython_root_dir() / "shared-bindings" - return [item.name for item in shared_bindings_dir.iterdir()] + ["ulab"] + return [item.name for item in shared_bindings_dir.iterdir()] + ["binascii", "errno", "json", "re", "ulab"] def read_mpconfig(): diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h index 4b0c324fa..fc189e662 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h @@ -44,4 +44,5 @@ #define IGNORE_PIN_PA24 1 #define IGNORE_PIN_PA25 1 -#define MICROPY_PY_URE 0 +// Can't fit. +#define CIRCUITPY_RE 0 diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h index bce89e0b9..d2a529485 100644 --- a/ports/atmel-samd/mpconfigport.h +++ b/ports/atmel-samd/mpconfigport.h @@ -45,11 +45,7 @@ #define MICROPY_PY_BUILTINS_COMPLEX (0) #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (0) #define MICROPY_PY_FUNCTION_ATTRS (0) -// MICROPY_PY_UJSON depends on MICROPY_PY_IO -#define MICROPY_PY_IO (0) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (0) -#define MICROPY_PY_UBINASCII (0) -#define MICROPY_PY_UJSON (0) #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) #define MICROPY_PY_UERRNO_LIST \ X(EPERM) \ @@ -84,9 +80,6 @@ #define SPI_FLASH_MAX_BAUDRATE 24000000 #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (1) #define MICROPY_PY_FUNCTION_ATTRS (1) -// MICROPY_PY_UJSON depends on MICROPY_PY_IO -#define MICROPY_PY_IO (1) -#define MICROPY_PY_UJSON (1) // MICROPY_PY_UERRNO_LIST - Use the default #endif // SAM_D5X_E5X diff --git a/ports/atmel-samd/mpconfigport.mk b/ports/atmel-samd/mpconfigport.mk index 17e3995bf..fb9cdf2e6 100644 --- a/ports/atmel-samd/mpconfigport.mk +++ b/ports/atmel-samd/mpconfigport.mk @@ -20,26 +20,16 @@ endif # Put samd21-only choices here. ifeq ($(CHIP_FAMILY),samd21) -# frequencyio not yet verified as working on SAMD21, though make it possible to override. -ifndef CIRCUITPY_AUDIOMIXER -CIRCUITPY_AUDIOMIXER = 0 -endif - -ifndef CIRCUITPY_AUDIOMP3 -CIRCUITPY_AUDIOMP3 = 0 -endif - -ifndef CIRCUITPY_BUILTINS_POW3 -CIRCUITPY_BUILTINS_POW3 = 0 -endif -ifndef CIRCUITPY_FREQUENCYIO -CIRCUITPY_FREQUENCYIO = 0 -endif +# The ?='s allow overriding in mpconfigboard.mk. -ifndef CIRCUITPY_TOUCHIO_USE_NATIVE -CIRCUITPY_TOUCHIO_USE_NATIVE = 1 -endif +CIRCUITPY_AUDIOMIXER ?= 0 +CIRCUITPY_BINASCII ?= 0 +CIRCUITPY_AUDIOMP3 ?= 0 +CIRCUITPY_BUILTINS_POW3 ?= 0 +CIRCUITPY_FREQUENCYIO ?= 0 +CIRCUITPY_JSON ?= 0 +CIRCUITPY_TOUCHIO_USE_NATIVE ?= 1 # No room for HCI _bleio on SAMD21. CIRCUITPY_BLEIO_HCI = 0 @@ -71,27 +61,13 @@ ifeq ($(CHIP_FAMILY),samd51) # No native touchio on SAMD51. CIRCUITPY_TOUCHIO_USE_NATIVE = 0 -# The ifndef's allow overriding in mpconfigboard.mk. - -ifndef CIRCUITPY_NETWORK -CIRCUITPY_NETWORK = 0 -endif - -ifndef CIRCUITPY_PS2IO -CIRCUITPY_PS2IO = 1 -endif - -ifndef CIRCUITPY_SAMD -CIRCUITPY_SAMD = 1 -endif - -ifndef CIRCUITPY_RGBMATRIX -CIRCUITPY_RGBMATRIX = $(CIRCUITPY_FULL_BUILD) -endif +# The ?='s allow overriding in mpconfigboard.mk. -ifndef CIRCUITPY_FRAMEBUFFERIO -CIRCUITPY_FRAMEBUFFERIO = $(CIRCUITPY_FULL_BUILD) -endif +CIRCUITPY_NETWORK ?= 0 +CIRCUITPY_PS2IO ?= 1 +CIRCUITPY_SAMD ?= 1 +CIRCUITPY_RGBMATRIX ?= $(CIRCUITPY_FULL_BUILD) +CIRCUITPY_FRAMEBUFFERIO ?= $(CIRCUITPY_FULL_BUILD) endif # samd51 diff --git a/ports/esp32s2/mpconfigport.h b/ports/esp32s2/mpconfigport.h index 9c0fd9da3..0cf695bc9 100644 --- a/ports/esp32s2/mpconfigport.h +++ b/ports/esp32s2/mpconfigport.h @@ -30,7 +30,6 @@ #define MICROPY_NLR_THUMB (0) -#define MICROPY_PY_UJSON (1) #define MICROPY_USE_INTERNAL_PRINTF (0) #define MICROPY_PY_SYS_PLATFORM "Espressif ESP32-S2" diff --git a/ports/litex/mpconfigport.h b/ports/litex/mpconfigport.h index a7caf8526..5f739e49e 100644 --- a/ports/litex/mpconfigport.h +++ b/ports/litex/mpconfigport.h @@ -31,8 +31,6 @@ #define CIRCUITPY_INTERNAL_NVM_SIZE (0) #define MICROPY_NLR_THUMB (0) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) -#define MICROPY_PY_UBINASCII (1) -#define MICROPY_PY_UJSON (1) #include "py/circuitpy_mpconfig.h" diff --git a/ports/mimxrt10xx/mpconfigport.h b/ports/mimxrt10xx/mpconfigport.h index 7496256d0..51e0ef9ff 100644 --- a/ports/mimxrt10xx/mpconfigport.h +++ b/ports/mimxrt10xx/mpconfigport.h @@ -41,8 +41,6 @@ extern uint8_t _ld_default_stack_size; #define CIRCUITPY_DEFAULT_STACK_SIZE ((uint32_t) &_ld_default_stack_size) #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (0) #define MICROPY_PY_FUNCTION_ATTRS (0) -#define MICROPY_PY_IO (1) -#define MICROPY_PY_UJSON (1) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h index 4ed42cd82..3ac41a5e4 100644 --- a/ports/nrf/mpconfigport.h +++ b/ports/nrf/mpconfigport.h @@ -35,11 +35,8 @@ #include "peripherals/nrf/nvm.h" // for FLASH_PAGE_SIZE #define MICROPY_PY_FUNCTION_ATTRS (1) -#define MICROPY_PY_IO (1) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) #define MICROPY_PY_SYS_STDIO_BUFFER (1) -#define MICROPY_PY_UBINASCII (1) -#define MICROPY_PY_UJSON (1) // 24kiB stack #define CIRCUITPY_DEFAULT_STACK_SIZE (24*1024) diff --git a/ports/raspberrypi/mpconfigport.h b/ports/raspberrypi/mpconfigport.h index 3fdc8febb..75cbd1ba8 100644 --- a/ports/raspberrypi/mpconfigport.h +++ b/ports/raspberrypi/mpconfigport.h @@ -27,7 +27,9 @@ #ifndef __INCLUDED_MPCONFIGPORT_H #define __INCLUDED_MPCONFIGPORT_H -#define MICROPY_PY_UJSON (1) +#define CIRCUITPY_BINASCII (1) +#define CIRCUITPY_ERRNO (1) +#define CIRCUITPY_JSON (1) #define CIRCUITPY_INTERNAL_NVM_SIZE 0 diff --git a/ports/stm/mpconfigport.h b/ports/stm/mpconfigport.h index 9489b4765..7cdab04f6 100644 --- a/ports/stm/mpconfigport.h +++ b/ports/stm/mpconfigport.h @@ -31,9 +31,7 @@ #include #define MICROPY_PY_FUNCTION_ATTRS (1) -#define MICROPY_PY_IO (1) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) -#define MICROPY_PY_UJSON (1) extern uint8_t _ld_default_stack_size; diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 35f1227a9..c193e61c4 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -195,21 +195,14 @@ typedef long mp_off_t; #define MICROPY_PY_BUILTINS_STR_CENTER (CIRCUITPY_FULL_BUILD) #define MICROPY_PY_BUILTINS_STR_PARTITION (CIRCUITPY_FULL_BUILD) #define MICROPY_PY_BUILTINS_STR_SPLITLINES (CIRCUITPY_FULL_BUILD) -#define MICROPY_PY_UERRNO (CIRCUITPY_FULL_BUILD) #ifndef MICROPY_PY_COLLECTIONS_ORDEREDDICT #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (CIRCUITPY_FULL_BUILD) #endif -#ifndef MICROPY_PY_UBINASCII -#define MICROPY_PY_UBINASCII (CIRCUITPY_FULL_BUILD) -#endif // Opposite setting is deliberate. -#define MICROPY_PY_UERRNO_ERRORCODE (!CIRCUITPY_FULL_BUILD) -#ifndef MICROPY_PY_URE -#define MICROPY_PY_URE (CIRCUITPY_FULL_BUILD) -#endif -#define MICROPY_PY_URE_MATCH_GROUPS (CIRCUITPY_FULL_BUILD) -#define MICROPY_PY_URE_MATCH_SPAN_START_END (CIRCUITPY_FULL_BUILD) -#define MICROPY_PY_URE_SUB (CIRCUITPY_FULL_BUILD) +#define MICROPY_PY_UERRNO_ERRORCODE (!CIRCUITPY_RE) +#define MICROPY_PY_URE_MATCH_GROUPS (CIRCUITPY_RE) +#define MICROPY_PY_URE_MATCH_SPAN_START_END (CIRCUITPY_RE) +#define MICROPY_PY_URE_SUB (CIRCUITPY_RE) // LONGINT_IMPL_xxx are defined in the Makefile. // @@ -301,6 +294,13 @@ extern const struct _mp_obj_module_t audiopwmio_module; #define AUDIOPWMIO_MODULE #endif +#if CIRCUITPY_BINASCII +#define MICROPY_PY_UBINASCII CIRCUITPY_BINASCII +#define BINASCII_MODULE { MP_ROM_QSTR(MP_QSTR_binascii), MP_ROM_PTR(&mp_module_ubinascii) }, +#else +#define BINASCII_MODULE +#endif + #if CIRCUITPY_BITBANGIO #define BITBANGIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_bitbangio), (mp_obj_t)&bitbangio_module }, extern const struct _mp_obj_module_t bitbangio_module; @@ -399,6 +399,13 @@ extern const struct _mp_obj_module_t terminalio_module; #define TERMINALIO_MODULE #endif +#if CIRCUITPY_ERRNO +#define MICROPY_PY_UERRNO (1) +#define ERRNO_MODULE { MP_ROM_QSTR(MP_QSTR_errno), MP_ROM_PTR(&mp_module_uerrno) }, +#else +#define ERRNO_MODULE +#endif + #if CIRCUITPY_ESPIDF extern const struct _mp_obj_module_t espidf_module; #define ESPIDF_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_espidf),(mp_obj_t)&espidf_module }, @@ -470,6 +477,18 @@ extern const struct _mp_obj_module_t ipaddress_module; #define IPADDRESS_MODULE #endif +#if CIRCUITPY_JSON +#define MICROPY_PY_UJSON (1) +#define MICROPY_PY_IO (1) +#define JSON_MODULE { MP_ROM_QSTR(MP_QSTR_json), MP_ROM_PTR(&mp_module_ujson) }, +#else +#ifndef MICROPY_PY_IO +// We don't need MICROPY_PY_IO unless someone else wants it. +#define MICROPY_PY_IO (0) +#endif +#define JSON_MODULE +#endif + #if CIRCUITPY_MATH extern const struct _mp_obj_module_t math_module; #define MATH_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_math), (mp_obj_t)&math_module }, @@ -588,6 +607,13 @@ extern const struct _mp_obj_module_t random_module; #define RANDOM_MODULE #endif +#if CIRCUITPY_RE +#define MICROPY_PY_URE (1) +#define RE_MODULE { MP_ROM_QSTR(MP_QSTR_re), MP_ROM_PTR(&mp_module_ure) }, +#else +#define RE_MODULE +#endif + #if CIRCUITPY_RGBMATRIX extern const struct _mp_obj_module_t rgbmatrix_module; #define RGBMATRIX_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_rgbmatrix),(mp_obj_t)&rgbmatrix_module }, @@ -730,25 +756,6 @@ extern const struct _mp_obj_module_t ustack_module; #define USTACK_MODULE #endif -// These modules are not yet in shared-bindings, but we prefer the non-uxxx names. -#if MICROPY_PY_UBINASCII -#define BINASCII_MODULE { MP_ROM_QSTR(MP_QSTR_binascii), MP_ROM_PTR(&mp_module_ubinascii) }, -#else -#define BINASCII_MODULE -#endif - -#if MICROPY_PY_UERRNO -#define ERRNO_MODULE { MP_ROM_QSTR(MP_QSTR_errno), MP_ROM_PTR(&mp_module_uerrno) }, -#else -#define ERRNO_MODULE -#endif - -#if MICROPY_PY_UJSON -#define JSON_MODULE { MP_ROM_QSTR(MP_QSTR_json), MP_ROM_PTR(&mp_module_ujson) }, -#else -#define JSON_MODULE -#endif - #if defined(CIRCUITPY_ULAB) && CIRCUITPY_ULAB // ulab requires reverse special methods #if defined(MICROPY_PY_REVERSE_SPECIAL_METHODS) && !MICROPY_PY_REVERSE_SPECIAL_METHODS @@ -760,12 +767,6 @@ extern const struct _mp_obj_module_t ustack_module; #define ULAB_MODULE #endif -#if MICROPY_PY_URE -#define RE_MODULE { MP_ROM_QSTR(MP_QSTR_re), MP_ROM_PTR(&mp_module_ure) }, -#else -#define RE_MODULE -#endif - // This is not a top-level module; it's microcontroller.watchdog. #if CIRCUITPY_WATCHDOG extern const struct _mp_obj_module_t watchdog_module; diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk index 9c9b17f4b..141ad05f8 100644 --- a/py/circuitpy_mpconfig.mk +++ b/py/circuitpy_mpconfig.mk @@ -86,6 +86,9 @@ endif endif CFLAGS += -DCIRCUITPY_AUDIOMP3=$(CIRCUITPY_AUDIOMP3) +CIRCUITPY_BINASCII ?= $(CIRCUITPY_FULL_BUILD) +CFLAGS += -DCIRCUITPY_BINASCII=$(CIRCUITPY_BINASCII) + CIRCUITPY_BITBANGIO ?= $(CIRCUITPY_FULL_BUILD) CFLAGS += -DCIRCUITPY_BITBANGIO=$(CIRCUITPY_BITBANGIO) @@ -124,6 +127,9 @@ CFLAGS += -DCIRCUITPY_COUNTIO=$(CIRCUITPY_COUNTIO) CIRCUITPY_DISPLAYIO ?= $(CIRCUITPY_FULL_BUILD) CFLAGS += -DCIRCUITPY_DISPLAYIO=$(CIRCUITPY_DISPLAYIO) +CIRCUITPY_ERRNO ?= $(CIRCUITPY_FULL_BUILD) +CFLAGS += -DCIRCUITPY_ERRNO=$(CIRCUITPY_ERRNO) + # CIRCUITPY_ESPIDF is handled in the esp32s2 tree. # Only for ESP32S chips. # Assume not a ESP build. @@ -158,6 +164,9 @@ CFLAGS += -DCIRCUITPY_I2CPERIPHERAL=$(CIRCUITPY_I2CPERIPHERAL) CIRCUITPY_IPADDRESS ?= $(CIRCUITPY_WIFI) CFLAGS += -DCIRCUITPY_IPADDRESS=$(CIRCUITPY_IPADDRESS) +CIRCUITPY_JSON ?= $(CIRCUITPY_FULL_BUILD) +CFLAGS += -DCIRCUITPY_JSON=$(CIRCUITPY_JSON) + CIRCUITPY_MATH ?= 1 CFLAGS += -DCIRCUITPY_MATH=$(CIRCUITPY_MATH) @@ -204,6 +213,9 @@ CFLAGS += -DCIRCUITPY_PWMIO=$(CIRCUITPY_PWMIO) CIRCUITPY_RANDOM ?= 1 CFLAGS += -DCIRCUITPY_RANDOM=$(CIRCUITPY_RANDOM) +CIRCUITPY_RE ?= $(CIRCUITPY_FULL_BUILD) +CFLAGS += -DCIRCUITPY_RE=$(CIRCUITPY_RE) + # CIRCUITPY_RP2PIO is handled in the raspberrypi tree. # Only for rp2 chips. # Assume not a rp2 build. diff --git a/shared-bindings/support_matrix.rst b/shared-bindings/support_matrix.rst index 1b75e0256..a2fb7987d 100644 --- a/shared-bindings/support_matrix.rst +++ b/shared-bindings/support_matrix.rst @@ -1,7 +1,7 @@ .. _module-support-matrix: -Support Matrix -=============== +Module Support Matrix - Which Modules Are Available on Which Boards +=================================================================== The following table lists the available built-in modules for each CircuitPython capable board. -- cgit v1.2.3 From 1e97d384ff469731832147f7dc07aa1f358cd572 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Mon, 25 Jan 2021 11:02:32 -0500 Subject: add GP15 --- ports/raspberrypi/boards/raspberry_pi_pico/pins.c | 1 + 1 file changed, 1 insertion(+) (limited to 'ports') diff --git a/ports/raspberrypi/boards/raspberry_pi_pico/pins.c b/ports/raspberrypi/boards/raspberry_pi_pico/pins.c index 38ec75c4a..913676ad2 100644 --- a/ports/raspberrypi/boards/raspberry_pi_pico/pins.c +++ b/ports/raspberrypi/boards/raspberry_pi_pico/pins.c @@ -16,6 +16,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_GP12), MP_ROM_PTR(&pin_GPIO12) }, { MP_ROM_QSTR(MP_QSTR_GP13), MP_ROM_PTR(&pin_GPIO13) }, { MP_ROM_QSTR(MP_QSTR_GP14), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_GP15), MP_ROM_PTR(&pin_GPIO15) }, { MP_ROM_QSTR(MP_QSTR_GP16), MP_ROM_PTR(&pin_GPIO16) }, { MP_ROM_QSTR(MP_QSTR_GP17), MP_ROM_PTR(&pin_GPIO17) }, { MP_ROM_QSTR(MP_QSTR_GP18), MP_ROM_PTR(&pin_GPIO18) }, -- cgit v1.2.3 From 69c71bd52238bda5c021a825849ce28229a33e0f Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Mon, 25 Jan 2021 11:54:10 -0500 Subject: fix some build errors --- .../boards/circuitplayground_express_displayio/mpconfigboard.h | 3 --- .../boards/circuitplayground_express_displayio/mpconfigboard.mk | 1 + ports/raspberrypi/mpconfigport.h | 4 ---- 3 files changed, 1 insertion(+), 7 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h index fc189e662..1586a3289 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h @@ -43,6 +43,3 @@ // USB is always used internally so skip the pin objects for it. #define IGNORE_PIN_PA24 1 #define IGNORE_PIN_PA25 1 - -// Can't fit. -#define CIRCUITPY_RE 0 diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk index 51e9b05af..d3ce35f6d 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk @@ -18,6 +18,7 @@ CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_MSGPACK = 0 CIRCUITPY_PIXELBUF = 0 +CIRCUITPY_RE = 0 CIRCUITPY_ROTARYIO = 0 CIRCUITPY_RTC = 0 # So not all of displayio, sorry! diff --git a/ports/raspberrypi/mpconfigport.h b/ports/raspberrypi/mpconfigport.h index 75cbd1ba8..743151931 100644 --- a/ports/raspberrypi/mpconfigport.h +++ b/ports/raspberrypi/mpconfigport.h @@ -27,10 +27,6 @@ #ifndef __INCLUDED_MPCONFIGPORT_H #define __INCLUDED_MPCONFIGPORT_H -#define CIRCUITPY_BINASCII (1) -#define CIRCUITPY_ERRNO (1) -#define CIRCUITPY_JSON (1) - #define CIRCUITPY_INTERNAL_NVM_SIZE 0 #define CIRCUITPY_DEFAULT_STACK_SIZE (24*1024) -- cgit v1.2.3 From c5992a3101bc7f4d94ac52934b8ca63148f193eb Mon Sep 17 00:00:00 2001 From: Kamil Tomaszewski Date: Mon, 25 Jan 2021 17:59:40 +0100 Subject: spresense: update Spresense SDK to 2.0.2 --- ports/cxd56/README.md | 2 +- ports/cxd56/configs/circuitpython/defconfig | 1 + ports/cxd56/spresense-exported-sdk | 2 +- ports/cxd56/supervisor/internal_flash.c | 16 ++++++++-------- 4 files changed, 11 insertions(+), 10 deletions(-) (limited to 'ports') diff --git a/ports/cxd56/README.md b/ports/cxd56/README.md index 7fa439aac..c399b8a4d 100644 --- a/ports/cxd56/README.md +++ b/ports/cxd56/README.md @@ -75,7 +75,7 @@ Bootloader information: * You have to accept the End User License Agreement to be able to download and use the Spresense bootloader binary. -Download the spresense binaries zip archive from: [Spresense firmware v2-0-000](https://developer.sony.com/file/download/download-spresense-firmware-v2-0-000) +Download the spresense binaries zip archive from: [Spresense firmware v2-0-002](https://developer.sony.com/file/download/download-spresense-firmware-v2-0-002) Extract spresense binaries in your PC to ports/spresense/spresense-exported-sdk/firmware/ diff --git a/ports/cxd56/configs/circuitpython/defconfig b/ports/cxd56/configs/circuitpython/defconfig index a97f821df..096b53b80 100644 --- a/ports/cxd56/configs/circuitpython/defconfig +++ b/ports/cxd56/configs/circuitpython/defconfig @@ -165,6 +165,7 @@ CONFIG_USBDEV=y CONFIG_USBDEV_DMA=y CONFIG_USBDEV_DUALSPEED=y CONFIG_USEC_PER_TICK=1000 +CONFIG_USERMAIN_STACKSIZE=8192 CONFIG_USER_ENTRYPOINT="spresense_main" CONFIG_VIDEO_ISX012=y CONFIG_VIDEO_STREAM=y diff --git a/ports/cxd56/spresense-exported-sdk b/ports/cxd56/spresense-exported-sdk index 752c4cd56..2ec2a1538 160000 --- a/ports/cxd56/spresense-exported-sdk +++ b/ports/cxd56/spresense-exported-sdk @@ -1 +1 @@ -Subproject commit 752c4cd56dd0a270a559c28272ceb61ddcb7806c +Subproject commit 2ec2a1538362696118dc3fdf56f33dacaf8f4067 diff --git a/ports/cxd56/supervisor/internal_flash.c b/ports/cxd56/supervisor/internal_flash.c index 2726fa4a2..9c103fb19 100644 --- a/ports/cxd56/supervisor/internal_flash.c +++ b/ports/cxd56/supervisor/internal_flash.c @@ -30,10 +30,10 @@ /* Prototypes for Remote API */ -int FM_RawWrite(uint32_t offset, const void *buf, uint32_t size); -int FM_RawVerifyWrite(uint32_t offset, const void *buf, uint32_t size); -int FM_RawRead(uint32_t offset, void *buf, uint32_t size); -int FM_RawEraseSector(uint32_t sector); +int fw_fm_rawwrite(uint32_t offset, const void *buf, uint32_t size); +int fw_fm_rawverifywrite(uint32_t offset, const void *buf, uint32_t size); +int fw_fm_rawread(uint32_t offset, void *buf, uint32_t size); +int fw_fm_rawerasesector(uint32_t sector); #define CXD56_SPIFLASHSIZE (16 * 1024 * 1024) @@ -64,8 +64,8 @@ void port_internal_flash_flush(void) { return; } - FM_RawEraseSector(flash_sector); - FM_RawWrite(flash_sector << SECTOR_SHIFT, flash_cache, SECTOR_SIZE); + fw_fm_rawerasesector(flash_sector); + fw_fm_rawwrite(flash_sector << SECTOR_SHIFT, flash_cache, SECTOR_SIZE); flash_sector = NO_SECTOR; } @@ -73,7 +73,7 @@ void port_internal_flash_flush(void) { mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { supervisor_flash_flush(); - if (FM_RawRead(block << PAGE_SHIFT, dest, num_blocks << PAGE_SHIFT) < 0) { + if (fw_fm_rawread(block << PAGE_SHIFT, dest, num_blocks << PAGE_SHIFT) < 0) { return 1; } @@ -92,7 +92,7 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32 if (sector != flash_sector) { supervisor_flash_flush(); - if (FM_RawRead(sector << SECTOR_SHIFT, flash_cache, SECTOR_SIZE) < 0) { + if (fw_fm_rawread(sector << SECTOR_SHIFT, flash_cache, SECTOR_SIZE) < 0) { return 1; } -- cgit v1.2.3 From 0fa5aa359df3827a90be6c4e82719bb2ed8713e7 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Mon, 25 Jan 2021 16:07:01 -0500 Subject: Stop treating pin 15 specially. --- ports/raspberrypi/common-hal/microcontroller/Pin.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) (limited to 'ports') diff --git a/ports/raspberrypi/common-hal/microcontroller/Pin.c b/ports/raspberrypi/common-hal/microcontroller/Pin.c index 90c327406..6e531560e 100644 --- a/ports/raspberrypi/common-hal/microcontroller/Pin.c +++ b/ports/raspberrypi/common-hal/microcontroller/Pin.c @@ -63,12 +63,7 @@ void never_reset_pin_number(uint8_t pin_number) { } void reset_pin_number(uint8_t pin_number) { - if (pin_number >= 32 -#if TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX - // Pin 15 is used for Errata so we don't mess with it. - || pin_number == 15 -#endif - ) { + if (pin_number >= 32) { return; } @@ -142,12 +137,7 @@ bool pin_number_is_free(uint8_t pin_number) { if (pin_number >= 30) { return false; } -#if TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX - // Pin 15 is used for Errata so we don't mess with it. - if (pin_number == 15) { - return true; - } -#endif + uint32_t pad_state = padsbank0_hw->io[pin_number]; return (pad_state & PADS_BANK0_GPIO0_IE_BITS) == 0 && (pad_state & PADS_BANK0_GPIO0_OD_BITS) != 0; -- cgit v1.2.3 From 41400124301a4099bbe1f72fedc7cbd233602b7b Mon Sep 17 00:00:00 2001 From: Kevin Matocha Date: Mon, 25 Jan 2021 16:25:56 -0600 Subject: Allow pins >= 32, allow write pin on different register than data pins --- locale/circuitpython.pot | 6 +- ports/esp32s2/common-hal/displayio/ParallelBus.c | 106 +++++++++++++---------- ports/esp32s2/common-hal/displayio/ParallelBus.h | 10 ++- 3 files changed, 69 insertions(+), 53 deletions(-) (limited to 'ports') diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 4dfce747d..f5c3da62c 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -798,7 +798,7 @@ msgid "Data 0 pin must be byte aligned" msgstr "" #: ports/esp32s2/common-hal/displayio/ParallelBus.c -msgid "Data 0 pin must be byte aligned and < 32" +msgid "Data 0 pin must be byte aligned." msgstr "" #: shared-module/audiocore/WaveFile.c @@ -2140,10 +2140,6 @@ msgstr "" msgid "Woken up by alarm.\n" msgstr "" -#: ports/esp32s2/common-hal/displayio/ParallelBus.c -msgid "Write pin must be < 32" -msgstr "" - #: ports/nrf/common-hal/_bleio/PacketBuffer.c msgid "Writes not supported on Characteristic" msgstr "" diff --git a/ports/esp32s2/common-hal/displayio/ParallelBus.c b/ports/esp32s2/common-hal/displayio/ParallelBus.c index b644610f2..273a3a7ad 100644 --- a/ports/esp32s2/common-hal/displayio/ParallelBus.c +++ b/ports/esp32s2/common-hal/displayio/ParallelBus.c @@ -36,9 +36,7 @@ /* * * Current pin limitations for ESP32-S2 ParallelBus: - * 1. data0 pin must be byte aligned (data0 pin options: 0, 8, 16 or 24) - * 2. The 8 data lines must use pin numbers < 32 - * 3. The write pin must be pin number < 32. + * - data0 pin must be byte aligned (data0 pin options: 0, 8, 16 or 24) * */ @@ -48,7 +46,7 @@ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* sel uint8_t data_pin = data0->number; if ( (data_pin % 8 != 0) && (data_pin >= 32) ) { - mp_raise_ValueError(translate("Data 0 pin must be byte aligned and < 32")); + mp_raise_ValueError(translate("Data 0 pin must be byte aligned.")); } for (uint8_t i = 0; i < 8; i++) { @@ -57,10 +55,6 @@ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* sel } } - if (write->number >= 32) { - mp_raise_ValueError(translate("Write pin must be < 32")); - } - gpio_dev_t *g = &GPIO; // this is the GPIO registers, see "extern gpio_dev_t GPIO" from file:gpio_struct.h // Setup the pins as "Simple GPIO outputs" see section 19.3.3 of the ESP32-S2 Reference Manual @@ -74,11 +68,14 @@ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* sel /* From my understanding, there is a limitation of the ESP32-S2 that does not allow single-byte writes * into the GPIO registers. See section 10.3.3 regarding "non-aligned writes" into the registers. - * If a method for writing single-byte writes is uncovered, this code can be modified to provide - * single-byte access into the output register */ - self->bus = (uint32_t*) &g->out; //pointer to GPIO output register (for pins 0-31) + + if (data_pin < 31) { + self->bus = (uint32_t*) &g->out; //pointer to GPIO output register (for pins 0-31) + } else { + self->bus = (uint32_t*) &g->out1.val; //pointer to GPIO output register (for pins >= 32) + } /* SNIP - common setup of command, chip select, write and read pins, same as from SAMD and NRF ports */ self->command.base.type = &digitalio_digitalinout_type; @@ -98,17 +95,38 @@ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* sel common_hal_digitalio_digitalinout_switch_to_output(&self->read, true, DRIVE_MODE_PUSH_PULL); self->data0_pin = data_pin; - self->write_group = &GPIO; - /* If we want to allow a write pin >= 32, should consider putting separate "clear_write" and - * "set_write" pointers into the .h in place of "write_group" - * to select between out_w1tc/out1_w1tc (clear) and out_w1ts/out1_w1ts (set) registers. - */ + + if (write->number < 32) { + self->write_clear_register = (uint32_t*) &g->out_w1tc; + self->write_set_register = (uint32_t*) &g->out_w1ts; + } else { + self->write_clear_register = (uint32_t*) &g->out1_w1tc.val; + self->write_set_register = (uint32_t*) &g->out1_w1ts.val; + } + + // Check to see if the data and write pins are on the same register: + if ( ( ((self->data0_pin < 32) && (write->number < 32)) ) || + ( ((self->data0_pin > 31) && (write->number > 31)) ) ) { + self->data_write_same_register = true; // data pins and write pin are on the same register + } else { + self->data_write_same_register = false; // data pins and write pins are on different registers + } + + + mp_printf(&mp_plat_print, "write_clear: %x, write_set: %x\n", self->write_clear_register, self->write_set_register); self->write_mask = 1 << (write->number % 32); /* the write pin triggers the LCD to latch the data */ - /* Note: As currently written for the ESP32-S2 port, the write pin must be a pin number less than 32 - * This could be updated to accommodate 32 and higher by using the different construction of the - * address for writing to output pins >= 32, see related note above for 'self->write_group' - */ + mp_printf(&mp_plat_print, "write_mask: %x\n", self->write_mask); + + mp_printf(&mp_plat_print, "out1 register: %x\n", g->out1.val); + mp_printf(&mp_plat_print, "clear a bit\n"); + *self->write_clear_register = self->write_mask; + mp_printf(&mp_plat_print, "out1 register: %x\n", g->out1.val); + mp_printf(&mp_plat_print, "write a bit\n"); + *self->write_set_register = self->write_mask; + mp_printf(&mp_plat_print, "out1 register: %x\n", g->out1.val); + + *self->write_clear_register = self->write_mask; /* SNIP - common setup of the reset pin, same as from SAMD and NRF ports */ self->reset.base.type = &mp_type_NoneType; @@ -174,13 +192,8 @@ void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byt displayio_parallelbus_obj_t* self = MP_OBJ_TO_PTR(obj); common_hal_digitalio_digitalinout_set_value(&self->command, byte_type == DISPLAY_DATA); - /* Currently the write pin number must be < 32. - * Future: To accommodate write pin numbers >= 32, will need to update to choose the correct register - * for the write pin set/clear (out_w1ts/out1_w1ts and out_w1tc/out1_w1tc) - */ - - uint32_t* clear_write = (uint32_t*) &self->write_group->out_w1tc; - uint32_t* set_write = (uint32_t*) &self->write_group->out_w1ts; + uint32_t* clear_write = self->write_clear_register; + uint32_t* set_write = self->write_set_register; const uint32_t mask = self->write_mask; @@ -197,24 +210,29 @@ void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byt * each data byte will be written to the data pin registers */ - for (uint32_t i = 0; i < data_length; i++) { - /* Question: Is there a faster way of stuffing the data byte into the data_buffer, is bit arithmetic - * faster than writing to the byte address? - */ - - /* Note: If the write pin and data pins are controlled by the same GPIO register, we can eliminate - * the "clear_write" step below, since the write pin is cleared when the data_buffer is written - * to the bus. - * Remember: This method requires the write pin to be controlled by the same GPIO register as the data pins. - */ - - // *clear_write = mask; // clear the write pin (See comment above, this may not be necessary). - - *(data_address) = data[i]; // stuff the data byte into the data_buffer at the correct offset byte location - *self->bus = data_buffer; // write the data to the output register - *set_write = mask; // set the write pin - } + if ( self->data_write_same_register ) { // data and write pins are on the same register + for (uint32_t i = 0; i < data_length; i++) { + + /* Note: If the write pin and data pins are controlled by the same GPIO register, we can eliminate + * the "clear_write" step below, since the write pin is cleared when the data_buffer is written + * to the bus. + */ + + *(data_address) = data[i]; // stuff the data byte into the data_buffer at the correct offset byte location + *self->bus = data_buffer; // write the data to the output register + *set_write = mask; // set the write pin + } + } + else { // data and write pins are on different registers + for (uint32_t i = 0; i < data_length; i++) { + *clear_write = mask; // clear the write pin (See comment above, this may not be necessary). + *(data_address) = data[i]; // stuff the data byte into the data_buffer at the correct offset byte location + *self->bus = data_buffer; // write the data to the output register + *set_write = mask; // set the write pin + + } + } } diff --git a/ports/esp32s2/common-hal/displayio/ParallelBus.h b/ports/esp32s2/common-hal/displayio/ParallelBus.h index 20fc2f1bc..84302118b 100644 --- a/ports/esp32s2/common-hal/displayio/ParallelBus.h +++ b/ports/esp32s2/common-hal/displayio/ParallelBus.h @@ -35,11 +35,13 @@ typedef struct { digitalio_digitalinout_obj_t command; digitalio_digitalinout_obj_t chip_select; digitalio_digitalinout_obj_t reset; - digitalio_digitalinout_obj_t write; // write pin, must be a pin number < 32 currently + digitalio_digitalinout_obj_t write; digitalio_digitalinout_obj_t read; - uint8_t data0_pin; // pin number for the lowest number pin. Must be 0, 8, 16 or 24 with current - gpio_dev_t* write_group; // pointer to the write group for setting/clearing the write bit to latch the data on the LCD - uint32_t write_mask; // bit mask for the single bit for the write pin, currently write pin must be a pin number < 32 + uint8_t data0_pin; // pin number for the lowest number data pin. Must be 8-bit aligned + bool data_write_same_register; // if data and write pins are in the sare + uint32_t* write_set_register; // pointer to the write group for setting the write bit to latch the data on the LCD + uint32_t* write_clear_register; // pointer to the write group for clearing the write bit to latch the data on the LCD + uint32_t write_mask; // bit mask for the single bit for the write pin register } displayio_parallelbus_obj_t; #endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_DISPLAYIO_PARALLELBUS_H -- cgit v1.2.3 From 61850acd143d9f8732d0ce48dc51eac9fb7e4c4c Mon Sep 17 00:00:00 2001 From: Kevin Matocha Date: Mon, 25 Jan 2021 16:51:12 -0600 Subject: Fixed bug in pin error handling, deleted debug prints --- ports/esp32s2/common-hal/displayio/ParallelBus.c | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/displayio/ParallelBus.c b/ports/esp32s2/common-hal/displayio/ParallelBus.c index 273a3a7ad..f77b37b57 100644 --- a/ports/esp32s2/common-hal/displayio/ParallelBus.c +++ b/ports/esp32s2/common-hal/displayio/ParallelBus.c @@ -34,10 +34,8 @@ #include "shared-bindings/microcontroller/__init__.h" /* - * * Current pin limitations for ESP32-S2 ParallelBus: - * - data0 pin must be byte aligned (data0 pin options: 0, 8, 16 or 24) - * + * - data0 pin must be byte aligned */ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* self, @@ -45,7 +43,7 @@ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* sel const mcu_pin_obj_t* write, const mcu_pin_obj_t* read, const mcu_pin_obj_t* reset) { uint8_t data_pin = data0->number; - if ( (data_pin % 8 != 0) && (data_pin >= 32) ) { + if (data_pin % 8 != 0) { mp_raise_ValueError(translate("Data 0 pin must be byte aligned.")); } @@ -113,20 +111,7 @@ void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* sel } - mp_printf(&mp_plat_print, "write_clear: %x, write_set: %x\n", self->write_clear_register, self->write_set_register); - self->write_mask = 1 << (write->number % 32); /* the write pin triggers the LCD to latch the data */ - mp_printf(&mp_plat_print, "write_mask: %x\n", self->write_mask); - - mp_printf(&mp_plat_print, "out1 register: %x\n", g->out1.val); - mp_printf(&mp_plat_print, "clear a bit\n"); - *self->write_clear_register = self->write_mask; - mp_printf(&mp_plat_print, "out1 register: %x\n", g->out1.val); - mp_printf(&mp_plat_print, "write a bit\n"); - *self->write_set_register = self->write_mask; - mp_printf(&mp_plat_print, "out1 register: %x\n", g->out1.val); - - *self->write_clear_register = self->write_mask; /* SNIP - common setup of the reset pin, same as from SAMD and NRF ports */ self->reset.base.type = &mp_type_NoneType; -- cgit v1.2.3 From be4cfdd3d6d08796757a4582061e819e3f903ce4 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Mon, 25 Jan 2021 17:23:57 -0500 Subject: Use TOTAL_GPIO_COUNT instead of magic number 30 --- ports/raspberrypi/common-hal/microcontroller/Pin.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/raspberrypi/common-hal/microcontroller/Pin.c b/ports/raspberrypi/common-hal/microcontroller/Pin.c index 6e531560e..ca5cf5a04 100644 --- a/ports/raspberrypi/common-hal/microcontroller/Pin.c +++ b/ports/raspberrypi/common-hal/microcontroller/Pin.c @@ -26,6 +26,7 @@ #include "py/runtime.h" +#include "common-hal/microcontroller/__init__.h" #include "shared-bindings/microcontroller/Pin.h" #include "supervisor/shared/rgb_led_status.h" @@ -46,7 +47,7 @@ bool speaker_enable_in_use; STATIC uint32_t never_reset_pins; void reset_all_pins(void) { - for (size_t i = 0; i < 30; i++) { + for (size_t i = 0; i < TOTAL_GPIO_COUNT; i++) { if ((never_reset_pins & (1 << i)) != 0) { continue; } @@ -55,7 +56,7 @@ void reset_all_pins(void) { } void never_reset_pin_number(uint8_t pin_number) { - if (pin_number >= 32) { + if (pin_number >= TOTAL_GPIO_COUNT) { return; } @@ -63,7 +64,7 @@ void never_reset_pin_number(uint8_t pin_number) { } void reset_pin_number(uint8_t pin_number) { - if (pin_number >= 32) { + if (pin_number >= TOTAL_GPIO_COUNT) { return; } @@ -134,7 +135,7 @@ void claim_pin(const mcu_pin_obj_t* pin) { } bool pin_number_is_free(uint8_t pin_number) { - if (pin_number >= 30) { + if (pin_number >= TOTAL_GPIO_COUNT) { return false; } -- cgit v1.2.3 From f154ee855d2e307f3ff24f25f138faa6e5210ad6 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Tue, 26 Jan 2021 10:23:37 -0500 Subject: shrink simmel --- ports/nrf/boards/simmel/mpconfigboard.mk | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/simmel/mpconfigboard.mk b/ports/nrf/boards/simmel/mpconfigboard.mk index 4eb6c98c7..032caac40 100644 --- a/ports/nrf/boards/simmel/mpconfigboard.mk +++ b/ports/nrf/boards/simmel/mpconfigboard.mk @@ -13,11 +13,13 @@ INTERNAL_FLASH_FILESYSTEM = 1 CIRCUITPY_AESIO = 1 CIRCUITPY_AUDIOMP3 = 0 +CIRCUITPY_BUSDEVICE = 0 CIRCUITPY_BUSIO = 1 CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_ERRNO = 0 CIRCUITPY_FRAMEBUFFERIO = 0 -CIRCUITPY_MSGPACK = 0 CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_MSGPACK = 0 CIRCUITPY_NEOPIXEL_WRITE = 0 CIRCUITPY_NVM = 0 CIRCUITPY_PIXELBUF = 0 @@ -28,7 +30,6 @@ CIRCUITPY_SDCARDIO = 0 CIRCUITPY_TOUCHIO = 0 CIRCUITPY_ULAB = 0 CIRCUITPY_WATCHDOG = 1 -CIRCUITPY_BUSDEVICE = 0 # Enable micropython.native #CIRCUITPY_ENABLE_MPY_NATIVE = 1 -- cgit v1.2.3 From b42e94ee2cf9b1d35ddabe36292a980bf0ed0c4f Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Tue, 26 Jan 2021 08:48:30 -0800 Subject: Raise an error on UART use --- ports/raspberrypi/common-hal/busio/UART.c | 1 + 1 file changed, 1 insertion(+) (limited to 'ports') diff --git a/ports/raspberrypi/common-hal/busio/UART.c b/ports/raspberrypi/common-hal/busio/UART.c index 71da6cadd..f9a75b499 100644 --- a/ports/raspberrypi/common-hal/busio/UART.c +++ b/ports/raspberrypi/common-hal/busio/UART.c @@ -54,6 +54,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer, bool sigint_enabled) { + mp_raise_NotImplementedError(translate("UART not yet supported")); // Sercom* sercom = NULL; // uint8_t sercom_index = 255; // Unset index -- cgit v1.2.3 From a54b57ea40739c53dc56ea5904da1931f71c71e7 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Thu, 28 Jan 2021 15:15:15 +0530 Subject: watchdog implementation for rp2040 --- .../common-hal/microcontroller/__init__.c | 11 +++ .../raspberrypi/common-hal/watchdog/WatchDogMode.c | 1 + .../common-hal/watchdog/WatchDogTimer.c | 83 ++++++++++++++++++++++ .../common-hal/watchdog/WatchDogTimer.h | 43 +++++++++++ ports/raspberrypi/common-hal/watchdog/__init__.c | 1 + ports/raspberrypi/mpconfigport.mk | 1 + 6 files changed, 140 insertions(+) create mode 100644 ports/raspberrypi/common-hal/watchdog/WatchDogMode.c create mode 100644 ports/raspberrypi/common-hal/watchdog/WatchDogTimer.c create mode 100644 ports/raspberrypi/common-hal/watchdog/WatchDogTimer.h create mode 100644 ports/raspberrypi/common-hal/watchdog/__init__.c (limited to 'ports') diff --git a/ports/raspberrypi/common-hal/microcontroller/__init__.c b/ports/raspberrypi/common-hal/microcontroller/__init__.c index e454ffa1b..774e313bb 100644 --- a/ports/raspberrypi/common-hal/microcontroller/__init__.c +++ b/ports/raspberrypi/common-hal/microcontroller/__init__.c @@ -112,6 +112,17 @@ const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = { }; #endif +#if CIRCUITPY_WATCHDOG +// The singleton watchdog.WatchDogTimer object. +watchdog_watchdogtimer_obj_t common_hal_mcu_watchdogtimer_obj = { + .base = { + .type = &watchdog_watchdogtimer_type, + }, + .timeout = 0.0f, + .mode = WATCHDOGMODE_NONE, +}; +#endif + // This maps MCU pin names to pin objects. const mp_rom_map_elem_t mcu_pin_global_dict_table[TOTAL_GPIO_COUNT] = { { MP_ROM_QSTR(MP_QSTR_GPIO0), MP_ROM_PTR(&pin_GPIO0) }, diff --git a/ports/raspberrypi/common-hal/watchdog/WatchDogMode.c b/ports/raspberrypi/common-hal/watchdog/WatchDogMode.c new file mode 100644 index 000000000..fc4e0e008 --- /dev/null +++ b/ports/raspberrypi/common-hal/watchdog/WatchDogMode.c @@ -0,0 +1 @@ +// No watchdog module functions. diff --git a/ports/raspberrypi/common-hal/watchdog/WatchDogTimer.c b/ports/raspberrypi/common-hal/watchdog/WatchDogTimer.c new file mode 100644 index 000000000..9184d1561 --- /dev/null +++ b/ports/raspberrypi/common-hal/watchdog/WatchDogTimer.c @@ -0,0 +1,83 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" +#include "common-hal/watchdog/WatchDogTimer.h" + +#include "shared-bindings/watchdog/__init__.h" +#include "shared-bindings/microcontroller/__init__.h" + +#include "hardware/watchdog.h" + +void common_hal_watchdog_feed(watchdog_watchdogtimer_obj_t *self) { + watchdog_update(); +} + +void common_hal_watchdog_deinit(watchdog_watchdogtimer_obj_t *self) { + if (self->mode == WATCHDOGMODE_RESET) { + mp_raise_RuntimeError(translate("WatchDogTimer cannot be deinitialized once mode is set to RESET")); + } else { + self->mode = WATCHDOGMODE_NONE; + } +} + +/* +void watchdog_reset(void) { + common_hal_watchdog_deinit(&common_hal_mcu_watchdogtimer_obj); +} +*/ + +mp_float_t common_hal_watchdog_get_timeout(watchdog_watchdogtimer_obj_t *self) { + return self->timeout; +} + +void common_hal_watchdog_set_timeout(watchdog_watchdogtimer_obj_t *self, mp_float_t new_timeout) { + // max timeout is 8.388607 sec + // this is rounded down to 8.388 sec + uint64_t timeout = new_timeout * 1000; + if (timeout > 8388) { + mp_raise_ValueError(translate("timeout duration exceeded the maximum supported value")); + } + if ((uint16_t)self->timeout != timeout) { + watchdog_enable(timeout, false); + self->timeout = new_timeout; + } +} + +watchdog_watchdogmode_t common_hal_watchdog_get_mode(watchdog_watchdogtimer_obj_t *self) { + return self->mode; +} + +void common_hal_watchdog_set_mode(watchdog_watchdogtimer_obj_t *self, watchdog_watchdogmode_t new_mode) { + if (self->mode != new_mode) { + if (new_mode == WATCHDOGMODE_RAISE) { + mp_raise_NotImplementedError(translate("RAISE mode is not implemented")); + } else if (new_mode == WATCHDOGMODE_NONE) { + common_hal_watchdog_deinit(self); + } + self->mode = new_mode; + } +} diff --git a/ports/raspberrypi/common-hal/watchdog/WatchDogTimer.h b/ports/raspberrypi/common-hal/watchdog/WatchDogTimer.h new file mode 100644 index 000000000..ec1e2f659 --- /dev/null +++ b/ports/raspberrypi/common-hal/watchdog/WatchDogTimer.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_RASPBERRYPI_COMMON_HAL_WATCHDOG_WATCHDOGTIMER_H +#define MICROPY_INCLUDED_RASPBERRYPI_COMMON_HAL_WATCHDOG_WATCHDOGTIMER_H + +#include "py/obj.h" +#include "shared-bindings/watchdog/WatchDogMode.h" +#include "shared-bindings/watchdog/WatchDogTimer.h" + +struct _watchdog_watchdogtimer_obj_t { + mp_obj_base_t base; + mp_float_t timeout; + watchdog_watchdogmode_t mode; +}; + +// This needs to be called in order to disable the watchdog +// void watchdog_reset(void); + +#endif // MICROPY_INCLUDED_RASPBERRYPI_COMMON_HAL_WATCHDOG_WATCHDOGTIMER_H diff --git a/ports/raspberrypi/common-hal/watchdog/__init__.c b/ports/raspberrypi/common-hal/watchdog/__init__.c new file mode 100644 index 000000000..fc4e0e008 --- /dev/null +++ b/ports/raspberrypi/common-hal/watchdog/__init__.c @@ -0,0 +1 @@ +// No watchdog module functions. diff --git a/ports/raspberrypi/mpconfigport.mk b/ports/raspberrypi/mpconfigport.mk index 138896d41..5c930d7cc 100644 --- a/ports/raspberrypi/mpconfigport.mk +++ b/ports/raspberrypi/mpconfigport.mk @@ -36,6 +36,7 @@ CIRCUITPY_NVM = 0 CIRCUITPY_PULSEIO = 0 # Use PIO interally CIRCUITPY_ROTARYIO = 0 # Use PIO interally CIRCUITPY_RTC = 0 +CIRCUITPY_WATCHDOG = 1 # Things that are unsupported by the hardware. CIRCUITPY_AUDIOIO = 0 -- cgit v1.2.3 From 067f42b4f869b34a108ccd9bf6de049f928b10b5 Mon Sep 17 00:00:00 2001 From: James Bowman Date: Fri, 29 Jan 2021 12:25:59 -0800 Subject: Add Gameduino 3X Dazzler support on raspberry_pi_pico Tested with hardware. Looks good. Follow on from #4054 --- ports/raspberrypi/boards/raspberry_pi_pico/mpconfigboard.mk | 2 ++ 1 file changed, 2 insertions(+) (limited to 'ports') diff --git a/ports/raspberrypi/boards/raspberry_pi_pico/mpconfigboard.mk b/ports/raspberrypi/boards/raspberry_pi_pico/mpconfigboard.mk index 69ff56fef..54c130660 100644 --- a/ports/raspberrypi/boards/raspberry_pi_pico/mpconfigboard.mk +++ b/ports/raspberrypi/boards/raspberry_pi_pico/mpconfigboard.mk @@ -7,3 +7,5 @@ CHIP_VARIANT = RP2040 CHIP_FAMILY = rp2 INTERNAL_FLASH_FILESYSTEM = 1 + +CIRCUITPY__EVE = 1 -- cgit v1.2.3 From acbf66dacc198588323d1887e2599acb5d71cf12 Mon Sep 17 00:00:00 2001 From: James Bowman Date: Fri, 29 Jan 2021 12:33:37 -0800 Subject: Make sys.platform "RP2040" on raspberrypi [#4091] --- ports/raspberrypi/mpconfigport.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'ports') diff --git a/ports/raspberrypi/mpconfigport.h b/ports/raspberrypi/mpconfigport.h index 743151931..77d1ff080 100644 --- a/ports/raspberrypi/mpconfigport.h +++ b/ports/raspberrypi/mpconfigport.h @@ -27,6 +27,8 @@ #ifndef __INCLUDED_MPCONFIGPORT_H #define __INCLUDED_MPCONFIGPORT_H +#define MICROPY_PY_SYS_PLATFORM "RP2040" + #define CIRCUITPY_INTERNAL_NVM_SIZE 0 #define CIRCUITPY_DEFAULT_STACK_SIZE (24*1024) -- cgit v1.2.3 From 34fe152fcff402a71482e5866a0f840021b44eaa Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Sat, 30 Jan 2021 14:00:14 +0530 Subject: extend include path --- ports/raspberrypi/common-hal/watchdog/WatchDogTimer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/raspberrypi/common-hal/watchdog/WatchDogTimer.c b/ports/raspberrypi/common-hal/watchdog/WatchDogTimer.c index 9184d1561..f23ccda77 100644 --- a/ports/raspberrypi/common-hal/watchdog/WatchDogTimer.c +++ b/ports/raspberrypi/common-hal/watchdog/WatchDogTimer.c @@ -30,7 +30,7 @@ #include "shared-bindings/watchdog/__init__.h" #include "shared-bindings/microcontroller/__init__.h" -#include "hardware/watchdog.h" +#include "src/rp2_common/hardware_watchdog/include/hardware/watchdog.h" void common_hal_watchdog_feed(watchdog_watchdogtimer_obj_t *self) { watchdog_update(); -- cgit v1.2.3 From ddd516a6833aba684fa37a099da7e8646e2d375d Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 29 Jan 2021 16:40:49 -0500 Subject: Fix default timeout --- ports/esp32s2/common-hal/socketpool/Socket.c | 6 +++--- ports/esp32s2/common-hal/socketpool/SocketPool.c | 1 + 2 files changed, 4 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/socketpool/Socket.c b/ports/esp32s2/common-hal/socketpool/Socket.c index 69ef41c6e..fc50ca3ab 100644 --- a/ports/esp32s2/common-hal/socketpool/Socket.c +++ b/ports/esp32s2/common-hal/socketpool/Socket.c @@ -135,7 +135,7 @@ socketpool_socket_obj_t* common_hal_socketpool_socket_accept(socketpool_socket_o while (newsoc == -1 && !timed_out && !mp_hal_is_interrupted()) { - if (self->timeout_ms != (uint)-1) { + if (self->timeout_ms != (uint)-1 && self->timeout_ms != 0) { timed_out = supervisor_ticks_ms64() - start_ticks >= self->timeout_ms; } RUN_BACKGROUND_TASKS; @@ -251,7 +251,7 @@ mp_uint_t common_hal_socketpool_socket_recv_into(socketpool_socket_obj_t* self, while (received == -1 && !timed_out && !mp_hal_is_interrupted()) { - if (self->timeout_ms != (uint)-1) { + if (self->timeout_ms != (uint)-1 && self->timeout_ms != 0) { timed_out = supervisor_ticks_ms64() - start_ticks >= self->timeout_ms; } RUN_BACKGROUND_TASKS; @@ -362,7 +362,7 @@ mp_uint_t common_hal_socketpool_socket_recvfrom_into(socketpool_socket_obj_t* se while (received == -1 && !timed_out && !mp_hal_is_interrupted()) { - if (self->timeout_ms != (uint)-1) { + if (self->timeout_ms != (uint)-1 && self->timeout_ms != 0) { timed_out = supervisor_ticks_ms64() - start_ticks >= self->timeout_ms; } RUN_BACKGROUND_TASKS; diff --git a/ports/esp32s2/common-hal/socketpool/SocketPool.c b/ports/esp32s2/common-hal/socketpool/SocketPool.c index 5821728ce..70a8b4eca 100644 --- a/ports/esp32s2/common-hal/socketpool/SocketPool.c +++ b/ports/esp32s2/common-hal/socketpool/SocketPool.c @@ -77,6 +77,7 @@ socketpool_socket_obj_t* common_hal_socketpool_socket(socketpool_socketpool_obj_ sock->type = socket_type; sock->family = addr_family; sock->ipproto = ipproto; + sock->timeout_ms = (uint)-1; sock->tls = NULL; sock->ssl_context = NULL; -- cgit v1.2.3 From 0dbd3293a94e6f7ca6f0ad095c6834d801d726eb Mon Sep 17 00:00:00 2001 From: Patrick Van Oosterwijck Date: Sat, 30 Jan 2021 18:35:35 -0700 Subject: Add board Silicognition LLC M4-Shim --- .../boards/silicognition-m4-shim/board.c | 38 +++++++++++++++ .../boards/silicognition-m4-shim/mpconfigboard.h | 33 +++++++++++++ .../boards/silicognition-m4-shim/mpconfigboard.mk | 14 ++++++ .../atmel-samd/boards/silicognition-m4-shim/pins.c | 54 ++++++++++++++++++++++ 4 files changed, 139 insertions(+) create mode 100644 ports/atmel-samd/boards/silicognition-m4-shim/board.c create mode 100644 ports/atmel-samd/boards/silicognition-m4-shim/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/silicognition-m4-shim/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/silicognition-m4-shim/pins.c (limited to 'ports') diff --git a/ports/atmel-samd/boards/silicognition-m4-shim/board.c b/ports/atmel-samd/boards/silicognition-m4-shim/board.c new file mode 100644 index 000000000..5fca974e9 --- /dev/null +++ b/ports/atmel-samd/boards/silicognition-m4-shim/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/silicognition-m4-shim/mpconfigboard.h b/ports/atmel-samd/boards/silicognition-m4-shim/mpconfigboard.h new file mode 100644 index 000000000..5028679ed --- /dev/null +++ b/ports/atmel-samd/boards/silicognition-m4-shim/mpconfigboard.h @@ -0,0 +1,33 @@ +#define MICROPY_HW_BOARD_NAME "Silicognition LLC M4-Shim" +#define MICROPY_HW_MCU_NAME "samd51j19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// Rev E + +#define MICROPY_HW_LED_STATUS (&pin_PA23) +#define MICROPY_HW_NEOPIXEL (&pin_PB03) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// QSPI CS, QSPI SCK and NeoPixel pin +#define MICROPY_PORT_B (PORT_PB03 | PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB23) +#define DEFAULT_SPI_BUS_MISO (&pin_PB22) + +#define DEFAULT_UART_BUS_RX (&pin_PB17) +#define DEFAULT_UART_BUS_TX (&pin_PB16) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/silicognition-m4-shim/mpconfigboard.mk b/ports/atmel-samd/boards/silicognition-m4-shim/mpconfigboard.mk new file mode 100644 index 000000000..bf88cd52d --- /dev/null +++ b/ports/atmel-samd/boards/silicognition-m4-shim/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x1209 +USB_PID = 0xF500 +USB_PRODUCT = "M4-Shim" +USB_MANUFACTURER = "Silicognition LLC" + +CHIP_VARIANT = SAMD51J19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C +LONGINT_IMPL = MPZ + +CIRCUITPY_VECTORIO = 1 diff --git a/ports/atmel-samd/boards/silicognition-m4-shim/pins.c b/ports/atmel-samd/boards/silicognition-m4-shim/pins.c new file mode 100644 index 000000000..b7afd044e --- /dev/null +++ b/ports/atmel-samd/boards/silicognition-m4-shim/pins.c @@ -0,0 +1,54 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PB08) }, + + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PB09) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_PA06) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_PB23) }, + + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_PB22) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB17) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB17) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB16) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB16) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From 6dba7a146d806f09d90b1d3ceec4af699603605e Mon Sep 17 00:00:00 2001 From: Aditya Date: Wed, 6 Jan 2021 22:58:30 +0100 Subject: Add support for Lilygo TTGO T8 ESP32-S2 --- .github/workflows/build.yml | 1 + locale/circuitpython.pot | 1 + .../boards/lilygo_ttgo_t8_s2_st7789/board.c | 52 ++++++++++++++++++++ .../lilygo_ttgo_t8_s2_st7789/mpconfigboard.h | 36 ++++++++++++++ .../lilygo_ttgo_t8_s2_st7789/mpconfigboard.mk | 18 +++++++ .../esp32s2/boards/lilygo_ttgo_t8_s2_st7789/pins.c | 55 ++++++++++++++++++++++ .../boards/lilygo_ttgo_t8_s2_st7789/sdkconfig | 31 ++++++++++++ 7 files changed, 194 insertions(+) create mode 100644 ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/board.c create mode 100644 ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.h create mode 100644 ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.mk create mode 100644 ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/pins.c create mode 100644 ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/sdkconfig (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 644c67c69..adf76f7aa 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -443,6 +443,7 @@ jobs: - "espressif_kaluga_1" - "espressif_saola_1_wroom" - "espressif_saola_1_wrover" + - "lilygo_ttgo_t8_s2_st7789" - "microdev_micro_s2" - "muselab_nanoesp32_s2" - "targett_module_clip_wroom" diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index de902f62f..c0aa89327 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -3504,6 +3504,7 @@ msgstr "" #: ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h #: ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h #: ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h +#: ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.h #: ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h #: ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h #: ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.h diff --git a/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/board.c b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/board.c new file mode 100644 index 000000000..aaef97c7d --- /dev/null +++ b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/board.c @@ -0,0 +1,52 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/board.h" +#include "mpconfigboard.h" +#include "shared-bindings/microcontroller/Pin.h" + +void board_init(void) { + // USB + common_hal_never_reset_pin(&pin_GPIO19); + common_hal_never_reset_pin(&pin_GPIO20); + + // Debug UART +#ifdef DEBUG + common_hal_never_reset_pin(&pin_GPIO43); + common_hal_never_reset_pin(&pin_GPIO44); +#endif /* DEBUG */ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} + +void board_deinit(void) { +} diff --git a/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.h b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.h new file mode 100644 index 000000000..c9020c200 --- /dev/null +++ b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.h @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "LILYGO TTGO T8 ESP32-S2 w/Display" +#define MICROPY_HW_MCU_NAME "ESP32S2" + +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n") + +#define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.mk b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.mk new file mode 100644 index 000000000..38a7ed1fb --- /dev/null +++ b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/mpconfigboard.mk @@ -0,0 +1,18 @@ +USB_VID = 0x303a +USB_PID = 0x8007 +USB_PRODUCT = "TTGO T8 ESP32-S2" +USB_MANUFACTURER = "LILYGO" +USB_DEVICES = "CDC,MSC,HID" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ + +# The default queue depth of 16 overflows on release builds, +# so increase it to 32. +CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 + +CIRCUITPY_ESP_FLASH_MODE = dio +CIRCUITPY_ESP_FLASH_FREQ = 40m +CIRCUITPY_ESP_FLASH_SIZE = 4MB + +CIRCUITPY_MODULE = wroom diff --git a/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/pins.c b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/pins.c new file mode 100644 index 000000000..bda0fd227 --- /dev/null +++ b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/pins.c @@ -0,0 +1,55 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) }, + { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) }, + + { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) }, + { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) }, + { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) }, + { MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) }, + { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) }, + + { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) }, + { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) }, + { MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) }, + { MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) }, + { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) }, + { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_GPIO18) }, + + // SD Card + { MP_ROM_QSTR(MP_QSTR_SD_MISO), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_SD_MOSI), MP_ROM_PTR(&pin_GPIO11) }, + { MP_ROM_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_GPIO10) }, + + // 1.14 inch LCD ST7789 + { MP_ROM_QSTR(MP_QSTR_LCD_MISO), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_LCD_MOSI), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_LCD_CLK), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_LCD_CS), MP_ROM_PTR(&pin_GPIO34) }, + { MP_ROM_QSTR(MP_QSTR_LCD_RST), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_LCD_BCKL), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_LCD_D_C), MP_ROM_PTR(&pin_GPIO37) }, + + // Peripheral Power control + { MP_ROM_QSTR(MP_QSTR_PE_POWER), MP_ROM_PTR(&pin_GPIO14) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/sdkconfig b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/sdkconfig new file mode 100644 index 000000000..ce6fe832b --- /dev/null +++ b/ports/esp32s2/boards/lilygo_ttgo_t8_s2_st7789/sdkconfig @@ -0,0 +1,31 @@ +CONFIG_ESP32S2_SPIRAM_SUPPORT=y + +# +# SPI RAM config +# +CONFIG_SPIRAM_TYPE_ESPPSRAM64=y +CONFIG_SPIRAM_SIZE=8388608 + +# +# PSRAM clock and cs IO for ESP32S2 +# +CONFIG_DEFAULT_PSRAM_CLK_IO=30 +CONFIG_DEFAULT_PSRAM_CS_IO=26 +# end of PSRAM clock and cs IO for ESP32S2 + +CONFIG_SPIRAM_SPIWP_SD3_PIN=28 +CONFIG_SPIRAM_SPEED_40M=y +CONFIG_SPIRAM=y +CONFIG_SPIRAM_BOOT_INIT=y +CONFIG_SPIRAM_USE_MALLOC=y +CONFIG_SPIRAM_MEMTEST=y +CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=16384 +CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=32768 +# end of SPI RAM config + +# +# LWIP +# +CONFIG_LWIP_LOCAL_HOSTNAME="TTGO-T8-ESP32-S2" +CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y +# end of LWIP -- cgit v1.2.3