From 12b81618a3a4d914114aae4ebc647a4f8bd9dc3f Mon Sep 17 00:00:00 2001 From: root Date: Sat, 1 Aug 2020 13:27:02 -0500 Subject: Changes for getting supervisor ticks --- ports/atmel-samd/common-hal/pulseio/PulseIn.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.c b/ports/atmel-samd/common-hal/pulseio/PulseIn.c index ae58b089d..5bd3cc7de 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.c +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -88,9 +88,8 @@ void pulsein_interrupt_handler(uint8_t channel) { uint32_t current_count = tc->COUNT16.COUNT.reg; pulseio_pulsein_obj_t* self = get_eic_channel_data(channel); - if (!supervisor_background_tasks_ok() || self->errored_too_fast) { - self->errored_too_fast = true; - common_hal_pulseio_pulsein_pause(self); + if (!supervisor_background_tasks_ok() ) { + mp_raise_RuntimeError(translate("Input taking too long")); return; } if (self->first_edge) { @@ -154,7 +153,6 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, self->start = 0; self->len = 0; self->first_edge = true; - self->errored_too_fast = false; if (refcount == 0) { // Find a spare timer. @@ -264,9 +262,6 @@ void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, // Make sure we're paused. common_hal_pulseio_pulsein_pause(self); - // Reset erroring - self->errored_too_fast = false; - // Send the trigger pulse. if (trigger_duration > 0) { gpio_set_pin_pull_mode(self->pin, GPIO_PULL_OFF); -- cgit v1.2.3 From 9203a778042c584138f2852c108b58e900047ac4 Mon Sep 17 00:00:00 2001 From: root Date: Mon, 3 Aug 2020 11:31:12 -0500 Subject: Turn off interrupts while in handler --- ports/atmel-samd/common-hal/pulseio/PulseIn.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.c b/ports/atmel-samd/common-hal/pulseio/PulseIn.c index 5bd3cc7de..a47135d56 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.c +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -77,6 +77,8 @@ static void pulsein_set_config(pulseio_pulsein_obj_t* self, bool first_edge) { } void pulsein_interrupt_handler(uint8_t channel) { + // turn off interrupts while in the handler + common_hal_mcu_disable_interrupts(); // Grab the current time first. uint32_t current_overflow = overflow_count; Tc* tc = tc_insts[pulsein_tc_index]; @@ -89,6 +91,7 @@ void pulsein_interrupt_handler(uint8_t channel) { pulseio_pulsein_obj_t* self = get_eic_channel_data(channel); if (!supervisor_background_tasks_ok() ) { + common_hal_mcu_enable_interrupts(); mp_raise_RuntimeError(translate("Input taking too long")); return; } @@ -122,6 +125,7 @@ void pulsein_interrupt_handler(uint8_t channel) { } self->last_overflow = current_overflow; self->last_count = current_count; + common_hal_mcu_enable_interrupts(); } void pulsein_reset() { -- cgit v1.2.3 From c7b6e66426dbff05b10e1f5aa64320f2071e8878 Mon Sep 17 00:00:00 2001 From: root Date: Wed, 5 Aug 2020 10:03:20 -0500 Subject: Fixes for pulsein tick handling --- ports/atmel-samd/common-hal/pulseio/PulseIn.c | 15 +++++++++------ ports/atmel-samd/common-hal/pulseio/PulseIn.h | 1 + supervisor/shared/background_callback.c | 6 +++++- 3 files changed, 15 insertions(+), 7 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.c b/ports/atmel-samd/common-hal/pulseio/PulseIn.c index a47135d56..79f66ceae 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.c +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -44,6 +44,7 @@ #include "shared-bindings/pulseio/PulseIn.h" #include "supervisor/shared/tick.h" #include "supervisor/shared/translate.h" +#include "supervisor/port.h" // This timer is shared amongst all PulseIn objects as a higher resolution clock. static uint8_t refcount = 0; @@ -77,7 +78,7 @@ static void pulsein_set_config(pulseio_pulsein_obj_t* self, bool first_edge) { } void pulsein_interrupt_handler(uint8_t channel) { - // turn off interrupts while in the handler + // Turn off interrupts while in handler common_hal_mcu_disable_interrupts(); // Grab the current time first. uint32_t current_overflow = overflow_count; @@ -90,10 +91,8 @@ void pulsein_interrupt_handler(uint8_t channel) { uint32_t current_count = tc->COUNT16.COUNT.reg; pulseio_pulsein_obj_t* self = get_eic_channel_data(channel); - if (!supervisor_background_tasks_ok() ) { - common_hal_mcu_enable_interrupts(); - mp_raise_RuntimeError(translate("Input taking too long")); - return; + if (self->len == 0) { + update_background_ticks(); } if (self->first_edge) { self->first_edge = false; @@ -123,6 +122,11 @@ void pulsein_interrupt_handler(uint8_t channel) { self->start++; } } + if (!supervisor_background_tasks_ok() ) { + common_hal_mcu_enable_interrupts(); + mp_raise_RuntimeError(translate("Input taking too long")); + return; + } self->last_overflow = current_overflow; self->last_count = current_count; common_hal_mcu_enable_interrupts(); @@ -304,7 +308,6 @@ uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { self->start = (self->start + 1) % self->maxlen; self->len--; common_hal_mcu_enable_interrupts(); - return value; } diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.h b/ports/atmel-samd/common-hal/pulseio/PulseIn.h index 99358178f..a0f838b37 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.h +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.h @@ -50,6 +50,7 @@ void pulsein_reset(void); void pulsein_interrupt_handler(uint8_t channel); void pulsein_timer_interrupt_handler(uint8_t index); +void update_background_ticks(void); #ifdef SAMD21 void rtc_set_continuous(void); void rtc_start_pulsein(void); diff --git a/supervisor/shared/background_callback.c b/supervisor/shared/background_callback.c index ddf723697..af64f99aa 100644 --- a/supervisor/shared/background_callback.c +++ b/supervisor/shared/background_callback.c @@ -37,12 +37,16 @@ STATIC volatile background_callback_t *callback_head, *callback_tail; #define CALLBACK_CRITICAL_BEGIN (common_hal_mcu_disable_interrupts()) #define CALLBACK_CRITICAL_END (common_hal_mcu_enable_interrupts()) -volatile uint64_t last_background_tick = 0; +uint64_t last_background_tick = 0; uint64_t get_background_ticks(void) { return last_background_tick; } +void update_background_ticks(void) { + last_background_tick = port_get_raw_ticks(NULL); +} + void background_callback_add_core(background_callback_t *cb) { CALLBACK_CRITICAL_BEGIN; if (cb->prev || callback_head == cb) { -- cgit v1.2.3 From 6eae7ce78f8dd2c1968e54e98cfe1189c4d35062 Mon Sep 17 00:00:00 2001 From: root Date: Thu, 20 Aug 2020 16:57:00 -0500 Subject: Requested changes to pulsein --- ports/atmel-samd/common-hal/pulseio/PulseIn.c | 21 ++++++++++----------- supervisor/shared/background_callback.c | 2 +- 2 files changed, 11 insertions(+), 12 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.c b/ports/atmel-samd/common-hal/pulseio/PulseIn.c index 79f66ceae..772948828 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.c +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -91,9 +91,6 @@ void pulsein_interrupt_handler(uint8_t channel) { uint32_t current_count = tc->COUNT16.COUNT.reg; pulseio_pulsein_obj_t* self = get_eic_channel_data(channel); - if (self->len == 0) { - update_background_ticks(); - } if (self->first_edge) { self->first_edge = false; pulsein_set_config(self, false); @@ -115,17 +112,14 @@ void pulsein_interrupt_handler(uint8_t channel) { } uint16_t i = (self->start + self->len) % self->maxlen; - self->buffer[i] = duration; - if (self->len < self->maxlen) { + if (self->len <= self->maxlen) { self->len++; } else { - self->start++; + self->errored_too_fast = true; + common_hal_mcu_enable_interrupts(); + return; } - } - if (!supervisor_background_tasks_ok() ) { - common_hal_mcu_enable_interrupts(); - mp_raise_RuntimeError(translate("Input taking too long")); - return; + self->buffer[i] = duration; } self->last_overflow = current_overflow; self->last_count = current_count; @@ -161,6 +155,7 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, self->start = 0; self->len = 0; self->first_edge = true; + self->errored_too_fast = false; if (refcount == 0) { // Find a spare timer. @@ -303,6 +298,10 @@ uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { if (self->len == 0) { mp_raise_IndexError(translate("pop from an empty PulseIn")); } + if (self->errored_too_fast) { + self->errored_too_fast = false; + mp_raise_RuntimeError(translate("Input taking too long")); + } common_hal_mcu_disable_interrupts(); uint16_t value = self->buffer[self->start]; self->start = (self->start + 1) % self->maxlen; diff --git a/supervisor/shared/background_callback.c b/supervisor/shared/background_callback.c index af64f99aa..fb46343ab 100644 --- a/supervisor/shared/background_callback.c +++ b/supervisor/shared/background_callback.c @@ -48,6 +48,7 @@ void update_background_ticks(void) { } void background_callback_add_core(background_callback_t *cb) { + last_background_tick = port_get_raw_ticks(NULL); CALLBACK_CRITICAL_BEGIN; if (cb->prev || callback_head == cb) { CALLBACK_CRITICAL_END; @@ -77,7 +78,6 @@ void background_callback_run_all() { if (!callback_head) { return; } - last_background_tick = port_get_raw_ticks(NULL); CALLBACK_CRITICAL_BEGIN; if (in_background_callback) { CALLBACK_CRITICAL_END; -- cgit v1.2.3 From fe0f79adce95dbe88c4826b26f163c573aa8f9c2 Mon Sep 17 00:00:00 2001 From: root Date: Fri, 21 Aug 2020 20:38:19 -0500 Subject: Making requested modifications --- ports/atmel-samd/common-hal/pulseio/PulseIn.c | 4 ++-- ports/atmel-samd/common-hal/pulseio/PulseIn.h | 1 - supervisor/shared/background_callback.c | 4 ---- 3 files changed, 2 insertions(+), 7 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.c b/ports/atmel-samd/common-hal/pulseio/PulseIn.c index 772948828..27bf842d5 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.c +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -112,7 +112,7 @@ void pulsein_interrupt_handler(uint8_t channel) { } uint16_t i = (self->start + self->len) % self->maxlen; - if (self->len <= self->maxlen) { + if (self->len < self->maxlen) { self->len++; } else { self->errored_too_fast = true; @@ -278,6 +278,7 @@ void common_hal_pulseio_pulsein_resume(pulseio_pulsein_obj_t* self, self->first_edge = true; self->last_overflow = 0; self->last_count = 0; + self->errored_too_fast = false; gpio_set_pin_function(self->pin, GPIO_PIN_FUNCTION_A); uint32_t mask = 1 << self->channel; // Clear previous interrupt state and re-enable it. @@ -299,7 +300,6 @@ uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { mp_raise_IndexError(translate("pop from an empty PulseIn")); } if (self->errored_too_fast) { - self->errored_too_fast = false; mp_raise_RuntimeError(translate("Input taking too long")); } common_hal_mcu_disable_interrupts(); diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.h b/ports/atmel-samd/common-hal/pulseio/PulseIn.h index a0f838b37..99358178f 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.h +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.h @@ -50,7 +50,6 @@ void pulsein_reset(void); void pulsein_interrupt_handler(uint8_t channel); void pulsein_timer_interrupt_handler(uint8_t index); -void update_background_ticks(void); #ifdef SAMD21 void rtc_set_continuous(void); void rtc_start_pulsein(void); diff --git a/supervisor/shared/background_callback.c b/supervisor/shared/background_callback.c index fb46343ab..154618297 100644 --- a/supervisor/shared/background_callback.c +++ b/supervisor/shared/background_callback.c @@ -43,10 +43,6 @@ uint64_t get_background_ticks(void) { return last_background_tick; } -void update_background_ticks(void) { - last_background_tick = port_get_raw_ticks(NULL); -} - void background_callback_add_core(background_callback_t *cb) { last_background_tick = port_get_raw_ticks(NULL); CALLBACK_CRITICAL_BEGIN; -- cgit v1.2.3 From 4733a672265f97a83353d005160f8e24ed8755b8 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 2 Sep 2020 11:27:42 -0400 Subject: Add GDB debugging capability --- ports/esp32s2/Makefile | 2 +- ports/esp32s2/boards/esp32s2-saola-1.cfg | 41 ++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+), 1 deletion(-) create mode 100644 ports/esp32s2/boards/esp32s2-saola-1.cfg (limited to 'ports') diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 19b89a13a..db05349b6 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -116,7 +116,7 @@ CFLAGS += $(OPTIMIZATION_FLAGS) CFLAGS += $(INC) -Werror -Wall -mlongcalls -std=gnu11 -Wl,--gc-sections $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT) -LDFLAGS = $(CFLAGS) -Wl,-nostdlib -Wl,-Map=$@.map -Wl,-cref +LDFLAGS = $(CFLAGS) -Wl,-nostdlib -Wl,-Map=$@.map -Wl,-cref -Wl,--undefined=uxTopUsedPriority LDFLAGS += -L$(BUILD)/esp-idf/esp-idf/esp32s2 \ -Tesp32s2_out.ld \ -L$(BUILD)/esp-idf/esp-idf/esp32s2/ld \ diff --git a/ports/esp32s2/boards/esp32s2-saola-1.cfg b/ports/esp32s2/boards/esp32s2-saola-1.cfg new file mode 100644 index 000000000..677290757 --- /dev/null +++ b/ports/esp32s2/boards/esp32s2-saola-1.cfg @@ -0,0 +1,41 @@ +# The ESP32-S2 only supports JTAG. +transport select jtag +adapter_khz 1000 + +# Source the ESP common configuration file +source [find target/esp_common.cfg] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME esp32s2 +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x120034e5 +} + +set _TARGETNAME $_CHIPNAME +set _CPUNAME cpu +set _TAPNAME $_CHIPNAME.$_CPUNAME + +jtag newtap $_CHIPNAME $_CPUNAME -irlen 5 -expected-id $_CPUTAPID + +if { $_RTOS == "none" } { + target create $_TARGETNAME esp32s2 -endian little -chain-position $_TAPNAME +} else { + target create $_TARGETNAME esp32s2 -endian little -chain-position $_TAPNAME -rtos $_RTOS +} + +configure_esp_workarea $_TARGETNAME 0x40030000 0x3400 0x3FFE0000 0x6000 +configure_esp_flash_bank $_TARGETNAME $_TARGETNAME $_FLASH_SIZE + +xtensa maskisr on +if { $_SEMIHOST_BASEDIR != "" } { + esp semihost_basedir $_SEMIHOST_BASEDIR +} +if { $_FLASH_SIZE == 0 } { + gdb_breakpoint_override hard +} -- cgit v1.2.3 From e066448e369d33f655b4454562a9711e1cbdb2ff Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 8 Sep 2020 10:43:24 -0500 Subject: atmel-samd: add same51, feather_m4_can This is compile-tested, and requires updates in the related submodules: https://github.com/adafruit/samd-peripherals/pull/35 https://github.com/adafruit/asf4/pull/37 This should not be merged until those can also be merged. --- ports/atmel-samd/Makefile | 30 +- ports/atmel-samd/asf4 | 2 +- ports/atmel-samd/asf4_conf/same51/hpl_adc_config.h | 303 + ports/atmel-samd/asf4_conf/same51/hpl_dac_config.h | 169 + .../atmel-samd/asf4_conf/same51/hpl_dmac_config.h | 7277 ++++++++++++++++++++ .../atmel-samd/asf4_conf/same51/hpl_gclk_config.h | 924 +++ .../atmel-samd/asf4_conf/same51/hpl_mclk_config.h | 104 + .../asf4_conf/same51/hpl_nvmctrl_config.h | 36 + .../asf4_conf/same51/hpl_osc32kctrl_config.h | 163 + .../asf4_conf/same51/hpl_oscctrl_config.h | 634 ++ ports/atmel-samd/asf4_conf/same51/hpl_rtc_config.h | 145 + .../atmel-samd/asf4_conf/same51/hpl_sdhc_config.h | 24 + .../asf4_conf/same51/hpl_sercom_config.h | 751 ++ .../asf4_conf/same51/hpl_systick_config.h | 18 + ports/atmel-samd/asf4_conf/same51/hpl_tc_config.h | 209 + .../atmel-samd/asf4_conf/same51/hpl_trng_config.h | 27 + ports/atmel-samd/asf4_conf/same51/hpl_usb_config.h | 413 ++ .../asf4_conf/same51/peripheral_clk_config.h | 1170 ++++ ports/atmel-samd/asf4_conf/same51/usbd_config.h | 850 +++ ports/atmel-samd/boards/feather_m4_can/board.c | 38 + .../boards/feather_m4_can/mpconfigboard.h | 35 + .../boards/feather_m4_can/mpconfigboard.mk | 14 + ports/atmel-samd/boards/feather_m4_can/pins.c | 61 + .../common-hal/neopixel_write/__init__.c | 3 + ports/atmel-samd/peripherals | 2 +- ports/atmel-samd/supervisor/internal_flash.c | 3 + ports/atmel-samd/supervisor/port.c | 3 + ports/atmel-samd/supervisor/same51_cpu.s | 27 + 28 files changed, 13432 insertions(+), 3 deletions(-) create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_adc_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_dac_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_dmac_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_gclk_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_mclk_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_nvmctrl_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_osc32kctrl_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_oscctrl_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_rtc_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_sdhc_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_sercom_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_systick_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_tc_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_trng_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/hpl_usb_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/peripheral_clk_config.h create mode 100644 ports/atmel-samd/asf4_conf/same51/usbd_config.h create mode 100644 ports/atmel-samd/boards/feather_m4_can/board.c create mode 100644 ports/atmel-samd/boards/feather_m4_can/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/feather_m4_can/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/feather_m4_can/pins.c create mode 100755 ports/atmel-samd/supervisor/same51_cpu.s (limited to 'ports') diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile index 489f3a7af..79573b62e 100644 --- a/ports/atmel-samd/Makefile +++ b/ports/atmel-samd/Makefile @@ -99,6 +99,13 @@ OPTIMIZATION_FLAGS ?= -O2 CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_SAMD51 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=256 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=256 -DCFG_TUD_MSC_BUFSIZE=1024 endif +ifeq ($(CHIP_FAMILY), same51) +PERIPHERALS_CHIP_FAMILY=sam_d5x_e5x +OPTIMIZATION_FLAGS ?= -O2 +# TinyUSB defines +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_SAME5X -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=256 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=256 -DCFG_TUD_MSC_BUFSIZE=1024 +endif + ifeq ($(CHIP_FAMILY), same54) PERIPHERALS_CHIP_FAMILY=sam_d5x_e5x OPTIMIZATION_FLAGS ?= -O2 @@ -177,6 +184,15 @@ CFLAGS += \ -mfpu=fpv4-sp-d16 \ -DSAM_D5X_E5X -DSAME54 endif +ifeq ($(CHIP_FAMILY), same51) +CFLAGS += \ + -mthumb \ + -mabi=aapcs-linux \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mfpu=fpv4-sp-d16 \ + -DSAM_D5X_E5X -DSAME51 +endif @@ -197,6 +213,9 @@ BOOTLOADER_SIZE := 0x4000 else ifeq ($(CHIP_FAMILY), same54) LDFLAGS += -mthumb -mcpu=cortex-m4 BOOTLOADER_SIZE := 0x4000 +else ifeq ($(CHIP_FAMILY), same51) +LDFLAGS += -mthumb -mcpu=cortex-m4 +BOOTLOADER_SIZE := 0x4000 endif SRC_ASF := \ @@ -241,7 +260,16 @@ SRC_ASF += \ else ifeq ($(CHIP_FAMILY), same54) SRC_ASF += \ - hal/src/hal_rand_sync.c \ + hal/src/hal_rand_sync.c \ + hpl/core/hpl_core_m4.c \ + hpl/mclk/hpl_mclk.c \ + hpl/osc32kctrl/hpl_osc32kctrl.c \ + hpl/oscctrl/hpl_oscctrl.c \ + hpl/trng/hpl_trng.c \ + +else ifeq ($(CHIP_FAMILY), same51) +SRC_ASF += \ + hal/src/hal_rand_sync.c \ hpl/core/hpl_core_m4.c \ hpl/mclk/hpl_mclk.c \ hpl/osc32kctrl/hpl_osc32kctrl.c \ diff --git a/ports/atmel-samd/asf4 b/ports/atmel-samd/asf4 index 35a152579..f99e36fb0 160000 --- a/ports/atmel-samd/asf4 +++ b/ports/atmel-samd/asf4 @@ -1 +1 @@ -Subproject commit 35a1525796c7ef8a3893d90befdad2f267fca20e +Subproject commit f99e36fb008588bd9ff005099b3b89b7952fcfba diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_adc_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_adc_config.h new file mode 100644 index 000000000..13d815102 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_adc_config.h @@ -0,0 +1,303 @@ +/* Auto-generated config file hpl_adc_config.h */ +#ifndef HPL_ADC_CONFIG_H +#define HPL_ADC_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +#ifndef CONF_ADC_0_ENABLE +#define CONF_ADC_0_ENABLE 1 +#endif + +// Basic Configuration + +// Conversion Result Resolution +// <0x0=>12-bit +// <0x1=>16-bit (averaging must be enabled) +// <0x2=>10-bit +// <0x3=>8-bit +// Defines the bit resolution for the ADC sample values (RESSEL) +// adc_resolution +#ifndef CONF_ADC_0_RESSEL +#define CONF_ADC_0_RESSEL 0x0 +#endif + +// Reference Selection +// <0x0=>Internal bandgap reference +// <0x2=>1/2 VDDANA (only for VDDANA > 2.0V) +// <0x3=>VDDANA +// <0x4=>External reference A +// <0x5=>External reference B +// <0x6=>External reference C +// Select the reference for the ADC (REFSEL) +// adc_reference +#ifndef CONF_ADC_0_REFSEL +#define CONF_ADC_0_REFSEL 0x0 +#endif + +// Prescaler configuration +// <0x0=>Peripheral clock divided by 2 +// <0x1=>Peripheral clock divided by 4 +// <0x2=>Peripheral clock divided by 8 +// <0x3=>Peripheral clock divided by 16 +// <0x4=>Peripheral clock divided by 32 +// <0x5=>Peripheral clock divided by 64 +// <0x6=>Peripheral clock divided by 128 +// <0x7=>Peripheral clock divided by 256 +// These bits define the ADC clock relative to the peripheral clock (PRESCALER) +// adc_prescaler +#ifndef CONF_ADC_0_PRESCALER +#define CONF_ADC_0_PRESCALER 0x3 +#endif + +// Free Running Mode +// When enabled, the ADC is in free running mode and a new conversion will be initiated when a previous conversion completes. (FREERUN) +// adc_freerunning_mode +#ifndef CONF_ADC_0_FREERUN +#define CONF_ADC_0_FREERUN 0 +#endif + +// Differential Mode +// In differential mode, the voltage difference between the MUXPOS and MUXNEG inputs will be converted by the ADC. (DIFFMODE) +// adc_differential_mode +#ifndef CONF_ADC_0_DIFFMODE +#define CONF_ADC_0_DIFFMODE 0 +#endif + +// Positive Mux Input Selection +// <0x00=>ADC AIN0 pin +// <0x01=>ADC AIN1 pin +// <0x02=>ADC AIN2 pin +// <0x03=>ADC AIN3 pin +// <0x04=>ADC AIN4 pin +// <0x05=>ADC AIN5 pin +// <0x06=>ADC AIN6 pin +// <0x07=>ADC AIN7 pin +// <0x08=>ADC AIN8 pin +// <0x09=>ADC AIN9 pin +// <0x0A=>ADC AIN10 pin +// <0x0B=>ADC AIN11 pin +// <0x0C=>ADC AIN12 pin +// <0x0D=>ADC AIN13 pin +// <0x0E=>ADC AIN14 pin +// <0x0F=>ADC AIN15 pin +// <0x18=>1/4 scaled core supply +// <0x19=>1/4 Scaled VBAT Supply +// <0x1A=>1/4 scaled I/O supply +// <0x1B=>Bandgap voltage +// <0x1C=>Temperature reference (PTAT) +// <0x1D=>Temperature reference (CTAT) +// <0x1E=>DAC Output +// These bits define the Mux selection for the positive ADC input. (MUXPOS) +// adc_pinmux_positive +#ifndef CONF_ADC_0_MUXPOS +#define CONF_ADC_0_MUXPOS 0x0 +#endif + +// Negative Mux Input Selection +// <0x00=>ADC AIN0 pin +// <0x01=>ADC AIN1 pin +// <0x02=>ADC AIN2 pin +// <0x03=>ADC AIN3 pin +// <0x04=>ADC AIN4 pin +// <0x05=>ADC AIN5 pin +// <0x06=>ADC AIN6 pin +// <0x07=>ADC AIN7 pin +// <0x18=>Internal ground +// <0x19=>I/O ground +// These bits define the Mux selection for the negative ADC input. (MUXNEG) +// adc_pinmux_negative +#ifndef CONF_ADC_0_MUXNEG +#define CONF_ADC_0_MUXNEG 0x0 +#endif + +// + +// Advanced Configuration +// adc_advanced_settings +#ifndef CONF_ADC_0_ADVANCED +#define CONF_ADC_0_ADVANCED 0 +#endif + +// Run in standby +// Indicates whether the ADC will continue running in standby sleep mode or not (RUNSTDBY) +// adc_arch_runstdby +#ifndef CONF_ADC_0_RUNSTDBY +#define CONF_ADC_0_RUNSTDBY 0 +#endif + +// Debug Run +// If enabled, the ADC is running if the CPU is halted by an external debugger. (DBGRUN) +// adc_arch_dbgrun +#ifndef CONF_ADC_0_DBGRUN +#define CONF_ADC_0_DBGRUN 0 +#endif + +// On Demand Control +// Will keep the ADC peripheral running if requested by other peripherals (ONDEMAND) +// adc_arch_ondemand +#ifndef CONF_ADC_0_ONDEMAND +#define CONF_ADC_0_ONDEMAND 0 +#endif + +// Left-Adjusted Result +// When enabled, the ADC conversion result is left-adjusted in the RESULT register. The high byte of the 12-bit result will be present in the upper part of the result register. (LEFTADJ) +// adc_arch_leftadj +#ifndef CONF_ADC_0_LEFTADJ +#define CONF_ADC_0_LEFTADJ 0 +#endif + +// Reference Buffer Offset Compensation Enable +// The accuracy of the gain stage can be increased by enabling the reference buffer offset compensation. This will decrease the input impedance and thus increase the start-up time of the reference. (REFCOMP) +// adc_arch_refcomp +#ifndef CONF_ADC_0_REFCOMP +#define CONF_ADC_0_REFCOMP 0 +#endif + +// Comparator Offset Compensation Enable +// This bit indicates whether the Comparator Offset Compensation is enabled or not (OFFCOMP) +// adc_arch_offcomp +#ifndef CONF_ADC_0_OFFCOMP +#define CONF_ADC_0_OFFCOMP 0 +#endif + +// Digital Correction Logic Enabled +// When enabled, the ADC conversion result in the RESULT register is then corrected for gain and offset based on the values in the GAINCAL and OFFSETCAL registers. (CORREN) +// adc_arch_corren +#ifndef CONF_ADC_0_CORREN +#define CONF_ADC_0_CORREN 0 +#endif + +// Offset Correction Value <0-4095> +// If the digital correction logic is enabled (CTRLB.CORREN = 1), these bits define how the ADC conversion result is compensated for offset error before being written to the Result register. (OFFSETCORR) +// adc_arch_offsetcorr +#ifndef CONF_ADC_0_OFFSETCORR +#define CONF_ADC_0_OFFSETCORR 0 +#endif + +// Gain Correction Value <0-4095> +// If the digital correction logic is enabled (CTRLB.CORREN = 1), these bits define how the ADC conversion result is compensated for gain error before being written to the result register. (GAINCORR) +// adc_arch_gaincorr +#ifndef CONF_ADC_0_GAINCORR +#define CONF_ADC_0_GAINCORR 0 +#endif + +// Adjusting Result / Division Coefficient <0-7> +// These bits define the division coefficient in 2n steps. (ADJRES) +// adc_arch_adjres +#ifndef CONF_ADC_0_ADJRES +#define CONF_ADC_0_ADJRES 0x0 +#endif + +// Number of Samples to be Collected +// <0x0=>1 sample +// <0x1=>2 samples +// <0x2=>4 samples +// <0x3=>8 samples +// <0x4=>16 samples +// <0x5=>32 samples +// <0x6=>64 samples +// <0x7=>128 samples +// <0x8=>256 samples +// <0x9=>512 samples +// <0xA=>1024 samples +// Define how many samples should be added together.The result will be available in the Result register (SAMPLENUM) +// adc_arch_samplenum +#ifndef CONF_ADC_0_SAMPLENUM +#define CONF_ADC_0_SAMPLENUM 0x0 +#endif + +// Sampling Time Length <0-63> +// These bits control the ADC sampling time in number of half CLK_ADC cycles, depending of the prescaler value, thus controlling the ADC input impedance. (SAMPLEN) +// adc_arch_samplen +#ifndef CONF_ADC_0_SAMPLEN +#define CONF_ADC_0_SAMPLEN 0 +#endif + +// Window Monitor Mode +// <0x0=>No window mode +// <0x1=>Mode 1: RESULT above lower threshold +// <0x2=>Mode 2: RESULT beneath upper threshold +// <0x3=>Mode 3: RESULT inside lower and upper threshold +// <0x4=>Mode 4: RESULT outside lower and upper threshold +// These bits enable and define the window monitor mode. (WINMODE) +// adc_arch_winmode +#ifndef CONF_ADC_0_WINMODE +#define CONF_ADC_0_WINMODE 0x0 +#endif + +// Window Monitor Lower Threshold <0-65535> +// If the window monitor is enabled, these bits define the lower threshold value. (WINLT) +// adc_arch_winlt +#ifndef CONF_ADC_0_WINLT +#define CONF_ADC_0_WINLT 0 +#endif + +// Window Monitor Upper Threshold <0-65535> +// If the window monitor is enabled, these bits define the lower threshold value. (WINUT) +// adc_arch_winut +#ifndef CONF_ADC_0_WINUT +#define CONF_ADC_0_WINUT 0 +#endif + +// Bitmask for positive input sequence <0-4294967295> +// Use this parameter to input the bitmask for positive input sequence control (refer to datasheet for the device). +// adc_arch_seqen +#ifndef CONF_ADC_0_SEQEN +#define CONF_ADC_0_SEQEN 0x0 +#endif + +// + +// Event Control +// adc_arch_event_settings +#ifndef CONF_ADC_0_EVENT_CONTROL +#define CONF_ADC_0_EVENT_CONTROL 0 +#endif + +// Window Monitor Event Out +// Enables event output on window event (WINMONEO) +// adc_arch_winmoneo +#ifndef CONF_ADC_0_WINMONEO +#define CONF_ADC_0_WINMONEO 0 +#endif + +// Result Ready Event Out +// Enables event output on result ready event (RESRDEO) +// adc_arch_resrdyeo +#ifndef CONF_ADC_0_RESRDYEO +#define CONF_ADC_0_RESRDYEO 0 +#endif + +// Invert flush Event Signal +// Invert the flush event input signal (FLUSHINV) +// adc_arch_flushinv +#ifndef CONF_ADC_0_FLUSHINV +#define CONF_ADC_0_FLUSHINV 0 +#endif + +// Trigger Flush On Event +// Trigger an ADC pipeline flush on event (FLUSHEI) +// adc_arch_flushei +#ifndef CONF_ADC_0_FLUSHEI +#define CONF_ADC_0_FLUSHEI 0 +#endif + +// Invert Start Conversion Event Signal +// Invert the start conversion event input signal (STARTINV) +// adc_arch_startinv +#ifndef CONF_ADC_0_STARTINV +#define CONF_ADC_0_STARTINV 0 +#endif + +// Trigger Conversion On Event +// Trigger a conversion on event. (STARTEI) +// adc_arch_startei +#ifndef CONF_ADC_0_STARTEI +#define CONF_ADC_0_STARTEI 0 +#endif + +// + +// <<< end of configuration section >>> + +#endif // HPL_ADC_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_dac_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_dac_config.h new file mode 100644 index 000000000..c46f99b7d --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_dac_config.h @@ -0,0 +1,169 @@ +/* Auto-generated config file hpl_dac_config.h */ +#ifndef HPL_DAC_CONFIG_H +#define HPL_DAC_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Basic configuration +// Reference Selection +// <0x00=> Unbuffered external voltage reference +// <0x01=> Voltage supply +// <0x02=> Buffered external voltage reference +// <0x03=> Internal bandgap reference +// dac_arch_refsel +#ifndef CONF_DAC_REFSEL +#define CONF_DAC_REFSEL 0 +#endif + +// Differential mode +// Indicates whether the differential mode is enabled or not +// dac_arch_diff +#ifndef CONF_DAC_DIFF +#define CONF_DAC_DIFF 0 +#endif +// + +// Advanced Configuration +// dac_advanced_settings +#ifndef CONF_DAC_ADVANCED_CONFIG +#define CONF_DAC_ADVANCED_CONFIG 0 +#endif + +// Debug Run +// Indicate whether running when CPU is halted +// adc_arch_dbgrun +#ifndef CONF_DAC_DBGRUN +#define CONF_DAC_DBGRUN 1 +#endif + +// Channel 0 configuration +// Left Adjusted Data +// Indicate how the data is adjusted in the Data and Data Buffer register +// dac0_arch_leftadj +#ifndef CONF_DAC0_LEFTADJ +#define CONF_DAC0_LEFTADJ 1 +#endif + +// Current control +// <0=> GCLK_DAC <= 1.2MHz (100kSPS) +// <1=> 1.2MHz < GCLK_DAC <= 6MHz (500kSPS) +// <2=> 6MHz < GCLK_DAC <= 12MHz (1MSPS) +// This defines the current in output buffer according to conversion rate +// dac0_arch_cctrl +#ifndef CONF_DAC0_CCTRL +#define CONF_DAC0_CCTRL 0 +#endif + +// Run in standby +// Indicates whether the DAC channel will continue running in standby sleep mode or not +// dac0_arch_runstdby +#ifndef CONF_DAC0_RUNSTDBY +#define CONF_DAC0_RUNSTDBY 0 +#endif + +// Dithering Mode +// Indicate whether dithering mode is enabled +// dac0_arch_ditrher +#ifndef CONF_DAC0_DITHER +#define CONF_DAC0_DITHER 0 +#endif + +// Refresh period <0x00-0xFF> +// This defines the refresh period. If it is 0, the refresh mode is disabled, else the refresh period is: value * 500us +// dac0_arch_refresh +#ifndef CONF_DAC0_REFRESH +#define CONF_DAC0_REFRESH 2 +#endif +// +// Channel 1 configuration +// Left Adjusted Data +// Indicate how the data is adjusted in the Data and Data Buffer register +// dac1_arch_leftadj +#ifndef CONF_DAC1_LEFTADJ +#define CONF_DAC1_LEFTADJ 1 +#endif + +// Current control +// <0=> GCLK_DAC <= 1.2MHz (100kSPS) +// <1=> 1.2MHz < GCLK_DAC <= 6MHz (500kSPS) +// <2=> 6MHz < GCLK_DAC <= 12MHz (1MSPS) +// This defines the current in output buffer according to conversion rate +// dac1_arch_cctrl +#ifndef CONF_DAC1_CCTRL +#define CONF_DAC1_CCTRL 0 +#endif + +// Run in standby +// Indicates whether the DAC channel will continue running in standby sleep mode or not +// dac1_arch_runstdby +#ifndef CONF_DAC1_RUNSTDBY +#define CONF_DAC1_RUNSTDBY 0 +#endif + +// Dithering Mode +// Indicate whether dithering mode is enabled +// dac1_arch_ditrher +#ifndef CONF_DAC1_DITHER +#define CONF_DAC1_DITHER 0 +#endif + +// Refresh period <0x00-0xFF> +// This defines the refresh period. If it is 0, the refresh mode is disabled, else the refresh period is: value * 500us +// dac1_arch_refresh +#ifndef CONF_DAC1_REFRESH +#define CONF_DAC1_REFRESH 2 +#endif +// + +// Event configuration +// Inversion of DAC 0 event +// <0=> Detection on rising edge pf the input event +// <1=> Detection on falling edge pf the input event +// This defines the edge detection of the input event +// dac_arch_invei0 +#ifndef CONF_DAC_INVEI0 +#define CONF_DAC_INVEI0 0 +#endif + +// Data Buffer of DAC 0 Empty Event Output +// Indicate whether Data Buffer Empty Event is enabled and generated when the Data Buffer register is empty or not +// dac_arch_emptyeo_0 +#ifndef CONF_DAC_EMPTYEO0 +#define CONF_DAC_EMPTYEO0 0 +#endif + +// Start Conversion Event Input DAC 0 +// Indicate whether Start input event is enabled +// dac_arch_startei_0 +#ifndef CONF_DAC_STARTEI0 +#define CONF_DAC_STARTEI0 0 +#endif +// Inversion of DAC 1 event +// <0=> Detection on rising edge pf the input event +// <1=> Detection on falling edge pf the input event +// This defines the edge detection of the input event +// dac_arch_invei1 +#ifndef CONF_DAC_INVEI1 +#define CONF_DAC_INVEI1 0 +#endif + +// Data Buffer of DAC 1 Empty Event Output +// Indicate whether Data Buffer Empty Event is enabled and generated when the Data Buffer register is empty or not +// dac_arch_emptyeo_1 +#ifndef CONF_DAC_EMPTYEO1 +#define CONF_DAC_EMPTYEO1 0 +#endif + +// Start Conversion Event Input DAC 1 +// Indicate whether Start input event is enabled +// dac_arch_startei_1 +#ifndef CONF_DAC_STARTEI1 +#define CONF_DAC_STARTEI1 0 +#endif + +// +// + +// <<< end of configuration section >>> + +#endif // HPL_DAC_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_dmac_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_dmac_config.h new file mode 100644 index 000000000..90499fc27 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_dmac_config.h @@ -0,0 +1,7277 @@ +/* Auto-generated config file hpl_dmac_config.h */ +#ifndef HPL_DMAC_CONFIG_H +#define HPL_DMAC_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// DMAC enable +// Indicates whether dmac is enabled or not +// dmac_enable +#ifndef CONF_DMAC_ENABLE +#define CONF_DMAC_ENABLE 0 +#endif + +// Priority Level 0 +// Indicates whether Priority Level 0 is enabled or not +// dmac_lvlen0 +#ifndef CONF_DMAC_LVLEN0 +#define CONF_DMAC_LVLEN0 1 +#endif + +// Level 0 Round-Robin Arbitration +// <0=> Static arbitration scheme for channel with priority 0 +// <1=> Round-robin arbitration scheme for channel with priority 0 +// Defines Level 0 Arbitration for DMA channels +// dmac_rrlvlen0 +#ifndef CONF_DMAC_RRLVLEN0 +#define CONF_DMAC_RRLVLEN0 0 +#endif + +// Level 0 Channel Priority Number <0x00-0xFF> +// dmac_lvlpri0 +#ifndef CONF_DMAC_LVLPRI0 +#define CONF_DMAC_LVLPRI0 0 +#endif +// Priority Level 1 +// Indicates whether Priority Level 1 is enabled or not +// dmac_lvlen1 +#ifndef CONF_DMAC_LVLEN1 +#define CONF_DMAC_LVLEN1 1 +#endif + +// Level 1 Round-Robin Arbitration +// <0=> Static arbitration scheme for channel with priority 1 +// <1=> Round-robin arbitration scheme for channel with priority 1 +// Defines Level 1 Arbitration for DMA channels +// dmac_rrlvlen1 +#ifndef CONF_DMAC_RRLVLEN1 +#define CONF_DMAC_RRLVLEN1 0 +#endif + +// Level 1 Channel Priority Number <0x00-0xFF> +// dmac_lvlpri1 +#ifndef CONF_DMAC_LVLPRI1 +#define CONF_DMAC_LVLPRI1 0 +#endif +// Priority Level 2 +// Indicates whether Priority Level 2 is enabled or not +// dmac_lvlen2 +#ifndef CONF_DMAC_LVLEN2 +#define CONF_DMAC_LVLEN2 1 +#endif + +// Level 2 Round-Robin Arbitration +// <0=> Static arbitration scheme for channel with priority 2 +// <1=> Round-robin arbitration scheme for channel with priority 2 +// Defines Level 2 Arbitration for DMA channels +// dmac_rrlvlen2 +#ifndef CONF_DMAC_RRLVLEN2 +#define CONF_DMAC_RRLVLEN2 0 +#endif + +// Level 2 Channel Priority Number <0x00-0xFF> +// dmac_lvlpri2 +#ifndef CONF_DMAC_LVLPRI2 +#define CONF_DMAC_LVLPRI2 0 +#endif +// Priority Level 3 +// Indicates whether Priority Level 3 is enabled or not +// dmac_lvlen3 +#ifndef CONF_DMAC_LVLEN3 +#define CONF_DMAC_LVLEN3 1 +#endif + +// Level 3 Round-Robin Arbitration +// <0=> Static arbitration scheme for channel with priority 3 +// <1=> Round-robin arbitration scheme for channel with priority 3 +// Defines Level 3 Arbitration for DMA channels +// dmac_rrlvlen3 +#ifndef CONF_DMAC_RRLVLEN3 +#define CONF_DMAC_RRLVLEN3 0 +#endif + +// Level 3 Channel Priority Number <0x00-0xFF> +// dmac_lvlpri3 +#ifndef CONF_DMAC_LVLPRI3 +#define CONF_DMAC_LVLPRI3 0 +#endif +// Debug Run +// Indicates whether Debug Run is enabled or not +// dmac_dbgrun +#ifndef CONF_DMAC_DBGRUN +#define CONF_DMAC_DBGRUN 0 +#endif + +// Channel 0 settings +// dmac_channel_0_settings +#ifndef CONF_DMAC_CHANNEL_0_SETTINGS +#define CONF_DMAC_CHANNEL_0_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 0 is running in standby mode or not +// dmac_runstdby_0 +#ifndef CONF_DMAC_RUNSTDBY_0 +#define CONF_DMAC_RUNSTDBY_0 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_0 +#ifndef CONF_DMAC_TRIGACT_0 +#define CONF_DMAC_TRIGACT_0 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_0 +#ifndef CONF_DMAC_TRIGSRC_0 +#define CONF_DMAC_TRIGSRC_0 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_0 +#ifndef CONF_DMAC_LVL_0 +#define CONF_DMAC_LVL_0 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_0 +#ifndef CONF_DMAC_EVOE_0 +#define CONF_DMAC_EVOE_0 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_0 +#ifndef CONF_DMAC_EVIE_0 +#define CONF_DMAC_EVIE_0 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_0 +#ifndef CONF_DMAC_EVACT_0 +#define CONF_DMAC_EVACT_0 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_0 +#ifndef CONF_DMAC_STEPSIZE_0 +#define CONF_DMAC_STEPSIZE_0 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_0 +#ifndef CONF_DMAC_STEPSEL_0 +#define CONF_DMAC_STEPSEL_0 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_0 +#ifndef CONF_DMAC_SRCINC_0 +#define CONF_DMAC_SRCINC_0 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_0 +#ifndef CONF_DMAC_DSTINC_0 +#define CONF_DMAC_DSTINC_0 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_0 +#ifndef CONF_DMAC_BEATSIZE_0 +#define CONF_DMAC_BEATSIZE_0 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_0 +#ifndef CONF_DMAC_BLOCKACT_0 +#define CONF_DMAC_BLOCKACT_0 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_0 +#ifndef CONF_DMAC_EVOSEL_0 +#define CONF_DMAC_EVOSEL_0 0 +#endif +// + +// Channel 1 settings +// dmac_channel_1_settings +#ifndef CONF_DMAC_CHANNEL_1_SETTINGS +#define CONF_DMAC_CHANNEL_1_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 1 is running in standby mode or not +// dmac_runstdby_1 +#ifndef CONF_DMAC_RUNSTDBY_1 +#define CONF_DMAC_RUNSTDBY_1 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_1 +#ifndef CONF_DMAC_TRIGACT_1 +#define CONF_DMAC_TRIGACT_1 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_1 +#ifndef CONF_DMAC_TRIGSRC_1 +#define CONF_DMAC_TRIGSRC_1 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_1 +#ifndef CONF_DMAC_LVL_1 +#define CONF_DMAC_LVL_1 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_1 +#ifndef CONF_DMAC_EVOE_1 +#define CONF_DMAC_EVOE_1 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_1 +#ifndef CONF_DMAC_EVIE_1 +#define CONF_DMAC_EVIE_1 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_1 +#ifndef CONF_DMAC_EVACT_1 +#define CONF_DMAC_EVACT_1 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_1 +#ifndef CONF_DMAC_STEPSIZE_1 +#define CONF_DMAC_STEPSIZE_1 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_1 +#ifndef CONF_DMAC_STEPSEL_1 +#define CONF_DMAC_STEPSEL_1 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_1 +#ifndef CONF_DMAC_SRCINC_1 +#define CONF_DMAC_SRCINC_1 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_1 +#ifndef CONF_DMAC_DSTINC_1 +#define CONF_DMAC_DSTINC_1 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_1 +#ifndef CONF_DMAC_BEATSIZE_1 +#define CONF_DMAC_BEATSIZE_1 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_1 +#ifndef CONF_DMAC_BLOCKACT_1 +#define CONF_DMAC_BLOCKACT_1 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_1 +#ifndef CONF_DMAC_EVOSEL_1 +#define CONF_DMAC_EVOSEL_1 0 +#endif +// + +// Channel 2 settings +// dmac_channel_2_settings +#ifndef CONF_DMAC_CHANNEL_2_SETTINGS +#define CONF_DMAC_CHANNEL_2_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 2 is running in standby mode or not +// dmac_runstdby_2 +#ifndef CONF_DMAC_RUNSTDBY_2 +#define CONF_DMAC_RUNSTDBY_2 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_2 +#ifndef CONF_DMAC_TRIGACT_2 +#define CONF_DMAC_TRIGACT_2 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_2 +#ifndef CONF_DMAC_TRIGSRC_2 +#define CONF_DMAC_TRIGSRC_2 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_2 +#ifndef CONF_DMAC_LVL_2 +#define CONF_DMAC_LVL_2 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_2 +#ifndef CONF_DMAC_EVOE_2 +#define CONF_DMAC_EVOE_2 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_2 +#ifndef CONF_DMAC_EVIE_2 +#define CONF_DMAC_EVIE_2 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_2 +#ifndef CONF_DMAC_EVACT_2 +#define CONF_DMAC_EVACT_2 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_2 +#ifndef CONF_DMAC_STEPSIZE_2 +#define CONF_DMAC_STEPSIZE_2 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_2 +#ifndef CONF_DMAC_STEPSEL_2 +#define CONF_DMAC_STEPSEL_2 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_2 +#ifndef CONF_DMAC_SRCINC_2 +#define CONF_DMAC_SRCINC_2 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_2 +#ifndef CONF_DMAC_DSTINC_2 +#define CONF_DMAC_DSTINC_2 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_2 +#ifndef CONF_DMAC_BEATSIZE_2 +#define CONF_DMAC_BEATSIZE_2 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_2 +#ifndef CONF_DMAC_BLOCKACT_2 +#define CONF_DMAC_BLOCKACT_2 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_2 +#ifndef CONF_DMAC_EVOSEL_2 +#define CONF_DMAC_EVOSEL_2 0 +#endif +// + +// Channel 3 settings +// dmac_channel_3_settings +#ifndef CONF_DMAC_CHANNEL_3_SETTINGS +#define CONF_DMAC_CHANNEL_3_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 3 is running in standby mode or not +// dmac_runstdby_3 +#ifndef CONF_DMAC_RUNSTDBY_3 +#define CONF_DMAC_RUNSTDBY_3 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_3 +#ifndef CONF_DMAC_TRIGACT_3 +#define CONF_DMAC_TRIGACT_3 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_3 +#ifndef CONF_DMAC_TRIGSRC_3 +#define CONF_DMAC_TRIGSRC_3 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_3 +#ifndef CONF_DMAC_LVL_3 +#define CONF_DMAC_LVL_3 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_3 +#ifndef CONF_DMAC_EVOE_3 +#define CONF_DMAC_EVOE_3 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_3 +#ifndef CONF_DMAC_EVIE_3 +#define CONF_DMAC_EVIE_3 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_3 +#ifndef CONF_DMAC_EVACT_3 +#define CONF_DMAC_EVACT_3 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_3 +#ifndef CONF_DMAC_STEPSIZE_3 +#define CONF_DMAC_STEPSIZE_3 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_3 +#ifndef CONF_DMAC_STEPSEL_3 +#define CONF_DMAC_STEPSEL_3 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_3 +#ifndef CONF_DMAC_SRCINC_3 +#define CONF_DMAC_SRCINC_3 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_3 +#ifndef CONF_DMAC_DSTINC_3 +#define CONF_DMAC_DSTINC_3 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_3 +#ifndef CONF_DMAC_BEATSIZE_3 +#define CONF_DMAC_BEATSIZE_3 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_3 +#ifndef CONF_DMAC_BLOCKACT_3 +#define CONF_DMAC_BLOCKACT_3 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_3 +#ifndef CONF_DMAC_EVOSEL_3 +#define CONF_DMAC_EVOSEL_3 0 +#endif +// + +// Channel 4 settings +// dmac_channel_4_settings +#ifndef CONF_DMAC_CHANNEL_4_SETTINGS +#define CONF_DMAC_CHANNEL_4_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 4 is running in standby mode or not +// dmac_runstdby_4 +#ifndef CONF_DMAC_RUNSTDBY_4 +#define CONF_DMAC_RUNSTDBY_4 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_4 +#ifndef CONF_DMAC_TRIGACT_4 +#define CONF_DMAC_TRIGACT_4 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_4 +#ifndef CONF_DMAC_TRIGSRC_4 +#define CONF_DMAC_TRIGSRC_4 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_4 +#ifndef CONF_DMAC_LVL_4 +#define CONF_DMAC_LVL_4 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_4 +#ifndef CONF_DMAC_EVOE_4 +#define CONF_DMAC_EVOE_4 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_4 +#ifndef CONF_DMAC_EVIE_4 +#define CONF_DMAC_EVIE_4 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_4 +#ifndef CONF_DMAC_EVACT_4 +#define CONF_DMAC_EVACT_4 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_4 +#ifndef CONF_DMAC_STEPSIZE_4 +#define CONF_DMAC_STEPSIZE_4 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_4 +#ifndef CONF_DMAC_STEPSEL_4 +#define CONF_DMAC_STEPSEL_4 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_4 +#ifndef CONF_DMAC_SRCINC_4 +#define CONF_DMAC_SRCINC_4 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_4 +#ifndef CONF_DMAC_DSTINC_4 +#define CONF_DMAC_DSTINC_4 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_4 +#ifndef CONF_DMAC_BEATSIZE_4 +#define CONF_DMAC_BEATSIZE_4 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_4 +#ifndef CONF_DMAC_BLOCKACT_4 +#define CONF_DMAC_BLOCKACT_4 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_4 +#ifndef CONF_DMAC_EVOSEL_4 +#define CONF_DMAC_EVOSEL_4 0 +#endif +// + +// Channel 5 settings +// dmac_channel_5_settings +#ifndef CONF_DMAC_CHANNEL_5_SETTINGS +#define CONF_DMAC_CHANNEL_5_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 5 is running in standby mode or not +// dmac_runstdby_5 +#ifndef CONF_DMAC_RUNSTDBY_5 +#define CONF_DMAC_RUNSTDBY_5 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_5 +#ifndef CONF_DMAC_TRIGACT_5 +#define CONF_DMAC_TRIGACT_5 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_5 +#ifndef CONF_DMAC_TRIGSRC_5 +#define CONF_DMAC_TRIGSRC_5 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_5 +#ifndef CONF_DMAC_LVL_5 +#define CONF_DMAC_LVL_5 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_5 +#ifndef CONF_DMAC_EVOE_5 +#define CONF_DMAC_EVOE_5 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_5 +#ifndef CONF_DMAC_EVIE_5 +#define CONF_DMAC_EVIE_5 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_5 +#ifndef CONF_DMAC_EVACT_5 +#define CONF_DMAC_EVACT_5 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_5 +#ifndef CONF_DMAC_STEPSIZE_5 +#define CONF_DMAC_STEPSIZE_5 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_5 +#ifndef CONF_DMAC_STEPSEL_5 +#define CONF_DMAC_STEPSEL_5 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_5 +#ifndef CONF_DMAC_SRCINC_5 +#define CONF_DMAC_SRCINC_5 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_5 +#ifndef CONF_DMAC_DSTINC_5 +#define CONF_DMAC_DSTINC_5 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_5 +#ifndef CONF_DMAC_BEATSIZE_5 +#define CONF_DMAC_BEATSIZE_5 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_5 +#ifndef CONF_DMAC_BLOCKACT_5 +#define CONF_DMAC_BLOCKACT_5 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_5 +#ifndef CONF_DMAC_EVOSEL_5 +#define CONF_DMAC_EVOSEL_5 0 +#endif +// + +// Channel 6 settings +// dmac_channel_6_settings +#ifndef CONF_DMAC_CHANNEL_6_SETTINGS +#define CONF_DMAC_CHANNEL_6_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 6 is running in standby mode or not +// dmac_runstdby_6 +#ifndef CONF_DMAC_RUNSTDBY_6 +#define CONF_DMAC_RUNSTDBY_6 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_6 +#ifndef CONF_DMAC_TRIGACT_6 +#define CONF_DMAC_TRIGACT_6 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_6 +#ifndef CONF_DMAC_TRIGSRC_6 +#define CONF_DMAC_TRIGSRC_6 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_6 +#ifndef CONF_DMAC_LVL_6 +#define CONF_DMAC_LVL_6 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_6 +#ifndef CONF_DMAC_EVOE_6 +#define CONF_DMAC_EVOE_6 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_6 +#ifndef CONF_DMAC_EVIE_6 +#define CONF_DMAC_EVIE_6 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_6 +#ifndef CONF_DMAC_EVACT_6 +#define CONF_DMAC_EVACT_6 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_6 +#ifndef CONF_DMAC_STEPSIZE_6 +#define CONF_DMAC_STEPSIZE_6 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_6 +#ifndef CONF_DMAC_STEPSEL_6 +#define CONF_DMAC_STEPSEL_6 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_6 +#ifndef CONF_DMAC_SRCINC_6 +#define CONF_DMAC_SRCINC_6 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_6 +#ifndef CONF_DMAC_DSTINC_6 +#define CONF_DMAC_DSTINC_6 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_6 +#ifndef CONF_DMAC_BEATSIZE_6 +#define CONF_DMAC_BEATSIZE_6 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_6 +#ifndef CONF_DMAC_BLOCKACT_6 +#define CONF_DMAC_BLOCKACT_6 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_6 +#ifndef CONF_DMAC_EVOSEL_6 +#define CONF_DMAC_EVOSEL_6 0 +#endif +// + +// Channel 7 settings +// dmac_channel_7_settings +#ifndef CONF_DMAC_CHANNEL_7_SETTINGS +#define CONF_DMAC_CHANNEL_7_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 7 is running in standby mode or not +// dmac_runstdby_7 +#ifndef CONF_DMAC_RUNSTDBY_7 +#define CONF_DMAC_RUNSTDBY_7 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_7 +#ifndef CONF_DMAC_TRIGACT_7 +#define CONF_DMAC_TRIGACT_7 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_7 +#ifndef CONF_DMAC_TRIGSRC_7 +#define CONF_DMAC_TRIGSRC_7 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_7 +#ifndef CONF_DMAC_LVL_7 +#define CONF_DMAC_LVL_7 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_7 +#ifndef CONF_DMAC_EVOE_7 +#define CONF_DMAC_EVOE_7 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_7 +#ifndef CONF_DMAC_EVIE_7 +#define CONF_DMAC_EVIE_7 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_7 +#ifndef CONF_DMAC_EVACT_7 +#define CONF_DMAC_EVACT_7 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_7 +#ifndef CONF_DMAC_STEPSIZE_7 +#define CONF_DMAC_STEPSIZE_7 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_7 +#ifndef CONF_DMAC_STEPSEL_7 +#define CONF_DMAC_STEPSEL_7 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_7 +#ifndef CONF_DMAC_SRCINC_7 +#define CONF_DMAC_SRCINC_7 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_7 +#ifndef CONF_DMAC_DSTINC_7 +#define CONF_DMAC_DSTINC_7 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_7 +#ifndef CONF_DMAC_BEATSIZE_7 +#define CONF_DMAC_BEATSIZE_7 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_7 +#ifndef CONF_DMAC_BLOCKACT_7 +#define CONF_DMAC_BLOCKACT_7 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_7 +#ifndef CONF_DMAC_EVOSEL_7 +#define CONF_DMAC_EVOSEL_7 0 +#endif +// + +// Channel 8 settings +// dmac_channel_8_settings +#ifndef CONF_DMAC_CHANNEL_8_SETTINGS +#define CONF_DMAC_CHANNEL_8_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 8 is running in standby mode or not +// dmac_runstdby_8 +#ifndef CONF_DMAC_RUNSTDBY_8 +#define CONF_DMAC_RUNSTDBY_8 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_8 +#ifndef CONF_DMAC_TRIGACT_8 +#define CONF_DMAC_TRIGACT_8 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_8 +#ifndef CONF_DMAC_TRIGSRC_8 +#define CONF_DMAC_TRIGSRC_8 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_8 +#ifndef CONF_DMAC_LVL_8 +#define CONF_DMAC_LVL_8 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_8 +#ifndef CONF_DMAC_EVOE_8 +#define CONF_DMAC_EVOE_8 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_8 +#ifndef CONF_DMAC_EVIE_8 +#define CONF_DMAC_EVIE_8 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_8 +#ifndef CONF_DMAC_EVACT_8 +#define CONF_DMAC_EVACT_8 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_8 +#ifndef CONF_DMAC_STEPSIZE_8 +#define CONF_DMAC_STEPSIZE_8 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_8 +#ifndef CONF_DMAC_STEPSEL_8 +#define CONF_DMAC_STEPSEL_8 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_8 +#ifndef CONF_DMAC_SRCINC_8 +#define CONF_DMAC_SRCINC_8 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_8 +#ifndef CONF_DMAC_DSTINC_8 +#define CONF_DMAC_DSTINC_8 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_8 +#ifndef CONF_DMAC_BEATSIZE_8 +#define CONF_DMAC_BEATSIZE_8 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_8 +#ifndef CONF_DMAC_BLOCKACT_8 +#define CONF_DMAC_BLOCKACT_8 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_8 +#ifndef CONF_DMAC_EVOSEL_8 +#define CONF_DMAC_EVOSEL_8 0 +#endif +// + +// Channel 9 settings +// dmac_channel_9_settings +#ifndef CONF_DMAC_CHANNEL_9_SETTINGS +#define CONF_DMAC_CHANNEL_9_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 9 is running in standby mode or not +// dmac_runstdby_9 +#ifndef CONF_DMAC_RUNSTDBY_9 +#define CONF_DMAC_RUNSTDBY_9 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_9 +#ifndef CONF_DMAC_TRIGACT_9 +#define CONF_DMAC_TRIGACT_9 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_9 +#ifndef CONF_DMAC_TRIGSRC_9 +#define CONF_DMAC_TRIGSRC_9 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_9 +#ifndef CONF_DMAC_LVL_9 +#define CONF_DMAC_LVL_9 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_9 +#ifndef CONF_DMAC_EVOE_9 +#define CONF_DMAC_EVOE_9 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_9 +#ifndef CONF_DMAC_EVIE_9 +#define CONF_DMAC_EVIE_9 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_9 +#ifndef CONF_DMAC_EVACT_9 +#define CONF_DMAC_EVACT_9 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_9 +#ifndef CONF_DMAC_STEPSIZE_9 +#define CONF_DMAC_STEPSIZE_9 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_9 +#ifndef CONF_DMAC_STEPSEL_9 +#define CONF_DMAC_STEPSEL_9 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_9 +#ifndef CONF_DMAC_SRCINC_9 +#define CONF_DMAC_SRCINC_9 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_9 +#ifndef CONF_DMAC_DSTINC_9 +#define CONF_DMAC_DSTINC_9 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_9 +#ifndef CONF_DMAC_BEATSIZE_9 +#define CONF_DMAC_BEATSIZE_9 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_9 +#ifndef CONF_DMAC_BLOCKACT_9 +#define CONF_DMAC_BLOCKACT_9 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_9 +#ifndef CONF_DMAC_EVOSEL_9 +#define CONF_DMAC_EVOSEL_9 0 +#endif +// + +// Channel 10 settings +// dmac_channel_10_settings +#ifndef CONF_DMAC_CHANNEL_10_SETTINGS +#define CONF_DMAC_CHANNEL_10_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 10 is running in standby mode or not +// dmac_runstdby_10 +#ifndef CONF_DMAC_RUNSTDBY_10 +#define CONF_DMAC_RUNSTDBY_10 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_10 +#ifndef CONF_DMAC_TRIGACT_10 +#define CONF_DMAC_TRIGACT_10 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_10 +#ifndef CONF_DMAC_TRIGSRC_10 +#define CONF_DMAC_TRIGSRC_10 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_10 +#ifndef CONF_DMAC_LVL_10 +#define CONF_DMAC_LVL_10 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_10 +#ifndef CONF_DMAC_EVOE_10 +#define CONF_DMAC_EVOE_10 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_10 +#ifndef CONF_DMAC_EVIE_10 +#define CONF_DMAC_EVIE_10 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_10 +#ifndef CONF_DMAC_EVACT_10 +#define CONF_DMAC_EVACT_10 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_10 +#ifndef CONF_DMAC_STEPSIZE_10 +#define CONF_DMAC_STEPSIZE_10 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_10 +#ifndef CONF_DMAC_STEPSEL_10 +#define CONF_DMAC_STEPSEL_10 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_10 +#ifndef CONF_DMAC_SRCINC_10 +#define CONF_DMAC_SRCINC_10 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_10 +#ifndef CONF_DMAC_DSTINC_10 +#define CONF_DMAC_DSTINC_10 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_10 +#ifndef CONF_DMAC_BEATSIZE_10 +#define CONF_DMAC_BEATSIZE_10 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_10 +#ifndef CONF_DMAC_BLOCKACT_10 +#define CONF_DMAC_BLOCKACT_10 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_10 +#ifndef CONF_DMAC_EVOSEL_10 +#define CONF_DMAC_EVOSEL_10 0 +#endif +// + +// Channel 11 settings +// dmac_channel_11_settings +#ifndef CONF_DMAC_CHANNEL_11_SETTINGS +#define CONF_DMAC_CHANNEL_11_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 11 is running in standby mode or not +// dmac_runstdby_11 +#ifndef CONF_DMAC_RUNSTDBY_11 +#define CONF_DMAC_RUNSTDBY_11 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_11 +#ifndef CONF_DMAC_TRIGACT_11 +#define CONF_DMAC_TRIGACT_11 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_11 +#ifndef CONF_DMAC_TRIGSRC_11 +#define CONF_DMAC_TRIGSRC_11 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_11 +#ifndef CONF_DMAC_LVL_11 +#define CONF_DMAC_LVL_11 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_11 +#ifndef CONF_DMAC_EVOE_11 +#define CONF_DMAC_EVOE_11 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_11 +#ifndef CONF_DMAC_EVIE_11 +#define CONF_DMAC_EVIE_11 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_11 +#ifndef CONF_DMAC_EVACT_11 +#define CONF_DMAC_EVACT_11 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_11 +#ifndef CONF_DMAC_STEPSIZE_11 +#define CONF_DMAC_STEPSIZE_11 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_11 +#ifndef CONF_DMAC_STEPSEL_11 +#define CONF_DMAC_STEPSEL_11 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_11 +#ifndef CONF_DMAC_SRCINC_11 +#define CONF_DMAC_SRCINC_11 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_11 +#ifndef CONF_DMAC_DSTINC_11 +#define CONF_DMAC_DSTINC_11 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_11 +#ifndef CONF_DMAC_BEATSIZE_11 +#define CONF_DMAC_BEATSIZE_11 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_11 +#ifndef CONF_DMAC_BLOCKACT_11 +#define CONF_DMAC_BLOCKACT_11 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_11 +#ifndef CONF_DMAC_EVOSEL_11 +#define CONF_DMAC_EVOSEL_11 0 +#endif +// + +// Channel 12 settings +// dmac_channel_12_settings +#ifndef CONF_DMAC_CHANNEL_12_SETTINGS +#define CONF_DMAC_CHANNEL_12_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 12 is running in standby mode or not +// dmac_runstdby_12 +#ifndef CONF_DMAC_RUNSTDBY_12 +#define CONF_DMAC_RUNSTDBY_12 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_12 +#ifndef CONF_DMAC_TRIGACT_12 +#define CONF_DMAC_TRIGACT_12 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_12 +#ifndef CONF_DMAC_TRIGSRC_12 +#define CONF_DMAC_TRIGSRC_12 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_12 +#ifndef CONF_DMAC_LVL_12 +#define CONF_DMAC_LVL_12 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_12 +#ifndef CONF_DMAC_EVOE_12 +#define CONF_DMAC_EVOE_12 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_12 +#ifndef CONF_DMAC_EVIE_12 +#define CONF_DMAC_EVIE_12 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_12 +#ifndef CONF_DMAC_EVACT_12 +#define CONF_DMAC_EVACT_12 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_12 +#ifndef CONF_DMAC_STEPSIZE_12 +#define CONF_DMAC_STEPSIZE_12 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_12 +#ifndef CONF_DMAC_STEPSEL_12 +#define CONF_DMAC_STEPSEL_12 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_12 +#ifndef CONF_DMAC_SRCINC_12 +#define CONF_DMAC_SRCINC_12 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_12 +#ifndef CONF_DMAC_DSTINC_12 +#define CONF_DMAC_DSTINC_12 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_12 +#ifndef CONF_DMAC_BEATSIZE_12 +#define CONF_DMAC_BEATSIZE_12 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_12 +#ifndef CONF_DMAC_BLOCKACT_12 +#define CONF_DMAC_BLOCKACT_12 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_12 +#ifndef CONF_DMAC_EVOSEL_12 +#define CONF_DMAC_EVOSEL_12 0 +#endif +// + +// Channel 13 settings +// dmac_channel_13_settings +#ifndef CONF_DMAC_CHANNEL_13_SETTINGS +#define CONF_DMAC_CHANNEL_13_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 13 is running in standby mode or not +// dmac_runstdby_13 +#ifndef CONF_DMAC_RUNSTDBY_13 +#define CONF_DMAC_RUNSTDBY_13 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_13 +#ifndef CONF_DMAC_TRIGACT_13 +#define CONF_DMAC_TRIGACT_13 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_13 +#ifndef CONF_DMAC_TRIGSRC_13 +#define CONF_DMAC_TRIGSRC_13 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_13 +#ifndef CONF_DMAC_LVL_13 +#define CONF_DMAC_LVL_13 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_13 +#ifndef CONF_DMAC_EVOE_13 +#define CONF_DMAC_EVOE_13 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_13 +#ifndef CONF_DMAC_EVIE_13 +#define CONF_DMAC_EVIE_13 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_13 +#ifndef CONF_DMAC_EVACT_13 +#define CONF_DMAC_EVACT_13 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_13 +#ifndef CONF_DMAC_STEPSIZE_13 +#define CONF_DMAC_STEPSIZE_13 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_13 +#ifndef CONF_DMAC_STEPSEL_13 +#define CONF_DMAC_STEPSEL_13 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_13 +#ifndef CONF_DMAC_SRCINC_13 +#define CONF_DMAC_SRCINC_13 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_13 +#ifndef CONF_DMAC_DSTINC_13 +#define CONF_DMAC_DSTINC_13 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_13 +#ifndef CONF_DMAC_BEATSIZE_13 +#define CONF_DMAC_BEATSIZE_13 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_13 +#ifndef CONF_DMAC_BLOCKACT_13 +#define CONF_DMAC_BLOCKACT_13 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_13 +#ifndef CONF_DMAC_EVOSEL_13 +#define CONF_DMAC_EVOSEL_13 0 +#endif +// + +// Channel 14 settings +// dmac_channel_14_settings +#ifndef CONF_DMAC_CHANNEL_14_SETTINGS +#define CONF_DMAC_CHANNEL_14_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 14 is running in standby mode or not +// dmac_runstdby_14 +#ifndef CONF_DMAC_RUNSTDBY_14 +#define CONF_DMAC_RUNSTDBY_14 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_14 +#ifndef CONF_DMAC_TRIGACT_14 +#define CONF_DMAC_TRIGACT_14 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_14 +#ifndef CONF_DMAC_TRIGSRC_14 +#define CONF_DMAC_TRIGSRC_14 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_14 +#ifndef CONF_DMAC_LVL_14 +#define CONF_DMAC_LVL_14 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_14 +#ifndef CONF_DMAC_EVOE_14 +#define CONF_DMAC_EVOE_14 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_14 +#ifndef CONF_DMAC_EVIE_14 +#define CONF_DMAC_EVIE_14 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_14 +#ifndef CONF_DMAC_EVACT_14 +#define CONF_DMAC_EVACT_14 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_14 +#ifndef CONF_DMAC_STEPSIZE_14 +#define CONF_DMAC_STEPSIZE_14 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_14 +#ifndef CONF_DMAC_STEPSEL_14 +#define CONF_DMAC_STEPSEL_14 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_14 +#ifndef CONF_DMAC_SRCINC_14 +#define CONF_DMAC_SRCINC_14 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_14 +#ifndef CONF_DMAC_DSTINC_14 +#define CONF_DMAC_DSTINC_14 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_14 +#ifndef CONF_DMAC_BEATSIZE_14 +#define CONF_DMAC_BEATSIZE_14 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_14 +#ifndef CONF_DMAC_BLOCKACT_14 +#define CONF_DMAC_BLOCKACT_14 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_14 +#ifndef CONF_DMAC_EVOSEL_14 +#define CONF_DMAC_EVOSEL_14 0 +#endif +// + +// Channel 15 settings +// dmac_channel_15_settings +#ifndef CONF_DMAC_CHANNEL_15_SETTINGS +#define CONF_DMAC_CHANNEL_15_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 15 is running in standby mode or not +// dmac_runstdby_15 +#ifndef CONF_DMAC_RUNSTDBY_15 +#define CONF_DMAC_RUNSTDBY_15 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_15 +#ifndef CONF_DMAC_TRIGACT_15 +#define CONF_DMAC_TRIGACT_15 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_15 +#ifndef CONF_DMAC_TRIGSRC_15 +#define CONF_DMAC_TRIGSRC_15 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_15 +#ifndef CONF_DMAC_LVL_15 +#define CONF_DMAC_LVL_15 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_15 +#ifndef CONF_DMAC_EVOE_15 +#define CONF_DMAC_EVOE_15 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_15 +#ifndef CONF_DMAC_EVIE_15 +#define CONF_DMAC_EVIE_15 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_15 +#ifndef CONF_DMAC_EVACT_15 +#define CONF_DMAC_EVACT_15 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_15 +#ifndef CONF_DMAC_STEPSIZE_15 +#define CONF_DMAC_STEPSIZE_15 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_15 +#ifndef CONF_DMAC_STEPSEL_15 +#define CONF_DMAC_STEPSEL_15 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_15 +#ifndef CONF_DMAC_SRCINC_15 +#define CONF_DMAC_SRCINC_15 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_15 +#ifndef CONF_DMAC_DSTINC_15 +#define CONF_DMAC_DSTINC_15 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_15 +#ifndef CONF_DMAC_BEATSIZE_15 +#define CONF_DMAC_BEATSIZE_15 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_15 +#ifndef CONF_DMAC_BLOCKACT_15 +#define CONF_DMAC_BLOCKACT_15 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_15 +#ifndef CONF_DMAC_EVOSEL_15 +#define CONF_DMAC_EVOSEL_15 0 +#endif +// + +// Channel 16 settings +// dmac_channel_16_settings +#ifndef CONF_DMAC_CHANNEL_16_SETTINGS +#define CONF_DMAC_CHANNEL_16_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 16 is running in standby mode or not +// dmac_runstdby_16 +#ifndef CONF_DMAC_RUNSTDBY_16 +#define CONF_DMAC_RUNSTDBY_16 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_16 +#ifndef CONF_DMAC_TRIGACT_16 +#define CONF_DMAC_TRIGACT_16 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_16 +#ifndef CONF_DMAC_TRIGSRC_16 +#define CONF_DMAC_TRIGSRC_16 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_16 +#ifndef CONF_DMAC_LVL_16 +#define CONF_DMAC_LVL_16 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_16 +#ifndef CONF_DMAC_EVOE_16 +#define CONF_DMAC_EVOE_16 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_16 +#ifndef CONF_DMAC_EVIE_16 +#define CONF_DMAC_EVIE_16 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_16 +#ifndef CONF_DMAC_EVACT_16 +#define CONF_DMAC_EVACT_16 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_16 +#ifndef CONF_DMAC_STEPSIZE_16 +#define CONF_DMAC_STEPSIZE_16 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_16 +#ifndef CONF_DMAC_STEPSEL_16 +#define CONF_DMAC_STEPSEL_16 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_16 +#ifndef CONF_DMAC_SRCINC_16 +#define CONF_DMAC_SRCINC_16 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_16 +#ifndef CONF_DMAC_DSTINC_16 +#define CONF_DMAC_DSTINC_16 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_16 +#ifndef CONF_DMAC_BEATSIZE_16 +#define CONF_DMAC_BEATSIZE_16 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_16 +#ifndef CONF_DMAC_BLOCKACT_16 +#define CONF_DMAC_BLOCKACT_16 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_16 +#ifndef CONF_DMAC_EVOSEL_16 +#define CONF_DMAC_EVOSEL_16 0 +#endif +// + +// Channel 17 settings +// dmac_channel_17_settings +#ifndef CONF_DMAC_CHANNEL_17_SETTINGS +#define CONF_DMAC_CHANNEL_17_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 17 is running in standby mode or not +// dmac_runstdby_17 +#ifndef CONF_DMAC_RUNSTDBY_17 +#define CONF_DMAC_RUNSTDBY_17 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_17 +#ifndef CONF_DMAC_TRIGACT_17 +#define CONF_DMAC_TRIGACT_17 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_17 +#ifndef CONF_DMAC_TRIGSRC_17 +#define CONF_DMAC_TRIGSRC_17 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_17 +#ifndef CONF_DMAC_LVL_17 +#define CONF_DMAC_LVL_17 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_17 +#ifndef CONF_DMAC_EVOE_17 +#define CONF_DMAC_EVOE_17 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_17 +#ifndef CONF_DMAC_EVIE_17 +#define CONF_DMAC_EVIE_17 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_17 +#ifndef CONF_DMAC_EVACT_17 +#define CONF_DMAC_EVACT_17 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_17 +#ifndef CONF_DMAC_STEPSIZE_17 +#define CONF_DMAC_STEPSIZE_17 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_17 +#ifndef CONF_DMAC_STEPSEL_17 +#define CONF_DMAC_STEPSEL_17 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_17 +#ifndef CONF_DMAC_SRCINC_17 +#define CONF_DMAC_SRCINC_17 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_17 +#ifndef CONF_DMAC_DSTINC_17 +#define CONF_DMAC_DSTINC_17 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_17 +#ifndef CONF_DMAC_BEATSIZE_17 +#define CONF_DMAC_BEATSIZE_17 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_17 +#ifndef CONF_DMAC_BLOCKACT_17 +#define CONF_DMAC_BLOCKACT_17 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_17 +#ifndef CONF_DMAC_EVOSEL_17 +#define CONF_DMAC_EVOSEL_17 0 +#endif +// + +// Channel 18 settings +// dmac_channel_18_settings +#ifndef CONF_DMAC_CHANNEL_18_SETTINGS +#define CONF_DMAC_CHANNEL_18_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 18 is running in standby mode or not +// dmac_runstdby_18 +#ifndef CONF_DMAC_RUNSTDBY_18 +#define CONF_DMAC_RUNSTDBY_18 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_18 +#ifndef CONF_DMAC_TRIGACT_18 +#define CONF_DMAC_TRIGACT_18 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_18 +#ifndef CONF_DMAC_TRIGSRC_18 +#define CONF_DMAC_TRIGSRC_18 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_18 +#ifndef CONF_DMAC_LVL_18 +#define CONF_DMAC_LVL_18 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_18 +#ifndef CONF_DMAC_EVOE_18 +#define CONF_DMAC_EVOE_18 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_18 +#ifndef CONF_DMAC_EVIE_18 +#define CONF_DMAC_EVIE_18 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_18 +#ifndef CONF_DMAC_EVACT_18 +#define CONF_DMAC_EVACT_18 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_18 +#ifndef CONF_DMAC_STEPSIZE_18 +#define CONF_DMAC_STEPSIZE_18 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_18 +#ifndef CONF_DMAC_STEPSEL_18 +#define CONF_DMAC_STEPSEL_18 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_18 +#ifndef CONF_DMAC_SRCINC_18 +#define CONF_DMAC_SRCINC_18 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_18 +#ifndef CONF_DMAC_DSTINC_18 +#define CONF_DMAC_DSTINC_18 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_18 +#ifndef CONF_DMAC_BEATSIZE_18 +#define CONF_DMAC_BEATSIZE_18 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_18 +#ifndef CONF_DMAC_BLOCKACT_18 +#define CONF_DMAC_BLOCKACT_18 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_18 +#ifndef CONF_DMAC_EVOSEL_18 +#define CONF_DMAC_EVOSEL_18 0 +#endif +// + +// Channel 19 settings +// dmac_channel_19_settings +#ifndef CONF_DMAC_CHANNEL_19_SETTINGS +#define CONF_DMAC_CHANNEL_19_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 19 is running in standby mode or not +// dmac_runstdby_19 +#ifndef CONF_DMAC_RUNSTDBY_19 +#define CONF_DMAC_RUNSTDBY_19 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_19 +#ifndef CONF_DMAC_TRIGACT_19 +#define CONF_DMAC_TRIGACT_19 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_19 +#ifndef CONF_DMAC_TRIGSRC_19 +#define CONF_DMAC_TRIGSRC_19 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_19 +#ifndef CONF_DMAC_LVL_19 +#define CONF_DMAC_LVL_19 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_19 +#ifndef CONF_DMAC_EVOE_19 +#define CONF_DMAC_EVOE_19 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_19 +#ifndef CONF_DMAC_EVIE_19 +#define CONF_DMAC_EVIE_19 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_19 +#ifndef CONF_DMAC_EVACT_19 +#define CONF_DMAC_EVACT_19 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_19 +#ifndef CONF_DMAC_STEPSIZE_19 +#define CONF_DMAC_STEPSIZE_19 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_19 +#ifndef CONF_DMAC_STEPSEL_19 +#define CONF_DMAC_STEPSEL_19 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_19 +#ifndef CONF_DMAC_SRCINC_19 +#define CONF_DMAC_SRCINC_19 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_19 +#ifndef CONF_DMAC_DSTINC_19 +#define CONF_DMAC_DSTINC_19 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_19 +#ifndef CONF_DMAC_BEATSIZE_19 +#define CONF_DMAC_BEATSIZE_19 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_19 +#ifndef CONF_DMAC_BLOCKACT_19 +#define CONF_DMAC_BLOCKACT_19 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_19 +#ifndef CONF_DMAC_EVOSEL_19 +#define CONF_DMAC_EVOSEL_19 0 +#endif +// + +// Channel 20 settings +// dmac_channel_20_settings +#ifndef CONF_DMAC_CHANNEL_20_SETTINGS +#define CONF_DMAC_CHANNEL_20_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 20 is running in standby mode or not +// dmac_runstdby_20 +#ifndef CONF_DMAC_RUNSTDBY_20 +#define CONF_DMAC_RUNSTDBY_20 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_20 +#ifndef CONF_DMAC_TRIGACT_20 +#define CONF_DMAC_TRIGACT_20 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_20 +#ifndef CONF_DMAC_TRIGSRC_20 +#define CONF_DMAC_TRIGSRC_20 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_20 +#ifndef CONF_DMAC_LVL_20 +#define CONF_DMAC_LVL_20 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_20 +#ifndef CONF_DMAC_EVOE_20 +#define CONF_DMAC_EVOE_20 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_20 +#ifndef CONF_DMAC_EVIE_20 +#define CONF_DMAC_EVIE_20 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_20 +#ifndef CONF_DMAC_EVACT_20 +#define CONF_DMAC_EVACT_20 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_20 +#ifndef CONF_DMAC_STEPSIZE_20 +#define CONF_DMAC_STEPSIZE_20 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_20 +#ifndef CONF_DMAC_STEPSEL_20 +#define CONF_DMAC_STEPSEL_20 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_20 +#ifndef CONF_DMAC_SRCINC_20 +#define CONF_DMAC_SRCINC_20 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_20 +#ifndef CONF_DMAC_DSTINC_20 +#define CONF_DMAC_DSTINC_20 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_20 +#ifndef CONF_DMAC_BEATSIZE_20 +#define CONF_DMAC_BEATSIZE_20 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_20 +#ifndef CONF_DMAC_BLOCKACT_20 +#define CONF_DMAC_BLOCKACT_20 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_20 +#ifndef CONF_DMAC_EVOSEL_20 +#define CONF_DMAC_EVOSEL_20 0 +#endif +// + +// Channel 21 settings +// dmac_channel_21_settings +#ifndef CONF_DMAC_CHANNEL_21_SETTINGS +#define CONF_DMAC_CHANNEL_21_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 21 is running in standby mode or not +// dmac_runstdby_21 +#ifndef CONF_DMAC_RUNSTDBY_21 +#define CONF_DMAC_RUNSTDBY_21 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_21 +#ifndef CONF_DMAC_TRIGACT_21 +#define CONF_DMAC_TRIGACT_21 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_21 +#ifndef CONF_DMAC_TRIGSRC_21 +#define CONF_DMAC_TRIGSRC_21 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_21 +#ifndef CONF_DMAC_LVL_21 +#define CONF_DMAC_LVL_21 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_21 +#ifndef CONF_DMAC_EVOE_21 +#define CONF_DMAC_EVOE_21 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_21 +#ifndef CONF_DMAC_EVIE_21 +#define CONF_DMAC_EVIE_21 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_21 +#ifndef CONF_DMAC_EVACT_21 +#define CONF_DMAC_EVACT_21 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_21 +#ifndef CONF_DMAC_STEPSIZE_21 +#define CONF_DMAC_STEPSIZE_21 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_21 +#ifndef CONF_DMAC_STEPSEL_21 +#define CONF_DMAC_STEPSEL_21 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_21 +#ifndef CONF_DMAC_SRCINC_21 +#define CONF_DMAC_SRCINC_21 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_21 +#ifndef CONF_DMAC_DSTINC_21 +#define CONF_DMAC_DSTINC_21 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_21 +#ifndef CONF_DMAC_BEATSIZE_21 +#define CONF_DMAC_BEATSIZE_21 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_21 +#ifndef CONF_DMAC_BLOCKACT_21 +#define CONF_DMAC_BLOCKACT_21 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_21 +#ifndef CONF_DMAC_EVOSEL_21 +#define CONF_DMAC_EVOSEL_21 0 +#endif +// + +// Channel 22 settings +// dmac_channel_22_settings +#ifndef CONF_DMAC_CHANNEL_22_SETTINGS +#define CONF_DMAC_CHANNEL_22_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 22 is running in standby mode or not +// dmac_runstdby_22 +#ifndef CONF_DMAC_RUNSTDBY_22 +#define CONF_DMAC_RUNSTDBY_22 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_22 +#ifndef CONF_DMAC_TRIGACT_22 +#define CONF_DMAC_TRIGACT_22 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_22 +#ifndef CONF_DMAC_TRIGSRC_22 +#define CONF_DMAC_TRIGSRC_22 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_22 +#ifndef CONF_DMAC_LVL_22 +#define CONF_DMAC_LVL_22 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_22 +#ifndef CONF_DMAC_EVOE_22 +#define CONF_DMAC_EVOE_22 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_22 +#ifndef CONF_DMAC_EVIE_22 +#define CONF_DMAC_EVIE_22 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_22 +#ifndef CONF_DMAC_EVACT_22 +#define CONF_DMAC_EVACT_22 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_22 +#ifndef CONF_DMAC_STEPSIZE_22 +#define CONF_DMAC_STEPSIZE_22 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_22 +#ifndef CONF_DMAC_STEPSEL_22 +#define CONF_DMAC_STEPSEL_22 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_22 +#ifndef CONF_DMAC_SRCINC_22 +#define CONF_DMAC_SRCINC_22 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_22 +#ifndef CONF_DMAC_DSTINC_22 +#define CONF_DMAC_DSTINC_22 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_22 +#ifndef CONF_DMAC_BEATSIZE_22 +#define CONF_DMAC_BEATSIZE_22 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_22 +#ifndef CONF_DMAC_BLOCKACT_22 +#define CONF_DMAC_BLOCKACT_22 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_22 +#ifndef CONF_DMAC_EVOSEL_22 +#define CONF_DMAC_EVOSEL_22 0 +#endif +// + +// Channel 23 settings +// dmac_channel_23_settings +#ifndef CONF_DMAC_CHANNEL_23_SETTINGS +#define CONF_DMAC_CHANNEL_23_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 23 is running in standby mode or not +// dmac_runstdby_23 +#ifndef CONF_DMAC_RUNSTDBY_23 +#define CONF_DMAC_RUNSTDBY_23 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_23 +#ifndef CONF_DMAC_TRIGACT_23 +#define CONF_DMAC_TRIGACT_23 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_23 +#ifndef CONF_DMAC_TRIGSRC_23 +#define CONF_DMAC_TRIGSRC_23 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_23 +#ifndef CONF_DMAC_LVL_23 +#define CONF_DMAC_LVL_23 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_23 +#ifndef CONF_DMAC_EVOE_23 +#define CONF_DMAC_EVOE_23 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_23 +#ifndef CONF_DMAC_EVIE_23 +#define CONF_DMAC_EVIE_23 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_23 +#ifndef CONF_DMAC_EVACT_23 +#define CONF_DMAC_EVACT_23 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_23 +#ifndef CONF_DMAC_STEPSIZE_23 +#define CONF_DMAC_STEPSIZE_23 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_23 +#ifndef CONF_DMAC_STEPSEL_23 +#define CONF_DMAC_STEPSEL_23 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_23 +#ifndef CONF_DMAC_SRCINC_23 +#define CONF_DMAC_SRCINC_23 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_23 +#ifndef CONF_DMAC_DSTINC_23 +#define CONF_DMAC_DSTINC_23 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_23 +#ifndef CONF_DMAC_BEATSIZE_23 +#define CONF_DMAC_BEATSIZE_23 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_23 +#ifndef CONF_DMAC_BLOCKACT_23 +#define CONF_DMAC_BLOCKACT_23 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_23 +#ifndef CONF_DMAC_EVOSEL_23 +#define CONF_DMAC_EVOSEL_23 0 +#endif +// + +// Channel 24 settings +// dmac_channel_24_settings +#ifndef CONF_DMAC_CHANNEL_24_SETTINGS +#define CONF_DMAC_CHANNEL_24_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 24 is running in standby mode or not +// dmac_runstdby_24 +#ifndef CONF_DMAC_RUNSTDBY_24 +#define CONF_DMAC_RUNSTDBY_24 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_24 +#ifndef CONF_DMAC_TRIGACT_24 +#define CONF_DMAC_TRIGACT_24 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_24 +#ifndef CONF_DMAC_TRIGSRC_24 +#define CONF_DMAC_TRIGSRC_24 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_24 +#ifndef CONF_DMAC_LVL_24 +#define CONF_DMAC_LVL_24 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_24 +#ifndef CONF_DMAC_EVOE_24 +#define CONF_DMAC_EVOE_24 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_24 +#ifndef CONF_DMAC_EVIE_24 +#define CONF_DMAC_EVIE_24 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_24 +#ifndef CONF_DMAC_EVACT_24 +#define CONF_DMAC_EVACT_24 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_24 +#ifndef CONF_DMAC_STEPSIZE_24 +#define CONF_DMAC_STEPSIZE_24 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_24 +#ifndef CONF_DMAC_STEPSEL_24 +#define CONF_DMAC_STEPSEL_24 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_24 +#ifndef CONF_DMAC_SRCINC_24 +#define CONF_DMAC_SRCINC_24 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_24 +#ifndef CONF_DMAC_DSTINC_24 +#define CONF_DMAC_DSTINC_24 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_24 +#ifndef CONF_DMAC_BEATSIZE_24 +#define CONF_DMAC_BEATSIZE_24 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_24 +#ifndef CONF_DMAC_BLOCKACT_24 +#define CONF_DMAC_BLOCKACT_24 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_24 +#ifndef CONF_DMAC_EVOSEL_24 +#define CONF_DMAC_EVOSEL_24 0 +#endif +// + +// Channel 25 settings +// dmac_channel_25_settings +#ifndef CONF_DMAC_CHANNEL_25_SETTINGS +#define CONF_DMAC_CHANNEL_25_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 25 is running in standby mode or not +// dmac_runstdby_25 +#ifndef CONF_DMAC_RUNSTDBY_25 +#define CONF_DMAC_RUNSTDBY_25 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_25 +#ifndef CONF_DMAC_TRIGACT_25 +#define CONF_DMAC_TRIGACT_25 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_25 +#ifndef CONF_DMAC_TRIGSRC_25 +#define CONF_DMAC_TRIGSRC_25 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_25 +#ifndef CONF_DMAC_LVL_25 +#define CONF_DMAC_LVL_25 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_25 +#ifndef CONF_DMAC_EVOE_25 +#define CONF_DMAC_EVOE_25 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_25 +#ifndef CONF_DMAC_EVIE_25 +#define CONF_DMAC_EVIE_25 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_25 +#ifndef CONF_DMAC_EVACT_25 +#define CONF_DMAC_EVACT_25 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_25 +#ifndef CONF_DMAC_STEPSIZE_25 +#define CONF_DMAC_STEPSIZE_25 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_25 +#ifndef CONF_DMAC_STEPSEL_25 +#define CONF_DMAC_STEPSEL_25 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_25 +#ifndef CONF_DMAC_SRCINC_25 +#define CONF_DMAC_SRCINC_25 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_25 +#ifndef CONF_DMAC_DSTINC_25 +#define CONF_DMAC_DSTINC_25 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_25 +#ifndef CONF_DMAC_BEATSIZE_25 +#define CONF_DMAC_BEATSIZE_25 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_25 +#ifndef CONF_DMAC_BLOCKACT_25 +#define CONF_DMAC_BLOCKACT_25 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_25 +#ifndef CONF_DMAC_EVOSEL_25 +#define CONF_DMAC_EVOSEL_25 0 +#endif +// + +// Channel 26 settings +// dmac_channel_26_settings +#ifndef CONF_DMAC_CHANNEL_26_SETTINGS +#define CONF_DMAC_CHANNEL_26_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 26 is running in standby mode or not +// dmac_runstdby_26 +#ifndef CONF_DMAC_RUNSTDBY_26 +#define CONF_DMAC_RUNSTDBY_26 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_26 +#ifndef CONF_DMAC_TRIGACT_26 +#define CONF_DMAC_TRIGACT_26 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_26 +#ifndef CONF_DMAC_TRIGSRC_26 +#define CONF_DMAC_TRIGSRC_26 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_26 +#ifndef CONF_DMAC_LVL_26 +#define CONF_DMAC_LVL_26 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_26 +#ifndef CONF_DMAC_EVOE_26 +#define CONF_DMAC_EVOE_26 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_26 +#ifndef CONF_DMAC_EVIE_26 +#define CONF_DMAC_EVIE_26 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_26 +#ifndef CONF_DMAC_EVACT_26 +#define CONF_DMAC_EVACT_26 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_26 +#ifndef CONF_DMAC_STEPSIZE_26 +#define CONF_DMAC_STEPSIZE_26 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_26 +#ifndef CONF_DMAC_STEPSEL_26 +#define CONF_DMAC_STEPSEL_26 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_26 +#ifndef CONF_DMAC_SRCINC_26 +#define CONF_DMAC_SRCINC_26 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_26 +#ifndef CONF_DMAC_DSTINC_26 +#define CONF_DMAC_DSTINC_26 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_26 +#ifndef CONF_DMAC_BEATSIZE_26 +#define CONF_DMAC_BEATSIZE_26 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_26 +#ifndef CONF_DMAC_BLOCKACT_26 +#define CONF_DMAC_BLOCKACT_26 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_26 +#ifndef CONF_DMAC_EVOSEL_26 +#define CONF_DMAC_EVOSEL_26 0 +#endif +// + +// Channel 27 settings +// dmac_channel_27_settings +#ifndef CONF_DMAC_CHANNEL_27_SETTINGS +#define CONF_DMAC_CHANNEL_27_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 27 is running in standby mode or not +// dmac_runstdby_27 +#ifndef CONF_DMAC_RUNSTDBY_27 +#define CONF_DMAC_RUNSTDBY_27 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_27 +#ifndef CONF_DMAC_TRIGACT_27 +#define CONF_DMAC_TRIGACT_27 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_27 +#ifndef CONF_DMAC_TRIGSRC_27 +#define CONF_DMAC_TRIGSRC_27 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_27 +#ifndef CONF_DMAC_LVL_27 +#define CONF_DMAC_LVL_27 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_27 +#ifndef CONF_DMAC_EVOE_27 +#define CONF_DMAC_EVOE_27 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_27 +#ifndef CONF_DMAC_EVIE_27 +#define CONF_DMAC_EVIE_27 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_27 +#ifndef CONF_DMAC_EVACT_27 +#define CONF_DMAC_EVACT_27 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_27 +#ifndef CONF_DMAC_STEPSIZE_27 +#define CONF_DMAC_STEPSIZE_27 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_27 +#ifndef CONF_DMAC_STEPSEL_27 +#define CONF_DMAC_STEPSEL_27 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_27 +#ifndef CONF_DMAC_SRCINC_27 +#define CONF_DMAC_SRCINC_27 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_27 +#ifndef CONF_DMAC_DSTINC_27 +#define CONF_DMAC_DSTINC_27 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_27 +#ifndef CONF_DMAC_BEATSIZE_27 +#define CONF_DMAC_BEATSIZE_27 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_27 +#ifndef CONF_DMAC_BLOCKACT_27 +#define CONF_DMAC_BLOCKACT_27 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_27 +#ifndef CONF_DMAC_EVOSEL_27 +#define CONF_DMAC_EVOSEL_27 0 +#endif +// + +// Channel 28 settings +// dmac_channel_28_settings +#ifndef CONF_DMAC_CHANNEL_28_SETTINGS +#define CONF_DMAC_CHANNEL_28_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 28 is running in standby mode or not +// dmac_runstdby_28 +#ifndef CONF_DMAC_RUNSTDBY_28 +#define CONF_DMAC_RUNSTDBY_28 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_28 +#ifndef CONF_DMAC_TRIGACT_28 +#define CONF_DMAC_TRIGACT_28 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_28 +#ifndef CONF_DMAC_TRIGSRC_28 +#define CONF_DMAC_TRIGSRC_28 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_28 +#ifndef CONF_DMAC_LVL_28 +#define CONF_DMAC_LVL_28 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_28 +#ifndef CONF_DMAC_EVOE_28 +#define CONF_DMAC_EVOE_28 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_28 +#ifndef CONF_DMAC_EVIE_28 +#define CONF_DMAC_EVIE_28 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_28 +#ifndef CONF_DMAC_EVACT_28 +#define CONF_DMAC_EVACT_28 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_28 +#ifndef CONF_DMAC_STEPSIZE_28 +#define CONF_DMAC_STEPSIZE_28 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_28 +#ifndef CONF_DMAC_STEPSEL_28 +#define CONF_DMAC_STEPSEL_28 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_28 +#ifndef CONF_DMAC_SRCINC_28 +#define CONF_DMAC_SRCINC_28 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_28 +#ifndef CONF_DMAC_DSTINC_28 +#define CONF_DMAC_DSTINC_28 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_28 +#ifndef CONF_DMAC_BEATSIZE_28 +#define CONF_DMAC_BEATSIZE_28 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_28 +#ifndef CONF_DMAC_BLOCKACT_28 +#define CONF_DMAC_BLOCKACT_28 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_28 +#ifndef CONF_DMAC_EVOSEL_28 +#define CONF_DMAC_EVOSEL_28 0 +#endif +// + +// Channel 29 settings +// dmac_channel_29_settings +#ifndef CONF_DMAC_CHANNEL_29_SETTINGS +#define CONF_DMAC_CHANNEL_29_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 29 is running in standby mode or not +// dmac_runstdby_29 +#ifndef CONF_DMAC_RUNSTDBY_29 +#define CONF_DMAC_RUNSTDBY_29 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_29 +#ifndef CONF_DMAC_TRIGACT_29 +#define CONF_DMAC_TRIGACT_29 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_29 +#ifndef CONF_DMAC_TRIGSRC_29 +#define CONF_DMAC_TRIGSRC_29 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_29 +#ifndef CONF_DMAC_LVL_29 +#define CONF_DMAC_LVL_29 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_29 +#ifndef CONF_DMAC_EVOE_29 +#define CONF_DMAC_EVOE_29 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_29 +#ifndef CONF_DMAC_EVIE_29 +#define CONF_DMAC_EVIE_29 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_29 +#ifndef CONF_DMAC_EVACT_29 +#define CONF_DMAC_EVACT_29 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_29 +#ifndef CONF_DMAC_STEPSIZE_29 +#define CONF_DMAC_STEPSIZE_29 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_29 +#ifndef CONF_DMAC_STEPSEL_29 +#define CONF_DMAC_STEPSEL_29 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_29 +#ifndef CONF_DMAC_SRCINC_29 +#define CONF_DMAC_SRCINC_29 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_29 +#ifndef CONF_DMAC_DSTINC_29 +#define CONF_DMAC_DSTINC_29 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_29 +#ifndef CONF_DMAC_BEATSIZE_29 +#define CONF_DMAC_BEATSIZE_29 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_29 +#ifndef CONF_DMAC_BLOCKACT_29 +#define CONF_DMAC_BLOCKACT_29 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_29 +#ifndef CONF_DMAC_EVOSEL_29 +#define CONF_DMAC_EVOSEL_29 0 +#endif +// + +// Channel 30 settings +// dmac_channel_30_settings +#ifndef CONF_DMAC_CHANNEL_30_SETTINGS +#define CONF_DMAC_CHANNEL_30_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 30 is running in standby mode or not +// dmac_runstdby_30 +#ifndef CONF_DMAC_RUNSTDBY_30 +#define CONF_DMAC_RUNSTDBY_30 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_30 +#ifndef CONF_DMAC_TRIGACT_30 +#define CONF_DMAC_TRIGACT_30 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_30 +#ifndef CONF_DMAC_TRIGSRC_30 +#define CONF_DMAC_TRIGSRC_30 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_30 +#ifndef CONF_DMAC_LVL_30 +#define CONF_DMAC_LVL_30 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_30 +#ifndef CONF_DMAC_EVOE_30 +#define CONF_DMAC_EVOE_30 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_30 +#ifndef CONF_DMAC_EVIE_30 +#define CONF_DMAC_EVIE_30 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_30 +#ifndef CONF_DMAC_EVACT_30 +#define CONF_DMAC_EVACT_30 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_30 +#ifndef CONF_DMAC_STEPSIZE_30 +#define CONF_DMAC_STEPSIZE_30 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_30 +#ifndef CONF_DMAC_STEPSEL_30 +#define CONF_DMAC_STEPSEL_30 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_30 +#ifndef CONF_DMAC_SRCINC_30 +#define CONF_DMAC_SRCINC_30 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_30 +#ifndef CONF_DMAC_DSTINC_30 +#define CONF_DMAC_DSTINC_30 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_30 +#ifndef CONF_DMAC_BEATSIZE_30 +#define CONF_DMAC_BEATSIZE_30 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_30 +#ifndef CONF_DMAC_BLOCKACT_30 +#define CONF_DMAC_BLOCKACT_30 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_30 +#ifndef CONF_DMAC_EVOSEL_30 +#define CONF_DMAC_EVOSEL_30 0 +#endif +// + +// Channel 31 settings +// dmac_channel_31_settings +#ifndef CONF_DMAC_CHANNEL_31_SETTINGS +#define CONF_DMAC_CHANNEL_31_SETTINGS 0 +#endif + +// Channel Run in Standby +// Indicates whether channel 31 is running in standby mode or not +// dmac_runstdby_31 +#ifndef CONF_DMAC_RUNSTDBY_31 +#define CONF_DMAC_RUNSTDBY_31 0 +#endif + +// Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// Defines the trigger action used for a transfer +// dmac_trigact_31 +#ifndef CONF_DMAC_TRIGACT_31 +#define CONF_DMAC_TRIGACT_31 0 +#endif + +// Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// Defines the peripheral trigger which is source of the transfer +// dmac_trifsrc_31 +#ifndef CONF_DMAC_TRIGSRC_31 +#define CONF_DMAC_TRIGSRC_31 0 +#endif + +// Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// Defines the arbitration level for this channel +// dmac_lvl_31 +#ifndef CONF_DMAC_LVL_31 +#define CONF_DMAC_LVL_31 0 +#endif + +// Channel Event Output +// Indicates whether channel event generation is enabled or not +// dmac_evoe_31 +#ifndef CONF_DMAC_EVOE_31 +#define CONF_DMAC_EVOE_31 0 +#endif + +// Channel Event Input +// Indicates whether channel event reception is enabled or not +// dmac_evie_31 +#ifndef CONF_DMAC_EVIE_31 +#define CONF_DMAC_EVIE_31 0 +#endif + +// Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// Defines the event input action +// dmac_evact_31 +#ifndef CONF_DMAC_EVACT_31 +#define CONF_DMAC_EVACT_31 0 +#endif + +// Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// Defines the address increment step size, applies to source or destination address +// dmac_stepsize_31 +#ifndef CONF_DMAC_STEPSIZE_31 +#define CONF_DMAC_STEPSIZE_31 0 +#endif + +// Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// Defines whether source or destination addresses are using the step size settings +// dmac_stepsel_31 +#ifndef CONF_DMAC_STEPSEL_31 +#define CONF_DMAC_STEPSEL_31 0 +#endif + +// Source Address Increment +// Indicates whether the source address incrementation is enabled or not +// dmac_srcinc_31 +#ifndef CONF_DMAC_SRCINC_31 +#define CONF_DMAC_SRCINC_31 0 +#endif + +// Destination Address Increment +// Indicates whether the destination address incrementation is enabled or not +// dmac_dstinc_31 +#ifndef CONF_DMAC_DSTINC_31 +#define CONF_DMAC_DSTINC_31 0 +#endif + +// Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// Defines the size of one beat +// dmac_beatsize_31 +#ifndef CONF_DMAC_BEATSIZE_31 +#define CONF_DMAC_BEATSIZE_31 0 +#endif + +// Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// Defines the the DMAC should take after a block transfer has completed +// dmac_blockact_31 +#ifndef CONF_DMAC_BLOCKACT_31 +#define CONF_DMAC_BLOCKACT_31 0 +#endif + +// Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// Defines the event output selection +// dmac_evosel_31 +#ifndef CONF_DMAC_EVOSEL_31 +#define CONF_DMAC_EVOSEL_31 0 +#endif +// + +// + +// <<< end of configuration section >>> + +#endif // HPL_DMAC_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_gclk_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_gclk_config.h new file mode 100644 index 000000000..6f4f01a7e --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_gclk_config.h @@ -0,0 +1,924 @@ +// Circuit Python SAMD51 clock tree: +// DFLL48M (with USBCRM on to sync with external USB ref) -> GCLK1, GCLK5, GCLK6 +// GCLK1 (48MHz) -> 48 MHz peripherals +// GCLK5 (48 MHz divided down to 2 MHz) -> DPLL0 +// DPLL0 (multiplied up to 120 MHz) -> GCLK0, GCLK4 (output for monitoring) +// GCLK6 (48 MHz divided down to 12 MHz) -> DAC + +// We'd like to use XOSC32K as a ref for DFLL48M on boards with a 32kHz crystal, +// but haven't figured that out yet. + +// Used in hpl/core/hpl_init.c to define which clocks should be initialized first. +// Not clear why all these need to be specified, but it doesn't work properly otherwise. + +//#define CIRCUITPY_GCLK_INIT_1ST (1 << 0 | 1 << 1 | 1 << 3 | 1 <<5) +#define CIRCUITPY_GCLK_INIT_1ST 0xffff + +/* Auto-generated config file hpl_gclk_config.h */ +#ifndef HPL_GCLK_CONFIG_H +#define HPL_GCLK_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Generic clock generator 0 configuration +// Indicates whether generic clock 0 configuration is enabled or not +// enable_gclk_gen_0 +#ifndef CONF_GCLK_GENERATOR_0_CONFIG +#define CONF_GCLK_GENERATOR_0_CONFIG 1 +#endif + +// Generic Clock Generator Control +// Generic clock generator 0 source// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator input pad +// Generic clock generator 1 +// 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// 32kHz External Crystal Oscillator (XOSC32K) +// Digital Frequency Locked Loop (DFLL48M) +// Digital Phase Locked Loop (DPLL0) +// Digital Phase Locked Loop (DPLL1) +// This defines the clock source for generic clock generator 0 +// gclk_gen_0_oscillator +#ifndef CONF_GCLK_GEN_0_SOURCE +#define CONF_GCLK_GEN_0_SOURCE GCLK_GENCTRL_SRC_DPLL0 +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// gclk_arch_gen_0_runstdby +#ifndef CONF_GCLK_GEN_0_RUNSTDBY +#define CONF_GCLK_GEN_0_RUNSTDBY 0 +#endif + +// Divide Selection +// Indicates whether Divide Selection is enabled or not +// gclk_gen_0_div_sel +#ifndef CONF_GCLK_GEN_0_DIVSEL +#define CONF_GCLK_GEN_0_DIVSEL 0 +#endif + +// Output Enable +// Indicates whether Output Enable is enabled or not +// gclk_arch_gen_0_oe +#ifndef CONF_GCLK_GEN_0_OE +#define CONF_GCLK_GEN_0_OE 1 +#endif + +// Output Off Value +// Indicates whether Output Off Value is enabled or not +// gclk_arch_gen_0_oov +#ifndef CONF_GCLK_GEN_0_OOV +#define CONF_GCLK_GEN_0_OOV 0 +#endif + +// Improve Duty Cycle +// Indicates whether Improve Duty Cycle is enabled or not +// gclk_arch_gen_0_idc +#ifndef CONF_GCLK_GEN_0_IDC +#define CONF_GCLK_GEN_0_IDC 0 +#endif + +// Generic Clock Generator Enable +// Indicates whether Generic Clock Generator Enable is enabled or not +// gclk_arch_gen_0_enable +#ifndef CONF_GCLK_GEN_0_GENEN +#define CONF_GCLK_GEN_0_GENEN 1 +#endif +// + +// Generic Clock Generator Division +// Generic clock generator 0 division <0x0000-0xFFFF> +// gclk_gen_0_div +#ifndef CONF_GCLK_GEN_0_DIV +#define CONF_GCLK_GEN_0_DIV 1 +#endif +// +// + +// Generic clock generator 1 configuration +// Indicates whether generic clock 1 configuration is enabled or not +// enable_gclk_gen_1 +#ifndef CONF_GCLK_GENERATOR_1_CONFIG +#define CONF_GCLK_GENERATOR_1_CONFIG 1 +#endif + +// Generic Clock Generator Control +// Generic clock generator 1 source// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator input pad +// 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// 32kHz External Crystal Oscillator (XOSC32K) +// Digital Frequency Locked Loop (DFLL48M) +// Digital Phase Locked Loop (DPLL0) +// Digital Phase Locked Loop (DPLL1) +// This defines the clock source for generic clock generator 1 +// gclk_gen_1_oscillator +#ifndef CONF_GCLK_GEN_1_SOURCE +#define CONF_GCLK_GEN_1_SOURCE GCLK_GENCTRL_SRC_DFLL +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// gclk_arch_gen_1_runstdby +#ifndef CONF_GCLK_GEN_1_RUNSTDBY +#define CONF_GCLK_GEN_1_RUNSTDBY 0 +#endif + +// Divide Selection +// Indicates whether Divide Selection is enabled or not +// gclk_gen_1_div_sel +#ifndef CONF_GCLK_GEN_1_DIVSEL +#define CONF_GCLK_GEN_1_DIVSEL 0 +#endif + +// Output Enable +// Indicates whether Output Enable is enabled or not +// gclk_arch_gen_1_oe +#ifndef CONF_GCLK_GEN_1_OE +#define CONF_GCLK_GEN_1_OE 1 +#endif + +// Output Off Value +// Indicates whether Output Off Value is enabled or not +// gclk_arch_gen_1_oov +#ifndef CONF_GCLK_GEN_1_OOV +#define CONF_GCLK_GEN_1_OOV 0 +#endif + +// Improve Duty Cycle +// Indicates whether Improve Duty Cycle is enabled or not +// gclk_arch_gen_1_idc +#ifndef CONF_GCLK_GEN_1_IDC +#define CONF_GCLK_GEN_1_IDC 0 +#endif + +// Generic Clock Generator Enable +// Indicates whether Generic Clock Generator Enable is enabled or not +// gclk_arch_gen_1_enable +#ifndef CONF_GCLK_GEN_1_GENEN +#define CONF_GCLK_GEN_1_GENEN 1 +#endif +// + +// Generic Clock Generator Division +// Generic clock generator 1 division <0x0000-0xFFFF> +// gclk_gen_1_div +#ifndef CONF_GCLK_GEN_1_DIV +#define CONF_GCLK_GEN_1_DIV 1 +#endif +// +// + +// Generic clock generator 2 configuration +// Indicates whether generic clock 2 configuration is enabled or not +// enable_gclk_gen_2 +#ifndef CONF_GCLK_GENERATOR_2_CONFIG +#define CONF_GCLK_GENERATOR_2_CONFIG 1 +#endif + +// Generic Clock Generator Control +// Generic clock generator 2 source// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator input pad +// Generic clock generator 1 +// 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// 32kHz External Crystal Oscillator (XOSC32K) +// Digital Frequency Locked Loop (DFLL48M) +// Digital Phase Locked Loop (DPLL0) +// Digital Phase Locked Loop (DPLL1) +// This defines the clock source for generic clock generator 2 +// gclk_gen_2_oscillator +#ifndef CONF_GCLK_GEN_2_SOURCE +#define CONF_GCLK_GEN_2_SOURCE GCLK_GENCTRL_SRC_OSCULP32K +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// gclk_arch_gen_2_runstdby +#ifndef CONF_GCLK_GEN_2_RUNSTDBY +#define CONF_GCLK_GEN_2_RUNSTDBY 0 +#endif + +// Divide Selection +// Indicates whether Divide Selection is enabled or not +// gclk_gen_2_div_sel +#ifndef CONF_GCLK_GEN_2_DIVSEL +#define CONF_GCLK_GEN_2_DIVSEL 1 +#endif + +// Output Enable +// Indicates whether Output Enable is enabled or not +// gclk_arch_gen_2_oe +#ifndef CONF_GCLK_GEN_2_OE +#define CONF_GCLK_GEN_2_OE 0 +#endif + +// Output Off Value +// Indicates whether Output Off Value is enabled or not +// gclk_arch_gen_2_oov +#ifndef CONF_GCLK_GEN_2_OOV +#define CONF_GCLK_GEN_2_OOV 0 +#endif + +// Improve Duty Cycle +// Indicates whether Improve Duty Cycle is enabled or not +// gclk_arch_gen_2_idc +#ifndef CONF_GCLK_GEN_2_IDC +#define CONF_GCLK_GEN_2_IDC 0 +#endif + +// Generic Clock Generator Enable +// Indicates whether Generic Clock Generator Enable is enabled or not +// gclk_arch_gen_2_enable +#ifndef CONF_GCLK_GEN_2_GENEN +#define CONF_GCLK_GEN_2_GENEN 1 +#endif +// + +// Generic Clock Generator Division +// Generic clock generator 2 division <0x0000-0xFFFF> +// gclk_gen_2_div +#ifndef CONF_GCLK_GEN_2_DIV +#define CONF_GCLK_GEN_2_DIV 4 +#endif +// +// + +// Generic clock generator 3 configuration +// Indicates whether generic clock 3 configuration is enabled or not +// enable_gclk_gen_3 +#ifndef CONF_GCLK_GENERATOR_3_CONFIG +#define CONF_GCLK_GENERATOR_3_CONFIG 0 +#endif + +// Generic Clock Generator Control +// Generic clock generator 3 source// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator input pad +// Generic clock generator 1 +// 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// 32kHz External Crystal Oscillator (XOSC32K) +// Digital Frequency Locked Loop (DFLL48M) +// Digital Phase Locked Loop (DPLL0) +// Digital Phase Locked Loop (DPLL1) +// This defines the clock source for generic clock generator 3 +// gclk_gen_3_oscillator +#ifndef CONF_GCLK_GEN_3_SOURCE +#define CONF_GCLK_GEN_3_SOURCE GCLK_GENCTRL_SRC_XOSC32K +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// gclk_arch_gen_3_runstdby +#ifndef CONF_GCLK_GEN_3_RUNSTDBY +#define CONF_GCLK_GEN_3_RUNSTDBY 0 +#endif + +// Divide Selection +// Indicates whether Divide Selection is enabled or not +// gclk_gen_3_div_sel +#ifndef CONF_GCLK_GEN_3_DIVSEL +#define CONF_GCLK_GEN_3_DIVSEL 0 +#endif + +// Output Enable +// Indicates whether Output Enable is enabled or not +// gclk_arch_gen_3_oe +#ifndef CONF_GCLK_GEN_3_OE +#define CONF_GCLK_GEN_3_OE 0 +#endif + +// Output Off Value +// Indicates whether Output Off Value is enabled or not +// gclk_arch_gen_3_oov +#ifndef CONF_GCLK_GEN_3_OOV +#define CONF_GCLK_GEN_3_OOV 0 +#endif + +// Improve Duty Cycle +// Indicates whether Improve Duty Cycle is enabled or not +// gclk_arch_gen_3_idc +#ifndef CONF_GCLK_GEN_3_IDC +#define CONF_GCLK_GEN_3_IDC 0 +#endif + +// Generic Clock Generator Enable +// Indicates whether Generic Clock Generator Enable is enabled or not +// gclk_arch_gen_3_enable +#ifndef CONF_GCLK_GEN_3_GENEN +#define CONF_GCLK_GEN_3_GENEN 0 +#endif +// + +// Generic Clock Generator Division +// Generic clock generator 3 division <0x0000-0xFFFF> +// gclk_gen_3_div +#ifndef CONF_GCLK_GEN_3_DIV +#define CONF_GCLK_GEN_3_DIV 1 +#endif +// +// + +// Generic clock generator 4 configuration +// Indicates whether generic clock 4 configuration is enabled or not +// enable_gclk_gen_4 +#ifndef CONF_GCLK_GENERATOR_4_CONFIG +#define CONF_GCLK_GENERATOR_4_CONFIG 1 +#endif + +// Generic Clock Generator Control +// Generic clock generator 4 source// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator input pad +// Generic clock generator 1 +// 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// 32kHz External Crystal Oscillator (XOSC32K) +// Digital Frequency Locked Loop (DFLL48M) +// Digital Phase Locked Loop (DPLL0) +// Digital Phase Locked Loop (DPLL1) +// This defines the clock source for generic clock generator 4 +// gclk_gen_4_oscillator +#ifndef CONF_GCLK_GEN_4_SOURCE +#define CONF_GCLK_GEN_4_SOURCE GCLK_GENCTRL_SRC_DPLL0 +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// gclk_arch_gen_4_runstdby +#ifndef CONF_GCLK_GEN_4_RUNSTDBY +#define CONF_GCLK_GEN_4_RUNSTDBY 0 +#endif + +// Divide Selection +// Indicates whether Divide Selection is enabled or not +// gclk_gen_4_div_sel +#ifndef CONF_GCLK_GEN_4_DIVSEL +#define CONF_GCLK_GEN_4_DIVSEL 0 +#endif + +// Output Enable +// Indicates whether Output Enable is enabled or not +// gclk_arch_gen_4_oe +#ifndef CONF_GCLK_GEN_4_OE +#define CONF_GCLK_GEN_4_OE 1 +#endif + +// Output Off Value +// Indicates whether Output Off Value is enabled or not +// gclk_arch_gen_4_oov +#ifndef CONF_GCLK_GEN_4_OOV +#define CONF_GCLK_GEN_4_OOV 0 +#endif + +// Improve Duty Cycle +// Indicates whether Improve Duty Cycle is enabled or not +// gclk_arch_gen_4_idc +#ifndef CONF_GCLK_GEN_4_IDC +#define CONF_GCLK_GEN_4_IDC 0 +#endif + +// Generic Clock Generator Enable +// Indicates whether Generic Clock Generator Enable is enabled or not +// gclk_arch_gen_4_enable +#ifndef CONF_GCLK_GEN_4_GENEN +#define CONF_GCLK_GEN_4_GENEN 1 +#endif +// + +// Generic Clock Generator Division +// Generic clock generator 4 division <0x0000-0xFFFF> +// gclk_gen_4_div +#ifndef CONF_GCLK_GEN_4_DIV +#define CONF_GCLK_GEN_4_DIV 1 +#endif +// +// + +// Generic clock generator 5 configuration +// Indicates whether generic clock 5 configuration is enabled or not +// enable_gclk_gen_5 +#ifndef CONF_GCLK_GENERATOR_5_CONFIG +#define CONF_GCLK_GENERATOR_5_CONFIG 1 +#endif + +// Generic Clock Generator Control +// Generic clock generator 5 source// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator input pad +// Generic clock generator 1 +// 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// 32kHz External Crystal Oscillator (XOSC32K) +// Digital Frequency Locked Loop (DFLL48M) +// Digital Phase Locked Loop (DPLL0) +// Digital Phase Locked Loop (DPLL1) +// This defines the clock source for generic clock generator 5 +// gclk_gen_5_oscillator +#ifndef CONF_GCLK_GEN_5_SOURCE +#define CONF_GCLK_GEN_5_SOURCE GCLK_GENCTRL_SRC_DFLL +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// gclk_arch_gen_5_runstdby +#ifndef CONF_GCLK_GEN_5_RUNSTDBY +#define CONF_GCLK_GEN_5_RUNSTDBY 0 +#endif + +// Divide Selection +// Indicates whether Divide Selection is enabled or not +// gclk_gen_5_div_sel +#ifndef CONF_GCLK_GEN_5_DIVSEL +#define CONF_GCLK_GEN_5_DIVSEL 0 +#endif + +// Output Enable +// Indicates whether Output Enable is enabled or not +// gclk_arch_gen_5_oe +#ifndef CONF_GCLK_GEN_5_OE +#define CONF_GCLK_GEN_5_OE 1 +#endif + +// Output Off Value +// Indicates whether Output Off Value is enabled or not +// gclk_arch_gen_5_oov +#ifndef CONF_GCLK_GEN_5_OOV +#define CONF_GCLK_GEN_5_OOV 0 +#endif + +// Improve Duty Cycle +// Indicates whether Improve Duty Cycle is enabled or not +// gclk_arch_gen_5_idc +#ifndef CONF_GCLK_GEN_5_IDC +#define CONF_GCLK_GEN_5_IDC 0 +#endif + +// Generic Clock Generator Enable +// Indicates whether Generic Clock Generator Enable is enabled or not +// gclk_arch_gen_5_enable +#ifndef CONF_GCLK_GEN_5_GENEN +#define CONF_GCLK_GEN_5_GENEN 1 +#endif +// + +// Generic Clock Generator Division +// Generic clock generator 5 division <0x0000-0xFFFF> +// gclk_gen_5_div +#ifndef CONF_GCLK_GEN_5_DIV +#define CONF_GCLK_GEN_5_DIV 24 +#endif +// +// + +// Generic clock generator 6 configuration +// Indicates whether generic clock 6 configuration is enabled or not +// enable_gclk_gen_6 +#ifndef CONF_GCLK_GENERATOR_6_CONFIG +#define CONF_GCLK_GENERATOR_6_CONFIG 1 +#endif + +// Generic Clock Generator Control +// Generic clock generator 6 source// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator input pad +// Generic clock generator 1 +// 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// 32kHz External Crystal Oscillator (XOSC32K) +// Digital Frequency Locked Loop (DFLL48M) +// Digital Phase Locked Loop (DPLL0) +// Digital Phase Locked Loop (DPLL1) +// This defines the clock source for generic clock generator 6 +// gclk_gen_6_oscillator +#ifndef CONF_GCLK_GEN_6_SOURCE +#define CONF_GCLK_GEN_6_SOURCE GCLK_GENCTRL_SRC_DFLL +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// gclk_arch_gen_6_runstdby +#ifndef CONF_GCLK_GEN_6_RUNSTDBY +#define CONF_GCLK_GEN_6_RUNSTDBY 0 +#endif + +// Divide Selection +// Indicates whether Divide Selection is enabled or not +// gclk_gen_6_div_sel +#ifndef CONF_GCLK_GEN_6_DIVSEL +#define CONF_GCLK_GEN_6_DIVSEL 0 +#endif + +// Output Enable +// Indicates whether Output Enable is enabled or not +// gclk_arch_gen_6_oe +#ifndef CONF_GCLK_GEN_6_OE +#define CONF_GCLK_GEN_6_OE 0 +#endif + +// Output Off Value +// Indicates whether Output Off Value is enabled or not +// gclk_arch_gen_6_oov +#ifndef CONF_GCLK_GEN_6_OOV +#define CONF_GCLK_GEN_6_OOV 0 +#endif + +// Improve Duty Cycle +// Indicates whether Improve Duty Cycle is enabled or not +// gclk_arch_gen_6_idc +#ifndef CONF_GCLK_GEN_6_IDC +#define CONF_GCLK_GEN_6_IDC 1 +#endif + +// Generic Clock Generator Enable +// Indicates whether Generic Clock Generator Enable is enabled or not +// gclk_arch_gen_6_enable +#ifndef CONF_GCLK_GEN_6_GENEN +#define CONF_GCLK_GEN_6_GENEN 1 +#endif +// + +// Generic Clock Generator Division +// Generic clock generator 6 division <0x0000-0xFFFF> +// gclk_gen_6_div +#ifndef CONF_GCLK_GEN_6_DIV +#define CONF_GCLK_GEN_6_DIV 4 +#endif +// +// + +// Generic clock generator 7 configuration +// Indicates whether generic clock 7 configuration is enabled or not +// enable_gclk_gen_7 +#ifndef CONF_GCLK_GENERATOR_7_CONFIG +#define CONF_GCLK_GENERATOR_7_CONFIG 0 +#endif + +// Generic Clock Generator Control +// Generic clock generator 7 source// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator input pad +// Generic clock generator 1 +// 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// 32kHz External Crystal Oscillator (XOSC32K) +// Digital Frequency Locked Loop (DFLL48M) +// Digital Phase Locked Loop (DPLL0) +// Digital Phase Locked Loop (DPLL1) +// This defines the clock source for generic clock generator 7 +// gclk_gen_7_oscillator +#ifndef CONF_GCLK_GEN_7_SOURCE +#define CONF_GCLK_GEN_7_SOURCE GCLK_GENCTRL_SRC_XOSC1 +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// gclk_arch_gen_7_runstdby +#ifndef CONF_GCLK_GEN_7_RUNSTDBY +#define CONF_GCLK_GEN_7_RUNSTDBY 0 +#endif + +// Divide Selection +// Indicates whether Divide Selection is enabled or not +// gclk_gen_7_div_sel +#ifndef CONF_GCLK_GEN_7_DIVSEL +#define CONF_GCLK_GEN_7_DIVSEL 0 +#endif + +// Output Enable +// Indicates whether Output Enable is enabled or not +// gclk_arch_gen_7_oe +#ifndef CONF_GCLK_GEN_7_OE +#define CONF_GCLK_GEN_7_OE 0 +#endif + +// Output Off Value +// Indicates whether Output Off Value is enabled or not +// gclk_arch_gen_7_oov +#ifndef CONF_GCLK_GEN_7_OOV +#define CONF_GCLK_GEN_7_OOV 0 +#endif + +// Improve Duty Cycle +// Indicates whether Improve Duty Cycle is enabled or not +// gclk_arch_gen_7_idc +#ifndef CONF_GCLK_GEN_7_IDC +#define CONF_GCLK_GEN_7_IDC 0 +#endif + +// Generic Clock Generator Enable +// Indicates whether Generic Clock Generator Enable is enabled or not +// gclk_arch_gen_7_enable +#ifndef CONF_GCLK_GEN_7_GENEN +#define CONF_GCLK_GEN_7_GENEN 0 +#endif +// + +// Generic Clock Generator Division +// Generic clock generator 7 division <0x0000-0xFFFF> +// gclk_gen_7_div +#ifndef CONF_GCLK_GEN_7_DIV +#define CONF_GCLK_GEN_7_DIV 1 +#endif +// +// + +// Generic clock generator 8 configuration +// Indicates whether generic clock 8 configuration is enabled or not +// enable_gclk_gen_8 +#ifndef CONF_GCLK_GENERATOR_8_CONFIG +#define CONF_GCLK_GENERATOR_8_CONFIG 0 +#endif + +// Generic Clock Generator Control +// Generic clock generator 8 source// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator input pad +// Generic clock generator 1 +// 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// 32kHz External Crystal Oscillator (XOSC32K) +// Digital Frequency Locked Loop (DFLL48M) +// Digital Phase Locked Loop (DPLL0) +// Digital Phase Locked Loop (DPLL1) +// This defines the clock source for generic clock generator 8 +// gclk_gen_8_oscillator +#ifndef CONF_GCLK_GEN_8_SOURCE +#define CONF_GCLK_GEN_8_SOURCE GCLK_GENCTRL_SRC_XOSC1 +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// gclk_arch_gen_8_runstdby +#ifndef CONF_GCLK_GEN_8_RUNSTDBY +#define CONF_GCLK_GEN_8_RUNSTDBY 0 +#endif + +// Divide Selection +// Indicates whether Divide Selection is enabled or not +// gclk_gen_8_div_sel +#ifndef CONF_GCLK_GEN_8_DIVSEL +#define CONF_GCLK_GEN_8_DIVSEL 0 +#endif + +// Output Enable +// Indicates whether Output Enable is enabled or not +// gclk_arch_gen_8_oe +#ifndef CONF_GCLK_GEN_8_OE +#define CONF_GCLK_GEN_8_OE 0 +#endif + +// Output Off Value +// Indicates whether Output Off Value is enabled or not +// gclk_arch_gen_8_oov +#ifndef CONF_GCLK_GEN_8_OOV +#define CONF_GCLK_GEN_8_OOV 0 +#endif + +// Improve Duty Cycle +// Indicates whether Improve Duty Cycle is enabled or not +// gclk_arch_gen_8_idc +#ifndef CONF_GCLK_GEN_8_IDC +#define CONF_GCLK_GEN_8_IDC 0 +#endif + +// Generic Clock Generator Enable +// Indicates whether Generic Clock Generator Enable is enabled or not +// gclk_arch_gen_8_enable +#ifndef CONF_GCLK_GEN_8_GENEN +#define CONF_GCLK_GEN_8_GENEN 0 +#endif +// + +// Generic Clock Generator Division +// Generic clock generator 8 division <0x0000-0xFFFF> +// gclk_gen_8_div +#ifndef CONF_GCLK_GEN_8_DIV +#define CONF_GCLK_GEN_8_DIV 1 +#endif +// +// + +// Generic clock generator 9 configuration +// Indicates whether generic clock 9 configuration is enabled or not +// enable_gclk_gen_9 +#ifndef CONF_GCLK_GENERATOR_9_CONFIG +#define CONF_GCLK_GENERATOR_9_CONFIG 0 +#endif + +// Generic Clock Generator Control +// Generic clock generator 9 source// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator input pad +// Generic clock generator 1 +// 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// 32kHz External Crystal Oscillator (XOSC32K) +// Digital Frequency Locked Loop (DFLL48M) +// Digital Phase Locked Loop (DPLL0) +// Digital Phase Locked Loop (DPLL1) +// This defines the clock source for generic clock generator 9 +// gclk_gen_9_oscillator +#ifndef CONF_GCLK_GEN_9_SOURCE +#define CONF_GCLK_GEN_9_SOURCE GCLK_GENCTRL_SRC_XOSC1 +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// gclk_arch_gen_9_runstdby +#ifndef CONF_GCLK_GEN_9_RUNSTDBY +#define CONF_GCLK_GEN_9_RUNSTDBY 0 +#endif + +// Divide Selection +// Indicates whether Divide Selection is enabled or not +// gclk_gen_9_div_sel +#ifndef CONF_GCLK_GEN_9_DIVSEL +#define CONF_GCLK_GEN_9_DIVSEL 0 +#endif + +// Output Enable +// Indicates whether Output Enable is enabled or not +// gclk_arch_gen_9_oe +#ifndef CONF_GCLK_GEN_9_OE +#define CONF_GCLK_GEN_9_OE 0 +#endif + +// Output Off Value +// Indicates whether Output Off Value is enabled or not +// gclk_arch_gen_9_oov +#ifndef CONF_GCLK_GEN_9_OOV +#define CONF_GCLK_GEN_9_OOV 0 +#endif + +// Improve Duty Cycle +// Indicates whether Improve Duty Cycle is enabled or not +// gclk_arch_gen_9_idc +#ifndef CONF_GCLK_GEN_9_IDC +#define CONF_GCLK_GEN_9_IDC 0 +#endif + +// Generic Clock Generator Enable +// Indicates whether Generic Clock Generator Enable is enabled or not +// gclk_arch_gen_9_enable +#ifndef CONF_GCLK_GEN_9_GENEN +#define CONF_GCLK_GEN_9_GENEN 0 +#endif +// + +// Generic Clock Generator Division +// Generic clock generator 9 division <0x0000-0xFFFF> +// gclk_gen_9_div +#ifndef CONF_GCLK_GEN_9_DIV +#define CONF_GCLK_GEN_9_DIV 1 +#endif +// +// + +// Generic clock generator 10 configuration +// Indicates whether generic clock 10 configuration is enabled or not +// enable_gclk_gen_10 +#ifndef CONF_GCLK_GENERATOR_10_CONFIG +#define CONF_GCLK_GENERATOR_10_CONFIG 0 +#endif + +// Generic Clock Generator Control +// Generic clock generator 10 source// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator input pad +// Generic clock generator 1 +// 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// 32kHz External Crystal Oscillator (XOSC32K) +// Digital Frequency Locked Loop (DFLL48M) +// Digital Phase Locked Loop (DPLL0) +// Digital Phase Locked Loop (DPLL1) +// This defines the clock source for generic clock generator 10 +// gclk_gen_10_oscillator +#ifndef CONF_GCLK_GEN_10_SOURCE +#define CONF_GCLK_GEN_10_SOURCE GCLK_GENCTRL_SRC_XOSC1 +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// gclk_arch_gen_10_runstdby +#ifndef CONF_GCLK_GEN_10_RUNSTDBY +#define CONF_GCLK_GEN_10_RUNSTDBY 0 +#endif + +// Divide Selection +// Indicates whether Divide Selection is enabled or not +// gclk_gen_10_div_sel +#ifndef CONF_GCLK_GEN_10_DIVSEL +#define CONF_GCLK_GEN_10_DIVSEL 0 +#endif + +// Output Enable +// Indicates whether Output Enable is enabled or not +// gclk_arch_gen_10_oe +#ifndef CONF_GCLK_GEN_10_OE +#define CONF_GCLK_GEN_10_OE 0 +#endif + +// Output Off Value +// Indicates whether Output Off Value is enabled or not +// gclk_arch_gen_10_oov +#ifndef CONF_GCLK_GEN_10_OOV +#define CONF_GCLK_GEN_10_OOV 0 +#endif + +// Improve Duty Cycle +// Indicates whether Improve Duty Cycle is enabled or not +// gclk_arch_gen_10_idc +#ifndef CONF_GCLK_GEN_10_IDC +#define CONF_GCLK_GEN_10_IDC 0 +#endif + +// Generic Clock Generator Enable +// Indicates whether Generic Clock Generator Enable is enabled or not +// gclk_arch_gen_10_enable +#ifndef CONF_GCLK_GEN_10_GENEN +#define CONF_GCLK_GEN_10_GENEN 0 +#endif +// + +// Generic Clock Generator Division +// Generic clock generator 10 division <0x0000-0xFFFF> +// gclk_gen_10_div +#ifndef CONF_GCLK_GEN_10_DIV +#define CONF_GCLK_GEN_10_DIV 1 +#endif +// +// + +// Generic clock generator 11 configuration +// Indicates whether generic clock 11 configuration is enabled or not +// enable_gclk_gen_11 +#ifndef CONF_GCLK_GENERATOR_11_CONFIG +#define CONF_GCLK_GENERATOR_11_CONFIG 0 +#endif + +// Generic Clock Generator Control +// Generic clock generator 11 source// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator input pad +// Generic clock generator 1 +// 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// 32kHz External Crystal Oscillator (XOSC32K) +// Digital Frequency Locked Loop (DFLL48M) +// Digital Phase Locked Loop (DPLL0) +// Digital Phase Locked Loop (DPLL1) +// This defines the clock source for generic clock generator 11 +// gclk_gen_11_oscillator +#ifndef CONF_GCLK_GEN_11_SOURCE +#define CONF_GCLK_GEN_11_SOURCE GCLK_GENCTRL_SRC_XOSC1 +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// gclk_arch_gen_11_runstdby +#ifndef CONF_GCLK_GEN_11_RUNSTDBY +#define CONF_GCLK_GEN_11_RUNSTDBY 0 +#endif + +// Divide Selection +// Indicates whether Divide Selection is enabled or not +// gclk_gen_11_div_sel +#ifndef CONF_GCLK_GEN_11_DIVSEL +#define CONF_GCLK_GEN_11_DIVSEL 0 +#endif + +// Output Enable +// Indicates whether Output Enable is enabled or not +// gclk_arch_gen_11_oe +#ifndef CONF_GCLK_GEN_11_OE +#define CONF_GCLK_GEN_11_OE 0 +#endif + +// Output Off Value +// Indicates whether Output Off Value is enabled or not +// gclk_arch_gen_11_oov +#ifndef CONF_GCLK_GEN_11_OOV +#define CONF_GCLK_GEN_11_OOV 0 +#endif + +// Improve Duty Cycle +// Indicates whether Improve Duty Cycle is enabled or not +// gclk_arch_gen_11_idc +#ifndef CONF_GCLK_GEN_11_IDC +#define CONF_GCLK_GEN_11_IDC 0 +#endif + +// Generic Clock Generator Enable +// Indicates whether Generic Clock Generator Enable is enabled or not +// gclk_arch_gen_11_enable +#ifndef CONF_GCLK_GEN_11_GENEN +#define CONF_GCLK_GEN_11_GENEN 0 +#endif +// + +// Generic Clock Generator Division +// Generic clock generator 11 division <0x0000-0xFFFF> +// gclk_gen_11_div +#ifndef CONF_GCLK_GEN_11_DIV +#define CONF_GCLK_GEN_11_DIV 1 +#endif +// +// + +// <<< end of configuration section >>> + +#endif // HPL_GCLK_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_mclk_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_mclk_config.h new file mode 100644 index 000000000..a5a7de53c --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_mclk_config.h @@ -0,0 +1,104 @@ +/* Auto-generated config file hpl_mclk_config.h */ +#ifndef HPL_MCLK_CONFIG_H +#define HPL_MCLK_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +#include + +// System Configuration +// Indicates whether configuration for system is enabled or not +// enable_cpu_clock +#ifndef CONF_SYSTEM_CONFIG +#define CONF_SYSTEM_CONFIG 1 +#endif + +// Basic settings +// CPU Clock source +// Generic clock generator 0 +// This defines the clock source for the CPU +// cpu_clock_source +#ifndef CONF_CPU_SRC +#define CONF_CPU_SRC GCLK_PCHCTRL_GEN_GCLK0_Val +#endif + +// CPU Clock Division Factor +// 1 +// 2 +// 4 +// 8 +// 16 +// 32 +// 64 +// 128 +// Prescalar for CPU clock +// cpu_div +#ifndef CONF_MCLK_CPUDIV +#define CONF_MCLK_CPUDIV MCLK_CPUDIV_DIV_DIV1_Val +#endif +// Low Power Clock Division +// Divide by 1 +// Divide by 2 +// Divide by 4 +// Divide by 8 +// Divide by 16 +// Divide by 32 +// Divide by 64 +// Divide by 128 +// mclk_arch_lpdiv +#ifndef CONF_MCLK_LPDIV +#define CONF_MCLK_LPDIV MCLK_LPDIV_LPDIV_DIV4_Val +#endif + +// Backup Clock Division +// Divide by 1 +// Divide by 2 +// Divide by 4 +// Divide by 8 +// Divide by 16 +// Divide by 32 +// Divide by 64 +// Divide by 128 +// mclk_arch_bupdiv +#ifndef CONF_MCLK_BUPDIV +#define CONF_MCLK_BUPDIV MCLK_BUPDIV_BUPDIV_DIV8_Val +#endif +// High-Speed Clock Division +// Divide by 1 +// mclk_arch_hsdiv +#ifndef CONF_MCLK_HSDIV +#define CONF_MCLK_HSDIV MCLK_HSDIV_DIV_DIV1_Val +#endif +// + +// NVM Settings +// NVM Wait States +// These bits select the number of wait states for a read operation. +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 +// <8=> 8 +// <9=> 9 +// <10=> 10 +// <11=> 11 +// <12=> 12 +// <13=> 13 +// <14=> 14 +// <15=> 15 +// nvm_wait_states +#ifndef CONF_NVM_WAIT_STATE +#define CONF_NVM_WAIT_STATE 0 +#endif + +// + +// + +// <<< end of configuration section >>> + +#endif // HPL_MCLK_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_nvmctrl_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_nvmctrl_config.h new file mode 100644 index 000000000..53fcb593a --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_nvmctrl_config.h @@ -0,0 +1,36 @@ +/* Auto-generated config file hpl_nvmctrl_config.h */ +#ifndef HPL_NVMCTRL_CONFIG_H +#define HPL_NVMCTRL_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Basic Settings + +// Power Reduction Mode During Sleep +// <0x00=> Wake On Access +// <0x01=> Wake Up Instant +// <0x03=> Disabled +// nvm_arch_sleepprm +#ifndef CONF_NVM_SLEEPPRM +#define CONF_NVM_SLEEPPRM 0 +#endif + +// AHB0 Cache Disable +// Indicate whether AHB0 cache is disable or not +// nvm_arch_cache0 +#ifndef CONF_NVM_CACHE0 +#define CONF_NVM_CACHE0 1 +#endif + +// AHB1 Cache Disable +// Indicate whether AHB1 cache is disable or not +// nvm_arch_cache1 +#ifndef CONF_NVM_CACHE1 +#define CONF_NVM_CACHE1 1 +#endif + +// + +// <<< end of configuration section >>> + +#endif // HPL_NVMCTRL_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_osc32kctrl_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_osc32kctrl_config.h new file mode 100644 index 000000000..d93cbf922 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_osc32kctrl_config.h @@ -0,0 +1,163 @@ +/* Auto-generated config file hpl_osc32kctrl_config.h */ +#ifndef HPL_OSC32KCTRL_CONFIG_H +#define HPL_OSC32KCTRL_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// RTC Source configuration +// enable_rtc_source +#ifndef CONF_RTCCTRL_CONFIG +#define CONF_RTCCTRL_CONFIG 0 +#endif + +// RTC source control +// RTC Clock Source Selection +// 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// 32kHz External Crystal Oscillator (XOSC32K) +// This defines the clock source for RTC +// rtc_source_oscillator +#ifndef CONF_RTCCTRL_SRC +#define CONF_RTCCTRL_SRC GCLK_GENCTRL_SRC_OSCULP32K +#endif + +// Use 1 kHz output +// rtc_1khz_selection +#ifndef CONF_RTCCTRL_1KHZ +#define CONF_RTCCTRL_1KHZ 1 +#endif + +#if CONF_RTCCTRL_SRC == GCLK_GENCTRL_SRC_OSCULP32K +#define CONF_RTCCTRL (CONF_RTCCTRL_1KHZ ? OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K_Val : OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K_Val) +#elif CONF_RTCCTRL_SRC == GCLK_GENCTRL_SRC_XOSC32K +#define CONF_RTCCTRL (CONF_RTCCTRL_1KHZ ? OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K_Val : OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K_Val) +#else +#error unexpected CONF_RTCCTRL_SRC +#endif + +// +// + +// 32kHz External Crystal Oscillator Configuration +// Indicates whether configuration for External 32K Osc is enabled or not +// enable_xosc32k +#ifndef CONF_XOSC32K_CONFIG +#define CONF_XOSC32K_CONFIG 1 +#endif + +// 32kHz External Crystal Oscillator Control +// Oscillator enable +// Indicates whether 32kHz External Crystal Oscillator is enabled or not +// xosc32k_arch_enable +#ifndef CONF_XOSC32K_ENABLE +#define CONF_XOSC32K_ENABLE 1 +#endif + +// Start-Up Time +// <0x0=>62592us +// <0x1=>125092us +// <0x2=>500092us +// <0x3=>1000092us +// <0x4=>2000092us +// <0x5=>4000092us +// <0x6=>8000092us +// xosc32k_arch_startup +#ifndef CONF_XOSC32K_STARTUP +#define CONF_XOSC32K_STARTUP 0x0 +#endif + +// On Demand Control +// Indicates whether On Demand Control is enabled or not +// xosc32k_arch_ondemand +#ifndef CONF_XOSC32K_ONDEMAND +#define CONF_XOSC32K_ONDEMAND 1 +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// xosc32k_arch_runstdby +#ifndef CONF_XOSC32K_RUNSTDBY +#define CONF_XOSC32K_RUNSTDBY 0 +#endif + +// 1kHz Output Enable +// Indicates whether 1kHz Output is enabled or not +// xosc32k_arch_en1k +#ifndef CONF_XOSC32K_EN1K +#define CONF_XOSC32K_EN1K 0 +#endif + +// 32kHz Output Enable +// Indicates whether 32kHz Output is enabled or not +// xosc32k_arch_en32k +#ifndef CONF_XOSC32K_EN32K +#define CONF_XOSC32K_EN32K 0 +#endif + +// Clock Switch Back +// Indicates whether Clock Switch Back is enabled or not +// xosc32k_arch_swben +#ifndef CONF_XOSC32K_SWBEN +#define CONF_XOSC32K_SWBEN 0 +#endif + +// Clock Failure Detector +// Indicates whether Clock Failure Detector is enabled or not +// xosc32k_arch_cfden +#ifndef CONF_XOSC32K_CFDEN +#define CONF_XOSC32K_CFDEN 0 +#endif + +// Clock Failure Detector Event Out +// Indicates whether Clock Failure Detector Event Out is enabled or not +// xosc32k_arch_cfdeo +#ifndef CONF_XOSC32K_CFDEO +#define CONF_XOSC32K_CFDEO 0 +#endif + +// Crystal connected to XIN32/XOUT32 Enable +// Indicates whether the connections between the I/O pads and the external clock or crystal oscillator is enabled or not +// xosc32k_arch_xtalen +#ifndef CONF_XOSC32K_XTALEN +#define CONF_XOSC32K_XTALEN 0 +#endif + +// Control Gain Mode +// <0x0=>Low Power mode +// <0x1=>Standard mode +// <0x2=>High Speed mode +// xosc32k_arch_cgm +#ifndef CONF_XOSC32K_CGM +#define CONF_XOSC32K_CGM 0x1 +#endif + +// +// + +// 32kHz Ultra Low Power Internal Oscillator Configuration +// Indicates whether configuration for OSCULP32K is enabled or not +// enable_osculp32k +#ifndef CONF_OSCULP32K_CONFIG +#define CONF_OSCULP32K_CONFIG 1 +#endif + +// 32kHz Ultra Low Power Internal Oscillator Control + +// Oscillator Calibration Control +// Indicates whether Oscillator Calibration is enabled or not +// osculp32k_calib_enable +#ifndef CONF_OSCULP32K_CALIB_ENABLE +#define CONF_OSCULP32K_CALIB_ENABLE 0 +#endif + +// Oscillator Calibration <0x0-0x3F> +// osculp32k_calib +#ifndef CONF_OSCULP32K_CALIB +#define CONF_OSCULP32K_CALIB 0x0 +#endif + +// +// + +// <<< end of configuration section >>> + +#endif // HPL_OSC32KCTRL_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_oscctrl_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_oscctrl_config.h new file mode 100644 index 000000000..cd1186605 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_oscctrl_config.h @@ -0,0 +1,634 @@ +/* Auto-generated config file hpl_oscctrl_config.h */ +#ifndef HPL_OSCCTRL_CONFIG_H +#define HPL_OSCCTRL_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// External Multipurpose Crystal Oscillator Configuration +// Indicates whether configuration for XOSC0 is enabled or not +// enable_xosc0 +#ifndef CONF_XOSC0_CONFIG +#define CONF_XOSC0_CONFIG 0 +#endif + +// Frequency <8000000-48000000> +// Oscillation frequency of the resonator connected to the External Multipurpose Crystal Oscillator. +// xosc0_frequency +#ifndef CONF_XOSC_FREQUENCY +#define CONF_XOSC0_FREQUENCY 12000000 +#endif + +// External Multipurpose Crystal Oscillator Control +// Oscillator enable +// Indicates whether External Multipurpose Crystal Oscillator is enabled or not +// xosc0_arch_enable +#ifndef CONF_XOSC0_ENABLE +#define CONF_XOSC0_ENABLE 0 +#endif + +// Start-Up Time +// <0x0=>31us +// <0x1=>61us +// <0x2=>122us +// <0x3=>244us +// <0x4=>488us +// <0x5=>977us +// <0x6=>1953us +// <0x7=>3906us +// <0x8=>7813us +// <0x9=>15625us +// <0xA=>31250us +// <0xB=>62500us +// <0xC=>125000us +// <0xD=>250000us +// <0xE=>500000us +// <0xF=>1000000us +// xosc0_arch_startup +#ifndef CONF_XOSC0_STARTUP +#define CONF_XOSC0_STARTUP 0 +#endif + +// Clock Switch Back +// Indicates whether Clock Switch Back is enabled or not +// xosc0_arch_swben +#ifndef CONF_XOSC0_SWBEN +#define CONF_XOSC0_SWBEN 0 +#endif + +// Clock Failure Detector +// Indicates whether Clock Failure Detector is enabled or not +// xosc0_arch_cfden +#ifndef CONF_XOSC0_CFDEN +#define CONF_XOSC0_CFDEN 0 +#endif + +// Automatic Loop Control Enable +// Indicates whether Automatic Loop Control is enabled or not +// xosc0_arch_enalc +#ifndef CONF_XOSC0_ENALC +#define CONF_XOSC0_ENALC 0 +#endif + +// Low Buffer Gain Enable +// Indicates whether Low Buffer Gain is enabled or not +// xosc0_arch_lowbufgain +#ifndef CONF_XOSC0_LOWBUFGAIN +#define CONF_XOSC0_LOWBUFGAIN 0 +#endif + +// On Demand Control +// Indicates whether On Demand Control is enabled or not +// xosc0_arch_ondemand +#ifndef CONF_XOSC0_ONDEMAND +#define CONF_XOSC0_ONDEMAND 0 +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// xosc0_arch_runstdby +#ifndef CONF_XOSC0_RUNSTDBY +#define CONF_XOSC0_RUNSTDBY 0 +#endif + +// Crystal connected to XIN/XOUT Enable +// Indicates whether the connections between the I/O pads and the external clock or crystal oscillator is enabled or not +// xosc0_arch_xtalen +#ifndef CONF_XOSC0_XTALEN +#define CONF_XOSC0_XTALEN 0 +#endif +// +// + +#if CONF_XOSC0_FREQUENCY >= 32000000 +#define CONF_XOSC0_CFDPRESC 0x0 +#define CONF_XOSC0_IMULT 0x7 +#define CONF_XOSC0_IPTAT 0x3 +#elif CONF_XOSC0_FREQUENCY >= 24000000 +#define CONF_XOSC0_CFDPRESC 0x1 +#define CONF_XOSC0_IMULT 0x6 +#define CONF_XOSC0_IPTAT 0x3 +#elif CONF_XOSC0_FREQUENCY >= 16000000 +#define CONF_XOSC0_CFDPRESC 0x2 +#define CONF_XOSC0_IMULT 0x5 +#define CONF_XOSC0_IPTAT 0x3 +#elif CONF_XOSC0_FREQUENCY >= 8000000 +#define CONF_XOSC0_CFDPRESC 0x3 +#define CONF_XOSC0_IMULT 0x4 +#define CONF_XOSC0_IPTAT 0x3 +#endif + +// External Multipurpose Crystal Oscillator Configuration +// Indicates whether configuration for XOSC1 is enabled or not +// enable_xosc1 +#ifndef CONF_XOSC1_CONFIG +#define CONF_XOSC1_CONFIG 0 +#endif + +// Frequency <8000000-48000000> +// Oscillation frequency of the resonator connected to the External Multipurpose Crystal Oscillator. +// xosc1_frequency +#ifndef CONF_XOSC_FREQUENCY +#define CONF_XOSC1_FREQUENCY 12000000 +#endif + +// External Multipurpose Crystal Oscillator Control +// Oscillator enable +// Indicates whether External Multipurpose Crystal Oscillator is enabled or not +// xosc1_arch_enable +#ifndef CONF_XOSC1_ENABLE +#define CONF_XOSC1_ENABLE 0 +#endif + +// Start-Up Time +// <0x0=>31us +// <0x1=>61us +// <0x2=>122us +// <0x3=>244us +// <0x4=>488us +// <0x5=>977us +// <0x6=>1953us +// <0x7=>3906us +// <0x8=>7813us +// <0x9=>15625us +// <0xA=>31250us +// <0xB=>62500us +// <0xC=>125000us +// <0xD=>250000us +// <0xE=>500000us +// <0xF=>1000000us +// xosc1_arch_startup +#ifndef CONF_XOSC1_STARTUP +#define CONF_XOSC1_STARTUP 0 +#endif + +// Clock Switch Back +// Indicates whether Clock Switch Back is enabled or not +// xosc1_arch_swben +#ifndef CONF_XOSC1_SWBEN +#define CONF_XOSC1_SWBEN 0 +#endif + +// Clock Failure Detector +// Indicates whether Clock Failure Detector is enabled or not +// xosc1_arch_cfden +#ifndef CONF_XOSC1_CFDEN +#define CONF_XOSC1_CFDEN 0 +#endif + +// Automatic Loop Control Enable +// Indicates whether Automatic Loop Control is enabled or not +// xosc1_arch_enalc +#ifndef CONF_XOSC1_ENALC +#define CONF_XOSC1_ENALC 0 +#endif + +// Low Buffer Gain Enable +// Indicates whether Low Buffer Gain is enabled or not +// xosc1_arch_lowbufgain +#ifndef CONF_XOSC1_LOWBUFGAIN +#define CONF_XOSC1_LOWBUFGAIN 0 +#endif + +// On Demand Control +// Indicates whether On Demand Control is enabled or not +// xosc1_arch_ondemand +#ifndef CONF_XOSC1_ONDEMAND +#define CONF_XOSC1_ONDEMAND 0 +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// xosc1_arch_runstdby +#ifndef CONF_XOSC1_RUNSTDBY +#define CONF_XOSC1_RUNSTDBY 0 +#endif + +// Crystal connected to XIN/XOUT Enable +// Indicates whether the connections between the I/O pads and the external clock or crystal oscillator is enabled or not +// xosc1_arch_xtalen +#ifndef CONF_XOSC1_XTALEN +#define CONF_XOSC1_XTALEN 0 +#endif +// +// + +#if CONF_XOSC1_FREQUENCY >= 32000000 +#define CONF_XOSC1_CFDPRESC 0x0 +#define CONF_XOSC1_IMULT 0x7 +#define CONF_XOSC1_IPTAT 0x3 +#elif CONF_XOSC1_FREQUENCY >= 24000000 +#define CONF_XOSC1_CFDPRESC 0x1 +#define CONF_XOSC1_IMULT 0x6 +#define CONF_XOSC1_IPTAT 0x3 +#elif CONF_XOSC1_FREQUENCY >= 16000000 +#define CONF_XOSC1_CFDPRESC 0x2 +#define CONF_XOSC1_IMULT 0x5 +#define CONF_XOSC1_IPTAT 0x3 +#elif CONF_XOSC1_FREQUENCY >= 8000000 +#define CONF_XOSC1_CFDPRESC 0x3 +#define CONF_XOSC1_IMULT 0x4 +#define CONF_XOSC1_IPTAT 0x3 +#endif + +// DFLL Configuration +// Indicates whether configuration for DFLL is enabled or not +// enable_dfll +#ifndef CONF_DFLL_CONFIG +#define CONF_DFLL_CONFIG 0 +#endif + +// Reference Clock Source +// Generic clock generator 0 +// Generic clock generator 1 +// Generic clock generator 2 +// Generic clock generator 3 +// Generic clock generator 4 +// Generic clock generator 5 +// Generic clock generator 6 +// Generic clock generator 7 +// Generic clock generator 8 +// Generic clock generator 9 +// Generic clock generator 10 +// Generic clock generator 11 +// Select the clock source +// dfll_ref_clock +#ifndef CONF_DFLL_GCLK +#define CONF_DFLL_GCLK GCLK_PCHCTRL_GEN_GCLK3_Val +#endif + +// Digital Frequency Locked Loop Control +// DFLL Enable +// Indicates whether DFLL is enabled or not +// dfll_arch_enable +#ifndef CONF_DFLL_ENABLE +#define CONF_DFLL_ENABLE 1 +#endif + +// On Demand Control +// Indicates whether On Demand Control is enabled or not +// dfll_arch_ondemand +#ifndef CONF_DFLL_ONDEMAND +#define CONF_DFLL_ONDEMAND 0 +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// dfll_arch_runstdby +#ifndef CONF_DFLL_RUNSTDBY +#define CONF_DFLL_RUNSTDBY 0 +#endif + +// USB Clock Recovery Mode +// Indicates whether USB Clock Recovery Mode is enabled or not +// dfll_arch_usbcrm +#ifndef CONF_DFLL_USBCRM +#define CONF_DFLL_USBCRM 1 +#endif + +// Wait Lock +// Indicates whether Wait Lock is enabled or not +// dfll_arch_waitlock +#ifndef CONF_DFLL_WAITLOCK +#define CONF_DFLL_WAITLOCK 1 +#endif + +// Bypass Coarse Lock +// Indicates whether Bypass Coarse Lock is enabled or not +// dfll_arch_bplckc +#ifndef CONF_DFLL_BPLCKC +#define CONF_DFLL_BPLCKC 0 +#endif + +// Quick Lock Disable +// Indicates whether Quick Lock Disable is enabled or not +// dfll_arch_qldis +#ifndef CONF_DFLL_QLDIS +#define CONF_DFLL_QLDIS 0 +#endif + +// Chill Cycle Disable +// Indicates whether Chill Cycle Disable is enabled or not +// dfll_arch_ccdis +#ifndef CONF_DFLL_CCDIS +#define CONF_DFLL_CCDIS 1 +#endif + +// Lose Lock After Wake +// Indicates whether Lose Lock After Wake is enabled or not +// dfll_arch_llaw +#ifndef CONF_DFLL_LLAW +#define CONF_DFLL_LLAW 0 +#endif + +// Stable DFLL Frequency +// Indicates whether Stable DFLL Frequency is enabled or not +// dfll_arch_stable +#ifndef CONF_DFLL_STABLE +#define CONF_DFLL_STABLE 0 +#endif + +// Operating Mode Selection +// <0=>Open Loop Mode +// <1=>Closed Loop Mode +// dfll_mode +#ifndef CONF_DFLL_MODE +#define CONF_DFLL_MODE 0x0 +#endif + +// Coarse Maximum Step <0x0-0x1F> +// dfll_arch_cstep +#ifndef CONF_DFLL_CSTEP +#define CONF_DFLL_CSTEP 0x1 +#endif + +// Fine Maximum Step <0x0-0xFF> +// dfll_arch_fstep +#ifndef CONF_DFLL_FSTEP +#define CONF_DFLL_FSTEP 0x1 +#endif + +// DFLL Multiply Factor <0x0-0xFFFF> +// dfll_mul +#ifndef CONF_DFLL_MUL +#define CONF_DFLL_MUL 0x0 +#endif + +// DFLL Calibration Overwrite +// Indicates whether Overwrite Calibration value of DFLL +// dfll_arch_calibration +#ifndef CONF_DFLL_OVERWRITE_CALIBRATION +#define CONF_DFLL_OVERWRITE_CALIBRATION 0 +#endif + +// Coarse Value <0x0-0x3F> +// dfll_arch_coarse +#ifndef CONF_DFLL_COARSE +#define CONF_DFLL_COARSE (0x1f / 4) +#endif + +// Fine Value <0x0-0xFF> +// dfll_arch_fine +#ifndef CONF_DFLL_FINE +#define CONF_DFLL_FINE (0x80) +#endif + +// + +// + +// + +// FDPLL0 Configuration +// Indicates whether configuration for FDPLL0 is enabled or not +// enable_fdpll0 +#ifndef CONF_FDPLL0_CONFIG +#define CONF_FDPLL0_CONFIG 1 +#endif + +// Reference Clock Source +// 32kHz External Crystal Oscillator (XOSC32K) +// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator 0 +// Generic clock generator 1 +// Generic clock generator 2 +// Generic clock generator 3 +// Generic clock generator 4 +// Generic clock generator 5 +// Generic clock generator 6 +// Generic clock generator 7 +// Generic clock generator 8 +// Generic clock generator 9 +// Generic clock generator 10 +// Generic clock generator 11 +// Select the clock source. +// fdpll0_ref_clock +#ifndef CONF_FDPLL0_GCLK +#define CONF_FDPLL0_GCLK GCLK_PCHCTRL_GEN_GCLK5_Val +#endif + +// Digital Phase Locked Loop Control +// Enable +// Indicates whether Digital Phase Locked Loop is enabled or not +// fdpll0_arch_enable +#ifndef CONF_FDPLL0_ENABLE +#define CONF_FDPLL0_ENABLE 1 +#endif + +// On Demand Control +// Indicates whether On Demand Control is enabled or not +// fdpll0_arch_ondemand +#ifndef CONF_FDPLL0_ONDEMAND +#define CONF_FDPLL0_ONDEMAND 0 +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// fdpll0_arch_runstdby +#ifndef CONF_FDPLL0_RUNSTDBY +#define CONF_FDPLL0_RUNSTDBY 0 +#endif + +// Loop Divider Ratio Fractional Part <0x0-0x1F> +// fdpll0_ldrfrac +#ifndef CONF_FDPLL0_LDRFRAC +#define CONF_FDPLL0_LDRFRAC 0x0 +#endif + +// Loop Divider Ratio Integer Part <0x0-0x1FFF> +// fdpll0_ldr +#ifndef CONF_FDPLL0_LDR +#define CONF_FDPLL0_LDR 59 +#endif + +// Clock Divider <0x0-0x7FF> +// fdpll0_clock_div +#ifndef CONF_FDPLL0_DIV +#define CONF_FDPLL0_DIV 0x0 +#endif + +// DCO Filter Enable +// Indicates whether DCO Filter Enable is enabled or not +// fdpll0_arch_dcoen +#ifndef CONF_FDPLL0_DCOEN +#define CONF_FDPLL0_DCOEN 0 +#endif + +// Sigma-Delta DCO Filter Selection <0x0-0x7> +// fdpll0_clock_dcofilter +#ifndef CONF_FDPLL0_DCOFILTER +#define CONF_FDPLL0_DCOFILTER 0x0 +#endif + +// Lock Bypass +// Indicates whether Lock Bypass is enabled or not +// fdpll0_arch_lbypass +#ifndef CONF_FDPLL0_LBYPASS +#define CONF_FDPLL0_LBYPASS 0 +#endif + +// Lock Time +// <0x0=>No time-out, automatic lock +// <0x4=>The Time-out if no lock within 800 us +// <0x5=>The Time-out if no lock within 900 us +// <0x6=>The Time-out if no lock within 1 ms +// <0x7=>The Time-out if no lock within 11 ms +// fdpll0_arch_ltime +#ifndef CONF_FDPLL0_LTIME +#define CONF_FDPLL0_LTIME 0x0 +#endif + +// Reference Clock Selection +// <0x0=>GCLK clock reference +// <0x1=>XOSC32K clock reference +// <0x2=>XOSC0 clock reference +// <0x3=>XOSC1 clock reference +// fdpll0_arch_refclk +#ifndef CONF_FDPLL0_REFCLK +#define CONF_FDPLL0_REFCLK 0x0 +#endif + +// Wake Up Fast +// Indicates whether Wake Up Fast is enabled or not +// fdpll0_arch_wuf +#ifndef CONF_FDPLL0_WUF +#define CONF_FDPLL0_WUF 0 +#endif + +// Proportional Integral Filter Selection <0x0-0xF> +// fdpll0_arch_filter +#ifndef CONF_FDPLL0_FILTER +#define CONF_FDPLL0_FILTER 0x0 +#endif + +// +// +// FDPLL1 Configuration +// Indicates whether configuration for FDPLL1 is enabled or not +// enable_fdpll1 +#ifndef CONF_FDPLL1_CONFIG +#define CONF_FDPLL1_CONFIG 0 +#endif + +// Reference Clock Source +// 32kHz External Crystal Oscillator (XOSC32K) +// External Crystal Oscillator 8-48MHz (XOSC0) +// External Crystal Oscillator 8-48MHz (XOSC1) +// Generic clock generator 0 +// Generic clock generator 1 +// Generic clock generator 2 +// Generic clock generator 3 +// Generic clock generator 4 +// Generic clock generator 5 +// Generic clock generator 6 +// Generic clock generator 7 +// Generic clock generator 8 +// Generic clock generator 9 +// Generic clock generator 10 +// Generic clock generator 11 +// Select the clock source. +// fdpll1_ref_clock +#ifndef CONF_FDPLL1_GCLK +#define CONF_FDPLL1_GCLK GCLK_GENCTRL_SRC_XOSC32K +#endif + +// Digital Phase Locked Loop Control +// Enable +// Indicates whether Digital Phase Locked Loop is enabled or not +// fdpll1_arch_enable +#ifndef CONF_FDPLL1_ENABLE +#define CONF_FDPLL1_ENABLE 0 +#endif + +// On Demand Control +// Indicates whether On Demand Control is enabled or not +// fdpll1_arch_ondemand +#ifndef CONF_FDPLL1_ONDEMAND +#define CONF_FDPLL1_ONDEMAND 0 +#endif + +// Run in Standby +// Indicates whether Run in Standby is enabled or not +// fdpll1_arch_runstdby +#ifndef CONF_FDPLL1_RUNSTDBY +#define CONF_FDPLL1_RUNSTDBY 0 +#endif + +// Loop Divider Ratio Fractional Part <0x0-0x1F> +// fdpll1_ldrfrac +#ifndef CONF_FDPLL1_LDRFRAC +#define CONF_FDPLL1_LDRFRAC 0xd +#endif + +// Loop Divider Ratio Integer Part <0x0-0x1FFF> +// fdpll1_ldr +#ifndef CONF_FDPLL1_LDR +#define CONF_FDPLL1_LDR 0x5b7 +#endif + +// Clock Divider <0x0-0x7FF> +// fdpll1_clock_div +#ifndef CONF_FDPLL1_DIV +#define CONF_FDPLL1_DIV 0x0 +#endif + +// DCO Filter Enable +// Indicates whether DCO Filter Enable is enabled or not +// fdpll1_arch_dcoen +#ifndef CONF_FDPLL1_DCOEN +#define CONF_FDPLL1_DCOEN 0 +#endif + +// Sigma-Delta DCO Filter Selection <0x0-0x7> +// fdpll1_clock_dcofilter +#ifndef CONF_FDPLL1_DCOFILTER +#define CONF_FDPLL1_DCOFILTER 0x0 +#endif + +// Lock Bypass +// Indicates whether Lock Bypass is enabled or not +// fdpll1_arch_lbypass +#ifndef CONF_FDPLL1_LBYPASS +#define CONF_FDPLL1_LBYPASS 0 +#endif + +// Lock Time +// <0x0=>No time-out, automatic lock +// <0x4=>The Time-out if no lock within 800 us +// <0x5=>The Time-out if no lock within 900 us +// <0x6=>The Time-out if no lock within 1 ms +// <0x7=>The Time-out if no lock within 11 ms +// fdpll1_arch_ltime +#ifndef CONF_FDPLL1_LTIME +#define CONF_FDPLL1_LTIME 0x0 +#endif + +// Reference Clock Selection +// <0x0=>GCLK clock reference +// <0x1=>XOSC32K clock reference +// <0x2=>XOSC0 clock reference +// <0x3=>XOSC1 clock reference +// fdpll1_arch_refclk +#ifndef CONF_FDPLL1_REFCLK +#define CONF_FDPLL1_REFCLK 0x1 +#endif + +// Wake Up Fast +// Indicates whether Wake Up Fast is enabled or not +// fdpll1_arch_wuf +#ifndef CONF_FDPLL1_WUF +#define CONF_FDPLL1_WUF 0 +#endif + +// Proportional Integral Filter Selection <0x0-0xF> +// fdpll1_arch_filter +#ifndef CONF_FDPLL1_FILTER +#define CONF_FDPLL1_FILTER 0x0 +#endif + +// +// + +// <<< end of configuration section >>> + +#endif // HPL_OSCCTRL_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_rtc_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_rtc_config.h new file mode 100644 index 000000000..2b0b6712e --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_rtc_config.h @@ -0,0 +1,145 @@ +/* Auto-generated config file hpl_rtc_config.h */ +#ifndef HPL_RTC_CONFIG_H +#define HPL_RTC_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Basic settings + +#ifndef CONF_RTC_ENABLE +#define CONF_RTC_ENABLE 1 +#endif + +// Force reset RTC on initialization +// Force RTC to reset on initialization. +// Note that the previous power down data in RTC is lost if it's enabled. +// rtc_arch_init_reset +#ifndef CONF_RTC_INIT_RESET +#define CONF_RTC_INIT_RESET 0 +#endif + +// Prescaler configuration +// <0x0=>OFF(Peripheral clock divided by 1) +// <0x1=>Peripheral clock divided by 1 +// <0x2=>Peripheral clock divided by 2 +// <0x3=>Peripheral clock divided by 4 +// <0x4=>Peripheral clock divided by 8 +// <0x5=>Peripheral clock divided by 16 +// <0x6=>Peripheral clock divided by 32 +// <0x7=>Peripheral clock divided by 64 +// <0x8=>Peripheral clock divided by 128 +// <0x9=>Peripheral clock divided by 256 +// <0xA=>Peripheral clock divided by 512 +// <0xB=>Peripheral clock divided by 1024 +// These bits define the RTC clock relative to the peripheral clock +// rtc_arch_prescaler +#ifndef CONF_RTC_PRESCALER +#define CONF_RTC_PRESCALER 0xb + +#endif + +// Compare Value <1-4294967295> +// These bits define the RTC Compare value, the ticks period is equal to reciprocal of (rtc clock/prescaler/compare value), +// by default 1K clock input, 1 prescaler, 1 compare value, the ticks period equals to 1ms. +// rtc_arch_comp_val + +#ifndef CONF_RTC_COMP_VAL +#define CONF_RTC_COMP_VAL 1 + +#endif + +// Event control +// rtc_event_control +#ifndef CONF_RTC_EVENT_CONTROL_ENABLE +#define CONF_RTC_EVENT_CONTROL_ENABLE 0 +#endif + +// Periodic Interval 0 Event Output +// This bit indicates whether Periodic interval 0 event is enabled and will be generated +// rtc_pereo0 +#ifndef CONF_RTC_PEREO0 +#define CONF_RTC_PEREO0 0 +#endif +// Periodic Interval 1 Event Output +// This bit indicates whether Periodic interval 1 event is enabled and will be generated +// rtc_pereo1 +#ifndef CONF_RTC_PEREO1 +#define CONF_RTC_PEREO1 0 +#endif +// Periodic Interval 2 Event Output +// This bit indicates whether Periodic interval 2 event is enabled and will be generated +// rtc_pereo2 +#ifndef CONF_RTC_PEREO2 +#define CONF_RTC_PEREO2 0 +#endif +// Periodic Interval 3 Event Output +// This bit indicates whether Periodic interval 3 event is enabled and will be generated +// rtc_pereo3 +#ifndef CONF_RTC_PEREO3 +#define CONF_RTC_PEREO3 0 +#endif +// Periodic Interval 4 Event Output +// This bit indicates whether Periodic interval 4 event is enabled and will be generated +// rtc_pereo4 +#ifndef CONF_RTC_PEREO4 +#define CONF_RTC_PEREO4 0 +#endif +// Periodic Interval 5 Event Output +// This bit indicates whether Periodic interval 5 event is enabled and will be generated +// rtc_pereo5 +#ifndef CONF_RTC_PEREO5 +#define CONF_RTC_PEREO5 0 +#endif +// Periodic Interval 6 Event Output +// This bit indicates whether Periodic interval 6 event is enabled and will be generated +// rtc_pereo6 +#ifndef CONF_RTC_PEREO6 +#define CONF_RTC_PEREO6 0 +#endif +// Periodic Interval 7 Event Output +// This bit indicates whether Periodic interval 7 event is enabled and will be generated +// rtc_pereo7 +#ifndef CONF_RTC_PEREO7 +#define CONF_RTC_PEREO7 0 +#endif + +// Compare 0 Event Output +// This bit indicates whether Compare O event is enabled and will be generated +// rtc_cmpeo0 +#ifndef CONF_RTC_COMPE0 +#define CONF_RTC_COMPE0 0 +#endif + +// Compare 1 Event Output +// This bit indicates whether Compare 1 event is enabled and will be generated +// rtc_cmpeo1 +#ifndef CONF_RTC_COMPE1 +#define CONF_RTC_COMPE1 0 +#endif +// Overflow Event Output +// This bit indicates whether Overflow event is enabled and will be generated +// rtc_ovfeo +#ifndef CONF_RTC_OVFEO +#define CONF_RTC_OVFEO 0 +#endif + +// Tamper Event Output +// This bit indicates whether Tamper event output is enabled and will be generated +// rtc_tampereo +#ifndef CONF_RTC_TAMPEREO +#define CONF_RTC_TAMPEREO 0 +#endif + +// Tamper Event Input +// This bit indicates whether Tamper event input is enabled and will be generated +// rtc_tampevei +#ifndef CONF_RTC_TAMPEVEI +#define CONF_RTC_TAMPEVEI 0 +#endif +// + +// + +// <<< end of configuration section >>> + +#endif // HPL_RTC_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_sdhc_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_sdhc_config.h new file mode 100644 index 000000000..daa662051 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_sdhc_config.h @@ -0,0 +1,24 @@ +/* Auto-generated config file hpl_sdhc_config.h */ +#ifndef HPL_SDHC_CONFIG_H +#define HPL_SDHC_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +#include "peripheral_clk_config.h" + +#ifndef CONF_BASE_FREQUENCY +#define CONF_BASE_FREQUENCY CONF_SDHC0_FREQUENCY +#endif + +// Clock Generator Select +// <0=> Divided Clock mode +// <1=> Programmable Clock mode +// This defines the clock generator mode in the SDCLK Frequency Select field +// sdhc_clk_gsel +#ifndef CONF_SDHC0_CLK_GEN_SEL +#define CONF_SDHC0_CLK_GEN_SEL 0 +#endif + +// <<< end of configuration section >>> + +#endif // HPL_SDHC_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_sercom_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_sercom_config.h new file mode 100644 index 000000000..cd411154c --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_sercom_config.h @@ -0,0 +1,751 @@ +// For CircuitPython, use SERCOM settings as prototypes to set +// the default settings. This file defines these SERCOMs +// +// SERCOM0: SPI with hal_spi_m_sync.c driver: spi master synchronous +// SERCOM1: I2C with hal_i2c_m_sync.c driver: i2c master synchronous +// SERCOM2: USART with hal_usart_async.c driver: usart asynchronous +// SERCOM3: SPI with hal_spi_m_dma.c: spi master DMA + +#define PROTOTYPE_SERCOM_SPI_M_SYNC SERCOM0 +#define PROTOTYPE_SERCOM_SPI_M_SYNC_CLOCK_FREQUENCY CONF_GCLK_SERCOM0_CORE_FREQUENCY + +#define PROTOTYPE_SERCOM_I2CM_SYNC SERCOM1 + +#define PROTOTYPE_SERCOM_USART_ASYNC SERCOM2 +#define PROTOTYPE_SERCOM_USART_ASYNC_CLOCK_FREQUENCY CONF_GCLK_SERCOM2_CORE_FREQUENCY + +/* Auto-generated config file hpl_sercom_config.h */ +#ifndef HPL_SERCOM_CONFIG_H +#define HPL_SERCOM_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +#include + +// Enable configuration of module +#ifndef CONF_SERCOM_0_SPI_ENABLE +#define CONF_SERCOM_0_SPI_ENABLE 1 +#endif + +// Set module in SPI Master mode +#ifndef CONF_SERCOM_0_SPI_MODE +#define CONF_SERCOM_0_SPI_MODE 0x03 +#endif + +// Basic Configuration + +// Receive buffer enable +// Enable receive buffer to receive data from slave (RXEN) +// spi_master_rx_enable +#ifndef CONF_SERCOM_0_SPI_RXEN +#define CONF_SERCOM_0_SPI_RXEN 0x1 +#endif + +// Character Size +// Bit size for all characters sent over the SPI bus (CHSIZE) +// <0x0=>8 bits +// <0x1=>9 bits +// spi_master_character_size +#ifndef CONF_SERCOM_0_SPI_CHSIZE +#define CONF_SERCOM_0_SPI_CHSIZE 0x0 +#endif + +// Baud rate <1-12000000> +// The SPI data transfer rate +// spi_master_baud_rate +#ifndef CONF_SERCOM_0_SPI_BAUD +#define CONF_SERCOM_0_SPI_BAUD 50000 +#endif + +// + +// Advanced Configuration +// spi_master_advanced +#ifndef CONF_SERCOM_0_SPI_ADVANCED +#define CONF_SERCOM_0_SPI_ADVANCED 1 +#endif + +// Dummy byte <0x00-0x1ff> +// spi_master_dummybyte +// Dummy byte used when reading data from the slave without sending any data +#ifndef CONF_SERCOM_0_SPI_DUMMYBYTE +#define CONF_SERCOM_0_SPI_DUMMYBYTE 0x1ff +#endif + +// Data Order +// <0=>MSB first +// <1=>LSB first +// I least significant or most significant bit is shifted out first (DORD) +// spi_master_arch_dord +#ifndef CONF_SERCOM_0_SPI_DORD +#define CONF_SERCOM_0_SPI_DORD 0x0 +#endif + +// Clock Polarity +// <0=>SCK is low when idle +// <1=>SCK is high when idle +// Determines if the leading edge is rising or falling with a corresponding opposite edge at the trailing edge. (CPOL) +// spi_master_arch_cpol +#ifndef CONF_SERCOM_0_SPI_CPOL +#define CONF_SERCOM_0_SPI_CPOL 0x0 +#endif + +// Clock Phase +// <0x0=>Sample input on leading edge +// <0x1=>Sample input on trailing edge +// Determines if input data is sampled on leading or trailing SCK edge. (CPHA) +// spi_master_arch_cpha +#ifndef CONF_SERCOM_0_SPI_CPHA +#define CONF_SERCOM_0_SPI_CPHA 0x0 +#endif + +// Immediate Buffer Overflow Notification +// Controls when OVF is asserted (IBON) +// <0x0=>In data stream +// <0x1=>On buffer overflow +// spi_master_arch_ibon +#ifndef CONF_SERCOM_0_SPI_IBON +#define CONF_SERCOM_0_SPI_IBON 0x0 +#endif + +// Run in stand-by +// Module stays active in stand-by sleep mode. (RUNSTDBY) +// spi_master_arch_runstdby +#ifndef CONF_SERCOM_0_SPI_RUNSTDBY +#define CONF_SERCOM_0_SPI_RUNSTDBY 0x0 +#endif + +// Debug Stop Mode +// Behavior of the baud-rate generator when CPU is halted by external debugger. (DBGSTOP) +// <0=>Keep running +// <1=>Halt +// spi_master_arch_dbgstop +#ifndef CONF_SERCOM_0_SPI_DBGSTOP +#define CONF_SERCOM_0_SPI_DBGSTOP 0 +#endif + +// + +// Address mode disabled in master mode +#ifndef CONF_SERCOM_0_SPI_AMODE_EN +#define CONF_SERCOM_0_SPI_AMODE_EN 0 +#endif + +#ifndef CONF_SERCOM_0_SPI_AMODE +#define CONF_SERCOM_0_SPI_AMODE 0 +#endif + +#ifndef CONF_SERCOM_0_SPI_ADDR +#define CONF_SERCOM_0_SPI_ADDR 0 +#endif + +#ifndef CONF_SERCOM_0_SPI_ADDRMASK +#define CONF_SERCOM_0_SPI_ADDRMASK 0 +#endif + +#ifndef CONF_SERCOM_0_SPI_SSDE +#define CONF_SERCOM_0_SPI_SSDE 0 +#endif + +#ifndef CONF_SERCOM_0_SPI_MSSEN +#define CONF_SERCOM_0_SPI_MSSEN 0x0 +#endif + +#ifndef CONF_SERCOM_0_SPI_PLOADEN +#define CONF_SERCOM_0_SPI_PLOADEN 0 +#endif + +// Receive Data Pinout +// <0x0=>PAD[0] +// <0x1=>PAD[1] +// <0x2=>PAD[2] +// <0x3=>PAD[3] +// spi_master_rxpo +#ifndef CONF_SERCOM_0_SPI_RXPO +#define CONF_SERCOM_0_SPI_RXPO 2 +#endif + +// Transmit Data Pinout +// <0x0=>PAD[0,1]_DO_SCK +// <0x1=>PAD[2,3]_DO_SCK +// <0x2=>PAD[3,1]_DO_SCK +// <0x3=>PAD[0,3]_DO_SCK +// spi_master_txpo +#ifndef CONF_SERCOM_0_SPI_TXPO +#define CONF_SERCOM_0_SPI_TXPO 0 +#endif + +// Calculate baud register value from requested baudrate value +#ifndef CONF_SERCOM_0_SPI_BAUD_RATE +#define CONF_SERCOM_0_SPI_BAUD_RATE ((float)CONF_GCLK_SERCOM0_CORE_FREQUENCY / (float)(2 * CONF_SERCOM_0_SPI_BAUD)) - 1 +#endif + +#include + +#ifndef SERCOM_I2CM_CTRLA_MODE_I2C_MASTER +#define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER (5 << 2) +#endif + +#ifndef CONF_SERCOM_1_I2CM_ENABLE +#define CONF_SERCOM_1_I2CM_ENABLE 1 +#endif + +// Basic + +// I2C Bus clock speed (Hz) <1-400000> +// I2C Bus clock (SCL) speed measured in Hz +// i2c_master_baud_rate +#ifndef CONF_SERCOM_1_I2CM_BAUD +#define CONF_SERCOM_1_I2CM_BAUD 100000 +#endif + +// + +// Advanced +// i2c_master_advanced +#ifndef CONF_SERCOM_1_I2CM_ADVANCED_CONFIG +#define CONF_SERCOM_1_I2CM_ADVANCED_CONFIG 1 +#endif + +// TRise (ns) <0-300> +// Determined by the bus impedance, check electric characteristics in the datasheet +// Standard Fast Mode: typical 215ns, max 300ns +// Fast Mode +: typical 60ns, max 100ns +// High Speed Mode: typical 20ns, max 40ns +// i2c_master_arch_trise + +#ifndef CONF_SERCOM_1_I2CM_TRISE +#define CONF_SERCOM_1_I2CM_TRISE 215 +#endif + +// Master SCL Low Extended Time-Out (MEXTTOEN) +// This enables the master SCL low extend time-out +// i2c_master_arch_mexttoen +#ifndef CONF_SERCOM_1_I2CM_MEXTTOEN +#define CONF_SERCOM_1_I2CM_MEXTTOEN 0 +#endif + +// Slave SCL Low Extend Time-Out (SEXTTOEN) +// Enables the slave SCL low extend time-out. If SCL is cumulatively held low for greater than 25ms from the initial START to a STOP, the slave will release its clock hold if enabled and reset the internal state machine +// i2c_master_arch_sexttoen +#ifndef CONF_SERCOM_1_I2CM_SEXTTOEN +#define CONF_SERCOM_1_I2CM_SEXTTOEN 0 +#endif + +// SCL Low Time-Out (LOWTOUT) +// Enables SCL low time-out. If SCL is held low for 25ms-35ms, the master will release it's clock hold +// i2c_master_arch_lowtout +#ifndef CONF_SERCOM_1_I2CM_LOWTOUT +#define CONF_SERCOM_1_I2CM_LOWTOUT 0 +#endif + +// Inactive Time-Out (INACTOUT) +// <0x0=>Disabled +// <0x1=>5-6 SCL cycle time-out(50-60us) +// <0x2=>10-11 SCL cycle time-out(100-110us) +// <0x3=>20-21 SCL cycle time-out(200-210us) +// Defines if inactivity time-out should be enabled, and how long the time-out should be +// i2c_master_arch_inactout +#ifndef CONF_SERCOM_1_I2CM_INACTOUT +#define CONF_SERCOM_1_I2CM_INACTOUT 0x0 +#endif + +// SDA Hold Time (SDAHOLD) +// <0=>Disabled +// <1=>50-100ns hold time +// <2=>300-600ns hold time +// <3=>400-800ns hold time +// Defines the SDA hold time with respect to the negative edge of SCL +// i2c_master_arch_sdahold +#ifndef CONF_SERCOM_1_I2CM_SDAHOLD +#define CONF_SERCOM_1_I2CM_SDAHOLD 0x2 +#endif + +// Run in stand-by +// Determine if the module shall run in standby sleep mode +// i2c_master_arch_runstdby +#ifndef CONF_SERCOM_1_I2CM_RUNSTDBY +#define CONF_SERCOM_1_I2CM_RUNSTDBY 0 +#endif + +// Debug Stop Mode +// Behavior of the baud-rate generator when CPU is halted by external debugger. +// <0=>Keep running +// <1=>Halt +// i2c_master_arch_dbgstop +#ifndef CONF_SERCOM_1_I2CM_DEBUG_STOP_MODE +#define CONF_SERCOM_1_I2CM_DEBUG_STOP_MODE 0 +#endif + +// + +#ifndef CONF_SERCOM_1_I2CM_SPEED +#define CONF_SERCOM_1_I2CM_SPEED 0x00 // Speed: Standard/Fast mode +#endif +#if CONF_SERCOM_1_I2CM_TRISE < 215 || CONF_SERCOM_1_I2CM_TRISE > 300 +#warning Bad I2C Rise time for Standard/Fast mode, reset to 215ns +#undef CONF_SERCOM_1_I2CM_TRISE +#define CONF_SERCOM_1_I2CM_TRISE 215 +#endif + +// gclk_freq - (i2c_scl_freq * 10) - (gclk_freq * i2c_scl_freq * Trise) +// BAUD + BAUDLOW = -------------------------------------------------------------------- +// i2c_scl_freq +// BAUD: register value low [7:0] +// BAUDLOW: register value high [15:8], only used for odd BAUD + BAUDLOW +#define CONF_SERCOM_1_I2CM_BAUD_BAUDLOW \ + (((CONF_GCLK_SERCOM1_CORE_FREQUENCY - (CONF_SERCOM_1_I2CM_BAUD * 10) \ + - (CONF_SERCOM_1_I2CM_TRISE * (CONF_SERCOM_1_I2CM_BAUD / 100) * (CONF_GCLK_SERCOM1_CORE_FREQUENCY / 10000) \ + / 1000)) \ + * 10 \ + + 5) \ + / (CONF_SERCOM_1_I2CM_BAUD * 10)) +#ifndef CONF_SERCOM_1_I2CM_BAUD_RATE +#if CONF_SERCOM_1_I2CM_BAUD_BAUDLOW > (0xFF * 2) +#warning Requested I2C baudrate too low, please check +#define CONF_SERCOM_1_I2CM_BAUD_RATE 0xFF +#elif CONF_SERCOM_1_I2CM_BAUD_BAUDLOW <= 1 +#warning Requested I2C baudrate too high, please check +#define CONF_SERCOM_1_I2CM_BAUD_RATE 1 +#else +#define CONF_SERCOM_1_I2CM_BAUD_RATE \ + ((CONF_SERCOM_1_I2CM_BAUD_BAUDLOW & 0x1) \ + ? (CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2) + ((CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2 + 1) << 8) \ + : (CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2)) +#endif +#endif + +#include + +#ifndef CONF_SERCOM_2_USART_ENABLE +#define CONF_SERCOM_2_USART_ENABLE 1 +#endif + +// Basic Configuration + +// Receive buffer enable +// Enable input buffer in SERCOM module +// usart_rx_enable +#ifndef CONF_SERCOM_2_USART_RXEN +#define CONF_SERCOM_2_USART_RXEN 1 +#endif + +// Transmitt buffer enable +// Enable output buffer in SERCOM module +// usart_tx_enable +#ifndef CONF_SERCOM_2_USART_TXEN +#define CONF_SERCOM_2_USART_TXEN 1 +#endif + +// Frame parity +// <0x0=>No parity +// <0x1=>Even parity +// <0x2=>Odd parity +// Parity bit mode for USART frame +// usart_parity +#ifndef CONF_SERCOM_2_USART_PARITY +#define CONF_SERCOM_2_USART_PARITY 0x0 +#endif + +// Character Size +// <0x0=>8 bits +// <0x1=>9 bits +// <0x5=>5 bits +// <0x6=>6 bits +// <0x7=>7 bits +// Data character size in USART frame +// usart_character_size +#ifndef CONF_SERCOM_2_USART_CHSIZE +#define CONF_SERCOM_2_USART_CHSIZE 0x0 +#endif + +// Stop Bit +// <0=>One stop bit +// <1=>Two stop bits +// Number of stop bits in USART frame +// usart_stop_bit +#ifndef CONF_SERCOM_2_USART_SBMODE +#define CONF_SERCOM_2_USART_SBMODE 0 +#endif + +// Baud rate <1-3000000> +// USART baud rate setting +// usart_baud_rate +#ifndef CONF_SERCOM_2_USART_BAUD +#define CONF_SERCOM_2_USART_BAUD 9600 +#endif + +// + +// Advanced configuration +// usart_advanced +#ifndef CONF_SERCOM_2_USART_ADVANCED_CONFIG +#define CONF_SERCOM_2_USART_ADVANCED_CONFIG 1 +#endif + +// Run in stand-by +// Keep the module running in standby sleep mode +// usart_arch_runstdby +#ifndef CONF_SERCOM_2_USART_RUNSTDBY +#define CONF_SERCOM_2_USART_RUNSTDBY 0 +#endif + +// Immediate Buffer Overflow Notification +// Controls when the BUFOVF status bit is asserted +// usart_arch_ibon +#ifndef CONF_SERCOM_2_USART_IBON +#define CONF_SERCOM_2_USART_IBON 0 +#endif + +// Start of Frame Detection Enable +// Will wake the device from any sleep mode if usart_init and usart_enable was run priort to going to sleep. (receive buffer must be enabled) +// usart_arch_sfde +#ifndef CONF_SERCOM_2_USART_SFDE +#define CONF_SERCOM_2_USART_SFDE 0 +#endif + +// Collision Detection Enable +// Collision detection enable +// usart_arch_cloden +#ifndef CONF_SERCOM_2_USART_CLODEN +#define CONF_SERCOM_2_USART_CLODEN 0 +#endif + +// Operating Mode +// <0x0=>USART with external clock +// <0x1=>USART with internal clock +// Drive the shift register by an internal clock generated by the baud rate generator or an external clock supplied on the XCK pin. +// usart_arch_clock_mode +#ifndef CONF_SERCOM_2_USART_MODE +#define CONF_SERCOM_2_USART_MODE 0x1 +#endif + +// Sample Rate +// <0x0=>16x arithmetic +// <0x1=>16x fractional +// <0x2=>8x arithmetic +// <0x3=>8x fractional +// <0x3=>3x +// How many over-sampling bits used when samling data state +// usart_arch_sampr +#ifndef CONF_SERCOM_2_USART_SAMPR +#define CONF_SERCOM_2_USART_SAMPR 0x0 +#endif + +// Sample Adjustment +// <0x0=>7-8-9 (3-4-5 8-bit over-sampling) +// <0x1=>9-10-11 (4-5-6 8-bit over-sampling) +// <0x2=>11-12-13 (5-6-7 8-bit over-sampling) +// <0x3=>13-14-15 (6-7-8 8-bit over-sampling) +// Adjust which samples to use for data sampling in asynchronous mode +// usart_arch_sampa +#ifndef CONF_SERCOM_2_USART_SAMPA +#define CONF_SERCOM_2_USART_SAMPA 0x0 +#endif + +// Fractional Part <0-7> +// Fractional part of the baud rate if baud rate generator is in fractional mode +// usart_arch_fractional +#ifndef CONF_SERCOM_2_USART_FRACTIONAL +#define CONF_SERCOM_2_USART_FRACTIONAL 0x0 +#endif + +// Data Order +// <0=>MSB is transmitted first +// <1=>LSB is transmitted first +// Data order of the data bits in the frame +// usart_arch_dord +#ifndef CONF_SERCOM_2_USART_DORD +#define CONF_SERCOM_2_USART_DORD 1 +#endif + +// Does not do anything in UART mode +#define CONF_SERCOM_2_USART_CPOL 0 + +// Encoding Format +// <0=>No encoding +// <1=>IrDA encoded +// usart_arch_enc +#ifndef CONF_SERCOM_2_USART_ENC +#define CONF_SERCOM_2_USART_ENC 0 +#endif + +// Debug Stop Mode +// Behavior of the baud-rate generator when CPU is halted by external debugger. +// <0=>Keep running +// <1=>Halt +// usart_arch_dbgstop +#ifndef CONF_SERCOM_2_USART_DEBUG_STOP_MODE +#define CONF_SERCOM_2_USART_DEBUG_STOP_MODE 0 +#endif + +// + +#ifndef CONF_SERCOM_2_USART_INACK +#define CONF_SERCOM_2_USART_INACK 0x0 +#endif + +#ifndef CONF_SERCOM_2_USART_DSNACK +#define CONF_SERCOM_2_USART_DSNACK 0x0 +#endif + +#ifndef CONF_SERCOM_2_USART_MAXITER +#define CONF_SERCOM_2_USART_MAXITER 0x7 +#endif + +#ifndef CONF_SERCOM_2_USART_GTIME +#define CONF_SERCOM_2_USART_GTIME 0x2 +#endif + +#define CONF_SERCOM_2_USART_RXINV 0x0 +#define CONF_SERCOM_2_USART_TXINV 0x0 + +#ifndef CONF_SERCOM_2_USART_CMODE +#define CONF_SERCOM_2_USART_CMODE 0 +#endif + +#ifndef CONF_SERCOM_2_USART_RXPO +#define CONF_SERCOM_2_USART_RXPO 1 /* RX is on PIN_PA08 */ +#endif + +#ifndef CONF_SERCOM_2_USART_TXPO +#define CONF_SERCOM_2_USART_TXPO 0 /* TX is on PIN_PA09 */ +#endif + +/* Set correct parity settings in register interface based on PARITY setting */ +#if CONF_SERCOM_2_USART_PARITY == 0 +#define CONF_SERCOM_2_USART_PMODE 0 +#define CONF_SERCOM_2_USART_FORM 0 +#else +#define CONF_SERCOM_2_USART_PMODE CONF_SERCOM_2_USART_PARITY - 1 +#define CONF_SERCOM_2_USART_FORM 1 +#endif + +// Calculate BAUD register value in UART mode +#if CONF_SERCOM_2_USART_SAMPR == 0 +#ifndef CONF_SERCOM_2_USART_BAUD_RATE +#define CONF_SERCOM_2_USART_BAUD_RATE \ + 65536 - ((65536 * 16.0f * CONF_SERCOM_2_USART_BAUD) / CONF_GCLK_SERCOM2_CORE_FREQUENCY) +#endif +#ifndef CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH +#define CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH 0 +#endif +#elif CONF_SERCOM_2_USART_SAMPR == 1 +#ifndef CONF_SERCOM_2_USART_BAUD_RATE +#define CONF_SERCOM_2_USART_BAUD_RATE \ + ((CONF_GCLK_SERCOM2_CORE_FREQUENCY) / (CONF_SERCOM_2_USART_BAUD * 16)) - (CONF_SERCOM_2_USART_FRACTIONAL / 8) +#endif +#ifndef CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH +#define CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH 0 +#endif +#elif CONF_SERCOM_2_USART_SAMPR == 2 +#ifndef CONF_SERCOM_2_USART_BAUD_RATE +#define CONF_SERCOM_2_USART_BAUD_RATE \ + 65536 - ((65536 * 8.0f * CONF_SERCOM_2_USART_BAUD) / CONF_GCLK_SERCOM2_CORE_FREQUENCY) +#endif +#ifndef CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH +#define CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH 0 +#endif +#elif CONF_SERCOM_2_USART_SAMPR == 3 +#ifndef CONF_SERCOM_2_USART_BAUD_RATE +#define CONF_SERCOM_2_USART_BAUD_RATE \ + ((CONF_GCLK_SERCOM2_CORE_FREQUENCY) / (CONF_SERCOM_2_USART_BAUD * 8)) - (CONF_SERCOM_2_USART_FRACTIONAL / 8) +#endif +#ifndef CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH +#define CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH 0 +#endif +#elif CONF_SERCOM_2_USART_SAMPR == 4 +#ifndef CONF_SERCOM_2_USART_BAUD_RATE +#define CONF_SERCOM_2_USART_BAUD_RATE \ + 65536 - ((65536 * 3.0f * CONF_SERCOM_2_USART_BAUD) / CONF_GCLK_SERCOM2_CORE_FREQUENCY) +#endif +#ifndef CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH +#define CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH 0 +#endif +#endif + +#include + +// Enable configuration of module +#ifndef CONF_SERCOM_3_SPI_ENABLE +#define CONF_SERCOM_3_SPI_ENABLE 1 +#endif + +// SPI DMA TX Channel <0-32> +// This defines DMA channel to be used +// spi_master_dma_tx_channel +#ifndef CONF_SERCOM_3_SPI_M_DMA_TX_CHANNEL +#define CONF_SERCOM_3_SPI_M_DMA_TX_CHANNEL 0 +#endif + +// SPI RX Channel Enable +// spi_master_rx_channel +#ifndef CONF_SERCOM_3_SPI_RX_CHANNEL +#define CONF_SERCOM_3_SPI_RX_CHANNEL 1 +#endif + +// DMA Channel <0-32> +// This defines DMA channel to be used +// spi_master_dma_rx_channel +#ifndef CONF_SERCOM_3_SPI_M_DMA_RX_CHANNEL +#define CONF_SERCOM_3_SPI_M_DMA_RX_CHANNEL 1 +#endif + +// + +// Set module in SPI Master mode +#ifndef CONF_SERCOM_3_SPI_MODE +#define CONF_SERCOM_3_SPI_MODE 0x03 +#endif + +// Basic Configuration + +// Receive buffer enable +// Enable receive buffer to receive data from slave (RXEN) +// spi_master_rx_enable +#ifndef CONF_SERCOM_3_SPI_RXEN +#define CONF_SERCOM_3_SPI_RXEN 0x1 +#endif + +// Character Size +// Bit size for all characters sent over the SPI bus (CHSIZE) +// <0x0=>8 bits +// <0x1=>9 bits +// spi_master_character_size +#ifndef CONF_SERCOM_3_SPI_CHSIZE +#define CONF_SERCOM_3_SPI_CHSIZE 0x0 +#endif + +// Baud rate <1-12000000> +// The SPI data transfer rate +// spi_master_baud_rate +#ifndef CONF_SERCOM_3_SPI_BAUD +#define CONF_SERCOM_3_SPI_BAUD 50000 +#endif + +// + +// Advanced Configuration +// spi_master_advanced +#ifndef CONF_SERCOM_3_SPI_ADVANCED +#define CONF_SERCOM_3_SPI_ADVANCED 0 +#endif + +// Dummy byte <0x00-0x1ff> +// spi_master_dummybyte +// Dummy byte used when reading data from the slave without sending any data +#ifndef CONF_SERCOM_3_SPI_DUMMYBYTE +#define CONF_SERCOM_3_SPI_DUMMYBYTE 0x1ff +#endif + +// Data Order +// <0=>MSB first +// <1=>LSB first +// I least significant or most significant bit is shifted out first (DORD) +// spi_master_arch_dord +#ifndef CONF_SERCOM_3_SPI_DORD +#define CONF_SERCOM_3_SPI_DORD 0x0 +#endif + +// Clock Polarity +// <0=>SCK is low when idle +// <1=>SCK is high when idle +// Determines if the leading edge is rising or falling with a corresponding opposite edge at the trailing edge. (CPOL) +// spi_master_arch_cpol +#ifndef CONF_SERCOM_3_SPI_CPOL +#define CONF_SERCOM_3_SPI_CPOL 0x0 +#endif + +// Clock Phase +// <0x0=>Sample input on leading edge +// <0x1=>Sample input on trailing edge +// Determines if input data is sampled on leading or trailing SCK edge. (CPHA) +// spi_master_arch_cpha +#ifndef CONF_SERCOM_3_SPI_CPHA +#define CONF_SERCOM_3_SPI_CPHA 0x0 +#endif + +// Immediate Buffer Overflow Notification +// Controls when OVF is asserted (IBON) +// <0x0=>In data stream +// <0x1=>On buffer overflow +// spi_master_arch_ibon +#ifndef CONF_SERCOM_3_SPI_IBON +#define CONF_SERCOM_3_SPI_IBON 0x0 +#endif + +// Run in stand-by +// Module stays active in stand-by sleep mode. (RUNSTDBY) +// spi_master_arch_runstdby +#ifndef CONF_SERCOM_3_SPI_RUNSTDBY +#define CONF_SERCOM_3_SPI_RUNSTDBY 0x0 +#endif + +// Debug Stop Mode +// Behavior of the baud-rate generator when CPU is halted by external debugger. (DBGSTOP) +// <0=>Keep running +// <1=>Halt +// spi_master_arch_dbgstop +#ifndef CONF_SERCOM_3_SPI_DBGSTOP +#define CONF_SERCOM_3_SPI_DBGSTOP 0 +#endif + +// + +// Address mode disabled in master mode +#ifndef CONF_SERCOM_3_SPI_AMODE_EN +#define CONF_SERCOM_3_SPI_AMODE_EN 0 +#endif + +#ifndef CONF_SERCOM_3_SPI_AMODE +#define CONF_SERCOM_3_SPI_AMODE 0 +#endif + +#ifndef CONF_SERCOM_3_SPI_ADDR +#define CONF_SERCOM_3_SPI_ADDR 0 +#endif + +#ifndef CONF_SERCOM_3_SPI_ADDRMASK +#define CONF_SERCOM_3_SPI_ADDRMASK 0 +#endif + +#ifndef CONF_SERCOM_3_SPI_SSDE +#define CONF_SERCOM_3_SPI_SSDE 0 +#endif + +#ifndef CONF_SERCOM_3_SPI_MSSEN +#define CONF_SERCOM_3_SPI_MSSEN 0x0 +#endif + +#ifndef CONF_SERCOM_3_SPI_PLOADEN +#define CONF_SERCOM_3_SPI_PLOADEN 0 +#endif + +// Receive Data Pinout +// <0x0=>PAD[0] +// <0x1=>PAD[1] +// <0x2=>PAD[2] +// <0x3=>PAD[3] +// spi_master_rxpo +#ifndef CONF_SERCOM_3_SPI_RXPO +#define CONF_SERCOM_3_SPI_RXPO 2 +#endif + +// Transmit Data Pinout +// <0x0=>PAD[0,1]_DO_SCK +// <0x1=>PAD[2,3]_DO_SCK +// <0x2=>PAD[3,1]_DO_SCK +// <0x3=>PAD[0,3]_DO_SCK +// spi_master_txpo +#ifndef CONF_SERCOM_3_SPI_TXPO +#define CONF_SERCOM_3_SPI_TXPO 0 +#endif + +// Calculate baud register value from requested baudrate value +#ifndef CONF_SERCOM_3_SPI_BAUD_RATE +#define CONF_SERCOM_3_SPI_BAUD_RATE ((float)CONF_GCLK_SERCOM3_CORE_FREQUENCY / (float)(2 * CONF_SERCOM_3_SPI_BAUD)) - 1 +#endif + +// <<< end of configuration section >>> + +#endif // HPL_SERCOM_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_systick_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_systick_config.h new file mode 100644 index 000000000..a7f2f3620 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_systick_config.h @@ -0,0 +1,18 @@ +/* Auto-generated config file hpl_systick_config.h */ +#ifndef HPL_SYSTICK_CONFIG_H +#define HPL_SYSTICK_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Advanced settings +// SysTick exception request +// Indicates whether the generation of SysTick exception is enabled or not +// systick_arch_tickint +#ifndef CONF_SYSTICK_TICKINT +#define CONF_SYSTICK_TICKINT 0 +#endif +// + +// <<< end of configuration section >>> + +#endif // HPL_SYSTICK_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_tc_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_tc_config.h new file mode 100644 index 000000000..38d48e9b6 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_tc_config.h @@ -0,0 +1,209 @@ +/* Auto-generated config file hpl_tc_config.h */ +#ifndef HPL_TC_CONFIG_H +#define HPL_TC_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +#include + +#ifndef CONF_TC0_ENABLE +#define CONF_TC0_ENABLE 1 +#endif + +// Basic settings +// Prescaler +// <0=> No division +// <1=> Divide by 2 +// <2=> Divide by 4 +// <3=> Divide by 8 +// <4=> Divide by 16 +// <5=> Divide by 64 +// <6=> Divide by 256 +// <7=> Divide by 1024 +// This defines the prescaler value +// tc_prescaler +#ifndef CONF_TC0_PRESCALER +#define CONF_TC0_PRESCALER 0 +#endif +// + +// PWM Waveform Output settings +// Waveform Period Value (uS) <0x00-0xFFFFFFFF> +// The unit of this value is us. +// tc_arch_wave_per_val +#ifndef CONF_TC0_WAVE_PER_VAL +#define CONF_TC0_WAVE_PER_VAL 0x3e8 +#endif + +// Waveform Duty Value (0.1%) <0x00-0x03E8> +// The unit of this value is 1/1000. +// tc_arch_wave_duty_val +#ifndef CONF_TC0_WAVE_DUTY_VAL +#define CONF_TC0_WAVE_DUTY_VAL 0x1f4 +#endif + +/* Caculate pwm ccx register value based on WAVE_PER_VAL and Waveform Duty Value */ +#if CONF_TC0_PRESCALER < TC_CTRLA_PRESCALER_DIV64_Val +#define CONF_TC0_CC0 \ + ((uint32_t)(((double)CONF_TC0_WAVE_PER_VAL * CONF_GCLK_TC0_FREQUENCY) / 1000000 / (1 << CONF_TC0_PRESCALER) - 1)) +#define CONF_TC0_CC1 ((CONF_TC0_CC0 * CONF_TC0_WAVE_DUTY_VAL) / 1000) + +#elif CONF_TC0_PRESCALER == TC_CTRLA_PRESCALER_DIV64_Val +#define CONF_TC0_CC0 ((uint32_t)(((double)CONF_TC0_WAVE_PER_VAL * CONF_GCLK_TC0_FREQUENCY) / 64000000 - 1)) +#define CONF_TC0_CC1 ((CONF_TC0_CC0 * CONF_TC0_WAVE_DUTY_VAL) / 1000) + +#elif CONF_TC0_PRESCALER == TC_CTRLA_PRESCALER_DIV256_Val +#define CONF_TC0_CC0 ((uint32_t)(((double)CONF_TC0_WAVE_PER_VAL * CONF_GCLK_TC0_FREQUENCY) / 256000000 - 1)) +#define CONF_TC0_CC1 ((CONF_TC0_CC0 * CONF_TC0_WAVE_DUTY_VAL) / 1000) + +#elif CONF_TC0_PRESCALER == TC_CTRLA_PRESCALER_DIV1024_Val +#define CONF_TC0_CC0 ((uint32_t)(((double)CONF_TC0_WAVE_PER_VAL * CONF_GCLK_TC0_FREQUENCY) / 1024000000 - 1)) +#define CONF_TC0_CC1 ((CONF_TC0_CC0 * CONF_TC0_WAVE_DUTY_VAL) / 1000) +#endif + +// + +// Advanced settings +// Mode +// Counter in 16-bit mode +// Counter in 32-bit mode +// These bits mode +// tc_mode +#ifndef CONF_TC0_MODE +#define CONF_TC0_MODE TC_CTRLA_MODE_COUNT16_Val +#endif + +// Period Value <0x00000000-0xFFFFFFFF> +// tc_per +#ifndef CONF_TC0_PER +#define CONF_TC0_PER 0x32 +#endif +// + +// Advanced settings +// Prescaler and Counter Synchronization Selection +// Reload or reset counter on next GCLK +// Reload or reset counter on next prescaler clock +// Reload or reset counter on next GCLK and reset prescaler counter +// These bits select if on retrigger event, the Counter should be cleared or reloaded on the next GCLK_TCx clock or on the next prescaled GCLK_TCx clock. +// tc_arch_presync +#ifndef CONF_TC0_PRESCSYNC +#define CONF_TC0_PRESCSYNC TC_CTRLA_PRESCSYNC_GCLK_Val +#endif + +// Run in standby +// Indicates whether the will continue running in standby sleep mode or not +// tc_arch_runstdby +#ifndef CONF_TC0_RUNSTDBY +#define CONF_TC0_RUNSTDBY 0 +#endif + +// On-Demand +// Indicates whether the TC0's on-demand mode is on or not +// tc_arch_ondemand +#ifndef CONF_TC0_ONDEMAND +#define CONF_TC0_ONDEMAND 0 +#endif + +// Auto Lock +// <0x0=>The Lock Update bit is not affected on overflow/underflow and re-trigger event +// <0x1=>The Lock Update bit is set on each overflow/underflow or re-trigger event +// tc_arch_alock +#ifndef CONF_TC0_ALOCK +#define CONF_TC0_ALOCK 0 +#endif + +/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ +//#define CONF_TC0_CAPTEN0 0 +//#define CONF_TC0_CAPTEN1 0 +//#define CONF_TC0_COPEN0 0 +//#define CONF_TC0_COPEN1 0 + +/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ +//#define CONF_TC0_DIR 0 +//#define CONF_TC0_ONESHOT 0 +//#define CONF_TC0_LUPD 0 + +// Debug Running Mode +// Indicates whether the Debug Running Mode is enabled or not +// tc_arch_dbgrun +#ifndef CONF_TC0_DBGRUN +#define CONF_TC0_DBGRUN 0 +#endif + +// Event control +// timer_event_control +#ifndef CONF_TC0_EVENT_CONTROL_ENABLE +#define CONF_TC0_EVENT_CONTROL_ENABLE 0 +#endif + +// Output Event On Match or Capture on Channel 0 +// Enable output of event on timer tick +// tc_arch_mceo0 +#ifndef CONF_TC0_MCEO0 +#define CONF_TC0_MCEO0 0 +#endif + +// Output Event On Match or Capture on Channel 1 +// Enable output of event on timer tick +// tc_arch_mceo1 +#ifndef CONF_TC0_MCEO1 +#define CONF_TC0_MCEO1 0 +#endif + +// Output Event On Timer Tick +// Enable output of event on timer tick +// tc_arch_ovfeo +#ifndef CONF_TC0_OVFEO +#define CONF_TC0_OVFEO 0 +#endif + +// Event Input +// Enable asynchronous input events +// tc_arch_tcei +#ifndef CONF_TC0_TCEI +#define CONF_TC0_TCEI 0 +#endif + +// Inverted Event Input +// Invert the asynchronous input events +// tc_arch_tcinv +#ifndef CONF_TC0_TCINV +#define CONF_TC0_TCINV 0 +#endif + +// Event action +// <0=> Event action disabled +// <1=> Start, restart or re-trigger TC on event +// <2=> Count on event +// <3=> Start on event +// <4=> Time stamp capture +// <5=> Period captured in CC0, pulse width in CC1 +// <6=> Period captured in CC1, pulse width in CC0 +// <7=> Pulse width capture +// Event which will be performed on an event +// tc_arch_evact +#ifndef CONF_TC0_EVACT +#define CONF_TC0_EVACT 0 +#endif +// + +/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ +//#define CONF_TC0_WAVEGEN TC_CTRLA_WAVEGEN_MFRQ_Val + +/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ +//#define CONF_TC0_INVEN0 0 +//#define CONF_TC0_INVEN1 0 + +/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ +//#define CONF_TC0_PERBUF 0 + +/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ +//#define CONF_TC0_CCBUF0 0 +//#define CONF_TC0_CCBUF1 0 + +// + +// <<< end of configuration section >>> + +#endif // HPL_TC_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_trng_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_trng_config.h new file mode 100644 index 000000000..ba9014989 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_trng_config.h @@ -0,0 +1,27 @@ +/* Auto-generated config file hpl_trng_config.h */ +#ifndef HPL_TRNG_CONFIG_H +#define HPL_TRNG_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// Advanced configurations + +// Run In Standby +// Indicates whether the TRNG works in standby mode +// trng_runstdby +#ifndef CONF_TRNG_RUNSTDBY +#define CONF_TRNG_RUNSTDBY 0 +#endif + +// Data Ready Event Output Enable +// Indicates whether the TRNG generates event on Data Ready +// trng_datardyeo +#ifndef CONF_TRNG_DATARDYEO +#define CONF_TRNG_DATARDYEO 0 +#endif + +// + +// <<< end of configuration section >>> + +#endif // HPL_TRNG_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/hpl_usb_config.h b/ports/atmel-samd/asf4_conf/same51/hpl_usb_config.h new file mode 100644 index 000000000..d1bb42fe4 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/hpl_usb_config.h @@ -0,0 +1,413 @@ +/* Auto-generated config file hpl_usb_config.h */ +#ifndef HPL_USB_CONFIG_H +#define HPL_USB_CONFIG_H + +// CIRCUITPY: + +// Use 64-byte USB buffers for endpoint directions that are in use. They're set to 0 below otherwise. + +#include "genhdr/autogen_usb_descriptor.h" + +#if defined(USB_ENDPOINT_1_OUT_USED) && USB_ENDPOINT_1_OUT_USED +#define CONF_USB_EP1_CACHE 64 +#endif +#if defined(USB_ENDPOINT_1_IN_USED) && USB_ENDPOINT_1_IN_USED +#define CONF_USB_EP1_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_2_OUT_USED) && USB_ENDPOINT_2_OUT_USED +#define CONF_USB_EP2_CACHE 64 +#endif +#if defined(USB_ENDPOINT_2_IN_USED) && USB_ENDPOINT_2_IN_USED +#define CONF_USB_EP2_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_3_OUT_USED) && USB_ENDPOINT_3_OUT_USED +#define CONF_USB_EP3_CACHE 64 +#endif +#if defined(USB_ENDPOINT_3_IN_USED) && USB_ENDPOINT_3_IN_USED +#define CONF_USB_EP3_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_4_OUT_USED) && USB_ENDPOINT_4_OUT_USED +#define CONF_USB_EP4_CACHE 64 +#endif +#if defined(USB_ENDPOINT_4_IN_USED) && USB_ENDPOINT_4_IN_USED +#define CONF_USB_EP4_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_5_OUT_USED) && USB_ENDPOINT_5_OUT_USED +#define CONF_USB_EP5_CACHE 64 +#endif +#if defined(USB_ENDPOINT_5_IN_USED) && USB_ENDPOINT_5_IN_USED +#define CONF_USB_EP5_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_6_OUT_USED) && USB_ENDPOINT_6_OUT_USED +#define CONF_USB_EP6_CACHE 64 +#endif +#if defined(USB_ENDPOINT_6_IN_USED) && USB_ENDPOINT_6_IN_USED +#define CONF_USB_EP6_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_7_OUT_USED) && USB_ENDPOINT_7_OUT_USED +#define CONF_USB_EP7_CACHE 64 +#endif +#if defined(USB_ENDPOINT_7_IN_USED) && USB_ENDPOINT_7_IN_USED +#define CONF_USB_EP7_I_CACHE 64 +#endif + + +// <<< Use Configuration Wizard in Context Menu >>> + +#define CONF_USB_N_0 0 +#define CONF_USB_N_1 1 +#define CONF_USB_N_2 2 +#define CONF_USB_N_3 3 +#define CONF_USB_N_4 4 +#define CONF_USB_N_5 5 +#define CONF_USB_N_6 6 +#define CONF_USB_N_7 7 +#define CONF_USB_N_8 8 +#define CONF_USB_N_9 9 +#define CONF_USB_N_10 10 +#define CONF_USB_N_11 11 +#define CONF_USB_N_12 12 +#define CONF_USB_N_13 13 +#define CONF_USB_N_14 14 +#define CONF_USB_N_15 15 + +#define CONF_USB_D_EP_N_MAX (USB_EPT_NUM - 1) +#define CONF_USB_D_N_EP_MAX (CONF_USB_D_EP_N_MAX * 2 - 1) + +// USB Device HAL Configuration + +// Max number of endpoints supported +// Limits the number of endpoints (described by EP address) can be used in app. +// NOTE(tannewt): This not only limits the number of endpoints but also the +// addresses. In other words, even if you use endpoint 6 you need to set this to 11. +// 1 (EP0 only) +// 2 (EP0 + 1 endpoint) +// 3 (EP0 + 2 endpoints) +// 4 (EP0 + 3 endpoints) +// 5 (EP0 + 4 endpoints) +// 6 (EP0 + 5 endpoints) +// 7 (EP0 + 6 endpoints) +// 8 (EP0 + 7 endpoints) +// Max possible (by "Max Endpoint Number" config) +// usbd_num_ep_sp +#ifndef CONF_USB_D_NUM_EP_SP +#define CONF_USB_D_NUM_EP_SP CONF_USB_D_N_EP_MAX +#endif + +// + +// Max Endpoint Number supported +// Limits the max endpoint number. +// USB endpoint address is constructed by direction and endpoint number. Bit 8 of address set indicates the direction is IN. E.g., EP0x81 and EP0x01 have the same endpoint number, 1. +// Reduce the value according to specific device design, to cut-off memory usage. +// 0 (only EP0) +// 1 (EP 0x81 or 0x01) +// 2 (EP 0x82 or 0x02) +// 3 (EP 0x83 or 0x03) +// 4 (EP 0x84 or 0x04) +// 5 (EP 0x85 or 0x05) +// 6 (EP 0x86 or 0x06) +// 7 (EP 0x87 or 0x07) +// Max possible (by HW) +// The number of physical endpoints - 1 +// usbd_arch_max_ep_n +#ifndef CONF_USB_D_MAX_EP_N +#define CONF_USB_D_MAX_EP_N CONF_USB_D_EP_N_MAX +#endif + +// USB Speed Limit +// Limits the working speed of the device. +// Full speed +// Low Speed +// usbd_arch_speed +#ifndef CONF_USB_D_SPEED +#define CONF_USB_D_SPEED USB_SPEED_FS +#endif + +// Cache buffer size for EP0 +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// EP0 is default control endpoint, so cache must be used to be able to receive SETUP packet at any time. +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// usb_arch_ep0_cache +#ifndef CONF_USB_EP0_CACHE +#define CONF_USB_EP0_CACHE 64 +#endif + +// Cache configuration EP1 +// Cache buffer size for EP1 OUT +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_arch_ep1_cache +#ifndef CONF_USB_EP1_CACHE +#define CONF_USB_EP1_CACHE 0 +#endif + +// Cache buffer size for EP1 IN +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must not be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_ep1_I_CACHE +#ifndef CONF_USB_EP1_I_CACHE +#define CONF_USB_EP1_I_CACHE 0 +#endif +// + +// Cache configuration EP2 +// Cache buffer size for EP2 OUT +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_arch_ep2_cache +#ifndef CONF_USB_EP2_CACHE +#define CONF_USB_EP2_CACHE 0 +#endif + +// Cache buffer size for EP2 IN +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must not be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_ep2_I_CACHE +#ifndef CONF_USB_EP2_I_CACHE +#define CONF_USB_EP2_I_CACHE 0 +#endif +// + +// Cache configuration EP3 +// Cache buffer size for EP3 OUT +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_arch_ep3_cache +#ifndef CONF_USB_EP3_CACHE +#define CONF_USB_EP3_CACHE 0 +#endif + +// Cache buffer size for EP3 IN +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must not be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_ep3_I_CACHE +#ifndef CONF_USB_EP3_I_CACHE +#define CONF_USB_EP3_I_CACHE 0 +#endif +// + +// Cache configuration EP4 +// Cache buffer size for EP4 OUT +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_arch_ep4_cache +#ifndef CONF_USB_EP4_CACHE +#define CONF_USB_EP4_CACHE 0 +#endif + +// Cache buffer size for EP4 IN +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must not be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_ep4_I_CACHE +#ifndef CONF_USB_EP4_I_CACHE +#define CONF_USB_EP4_I_CACHE 0 +#endif +// + +// Cache configuration EP5 +// Cache buffer size for EP5 OUT +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_arch_ep5_cache +#ifndef CONF_USB_EP5_CACHE +#define CONF_USB_EP5_CACHE 0 +#endif + +// Cache buffer size for EP5 IN +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must not be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_ep5_I_CACHE +#ifndef CONF_USB_EP5_I_CACHE +#define CONF_USB_EP5_I_CACHE 0 +#endif +// + +// Cache configuration EP6 +// Cache buffer size for EP6 OUT +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_arch_ep6_cache +#ifndef CONF_USB_EP6_CACHE +#define CONF_USB_EP6_CACHE 0 +#endif + +// Cache buffer size for EP6 IN +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must not be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_ep6_I_CACHE +#ifndef CONF_USB_EP6_I_CACHE +#define CONF_USB_EP6_I_CACHE 0 +#endif +// + +// Cache configuration EP7 +// Cache buffer size for EP7 OUT +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_arch_ep7_cache +#ifndef CONF_USB_EP7_CACHE +#define CONF_USB_EP7_CACHE 0 +#endif + +// Cache buffer size for EP7 IN +// Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// This cache must not be allocated if you plan to use the endpoint as control endpoint. +// No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// usb_ep7_I_CACHE +#ifndef CONF_USB_EP7_I_CACHE +#define CONF_USB_EP7_I_CACHE 0 +#endif +// + +// <<< end of configuration section >>> + +#endif // HPL_USB_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/peripheral_clk_config.h b/ports/atmel-samd/asf4_conf/same51/peripheral_clk_config.h new file mode 100644 index 000000000..59fe8730e --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/peripheral_clk_config.h @@ -0,0 +1,1170 @@ +/* Auto-generated config file peripheral_clk_config.h */ +#ifndef PERIPHERAL_CLK_CONFIG_H +#define PERIPHERAL_CLK_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// ADC Clock Source +// adc_gclk_selection + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for ADC. +#ifndef CONF_GCLK_ADC0_SRC +#define CONF_GCLK_ADC0_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_ADC0_FREQUENCY + * \brief ADC0's Clock frequency + */ +#ifndef CONF_GCLK_ADC0_FREQUENCY +#define CONF_GCLK_ADC0_FREQUENCY 48000000 +#endif + +// DAC Clock Source + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// dac_gclk_selection +// Select the clock source for DAC. +#ifndef CONF_GCLK_DAC_SRC +#define CONF_GCLK_DAC_SRC GCLK_PCHCTRL_GEN_GCLK6_Val +#endif + +/** + * \def CONF_GCLK_DAC_FREQUENCY + * \brief DAC's Clock frequency + */ +#ifndef CONF_GCLK_DAC_FREQUENCY +#define CONF_GCLK_DAC_FREQUENCY 2000000 +#endif + +// EVSYS Channel 0 Clock Source +// evsys_clk_selection_0 + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for channel 0. +#ifndef CONF_GCLK_EVSYS_CHANNEL_0_SRC +#define CONF_GCLK_EVSYS_CHANNEL_0_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY 48000000.0 +#endif + +// EVSYS Channel 1 Clock Source +// evsys_clk_selection_1 + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for channel 1. +#ifndef CONF_GCLK_EVSYS_CHANNEL_1_SRC +#define CONF_GCLK_EVSYS_CHANNEL_1_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY 48000000.0 +#endif + +// EVSYS Channel 2 Clock Source +// evsys_clk_selection_2 + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for channel 2. +#ifndef CONF_GCLK_EVSYS_CHANNEL_2_SRC +#define CONF_GCLK_EVSYS_CHANNEL_2_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY 48000000.0 +#endif + +// EVSYS Channel 3 Clock Source +// evsys_clk_selection_3 + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for channel 3. +#ifndef CONF_GCLK_EVSYS_CHANNEL_3_SRC +#define CONF_GCLK_EVSYS_CHANNEL_3_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY 48000000.0 +#endif + +// EVSYS Channel 4 Clock Source +// evsys_clk_selection_4 + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for channel 4. +#ifndef CONF_GCLK_EVSYS_CHANNEL_4_SRC +#define CONF_GCLK_EVSYS_CHANNEL_4_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY 48000000.0 +#endif + +// EVSYS Channel 5 Clock Source +// evsys_clk_selection_5 + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for channel 5. +#ifndef CONF_GCLK_EVSYS_CHANNEL_5_SRC +#define CONF_GCLK_EVSYS_CHANNEL_5_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY 48000000.0 +#endif + +// EVSYS Channel 6 Clock Source +// evsys_clk_selection_6 + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for channel 6. +#ifndef CONF_GCLK_EVSYS_CHANNEL_6_SRC +#define CONF_GCLK_EVSYS_CHANNEL_6_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY 48000000.0 +#endif + +// EVSYS Channel 7 Clock Source +// evsys_clk_selection_7 + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for channel 7. +#ifndef CONF_GCLK_EVSYS_CHANNEL_7_SRC +#define CONF_GCLK_EVSYS_CHANNEL_7_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY 48000000.0 +#endif + +// EVSYS Channel 8 Clock Source +// evsys_clk_selection_8 + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for channel 8. +#ifndef CONF_GCLK_EVSYS_CHANNEL_8_SRC +#define CONF_GCLK_EVSYS_CHANNEL_8_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY 48000000.0 +#endif + +// EVSYS Channel 9 Clock Source +// evsys_clk_selection_9 + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for channel 9. +#ifndef CONF_GCLK_EVSYS_CHANNEL_9_SRC +#define CONF_GCLK_EVSYS_CHANNEL_9_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY 48000000.0 +#endif + +// EVSYS Channel 10 Clock Source +// evsys_clk_selection_10 + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for channel 10. +#ifndef CONF_GCLK_EVSYS_CHANNEL_10_SRC +#define CONF_GCLK_EVSYS_CHANNEL_10_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY 48000000.0 +#endif + +// EVSYS Channel 11 Clock Source +// evsys_clk_selection_11 + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for channel 11. +#ifndef CONF_GCLK_EVSYS_CHANNEL_11_SRC +#define CONF_GCLK_EVSYS_CHANNEL_11_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY 48000000.0 +#endif + +/** + * \def CONF_CPU_FREQUENCY + * \brief CPU's Clock frequency + */ +#ifndef CONF_CPU_FREQUENCY +#define CONF_CPU_FREQUENCY 120000000 +#endif + +// RTC Clock Source +// rtc_clk_selection +// RTC source +// Select the clock source for RTC. +#ifndef CONF_GCLK_RTC_SRC +#define CONF_GCLK_RTC_SRC RTC_CLOCK_SOURCE +#endif + +/** + * \def CONF_GCLK_RTC_FREQUENCY + * \brief RTC's Clock frequency + */ +#ifndef CONF_GCLK_RTC_FREQUENCY +#define CONF_GCLK_RTC_FREQUENCY 1024 +#endif + +// Core Clock Source +// core_gclk_selection + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for CORE. +#ifndef CONF_GCLK_SERCOM0_CORE_SRC +#define CONF_GCLK_SERCOM0_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +// Slow Clock Source +// slow_gclk_selection + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the slow clock source. +#ifndef CONF_GCLK_SERCOM0_SLOW_SRC +#define CONF_GCLK_SERCOM0_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val +#endif + +/** + * \def CONF_GCLK_SERCOM0_CORE_FREQUENCY + * \brief SERCOM0's Core Clock frequency + */ +#ifndef CONF_GCLK_SERCOM0_CORE_FREQUENCY +#define CONF_GCLK_SERCOM0_CORE_FREQUENCY 48000000 +#endif + +/** + * \def CONF_GCLK_SERCOM0_SLOW_FREQUENCY + * \brief SERCOM0's Slow Clock frequency + */ +#ifndef CONF_GCLK_SERCOM0_SLOW_FREQUENCY +#define CONF_GCLK_SERCOM0_SLOW_FREQUENCY 32768 +#endif + +// Core Clock Source +// core_gclk_selection + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for CORE. +#ifndef CONF_GCLK_SERCOM1_CORE_SRC +#define CONF_GCLK_SERCOM1_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +// Slow Clock Source +// slow_gclk_selection + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the slow clock source. +#ifndef CONF_GCLK_SERCOM1_SLOW_SRC +#define CONF_GCLK_SERCOM1_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val +#endif + +/** + * \def CONF_GCLK_SERCOM1_CORE_FREQUENCY + * \brief SERCOM1's Core Clock frequency + */ +#ifndef CONF_GCLK_SERCOM1_CORE_FREQUENCY +#define CONF_GCLK_SERCOM1_CORE_FREQUENCY 48000000 +#endif + +/** + * \def CONF_GCLK_SERCOM1_SLOW_FREQUENCY + * \brief SERCOM1's Slow Clock frequency + */ +#ifndef CONF_GCLK_SERCOM1_SLOW_FREQUENCY +#define CONF_GCLK_SERCOM1_SLOW_FREQUENCY 32768 +#endif + +// Core Clock Source +// core_gclk_selection + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for CORE. +#ifndef CONF_GCLK_SERCOM2_CORE_SRC +#define CONF_GCLK_SERCOM2_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +// Slow Clock Source +// slow_gclk_selection + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the slow clock source. +#ifndef CONF_GCLK_SERCOM2_SLOW_SRC +#define CONF_GCLK_SERCOM2_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val +#endif + +/** + * \def CONF_GCLK_SERCOM2_CORE_FREQUENCY + * \brief SERCOM2's Core Clock frequency + */ +#ifndef CONF_GCLK_SERCOM2_CORE_FREQUENCY +#define CONF_GCLK_SERCOM2_CORE_FREQUENCY 48000000 +#endif + +/** + * \def CONF_GCLK_SERCOM2_SLOW_FREQUENCY + * \brief SERCOM2's Slow Clock frequency + */ +#ifndef CONF_GCLK_SERCOM2_SLOW_FREQUENCY +#define CONF_GCLK_SERCOM2_SLOW_FREQUENCY 32768 +#endif + +// Core Clock Source +// core_gclk_selection + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for CORE. +#ifndef CONF_GCLK_SERCOM3_CORE_SRC +#define CONF_GCLK_SERCOM3_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +// Slow Clock Source +// slow_gclk_selection + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the slow clock source. +#ifndef CONF_GCLK_SERCOM3_SLOW_SRC +#define CONF_GCLK_SERCOM3_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val +#endif + +/** + * \def CONF_GCLK_SERCOM3_CORE_FREQUENCY + * \brief SERCOM3's Core Clock frequency + */ +#ifndef CONF_GCLK_SERCOM3_CORE_FREQUENCY +#define CONF_GCLK_SERCOM3_CORE_FREQUENCY 48000000 +#endif + +/** + * \def CONF_GCLK_SERCOM3_SLOW_FREQUENCY + * \brief SERCOM3's Slow Clock frequency + */ +#ifndef CONF_GCLK_SERCOM3_SLOW_FREQUENCY +#define CONF_GCLK_SERCOM3_SLOW_FREQUENCY 32768 +#endif + +// TC Clock Source +// tc_gclk_selection + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for TC. +#ifndef CONF_GCLK_TC0_SRC +#define CONF_GCLK_TC0_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_TC0_FREQUENCY + * \brief TC0's Clock frequency + */ +#ifndef CONF_GCLK_TC0_FREQUENCY +#define CONF_GCLK_TC0_FREQUENCY 48000000 +#endif + +// USB Clock Source +// usb_gclk_selection + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for USB. +#ifndef CONF_GCLK_USB_SRC +#define CONF_GCLK_USB_SRC GCLK_PCHCTRL_GEN_GCLK1_Val + +#endif + +/** + * \def CONF_GCLK_USB_FREQUENCY + * \brief USB's Clock frequency + */ +#ifndef CONF_GCLK_USB_FREQUENCY +#define CONF_GCLK_USB_FREQUENCY 48000000 +#endif + +// SDHC Clock Settings +// SDHC Clock source + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for SDHC. +// sdhc_gclk_selection +#ifndef CONF_GCLK_SDHC0_SRC +#define CONF_GCLK_SDHC0_SRC GCLK_GENCTRL_SRC_DFLL_Val +#endif + +// SDHC clock slow source + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for SDHC. +// sdhc_slow_gclk_selection +#ifndef CONF_GCLK_SDHC0_SLOW_SRC +#define CONF_GCLK_SDHC0_SLOW_SRC GCLK_GENCTRL_SRC_DFLL_Val +#endif +// + +/** + * \def SDHC FREQUENCY + * \brief SDHC's Clock frequency + */ +#ifndef CONF_SDHC0_FREQUENCY +#define CONF_SDHC0_FREQUENCY 12000000 +#endif + +/** + * \def SDHC FREQUENCY + * \brief SDHC's Clock slow frequency + */ +#ifndef CONF_SDHC0_SLOW_FREQUENCY +#define CONF_SDHC0_SLOW_FREQUENCY 12000000 +#endif + +// SDHC Clock Settings +// SDHC Clock source + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for SDHC. +// sdhc_gclk_selection +#ifndef CONF_GCLK_SDHC1_SRC +#define CONF_GCLK_SDHC1_SRC GCLK_GENCTRL_SRC_DFLL_Val +#endif + +// SDHC clock slow source + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for SDHC. +// sdhc_slow_gclk_selection +#ifndef CONF_GCLK_SDHC1_SLOW_SRC +#define CONF_GCLK_SDHC1_SLOW_SRC GCLK_GENCTRL_SRC_DFLL_Val +#endif +// + +/** + * \def SDHC FREQUENCY + * \brief SDHC's Clock frequency + */ +#ifndef CONF_SDHC1_FREQUENCY +#define CONF_SDHC1_FREQUENCY 12000000 +#endif + +/** + * \def SDHC FREQUENCY + * \brief SDHC's Clock slow frequency + */ +#ifndef CONF_SDHC1_SLOW_FREQUENCY +#define CONF_SDHC1_SLOW_FREQUENCY 12000000 +#endif + +// <<< end of configuration section >>> + +#endif // PERIPHERAL_CLK_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same51/usbd_config.h b/ports/atmel-samd/asf4_conf/same51/usbd_config.h new file mode 100644 index 000000000..be1fa3c9e --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same51/usbd_config.h @@ -0,0 +1,850 @@ +/* Auto-generated config file usbd_config.h */ +#ifndef USBD_CONFIG_H +#define USBD_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// ---- USB Device Stack Core Options ---- + +// High Speed Support +// Enable high speed specific descriptors support, e.g., DeviceQualifierDescriptor and OtherSpeedConfiguration Descriptor. +// High speed support require descriptors description array on start, for LS/FS and HS support in first and second place. +// usbd_hs_sp +#ifndef CONF_USBD_HS_SP +#define CONF_USBD_HS_SP 0 +#endif + +// ---- USB Device Stack Composite Options ---- + +// Enable String Descriptors +// usb_composite_str_en +#ifndef CONF_USB_COMPOSITE_STR_EN +#define CONF_USB_COMPOSITE_STR_EN 0 +#endif +// Language IDs +// Language IDs in c format, split by comma (E.g., 0x0409 ...) +// usb_composite_langid +#ifndef CONF_USB_COMPOSITE_LANGID +#define CONF_USB_COMPOSITE_LANGID "0x0409" +#endif + +#ifndef CONF_USB_COMPOSITE_LANGID_DESC +#define CONF_USB_COMPOSITE_LANGID_DESC +#endif +// + +// Composite Device Descriptor + +// bcdUSB +// <0x0200=> USB 2.0 version +// <0x0210=> USB 2.1 version +// usb_composite_bcdusb +#ifndef CONF_USB_COMPOSITE_BCDUSB +#define CONF_USB_COMPOSITE_BCDUSB 0x200 +#endif + +// bMaxPackeSize0 +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes +// usb_composite_bmaxpksz0 +#ifndef CONF_USB_COMPOSITE_BMAXPKSZ0 +#define CONF_USB_COMPOSITE_BMAXPKSZ0 0x40 +#endif + +// idVender <0x0000-0xFFFF> +// usb_composite_idvender +#ifndef CONF_USB_COMPOSITE_IDVENDER +#define CONF_USB_COMPOSITE_IDVENDER 0x3eb +#endif + +// idProduct <0x0000-0xFFFF> +// usb_composite_idproduct +#ifndef CONF_USB_COMPOSITE_IDPRODUCT +#define CONF_USB_COMPOSITE_IDPRODUCT 0x2421 +#endif + +// bcdDevice <0x0000-0xFFFF> +// usb_composite_bcddevice +#ifndef CONF_USB_COMPOSITE_BCDDEVICE +#define CONF_USB_COMPOSITE_BCDDEVICE 0x100 +#endif + +// Enable string descriptor of iManufact +// usb_composite_imanufact_en +#ifndef CONF_USB_COMPOSITE_IMANUFACT_EN +#define CONF_USB_COMPOSITE_IMANUFACT_EN 0 +#endif + +#ifndef CONF_USB_COMPOSITE_IMANUFACT +#define CONF_USB_COMPOSITE_IMANUFACT (CONF_USB_COMPOSITE_IMANUFACT_EN * (CONF_USB_COMPOSITE_IMANUFACT_EN)) +#endif + +// Unicode string of iManufact +// usb_composite_imanufact_str +#ifndef CONF_USB_COMPOSITE_IMANUFACT_STR +#define CONF_USB_COMPOSITE_IMANUFACT_STR "Atmel" +#endif + +#ifndef CONF_USB_COMPOSITE_IMANUFACT_STR_DESC +#define CONF_USB_COMPOSITE_IMANUFACT_STR_DESC +#endif + +// + +// Enable string descriptor of iProduct +// usb_composite_iproduct_en +#ifndef CONF_USB_COMPOSITE_IPRODUCT_EN +#define CONF_USB_COMPOSITE_IPRODUCT_EN 0 +#endif + +#ifndef CONF_USB_COMPOSITE_IPRODUCT +#define CONF_USB_COMPOSITE_IPRODUCT \ + (CONF_USB_COMPOSITE_IPRODUCT_EN * (CONF_USB_COMPOSITE_IMANUFACT_EN + CONF_USB_COMPOSITE_IPRODUCT_EN)) +#endif + +// Unicode string of iProduct +// usb_composite_iproduct_str +#ifndef CONF_USB_COMPOSITE_IPRODUCT_STR +#define CONF_USB_COMPOSITE_IPRODUCT_STR "Composite Demo" +#endif + +#ifndef CONF_USB_COMPOSITE_IPRODUCT_STR_DESC +#define CONF_USB_COMPOSITE_IPRODUCT_STR_DESC +#endif + +// + +// Enable string descriptor of iSerialNum +// usb_composite_iserialnum_en +#ifndef CONF_USB_COMPOSITE_ISERIALNUM_EN +#define CONF_USB_COMPOSITE_ISERIALNUM_EN 0 +#endif + +#ifndef CONF_USB_COMPOSITE_ISERIALNUM +#define CONF_USB_COMPOSITE_ISERIALNUM \ + (CONF_USB_COMPOSITE_ISERIALNUM_EN \ + * (CONF_USB_COMPOSITE_IMANUFACT_EN + CONF_USB_COMPOSITE_IPRODUCT_EN + CONF_USB_COMPOSITE_ISERIALNUM_EN)) +#endif + +// Unicode string of iSerialNum +// usb_composite_iserialnum_str +#ifndef CONF_USB_COMPOSITE_ISERIALNUM_STR +#define CONF_USB_COMPOSITE_ISERIALNUM_STR "123456789ABCDEF" +#endif + +#ifndef CONF_USB_COMPOSITE_ISERIALNUM_STR_DESC +#define CONF_USB_COMPOSITE_ISERIALNUM_STR_DESC +#endif + +// + +// bNumConfigurations <0x01-0xFF> +// usb_composite_bnumconfig +#ifndef CONF_USB_COMPOSITE_BNUMCONFIG +#define CONF_USB_COMPOSITE_BNUMCONFIG 0x1 +#endif + +// + +// Composite Configuration Descriptor +// bConfigurationValue <0x01-0xFF> +// usb_composite_bconfigval +#ifndef CONF_USB_COMPOSITE_BCONFIGVAL +#define CONF_USB_COMPOSITE_BCONFIGVAL 0x1 +#endif +// Enable string descriptor of iConfig +// usb_composite_iconfig_en +#ifndef CONF_USB_COMPOSITE_ICONFIG_EN +#define CONF_USB_COMPOSITE_ICONFIG_EN 0 +#endif + +#ifndef CONF_USB_COMPOSITE_ICONFIG +#define CONF_USB_COMPOSITE_ICONFIG \ + (CONF_USB_COMPOSITE_ICONFIG_EN \ + * (CONF_USB_COMPOSITE_IMANUFACT_EN + CONF_USB_COMPOSITE_IPRODUCT_EN + CONF_USB_COMPOSITE_ISERIALNUM_EN \ + + CONF_USB_COMPOSITE_ICONFIG_EN)) +#endif + +// Unicode string of iConfig +// usb_composite_iconfig_str +#ifndef CONF_USB_COMPOSITE_ICONFIG_STR +#define CONF_USB_COMPOSITE_ICONFIG_STR "" +#endif + +#ifndef CONF_USB_COMPOSITE_ICONFIG_STR_DESC +#define CONF_USB_COMPOSITE_ICONFIG_STR_DESC +#endif + +// + +// bmAttributes +// <0x80=> Bus power supply, not support for remote wakeup +// <0xA0=> Bus power supply, support for remote wakeup +// <0xC0=> Self powered, not support for remote wakeup +// <0xE0=> Self powered, support for remote wakeup +// usb_composite_bmattri +#ifndef CONF_USB_COMPOSITE_BMATTRI +#define CONF_USB_COMPOSITE_BMATTRI 0x80 +#endif + +// bMaxPower <0x00-0xFF> +// usb_composite_bmaxpower +#ifndef CONF_USB_COMPOSITE_BMAXPOWER +#define CONF_USB_COMPOSITE_BMAXPOWER 0x32 +#endif +// + +// CDC ACM Support +// usb_composite_cdc_acm_support +#ifndef CONF_USB_COMPOSITE_CDC_ACM_EN +#define CONF_USB_COMPOSITE_CDC_ACM_EN 0 +#endif + +// CDC ACM Comm Interrupt IN Endpoint Address +// <0x81=> EndpointAddress = 0x81 +// <0x82=> EndpointAddress = 0x82 +// <0x83=> EndpointAddress = 0x83 +// <0x84=> EndpointAddress = 0x84 +// <0x85=> EndpointAddress = 0x85 +// <0x86=> EndpointAddress = 0x86 +// <0x87=> EndpointAddress = 0x87 +// <0x88=> EndpointAddress = 0x88 +// <0x89=> EndpointAddress = 0x89 + +// usb_composite_cdc_acm_epaddr +#ifndef CONF_USB_COMPOSITE_CDC_ACM_COMM_INT_EPADDR +#define CONF_USB_COMPOSITE_CDC_ACM_COMM_INT_EPADDR 0x82 +#endif + +// CDC ACM Comm Interrupt IN Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// usb_composite_cdc_acm_comm_int_maxpksz +#ifndef CONF_USB_COMPOSITE_CDC_ACM_COMM_INT_MAXPKSZ +#define CONF_USB_COMPOSITE_CDC_ACM_COMM_INT_MAXPKSZ 0x40 +#endif + +// CDC ACM Data BULK IN Endpoint Address +// <0x81=> EndpointAddress = 0x81 +// <0x82=> EndpointAddress = 0x82 +// <0x83=> EndpointAddress = 0x83 +// <0x84=> EndpointAddress = 0x84 +// <0x85=> EndpointAddress = 0x85 +// <0x86=> EndpointAddress = 0x86 +// <0x87=> EndpointAddress = 0x87 +// <0x88=> EndpointAddress = 0x88 +// <0x89=> EndpointAddress = 0x89 + +// usb_composite_cdc_acm_data_bulkin_epaddr +#ifndef CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKIN_EPADDR +#define CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKIN_EPADDR 0x81 +#endif + +// CDC ACM Data BULK IN Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// usb_composite_cdc_acm_data_builin_maxpksz +#ifndef CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKIN_MAXPKSZ +#define CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKIN_MAXPKSZ 0x40 +#endif + +// CDC ACM Data BULK IN Endpoint wMaxPacketSize for High Speed +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes +// <0x0080=> 128 bytes +// <0x0100=> 256 bytes +// <0x0200=> 512 bytes + +// usb_composite_cdc_acm_data_builin_maxpksz_hs +#ifndef CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKIN_MAXPKSZ_HS +#define CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKIN_MAXPKSZ_HS 0x200 +#endif + +// CDC ACM Data BULK OUT Endpoint Address +// <0x01=> EndpointAddress = 0x01 +// <0x02=> EndpointAddress = 0x02 +// <0x03=> EndpointAddress = 0x03 +// <0x04=> EndpointAddress = 0x04 +// <0x05=> EndpointAddress = 0x05 +// <0x06=> EndpointAddress = 0x06 +// <0x07=> EndpointAddress = 0x07 +// <0x08=> EndpointAddress = 0x08 +// <0x09=> EndpointAddress = 0x09 + +// usb_composite_cdc_acm_data_bulkout_epaddr +#ifndef CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKOUT_EPADDR +#define CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKOUT_EPADDR 0x1 +#endif + +// CDC ACM Data BULK OUT Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// usb_composite_cdc_acm_data_buckout_maxpksz +#ifndef CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKOUT_MAXPKSZ +#define CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKOUT_MAXPKSZ 0x40 +#endif + +// CDC ACM Data BULK OUT Endpoint wMaxPacketSize for High Speed +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes +// <0x0080=> 128 bytes +// <0x0100=> 256 bytes +// <0x0200=> 512 bytes + +// usb_composite_cdc_acm_data_buckout_maxpksz_hs +#ifndef CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKOUT_MAXPKSZ_HS +#define CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKOUT_MAXPKSZ_HS 0x200 +#endif + +// CDC ACM Echo Demo generation +// conf_usb_composite_cdc_echo_demo +// Invoke cdcdf_acm_demo_init(buf[wMaxPacketSize]) to enable the echo demo. +// Buf is packet buffer for data receive and echo back. +// The buffer is 4 byte aligned to support DMA. +#ifndef CONF_USB_COMPOSITE_CDC_ECHO_DEMO +#define CONF_USB_COMPOSITE_CDC_ECHO_DEMO 0 +#endif + +// + +// HID Mouse Support +// usb_composite_hid_mouse_support +#ifndef CONF_USB_COMPOSITE_HID_MOUSE_EN +#define CONF_USB_COMPOSITE_HID_MOUSE_EN 0 +#endif + +// HID Mouse INTERRUPT IN Endpoint Address +// <0x81=> EndpointAddress = 0x81 +// <0x82=> EndpointAddress = 0x82 +// <0x83=> EndpointAddress = 0x83 +// <0x84=> EndpointAddress = 0x84 +// <0x85=> EndpointAddress = 0x85 +// <0x86=> EndpointAddress = 0x86 +// <0x87=> EndpointAddress = 0x87 +// <0x88=> EndpointAddress = 0x88 +// <0x89=> EndpointAddress = 0x89 + +// usb_composite_hid_mouse_intin_epaddr +// Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_MOUSE_INTIN_EPADDR +#define CONF_USB_COMPOSITE_HID_MOUSE_INTIN_EPADDR 0x83 +#endif + +// HID Mouse INTERRUPT IN Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// usb_composite_hid_mouse_intin_maxpksz +// Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_MOUSE_INTIN_MAXPKSZ +#define CONF_USB_COMPOSITE_HID_MOUSE_INTIN_MAXPKSZ 0x8 +#endif + +// HID Mouse Move Demo generation +// conf_usb_composite_hid_mouse_demo +// Invoke hiddf_demo_init(button1, button2, button3) to enabled the move demo. +// Button1 and button3 are the pins used for mouse moving left and right. +#ifndef CONF_USB_COMPOSITE_HID_MOUSE_DEMO +#define CONF_USB_COMPOSITE_HID_MOUSE_DEMO 0 +#endif + +// + +// HID Keyboard Support +// usb_composite_hid_keyboard_support +#ifndef CONF_USB_COMPOSITE_HID_KEYBOARD_EN +#define CONF_USB_COMPOSITE_HID_KEYBOARD_EN 0 +#endif + +// HID Keyboard INTERRUPT IN Endpoint Address +// <0x81=> EndpointAddress = 0x81 +// <0x82=> EndpointAddress = 0x82 +// <0x83=> EndpointAddress = 0x83 +// <0x84=> EndpointAddress = 0x84 +// <0x85=> EndpointAddress = 0x85 +// <0x86=> EndpointAddress = 0x86 +// <0x87=> EndpointAddress = 0x87 +// <0x88=> EndpointAddress = 0x88 +// <0x89=> EndpointAddress = 0x89 + +// usb_composite_hid_keyboard_intin_epaddr +// Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_KEYBOARD_INTIN_EPADDR +#define CONF_USB_COMPOSITE_HID_KEYBOARD_INTIN_EPADDR 0x84 +#endif + +// HID Keyboard INTERRUPT IN Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// usb_composite_hid_keyboard_intin_maxpksz +// Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_KEYBOARD_INTIN_MAXPKSZ +#define CONF_USB_COMPOSITE_HID_KEYBOARD_INTIN_MAXPKSZ 0x8 +#endif + +// HID Keyboard INTERRUPT OUT Endpoint Address +// <0x01=> EndpointAddress = 0x01 +// <0x02=> EndpointAddress = 0x02 +// <0x03=> EndpointAddress = 0x03 +// <0x04=> EndpointAddress = 0x04 +// <0x05=> EndpointAddress = 0x05 +// <0x06=> EndpointAddress = 0x06 +// <0x07=> EndpointAddress = 0x07 +// <0x08=> EndpointAddress = 0x08 +// <0x09=> EndpointAddress = 0x09 + +// usb_composite_hid_keyboard_intout_epaddr +// Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_KEYBOARD_INTOUT_EPADDR +#define CONF_USB_COMPOSITE_HID_KEYBOARD_INTOUT_EPADDR 0x2 +#endif + +// HID Keyboard INTERRUPT OUT Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// usb_composite_hid_keyboard_intout_maxpksz +// Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_KEYBOARD_INTOUT_MAXPKSZ +#define CONF_USB_COMPOSITE_HID_KEYBOARD_INTOUT_MAXPKSZ 0x8 +#endif + +// HID Keyboard Caps Lock Demo generation +// conf_usb_composite_hid_keyboard_demo +// Invoke hiddf_demo_init(button1, button2, button3) to enabled the move demo. +// Buffon2 is the pin used for keyboard CAPS LOCK simulation. +#ifndef CONF_USB_COMPOSITE_HID_KEYBOARD_DEMO +#define CONF_USB_COMPOSITE_HID_KEYBOARD_DEMO 0 +#endif + +// + +// HID Generic Support +// usb_composite_hid_generic_support +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_EN +#define CONF_USB_COMPOSITE_HID_GENERIC_EN 0 +#endif + +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_REPORT_LEN +#define CONF_USB_COMPOSITE_HID_GENERIC_REPORT_LEN 53 +#endif + +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_REPORT +#define CONF_USB_COMPOSITE_HID_GENERIC_REPORT \ + 0x06, 0xFF, 0xFF, 0x09, 0x01, 0xA1, 0x01, 0x09, 0x02, 0x09, 0x03, 0x15, 0x00, 0x26, 0xFF, 0x00, 0x75, 0x08, 0x95, \ + 0x40, 0x81, 0x02, 0x09, 0x04, 0x09, 0x05, 0x15, 0x00, 0x26, 0xFF, 0x00, 0x75, 0x08, 0x95, 0x40, 0x91, 0x02, \ + 0x09, 0x06, 0x09, 0x07, 0x15, 0x00, 0x26, 0xFF, 0x00, 0x75, 0x08, 0x95, 0x04, 0xB1, 0x02, 0xC0 +#endif + +// HID Generic INTERRUPT IN Endpoint Address +// <0x81=> EndpointAddress = 0x81 +// <0x82=> EndpointAddress = 0x82 +// <0x83=> EndpointAddress = 0x83 +// <0x84=> EndpointAddress = 0x84 +// <0x85=> EndpointAddress = 0x85 +// <0x86=> EndpointAddress = 0x86 +// <0x87=> EndpointAddress = 0x87 +// <0x88=> EndpointAddress = 0x88 +// <0x89=> EndpointAddress = 0x89 + +// usb_composite_hid_generic_intin_epaddr +// Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_INTIN_EPADDR +#define CONF_USB_COMPOSITE_HID_GENERIC_INTIN_EPADDR 0x85 +#endif + +// HID Generic INTERRUPT IN Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// usb_composite_hid_generic_intin_maxpksz +// Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_INTIN_MAXPKSZ +#define CONF_USB_COMPOSITE_HID_GENERIC_INTIN_MAXPKSZ 0x40 +#endif + +// HID Generic INTERRUPT OUT Endpoint Address +// <0x01=> EndpointAddress = 0x01 +// <0x02=> EndpointAddress = 0x02 +// <0x03=> EndpointAddress = 0x03 +// <0x04=> EndpointAddress = 0x04 +// <0x05=> EndpointAddress = 0x05 +// <0x06=> EndpointAddress = 0x06 +// <0x07=> EndpointAddress = 0x07 +// <0x08=> EndpointAddress = 0x08 +// <0x09=> EndpointAddress = 0x09 + +// usb_composite_hid_generic_intout_epaddr +// Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_INTOUT_EPADDR +#define CONF_USB_COMPOSITE_HID_GENERIC_INTOUT_EPADDR 0x3 +#endif + +// HID Generic INTERRUPT OUT Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes +// usb_composite_hid_generic_intout_maxpksz +// Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_INTOUT_MAXPKSZ +#define CONF_USB_COMPOSITE_HID_GENERIC_INTOUT_MAXPKSZ 0x40 +#endif + +// + +// MSC Support +// usb_composite_msc_support +#ifndef CONF_USB_COMPOSITE_MSC_EN +#define CONF_USB_COMPOSITE_MSC_EN 0 +#endif + +// MSC BULK Endpoints wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// usb_composite_msc_bulk_maxpksz +#ifndef CONF_USB_COMPOSITE_MSC_BULK_MAXPKSZ +#define CONF_USB_COMPOSITE_MSC_BULK_MAXPKSZ 0x40 +#endif + +// MSC BULK Endpoints wMaxPacketSize for High Speed +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes +// <0x0080=> 128 bytes +// <0x0100=> 256 bytes +// <0x0200=> 512 bytes + +// usb_composite_msc_bulk_maxpksz_hs +#ifndef CONF_USB_COMPOSITE_MSC_BULK_MAXPKSZ_HS +#define CONF_USB_COMPOSITE_MSC_BULK_MAXPKSZ_HS 0x200 +#endif + +// MSC BULK IN Endpoint Address +// <0x81=> EndpointAddress = 0x81 +// <0x82=> EndpointAddress = 0x82 +// <0x83=> EndpointAddress = 0x83 +// <0x84=> EndpointAddress = 0x84 +// <0x85=> EndpointAddress = 0x85 +// <0x86=> EndpointAddress = 0x86 +// <0x87=> EndpointAddress = 0x87 +// <0x88=> EndpointAddress = 0x88 +// <0x89=> EndpointAddress = 0x89 + +// usb_composite_msc_bulkin_epaddr +#ifndef CONF_USB_COMPOSITE_MSC_BULKIN_EPADDR +#define CONF_USB_COMPOSITE_MSC_BULKIN_EPADDR 0x86 +#endif + +// MSC BULK OUT Endpoint Address +// <0x01=> EndpointAddress = 0x01 +// <0x02=> EndpointAddress = 0x02 +// <0x03=> EndpointAddress = 0x03 +// <0x04=> EndpointAddress = 0x04 +// <0x05=> EndpointAddress = 0x05 +// <0x06=> EndpointAddress = 0x06 +// <0x07=> EndpointAddress = 0x07 +// <0x08=> EndpointAddress = 0x08 +// <0x09=> EndpointAddress = 0x09 + +// usb_composite_msc_bulkout_epaddr +#ifndef CONF_USB_COMPOSITE_MSC_BULKOUT_EPADDR +#define CONF_USB_COMPOSITE_MSC_BULKOUT_EPADDR 0x4 +#endif + +// Enable Demo code for Disk LUN handling +// usb_composite_msc_demo_en +#ifndef CONF_USB_COMPOSITE_MSC_LUN_DEMO +#define CONF_USB_COMPOSITE_MSC_LUN_DEMO 1 +#endif + +// Disk access cache/buffer of sectors if non-RAM disk (e.g., SD/MMC) enabled <1-64> +// conf_usb_msc_lun_buf_sectors +#ifndef CONF_USB_MSC_LUN_BUF_SECTORS +#define CONF_USB_MSC_LUN_BUF_SECTORS 4 +#endif + +// Enable Demo for RAM Disk +// conf_usb_msc_lun0_enable +#ifndef CONF_USB_MSC_LUN0_ENABLE +#define CONF_USB_MSC_LUN0_ENABLE 1 +#endif + +#ifndef CONF_USB_MSC_LUN0_TYPE +#define CONF_USB_MSC_LUN0_TYPE 0x00 +#endif + +// The disk is removable +// conf_usb_msc_lun0_rmb +#ifndef CONF_USB_MSC_LUN0_RMB +#define CONF_USB_MSC_LUN0_RMB 0x1 +#endif + +#ifndef CONF_USB_MSC_LUN0_ISO +#define CONF_USB_MSC_LUN0_ISO 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN0_ECMA +#define CONF_USB_MSC_LUN0_ECMA 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN0_ANSI +#define CONF_USB_MSC_LUN0_ANSI 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN0_REPO +#define CONF_USB_MSC_LUN0_REPO 0x01 +#endif + +#ifndef CONF_USB_MSC_LUN0_FACTORY +#define CONF_USB_MSC_LUN0_FACTORY 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN0_PRODUCT +#define CONF_USB_MSC_LUN0_PRODUCT 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN0_PRODUCT_VERSION +#define CONF_USB_MSC_LUN0_PRODUCT_VERSION 0x00, 0x00, 0x00, 0x00 +#endif + +// Disk Size (in KB) <0x1-0xFFFFFFFF> +// Windows will not show disk less than 20K, so 22K is used to reserve more RAM for APP +// conf_usb_msc_lun0_capacity + +#ifndef CONF_USB_MSC_LUN0_CAPACITY +#define CONF_USB_MSC_LUN0_CAPACITY 22 +#endif + +#ifndef CONF_USB_MSC_LUN0_BLOCK_SIZE +#define CONF_USB_MSC_LUN0_BLOCK_SIZE 512 +#endif + +#ifndef CONF_USB_MSC_LUN0_LAST_BLOCK_ADDR +#define CONF_USB_MSC_LUN0_LAST_BLOCK_ADDR \ + ((uint32_t)CONF_USB_MSC_LUN0_CAPACITY * 1024 / CONF_USB_MSC_LUN0_BLOCK_SIZE - 1) +#endif + +// + +// Enable Demo for SD/MMC Disk +// SD/MMC stack must be added before enable SD/MMC demo +// SD/MMC insert/eject not supported by this simple demo +// conf_usb_msc_lun1_enable +#ifndef CONF_USB_MSC_LUN1_ENABLE +#define CONF_USB_MSC_LUN1_ENABLE 0 +#endif + +#ifndef CONF_USB_MSC_LUN1_TYPE +#define CONF_USB_MSC_LUN1_TYPE 0x00 +#endif + +// The disk is removable +// SD/MMC stack must be added before enable SD/MMC demo +// SD/MMC insert/eject not supported by this simple demo +// conf_usb_msc_lun1_rmb +#ifndef CONF_USB_MSC_LUN1_RMB +#define CONF_USB_MSC_LUN1_RMB 0x1 +#endif + +#ifndef CONF_USB_MSC_LUN1_ISO +#define CONF_USB_MSC_LUN1_ISO 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN1_ECMA +#define CONF_USB_MSC_LUN1_ECMA 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN1_ANSI +#define CONF_USB_MSC_LUN1_ANSI 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN1_REPO +#define CONF_USB_MSC_LUN1_REPO 0x01 +#endif + +#ifndef CONF_USB_MSC_LUN1_FACTORY +#define CONF_USB_MSC_LUN1_FACTORY 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN1_PRODUCT +#define CONF_USB_MSC_LUN1_PRODUCT 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN1_PRODUCT_VERSION +#define CONF_USB_MSC_LUN1_PRODUCT_VERSION 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN1_CAPACITY +#define CONF_USB_MSC_LUN1_CAPACITY 22 +#endif + +#ifndef CONF_USB_MSC_LUN1_BLOCK_SIZE +#define CONF_USB_MSC_LUN1_BLOCK_SIZE 512 +#endif + +#ifndef CONF_USB_MSC_LUN1_LAST_BLOCK_ADDR +#define CONF_USB_MSC_LUN1_LAST_BLOCK_ADDR \ + ((uint32_t)CONF_USB_MSC_LUN1_CAPACITY * 1024 / CONF_USB_MSC_LUN1_BLOCK_SIZE - 1) +#endif + +// + +// Enable Demo for LUN 2 +// conf_usb_msc_lun2_enable +#ifndef CONF_USB_MSC_LUN2_ENABLE +#define CONF_USB_MSC_LUN2_ENABLE 0 +#endif + +#ifndef CONF_USB_MSC_LUN2_TYPE +#define CONF_USB_MSC_LUN2_TYPE 0x00 +#endif + +// The disk is removable +// conf_usb_msc_lun2_rmb +#ifndef CONF_USB_MSC_LUN2_RMB +#define CONF_USB_MSC_LUN2_RMB 0x1 +#endif + +#ifndef CONF_USB_MSC_LUN2_ISO +#define CONF_USB_MSC_LUN2_ISO 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN2_ECMA +#define CONF_USB_MSC_LUN2_ECMA 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN2_ANSI +#define CONF_USB_MSC_LUN2_ANSI 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN2_REPO +#define CONF_USB_MSC_LUN2_REPO 0x01 +#endif + +#ifndef CONF_USB_MSC_LUN2_FACTORY +#define CONF_USB_MSC_LUN2_FACTORY 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN2_PRODUCT +#define CONF_USB_MSC_LUN2_PRODUCT 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN2_PRODUCT_VERSION +#define CONF_USB_MSC_LUN2_PRODUCT_VERSION 0x00, 0x00, 0x00, 0x00 +#endif + +// Disk Size (in KB) <0x1-0xFFFFFFFF> +// conf_usb_msc_lun2_capacity + +#ifndef CONF_USB_MSC_LUN2_CAPACITY +#define CONF_USB_MSC_LUN2_CAPACITY 22 +#endif + +#ifndef CONF_USB_MSC_LUN2_BLOCK_SIZE +#define CONF_USB_MSC_LUN2_BLOCK_SIZE 512 +#endif + +#ifndef CONF_USB_MSC_LUN2_LAST_BLOCK_ADDR +#define CONF_USB_MSC_LUN2_LAST_BLOCK_ADDR \ + ((uint32_t)CONF_USB_MSC_LUN2_CAPACITY * 1024 / CONF_USB_MSC_LUN2_BLOCK_SIZE - 1) +#endif + +// + +// Enable Demo for LUN 3 +// conf_usb_msc_lun3_enable +#ifndef CONF_USB_MSC_LUN3_ENABLE +#define CONF_USB_MSC_LUN3_ENABLE 0 +#endif + +#ifndef CONF_USB_MSC_LUN3_TYPE +#define CONF_USB_MSC_LUN3_TYPE 0x00 +#endif + +// The disk is removable +// conf_usb_msc_lun3_rmb +#ifndef CONF_USB_MSC_LUN3_RMB +#define CONF_USB_MSC_LUN3_RMB 0x1 +#endif + +#ifndef CONF_USB_MSC_LUN3_ISO +#define CONF_USB_MSC_LUN3_ISO 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN3_ECMA +#define CONF_USB_MSC_LUN3_ECMA 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN3_ANSI +#define CONF_USB_MSC_LUN3_ANSI 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN3_REPO +#define CONF_USB_MSC_LUN3_REPO 0x01 +#endif + +#ifndef CONF_USB_MSC_LUN3_FACTORY +#define CONF_USB_MSC_LUN3_FACTORY 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN3_PRODUCT +#define CONF_USB_MSC_LUN3_PRODUCT 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN3_PRODUCT_VERSION +#define CONF_USB_MSC_LUN3_PRODUCT_VERSION 0x00, 0x00, 0x00, 0x00 +#endif + +// Disk Size (in KB) <0x1-0xFFFFFFFF> +// conf_usb_msc_lun3_capacity + +#ifndef CONF_USB_MSC_LUN3_CAPACITY +#define CONF_USB_MSC_LUN3_CAPACITY 22 +#endif + +#ifndef CONF_USB_MSC_LUN3_BLOCK_SIZE +#define CONF_USB_MSC_LUN3_BLOCK_SIZE 512 +#endif + +#ifndef CONF_USB_MSC_LUN3_LAST_BLOCK_ADDR +#define CONF_USB_MSC_LUN3_LAST_BLOCK_ADDR \ + ((uint32_t)CONF_USB_MSC_LUN3_CAPACITY * 1024 / CONF_USB_MSC_LUN3_BLOCK_SIZE - 1) +#endif + +// + +// +// + +// <<< end of configuration section >>> + +#endif // USBD_CONFIG_H diff --git a/ports/atmel-samd/boards/feather_m4_can/board.c b/ports/atmel-samd/boards/feather_m4_can/board.c new file mode 100644 index 000000000..8096b9b8e --- /dev/null +++ b/ports/atmel-samd/boards/feather_m4_can/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/feather_m4_can/mpconfigboard.h b/ports/atmel-samd/boards/feather_m4_can/mpconfigboard.h new file mode 100644 index 000000000..20c4670e2 --- /dev/null +++ b/ports/atmel-samd/boards/feather_m4_can/mpconfigboard.h @@ -0,0 +1,35 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit Feather M4 CAN" +#define MICROPY_HW_MCU_NAME "same51j19a" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// Rev E + +#define MICROPY_HW_LED_STATUS (&pin_PA23) +#define MICROPY_HW_NEOPIXEL (&pin_PB03) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// QSPI CS, QSPI SCK and NeoPixel pin +#define MICROPY_PORT_B (PORT_PB03 | PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define EXTERNAL_FLASH_QSPI_DUAL + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA17) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB23) +#define DEFAULT_SPI_BUS_MISO (&pin_PB22) + +#define DEFAULT_UART_BUS_RX (&pin_PB17) +#define DEFAULT_UART_BUS_TX (&pin_PB16) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/feather_m4_can/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m4_can/mpconfigboard.mk new file mode 100644 index 000000000..306e7fe42 --- /dev/null +++ b/ports/atmel-samd/boards/feather_m4_can/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x239A +USB_PID = 0x80CE +USB_PRODUCT = "Feather M4 CAN" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAME51J19A +CHIP_FAMILY = same51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C +LONGINT_IMPL = MPZ + +CIRCUITPY_VECTORIO = 1 diff --git a/ports/atmel-samd/boards/feather_m4_can/pins.c b/ports/atmel-samd/boards/feather_m4_can/pins.c new file mode 100644 index 000000000..2b67709f8 --- /dev/null +++ b/ports/atmel-samd/boards/feather_m4_can/pins.c @@ -0,0 +1,61 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_PB08) }, + + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_PB09) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_PA06) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_PB23) }, + + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_PB22) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB17) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB17) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB16) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB16) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PB01) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_STANDBY), MP_ROM_PTR(&pin_PB13) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/common-hal/neopixel_write/__init__.c b/ports/atmel-samd/common-hal/neopixel_write/__init__.c index 43c8575cb..6f2090b98 100644 --- a/ports/atmel-samd/common-hal/neopixel_write/__init__.c +++ b/ports/atmel-samd/common-hal/neopixel_write/__init__.c @@ -34,6 +34,9 @@ #if defined(SAME54) #include "hri/hri_cmcc_e54.h" #include "hri/hri_nvmctrl_e54.h" +#elif defined(SAME51) +#include "hri/hri_cmcc_e51.h" +#include "hri/hri_nvmctrl_e51.h" #elif defined(SAMD51) #include "hri/hri_cmcc_d51.h" #include "hri/hri_nvmctrl_d51.h" diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals index 0f5f1522d..15fd96f4d 160000 --- a/ports/atmel-samd/peripherals +++ b/ports/atmel-samd/peripherals @@ -1 +1 @@ -Subproject commit 0f5f1522d09c8fa7d858edec484a994c21c59668 +Subproject commit 15fd96f4d8c38d5490767ea09469b82a231a768d diff --git a/ports/atmel-samd/supervisor/internal_flash.c b/ports/atmel-samd/supervisor/internal_flash.c index ecb59f836..4c7ca0dc7 100644 --- a/ports/atmel-samd/supervisor/internal_flash.c +++ b/ports/atmel-samd/supervisor/internal_flash.c @@ -39,6 +39,9 @@ #ifdef SAMD21 #include "hpl/pm/hpl_pm_base.h" #endif +#ifdef SAME51 +#include "hri/hri_mclk_e51.h" +#endif #ifdef SAME54 #include "hri/hri_mclk_e54.h" #endif diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c index 6352afb1d..8d52c30c5 100644 --- a/ports/atmel-samd/supervisor/port.c +++ b/ports/atmel-samd/supervisor/port.c @@ -44,6 +44,9 @@ #include "hri/hri_pm_d21.h" #elif defined(SAME54) #include "hri/hri_rstc_e54.h" +#elif defined(SAME51) +#include "sam.h" +#include "hri/hri_rstc_e51.h" #elif defined(SAMD51) #include "hri/hri_rstc_d51.h" #else diff --git a/ports/atmel-samd/supervisor/same51_cpu.s b/ports/atmel-samd/supervisor/same51_cpu.s new file mode 100755 index 000000000..9e6807a5e --- /dev/null +++ b/ports/atmel-samd/supervisor/same51_cpu.s @@ -0,0 +1,27 @@ +.syntax unified +.cpu cortex-m4 +.thumb +.text +.align 2 + +@ uint cpu_get_regs_and_sp(r0=uint regs[10]) +.global cpu_get_regs_and_sp +.thumb +.thumb_func +.type cpu_get_regs_and_sp, %function +cpu_get_regs_and_sp: +@ store registers into given array +str r4, [r0], #4 +str r5, [r0], #4 +str r6, [r0], #4 +str r7, [r0], #4 +str r8, [r0], #4 +str r9, [r0], #4 +str r10, [r0], #4 +str r11, [r0], #4 +str r12, [r0], #4 +str r13, [r0], #4 + +@ return the sp +mov r0, sp +bx lr -- cgit v1.2.3 From b49099c8f3dd957a3e7aa34a62cf68bcf4bd024b Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 8 Sep 2020 15:31:13 -0500 Subject: additional asf4 updates --- ports/atmel-samd/asf4 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/asf4 b/ports/atmel-samd/asf4 index f99e36fb0..1b87f18f8 160000 --- a/ports/atmel-samd/asf4 +++ b/ports/atmel-samd/asf4 @@ -1 +1 @@ -Subproject commit f99e36fb008588bd9ff005099b3b89b7952fcfba +Subproject commit 1b87f18f8091f258e63f85cef54bcc7bafd44598 -- cgit v1.2.3 From c7c90f47b0986e0f8c4bcba574bccc2352bf700f Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Thu, 10 Sep 2020 17:32:20 -0700 Subject: Add non-DMA SPI support. This fixes SPI with PSRAM allocated buffers. DMA with SPI2 was attempted but produced junk output. This manual copy is less than 2x slower than DMA when not interrupted. Fixes #3339 --- ports/esp32s2/common-hal/busio/SPI.c | 41 +++++++++++++++++++++++++----------- ports/esp32s2/common-hal/busio/SPI.h | 4 ---- 2 files changed, 29 insertions(+), 16 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/busio/SPI.c b/ports/esp32s2/common-hal/busio/SPI.c index a22075cd5..350580ea8 100644 --- a/ports/esp32s2/common-hal/busio/SPI.c +++ b/ports/esp32s2/common-hal/busio/SPI.c @@ -183,9 +183,6 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, // spi_hal_init clears the given hal context so set everything after. spi_hal_init(hal, host_id); - hal->dmadesc_tx = &self->tx_dma; - hal->dmadesc_rx = &self->rx_dma; - hal->dmadesc_n = 1; // We don't use native CS. // hal->cs_setup = 0; @@ -196,7 +193,6 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, hal->half_duplex = 0; // hal->tx_lsbfirst = 0; // hal->rx_lsbfirst = 0; - hal->dma_enabled = 1; hal->no_compensate = 1; // Ignore CS bits @@ -315,16 +311,34 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_ou hal->rcv_buffer = NULL; // Reset timing_conf in case we've moved since the last time we used it. hal->timing_conf = &self->timing_conf; + lldesc_t tx_dma __attribute__((aligned(16))); + lldesc_t rx_dma __attribute__((aligned(16))); + hal->dmadesc_tx = &tx_dma; + hal->dmadesc_rx = &rx_dma; + hal->dmadesc_n = 1; + + size_t burst_length; + // If both of the incoming pointers are DMA capable then use DMA. Otherwise, do + // bursts the size of the SPI data buffer without DMA. + if ((data_out == NULL || esp_ptr_dma_capable(data_out)) && + (data_in == NULL || esp_ptr_dma_capable(data_out))) { + hal->dma_enabled = 1; + burst_length = LLDESC_MAX_NUM_PER_DESC; + } else { + hal->dma_enabled = 0; + burst_length = sizeof(hal->hw->data_buf); + } + // This rounds up. - size_t dma_count = (len + LLDESC_MAX_NUM_PER_DESC - 1) / LLDESC_MAX_NUM_PER_DESC; - for (size_t i = 0; i < dma_count; i++) { - size_t offset = LLDESC_MAX_NUM_PER_DESC * i; - size_t dma_len = len - offset; - if (dma_len > LLDESC_MAX_NUM_PER_DESC) { - dma_len = LLDESC_MAX_NUM_PER_DESC; + size_t burst_count = (len + burst_length - 1) / burst_length; + for (size_t i = 0; i < burst_count; i++) { + size_t offset = burst_length * i; + size_t this_length = len - offset; + if (this_length > burst_length) { + this_length = burst_length; } - hal->tx_bitlen = dma_len * self->bits; - hal->rx_bitlen = dma_len * self->bits; + hal->tx_bitlen = this_length * self->bits; + hal->rx_bitlen = this_length * self->bits; if (data_out != NULL) { hal->send_buffer = (uint8_t*) data_out + offset; } @@ -341,6 +355,9 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_ou } spi_hal_fetch_result(hal); } + hal->dmadesc_tx = NULL; + hal->dmadesc_rx = NULL; + hal->dmadesc_n = 0; return true; } diff --git a/ports/esp32s2/common-hal/busio/SPI.h b/ports/esp32s2/common-hal/busio/SPI.h index 6d8203831..38fbe42ff 100644 --- a/ports/esp32s2/common-hal/busio/SPI.h +++ b/ports/esp32s2/common-hal/busio/SPI.h @@ -44,10 +44,6 @@ typedef struct { spi_hal_context_t hal_context; spi_hal_timing_conf_t timing_conf; intr_handle_t interrupt; - // IDF allocates these in DMA accessible memory so they may need to move when - // we use external RAM for CircuitPython. - lldesc_t tx_dma; - lldesc_t rx_dma; uint32_t target_frequency; int32_t real_frequency; uint8_t polarity; -- cgit v1.2.3 From cacb0124acc13025c8658d9e1fe57b58780105b5 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 10 Sep 2020 20:17:27 -0500 Subject: feather_m4_express: Use quad data mode on flash Limor confirmed that the all shipping revisions starting with Rev D had QSPI flash chips installed. Note that when neither EXTERNAL_FLASH_QSPI_SINGLE nor EXTERNAL_FLASH_QSPI_DUAL is specified quad mode is assumed, so this is addressed by removing the setting altogether. --- ports/atmel-samd/boards/feather_m4_express/mpconfigboard.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.h b/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.h index ba16d17ee..a57b18e24 100644 --- a/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.h @@ -16,8 +16,6 @@ #define MICROPY_PORT_C (0) #define MICROPY_PORT_D (0) -#define EXTERNAL_FLASH_QSPI_DUAL - #define BOARD_HAS_CRYSTAL 1 #define DEFAULT_I2C_BUS_SCL (&pin_PA13) -- cgit v1.2.3 From 305bed6d9e9581ed19d2043622bc77106a0c3b5b Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Fri, 11 Sep 2020 21:06:54 +0530 Subject: Added esp32s2 safe_mode & fixed user_safe_mode --- .../boards/espressif_saola_1_wroom/mpconfigboard.h | 4 + .../espressif_saola_1_wrover/mpconfigboard.h | 4 + .../boards/microdev_micro_s2/mpconfigboard.h | 4 + supervisor/shared/safe_mode.c | 155 +++++++++++---------- 4 files changed, 96 insertions(+), 71 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h index a94f10ea4..6d603ba57 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h +++ b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h @@ -31,4 +31,8 @@ #define MICROPY_HW_NEOPIXEL (&pin_GPIO18) +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + +#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up." + #define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h index 338186dc5..f5b6c7948 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h +++ b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h @@ -31,4 +31,8 @@ #define MICROPY_HW_NEOPIXEL (&pin_GPIO18) +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + +#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up." + #define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h index bb28fe16a..d844f37d0 100644 --- a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h +++ b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h @@ -32,4 +32,8 @@ #define MICROPY_HW_LED (&pin_GPIO21) #define MICROPY_HW_NEOPIXEL (&pin_GPIO33) +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + +#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up." + #define AUTORESET_DELAY_MS 500 diff --git a/supervisor/shared/safe_mode.c b/supervisor/shared/safe_mode.c index 29a0a6a4f..cbbdfe427 100644 --- a/supervisor/shared/safe_mode.c +++ b/supervisor/shared/safe_mode.c @@ -60,6 +60,11 @@ safe_mode_t wait_for_safe_mode_reset(void) { common_hal_digitalio_digitalinout_construct(&status_led, MICROPY_HW_LED_STATUS); common_hal_digitalio_digitalinout_switch_to_output(&status_led, true, DRIVE_MODE_PUSH_PULL); #endif + #ifdef CIRCUITPY_BOOT_BUTTON + digitalio_digitalinout_obj_t boot_button; + common_hal_digitalio_digitalinout_construct(&boot_button, CIRCUITPY_BOOT_BUTTON); + common_hal_digitalio_digitalinout_switch_to_input(&boot_button, PULL_UP); + #endif uint64_t start_ticks = supervisor_ticks_ms64(); uint64_t diff = 0; while (diff < 700) { @@ -67,6 +72,11 @@ safe_mode_t wait_for_safe_mode_reset(void) { // Blink on for 100, off for 100, on for 100, off for 100 and on for 200 common_hal_digitalio_digitalinout_set_value(&status_led, diff > 100 && diff / 100 != 2 && diff / 100 != 4); #endif + #ifdef CIRCUITPY_BOOT_BUTTON + if (!common_hal_digitalio_digitalinout_get_value(&boot_button)) { + return USER_SAFE_MODE; + } + #endif diff = supervisor_ticks_ms64() - start_ticks; } #ifdef MICROPY_HW_LED_STATUS @@ -103,77 +113,80 @@ void print_safe_mode_message(safe_mode_t reason) { return; } serial_write("\n"); - // Output a user safe mode string if it's set. - #ifdef BOARD_USER_SAFE_MODE - if (reason == USER_SAFE_MODE) { - serial_write_compressed(translate("You requested starting safe mode by ")); - serial_write(BOARD_USER_SAFE_MODE_ACTION); - serial_write_compressed(translate("\nTo exit, please reset the board without ")); - serial_write(BOARD_USER_SAFE_MODE_ACTION); - serial_write("\n"); - } else - #endif - switch (reason) { - case MANUAL_SAFE_MODE: - serial_write_compressed(translate("CircuitPython is in safe mode because you pressed the reset button during boot. Press again to exit safe mode.\n")); - return; - case PROGRAMMATIC_SAFE_MODE: - serial_write_compressed(translate("The `microcontroller` module was used to boot into safe mode. Press reset to exit safe mode.\n")); - return; - default: - break; - } - serial_write_compressed(translate("You are in safe mode: something unanticipated happened.\n")); - switch (reason) { - case BROWNOUT: - serial_write_compressed(translate("The microcontroller's power dipped. Make sure your power supply provides\nenough power for the whole circuit and press reset (after ejecting CIRCUITPY).\n")); - return; - case HEAP_OVERWRITTEN: - serial_write_compressed(translate("The CircuitPython heap was corrupted because the stack was too small.\nPlease increase the stack size if you know how, or if not:")); - serial_write_compressed(FILE_AN_ISSUE); - return; - case NO_HEAP: - serial_write_compressed(translate("CircuitPython was unable to allocate the heap.\n")); - serial_write_compressed(FILE_AN_ISSUE); - return; - default: - break; - } + switch (reason) { + case USER_SAFE_MODE: + #ifdef BOARD_USER_SAFE_MODE_ACTION + // Output a user safe mode string if it's set. + serial_write_compressed(translate("You requested starting safe mode by ")); + serial_write_compressed(translate(BOARD_USER_SAFE_MODE_ACTION)); + serial_write_compressed(translate("\nTo exit, please reset the board without ")); + serial_write_compressed(translate(BOARD_USER_SAFE_MODE_ACTION)); + serial_write("\n"); + #else + // fallthrough + #endif + return; + case MANUAL_SAFE_MODE: + serial_write_compressed(translate("CircuitPython is in safe mode because you pressed the reset button during boot. Press again to exit safe mode.\n")); + return; + case PROGRAMMATIC_SAFE_MODE: + serial_write_compressed(translate("The `microcontroller` module was used to boot into safe mode. Press reset to exit safe mode.\n")); + return; + default: + break; + } - serial_write_compressed(translate("CircuitPython core code crashed hard. Whoops!\n")); - switch (reason) { - case HARD_CRASH: - serial_write_compressed(translate("Crash into the HardFault_Handler.")); - return; - case MICROPY_NLR_JUMP_FAIL: - serial_write_compressed(translate("MicroPython NLR jump failed. Likely memory corruption.")); - return; - case MICROPY_FATAL_ERROR: - serial_write_compressed(translate("MicroPython fatal error.")); - break; - case GC_ALLOC_OUTSIDE_VM: - serial_write_compressed(translate("Attempted heap allocation when MicroPython VM not running.")); - break; -#ifdef SOFTDEVICE_PRESENT - // defined in ports/nrf/bluetooth/bluetooth_common.mk - // will print "Unknown reason" if somehow encountered on other ports - case NORDIC_SOFT_DEVICE_ASSERT: - serial_write_compressed(translate("Nordic Soft Device failure assertion.")); - break; -#endif - case FLASH_WRITE_FAIL: - serial_write_compressed(translate("Failed to write internal flash.")); - break; - case MEM_MANAGE: - serial_write_compressed(translate("Invalid memory access.")); - break; - case WATCHDOG_RESET: - serial_write_compressed(translate("Watchdog timer expired.")); - break; - default: - serial_write_compressed(translate("Unknown reason.")); - break; - } - serial_write_compressed(FILE_AN_ISSUE); + serial_write_compressed(translate("You are in safe mode: something unanticipated happened.\n")); + switch (reason) { + case BROWNOUT: + serial_write_compressed(translate("The microcontroller's power dipped. Make sure your power supply provides\nenough power for the whole circuit and press reset (after ejecting CIRCUITPY).\n")); + return; + case HEAP_OVERWRITTEN: + serial_write_compressed(translate("The CircuitPython heap was corrupted because the stack was too small.\nPlease increase the stack size if you know how, or if not:")); + serial_write_compressed(FILE_AN_ISSUE); + return; + case NO_HEAP: + serial_write_compressed(translate("CircuitPython was unable to allocate the heap.\n")); + serial_write_compressed(FILE_AN_ISSUE); + return; + default: + break; + } + + serial_write_compressed(translate("CircuitPython core code crashed hard. Whoops!\n")); + switch (reason) { + case HARD_CRASH: + serial_write_compressed(translate("Crash into the HardFault_Handler.")); + return; + case MICROPY_NLR_JUMP_FAIL: + serial_write_compressed(translate("MicroPython NLR jump failed. Likely memory corruption.")); + return; + case MICROPY_FATAL_ERROR: + serial_write_compressed(translate("MicroPython fatal error.")); + break; + case GC_ALLOC_OUTSIDE_VM: + serial_write_compressed(translate("Attempted heap allocation when MicroPython VM not running.")); + break; + #ifdef SOFTDEVICE_PRESENT + // defined in ports/nrf/bluetooth/bluetooth_common.mk + // will print "Unknown reason" if somehow encountered on other ports + case NORDIC_SOFT_DEVICE_ASSERT: + serial_write_compressed(translate("Nordic Soft Device failure assertion.")); + break; + #endif + case FLASH_WRITE_FAIL: + serial_write_compressed(translate("Failed to write internal flash.")); + break; + case MEM_MANAGE: + serial_write_compressed(translate("Invalid memory access.")); + break; + case WATCHDOG_RESET: + serial_write_compressed(translate("Watchdog timer expired.")); + break; + default: + serial_write_compressed(translate("Unknown reason.")); + break; + } + serial_write_compressed(FILE_AN_ISSUE); } -- cgit v1.2.3 From 4da478382d8e428d3e702dcd8c35f67cf80cc319 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Sat, 12 Sep 2020 17:46:52 +0530 Subject: Fix serial console output & add more boards --- ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h | 4 ++++ ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h | 4 ++++ ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h | 2 +- ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h | 2 +- ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h | 2 +- ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h | 4 ++++ supervisor/shared/safe_mode.c | 6 +++--- 7 files changed, 18 insertions(+), 6 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h b/ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h index ed3f23a3c..2af3515f4 100644 --- a/ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h +++ b/ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h @@ -29,4 +29,8 @@ #define MICROPY_HW_BOARD_NAME "BastWiFi" #define MICROPY_HW_MCU_NAME "ESP32S2" +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + +#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" + #define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h b/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h index 84d15ffc2..a4c8e6576 100644 --- a/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h +++ b/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h @@ -31,4 +31,8 @@ #define MICROPY_HW_NEOPIXEL (&pin_GPIO45) +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + +#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" + #define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h index 6d603ba57..335aaeb5e 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h +++ b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h @@ -33,6 +33,6 @@ #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) -#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up." +#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" #define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h index f5b6c7948..d3ef8bb26 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h +++ b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h @@ -33,6 +33,6 @@ #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) -#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up." +#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" #define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h index d844f37d0..1a1ef7a6c 100644 --- a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h +++ b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h @@ -34,6 +34,6 @@ #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) -#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up." +#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" #define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h index 93fb0c573..a65d00206 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h @@ -29,6 +29,10 @@ #define MICROPY_HW_BOARD_NAME "FeatherS2" #define MICROPY_HW_MCU_NAME "ESP32S2" +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + +#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" + #define AUTORESET_DELAY_MS 500 // Doesn't work with this on. diff --git a/supervisor/shared/safe_mode.c b/supervisor/shared/safe_mode.c index cbbdfe427..f4f23378a 100644 --- a/supervisor/shared/safe_mode.c +++ b/supervisor/shared/safe_mode.c @@ -72,7 +72,7 @@ safe_mode_t wait_for_safe_mode_reset(void) { // Blink on for 100, off for 100, on for 100, off for 100 and on for 200 common_hal_digitalio_digitalinout_set_value(&status_led, diff > 100 && diff / 100 != 2 && diff / 100 != 4); #endif - #ifdef CIRCUITPY_BOOT_BUTTON + #ifdef CIRCUITPY_BOOT_BUTTON if (!common_hal_digitalio_digitalinout_get_value(&boot_button)) { return USER_SAFE_MODE; } @@ -120,11 +120,11 @@ void print_safe_mode_message(safe_mode_t reason) { // Output a user safe mode string if it's set. serial_write_compressed(translate("You requested starting safe mode by ")); serial_write_compressed(translate(BOARD_USER_SAFE_MODE_ACTION)); - serial_write_compressed(translate("\nTo exit, please reset the board without ")); + serial_write_compressed(translate("To exit, please reset the board without ")); serial_write_compressed(translate(BOARD_USER_SAFE_MODE_ACTION)); - serial_write("\n"); #else // fallthrough + serial_write_compressed(translate("CircuitPython is in safe mode with status being USER_SAFE_MODE but no specific reason was provided.\n")); #endif return; case MANUAL_SAFE_MODE: -- cgit v1.2.3 From 5729097bc415a935b0e18b034a6313cf0b74daab Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Sat, 12 Sep 2020 14:15:32 -0500 Subject: atmel-samd: enable build error for implicit fallthrough If any diagnostics occur, we will want to either add `/* FALLTHROUGH */` or `break;` as appropriate. I only tested a few builds (trinket m0 and metro m4 express) --- ports/atmel-samd/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile index 489f3a7af..f00366c27 100644 --- a/ports/atmel-samd/Makefile +++ b/ports/atmel-samd/Makefile @@ -148,7 +148,7 @@ else endif endif -CFLAGS += $(INC) -Wall -Werror -std=gnu11 -nostdlib -fshort-enums $(BASE_CFLAGS) $(CFLAGS_MOD) $(COPT) +CFLAGS += $(INC) -Wall -Werror -std=gnu11 -nostdlib -fshort-enums $(BASE_CFLAGS) $(CFLAGS_MOD) $(COPT) -Wimplicit-fallthrough=2 ifeq ($(CHIP_FAMILY), samd21) CFLAGS += \ -- cgit v1.2.3 From 01fdd9598a83fee98b2447c50ea911d7bfe205cb Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Sat, 12 Sep 2020 17:48:42 -0500 Subject: disable iimplicit-fallthrough warning inside asf4 .. there is an instance of it that looks like a "true positive", but it only affects sdhc transfers that are not a multiple of 4 bytes, which I don't think happens. (sd card blocks are always 512 bytes) I can fix this in our asf4 repo but that would mean this should be deferred until after #3384 is merged, since that also touches asf4 very invasively by adding a whole new chip family. --- ports/atmel-samd/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile index f00366c27..20c79de8f 100644 --- a/ports/atmel-samd/Makefile +++ b/ports/atmel-samd/Makefile @@ -255,7 +255,7 @@ SRC_ASF += \ hal/src/hal_mci_sync.c \ hpl/sdhc/hpl_sdhc.c \ -$(BUILD)/asf4/$(CHIP_FAMILY)/hpl/sdhc/hpl_sdhc.o: CFLAGS += -Wno-cast-align +$(BUILD)/asf4/$(CHIP_FAMILY)/hpl/sdhc/hpl_sdhc.o: CFLAGS += -Wno-cast-align -Wno-implicit-fallthrough endif $(BUILD)/asf4/$(CHIP_FAMILY)/hpl/sercom/hpl_sercom.o: CFLAGS += -Wno-maybe-uninitialized -- cgit v1.2.3 From 6fff4ec00d7b822852bdf553075a68820482fc22 Mon Sep 17 00:00:00 2001 From: lady ada Date: Sat, 12 Sep 2020 19:00:26 -0400 Subject: cutie variant --- ports/atmel-samd/boards/qtpy_m0/board.c | 40 +++++++++++++++++ ports/atmel-samd/boards/qtpy_m0/mpconfigboard.h | 55 ++++++++++++++++++++++++ ports/atmel-samd/boards/qtpy_m0/mpconfigboard.mk | 24 +++++++++++ ports/atmel-samd/boards/qtpy_m0/pins.c | 49 +++++++++++++++++++++ 4 files changed, 168 insertions(+) create mode 100644 ports/atmel-samd/boards/qtpy_m0/board.c create mode 100644 ports/atmel-samd/boards/qtpy_m0/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/qtpy_m0/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/qtpy_m0/pins.c (limited to 'ports') diff --git a/ports/atmel-samd/boards/qtpy_m0/board.c b/ports/atmel-samd/boards/qtpy_m0/board.c new file mode 100644 index 000000000..5f7b4dda8 --- /dev/null +++ b/ports/atmel-samd/boards/qtpy_m0/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { + gpio_set_pin_function(PIN_PA18, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_direction(PIN_PA18, GPIO_DIRECTION_OUT); + gpio_set_pin_level(PIN_PA18, true); // Turn on neopixel by default +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/qtpy_m0/mpconfigboard.h b/ports/atmel-samd/boards/qtpy_m0/mpconfigboard.h new file mode 100644 index 000000000..a88c1992d --- /dev/null +++ b/ports/atmel-samd/boards/qtpy_m0/mpconfigboard.h @@ -0,0 +1,55 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit QT Py M0" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_NEOPIXEL (&pin_PA19) + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define IGNORE_PIN_PA00 1 +#define IGNORE_PIN_PA01 1 +#define IGNORE_PIN_PA09 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA17) +#define DEFAULT_I2C_BUS_SDA (&pin_PA16) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA08) +#define DEFAULT_SPI_BUS_MISO (&pin_PA10) + +#define DEFAULT_UART_BUS_RX (&pin_PA07) +#define DEFAULT_UART_BUS_TX (&pin_PA06) diff --git a/ports/atmel-samd/boards/qtpy_m0/mpconfigboard.mk b/ports/atmel-samd/boards/qtpy_m0/mpconfigboard.mk new file mode 100644 index 000000000..964cbe643 --- /dev/null +++ b/ports/atmel-samd/boards/qtpy_m0/mpconfigboard.mk @@ -0,0 +1,24 @@ +USB_VID = 0x239A +USB_PID = 0x80CC +USB_PRODUCT = "QT Py M0" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_FULL_BUILD = 0 + +SUPEROPT_GC = 0 + +CFLAGS_BOARD = --param max-inline-insns-auto=15 +ifeq ($(TRANSLATION), zh_Latn_pinyin) +RELEASE_NEEDS_CLEAN_BUILD = 1 +CFLAGS_INLINE_LIMIT = 35 +endif +ifeq ($(TRANSLATION), de_DE) +RELEASE_NEEDS_CLEAN_BUILD = 1 +CFLAGS_INLINE_LIMIT = 35 +SUPEROPT_VM = 0 +endif diff --git a/ports/atmel-samd/boards/qtpy_m0/pins.c b/ports/atmel-samd/boards/qtpy_m0/pins.c new file mode 100644 index 000000000..5732e9f5b --- /dev/null +++ b/ports/atmel-samd/boards/qtpy_m0/pins.c @@ -0,0 +1,49 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA03) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA16) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA06) }, + + { MP_ROM_QSTR(MP_QSTR_D7, MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA07) }, + + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA11) }, + + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA10) }, + + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_PA18) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From 2fac4851a5e6cf08688c64ce12b5918b52c610ab Mon Sep 17 00:00:00 2001 From: lady ada Date: Sat, 12 Sep 2020 19:56:13 -0400 Subject: fix typo, tested hardware, neopixel doesnt work tho --- ports/atmel-samd/boards/qtpy_m0/board.c | 3 +++ ports/atmel-samd/boards/qtpy_m0/pins.c | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/qtpy_m0/board.c b/ports/atmel-samd/boards/qtpy_m0/board.c index 5f7b4dda8..2add1867c 100644 --- a/ports/atmel-samd/boards/qtpy_m0/board.c +++ b/ports/atmel-samd/boards/qtpy_m0/board.c @@ -25,6 +25,9 @@ */ #include "boards/board.h" +#include "common-hal/microcontroller/Pin.h" +#include "supervisor/shared/board.h" +#include "hal/include/hal_gpio.h" void board_init(void) { gpio_set_pin_function(PIN_PA18, GPIO_PIN_FUNCTION_OFF); diff --git a/ports/atmel-samd/boards/qtpy_m0/pins.c b/ports/atmel-samd/boards/qtpy_m0/pins.c index 5732e9f5b..4ac10a7a6 100644 --- a/ports/atmel-samd/boards/qtpy_m0/pins.c +++ b/ports/atmel-samd/boards/qtpy_m0/pins.c @@ -23,7 +23,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_D7, MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA07) }, -- cgit v1.2.3 From 5deac8d2491ded0ace0ea02dc2ae5ee9becfdb14 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Sun, 13 Sep 2020 18:22:40 +0530 Subject: Update board specific safe mode message --- ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h | 2 +- .../atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h | 2 +- .../boards/circuitplayground_express_displayio/mpconfigboard.h | 2 +- ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h | 2 +- ports/atmel-samd/boards/meowmeow/mpconfigboard.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h index 12c48b1e3..4a6cbad86 100644 --- a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h @@ -25,7 +25,7 @@ #define CALIBRATE_CRYSTALLESS 1 // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up\n" // Increase stack size slightly due to CPX library import nesting #define CIRCUITPY_DEFAULT_STACK_SIZE (4248) //divisible by 8 diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h index 95b4ec110..5a3871b5c 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h @@ -27,7 +27,7 @@ #define USER_NEOPIXELS_PIN (&pin_PB23) // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up\n" // Increase stack size slightly due to CPX library import nesting #define CIRCUITPY_DEFAULT_STACK_SIZE (4248) // divisible by 8 diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h index d478ea38b..da1abfd9d 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h @@ -25,7 +25,7 @@ #define CALIBRATE_CRYSTALLESS 1 // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up\n" // Increase stack size slightly due to CPX library import nesting. #define CIRCUITPY_DEFAULT_STACK_SIZE (4248) // divisible by 8 diff --git a/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h b/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h index 3a984188f..892d6af37 100644 --- a/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h +++ b/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h @@ -11,7 +11,7 @@ #define CALIBRATE_CRYSTALLESS 1 // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up\n" #define DEFAULT_I2C_BUS_SCL (&pin_PA08) #define DEFAULT_I2C_BUS_SDA (&pin_PA09) diff --git a/ports/atmel-samd/boards/meowmeow/mpconfigboard.h b/ports/atmel-samd/boards/meowmeow/mpconfigboard.h index 80d367863..224a8d7ce 100644 --- a/ports/atmel-samd/boards/meowmeow/mpconfigboard.h +++ b/ports/atmel-samd/boards/meowmeow/mpconfigboard.h @@ -11,7 +11,7 @@ #define CALIBRATE_CRYSTALLESS 1 // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up" +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up\n" #define DEFAULT_I2C_BUS_SCL (&pin_PA01) #define DEFAULT_I2C_BUS_SDA (&pin_PA00) -- cgit v1.2.3 From 36da92075b6b83a6b1a998b377f340524d143f35 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Sun, 13 Sep 2020 22:57:24 +0530 Subject: Update safe mode reason --- locale/circuitpython.pot | 8 +------- ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h | 2 +- .../boards/circuitplayground_express_crickit/mpconfigboard.h | 2 +- .../boards/circuitplayground_express_displayio/mpconfigboard.h | 2 +- ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h | 2 +- ports/atmel-samd/boards/meowmeow/mpconfigboard.h | 2 +- supervisor/shared/safe_mode.c | 5 ++--- 7 files changed, 8 insertions(+), 15 deletions(-) (limited to 'ports') diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 0c6c4ac48..581442172 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-09-12 18:06+0530\n" +"POT-Creation-Date: 2020-09-13 22:53+0530\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -576,12 +576,6 @@ msgid "" "boot. Press again to exit safe mode.\n" msgstr "" -#: supervisor/shared/safe_mode.c -msgid "" -"CircuitPython is in safe mode with status being USER_SAFE_MODE but no " -"specific reason was provided.\n" -msgstr "" - #: supervisor/shared/safe_mode.c msgid "CircuitPython was unable to allocate the heap.\n" msgstr "" diff --git a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h index 4a6cbad86..54789f04f 100644 --- a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h @@ -25,7 +25,7 @@ #define CALIBRATE_CRYSTALLESS 1 // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up\n" +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up.\n" // Increase stack size slightly due to CPX library import nesting #define CIRCUITPY_DEFAULT_STACK_SIZE (4248) //divisible by 8 diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h index 5a3871b5c..e377275b7 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h @@ -27,7 +27,7 @@ #define USER_NEOPIXELS_PIN (&pin_PB23) // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up\n" +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up.\n" // Increase stack size slightly due to CPX library import nesting #define CIRCUITPY_DEFAULT_STACK_SIZE (4248) // divisible by 8 diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h index da1abfd9d..cacbed0de 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h @@ -25,7 +25,7 @@ #define CALIBRATE_CRYSTALLESS 1 // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up\n" +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up.\n" // Increase stack size slightly due to CPX library import nesting. #define CIRCUITPY_DEFAULT_STACK_SIZE (4248) // divisible by 8 diff --git a/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h b/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h index 892d6af37..ac1add545 100644 --- a/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h +++ b/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h @@ -11,7 +11,7 @@ #define CALIBRATE_CRYSTALLESS 1 // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up\n" +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up.\n" #define DEFAULT_I2C_BUS_SCL (&pin_PA08) #define DEFAULT_I2C_BUS_SDA (&pin_PA09) diff --git a/ports/atmel-samd/boards/meowmeow/mpconfigboard.h b/ports/atmel-samd/boards/meowmeow/mpconfigboard.h index 224a8d7ce..79d477cac 100644 --- a/ports/atmel-samd/boards/meowmeow/mpconfigboard.h +++ b/ports/atmel-samd/boards/meowmeow/mpconfigboard.h @@ -11,7 +11,7 @@ #define CALIBRATE_CRYSTALLESS 1 // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up\n" +#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up.\n" #define DEFAULT_I2C_BUS_SCL (&pin_PA01) #define DEFAULT_I2C_BUS_SDA (&pin_PA00) diff --git a/supervisor/shared/safe_mode.c b/supervisor/shared/safe_mode.c index f4f23378a..0c7933a21 100644 --- a/supervisor/shared/safe_mode.c +++ b/supervisor/shared/safe_mode.c @@ -123,8 +123,7 @@ void print_safe_mode_message(safe_mode_t reason) { serial_write_compressed(translate("To exit, please reset the board without ")); serial_write_compressed(translate(BOARD_USER_SAFE_MODE_ACTION)); #else - // fallthrough - serial_write_compressed(translate("CircuitPython is in safe mode with status being USER_SAFE_MODE but no specific reason was provided.\n")); + break; #endif return; case MANUAL_SAFE_MODE: @@ -189,4 +188,4 @@ void print_safe_mode_message(safe_mode_t reason) { break; } serial_write_compressed(FILE_AN_ISSUE); -} +} \ No newline at end of file -- cgit v1.2.3 From 90f7340bfc35d19fcf5e11c078c7f45399ed07e7 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Sun, 13 Sep 2020 13:12:35 -0500 Subject: move implicit-fallthrough warning enable to defns.mk --- ports/atmel-samd/Makefile | 2 +- py/circuitpy_defns.mk | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile index 20c79de8f..72c7d9688 100644 --- a/ports/atmel-samd/Makefile +++ b/ports/atmel-samd/Makefile @@ -148,7 +148,7 @@ else endif endif -CFLAGS += $(INC) -Wall -Werror -std=gnu11 -nostdlib -fshort-enums $(BASE_CFLAGS) $(CFLAGS_MOD) $(COPT) -Wimplicit-fallthrough=2 +CFLAGS += $(INC) -Wall -Werror -std=gnu11 -nostdlib -fshort-enums $(BASE_CFLAGS) $(CFLAGS_MOD) $(COPT) ifeq ($(CHIP_FAMILY), samd21) CFLAGS += \ diff --git a/py/circuitpy_defns.mk b/py/circuitpy_defns.mk index 04e38d81e..0e87287c1 100644 --- a/py/circuitpy_defns.mk +++ b/py/circuitpy_defns.mk @@ -31,6 +31,7 @@ BASE_CFLAGS = \ -fsingle-precision-constant \ -fno-strict-aliasing \ -Wdouble-promotion \ + -Wimplicit-fallthrough=2 \ -Wno-endif-labels \ -Wstrict-prototypes \ -Werror-implicit-function-declaration \ -- cgit v1.2.3 From b3bdd4686bd5f4a7c91972b9b0f65e624a7eab95 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Sun, 13 Sep 2020 15:10:04 -0500 Subject: PacketBuffer: add missing 'break's, remove unneeded {} --- ports/nrf/common-hal/_bleio/PacketBuffer.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) (limited to 'ports') diff --git a/ports/nrf/common-hal/_bleio/PacketBuffer.c b/ports/nrf/common-hal/_bleio/PacketBuffer.c index a8773f961..6d587984c 100644 --- a/ports/nrf/common-hal/_bleio/PacketBuffer.c +++ b/ports/nrf/common-hal/_bleio/PacketBuffer.c @@ -129,14 +129,12 @@ STATIC bool packet_buffer_on_ble_client_evt(ble_evt_t *ble_evt, void *param) { } break; } - case BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE: { + case BLE_GATTC_EVT_WRITE_CMD_TX_COMPLETE: queue_next_write(self); break; - } - case BLE_GATTC_EVT_WRITE_RSP: { + case BLE_GATTC_EVT_WRITE_RSP: queue_next_write(self); break; - } default: return false; break; @@ -171,14 +169,14 @@ STATIC bool packet_buffer_on_ble_server_evt(ble_evt_t *ble_evt, void *param) { } break; } - case BLE_GAP_EVT_DISCONNECTED: { + case BLE_GAP_EVT_DISCONNECTED: if (self->conn_handle == ble_evt->evt.gap_evt.conn_handle) { self->conn_handle = BLE_CONN_HANDLE_INVALID; } - } - case BLE_GATTS_EVT_HVN_TX_COMPLETE: { + break; + case BLE_GATTS_EVT_HVN_TX_COMPLETE: queue_next_write(self); - } + break; default: return false; break; -- cgit v1.2.3 From 1fde8ef9bce14ceea241574f074ac446dca93055 Mon Sep 17 00:00:00 2001 From: Kamil Tomaszewski Date: Wed, 2 Sep 2020 15:43:37 +0200 Subject: spresense: Add support for camera --- ports/cxd56/Makefile | 2 +- ports/cxd56/common-hal/camera/Camera.c | 224 ++++++++++++++++++++++++++++++ ports/cxd56/common-hal/camera/Camera.h | 43 ++++++ ports/cxd56/common-hal/camera/ImageSize.c | 0 ports/cxd56/common-hal/camera/__init__.c | 1 + ports/cxd56/mpconfigport.mk | 1 + 6 files changed, 270 insertions(+), 1 deletion(-) create mode 100644 ports/cxd56/common-hal/camera/Camera.c create mode 100644 ports/cxd56/common-hal/camera/Camera.h create mode 100644 ports/cxd56/common-hal/camera/ImageSize.c create mode 100644 ports/cxd56/common-hal/camera/__init__.c (limited to 'ports') diff --git a/ports/cxd56/Makefile b/ports/cxd56/Makefile index bb3958af4..7e145f5e2 100644 --- a/ports/cxd56/Makefile +++ b/ports/cxd56/Makefile @@ -201,7 +201,7 @@ all: $(BUILD)/firmware.spk $(FIRMWARE): $(ECHO) "" $(ECHO) "Download the spresense binaries zip archive from:" - $(ECHO) "https://developer.sony.com/file/download/download-spresense-firmware-v1-4-000" + $(ECHO) "https://developer.sony.com/file/download/download-spresense-firmware-v2-0-000" $(ECHO) "Extract spresense binaries to $(FIRMWARE)" $(ECHO) "" $(ECHO) "run make flash-bootloader again to flash bootloader." diff --git a/ports/cxd56/common-hal/camera/Camera.c b/ports/cxd56/common-hal/camera/Camera.c new file mode 100644 index 000000000..0c2252530 --- /dev/null +++ b/ports/cxd56/common-hal/camera/Camera.c @@ -0,0 +1,224 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include +#include +#include + +#include "py/runtime.h" + +#include "shared-bindings/camera/Camera.h" + +#define JPG_COMPRESS_RATIO (9) +#define SPRESENSE_CAMIMAGE_MEM_ALIGN (32) + +typedef struct { + const char* devpath; + int fd; +} camera_dev_t; + +STATIC camera_dev_t camera_dev = {"/dev/video", -1}; + +static void camera_size_to_width_and_height(camera_imagesize_t size, uint16_t *width, uint16_t *height) { + switch (size) { + case IMAGESIZE_320x240: + *height = VIDEO_VSIZE_QVGA; + *width = VIDEO_HSIZE_QVGA; + break; + case IMAGESIZE_640x320: + *height = VIDEO_VSIZE_VGA; + *width = VIDEO_HSIZE_VGA; + break; + case IMAGESIZE_1280x720: + *height = VIDEO_VSIZE_HD; + *width = VIDEO_HSIZE_HD; + break; + case IMAGESIZE_1280x960: + *height = VIDEO_VSIZE_QUADVGA; + *width = VIDEO_HSIZE_QUADVGA; + break; + case IMAGESIZE_1920x1080: + *height = VIDEO_VSIZE_FULLHD; + *width = VIDEO_HSIZE_FULLHD; + break; + case IMAGESIZE_2048x1536: + *height = VIDEO_VSIZE_3M; + *width = VIDEO_HSIZE_3M; + break; + case IMAGESIZE_2560x1920: + *height = VIDEO_VSIZE_5M; + *width = VIDEO_HSIZE_5M; + break; + default: + mp_raise_ValueError(translate("Size not supported")); + break; + } +} + +static void camera_set_format(enum v4l2_buf_type type, uint32_t pixformat, uint16_t width, uint16_t height) { + v4l2_requestbuffers_t req = {0}; + + // Set Buffer Mode. + req.type = type; + req.memory = V4L2_MEMORY_USERPTR; + req.count = 1; + req.mode = V4L2_BUF_MODE_RING; + ioctl(camera_dev.fd, VIDIOC_REQBUFS, (unsigned long)&req); + v4l2_format_t fmt = {0}; + + // Set Format. + fmt.type = type; + fmt.fmt.pix.width = width; + fmt.fmt.pix.height = height; + fmt.fmt.pix.field = V4L2_FIELD_ANY; + fmt.fmt.pix.pixelformat = pixformat; + ioctl(camera_dev.fd, VIDIOC_S_FMT, (unsigned long)&fmt); +} + +static void camera_start_streaming(enum v4l2_buf_type type) { + ioctl(camera_dev.fd, VIDIOC_STREAMON, (unsigned long)&type); +} + +static void camera_start_preview() { + camera_set_format(V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_PIX_FMT_UYVY, VIDEO_HSIZE_QVGA, VIDEO_VSIZE_QVGA); + + v4l2_buffer_t buf; + + memset(&buf, 0, sizeof(v4l2_buffer_t)); + buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; + buf.memory = V4L2_MEMORY_USERPTR; + ioctl(camera_dev.fd, VIDIOC_QBUF, (unsigned long)&buf); + + camera_start_streaming(V4L2_BUF_TYPE_VIDEO_CAPTURE); +} + +void common_hal_camera_construct(camera_obj_t *self, camera_imagesize_t size) { + if (camera_dev.fd < 0) { + if (video_initialize(camera_dev.devpath) < 0) { + mp_raise_ValueError(translate("Could not initialize Camera")); + } + camera_dev.fd = open(camera_dev.devpath, 0); + if (camera_dev.fd < 0) { + mp_raise_ValueError(translate("Could not initialize Camera")); + } + } + + uint16_t width, height; + + camera_size_to_width_and_height(size, &width, &height); + + self->size = size; + + // In SPRESENSE SDK, JPEG compression quality=80 by default. + // In such setting, the maximum actual measured size of JPEG image + // is about width * height * 2 / 9. + self->buffer_size = (size_t)(width * height * 2 / JPG_COMPRESS_RATIO);; + self->buffer = m_malloc(self->buffer_size, true); + if (self->buffer == NULL) { + mp_raise_msg(&mp_type_MemoryError, translate("Couldn't allocate picture buffer")); + } + self->picture_buffer = self->buffer; + while ((uint32_t)self->picture_buffer % SPRESENSE_CAMIMAGE_MEM_ALIGN != 0) { + self->picture_buffer++; + } + + camera_start_preview(); + + camera_set_format(V4L2_BUF_TYPE_STILL_CAPTURE, V4L2_PIX_FMT_JPEG, width, height); + + camera_start_streaming(V4L2_BUF_TYPE_STILL_CAPTURE); + + sleep(1); +} + +void common_hal_camera_deinit(camera_obj_t *self) { + if (common_hal_camera_deinited(self)) { + return; + } + + video_uninitialize(); + + m_free(self->buffer); + + close(camera_dev.fd); + camera_dev.fd = -1; +} + +bool common_hal_camera_deinited(camera_obj_t *self) { + return camera_dev.fd < 0; +} + +void common_hal_camera_take_picture(camera_obj_t *self) { + v4l2_buffer_t buf; + + memset(&buf, 0, sizeof(v4l2_buffer_t)); + buf.type = V4L2_BUF_TYPE_STILL_CAPTURE; + buf.memory = V4L2_MEMORY_USERPTR; + buf.m.userptr = (unsigned long)self->picture_buffer; + buf.length = self->buffer_size - SPRESENSE_CAMIMAGE_MEM_ALIGN; + ioctl(camera_dev.fd, VIDIOC_QBUF, (unsigned long)&buf); + + ioctl(camera_dev.fd, VIDIOC_TAKEPICT_START, 0); + + ioctl(camera_dev.fd, VIDIOC_DQBUF, (unsigned long)&buf); + + ioctl(camera_dev.fd, VIDIOC_TAKEPICT_STOP, false); + + self->picture_size = (size_t)buf.bytesused; +} + +uint8_t *common_hal_camera_get_picture_buffer(camera_obj_t *self) { + return self->picture_buffer; +} + +size_t common_hal_camera_get_picture_size(camera_obj_t *self) { + return self->picture_size; +} + +camera_imagesize_t common_hal_camera_get_size(camera_obj_t *self) { + return self->size; +} + +void common_hal_camera_set_size(camera_obj_t *self, camera_imagesize_t size) { + uint16_t width, height; + + camera_size_to_width_and_height(size, &width, &height); + + self->buffer_size = (size_t)(width * height * 2 / JPG_COMPRESS_RATIO);; + self->buffer = m_realloc(self->buffer, self->buffer_size); + if (self->buffer == NULL) { + mp_raise_msg(&mp_type_MemoryError, translate("Couldn't allocate picture buffer")); + } + self->picture_buffer = self->buffer; + while ((uint32_t)self->picture_buffer % SPRESENSE_CAMIMAGE_MEM_ALIGN != 0) { + self->picture_buffer++; + } + + camera_set_format(V4L2_BUF_TYPE_STILL_CAPTURE, V4L2_PIX_FMT_JPEG, width, height); +} diff --git a/ports/cxd56/common-hal/camera/Camera.h b/ports/cxd56/common-hal/camera/Camera.h new file mode 100644 index 000000000..1eb63ace1 --- /dev/null +++ b/ports/cxd56/common-hal/camera/Camera.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_CAMERA_CAMERA_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_CAMERA_CAMERA_H + +#include "py/obj.h" + +#include "shared-bindings/camera/ImageSize.h" + +typedef struct { + mp_obj_base_t base; + uint8_t *buffer; + size_t buffer_size; + uint8_t *picture_buffer; + size_t picture_size; + camera_imagesize_t size; +} camera_obj_t; + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_CAMERA_CAMERA_H diff --git a/ports/cxd56/common-hal/camera/ImageSize.c b/ports/cxd56/common-hal/camera/ImageSize.c new file mode 100644 index 000000000..e69de29bb diff --git a/ports/cxd56/common-hal/camera/__init__.c b/ports/cxd56/common-hal/camera/__init__.c new file mode 100644 index 000000000..bf38b5f2b --- /dev/null +++ b/ports/cxd56/common-hal/camera/__init__.c @@ -0,0 +1 @@ +// No camera module functions. diff --git a/ports/cxd56/mpconfigport.mk b/ports/cxd56/mpconfigport.mk index 914e0b37d..e1ffc79d0 100644 --- a/ports/cxd56/mpconfigport.mk +++ b/ports/cxd56/mpconfigport.mk @@ -11,6 +11,7 @@ MPY_TOOL_LONGINT_IMPL = -mlongint-impl=mpz CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_CAMERA = 1 CIRCUITPY_COUNTIO = 0 CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_FREQUENCYIO = 0 -- cgit v1.2.3 From 143a1ff94a5052465e3e65057b0ec4660120b2ed Mon Sep 17 00:00:00 2001 From: Kamil Tomaszewski Date: Fri, 11 Sep 2020 13:24:55 +0200 Subject: spresense: change the GC to do 32-byte blocks --- ports/cxd56/configs/circuitpython/defconfig | 1 - ports/cxd56/mpconfigport.h | 6 ++++-- ports/cxd56/spresense-exported-sdk | 2 +- ports/cxd56/supervisor/port.c | 12 ++++++++++-- 4 files changed, 15 insertions(+), 6 deletions(-) (limited to 'ports') diff --git a/ports/cxd56/configs/circuitpython/defconfig b/ports/cxd56/configs/circuitpython/defconfig index 268f7a68e..a97f821df 100644 --- a/ports/cxd56/configs/circuitpython/defconfig +++ b/ports/cxd56/configs/circuitpython/defconfig @@ -165,7 +165,6 @@ CONFIG_USBDEV=y CONFIG_USBDEV_DMA=y CONFIG_USBDEV_DUALSPEED=y CONFIG_USEC_PER_TICK=1000 -CONFIG_USERMAIN_STACKSIZE=1064960 CONFIG_USER_ENTRYPOINT="spresense_main" CONFIG_VIDEO_ISX012=y CONFIG_VIDEO_STREAM=y diff --git a/ports/cxd56/mpconfigport.h b/ports/cxd56/mpconfigport.h index df87946b9..27c82337b 100644 --- a/ports/cxd56/mpconfigport.h +++ b/ports/cxd56/mpconfigport.h @@ -27,13 +27,15 @@ #ifndef __INCLUDED_MPCONFIGPORT_H #define __INCLUDED_MPCONFIGPORT_H -#define MICROPY_PY_SYS_PLATFORM "CXD56" +#define MICROPY_PY_SYS_PLATFORM "CXD56" // 64kiB stack -#define CIRCUITPY_DEFAULT_STACK_SIZE 0x10000 +#define CIRCUITPY_DEFAULT_STACK_SIZE (0x10000) #include "py/circuitpy_mpconfig.h" +#define MICROPY_BYTES_PER_GC_BLOCK (32) + #define MICROPY_PORT_ROOT_POINTERS \ CIRCUITPY_COMMON_ROOT_POINTERS \ diff --git a/ports/cxd56/spresense-exported-sdk b/ports/cxd56/spresense-exported-sdk index c991d439f..752c4cd56 160000 --- a/ports/cxd56/spresense-exported-sdk +++ b/ports/cxd56/spresense-exported-sdk @@ -1 +1 @@ -Subproject commit c991d439fac9c23cfcac0da16fe8055f818d40a4 +Subproject commit 752c4cd56dd0a270a559c28272ceb61ddcb7806c diff --git a/ports/cxd56/supervisor/port.c b/ports/cxd56/supervisor/port.c index 7038ca478..6a32dc0f9 100644 --- a/ports/cxd56/supervisor/port.c +++ b/ports/cxd56/supervisor/port.c @@ -46,12 +46,20 @@ #include "common-hal/pwmio/PWMOut.h" #include "common-hal/busio/UART.h" +#define HEAP_SIZE (1000 * 1024) + +uint32_t* heap; +uint32_t heap_size; + safe_mode_t port_init(void) { boardctl(BOARDIOC_INIT, 0); // Wait until RTC is available while (g_rtc_enabled == false); + heap = memalign(32, HEAP_SIZE); + heap_size = HEAP_SIZE / sizeof(uint32_t); + if (board_requests_safe_mode()) { return USER_SAFE_MODE; } @@ -100,11 +108,11 @@ uint32_t *port_stack_get_top(void) { } uint32_t *port_heap_get_bottom(void) { - return port_stack_get_limit(); + return heap; } uint32_t *port_heap_get_top(void) { - return port_stack_get_top(); + return heap + heap_size; } extern uint32_t _ebss; -- cgit v1.2.3 From c2fc592c2ca7ec42374a50f9e33ac551bf846596 Mon Sep 17 00:00:00 2001 From: Kamil Tomaszewski Date: Fri, 11 Sep 2020 13:27:11 +0200 Subject: camera: Change API --- ports/cxd56/common-hal/camera/Camera.c | 144 ++++++++++++-------------- ports/cxd56/common-hal/camera/Camera.h | 9 +- ports/cxd56/common-hal/camera/ImageSize.c | 0 py/circuitpy_defns.mk | 2 +- shared-bindings/camera/Camera.c | 110 +++++++++++--------- shared-bindings/camera/Camera.h | 14 +-- shared-bindings/camera/ImageFormat.c | 93 +++++++++++++++++ shared-bindings/camera/ImageFormat.h | 49 +++++++++ shared-bindings/camera/ImageSize.c | 163 ------------------------------ shared-bindings/camera/ImageSize.h | 59 ----------- shared-bindings/camera/__init__.c | 2 +- 11 files changed, 278 insertions(+), 367 deletions(-) delete mode 100644 ports/cxd56/common-hal/camera/ImageSize.c create mode 100644 shared-bindings/camera/ImageFormat.c create mode 100644 shared-bindings/camera/ImageFormat.h delete mode 100644 shared-bindings/camera/ImageSize.c delete mode 100644 shared-bindings/camera/ImageSize.h (limited to 'ports') diff --git a/ports/cxd56/common-hal/camera/Camera.c b/ports/cxd56/common-hal/camera/Camera.c index 0c2252530..9376822c8 100644 --- a/ports/cxd56/common-hal/camera/Camera.c +++ b/ports/cxd56/common-hal/camera/Camera.c @@ -35,9 +35,6 @@ #include "shared-bindings/camera/Camera.h" -#define JPG_COMPRESS_RATIO (9) -#define SPRESENSE_CAMIMAGE_MEM_ALIGN (32) - typedef struct { const char* devpath; int fd; @@ -45,39 +42,36 @@ typedef struct { STATIC camera_dev_t camera_dev = {"/dev/video", -1}; -static void camera_size_to_width_and_height(camera_imagesize_t size, uint16_t *width, uint16_t *height) { - switch (size) { - case IMAGESIZE_320x240: - *height = VIDEO_VSIZE_QVGA; - *width = VIDEO_HSIZE_QVGA; - break; - case IMAGESIZE_640x320: - *height = VIDEO_VSIZE_VGA; - *width = VIDEO_HSIZE_VGA; - break; - case IMAGESIZE_1280x720: - *height = VIDEO_VSIZE_HD; - *width = VIDEO_HSIZE_HD; - break; - case IMAGESIZE_1280x960: - *height = VIDEO_VSIZE_QUADVGA; - *width = VIDEO_HSIZE_QUADVGA; - break; - case IMAGESIZE_1920x1080: - *height = VIDEO_VSIZE_FULLHD; - *width = VIDEO_HSIZE_FULLHD; - break; - case IMAGESIZE_2048x1536: - *height = VIDEO_VSIZE_3M; - *width = VIDEO_HSIZE_3M; - break; - case IMAGESIZE_2560x1920: - *height = VIDEO_VSIZE_5M; - *width = VIDEO_HSIZE_5M; - break; - default: - mp_raise_ValueError(translate("Size not supported")); - break; +static bool camera_check_width_and_height(uint16_t width, uint16_t height) { + if ((width == VIDEO_HSIZE_QVGA && height == VIDEO_VSIZE_QVGA) || + (width == VIDEO_HSIZE_VGA && height == VIDEO_VSIZE_VGA) || + (width == VIDEO_HSIZE_HD && height == VIDEO_VSIZE_HD) || + (width == VIDEO_HSIZE_QUADVGA && height == VIDEO_VSIZE_QUADVGA) || + (width == VIDEO_HSIZE_FULLHD && height == VIDEO_VSIZE_FULLHD) || + (width == VIDEO_HSIZE_3M && height == VIDEO_VSIZE_3M) || + (width == VIDEO_HSIZE_5M && height == VIDEO_VSIZE_5M)) { + return true; + } else { + return false; + } +} + +static bool camera_check_buffer_length(uint16_t width, uint16_t height, camera_imageformat_t format, size_t length) { + if (format == IMAGEFORMAT_JPG) { + // In SPRESENSE SDK, JPEG compression quality=80 by default. + // In such setting, the maximum actual measured size of JPEG image + // is about width * height * 2 / 9. + return length >= (size_t)(width * height * 2 / 9) ? true : false; + } else { + return false; + } +} + +static bool camera_check_format(camera_imageformat_t format) { + if (format == IMAGEFORMAT_JPG) { + return true; + } else { + return false; } } @@ -118,7 +112,9 @@ static void camera_start_preview() { camera_start_streaming(V4L2_BUF_TYPE_VIDEO_CAPTURE); } -void common_hal_camera_construct(camera_obj_t *self, camera_imagesize_t size) { +extern uint32_t _ebss; +extern uint32_t _stext; +void common_hal_camera_construct(camera_obj_t *self, uint16_t width, uint16_t height) { if (camera_dev.fd < 0) { if (video_initialize(camera_dev.devpath) < 0) { mp_raise_ValueError(translate("Could not initialize Camera")); @@ -129,25 +125,13 @@ void common_hal_camera_construct(camera_obj_t *self, camera_imagesize_t size) { } } - uint16_t width, height; - - camera_size_to_width_and_height(size, &width, &height); - - self->size = size; - - // In SPRESENSE SDK, JPEG compression quality=80 by default. - // In such setting, the maximum actual measured size of JPEG image - // is about width * height * 2 / 9. - self->buffer_size = (size_t)(width * height * 2 / JPG_COMPRESS_RATIO);; - self->buffer = m_malloc(self->buffer_size, true); - if (self->buffer == NULL) { - mp_raise_msg(&mp_type_MemoryError, translate("Couldn't allocate picture buffer")); - } - self->picture_buffer = self->buffer; - while ((uint32_t)self->picture_buffer % SPRESENSE_CAMIMAGE_MEM_ALIGN != 0) { - self->picture_buffer++; + if (!camera_check_width_and_height(width, height)) { + mp_raise_ValueError(translate("Size not supported")); } + self->width = width; + self->height = height; + camera_start_preview(); camera_set_format(V4L2_BUF_TYPE_STILL_CAPTURE, V4L2_PIX_FMT_JPEG, width, height); @@ -164,8 +148,6 @@ void common_hal_camera_deinit(camera_obj_t *self) { video_uninitialize(); - m_free(self->buffer); - close(camera_dev.fd); camera_dev.fd = -1; } @@ -174,14 +156,26 @@ bool common_hal_camera_deinited(camera_obj_t *self) { return camera_dev.fd < 0; } -void common_hal_camera_take_picture(camera_obj_t *self) { +size_t common_hal_camera_take_picture(camera_obj_t *self, uint8_t *buffer, size_t len, camera_imageformat_t format) { + if (!camera_check_width_and_height(self->width, self->height)) { + mp_raise_ValueError(translate("Size not supported")); + } + if (!camera_check_buffer_length(self->width, self->height, format, len)) { + mp_raise_ValueError(translate("Buffer is too small")); + } + if (!camera_check_format(format)) { + mp_raise_ValueError(translate("Format not supported")); + } + + camera_set_format(V4L2_BUF_TYPE_STILL_CAPTURE, V4L2_PIX_FMT_JPEG, self->width, self->height); + v4l2_buffer_t buf; memset(&buf, 0, sizeof(v4l2_buffer_t)); buf.type = V4L2_BUF_TYPE_STILL_CAPTURE; buf.memory = V4L2_MEMORY_USERPTR; - buf.m.userptr = (unsigned long)self->picture_buffer; - buf.length = self->buffer_size - SPRESENSE_CAMIMAGE_MEM_ALIGN; + buf.m.userptr = (unsigned long)buffer; + buf.length = len; ioctl(camera_dev.fd, VIDIOC_QBUF, (unsigned long)&buf); ioctl(camera_dev.fd, VIDIOC_TAKEPICT_START, 0); @@ -190,35 +184,21 @@ void common_hal_camera_take_picture(camera_obj_t *self) { ioctl(camera_dev.fd, VIDIOC_TAKEPICT_STOP, false); - self->picture_size = (size_t)buf.bytesused; + return (size_t)buf.bytesused; } -uint8_t *common_hal_camera_get_picture_buffer(camera_obj_t *self) { - return self->picture_buffer; +uint16_t common_hal_camera_get_width(camera_obj_t *self) { + return self->width; } -size_t common_hal_camera_get_picture_size(camera_obj_t *self) { - return self->picture_size; +void common_hal_camera_set_width(camera_obj_t *self, uint16_t width) { + self->width = width; } -camera_imagesize_t common_hal_camera_get_size(camera_obj_t *self) { - return self->size; +uint16_t common_hal_camera_get_height(camera_obj_t *self) { + return self->height; } -void common_hal_camera_set_size(camera_obj_t *self, camera_imagesize_t size) { - uint16_t width, height; - - camera_size_to_width_and_height(size, &width, &height); - - self->buffer_size = (size_t)(width * height * 2 / JPG_COMPRESS_RATIO);; - self->buffer = m_realloc(self->buffer, self->buffer_size); - if (self->buffer == NULL) { - mp_raise_msg(&mp_type_MemoryError, translate("Couldn't allocate picture buffer")); - } - self->picture_buffer = self->buffer; - while ((uint32_t)self->picture_buffer % SPRESENSE_CAMIMAGE_MEM_ALIGN != 0) { - self->picture_buffer++; - } - - camera_set_format(V4L2_BUF_TYPE_STILL_CAPTURE, V4L2_PIX_FMT_JPEG, width, height); +void common_hal_camera_set_height(camera_obj_t *self, uint16_t height) { + self->height = height; } diff --git a/ports/cxd56/common-hal/camera/Camera.h b/ports/cxd56/common-hal/camera/Camera.h index 1eb63ace1..11fc10208 100644 --- a/ports/cxd56/common-hal/camera/Camera.h +++ b/ports/cxd56/common-hal/camera/Camera.h @@ -29,15 +29,10 @@ #include "py/obj.h" -#include "shared-bindings/camera/ImageSize.h" - typedef struct { mp_obj_base_t base; - uint8_t *buffer; - size_t buffer_size; - uint8_t *picture_buffer; - size_t picture_size; - camera_imagesize_t size; + uint16_t width; + uint16_t height; } camera_obj_t; #endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_CAMERA_CAMERA_H diff --git a/ports/cxd56/common-hal/camera/ImageSize.c b/ports/cxd56/common-hal/camera/ImageSize.c deleted file mode 100644 index e69de29bb..000000000 diff --git a/py/circuitpy_defns.mk b/py/circuitpy_defns.mk index f72c821e5..6e98af868 100644 --- a/py/circuitpy_defns.mk +++ b/py/circuitpy_defns.mk @@ -315,7 +315,6 @@ SRC_COMMON_HAL_ALL = \ busio/__init__.c \ camera/__init__.c \ camera/Camera.c \ - camera/ImageSize.c \ countio/Counter.c \ countio/__init__.c \ digitalio/DigitalInOut.c \ @@ -386,6 +385,7 @@ $(filter $(SRC_PATTERNS), \ _bleio/Attribute.c \ _bleio/ScanEntry.c \ _eve/__init__.c \ + camera/ImageFormat.c \ digitalio/Direction.c \ digitalio/DriveMode.c \ digitalio/Pull.c \ diff --git a/shared-bindings/camera/Camera.c b/shared-bindings/camera/Camera.c index 3855fed3c..3b839d802 100644 --- a/shared-bindings/camera/Camera.c +++ b/shared-bindings/camera/Camera.c @@ -48,37 +48,38 @@ //| vfs = storage.VfsFat(sd) //| storage.mount(vfs, '/sd') //| -//| cam = camera.Camera(camera.ImageSize.IMAGE_SIZE_1920x1080) +//| cam = camera.Camera(1920, 1080) //| +//| buffer = bytearray(512 * 1024) //| file = open("/sd/image.jpg","wb") -//| cam.take_picture() -//| file.write(cam.picture) +//| size = cam.take_picture() +//| file.write(buffer, size) //| file.close()""" //| -//| def __init__(self, ): +//| def __init__(self, width: int, height: int) -> None: //| """Initialize camera. //| -//| :param camera.ImageSize size: image size""" +//| :param int width: Width in pixels +//| :param int height: Height in pixels""" //| ... //| STATIC mp_obj_t camera_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { camera_obj_t *self = m_new_obj(camera_obj_t); self->base.type = &camera_type; - enum { ARG_size }; + enum { ARG_width, ARG_height }; static const mp_arg_t allowed_args[] = { - { MP_QSTR_size, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_width, MP_ARG_REQUIRED | MP_ARG_INT }, + { MP_QSTR_height, MP_ARG_REQUIRED | MP_ARG_INT }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - camera_imagesize_t size = camera_imagesize_obj_to_type(args[ARG_size].u_obj); - - common_hal_camera_construct(self, size); + common_hal_camera_construct(self, args[ARG_width].u_int, args[ARG_height].u_int); return MP_OBJ_FROM_PTR(self); } -//| def deinit(self, ) -> Any: +//| def deinit(self) -> None: //| """De-initialize camera.""" //| ... //| @@ -95,69 +96,84 @@ STATIC void check_for_deinit(camera_obj_t *self) { } } -//| def take_picture(self, ) -> Any: -//| """Take picture.""" +//| def take_picture(self, buf: WriteableBuffer, format: ImageFormat) -> int: +//| """Take picture and save to ``buf`` in the given ``format`` +//| +//| :return: the size of the picture taken +//| :rtype: int""" //| ... //| -STATIC mp_obj_t camera_obj_take_picture(mp_obj_t self_in) { - camera_obj_t *self = MP_OBJ_TO_PTR(self_in); +STATIC mp_obj_t camera_obj_take_picture(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_buffer, ARG_format }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_buffer, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_format, MP_ARG_REQUIRED | MP_ARG_OBJ }, + }; + camera_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); check_for_deinit(self); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - common_hal_camera_take_picture(self); - return mp_const_none; + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(args[ARG_buffer].u_obj, &bufinfo, MP_BUFFER_WRITE); + + camera_imageformat_t format = camera_imageformat_obj_to_type(args[ARG_format].u_obj); + + return MP_OBJ_NEW_SMALL_INT(common_hal_camera_take_picture(self, (uint8_t *)bufinfo.buf, bufinfo.len, format)); } -MP_DEFINE_CONST_FUN_OBJ_1(camera_take_picture_obj, camera_obj_take_picture); +MP_DEFINE_CONST_FUN_OBJ_KW(camera_take_picture_obj, 3, camera_obj_take_picture); -//| picture: Any = ... -//| """Image buffer.""" +//| width: int +//| """Image width in pixels.""" //| -STATIC mp_obj_t camera_obj_get_picture(mp_obj_t self_in) { +STATIC mp_obj_t camera_obj_get_width(mp_obj_t self_in) { + camera_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_camera_get_width(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(camera_get_width_obj, camera_obj_get_width); + +STATIC mp_obj_t camera_obj_set_width(mp_obj_t self_in, mp_obj_t value) { camera_obj_t *self = MP_OBJ_TO_PTR(self_in); check_for_deinit(self); - uint8_t *buffer = common_hal_camera_get_picture_buffer(self); - size_t size = common_hal_camera_get_picture_size(self); + common_hal_camera_set_width(self, mp_obj_get_int(value)); - return mp_obj_new_bytearray_by_ref(size, buffer); + return mp_const_none; } -MP_DEFINE_CONST_FUN_OBJ_1(camera_get_picture_obj, camera_obj_get_picture); +MP_DEFINE_CONST_FUN_OBJ_2(camera_set_width_obj, camera_obj_set_width); -const mp_obj_property_t camera_picture_obj = { +const mp_obj_property_t camera_width_obj = { .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&camera_get_picture_obj, - (mp_obj_t)&mp_const_none_obj, + .proxy = {(mp_obj_t)&camera_get_width_obj, + (mp_obj_t)&camera_set_width_obj, (mp_obj_t)&mp_const_none_obj}, }; -//| size: Any = ... -//| """Image size.""" +//| height: int +//| """Image height in pixels.""" //| -STATIC mp_obj_t camera_obj_get_size(mp_obj_t self_in) { +STATIC mp_obj_t camera_obj_get_height(mp_obj_t self_in) { camera_obj_t *self = MP_OBJ_TO_PTR(self_in); check_for_deinit(self); - return camera_imagesize_type_to_obj(common_hal_camera_get_size(self)); + return MP_OBJ_NEW_SMALL_INT(common_hal_camera_get_height(self)); } -MP_DEFINE_CONST_FUN_OBJ_1(camera_get_size_obj, camera_obj_get_size); +MP_DEFINE_CONST_FUN_OBJ_1(camera_get_height_obj, camera_obj_get_height); -STATIC mp_obj_t camera_obj_set_size(mp_obj_t self_in, mp_obj_t value) { +STATIC mp_obj_t camera_obj_set_height(mp_obj_t self_in, mp_obj_t value) { camera_obj_t *self = MP_OBJ_TO_PTR(self_in); check_for_deinit(self); - camera_imagesize_t size = camera_imagesize_obj_to_type(value); - if (size == IMAGESIZE_NONE) { - mp_raise_ValueError(translate("Invalid image size.")); - } - - common_hal_camera_set_size(self, size); + common_hal_camera_set_height(self, mp_obj_get_int(value)); return mp_const_none; } -MP_DEFINE_CONST_FUN_OBJ_2(camera_set_size_obj, camera_obj_set_size); +MP_DEFINE_CONST_FUN_OBJ_2(camera_set_height_obj, camera_obj_set_height); -const mp_obj_property_t camera_size_obj = { +const mp_obj_property_t camera_height_obj = { .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&camera_get_size_obj, - (mp_obj_t)&camera_set_size_obj, + .proxy = {(mp_obj_t)&camera_get_height_obj, + (mp_obj_t)&camera_set_height_obj, (mp_obj_t)&mp_const_none_obj}, }; @@ -165,14 +181,14 @@ STATIC const mp_rom_map_elem_t camera_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&camera_deinit_obj) }, { MP_ROM_QSTR(MP_QSTR_take_picture), MP_ROM_PTR(&camera_take_picture_obj) }, - { MP_ROM_QSTR(MP_QSTR_picture), MP_ROM_PTR(&camera_picture_obj) }, - { MP_ROM_QSTR(MP_QSTR_size), MP_ROM_PTR(&camera_size_obj) }, + { MP_ROM_QSTR(MP_QSTR_width), MP_ROM_PTR(&camera_width_obj) }, + { MP_ROM_QSTR(MP_QSTR_height), MP_ROM_PTR(&camera_height_obj) }, }; STATIC MP_DEFINE_CONST_DICT(camera_locals_dict, camera_locals_dict_table); const mp_obj_type_t camera_type = { { &mp_type_type }, - .name = MP_QSTR_GNSS, + .name = MP_QSTR_Camera, .make_new = camera_make_new, .locals_dict = (mp_obj_dict_t*)&camera_locals_dict, }; diff --git a/shared-bindings/camera/Camera.h b/shared-bindings/camera/Camera.h index e70d2493e..7ef13cd07 100644 --- a/shared-bindings/camera/Camera.h +++ b/shared-bindings/camera/Camera.h @@ -28,18 +28,18 @@ #define MICROPY_INCLUDED_SHARED_BINDINGS_CAMERA_CAMERA_H #include "common-hal/camera/Camera.h" -#include "shared-bindings/camera/ImageSize.h" +#include "shared-bindings/camera/ImageFormat.h" extern const mp_obj_type_t camera_type; -void common_hal_camera_construct(camera_obj_t *self, camera_imagesize_t size); +void common_hal_camera_construct(camera_obj_t *self, uint16_t width, uint16_t height); void common_hal_camera_deinit(camera_obj_t *self); bool common_hal_camera_deinited(camera_obj_t *self); -void common_hal_camera_take_picture(camera_obj_t *self); +size_t common_hal_camera_take_picture(camera_obj_t *self, uint8_t *buffer, size_t len, camera_imageformat_t format); -uint8_t* common_hal_camera_get_picture_buffer(camera_obj_t *self); -size_t common_hal_camera_get_picture_size(camera_obj_t *self); -camera_imagesize_t common_hal_camera_get_size(camera_obj_t *self); -void common_hal_camera_set_size(camera_obj_t *self, camera_imagesize_t size); +uint16_t common_hal_camera_get_width(camera_obj_t *self); +void common_hal_camera_set_width(camera_obj_t *self, uint16_t width); +uint16_t common_hal_camera_get_height(camera_obj_t *self); +void common_hal_camera_set_height(camera_obj_t *self, uint16_t height); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_CAMERA_CAMERA_H diff --git a/shared-bindings/camera/ImageFormat.c b/shared-bindings/camera/ImageFormat.c new file mode 100644 index 000000000..d4bdddc56 --- /dev/null +++ b/shared-bindings/camera/ImageFormat.c @@ -0,0 +1,93 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/camera/ImageFormat.h" + +//| class ImageFormat: +//| """Image format""" +//| +//| def __init__(self) -> None: +//| """Enum-like class to define the image format.""" +//| +//| JPG: ImageFormat +//| """JPG format.""" +//| +//| RGB565: ImageFormat +//| """RGB565 format.""" +//| +const mp_obj_type_t camera_imageformat_type; + +const camera_imageformat_obj_t camera_imageformat_jpg_obj = { + { &camera_imageformat_type }, +}; + +const camera_imageformat_obj_t camera_imageformat_rgb565_obj = { + { &camera_imageformat_type }, +}; + +camera_imageformat_t camera_imageformat_obj_to_type(mp_obj_t obj) { + if (obj == MP_ROM_PTR(&camera_imageformat_jpg_obj)) { + return IMAGEFORMAT_JPG; + } else if (obj == MP_ROM_PTR(&camera_imageformat_rgb565_obj)) { + return IMAGEFORMAT_RGB565; + } + return IMAGEFORMAT_NONE; +} + +mp_obj_t camera_imageformat_type_to_obj(camera_imageformat_t format) { + switch (format) { + case IMAGEFORMAT_JPG: + return (mp_obj_t)MP_ROM_PTR(&camera_imageformat_jpg_obj); + case IMAGEFORMAT_RGB565: + return (mp_obj_t)MP_ROM_PTR(&camera_imageformat_rgb565_obj); + case IMAGEFORMAT_NONE: + default: + return (mp_obj_t)MP_ROM_PTR(&mp_const_none_obj); + } +} + +STATIC const mp_rom_map_elem_t camera_imageformat_locals_dict_table[] = { + {MP_ROM_QSTR(MP_QSTR_JPG), MP_ROM_PTR(&camera_imageformat_jpg_obj)}, + {MP_ROM_QSTR(MP_QSTR_RGB565), MP_ROM_PTR(&camera_imageformat_rgb565_obj)}, +}; +STATIC MP_DEFINE_CONST_DICT(camera_imageformat_locals_dict, camera_imageformat_locals_dict_table); + +STATIC void camera_imageformat_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { + qstr format = MP_QSTR_None; + if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&camera_imageformat_jpg_obj)) { + format = MP_QSTR_JPG; + } else if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&camera_imageformat_rgb565_obj)) { + format = MP_QSTR_RGB565; + } + mp_printf(print, "%q.%q.%q", MP_QSTR_camera, MP_QSTR_ImageSize, format); +} + +const mp_obj_type_t camera_imageformat_type = { + { &mp_type_type }, + .name = MP_QSTR_ImageFormat, + .print = camera_imageformat_print, + .locals_dict = (mp_obj_t)&camera_imageformat_locals_dict, +}; diff --git a/shared-bindings/camera/ImageFormat.h b/shared-bindings/camera/ImageFormat.h new file mode 100644 index 000000000..8abc88438 --- /dev/null +++ b/shared-bindings/camera/ImageFormat.h @@ -0,0 +1,49 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_CAMERA_IMAGEFORMAT_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_CAMERA_IMAGEFORMAT_H + +#include "py/obj.h" + +typedef enum { + IMAGEFORMAT_NONE, + IMAGEFORMAT_JPG, + IMAGEFORMAT_RGB565, +} camera_imageformat_t; + +const mp_obj_type_t camera_imageformat_type; + +camera_imageformat_t camera_imageformat_obj_to_type(mp_obj_t obj); +mp_obj_t camera_imageformat_type_to_obj(camera_imageformat_t mode); + +typedef struct { + mp_obj_base_t base; +} camera_imageformat_obj_t; +extern const camera_imageformat_obj_t camera_imageformat_jpg_obj; +extern const camera_imageformat_obj_t camera_imageformat_rgb565_obj; + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_CAMERA_IMAGEFORMAT_H diff --git a/shared-bindings/camera/ImageSize.c b/shared-bindings/camera/ImageSize.c deleted file mode 100644 index bfa01814d..000000000 --- a/shared-bindings/camera/ImageSize.c +++ /dev/null @@ -1,163 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright 2020 Sony Semiconductor Solutions Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "shared-bindings/camera/ImageSize.h" - -//| class ImageSize: -//| """Image size""" -//| -//| def __init__(self) -> None: -//| """Enum-like class to define the image size.""" -//| -//| IMAGE_SIZE_320x240: ImageSize -//| """Image size 320x240.""" -//| -//| IMAGE_SIZE_640x480: ImageSize -//| """Image size 640x480.""" -//| -//| IMAGE_SIZE_1280x720: ImageSize -//| """Image size 1280x720.""" -//| -//| IMAGE_SIZE_1280x960: ImageSize -//| """Image size 1280x960.""" -//| -//| IMAGE_SIZE_1920x1080: ImageSize -//| """Image size 1920x1080.""" -//| -//| IMAGE_SIZE_2048x1536: ImageSize -//| """Image size 2048x1536.""" -//| -//| IMAGE_SIZE_2560x1920: ImageSize -//| """Image size 2560x1920.""" -//| -const mp_obj_type_t camera_imagesize_type; - -const camera_imagesize_obj_t camera_imagesize_320x240_obj = { - { &camera_imagesize_type }, -}; - -const camera_imagesize_obj_t camera_imagesize_640x320_obj = { - { &camera_imagesize_type }, -}; - -const camera_imagesize_obj_t camera_imagesize_1280x720_obj = { - { &camera_imagesize_type }, -}; - -const camera_imagesize_obj_t camera_imagesize_1280x960_obj = { - { &camera_imagesize_type }, -}; - -const camera_imagesize_obj_t camera_imagesize_1920x1080_obj = { - { &camera_imagesize_type }, -}; - -const camera_imagesize_obj_t camera_imagesize_2048x1536_obj = { - { &camera_imagesize_type }, -}; - -const camera_imagesize_obj_t camera_imagesize_2560x1920_obj = { - { &camera_imagesize_type }, -}; - -camera_imagesize_t camera_imagesize_obj_to_type(mp_obj_t obj) { - if (obj == MP_ROM_PTR(&camera_imagesize_320x240_obj)) { - return IMAGESIZE_320x240; - } else if (obj == MP_ROM_PTR(&camera_imagesize_640x320_obj)) { - return IMAGESIZE_640x320; - } else if (obj == MP_ROM_PTR(&camera_imagesize_1280x720_obj)) { - return IMAGESIZE_1280x720; - } else if (obj == MP_ROM_PTR(&camera_imagesize_1280x960_obj)) { - return IMAGESIZE_1280x960; - } else if (obj == MP_ROM_PTR(&camera_imagesize_1920x1080_obj)) { - return IMAGESIZE_1920x1080; - } else if (obj == MP_ROM_PTR(&camera_imagesize_2048x1536_obj)) { - return IMAGESIZE_2048x1536; - } else if (obj == MP_ROM_PTR(&camera_imagesize_2560x1920_obj)) { - return IMAGESIZE_2560x1920; - } - return IMAGESIZE_NONE; -} - -mp_obj_t camera_imagesize_type_to_obj(camera_imagesize_t size) { - switch (size) { - case IMAGESIZE_320x240: - return (mp_obj_t)MP_ROM_PTR(&camera_imagesize_320x240_obj); - case IMAGESIZE_640x320: - return (mp_obj_t)MP_ROM_PTR(&camera_imagesize_640x320_obj); - case IMAGESIZE_1280x720: - return (mp_obj_t)MP_ROM_PTR(&camera_imagesize_1280x720_obj); - case IMAGESIZE_1280x960: - return (mp_obj_t)MP_ROM_PTR(&camera_imagesize_1280x960_obj); - case IMAGESIZE_1920x1080: - return (mp_obj_t)MP_ROM_PTR(&camera_imagesize_1920x1080_obj); - case IMAGESIZE_2048x1536: - return (mp_obj_t)MP_ROM_PTR(&camera_imagesize_2048x1536_obj); - case IMAGESIZE_2560x1920: - return (mp_obj_t)MP_ROM_PTR(&camera_imagesize_2560x1920_obj); - case IMAGESIZE_NONE: - default: - return (mp_obj_t)MP_ROM_PTR(&mp_const_none_obj); - } -} - -STATIC const mp_rom_map_elem_t camera_imagesize_locals_dict_table[] = { - {MP_ROM_QSTR(MP_QSTR_IMAGE_SIZE_320x240), MP_ROM_PTR(&camera_imagesize_320x240_obj)}, - {MP_ROM_QSTR(MP_QSTR_IMAGE_SIZE_640x320), MP_ROM_PTR(&camera_imagesize_640x320_obj)}, - {MP_ROM_QSTR(MP_QSTR_IMAGE_SIZE_1280x720), MP_ROM_PTR(&camera_imagesize_1280x720_obj)}, - {MP_ROM_QSTR(MP_QSTR_IMAGE_SIZE_1280x960), MP_ROM_PTR(&camera_imagesize_1280x960_obj)}, - {MP_ROM_QSTR(MP_QSTR_IMAGE_SIZE_1920x1080), MP_ROM_PTR(&camera_imagesize_1920x1080_obj)}, - {MP_ROM_QSTR(MP_QSTR_IMAGE_SIZE_2048x1536), MP_ROM_PTR(&camera_imagesize_2048x1536_obj)}, - {MP_ROM_QSTR(MP_QSTR_IMAGE_SIZE_2560x1920), MP_ROM_PTR(&camera_imagesize_2560x1920_obj)}, -}; -STATIC MP_DEFINE_CONST_DICT(camera_imagesize_locals_dict, camera_imagesize_locals_dict_table); - -STATIC void camera_imagesize_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - qstr size = MP_QSTR_None; - if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&camera_imagesize_320x240_obj)) { - size = MP_QSTR_IMAGE_SIZE_320x240; - } else if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&camera_imagesize_640x320_obj)) { - size = MP_QSTR_IMAGE_SIZE_640x320; - } else if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&camera_imagesize_1280x720_obj)) { - size = MP_QSTR_IMAGE_SIZE_1280x720; - } else if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&camera_imagesize_1280x960_obj)) { - size = MP_QSTR_IMAGE_SIZE_1280x960; - } else if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&camera_imagesize_1920x1080_obj)) { - size = MP_QSTR_IMAGE_SIZE_1920x1080; - } else if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&camera_imagesize_2048x1536_obj)) { - size = MP_QSTR_IMAGE_SIZE_2048x1536; - } else if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&camera_imagesize_2560x1920_obj)) { - size = MP_QSTR_IMAGE_SIZE_2560x1920; - } - mp_printf(print, "%q.%q.%q", MP_QSTR_camera, MP_QSTR_ImageSize, size); -} - -const mp_obj_type_t camera_imagesize_type = { - { &mp_type_type }, - .name = MP_QSTR_ImageSize, - .print = camera_imagesize_print, - .locals_dict = (mp_obj_t)&camera_imagesize_locals_dict, -}; diff --git a/shared-bindings/camera/ImageSize.h b/shared-bindings/camera/ImageSize.h deleted file mode 100644 index 3fe624e06..000000000 --- a/shared-bindings/camera/ImageSize.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright 2020 Sony Semiconductor Solutions Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_CAMERA_IMAGESIZE_H -#define MICROPY_INCLUDED_SHARED_BINDINGS_CAMERA_IMAGESIZE_H - -#include "py/obj.h" - -typedef enum { - IMAGESIZE_NONE, - IMAGESIZE_320x240, - IMAGESIZE_640x320, - IMAGESIZE_1280x720, - IMAGESIZE_1280x960, - IMAGESIZE_1920x1080, - IMAGESIZE_2048x1536, - IMAGESIZE_2560x1920, -} camera_imagesize_t; - -const mp_obj_type_t camera_imagesize_type; - -camera_imagesize_t camera_imagesize_obj_to_type(mp_obj_t obj); -mp_obj_t camera_imagesize_type_to_obj(camera_imagesize_t mode); - -typedef struct { - mp_obj_base_t base; -} camera_imagesize_obj_t; -extern const camera_imagesize_obj_t camera_imagesize_320x240_obj; -extern const camera_imagesize_obj_t camera_imagesize_640x320_obj; -extern const camera_imagesize_obj_t camera_imagesize_1280x720_obj; -extern const camera_imagesize_obj_t camera_imagesize_1280x960_obj; -extern const camera_imagesize_obj_t camera_imagesize_1920x1080_obj; -extern const camera_imagesize_obj_t camera_imagesize_2048x1536_obj; -extern const camera_imagesize_obj_t camera_imagesize_2560x1920_obj; - -#endif // MICROPY_INCLUDED_SHARED_BINDINGS_CAMERA_IMAGESIZE_H diff --git a/shared-bindings/camera/__init__.c b/shared-bindings/camera/__init__.c index 3398d1ade..28cf7df57 100644 --- a/shared-bindings/camera/__init__.c +++ b/shared-bindings/camera/__init__.c @@ -39,7 +39,7 @@ STATIC const mp_rom_map_elem_t camera_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_Camera), MP_ROM_PTR(&camera_type) }, // Enum-like Classes. - { MP_ROM_QSTR(MP_QSTR_ImageSize), MP_ROM_PTR(&camera_imagesize_type) }, + { MP_ROM_QSTR(MP_QSTR_ImageSize), MP_ROM_PTR(&camera_imageformat_type) }, }; STATIC MP_DEFINE_CONST_DICT(camera_module_globals, camera_module_globals_table); -- cgit v1.2.3 From ce7ee58e92eca840f75c2fcf885fe862f1ebec13 Mon Sep 17 00:00:00 2001 From: Kamil Tomaszewski Date: Mon, 14 Sep 2020 12:55:53 +0200 Subject: camera: Update camera module --- ports/cxd56/common-hal/camera/Camera.c | 38 ++++++++++++++++++++-------------- ports/cxd56/supervisor/port.c | 8 ++++--- shared-bindings/camera/Camera.c | 4 ++-- shared-bindings/camera/__init__.c | 2 +- 4 files changed, 30 insertions(+), 22 deletions(-) (limited to 'ports') diff --git a/ports/cxd56/common-hal/camera/Camera.c b/ports/cxd56/common-hal/camera/Camera.c index 9376822c8..a4e197bf3 100644 --- a/ports/cxd56/common-hal/camera/Camera.c +++ b/ports/cxd56/common-hal/camera/Camera.c @@ -42,18 +42,28 @@ typedef struct { STATIC camera_dev_t camera_dev = {"/dev/video", -1}; +typedef struct { + uint16_t width; + uint16_t height; +} image_size_t; + +STATIC const image_size_t image_size_table[] = { + { VIDEO_HSIZE_QVGA, VIDEO_VSIZE_QVGA }, + { VIDEO_HSIZE_VGA, VIDEO_VSIZE_VGA }, + { VIDEO_HSIZE_HD, VIDEO_VSIZE_HD }, + { VIDEO_HSIZE_QUADVGA, VIDEO_VSIZE_QUADVGA }, + { VIDEO_HSIZE_FULLHD, VIDEO_VSIZE_FULLHD }, + { VIDEO_HSIZE_3M, VIDEO_VSIZE_3M }, + { VIDEO_HSIZE_5M, VIDEO_VSIZE_5M }, +}; + static bool camera_check_width_and_height(uint16_t width, uint16_t height) { - if ((width == VIDEO_HSIZE_QVGA && height == VIDEO_VSIZE_QVGA) || - (width == VIDEO_HSIZE_VGA && height == VIDEO_VSIZE_VGA) || - (width == VIDEO_HSIZE_HD && height == VIDEO_VSIZE_HD) || - (width == VIDEO_HSIZE_QUADVGA && height == VIDEO_VSIZE_QUADVGA) || - (width == VIDEO_HSIZE_FULLHD && height == VIDEO_VSIZE_FULLHD) || - (width == VIDEO_HSIZE_3M && height == VIDEO_VSIZE_3M) || - (width == VIDEO_HSIZE_5M && height == VIDEO_VSIZE_5M)) { - return true; - } else { - return false; + for (int i = 0; i < MP_ARRAY_SIZE(image_size_table); i++) { + if (image_size_table[i].width == width && image_size_table[i].height == height) { + return true; + } } + return false; } static bool camera_check_buffer_length(uint16_t width, uint16_t height, camera_imageformat_t format, size_t length) { @@ -61,18 +71,14 @@ static bool camera_check_buffer_length(uint16_t width, uint16_t height, camera_i // In SPRESENSE SDK, JPEG compression quality=80 by default. // In such setting, the maximum actual measured size of JPEG image // is about width * height * 2 / 9. - return length >= (size_t)(width * height * 2 / 9) ? true : false; + return length >= (size_t)(width * height * 2 / 9); } else { return false; } } static bool camera_check_format(camera_imageformat_t format) { - if (format == IMAGEFORMAT_JPG) { - return true; - } else { - return false; - } + return format == IMAGEFORMAT_JPG; } static void camera_set_format(enum v4l2_buf_type type, uint32_t pixformat, uint16_t width, uint16_t height) { diff --git a/ports/cxd56/supervisor/port.c b/ports/cxd56/supervisor/port.c index 6a32dc0f9..6164f7411 100644 --- a/ports/cxd56/supervisor/port.c +++ b/ports/cxd56/supervisor/port.c @@ -46,7 +46,7 @@ #include "common-hal/pwmio/PWMOut.h" #include "common-hal/busio/UART.h" -#define HEAP_SIZE (1000 * 1024) +#define SPRESENSE_MEM_ALIGN (32) uint32_t* heap; uint32_t heap_size; @@ -57,8 +57,10 @@ safe_mode_t port_init(void) { // Wait until RTC is available while (g_rtc_enabled == false); - heap = memalign(32, HEAP_SIZE); - heap_size = HEAP_SIZE / sizeof(uint32_t); + heap = memalign(SPRESENSE_MEM_ALIGN, 128 * 1024); + uint32_t size = CONFIG_RAM_START + CONFIG_RAM_SIZE - (uint32_t)heap - 2 * SPRESENSE_MEM_ALIGN; + heap = realloc(heap, size); + heap_size = size / sizeof(uint32_t); if (board_requests_safe_mode()) { return USER_SAFE_MODE; diff --git a/shared-bindings/camera/Camera.c b/shared-bindings/camera/Camera.c index 3b839d802..5fe54e429 100644 --- a/shared-bindings/camera/Camera.c +++ b/shared-bindings/camera/Camera.c @@ -52,7 +52,7 @@ //| //| buffer = bytearray(512 * 1024) //| file = open("/sd/image.jpg","wb") -//| size = cam.take_picture() +//| size = cam.take_picture(buffer, camera.ImageFormat.JPG) //| file.write(buffer, size) //| file.close()""" //| @@ -99,7 +99,7 @@ STATIC void check_for_deinit(camera_obj_t *self) { //| def take_picture(self, buf: WriteableBuffer, format: ImageFormat) -> int: //| """Take picture and save to ``buf`` in the given ``format`` //| -//| :return: the size of the picture taken +//| :return: the number of bytes written into buf //| :rtype: int""" //| ... //| diff --git a/shared-bindings/camera/__init__.c b/shared-bindings/camera/__init__.c index 28cf7df57..080516d51 100644 --- a/shared-bindings/camera/__init__.c +++ b/shared-bindings/camera/__init__.c @@ -39,7 +39,7 @@ STATIC const mp_rom_map_elem_t camera_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_Camera), MP_ROM_PTR(&camera_type) }, // Enum-like Classes. - { MP_ROM_QSTR(MP_QSTR_ImageSize), MP_ROM_PTR(&camera_imageformat_type) }, + { MP_ROM_QSTR(MP_QSTR_ImageFormat), MP_ROM_PTR(&camera_imageformat_type) }, }; STATIC MP_DEFINE_CONST_DICT(camera_module_globals, camera_module_globals_table); -- cgit v1.2.3 From c014ac308903f6f0224c667624609f02a624bac0 Mon Sep 17 00:00:00 2001 From: DavePutz Date: Mon, 14 Sep 2020 10:54:57 -0500 Subject: Reworked check for input taking too long --- ports/atmel-samd/common-hal/pulseio/PulseIn.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.c b/ports/atmel-samd/common-hal/pulseio/PulseIn.c index 27bf842d5..9a9bf57a0 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.c +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -51,6 +51,7 @@ static uint8_t refcount = 0; static uint8_t pulsein_tc_index = 0xff; volatile static uint32_t overflow_count = 0; +volatile static uint32_t start_overflow = 0; void pulsein_timer_interrupt_handler(uint8_t index) { if (index != pulsein_tc_index) return; @@ -91,6 +92,9 @@ void pulsein_interrupt_handler(uint8_t channel) { uint32_t current_count = tc->COUNT16.COUNT.reg; pulseio_pulsein_obj_t* self = get_eic_channel_data(channel); + if (self->len == 0 ) { + start_overflow = overflow_count; + } if (self->first_edge) { self->first_edge = false; pulsein_set_config(self, false); @@ -110,16 +114,21 @@ void pulsein_interrupt_handler(uint8_t channel) { if (total_diff < duration) { duration = total_diff; } + //check if the input is taking too long, 15 timer overflows is approx 1 second + if (current_overflow - start_overflow > 15) { + self->errored_too_fast = true; + common_hal_pulseio_pulsein_pause(self); + common_hal_mcu_enable_interrupts(); + return; + } uint16_t i = (self->start + self->len) % self->maxlen; + self->buffer[i] = duration; if (self->len < self->maxlen) { self->len++; } else { - self->errored_too_fast = true; - common_hal_mcu_enable_interrupts(); - return; + self->start++; } - self->buffer[i] = duration; } self->last_overflow = current_overflow; self->last_count = current_count; @@ -300,6 +309,7 @@ uint16_t common_hal_pulseio_pulsein_popleft(pulseio_pulsein_obj_t* self) { mp_raise_IndexError(translate("pop from an empty PulseIn")); } if (self->errored_too_fast) { + self->errored_too_fast = 0; mp_raise_RuntimeError(translate("Input taking too long")); } common_hal_mcu_disable_interrupts(); -- cgit v1.2.3 From e504438fd223c9bb0b9d6950a699f1283ece137c Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Mon, 14 Sep 2020 11:58:13 -0400 Subject: Remove unlicensed file, fix reset pin type check --- ports/esp32s2/boards/esp32s2-saola-1.cfg | 41 -------------------------------- shared-module/displayio/I2CDisplay.c | 4 ++-- 2 files changed, 2 insertions(+), 43 deletions(-) delete mode 100644 ports/esp32s2/boards/esp32s2-saola-1.cfg (limited to 'ports') diff --git a/ports/esp32s2/boards/esp32s2-saola-1.cfg b/ports/esp32s2/boards/esp32s2-saola-1.cfg deleted file mode 100644 index 677290757..000000000 --- a/ports/esp32s2/boards/esp32s2-saola-1.cfg +++ /dev/null @@ -1,41 +0,0 @@ -# The ESP32-S2 only supports JTAG. -transport select jtag -adapter_khz 1000 - -# Source the ESP common configuration file -source [find target/esp_common.cfg] - -if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { - set _CHIPNAME esp32s2 -} - -if { [info exists CPUTAPID] } { - set _CPUTAPID $CPUTAPID -} else { - set _CPUTAPID 0x120034e5 -} - -set _TARGETNAME $_CHIPNAME -set _CPUNAME cpu -set _TAPNAME $_CHIPNAME.$_CPUNAME - -jtag newtap $_CHIPNAME $_CPUNAME -irlen 5 -expected-id $_CPUTAPID - -if { $_RTOS == "none" } { - target create $_TARGETNAME esp32s2 -endian little -chain-position $_TAPNAME -} else { - target create $_TARGETNAME esp32s2 -endian little -chain-position $_TAPNAME -rtos $_RTOS -} - -configure_esp_workarea $_TARGETNAME 0x40030000 0x3400 0x3FFE0000 0x6000 -configure_esp_flash_bank $_TARGETNAME $_TARGETNAME $_FLASH_SIZE - -xtensa maskisr on -if { $_SEMIHOST_BASEDIR != "" } { - esp semihost_basedir $_SEMIHOST_BASEDIR -} -if { $_FLASH_SIZE == 0 } { - gdb_breakpoint_override hard -} diff --git a/shared-module/displayio/I2CDisplay.c b/shared-module/displayio/I2CDisplay.c index 9e9e17881..5bd03dcd6 100644 --- a/shared-module/displayio/I2CDisplay.c +++ b/shared-module/displayio/I2CDisplay.c @@ -72,8 +72,8 @@ void common_hal_displayio_i2cdisplay_deinit(displayio_i2cdisplay_obj_t* self) { common_hal_busio_i2c_deinit(self->bus); } - if (self->reset.pin) { - common_hal_reset_pin(self->reset.pin); + if (self->reset.base.type == &digitalio_digitalinout_type) { + common_hal_digitalio_digitalinout_deinit(&self->reset); } } -- cgit v1.2.3 From 2eca4ee90244bc3c09999eb9efa5cd9ef611c3e3 Mon Sep 17 00:00:00 2001 From: DavePutz Date: Mon, 14 Sep 2020 11:04:45 -0500 Subject: Update PulseIn.c --- ports/atmel-samd/common-hal/pulseio/PulseIn.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.c b/ports/atmel-samd/common-hal/pulseio/PulseIn.c index 9a9bf57a0..9930fe9c9 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.c +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -115,11 +115,11 @@ void pulsein_interrupt_handler(uint8_t channel) { duration = total_diff; } //check if the input is taking too long, 15 timer overflows is approx 1 second - if (current_overflow - start_overflow > 15) { - self->errored_too_fast = true; - common_hal_pulseio_pulsein_pause(self); + if (current_overflow - start_overflow > 15) { + self->errored_too_fast = true; + common_hal_pulseio_pulsein_pause(self); common_hal_mcu_enable_interrupts(); - return; + return; } uint16_t i = (self->start + self->len) % self->maxlen; -- cgit v1.2.3 From 6ecfdda580a7d27b1aaeb7d37f63fdb7f10b3779 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Mon, 14 Sep 2020 13:18:51 -0400 Subject: Add Readme --- ports/esp32s2/README.md | 88 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 ports/esp32s2/README.md (limited to 'ports') diff --git a/ports/esp32s2/README.md b/ports/esp32s2/README.md new file mode 100644 index 000000000..86aa99a13 --- /dev/null +++ b/ports/esp32s2/README.md @@ -0,0 +1,88 @@ +# Circuitpython on ESP32-S2 # + +This port adds the ESP32-S2 line of modules from Espressif to Circuitpython. ESP32-S2 modules are low power, single-core Wi-Fi microcontroller SoCs designed for IoT applications. + +## How this port is organized: ## + +- **bindings/** contains some required bindings to the ESP-IDF for exceptions and memory. +- **boards/** contains the configuration files for each development board and breakout available on the port. +- **common-hal/** contains the port-specific module implementations, used by shared-module and shared-bindings. +- **esp-idf/** contains the Espressif IoT development framework installation, includign all the drivers for the port. +- **modules/** contains information specific to certain ESP32-S2 hardware modules, such as the pins used for flash and RAM on the WROVER and WROOM. +- **peripherals/** contains peripheral setup files and peripheral mapping information, sorted by family and sub-variant. Most files in this directory can be generated with the python scripts in **tools/**. +- **supervisor/** contains port-specific implementations of internal flash, serial and USB, as well as the **port.c** file, which initializes the port at startup. +- **tools/** includes useful python scripts for debugging and other purposes. + +At the root level, refer to **mpconfigboard.h** and **mpconfigport.mk** for port specific settings and a list of enabled circuitpython modules. + +## Connecting to the ESP32-S2 ## + +The USB port built into ESP32-S2 boards such as the Saola is not the native USB of the board, but a debugging and programming interface. The actual ESP32-S2 native USB which exposes the Circuitpython drive and CDC connection is located on IO pins 19 and 20: + +| GPIO | USB | +| ---- | ----------- | +| 20 | D+ (green) | +| 19 | D- (white) | +| GND | GND (black) | +| 5V | +5V (red) | + +Connect these pins using a [USB adapter](https://www.adafruit.com/product/4090) or [breakout cable](https://www.adafruit.com/product/4448) to access the Circuitpython drive. + +## Building and flashing ## + +Before building or flashing the ESP32-S2, you must [install the esp-idf](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html). This must be re-done ever time the esp-idf is updated, but not every time you build. From the port root, run: + +``` +./esp-idf/install.sh +``` + +Additionally, any time you open a new bash environment for building or flashing, you must add the esp-idf tools to your path: + +``` +. esp-idf/export.sh +``` + +To build for a board such as the Saola 1 Wrover and flash it over the UART interface, run the following: + +``` +make BOARD=espressif_saola_1_wrover flash +``` + +On MacOS, you may need to directly specify the port. You can determine the correct port on your machine by running `ls /dev/tty.usb*` and selecting the one that appears only when your development board is plugged in. Example: + +``` +make BOARD=espressif_saola_1_wrover flash PORT=/dev/tty.usbserial-1421120 +``` + +## Debugging ## + +The ESP32-S2 supports JTAG debugging over OpenOCD using a JLink or other probe hardware. The official tutorials can be found on the Espressif website [here](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/api-guides/jtag-debugging/index.html), but they are mostly for the ESP32-S2 Kaluga, which has built-in debugging. + +OpenOCD is automatically installed and added to your bash environment during the esp-idf installation and setup process. You can double check that it is installed by using `openocd --version`, as per the tutorial. Attach the JTAG probe pins according to the [instructions](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/api-guides/jtag-debugging/configure-other-jtag.html) for JTAG debugging on boards that do not contain an integrated debugger. + +Once the debugger is connected physically, you must run OpenOCD with attached configuration files specifying the **interface** (your debugger probe) and either a **target** or a **board** (targets are for SoCs only, and can be used when a full board configuration file doesn't exist). You can find the path location of these files by checking the `OPENOCD_SCRIPTS` environmental variable by running `echo $OPENOCD_SCRIPTS` in bash. Interfaces will be in the `interface/` directory, and targets and boards in the `target/` and `board/` directories, respectively. + +**Note:** Unfortunately, there are no board files for the esp32-s2 other than the Kaluga, and the included `target/esp32s2.cfg` target file will not work by default on the Jlink for boards like the Saola 1, as the default speed is incorrect. In addition, these files are covered under the GPL and cannot be included in Circuitpython. Thus, you must make a copy of the esp32s2.cfg file yourself and add the following line manually, under `transport select jtag` at the start of the file: + +``` +adapter_khz 1000 +``` + +Once this is complete, your final OpenOCD command may look something like this: + +`openocd -f interface/jlink.cfg -f SOMEPATH/copied-esp32s2-saola-1.cfg` + +Where `SOMEPATH` is the location of your copied configuration file (this can be placed in the port/boards director with a prefix to ignore it with `.gitignore`, for instance). Interface, target and board config files sourced from espressif only need their paths from the $OPENOCD_SCRIPTS location, you don't need to include their full path. Once OpenOCD is running, connect to GDB with: + +`xtensa-esp32s2-elf-gdb build-espressif_saola_1_wrover/firmware.elf` + +And follow the Espressif GDB tutorial [instructions](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/api-guides/jtag-debugging/using-debugger.html) for connecting, or add them to your `gdbinit`: + +``` +target remote :3333 +set remote hardware-watchpoint-limit 2 +mon reset halt +flushregs +thb app_main +c +``` -- cgit v1.2.3 From 3640ef2b7f5cfa2c7938b7d0d23132a033756ba5 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Mon, 14 Sep 2020 17:37:55 -0400 Subject: Fix toctree, incorrect flash port assumptions --- docs/supported_ports.rst | 1 + ports/esp32s2/README.md | 8 +------- 2 files changed, 2 insertions(+), 7 deletions(-) (limited to 'ports') diff --git a/docs/supported_ports.rst b/docs/supported_ports.rst index 09571afb6..e74067e28 100644 --- a/docs/supported_ports.rst +++ b/docs/supported_ports.rst @@ -17,3 +17,4 @@ is limited. ../ports/mimxrt10xx/README ../ports/nrf/README ../ports/stm/README + ../ports/esp32s2/README diff --git a/ports/esp32s2/README.md b/ports/esp32s2/README.md index 86aa99a13..5b664df08 100644 --- a/ports/esp32s2/README.md +++ b/ports/esp32s2/README.md @@ -42,13 +42,7 @@ Additionally, any time you open a new bash environment for building or flashing, . esp-idf/export.sh ``` -To build for a board such as the Saola 1 Wrover and flash it over the UART interface, run the following: - -``` -make BOARD=espressif_saola_1_wrover flash -``` - -On MacOS, you may need to directly specify the port. You can determine the correct port on your machine by running `ls /dev/tty.usb*` and selecting the one that appears only when your development board is plugged in. Example: +Building boards such as the Saola is typically done through `make flash`. The default port is `tty.SLAB_USBtoUART`, which will only work on certain Mac setups. On most machines, both Mac and Linux, you will need to set the port yourself by running `ls /dev/tty.usb*` and selecting the one that only appears when your development board is plugged in. An example make command with the port setting is as follows: ``` make BOARD=espressif_saola_1_wrover flash PORT=/dev/tty.usbserial-1421120 -- cgit v1.2.3 From 067a97587504521007a2031038b217cf151511f5 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 14 Sep 2020 17:22:30 -0500 Subject: update submodules to merge commits --- ports/atmel-samd/asf4 | 2 +- ports/atmel-samd/peripherals | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/asf4 b/ports/atmel-samd/asf4 index 1b87f18f8..84f56af13 160000 --- a/ports/atmel-samd/asf4 +++ b/ports/atmel-samd/asf4 @@ -1 +1 @@ -Subproject commit 1b87f18f8091f258e63f85cef54bcc7bafd44598 +Subproject commit 84f56af13292d8f32c40acbd949bde698ddd4507 diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals index 15fd96f4d..2ff4ab051 160000 --- a/ports/atmel-samd/peripherals +++ b/ports/atmel-samd/peripherals @@ -1 +1 @@ -Subproject commit 15fd96f4d8c38d5490767ea09469b82a231a768d +Subproject commit 2ff4ab05101ce7d3e105009cc6612df6e992123f -- cgit v1.2.3 From 8fcdc7da16a978d7c65bd3c82c46b11c5178714c Mon Sep 17 00:00:00 2001 From: askpatricw <4002194+askpatrickw@users.noreply.github.com> Date: Mon, 14 Sep 2020 23:24:44 -0700 Subject: RTC enabled --- ports/esp32s2/common-hal/rtc/RTC.c | 52 +++++++++++++++++++++++++++++++++ ports/esp32s2/common-hal/rtc/RTC.h | 34 +++++++++++++++++++++ ports/esp32s2/common-hal/rtc/__init__.c | 0 ports/esp32s2/mpconfigport.mk | 2 +- 4 files changed, 87 insertions(+), 1 deletion(-) create mode 100644 ports/esp32s2/common-hal/rtc/RTC.c create mode 100644 ports/esp32s2/common-hal/rtc/RTC.h create mode 100644 ports/esp32s2/common-hal/rtc/__init__.c (limited to 'ports') diff --git a/ports/esp32s2/common-hal/rtc/RTC.c b/ports/esp32s2/common-hal/rtc/RTC.c new file mode 100644 index 000000000..1218186a8 --- /dev/null +++ b/ports/esp32s2/common-hal/rtc/RTC.c @@ -0,0 +1,52 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2019 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/obj.h" +#include "py/runtime.h" +#include "soc/rtc_periph.h" +#include "shared-bindings/rtc/RTC.h" + +void common_hal_rtc_get_time(timeutils_struct_time_t *tm) { + struct timeval tv_now; + gettimeofday(&tv_now, NULL); + timeutils_seconds_since_2000_to_struct_time(tv_now.tv_sec, tm); +} + +void common_hal_rtc_set_time(timeutils_struct_time_t *tm) { + struct timeval tv_now = {0}; + tv_now.tv_sec = timeutils_seconds_since_2000(tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec); + settimeofday(&tv_now, NULL); +} + +int common_hal_rtc_get_calibration(void) { + return 0; +} + +void common_hal_rtc_set_calibration(int calibration) { + mp_raise_NotImplementedError(translate("RTC calibration is not supported on this board")); +} diff --git a/ports/esp32s2/common-hal/rtc/RTC.h b/ports/esp32s2/common-hal/rtc/RTC.h new file mode 100644 index 000000000..e51f1f784 --- /dev/null +++ b/ports/esp32s2/common-hal/rtc/RTC.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Noralf Trønnes + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_RTC_RTC_H +#define MICROPY_INCLUDED_NRF_COMMON_HAL_RTC_RTC_H + +extern void rtc_init(void); +extern void rtc_reset(void); +extern void common_hal_rtc_init(void); + +#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_RTC_RTC_H diff --git a/ports/esp32s2/common-hal/rtc/__init__.c b/ports/esp32s2/common-hal/rtc/__init__.c new file mode 100644 index 000000000..e69de29bb diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk index ee98ce1f4..8f057784a 100644 --- a/ports/esp32s2/mpconfigport.mk +++ b/ports/esp32s2/mpconfigport.mk @@ -21,7 +21,7 @@ CIRCUITPY_COUNTIO = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_ROTARYIO = 0 -CIRCUITPY_RTC = 0 +CIRCUITPY_RTC = 1 CIRCUITPY_NVM = 0 # We don't have enough endpoints to include MIDI. CIRCUITPY_USB_MIDI = 0 -- cgit v1.2.3 From f9f614b3a2878383cad845f72ffef034bd2be951 Mon Sep 17 00:00:00 2001 From: askpatricw <4002194+askpatrickw@users.noreply.github.com> Date: Tue, 15 Sep 2020 11:28:31 -0700 Subject: code review feedback --- ports/esp32s2/mpconfigport.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk index 8f057784a..95a845736 100644 --- a/ports/esp32s2/mpconfigport.mk +++ b/ports/esp32s2/mpconfigport.mk @@ -13,7 +13,7 @@ USB_SERIAL_NUMBER_LENGTH = 12 LONGINT_IMPL = MPZ # These modules are implemented in ports//common-hal: -CIRCUITPY_FULL_BUILD = 1 +CIRCUITPY_FULL_BUILD = 0 CIRCUITPY_ANALOGIO = 0 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 -- cgit v1.2.3 From bd381e434f00360a5089261b7ab108d6c0fd0ad9 Mon Sep 17 00:00:00 2001 From: askpatricw <4002194+askpatrickw@users.noreply.github.com> Date: Tue, 15 Sep 2020 13:02:26 -0700 Subject: Revert "code review feedback" This reverts commit f9f614b3a2878383cad845f72ffef034bd2be951. --- ports/esp32s2/mpconfigport.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk index 95a845736..8f057784a 100644 --- a/ports/esp32s2/mpconfigport.mk +++ b/ports/esp32s2/mpconfigport.mk @@ -13,7 +13,7 @@ USB_SERIAL_NUMBER_LENGTH = 12 LONGINT_IMPL = MPZ # These modules are implemented in ports//common-hal: -CIRCUITPY_FULL_BUILD = 0 +CIRCUITPY_FULL_BUILD = 1 CIRCUITPY_ANALOGIO = 0 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 -- cgit v1.2.3 From 95e27bb8bf3e0e3ab1f21e252dafe2c974f1ad30 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Tue, 15 Sep 2020 13:43:35 -0700 Subject: Add more PIDs for unique boards --- .../boards/feather_m0_adalogger/mpconfigboard.mk | 2 +- .../boards/feather_m0_express_crickit/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk | 2 +- .../boards/feather_radiofruit_zigbee/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/pewpew10/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/ugame10/mpconfigboard.mk | 2 +- ports/nrf/boards/TG-Watch02A/mpconfigboard.mk | 2 +- ports/nrf/boards/electronut_labs_blip/mpconfigboard.mk | 2 +- ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.mk | 2 +- .../makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.mk | 2 +- ports/nrf/boards/pca10056/mpconfigboard.mk | 2 +- ports/nrf/boards/pca10059/mpconfigboard.mk | 2 +- ports/nrf/boards/pca10100/mpconfigboard.mk | 2 +- ports/stm/boards/meowbit_v121/mpconfigboard.mk | 2 +- ports/stm/boards/thunderpack/mpconfigboard.mk | 2 +- tools/ci_check_duplicate_usb_vid_pid.py | 14 ++++++++++++-- 17 files changed, 28 insertions(+), 18 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk index 54c5bff6a..143910318 100644 --- a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x8015 +USB_PID = 0x80D3 USB_PRODUCT = "Feather M0 Adalogger" USB_MANUFACTURER = "Adafruit Industries LLC" diff --git a/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk index d5e03b49d..345722575 100644 --- a/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x8023 +USB_PID = 0x80D1 USB_PRODUCT = "Feather M0 Express" USB_MANUFACTURER = "Adafruit Industries LLC" diff --git a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk index 7556b9517..30701f728 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x8015 +USB_PID = 0x80D2 USB_PRODUCT = "Feather M0 RFM69" USB_MANUFACTURER = "Adafruit Industries LLC" diff --git a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk index de79638bd..2d8010a36 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x8015 +USB_PID = 0x80D4 USB_PRODUCT = "Feather M0 RFM9x" USB_MANUFACTURER = "Adafruit Industries LLC" diff --git a/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.mk b/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.mk index e9d94638a..ef571f9ab 100755 --- a/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x8023 +USB_PID = 0x80D0 USB_PRODUCT = "Feather RadioFruit Zigbee" USB_MANUFACTURER = "Adafruit Industries LLC" diff --git a/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk b/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk index 7305abf73..1cc91a8df 100644 --- a/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x801D +USB_PID = 0x80D5 USB_PRODUCT = "PewPew 10.2" USB_MANUFACTURER = "Radomir Dopieralski" diff --git a/ports/atmel-samd/boards/ugame10/mpconfigboard.mk b/ports/atmel-samd/boards/ugame10/mpconfigboard.mk index 1c4336907..f34655a95 100644 --- a/ports/atmel-samd/boards/ugame10/mpconfigboard.mk +++ b/ports/atmel-samd/boards/ugame10/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x801F +USB_PID = 0x80AF USB_PRODUCT = "uGame10" USB_MANUFACTURER = "Radomir Dopieralski" diff --git a/ports/nrf/boards/TG-Watch02A/mpconfigboard.mk b/ports/nrf/boards/TG-Watch02A/mpconfigboard.mk index 08915a19b..4f5899fa7 100644 --- a/ports/nrf/boards/TG-Watch02A/mpconfigboard.mk +++ b/ports/nrf/boards/TG-Watch02A/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x802A +USB_PID = 0x80DB USB_PRODUCT = "TG-Watch02A" USB_MANUFACTURER = "TG-Tech" diff --git a/ports/nrf/boards/electronut_labs_blip/mpconfigboard.mk b/ports/nrf/boards/electronut_labs_blip/mpconfigboard.mk index f30b308ec..30946057c 100644 --- a/ports/nrf/boards/electronut_labs_blip/mpconfigboard.mk +++ b/ports/nrf/boards/electronut_labs_blip/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x803C +USB_PID = 0x80D7 USB_PRODUCT = "Blip" USB_MANUFACTURER = "Electronut Labs" diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.mk b/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.mk index 339575049..d69bc8235 100644 --- a/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.mk +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x802A +USB_PID = 0x80DC USB_PRODUCT = "nRF52840-MDK" USB_MANUFACTURER = "makerdiary" diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.mk b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.mk index 55ca410d9..c4fa12174 100644 --- a/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.mk +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x802A +USB_PID = 0x80DD USB_PRODUCT = "nRF52840-MDK-Dongle" USB_MANUFACTURER = "makerdiary" diff --git a/ports/nrf/boards/pca10056/mpconfigboard.mk b/ports/nrf/boards/pca10056/mpconfigboard.mk index 8fd1ef08d..f24e6f667 100644 --- a/ports/nrf/boards/pca10056/mpconfigboard.mk +++ b/ports/nrf/boards/pca10056/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x802A +USB_PID = 0x80DA USB_PRODUCT = "PCA10056" USB_MANUFACTURER = "Nordic Semiconductor" diff --git a/ports/nrf/boards/pca10059/mpconfigboard.mk b/ports/nrf/boards/pca10059/mpconfigboard.mk index 3f97b0821..9dc3cc71e 100644 --- a/ports/nrf/boards/pca10059/mpconfigboard.mk +++ b/ports/nrf/boards/pca10059/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x802A +USB_PID = 0x80D9 USB_PRODUCT = "PCA10059" USB_MANUFACTURER = "Nordic Semiconductor" diff --git a/ports/nrf/boards/pca10100/mpconfigboard.mk b/ports/nrf/boards/pca10100/mpconfigboard.mk index 715b65e63..fcac55099 100644 --- a/ports/nrf/boards/pca10100/mpconfigboard.mk +++ b/ports/nrf/boards/pca10100/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x802A +USB_PID = 0x80D8 USB_PRODUCT = "PCA10100" USB_MANUFACTURER = "Nordic Semiconductor" diff --git a/ports/stm/boards/meowbit_v121/mpconfigboard.mk b/ports/stm/boards/meowbit_v121/mpconfigboard.mk index cf60c89c2..69a6c65c8 100644 --- a/ports/stm/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm/boards/meowbit_v121/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x805A +USB_PID = 0x80CF USB_PRODUCT = "Meowbit" USB_MANUFACTURER = "Kittenbot" USB_DEVICES = "CDC,MSC" diff --git a/ports/stm/boards/thunderpack/mpconfigboard.mk b/ports/stm/boards/thunderpack/mpconfigboard.mk index 007b00cdd..02f28775a 100644 --- a/ports/stm/boards/thunderpack/mpconfigboard.mk +++ b/ports/stm/boards/thunderpack/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x806A +USB_PID = 0x8069 USB_PRODUCT = "Thunderpack STM32F411" USB_MANUFACTURER = "Jeremy Gillick" USB_DEVICES = "CDC,MSC" diff --git a/tools/ci_check_duplicate_usb_vid_pid.py b/tools/ci_check_duplicate_usb_vid_pid.py index b05d56012..dd6bf5670 100644 --- a/tools/ci_check_duplicate_usb_vid_pid.py +++ b/tools/ci_check_duplicate_usb_vid_pid.py @@ -38,7 +38,13 @@ DEFAULT_IGNORELIST = [ "pygamer", "pygamer_advance", "trinket_m0", - "trinket_m0_haxpress" + "trinket_m0_haxpress", + "sparkfun_qwiic_micro_with_flash", + "sparkfun_qwiic_micro_no_flash", + "feather_m0_express", + "feather_m0_supersized", + "cp32-m4", + "metro_m4_express" ] cli_parser = argparse.ArgumentParser(description="USB VID/PID Duplicate Checker") @@ -118,9 +124,13 @@ def check_vid_pid(files, ignorelist): ) duplicate_message = ( - f"Duplicate VID/PID usage found!\n{duplicates}" + f"Duplicate VID/PID usage found!\n{duplicates}\n" + f"If you are open source maker, then you can request a PID from http://pid.codes\n" + f"Otherwise, companies should pay the USB-IF for a vendor ID: https://www.usb.org/getting-vendor-id" ) sys.exit(duplicate_message) + else: + print("No USB PID duplicates found.") if __name__ == "__main__": -- cgit v1.2.3 From 2bd169ec327abd5af0cb34ea51a766341cdaae4a Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Tue, 15 Sep 2020 18:12:06 -0700 Subject: Add partition layouts for 8 and 16 MB as well. --- ports/esp32s2/Makefile | 2 +- ports/esp32s2/partitions-16MB.csv | 10 ++++++++++ ports/esp32s2/partitions-4MB.csv | 10 ++++++++++ ports/esp32s2/partitions-8MB.csv | 10 ++++++++++ ports/esp32s2/partitions.csv | 10 ---------- ports/esp32s2/sdkconfig-16MB.defaults | 10 ++++++++++ ports/esp32s2/sdkconfig-4MB.defaults | 10 ++++++++++ ports/esp32s2/sdkconfig-8MB.defaults | 10 ++++++++++ ports/esp32s2/sdkconfig.defaults | 8 -------- 9 files changed, 61 insertions(+), 19 deletions(-) create mode 100644 ports/esp32s2/partitions-16MB.csv create mode 100644 ports/esp32s2/partitions-4MB.csv create mode 100644 ports/esp32s2/partitions-8MB.csv delete mode 100644 ports/esp32s2/partitions.csv create mode 100644 ports/esp32s2/sdkconfig-16MB.defaults create mode 100644 ports/esp32s2/sdkconfig-4MB.defaults create mode 100644 ports/esp32s2/sdkconfig-8MB.defaults (limited to 'ports') diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 64068b02d..229a3bf3a 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -230,7 +230,7 @@ $(BUILD)/esp-idf: # create the config headers $(BUILD)/esp-idf/config/sdkconfig.h: boards/$(BOARD)/sdkconfig | $(BUILD)/esp-idf - IDF_PATH=$(IDF_PATH) cmake -S . -B $(BUILD)/esp-idf -DSDKCONFIG=$(BUILD)/esp-idf/sdkconfig -DSDKCONFIG_DEFAULTS="sdkconfig.defaults;boards/$(BOARD)/sdkconfig" -DCMAKE_TOOLCHAIN_FILE=$(IDF_PATH)/tools/cmake/toolchain-esp32s2.cmake -DIDF_TARGET=esp32s2 -GNinja + IDF_PATH=$(IDF_PATH) cmake -S . -B $(BUILD)/esp-idf -DSDKCONFIG=$(BUILD)/esp-idf/sdkconfig -DSDKCONFIG_DEFAULTS="sdkconfig.defaults;sdkconfig-$(CIRCUITPY_ESP_FLASH_SIZE).defaults;boards/$(BOARD)/sdkconfig" -DCMAKE_TOOLCHAIN_FILE=$(IDF_PATH)/tools/cmake/toolchain-esp32s2.cmake -DIDF_TARGET=esp32s2 -GNinja # build a lib # Adding -d explain -j 1 -v to the ninja line will output debug info diff --git a/ports/esp32s2/partitions-16MB.csv b/ports/esp32s2/partitions-16MB.csv new file mode 100644 index 000000000..13ea81bea --- /dev/null +++ b/ports/esp32s2/partitions-16MB.csv @@ -0,0 +1,10 @@ +# ESP-IDF Partition Table +# Name, Type, SubType, Offset, Size, Flags +# bootloader.bin,, 0x1000, 32K +# partition table,, 0x8000, 4K +nvs, data, nvs, 0x9000, 20K, +otadata, data, ota, 0xe000, 8K, +ota_0, 0, ota_0, 0x10000, 2048K, +ota_1, 0, ota_1, 0x210000, 2048K, +uf2, app, factory,0x410000, 256K, +user_fs, data, fat, 0x450000, 11968K, diff --git a/ports/esp32s2/partitions-4MB.csv b/ports/esp32s2/partitions-4MB.csv new file mode 100644 index 000000000..cf9b3cca8 --- /dev/null +++ b/ports/esp32s2/partitions-4MB.csv @@ -0,0 +1,10 @@ +# ESP-IDF Partition Table +# Name, Type, SubType, Offset, Size, Flags +# bootloader.bin,, 0x1000, 32K +# partition table,, 0x8000, 4K +nvs, data, nvs, 0x9000, 20K, +otadata, data, ota, 0xe000, 8K, +ota_0, 0, ota_0, 0x10000, 1408K, +ota_1, 0, ota_1, 0x170000, 1408K, +uf2, app, factory,0x2d0000, 256K, +user_fs, data, fat, 0x310000, 960K, diff --git a/ports/esp32s2/partitions-8MB.csv b/ports/esp32s2/partitions-8MB.csv new file mode 100644 index 000000000..f4ba9b60a --- /dev/null +++ b/ports/esp32s2/partitions-8MB.csv @@ -0,0 +1,10 @@ +# ESP-IDF Partition Table +# Name, Type, SubType, Offset, Size, Flags +# bootloader.bin,, 0x1000, 32K +# partition table,, 0x8000, 4K +nvs, data, nvs, 0x9000, 20K, +otadata, data, ota, 0xe000, 8K, +ota_0, 0, ota_0, 0x10000, 2048K, +ota_1, 0, ota_1, 0x210000, 2048K, +uf2, app, factory,0x410000, 256K, +user_fs, data, fat, 0x450000, 3776K, diff --git a/ports/esp32s2/partitions.csv b/ports/esp32s2/partitions.csv deleted file mode 100644 index cf9b3cca8..000000000 --- a/ports/esp32s2/partitions.csv +++ /dev/null @@ -1,10 +0,0 @@ -# ESP-IDF Partition Table -# Name, Type, SubType, Offset, Size, Flags -# bootloader.bin,, 0x1000, 32K -# partition table,, 0x8000, 4K -nvs, data, nvs, 0x9000, 20K, -otadata, data, ota, 0xe000, 8K, -ota_0, 0, ota_0, 0x10000, 1408K, -ota_1, 0, ota_1, 0x170000, 1408K, -uf2, app, factory,0x2d0000, 256K, -user_fs, data, fat, 0x310000, 960K, diff --git a/ports/esp32s2/sdkconfig-16MB.defaults b/ports/esp32s2/sdkconfig-16MB.defaults new file mode 100644 index 000000000..af477999b --- /dev/null +++ b/ports/esp32s2/sdkconfig-16MB.defaults @@ -0,0 +1,10 @@ + +# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y +CONFIG_ESPTOOLPY_FLASHSIZE="16MB" + +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-16MB.csv" +CONFIG_PARTITION_TABLE_FILENAME="partitions-16MB.csv" diff --git a/ports/esp32s2/sdkconfig-4MB.defaults b/ports/esp32s2/sdkconfig-4MB.defaults new file mode 100644 index 000000000..561f971c3 --- /dev/null +++ b/ports/esp32s2/sdkconfig-4MB.defaults @@ -0,0 +1,10 @@ + +# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y +# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE="4MB" + +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-4MB.csv" +CONFIG_PARTITION_TABLE_FILENAME="partitions-4MB.csv" diff --git a/ports/esp32s2/sdkconfig-8MB.defaults b/ports/esp32s2/sdkconfig-8MB.defaults new file mode 100644 index 000000000..fcff17f46 --- /dev/null +++ b/ports/esp32s2/sdkconfig-8MB.defaults @@ -0,0 +1,10 @@ + +# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y +# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE="8MB" + +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-8MB.csv" +CONFIG_PARTITION_TABLE_FILENAME="partitions-8MB.csv" diff --git a/ports/esp32s2/sdkconfig.defaults b/ports/esp32s2/sdkconfig.defaults index c0a56c143..4094367e0 100644 --- a/ports/esp32s2/sdkconfig.defaults +++ b/ports/esp32s2/sdkconfig.defaults @@ -88,12 +88,6 @@ CONFIG_ESPTOOLPY_FLASHFREQ_40M=y # CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set # CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set CONFIG_ESPTOOLPY_FLASHFREQ="40m" -# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set -# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y -# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set -# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE="4MB" CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y CONFIG_ESPTOOLPY_BEFORE_RESET=y # CONFIG_ESPTOOLPY_BEFORE_NORESET is not set @@ -119,8 +113,6 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 # CONFIG_PARTITION_TABLE_SINGLE_APP is not set # CONFIG_PARTITION_TABLE_TWO_OTA is not set CONFIG_PARTITION_TABLE_CUSTOM=y -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions.csv" CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table -- cgit v1.2.3 From fead60d2d877073aad7d4303ff885781f3cff269 Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Tue, 15 Sep 2020 23:32:53 -0700 Subject: Add BSSID to Network --- ports/esp32s2/common-hal/wifi/Network.c | 6 ++++++ shared-bindings/wifi/Network.c | 18 ++++++++++++++++++ shared-bindings/wifi/Network.h | 1 + 3 files changed, 25 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Network.c b/ports/esp32s2/common-hal/wifi/Network.c index 0320e8f92..e90b3d552 100644 --- a/ports/esp32s2/common-hal/wifi/Network.c +++ b/ports/esp32s2/common-hal/wifi/Network.c @@ -35,6 +35,12 @@ mp_obj_t common_hal_wifi_network_get_ssid(wifi_network_obj_t *self) { return mp_obj_new_str(cstr, strlen(cstr)); } +#define MAC_ADDRESS_LENGTH 6 + +mp_obj_t common_hal_wifi_network_get_bssid(wifi_network_obj_t *self) { + return mp_obj_new_bytes(self->record.bssid, MAC_ADDRESS_LENGTH); +} + mp_obj_t common_hal_wifi_network_get_rssi(wifi_network_obj_t *self) { return mp_obj_new_int(self->record.rssi); } diff --git a/shared-bindings/wifi/Network.c b/shared-bindings/wifi/Network.c index b6d5e0901..bf970a9c0 100644 --- a/shared-bindings/wifi/Network.c +++ b/shared-bindings/wifi/Network.c @@ -58,6 +58,23 @@ const mp_obj_property_t wifi_network_ssid_obj = { }; +//| bssid: bytes +//| """BSSID of the network (usually the AP's MAC address)""" +//| +STATIC mp_obj_t wifi_network_get_bssid(mp_obj_t self) { + return common_hal_wifi_network_get_bssid(self); + +} +MP_DEFINE_CONST_FUN_OBJ_1(wifi_network_get_bssid_obj, wifi_network_get_bssid); + +const mp_obj_property_t wifi_network_bssid_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&wifi_network_get_bssid_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + + //| rssi: int //| """Signal strength of the network""" //| @@ -94,6 +111,7 @@ const mp_obj_property_t wifi_network_channel_obj = { STATIC const mp_rom_map_elem_t wifi_network_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_ssid), MP_ROM_PTR(&wifi_network_ssid_obj) }, + { MP_ROM_QSTR(MP_QSTR_bssid), MP_ROM_PTR(&wifi_network_bssid_obj) }, { MP_ROM_QSTR(MP_QSTR_rssi), MP_ROM_PTR(&wifi_network_rssi_obj) }, { MP_ROM_QSTR(MP_QSTR_channel), MP_ROM_PTR(&wifi_network_channel_obj) }, }; diff --git a/shared-bindings/wifi/Network.h b/shared-bindings/wifi/Network.h index 6a7f7be4a..c9bbc685e 100644 --- a/shared-bindings/wifi/Network.h +++ b/shared-bindings/wifi/Network.h @@ -36,6 +36,7 @@ const mp_obj_type_t wifi_network_type; extern mp_obj_t common_hal_wifi_network_get_ssid(wifi_network_obj_t *self); +extern mp_obj_t common_hal_wifi_network_get_bssid(wifi_network_obj_t *self); extern mp_obj_t common_hal_wifi_network_get_rssi(wifi_network_obj_t *self); extern mp_obj_t common_hal_wifi_network_get_channel(wifi_network_obj_t *self); -- cgit v1.2.3 From c06aeda399142b50d7fc049effc22db4e2da6830 Mon Sep 17 00:00:00 2001 From: Rémi Sarrailh Date: Wed, 16 Sep 2020 13:10:01 +0200 Subject: Add Muselab nanoesp32 s2 definition --- .github/workflows/build.yml | 1 + ports/esp32s2/boards/muselab_nanoesp32_s2/board.c | 47 +++++++++++++++++++++ .../boards/muselab_nanoesp32_s2/mpconfigboard.h | 34 +++++++++++++++ .../boards/muselab_nanoesp32_s2/mpconfigboard.mk | 17 ++++++++ ports/esp32s2/boards/muselab_nanoesp32_s2/pins.c | 48 ++++++++++++++++++++++ .../esp32s2/boards/muselab_nanoesp32_s2/sdkconfig | 0 6 files changed, 147 insertions(+) create mode 100644 ports/esp32s2/boards/muselab_nanoesp32_s2/board.c create mode 100644 ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h create mode 100644 ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.mk create mode 100644 ports/esp32s2/boards/muselab_nanoesp32_s2/pins.c create mode 100644 ports/esp32s2/boards/muselab_nanoesp32_s2/sdkconfig (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 513ef2930..49e52dbb2 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -244,6 +244,7 @@ jobs: - "metro_nrf52840_express" - "mini_sam_m4" - "monster_m4sk" + - "muselabnanoesp32_s2" - "ndgarage_ndbit6" - "ndgarage_ndbit6_v2" - "nfc_copy_cat" diff --git a/ports/esp32s2/boards/muselab_nanoesp32_s2/board.c b/ports/esp32s2/boards/muselab_nanoesp32_s2/board.c new file mode 100644 index 000000000..9f708874b --- /dev/null +++ b/ports/esp32s2/boards/muselab_nanoesp32_s2/board.c @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "shared-bindings/microcontroller/Pin.h" + +void board_init(void) { + // USB + common_hal_never_reset_pin(&pin_GPIO19); + common_hal_never_reset_pin(&pin_GPIO20); + + // Debug UART + common_hal_never_reset_pin(&pin_GPIO43); + common_hal_never_reset_pin(&pin_GPIO44); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h b/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h new file mode 100644 index 000000000..5a165decc --- /dev/null +++ b/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h @@ -0,0 +1,34 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "nanoESP32-S2" +#define MICROPY_HW_MCU_NAME "ESP32S2" + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO18) + +#define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.mk b/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.mk new file mode 100644 index 000000000..449676d38 --- /dev/null +++ b/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x239A +USB_PID = 0x80DE +USB_PRODUCT = "nanoESP32-S2" +USB_MANUFACTURER = "Muselab" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ + +# The default queue depth of 16 overflows on release builds, +# so increase it to 32. +CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 + +CIRCUITPY_ESP_FLASH_MODE=dio +CIRCUITPY_ESP_FLASH_FREQ=40m +CIRCUITPY_ESP_FLASH_SIZE=4MB + +CIRCUITPY_MODULE=wroom diff --git a/ports/esp32s2/boards/muselab_nanoesp32_s2/pins.c b/ports/esp32s2/boards/muselab_nanoesp32_s2/pins.c new file mode 100644 index 000000000..0562d9331 --- /dev/null +++ b/ports/esp32s2/boards/muselab_nanoesp32_s2/pins.c @@ -0,0 +1,48 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) }, + { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) }, + { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) }, + { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) }, + + + { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) }, + { MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) }, + { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) }, + { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) }, + { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) }, + { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) }, + { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) }, + { MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) }, + { MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, + { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) }, + { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO18) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/esp32s2/boards/muselab_nanoesp32_s2/sdkconfig b/ports/esp32s2/boards/muselab_nanoesp32_s2/sdkconfig new file mode 100644 index 000000000..e69de29bb -- cgit v1.2.3 From 61687c81d82572ee5c014a9f167b2d73db73e2f4 Mon Sep 17 00:00:00 2001 From: Kamil Tomaszewski Date: Wed, 16 Sep 2020 13:55:57 +0200 Subject: camera: Pass width and height to take_picture() --- ports/cxd56/common-hal/camera/Camera.c | 37 ++------------ ports/cxd56/common-hal/camera/Camera.h | 2 - shared-bindings/camera/Camera.c | 92 ++++++---------------------------- shared-bindings/camera/Camera.h | 9 +--- 4 files changed, 22 insertions(+), 118 deletions(-) (limited to 'ports') diff --git a/ports/cxd56/common-hal/camera/Camera.c b/ports/cxd56/common-hal/camera/Camera.c index a4e197bf3..35e2ab882 100644 --- a/ports/cxd56/common-hal/camera/Camera.c +++ b/ports/cxd56/common-hal/camera/Camera.c @@ -118,9 +118,7 @@ static void camera_start_preview() { camera_start_streaming(V4L2_BUF_TYPE_VIDEO_CAPTURE); } -extern uint32_t _ebss; -extern uint32_t _stext; -void common_hal_camera_construct(camera_obj_t *self, uint16_t width, uint16_t height) { +void common_hal_camera_construct(camera_obj_t *self) { if (camera_dev.fd < 0) { if (video_initialize(camera_dev.devpath) < 0) { mp_raise_ValueError(translate("Could not initialize Camera")); @@ -131,17 +129,8 @@ void common_hal_camera_construct(camera_obj_t *self, uint16_t width, uint16_t he } } - if (!camera_check_width_and_height(width, height)) { - mp_raise_ValueError(translate("Size not supported")); - } - - self->width = width; - self->height = height; - camera_start_preview(); - camera_set_format(V4L2_BUF_TYPE_STILL_CAPTURE, V4L2_PIX_FMT_JPEG, width, height); - camera_start_streaming(V4L2_BUF_TYPE_STILL_CAPTURE); sleep(1); @@ -162,18 +151,18 @@ bool common_hal_camera_deinited(camera_obj_t *self) { return camera_dev.fd < 0; } -size_t common_hal_camera_take_picture(camera_obj_t *self, uint8_t *buffer, size_t len, camera_imageformat_t format) { - if (!camera_check_width_and_height(self->width, self->height)) { +size_t common_hal_camera_take_picture(camera_obj_t *self, uint8_t *buffer, size_t len, uint16_t width, uint16_t height, camera_imageformat_t format) { + if (!camera_check_width_and_height(width, height)) { mp_raise_ValueError(translate("Size not supported")); } - if (!camera_check_buffer_length(self->width, self->height, format, len)) { + if (!camera_check_buffer_length(width, height, format, len)) { mp_raise_ValueError(translate("Buffer is too small")); } if (!camera_check_format(format)) { mp_raise_ValueError(translate("Format not supported")); } - camera_set_format(V4L2_BUF_TYPE_STILL_CAPTURE, V4L2_PIX_FMT_JPEG, self->width, self->height); + camera_set_format(V4L2_BUF_TYPE_STILL_CAPTURE, V4L2_PIX_FMT_JPEG, width, height); v4l2_buffer_t buf; @@ -192,19 +181,3 @@ size_t common_hal_camera_take_picture(camera_obj_t *self, uint8_t *buffer, size_ return (size_t)buf.bytesused; } - -uint16_t common_hal_camera_get_width(camera_obj_t *self) { - return self->width; -} - -void common_hal_camera_set_width(camera_obj_t *self, uint16_t width) { - self->width = width; -} - -uint16_t common_hal_camera_get_height(camera_obj_t *self) { - return self->height; -} - -void common_hal_camera_set_height(camera_obj_t *self, uint16_t height) { - self->height = height; -} diff --git a/ports/cxd56/common-hal/camera/Camera.h b/ports/cxd56/common-hal/camera/Camera.h index 11fc10208..7056237d1 100644 --- a/ports/cxd56/common-hal/camera/Camera.h +++ b/ports/cxd56/common-hal/camera/Camera.h @@ -31,8 +31,6 @@ typedef struct { mp_obj_base_t base; - uint16_t width; - uint16_t height; } camera_obj_t; #endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_CAMERA_CAMERA_H diff --git a/shared-bindings/camera/Camera.c b/shared-bindings/camera/Camera.c index 5fe54e429..fd88ccab0 100644 --- a/shared-bindings/camera/Camera.c +++ b/shared-bindings/camera/Camera.c @@ -48,34 +48,26 @@ //| vfs = storage.VfsFat(sd) //| storage.mount(vfs, '/sd') //| -//| cam = camera.Camera(1920, 1080) +//| cam = camera.Camera() //| //| buffer = bytearray(512 * 1024) //| file = open("/sd/image.jpg","wb") -//| size = cam.take_picture(buffer, camera.ImageFormat.JPG) +//| size = cam.take_picture(buffer, width=1920, height=1080, format=camera.ImageFormat.JPG) //| file.write(buffer, size) //| file.close()""" //| -//| def __init__(self, width: int, height: int) -> None: -//| """Initialize camera. -//| -//| :param int width: Width in pixels -//| :param int height: Height in pixels""" +//| def __init__(self) -> None: +//| """Initialize camera.""" //| ... //| STATIC mp_obj_t camera_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { camera_obj_t *self = m_new_obj(camera_obj_t); self->base.type = &camera_type; - enum { ARG_width, ARG_height }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_width, MP_ARG_REQUIRED | MP_ARG_INT }, - { MP_QSTR_height, MP_ARG_REQUIRED | MP_ARG_INT }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + // No arguments + mp_arg_check_num(n_args, kw_args, 0, 0, false); - common_hal_camera_construct(self, args[ARG_width].u_int, args[ARG_height].u_int); + common_hal_camera_construct(self); return MP_OBJ_FROM_PTR(self); } @@ -97,17 +89,20 @@ STATIC void check_for_deinit(camera_obj_t *self) { } //| def take_picture(self, buf: WriteableBuffer, format: ImageFormat) -> int: -//| """Take picture and save to ``buf`` in the given ``format`` +//| """Take picture and save to ``buf`` in the given ``format``. The size of the picture +//| taken is ``width`` by ``height`` in pixels. //| //| :return: the number of bytes written into buf //| :rtype: int""" //| ... //| STATIC mp_obj_t camera_obj_take_picture(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_buffer, ARG_format }; + enum { ARG_buffer, ARG_width, ARG_height, ARG_format }; static const mp_arg_t allowed_args[] = { { MP_QSTR_buffer, MP_ARG_REQUIRED | MP_ARG_OBJ }, - { MP_QSTR_format, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_width, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT }, + { MP_QSTR_height, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_INT }, + { MP_QSTR_format, MP_ARG_KW_ONLY | MP_ARG_REQUIRED | MP_ARG_OBJ }, }; camera_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); check_for_deinit(self); @@ -119,70 +114,13 @@ STATIC mp_obj_t camera_obj_take_picture(size_t n_args, const mp_obj_t *pos_args, camera_imageformat_t format = camera_imageformat_obj_to_type(args[ARG_format].u_obj); - return MP_OBJ_NEW_SMALL_INT(common_hal_camera_take_picture(self, (uint8_t *)bufinfo.buf, bufinfo.len, format)); -} -MP_DEFINE_CONST_FUN_OBJ_KW(camera_take_picture_obj, 3, camera_obj_take_picture); - -//| width: int -//| """Image width in pixels.""" -//| -STATIC mp_obj_t camera_obj_get_width(mp_obj_t self_in) { - camera_obj_t *self = MP_OBJ_TO_PTR(self_in); - check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_camera_get_width(self)); + return MP_OBJ_NEW_SMALL_INT(common_hal_camera_take_picture(self, (uint8_t *)bufinfo.buf, bufinfo.len, args[ARG_width].u_int, args[ARG_height].u_int, format)); } -MP_DEFINE_CONST_FUN_OBJ_1(camera_get_width_obj, camera_obj_get_width); - -STATIC mp_obj_t camera_obj_set_width(mp_obj_t self_in, mp_obj_t value) { - camera_obj_t *self = MP_OBJ_TO_PTR(self_in); - check_for_deinit(self); - - common_hal_camera_set_width(self, mp_obj_get_int(value)); - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_2(camera_set_width_obj, camera_obj_set_width); - -const mp_obj_property_t camera_width_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&camera_get_width_obj, - (mp_obj_t)&camera_set_width_obj, - (mp_obj_t)&mp_const_none_obj}, -}; - -//| height: int -//| """Image height in pixels.""" -//| -STATIC mp_obj_t camera_obj_get_height(mp_obj_t self_in) { - camera_obj_t *self = MP_OBJ_TO_PTR(self_in); - check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_camera_get_height(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(camera_get_height_obj, camera_obj_get_height); - -STATIC mp_obj_t camera_obj_set_height(mp_obj_t self_in, mp_obj_t value) { - camera_obj_t *self = MP_OBJ_TO_PTR(self_in); - check_for_deinit(self); - - common_hal_camera_set_height(self, mp_obj_get_int(value)); - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_2(camera_set_height_obj, camera_obj_set_height); - -const mp_obj_property_t camera_height_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&camera_get_height_obj, - (mp_obj_t)&camera_set_height_obj, - (mp_obj_t)&mp_const_none_obj}, -}; +MP_DEFINE_CONST_FUN_OBJ_KW(camera_take_picture_obj, 2, camera_obj_take_picture); STATIC const mp_rom_map_elem_t camera_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&camera_deinit_obj) }, { MP_ROM_QSTR(MP_QSTR_take_picture), MP_ROM_PTR(&camera_take_picture_obj) }, - - { MP_ROM_QSTR(MP_QSTR_width), MP_ROM_PTR(&camera_width_obj) }, - { MP_ROM_QSTR(MP_QSTR_height), MP_ROM_PTR(&camera_height_obj) }, }; STATIC MP_DEFINE_CONST_DICT(camera_locals_dict, camera_locals_dict_table); diff --git a/shared-bindings/camera/Camera.h b/shared-bindings/camera/Camera.h index 7ef13cd07..8102672e4 100644 --- a/shared-bindings/camera/Camera.h +++ b/shared-bindings/camera/Camera.h @@ -32,14 +32,9 @@ extern const mp_obj_type_t camera_type; -void common_hal_camera_construct(camera_obj_t *self, uint16_t width, uint16_t height); +void common_hal_camera_construct(camera_obj_t *self); void common_hal_camera_deinit(camera_obj_t *self); bool common_hal_camera_deinited(camera_obj_t *self); -size_t common_hal_camera_take_picture(camera_obj_t *self, uint8_t *buffer, size_t len, camera_imageformat_t format); - -uint16_t common_hal_camera_get_width(camera_obj_t *self); -void common_hal_camera_set_width(camera_obj_t *self, uint16_t width); -uint16_t common_hal_camera_get_height(camera_obj_t *self); -void common_hal_camera_set_height(camera_obj_t *self, uint16_t height); +size_t common_hal_camera_take_picture(camera_obj_t *self, uint8_t *buffer, size_t len, uint16_t width, uint16_t height, camera_imageformat_t format); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_CAMERA_CAMERA_H -- cgit v1.2.3 From 478a4b6405df620f3c8933faae9b81a76dd5a87b Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 16 Sep 2020 10:51:08 -0400 Subject: Clarify location of port root --- ports/esp32s2/README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/esp32s2/README.md b/ports/esp32s2/README.md index 5b664df08..8a6dfbd2d 100644 --- a/ports/esp32s2/README.md +++ b/ports/esp32s2/README.md @@ -30,7 +30,7 @@ Connect these pins using a [USB adapter](https://www.adafruit.com/product/4090) ## Building and flashing ## -Before building or flashing the ESP32-S2, you must [install the esp-idf](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html). This must be re-done ever time the esp-idf is updated, but not every time you build. From the port root, run: +Before building or flashing the ESP32-S2, you must [install the esp-idf](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html). This must be re-done ever time the esp-idf is updated, but not every time you build. Run `cd ports/esp32s2` from `circuitpython/` to move to the esp32s2 port root, and run: ``` ./esp-idf/install.sh -- cgit v1.2.3 From 18285f96e8a2600afcfcc1a63fa5df6388a8da19 Mon Sep 17 00:00:00 2001 From: askpatricw <4002194+askpatrickw@users.noreply.github.com> Date: Wed, 16 Sep 2020 10:13:07 -0700 Subject: RTC is pickd up automatically --- ports/esp32s2/mpconfigport.mk | 1 - 1 file changed, 1 deletion(-) (limited to 'ports') diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk index 8f057784a..bbaabb1c3 100644 --- a/ports/esp32s2/mpconfigport.mk +++ b/ports/esp32s2/mpconfigport.mk @@ -21,7 +21,6 @@ CIRCUITPY_COUNTIO = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_ROTARYIO = 0 -CIRCUITPY_RTC = 1 CIRCUITPY_NVM = 0 # We don't have enough endpoints to include MIDI. CIRCUITPY_USB_MIDI = 0 -- cgit v1.2.3 From 00ee94d24b407768612a5f2a40c4099a7899aa0b Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 16 Sep 2020 14:05:15 -0400 Subject: Add SPI memset, optional flags --- ports/stm/Makefile | 3 ++- ports/stm/common-hal/busio/SPI.c | 13 ++++++++++--- 2 files changed, 12 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/stm/Makefile b/ports/stm/Makefile index dccc749ed..9e1d10b99 100755 --- a/ports/stm/Makefile +++ b/ports/stm/Makefile @@ -102,7 +102,8 @@ CFLAGS += $(INC) -Werror -Wall -std=gnu11 -fshort-enums $(BASE_CFLAGS) $(C_DEFS) # Undo some warnings. # STM32 HAL uses undefined preprocessor variables, shadowed variables, casts that change alignment reqs -CFLAGS += -Wno-undef -Wno-shadow -Wno-cast-align +# You can add your own temporary suppression by setting ADD_CFLAGS in the make command +CFLAGS += -Wno-undef -Wno-shadow -Wno-cast-align $(ADD_CFLAGS) CFLAGS += -mthumb -mabi=aapcs-linux diff --git a/ports/stm/common-hal/busio/SPI.c b/ports/stm/common-hal/busio/SPI.c index 0354d64ad..913385e96 100644 --- a/ports/stm/common-hal/busio/SPI.c +++ b/ports/stm/common-hal/busio/SPI.c @@ -25,6 +25,7 @@ * THE SOFTWARE. */ #include +#include #include "shared-bindings/busio/SPI.h" #include "py/mperrno.h" @@ -340,7 +341,7 @@ bool common_hal_busio_spi_write(busio_spi_obj_t *self, if (self->mosi == NULL) { mp_raise_ValueError(translate("No MOSI Pin")); } - HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, HAL_MAX_DELAY); + HAL_StatusTypeDef result = HAL_SPI_Transmit(&self->handle, (uint8_t *)data, (uint16_t)len, HAL_MAX_DELAY); return result == HAL_OK; } @@ -349,7 +350,13 @@ bool common_hal_busio_spi_read(busio_spi_obj_t *self, if (self->miso == NULL) { mp_raise_ValueError(translate("No MISO Pin")); } - HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, HAL_MAX_DELAY); + HAL_StatusTypeDef result = HAL_OK; + if (self->mosi == NULL) { + result = HAL_SPI_Receive(&self->handle, data, (uint16_t)len, HAL_MAX_DELAY); + } else { + memset(data, write_value, len); + result = HAL_SPI_TransmitReceive(&self->handle, data, data, (uint16_t)len, HAL_MAX_DELAY); + } return result == HAL_OK; } @@ -358,7 +365,7 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, if (self->miso == NULL || self->mosi == NULL) { mp_raise_ValueError(translate("Missing MISO or MOSI Pin")); } - HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle, + HAL_StatusTypeDef result = HAL_SPI_TransmitReceive(&self->handle, (uint8_t *) data_out, data_in, (uint16_t)len,HAL_MAX_DELAY); return result == HAL_OK; } -- cgit v1.2.3 From 847d609ddcab77ac0bba7f2bf50f847ec70ab1ed Mon Sep 17 00:00:00 2001 From: Brian Dean Date: Wed, 16 Sep 2020 16:27:24 -0400 Subject: rename board bdmicro_vina_m0 to bdmicro_vina_d21 and update boardfiles appropriately --- .github/workflows/build.yml | 2 +- ports/atmel-samd/boards/bdmicro_vina_d21/board.c | 48 ++++++++++++++++++++++ .../boards/bdmicro_vina_d21/mpconfigboard.h | 32 +++++++++++++++ .../boards/bdmicro_vina_d21/mpconfigboard.mk | 22 ++++++++++ ports/atmel-samd/boards/bdmicro_vina_d21/pins.c | 39 ++++++++++++++++++ ports/atmel-samd/boards/bdmicro_vina_m0/board.c | 48 ---------------------- .../boards/bdmicro_vina_m0/mpconfigboard.h | 35 ---------------- .../boards/bdmicro_vina_m0/mpconfigboard.mk | 19 --------- ports/atmel-samd/boards/bdmicro_vina_m0/pins.c | 39 ------------------ 9 files changed, 142 insertions(+), 142 deletions(-) create mode 100644 ports/atmel-samd/boards/bdmicro_vina_d21/board.c create mode 100644 ports/atmel-samd/boards/bdmicro_vina_d21/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/bdmicro_vina_d21/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/bdmicro_vina_d21/pins.c delete mode 100644 ports/atmel-samd/boards/bdmicro_vina_m0/board.c delete mode 100644 ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.h delete mode 100644 ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.mk delete mode 100644 ports/atmel-samd/boards/bdmicro_vina_m0/pins.c (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 8e7648e3e..04b09f778 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -177,7 +177,7 @@ jobs: - "arduino_nano_33_iot" - "arduino_zero" - "bast_pro_mini_m0" - - "bdmicro_vina_m0" + - "bdmicro_vina_d21" - "bless_dev_board_multi_sensor" - "blm_badge" - "capablerobot_usbhub" diff --git a/ports/atmel-samd/boards/bdmicro_vina_d21/board.c b/ports/atmel-samd/boards/bdmicro_vina_d21/board.c new file mode 100644 index 000000000..bd63baa6f --- /dev/null +++ b/ports/atmel-samd/boards/bdmicro_vina_d21/board.c @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) +{ + // struct port_config pin_conf; + // port_get_config_defaults(&pin_conf); + // + // pin_conf.direction = PORT_PIN_DIR_OUTPUT; + // port_pin_set_config(MICROPY_HW_LED_TX, &pin_conf); + // port_pin_set_output_level(MICROPY_HW_LED_TX, true); + // + // port_pin_set_config(MICROPY_HW_LED_RX, &pin_conf); + // port_pin_set_output_level(MICROPY_HW_LED_RX, true); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/bdmicro_vina_d21/mpconfigboard.h b/ports/atmel-samd/boards/bdmicro_vina_d21/mpconfigboard.h new file mode 100644 index 000000000..f2332bbe5 --- /dev/null +++ b/ports/atmel-samd/boards/bdmicro_vina_d21/mpconfigboard.h @@ -0,0 +1,32 @@ +#define MICROPY_HW_BOARD_NAME "BDMICRO VINA-D21" +#define MICROPY_HW_MCU_NAME "samd21g18" + +// These are pins not to reset. +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define SPI_FLASH_CS_PIN &pin_PA13 +#define SPI_FLASH_MISO_PIN &pin_PB03 +#define SPI_FLASH_MOSI_PIN &pin_PB22 +#define SPI_FLASH_SCK_PIN &pin_PB23 + +// Clock rates are off: Salae reads 12MHz which is the limit even though we set it to the safer 8MHz. +#define SPI_FLASH_BAUDRATE (8000000) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_UART_BUS_TX (&pin_PA10) +#define DEFAULT_UART_BUS_RX (&pin_PA11) +#define DEFAULT_SPI_BUS_MISO (&pin_PA12) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define MICROPY_HW_LED_TX (&pin_PA27) +#define MICROPY_HW_LED_STATUS (&pin_PA28) +#define MICROPY_HW_LED_RX (&pin_PA31) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/bdmicro_vina_d21/mpconfigboard.mk b/ports/atmel-samd/boards/bdmicro_vina_d21/mpconfigboard.mk new file mode 100644 index 000000000..a9885d064 --- /dev/null +++ b/ports/atmel-samd/boards/bdmicro_vina_d21/mpconfigboard.mk @@ -0,0 +1,22 @@ +USB_VID = 0x31e2 +USB_PID = 0x2001 +USB_PRODUCT = "VINA-D21" +USB_MANUFACTURER = "BDMICRO LLC" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "MX25L51245G","GD25S512MD" +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_COUNTIO = 0 +CIRCUITPY_I2CPERIPHERAL = 0 +CIRCUITPY_VECTORIO = 0 + +CFLAGS_INLINE_LIMIT = 60 +SUPEROPT_GC = 0 + +CFLAGS_BOARD = --param max-inline-insns-auto=15 diff --git a/ports/atmel-samd/boards/bdmicro_vina_d21/pins.c b/ports/atmel-samd/boards/bdmicro_vina_d21/pins.c new file mode 100644 index 000000000..2e2f9ff4f --- /dev/null +++ b/ports/atmel-samd/boards/bdmicro_vina_d21/pins.c @@ -0,0 +1,39 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_LED_STATUS), MP_ROM_PTR(&pin_PA28) }, + { MP_ROM_QSTR(MP_QSTR_LED_TX), MP_ROM_PTR(&pin_PA27) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_LED_RX), MP_ROM_PTR(&pin_PA31) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); + diff --git a/ports/atmel-samd/boards/bdmicro_vina_m0/board.c b/ports/atmel-samd/boards/bdmicro_vina_m0/board.c deleted file mode 100644 index bd63baa6f..000000000 --- a/ports/atmel-samd/boards/bdmicro_vina_m0/board.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "boards/board.h" -#include "mpconfigboard.h" - -void board_init(void) -{ - // struct port_config pin_conf; - // port_get_config_defaults(&pin_conf); - // - // pin_conf.direction = PORT_PIN_DIR_OUTPUT; - // port_pin_set_config(MICROPY_HW_LED_TX, &pin_conf); - // port_pin_set_output_level(MICROPY_HW_LED_TX, true); - // - // port_pin_set_config(MICROPY_HW_LED_RX, &pin_conf); - // port_pin_set_output_level(MICROPY_HW_LED_RX, true); -} - -bool board_requests_safe_mode(void) { - return false; -} - -void reset_board(void) { -} diff --git a/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.h b/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.h deleted file mode 100644 index 458b1e12a..000000000 --- a/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.h +++ /dev/null @@ -1,35 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "BDMICRO Vina M0" -#define MICROPY_HW_MCU_NAME "samd21g18" - -#define MICROPY_HW_LED_STATUS (&pin_PA28) -#define MICROPY_HW_LED_TX &pin_PA27 -#define MICROPY_HW_LED_RX &pin_PA31 - -// Clock rates are off: Salae reads 12MHz which is the limit even though we set it to the safer 8MHz. -#define SPI_FLASH_BAUDRATE (8000000) - -#define SPI_FLASH_MOSI_PIN &pin_PB22 -#define SPI_FLASH_MISO_PIN &pin_PB03 -#define SPI_FLASH_SCK_PIN &pin_PB23 -#define SPI_FLASH_CS_PIN &pin_PA13 - -// These are pins not to reset. -#define MICROPY_PORT_A (0) -#define MICROPY_PORT_B (0) -#define MICROPY_PORT_C (0) - -#define BOARD_HAS_CRYSTAL 0 - -#define DEFAULT_I2C_BUS_SCL (&pin_PA23) -#define DEFAULT_I2C_BUS_SDA (&pin_PA22) - -#define DEFAULT_SPI_BUS_SCK (&pin_PB11) -#define DEFAULT_SPI_BUS_MOSI (&pin_PB10) -#define DEFAULT_SPI_BUS_MISO (&pin_PA12) - -#define DEFAULT_UART_BUS_RX (&pin_PA11) -#define DEFAULT_UART_BUS_TX (&pin_PA10) - -// USB is always used internally so skip the pin objects for it. -#define IGNORE_PIN_PA24 1 -#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.mk b/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.mk deleted file mode 100644 index b7ad47ff2..000000000 --- a/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.mk +++ /dev/null @@ -1,19 +0,0 @@ -USB_VID = 0x31e2 -USB_PID = 0x2002 -USB_PRODUCT = "Vina M0" -USB_MANUFACTURER = "BDMICRO LLC" - -CHIP_VARIANT = SAMD21G18A -CHIP_FAMILY = samd21 - -SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICE_COUNT = 1 -EXTERNAL_FLASH_DEVICES = "MX25L51245G" -LONGINT_IMPL = MPZ - -CIRCUITPY_BITBANGIO = 0 -CIRCUITPY_I2CPERIPHERAL = 0 -CIRCUITPY_VECTORIO = 0 - -CFLAGS_INLINE_LIMIT = 50 -SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/bdmicro_vina_m0/pins.c b/ports/atmel-samd/boards/bdmicro_vina_m0/pins.c deleted file mode 100644 index 0ebceb28d..000000000 --- a/ports/atmel-samd/boards/bdmicro_vina_m0/pins.c +++ /dev/null @@ -1,39 +0,0 @@ -#include "shared-bindings/board/__init__.h" - -STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_RTC_INT), MP_ROM_PTR(&pin_PA00) }, - { MP_ROM_QSTR(MP_QSTR_RTC_CLK), MP_ROM_PTR(&pin_PA01) }, - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB08) }, - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB09) }, - { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB02) }, - { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA11) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA11) }, - { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA10) }, - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA10) }, - { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA14) }, - { MP_ROM_QSTR(MP_QSTR_RTC_TS), MP_ROM_PTR(&pin_PA14) }, - { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA09) }, - { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, - { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA20) }, - { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA21) }, - { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA18) }, - { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA16) }, - { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA19) }, - { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA17) }, - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA23) }, - { MP_ROM_QSTR(MP_QSTR_PGM_LED), MP_ROM_PTR(&pin_PA28) }, - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB10) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA12) }, - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, -}; -MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From 81ee8745319a4e2802db55eb2dae5adc8fe47b35 Mon Sep 17 00:00:00 2001 From: Brian Dean Date: Wed, 16 Sep 2020 16:40:04 -0400 Subject: pins.c: fix trailing whitespace --- ports/atmel-samd/boards/bdmicro_vina_d21/pins.c | 1 - 1 file changed, 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/bdmicro_vina_d21/pins.c b/ports/atmel-samd/boards/bdmicro_vina_d21/pins.c index 2e2f9ff4f..323f71dec 100644 --- a/ports/atmel-samd/boards/bdmicro_vina_d21/pins.c +++ b/ports/atmel-samd/boards/bdmicro_vina_d21/pins.c @@ -36,4 +36,3 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); - -- cgit v1.2.3 From daa1dd278d3ee389be63723f4eabee1ab82c9a92 Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Wed, 16 Sep 2020 16:25:17 -0700 Subject: connect now accepts bssid --- ports/esp32s2/common-hal/wifi/Radio.c | 10 +++++++++- shared-bindings/wifi/Radio.c | 18 +++++++++++++++--- shared-bindings/wifi/Radio.h | 2 +- 3 files changed, 25 insertions(+), 5 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index 3c6ab5757..9ba384ca1 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -104,7 +104,7 @@ void common_hal_wifi_radio_stop_scanning_networks(wifi_radio_obj_t *self) { self->current_scan = NULL; } -wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout) { +wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout, uint8_t* bssid, size_t bssid_len) { // check enabled wifi_config_t* config = &self->sta_config; memcpy(&config->sta.ssid, ssid, ssid_len); @@ -112,6 +112,14 @@ wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t memcpy(&config->sta.password, password, password_len); config->sta.password[password_len] = 0; config->sta.channel = channel; + // From esp_wifi_types.h: + // Generally, station_config.bssid_set needs to be 0; and it needs + // to be 1 only when users need to check the MAC address of the AP + if (bssid_len > 0){ + memcpy(&config->sta.bssid, bssid, bssid_len); + config->sta.bssid[bssid_len] = 0; + config->sta.bssid_set = 1; + } esp_wifi_set_config(ESP_IF_WIFI_STA, config); self->starting_retries = 5; self->retries_left = 5; diff --git a/shared-bindings/wifi/Radio.c b/shared-bindings/wifi/Radio.c index 329dcb1b5..928f21da9 100644 --- a/shared-bindings/wifi/Radio.c +++ b/shared-bindings/wifi/Radio.c @@ -108,11 +108,12 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_stop_scanning_networks_obj, wifi_rad //| ... //| STATIC mp_obj_t wifi_radio_connect(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_ssid, ARG_password, ARG_channel, ARG_timeout }; + enum { ARG_ssid, ARG_password, ARG_channel, ARG_bssid, ARG_timeout }; static const mp_arg_t allowed_args[] = { { MP_QSTR_ssid, MP_ARG_REQUIRED | MP_ARG_OBJ }, { MP_QSTR_password, MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, { MP_QSTR_channel, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_bssid, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, }; @@ -125,7 +126,6 @@ STATIC mp_obj_t wifi_radio_connect(size_t n_args, const mp_obj_t *pos_args, mp_m timeout = mp_obj_get_float(args[ARG_timeout].u_obj); } - mp_buffer_info_t ssid; mp_get_buffer_raise(args[ARG_ssid].u_obj, &ssid, MP_BUFFER_READ); @@ -138,7 +138,19 @@ STATIC mp_obj_t wifi_radio_connect(size_t n_args, const mp_obj_t *pos_args, mp_m } } - wifi_radio_error_t error = common_hal_wifi_radio_connect(self, ssid.buf, ssid.len, password.buf, password.len, args[ARG_channel].u_int, timeout); + #define MAC_ADDRESS_LENGTH 6 + + mp_buffer_info_t bssid; + bssid.len = 0; + // Should probably make sure bssid is just bytes and not something else too + if (args[ARG_bssid].u_obj != MP_OBJ_NULL) { + mp_get_buffer_raise(args[ARG_bssid].u_obj, &bssid, MP_BUFFER_READ); + if (bssid.len != MAC_ADDRESS_LENGTH) { + mp_raise_ValueError(translate("Invalid BSSID")); + } + } + + wifi_radio_error_t error = common_hal_wifi_radio_connect(self, ssid.buf, ssid.len, password.buf, password.len, args[ARG_channel].u_int, timeout, bssid.buf, bssid.len); if (error == WIFI_RADIO_ERROR_AUTH) { mp_raise_ConnectionError(translate("Authentication failure")); } else if (error == WIFI_RADIO_ERROR_NO_AP_FOUND) { diff --git a/shared-bindings/wifi/Radio.h b/shared-bindings/wifi/Radio.h index 812814f9e..b5341d51c 100644 --- a/shared-bindings/wifi/Radio.h +++ b/shared-bindings/wifi/Radio.h @@ -51,7 +51,7 @@ extern mp_obj_t common_hal_wifi_radio_get_mac_address(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_start_scanning_networks(wifi_radio_obj_t *self); extern void common_hal_wifi_radio_stop_scanning_networks(wifi_radio_obj_t *self); -extern wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout); +extern wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout, uint8_t* bssid, size_t bssid_len); extern mp_obj_t common_hal_wifi_radio_get_ipv4_address(wifi_radio_obj_t *self); -- cgit v1.2.3 From 1805e92038a16d5bada953bdf52b7ae99524f2fa Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Thu, 17 Sep 2020 15:04:27 -0700 Subject: Add else case for non-bssid usage --- ports/esp32s2/common-hal/wifi/Radio.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index 9ba384ca1..a0b8b6adc 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -119,6 +119,8 @@ wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t memcpy(&config->sta.bssid, bssid, bssid_len); config->sta.bssid[bssid_len] = 0; config->sta.bssid_set = 1; + } else { + config->sta.bssid_set = 0; } esp_wifi_set_config(ESP_IF_WIFI_STA, config); self->starting_retries = 5; -- cgit v1.2.3 From 17bdc969dbd060eec60de067f21f8d4143e80bd8 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Thu, 17 Sep 2020 16:01:23 -0700 Subject: Reorganize sdkconfigs and release UF2s --- .pre-commit-config.yaml | 2 +- ports/esp32s2/Makefile | 18 +- ports/esp32s2/boards/microdev_micro_s2/sdkconfig | 3 +- .../boards/unexpectedmaker_feathers2/sdkconfig | 3 +- ports/esp32s2/esp-idf-config/partitions-16MB.csv | 10 + ports/esp32s2/esp-idf-config/partitions-4MB.csv | 10 + ports/esp32s2/esp-idf-config/partitions-8MB.csv | 10 + .../esp32s2/esp-idf-config/sdkconfig-16MB.defaults | 9 + .../esp32s2/esp-idf-config/sdkconfig-4MB.defaults | 9 + .../esp32s2/esp-idf-config/sdkconfig-8MB.defaults | 9 + .../esp-idf-config/sdkconfig-debug.defaults | 13 + .../esp32s2/esp-idf-config/sdkconfig-opt.defaults | 12 + ports/esp32s2/esp-idf-config/sdkconfig.defaults | 853 +++++++++++++++++++++ ports/esp32s2/partitions-16MB.csv | 10 - ports/esp32s2/partitions-4MB.csv | 10 - ports/esp32s2/partitions-8MB.csv | 10 - ports/esp32s2/sdkconfig-16MB.defaults | 10 - ports/esp32s2/sdkconfig-4MB.defaults | 10 - ports/esp32s2/sdkconfig-8MB.defaults | 10 - ports/esp32s2/sdkconfig.defaults | 853 --------------------- tools/build_board_info.py | 2 +- 21 files changed, 952 insertions(+), 924 deletions(-) create mode 100644 ports/esp32s2/esp-idf-config/partitions-16MB.csv create mode 100644 ports/esp32s2/esp-idf-config/partitions-4MB.csv create mode 100644 ports/esp32s2/esp-idf-config/partitions-8MB.csv create mode 100644 ports/esp32s2/esp-idf-config/sdkconfig-16MB.defaults create mode 100644 ports/esp32s2/esp-idf-config/sdkconfig-4MB.defaults create mode 100644 ports/esp32s2/esp-idf-config/sdkconfig-8MB.defaults create mode 100644 ports/esp32s2/esp-idf-config/sdkconfig-debug.defaults create mode 100644 ports/esp32s2/esp-idf-config/sdkconfig-opt.defaults create mode 100644 ports/esp32s2/esp-idf-config/sdkconfig.defaults delete mode 100644 ports/esp32s2/partitions-16MB.csv delete mode 100644 ports/esp32s2/partitions-4MB.csv delete mode 100644 ports/esp32s2/partitions-8MB.csv delete mode 100644 ports/esp32s2/sdkconfig-16MB.defaults delete mode 100644 ports/esp32s2/sdkconfig-4MB.defaults delete mode 100644 ports/esp32s2/sdkconfig-8MB.defaults delete mode 100644 ports/esp32s2/sdkconfig.defaults (limited to 'ports') diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml index 7c41ca3ce..322f37da4 100644 --- a/.pre-commit-config.yaml +++ b/.pre-commit-config.yaml @@ -8,6 +8,6 @@ repos: hooks: - id: check-yaml - id: end-of-file-fixer - exclude: '^(tests/.*\.exp|tests/cmdline/.*|tests/.*/data/.*)' + exclude: '^(tests/.*\.exp|tests/cmdline/.*|tests/.*/data/.*|ports/esp32s2/esp-idf-config/.*|ports/esp32s2/boards/.*/sdkconfig)' - id: trailing-whitespace exclude: '^(tests/.*\.exp|tests/cmdline/.*|tests/.*/data/.*)' diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 229a3bf3a..662be481e 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -228,9 +228,17 @@ IDF_PATH = $(realpath ./esp-idf) $(BUILD)/esp-idf: $(Q)$(MKDIR) -p $@ +FLASH_SDKCONFIG = esp-idf-config/sdkconfig-$(CIRCUITPY_ESP_FLASH_SIZE).defaults +ifeq ($(DEBUG), 1) + DEBUG_SDKCONFIG = esp-idf-config/sdkconfig-debug.defaults +else + DEBUG_SDKCONFIG = esp-idf-config/sdkconfig-opt.defaults +endif +SDKCONFIGS = esp-idf-config/sdkconfig.defaults;$(DEBUG_SDKCONFIG);$(FLASH_SDKCONFIG);boards/$(BOARD)/sdkconfig + # create the config headers $(BUILD)/esp-idf/config/sdkconfig.h: boards/$(BOARD)/sdkconfig | $(BUILD)/esp-idf - IDF_PATH=$(IDF_PATH) cmake -S . -B $(BUILD)/esp-idf -DSDKCONFIG=$(BUILD)/esp-idf/sdkconfig -DSDKCONFIG_DEFAULTS="sdkconfig.defaults;sdkconfig-$(CIRCUITPY_ESP_FLASH_SIZE).defaults;boards/$(BOARD)/sdkconfig" -DCMAKE_TOOLCHAIN_FILE=$(IDF_PATH)/tools/cmake/toolchain-esp32s2.cmake -DIDF_TARGET=esp32s2 -GNinja + IDF_PATH=$(IDF_PATH) cmake -S . -B $(BUILD)/esp-idf -DSDKCONFIG=$(BUILD)/esp-idf/sdkconfig -DSDKCONFIG_DEFAULTS="$(SDKCONFIGS)" -DCMAKE_TOOLCHAIN_FILE=$(IDF_PATH)/tools/cmake/toolchain-esp32s2.cmake -DIDF_TARGET=esp32s2 -GNinja # build a lib # Adding -d explain -j 1 -v to the ninja line will output debug info @@ -247,10 +255,12 @@ $(BUILD)/esp-idf/esp-idf/esp32s2/ld/esp32s2.project.ld: $(BUILD)/esp-idf/config/ $(BUILD)/esp-idf/partition_table/partition-table.bin: $(BUILD)/esp-idf/config/sdkconfig.h IDF_PATH=$(IDF_PATH) ninja -C $(BUILD)/esp-idf partition_table/partition-table.bin -# run menuconfig +# run menuconfig and then remove standard settings menuconfig: $(BUILD)/esp-idf/config $(Q)ninja -C $(BUILD)/esp-idf menuconfig - $(Q)diff --old-line-format= --unchanged-line-format= sdkconfig.defaults $(BUILD)/esp-idf/sdkconfig > boards/$(BOARD)/sdkconfig || true + $(Q)diff --old-line-format= --unchanged-line-format= esp-idf-config/sdkconfig.defaults $(BUILD)/esp-idf/sdkconfig > $(BUILD)/sdkconfig.diff || true + $(Q)grep -Fvxf $(FLASH_SDKCONFIG) $(BUILD)/sdkconfig.diff > $(BUILD)/sdkconfig.stripped1 + $(Q)grep -Fvxf $(DEBUG_SDKCONFIG) $(BUILD)/sdkconfig.stripped1 > boards/$(BOARD)/sdkconfig # qstr builds include headers so we need to make sure they are up to date $(HEADER_BUILD)/qstr.i.last: | $(BUILD)/esp-idf/config/sdkconfig.h @@ -307,8 +317,6 @@ $(BUILD)/firmware.elf: $(OBJ) | esp-idf-stamp $(BUILD)/circuitpython-firmware.bin: $(BUILD)/firmware.elf $(STEPECHO) "Create $@" $(Q)esptool.py --chip esp32s2 elf2image $(FLASH_FLAGS) --elf-sha256-offset 0xb0 -o $@ $^ -# $(Q)$(OBJCOPY) -O binary $^ $@ -# $(Q)$(OBJCOPY) -O binary -j .vectors -j .text -j .data $^ $@ $(BUILD)/firmware.bin: $(BUILD)/circuitpython-firmware.bin | esp-idf-stamp $(Q)$(PYTHON) ../../tools/join_bins.py $@ 0x1000 $(BUILD)/esp-idf/bootloader/bootloader.bin 0x8000 $(BUILD)/esp-idf/partition_table/partition-table.bin 0x10000 $(BUILD)/circuitpython-firmware.bin diff --git a/ports/esp32s2/boards/microdev_micro_s2/sdkconfig b/ports/esp32s2/boards/microdev_micro_s2/sdkconfig index b73c4a8c2..67ac6d2f3 100644 --- a/ports/esp32s2/boards/microdev_micro_s2/sdkconfig +++ b/ports/esp32s2/boards/microdev_micro_s2/sdkconfig @@ -16,10 +16,8 @@ CONFIG_DEFAULT_PSRAM_CLK_IO=30 CONFIG_DEFAULT_PSRAM_CS_IO=26 # end of PSRAM clock and cs IO for ESP32S2 -CONFIG_SPIRAM_SPIWP_SD3_PIN=28 # CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set # CONFIG_SPIRAM_RODATA is not set -# CONFIG_SPIRAM_USE_AHB_DBUS3 is not set # CONFIG_SPIRAM_SPEED_80M is not set CONFIG_SPIRAM_SPEED_40M=y # CONFIG_SPIRAM_SPEED_26M is not set @@ -33,3 +31,4 @@ CONFIG_SPIRAM_USE_MEMMAP=y CONFIG_SPIRAM_MEMTEST=y # CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set # end of SPI RAM config + diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig b/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig index b73c4a8c2..67ac6d2f3 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig @@ -16,10 +16,8 @@ CONFIG_DEFAULT_PSRAM_CLK_IO=30 CONFIG_DEFAULT_PSRAM_CS_IO=26 # end of PSRAM clock and cs IO for ESP32S2 -CONFIG_SPIRAM_SPIWP_SD3_PIN=28 # CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set # CONFIG_SPIRAM_RODATA is not set -# CONFIG_SPIRAM_USE_AHB_DBUS3 is not set # CONFIG_SPIRAM_SPEED_80M is not set CONFIG_SPIRAM_SPEED_40M=y # CONFIG_SPIRAM_SPEED_26M is not set @@ -33,3 +31,4 @@ CONFIG_SPIRAM_USE_MEMMAP=y CONFIG_SPIRAM_MEMTEST=y # CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set # end of SPI RAM config + diff --git a/ports/esp32s2/esp-idf-config/partitions-16MB.csv b/ports/esp32s2/esp-idf-config/partitions-16MB.csv new file mode 100644 index 000000000..13ea81bea --- /dev/null +++ b/ports/esp32s2/esp-idf-config/partitions-16MB.csv @@ -0,0 +1,10 @@ +# ESP-IDF Partition Table +# Name, Type, SubType, Offset, Size, Flags +# bootloader.bin,, 0x1000, 32K +# partition table,, 0x8000, 4K +nvs, data, nvs, 0x9000, 20K, +otadata, data, ota, 0xe000, 8K, +ota_0, 0, ota_0, 0x10000, 2048K, +ota_1, 0, ota_1, 0x210000, 2048K, +uf2, app, factory,0x410000, 256K, +user_fs, data, fat, 0x450000, 11968K, diff --git a/ports/esp32s2/esp-idf-config/partitions-4MB.csv b/ports/esp32s2/esp-idf-config/partitions-4MB.csv new file mode 100644 index 000000000..cf9b3cca8 --- /dev/null +++ b/ports/esp32s2/esp-idf-config/partitions-4MB.csv @@ -0,0 +1,10 @@ +# ESP-IDF Partition Table +# Name, Type, SubType, Offset, Size, Flags +# bootloader.bin,, 0x1000, 32K +# partition table,, 0x8000, 4K +nvs, data, nvs, 0x9000, 20K, +otadata, data, ota, 0xe000, 8K, +ota_0, 0, ota_0, 0x10000, 1408K, +ota_1, 0, ota_1, 0x170000, 1408K, +uf2, app, factory,0x2d0000, 256K, +user_fs, data, fat, 0x310000, 960K, diff --git a/ports/esp32s2/esp-idf-config/partitions-8MB.csv b/ports/esp32s2/esp-idf-config/partitions-8MB.csv new file mode 100644 index 000000000..f4ba9b60a --- /dev/null +++ b/ports/esp32s2/esp-idf-config/partitions-8MB.csv @@ -0,0 +1,10 @@ +# ESP-IDF Partition Table +# Name, Type, SubType, Offset, Size, Flags +# bootloader.bin,, 0x1000, 32K +# partition table,, 0x8000, 4K +nvs, data, nvs, 0x9000, 20K, +otadata, data, ota, 0xe000, 8K, +ota_0, 0, ota_0, 0x10000, 2048K, +ota_1, 0, ota_1, 0x210000, 2048K, +uf2, app, factory,0x410000, 256K, +user_fs, data, fat, 0x450000, 3776K, diff --git a/ports/esp32s2/esp-idf-config/sdkconfig-16MB.defaults b/ports/esp32s2/esp-idf-config/sdkconfig-16MB.defaults new file mode 100644 index 000000000..2299feccd --- /dev/null +++ b/ports/esp32s2/esp-idf-config/sdkconfig-16MB.defaults @@ -0,0 +1,9 @@ +# No newlines in this file so they are preserved in the board sdkconfig. +# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y +CONFIG_ESPTOOLPY_FLASHSIZE="16MB" +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-16MB.csv" +CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-16MB.csv" \ No newline at end of file diff --git a/ports/esp32s2/esp-idf-config/sdkconfig-4MB.defaults b/ports/esp32s2/esp-idf-config/sdkconfig-4MB.defaults new file mode 100644 index 000000000..4da90d1bc --- /dev/null +++ b/ports/esp32s2/esp-idf-config/sdkconfig-4MB.defaults @@ -0,0 +1,9 @@ +# No newlines in this file so they are preserved in the board sdkconfig. +# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y +# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE="4MB" +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-4MB.csv" +CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-4MB.csv" \ No newline at end of file diff --git a/ports/esp32s2/esp-idf-config/sdkconfig-8MB.defaults b/ports/esp32s2/esp-idf-config/sdkconfig-8MB.defaults new file mode 100644 index 000000000..af681c5ea --- /dev/null +++ b/ports/esp32s2/esp-idf-config/sdkconfig-8MB.defaults @@ -0,0 +1,9 @@ +# No newlines in this file so they are preserved in the board sdkconfig. +# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y +# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE="8MB" +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-8MB.csv" +CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-8MB.csv" \ No newline at end of file diff --git a/ports/esp32s2/esp-idf-config/sdkconfig-debug.defaults b/ports/esp32s2/esp-idf-config/sdkconfig-debug.defaults new file mode 100644 index 000000000..f45f6ae9f --- /dev/null +++ b/ports/esp32s2/esp-idf-config/sdkconfig-debug.defaults @@ -0,0 +1,13 @@ +# No newlines in this file so they are preserved in the board sdkconfig. +CONFIG_ESP_ERR_TO_NAME_LOOKUP=y +CONFIG_ESP_CONSOLE_UART_DEFAULT=y +# CONFIG_ESP_CONSOLE_USB_CDC is not set +# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set +# CONFIG_ESP_CONSOLE_NONE is not set +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 +CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y +# CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT is not set +# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set +# CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set \ No newline at end of file diff --git a/ports/esp32s2/esp-idf-config/sdkconfig-opt.defaults b/ports/esp32s2/esp-idf-config/sdkconfig-opt.defaults new file mode 100644 index 000000000..af0746bc0 --- /dev/null +++ b/ports/esp32s2/esp-idf-config/sdkconfig-opt.defaults @@ -0,0 +1,12 @@ +# No newlines in this file so they are preserved in the board sdkconfig. +# CONFIG_ESP_ERR_TO_NAME_LOOKUP is not set +# CONFIG_ESP_CONSOLE_UART_DEFAULT is not set +# CONFIG_CONSOLE_UART_DEFAULT is not set +CONFIG_ESP_CONSOLE_UART_NONE=y +CONFIG_ESP_CONSOLE_NONE=y +CONFIG_ESP_CONSOLE_UART_NUM=-1 +CONFIG_CONSOLE_UART_NUM=-1 +# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set +CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT=y +# CONFIG_ESP32S2_PANIC_PRINT_HALT is not set +CONFIG_ESP32S2_PANIC_SILENT_REBOOT=y \ No newline at end of file diff --git a/ports/esp32s2/esp-idf-config/sdkconfig.defaults b/ports/esp32s2/esp-idf-config/sdkconfig.defaults new file mode 100644 index 000000000..4094367e0 --- /dev/null +++ b/ports/esp32s2/esp-idf-config/sdkconfig.defaults @@ -0,0 +1,853 @@ +# +# Automatically generated file. DO NOT EDIT. +# Espressif IoT Development Framework (ESP-IDF) Project Configuration +# +CONFIG_IDF_CMAKE=y +CONFIG_IDF_TARGET="esp32s2" +CONFIG_IDF_TARGET_ESP32S2=y +CONFIG_IDF_FIRMWARE_CHIP_ID=0x0002 + +# +# SDK tool configuration +# +CONFIG_SDK_TOOLPREFIX="xtensa-esp32s2-elf-" +# CONFIG_SDK_TOOLCHAIN_SUPPORTS_TIME_WIDE_64_BITS is not set +# end of SDK tool configuration + +# +# Build type +# +CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y +# CONFIG_APP_BUILD_TYPE_ELF_RAM is not set +CONFIG_APP_BUILD_GENERATE_BINARIES=y +CONFIG_APP_BUILD_BOOTLOADER=y +CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y +# end of Build type + +# +# Application manager +# +CONFIG_APP_COMPILE_TIME_DATE=y +# CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set +# CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set +# CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set +CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16 +# end of Application manager + +# +# Bootloader config +# +CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x1000 +CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set +# CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set +# CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set +# CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set +CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y +# CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set +# CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set +CONFIG_BOOTLOADER_LOG_LEVEL=3 +# CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_8V is not set +CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y +# CONFIG_BOOTLOADER_FACTORY_RESET is not set +# CONFIG_BOOTLOADER_APP_TEST is not set +CONFIG_BOOTLOADER_WDT_ENABLE=y +# CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set +CONFIG_BOOTLOADER_WDT_TIME_MS=9000 +# CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set +# CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set +CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0 +# CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set +# end of Bootloader config + +# +# Security features +# +CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE=y +# CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set +# CONFIG_SECURE_BOOT is not set +# CONFIG_SECURE_FLASH_ENC_ENABLED is not set +# CONFIG_SECURE_DISABLE_ROM_DL_MODE is not set +# CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE is not set +# end of Security features + +# +# Serial flasher config +# +CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200 +CONFIG_ESPTOOLPY_WITH_STUB=y +# CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set +# CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set +CONFIG_ESPTOOLPY_FLASHMODE_DIO=y +# CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set +CONFIG_ESPTOOLPY_FLASHMODE="dio" +# CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set +CONFIG_ESPTOOLPY_FLASHFREQ_40M=y +# CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set +# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set +CONFIG_ESPTOOLPY_FLASHFREQ="40m" +CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y +CONFIG_ESPTOOLPY_BEFORE_RESET=y +# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set +CONFIG_ESPTOOLPY_BEFORE="default_reset" +CONFIG_ESPTOOLPY_AFTER_RESET=y +# CONFIG_ESPTOOLPY_AFTER_NORESET is not set +CONFIG_ESPTOOLPY_AFTER="hard_reset" +# CONFIG_ESPTOOLPY_MONITOR_BAUD_CONSOLE is not set +# CONFIG_ESPTOOLPY_MONITOR_BAUD_9600B is not set +# CONFIG_ESPTOOLPY_MONITOR_BAUD_57600B is not set +CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B=y +# CONFIG_ESPTOOLPY_MONITOR_BAUD_230400B is not set +# CONFIG_ESPTOOLPY_MONITOR_BAUD_921600B is not set +# CONFIG_ESPTOOLPY_MONITOR_BAUD_2MB is not set +# CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER is not set +CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL=115200 +CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 +# end of Serial flasher config + +# +# Partition Table +# +# CONFIG_PARTITION_TABLE_SINGLE_APP is not set +# CONFIG_PARTITION_TABLE_TWO_OTA is not set +CONFIG_PARTITION_TABLE_CUSTOM=y +CONFIG_PARTITION_TABLE_OFFSET=0x8000 +CONFIG_PARTITION_TABLE_MD5=y +# end of Partition Table + +# +# Compiler options +# +# CONFIG_COMPILER_OPTIMIZATION_DEFAULT is not set +CONFIG_COMPILER_OPTIMIZATION_SIZE=y +# CONFIG_COMPILER_OPTIMIZATION_PERF is not set +# CONFIG_COMPILER_OPTIMIZATION_NONE is not set +# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE is not set +CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y +# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set +# CONFIG_COMPILER_CXX_EXCEPTIONS is not set +# CONFIG_COMPILER_CXX_RTTI is not set +CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y +# CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set +# CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set +# CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set +# CONFIG_COMPILER_WARN_WRITE_STRINGS is not set +# CONFIG_COMPILER_DISABLE_GCC8_WARNINGS is not set +# end of Compiler options + +# +# Component config +# + +# +# Application Level Tracing +# +# CONFIG_APPTRACE_DEST_TRAX is not set +CONFIG_APPTRACE_DEST_NONE=y +CONFIG_APPTRACE_LOCK_ENABLE=y +# end of Application Level Tracing + +# +# Driver configurations +# + +# +# ADC configuration +# +# CONFIG_ADC_FORCE_XPD_FSM is not set +CONFIG_ADC_DISABLE_DAC=y +# end of ADC configuration + +# +# SPI configuration +# +# CONFIG_SPI_MASTER_IN_IRAM is not set +CONFIG_SPI_MASTER_ISR_IN_IRAM=y +# CONFIG_SPI_SLAVE_IN_IRAM is not set +CONFIG_SPI_SLAVE_ISR_IN_IRAM=y +# end of SPI configuration + +# +# UART configuration +# +# CONFIG_UART_ISR_IN_IRAM is not set +# end of UART configuration +# end of Driver configurations + +# +# eFuse Bit Manager +# +# CONFIG_EFUSE_CUSTOM_TABLE is not set +# CONFIG_EFUSE_VIRTUAL is not set +CONFIG_EFUSE_MAX_BLK_LEN=256 +# end of eFuse Bit Manager + +# +# ESP-TLS +# +CONFIG_ESP_TLS_USING_MBEDTLS=y +CONFIG_ESP_TLS_SERVER=y +# CONFIG_ESP_TLS_PSK_VERIFICATION is not set +# end of ESP-TLS + +# +# ESP32S2-specific +# +# CONFIG_ESP32S2_DEFAULT_CPU_FREQ_80 is not set +# CONFIG_ESP32S2_DEFAULT_CPU_FREQ_160 is not set +CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240=y +CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ=240 + +# +# Memory protection +# +# CONFIG_ESP32S2_MEMPROT_FEATURE is not set +# end of Memory protection + +# +# Cache config +# +# CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB is not set +CONFIG_ESP32S2_INSTRUCTION_CACHE_16KB=y +# CONFIG_ESP32S2_INSTRUCTION_CACHE_LINE_16B is not set +CONFIG_ESP32S2_INSTRUCTION_CACHE_LINE_32B=y +# CONFIG_ESP32S2_DATA_CACHE_0KB is not set +# CONFIG_ESP32S2_DATA_CACHE_8KB is not set +CONFIG_ESP32S2_DATA_CACHE_16KB=y +# CONFIG_ESP32S2_DATA_CACHE_LINE_16B is not set +CONFIG_ESP32S2_DATA_CACHE_LINE_32B=y +# CONFIG_ESP32S2_INSTRUCTION_CACHE_WRAP is not set +# CONFIG_ESP32S2_DATA_CACHE_WRAP is not set +# end of Cache config + +# CONFIG_ESP32S2_SPIRAM_SUPPORT is not set +# CONFIG_ESP32S2_TRAX is not set +CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM=0x0 +# CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE is not set +CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO=y +CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES=2 +# CONFIG_ESP32S2_ULP_COPROC_ENABLED is not set +CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM=0 +CONFIG_ESP32S2_DEBUG_OCDAWARE=y +# CONFIG_ESP32S2_DEBUG_STUBS_ENABLE is not set +CONFIG_ESP32S2_BROWNOUT_DET=y +CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_7=y +# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_6 is not set +# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_5 is not set +# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_4 is not set +# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_3 is not set +# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_2 is not set +# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_1 is not set +CONFIG_ESP32S2_BROWNOUT_DET_LVL=7 +CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC_FRC1=y +# CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC is not set +# CONFIG_ESP32S2_TIME_SYSCALL_USE_FRC1 is not set +# CONFIG_ESP32S2_TIME_SYSCALL_USE_NONE is not set +CONFIG_ESP32S2_RTC_CLK_SRC_INT_RC=y +# CONFIG_ESP32S2_RTC_CLK_SRC_EXT_CRYS is not set +# CONFIG_ESP32S2_RTC_CLK_SRC_EXT_OSC is not set +# CONFIG_ESP32S2_RTC_CLK_SRC_INT_8MD256 is not set +CONFIG_ESP32S2_RTC_CLK_CAL_CYCLES=576 +# CONFIG_ESP32S2_NO_BLOBS is not set +# CONFIG_ESP32S2_KEEP_USB_ALIVE is not set +# CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM is not set +# CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE is not set +CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP=y +# end of ESP32S2-specific + +# +# Power Management +# +# CONFIG_PM_ENABLE is not set +# end of Power Management + +# +# Common ESP-related +# +CONFIG_ESP_ERR_TO_NAME_LOOKUP=y +CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 +CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 +CONFIG_ESP_MAIN_TASK_STACK_SIZE=8192 +CONFIG_ESP_IPC_TASK_STACK_SIZE=1024 +CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 +CONFIG_ESP_CONSOLE_UART_DEFAULT=y +# CONFIG_ESP_CONSOLE_USB_CDC is not set +# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set +# CONFIG_ESP_CONSOLE_NONE is not set +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 +CONFIG_ESP_INT_WDT=y +CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 +# CONFIG_ESP_TASK_WDT is not set +# CONFIG_ESP_PANIC_HANDLER_IRAM is not set +CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y +CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y +# end of Common ESP-related + +# +# Ethernet +# +# CONFIG_ETH_USE_SPI_ETHERNET is not set +# CONFIG_ETH_USE_OPENETH is not set +# end of Ethernet + +# +# Event Loop Library +# +# CONFIG_ESP_EVENT_LOOP_PROFILING is not set +CONFIG_ESP_EVENT_POST_FROM_ISR=y +CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y +# end of Event Loop Library + +# +# ESP NETIF Adapter +# +CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120 +CONFIG_ESP_NETIF_TCPIP_LWIP=y +# CONFIG_ESP_NETIF_LOOPBACK is not set +# CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER is not set +# end of ESP NETIF Adapter + +# +# ESP System Settings +# +CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y +# CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT is not set +# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set +# CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set +CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=y +# end of ESP System Settings + +# +# High resolution timer (esp_timer) +# +# CONFIG_ESP_TIMER_PROFILING is not set +CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 +CONFIG_ESP_TIMER_IMPL_SYSTIMER=y +# end of High resolution timer (esp_timer) + +# +# Wi-Fi +# +CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 +CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32 +# CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set +CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y +CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1 +CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32 +# CONFIG_ESP32_WIFI_CSI_ENABLED is not set +CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y +CONFIG_ESP32_WIFI_TX_BA_WIN=6 +CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y +CONFIG_ESP32_WIFI_RX_BA_WIN=6 +# CONFIG_ESP32_WIFI_NVS_ENABLED is not set +CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752 +CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32 +# CONFIG_ESP32_WIFI_DEBUG_LOG_ENABLE is not set +CONFIG_ESP32_WIFI_IRAM_OPT=y +CONFIG_ESP32_WIFI_RX_IRAM_OPT=y +# CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set +# end of Wi-Fi + +# +# PHY +# +# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set +CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP32_PHY_MAX_TX_POWER=20 +# end of PHY + +# +# Core dump +# +# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set +# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set +CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y +# end of Core dump + +# +# FreeRTOS +# +CONFIG_FREERTOS_UNICORE=y +CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF +CONFIG_FREERTOS_CORETIMER_0=y +# CONFIG_FREERTOS_CORETIMER_1 is not set +CONFIG_FREERTOS_OPTIMIZED_SCHEDULER=y +CONFIG_FREERTOS_HZ=100 +CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y +# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set +# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set +CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y +# CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set +CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y +CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 +CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y +# CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE is not set +# CONFIG_FREERTOS_ASSERT_DISABLE is not set +CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536 +CONFIG_FREERTOS_ISR_STACKSIZE=1536 +# CONFIG_FREERTOS_LEGACY_HOOKS is not set +CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 +CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y +# CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set +CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1 +CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048 +CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10 +CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 +# CONFIG_FREERTOS_USE_TRACE_FACILITY is not set +# CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set +CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y +# CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set +CONFIG_FREERTOS_DEBUG_OCDAWARE=y +# end of FreeRTOS + +# +# Heap memory debugging +# +CONFIG_HEAP_POISONING_DISABLED=y +# CONFIG_HEAP_POISONING_LIGHT is not set +# CONFIG_HEAP_POISONING_COMPREHENSIVE is not set +CONFIG_HEAP_TRACING_OFF=y +# CONFIG_HEAP_TRACING_STANDALONE is not set +# CONFIG_HEAP_TRACING_TOHOST is not set +# CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set +# end of Heap memory debugging + +# +# Log output +# +# CONFIG_LOG_DEFAULT_LEVEL_NONE is not set +# CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set +# CONFIG_LOG_DEFAULT_LEVEL_WARN is not set +CONFIG_LOG_DEFAULT_LEVEL_INFO=y +# CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set +# CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set +CONFIG_LOG_DEFAULT_LEVEL=3 +CONFIG_LOG_COLORS=y +CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y +# CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set +# end of Log output + +# +# LWIP +# +CONFIG_LWIP_LOCAL_HOSTNAME="espressif" +CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y +# CONFIG_LWIP_L2_TO_L3_COPY is not set +# CONFIG_LWIP_IRAM_OPTIMIZATION is not set +CONFIG_LWIP_TIMERS_ONDEMAND=y +CONFIG_LWIP_MAX_SOCKETS=10 +# CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set +# CONFIG_LWIP_SO_LINGER is not set +CONFIG_LWIP_SO_REUSE=y +CONFIG_LWIP_SO_REUSE_RXTOALL=y +CONFIG_LWIP_SO_RCVBUF=y +# CONFIG_LWIP_NETBUF_RECVINFO is not set +CONFIG_LWIP_IP4_FRAG=y +CONFIG_LWIP_IP6_FRAG=y +# CONFIG_LWIP_IP4_REASSEMBLY is not set +# CONFIG_LWIP_IP6_REASSEMBLY is not set +# CONFIG_LWIP_IP_FORWARD is not set +# CONFIG_LWIP_STATS is not set +# CONFIG_LWIP_ETHARP_TRUST_IP_MAC is not set +CONFIG_LWIP_ESP_GRATUITOUS_ARP=y +CONFIG_LWIP_GARP_TMR_INTERVAL=60 +CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32 +CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y +# CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set + +# +# DHCP server +# +CONFIG_LWIP_DHCPS_LEASE_UNIT=60 +CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8 +# end of DHCP server + +# CONFIG_LWIP_AUTOIP is not set +# CONFIG_LWIP_IPV6_AUTOCONFIG is not set +CONFIG_LWIP_NETIF_LOOPBACK=y +CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8 + +# +# TCP +# +CONFIG_LWIP_MAX_ACTIVE_TCP=16 +CONFIG_LWIP_MAX_LISTENING_TCP=16 +CONFIG_LWIP_TCP_MAXRTX=12 +CONFIG_LWIP_TCP_SYNMAXRTX=6 +CONFIG_LWIP_TCP_MSS=1440 +CONFIG_LWIP_TCP_TMR_INTERVAL=250 +CONFIG_LWIP_TCP_MSL=60000 +CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744 +CONFIG_LWIP_TCP_WND_DEFAULT=5744 +CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 +CONFIG_LWIP_TCP_QUEUE_OOSEQ=y +# CONFIG_LWIP_TCP_SACK_OUT is not set +# CONFIG_LWIP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set +CONFIG_LWIP_TCP_OVERSIZE_MSS=y +# CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set +# CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set +CONFIG_LWIP_TCP_RTO_TIME=3000 +# end of TCP + +# +# UDP +# +CONFIG_LWIP_MAX_UDP_PCBS=16 +CONFIG_LWIP_UDP_RECVMBOX_SIZE=6 +# end of UDP + +CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 +CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y +# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set +CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF +# CONFIG_LWIP_PPP_SUPPORT is not set +# CONFIG_LWIP_SLIP_SUPPORT is not set + +# +# ICMP +# +# CONFIG_LWIP_MULTICAST_PING is not set +# CONFIG_LWIP_BROADCAST_PING is not set +# end of ICMP + +# +# LWIP RAW API +# +CONFIG_LWIP_MAX_RAW_PCBS=16 +# end of LWIP RAW API + +# +# SNTP +# +CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1 +CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000 +# end of SNTP + +CONFIG_LWIP_ESP_LWIP_ASSERT=y + +# +# Debug +# +# CONFIG_LWIP_NETIF_DEBUG is not set +# CONFIG_LWIP_PBUF_DEBUG is not set +# CONFIG_LWIP_ETHARP_DEBUG is not set +# CONFIG_LWIP_API_LIB_DEBUG is not set +# CONFIG_LWIP_SOCKETS_DEBUG is not set +# CONFIG_LWIP_IP_DEBUG is not set +# CONFIG_LWIP_ICMP_DEBUG is not set +# CONFIG_LWIP_IP6_DEBUG is not set +# CONFIG_LWIP_ICMP6_DEBUG is not set +# end of Debug +# end of LWIP + +# +# mbedTLS +# +CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y +# CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set +# CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set +CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y +CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 +CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096 +# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set +# CONFIG_MBEDTLS_DEBUG is not set + +# +# Certificate Bundle +# +CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y +CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set +# CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set +# end of Certificate Bundle + +# CONFIG_MBEDTLS_ECP_RESTARTABLE is not set +# CONFIG_MBEDTLS_CMAC_C is not set +CONFIG_MBEDTLS_HARDWARE_AES=y +CONFIG_MBEDTLS_AES_USE_INTERRUPT=y +CONFIG_MBEDTLS_HARDWARE_GCM=y +CONFIG_MBEDTLS_HARDWARE_MPI=y +CONFIG_MBEDTLS_HARDWARE_SHA=y +# CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set +# CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set +CONFIG_MBEDTLS_HAVE_TIME=y +# CONFIG_MBEDTLS_HAVE_TIME_DATE is not set +CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y +CONFIG_MBEDTLS_SHA512_C=y +CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y +# CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set +# CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set +# CONFIG_MBEDTLS_TLS_DISABLED is not set +CONFIG_MBEDTLS_TLS_SERVER=y +CONFIG_MBEDTLS_TLS_CLIENT=y +CONFIG_MBEDTLS_TLS_ENABLED=y + +# +# TLS Key Exchange Methods +# +CONFIG_MBEDTLS_PSK_MODES=y +CONFIG_MBEDTLS_KEY_EXCHANGE_PSK=y +CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK=y +CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK=y +CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y +# end of TLS Key Exchange Methods + +CONFIG_MBEDTLS_SSL_RENEGOTIATION=y +# CONFIG_MBEDTLS_SSL_PROTO_SSL3 is not set +# CONFIG_MBEDTLS_SSL_PROTO_TLS1 is not set +# CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 is not set +CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y +CONFIG_MBEDTLS_SSL_PROTO_DTLS=y +CONFIG_MBEDTLS_SSL_ALPN=y +CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y + +# +# Symmetric Ciphers +# +CONFIG_MBEDTLS_AES_C=y +# CONFIG_MBEDTLS_CAMELLIA_C is not set +# CONFIG_MBEDTLS_DES_C is not set +CONFIG_MBEDTLS_RC4_DISABLED=y +# CONFIG_MBEDTLS_RC4_ENABLED_NO_DEFAULT is not set +# CONFIG_MBEDTLS_RC4_ENABLED is not set +# CONFIG_MBEDTLS_BLOWFISH_C is not set +# CONFIG_MBEDTLS_XTEA_C is not set +CONFIG_MBEDTLS_CCM_C=y +CONFIG_MBEDTLS_GCM_C=y +# end of Symmetric Ciphers + +# CONFIG_MBEDTLS_RIPEMD160_C is not set + +# +# Certificates +# +CONFIG_MBEDTLS_PEM_PARSE_C=y +CONFIG_MBEDTLS_PEM_WRITE_C=y +CONFIG_MBEDTLS_X509_CRL_PARSE_C=y +CONFIG_MBEDTLS_X509_CSR_PARSE_C=y +# end of Certificates + +CONFIG_MBEDTLS_ECP_C=y +CONFIG_MBEDTLS_ECDH_C=y +CONFIG_MBEDTLS_ECDSA_C=y +# CONFIG_MBEDTLS_ECJPAKE_C is not set +CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y +CONFIG_MBEDTLS_ECP_NIST_OPTIM=y +# CONFIG_MBEDTLS_POLY1305_C is not set +# CONFIG_MBEDTLS_CHACHA20_C is not set +# CONFIG_MBEDTLS_HKDF_C is not set +# CONFIG_MBEDTLS_THREADING_C is not set +# CONFIG_MBEDTLS_SECURITY_RISKS is not set +# end of mbedTLS + +# +# Newlib +# +CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y +# CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set +# CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set +# CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set +# CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set +CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y +# CONFIG_NEWLIB_NANO_FORMAT is not set +# end of Newlib + +# +# NVS +# +# end of NVS + +# +# PThreads +# +CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5 +CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 +CONFIG_PTHREAD_STACK_MIN=768 +CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1 +CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread" +# end of PThreads + +# +# SPI Flash driver +# +# CONFIG_SPI_FLASH_VERIFY_WRITE is not set +# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set +CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y +CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y +# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set +# CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set +# CONFIG_SPI_FLASH_USE_LEGACY_IMPL is not set +# CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set +CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y +CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20 +CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1 +CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192 + +# +# Auto-detect flash chips +# +CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y +CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y +CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y +# end of Auto-detect flash chips +# end of SPI Flash driver + +# +# Virtual file system +# +CONFIG_VFS_SUPPORT_IO=y +CONFIG_VFS_SUPPORT_DIR=y +CONFIG_VFS_SUPPORT_SELECT=y +CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y +CONFIG_VFS_SUPPORT_TERMIOS=y + +# +# Host File System I/O (Semihosting) +# +CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1 +CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN=128 +# end of Host File System I/O (Semihosting) +# end of Virtual file system + +# +# Supplicant +# +CONFIG_WPA_MBEDTLS_CRYPTO=y +# CONFIG_WPA_DEBUG_PRINT is not set +# CONFIG_WPA_TESTING_OPTIONS is not set +# CONFIG_WPA_WPS_WARS is not set +# end of Supplicant +# end of Component config + +# +# Compatibility options +# +# CONFIG_LEGACY_INCLUDE_COMMON_HEADERS is not set +# end of Compatibility options + +# Deprecated options for backward compatibility +CONFIG_TOOLPREFIX="xtensa-esp32s2-elf-" +# CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set +CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y +# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set +CONFIG_LOG_BOOTLOADER_LEVEL=3 +# CONFIG_APP_ROLLBACK_ENABLE is not set +# CONFIG_FLASH_ENCRYPTION_ENABLED is not set +# CONFIG_FLASHMODE_QIO is not set +# CONFIG_FLASHMODE_QOUT is not set +CONFIG_FLASHMODE_DIO=y +# CONFIG_FLASHMODE_DOUT is not set +# CONFIG_MONITOR_BAUD_9600B is not set +# CONFIG_MONITOR_BAUD_57600B is not set +CONFIG_MONITOR_BAUD_115200B=y +# CONFIG_MONITOR_BAUD_230400B is not set +# CONFIG_MONITOR_BAUD_921600B is not set +# CONFIG_MONITOR_BAUD_2MB is not set +# CONFIG_MONITOR_BAUD_OTHER is not set +CONFIG_MONITOR_BAUD_OTHER_VAL=115200 +CONFIG_MONITOR_BAUD=115200 +# CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG is not set +CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE=y +# CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED is not set +CONFIG_OPTIMIZATION_ASSERTIONS_SILENT=y +# CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set +# CONFIG_CXX_EXCEPTIONS is not set +CONFIG_STACK_CHECK_NONE=y +# CONFIG_STACK_CHECK_NORM is not set +# CONFIG_STACK_CHECK_STRONG is not set +# CONFIG_STACK_CHECK_ALL is not set +# CONFIG_WARN_WRITE_STRINGS is not set +# CONFIG_DISABLE_GCC8_WARNINGS is not set +# CONFIG_ESP32_APPTRACE_DEST_TRAX is not set +CONFIG_ESP32_APPTRACE_DEST_NONE=y +CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y +CONFIG_ADC2_DISABLE_DAC=y +CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 +CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 +CONFIG_MAIN_TASK_STACK_SIZE=8192 +CONFIG_IPC_TASK_STACK_SIZE=1024 +CONFIG_CONSOLE_UART_DEFAULT=y +# CONFIG_CONSOLE_UART_CUSTOM is not set +# CONFIG_ESP_CONSOLE_UART_NONE is not set +CONFIG_CONSOLE_UART=y +CONFIG_CONSOLE_UART_NUM=0 +CONFIG_CONSOLE_UART_BAUDRATE=115200 +CONFIG_INT_WDT=y +CONFIG_INT_WDT_TIMEOUT_MS=300 +# CONFIG_TASK_WDT is not set +# CONFIG_EVENT_LOOP_PROFILING is not set +CONFIG_POST_EVENTS_FROM_ISR=y +CONFIG_POST_EVENTS_FROM_IRAM_ISR=y +CONFIG_ESP32S2_PANIC_PRINT_HALT=y +# CONFIG_ESP32S2_PANIC_PRINT_REBOOT is not set +# CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set +# CONFIG_ESP32S2_PANIC_GDBSTUB is not set +CONFIG_TIMER_TASK_STACK_SIZE=3584 +CONFIG_SUPPORT_STATIC_ALLOCATION=y +# CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set +CONFIG_TIMER_TASK_PRIORITY=1 +CONFIG_TIMER_TASK_STACK_DEPTH=2048 +CONFIG_TIMER_QUEUE_LENGTH=10 +# CONFIG_L2_TO_L3_COPY is not set +# CONFIG_USE_ONLY_LWIP_SELECT is not set +CONFIG_ESP_GRATUITOUS_ARP=y +CONFIG_GARP_TMR_INTERVAL=60 +CONFIG_TCPIP_RECVMBOX_SIZE=32 +CONFIG_TCP_MAXRTX=12 +CONFIG_TCP_SYNMAXRTX=6 +CONFIG_TCP_MSS=1440 +CONFIG_TCP_MSL=60000 +CONFIG_TCP_SND_BUF_DEFAULT=5744 +CONFIG_TCP_WND_DEFAULT=5744 +CONFIG_TCP_RECVMBOX_SIZE=6 +CONFIG_TCP_QUEUE_OOSEQ=y +# CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set +CONFIG_TCP_OVERSIZE_MSS=y +# CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set +# CONFIG_TCP_OVERSIZE_DISABLE is not set +CONFIG_UDP_RECVMBOX_SIZE=6 +CONFIG_TCPIP_TASK_STACK_SIZE=3072 +CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y +# CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set +CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF +# CONFIG_PPP_SUPPORT is not set +CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 +CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 +CONFIG_ESP32_PTHREAD_STACK_MIN=768 +CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1 +CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" +CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y +# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set +# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set +CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y +CONFIG_SUPPORT_TERMIOS=y +CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1 +CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN=128 +# End of deprecated options diff --git a/ports/esp32s2/partitions-16MB.csv b/ports/esp32s2/partitions-16MB.csv deleted file mode 100644 index 13ea81bea..000000000 --- a/ports/esp32s2/partitions-16MB.csv +++ /dev/null @@ -1,10 +0,0 @@ -# ESP-IDF Partition Table -# Name, Type, SubType, Offset, Size, Flags -# bootloader.bin,, 0x1000, 32K -# partition table,, 0x8000, 4K -nvs, data, nvs, 0x9000, 20K, -otadata, data, ota, 0xe000, 8K, -ota_0, 0, ota_0, 0x10000, 2048K, -ota_1, 0, ota_1, 0x210000, 2048K, -uf2, app, factory,0x410000, 256K, -user_fs, data, fat, 0x450000, 11968K, diff --git a/ports/esp32s2/partitions-4MB.csv b/ports/esp32s2/partitions-4MB.csv deleted file mode 100644 index cf9b3cca8..000000000 --- a/ports/esp32s2/partitions-4MB.csv +++ /dev/null @@ -1,10 +0,0 @@ -# ESP-IDF Partition Table -# Name, Type, SubType, Offset, Size, Flags -# bootloader.bin,, 0x1000, 32K -# partition table,, 0x8000, 4K -nvs, data, nvs, 0x9000, 20K, -otadata, data, ota, 0xe000, 8K, -ota_0, 0, ota_0, 0x10000, 1408K, -ota_1, 0, ota_1, 0x170000, 1408K, -uf2, app, factory,0x2d0000, 256K, -user_fs, data, fat, 0x310000, 960K, diff --git a/ports/esp32s2/partitions-8MB.csv b/ports/esp32s2/partitions-8MB.csv deleted file mode 100644 index f4ba9b60a..000000000 --- a/ports/esp32s2/partitions-8MB.csv +++ /dev/null @@ -1,10 +0,0 @@ -# ESP-IDF Partition Table -# Name, Type, SubType, Offset, Size, Flags -# bootloader.bin,, 0x1000, 32K -# partition table,, 0x8000, 4K -nvs, data, nvs, 0x9000, 20K, -otadata, data, ota, 0xe000, 8K, -ota_0, 0, ota_0, 0x10000, 2048K, -ota_1, 0, ota_1, 0x210000, 2048K, -uf2, app, factory,0x410000, 256K, -user_fs, data, fat, 0x450000, 3776K, diff --git a/ports/esp32s2/sdkconfig-16MB.defaults b/ports/esp32s2/sdkconfig-16MB.defaults deleted file mode 100644 index af477999b..000000000 --- a/ports/esp32s2/sdkconfig-16MB.defaults +++ /dev/null @@ -1,10 +0,0 @@ - -# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set -# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set -# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set -# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y -CONFIG_ESPTOOLPY_FLASHSIZE="16MB" - -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-16MB.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions-16MB.csv" diff --git a/ports/esp32s2/sdkconfig-4MB.defaults b/ports/esp32s2/sdkconfig-4MB.defaults deleted file mode 100644 index 561f971c3..000000000 --- a/ports/esp32s2/sdkconfig-4MB.defaults +++ /dev/null @@ -1,10 +0,0 @@ - -# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set -# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y -# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set -# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE="4MB" - -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-4MB.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions-4MB.csv" diff --git a/ports/esp32s2/sdkconfig-8MB.defaults b/ports/esp32s2/sdkconfig-8MB.defaults deleted file mode 100644 index fcff17f46..000000000 --- a/ports/esp32s2/sdkconfig-8MB.defaults +++ /dev/null @@ -1,10 +0,0 @@ - -# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set -# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set -# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y -# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE="8MB" - -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-8MB.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions-8MB.csv" diff --git a/ports/esp32s2/sdkconfig.defaults b/ports/esp32s2/sdkconfig.defaults deleted file mode 100644 index 4094367e0..000000000 --- a/ports/esp32s2/sdkconfig.defaults +++ /dev/null @@ -1,853 +0,0 @@ -# -# Automatically generated file. DO NOT EDIT. -# Espressif IoT Development Framework (ESP-IDF) Project Configuration -# -CONFIG_IDF_CMAKE=y -CONFIG_IDF_TARGET="esp32s2" -CONFIG_IDF_TARGET_ESP32S2=y -CONFIG_IDF_FIRMWARE_CHIP_ID=0x0002 - -# -# SDK tool configuration -# -CONFIG_SDK_TOOLPREFIX="xtensa-esp32s2-elf-" -# CONFIG_SDK_TOOLCHAIN_SUPPORTS_TIME_WIDE_64_BITS is not set -# end of SDK tool configuration - -# -# Build type -# -CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y -# CONFIG_APP_BUILD_TYPE_ELF_RAM is not set -CONFIG_APP_BUILD_GENERATE_BINARIES=y -CONFIG_APP_BUILD_BOOTLOADER=y -CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y -# end of Build type - -# -# Application manager -# -CONFIG_APP_COMPILE_TIME_DATE=y -# CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set -# CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set -# CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set -CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16 -# end of Application manager - -# -# Bootloader config -# -CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x1000 -CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y -# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set -# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set -# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set -# CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set -# CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set -# CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set -CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y -# CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set -# CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set -CONFIG_BOOTLOADER_LOG_LEVEL=3 -# CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_8V is not set -CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y -# CONFIG_BOOTLOADER_FACTORY_RESET is not set -# CONFIG_BOOTLOADER_APP_TEST is not set -CONFIG_BOOTLOADER_WDT_ENABLE=y -# CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set -CONFIG_BOOTLOADER_WDT_TIME_MS=9000 -# CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set -# CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set -CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0 -# CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set -# end of Bootloader config - -# -# Security features -# -CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE=y -# CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set -# CONFIG_SECURE_BOOT is not set -# CONFIG_SECURE_FLASH_ENC_ENABLED is not set -# CONFIG_SECURE_DISABLE_ROM_DL_MODE is not set -# CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE is not set -# end of Security features - -# -# Serial flasher config -# -CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200 -CONFIG_ESPTOOLPY_WITH_STUB=y -# CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set -# CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set -CONFIG_ESPTOOLPY_FLASHMODE_DIO=y -# CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set -CONFIG_ESPTOOLPY_FLASHMODE="dio" -# CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set -CONFIG_ESPTOOLPY_FLASHFREQ_40M=y -# CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set -# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set -CONFIG_ESPTOOLPY_FLASHFREQ="40m" -CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y -CONFIG_ESPTOOLPY_BEFORE_RESET=y -# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set -CONFIG_ESPTOOLPY_BEFORE="default_reset" -CONFIG_ESPTOOLPY_AFTER_RESET=y -# CONFIG_ESPTOOLPY_AFTER_NORESET is not set -CONFIG_ESPTOOLPY_AFTER="hard_reset" -# CONFIG_ESPTOOLPY_MONITOR_BAUD_CONSOLE is not set -# CONFIG_ESPTOOLPY_MONITOR_BAUD_9600B is not set -# CONFIG_ESPTOOLPY_MONITOR_BAUD_57600B is not set -CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B=y -# CONFIG_ESPTOOLPY_MONITOR_BAUD_230400B is not set -# CONFIG_ESPTOOLPY_MONITOR_BAUD_921600B is not set -# CONFIG_ESPTOOLPY_MONITOR_BAUD_2MB is not set -# CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER is not set -CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL=115200 -CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 -# end of Serial flasher config - -# -# Partition Table -# -# CONFIG_PARTITION_TABLE_SINGLE_APP is not set -# CONFIG_PARTITION_TABLE_TWO_OTA is not set -CONFIG_PARTITION_TABLE_CUSTOM=y -CONFIG_PARTITION_TABLE_OFFSET=0x8000 -CONFIG_PARTITION_TABLE_MD5=y -# end of Partition Table - -# -# Compiler options -# -# CONFIG_COMPILER_OPTIMIZATION_DEFAULT is not set -CONFIG_COMPILER_OPTIMIZATION_SIZE=y -# CONFIG_COMPILER_OPTIMIZATION_PERF is not set -# CONFIG_COMPILER_OPTIMIZATION_NONE is not set -# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE is not set -CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y -# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set -# CONFIG_COMPILER_CXX_EXCEPTIONS is not set -# CONFIG_COMPILER_CXX_RTTI is not set -CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y -# CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set -# CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set -# CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set -# CONFIG_COMPILER_WARN_WRITE_STRINGS is not set -# CONFIG_COMPILER_DISABLE_GCC8_WARNINGS is not set -# end of Compiler options - -# -# Component config -# - -# -# Application Level Tracing -# -# CONFIG_APPTRACE_DEST_TRAX is not set -CONFIG_APPTRACE_DEST_NONE=y -CONFIG_APPTRACE_LOCK_ENABLE=y -# end of Application Level Tracing - -# -# Driver configurations -# - -# -# ADC configuration -# -# CONFIG_ADC_FORCE_XPD_FSM is not set -CONFIG_ADC_DISABLE_DAC=y -# end of ADC configuration - -# -# SPI configuration -# -# CONFIG_SPI_MASTER_IN_IRAM is not set -CONFIG_SPI_MASTER_ISR_IN_IRAM=y -# CONFIG_SPI_SLAVE_IN_IRAM is not set -CONFIG_SPI_SLAVE_ISR_IN_IRAM=y -# end of SPI configuration - -# -# UART configuration -# -# CONFIG_UART_ISR_IN_IRAM is not set -# end of UART configuration -# end of Driver configurations - -# -# eFuse Bit Manager -# -# CONFIG_EFUSE_CUSTOM_TABLE is not set -# CONFIG_EFUSE_VIRTUAL is not set -CONFIG_EFUSE_MAX_BLK_LEN=256 -# end of eFuse Bit Manager - -# -# ESP-TLS -# -CONFIG_ESP_TLS_USING_MBEDTLS=y -CONFIG_ESP_TLS_SERVER=y -# CONFIG_ESP_TLS_PSK_VERIFICATION is not set -# end of ESP-TLS - -# -# ESP32S2-specific -# -# CONFIG_ESP32S2_DEFAULT_CPU_FREQ_80 is not set -# CONFIG_ESP32S2_DEFAULT_CPU_FREQ_160 is not set -CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240=y -CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ=240 - -# -# Memory protection -# -# CONFIG_ESP32S2_MEMPROT_FEATURE is not set -# end of Memory protection - -# -# Cache config -# -# CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB is not set -CONFIG_ESP32S2_INSTRUCTION_CACHE_16KB=y -# CONFIG_ESP32S2_INSTRUCTION_CACHE_LINE_16B is not set -CONFIG_ESP32S2_INSTRUCTION_CACHE_LINE_32B=y -# CONFIG_ESP32S2_DATA_CACHE_0KB is not set -# CONFIG_ESP32S2_DATA_CACHE_8KB is not set -CONFIG_ESP32S2_DATA_CACHE_16KB=y -# CONFIG_ESP32S2_DATA_CACHE_LINE_16B is not set -CONFIG_ESP32S2_DATA_CACHE_LINE_32B=y -# CONFIG_ESP32S2_INSTRUCTION_CACHE_WRAP is not set -# CONFIG_ESP32S2_DATA_CACHE_WRAP is not set -# end of Cache config - -# CONFIG_ESP32S2_SPIRAM_SUPPORT is not set -# CONFIG_ESP32S2_TRAX is not set -CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM=0x0 -# CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE is not set -CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO=y -CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES=2 -# CONFIG_ESP32S2_ULP_COPROC_ENABLED is not set -CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM=0 -CONFIG_ESP32S2_DEBUG_OCDAWARE=y -# CONFIG_ESP32S2_DEBUG_STUBS_ENABLE is not set -CONFIG_ESP32S2_BROWNOUT_DET=y -CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_7=y -# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_6 is not set -# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_5 is not set -# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_4 is not set -# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_3 is not set -# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_2 is not set -# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_1 is not set -CONFIG_ESP32S2_BROWNOUT_DET_LVL=7 -CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC_FRC1=y -# CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC is not set -# CONFIG_ESP32S2_TIME_SYSCALL_USE_FRC1 is not set -# CONFIG_ESP32S2_TIME_SYSCALL_USE_NONE is not set -CONFIG_ESP32S2_RTC_CLK_SRC_INT_RC=y -# CONFIG_ESP32S2_RTC_CLK_SRC_EXT_CRYS is not set -# CONFIG_ESP32S2_RTC_CLK_SRC_EXT_OSC is not set -# CONFIG_ESP32S2_RTC_CLK_SRC_INT_8MD256 is not set -CONFIG_ESP32S2_RTC_CLK_CAL_CYCLES=576 -# CONFIG_ESP32S2_NO_BLOBS is not set -# CONFIG_ESP32S2_KEEP_USB_ALIVE is not set -# CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM is not set -# CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE is not set -CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP=y -# end of ESP32S2-specific - -# -# Power Management -# -# CONFIG_PM_ENABLE is not set -# end of Power Management - -# -# Common ESP-related -# -CONFIG_ESP_ERR_TO_NAME_LOOKUP=y -CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 -CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 -CONFIG_ESP_MAIN_TASK_STACK_SIZE=8192 -CONFIG_ESP_IPC_TASK_STACK_SIZE=1024 -CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 -CONFIG_ESP_CONSOLE_UART_DEFAULT=y -# CONFIG_ESP_CONSOLE_USB_CDC is not set -# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set -# CONFIG_ESP_CONSOLE_NONE is not set -CONFIG_ESP_CONSOLE_UART=y -CONFIG_ESP_CONSOLE_UART_NUM=0 -CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 -CONFIG_ESP_INT_WDT=y -CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 -# CONFIG_ESP_TASK_WDT is not set -# CONFIG_ESP_PANIC_HANDLER_IRAM is not set -CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y -CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y -# end of Common ESP-related - -# -# Ethernet -# -# CONFIG_ETH_USE_SPI_ETHERNET is not set -# CONFIG_ETH_USE_OPENETH is not set -# end of Ethernet - -# -# Event Loop Library -# -# CONFIG_ESP_EVENT_LOOP_PROFILING is not set -CONFIG_ESP_EVENT_POST_FROM_ISR=y -CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y -# end of Event Loop Library - -# -# ESP NETIF Adapter -# -CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120 -CONFIG_ESP_NETIF_TCPIP_LWIP=y -# CONFIG_ESP_NETIF_LOOPBACK is not set -# CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER is not set -# end of ESP NETIF Adapter - -# -# ESP System Settings -# -CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y -# CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT is not set -# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set -# CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set -CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=y -# end of ESP System Settings - -# -# High resolution timer (esp_timer) -# -# CONFIG_ESP_TIMER_PROFILING is not set -CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 -CONFIG_ESP_TIMER_IMPL_SYSTIMER=y -# end of High resolution timer (esp_timer) - -# -# Wi-Fi -# -CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 -CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32 -# CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set -CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y -CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1 -CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32 -# CONFIG_ESP32_WIFI_CSI_ENABLED is not set -CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y -CONFIG_ESP32_WIFI_TX_BA_WIN=6 -CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y -CONFIG_ESP32_WIFI_RX_BA_WIN=6 -# CONFIG_ESP32_WIFI_NVS_ENABLED is not set -CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752 -CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32 -# CONFIG_ESP32_WIFI_DEBUG_LOG_ENABLE is not set -CONFIG_ESP32_WIFI_IRAM_OPT=y -CONFIG_ESP32_WIFI_RX_IRAM_OPT=y -# CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set -# end of Wi-Fi - -# -# PHY -# -# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set -CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 -CONFIG_ESP32_PHY_MAX_TX_POWER=20 -# end of PHY - -# -# Core dump -# -# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set -# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set -CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y -# end of Core dump - -# -# FreeRTOS -# -CONFIG_FREERTOS_UNICORE=y -CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF -CONFIG_FREERTOS_CORETIMER_0=y -# CONFIG_FREERTOS_CORETIMER_1 is not set -CONFIG_FREERTOS_OPTIMIZED_SCHEDULER=y -CONFIG_FREERTOS_HZ=100 -CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y -# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set -# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set -CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y -# CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set -CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y -CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 -CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y -# CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE is not set -# CONFIG_FREERTOS_ASSERT_DISABLE is not set -CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536 -CONFIG_FREERTOS_ISR_STACKSIZE=1536 -# CONFIG_FREERTOS_LEGACY_HOOKS is not set -CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 -CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y -# CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set -CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1 -CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048 -CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10 -CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 -# CONFIG_FREERTOS_USE_TRACE_FACILITY is not set -# CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set -CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y -# CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set -CONFIG_FREERTOS_DEBUG_OCDAWARE=y -# end of FreeRTOS - -# -# Heap memory debugging -# -CONFIG_HEAP_POISONING_DISABLED=y -# CONFIG_HEAP_POISONING_LIGHT is not set -# CONFIG_HEAP_POISONING_COMPREHENSIVE is not set -CONFIG_HEAP_TRACING_OFF=y -# CONFIG_HEAP_TRACING_STANDALONE is not set -# CONFIG_HEAP_TRACING_TOHOST is not set -# CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set -# end of Heap memory debugging - -# -# Log output -# -# CONFIG_LOG_DEFAULT_LEVEL_NONE is not set -# CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set -# CONFIG_LOG_DEFAULT_LEVEL_WARN is not set -CONFIG_LOG_DEFAULT_LEVEL_INFO=y -# CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set -# CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set -CONFIG_LOG_DEFAULT_LEVEL=3 -CONFIG_LOG_COLORS=y -CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y -# CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set -# end of Log output - -# -# LWIP -# -CONFIG_LWIP_LOCAL_HOSTNAME="espressif" -CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y -# CONFIG_LWIP_L2_TO_L3_COPY is not set -# CONFIG_LWIP_IRAM_OPTIMIZATION is not set -CONFIG_LWIP_TIMERS_ONDEMAND=y -CONFIG_LWIP_MAX_SOCKETS=10 -# CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set -# CONFIG_LWIP_SO_LINGER is not set -CONFIG_LWIP_SO_REUSE=y -CONFIG_LWIP_SO_REUSE_RXTOALL=y -CONFIG_LWIP_SO_RCVBUF=y -# CONFIG_LWIP_NETBUF_RECVINFO is not set -CONFIG_LWIP_IP4_FRAG=y -CONFIG_LWIP_IP6_FRAG=y -# CONFIG_LWIP_IP4_REASSEMBLY is not set -# CONFIG_LWIP_IP6_REASSEMBLY is not set -# CONFIG_LWIP_IP_FORWARD is not set -# CONFIG_LWIP_STATS is not set -# CONFIG_LWIP_ETHARP_TRUST_IP_MAC is not set -CONFIG_LWIP_ESP_GRATUITOUS_ARP=y -CONFIG_LWIP_GARP_TMR_INTERVAL=60 -CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32 -CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y -# CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set - -# -# DHCP server -# -CONFIG_LWIP_DHCPS_LEASE_UNIT=60 -CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8 -# end of DHCP server - -# CONFIG_LWIP_AUTOIP is not set -# CONFIG_LWIP_IPV6_AUTOCONFIG is not set -CONFIG_LWIP_NETIF_LOOPBACK=y -CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8 - -# -# TCP -# -CONFIG_LWIP_MAX_ACTIVE_TCP=16 -CONFIG_LWIP_MAX_LISTENING_TCP=16 -CONFIG_LWIP_TCP_MAXRTX=12 -CONFIG_LWIP_TCP_SYNMAXRTX=6 -CONFIG_LWIP_TCP_MSS=1440 -CONFIG_LWIP_TCP_TMR_INTERVAL=250 -CONFIG_LWIP_TCP_MSL=60000 -CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744 -CONFIG_LWIP_TCP_WND_DEFAULT=5744 -CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 -CONFIG_LWIP_TCP_QUEUE_OOSEQ=y -# CONFIG_LWIP_TCP_SACK_OUT is not set -# CONFIG_LWIP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set -CONFIG_LWIP_TCP_OVERSIZE_MSS=y -# CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set -# CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set -CONFIG_LWIP_TCP_RTO_TIME=3000 -# end of TCP - -# -# UDP -# -CONFIG_LWIP_MAX_UDP_PCBS=16 -CONFIG_LWIP_UDP_RECVMBOX_SIZE=6 -# end of UDP - -CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 -CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y -# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set -CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF -# CONFIG_LWIP_PPP_SUPPORT is not set -# CONFIG_LWIP_SLIP_SUPPORT is not set - -# -# ICMP -# -# CONFIG_LWIP_MULTICAST_PING is not set -# CONFIG_LWIP_BROADCAST_PING is not set -# end of ICMP - -# -# LWIP RAW API -# -CONFIG_LWIP_MAX_RAW_PCBS=16 -# end of LWIP RAW API - -# -# SNTP -# -CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1 -CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000 -# end of SNTP - -CONFIG_LWIP_ESP_LWIP_ASSERT=y - -# -# Debug -# -# CONFIG_LWIP_NETIF_DEBUG is not set -# CONFIG_LWIP_PBUF_DEBUG is not set -# CONFIG_LWIP_ETHARP_DEBUG is not set -# CONFIG_LWIP_API_LIB_DEBUG is not set -# CONFIG_LWIP_SOCKETS_DEBUG is not set -# CONFIG_LWIP_IP_DEBUG is not set -# CONFIG_LWIP_ICMP_DEBUG is not set -# CONFIG_LWIP_IP6_DEBUG is not set -# CONFIG_LWIP_ICMP6_DEBUG is not set -# end of Debug -# end of LWIP - -# -# mbedTLS -# -CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y -# CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set -# CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set -CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y -CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 -CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096 -# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set -# CONFIG_MBEDTLS_DEBUG is not set - -# -# Certificate Bundle -# -CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y -CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y -# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set -# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set -# CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set -# end of Certificate Bundle - -# CONFIG_MBEDTLS_ECP_RESTARTABLE is not set -# CONFIG_MBEDTLS_CMAC_C is not set -CONFIG_MBEDTLS_HARDWARE_AES=y -CONFIG_MBEDTLS_AES_USE_INTERRUPT=y -CONFIG_MBEDTLS_HARDWARE_GCM=y -CONFIG_MBEDTLS_HARDWARE_MPI=y -CONFIG_MBEDTLS_HARDWARE_SHA=y -# CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set -# CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set -CONFIG_MBEDTLS_HAVE_TIME=y -# CONFIG_MBEDTLS_HAVE_TIME_DATE is not set -CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y -CONFIG_MBEDTLS_SHA512_C=y -CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y -# CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set -# CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set -# CONFIG_MBEDTLS_TLS_DISABLED is not set -CONFIG_MBEDTLS_TLS_SERVER=y -CONFIG_MBEDTLS_TLS_CLIENT=y -CONFIG_MBEDTLS_TLS_ENABLED=y - -# -# TLS Key Exchange Methods -# -CONFIG_MBEDTLS_PSK_MODES=y -CONFIG_MBEDTLS_KEY_EXCHANGE_PSK=y -CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK=y -CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK=y -CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK=y -CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y -CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA=y -CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y -CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y -CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y -CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y -CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y -# end of TLS Key Exchange Methods - -CONFIG_MBEDTLS_SSL_RENEGOTIATION=y -# CONFIG_MBEDTLS_SSL_PROTO_SSL3 is not set -# CONFIG_MBEDTLS_SSL_PROTO_TLS1 is not set -# CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 is not set -CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y -CONFIG_MBEDTLS_SSL_PROTO_DTLS=y -CONFIG_MBEDTLS_SSL_ALPN=y -CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y -CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y - -# -# Symmetric Ciphers -# -CONFIG_MBEDTLS_AES_C=y -# CONFIG_MBEDTLS_CAMELLIA_C is not set -# CONFIG_MBEDTLS_DES_C is not set -CONFIG_MBEDTLS_RC4_DISABLED=y -# CONFIG_MBEDTLS_RC4_ENABLED_NO_DEFAULT is not set -# CONFIG_MBEDTLS_RC4_ENABLED is not set -# CONFIG_MBEDTLS_BLOWFISH_C is not set -# CONFIG_MBEDTLS_XTEA_C is not set -CONFIG_MBEDTLS_CCM_C=y -CONFIG_MBEDTLS_GCM_C=y -# end of Symmetric Ciphers - -# CONFIG_MBEDTLS_RIPEMD160_C is not set - -# -# Certificates -# -CONFIG_MBEDTLS_PEM_PARSE_C=y -CONFIG_MBEDTLS_PEM_WRITE_C=y -CONFIG_MBEDTLS_X509_CRL_PARSE_C=y -CONFIG_MBEDTLS_X509_CSR_PARSE_C=y -# end of Certificates - -CONFIG_MBEDTLS_ECP_C=y -CONFIG_MBEDTLS_ECDH_C=y -CONFIG_MBEDTLS_ECDSA_C=y -# CONFIG_MBEDTLS_ECJPAKE_C is not set -CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y -CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y -CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y -CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y -CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y -CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y -CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y -CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y -CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y -CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y -CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y -CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y -CONFIG_MBEDTLS_ECP_NIST_OPTIM=y -# CONFIG_MBEDTLS_POLY1305_C is not set -# CONFIG_MBEDTLS_CHACHA20_C is not set -# CONFIG_MBEDTLS_HKDF_C is not set -# CONFIG_MBEDTLS_THREADING_C is not set -# CONFIG_MBEDTLS_SECURITY_RISKS is not set -# end of mbedTLS - -# -# Newlib -# -CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y -# CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set -# CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set -# CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set -# CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set -CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y -# CONFIG_NEWLIB_NANO_FORMAT is not set -# end of Newlib - -# -# NVS -# -# end of NVS - -# -# PThreads -# -CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5 -CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 -CONFIG_PTHREAD_STACK_MIN=768 -CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1 -CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread" -# end of PThreads - -# -# SPI Flash driver -# -# CONFIG_SPI_FLASH_VERIFY_WRITE is not set -# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set -CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y -CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y -# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set -# CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set -# CONFIG_SPI_FLASH_USE_LEGACY_IMPL is not set -# CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set -CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y -CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20 -CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1 -CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192 - -# -# Auto-detect flash chips -# -CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y -CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y -CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y -# end of Auto-detect flash chips -# end of SPI Flash driver - -# -# Virtual file system -# -CONFIG_VFS_SUPPORT_IO=y -CONFIG_VFS_SUPPORT_DIR=y -CONFIG_VFS_SUPPORT_SELECT=y -CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y -CONFIG_VFS_SUPPORT_TERMIOS=y - -# -# Host File System I/O (Semihosting) -# -CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1 -CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN=128 -# end of Host File System I/O (Semihosting) -# end of Virtual file system - -# -# Supplicant -# -CONFIG_WPA_MBEDTLS_CRYPTO=y -# CONFIG_WPA_DEBUG_PRINT is not set -# CONFIG_WPA_TESTING_OPTIONS is not set -# CONFIG_WPA_WPS_WARS is not set -# end of Supplicant -# end of Component config - -# -# Compatibility options -# -# CONFIG_LEGACY_INCLUDE_COMMON_HEADERS is not set -# end of Compatibility options - -# Deprecated options for backward compatibility -CONFIG_TOOLPREFIX="xtensa-esp32s2-elf-" -# CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set -# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set -# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set -CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y -# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set -# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set -CONFIG_LOG_BOOTLOADER_LEVEL=3 -# CONFIG_APP_ROLLBACK_ENABLE is not set -# CONFIG_FLASH_ENCRYPTION_ENABLED is not set -# CONFIG_FLASHMODE_QIO is not set -# CONFIG_FLASHMODE_QOUT is not set -CONFIG_FLASHMODE_DIO=y -# CONFIG_FLASHMODE_DOUT is not set -# CONFIG_MONITOR_BAUD_9600B is not set -# CONFIG_MONITOR_BAUD_57600B is not set -CONFIG_MONITOR_BAUD_115200B=y -# CONFIG_MONITOR_BAUD_230400B is not set -# CONFIG_MONITOR_BAUD_921600B is not set -# CONFIG_MONITOR_BAUD_2MB is not set -# CONFIG_MONITOR_BAUD_OTHER is not set -CONFIG_MONITOR_BAUD_OTHER_VAL=115200 -CONFIG_MONITOR_BAUD=115200 -# CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG is not set -CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE=y -# CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED is not set -CONFIG_OPTIMIZATION_ASSERTIONS_SILENT=y -# CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set -# CONFIG_CXX_EXCEPTIONS is not set -CONFIG_STACK_CHECK_NONE=y -# CONFIG_STACK_CHECK_NORM is not set -# CONFIG_STACK_CHECK_STRONG is not set -# CONFIG_STACK_CHECK_ALL is not set -# CONFIG_WARN_WRITE_STRINGS is not set -# CONFIG_DISABLE_GCC8_WARNINGS is not set -# CONFIG_ESP32_APPTRACE_DEST_TRAX is not set -CONFIG_ESP32_APPTRACE_DEST_NONE=y -CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y -CONFIG_ADC2_DISABLE_DAC=y -CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 -CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 -CONFIG_MAIN_TASK_STACK_SIZE=8192 -CONFIG_IPC_TASK_STACK_SIZE=1024 -CONFIG_CONSOLE_UART_DEFAULT=y -# CONFIG_CONSOLE_UART_CUSTOM is not set -# CONFIG_ESP_CONSOLE_UART_NONE is not set -CONFIG_CONSOLE_UART=y -CONFIG_CONSOLE_UART_NUM=0 -CONFIG_CONSOLE_UART_BAUDRATE=115200 -CONFIG_INT_WDT=y -CONFIG_INT_WDT_TIMEOUT_MS=300 -# CONFIG_TASK_WDT is not set -# CONFIG_EVENT_LOOP_PROFILING is not set -CONFIG_POST_EVENTS_FROM_ISR=y -CONFIG_POST_EVENTS_FROM_IRAM_ISR=y -CONFIG_ESP32S2_PANIC_PRINT_HALT=y -# CONFIG_ESP32S2_PANIC_PRINT_REBOOT is not set -# CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set -# CONFIG_ESP32S2_PANIC_GDBSTUB is not set -CONFIG_TIMER_TASK_STACK_SIZE=3584 -CONFIG_SUPPORT_STATIC_ALLOCATION=y -# CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set -CONFIG_TIMER_TASK_PRIORITY=1 -CONFIG_TIMER_TASK_STACK_DEPTH=2048 -CONFIG_TIMER_QUEUE_LENGTH=10 -# CONFIG_L2_TO_L3_COPY is not set -# CONFIG_USE_ONLY_LWIP_SELECT is not set -CONFIG_ESP_GRATUITOUS_ARP=y -CONFIG_GARP_TMR_INTERVAL=60 -CONFIG_TCPIP_RECVMBOX_SIZE=32 -CONFIG_TCP_MAXRTX=12 -CONFIG_TCP_SYNMAXRTX=6 -CONFIG_TCP_MSS=1440 -CONFIG_TCP_MSL=60000 -CONFIG_TCP_SND_BUF_DEFAULT=5744 -CONFIG_TCP_WND_DEFAULT=5744 -CONFIG_TCP_RECVMBOX_SIZE=6 -CONFIG_TCP_QUEUE_OOSEQ=y -# CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set -CONFIG_TCP_OVERSIZE_MSS=y -# CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set -# CONFIG_TCP_OVERSIZE_DISABLE is not set -CONFIG_UDP_RECVMBOX_SIZE=6 -CONFIG_TCPIP_TASK_STACK_SIZE=3072 -CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y -# CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set -CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF -# CONFIG_PPP_SUPPORT is not set -CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 -CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 -CONFIG_ESP32_PTHREAD_STACK_MIN=768 -CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1 -CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" -CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y -# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set -# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set -CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y -CONFIG_SUPPORT_TERMIOS=y -CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1 -CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN=128 -# End of deprecated options diff --git a/tools/build_board_info.py b/tools/build_board_info.py index 6ed8b8c16..f83282ea9 100644 --- a/tools/build_board_info.py +++ b/tools/build_board_info.py @@ -42,7 +42,7 @@ extension_by_port = { "cxd56": SPK, "mimxrt10xx": HEX_UF2, "litex": DFU, - "esp32s2": BIN + "esp32s2": BIN_UF2 } # Per board overrides -- cgit v1.2.3 From 1b29ceaf1a7b9fd2e8e0ce832b24528a6591bef8 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 8 Sep 2020 09:10:31 -0500 Subject: sam e54: disable microcontroller.cpu.voltage This hangs, and the usual workarounds didn't work. --- ports/atmel-samd/common-hal/microcontroller/Processor.c | 6 ++++++ ports/atmel-samd/mpconfigport.h | 7 +++++++ 2 files changed, 13 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/microcontroller/Processor.c b/ports/atmel-samd/common-hal/microcontroller/Processor.c index 199f19354..ba8daf3fb 100644 --- a/ports/atmel-samd/common-hal/microcontroller/Processor.c +++ b/ports/atmel-samd/common-hal/microcontroller/Processor.c @@ -61,6 +61,8 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#include + #include "py/mphal.h" #include "common-hal/microcontroller/Processor.h" @@ -276,6 +278,9 @@ float common_hal_mcu_processor_get_temperature(void) { } float common_hal_mcu_processor_get_voltage(void) { +#if MICROCONTROLLER_VOLTAGE_DISABLE + return NAN; +#else struct adc_sync_descriptor adc; static Adc* adc_insts[] = ADC_INSTS; @@ -320,6 +325,7 @@ float common_hal_mcu_processor_get_voltage(void) { adc_sync_deinit(&adc); // Multiply by 4 to compensate for SCALEDIOVCC division by 4. return (reading / 4095.0f) * 4.0f; +#endif } uint32_t common_hal_mcu_processor_get_frequency(void) { diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h index 2a2428d67..f185142e4 100644 --- a/ports/atmel-samd/mpconfigport.h +++ b/ports/atmel-samd/mpconfigport.h @@ -75,6 +75,9 @@ #define MICROPY_PY_SYS_PLATFORM "MicroChip SAMD51" #elif defined(SAME54) #define MICROPY_PY_SYS_PLATFORM "MicroChip SAME54" +#ifndef MICROCONTROLLER_VOLTAGE_DISABLE +#define MICROCONTROLLER_VOLTAGE_DISABLE (1) +#endif #endif #define SPI_FLASH_MAX_BAUDRATE 24000000 #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (1) @@ -246,4 +249,8 @@ CIRCUITPY_COMMON_ROOT_POINTERS \ mp_obj_t playing_audio[AUDIO_DMA_CHANNEL_COUNT]; +#ifndef MICROCONTROLLER_VOLTAGE_DISABLE +#define MICROCONTROLLER_VOLTAGE_DISABLE (0) +#endif + #endif // __INCLUDED_MPCONFIGPORT_H -- cgit v1.2.3 From c73182803d9ff5a0d270fa20a7649f61198ba5a0 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 25 Aug 2020 13:14:08 -0500 Subject: sdioio: fix code for the case where there is no SDHC1 .. it doesn't really make a difference (the old code created an empty else{} statement) but this is more correct. --- ports/atmel-samd/common-hal/sdioio/SDCard.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/sdioio/SDCard.c b/ports/atmel-samd/common-hal/sdioio/SDCard.c index 8cd077ecd..1f555b647 100644 --- a/ports/atmel-samd/common-hal/sdioio/SDCard.c +++ b/ports/atmel-samd/common-hal/sdioio/SDCard.c @@ -144,8 +144,8 @@ CLK PA21 PCC_D? (D32) BROWN hri_mclk_set_AHBMASK_SDHC0_bit(MCLK); hri_gclk_write_PCHCTRL_reg(GCLK, SDHC0_GCLK_ID, CONF_GCLK_SDHC0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); hri_gclk_write_PCHCTRL_reg(GCLK, SDHC0_GCLK_ID_SLOW, CONF_GCLK_SDHC0_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); - } else { #ifdef SDHC1_GCLK_ID + } else { hri_mclk_set_AHBMASK_SDHC1_bit(MCLK); hri_gclk_write_PCHCTRL_reg(GCLK, SDHC1_GCLK_ID, CONF_GCLK_SDHC1_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); hri_gclk_write_PCHCTRL_reg(GCLK, SDHC1_GCLK_ID_SLOW, CONF_GCLK_SDHC1_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); -- cgit v1.2.3 From 45eec5b5a566f049edaff11e8457bc0befe79c60 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 3 Sep 2020 10:00:26 -0500 Subject: samd: SPI: improve conditional code I recently misdiagnosed a "maybe-uninitialized" diagnostic as a bug in asf4. However, the problem was in our SPI code. A special case for samr21 MCUs was being applied to same54p20a and possibly other D5x/E5x MCUs, since the check was simply for pin PC19 existing at all. Change the check to use the macro PIN_PC19F_SERCOM4_PAD0 which is only defined if special function F of pin PC19 is SERCOM4 PAD0. Reorganize the code a little bit so that brace-matching in editors is not confused by the conditionalized code, including an unrelated change for APA102_SCK's condition. Revert the change to the Makefile that incorrectly attempted to silence the diagnostic. --- ports/atmel-samd/Makefile | 2 - ports/atmel-samd/common-hal/busio/SPI.c | 104 ++++++++++++++++---------------- 2 files changed, 52 insertions(+), 54 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile index f115f9f66..aba630dbb 100644 --- a/ports/atmel-samd/Makefile +++ b/ports/atmel-samd/Makefile @@ -286,8 +286,6 @@ SRC_ASF += \ $(BUILD)/asf4/$(CHIP_FAMILY)/hpl/sdhc/hpl_sdhc.o: CFLAGS += -Wno-cast-align -Wno-implicit-fallthrough endif -$(BUILD)/asf4/$(CHIP_FAMILY)/hpl/sercom/hpl_sercom.o: CFLAGS += -Wno-maybe-uninitialized - SRC_ASF := $(addprefix asf4/$(CHIP_FAMILY)/, $(SRC_ASF)) SRC_C += \ diff --git a/ports/atmel-samd/common-hal/busio/SPI.c b/ports/atmel-samd/common-hal/busio/SPI.c index 921713d69..189fd93b5 100644 --- a/ports/atmel-samd/common-hal/busio/SPI.c +++ b/ports/atmel-samd/common-hal/busio/SPI.c @@ -98,8 +98,8 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, uint8_t miso_pad = 0; uint8_t dopo = 255; - // Special case for SAMR boards. - #ifdef PIN_PC19 + // Special case for SAMR21 boards. (feather_radiofruit_zigbee) + #if defined(PIN_PC19F_SERCOM4_PAD0) if (miso == &pin_PC19) { if (mosi == &pin_PB30 && clock == &pin_PC18) { sercom = SERCOM4; @@ -113,67 +113,67 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, dopo = samd_peripherals_get_spi_dopo(clock_pad, mosi_pad); } // Error, leave SERCOM unset to throw an exception later. - } else { + } else #endif - for (int i = 0; i < NUM_SERCOMS_PER_PIN; i++) { - sercom_index = clock->sercom[i].index; // 2 for SERCOM2, etc. - if (sercom_index >= SERCOM_INST_NUM) { - continue; - } - Sercom* potential_sercom = sercom_insts[sercom_index]; - if ( - #if defined(MICROPY_HW_APA102_SCK) && defined(MICROPY_HW_APA102_MOSI) && !CIRCUITPY_BITBANG_APA102 - (potential_sercom->SPI.CTRLA.bit.ENABLE != 0 && - potential_sercom != status_apa102.spi_desc.dev.prvt && - !apa102_sck_in_use)) { - #else - potential_sercom->SPI.CTRLA.bit.ENABLE != 0) { - #endif - continue; - } - clock_pinmux = PINMUX(clock->number, (i == 0) ? MUX_C : MUX_D); - clock_pad = clock->sercom[i].pad; - if (!samd_peripherals_valid_spi_clock_pad(clock_pad)) { - continue; - } - for (int j = 0; j < NUM_SERCOMS_PER_PIN; j++) { - if (!mosi_none) { - if (sercom_index == mosi->sercom[j].index) { - mosi_pinmux = PINMUX(mosi->number, (j == 0) ? MUX_C : MUX_D); - mosi_pad = mosi->sercom[j].pad; - dopo = samd_peripherals_get_spi_dopo(clock_pad, mosi_pad); - if (dopo > 0x3) { - continue; // pad combination not possible - } - if (miso_none) { - sercom = potential_sercom; - break; + { + for (int i = 0; i < NUM_SERCOMS_PER_PIN; i++) { + sercom_index = clock->sercom[i].index; // 2 for SERCOM2, etc. + if (sercom_index >= SERCOM_INST_NUM) { + continue; + } + Sercom* potential_sercom = sercom_insts[sercom_index]; + if ( + #if defined(MICROPY_HW_APA102_SCK) && defined(MICROPY_HW_APA102_MOSI) && !CIRCUITPY_BITBANG_APA102 + (potential_sercom->SPI.CTRLA.bit.ENABLE != 0 && + potential_sercom != status_apa102.spi_desc.dev.prvt && + !apa102_sck_in_use) + #else + potential_sercom->SPI.CTRLA.bit.ENABLE != 0 + #endif + ) { + continue; + } + clock_pinmux = PINMUX(clock->number, (i == 0) ? MUX_C : MUX_D); + clock_pad = clock->sercom[i].pad; + if (!samd_peripherals_valid_spi_clock_pad(clock_pad)) { + continue; + } + for (int j = 0; j < NUM_SERCOMS_PER_PIN; j++) { + if (!mosi_none) { + if (sercom_index == mosi->sercom[j].index) { + mosi_pinmux = PINMUX(mosi->number, (j == 0) ? MUX_C : MUX_D); + mosi_pad = mosi->sercom[j].pad; + dopo = samd_peripherals_get_spi_dopo(clock_pad, mosi_pad); + if (dopo > 0x3) { + continue; // pad combination not possible + } + if (miso_none) { + sercom = potential_sercom; + break; + } + } else { + continue; } - } else { - continue; } - } - if (!miso_none) { - for (int k = 0; k < NUM_SERCOMS_PER_PIN; k++) { - if (sercom_index == miso->sercom[k].index) { - miso_pinmux = PINMUX(miso->number, (k == 0) ? MUX_C : MUX_D); - miso_pad = miso->sercom[k].pad; - sercom = potential_sercom; - break; + if (!miso_none) { + for (int k = 0; k < NUM_SERCOMS_PER_PIN; k++) { + if (sercom_index == miso->sercom[k].index) { + miso_pinmux = PINMUX(miso->number, (k == 0) ? MUX_C : MUX_D); + miso_pad = miso->sercom[k].pad; + sercom = potential_sercom; + break; + } } } + if (sercom != NULL) { + break; + } } if (sercom != NULL) { break; } - } - if (sercom != NULL) { - break; - } } - #ifdef PIN_PC19 } - #endif if (sercom == NULL) { mp_raise_ValueError(translate("Invalid pins")); } -- cgit v1.2.3 From be3e478fceed9da87e569a0fa40c5797139d99bc Mon Sep 17 00:00:00 2001 From: Chris Dailey Date: Thu, 17 Sep 2020 20:46:59 -0400 Subject: Add SDA & SDL, RX & TX to pins.c Despite the [silk on the dock board](https://wiki.makerdiary.com/nrf52840-m2-devkit/resources/nrf52840_m2_devkit_hw_diagram_v1_0.pdf), the SDA/SCL pins weren't defined. Though, they were already defined in `mpconfigboard.h`. Same for RX/TX. It looks like it declared `TXD` and `RXD`, so I didn't want to remove those, but I think it makes sense to have the "standard" pin names, but I moved ithem to illustrate they were all referencing the same pins. I mimicked the whitespace I saw in the metro_nrf52840_express port. --- ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c b/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c index cb3bda35a..d56fd3559 100644 --- a/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c +++ b/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c @@ -59,7 +59,13 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P1_9), MP_ROM_PTR(&pin_P1_09) }, { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_RXD), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_TXD), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P0_19) }, { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P0_20) }, { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P0_21) }, @@ -72,8 +78,12 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P1_03) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P1_04) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P1_06) }, { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_02) }, { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_03) }, @@ -81,6 +91,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_27) }, { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_26) }, { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_11) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_12) }, @@ -91,9 +102,6 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_LCD_BL), MP_ROM_PTR(&pin_P0_20) }, { MP_ROM_QSTR(MP_QSTR_LCD_RST), MP_ROM_PTR(&pin_P1_09) }, - { MP_ROM_QSTR(MP_QSTR_TXD), MP_ROM_PTR(&pin_P0_16) }, - { MP_ROM_QSTR(MP_QSTR_RXD), MP_ROM_PTR(&pin_P0_15) }, - { MP_ROM_QSTR(MP_QSTR_LED_R), MP_ROM_PTR(&pin_P0_30) }, { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_P0_29) }, { MP_ROM_QSTR(MP_QSTR_LED_B), MP_ROM_PTR(&pin_P0_31) }, -- cgit v1.2.3 From db078922e4a0e77515fd2bddfb9ba0a4cfbde552 Mon Sep 17 00:00:00 2001 From: nitz Date: Thu, 17 Sep 2020 21:32:19 -0400 Subject: Removed TXD/RXD, fixed whitespace. --- ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c b/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c index d56fd3559..027cd9d8d 100644 --- a/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c +++ b/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c @@ -60,12 +60,10 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_15) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_15) }, - { MP_ROM_QSTR(MP_QSTR_RXD), MP_ROM_PTR(&pin_P0_15) }, - + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P0_16) }, { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_16) }, - { MP_ROM_QSTR(MP_QSTR_TXD), MP_ROM_PTR(&pin_P0_16) }, - + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P0_19) }, { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P0_20) }, { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P0_21) }, @@ -78,10 +76,10 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P1_03) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P1_04) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P1_07) }, - + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_P1_05) }, { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P1_05) }, - + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_P1_06) }, { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P1_06) }, @@ -91,7 +89,6 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_27) }, { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_26) }, { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_04) }, - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_11) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_12) }, -- cgit v1.2.3 From c58bd4c04782efad04ffc08f77fda3efce83badb Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 18 Sep 2020 12:38:15 -0400 Subject: Add never_reset reservation to RGBMatrix init --- ports/stm/common-hal/rgbmatrix/RGBMatrix.c | 1 + 1 file changed, 1 insertion(+) (limited to 'ports') diff --git a/ports/stm/common-hal/rgbmatrix/RGBMatrix.c b/ports/stm/common-hal/rgbmatrix/RGBMatrix.c index 3b42631ad..2826cf53e 100644 --- a/ports/stm/common-hal/rgbmatrix/RGBMatrix.c +++ b/ports/stm/common-hal/rgbmatrix/RGBMatrix.c @@ -36,6 +36,7 @@ extern void _PM_IRQ_HANDLER(void); void *common_hal_rgbmatrix_timer_allocate() { TIM_TypeDef * timer = stm_peripherals_find_timer(); stm_peripherals_timer_reserve(timer); + stm_peripherals_timer_never_reset(timer); return timer; } -- cgit v1.2.3 From 3a59d30e1ae1a4d5159dadb5f34534b186cdf9fd Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 18 Sep 2020 12:48:15 -0400 Subject: Remove timer debug messages --- ports/stm/peripherals/timers.c | 4 ---- 1 file changed, 4 deletions(-) (limited to 'ports') diff --git a/ports/stm/peripherals/timers.c b/ports/stm/peripherals/timers.c index baa81d2b5..7bc5ea495 100644 --- a/ports/stm/peripherals/timers.c +++ b/ports/stm/peripherals/timers.c @@ -195,9 +195,7 @@ TIM_TypeDef * stm_peripherals_find_timer(void) { // If no results are found, no unclaimed pins with this timer are in this package, // and it is safe to pick if (timer_in_package == false && mcu_tim_banks[i] != NULL) { - // DEBUG: print the timer return mcu_tim_banks[i]; - mp_printf(&mp_plat_print, "Timer: %d\n",i); } } //TODO: secondary search for timers outside the pins in the board profile @@ -205,8 +203,6 @@ TIM_TypeDef * stm_peripherals_find_timer(void) { // Work backwards - higher index timers have fewer pin allocations for (size_t i = (MP_ARRAY_SIZE(mcu_tim_banks) - 1); i >= 0; i--) { if ((!stm_timer_reserved[i]) && (mcu_tim_banks[i] != NULL)) { - // DEBUG: print the timer - mp_printf(&mp_plat_print, "Timer: %d\n",i); return mcu_tim_banks[i]; } } -- cgit v1.2.3 From 5249a228a011c737401a32ff76316bef161cc086 Mon Sep 17 00:00:00 2001 From: nitz Date: Fri, 18 Sep 2020 14:27:00 -0400 Subject: More pin names cleanup. --- ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c | 3 ++- ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/pins.c | 5 ++--- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c b/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c index 027cd9d8d..2340885b5 100644 --- a/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c +++ b/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c @@ -103,7 +103,8 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_P0_29) }, { MP_ROM_QSTR(MP_QSTR_LED_B), MP_ROM_PTR(&pin_P0_31) }, - { MP_ROM_QSTR(MP_QSTR_USR_BTN), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_USR), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_P0_19) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/pins.c b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/pins.c index 006b24768..d46f36942 100644 --- a/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/pins.c +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/pins.c @@ -9,9 +9,8 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_P0_04) }, // User must connect manually. { MP_ROM_QSTR(MP_QSTR_VDIV), MP_ROM_PTR(&pin_P0_05) }, // User must connect manually. -// Not defining the NFC names until CircuitPython supports NFC. -// { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, -// { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, { MP_ROM_QSTR(MP_QSTR_P2), MP_ROM_PTR(&pin_P0_02) }, { MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_P0_03) }, -- cgit v1.2.3 From 8d6a28a9ffcc3b8993b0ac261c81b8a619094cb2 Mon Sep 17 00:00:00 2001 From: nitz Date: Fri, 18 Sep 2020 17:01:44 -0400 Subject: Update user button names. --- ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c | 3 +-- ports/nrf/boards/makerdiary_nrf52840_mdk/pins.c | 2 +- ports/nrf/boards/pitaya_go/pins.c | 2 +- 3 files changed, 3 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c b/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c index 2340885b5..7dc6db18f 100644 --- a/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c +++ b/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/pins.c @@ -103,8 +103,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_P0_29) }, { MP_ROM_QSTR(MP_QSTR_LED_B), MP_ROM_PTR(&pin_P0_31) }, - { MP_ROM_QSTR(MP_QSTR_USR), MP_ROM_PTR(&pin_P0_19) }, - { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_USR), MP_ROM_PTR(&pin_P0_19) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk/pins.c b/ports/nrf/boards/makerdiary_nrf52840_mdk/pins.c index 5284c2484..34f487b1d 100644 --- a/ports/nrf/boards/makerdiary_nrf52840_mdk/pins.c +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk/pins.c @@ -55,7 +55,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_P0_22) }, { MP_ROM_QSTR(MP_QSTR_LED_BLUE), MP_ROM_PTR(&pin_P0_24) }, - { MP_ROM_QSTR(MP_QSTR_USR_BTN), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_USR), MP_ROM_PTR(&pin_P1_00) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/pitaya_go/pins.c b/ports/nrf/boards/pitaya_go/pins.c index 92411581b..ba333fc2b 100644 --- a/ports/nrf/boards/pitaya_go/pins.c +++ b/ports/nrf/boards/pitaya_go/pins.c @@ -58,7 +58,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_P0_11) }, { MP_ROM_QSTR(MP_QSTR_LED_BLUE), MP_ROM_PTR(&pin_P0_12) }, - { MP_ROM_QSTR(MP_QSTR_USR_BTN), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_USER), MP_ROM_PTR(&pin_P1_00) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From 04ffd0dca0db404028da8ef2eb43f82b6e1b24ab Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Sat, 19 Sep 2020 13:38:04 -0700 Subject: Add gateway, subnet, and rssi info for current connected AP ap_rssi is a bound method, which I'm not keen on, but it works --- ports/esp32s2/common-hal/wifi/Radio.c | 38 ++++++++++++++++++++++++++++++ shared-bindings/wifi/Radio.c | 44 +++++++++++++++++++++++++++++++++++ shared-bindings/wifi/Radio.h | 3 +++ 3 files changed, 85 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index a0b8b6adc..4b2e7b64e 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -147,6 +147,44 @@ wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t return WIFI_RADIO_ERROR_NONE; } +mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self) { + if (!esp_netif_is_netif_up(self->netif)) { + return mp_const_none; + } + // Make sure the interface is in STA mode + wifi_mode_t if_mode; + esp_wifi_get_mode(&if_mode); + if (if_mode != WIFI_MODE_STA){ + return mp_const_none; + } + + wifi_ap_record_t ap_info; + esp_wifi_sta_get_ap_info(&ap_info); + + mp_obj_t rssi; + rssi = MP_OBJ_NEW_SMALL_INT(ap_info.rssi); + + return rssi; +} + +mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self) { + if (!esp_netif_is_netif_up(self->netif)) { + return mp_const_none; + } + esp_netif_ip_info_t ip_info; + esp_netif_get_ip_info(self->netif, &ip_info); + return common_hal_ipaddress_new_ipv4address(ip_info.gw.addr); +} + +mp_obj_t common_hal_wifi_radio_get_ipv4_subnet(wifi_radio_obj_t *self) { + if (!esp_netif_is_netif_up(self->netif)) { + return mp_const_none; + } + esp_netif_ip_info_t ip_info; + esp_netif_get_ip_info(self->netif, &ip_info); + return common_hal_ipaddress_new_ipv4address(ip_info.netmask.addr); +} + mp_obj_t common_hal_wifi_radio_get_ipv4_address(wifi_radio_obj_t *self) { if (!esp_netif_is_netif_up(self->netif)) { return mp_const_none; diff --git a/shared-bindings/wifi/Radio.c b/shared-bindings/wifi/Radio.c index 928f21da9..6f1935191 100644 --- a/shared-bindings/wifi/Radio.c +++ b/shared-bindings/wifi/Radio.c @@ -163,6 +163,47 @@ STATIC mp_obj_t wifi_radio_connect(size_t n_args, const mp_obj_t *pos_args, mp_m } STATIC MP_DEFINE_CONST_FUN_OBJ_KW(wifi_radio_connect_obj, 1, wifi_radio_connect); +//| ap_rssi: int +//| """RSSI of the currently connected AP. Returns none if not connected""" +//| +STATIC mp_obj_t wifi_radio_get_ap_rssi(mp_obj_t self) { + return common_hal_wifi_radio_get_ap_rssi(self); + +} +MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ap_rssi_obj, wifi_radio_get_ap_rssi); + +//| ipv4_gateway: Optional[ipaddress.IPv4Address] +//| """IP v4 Address of the gateway when connected to an access point. None otherwise.""" +//| +STATIC mp_obj_t wifi_radio_get_ipv4_gateway(mp_obj_t self) { + return common_hal_wifi_radio_get_ipv4_gateway(self); + +} +MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ipv4_gateway_obj, wifi_radio_get_ipv4_gateway); + +const mp_obj_property_t wifi_radio_ipv4_gateway_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&wifi_radio_get_ipv4_gateway_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| ipv4_subnet: Optional[ipaddress.IPv4Address] +//| """IP v4 Address of the subnet when connected to an access point. None otherwise.""" +//| +STATIC mp_obj_t wifi_radio_get_ipv4_subnet(mp_obj_t self) { + return common_hal_wifi_radio_get_ipv4_subnet(self); + +} +MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ipv4_subnet_obj, wifi_radio_get_ipv4_subnet); + +const mp_obj_property_t wifi_radio_ipv4_subnet_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&wifi_radio_get_ipv4_subnet_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + //| ipv4_address: Optional[ipaddress.IPv4Address] //| """IP v4 Address of the radio when connected to an access point. None otherwise.""" //| @@ -219,6 +260,9 @@ STATIC const mp_rom_map_elem_t wifi_radio_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&wifi_radio_connect_obj) }, // { MP_ROM_QSTR(MP_QSTR_connect_to_enterprise), MP_ROM_PTR(&wifi_radio_connect_to_enterprise_obj) }, + { MP_ROM_QSTR(MP_QSTR_ap_rssi), MP_ROM_PTR(&wifi_radio_get_ap_rssi_obj) }, + { MP_ROM_QSTR(MP_QSTR_ipv4_gateway), MP_ROM_PTR(&wifi_radio_ipv4_gateway_obj) }, + { MP_ROM_QSTR(MP_QSTR_ipv4_subnet), MP_ROM_PTR(&wifi_radio_ipv4_subnet_obj) }, { MP_ROM_QSTR(MP_QSTR_ipv4_address), MP_ROM_PTR(&wifi_radio_ipv4_address_obj) }, // { MP_ROM_QSTR(MP_QSTR_access_point_active), MP_ROM_PTR(&wifi_radio_access_point_active_obj) }, diff --git a/shared-bindings/wifi/Radio.h b/shared-bindings/wifi/Radio.h index b5341d51c..3c8ecbebd 100644 --- a/shared-bindings/wifi/Radio.h +++ b/shared-bindings/wifi/Radio.h @@ -53,6 +53,9 @@ extern void common_hal_wifi_radio_stop_scanning_networks(wifi_radio_obj_t *self) extern wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout, uint8_t* bssid, size_t bssid_len); +extern mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self); +extern mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self); +extern mp_obj_t common_hal_wifi_radio_get_ipv4_subnet(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ipv4_address(wifi_radio_obj_t *self); extern mp_int_t common_hal_wifi_radio_ping(wifi_radio_obj_t *self, mp_obj_t ip_address, mp_float_t timeout); -- cgit v1.2.3 From bc8863a3c788c7a44c164e35c71a7ec83cf29823 Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Sat, 19 Sep 2020 21:04:07 -0700 Subject: Simplify now that I have it working still need to figure out the bound method business --- ports/esp32s2/common-hal/wifi/Radio.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index 4b2e7b64e..5bc69eab4 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -151,6 +151,7 @@ mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self) { if (!esp_netif_is_netif_up(self->netif)) { return mp_const_none; } + // Make sure the interface is in STA mode wifi_mode_t if_mode; esp_wifi_get_mode(&if_mode); @@ -161,10 +162,7 @@ mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self) { wifi_ap_record_t ap_info; esp_wifi_sta_get_ap_info(&ap_info); - mp_obj_t rssi; - rssi = MP_OBJ_NEW_SMALL_INT(ap_info.rssi); - - return rssi; + return MP_OBJ_NEW_SMALL_INT(ap_info.rssi); } mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self) { -- cgit v1.2.3 From 40ec7a66e424c37da7556bdea303a4e5da30985c Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Mon, 21 Sep 2020 14:39:31 +0530 Subject: Update microS2 config files --- .../boards/microdev_micro_s2/mpconfigboard.h | 3 ++- .../boards/microdev_micro_s2/mpconfigboard.mk | 1 + ports/esp32s2/boards/microdev_micro_s2/pins.c | 21 ++++++++++++++++++++- 3 files changed, 23 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h index 1a1ef7a6c..c138c8ed1 100644 --- a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h +++ b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h @@ -26,10 +26,11 @@ //Micropython setup -#define MICROPY_HW_BOARD_NAME "microDev microS2" +#define MICROPY_HW_BOARD_NAME "microS2" #define MICROPY_HW_MCU_NAME "ESP32S2" #define MICROPY_HW_LED (&pin_GPIO21) +#define MICROPY_HW_BUTTON (&pin_GPIO0) #define MICROPY_HW_NEOPIXEL (&pin_GPIO33) #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) diff --git a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.mk b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.mk index 783e7ad4c..515617095 100644 --- a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.mk +++ b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.mk @@ -2,6 +2,7 @@ USB_VID = 0x239A USB_PID = 0x80C6 USB_PRODUCT = "microS2" USB_MANUFACTURER = "microDev" +USB_DEVICES = "CDC,MSC,HID" INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = MPZ diff --git a/ports/esp32s2/boards/microdev_micro_s2/pins.c b/ports/esp32s2/boards/microdev_micro_s2/pins.c index 25300b5c3..bd230ed38 100644 --- a/ports/esp32s2/boards/microdev_micro_s2/pins.c +++ b/ports/esp32s2/boards/microdev_micro_s2/pins.c @@ -42,8 +42,27 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, - { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO2) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) }, + + { MP_ROM_QSTR(MP_QSTR_MTCK), MP_ROM_PTR(&pin_GPIO39) }, + { MP_ROM_QSTR(MP_QSTR_MTDO), MP_ROM_PTR(&pin_GPIO40) }, + { MP_ROM_QSTR(MP_QSTR_MTDI), MP_ROM_PTR(&pin_GPIO41) }, + { MP_ROM_QSTR(MP_QSTR_MTMS), MP_ROM_PTR(&pin_GPIO42) }, + { MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_DAC2), MP_ROM_PTR(&pin_GPIO18) }, + + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO0) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO33) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From 22d9a94f2b880c57b7939e3e08a6fecd1ef59720 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Mon, 21 Sep 2020 13:47:14 -0400 Subject: Use write_value, add missing pin exceptions --- ports/esp32s2/common-hal/busio/SPI.c | 49 ++++++++++++++++++++++++++++++++---- 1 file changed, 44 insertions(+), 5 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/busio/SPI.c b/ports/esp32s2/common-hal/busio/SPI.c index 350580ea8..6e4e34474 100644 --- a/ports/esp32s2/common-hal/busio/SPI.c +++ b/ports/esp32s2/common-hal/busio/SPI.c @@ -115,6 +115,16 @@ static void spi_bus_intr_disable(void *self) void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) { + + //SCK is not optional. MOSI and MISO are + if (!clock) { + mp_raise_ValueError(translate("Must provide SCK pin")); + } + + if (!miso && !mosi) { + mp_raise_ValueError(translate("Must provide MISO or MOSI pin")); + } + spi_bus_config_t bus_config; bus_config.mosi_io_num = mosi != NULL ? mosi->number : -1; bus_config.miso_io_num = miso != NULL ? miso->number : -1; @@ -212,8 +222,12 @@ void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { spi_never_reset[self->host_id] = true; common_hal_never_reset_pin(self->clock_pin); - common_hal_never_reset_pin(self->MOSI_pin); - common_hal_never_reset_pin(self->MISO_pin); + if (self->MOSI_pin != NULL) { + common_hal_never_reset_pin(self->MOSI_pin); + } + if (self->MISO_pin != NULL) { + common_hal_never_reset_pin(self->MISO_pin); + } } bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { @@ -236,9 +250,15 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { spi_bus_free(self->host_id); common_hal_reset_pin(self->clock_pin); - common_hal_reset_pin(self->MOSI_pin); - common_hal_reset_pin(self->MISO_pin); + if (self->MOSI_pin != NULL) { + common_hal_reset_pin(self->MOSI_pin); + } + if (self->MISO_pin != NULL) { + common_hal_reset_pin(self->MISO_pin); + } self->clock_pin = NULL; + self->MISO_pin = NULL; + self->MOSI_pin = NULL; } bool common_hal_busio_spi_configure(busio_spi_obj_t *self, @@ -293,18 +313,37 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *data, size_t len) { + if (self->MOSI_pin == NULL) { + mp_raise_ValueError(translate("No MOSI Pin")); + } return common_hal_busio_spi_transfer(self, data, NULL, len); } bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value) { - return common_hal_busio_spi_transfer(self, NULL, data, len); + + if (self->MISO_pin == NULL) { + mp_raise_ValueError(translate("No MISO Pin")); + } + if (self->MOSI_pin == NULL) { + return common_hal_busio_spi_transfer(self, NULL, data, len); + } else { + memset(data, write_value, len); + return common_hal_busio_spi_transfer(self, data, data, len); + } } bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) { if (len == 0) { return true; } + // Other than the read special case, stop transfers that don't have a pin/array match + if (!self->MOSI_pin && (data_out != data_in)) { + mp_raise_ValueError(translate("No MOSI Pin")); + } + if (!self->MISO_pin && data_in) { + mp_raise_ValueError(translate("No MISO Pin")); + } spi_hal_context_t* hal = &self->hal_context; hal->send_buffer = NULL; -- cgit v1.2.3 From 183649aad888f39f84cb9f81d589f9786c28c73c Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 24 Aug 2020 09:00:08 -0500 Subject: samd: move mcu_find_pin_function to header .. it'll be used in can as well as sdio --- ports/atmel-samd/common-hal/microcontroller/Pin.c | 18 ++++++++++++ ports/atmel-samd/common-hal/microcontroller/Pin.h | 9 ++++++ ports/atmel-samd/common-hal/sdioio/SDCard.c | 34 ++++++----------------- ports/atmel-samd/tools/mksdiodata.py | 9 ++---- 4 files changed, 37 insertions(+), 33 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/microcontroller/Pin.c b/ports/atmel-samd/common-hal/microcontroller/Pin.c index ef1d8fffa..bec9dc1e2 100644 --- a/ports/atmel-samd/common-hal/microcontroller/Pin.c +++ b/ports/atmel-samd/common-hal/microcontroller/Pin.c @@ -24,6 +24,8 @@ * THE SOFTWARE. */ +#include "py/runtime.h" + #include "shared-bindings/microcontroller/Pin.h" #include "atmel_start_pins.h" @@ -256,3 +258,19 @@ void common_hal_mcu_pin_claim(const mcu_pin_obj_t* pin) { void common_hal_mcu_pin_reset_number(uint8_t pin_no) { reset_pin_number(pin_no); } + +mcu_pin_function_t *mcu_find_pin_function(mcu_pin_function_t *table, const mcu_pin_obj_t *pin, int instance, uint16_t name) { + if (!pin) { + return NULL; + } + + for(; table->obj; table++) { + if (instance != -1 && instance != table->instance) { + continue; + } + if (pin == table->obj) { + return table; + } + } + mp_raise_ValueError_varg(translate("%q pin invalid"), name); +} diff --git a/ports/atmel-samd/common-hal/microcontroller/Pin.h b/ports/atmel-samd/common-hal/microcontroller/Pin.h index 14887207a..59302713a 100644 --- a/ports/atmel-samd/common-hal/microcontroller/Pin.h +++ b/ports/atmel-samd/common-hal/microcontroller/Pin.h @@ -47,4 +47,13 @@ void never_reset_pin_number(uint8_t pin_number); void claim_pin(const mcu_pin_obj_t* pin); bool pin_number_is_free(uint8_t pin_number); +typedef struct { + const mcu_pin_obj_t *obj; + uint8_t instance; + uint8_t pin; + uint16_t function; +} mcu_pin_function_t; + +mcu_pin_function_t *mcu_find_pin_function(mcu_pin_function_t *table, const mcu_pin_obj_t *pin, int instance, uint16_t name); + #endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/atmel-samd/common-hal/sdioio/SDCard.c b/ports/atmel-samd/common-hal/sdioio/SDCard.c index 1f555b647..4d2539aa5 100644 --- a/ports/atmel-samd/common-hal/sdioio/SDCard.c +++ b/ports/atmel-samd/common-hal/sdioio/SDCard.c @@ -58,24 +58,6 @@ static Sdhc *sdhc_insts[] = SDHC_INSTS; -STATIC pin_function_t *find_pin_function(pin_function_t *table, const mcu_pin_obj_t *pin, int instance, uint16_t name) { - DEBUG_PRINT("\n\n[inst=% 2d] %q: ", instance, name); - DEBUG_PRINT_OBJ_NL(pin); - - for(; table->obj; table++) { - DEBUG_PRINT("[inst=% 2d] considering table @%p: "); - DEBUG_PRINT_OBJ(table->obj); - DEBUG_PRINT(" %d %d\n", table->instance, table->pin); - if (instance != -1 && instance != table->instance) { - continue; - } - if (pin == table->obj) { - return table; - } - } - mp_raise_ValueError_varg(translate("%q pin invalid"), name); -} - void common_hal_sdioio_sdcard_construct(sdioio_sdcard_obj_t *self, const mcu_pin_obj_t * clock, const mcu_pin_obj_t * command, uint8_t num_data, mcu_pin_obj_t ** data, uint32_t frequency) { @@ -98,15 +80,15 @@ CLK PA21 PCC_D? (D32) BROWN */ - pin_function_t *functions[6] = {}; - functions[0] = find_pin_function(sdio_cmd, command, -1, MP_QSTR_command); + mcu_pin_function_t *functions[6] = {}; + functions[0] = mcu_find_pin_function(sdio_cmd, command, -1, MP_QSTR_command); int instance = functions[0]->instance; - functions[1] = find_pin_function(sdio_ck, clock, instance, MP_QSTR_clock); - functions[2] = find_pin_function(sdio_dat0, data[0], instance, MP_QSTR_data0); + functions[1] = mcu_find_pin_function(sdio_ck, clock, instance, MP_QSTR_clock); + functions[2] = mcu_find_pin_function(sdio_dat0, data[0], instance, MP_QSTR_data0); if(num_data == 4) { - functions[3] = find_pin_function(sdio_dat1, data[1], instance, MP_QSTR_data1); - functions[4] = find_pin_function(sdio_dat2, data[2], instance, MP_QSTR_data2); - functions[5] = find_pin_function(sdio_dat3, data[3], instance, MP_QSTR_data3); + functions[3] = mcu_find_pin_function(sdio_dat1, data[1], instance, MP_QSTR_data1); + functions[4] = mcu_find_pin_function(sdio_dat2, data[2], instance, MP_QSTR_data2); + functions[5] = mcu_find_pin_function(sdio_dat3, data[3], instance, MP_QSTR_data3); } // We've verified all pins, now set their special functions @@ -114,7 +96,7 @@ CLK PA21 PCC_D? (D32) BROWN self->clock_pin = common_hal_mcu_pin_number(functions[1]->obj); for(int i=0; idata_pins[i] = common_hal_mcu_pin_number(function->obj); } else { diff --git a/ports/atmel-samd/tools/mksdiodata.py b/ports/atmel-samd/tools/mksdiodata.py index 0cce3819f..48c4a085f 100755 --- a/ports/atmel-samd/tools/mksdiodata.py +++ b/ports/atmel-samd/tools/mksdiodata.py @@ -1,7 +1,7 @@ #!/usr/bin/python3 def defines(name, function): - print(f'pin_function_t {name} [] = {{') + print(f'mcu_pin_function_t {name} [] = {{') for instance in (0, 1): for port in 'ABCD': for idx in range(32): @@ -23,13 +23,8 @@ print('''\ #include "mpconfigport.h" #include "atmel_start_pins.h" #include "hal/include/hal_gpio.h" +#include "common-hal/microcontroller/Pin.h" -typedef struct { - const mcu_pin_obj_t *obj; - uint8_t instance; - uint8_t pin; - uint16_t function; -} pin_function_t; ''') defines('sdio_ck', 'SDCK') -- cgit v1.2.3 From a2e1867f69ec2d703a9651e5c36a02b0e14dfd9c Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 20 Aug 2020 11:08:00 -0500 Subject: _canio: Minimal implementation for SAM E5x MCUs Tested & working: * Send standard packets * Receive standard packets (1 FIFO, no filter) Interoperation between SAM E54 Xplained running this tree and MicroPython running on STM32F405 Feather with an external transceiver was also tested. Many other aspects of a full implementation are not yet present, such as error detection and recovery. --- main.c | 8 + ports/atmel-samd/Makefile | 4 + .../asf4_conf/same54/peripheral_clk_config.h | 82 +++++ ports/atmel-samd/boards/common.template.ld | 7 +- .../boards/same54_xplained/mpconfigboard.mk | 1 + ports/atmel-samd/boards/same54_xplained/pins.c | 5 +- ports/atmel-samd/common-hal/_canio/CAN.c | 384 +++++++++++++++++++++ ports/atmel-samd/common-hal/_canio/CAN.h | 62 ++++ ports/atmel-samd/common-hal/_canio/Listener.c | 117 +++++++ ports/atmel-samd/common-hal/_canio/Listener.h | 53 +++ ports/atmel-samd/common-hal/_canio/__init__.c | 25 ++ ports/atmel-samd/common-hal/_canio/__init__.h | 62 ++++ ports/atmel-samd/tools/mkcandata.py | 31 ++ py/circuitpy_defns.mk | 9 + py/circuitpy_mpconfig.h | 8 + py/circuitpy_mpconfig.mk | 3 + shared-bindings/_canio/CAN.c | 338 ++++++++++++++++++ shared-bindings/_canio/CAN.h | 31 ++ shared-bindings/_canio/Listener.c | 197 +++++++++++ shared-bindings/_canio/Listener.h | 31 ++ shared-bindings/_canio/Match.c | 140 ++++++++ shared-bindings/_canio/Match.h | 33 ++ shared-bindings/_canio/Message.c | 213 ++++++++++++ shared-bindings/_canio/Message.h | 31 ++ shared-bindings/_canio/__init__.c | 73 ++++ shared-bindings/_canio/__init__.h | 29 ++ shared-module/_canio/Match.c | 43 +++ shared-module/_canio/Match.h | 41 +++ shared-module/_canio/Message.c | 85 +++++ shared-module/_canio/Message.h | 47 +++ 30 files changed, 2190 insertions(+), 3 deletions(-) create mode 100644 ports/atmel-samd/common-hal/_canio/CAN.c create mode 100644 ports/atmel-samd/common-hal/_canio/CAN.h create mode 100644 ports/atmel-samd/common-hal/_canio/Listener.c create mode 100644 ports/atmel-samd/common-hal/_canio/Listener.h create mode 100644 ports/atmel-samd/common-hal/_canio/__init__.c create mode 100644 ports/atmel-samd/common-hal/_canio/__init__.h create mode 100755 ports/atmel-samd/tools/mkcandata.py create mode 100644 shared-bindings/_canio/CAN.c create mode 100644 shared-bindings/_canio/CAN.h create mode 100644 shared-bindings/_canio/Listener.c create mode 100644 shared-bindings/_canio/Listener.h create mode 100644 shared-bindings/_canio/Match.c create mode 100644 shared-bindings/_canio/Match.h create mode 100644 shared-bindings/_canio/Message.c create mode 100644 shared-bindings/_canio/Message.h create mode 100644 shared-bindings/_canio/__init__.c create mode 100644 shared-bindings/_canio/__init__.h create mode 100644 shared-module/_canio/Match.c create mode 100644 shared-module/_canio/Match.h create mode 100644 shared-module/_canio/Message.c create mode 100644 shared-module/_canio/Message.h (limited to 'ports') diff --git a/main.c b/main.c index 5b719dc4b..f259fea3f 100755 --- a/main.c +++ b/main.c @@ -81,6 +81,10 @@ #include "supervisor/shared/bluetooth.h" #endif +#if CIRCUITPY_CANIO +#include "common-hal/_canio/CAN.h" +#endif + void do_str(const char *src, mp_parse_input_kind_t input_kind) { mp_lexer_t *lex = mp_lexer_new_from_str_len(MP_QSTR__lt_stdin_gt_, src, strlen(src), 0); if (lex == NULL) { @@ -226,6 +230,10 @@ void cleanup_after_vm(supervisor_allocation* heap) { free_memory(heap); supervisor_move_memory(); + #ifdef CIRCUITPY_CANIO + common_hal_canio_reset(); + #endif + reset_port(); #if CIRCUITPY_BOARD reset_board_busses(); diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile index aba630dbb..1ee21679d 100644 --- a/ports/atmel-samd/Makefile +++ b/ports/atmel-samd/Makefile @@ -393,6 +393,10 @@ SRC_QSTR += $(HEADER_BUILD)/sdiodata.h $(HEADER_BUILD)/sdiodata.h: tools/mksdiodata.py | $(HEADER_BUILD) $(Q)$(PYTHON3) $< > $@ +SRC_QSTR += $(HEADER_BUILD)/candata.h +$(HEADER_BUILD)/candata.h: tools/mkcandata.py | $(HEADER_BUILD) + $(Q)$(PYTHON3) $< > $@ + SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) # Sources that only hold QSTRs after pre-processing. SRC_QSTR_PREPROCESSOR += peripherals/samd/$(PERIPHERALS_CHIP_FAMILY)/clocks.c diff --git a/ports/atmel-samd/asf4_conf/same54/peripheral_clk_config.h b/ports/atmel-samd/asf4_conf/same54/peripheral_clk_config.h index 59fe8730e..51173f6d3 100644 --- a/ports/atmel-samd/asf4_conf/same54/peripheral_clk_config.h +++ b/ports/atmel-samd/asf4_conf/same54/peripheral_clk_config.h @@ -1165,6 +1165,88 @@ #define CONF_SDHC1_SLOW_FREQUENCY 12000000 #endif +// CAN Clock Settings +// CAN Clock source + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for CAN. +// sdhc_gclk_selection +#ifndef CONF_GCLK_CAN0_SRC +#define CONF_GCLK_CAN0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val +#endif + +/** + * \def CAN FREQUENCY + * \brief CAN's Clock frequency + */ +#ifndef CONF_CAN0_FREQUENCY +#define CONF_CAN0_FREQUENCY 120000000 +#endif + +// CAN Clock Settings +// CAN Clock source + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for CAN. +// sdhc_gclk_selection +#ifndef CONF_GCLK_CAN1_SRC +#define CONF_GCLK_CAN1_SRC GCLK_PCHCTRL_GEN_GCLK0_Val +#endif + +/** + * \def CAN FREQUENCY + * \brief CAN's Clock frequency + */ +#ifndef CONF_CAN1_FREQUENCY +#define CONF_CAN1_FREQUENCY 120000000 +#endif + // <<< end of configuration section >>> #endif // PERIPHERAL_CLK_CONFIG_H diff --git a/ports/atmel-samd/boards/common.template.ld b/ports/atmel-samd/boards/common.template.ld index 1054605c8..19e4753f8 100644 --- a/ports/atmel-samd/boards/common.template.ld +++ b/ports/atmel-samd/boards/common.template.ld @@ -51,6 +51,7 @@ SECTIONS { . = ALIGN(4); _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialize the .data section in RAM */ + . = ALIGN(4); *(.ramfunc) *(.ramfunc*) *(.data) /* .data sections */ @@ -61,11 +62,15 @@ SECTIONS } >RAM /* Uninitialized data section */ - .bss : + .bss (NOLOAD) : { . = ALIGN(4); _sbss = .; _szero = .; /* define a global symbol at bss start; used by startup code */ + /* Data accessed by the CAN peripheral must be in the first 64kB RAM */ + _scanram = .; + *(.canram) + _ecanram = .; *(.bss) *(.bss*) *(COMMON) diff --git a/ports/atmel-samd/boards/same54_xplained/mpconfigboard.mk b/ports/atmel-samd/boards/same54_xplained/mpconfigboard.mk index 7ac126514..e4472e05d 100644 --- a/ports/atmel-samd/boards/same54_xplained/mpconfigboard.mk +++ b/ports/atmel-samd/boards/same54_xplained/mpconfigboard.mk @@ -12,3 +12,4 @@ EXTERNAL_FLASH_DEVICES = "N25Q256A" LONGINT_IMPL = MPZ CIRCUITPY_SDIOIO = 1 +CIRCUITPY_CANIO = 1 diff --git a/ports/atmel-samd/boards/same54_xplained/pins.c b/ports/atmel-samd/boards/same54_xplained/pins.c index 8a864ab97..1ed431fba 100644 --- a/ports/atmel-samd/boards/same54_xplained/pins.c +++ b/ports/atmel-samd/boards/same54_xplained/pins.c @@ -48,8 +48,9 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_QT), MP_ROM_PTR(&pin_PA16) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_CANRX), MP_ROM_PTR(&pin_PB12) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_CANTX), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_STANDBY), MP_ROM_PTR(&pin_PC13) }, // EXT1 header { MP_OBJ_NEW_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, diff --git a/ports/atmel-samd/common-hal/_canio/CAN.c b/ports/atmel-samd/common-hal/_canio/CAN.c new file mode 100644 index 000000000..dcd269495 --- /dev/null +++ b/ports/atmel-samd/common-hal/_canio/CAN.c @@ -0,0 +1,384 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "py/mperrno.h" + +#include "peripheral_clk_config.h" + +#include "common-hal/_canio/CAN.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "supervisor/port.h" + +#include "component/can.h" + +#include "genhdr/candata.h" + +STATIC Can * const can_insts[] = CAN_INSTS; + +STATIC canio_can_obj_t *can_objs[MP_ARRAY_SIZE(can_insts)]; + +// This must be placed in the first 64kB of RAM +STATIC COMPILER_SECTION(".canram") canio_can_state_t can_state[MP_ARRAY_SIZE(can_insts)]; + +__attribute__((optimize("O0"), noinline)) +void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mcu_pin_obj_t *tx, int baudrate, bool loopback, bool silent) +{ + mcu_pin_function_t *tx_function = mcu_find_pin_function(can_tx, tx, -1, MP_QSTR_tx); + int instance = tx_function->instance; + + mcu_pin_function_t *rx_function = mcu_find_pin_function(can_rx, rx, instance, MP_QSTR_rx); + + const uint32_t can_frequency = CONF_CAN0_FREQUENCY; + +#define DIV_ROUND(a, b) (((a) + (b)/2) / (b)) +#define DIV_ROUND_UP(a, b) (((a) + (b) - 1) / (b)) + + uint32_t clocks_per_bit = DIV_ROUND(can_frequency, baudrate); + uint32_t clocks_to_sample = DIV_ROUND(clocks_per_bit * 7, 8); + uint32_t clocks_after_sample = clocks_per_bit - clocks_to_sample; + uint32_t divisor = MAX(DIV_ROUND_UP(clocks_to_sample, 256), DIV_ROUND_UP(clocks_after_sample, 128)); + if (divisor > 32) { + mp_raise_OSError(MP_EINVAL); // baudrate cannot be attained (16kHz or something is lower bound, should never happen) + } + + gpio_set_pin_direction(tx_function->pin, GPIO_DIRECTION_OUT); + gpio_set_pin_function(tx_function->pin, tx_function->function); + common_hal_never_reset_pin(tx_function->obj); + + if (rx_function) { + gpio_set_pin_direction(rx_function->pin, GPIO_DIRECTION_IN); + gpio_set_pin_function(rx_function->pin, rx_function->function); + common_hal_never_reset_pin(rx_function->obj); + } + + self->tx_pin_number = common_hal_mcu_pin_number(tx); + self->rx_pin_number = rx ? common_hal_mcu_pin_number(rx) : COMMON_HAL_MCU_NO_PIN; + self->hw = can_insts[instance]; + self->state = &can_state[instance]; + + self->loopback = loopback; + + // Allow configuration change + hri_can_set_CCCR_INIT_bit(self->hw); + while (hri_can_get_CCCR_INIT_bit(self->hw) == 0) { + } + hri_can_set_CCCR_CCE_bit(self->hw); + + if(instance == 0) { + hri_mclk_set_AHBMASK_CAN0_bit(MCLK); + hri_gclk_write_PCHCTRL_reg(GCLK, CAN0_GCLK_ID, CONF_GCLK_CAN0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); + + NVIC_DisableIRQ(CAN0_IRQn); + NVIC_ClearPendingIRQ(CAN0_IRQn); + NVIC_EnableIRQ(CAN0_IRQn); + hri_can_write_ILE_reg(self->hw, CAN_ILE_EINT0); +#ifdef CAN1_GCLK_ID + } else if(instance == 1) { + hri_mclk_set_AHBMASK_CAN1_bit(MCLK); + hri_gclk_write_PCHCTRL_reg(GCLK, CAN1_GCLK_ID, CONF_GCLK_CAN1_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); + + NVIC_DisableIRQ(CAN1_IRQn); + NVIC_ClearPendingIRQ(CAN1_IRQn); + NVIC_EnableIRQ(CAN1_IRQn); + hri_can_write_ILE_reg(self->hw, CAN_ILE_EINT0); +#endif + } + + self->hw->CCCR.bit.FDOE = 0; // neither FD nor Bit Rate Switch enabled + self->hw->CCCR.bit.BRSE = 0; + + hri_can_write_MRCFG_reg(self->hw, CAN_MRCFG_QOS(CAN_MRCFG_QOS_DISABLE_Val)); // QoS disabled (no sensitive operation) + + // A "nominal bit" is a header bit. With dual rate CAN FD, this is a slower rate + { + CAN_NBTP_Type btp = { + // 0 means "1 tq", but 2 is subtracted from NTSEG1 for the + // fixed 1 "SYNC" tq + .bit.NTSEG1 = DIV_ROUND(clocks_to_sample, divisor) - 2, + .bit.NTSEG2 = DIV_ROUND(clocks_after_sample, divisor) - 1, + .bit.NBRP = divisor - 1, + .bit.NSJW = DIV_ROUND(clocks_after_sample, divisor * 4), + }; + hri_can_write_NBTP_reg(self->hw, btp.reg); + } + + // we don't do the high bit rate yet, so do we need to set this register? + // hri_can_write_DBTP_reg(self->hw, ???); + // A "data bit" is a data bit :) with dul rate CAN FD, this is a higher + // rate. However, CAN FD is not implemented in CircuitPython, and this is the same rate as + // the "nominal rate". + { + CAN_DBTP_Type btp = { + .bit.DTSEG1 = DIV_ROUND(clocks_to_sample, divisor) - 1, + .bit.DTSEG2 = DIV_ROUND(clocks_after_sample, divisor) - 1, + .bit.DBRP = divisor - 1, + .bit.DSJW = DIV_ROUND(clocks_after_sample, divisor * 4), + }; + hri_can_write_DBTP_reg(self->hw, btp.reg); + } + + { + CAN_RXF0C_Type rxf = { + .bit.F0SA = (uint32_t)self->state->rx0_fifo, + .bit.F0S = COMMON_HAL_CANIO_RX_FIFO_SIZE, + }; + hri_can_write_RXF0C_reg(self->hw, rxf.reg); + } + + { + CAN_RXF1C_Type rxf = { + .bit.F1SA = (uint32_t)self->state->rx1_fifo, + .bit.F1S = COMMON_HAL_CANIO_RX_FIFO_SIZE, + }; + hri_can_write_RXF1C_reg(self->hw, rxf.reg); + } + + // All RX data has an 8 byte payload (max) + { + CAN_RXESC_Type esc = { + .bit.F0DS = CAN_RXESC_F0DS_DATA8_Val, + .bit.F1DS = CAN_RXESC_F1DS_DATA8_Val, + .bit.RBDS = CAN_RXESC_RBDS_DATA8_Val, + }; + hri_can_write_RXESC_reg(self->hw, esc.reg); + } + + // All TX data has an 8 byte payload (max) + { + CAN_TXESC_Type esc = { + .bit.TBDS = CAN_TXESC_TBDS_DATA8_Val, + }; + hri_can_write_TXESC_reg(self->hw, esc.reg); + } + + { + CAN_TXBC_Type bc = { + .bit.TBSA = (uint32_t)self->state->tx_fifo, + .bit.NDTB = COMMON_HAL_CANIO_TX_FIFO_SIZE, + .bit.TFQM = 0, // Messages are transmitted in the order submitted + }; + hri_can_write_TXBC_reg(self->hw, bc.reg); + } + + { + CAN_TXEFC_Type efc = { + .bit.EFS = 0, + }; + hri_can_write_TXEFC_reg(self->hw, efc.reg); + } + + { + CAN_GFC_Type gfc = { + .bit.RRFE = 1, + .bit.ANFS = CAN_GFC_ANFS_RXF0_Val, + .bit.ANFE = CAN_GFC_ANFE_REJECT_Val, + }; + hri_can_write_GFC_reg(self->hw, gfc.reg); + } + + { + CAN_SIDFC_Type dfc = { + .bit.LSS = COMMON_HAL_CANIO_RX_FILTER_SIZE, + .bit.FLSSA = (uint32_t)self->state->rx_filter + }; + hri_can_write_SIDFC_reg(self->hw, dfc.reg); + } + + { + CAN_XIDFC_Type dfc = { + .bit.LSE = 0, + }; + hri_can_write_XIDFC_reg(self->hw, dfc.reg); + } + + hri_can_write_XIDAM_reg(self->hw, CAN_XIDAM_RESETVALUE); + +// silent: The CAN is set in Bus Monitoring Mode by programming CCCR.MON to '1'. (tx pin unused) +// external loopback: The CAN can be set in External Loop Back Mode by programming TEST.LBCK and CCCR.MON to '1'. (rx pin unused) +// internal loopback (silent loopback): Internal Loop Back Mode is entered by programming bits TEST.LBCK and CCCR.MON to '1'. (tx, rx unused) + self->hw->CCCR.bit.MON = silent; + self->hw->CCCR.bit.TEST = loopback; + self->hw->TEST.bit.LBCK = loopback; + + if(instance == 0) { + NVIC_DisableIRQ(CAN0_IRQn); + NVIC_ClearPendingIRQ(CAN0_IRQn); + NVIC_EnableIRQ(CAN0_IRQn); +#ifdef CAN1_GCLK_ID + } else if(instance == 1) { + NVIC_DisableIRQ(CAN1_IRQn); + NVIC_ClearPendingIRQ(CAN1_IRQn); + NVIC_EnableIRQ(CAN1_IRQn); +#endif + } + + hri_can_write_ILE_reg(self->hw, CAN_ILE_EINT0); + // Prevent configuration change + hri_can_clear_CCCR_CCE_bit(self->hw); + hri_can_clear_CCCR_INIT_bit(self->hw); + while (hri_can_get_CCCR_INIT_bit(self->hw)) { + } + + can_objs[instance] = self; +} + +int common_hal_canio_can_loopback_get(canio_can_obj_t *self) +{ + return self->loopback; +} + +int common_hal_canio_can_baudrate_get(canio_can_obj_t *self) +{ + return self->baudrate; +} + +int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self) +{ + return -1; +} + +int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self) +{ + return -1; +} + +int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self) +{ + return -1; +} + +int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self) +{ + return -1; +} + +int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self) +{ + return -1; +} + +int common_hal_canio_can_state_get(canio_can_obj_t *self) { + return -1; +} + +void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *message) +{ + // We have just one dedicated TX buffer, use it! + canio_can_fifo_t *ent = &self->state->tx_fifo[0]; + ent->txb0.bit.ESI = false; + ent->txb0.bit.XTD = false; + ent->txb0.bit.RTR = message->rtr; + ent->txb0.bit.ID = message->id << 18; // short addresses are left-justified + + ent->txb1.bit.MM = 0; // "message marker" + ent->txb1.bit.EFC = 0; // don't store fifo events to event queue + ent->txb1.bit.FDF = 0; // Classic CAN format + ent->txb1.bit.BRS = 0; // No bit rate switching + ent->txb1.bit.DLC = message->size; + + if (!message->rtr) { + memcpy(ent->data, message->data, message->size); + } + + // TX buffer add request + self->hw->TXBAR.reg = 1; + + // wait 8ms (hard coded for now) for TX to occur + uint64_t deadline = port_get_raw_ticks(NULL) + 8; + while (port_get_raw_ticks(NULL) < deadline && !(self->hw->TXBTO.reg & 1)) { + RUN_BACKGROUND_TASKS; + } +} + +bool common_hal_canio_can_deinited(canio_can_obj_t *self) { + return !self->hw; +} + +void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self) { + if(common_hal_canio_can_deinited(self)) { + raise_deinited_error(); + } +} + +void common_hal_canio_can_deinit(canio_can_obj_t *self) +{ + if (self->hw) { + hri_can_set_CCCR_INIT_bit(self->hw); + self->hw = 0; + } + if (self->rx_pin_number != COMMON_HAL_MCU_NO_PIN) { + reset_pin_number(self->rx_pin_number); + self->rx_pin_number = COMMON_HAL_MCU_NO_PIN; + } + if (self->tx_pin_number != COMMON_HAL_MCU_NO_PIN) { + reset_pin_number(self->tx_pin_number); + self->tx_pin_number = COMMON_HAL_MCU_NO_PIN; + } +} + +void common_hal_canio_reset(void) { + memset(can_state, 0, sizeof(can_state)); + + for (size_t i=0; i +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "common-hal/_canio/__init__.h" +#include "common-hal/_canio/Listener.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/tick.h" + +void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout) { + if (nmatch) { + mp_raise_NotImplementedError(NULL); + } + + if (!can->fifo0_in_use) { + self->fifo_idx = 0; + self->fifo = can->state->rx0_fifo; + self->hw = (canio_rxfifo_reg_t*)&can->hw->RXF0C; + can->hw->IR.reg = CAN_IR_RF0N | CAN_IR_RF0W | CAN_IR_RF0F | CAN_IR_RF0L; + can->fifo0_in_use = true; + } else if (!can->fifo1_in_use) { + self->fifo_idx = 1; + self->fifo = can->state->rx1_fifo; + self->hw = (canio_rxfifo_reg_t*)&can->hw->RXF1C; + can->fifo1_in_use = true; + can->hw->IR.reg = CAN_IR_RF1N | CAN_IR_RF1W | CAN_IR_RF1F | CAN_IR_RF1L; + } else { + mp_raise_ValueError(translate("All RX FIFOs in use")); + } + + self->can = can; + common_hal_canio_listener_set_timeout(self, timeout); +} + +void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout) { + self->timeout_ms = (int)MICROPY_FLOAT_C_FUN(ceil)(timeout * 1000); +} + +float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self) { + return self->timeout_ms / 1000.0f; +} + +void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self) { + if(!self->can) { + raise_deinited_error(); + } + common_hal_canio_can_check_for_deinit(self->can); +} + +int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self) { + return self->hw->RXFS.bit.F0FL; +} + +bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_message_obj_t *message) { + if (!common_hal_canio_listener_in_waiting(self)) { + uint64_t deadline = supervisor_ticks_ms64() + self->timeout_ms; + do { + if(supervisor_ticks_ms64() > deadline) { + return false; + } + } while (!common_hal_canio_listener_in_waiting(self)); + } + int index = self->hw->RXFS.bit.F0GI; + canio_can_fifo_t *hw_message = &self->fifo[index]; + message->id = hw_message->rxb0.bit.ID >> 18; // short addresses are left-justified + message->rtr = hw_message->rxb0.bit.RTR; + message->size = hw_message->rxb1.bit.DLC; + if(!message->rtr) { + memcpy(message->data, hw_message->data, message->size); + } + self->hw->RXFA.bit.F0AI = index; + return true; +} + +void common_hal_canio_listener_deinit(canio_listener_obj_t *self) { + // free our FIFO, clear our matches, SOMETHING + if(self->can) { + if(self->fifo_idx == 0) { + self->can->fifo0_in_use = false; + } + if(self->fifo_idx == 1) { + self->can->fifo1_in_use = false; + } + } + self->fifo_idx = -1; + self->fifo = NULL; + self->can = NULL; + self->hw = NULL; +} diff --git a/ports/atmel-samd/common-hal/_canio/Listener.h b/ports/atmel-samd/common-hal/_canio/Listener.h new file mode 100644 index 000000000..cc6770e6e --- /dev/null +++ b/ports/atmel-samd/common-hal/_canio/Listener.h @@ -0,0 +1,53 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "common-hal/_canio/CAN.h" +#include "shared-module/_canio/Match.h" + +typedef struct { + __IO CAN_RXF0C_Type RXFC; /**< \brief (R/W 32) Rx FIFO n Configuration */ + __I CAN_RXF0S_Type RXFS; /**< \brief (R/ 32) Rx FIFO n Status */ + __IO CAN_RXF0A_Type RXFA; /**< \brief (R/W 32) Rx FIFO n Acknowledge */ +} canio_rxfifo_reg_t; + +typedef struct { + mp_obj_base_t base; + canio_can_obj_t *can; + canio_can_fifo_t *fifo; + canio_rxfifo_reg_t *hw; + uint32_t timeout_ms; + uint8_t fifo_idx; +} canio_listener_obj_t; + +void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout); +void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self); +void common_hal_canio_listener_deinit(canio_listener_obj_t *self); +bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_message_obj_t *message); +int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self); +float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self); +void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout); diff --git a/ports/atmel-samd/common-hal/_canio/__init__.c b/ports/atmel-samd/common-hal/_canio/__init__.c new file mode 100644 index 000000000..7932bfc2d --- /dev/null +++ b/ports/atmel-samd/common-hal/_canio/__init__.c @@ -0,0 +1,25 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ diff --git a/ports/atmel-samd/common-hal/_canio/__init__.h b/ports/atmel-samd/common-hal/_canio/__init__.h new file mode 100644 index 000000000..429369e18 --- /dev/null +++ b/ports/atmel-samd/common-hal/_canio/__init__.h @@ -0,0 +1,62 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "hal/utils/include/utils.h" +#include "component/can.h" + +#define COMMON_HAL_CANIO_MAX_MESSAGE_LENGTH (8) +#define COMMON_HAL_CANIO_RX_FIFO_SIZE (3) +#define COMMON_HAL_CANIO_RX_FILTER_SIZE (4) +#define COMMON_HAL_CANIO_TX_FIFO_SIZE (1) + +typedef struct canio_listener canio_listener_t; +typedef struct canio_can canio_can_t; + +typedef struct { + union { + CAN_RXBE_0_Type rxb0; + CAN_TXBE_0_Type txb0; + CAN_RXF0E_0_Type rxf0; + }; + union { + CAN_RXBE_1_Type rxb1; + CAN_TXBE_1_Type txb1; + CAN_RXF0E_1_Type rxf1; + }; + COMPILER_ALIGNED(4) + uint8_t data[COMMON_HAL_CANIO_MAX_MESSAGE_LENGTH]; +} canio_can_fifo_t; + +typedef uint32_t canio_can_filter_t; + +typedef struct { + canio_can_fifo_t tx_fifo[COMMON_HAL_CANIO_TX_FIFO_SIZE]; + canio_can_fifo_t rx0_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE]; + canio_can_fifo_t rx1_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE]; + canio_can_filter_t rx_filter[COMMON_HAL_CANIO_RX_FILTER_SIZE]; +} canio_can_state_t; diff --git a/ports/atmel-samd/tools/mkcandata.py b/ports/atmel-samd/tools/mkcandata.py new file mode 100755 index 000000000..9668d2208 --- /dev/null +++ b/ports/atmel-samd/tools/mkcandata.py @@ -0,0 +1,31 @@ +#!/usr/bin/python3 + +def defines(name, suffix): + print(f'mcu_pin_function_t {name} [] = {{') + for instance in (0, 1): + for function in 'HI': + for port in 'ABCD': + for idx in range(32): + pin = f'P{port}{idx:02d}' + pinmux = f'PINMUX_{pin}{function}_CAN{instance}_{suffix}' + print(f'''\ +#if defined({pinmux}) && ! defined(IGNORE_PIN_{pin}) + {{&pin_{pin}, {instance}, PIN_{pin}, {pinmux} & 0xffff}}, +#endif''') + print(f'{{NULL, 0, 0}}') + print(f'}};') + print() + +print('''\ +#include +#include "py/obj.h" +#include "sam.h" +#include "samd/pins.h" +#include "mpconfigport.h" +#include "atmel_start_pins.h" +#include "hal/include/hal_gpio.h" +#include "common-hal/microcontroller/Pin.h" +''') + +defines('can_rx', 'RX') +defines('can_tx', 'TX') diff --git a/py/circuitpy_defns.mk b/py/circuitpy_defns.mk index 6e98af868..2614dc011 100644 --- a/py/circuitpy_defns.mk +++ b/py/circuitpy_defns.mk @@ -142,6 +142,9 @@ endif ifeq ($(CIRCUITPY_CAMERA),1) SRC_PATTERNS += camera/% endif +ifeq ($(CIRCUITPY_CANIO),1) +SRC_PATTERNS += _canio/% +endif ifeq ($(CIRCUITPY_COUNTIO),1) SRC_PATTERNS += countio/% endif @@ -315,6 +318,9 @@ SRC_COMMON_HAL_ALL = \ busio/__init__.c \ camera/__init__.c \ camera/Camera.c \ + _canio/CAN.c \ + _canio/Listener.c \ + _canio/__init__.c \ countio/Counter.c \ countio/__init__.c \ digitalio/DigitalInOut.c \ @@ -384,6 +390,7 @@ $(filter $(SRC_PATTERNS), \ _bleio/Address.c \ _bleio/Attribute.c \ _bleio/ScanEntry.c \ + _canio/Match.c \ _eve/__init__.c \ camera/ImageFormat.c \ digitalio/Direction.c \ @@ -402,6 +409,8 @@ SRC_SHARED_MODULE_ALL = \ _bleio/Attribute.c \ _bleio/ScanEntry.c \ _bleio/ScanResults.c \ + _canio/Match.c \ + _canio/Message.c \ _eve/__init__.c \ _pixelbuf/PixelBuf.c \ _pixelbuf/__init__.c \ diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 4272de2ec..d1b12f354 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -336,6 +336,13 @@ extern const struct _mp_obj_module_t camera_module; #define CAMERA_MODULE #endif +#if CIRCUITPY_CANIO +extern const struct _mp_obj_module_t canio_module; +#define CANIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR__canio), (mp_obj_t)&canio_module }, +#else +#define CANIO_MODULE +#endif + #if CIRCUITPY_COUNTIO extern const struct _mp_obj_module_t countio_module; #define COUNTIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_countio), (mp_obj_t)&countio_module }, @@ -766,6 +773,7 @@ extern const struct _mp_obj_module_t wifi_module; BOARD_MODULE \ BUSIO_MODULE \ CAMERA_MODULE \ + CANIO_MODULE \ COUNTIO_MODULE \ DIGITALIO_MODULE \ DISPLAYIO_MODULE \ diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk index 54bdefc6d..9b9bd83b4 100644 --- a/py/circuitpy_mpconfig.mk +++ b/py/circuitpy_mpconfig.mk @@ -93,6 +93,9 @@ CFLAGS += -DCIRCUITPY_BUSIO=$(CIRCUITPY_BUSIO) CIRCUITPY_CAMERA ?= 0 CFLAGS += -DCIRCUITPY_CAMERA=$(CIRCUITPY_CAMERA) +CIRCUITPY_CANIO ?= 0 +CFLAGS += -DCIRCUITPY_CANIO=$(CIRCUITPY_CANIO) + CIRCUITPY_DIGITALIO ?= 1 CFLAGS += -DCIRCUITPY_DIGITALIO=$(CIRCUITPY_DIGITALIO) diff --git a/shared-bindings/_canio/CAN.c b/shared-bindings/_canio/CAN.c new file mode 100644 index 000000000..4c7ae3650 --- /dev/null +++ b/shared-bindings/_canio/CAN.c @@ -0,0 +1,338 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/_canio/CAN.h" +#include "common-hal/_canio/Listener.h" +#include "shared-bindings/_canio/CAN.h" +#include "shared-bindings/_canio/Listener.h" +#include "shared-bindings/_canio/Match.h" +#include "shared-bindings/_canio/Message.h" +#include "shared-bindings/microcontroller/Pin.h" + +#include "py/objproperty.h" +#include "py/runtime.h" + +//| +//| class CAN: +//| """CAN bus protocol""" +//| +//| def __init__(self, +//| rx: microcontroller.Pin, +//| tx: Optional[microcontroller.Pin]=None, +//| *, +//| baudrate: int = 250000, +//| loopback: bool = False, +//| ): +//| """A common shared-bus protocol. The rx and tx pins are generally +//| connected to a transceiver which controls the H and L pins on a shared +//| bus. +//| +//| :param ~microcontrller.Pin rx: the pin to receive with. +//| :param ~microcontrller.Pin tx: the pin to transmit with, or None if the peripheral should operate in "silent" mode. +//| :param int baudrate: The bit rate of the bus in Hz. All devices on the bus must agree on this value. +//| :param bool loopback: True if the peripheral will be operated in loopback mode. +//| """ +//| ... +//| +//## auto_restart: bool = False, # Whether to restart communications after entering bus-off state +//## sample_point: float = .875, # When to sample within bit time (0.0-1.0) +STATIC mp_obj_t canio_can_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_rx, ARG_tx, ARG_baudrate, ARG_loopback, ARG_silent, NUM_ARGS }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_rx, MP_ARG_OBJ | MP_ARG_REQUIRED, {.u_obj = 0} }, + { MP_QSTR_tx, MP_ARG_OBJ, {.u_obj = 0} }, + { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 250000} }, + { MP_QSTR_loopback, MP_ARG_BOOL, {.u_bool = false} }, + { MP_QSTR_silent, MP_ARG_BOOL, {.u_bool = false} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); + + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + +mp_printf(&mp_plat_print, "ARG_rx=%d args[ARG_rx].u_obj=%p\n", ARG_rx, args[ARG_rx].u_obj); +mp_printf(&mp_plat_print, "ARG_tx=%d args[ARG_tx].u_obj=%p\n", ARG_tx, args[ARG_tx].u_obj); + + mcu_pin_obj_t *rx_pin = validate_obj_is_free_pin(args[ARG_rx].u_obj); +mp_printf(&mp_plat_print, "rx_pin=%p\n", rx_pin); + mcu_pin_obj_t *tx_pin = validate_obj_is_free_pin_or_none(args[ARG_tx].u_obj); +mp_printf(&mp_plat_print, "tx_pin=%p\n", tx_pin); + + canio_can_obj_t *self = m_new_obj(canio_can_obj_t); + self->base.type = &canio_can_type; + common_hal_canio_can_construct(self, rx_pin, tx_pin, args[ARG_baudrate].u_int, args[ARG_loopback].u_bool, args[ARG_silent].u_bool); + + return MP_OBJ_FROM_PTR(self); +} + + +//| baudrate: int +//| """The baud rate(read-only)""" +//| +STATIC mp_obj_t canio_can_baudrate_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_baudrate_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_baudrate_get_obj, canio_can_baudrate_get); + +STATIC const mp_obj_property_t canio_can_baudrate_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_baudrate_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + +//| state: State +//| """The status of the hardware (read-only)""" +//| +STATIC mp_obj_t canio_can_state_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_state_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_state_get_obj, canio_can_state_get); + +STATIC const mp_obj_property_t canio_can_state_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_state_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + +//| transmit_error_count: int +//| """The number of transmit errors (read-only). Increased for a detected transmission error, decreased for successful transmission. Limited to the range from 0 to 255 inclusive. Also called TEC.""" +//| +STATIC mp_obj_t canio_can_transmit_error_count_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_transmit_error_count_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_transmit_error_count_get_obj, canio_can_transmit_error_count_get); + +STATIC const mp_obj_property_t canio_can_transmit_error_count_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_transmit_error_count_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + +//| receive_error_count: int +//| """The number of receive errors (read-only). Increased for a detected reception error, decreased for successful reception. Limited to the range from 0 to 255 inclusive. Also called REC.""" +//| +STATIC mp_obj_t canio_can_receive_error_count_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_receive_error_count_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_receive_error_count_get_obj, canio_can_receive_error_count_get); + +STATIC const mp_obj_property_t canio_can_receive_error_count_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_receive_error_count_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + +//| error_warning_state_count: int +//| """The number of times the controller enterted the Error Warning state (read-only). This number wraps around to 0 after an implementation-defined number of errors.""" +//| +STATIC mp_obj_t canio_can_error_warning_state_count_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_error_warning_state_count_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_error_warning_state_count_get_obj, canio_can_error_warning_state_count_get); + +STATIC const mp_obj_property_t canio_can_error_warning_state_count_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_error_warning_state_count_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + +//| error_passive_state_count: int +//| """The number of times the controller enterted the Error Passive state (read-only). This number wraps around to 0 after an implementation-defined number of errors.""" +//| +STATIC mp_obj_t canio_can_error_passive_state_count_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_error_passive_state_count_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_error_passive_state_count_get_obj, canio_can_error_passive_state_count_get); + +STATIC const mp_obj_property_t canio_can_error_passive_state_count_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_error_passive_state_count_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + +//| bus_off_state_count: int +//| """The number of times the controller enterted the Bus Off state (read-only). This number wraps around to 0 after an implementation-defined number of errors.""" +//| +STATIC mp_obj_t canio_can_bus_off_state_count_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_bus_off_state_count_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_bus_off_state_count_get_obj, canio_can_bus_off_state_count_get); + +STATIC const mp_obj_property_t canio_can_bus_off_state_count_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_bus_off_state_count_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + +#if 0 +//| # pending_tx_count: int +//| # """The number of messages waiting to be transmitted. (read-only)""" +#endif + +//| def listen(filters: Optional[Sequence[Filter]]=None, *, timeout: float=10) -> Listener: +//| """Start receiving messages that match any one of the filters. +//| Creating a listener is an expensive operation and can interfere with reception of messages by other listeners. +//| There is an implementation-defined maximum number of listeners and limit to the complexity of the filters. +//| If the hardware cannot support all the requested filters, a ValueError is raised. Note that generally there are some number of hardware filters shared among all fifos. +//| A message can be received by at most one Listener. +//| An empty filter list causes all messages to be accepted. +//| Timeout dictates how long readinto, read and next() will block. +//| Readinto will return false(), read will return None, and next() will raise StopIteration.""" +//| ... +//| +STATIC mp_obj_t canio_can_listen(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + common_hal_canio_can_check_for_deinit(self); + + enum { ARG_match, ARG_timeout, NUM_ARGS }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_match, MP_ARG_OBJ, {.u_obj = 0} }, + { MP_QSTR_timeout, MP_ARG_OBJ, {.u_obj = 0} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); + + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + size_t nmatch = 0; + mp_obj_t *match_objects = NULL; + + if (args[ARG_match].u_obj) { + mp_obj_get_array(args[ARG_match].u_obj, &nmatch, &match_objects); + } + + canio_match_obj_t *matches[nmatch]; + for (size_t i=0; iname); + } + matches[i] = MP_OBJ_TO_PTR(match_objects[i]); + } + + float timeout = args[ARG_timeout].u_obj ? mp_obj_get_float(args[ARG_timeout].u_obj) : 10.0f; + canio_listener_obj_t *listener = m_new_obj(canio_listener_obj_t); + listener->base.type = &canio_listener_type; + common_hal_canio_listener_construct(listener, self, nmatch, matches, timeout); + return listener; +} +MP_DEFINE_CONST_FUN_OBJ_KW(canio_can_listen_obj, 1, canio_can_listen); + +//| def send(message: Message) -> None: +//| """Send a message on the bus with the given data and id. +//| If the message could not be sent due to a full fifo or a bus error condition, RuntimeError is raised. +//| """ +//| ... +//| +STATIC mp_obj_t canio_can_send(mp_obj_t self_in, mp_obj_t message_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + mp_obj_type_t *message_type = mp_obj_get_type(message_in); + if (message_type != &canio_message_type) { + mp_raise_TypeError_varg(translate("expected '%q' but got '%q'"), MP_QSTR_Message, message_type->name); + } + + canio_message_obj_t *message = message_in; + common_hal_canio_can_send(self, message); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(canio_can_send_obj, canio_can_send); + +//| def deinit(self) -> None: +//| """Deinitialize this object, freeing its hardware resources""" +//| ... +//| +STATIC mp_obj_t canio_can_deinit(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_can_deinit_obj, canio_can_deinit); + +//| def __enter__(self) -> CAN: +//| """Returns self, to allow the object to be used in a `with` statement for resource control""" +//| ... +//| +STATIC mp_obj_t canio_can_enter(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_can_enter_obj, canio_can_enter); + +//| def __exit__(self, unused1, unused2, unused3) -> None: +//| """Calls deinit()""" +//| ... +STATIC mp_obj_t canio_can_exit(size_t num_args, const mp_obj_t args[]) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(args[0]); + common_hal_canio_can_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(canio_can_exit_obj, 4, 4, canio_can_exit); + +STATIC const mp_rom_map_elem_t canio_can_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&canio_can_enter_obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&canio_can_exit_obj) }, + { MP_ROM_QSTR(MP_QSTR_bus_off_state_count), MP_ROM_PTR(&canio_can_bus_off_state_count_obj) }, + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&canio_can_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR_error_passive_state_count), MP_ROM_PTR(&canio_can_error_passive_state_count_obj) }, + { MP_ROM_QSTR(MP_QSTR_error_warning_state_count), MP_ROM_PTR(&canio_can_error_warning_state_count_obj) }, + { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&canio_can_listen_obj) }, + { MP_ROM_QSTR(MP_QSTR_receive_error_count), MP_ROM_PTR(&canio_can_receive_error_count_obj) }, + { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&canio_can_send_obj) }, + { MP_ROM_QSTR(MP_QSTR_state), MP_ROM_PTR(&canio_can_state_obj) }, + { MP_ROM_QSTR(MP_QSTR_baudrate), MP_ROM_PTR(&canio_can_baudrate_obj) }, + { MP_ROM_QSTR(MP_QSTR_transmit_error_count), MP_ROM_PTR(&canio_can_transmit_error_count_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(canio_can_locals_dict, canio_can_locals_dict_table); + +const mp_obj_type_t canio_can_type = { + { &mp_type_type }, + .name = MP_QSTR_CAN, + .make_new = canio_can_make_new, + .locals_dict = (mp_obj_t)&canio_can_locals_dict, +}; diff --git a/shared-bindings/_canio/CAN.h b/shared-bindings/_canio/CAN.h new file mode 100644 index 000000000..81040cf23 --- /dev/null +++ b/shared-bindings/_canio/CAN.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" + +extern const mp_obj_type_t canio_can_type; diff --git a/shared-bindings/_canio/Listener.c b/shared-bindings/_canio/Listener.c new file mode 100644 index 000000000..7f83c735f --- /dev/null +++ b/shared-bindings/_canio/Listener.c @@ -0,0 +1,197 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/_canio/Listener.h" +#include "shared-bindings/_canio/Message.h" +#include "common-hal/_canio/Listener.h" + +#include "py/runtime.h" +#include "py/objproperty.h" + +//| class Listener: +//| """Listens for CAN message +//| +//| _canio.Listener is not constructed directly, but instead by calling the +//| Listen method of a _canio.CAN object.""" +//| + +//| def read(self) -> Optional[Message]: +//| """Returns a message, after waiting up to self.timeout seconds +//| +//| If no message is received in time, None is returned. Otherwise, +//| a Message is returned.""" +//| ... +//| +STATIC mp_obj_t canio_listener_read(mp_obj_t self_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_check_for_deinit(self); + + canio_message_obj_t *message = m_new_obj(canio_message_obj_t); + self->base.type = &canio_message_type; + + if (common_hal_canio_listener_readinto(self, message)) { + return message; + } else { + m_free(message); // message did not escape into vm + } + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_read_obj, canio_listener_read); + +//| def readinto(self, message: Message) -> bool: +//| """Returns a message, after waiting up to self.timeout seconds +//| +//| Returns True (and modifies message) if a message was received, +//| False otherwise.""" +//| ... +//| +STATIC mp_obj_t canio_listener_readinto(mp_obj_t self_in, mp_obj_t message) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_type_t *type = mp_obj_get_type(message); + if (type != &canio_message_type) { + mp_raise_TypeError_varg(translate("expected '%q' but got '%q'"), MP_QSTR_Message, type->name); + } + common_hal_canio_listener_check_for_deinit(self); + return mp_obj_new_bool(common_hal_canio_listener_readinto(self, message)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(canio_listener_readinto_obj, canio_listener_readinto); + +//| def in_waiting(self) -> int: +//| """Returns the number of messages waiting""" +//| ... +//| +STATIC mp_obj_t canio_listener_in_waiting(mp_obj_t self_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_listener_in_waiting(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_in_waiting_obj, canio_listener_in_waiting); + +//| def __iter__(self): +//| """Returns self, unless the object is deinitialized""" +//| ... +//| +STATIC mp_obj_t canio_listener_iter(mp_obj_t self_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_check_for_deinit(self); + return self; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_iter_obj, canio_listener_iter); + +//| def __next__(self): +//| """Returns the next waiting message, if one is available +//| +//| If the object is deinitialized, raises ValueError. +//| +//| If no message is waiting raises StopIteration""" +//| ... +//| +STATIC mp_obj_t canio_listener_next(mp_obj_t self_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_check_for_deinit(self); + if(common_hal_canio_listener_in_waiting(self)) { + return canio_listener_read(self_in); + } + return self; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_next_obj, canio_listener_next); + +//| def deinit(self) -> None: +//| """Deinitialize this object, freeing its hardware resources""" +//| ... +//| +STATIC mp_obj_t canio_listener_deinit(mp_obj_t self_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_deinit_obj, canio_listener_deinit); + +//| def __enter__(self) -> CAN: +//| """Returns self, to allow the object to be used in a `with` statement for resource control""" +//| ... +//| +STATIC mp_obj_t canio_listener_enter(mp_obj_t self_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_check_for_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_enter_obj, canio_listener_enter); + +//| def __exit__(self, unused1, unused2, unused3) -> None: +//| """Calls deinit()""" +//| ... +STATIC mp_obj_t canio_listener_exit(size_t num_args, const mp_obj_t args[]) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(args[0]); + common_hal_canio_listener_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(canio_listener_exit_obj, 4, 4, canio_listener_exit); + + +//| timeout : float +STATIC mp_obj_t canio_listener_timeout_get(mp_obj_t self_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_check_for_deinit(self); + return mp_obj_new_float(common_hal_canio_listener_get_timeout(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_timeout_get_obj, canio_listener_timeout_get); + +STATIC mp_obj_t canio_listener_timeout_set(mp_obj_t self_in, mp_obj_t timeout_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_check_for_deinit(self); + common_hal_canio_listener_set_timeout(self, mp_obj_get_float(timeout_in)); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(canio_listener_timeout_set_obj, canio_listener_timeout_set); + +STATIC const mp_obj_property_t canio_listener_timeout_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_listener_timeout_get_obj, + (mp_obj_t)&canio_listener_timeout_set_obj, + (mp_obj_t)mp_const_none}, +}; + + + +STATIC const mp_rom_map_elem_t canio_listener_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&canio_listener_enter_obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&canio_listener_exit_obj) }, + { MP_ROM_QSTR(MP_QSTR___iter__), MP_ROM_PTR(&canio_listener_iter_obj) }, + { MP_ROM_QSTR(MP_QSTR___next__), MP_ROM_PTR(&canio_listener_next_obj) }, + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&canio_listener_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR_in_waiting), MP_ROM_PTR(&canio_listener_in_waiting_obj) }, + { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&canio_listener_read_obj) }, + { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&canio_listener_readinto_obj) }, + { MP_ROM_QSTR(MP_QSTR_timeout), MP_ROM_PTR(&canio_listener_timeout_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(canio_listener_locals_dict, canio_listener_locals_dict_table); + +const mp_obj_type_t canio_listener_type = { + { &mp_type_type }, + .name = MP_QSTR_Listener, + .locals_dict = (mp_obj_dict_t*)&canio_listener_locals_dict, +}; diff --git a/shared-bindings/_canio/Listener.h b/shared-bindings/_canio/Listener.h new file mode 100644 index 000000000..eaa3490df --- /dev/null +++ b/shared-bindings/_canio/Listener.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" + +extern const mp_obj_type_t canio_listener_type; diff --git a/shared-bindings/_canio/Match.c b/shared-bindings/_canio/Match.c new file mode 100644 index 000000000..6c32aa539 --- /dev/null +++ b/shared-bindings/_canio/Match.c @@ -0,0 +1,140 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/_canio/Match.h" +#include "shared-module/_canio/Match.h" + +#include "py/objproperty.h" +#include "py/runtime.h" + +//| class Match: +//| """Describe CAN bus messages to match""" +//| +//| +//| def __init__(self, address: int, *, mask: int = 0, extended: bool = False): +//| """Construct a Match with the given properties. +//| +//| If mask is nonzero, then the filter is for any sender which matches all +//| the nonzero bits in mask. Otherwise, it matches exactly the given address. +//| If extended is true then only extended addresses are matched, otherwise +//| only standard addresses are matched.""" +//| + +STATIC mp_obj_t canio_match_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_address, ARG_mask, ARG_extended, NUM_ARGS }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_address, MP_ARG_INT | MP_ARG_REQUIRED, {.u_int = 0} }, + { MP_QSTR_mask, MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_extended, MP_ARG_BOOL, {.u_bool = false} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); + + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + int address_bits = args[ARG_extended].u_bool ? 0x1fffffff : 0x7ff; + int address = args[ARG_address].u_int; + int mask = args[ARG_mask].u_int; + + if(address & ~address_bits) { + mp_raise_ValueError_varg(translate("%q out of range"), MP_QSTR_address); + } + + if(mask & ~address_bits) { + mp_raise_ValueError_varg(translate("%q out of range"), MP_QSTR_mask); + } + + canio_match_obj_t *self = m_new_obj(canio_match_obj_t); + self->base.type = &canio_match_type; + common_hal_canio_match_construct(self, args[ARG_address].u_int, args[ARG_mask].u_int, args[ARG_extended].u_bool); + return self; +} + +//| address: int +//| """The address to match""" +//| + +STATIC mp_obj_t canio_match_address_get(mp_obj_t self_in) { + canio_match_obj_t *self = self_in; + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_match_address_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_match_address_get_obj, canio_match_address_get); + +const mp_obj_property_t canio_match_address_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_match_address_get_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| +//| mask: int +//| """The optional mask of addresses to match""" +//| + +STATIC mp_obj_t canio_match_mask_get(mp_obj_t self_in) { + canio_match_obj_t *self = self_in; + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_match_mask_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_match_mask_get_obj, canio_match_mask_get); + +const mp_obj_property_t canio_match_mask_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_match_mask_get_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| extended: bool +//| """True to match extended addresses, False to match standard addresses""" +//| + +STATIC mp_obj_t canio_match_extended_get(mp_obj_t self_in) { + canio_match_obj_t *self = self_in; + return mp_obj_new_bool(common_hal_canio_match_extended_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_match_extended_get_obj, canio_match_extended_get); + +const mp_obj_property_t canio_match_extended_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_match_extended_get_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +STATIC const mp_rom_map_elem_t canio_match_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_address), MP_ROM_PTR(&canio_match_address_obj) }, + { MP_ROM_QSTR(MP_QSTR_mask), MP_ROM_PTR(&canio_match_mask_obj) }, + { MP_ROM_QSTR(MP_QSTR_extended), MP_ROM_PTR(&canio_match_extended_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(canio_match_locals_dict, canio_match_locals_dict_table); + +const mp_obj_type_t canio_match_type = { + { &mp_type_type }, + .name = MP_QSTR_Match, + .make_new = canio_match_make_new, + .locals_dict = (mp_obj_dict_t*)&canio_match_locals_dict, +}; diff --git a/shared-bindings/_canio/Match.h b/shared-bindings/_canio/Match.h new file mode 100644 index 000000000..adf98eb86 --- /dev/null +++ b/shared-bindings/_canio/Match.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" + +extern const mp_obj_type_t canio_match_type; + +// Nothing now. diff --git a/shared-bindings/_canio/Message.c b/shared-bindings/_canio/Message.c new file mode 100644 index 000000000..a8e588354 --- /dev/null +++ b/shared-bindings/_canio/Message.c @@ -0,0 +1,213 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/_canio/Message.h" +#include "shared-module/_canio/Message.h" + +#include "py/obj.h" +#include "py/objproperty.h" +#include "py/runtime.h" + +//| class Message: +//| def __init__(self, id: int=0, data: Optional[bytes] = None, *, size: Optional[int] = None, rtr: bool = False): +//| """Construct a Message to send on a CAN bus +//| +//| :param int id: The numeric ID of the message +//| :param bytes data: The content of the message +//| :param int size: The amount of data requested, for an rtr +//| :param bool rtr: True if the message represents an rtr (Remote Transmission Request) +//| +//| In CAN, messages can have a size from 0 to 8 bytes. +//| +//| For a non-rtr message, specify `data`. For an rtr-message, specify either `data` (a dummy buffer of the requested size) or `size`. +//| """ +//| ... +//| +STATIC mp_obj_t canio_message_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_id, ARG_data, ARG_size, ARG_rtr, NUM_ARGS }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_id, MP_ARG_INT, {.u_obj = 0} }, + { MP_QSTR_data, MP_ARG_OBJ, {.u_obj = 0} }, + { MP_QSTR_size, MP_ARG_INT, {.u_int = -1} }, + { MP_QSTR_rtr, MP_ARG_BOOL, {.u_bool = false} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); + + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + bool rtr = args[ARG_rtr].u_bool; + size_t size = (size_t)args[ARG_size].u_int; + bool specified_size = (size != (size_t)-1); + bool specified_data = (args[ARG_data].u_obj != NULL); + + if(specified_size && specified_data) { + mp_raise_TypeError(translate("specify size or data, but not both")); + } + + mp_buffer_info_t data; + if (specified_data) { + mp_get_buffer_raise(args[ARG_data].u_obj, &data, MP_BUFFER_READ); + } else if (specified_size) { + data.buf = 0; + data.len = size; + } else { + data.buf = 0; + data.len = 0; + } + + if(data.len > 8) { + mp_raise_ValueError(translate("Messages limited to 8 bytes")); + } + + canio_message_obj_t *self = m_new_obj(canio_message_obj_t); + self->base.type = &canio_message_type; + common_hal_canio_message_construct(self, args[ARG_id].u_int, data.buf, data.len, rtr); + return self; +} + +//| id: int +//| """The numeric ID of the message""" +//| +STATIC mp_obj_t canio_message_id_get(const mp_obj_t self_in) { + canio_message_obj_t *self = self_in; + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_message_id_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_message_id_get_obj, canio_message_id_get); + +STATIC mp_obj_t canio_message_id_set(const mp_obj_t self_in, const mp_obj_t id) { + canio_message_obj_t *self = self_in; + common_hal_canio_message_id_set(self, mp_obj_get_int(id)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(canio_message_id_set_obj, canio_message_id_set); + +STATIC const mp_obj_property_t canio_message_id_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_message_id_get_obj, + (mp_obj_t)&canio_message_id_set_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| data: bytes +//| """The content of the message, or dummy content in the case of an rtr. +//| +//| Assigning to data sets the bytes to zero""" +//| +STATIC mp_obj_t canio_message_data_get(const mp_obj_t self_in) { + canio_message_obj_t *self = self_in; + return mp_obj_new_bytes((const byte*)common_hal_canio_message_data_get(self), common_hal_canio_message_size_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_message_data_get_obj, canio_message_data_get); + +STATIC mp_obj_t canio_message_data_set(const mp_obj_t self_in, const mp_obj_t data_in) { + canio_message_obj_t *self = self_in; + mp_buffer_info_t data; + mp_get_buffer_raise(data_in, &data, MP_BUFFER_READ); + if(data.len > 8) { + mp_raise_ValueError(translate("Messages limited to 8 bytes")); + } + common_hal_canio_message_data_set(self, data.buf, data.len); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(canio_message_data_set_obj, canio_message_data_set); + + +STATIC const mp_obj_property_t canio_message_data_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_message_data_get_obj, + (mp_obj_t)&canio_message_data_set_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +//| size: int +//| """The length of the message, or the length of the requested data in the case of an rtr""" +//| +STATIC mp_obj_t canio_message_size_get(const mp_obj_t self_in) { + canio_message_obj_t *self = self_in; + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_message_size_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_message_size_get_obj, canio_message_size_get); + +STATIC mp_obj_t canio_message_size_set(const mp_obj_t self_in, const mp_obj_t size_in) { + canio_message_obj_t *self = self_in; + int size = mp_obj_get_int(size_in); + if(size > 8) { + mp_raise_ValueError(translate("Messages limited to 8 bytes")); + } + common_hal_canio_message_size_set(self, size); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(canio_message_size_set_obj, canio_message_size_set); + + +STATIC const mp_obj_property_t canio_message_size_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_message_size_get_obj, + (mp_obj_t)&canio_message_size_set_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| rtr: bool +//| """True if the message represents a remote transmission request (RTR)""" +//| +STATIC mp_obj_t canio_message_rtr_get(const mp_obj_t self_in) { + canio_message_obj_t *self = self_in; + return mp_obj_new_bool(common_hal_canio_message_rtr_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_message_rtr_get_obj, canio_message_rtr_get); + +STATIC mp_obj_t canio_message_rtr_set(const mp_obj_t self_in, const mp_obj_t rtr) { + canio_message_obj_t *self = self_in; + common_hal_canio_message_size_set(self, mp_obj_is_true(rtr)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(canio_message_rtr_set_obj, canio_message_rtr_set); + + +STATIC const mp_obj_property_t canio_message_rtr_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_message_rtr_get_obj, + (mp_obj_t)&canio_message_rtr_set_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +STATIC const mp_rom_map_elem_t canio_message_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_id), MP_ROM_PTR(&canio_message_id_obj) }, + { MP_ROM_QSTR(MP_QSTR_data), MP_ROM_PTR(&canio_message_data_obj) }, + { MP_ROM_QSTR(MP_QSTR_size), MP_ROM_PTR(&canio_message_size_obj) }, + { MP_ROM_QSTR(MP_QSTR_rtr), MP_ROM_PTR(&canio_message_rtr_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(canio_message_locals_dict, canio_message_locals_dict_table); + +const mp_obj_type_t canio_message_type = { + { &mp_type_type }, + .name = MP_QSTR_Message, + .make_new = canio_message_make_new, + .locals_dict = (mp_obj_t)&canio_message_locals_dict, +}; diff --git a/shared-bindings/_canio/Message.h b/shared-bindings/_canio/Message.h new file mode 100644 index 000000000..32d6801bc --- /dev/null +++ b/shared-bindings/_canio/Message.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" + +extern const mp_obj_type_t canio_message_type; diff --git a/shared-bindings/_canio/__init__.c b/shared-bindings/_canio/__init__.c new file mode 100644 index 000000000..4da008ff2 --- /dev/null +++ b/shared-bindings/_canio/__init__.c @@ -0,0 +1,73 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//| """CAN bus access +//| +//| The `_canio` module contains low level classes to support the CAN bus +//| protocol. +//| +//| All classes change hardware state and should be deinitialized when they +//| are no longer needed if the program continues after use. To do so, either +//| call :py:meth:`!deinit` or use a context manager. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +//| For example:: +//| +//| import _canio +//| from board import * +//| +//| can = _canio.BUS(board.CANRX, board.CANTX) +//| can.write(408, b"adafruit") +//| can.deinit() +//| +//| This example will write the data 'adafruit' onto the CAN bus to any +//| device listening for message id 408.""" +//| + +#include "py/obj.h" + +#include "shared-bindings/_canio/__init__.h" +#include "shared-bindings/_canio/CAN.h" +#include "shared-bindings/_canio/Match.h" +#include "shared-bindings/_canio/Message.h" + +STATIC const mp_rom_map_elem_t canio_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR__canio) }, + { MP_ROM_QSTR(MP_QSTR_CAN), MP_ROM_PTR(&canio_can_type) }, + { MP_ROM_QSTR(MP_QSTR_Match), MP_ROM_PTR(&canio_match_type) }, + { MP_ROM_QSTR(MP_QSTR_Message), MP_ROM_PTR(&canio_message_type) }, +#if 0 + { MP_ROM_QSTR(MP_QSTR_Listener), MP_ROM_PTR(&canio_listener_type) }, +#endif +}; + + +STATIC MP_DEFINE_CONST_DICT(canio_module_globals, canio_module_globals_table); + +const mp_obj_module_t canio_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&canio_module_globals, +}; diff --git a/shared-bindings/_canio/__init__.h b/shared-bindings/_canio/__init__.h new file mode 100644 index 000000000..45e76369c --- /dev/null +++ b/shared-bindings/_canio/__init__.h @@ -0,0 +1,29 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +// Nothing now. diff --git a/shared-module/_canio/Match.c b/shared-module/_canio/Match.c new file mode 100644 index 000000000..2b696addb --- /dev/null +++ b/shared-module/_canio/Match.c @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-module/_canio/Match.h" + +void common_hal_canio_match_construct(canio_match_obj_t *self, int address, int mask, bool extended) { + self->address = address; + self->mask = mask; + self->extended = extended; +} + +int common_hal_canio_match_address_get(const canio_match_obj_t *self) { + return self->address; +} +int common_hal_canio_match_mask_get(const canio_match_obj_t *self) { + return self->mask; +} +bool common_hal_canio_match_extended_get(const canio_match_obj_t *self) { + return self->extended; +} diff --git a/shared-module/_canio/Match.h b/shared-module/_canio/Match.h new file mode 100644 index 000000000..099df976d --- /dev/null +++ b/shared-module/_canio/Match.h @@ -0,0 +1,41 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + int address; + int mask; + bool extended; +} canio_match_obj_t; + +void common_hal_canio_match_construct(canio_match_obj_t *self, int address, int mask, bool extended); +int common_hal_canio_match_address_get(const canio_match_obj_t *self); +int common_hal_canio_match_mask_get(const canio_match_obj_t *self); +bool common_hal_canio_match_extended_get(const canio_match_obj_t *self); diff --git a/shared-module/_canio/Message.c b/shared-module/_canio/Message.c new file mode 100644 index 000000000..df6a40a0a --- /dev/null +++ b/shared-module/_canio/Message.c @@ -0,0 +1,85 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-module/_canio/Message.h" + +#include + +void common_hal_canio_message_construct(canio_message_obj_t *self, int id, void *data, size_t size, bool rtr) +{ + self->id = id; + self->size = size; + self->rtr = rtr; + if (data) { + memcpy(self->data, data, size); + } else { + memset(self->data, 0, size); + } +} + +int common_hal_canio_message_id_get(const canio_message_obj_t *self) +{ + return self->id; +} + +void common_hal_canio_message_id_set(canio_message_obj_t *self, int id) +{ + self->id = id; +} + + +const void *common_hal_canio_message_data_get(const canio_message_obj_t *self) +{ + return self->data; +} + +const void common_hal_canio_message_data_set(canio_message_obj_t *self, const void *data, size_t size) +{ + memcpy(self->data, data, size); +} + + +size_t common_hal_canio_message_size_get(const canio_message_obj_t *self) +{ + return self->size; +} + +void common_hal_canio_message_size_set(canio_message_obj_t *self, size_t size) +{ + memset(self->data, 0, size); + self->size = size; +} + + +bool common_hal_canio_message_rtr_get(const canio_message_obj_t *self) +{ + return self->rtr; +} + +void common_hal_canio_message_rtr_set(canio_message_obj_t *self, bool rtr) +{ + self->rtr = rtr; +} diff --git a/shared-module/_canio/Message.h b/shared-module/_canio/Message.h new file mode 100644 index 000000000..e846f1095 --- /dev/null +++ b/shared-module/_canio/Message.h @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + int id; + size_t size; + uint8_t data[8]; + bool rtr; +} canio_message_obj_t; + +void common_hal_canio_message_construct(canio_message_obj_t *self, int id, void *data, size_t size, bool rtr); +bool common_hal_canio_message_rtr_get(const canio_message_obj_t *self); +int common_hal_canio_message_id_get(const canio_message_obj_t *self); +const void *common_hal_canio_message_data_get(const canio_message_obj_t *self); +size_t common_hal_canio_message_size_get(const canio_message_obj_t *self); +void common_hal_canio_message_rtr_set(canio_message_obj_t *self, bool rtr); +void common_hal_canio_message_id_set(canio_message_obj_t *self, int id); +void common_hal_canio_message_data_set(canio_message_obj_t *self, const void *data, size_t size); +void common_hal_canio_message_size_set(canio_message_obj_t *self, size_t size); -- cgit v1.2.3 From 635fcadb59fdba47d1628c3abff1b9bfc890a5d5 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Wed, 16 Sep 2020 11:59:01 -0500 Subject: _canio.CAN: add error handling & bus state --- ports/atmel-samd/common-hal/_canio/CAN.c | 71 +++++++++++++++++++++++--- ports/atmel-samd/common-hal/_canio/CAN.h | 33 +++++++----- shared-bindings/_canio/CAN.c | 87 ++++++++++++++++++++++++-------- 3 files changed, 151 insertions(+), 40 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/_canio/CAN.c b/ports/atmel-samd/common-hal/_canio/CAN.c index dcd269495..d2e7d8d9d 100644 --- a/ports/atmel-samd/common-hal/_canio/CAN.c +++ b/ports/atmel-samd/common-hal/_canio/CAN.c @@ -218,6 +218,15 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mc hri_can_write_XIDFC_reg(self->hw, dfc.reg); } + { + CAN_IE_Type ie = { + .bit.EWE = 1, + .bit.EPE = 1, + .bit.BOE = 1, + }; + hri_can_write_IE_reg(self->hw, ie.reg); + } + hri_can_write_XIDAM_reg(self->hw, CAN_XIDAM_RESETVALUE); // silent: The CAN is set in Bus Monitoring Mode by programming CCCR.MON to '1'. (tx pin unused) @@ -261,35 +270,71 @@ int common_hal_canio_can_baudrate_get(canio_can_obj_t *self) int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self) { - return -1; + return self->hw->ECR.bit.TEC; } int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self) { - return -1; + return self->hw->ECR.bit.REC; } int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self) { - return -1; + return self->error_warning_state_count; } int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self) { - return -1; + return self->error_passive_state_count; } int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self) { - return -1; + return self->bus_off_state_count; +} + +canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self) { + CAN_PSR_Type psr = self->hw->PSR; + if(psr.bit.BO) { + return BUS_STATE_OFF; + } + if(psr.bit.EP) { + return BUS_STATE_ERROR_PASSIVE; + } + if(psr.bit.EW) { + return BUS_STATE_ERROR_WARNING; + } + return BUS_STATE_ERROR_ACTIVE; +} + +void common_hal_canio_can_restart(canio_can_obj_t *self) { + if (!self->hw->PSR.bit.BO) { + return; + } + + hri_can_clear_CCCR_INIT_bit(self->hw); + while (hri_can_get_CCCR_INIT_bit(self->hw)) { + } } -int common_hal_canio_can_state_get(canio_can_obj_t *self) { - return -1; +bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self) { + return self->auto_restart; +} + +void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool value) { + self->auto_restart = value; +} + +static void maybe_auto_restart(canio_can_obj_t *self) { + if(self->auto_restart) { + common_hal_canio_can_restart(self); + } } void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *message) { + maybe_auto_restart(self); + // We have just one dedicated TX buffer, use it! canio_can_fifo_t *ent = &self->state->tx_fifo[0]; ent->txb0.bit.ESI = false; @@ -365,7 +410,17 @@ STATIC void can_handler(int i) { Can *hw = can_insts[i]; uint32_t ir = hri_can_read_IR_reg(hw); - /* Handle various interrupts */ + + /* Count up errors*/ + if (ir & CAN_IE_EWE) { + self->error_warning_state_count += 1; + } + if (ir & CAN_IE_EPE) { + self->error_passive_state_count += 1; + } + if (ir & CAN_IE_BOE) { + self->bus_off_state_count += 1; + } /* Acknowledge interrupt */ hri_can_write_IR_reg(hw, ir); diff --git a/ports/atmel-samd/common-hal/_canio/CAN.h b/ports/atmel-samd/common-hal/_canio/CAN.h index 0e637fc40..02bc2e41b 100644 --- a/ports/atmel-samd/common-hal/_canio/CAN.h +++ b/ports/atmel-samd/common-hal/_canio/CAN.h @@ -27,6 +27,7 @@ #pragma once #include "py/obj.h" +#include "shared-bindings/_canio/__init__.h" #include "component/can.h" #include "common-hal/microcontroller/Pin.h" #include "common-hal/_canio/__init__.h" @@ -38,25 +39,33 @@ typedef struct { mp_obj_base_t base; Can *hw; - int baudrate; - uint8_t rx_pin_number, tx_pin_number; - bool loopback; - bool silent; canio_can_state_t *state; + volatile uint32_t error_warning_state_count; + volatile uint32_t error_passive_state_count; + volatile uint32_t bus_off_state_count; + int baudrate; + uint8_t rx_pin_number:8; + uint8_t tx_pin_number:8; + bool loopback:1; + bool silent:1; + bool auto_restart:1; bool fifo0_in_use:1; bool fifo1_in_use:1; } canio_can_obj_t; void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mcu_pin_obj_t *tx, int baudrate, bool loopback, bool silent); -int common_hal_canio_can_state_get(canio_can_obj_t *self); +bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self); +bool common_hal_canio_can_deinited(canio_can_obj_t *self); int common_hal_canio_can_baudrate_get(canio_can_obj_t *self); -int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self); -int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self); -int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self); -int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self); int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self); -void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *message); -void common_hal_canio_can_deinit(canio_can_obj_t *self); +int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self); +int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self); +int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self); +canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self); +int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self); +void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool auto_restart); void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self); -bool common_hal_canio_can_deinited(canio_can_obj_t *self); +void common_hal_canio_can_deinit(canio_can_obj_t *self); +void common_hal_canio_can_restart(canio_can_obj_t *self); +void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *message); void common_hal_canio_reset(void); diff --git a/shared-bindings/_canio/CAN.c b/shared-bindings/_canio/CAN.c index 4c7ae3650..45640d41e 100644 --- a/shared-bindings/_canio/CAN.c +++ b/shared-bindings/_canio/CAN.c @@ -24,8 +24,10 @@ * THE SOFTWARE. */ +#include "py/enum.h" #include "common-hal/_canio/CAN.h" #include "common-hal/_canio/Listener.h" +#include "shared-bindings/_canio/__init__.h" #include "shared-bindings/_canio/CAN.h" #include "shared-bindings/_canio/Listener.h" #include "shared-bindings/_canio/Match.h" @@ -45,6 +47,7 @@ //| *, //| baudrate: int = 250000, //| loopback: bool = False, +//| auto_restart: bool = False, //| ): //| """A common shared-bus protocol. The rx and tx pins are generally //| connected to a transceiver which controls the H and L pins on a shared @@ -54,19 +57,19 @@ //| :param ~microcontrller.Pin tx: the pin to transmit with, or None if the peripheral should operate in "silent" mode. //| :param int baudrate: The bit rate of the bus in Hz. All devices on the bus must agree on this value. //| :param bool loopback: True if the peripheral will be operated in loopback mode. +//| :param bool auto_restart: If True, will restart communications after entering bus-off state //| """ //| ... //| -//## auto_restart: bool = False, # Whether to restart communications after entering bus-off state -//## sample_point: float = .875, # When to sample within bit time (0.0-1.0) STATIC mp_obj_t canio_can_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_rx, ARG_tx, ARG_baudrate, ARG_loopback, ARG_silent, NUM_ARGS }; + enum { ARG_rx, ARG_tx, ARG_baudrate, ARG_loopback, ARG_silent, ARG_auto_restart, NUM_ARGS }; static const mp_arg_t allowed_args[] = { { MP_QSTR_rx, MP_ARG_OBJ | MP_ARG_REQUIRED, {.u_obj = 0} }, { MP_QSTR_tx, MP_ARG_OBJ, {.u_obj = 0} }, { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 250000} }, { MP_QSTR_loopback, MP_ARG_BOOL, {.u_bool = false} }, { MP_QSTR_silent, MP_ARG_BOOL, {.u_bool = false} }, + { MP_QSTR_auto_restart, MP_ARG_BOOL, {.u_bool = false} }, }; mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); @@ -85,40 +88,51 @@ mp_printf(&mp_plat_print, "tx_pin=%p\n", tx_pin); self->base.type = &canio_can_type; common_hal_canio_can_construct(self, rx_pin, tx_pin, args[ARG_baudrate].u_int, args[ARG_loopback].u_bool, args[ARG_silent].u_bool); + common_hal_canio_can_auto_restart_set(self, args[ARG_auto_restart].u_bool); + return MP_OBJ_FROM_PTR(self); } -//| baudrate: int -//| """The baud rate(read-only)""" +//| auto_restart: int +//| """If True, will restart communications after entering bus-off state""" //| -STATIC mp_obj_t canio_can_baudrate_get(mp_obj_t self_in) { +STATIC mp_obj_t canio_can_auto_restart_get(mp_obj_t self_in) { canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); common_hal_canio_can_check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_baudrate_get(self)); + return mp_obj_new_bool(common_hal_canio_can_auto_restart_get(self)); } -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_baudrate_get_obj, canio_can_baudrate_get); +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_auto_restart_get_obj, canio_can_auto_restart_get); -STATIC const mp_obj_property_t canio_can_baudrate_obj = { +STATIC mp_obj_t canio_can_auto_restart_set(mp_obj_t self_in, mp_obj_t flag_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + common_hal_canio_can_auto_restart_set(self, mp_obj_is_true(flag_in)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(canio_can_auto_restart_set_obj, canio_can_auto_restart_set); + +STATIC const mp_obj_property_t canio_can_auto_restart_obj = { .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_baudrate_get_obj, - (mp_obj_t)mp_const_none, + .proxy = {(mp_obj_t)&canio_can_auto_restart_get_obj, + (mp_obj_t)&canio_can_auto_restart_set_obj, (mp_obj_t)mp_const_none}, }; -//| state: State -//| """The status of the hardware (read-only)""" + +//| baudrate: int +//| """The baud rate (read-only)""" //| -STATIC mp_obj_t canio_can_state_get(mp_obj_t self_in) { +STATIC mp_obj_t canio_can_baudrate_get(mp_obj_t self_in) { canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); common_hal_canio_can_check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_state_get(self)); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_baudrate_get(self)); } -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_state_get_obj, canio_can_state_get); +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_baudrate_get_obj, canio_can_baudrate_get); -STATIC const mp_obj_property_t canio_can_state_obj = { +STATIC const mp_obj_property_t canio_can_baudrate_obj = { .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_state_get_obj, + .proxy = {(mp_obj_t)&canio_can_baudrate_get_obj, (mp_obj_t)mp_const_none, (mp_obj_t)mp_const_none}, }; @@ -208,12 +222,43 @@ STATIC const mp_obj_property_t canio_can_bus_off_state_count_obj = { (mp_obj_t)mp_const_none}, }; +//| state: State +//| """The current state of the bus.""" +STATIC mp_obj_t canio_can_state_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return cp_enum_find(&canio_bus_state_type, common_hal_canio_can_state_get(self)); +} + +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_state_get_obj, canio_can_state_get); + +STATIC const mp_obj_property_t canio_can_state_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_state_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + + #if 0 //| # pending_tx_count: int //| # """The number of messages waiting to be transmitted. (read-only)""" +//| #endif -//| def listen(filters: Optional[Sequence[Filter]]=None, *, timeout: float=10) -> Listener: +//| def restart(self) -> None: +//| """If the device is in the bus off state, restart it.""" +//| ... +//| +STATIC mp_obj_t canio_can_restart(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + common_hal_canio_can_restart(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_can_restart_obj, canio_can_restart); + +//| def listen(self, filters: Optional[Sequence[Filter]]=None, *, timeout: float=10) -> Listener: //| """Start receiving messages that match any one of the filters. //| Creating a listener is an expensive operation and can interfere with reception of messages by other listeners. //| There is an implementation-defined maximum number of listeners and limit to the complexity of the filters. @@ -317,15 +362,17 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(canio_can_exit_obj, 4, 4, canio_can_e STATIC const mp_rom_map_elem_t canio_can_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&canio_can_enter_obj) }, { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&canio_can_exit_obj) }, + { MP_ROM_QSTR(MP_QSTR_auto_restart), MP_ROM_PTR(&canio_can_auto_restart_obj) }, + { MP_ROM_QSTR(MP_QSTR_baudrate), MP_ROM_PTR(&canio_can_baudrate_obj) }, { MP_ROM_QSTR(MP_QSTR_bus_off_state_count), MP_ROM_PTR(&canio_can_bus_off_state_count_obj) }, { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&canio_can_deinit_obj) }, { MP_ROM_QSTR(MP_QSTR_error_passive_state_count), MP_ROM_PTR(&canio_can_error_passive_state_count_obj) }, { MP_ROM_QSTR(MP_QSTR_error_warning_state_count), MP_ROM_PTR(&canio_can_error_warning_state_count_obj) }, { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&canio_can_listen_obj) }, { MP_ROM_QSTR(MP_QSTR_receive_error_count), MP_ROM_PTR(&canio_can_receive_error_count_obj) }, + { MP_ROM_QSTR(MP_QSTR_restart), MP_ROM_PTR(&canio_can_restart_obj) }, { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&canio_can_send_obj) }, { MP_ROM_QSTR(MP_QSTR_state), MP_ROM_PTR(&canio_can_state_obj) }, - { MP_ROM_QSTR(MP_QSTR_baudrate), MP_ROM_PTR(&canio_can_baudrate_obj) }, { MP_ROM_QSTR(MP_QSTR_transmit_error_count), MP_ROM_PTR(&canio_can_transmit_error_count_obj) }, }; STATIC MP_DEFINE_CONST_DICT(canio_can_locals_dict, canio_can_locals_dict_table); -- cgit v1.2.3 From 27cbb690e5b634b2791100a258618252476f609d Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 17 Sep 2020 10:57:56 -0500 Subject: _canio: Add listener matching Lightly tested: * no matches (catch-all) * standard address single address matches (even and odd positions) * standard address mask matches * only tested that extended doesn't match non-extended --- ports/atmel-samd/common-hal/_canio/CAN.c | 34 +-- ports/atmel-samd/common-hal/_canio/Listener.c | 295 +++++++++++++++++++++++++- ports/atmel-samd/common-hal/_canio/__init__.h | 7 +- shared-bindings/_canio/CAN.c | 15 +- 4 files changed, 321 insertions(+), 30 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/_canio/CAN.c b/ports/atmel-samd/common-hal/_canio/CAN.c index d2e7d8d9d..4c957c8f8 100644 --- a/ports/atmel-samd/common-hal/_canio/CAN.c +++ b/ports/atmel-samd/common-hal/_canio/CAN.c @@ -91,7 +91,7 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mc } hri_can_set_CCCR_CCE_bit(self->hw); - if(instance == 0) { + if (instance == 0) { hri_mclk_set_AHBMASK_CAN0_bit(MCLK); hri_gclk_write_PCHCTRL_reg(GCLK, CAN0_GCLK_ID, CONF_GCLK_CAN0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); @@ -100,7 +100,7 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mc NVIC_EnableIRQ(CAN0_IRQn); hri_can_write_ILE_reg(self->hw, CAN_ILE_EINT0); #ifdef CAN1_GCLK_ID - } else if(instance == 1) { + } else if (instance == 1) { hri_mclk_set_AHBMASK_CAN1_bit(MCLK); hri_gclk_write_PCHCTRL_reg(GCLK, CAN1_GCLK_ID, CONF_GCLK_CAN1_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); @@ -197,7 +197,7 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mc { CAN_GFC_Type gfc = { .bit.RRFE = 1, - .bit.ANFS = CAN_GFC_ANFS_RXF0_Val, + .bit.ANFS = CAN_GFC_ANFS_REJECT_Val, .bit.ANFE = CAN_GFC_ANFE_REJECT_Val, }; hri_can_write_GFC_reg(self->hw, gfc.reg); @@ -206,14 +206,15 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mc { CAN_SIDFC_Type dfc = { .bit.LSS = COMMON_HAL_CANIO_RX_FILTER_SIZE, - .bit.FLSSA = (uint32_t)self->state->rx_filter + .bit.FLSSA = (uint32_t)self->state->standard_rx_filter }; hri_can_write_SIDFC_reg(self->hw, dfc.reg); } { CAN_XIDFC_Type dfc = { - .bit.LSE = 0, + .bit.LSE = COMMON_HAL_CANIO_RX_FILTER_SIZE, + .bit.FLESA = (uint32_t)self->state->extended_rx_filter }; hri_can_write_XIDFC_reg(self->hw, dfc.reg); } @@ -236,12 +237,12 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mc self->hw->CCCR.bit.TEST = loopback; self->hw->TEST.bit.LBCK = loopback; - if(instance == 0) { + if (instance == 0) { NVIC_DisableIRQ(CAN0_IRQn); NVIC_ClearPendingIRQ(CAN0_IRQn); NVIC_EnableIRQ(CAN0_IRQn); #ifdef CAN1_GCLK_ID - } else if(instance == 1) { + } else if (instance == 1) { NVIC_DisableIRQ(CAN1_IRQn); NVIC_ClearPendingIRQ(CAN1_IRQn); NVIC_EnableIRQ(CAN1_IRQn); @@ -295,13 +296,13 @@ int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self) canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self) { CAN_PSR_Type psr = self->hw->PSR; - if(psr.bit.BO) { + if (psr.bit.BO) { return BUS_STATE_OFF; } - if(psr.bit.EP) { + if (psr.bit.EP) { return BUS_STATE_ERROR_PASSIVE; } - if(psr.bit.EW) { + if (psr.bit.EW) { return BUS_STATE_ERROR_WARNING; } return BUS_STATE_ERROR_ACTIVE; @@ -326,7 +327,7 @@ void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool value) { } static void maybe_auto_restart(canio_can_obj_t *self) { - if(self->auto_restart) { + if (self->auto_restart) { common_hal_canio_can_restart(self); } } @@ -337,10 +338,15 @@ void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *messa // We have just one dedicated TX buffer, use it! canio_can_fifo_t *ent = &self->state->tx_fifo[0]; + ent->txb0.bit.ESI = false; - ent->txb0.bit.XTD = false; + ent->txb0.bit.XTD = message->extended; ent->txb0.bit.RTR = message->rtr; - ent->txb0.bit.ID = message->id << 18; // short addresses are left-justified + if (message->extended) { + ent->txb0.bit.ID = message->id << 18; + } else { + ent->txb0.bit.ID = message->id << 18; // short addresses are left-justified + } ent->txb1.bit.MM = 0; // "message marker" ent->txb1.bit.EFC = 0; // don't store fifo events to event queue @@ -367,7 +373,7 @@ bool common_hal_canio_can_deinited(canio_can_obj_t *self) { } void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self) { - if(common_hal_canio_can_deinited(self)) { + if (common_hal_canio_can_deinited(self)) { raise_deinited_error(); } } diff --git a/ports/atmel-samd/common-hal/_canio/Listener.c b/ports/atmel-samd/common-hal/_canio/Listener.c index ddae61de9..4d54e9f73 100644 --- a/ports/atmel-samd/common-hal/_canio/Listener.c +++ b/ports/atmel-samd/common-hal/_canio/Listener.c @@ -34,12 +34,262 @@ #include "common-hal/_canio/Listener.h" #include "shared-bindings/util.h" #include "supervisor/shared/tick.h" +#include "component/can.h" -void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout) { - if (nmatch) { - mp_raise_NotImplementedError(NULL); +STATIC void allow_config_change(canio_can_obj_t *can) { + can->hw->CCCR.bit.INIT = 1; + while (!can->hw->CCCR.bit.INIT) { + } + can->hw->CCCR.bit.CCE = 1; +} + +STATIC void prevent_config_change(canio_can_obj_t *can) { + can->hw->CCCR.bit.CCE = 0; + can->hw->CCCR.bit.INIT = 0; + while (can->hw->CCCR.bit.INIT) { + } +} + +__attribute__((unused)) +STATIC void static_assertions(void) { + MP_STATIC_ASSERT(CAN_GFC_ANFE_RXF0_Val + 1 == CAN_GFC_ANFE_RXF1_Val); + MP_STATIC_ASSERT(CAN_GFC_ANFS_RXF0_Val + 1 == CAN_GFC_ANFS_RXF1_Val); + MP_STATIC_ASSERT(CAN_SIDFE_0_SFEC_STF0M_Val + 1 == CAN_SIDFE_0_SFEC_STF1M_Val); + MP_STATIC_ASSERT(CAN_XIDFE_0_EFEC_STF0M_Val + 1 == CAN_XIDFE_0_EFEC_STF1M_Val); +} + +STATIC bool single_address_filter(canio_match_obj_t *match) { + return match->mask == 0 || match->mask == match->address; +} + +STATIC bool standard_filter_in_use(CanMramSidfe *filter) { + return filter->SIDFE_0.bit.SFEC != CAN_SIDFE_0_SFEC_DISABLE_Val; +} + +STATIC bool extended_filter_in_use(CanMramXidfe *filter) { + return filter->XIDFE_0.bit.EFEC != CAN_XIDFE_0_EFEC_DISABLE_Val; +} + +STATIC size_t num_filters_needed(size_t nmatch, canio_match_obj_t **matches, bool extended) { + size_t num_half_filters_needed = 1; + for(size_t i=0; iextended) { + continue; + } + if (single_address_filter(matches[i])) { + num_half_filters_needed += 1; + } else { + num_half_filters_needed += 2; + } + } + return num_half_filters_needed / 2; +} + +STATIC size_t num_filters_available(canio_can_obj_t *can, bool extended) { + size_t available = 0; + if (extended) { + for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->extended_rx_filter); i++) { + if (!extended_filter_in_use(&can->state->extended_rx_filter[i])) { + available++; + } + } + } else { + for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->standard_rx_filter); i++) { + if (!standard_filter_in_use(&can->state->standard_rx_filter[i])) { + available++; + } + } + } + return available; +} + +STATIC void clear_filters(canio_listener_obj_t *self) { + canio_can_obj_t *can = self->can; + int fifo = self->fifo_idx; + + // If it was a global accept, clear it + allow_config_change(can); + if (can->hw->GFC.bit.ANFS == CAN_GFC_ANFS_RXF0 + fifo) { + can->hw->GFC.bit.ANFS = CAN_GFC_ANFS_REJECT_Val; + } + if (can->hw->GFC.bit.ANFE == CAN_GFC_ANFE_RXF0 + fifo) { + can->hw->GFC.bit.ANFE = CAN_GFC_ANFE_REJECT_Val; + } + prevent_config_change(can); + + // For each filter entry, if it pointed at this FIFO set it to DISABLE + for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->extended_rx_filter); i++) { + int val = CAN_XIDFE_0_EFEC_STF0M_Val + fifo; + if (can->state->extended_rx_filter[i].XIDFE_0.bit.EFEC == val) { + can->state->extended_rx_filter[i].XIDFE_0.bit.EFEC = CAN_XIDFE_0_EFEC_DISABLE_Val; + } + } + for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->standard_rx_filter); i++) { + int val = CAN_SIDFE_0_SFEC_STF1M_Val + fifo; + if (can->state->standard_rx_filter[i].SIDFE_0.bit.SFEC == val) { + can->state->standard_rx_filter[i].SIDFE_0.bit.SFEC = CAN_SIDFE_0_SFEC_DISABLE_Val; + } + } +} + +STATIC CanMramXidfe *next_extended_filter(canio_listener_obj_t *self, CanMramXidfe *start) { + CanMramXidfe *end = &self->can->state->extended_rx_filter[MP_ARRAY_SIZE(self->can->state->extended_rx_filter)]; + if (start == NULL) { + start = self->can->state->extended_rx_filter; + } else { + start = start + 1; + } + while (extended_filter_in_use(start)) { + if (start == end) { + return NULL; + } + start = start + 1; + } + return start; +} + +STATIC CanMramSidfe *next_standard_filter(canio_listener_obj_t *self, CanMramSidfe *start) { + CanMramSidfe *end = &self->can->state->standard_rx_filter[MP_ARRAY_SIZE(self->can->state->standard_rx_filter)]; + if (start == NULL) { + start = self->can->state->standard_rx_filter; + } else { + start = start + 1; + } + while (standard_filter_in_use(start)) { + if (start == end) { + return NULL; + } + start = start + 1; + } + return start; +} + +STATIC void install_standard_filter(CanMramSidfe *standard, int id1, int id2, int sfec, int sft) { + assert(standard); + CAN_SIDFE_0_Type val = { + .bit.SFID1 = id1, + .bit.SFID2 = id2, + .bit.SFEC = sfec, + .bit.SFT = sft, + }; + standard->SIDFE_0 = val; +} + +STATIC void install_extended_filter(CanMramXidfe *extended, int id1, int id2, int efec, int eft) { + assert(extended); + CAN_XIDFE_0_Type val0 = { + .bit.EFID1 = id1, + .bit.EFEC = efec, + }; + CAN_XIDFE_1_Type val1 = { + .bit.EFID2 = id2, + .bit.EFT = eft, + }; + // Set entry 0 second, because it has the enable bits (XIDFE_0_EFEC) + extended->XIDFE_1 = val1; + extended->XIDFE_0 = val0; +} + + +#define NO_ADDRESS (-1) +void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t **matches) { + int fifo = self->fifo_idx; + + if (!nmatch) { + allow_config_change(self->can); + self->can->hw->GFC.bit.ANFS = CAN_GFC_ANFS_RXF0_Val + fifo; + self->can->hw->GFC.bit.ANFE = CAN_GFC_ANFE_RXF0_Val + fifo; + self->can->hw->CCCR.bit.CCE = 0; + prevent_config_change(self->can); + return; + } + + CanMramSidfe *standard = next_standard_filter(self, NULL); + CanMramXidfe *extended = next_extended_filter(self, NULL); + + int first_address = NO_ADDRESS; + + // step 1: single address standard matches + // we have to gather up pairs and stuff them in a single filter entry + for(size_t i = 0; iextended) { + continue; + } + if (!single_address_filter(match)) { + continue; + } + if (first_address != NO_ADDRESS) { + install_standard_filter(standard, first_address, match->address, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_DUAL_Val); + first_address = NO_ADDRESS; + standard = next_standard_filter(self, standard); + } else { + first_address = match->address; + } + } + // step 1.5. odd single address standard match + if (first_address != NO_ADDRESS) { + install_standard_filter(standard, first_address, first_address, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_DUAL_Val); + standard = next_standard_filter(self, standard); + first_address = NO_ADDRESS; + } + + // step 2: standard mask filter + for(size_t i = 0; iextended) { + continue; + } + if (single_address_filter(match)) { + continue; + } + install_standard_filter(standard, match->address, match->mask, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_CLASSIC_Val); + standard = next_standard_filter(self, standard); + } + + // step 3: single address extended matches + // we have to gather up pairs and stuff them in a single filter entry + for(size_t i = 0; iextended) { + continue; + } + if (!single_address_filter(match)) { + continue; + } + if (first_address != NO_ADDRESS) { + install_extended_filter(extended, first_address, match->address, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_DUAL_Val); + first_address = NO_ADDRESS; + extended = next_extended_filter(self, extended); + } else { + first_address = match->address; + } + } + // step 3.5. odd single address standard match + if (first_address != NO_ADDRESS) { + install_extended_filter(extended, first_address, first_address, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_DUAL_Val); + extended = next_extended_filter(self, extended); + first_address = NO_ADDRESS; + } + + // step 4: extended mask filters + for(size_t i = 0; iextended) { + continue; + } + if (single_address_filter(match)) { + continue; + } + install_extended_filter(extended, match->address, match->mask, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_CLASSIC_Val); + extended = next_extended_filter(self, extended); } + // phew, easy(!) +} + + +void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout) { if (!can->fifo0_in_use) { self->fifo_idx = 0; self->fifo = can->state->rx0_fifo; @@ -56,7 +306,26 @@ void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_o mp_raise_ValueError(translate("All RX FIFOs in use")); } + if (!nmatch) { + if (can->hw->GFC.bit.ANFS == CAN_GFC_ANFS_RXF1_Val - self->fifo_idx) { + mp_raise_ValueError(translate("Already have all-matches listener")); + } + if (can->hw->GFC.bit.ANFE == CAN_GFC_ANFE_RXF1_Val - self->fifo_idx) { + mp_raise_ValueError(translate("Already have all-matches listener")); + } + } + + if (num_filters_needed(nmatch, matches, false) > num_filters_available(can, false)) { + mp_raise_ValueError(translate("Filters too complex")); + } + + if (num_filters_needed(nmatch, matches, true) > num_filters_available(can, true)) { + mp_raise_ValueError(translate("Filters too complex")); + } + + // Nothing can fail now so it's safe to assign self->can self->can = can; + set_filters(self, nmatch, matches); common_hal_canio_listener_set_timeout(self, timeout); } @@ -69,7 +338,7 @@ float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self) { } void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self) { - if(!self->can) { + if (!self->can) { raise_deinited_error(); } common_hal_canio_can_check_for_deinit(self->can); @@ -83,17 +352,22 @@ bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_messag if (!common_hal_canio_listener_in_waiting(self)) { uint64_t deadline = supervisor_ticks_ms64() + self->timeout_ms; do { - if(supervisor_ticks_ms64() > deadline) { + if (supervisor_ticks_ms64() > deadline) { return false; } } while (!common_hal_canio_listener_in_waiting(self)); } int index = self->hw->RXFS.bit.F0GI; canio_can_fifo_t *hw_message = &self->fifo[index]; - message->id = hw_message->rxb0.bit.ID >> 18; // short addresses are left-justified + message->extended = hw_message->rxb0.bit.XTD; + if (message->extended) { + message->id = hw_message->rxb0.bit.ID; + } else { + message->id = hw_message->rxb0.bit.ID >> 18; // short addresses are left-justified + } message->rtr = hw_message->rxb0.bit.RTR; message->size = hw_message->rxb1.bit.DLC; - if(!message->rtr) { + if (!message->rtr) { memcpy(message->data, hw_message->data, message->size); } self->hw->RXFA.bit.F0AI = index; @@ -102,11 +376,12 @@ bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_messag void common_hal_canio_listener_deinit(canio_listener_obj_t *self) { // free our FIFO, clear our matches, SOMETHING - if(self->can) { - if(self->fifo_idx == 0) { + if (self->can) { + clear_filters(self); + if (self->fifo_idx == 0) { self->can->fifo0_in_use = false; } - if(self->fifo_idx == 1) { + if (self->fifo_idx == 1) { self->can->fifo1_in_use = false; } } diff --git a/ports/atmel-samd/common-hal/_canio/__init__.h b/ports/atmel-samd/common-hal/_canio/__init__.h index 429369e18..cb491ab9e 100644 --- a/ports/atmel-samd/common-hal/_canio/__init__.h +++ b/ports/atmel-samd/common-hal/_canio/__init__.h @@ -34,6 +34,10 @@ #define COMMON_HAL_CANIO_RX_FILTER_SIZE (4) #define COMMON_HAL_CANIO_TX_FIFO_SIZE (1) +// This appears to be a typo (transposition error) in the ASF4 headers +// It's called the "Extended ID Filter Entry" +typedef CanMramXifde CanMramXidfe; + typedef struct canio_listener canio_listener_t; typedef struct canio_can canio_can_t; @@ -58,5 +62,6 @@ typedef struct { canio_can_fifo_t tx_fifo[COMMON_HAL_CANIO_TX_FIFO_SIZE]; canio_can_fifo_t rx0_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE]; canio_can_fifo_t rx1_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE]; - canio_can_filter_t rx_filter[COMMON_HAL_CANIO_RX_FILTER_SIZE]; + CanMramSidfe standard_rx_filter[COMMON_HAL_CANIO_RX_FILTER_SIZE]; + CanMramXifde extended_rx_filter[COMMON_HAL_CANIO_RX_FILTER_SIZE]; } canio_can_state_t; diff --git a/shared-bindings/_canio/CAN.c b/shared-bindings/_canio/CAN.c index 45640d41e..8f3e45420 100644 --- a/shared-bindings/_canio/CAN.c +++ b/shared-bindings/_canio/CAN.c @@ -258,15 +258,20 @@ STATIC mp_obj_t canio_can_restart(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_can_restart_obj, canio_can_restart); -//| def listen(self, filters: Optional[Sequence[Filter]]=None, *, timeout: float=10) -> Listener: +//| def listen(self, match: Optional[Sequence[Match]]=None, *, timeout: float=10) -> Listener: //| """Start receiving messages that match any one of the filters. +//| //| Creating a listener is an expensive operation and can interfere with reception of messages by other listeners. +//| //| There is an implementation-defined maximum number of listeners and limit to the complexity of the filters. -//| If the hardware cannot support all the requested filters, a ValueError is raised. Note that generally there are some number of hardware filters shared among all fifos. -//| A message can be received by at most one Listener. +//| +//| If the hardware cannot support all the requested matches, a ValueError is raised. Note that generally there are some number of hardware filters shared among all fifos. +//| +//| A message can be received by at most one Listener. If more than one listener matches a message, it is undefined which one actually receives it. +//| //| An empty filter list causes all messages to be accepted. -//| Timeout dictates how long readinto, read and next() will block. -//| Readinto will return false(), read will return None, and next() will raise StopIteration.""" +//| +//| Timeout dictates how long readinto, read and next() will block.""" //| ... //| STATIC mp_obj_t canio_can_listen(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { -- cgit v1.2.3 From 58b920ed97ac5acdcf3ccb405524c89e32c17b50 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 17 Sep 2020 11:35:34 -0500 Subject: fix whitespace --- ports/atmel-samd/common-hal/_canio/CAN.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/_canio/CAN.c b/ports/atmel-samd/common-hal/_canio/CAN.c index 4c957c8f8..266a1aa1f 100644 --- a/ports/atmel-samd/common-hal/_canio/CAN.c +++ b/ports/atmel-samd/common-hal/_canio/CAN.c @@ -338,7 +338,7 @@ void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *messa // We have just one dedicated TX buffer, use it! canio_can_fifo_t *ent = &self->state->tx_fifo[0]; - + ent->txb0.bit.ESI = false; ent->txb0.bit.XTD = message->extended; ent->txb0.bit.RTR = message->rtr; -- cgit v1.2.3 From 44c5b2bbb1a00cf07e1725c76d1920e8c73977ed Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 17 Sep 2020 12:44:40 -0500 Subject: Respond to review comments Thanks @tannewt! --- ports/atmel-samd/common-hal/_canio/Listener.c | 1 - shared-bindings/_canio/CAN.c | 17 +++-------------- shared-bindings/_canio/Listener.c | 10 ++++------ shared-bindings/_canio/Match.c | 9 ++++----- shared-bindings/_canio/Match.h | 6 +++++- shared-bindings/_canio/Message.c | 23 +++++++++++------------ shared-bindings/_canio/Message.h | 13 +++++++++++++ shared-module/_canio/Match.c | 6 +++--- shared-module/_canio/Match.h | 5 ----- shared-module/_canio/Message.c | 20 ++++++++++---------- shared-module/_canio/Message.h | 12 ------------ 11 files changed, 53 insertions(+), 69 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/_canio/Listener.c b/ports/atmel-samd/common-hal/_canio/Listener.c index 4d54e9f73..0a5f629f8 100644 --- a/ports/atmel-samd/common-hal/_canio/Listener.c +++ b/ports/atmel-samd/common-hal/_canio/Listener.c @@ -375,7 +375,6 @@ bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_messag } void common_hal_canio_listener_deinit(canio_listener_obj_t *self) { - // free our FIFO, clear our matches, SOMETHING if (self->can) { clear_filters(self); if (self->fifo_idx == 0) { diff --git a/shared-bindings/_canio/CAN.c b/shared-bindings/_canio/CAN.c index 53045c35a..537aa5580 100644 --- a/shared-bindings/_canio/CAN.c +++ b/shared-bindings/_canio/CAN.c @@ -53,8 +53,8 @@ //| connected to a transceiver which controls the H and L pins on a shared //| bus. //| -//| :param ~microcontrller.Pin rx: the pin to receive with. -//| :param ~microcontrller.Pin tx: the pin to transmit with, or None if the peripheral should operate in "silent" mode. +//| :param ~microcontroller.Pin rx: the pin to receive with. +//| :param ~microcontroller.Pin tx: the pin to transmit with, or None if the peripheral should operate in "silent" mode. //| :param int baudrate: The bit rate of the bus in Hz. All devices on the bus must agree on this value. //| :param bool loopback: True if the peripheral will be operated in loopback mode. //| :param bool auto_restart: If True, will restart communications after entering bus-off state @@ -76,13 +76,8 @@ STATIC mp_obj_t canio_can_make_new(const mp_obj_type_t *type, size_t n_args, con mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); -mp_printf(&mp_plat_print, "ARG_rx=%d args[ARG_rx].u_obj=%p\n", ARG_rx, args[ARG_rx].u_obj); -mp_printf(&mp_plat_print, "ARG_tx=%d args[ARG_tx].u_obj=%p\n", ARG_tx, args[ARG_tx].u_obj); - mcu_pin_obj_t *rx_pin = validate_obj_is_free_pin(args[ARG_rx].u_obj); -mp_printf(&mp_plat_print, "rx_pin=%p\n", rx_pin); mcu_pin_obj_t *tx_pin = validate_obj_is_free_pin_or_none(args[ARG_tx].u_obj); -mp_printf(&mp_plat_print, "tx_pin=%p\n", tx_pin); canio_can_obj_t *self = m_new_obj(canio_can_obj_t); self->base.type = &canio_can_type; @@ -94,7 +89,7 @@ mp_printf(&mp_plat_print, "tx_pin=%p\n", tx_pin); } -//| auto_restart: int +//| auto_restart: bool //| """If True, will restart communications after entering bus-off state""" //| STATIC mp_obj_t canio_can_auto_restart_get(mp_obj_t self_in) { @@ -240,12 +235,6 @@ STATIC const mp_obj_property_t canio_can_state_obj = { }; -#if 0 -//| # pending_tx_count: int -//| # """The number of messages waiting to be transmitted. (read-only)""" -//| -#endif - //| def restart(self) -> None: //| """If the device is in the bus off state, restart it.""" //| ... diff --git a/shared-bindings/_canio/Listener.c b/shared-bindings/_canio/Listener.c index a3890f8dd..84b2aacb9 100644 --- a/shared-bindings/_canio/Listener.c +++ b/shared-bindings/_canio/Listener.c @@ -39,7 +39,7 @@ //| //| def read(self) -> Optional[Message]: -//| """Returns a message, after waiting up to self.timeout seconds +//| """Reads a message, after waiting up to self.timeout seconds //| //| If no message is received in time, None is returned. Otherwise, //| a Message is returned.""" @@ -62,10 +62,8 @@ STATIC mp_obj_t canio_listener_read(mp_obj_t self_in) { STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_read_obj, canio_listener_read); //| def readinto(self, message: Message) -> bool: -//| """Returns a message, after waiting up to self.timeout seconds -//| -//| Returns True (and modifies message) if a message was received, -//| False otherwise.""" +//| """Returns True (and modifies message) if a message was received +//| before ``timeout`` seconds elapsed, False otherwise.""" //| ... //| STATIC mp_obj_t canio_listener_readinto(mp_obj_t self_in, mp_obj_t message) { @@ -115,7 +113,7 @@ STATIC mp_obj_t canio_listener_next(mp_obj_t self_in) { if (common_hal_canio_listener_in_waiting(self)) { return canio_listener_read(self_in); } - return self; + return MP_OBJ_STOP_ITERATION; } STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_next_obj, canio_listener_next); diff --git a/shared-bindings/_canio/Match.c b/shared-bindings/_canio/Match.c index b71529b73..4ff35906b 100644 --- a/shared-bindings/_canio/Match.c +++ b/shared-bindings/_canio/Match.c @@ -25,7 +25,6 @@ */ #include "shared-bindings/_canio/Match.h" -#include "shared-module/_canio/Match.h" #include "py/objproperty.h" #include "py/runtime.h" @@ -46,7 +45,7 @@ STATIC mp_obj_t canio_match_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_address, ARG_mask, ARG_extended, NUM_ARGS }; static const mp_arg_t allowed_args[] = { - { MP_QSTR_address, MP_ARG_INT | MP_ARG_REQUIRED, {.u_int = 0} }, + { MP_QSTR_address, MP_ARG_INT | MP_ARG_REQUIRED }, { MP_QSTR_mask, MP_ARG_INT, {.u_int = 0} }, { MP_QSTR_extended, MP_ARG_BOOL, {.u_bool = false} }, }; @@ -79,7 +78,7 @@ STATIC mp_obj_t canio_match_make_new(const mp_obj_type_t *type, size_t n_args, c STATIC mp_obj_t canio_match_address_get(mp_obj_t self_in) { canio_match_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_match_address_get(self)); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_match_get_address(self)); } MP_DEFINE_CONST_FUN_OBJ_1(canio_match_address_get_obj, canio_match_address_get); @@ -97,7 +96,7 @@ const mp_obj_property_t canio_match_address_obj = { STATIC mp_obj_t canio_match_mask_get(mp_obj_t self_in) { canio_match_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_match_mask_get(self)); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_match_get_mask(self)); } MP_DEFINE_CONST_FUN_OBJ_1(canio_match_mask_get_obj, canio_match_mask_get); @@ -114,7 +113,7 @@ const mp_obj_property_t canio_match_mask_obj = { STATIC mp_obj_t canio_match_extended_get(mp_obj_t self_in) { canio_match_obj_t *self = self_in; - return mp_obj_new_bool(common_hal_canio_match_extended_get(self)); + return mp_obj_new_bool(common_hal_canio_match_get_extended(self)); } MP_DEFINE_CONST_FUN_OBJ_1(canio_match_extended_get_obj, canio_match_extended_get); diff --git a/shared-bindings/_canio/Match.h b/shared-bindings/_canio/Match.h index adf98eb86..5522c2636 100644 --- a/shared-bindings/_canio/Match.h +++ b/shared-bindings/_canio/Match.h @@ -27,7 +27,11 @@ #pragma once #include "py/obj.h" +#include "shared-module/_canio/Match.h" extern const mp_obj_type_t canio_match_type; -// Nothing now. +void common_hal_canio_match_construct(canio_match_obj_t *self, int address, int mask, bool extended); +int common_hal_canio_match_get_address(const canio_match_obj_t *self); +int common_hal_canio_match_get_mask(const canio_match_obj_t *self); +bool common_hal_canio_match_get_extended(const canio_match_obj_t *self); diff --git a/shared-bindings/_canio/Message.c b/shared-bindings/_canio/Message.c index bfaaf52b2..85657e05e 100644 --- a/shared-bindings/_canio/Message.c +++ b/shared-bindings/_canio/Message.c @@ -25,7 +25,6 @@ */ #include "shared-bindings/_canio/Message.h" -#include "shared-module/_canio/Message.h" #include "py/obj.h" #include "py/objproperty.h" @@ -33,7 +32,7 @@ //| class Message: //| def __init__(self, id: int=0, data: Optional[bytes] = None, *, size: Optional[int] = None, rtr: bool = False, extended: bool = False): -//| """Construct a Message to send on a CAN bus +//| """Construct a Message to use with a CAN bus. Provide arguments to create a message to send. Otherwise, use Listener.readinto() to read a message. //| //| :param int id: The numeric ID of the message //| :param bytes data: The content of the message @@ -97,13 +96,13 @@ STATIC mp_obj_t canio_message_make_new(const mp_obj_type_t *type, size_t n_args, //| STATIC mp_obj_t canio_message_id_get(const mp_obj_t self_in) { canio_message_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_message_id_get(self)); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_message_get_id(self)); } MP_DEFINE_CONST_FUN_OBJ_1(canio_message_id_get_obj, canio_message_id_get); STATIC mp_obj_t canio_message_id_set(const mp_obj_t self_in, const mp_obj_t id) { canio_message_obj_t *self = self_in; - common_hal_canio_message_id_set(self, mp_obj_get_int(id)); + common_hal_canio_message_set_id(self, mp_obj_get_int(id)); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_2(canio_message_id_set_obj, canio_message_id_set); @@ -122,7 +121,7 @@ STATIC const mp_obj_property_t canio_message_id_obj = { //| STATIC mp_obj_t canio_message_data_get(const mp_obj_t self_in) { canio_message_obj_t *self = self_in; - return mp_obj_new_bytes((const byte*)common_hal_canio_message_data_get(self), common_hal_canio_message_size_get(self)); + return mp_obj_new_bytes((const byte*)common_hal_canio_message_get_data(self), common_hal_canio_message_get_size(self)); } MP_DEFINE_CONST_FUN_OBJ_1(canio_message_data_get_obj, canio_message_data_get); @@ -133,7 +132,7 @@ STATIC mp_obj_t canio_message_data_set(const mp_obj_t self_in, const mp_obj_t da if (data.len > 8) { mp_raise_ValueError(translate("Messages limited to 8 bytes")); } - common_hal_canio_message_data_set(self, data.buf, data.len); + common_hal_canio_message_set_data(self, data.buf, data.len); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_2(canio_message_data_set_obj, canio_message_data_set); @@ -154,7 +153,7 @@ STATIC const mp_obj_property_t canio_message_data_obj = { //| STATIC mp_obj_t canio_message_size_get(const mp_obj_t self_in) { canio_message_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_message_size_get(self)); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_message_get_size(self)); } MP_DEFINE_CONST_FUN_OBJ_1(canio_message_size_get_obj, canio_message_size_get); @@ -164,7 +163,7 @@ STATIC mp_obj_t canio_message_size_set(const mp_obj_t self_in, const mp_obj_t si if (size > 8) { mp_raise_ValueError(translate("Messages limited to 8 bytes")); } - common_hal_canio_message_size_set(self, size); + common_hal_canio_message_set_size(self, size); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_2(canio_message_size_set_obj, canio_message_size_set); @@ -182,13 +181,13 @@ STATIC const mp_obj_property_t canio_message_size_obj = { //| STATIC mp_obj_t canio_message_extended_get(const mp_obj_t self_in) { canio_message_obj_t *self = self_in; - return mp_obj_new_bool(common_hal_canio_message_extended_get(self)); + return mp_obj_new_bool(common_hal_canio_message_get_extended(self)); } MP_DEFINE_CONST_FUN_OBJ_1(canio_message_extended_get_obj, canio_message_extended_get); STATIC mp_obj_t canio_message_extended_set(const mp_obj_t self_in, const mp_obj_t extended) { canio_message_obj_t *self = self_in; - common_hal_canio_message_size_set(self, mp_obj_is_true(extended)); + common_hal_canio_message_set_extended(self, mp_obj_is_true(extended)); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_2(canio_message_extended_set_obj, canio_message_extended_set); @@ -207,13 +206,13 @@ STATIC const mp_obj_property_t canio_message_extended_obj = { //| STATIC mp_obj_t canio_message_rtr_get(const mp_obj_t self_in) { canio_message_obj_t *self = self_in; - return mp_obj_new_bool(common_hal_canio_message_rtr_get(self)); + return mp_obj_new_bool(common_hal_canio_message_get_rtr(self)); } MP_DEFINE_CONST_FUN_OBJ_1(canio_message_rtr_get_obj, canio_message_rtr_get); STATIC mp_obj_t canio_message_rtr_set(const mp_obj_t self_in, const mp_obj_t rtr) { canio_message_obj_t *self = self_in; - common_hal_canio_message_size_set(self, mp_obj_is_true(rtr)); + common_hal_canio_message_set_rtr(self, mp_obj_is_true(rtr)); return mp_const_none; } MP_DEFINE_CONST_FUN_OBJ_2(canio_message_rtr_set_obj, canio_message_rtr_set); diff --git a/shared-bindings/_canio/Message.h b/shared-bindings/_canio/Message.h index 32d6801bc..ed739af0d 100644 --- a/shared-bindings/_canio/Message.h +++ b/shared-bindings/_canio/Message.h @@ -27,5 +27,18 @@ #pragma once #include "py/obj.h" +#include "shared-module/_canio/Message.h" extern const mp_obj_type_t canio_message_type; + +void common_hal_canio_message_construct(canio_message_obj_t *self, int id, void *data, size_t size, bool rtr, bool extended); +const void *common_hal_canio_message_get_data(const canio_message_obj_t *self); +void common_hal_canio_message_set_data(canio_message_obj_t *self, const void *data, size_t size); +bool common_hal_canio_message_get_extended(const canio_message_obj_t *self); +void common_hal_canio_message_set_extended(canio_message_obj_t *self, bool extended); +int common_hal_canio_message_get_id(const canio_message_obj_t *self); +void common_hal_canio_message_set_id(canio_message_obj_t *self, int id); +bool common_hal_canio_message_get_rtr(const canio_message_obj_t *self); +void common_hal_canio_message_set_rtr(canio_message_obj_t *self, bool rtr); +size_t common_hal_canio_message_get_size(const canio_message_obj_t *self); +void common_hal_canio_message_set_size(canio_message_obj_t *self, size_t size); diff --git a/shared-module/_canio/Match.c b/shared-module/_canio/Match.c index 2b696addb..3dcde18a7 100644 --- a/shared-module/_canio/Match.c +++ b/shared-module/_canio/Match.c @@ -32,12 +32,12 @@ void common_hal_canio_match_construct(canio_match_obj_t *self, int address, int self->extended = extended; } -int common_hal_canio_match_address_get(const canio_match_obj_t *self) { +int common_hal_canio_match_get_address(const canio_match_obj_t *self) { return self->address; } -int common_hal_canio_match_mask_get(const canio_match_obj_t *self) { +int common_hal_canio_match_get_mask(const canio_match_obj_t *self) { return self->mask; } -bool common_hal_canio_match_extended_get(const canio_match_obj_t *self) { +bool common_hal_canio_match_get_extended(const canio_match_obj_t *self) { return self->extended; } diff --git a/shared-module/_canio/Match.h b/shared-module/_canio/Match.h index 099df976d..25f047f37 100644 --- a/shared-module/_canio/Match.h +++ b/shared-module/_canio/Match.h @@ -34,8 +34,3 @@ typedef struct { int mask; bool extended; } canio_match_obj_t; - -void common_hal_canio_match_construct(canio_match_obj_t *self, int address, int mask, bool extended); -int common_hal_canio_match_address_get(const canio_match_obj_t *self); -int common_hal_canio_match_mask_get(const canio_match_obj_t *self); -bool common_hal_canio_match_extended_get(const canio_match_obj_t *self); diff --git a/shared-module/_canio/Message.c b/shared-module/_canio/Message.c index c0403b519..0caca58f0 100644 --- a/shared-module/_canio/Message.c +++ b/shared-module/_canio/Message.c @@ -41,57 +41,57 @@ void common_hal_canio_message_construct(canio_message_obj_t *self, int id, void } } -int common_hal_canio_message_id_get(const canio_message_obj_t *self) +int common_hal_canio_message_get_id(const canio_message_obj_t *self) { return self->id; } -void common_hal_canio_message_id_set(canio_message_obj_t *self, int id) +void common_hal_canio_message_set_id(canio_message_obj_t *self, int id) { self->id = id; } -const void *common_hal_canio_message_data_get(const canio_message_obj_t *self) +const void *common_hal_canio_message_get_data(const canio_message_obj_t *self) { return self->data; } -const void common_hal_canio_message_data_set(canio_message_obj_t *self, const void *data, size_t size) +const void common_hal_canio_message_set_data(canio_message_obj_t *self, const void *data, size_t size) { self->size = size; memcpy(self->data, data, size); } -size_t common_hal_canio_message_size_get(const canio_message_obj_t *self) +size_t common_hal_canio_message_get_size(const canio_message_obj_t *self) { return self->size; } -void common_hal_canio_message_size_set(canio_message_obj_t *self, size_t size) +void common_hal_canio_message_set_size(canio_message_obj_t *self, size_t size) { memset(self->data, 0, size); self->size = size; } -bool common_hal_canio_message_rtr_get(const canio_message_obj_t *self) +bool common_hal_canio_message_get_rtr(const canio_message_obj_t *self) { return self->rtr; } -void common_hal_canio_message_rtr_set(canio_message_obj_t *self, bool rtr) +void common_hal_canio_message_set_rtr(canio_message_obj_t *self, bool rtr) { self->rtr = rtr; } -bool common_hal_canio_message_extended_get(const canio_message_obj_t *self) +bool common_hal_canio_message_get_extended(const canio_message_obj_t *self) { return self->extended; } -void common_hal_canio_message_extended_set(canio_message_obj_t *self, bool extended) +void common_hal_canio_message_set_extended(canio_message_obj_t *self, bool extended) { self->extended = extended; } diff --git a/shared-module/_canio/Message.h b/shared-module/_canio/Message.h index b9fd8eaf2..b99c5c48e 100644 --- a/shared-module/_canio/Message.h +++ b/shared-module/_canio/Message.h @@ -36,15 +36,3 @@ typedef struct { bool rtr:1; bool extended:1; } canio_message_obj_t; - -void common_hal_canio_message_construct(canio_message_obj_t *self, int id, void *data, size_t size, bool rtr, bool extended); -bool common_hal_canio_message_rtr_get(const canio_message_obj_t *self); -bool common_hal_canio_message_extended_get(const canio_message_obj_t *self); -int common_hal_canio_message_id_get(const canio_message_obj_t *self); -const void *common_hal_canio_message_data_get(const canio_message_obj_t *self); -size_t common_hal_canio_message_size_get(const canio_message_obj_t *self); -void common_hal_canio_message_rtr_set(canio_message_obj_t *self, bool rtr); -void common_hal_canio_message_extended_set(canio_message_obj_t *self, bool extended); -void common_hal_canio_message_id_set(canio_message_obj_t *self, int id); -void common_hal_canio_message_data_set(canio_message_obj_t *self, const void *data, size_t size); -void common_hal_canio_message_size_set(canio_message_obj_t *self, size_t size); -- cgit v1.2.3 From 67d8f108bb94bd734e218f13201fb31d64a66dd4 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Fri, 18 Sep 2020 10:56:52 -0500 Subject: Add CAN to SAM E51 clock config --- .../asf4_conf/same51/peripheral_clk_config.h | 82 ++++++++++++++++++++++ 1 file changed, 82 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/asf4_conf/same51/peripheral_clk_config.h b/ports/atmel-samd/asf4_conf/same51/peripheral_clk_config.h index 59fe8730e..51173f6d3 100644 --- a/ports/atmel-samd/asf4_conf/same51/peripheral_clk_config.h +++ b/ports/atmel-samd/asf4_conf/same51/peripheral_clk_config.h @@ -1165,6 +1165,88 @@ #define CONF_SDHC1_SLOW_FREQUENCY 12000000 #endif +// CAN Clock Settings +// CAN Clock source + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for CAN. +// sdhc_gclk_selection +#ifndef CONF_GCLK_CAN0_SRC +#define CONF_GCLK_CAN0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val +#endif + +/** + * \def CAN FREQUENCY + * \brief CAN's Clock frequency + */ +#ifndef CONF_CAN0_FREQUENCY +#define CONF_CAN0_FREQUENCY 120000000 +#endif + +// CAN Clock Settings +// CAN Clock source + +// Generic clock generator 0 + +// Generic clock generator 1 + +// Generic clock generator 2 + +// Generic clock generator 3 + +// Generic clock generator 4 + +// Generic clock generator 5 + +// Generic clock generator 6 + +// Generic clock generator 7 + +// Generic clock generator 8 + +// Generic clock generator 9 + +// Generic clock generator 10 + +// Generic clock generator 11 + +// Select the clock source for CAN. +// sdhc_gclk_selection +#ifndef CONF_GCLK_CAN1_SRC +#define CONF_GCLK_CAN1_SRC GCLK_PCHCTRL_GEN_GCLK0_Val +#endif + +/** + * \def CAN FREQUENCY + * \brief CAN's Clock frequency + */ +#ifndef CONF_CAN1_FREQUENCY +#define CONF_CAN1_FREQUENCY 120000000 +#endif + // <<< end of configuration section >>> #endif // PERIPHERAL_CLK_CONFIG_H -- cgit v1.2.3 From a76119afcba6d7ceb4eb1e4baa79745528feeb92 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Fri, 18 Sep 2020 10:57:15 -0500 Subject: add _canio to Feather M4 CAN --- ports/atmel-samd/boards/feather_m4_can/mpconfigboard.mk | 1 + 1 file changed, 1 insertion(+) (limited to 'ports') diff --git a/ports/atmel-samd/boards/feather_m4_can/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m4_can/mpconfigboard.mk index 306e7fe42..345ac33c5 100644 --- a/ports/atmel-samd/boards/feather_m4_can/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m4_can/mpconfigboard.mk @@ -12,3 +12,4 @@ EXTERNAL_FLASH_DEVICES = GD25Q16C LONGINT_IMPL = MPZ CIRCUITPY_VECTORIO = 1 +CIRCUITPY_CANIO = 1 -- cgit v1.2.3 From 09f8a83a756c784e846d2acd9a929e4a45ea34b4 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Fri, 18 Sep 2020 13:54:03 -0500 Subject: samd: template.ld: put canram in its own output section --- ports/atmel-samd/boards/common.template.ld | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/common.template.ld b/ports/atmel-samd/boards/common.template.ld index 19e4753f8..b30a7a1d9 100644 --- a/ports/atmel-samd/boards/common.template.ld +++ b/ports/atmel-samd/boards/common.template.ld @@ -43,6 +43,17 @@ SECTIONS _sidata = .; /* start of .data section */ } >FLASH_FIRMWARE + /* Data accessed by the CAN peripheral must be in the first 64kB RAM */ + /* place it at the very start of RAM, before the .data section */ + /* it is zeroed by reset_port */ + .canram (NOLOAD) : + { + . = ALIGN(4); + _scanram = .; + *(.canram) + _ecanram = .; + } > RAM + /* This is the initialized data section The program executes knowing that the data is in the RAM but the loader puts the initial values in the FLASH_FIRMWARE (inidata). @@ -67,10 +78,6 @@ SECTIONS . = ALIGN(4); _sbss = .; _szero = .; /* define a global symbol at bss start; used by startup code */ - /* Data accessed by the CAN peripheral must be in the first 64kB RAM */ - _scanram = .; - *(.canram) - _ecanram = .; *(.bss) *(.bss*) *(COMMON) -- cgit v1.2.3 From 7fd6cab2ac411b808858c0fac9049a856a592cb1 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Fri, 18 Sep 2020 14:19:05 -0500 Subject: canio: Make both tx and rx (but not both) optional .. loopback and silent come from the (optional) constructor parameters not guessing based on the pin specification .. docstring & comment improvements --- ports/atmel-samd/common-hal/_canio/CAN.c | 28 ++++++++------ ports/atmel-samd/common-hal/_canio/CAN.h | 2 + shared-bindings/_canio/CAN.c | 64 +++++++++++++++++++++++++++----- 3 files changed, 74 insertions(+), 20 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/_canio/CAN.c b/ports/atmel-samd/common-hal/_canio/CAN.c index 266a1aa1f..2d8f1d031 100644 --- a/ports/atmel-samd/common-hal/_canio/CAN.c +++ b/ports/atmel-samd/common-hal/_canio/CAN.c @@ -51,9 +51,10 @@ __attribute__((optimize("O0"), noinline)) void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mcu_pin_obj_t *tx, int baudrate, bool loopback, bool silent) { mcu_pin_function_t *tx_function = mcu_find_pin_function(can_tx, tx, -1, MP_QSTR_tx); - int instance = tx_function->instance; + int instance = tx_function ? tx_function->instance : -1; mcu_pin_function_t *rx_function = mcu_find_pin_function(can_rx, rx, instance, MP_QSTR_rx); + instance = rx_function->instance; const uint32_t can_frequency = CONF_CAN0_FREQUENCY; @@ -68,9 +69,11 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mc mp_raise_OSError(MP_EINVAL); // baudrate cannot be attained (16kHz or something is lower bound, should never happen) } - gpio_set_pin_direction(tx_function->pin, GPIO_DIRECTION_OUT); - gpio_set_pin_function(tx_function->pin, tx_function->function); - common_hal_never_reset_pin(tx_function->obj); + if (tx_function) { + gpio_set_pin_direction(tx_function->pin, GPIO_DIRECTION_OUT); + gpio_set_pin_function(tx_function->pin, tx_function->function); + common_hal_never_reset_pin(tx_function->obj); + } if (rx_function) { gpio_set_pin_direction(rx_function->pin, GPIO_DIRECTION_IN); @@ -78,12 +81,13 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mc common_hal_never_reset_pin(rx_function->obj); } - self->tx_pin_number = common_hal_mcu_pin_number(tx); + self->tx_pin_number = tx ? common_hal_mcu_pin_number(tx) : COMMON_HAL_MCU_NO_PIN; self->rx_pin_number = rx ? common_hal_mcu_pin_number(rx) : COMMON_HAL_MCU_NO_PIN; self->hw = can_insts[instance]; self->state = &can_state[instance]; self->loopback = loopback; + self->silent = silent; // Allow configuration change hri_can_set_CCCR_INIT_bit(self->hw); @@ -129,11 +133,9 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mc hri_can_write_NBTP_reg(self->hw, btp.reg); } - // we don't do the high bit rate yet, so do we need to set this register? - // hri_can_write_DBTP_reg(self->hw, ???); - // A "data bit" is a data bit :) with dul rate CAN FD, this is a higher - // rate. However, CAN FD is not implemented in CircuitPython, and this is the same rate as - // the "nominal rate". + // A "data bit" is a data bit :) with dula rate CAN FD, this is a higher + // rate. However, CAN FD is not implemented in CircuitPython, and this is + // the same rate as the "nominal rate". { CAN_DBTP_Type btp = { .bit.DTSEG1 = DIV_ROUND(clocks_to_sample, divisor) - 1, @@ -259,7 +261,7 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mc can_objs[instance] = self; } -int common_hal_canio_can_loopback_get(canio_can_obj_t *self) +bool common_hal_canio_can_loopback_get(canio_can_obj_t *self) { return self->loopback; } @@ -368,6 +370,10 @@ void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *messa } } +bool common_hal_canio_can_silent_get(canio_can_obj_t *self) { + return self->silent; +} + bool common_hal_canio_can_deinited(canio_can_obj_t *self) { return !self->hw; } diff --git a/ports/atmel-samd/common-hal/_canio/CAN.h b/ports/atmel-samd/common-hal/_canio/CAN.h index 02bc2e41b..893b71550 100644 --- a/ports/atmel-samd/common-hal/_canio/CAN.h +++ b/ports/atmel-samd/common-hal/_canio/CAN.h @@ -60,8 +60,10 @@ int common_hal_canio_can_baudrate_get(canio_can_obj_t *self); int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self); int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self); int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self); +bool common_hal_canio_can_loopback_get(canio_can_obj_t *self); int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self); canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self); +bool common_hal_canio_can_silent_get(canio_can_obj_t *self); int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self); void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool auto_restart); void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self); diff --git a/shared-bindings/_canio/CAN.c b/shared-bindings/_canio/CAN.c index 537aa5580..3c80b342f 100644 --- a/shared-bindings/_canio/CAN.c +++ b/shared-bindings/_canio/CAN.c @@ -42,7 +42,7 @@ //| """CAN bus protocol""" //| //| def __init__(self, -//| rx: microcontroller.Pin, +//| rx: Optional[microcontroller.Pin]=None, //| tx: Optional[microcontroller.Pin]=None, //| *, //| baudrate: int = 250000, @@ -50,13 +50,18 @@ //| auto_restart: bool = False, //| ): //| """A common shared-bus protocol. The rx and tx pins are generally -//| connected to a transceiver which controls the H and L pins on a shared -//| bus. +//| connected to a transceiver which controls the H and L pins on a +//| shared bus. //| -//| :param ~microcontroller.Pin rx: the pin to receive with. -//| :param ~microcontroller.Pin tx: the pin to transmit with, or None if the peripheral should operate in "silent" mode. +//| Normally, both ``tx`` and ``rx`` pins will be specified. However, +//| in silent and loopback modes, the other pin may not be required and +//| can be used for other purposes. +//| +//| :param ~microcontroller.Pin rx: the pin to receive with, or None. +//| :param ~microcontroller.Pin tx: the pin to transmit with, or None. //| :param int baudrate: The bit rate of the bus in Hz. All devices on the bus must agree on this value. -//| :param bool loopback: True if the peripheral will be operated in loopback mode. +//| :param bool loopback: True if the peripheral will be operated in loopback mode. In loopback mode, the ``rx`` pin's value is ignored, and the device receives the packets it sends. +//| :param bool silent: True if the peripheral will be operated in silent mode. In silent mode, the ``tx`` pin is always driven to the high logic level. This mode can be used to "sniff" a CAN bus without interfering. //| :param bool auto_restart: If True, will restart communications after entering bus-off state //| """ //| ... @@ -64,8 +69,8 @@ STATIC mp_obj_t canio_can_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_rx, ARG_tx, ARG_baudrate, ARG_loopback, ARG_silent, ARG_auto_restart, NUM_ARGS }; static const mp_arg_t allowed_args[] = { - { MP_QSTR_rx, MP_ARG_OBJ | MP_ARG_REQUIRED, {.u_obj = 0} }, - { MP_QSTR_tx, MP_ARG_OBJ, {.u_obj = 0} }, + { MP_QSTR_rx, MP_ARG_OBJ, {.u_obj = mp_const_none} }, + { MP_QSTR_tx, MP_ARG_OBJ, {.u_obj = mp_const_none} }, { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 250000} }, { MP_QSTR_loopback, MP_ARG_BOOL, {.u_bool = false} }, { MP_QSTR_silent, MP_ARG_BOOL, {.u_bool = false} }, @@ -76,8 +81,11 @@ STATIC mp_obj_t canio_can_make_new(const mp_obj_type_t *type, size_t n_args, con mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - mcu_pin_obj_t *rx_pin = validate_obj_is_free_pin(args[ARG_rx].u_obj); + mcu_pin_obj_t *rx_pin = validate_obj_is_free_pin_or_none(args[ARG_rx].u_obj); mcu_pin_obj_t *tx_pin = validate_obj_is_free_pin_or_none(args[ARG_tx].u_obj); + if (!rx_pin && !tx_pin) { + mp_raise_ValueError(translate("tx and rx cannot both be None")); + } canio_can_obj_t *self = m_new_obj(canio_can_obj_t); self->base.type = &canio_can_type; @@ -301,6 +309,24 @@ STATIC mp_obj_t canio_can_listen(size_t n_args, const mp_obj_t *pos_args, mp_map } MP_DEFINE_CONST_FUN_OBJ_KW(canio_can_listen_obj, 1, canio_can_listen); +//| loopback: bool +//| """True if the device was created in loopback mode, False otherwise""" +//| +STATIC mp_obj_t canio_can_loopback_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return mp_obj_new_bool(common_hal_canio_can_loopback_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_loopback_get_obj, canio_can_loopback_get); + +STATIC const mp_obj_property_t canio_can_loopback_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_loopback_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + + //| def send(message: Message) -> None: //| """Send a message on the bus with the given data and id. //| If the message could not be sent due to a full fifo or a bus error condition, RuntimeError is raised. @@ -321,6 +347,24 @@ STATIC mp_obj_t canio_can_send(mp_obj_t self_in, mp_obj_t message_in) { } MP_DEFINE_CONST_FUN_OBJ_2(canio_can_send_obj, canio_can_send); +//| silent: bool +//| """True if the device was created in silent mode, False otherwise""" +//| +STATIC mp_obj_t canio_can_silent_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return mp_obj_new_bool(common_hal_canio_can_silent_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_silent_get_obj, canio_can_silent_get); + +STATIC const mp_obj_property_t canio_can_silent_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_silent_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + + //| def deinit(self) -> None: //| """Deinitialize this object, freeing its hardware resources""" //| ... @@ -363,9 +407,11 @@ STATIC const mp_rom_map_elem_t canio_can_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_error_passive_state_count), MP_ROM_PTR(&canio_can_error_passive_state_count_obj) }, { MP_ROM_QSTR(MP_QSTR_error_warning_state_count), MP_ROM_PTR(&canio_can_error_warning_state_count_obj) }, { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&canio_can_listen_obj) }, + { MP_ROM_QSTR(MP_QSTR_loopback), MP_ROM_PTR(&canio_can_loopback_obj) }, { MP_ROM_QSTR(MP_QSTR_receive_error_count), MP_ROM_PTR(&canio_can_receive_error_count_obj) }, { MP_ROM_QSTR(MP_QSTR_restart), MP_ROM_PTR(&canio_can_restart_obj) }, { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&canio_can_send_obj) }, + { MP_ROM_QSTR(MP_QSTR_silent), MP_ROM_PTR(&canio_can_silent_obj) }, { MP_ROM_QSTR(MP_QSTR_state), MP_ROM_PTR(&canio_can_state_obj) }, { MP_ROM_QSTR(MP_QSTR_transmit_error_count), MP_ROM_PTR(&canio_can_transmit_error_count_obj) }, }; -- cgit v1.2.3 From df379b84cb00a3ad694fb89877529c6862a455cb Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 21 Sep 2020 15:07:40 -0500 Subject: remove unneeded symbols --- ports/atmel-samd/boards/common.template.ld | 2 -- 1 file changed, 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/common.template.ld b/ports/atmel-samd/boards/common.template.ld index b30a7a1d9..8942450d2 100644 --- a/ports/atmel-samd/boards/common.template.ld +++ b/ports/atmel-samd/boards/common.template.ld @@ -49,9 +49,7 @@ SECTIONS .canram (NOLOAD) : { . = ALIGN(4); - _scanram = .; *(.canram) - _ecanram = .; } > RAM /* This is the initialized data section -- cgit v1.2.3 From 4e4853dcb26aa46db3269db45a8cbbbad61c44d8 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 21 Sep 2020 15:49:51 -0500 Subject: common.template.ld: remove unneeded line --- ports/atmel-samd/boards/common.template.ld | 1 - 1 file changed, 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/common.template.ld b/ports/atmel-samd/boards/common.template.ld index 8942450d2..53c4cf5ee 100644 --- a/ports/atmel-samd/boards/common.template.ld +++ b/ports/atmel-samd/boards/common.template.ld @@ -60,7 +60,6 @@ SECTIONS { . = ALIGN(4); _srelocate = .; /* create a global symbol at data start; used by startup code in order to initialize the .data section in RAM */ - . = ALIGN(4); *(.ramfunc) *(.ramfunc*) *(.data) /* .data sections */ -- cgit v1.2.3 From 9e8f1820c8b9be728ae0f9e7c197565ac17cc6a8 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 21 Sep 2020 15:51:55 -0500 Subject: canio.CAN: switch rx/tx, make both mandatory, move declarations around --- ports/atmel-samd/common-hal/_canio/CAN.c | 22 ++++++++-------------- ports/atmel-samd/common-hal/_canio/CAN.h | 22 ++-------------------- shared-bindings/_canio/CAN.c | 23 ++++++++++------------- shared-bindings/_canio/CAN.h | 23 +++++++++++++++++++++++ 4 files changed, 43 insertions(+), 47 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/_canio/CAN.c b/ports/atmel-samd/common-hal/_canio/CAN.c index 2d8f1d031..0d967d7ca 100644 --- a/ports/atmel-samd/common-hal/_canio/CAN.c +++ b/ports/atmel-samd/common-hal/_canio/CAN.c @@ -47,14 +47,12 @@ STATIC canio_can_obj_t *can_objs[MP_ARRAY_SIZE(can_insts)]; // This must be placed in the first 64kB of RAM STATIC COMPILER_SECTION(".canram") canio_can_state_t can_state[MP_ARRAY_SIZE(can_insts)]; -__attribute__((optimize("O0"), noinline)) -void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mcu_pin_obj_t *tx, int baudrate, bool loopback, bool silent) +void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent) { mcu_pin_function_t *tx_function = mcu_find_pin_function(can_tx, tx, -1, MP_QSTR_tx); - int instance = tx_function ? tx_function->instance : -1; + int instance = tx_function->instance; mcu_pin_function_t *rx_function = mcu_find_pin_function(can_rx, rx, instance, MP_QSTR_rx); - instance = rx_function->instance; const uint32_t can_frequency = CONF_CAN0_FREQUENCY; @@ -69,17 +67,13 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mc mp_raise_OSError(MP_EINVAL); // baudrate cannot be attained (16kHz or something is lower bound, should never happen) } - if (tx_function) { - gpio_set_pin_direction(tx_function->pin, GPIO_DIRECTION_OUT); - gpio_set_pin_function(tx_function->pin, tx_function->function); - common_hal_never_reset_pin(tx_function->obj); - } + gpio_set_pin_direction(tx_function->pin, GPIO_DIRECTION_OUT); + gpio_set_pin_function(tx_function->pin, tx_function->function); + common_hal_never_reset_pin(tx_function->obj); - if (rx_function) { - gpio_set_pin_direction(rx_function->pin, GPIO_DIRECTION_IN); - gpio_set_pin_function(rx_function->pin, rx_function->function); - common_hal_never_reset_pin(rx_function->obj); - } + gpio_set_pin_direction(rx_function->pin, GPIO_DIRECTION_IN); + gpio_set_pin_function(rx_function->pin, rx_function->function); + common_hal_never_reset_pin(rx_function->obj); self->tx_pin_number = tx ? common_hal_mcu_pin_number(tx) : COMMON_HAL_MCU_NO_PIN; self->rx_pin_number = rx ? common_hal_mcu_pin_number(rx) : COMMON_HAL_MCU_NO_PIN; diff --git a/ports/atmel-samd/common-hal/_canio/CAN.h b/ports/atmel-samd/common-hal/_canio/CAN.h index 893b71550..1cc34e3ac 100644 --- a/ports/atmel-samd/common-hal/_canio/CAN.h +++ b/ports/atmel-samd/common-hal/_canio/CAN.h @@ -28,6 +28,7 @@ #include "py/obj.h" #include "shared-bindings/_canio/__init__.h" +#include "shared-bindings/_canio/CAN.h" #include "component/can.h" #include "common-hal/microcontroller/Pin.h" #include "common-hal/_canio/__init__.h" @@ -36,7 +37,7 @@ #define COMMON_HAL_CAN_RX_FIFO_LEN (2) #define COMMON_HAL_CAN_TX_FIFO_LEN (2) -typedef struct { +typedef struct canio_can_obj { mp_obj_base_t base; Can *hw; canio_can_state_t *state; @@ -52,22 +53,3 @@ typedef struct { bool fifo0_in_use:1; bool fifo1_in_use:1; } canio_can_obj_t; - -void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *rx, mcu_pin_obj_t *tx, int baudrate, bool loopback, bool silent); -bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self); -bool common_hal_canio_can_deinited(canio_can_obj_t *self); -int common_hal_canio_can_baudrate_get(canio_can_obj_t *self); -int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self); -int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self); -int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self); -bool common_hal_canio_can_loopback_get(canio_can_obj_t *self); -int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self); -canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self); -bool common_hal_canio_can_silent_get(canio_can_obj_t *self); -int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self); -void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool auto_restart); -void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self); -void common_hal_canio_can_deinit(canio_can_obj_t *self); -void common_hal_canio_can_restart(canio_can_obj_t *self); -void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *message); -void common_hal_canio_reset(void); diff --git a/shared-bindings/_canio/CAN.c b/shared-bindings/_canio/CAN.c index 3c80b342f..38aed85d3 100644 --- a/shared-bindings/_canio/CAN.c +++ b/shared-bindings/_canio/CAN.c @@ -42,26 +42,23 @@ //| """CAN bus protocol""" //| //| def __init__(self, -//| rx: Optional[microcontroller.Pin]=None, -//| tx: Optional[microcontroller.Pin]=None, +//| tx: microcontroller.Pin, +//| rx: microcontroller.Pin, //| *, //| baudrate: int = 250000, //| loopback: bool = False, +//| silent: bool = False, //| auto_restart: bool = False, //| ): //| """A common shared-bus protocol. The rx and tx pins are generally //| connected to a transceiver which controls the H and L pins on a //| shared bus. //| -//| Normally, both ``tx`` and ``rx`` pins will be specified. However, -//| in silent and loopback modes, the other pin may not be required and -//| can be used for other purposes. -//| -//| :param ~microcontroller.Pin rx: the pin to receive with, or None. -//| :param ~microcontroller.Pin tx: the pin to transmit with, or None. +//| :param ~microcontroller.Pin rx: the pin to receive with +//| :param ~microcontroller.Pin tx: the pin to transmit with //| :param int baudrate: The bit rate of the bus in Hz. All devices on the bus must agree on this value. -//| :param bool loopback: True if the peripheral will be operated in loopback mode. In loopback mode, the ``rx`` pin's value is ignored, and the device receives the packets it sends. -//| :param bool silent: True if the peripheral will be operated in silent mode. In silent mode, the ``tx`` pin is always driven to the high logic level. This mode can be used to "sniff" a CAN bus without interfering. +//| :param bool loopback: When True the ``rx`` pin's value is ignored, and the device receives the packets it sends. +//| :param bool silent: When True the ``tx`` pin is always driven to the high logic level. This mode can be used to "sniff" a CAN bus without interfering. //| :param bool auto_restart: If True, will restart communications after entering bus-off state //| """ //| ... @@ -69,8 +66,8 @@ STATIC mp_obj_t canio_can_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_rx, ARG_tx, ARG_baudrate, ARG_loopback, ARG_silent, ARG_auto_restart, NUM_ARGS }; static const mp_arg_t allowed_args[] = { - { MP_QSTR_rx, MP_ARG_OBJ, {.u_obj = mp_const_none} }, - { MP_QSTR_tx, MP_ARG_OBJ, {.u_obj = mp_const_none} }, + { MP_QSTR_tx, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_rx, MP_ARG_OBJ | MP_ARG_REQUIRED }, { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 250000} }, { MP_QSTR_loopback, MP_ARG_BOOL, {.u_bool = false} }, { MP_QSTR_silent, MP_ARG_BOOL, {.u_bool = false} }, @@ -89,7 +86,7 @@ STATIC mp_obj_t canio_can_make_new(const mp_obj_type_t *type, size_t n_args, con canio_can_obj_t *self = m_new_obj(canio_can_obj_t); self->base.type = &canio_can_type; - common_hal_canio_can_construct(self, rx_pin, tx_pin, args[ARG_baudrate].u_int, args[ARG_loopback].u_bool, args[ARG_silent].u_bool); + common_hal_canio_can_construct(self, tx_pin, rx_pin, args[ARG_baudrate].u_int, args[ARG_loopback].u_bool, args[ARG_silent].u_bool); common_hal_canio_can_auto_restart_set(self, args[ARG_auto_restart].u_bool); diff --git a/shared-bindings/_canio/CAN.h b/shared-bindings/_canio/CAN.h index 81040cf23..c591c8e6b 100644 --- a/shared-bindings/_canio/CAN.h +++ b/shared-bindings/_canio/CAN.h @@ -27,5 +27,28 @@ #pragma once #include "py/obj.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/_canio/Message.h" extern const mp_obj_type_t canio_can_type; + +typedef struct canio_can_obj canio_can_obj_t; + +void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent); +bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self); +bool common_hal_canio_can_deinited(canio_can_obj_t *self); +int common_hal_canio_can_baudrate_get(canio_can_obj_t *self); +int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self); +int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self); +int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self); +bool common_hal_canio_can_loopback_get(canio_can_obj_t *self); +int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self); +canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self); +bool common_hal_canio_can_silent_get(canio_can_obj_t *self); +int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self); +void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool auto_restart); +void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self); +void common_hal_canio_can_deinit(canio_can_obj_t *self); +void common_hal_canio_can_restart(canio_can_obj_t *self); +void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *message); +void common_hal_canio_reset(void); -- cgit v1.2.3 From 4869dbdc670bfa8a5f2e0a639495d03984ea0a6a Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 21 Sep 2020 16:42:12 -0500 Subject: canio: rename from _canio This reflects our belief that the API is stable enough to avoid incompatible changes during 6.x. --- main.c | 2 +- ports/atmel-samd/common-hal/_canio/CAN.c | 445 -------------------------- ports/atmel-samd/common-hal/_canio/CAN.h | 55 ---- ports/atmel-samd/common-hal/_canio/Listener.c | 391 ---------------------- ports/atmel-samd/common-hal/_canio/Listener.h | 53 --- ports/atmel-samd/common-hal/_canio/__init__.c | 25 -- ports/atmel-samd/common-hal/_canio/__init__.h | 67 ---- ports/atmel-samd/common-hal/canio/CAN.c | 445 ++++++++++++++++++++++++++ ports/atmel-samd/common-hal/canio/CAN.h | 55 ++++ ports/atmel-samd/common-hal/canio/Listener.c | 391 ++++++++++++++++++++++ ports/atmel-samd/common-hal/canio/Listener.h | 53 +++ ports/atmel-samd/common-hal/canio/__init__.c | 25 ++ ports/atmel-samd/common-hal/canio/__init__.h | 67 ++++ py/circuitpy_defns.mk | 14 +- py/circuitpy_mpconfig.h | 2 +- shared-bindings/_canio/CAN.c | 422 ------------------------ shared-bindings/_canio/CAN.h | 54 ---- shared-bindings/_canio/Listener.c | 193 ----------- shared-bindings/_canio/Listener.h | 31 -- shared-bindings/_canio/Match.c | 139 -------- shared-bindings/_canio/Match.h | 37 --- shared-bindings/_canio/Message.c | 212 ------------ shared-bindings/_canio/Message.h | 44 --- shared-bindings/_canio/__init__.c | 124 ------- shared-bindings/_canio/__init__.h | 33 -- shared-bindings/canio/CAN.c | 422 ++++++++++++++++++++++++ shared-bindings/canio/CAN.h | 54 ++++ shared-bindings/canio/Listener.c | 193 +++++++++++ shared-bindings/canio/Listener.h | 31 ++ shared-bindings/canio/Match.c | 139 ++++++++ shared-bindings/canio/Match.h | 37 +++ shared-bindings/canio/Message.c | 212 ++++++++++++ shared-bindings/canio/Message.h | 44 +++ shared-bindings/canio/__init__.c | 124 +++++++ shared-bindings/canio/__init__.h | 33 ++ shared-module/_canio/Match.c | 43 --- shared-module/_canio/Match.h | 36 --- shared-module/_canio/Message.c | 101 ------ shared-module/_canio/Message.h | 38 --- shared-module/canio/Match.c | 43 +++ shared-module/canio/Match.h | 36 +++ shared-module/canio/Message.c | 101 ++++++ shared-module/canio/Message.h | 38 +++ 43 files changed, 2552 insertions(+), 2552 deletions(-) delete mode 100644 ports/atmel-samd/common-hal/_canio/CAN.c delete mode 100644 ports/atmel-samd/common-hal/_canio/CAN.h delete mode 100644 ports/atmel-samd/common-hal/_canio/Listener.c delete mode 100644 ports/atmel-samd/common-hal/_canio/Listener.h delete mode 100644 ports/atmel-samd/common-hal/_canio/__init__.c delete mode 100644 ports/atmel-samd/common-hal/_canio/__init__.h create mode 100644 ports/atmel-samd/common-hal/canio/CAN.c create mode 100644 ports/atmel-samd/common-hal/canio/CAN.h create mode 100644 ports/atmel-samd/common-hal/canio/Listener.c create mode 100644 ports/atmel-samd/common-hal/canio/Listener.h create mode 100644 ports/atmel-samd/common-hal/canio/__init__.c create mode 100644 ports/atmel-samd/common-hal/canio/__init__.h delete mode 100644 shared-bindings/_canio/CAN.c delete mode 100644 shared-bindings/_canio/CAN.h delete mode 100644 shared-bindings/_canio/Listener.c delete mode 100644 shared-bindings/_canio/Listener.h delete mode 100644 shared-bindings/_canio/Match.c delete mode 100644 shared-bindings/_canio/Match.h delete mode 100644 shared-bindings/_canio/Message.c delete mode 100644 shared-bindings/_canio/Message.h delete mode 100644 shared-bindings/_canio/__init__.c delete mode 100644 shared-bindings/_canio/__init__.h create mode 100644 shared-bindings/canio/CAN.c create mode 100644 shared-bindings/canio/CAN.h create mode 100644 shared-bindings/canio/Listener.c create mode 100644 shared-bindings/canio/Listener.h create mode 100644 shared-bindings/canio/Match.c create mode 100644 shared-bindings/canio/Match.h create mode 100644 shared-bindings/canio/Message.c create mode 100644 shared-bindings/canio/Message.h create mode 100644 shared-bindings/canio/__init__.c create mode 100644 shared-bindings/canio/__init__.h delete mode 100644 shared-module/_canio/Match.c delete mode 100644 shared-module/_canio/Match.h delete mode 100644 shared-module/_canio/Message.c delete mode 100644 shared-module/_canio/Message.h create mode 100644 shared-module/canio/Match.c create mode 100644 shared-module/canio/Match.h create mode 100644 shared-module/canio/Message.c create mode 100644 shared-module/canio/Message.h (limited to 'ports') diff --git a/main.c b/main.c index 4d34e451d..dbd367a59 100755 --- a/main.c +++ b/main.c @@ -82,7 +82,7 @@ #endif #if CIRCUITPY_CANIO -#include "common-hal/_canio/CAN.h" +#include "common-hal/canio/CAN.h" #endif void do_str(const char *src, mp_parse_input_kind_t input_kind) { diff --git a/ports/atmel-samd/common-hal/_canio/CAN.c b/ports/atmel-samd/common-hal/_canio/CAN.c deleted file mode 100644 index 0d967d7ca..000000000 --- a/ports/atmel-samd/common-hal/_canio/CAN.c +++ /dev/null @@ -1,445 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include - -#include "py/runtime.h" -#include "py/mperrno.h" - -#include "peripheral_clk_config.h" - -#include "common-hal/_canio/CAN.h" -#include "shared-bindings/microcontroller/Pin.h" -#include "shared-bindings/util.h" -#include "supervisor/port.h" - -#include "component/can.h" - -#include "genhdr/candata.h" - -STATIC Can * const can_insts[] = CAN_INSTS; - -STATIC canio_can_obj_t *can_objs[MP_ARRAY_SIZE(can_insts)]; - -// This must be placed in the first 64kB of RAM -STATIC COMPILER_SECTION(".canram") canio_can_state_t can_state[MP_ARRAY_SIZE(can_insts)]; - -void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent) -{ - mcu_pin_function_t *tx_function = mcu_find_pin_function(can_tx, tx, -1, MP_QSTR_tx); - int instance = tx_function->instance; - - mcu_pin_function_t *rx_function = mcu_find_pin_function(can_rx, rx, instance, MP_QSTR_rx); - - const uint32_t can_frequency = CONF_CAN0_FREQUENCY; - -#define DIV_ROUND(a, b) (((a) + (b)/2) / (b)) -#define DIV_ROUND_UP(a, b) (((a) + (b) - 1) / (b)) - - uint32_t clocks_per_bit = DIV_ROUND(can_frequency, baudrate); - uint32_t clocks_to_sample = DIV_ROUND(clocks_per_bit * 7, 8); - uint32_t clocks_after_sample = clocks_per_bit - clocks_to_sample; - uint32_t divisor = MAX(DIV_ROUND_UP(clocks_to_sample, 256), DIV_ROUND_UP(clocks_after_sample, 128)); - if (divisor > 32) { - mp_raise_OSError(MP_EINVAL); // baudrate cannot be attained (16kHz or something is lower bound, should never happen) - } - - gpio_set_pin_direction(tx_function->pin, GPIO_DIRECTION_OUT); - gpio_set_pin_function(tx_function->pin, tx_function->function); - common_hal_never_reset_pin(tx_function->obj); - - gpio_set_pin_direction(rx_function->pin, GPIO_DIRECTION_IN); - gpio_set_pin_function(rx_function->pin, rx_function->function); - common_hal_never_reset_pin(rx_function->obj); - - self->tx_pin_number = tx ? common_hal_mcu_pin_number(tx) : COMMON_HAL_MCU_NO_PIN; - self->rx_pin_number = rx ? common_hal_mcu_pin_number(rx) : COMMON_HAL_MCU_NO_PIN; - self->hw = can_insts[instance]; - self->state = &can_state[instance]; - - self->loopback = loopback; - self->silent = silent; - - // Allow configuration change - hri_can_set_CCCR_INIT_bit(self->hw); - while (hri_can_get_CCCR_INIT_bit(self->hw) == 0) { - } - hri_can_set_CCCR_CCE_bit(self->hw); - - if (instance == 0) { - hri_mclk_set_AHBMASK_CAN0_bit(MCLK); - hri_gclk_write_PCHCTRL_reg(GCLK, CAN0_GCLK_ID, CONF_GCLK_CAN0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); - - NVIC_DisableIRQ(CAN0_IRQn); - NVIC_ClearPendingIRQ(CAN0_IRQn); - NVIC_EnableIRQ(CAN0_IRQn); - hri_can_write_ILE_reg(self->hw, CAN_ILE_EINT0); -#ifdef CAN1_GCLK_ID - } else if (instance == 1) { - hri_mclk_set_AHBMASK_CAN1_bit(MCLK); - hri_gclk_write_PCHCTRL_reg(GCLK, CAN1_GCLK_ID, CONF_GCLK_CAN1_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); - - NVIC_DisableIRQ(CAN1_IRQn); - NVIC_ClearPendingIRQ(CAN1_IRQn); - NVIC_EnableIRQ(CAN1_IRQn); - hri_can_write_ILE_reg(self->hw, CAN_ILE_EINT0); -#endif - } - - self->hw->CCCR.bit.FDOE = 0; // neither FD nor Bit Rate Switch enabled - self->hw->CCCR.bit.BRSE = 0; - - hri_can_write_MRCFG_reg(self->hw, CAN_MRCFG_QOS(CAN_MRCFG_QOS_DISABLE_Val)); // QoS disabled (no sensitive operation) - - // A "nominal bit" is a header bit. With dual rate CAN FD, this is a slower rate - { - CAN_NBTP_Type btp = { - // 0 means "1 tq", but 2 is subtracted from NTSEG1 for the - // fixed 1 "SYNC" tq - .bit.NTSEG1 = DIV_ROUND(clocks_to_sample, divisor) - 2, - .bit.NTSEG2 = DIV_ROUND(clocks_after_sample, divisor) - 1, - .bit.NBRP = divisor - 1, - .bit.NSJW = DIV_ROUND(clocks_after_sample, divisor * 4), - }; - hri_can_write_NBTP_reg(self->hw, btp.reg); - } - - // A "data bit" is a data bit :) with dula rate CAN FD, this is a higher - // rate. However, CAN FD is not implemented in CircuitPython, and this is - // the same rate as the "nominal rate". - { - CAN_DBTP_Type btp = { - .bit.DTSEG1 = DIV_ROUND(clocks_to_sample, divisor) - 1, - .bit.DTSEG2 = DIV_ROUND(clocks_after_sample, divisor) - 1, - .bit.DBRP = divisor - 1, - .bit.DSJW = DIV_ROUND(clocks_after_sample, divisor * 4), - }; - hri_can_write_DBTP_reg(self->hw, btp.reg); - } - - { - CAN_RXF0C_Type rxf = { - .bit.F0SA = (uint32_t)self->state->rx0_fifo, - .bit.F0S = COMMON_HAL_CANIO_RX_FIFO_SIZE, - }; - hri_can_write_RXF0C_reg(self->hw, rxf.reg); - } - - { - CAN_RXF1C_Type rxf = { - .bit.F1SA = (uint32_t)self->state->rx1_fifo, - .bit.F1S = COMMON_HAL_CANIO_RX_FIFO_SIZE, - }; - hri_can_write_RXF1C_reg(self->hw, rxf.reg); - } - - // All RX data has an 8 byte payload (max) - { - CAN_RXESC_Type esc = { - .bit.F0DS = CAN_RXESC_F0DS_DATA8_Val, - .bit.F1DS = CAN_RXESC_F1DS_DATA8_Val, - .bit.RBDS = CAN_RXESC_RBDS_DATA8_Val, - }; - hri_can_write_RXESC_reg(self->hw, esc.reg); - } - - // All TX data has an 8 byte payload (max) - { - CAN_TXESC_Type esc = { - .bit.TBDS = CAN_TXESC_TBDS_DATA8_Val, - }; - hri_can_write_TXESC_reg(self->hw, esc.reg); - } - - { - CAN_TXBC_Type bc = { - .bit.TBSA = (uint32_t)self->state->tx_fifo, - .bit.NDTB = COMMON_HAL_CANIO_TX_FIFO_SIZE, - .bit.TFQM = 0, // Messages are transmitted in the order submitted - }; - hri_can_write_TXBC_reg(self->hw, bc.reg); - } - - { - CAN_TXEFC_Type efc = { - .bit.EFS = 0, - }; - hri_can_write_TXEFC_reg(self->hw, efc.reg); - } - - { - CAN_GFC_Type gfc = { - .bit.RRFE = 1, - .bit.ANFS = CAN_GFC_ANFS_REJECT_Val, - .bit.ANFE = CAN_GFC_ANFE_REJECT_Val, - }; - hri_can_write_GFC_reg(self->hw, gfc.reg); - } - - { - CAN_SIDFC_Type dfc = { - .bit.LSS = COMMON_HAL_CANIO_RX_FILTER_SIZE, - .bit.FLSSA = (uint32_t)self->state->standard_rx_filter - }; - hri_can_write_SIDFC_reg(self->hw, dfc.reg); - } - - { - CAN_XIDFC_Type dfc = { - .bit.LSE = COMMON_HAL_CANIO_RX_FILTER_SIZE, - .bit.FLESA = (uint32_t)self->state->extended_rx_filter - }; - hri_can_write_XIDFC_reg(self->hw, dfc.reg); - } - - { - CAN_IE_Type ie = { - .bit.EWE = 1, - .bit.EPE = 1, - .bit.BOE = 1, - }; - hri_can_write_IE_reg(self->hw, ie.reg); - } - - hri_can_write_XIDAM_reg(self->hw, CAN_XIDAM_RESETVALUE); - -// silent: The CAN is set in Bus Monitoring Mode by programming CCCR.MON to '1'. (tx pin unused) -// external loopback: The CAN can be set in External Loop Back Mode by programming TEST.LBCK and CCCR.MON to '1'. (rx pin unused) -// internal loopback (silent loopback): Internal Loop Back Mode is entered by programming bits TEST.LBCK and CCCR.MON to '1'. (tx, rx unused) - self->hw->CCCR.bit.MON = silent; - self->hw->CCCR.bit.TEST = loopback; - self->hw->TEST.bit.LBCK = loopback; - - if (instance == 0) { - NVIC_DisableIRQ(CAN0_IRQn); - NVIC_ClearPendingIRQ(CAN0_IRQn); - NVIC_EnableIRQ(CAN0_IRQn); -#ifdef CAN1_GCLK_ID - } else if (instance == 1) { - NVIC_DisableIRQ(CAN1_IRQn); - NVIC_ClearPendingIRQ(CAN1_IRQn); - NVIC_EnableIRQ(CAN1_IRQn); -#endif - } - - hri_can_write_ILE_reg(self->hw, CAN_ILE_EINT0); - // Prevent configuration change - hri_can_clear_CCCR_CCE_bit(self->hw); - hri_can_clear_CCCR_INIT_bit(self->hw); - while (hri_can_get_CCCR_INIT_bit(self->hw)) { - } - - can_objs[instance] = self; -} - -bool common_hal_canio_can_loopback_get(canio_can_obj_t *self) -{ - return self->loopback; -} - -int common_hal_canio_can_baudrate_get(canio_can_obj_t *self) -{ - return self->baudrate; -} - -int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self) -{ - return self->hw->ECR.bit.TEC; -} - -int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self) -{ - return self->hw->ECR.bit.REC; -} - -int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self) -{ - return self->error_warning_state_count; -} - -int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self) -{ - return self->error_passive_state_count; -} - -int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self) -{ - return self->bus_off_state_count; -} - -canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self) { - CAN_PSR_Type psr = self->hw->PSR; - if (psr.bit.BO) { - return BUS_STATE_OFF; - } - if (psr.bit.EP) { - return BUS_STATE_ERROR_PASSIVE; - } - if (psr.bit.EW) { - return BUS_STATE_ERROR_WARNING; - } - return BUS_STATE_ERROR_ACTIVE; -} - -void common_hal_canio_can_restart(canio_can_obj_t *self) { - if (!self->hw->PSR.bit.BO) { - return; - } - - hri_can_clear_CCCR_INIT_bit(self->hw); - while (hri_can_get_CCCR_INIT_bit(self->hw)) { - } -} - -bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self) { - return self->auto_restart; -} - -void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool value) { - self->auto_restart = value; -} - -static void maybe_auto_restart(canio_can_obj_t *self) { - if (self->auto_restart) { - common_hal_canio_can_restart(self); - } -} - -void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *message) -{ - maybe_auto_restart(self); - - // We have just one dedicated TX buffer, use it! - canio_can_fifo_t *ent = &self->state->tx_fifo[0]; - - ent->txb0.bit.ESI = false; - ent->txb0.bit.XTD = message->extended; - ent->txb0.bit.RTR = message->rtr; - if (message->extended) { - ent->txb0.bit.ID = message->id << 18; - } else { - ent->txb0.bit.ID = message->id << 18; // short addresses are left-justified - } - - ent->txb1.bit.MM = 0; // "message marker" - ent->txb1.bit.EFC = 0; // don't store fifo events to event queue - ent->txb1.bit.FDF = 0; // Classic CAN format - ent->txb1.bit.BRS = 0; // No bit rate switching - ent->txb1.bit.DLC = message->size; - - if (!message->rtr) { - memcpy(ent->data, message->data, message->size); - } - - // TX buffer add request - self->hw->TXBAR.reg = 1; - - // wait 8ms (hard coded for now) for TX to occur - uint64_t deadline = port_get_raw_ticks(NULL) + 8; - while (port_get_raw_ticks(NULL) < deadline && !(self->hw->TXBTO.reg & 1)) { - RUN_BACKGROUND_TASKS; - } -} - -bool common_hal_canio_can_silent_get(canio_can_obj_t *self) { - return self->silent; -} - -bool common_hal_canio_can_deinited(canio_can_obj_t *self) { - return !self->hw; -} - -void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self) { - if (common_hal_canio_can_deinited(self)) { - raise_deinited_error(); - } -} - -void common_hal_canio_can_deinit(canio_can_obj_t *self) -{ - if (self->hw) { - hri_can_set_CCCR_INIT_bit(self->hw); - self->hw = 0; - } - if (self->rx_pin_number != COMMON_HAL_MCU_NO_PIN) { - reset_pin_number(self->rx_pin_number); - self->rx_pin_number = COMMON_HAL_MCU_NO_PIN; - } - if (self->tx_pin_number != COMMON_HAL_MCU_NO_PIN) { - reset_pin_number(self->tx_pin_number); - self->tx_pin_number = COMMON_HAL_MCU_NO_PIN; - } -} - -void common_hal_canio_reset(void) { - memset(can_state, 0, sizeof(can_state)); - - for (size_t i=0; ierror_warning_state_count += 1; - } - if (ir & CAN_IE_EPE) { - self->error_passive_state_count += 1; - } - if (ir & CAN_IE_BOE) { - self->bus_off_state_count += 1; - } - - /* Acknowledge interrupt */ - hri_can_write_IR_reg(hw, ir); -} - -__attribute__((used)) -void CAN0_Handler(void) { - can_handler(0); -} - -#ifdef CAN1_GCLK_ID -__attribute__((used)) -void CAN1_Handler(void) { - can_handler(1); -} -#endif diff --git a/ports/atmel-samd/common-hal/_canio/CAN.h b/ports/atmel-samd/common-hal/_canio/CAN.h deleted file mode 100644 index 1cc34e3ac..000000000 --- a/ports/atmel-samd/common-hal/_canio/CAN.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#pragma once - -#include "py/obj.h" -#include "shared-bindings/_canio/__init__.h" -#include "shared-bindings/_canio/CAN.h" -#include "component/can.h" -#include "common-hal/microcontroller/Pin.h" -#include "common-hal/_canio/__init__.h" -#include "shared-module/_canio/Message.h" - -#define COMMON_HAL_CAN_RX_FIFO_LEN (2) -#define COMMON_HAL_CAN_TX_FIFO_LEN (2) - -typedef struct canio_can_obj { - mp_obj_base_t base; - Can *hw; - canio_can_state_t *state; - volatile uint32_t error_warning_state_count; - volatile uint32_t error_passive_state_count; - volatile uint32_t bus_off_state_count; - int baudrate; - uint8_t rx_pin_number:8; - uint8_t tx_pin_number:8; - bool loopback:1; - bool silent:1; - bool auto_restart:1; - bool fifo0_in_use:1; - bool fifo1_in_use:1; -} canio_can_obj_t; diff --git a/ports/atmel-samd/common-hal/_canio/Listener.c b/ports/atmel-samd/common-hal/_canio/Listener.c deleted file mode 100644 index 0a5f629f8..000000000 --- a/ports/atmel-samd/common-hal/_canio/Listener.c +++ /dev/null @@ -1,391 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "py/obj.h" -#include "py/runtime.h" - -#include "common-hal/_canio/__init__.h" -#include "common-hal/_canio/Listener.h" -#include "shared-bindings/util.h" -#include "supervisor/shared/tick.h" -#include "component/can.h" - -STATIC void allow_config_change(canio_can_obj_t *can) { - can->hw->CCCR.bit.INIT = 1; - while (!can->hw->CCCR.bit.INIT) { - } - can->hw->CCCR.bit.CCE = 1; -} - -STATIC void prevent_config_change(canio_can_obj_t *can) { - can->hw->CCCR.bit.CCE = 0; - can->hw->CCCR.bit.INIT = 0; - while (can->hw->CCCR.bit.INIT) { - } -} - -__attribute__((unused)) -STATIC void static_assertions(void) { - MP_STATIC_ASSERT(CAN_GFC_ANFE_RXF0_Val + 1 == CAN_GFC_ANFE_RXF1_Val); - MP_STATIC_ASSERT(CAN_GFC_ANFS_RXF0_Val + 1 == CAN_GFC_ANFS_RXF1_Val); - MP_STATIC_ASSERT(CAN_SIDFE_0_SFEC_STF0M_Val + 1 == CAN_SIDFE_0_SFEC_STF1M_Val); - MP_STATIC_ASSERT(CAN_XIDFE_0_EFEC_STF0M_Val + 1 == CAN_XIDFE_0_EFEC_STF1M_Val); -} - -STATIC bool single_address_filter(canio_match_obj_t *match) { - return match->mask == 0 || match->mask == match->address; -} - -STATIC bool standard_filter_in_use(CanMramSidfe *filter) { - return filter->SIDFE_0.bit.SFEC != CAN_SIDFE_0_SFEC_DISABLE_Val; -} - -STATIC bool extended_filter_in_use(CanMramXidfe *filter) { - return filter->XIDFE_0.bit.EFEC != CAN_XIDFE_0_EFEC_DISABLE_Val; -} - -STATIC size_t num_filters_needed(size_t nmatch, canio_match_obj_t **matches, bool extended) { - size_t num_half_filters_needed = 1; - for(size_t i=0; iextended) { - continue; - } - if (single_address_filter(matches[i])) { - num_half_filters_needed += 1; - } else { - num_half_filters_needed += 2; - } - } - return num_half_filters_needed / 2; -} - -STATIC size_t num_filters_available(canio_can_obj_t *can, bool extended) { - size_t available = 0; - if (extended) { - for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->extended_rx_filter); i++) { - if (!extended_filter_in_use(&can->state->extended_rx_filter[i])) { - available++; - } - } - } else { - for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->standard_rx_filter); i++) { - if (!standard_filter_in_use(&can->state->standard_rx_filter[i])) { - available++; - } - } - } - return available; -} - -STATIC void clear_filters(canio_listener_obj_t *self) { - canio_can_obj_t *can = self->can; - int fifo = self->fifo_idx; - - // If it was a global accept, clear it - allow_config_change(can); - if (can->hw->GFC.bit.ANFS == CAN_GFC_ANFS_RXF0 + fifo) { - can->hw->GFC.bit.ANFS = CAN_GFC_ANFS_REJECT_Val; - } - if (can->hw->GFC.bit.ANFE == CAN_GFC_ANFE_RXF0 + fifo) { - can->hw->GFC.bit.ANFE = CAN_GFC_ANFE_REJECT_Val; - } - prevent_config_change(can); - - // For each filter entry, if it pointed at this FIFO set it to DISABLE - for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->extended_rx_filter); i++) { - int val = CAN_XIDFE_0_EFEC_STF0M_Val + fifo; - if (can->state->extended_rx_filter[i].XIDFE_0.bit.EFEC == val) { - can->state->extended_rx_filter[i].XIDFE_0.bit.EFEC = CAN_XIDFE_0_EFEC_DISABLE_Val; - } - } - for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->standard_rx_filter); i++) { - int val = CAN_SIDFE_0_SFEC_STF1M_Val + fifo; - if (can->state->standard_rx_filter[i].SIDFE_0.bit.SFEC == val) { - can->state->standard_rx_filter[i].SIDFE_0.bit.SFEC = CAN_SIDFE_0_SFEC_DISABLE_Val; - } - } -} - -STATIC CanMramXidfe *next_extended_filter(canio_listener_obj_t *self, CanMramXidfe *start) { - CanMramXidfe *end = &self->can->state->extended_rx_filter[MP_ARRAY_SIZE(self->can->state->extended_rx_filter)]; - if (start == NULL) { - start = self->can->state->extended_rx_filter; - } else { - start = start + 1; - } - while (extended_filter_in_use(start)) { - if (start == end) { - return NULL; - } - start = start + 1; - } - return start; -} - -STATIC CanMramSidfe *next_standard_filter(canio_listener_obj_t *self, CanMramSidfe *start) { - CanMramSidfe *end = &self->can->state->standard_rx_filter[MP_ARRAY_SIZE(self->can->state->standard_rx_filter)]; - if (start == NULL) { - start = self->can->state->standard_rx_filter; - } else { - start = start + 1; - } - while (standard_filter_in_use(start)) { - if (start == end) { - return NULL; - } - start = start + 1; - } - return start; -} - -STATIC void install_standard_filter(CanMramSidfe *standard, int id1, int id2, int sfec, int sft) { - assert(standard); - CAN_SIDFE_0_Type val = { - .bit.SFID1 = id1, - .bit.SFID2 = id2, - .bit.SFEC = sfec, - .bit.SFT = sft, - }; - standard->SIDFE_0 = val; -} - -STATIC void install_extended_filter(CanMramXidfe *extended, int id1, int id2, int efec, int eft) { - assert(extended); - CAN_XIDFE_0_Type val0 = { - .bit.EFID1 = id1, - .bit.EFEC = efec, - }; - CAN_XIDFE_1_Type val1 = { - .bit.EFID2 = id2, - .bit.EFT = eft, - }; - // Set entry 0 second, because it has the enable bits (XIDFE_0_EFEC) - extended->XIDFE_1 = val1; - extended->XIDFE_0 = val0; -} - - -#define NO_ADDRESS (-1) -void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t **matches) { - int fifo = self->fifo_idx; - - if (!nmatch) { - allow_config_change(self->can); - self->can->hw->GFC.bit.ANFS = CAN_GFC_ANFS_RXF0_Val + fifo; - self->can->hw->GFC.bit.ANFE = CAN_GFC_ANFE_RXF0_Val + fifo; - self->can->hw->CCCR.bit.CCE = 0; - prevent_config_change(self->can); - return; - } - - CanMramSidfe *standard = next_standard_filter(self, NULL); - CanMramXidfe *extended = next_extended_filter(self, NULL); - - int first_address = NO_ADDRESS; - - // step 1: single address standard matches - // we have to gather up pairs and stuff them in a single filter entry - for(size_t i = 0; iextended) { - continue; - } - if (!single_address_filter(match)) { - continue; - } - if (first_address != NO_ADDRESS) { - install_standard_filter(standard, first_address, match->address, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_DUAL_Val); - first_address = NO_ADDRESS; - standard = next_standard_filter(self, standard); - } else { - first_address = match->address; - } - } - // step 1.5. odd single address standard match - if (first_address != NO_ADDRESS) { - install_standard_filter(standard, first_address, first_address, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_DUAL_Val); - standard = next_standard_filter(self, standard); - first_address = NO_ADDRESS; - } - - // step 2: standard mask filter - for(size_t i = 0; iextended) { - continue; - } - if (single_address_filter(match)) { - continue; - } - install_standard_filter(standard, match->address, match->mask, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_CLASSIC_Val); - standard = next_standard_filter(self, standard); - } - - // step 3: single address extended matches - // we have to gather up pairs and stuff them in a single filter entry - for(size_t i = 0; iextended) { - continue; - } - if (!single_address_filter(match)) { - continue; - } - if (first_address != NO_ADDRESS) { - install_extended_filter(extended, first_address, match->address, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_DUAL_Val); - first_address = NO_ADDRESS; - extended = next_extended_filter(self, extended); - } else { - first_address = match->address; - } - } - // step 3.5. odd single address standard match - if (first_address != NO_ADDRESS) { - install_extended_filter(extended, first_address, first_address, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_DUAL_Val); - extended = next_extended_filter(self, extended); - first_address = NO_ADDRESS; - } - - // step 4: extended mask filters - for(size_t i = 0; iextended) { - continue; - } - if (single_address_filter(match)) { - continue; - } - install_extended_filter(extended, match->address, match->mask, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_CLASSIC_Val); - extended = next_extended_filter(self, extended); - } - - // phew, easy(!) -} - - -void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout) { - if (!can->fifo0_in_use) { - self->fifo_idx = 0; - self->fifo = can->state->rx0_fifo; - self->hw = (canio_rxfifo_reg_t*)&can->hw->RXF0C; - can->hw->IR.reg = CAN_IR_RF0N | CAN_IR_RF0W | CAN_IR_RF0F | CAN_IR_RF0L; - can->fifo0_in_use = true; - } else if (!can->fifo1_in_use) { - self->fifo_idx = 1; - self->fifo = can->state->rx1_fifo; - self->hw = (canio_rxfifo_reg_t*)&can->hw->RXF1C; - can->fifo1_in_use = true; - can->hw->IR.reg = CAN_IR_RF1N | CAN_IR_RF1W | CAN_IR_RF1F | CAN_IR_RF1L; - } else { - mp_raise_ValueError(translate("All RX FIFOs in use")); - } - - if (!nmatch) { - if (can->hw->GFC.bit.ANFS == CAN_GFC_ANFS_RXF1_Val - self->fifo_idx) { - mp_raise_ValueError(translate("Already have all-matches listener")); - } - if (can->hw->GFC.bit.ANFE == CAN_GFC_ANFE_RXF1_Val - self->fifo_idx) { - mp_raise_ValueError(translate("Already have all-matches listener")); - } - } - - if (num_filters_needed(nmatch, matches, false) > num_filters_available(can, false)) { - mp_raise_ValueError(translate("Filters too complex")); - } - - if (num_filters_needed(nmatch, matches, true) > num_filters_available(can, true)) { - mp_raise_ValueError(translate("Filters too complex")); - } - - // Nothing can fail now so it's safe to assign self->can - self->can = can; - set_filters(self, nmatch, matches); - common_hal_canio_listener_set_timeout(self, timeout); -} - -void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout) { - self->timeout_ms = (int)MICROPY_FLOAT_C_FUN(ceil)(timeout * 1000); -} - -float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self) { - return self->timeout_ms / 1000.0f; -} - -void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self) { - if (!self->can) { - raise_deinited_error(); - } - common_hal_canio_can_check_for_deinit(self->can); -} - -int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self) { - return self->hw->RXFS.bit.F0FL; -} - -bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_message_obj_t *message) { - if (!common_hal_canio_listener_in_waiting(self)) { - uint64_t deadline = supervisor_ticks_ms64() + self->timeout_ms; - do { - if (supervisor_ticks_ms64() > deadline) { - return false; - } - } while (!common_hal_canio_listener_in_waiting(self)); - } - int index = self->hw->RXFS.bit.F0GI; - canio_can_fifo_t *hw_message = &self->fifo[index]; - message->extended = hw_message->rxb0.bit.XTD; - if (message->extended) { - message->id = hw_message->rxb0.bit.ID; - } else { - message->id = hw_message->rxb0.bit.ID >> 18; // short addresses are left-justified - } - message->rtr = hw_message->rxb0.bit.RTR; - message->size = hw_message->rxb1.bit.DLC; - if (!message->rtr) { - memcpy(message->data, hw_message->data, message->size); - } - self->hw->RXFA.bit.F0AI = index; - return true; -} - -void common_hal_canio_listener_deinit(canio_listener_obj_t *self) { - if (self->can) { - clear_filters(self); - if (self->fifo_idx == 0) { - self->can->fifo0_in_use = false; - } - if (self->fifo_idx == 1) { - self->can->fifo1_in_use = false; - } - } - self->fifo_idx = -1; - self->fifo = NULL; - self->can = NULL; - self->hw = NULL; -} diff --git a/ports/atmel-samd/common-hal/_canio/Listener.h b/ports/atmel-samd/common-hal/_canio/Listener.h deleted file mode 100644 index cc6770e6e..000000000 --- a/ports/atmel-samd/common-hal/_canio/Listener.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#pragma once - -#include "common-hal/_canio/CAN.h" -#include "shared-module/_canio/Match.h" - -typedef struct { - __IO CAN_RXF0C_Type RXFC; /**< \brief (R/W 32) Rx FIFO n Configuration */ - __I CAN_RXF0S_Type RXFS; /**< \brief (R/ 32) Rx FIFO n Status */ - __IO CAN_RXF0A_Type RXFA; /**< \brief (R/W 32) Rx FIFO n Acknowledge */ -} canio_rxfifo_reg_t; - -typedef struct { - mp_obj_base_t base; - canio_can_obj_t *can; - canio_can_fifo_t *fifo; - canio_rxfifo_reg_t *hw; - uint32_t timeout_ms; - uint8_t fifo_idx; -} canio_listener_obj_t; - -void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout); -void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self); -void common_hal_canio_listener_deinit(canio_listener_obj_t *self); -bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_message_obj_t *message); -int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self); -float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self); -void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout); diff --git a/ports/atmel-samd/common-hal/_canio/__init__.c b/ports/atmel-samd/common-hal/_canio/__init__.c deleted file mode 100644 index 7932bfc2d..000000000 --- a/ports/atmel-samd/common-hal/_canio/__init__.c +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ diff --git a/ports/atmel-samd/common-hal/_canio/__init__.h b/ports/atmel-samd/common-hal/_canio/__init__.h deleted file mode 100644 index cb491ab9e..000000000 --- a/ports/atmel-samd/common-hal/_canio/__init__.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#pragma once - -#include "hal/utils/include/utils.h" -#include "component/can.h" - -#define COMMON_HAL_CANIO_MAX_MESSAGE_LENGTH (8) -#define COMMON_HAL_CANIO_RX_FIFO_SIZE (3) -#define COMMON_HAL_CANIO_RX_FILTER_SIZE (4) -#define COMMON_HAL_CANIO_TX_FIFO_SIZE (1) - -// This appears to be a typo (transposition error) in the ASF4 headers -// It's called the "Extended ID Filter Entry" -typedef CanMramXifde CanMramXidfe; - -typedef struct canio_listener canio_listener_t; -typedef struct canio_can canio_can_t; - -typedef struct { - union { - CAN_RXBE_0_Type rxb0; - CAN_TXBE_0_Type txb0; - CAN_RXF0E_0_Type rxf0; - }; - union { - CAN_RXBE_1_Type rxb1; - CAN_TXBE_1_Type txb1; - CAN_RXF0E_1_Type rxf1; - }; - COMPILER_ALIGNED(4) - uint8_t data[COMMON_HAL_CANIO_MAX_MESSAGE_LENGTH]; -} canio_can_fifo_t; - -typedef uint32_t canio_can_filter_t; - -typedef struct { - canio_can_fifo_t tx_fifo[COMMON_HAL_CANIO_TX_FIFO_SIZE]; - canio_can_fifo_t rx0_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE]; - canio_can_fifo_t rx1_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE]; - CanMramSidfe standard_rx_filter[COMMON_HAL_CANIO_RX_FILTER_SIZE]; - CanMramXifde extended_rx_filter[COMMON_HAL_CANIO_RX_FILTER_SIZE]; -} canio_can_state_t; diff --git a/ports/atmel-samd/common-hal/canio/CAN.c b/ports/atmel-samd/common-hal/canio/CAN.c new file mode 100644 index 000000000..01cc03dea --- /dev/null +++ b/ports/atmel-samd/common-hal/canio/CAN.c @@ -0,0 +1,445 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "py/mperrno.h" + +#include "peripheral_clk_config.h" + +#include "common-hal/canio/CAN.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "supervisor/port.h" + +#include "component/can.h" + +#include "genhdr/candata.h" + +STATIC Can * const can_insts[] = CAN_INSTS; + +STATIC canio_can_obj_t *can_objs[MP_ARRAY_SIZE(can_insts)]; + +// This must be placed in the first 64kB of RAM +STATIC COMPILER_SECTION(".canram") canio_can_state_t can_state[MP_ARRAY_SIZE(can_insts)]; + +void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent) +{ + mcu_pin_function_t *tx_function = mcu_find_pin_function(can_tx, tx, -1, MP_QSTR_tx); + int instance = tx_function->instance; + + mcu_pin_function_t *rx_function = mcu_find_pin_function(can_rx, rx, instance, MP_QSTR_rx); + + const uint32_t can_frequency = CONF_CAN0_FREQUENCY; + +#define DIV_ROUND(a, b) (((a) + (b)/2) / (b)) +#define DIV_ROUND_UP(a, b) (((a) + (b) - 1) / (b)) + + uint32_t clocks_per_bit = DIV_ROUND(can_frequency, baudrate); + uint32_t clocks_to_sample = DIV_ROUND(clocks_per_bit * 7, 8); + uint32_t clocks_after_sample = clocks_per_bit - clocks_to_sample; + uint32_t divisor = MAX(DIV_ROUND_UP(clocks_to_sample, 256), DIV_ROUND_UP(clocks_after_sample, 128)); + if (divisor > 32) { + mp_raise_OSError(MP_EINVAL); // baudrate cannot be attained (16kHz or something is lower bound, should never happen) + } + + gpio_set_pin_direction(tx_function->pin, GPIO_DIRECTION_OUT); + gpio_set_pin_function(tx_function->pin, tx_function->function); + common_hal_never_reset_pin(tx_function->obj); + + gpio_set_pin_direction(rx_function->pin, GPIO_DIRECTION_IN); + gpio_set_pin_function(rx_function->pin, rx_function->function); + common_hal_never_reset_pin(rx_function->obj); + + self->tx_pin_number = tx ? common_hal_mcu_pin_number(tx) : COMMON_HAL_MCU_NO_PIN; + self->rx_pin_number = rx ? common_hal_mcu_pin_number(rx) : COMMON_HAL_MCU_NO_PIN; + self->hw = can_insts[instance]; + self->state = &can_state[instance]; + + self->loopback = loopback; + self->silent = silent; + + // Allow configuration change + hri_can_set_CCCR_INIT_bit(self->hw); + while (hri_can_get_CCCR_INIT_bit(self->hw) == 0) { + } + hri_can_set_CCCR_CCE_bit(self->hw); + + if (instance == 0) { + hri_mclk_set_AHBMASK_CAN0_bit(MCLK); + hri_gclk_write_PCHCTRL_reg(GCLK, CAN0_GCLK_ID, CONF_GCLK_CAN0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); + + NVIC_DisableIRQ(CAN0_IRQn); + NVIC_ClearPendingIRQ(CAN0_IRQn); + NVIC_EnableIRQ(CAN0_IRQn); + hri_can_write_ILE_reg(self->hw, CAN_ILE_EINT0); +#ifdef CAN1_GCLK_ID + } else if (instance == 1) { + hri_mclk_set_AHBMASK_CAN1_bit(MCLK); + hri_gclk_write_PCHCTRL_reg(GCLK, CAN1_GCLK_ID, CONF_GCLK_CAN1_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); + + NVIC_DisableIRQ(CAN1_IRQn); + NVIC_ClearPendingIRQ(CAN1_IRQn); + NVIC_EnableIRQ(CAN1_IRQn); + hri_can_write_ILE_reg(self->hw, CAN_ILE_EINT0); +#endif + } + + self->hw->CCCR.bit.FDOE = 0; // neither FD nor Bit Rate Switch enabled + self->hw->CCCR.bit.BRSE = 0; + + hri_can_write_MRCFG_reg(self->hw, CAN_MRCFG_QOS(CAN_MRCFG_QOS_DISABLE_Val)); // QoS disabled (no sensitive operation) + + // A "nominal bit" is a header bit. With dual rate CAN FD, this is a slower rate + { + CAN_NBTP_Type btp = { + // 0 means "1 tq", but 2 is subtracted from NTSEG1 for the + // fixed 1 "SYNC" tq + .bit.NTSEG1 = DIV_ROUND(clocks_to_sample, divisor) - 2, + .bit.NTSEG2 = DIV_ROUND(clocks_after_sample, divisor) - 1, + .bit.NBRP = divisor - 1, + .bit.NSJW = DIV_ROUND(clocks_after_sample, divisor * 4), + }; + hri_can_write_NBTP_reg(self->hw, btp.reg); + } + + // A "data bit" is a data bit :) with dula rate CAN FD, this is a higher + // rate. However, CAN FD is not implemented in CircuitPython, and this is + // the same rate as the "nominal rate". + { + CAN_DBTP_Type btp = { + .bit.DTSEG1 = DIV_ROUND(clocks_to_sample, divisor) - 1, + .bit.DTSEG2 = DIV_ROUND(clocks_after_sample, divisor) - 1, + .bit.DBRP = divisor - 1, + .bit.DSJW = DIV_ROUND(clocks_after_sample, divisor * 4), + }; + hri_can_write_DBTP_reg(self->hw, btp.reg); + } + + { + CAN_RXF0C_Type rxf = { + .bit.F0SA = (uint32_t)self->state->rx0_fifo, + .bit.F0S = COMMON_HAL_CANIO_RX_FIFO_SIZE, + }; + hri_can_write_RXF0C_reg(self->hw, rxf.reg); + } + + { + CAN_RXF1C_Type rxf = { + .bit.F1SA = (uint32_t)self->state->rx1_fifo, + .bit.F1S = COMMON_HAL_CANIO_RX_FIFO_SIZE, + }; + hri_can_write_RXF1C_reg(self->hw, rxf.reg); + } + + // All RX data has an 8 byte payload (max) + { + CAN_RXESC_Type esc = { + .bit.F0DS = CAN_RXESC_F0DS_DATA8_Val, + .bit.F1DS = CAN_RXESC_F1DS_DATA8_Val, + .bit.RBDS = CAN_RXESC_RBDS_DATA8_Val, + }; + hri_can_write_RXESC_reg(self->hw, esc.reg); + } + + // All TX data has an 8 byte payload (max) + { + CAN_TXESC_Type esc = { + .bit.TBDS = CAN_TXESC_TBDS_DATA8_Val, + }; + hri_can_write_TXESC_reg(self->hw, esc.reg); + } + + { + CAN_TXBC_Type bc = { + .bit.TBSA = (uint32_t)self->state->tx_fifo, + .bit.NDTB = COMMON_HAL_CANIO_TX_FIFO_SIZE, + .bit.TFQM = 0, // Messages are transmitted in the order submitted + }; + hri_can_write_TXBC_reg(self->hw, bc.reg); + } + + { + CAN_TXEFC_Type efc = { + .bit.EFS = 0, + }; + hri_can_write_TXEFC_reg(self->hw, efc.reg); + } + + { + CAN_GFC_Type gfc = { + .bit.RRFE = 1, + .bit.ANFS = CAN_GFC_ANFS_REJECT_Val, + .bit.ANFE = CAN_GFC_ANFE_REJECT_Val, + }; + hri_can_write_GFC_reg(self->hw, gfc.reg); + } + + { + CAN_SIDFC_Type dfc = { + .bit.LSS = COMMON_HAL_CANIO_RX_FILTER_SIZE, + .bit.FLSSA = (uint32_t)self->state->standard_rx_filter + }; + hri_can_write_SIDFC_reg(self->hw, dfc.reg); + } + + { + CAN_XIDFC_Type dfc = { + .bit.LSE = COMMON_HAL_CANIO_RX_FILTER_SIZE, + .bit.FLESA = (uint32_t)self->state->extended_rx_filter + }; + hri_can_write_XIDFC_reg(self->hw, dfc.reg); + } + + { + CAN_IE_Type ie = { + .bit.EWE = 1, + .bit.EPE = 1, + .bit.BOE = 1, + }; + hri_can_write_IE_reg(self->hw, ie.reg); + } + + hri_can_write_XIDAM_reg(self->hw, CAN_XIDAM_RESETVALUE); + +// silent: The CAN is set in Bus Monitoring Mode by programming CCCR.MON to '1'. (tx pin unused) +// external loopback: The CAN can be set in External Loop Back Mode by programming TEST.LBCK and CCCR.MON to '1'. (rx pin unused) +// internal loopback (silent loopback): Internal Loop Back Mode is entered by programming bits TEST.LBCK and CCCR.MON to '1'. (tx, rx unused) + self->hw->CCCR.bit.MON = silent; + self->hw->CCCR.bit.TEST = loopback; + self->hw->TEST.bit.LBCK = loopback; + + if (instance == 0) { + NVIC_DisableIRQ(CAN0_IRQn); + NVIC_ClearPendingIRQ(CAN0_IRQn); + NVIC_EnableIRQ(CAN0_IRQn); +#ifdef CAN1_GCLK_ID + } else if (instance == 1) { + NVIC_DisableIRQ(CAN1_IRQn); + NVIC_ClearPendingIRQ(CAN1_IRQn); + NVIC_EnableIRQ(CAN1_IRQn); +#endif + } + + hri_can_write_ILE_reg(self->hw, CAN_ILE_EINT0); + // Prevent configuration change + hri_can_clear_CCCR_CCE_bit(self->hw); + hri_can_clear_CCCR_INIT_bit(self->hw); + while (hri_can_get_CCCR_INIT_bit(self->hw)) { + } + + can_objs[instance] = self; +} + +bool common_hal_canio_can_loopback_get(canio_can_obj_t *self) +{ + return self->loopback; +} + +int common_hal_canio_can_baudrate_get(canio_can_obj_t *self) +{ + return self->baudrate; +} + +int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self) +{ + return self->hw->ECR.bit.TEC; +} + +int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self) +{ + return self->hw->ECR.bit.REC; +} + +int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self) +{ + return self->error_warning_state_count; +} + +int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self) +{ + return self->error_passive_state_count; +} + +int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self) +{ + return self->bus_off_state_count; +} + +canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self) { + CAN_PSR_Type psr = self->hw->PSR; + if (psr.bit.BO) { + return BUS_STATE_OFF; + } + if (psr.bit.EP) { + return BUS_STATE_ERROR_PASSIVE; + } + if (psr.bit.EW) { + return BUS_STATE_ERROR_WARNING; + } + return BUS_STATE_ERROR_ACTIVE; +} + +void common_hal_canio_can_restart(canio_can_obj_t *self) { + if (!self->hw->PSR.bit.BO) { + return; + } + + hri_can_clear_CCCR_INIT_bit(self->hw); + while (hri_can_get_CCCR_INIT_bit(self->hw)) { + } +} + +bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self) { + return self->auto_restart; +} + +void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool value) { + self->auto_restart = value; +} + +static void maybe_auto_restart(canio_can_obj_t *self) { + if (self->auto_restart) { + common_hal_canio_can_restart(self); + } +} + +void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *message) +{ + maybe_auto_restart(self); + + // We have just one dedicated TX buffer, use it! + canio_can_fifo_t *ent = &self->state->tx_fifo[0]; + + ent->txb0.bit.ESI = false; + ent->txb0.bit.XTD = message->extended; + ent->txb0.bit.RTR = message->rtr; + if (message->extended) { + ent->txb0.bit.ID = message->id << 18; + } else { + ent->txb0.bit.ID = message->id << 18; // short addresses are left-justified + } + + ent->txb1.bit.MM = 0; // "message marker" + ent->txb1.bit.EFC = 0; // don't store fifo events to event queue + ent->txb1.bit.FDF = 0; // Classic CAN format + ent->txb1.bit.BRS = 0; // No bit rate switching + ent->txb1.bit.DLC = message->size; + + if (!message->rtr) { + memcpy(ent->data, message->data, message->size); + } + + // TX buffer add request + self->hw->TXBAR.reg = 1; + + // wait 8ms (hard coded for now) for TX to occur + uint64_t deadline = port_get_raw_ticks(NULL) + 8; + while (port_get_raw_ticks(NULL) < deadline && !(self->hw->TXBTO.reg & 1)) { + RUN_BACKGROUND_TASKS; + } +} + +bool common_hal_canio_can_silent_get(canio_can_obj_t *self) { + return self->silent; +} + +bool common_hal_canio_can_deinited(canio_can_obj_t *self) { + return !self->hw; +} + +void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self) { + if (common_hal_canio_can_deinited(self)) { + raise_deinited_error(); + } +} + +void common_hal_canio_can_deinit(canio_can_obj_t *self) +{ + if (self->hw) { + hri_can_set_CCCR_INIT_bit(self->hw); + self->hw = 0; + } + if (self->rx_pin_number != COMMON_HAL_MCU_NO_PIN) { + reset_pin_number(self->rx_pin_number); + self->rx_pin_number = COMMON_HAL_MCU_NO_PIN; + } + if (self->tx_pin_number != COMMON_HAL_MCU_NO_PIN) { + reset_pin_number(self->tx_pin_number); + self->tx_pin_number = COMMON_HAL_MCU_NO_PIN; + } +} + +void common_hal_canio_reset(void) { + memset(can_state, 0, sizeof(can_state)); + + for (size_t i=0; ierror_warning_state_count += 1; + } + if (ir & CAN_IE_EPE) { + self->error_passive_state_count += 1; + } + if (ir & CAN_IE_BOE) { + self->bus_off_state_count += 1; + } + + /* Acknowledge interrupt */ + hri_can_write_IR_reg(hw, ir); +} + +__attribute__((used)) +void CAN0_Handler(void) { + can_handler(0); +} + +#ifdef CAN1_GCLK_ID +__attribute__((used)) +void CAN1_Handler(void) { + can_handler(1); +} +#endif diff --git a/ports/atmel-samd/common-hal/canio/CAN.h b/ports/atmel-samd/common-hal/canio/CAN.h new file mode 100644 index 000000000..cdea60e7d --- /dev/null +++ b/ports/atmel-samd/common-hal/canio/CAN.h @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" +#include "shared-bindings/canio/__init__.h" +#include "shared-bindings/canio/CAN.h" +#include "component/can.h" +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/canio/__init__.h" +#include "shared-module/canio/Message.h" + +#define COMMON_HAL_CAN_RX_FIFO_LEN (2) +#define COMMON_HAL_CAN_TX_FIFO_LEN (2) + +typedef struct canio_can_obj { + mp_obj_base_t base; + Can *hw; + canio_can_state_t *state; + volatile uint32_t error_warning_state_count; + volatile uint32_t error_passive_state_count; + volatile uint32_t bus_off_state_count; + int baudrate; + uint8_t rx_pin_number:8; + uint8_t tx_pin_number:8; + bool loopback:1; + bool silent:1; + bool auto_restart:1; + bool fifo0_in_use:1; + bool fifo1_in_use:1; +} canio_can_obj_t; diff --git a/ports/atmel-samd/common-hal/canio/Listener.c b/ports/atmel-samd/common-hal/canio/Listener.c new file mode 100644 index 000000000..bf8b3288d --- /dev/null +++ b/ports/atmel-samd/common-hal/canio/Listener.c @@ -0,0 +1,391 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "common-hal/canio/__init__.h" +#include "common-hal/canio/Listener.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/tick.h" +#include "component/can.h" + +STATIC void allow_config_change(canio_can_obj_t *can) { + can->hw->CCCR.bit.INIT = 1; + while (!can->hw->CCCR.bit.INIT) { + } + can->hw->CCCR.bit.CCE = 1; +} + +STATIC void prevent_config_change(canio_can_obj_t *can) { + can->hw->CCCR.bit.CCE = 0; + can->hw->CCCR.bit.INIT = 0; + while (can->hw->CCCR.bit.INIT) { + } +} + +__attribute__((unused)) +STATIC void static_assertions(void) { + MP_STATIC_ASSERT(CAN_GFC_ANFE_RXF0_Val + 1 == CAN_GFC_ANFE_RXF1_Val); + MP_STATIC_ASSERT(CAN_GFC_ANFS_RXF0_Val + 1 == CAN_GFC_ANFS_RXF1_Val); + MP_STATIC_ASSERT(CAN_SIDFE_0_SFEC_STF0M_Val + 1 == CAN_SIDFE_0_SFEC_STF1M_Val); + MP_STATIC_ASSERT(CAN_XIDFE_0_EFEC_STF0M_Val + 1 == CAN_XIDFE_0_EFEC_STF1M_Val); +} + +STATIC bool single_address_filter(canio_match_obj_t *match) { + return match->mask == 0 || match->mask == match->address; +} + +STATIC bool standard_filter_in_use(CanMramSidfe *filter) { + return filter->SIDFE_0.bit.SFEC != CAN_SIDFE_0_SFEC_DISABLE_Val; +} + +STATIC bool extended_filter_in_use(CanMramXidfe *filter) { + return filter->XIDFE_0.bit.EFEC != CAN_XIDFE_0_EFEC_DISABLE_Val; +} + +STATIC size_t num_filters_needed(size_t nmatch, canio_match_obj_t **matches, bool extended) { + size_t num_half_filters_needed = 1; + for(size_t i=0; iextended) { + continue; + } + if (single_address_filter(matches[i])) { + num_half_filters_needed += 1; + } else { + num_half_filters_needed += 2; + } + } + return num_half_filters_needed / 2; +} + +STATIC size_t num_filters_available(canio_can_obj_t *can, bool extended) { + size_t available = 0; + if (extended) { + for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->extended_rx_filter); i++) { + if (!extended_filter_in_use(&can->state->extended_rx_filter[i])) { + available++; + } + } + } else { + for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->standard_rx_filter); i++) { + if (!standard_filter_in_use(&can->state->standard_rx_filter[i])) { + available++; + } + } + } + return available; +} + +STATIC void clear_filters(canio_listener_obj_t *self) { + canio_can_obj_t *can = self->can; + int fifo = self->fifo_idx; + + // If it was a global accept, clear it + allow_config_change(can); + if (can->hw->GFC.bit.ANFS == CAN_GFC_ANFS_RXF0 + fifo) { + can->hw->GFC.bit.ANFS = CAN_GFC_ANFS_REJECT_Val; + } + if (can->hw->GFC.bit.ANFE == CAN_GFC_ANFE_RXF0 + fifo) { + can->hw->GFC.bit.ANFE = CAN_GFC_ANFE_REJECT_Val; + } + prevent_config_change(can); + + // For each filter entry, if it pointed at this FIFO set it to DISABLE + for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->extended_rx_filter); i++) { + int val = CAN_XIDFE_0_EFEC_STF0M_Val + fifo; + if (can->state->extended_rx_filter[i].XIDFE_0.bit.EFEC == val) { + can->state->extended_rx_filter[i].XIDFE_0.bit.EFEC = CAN_XIDFE_0_EFEC_DISABLE_Val; + } + } + for(size_t i = 0; i < MP_ARRAY_SIZE(can->state->standard_rx_filter); i++) { + int val = CAN_SIDFE_0_SFEC_STF1M_Val + fifo; + if (can->state->standard_rx_filter[i].SIDFE_0.bit.SFEC == val) { + can->state->standard_rx_filter[i].SIDFE_0.bit.SFEC = CAN_SIDFE_0_SFEC_DISABLE_Val; + } + } +} + +STATIC CanMramXidfe *next_extended_filter(canio_listener_obj_t *self, CanMramXidfe *start) { + CanMramXidfe *end = &self->can->state->extended_rx_filter[MP_ARRAY_SIZE(self->can->state->extended_rx_filter)]; + if (start == NULL) { + start = self->can->state->extended_rx_filter; + } else { + start = start + 1; + } + while (extended_filter_in_use(start)) { + if (start == end) { + return NULL; + } + start = start + 1; + } + return start; +} + +STATIC CanMramSidfe *next_standard_filter(canio_listener_obj_t *self, CanMramSidfe *start) { + CanMramSidfe *end = &self->can->state->standard_rx_filter[MP_ARRAY_SIZE(self->can->state->standard_rx_filter)]; + if (start == NULL) { + start = self->can->state->standard_rx_filter; + } else { + start = start + 1; + } + while (standard_filter_in_use(start)) { + if (start == end) { + return NULL; + } + start = start + 1; + } + return start; +} + +STATIC void install_standard_filter(CanMramSidfe *standard, int id1, int id2, int sfec, int sft) { + assert(standard); + CAN_SIDFE_0_Type val = { + .bit.SFID1 = id1, + .bit.SFID2 = id2, + .bit.SFEC = sfec, + .bit.SFT = sft, + }; + standard->SIDFE_0 = val; +} + +STATIC void install_extended_filter(CanMramXidfe *extended, int id1, int id2, int efec, int eft) { + assert(extended); + CAN_XIDFE_0_Type val0 = { + .bit.EFID1 = id1, + .bit.EFEC = efec, + }; + CAN_XIDFE_1_Type val1 = { + .bit.EFID2 = id2, + .bit.EFT = eft, + }; + // Set entry 0 second, because it has the enable bits (XIDFE_0_EFEC) + extended->XIDFE_1 = val1; + extended->XIDFE_0 = val0; +} + + +#define NO_ADDRESS (-1) +void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t **matches) { + int fifo = self->fifo_idx; + + if (!nmatch) { + allow_config_change(self->can); + self->can->hw->GFC.bit.ANFS = CAN_GFC_ANFS_RXF0_Val + fifo; + self->can->hw->GFC.bit.ANFE = CAN_GFC_ANFE_RXF0_Val + fifo; + self->can->hw->CCCR.bit.CCE = 0; + prevent_config_change(self->can); + return; + } + + CanMramSidfe *standard = next_standard_filter(self, NULL); + CanMramXidfe *extended = next_extended_filter(self, NULL); + + int first_address = NO_ADDRESS; + + // step 1: single address standard matches + // we have to gather up pairs and stuff them in a single filter entry + for(size_t i = 0; iextended) { + continue; + } + if (!single_address_filter(match)) { + continue; + } + if (first_address != NO_ADDRESS) { + install_standard_filter(standard, first_address, match->address, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_DUAL_Val); + first_address = NO_ADDRESS; + standard = next_standard_filter(self, standard); + } else { + first_address = match->address; + } + } + // step 1.5. odd single address standard match + if (first_address != NO_ADDRESS) { + install_standard_filter(standard, first_address, first_address, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_DUAL_Val); + standard = next_standard_filter(self, standard); + first_address = NO_ADDRESS; + } + + // step 2: standard mask filter + for(size_t i = 0; iextended) { + continue; + } + if (single_address_filter(match)) { + continue; + } + install_standard_filter(standard, match->address, match->mask, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_CLASSIC_Val); + standard = next_standard_filter(self, standard); + } + + // step 3: single address extended matches + // we have to gather up pairs and stuff them in a single filter entry + for(size_t i = 0; iextended) { + continue; + } + if (!single_address_filter(match)) { + continue; + } + if (first_address != NO_ADDRESS) { + install_extended_filter(extended, first_address, match->address, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_DUAL_Val); + first_address = NO_ADDRESS; + extended = next_extended_filter(self, extended); + } else { + first_address = match->address; + } + } + // step 3.5. odd single address standard match + if (first_address != NO_ADDRESS) { + install_extended_filter(extended, first_address, first_address, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_DUAL_Val); + extended = next_extended_filter(self, extended); + first_address = NO_ADDRESS; + } + + // step 4: extended mask filters + for(size_t i = 0; iextended) { + continue; + } + if (single_address_filter(match)) { + continue; + } + install_extended_filter(extended, match->address, match->mask, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_CLASSIC_Val); + extended = next_extended_filter(self, extended); + } + + // phew, easy(!) +} + + +void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout) { + if (!can->fifo0_in_use) { + self->fifo_idx = 0; + self->fifo = can->state->rx0_fifo; + self->hw = (canio_rxfifo_reg_t*)&can->hw->RXF0C; + can->hw->IR.reg = CAN_IR_RF0N | CAN_IR_RF0W | CAN_IR_RF0F | CAN_IR_RF0L; + can->fifo0_in_use = true; + } else if (!can->fifo1_in_use) { + self->fifo_idx = 1; + self->fifo = can->state->rx1_fifo; + self->hw = (canio_rxfifo_reg_t*)&can->hw->RXF1C; + can->fifo1_in_use = true; + can->hw->IR.reg = CAN_IR_RF1N | CAN_IR_RF1W | CAN_IR_RF1F | CAN_IR_RF1L; + } else { + mp_raise_ValueError(translate("All RX FIFOs in use")); + } + + if (!nmatch) { + if (can->hw->GFC.bit.ANFS == CAN_GFC_ANFS_RXF1_Val - self->fifo_idx) { + mp_raise_ValueError(translate("Already have all-matches listener")); + } + if (can->hw->GFC.bit.ANFE == CAN_GFC_ANFE_RXF1_Val - self->fifo_idx) { + mp_raise_ValueError(translate("Already have all-matches listener")); + } + } + + if (num_filters_needed(nmatch, matches, false) > num_filters_available(can, false)) { + mp_raise_ValueError(translate("Filters too complex")); + } + + if (num_filters_needed(nmatch, matches, true) > num_filters_available(can, true)) { + mp_raise_ValueError(translate("Filters too complex")); + } + + // Nothing can fail now so it's safe to assign self->can + self->can = can; + set_filters(self, nmatch, matches); + common_hal_canio_listener_set_timeout(self, timeout); +} + +void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout) { + self->timeout_ms = (int)MICROPY_FLOAT_C_FUN(ceil)(timeout * 1000); +} + +float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self) { + return self->timeout_ms / 1000.0f; +} + +void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self) { + if (!self->can) { + raise_deinited_error(); + } + common_hal_canio_can_check_for_deinit(self->can); +} + +int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self) { + return self->hw->RXFS.bit.F0FL; +} + +bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_message_obj_t *message) { + if (!common_hal_canio_listener_in_waiting(self)) { + uint64_t deadline = supervisor_ticks_ms64() + self->timeout_ms; + do { + if (supervisor_ticks_ms64() > deadline) { + return false; + } + } while (!common_hal_canio_listener_in_waiting(self)); + } + int index = self->hw->RXFS.bit.F0GI; + canio_can_fifo_t *hw_message = &self->fifo[index]; + message->extended = hw_message->rxb0.bit.XTD; + if (message->extended) { + message->id = hw_message->rxb0.bit.ID; + } else { + message->id = hw_message->rxb0.bit.ID >> 18; // short addresses are left-justified + } + message->rtr = hw_message->rxb0.bit.RTR; + message->size = hw_message->rxb1.bit.DLC; + if (!message->rtr) { + memcpy(message->data, hw_message->data, message->size); + } + self->hw->RXFA.bit.F0AI = index; + return true; +} + +void common_hal_canio_listener_deinit(canio_listener_obj_t *self) { + if (self->can) { + clear_filters(self); + if (self->fifo_idx == 0) { + self->can->fifo0_in_use = false; + } + if (self->fifo_idx == 1) { + self->can->fifo1_in_use = false; + } + } + self->fifo_idx = -1; + self->fifo = NULL; + self->can = NULL; + self->hw = NULL; +} diff --git a/ports/atmel-samd/common-hal/canio/Listener.h b/ports/atmel-samd/common-hal/canio/Listener.h new file mode 100644 index 000000000..a51a9fc37 --- /dev/null +++ b/ports/atmel-samd/common-hal/canio/Listener.h @@ -0,0 +1,53 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "common-hal/canio/CAN.h" +#include "shared-module/canio/Match.h" + +typedef struct { + __IO CAN_RXF0C_Type RXFC; /**< \brief (R/W 32) Rx FIFO n Configuration */ + __I CAN_RXF0S_Type RXFS; /**< \brief (R/ 32) Rx FIFO n Status */ + __IO CAN_RXF0A_Type RXFA; /**< \brief (R/W 32) Rx FIFO n Acknowledge */ +} canio_rxfifo_reg_t; + +typedef struct { + mp_obj_base_t base; + canio_can_obj_t *can; + canio_can_fifo_t *fifo; + canio_rxfifo_reg_t *hw; + uint32_t timeout_ms; + uint8_t fifo_idx; +} canio_listener_obj_t; + +void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout); +void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self); +void common_hal_canio_listener_deinit(canio_listener_obj_t *self); +bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_message_obj_t *message); +int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self); +float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self); +void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout); diff --git a/ports/atmel-samd/common-hal/canio/__init__.c b/ports/atmel-samd/common-hal/canio/__init__.c new file mode 100644 index 000000000..7932bfc2d --- /dev/null +++ b/ports/atmel-samd/common-hal/canio/__init__.c @@ -0,0 +1,25 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ diff --git a/ports/atmel-samd/common-hal/canio/__init__.h b/ports/atmel-samd/common-hal/canio/__init__.h new file mode 100644 index 000000000..cb491ab9e --- /dev/null +++ b/ports/atmel-samd/common-hal/canio/__init__.h @@ -0,0 +1,67 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "hal/utils/include/utils.h" +#include "component/can.h" + +#define COMMON_HAL_CANIO_MAX_MESSAGE_LENGTH (8) +#define COMMON_HAL_CANIO_RX_FIFO_SIZE (3) +#define COMMON_HAL_CANIO_RX_FILTER_SIZE (4) +#define COMMON_HAL_CANIO_TX_FIFO_SIZE (1) + +// This appears to be a typo (transposition error) in the ASF4 headers +// It's called the "Extended ID Filter Entry" +typedef CanMramXifde CanMramXidfe; + +typedef struct canio_listener canio_listener_t; +typedef struct canio_can canio_can_t; + +typedef struct { + union { + CAN_RXBE_0_Type rxb0; + CAN_TXBE_0_Type txb0; + CAN_RXF0E_0_Type rxf0; + }; + union { + CAN_RXBE_1_Type rxb1; + CAN_TXBE_1_Type txb1; + CAN_RXF0E_1_Type rxf1; + }; + COMPILER_ALIGNED(4) + uint8_t data[COMMON_HAL_CANIO_MAX_MESSAGE_LENGTH]; +} canio_can_fifo_t; + +typedef uint32_t canio_can_filter_t; + +typedef struct { + canio_can_fifo_t tx_fifo[COMMON_HAL_CANIO_TX_FIFO_SIZE]; + canio_can_fifo_t rx0_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE]; + canio_can_fifo_t rx1_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE]; + CanMramSidfe standard_rx_filter[COMMON_HAL_CANIO_RX_FILTER_SIZE]; + CanMramXifde extended_rx_filter[COMMON_HAL_CANIO_RX_FILTER_SIZE]; +} canio_can_state_t; diff --git a/py/circuitpy_defns.mk b/py/circuitpy_defns.mk index 2614dc011..98fa7a5f2 100644 --- a/py/circuitpy_defns.mk +++ b/py/circuitpy_defns.mk @@ -143,7 +143,7 @@ ifeq ($(CIRCUITPY_CAMERA),1) SRC_PATTERNS += camera/% endif ifeq ($(CIRCUITPY_CANIO),1) -SRC_PATTERNS += _canio/% +SRC_PATTERNS += canio/% endif ifeq ($(CIRCUITPY_COUNTIO),1) SRC_PATTERNS += countio/% @@ -318,9 +318,9 @@ SRC_COMMON_HAL_ALL = \ busio/__init__.c \ camera/__init__.c \ camera/Camera.c \ - _canio/CAN.c \ - _canio/Listener.c \ - _canio/__init__.c \ + canio/CAN.c \ + canio/Listener.c \ + canio/__init__.c \ countio/Counter.c \ countio/__init__.c \ digitalio/DigitalInOut.c \ @@ -390,7 +390,7 @@ $(filter $(SRC_PATTERNS), \ _bleio/Address.c \ _bleio/Attribute.c \ _bleio/ScanEntry.c \ - _canio/Match.c \ + canio/Match.c \ _eve/__init__.c \ camera/ImageFormat.c \ digitalio/Direction.c \ @@ -409,8 +409,8 @@ SRC_SHARED_MODULE_ALL = \ _bleio/Attribute.c \ _bleio/ScanEntry.c \ _bleio/ScanResults.c \ - _canio/Match.c \ - _canio/Message.c \ + canio/Match.c \ + canio/Message.c \ _eve/__init__.c \ _pixelbuf/PixelBuf.c \ _pixelbuf/__init__.c \ diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index d1b12f354..0583ae1c9 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -338,7 +338,7 @@ extern const struct _mp_obj_module_t camera_module; #if CIRCUITPY_CANIO extern const struct _mp_obj_module_t canio_module; -#define CANIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR__canio), (mp_obj_t)&canio_module }, +#define CANIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_canio), (mp_obj_t)&canio_module }, #else #define CANIO_MODULE #endif diff --git a/shared-bindings/_canio/CAN.c b/shared-bindings/_canio/CAN.c deleted file mode 100644 index 38aed85d3..000000000 --- a/shared-bindings/_canio/CAN.c +++ /dev/null @@ -1,422 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "py/enum.h" -#include "common-hal/_canio/CAN.h" -#include "common-hal/_canio/Listener.h" -#include "shared-bindings/_canio/__init__.h" -#include "shared-bindings/_canio/CAN.h" -#include "shared-bindings/_canio/Listener.h" -#include "shared-bindings/_canio/Match.h" -#include "shared-bindings/_canio/Message.h" -#include "shared-bindings/microcontroller/Pin.h" - -#include "py/objproperty.h" -#include "py/runtime.h" - -//| -//| class CAN: -//| """CAN bus protocol""" -//| -//| def __init__(self, -//| tx: microcontroller.Pin, -//| rx: microcontroller.Pin, -//| *, -//| baudrate: int = 250000, -//| loopback: bool = False, -//| silent: bool = False, -//| auto_restart: bool = False, -//| ): -//| """A common shared-bus protocol. The rx and tx pins are generally -//| connected to a transceiver which controls the H and L pins on a -//| shared bus. -//| -//| :param ~microcontroller.Pin rx: the pin to receive with -//| :param ~microcontroller.Pin tx: the pin to transmit with -//| :param int baudrate: The bit rate of the bus in Hz. All devices on the bus must agree on this value. -//| :param bool loopback: When True the ``rx`` pin's value is ignored, and the device receives the packets it sends. -//| :param bool silent: When True the ``tx`` pin is always driven to the high logic level. This mode can be used to "sniff" a CAN bus without interfering. -//| :param bool auto_restart: If True, will restart communications after entering bus-off state -//| """ -//| ... -//| -STATIC mp_obj_t canio_can_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_rx, ARG_tx, ARG_baudrate, ARG_loopback, ARG_silent, ARG_auto_restart, NUM_ARGS }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_tx, MP_ARG_OBJ | MP_ARG_REQUIRED }, - { MP_QSTR_rx, MP_ARG_OBJ | MP_ARG_REQUIRED }, - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 250000} }, - { MP_QSTR_loopback, MP_ARG_BOOL, {.u_bool = false} }, - { MP_QSTR_silent, MP_ARG_BOOL, {.u_bool = false} }, - { MP_QSTR_auto_restart, MP_ARG_BOOL, {.u_bool = false} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); - - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - mcu_pin_obj_t *rx_pin = validate_obj_is_free_pin_or_none(args[ARG_rx].u_obj); - mcu_pin_obj_t *tx_pin = validate_obj_is_free_pin_or_none(args[ARG_tx].u_obj); - if (!rx_pin && !tx_pin) { - mp_raise_ValueError(translate("tx and rx cannot both be None")); - } - - canio_can_obj_t *self = m_new_obj(canio_can_obj_t); - self->base.type = &canio_can_type; - common_hal_canio_can_construct(self, tx_pin, rx_pin, args[ARG_baudrate].u_int, args[ARG_loopback].u_bool, args[ARG_silent].u_bool); - - common_hal_canio_can_auto_restart_set(self, args[ARG_auto_restart].u_bool); - - return MP_OBJ_FROM_PTR(self); -} - - -//| auto_restart: bool -//| """If True, will restart communications after entering bus-off state""" -//| -STATIC mp_obj_t canio_can_auto_restart_get(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return mp_obj_new_bool(common_hal_canio_can_auto_restart_get(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_auto_restart_get_obj, canio_can_auto_restart_get); - -STATIC mp_obj_t canio_can_auto_restart_set(mp_obj_t self_in, mp_obj_t flag_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - common_hal_canio_can_auto_restart_set(self, mp_obj_is_true(flag_in)); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_2(canio_can_auto_restart_set_obj, canio_can_auto_restart_set); - -STATIC const mp_obj_property_t canio_can_auto_restart_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_auto_restart_get_obj, - (mp_obj_t)&canio_can_auto_restart_set_obj, - (mp_obj_t)mp_const_none}, -}; - - -//| baudrate: int -//| """The baud rate (read-only)""" -//| -STATIC mp_obj_t canio_can_baudrate_get(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_baudrate_get(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_baudrate_get_obj, canio_can_baudrate_get); - -STATIC const mp_obj_property_t canio_can_baudrate_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_baudrate_get_obj, - (mp_obj_t)mp_const_none, - (mp_obj_t)mp_const_none}, -}; - -//| transmit_error_count: int -//| """The number of transmit errors (read-only). Increased for a detected transmission error, decreased for successful transmission. Limited to the range from 0 to 255 inclusive. Also called TEC.""" -//| -STATIC mp_obj_t canio_can_transmit_error_count_get(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_transmit_error_count_get(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_transmit_error_count_get_obj, canio_can_transmit_error_count_get); - -STATIC const mp_obj_property_t canio_can_transmit_error_count_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_transmit_error_count_get_obj, - (mp_obj_t)mp_const_none, - (mp_obj_t)mp_const_none}, -}; - -//| receive_error_count: int -//| """The number of receive errors (read-only). Increased for a detected reception error, decreased for successful reception. Limited to the range from 0 to 255 inclusive. Also called REC.""" -//| -STATIC mp_obj_t canio_can_receive_error_count_get(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_receive_error_count_get(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_receive_error_count_get_obj, canio_can_receive_error_count_get); - -STATIC const mp_obj_property_t canio_can_receive_error_count_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_receive_error_count_get_obj, - (mp_obj_t)mp_const_none, - (mp_obj_t)mp_const_none}, -}; - -//| error_warning_state_count: int -//| """The number of times the controller enterted the Error Warning state (read-only). This number wraps around to 0 after an implementation-defined number of errors.""" -//| -STATIC mp_obj_t canio_can_error_warning_state_count_get(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_error_warning_state_count_get(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_error_warning_state_count_get_obj, canio_can_error_warning_state_count_get); - -STATIC const mp_obj_property_t canio_can_error_warning_state_count_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_error_warning_state_count_get_obj, - (mp_obj_t)mp_const_none, - (mp_obj_t)mp_const_none}, -}; - -//| error_passive_state_count: int -//| """The number of times the controller enterted the Error Passive state (read-only). This number wraps around to 0 after an implementation-defined number of errors.""" -//| -STATIC mp_obj_t canio_can_error_passive_state_count_get(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_error_passive_state_count_get(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_error_passive_state_count_get_obj, canio_can_error_passive_state_count_get); - -STATIC const mp_obj_property_t canio_can_error_passive_state_count_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_error_passive_state_count_get_obj, - (mp_obj_t)mp_const_none, - (mp_obj_t)mp_const_none}, -}; - -//| bus_off_state_count: int -//| """The number of times the controller enterted the Bus Off state (read-only). This number wraps around to 0 after an implementation-defined number of errors.""" -//| -STATIC mp_obj_t canio_can_bus_off_state_count_get(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_bus_off_state_count_get(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_bus_off_state_count_get_obj, canio_can_bus_off_state_count_get); - -STATIC const mp_obj_property_t canio_can_bus_off_state_count_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_bus_off_state_count_get_obj, - (mp_obj_t)mp_const_none, - (mp_obj_t)mp_const_none}, -}; - -//| state: State -//| """The current state of the bus.""" -STATIC mp_obj_t canio_can_state_get(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return cp_enum_find(&canio_bus_state_type, common_hal_canio_can_state_get(self)); -} - -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_state_get_obj, canio_can_state_get); - -STATIC const mp_obj_property_t canio_can_state_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_state_get_obj, - (mp_obj_t)mp_const_none, - (mp_obj_t)mp_const_none}, -}; - - -//| def restart(self) -> None: -//| """If the device is in the bus off state, restart it.""" -//| ... -//| -STATIC mp_obj_t canio_can_restart(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - common_hal_canio_can_restart(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_can_restart_obj, canio_can_restart); - -//| def listen(self, match: Optional[Sequence[Match]]=None, *, timeout: float=10) -> Listener: -//| """Start receiving messages that match any one of the filters. -//| -//| Creating a listener is an expensive operation and can interfere with reception of messages by other listeners. -//| -//| There is an implementation-defined maximum number of listeners and limit to the complexity of the filters. -//| -//| If the hardware cannot support all the requested matches, a ValueError is raised. Note that generally there are some number of hardware filters shared among all fifos. -//| -//| A message can be received by at most one Listener. If more than one listener matches a message, it is undefined which one actually receives it. -//| -//| An empty filter list causes all messages to be accepted. -//| -//| Timeout dictates how long readinto, read and next() will block.""" -//| ... -//| -STATIC mp_obj_t canio_can_listen(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - common_hal_canio_can_check_for_deinit(self); - - enum { ARG_match, ARG_timeout, NUM_ARGS }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_match, MP_ARG_OBJ, {.u_obj = 0} }, - { MP_QSTR_timeout, MP_ARG_OBJ, {.u_obj = 0} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); - - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - size_t nmatch = 0; - mp_obj_t *match_objects = NULL; - - if (args[ARG_match].u_obj) { - mp_obj_get_array(args[ARG_match].u_obj, &nmatch, &match_objects); - } - - canio_match_obj_t *matches[nmatch]; - for (size_t i=0; iname); - } - matches[i] = MP_OBJ_TO_PTR(match_objects[i]); - } - - float timeout = args[ARG_timeout].u_obj ? mp_obj_get_float(args[ARG_timeout].u_obj) : 10.0f; - canio_listener_obj_t *listener = m_new_obj(canio_listener_obj_t); - listener->base.type = &canio_listener_type; - common_hal_canio_listener_construct(listener, self, nmatch, matches, timeout); - return listener; -} -MP_DEFINE_CONST_FUN_OBJ_KW(canio_can_listen_obj, 1, canio_can_listen); - -//| loopback: bool -//| """True if the device was created in loopback mode, False otherwise""" -//| -STATIC mp_obj_t canio_can_loopback_get(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return mp_obj_new_bool(common_hal_canio_can_loopback_get(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_loopback_get_obj, canio_can_loopback_get); - -STATIC const mp_obj_property_t canio_can_loopback_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_loopback_get_obj, - (mp_obj_t)mp_const_none, - (mp_obj_t)mp_const_none}, -}; - - -//| def send(message: Message) -> None: -//| """Send a message on the bus with the given data and id. -//| If the message could not be sent due to a full fifo or a bus error condition, RuntimeError is raised. -//| """ -//| ... -//| -STATIC mp_obj_t canio_can_send(mp_obj_t self_in, mp_obj_t message_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - mp_obj_type_t *message_type = mp_obj_get_type(message_in); - if (message_type != &canio_message_type) { - mp_raise_TypeError_varg(translate("expected '%q' but got '%q'"), MP_QSTR_Message, message_type->name); - } - - canio_message_obj_t *message = message_in; - common_hal_canio_can_send(self, message); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_2(canio_can_send_obj, canio_can_send); - -//| silent: bool -//| """True if the device was created in silent mode, False otherwise""" -//| -STATIC mp_obj_t canio_can_silent_get(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return mp_obj_new_bool(common_hal_canio_can_silent_get(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_silent_get_obj, canio_can_silent_get); - -STATIC const mp_obj_property_t canio_can_silent_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_silent_get_obj, - (mp_obj_t)mp_const_none, - (mp_obj_t)mp_const_none}, -}; - - -//| def deinit(self) -> None: -//| """Deinitialize this object, freeing its hardware resources""" -//| ... -//| -STATIC mp_obj_t canio_can_deinit(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_deinit(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_can_deinit_obj, canio_can_deinit); - -//| def __enter__(self) -> CAN: -//| """Returns self, to allow the object to be used in a `with` statement for resource control""" -//| ... -//| -STATIC mp_obj_t canio_can_enter(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_can_enter_obj, canio_can_enter); - -//| def __exit__(self, unused1, unused2, unused3) -> None: -//| """Calls deinit()""" -//| ... -STATIC mp_obj_t canio_can_exit(size_t num_args, const mp_obj_t args[]) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(args[0]); - common_hal_canio_can_deinit(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(canio_can_exit_obj, 4, 4, canio_can_exit); - -STATIC const mp_rom_map_elem_t canio_can_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&canio_can_enter_obj) }, - { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&canio_can_exit_obj) }, - { MP_ROM_QSTR(MP_QSTR_auto_restart), MP_ROM_PTR(&canio_can_auto_restart_obj) }, - { MP_ROM_QSTR(MP_QSTR_baudrate), MP_ROM_PTR(&canio_can_baudrate_obj) }, - { MP_ROM_QSTR(MP_QSTR_bus_off_state_count), MP_ROM_PTR(&canio_can_bus_off_state_count_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&canio_can_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_error_passive_state_count), MP_ROM_PTR(&canio_can_error_passive_state_count_obj) }, - { MP_ROM_QSTR(MP_QSTR_error_warning_state_count), MP_ROM_PTR(&canio_can_error_warning_state_count_obj) }, - { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&canio_can_listen_obj) }, - { MP_ROM_QSTR(MP_QSTR_loopback), MP_ROM_PTR(&canio_can_loopback_obj) }, - { MP_ROM_QSTR(MP_QSTR_receive_error_count), MP_ROM_PTR(&canio_can_receive_error_count_obj) }, - { MP_ROM_QSTR(MP_QSTR_restart), MP_ROM_PTR(&canio_can_restart_obj) }, - { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&canio_can_send_obj) }, - { MP_ROM_QSTR(MP_QSTR_silent), MP_ROM_PTR(&canio_can_silent_obj) }, - { MP_ROM_QSTR(MP_QSTR_state), MP_ROM_PTR(&canio_can_state_obj) }, - { MP_ROM_QSTR(MP_QSTR_transmit_error_count), MP_ROM_PTR(&canio_can_transmit_error_count_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(canio_can_locals_dict, canio_can_locals_dict_table); - -const mp_obj_type_t canio_can_type = { - { &mp_type_type }, - .name = MP_QSTR_CAN, - .make_new = canio_can_make_new, - .locals_dict = (mp_obj_t)&canio_can_locals_dict, -}; diff --git a/shared-bindings/_canio/CAN.h b/shared-bindings/_canio/CAN.h deleted file mode 100644 index c591c8e6b..000000000 --- a/shared-bindings/_canio/CAN.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#pragma once - -#include "py/obj.h" -#include "shared-bindings/microcontroller/Pin.h" -#include "shared-bindings/_canio/Message.h" - -extern const mp_obj_type_t canio_can_type; - -typedef struct canio_can_obj canio_can_obj_t; - -void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent); -bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self); -bool common_hal_canio_can_deinited(canio_can_obj_t *self); -int common_hal_canio_can_baudrate_get(canio_can_obj_t *self); -int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self); -int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self); -int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self); -bool common_hal_canio_can_loopback_get(canio_can_obj_t *self); -int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self); -canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self); -bool common_hal_canio_can_silent_get(canio_can_obj_t *self); -int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self); -void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool auto_restart); -void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self); -void common_hal_canio_can_deinit(canio_can_obj_t *self); -void common_hal_canio_can_restart(canio_can_obj_t *self); -void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *message); -void common_hal_canio_reset(void); diff --git a/shared-bindings/_canio/Listener.c b/shared-bindings/_canio/Listener.c deleted file mode 100644 index 6186f3bbd..000000000 --- a/shared-bindings/_canio/Listener.c +++ /dev/null @@ -1,193 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "shared-bindings/_canio/Listener.h" -#include "shared-bindings/_canio/Message.h" -#include "common-hal/_canio/Listener.h" - -#include "py/runtime.h" -#include "py/objproperty.h" - -//| class Listener: -//| """Listens for CAN message -//| -//| _canio.Listener is not constructed directly, but instead by calling the -//| Listen method of a _canio.CAN object.""" -//| - -//| def read(self) -> Optional[Message]: -//| """Reads a message, after waiting up to self.timeout seconds -//| -//| If no message is received in time, None is returned. Otherwise, -//| a Message is returned.""" -//| ... -//| -STATIC mp_obj_t canio_listener_read(mp_obj_t self_in) { - canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_listener_check_for_deinit(self); - - canio_message_obj_t *message = m_new_obj(canio_message_obj_t); - self->base.type = &canio_message_type; - - if (common_hal_canio_listener_readinto(self, message)) { - return message; - } else { - m_free(message); // message did not escape into vm - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_read_obj, canio_listener_read); - -//| def readinto(self, message: Message) -> bool: -//| """Returns True (and modifies message) if a message was received -//| before ``timeout`` seconds elapsed, False otherwise.""" -//| ... -//| -STATIC mp_obj_t canio_listener_readinto(mp_obj_t self_in, mp_obj_t message) { - canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_obj_type_t *type = mp_obj_get_type(message); - if (type != &canio_message_type) { - mp_raise_TypeError_varg(translate("expected '%q' but got '%q'"), MP_QSTR_Message, type->name); - } - common_hal_canio_listener_check_for_deinit(self); - return mp_obj_new_bool(common_hal_canio_listener_readinto(self, message)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(canio_listener_readinto_obj, canio_listener_readinto); - -//| def in_waiting(self) -> int: -//| """Returns the number of messages waiting""" -//| ... -//| -STATIC mp_obj_t canio_listener_in_waiting(mp_obj_t self_in) { - canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_listener_check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_listener_in_waiting(self)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_in_waiting_obj, canio_listener_in_waiting); - -//| def __iter__(self): -//| """Returns self, unless the object is deinitialized""" -//| ... -//| -STATIC mp_obj_t canio_listener_iter(mp_obj_t self_in) { - canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_listener_check_for_deinit(self); - return self; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_iter_obj, canio_listener_iter); - -//| def __next__(self): -//| """Reads a message, after waiting up to self.timeout seconds -//| -//| If no message is received in time, raises StopIteration. Otherwise, -//| a Message is returned.""" -//| ... -//| -STATIC mp_obj_t canio_listener_next(mp_obj_t self_in) { - mp_obj_t result = canio_listener_read(self_in); - if (result == mp_const_none) { - return MP_OBJ_STOP_ITERATION; - } - return result; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_next_obj, canio_listener_next); - -//| def deinit(self) -> None: -//| """Deinitialize this object, freeing its hardware resources""" -//| ... -//| -STATIC mp_obj_t canio_listener_deinit(mp_obj_t self_in) { - canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_listener_deinit(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_deinit_obj, canio_listener_deinit); - -//| def __enter__(self) -> CAN: -//| """Returns self, to allow the object to be used in a `with` statement for resource control""" -//| ... -//| -STATIC mp_obj_t canio_listener_enter(mp_obj_t self_in) { - canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_listener_check_for_deinit(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_enter_obj, canio_listener_enter); - -//| def __exit__(self, unused1, unused2, unused3) -> None: -//| """Calls deinit()""" -//| ... -STATIC mp_obj_t canio_listener_exit(size_t num_args, const mp_obj_t args[]) { - canio_listener_obj_t *self = MP_OBJ_TO_PTR(args[0]); - common_hal_canio_listener_deinit(self); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(canio_listener_exit_obj, 4, 4, canio_listener_exit); - - -//| timeout : float -STATIC mp_obj_t canio_listener_timeout_get(mp_obj_t self_in) { - canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_listener_check_for_deinit(self); - return mp_obj_new_float(common_hal_canio_listener_get_timeout(self)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_timeout_get_obj, canio_listener_timeout_get); - -STATIC mp_obj_t canio_listener_timeout_set(mp_obj_t self_in, mp_obj_t timeout_in) { - canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_listener_check_for_deinit(self); - common_hal_canio_listener_set_timeout(self, mp_obj_get_float(timeout_in)); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(canio_listener_timeout_set_obj, canio_listener_timeout_set); - -STATIC const mp_obj_property_t canio_listener_timeout_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_listener_timeout_get_obj, - (mp_obj_t)&canio_listener_timeout_set_obj, - (mp_obj_t)mp_const_none}, -}; - - - -STATIC const mp_rom_map_elem_t canio_listener_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&canio_listener_enter_obj) }, - { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&canio_listener_exit_obj) }, - { MP_ROM_QSTR(MP_QSTR___iter__), MP_ROM_PTR(&canio_listener_iter_obj) }, - { MP_ROM_QSTR(MP_QSTR___next__), MP_ROM_PTR(&canio_listener_next_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&canio_listener_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_in_waiting), MP_ROM_PTR(&canio_listener_in_waiting_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&canio_listener_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&canio_listener_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_timeout), MP_ROM_PTR(&canio_listener_timeout_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(canio_listener_locals_dict, canio_listener_locals_dict_table); - -const mp_obj_type_t canio_listener_type = { - { &mp_type_type }, - .name = MP_QSTR_Listener, - .locals_dict = (mp_obj_dict_t*)&canio_listener_locals_dict, -}; diff --git a/shared-bindings/_canio/Listener.h b/shared-bindings/_canio/Listener.h deleted file mode 100644 index eaa3490df..000000000 --- a/shared-bindings/_canio/Listener.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#pragma once - -#include "py/obj.h" - -extern const mp_obj_type_t canio_listener_type; diff --git a/shared-bindings/_canio/Match.c b/shared-bindings/_canio/Match.c deleted file mode 100644 index 4ff35906b..000000000 --- a/shared-bindings/_canio/Match.c +++ /dev/null @@ -1,139 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "shared-bindings/_canio/Match.h" - -#include "py/objproperty.h" -#include "py/runtime.h" - -//| class Match: -//| """Describe CAN bus messages to match""" -//| -//| -//| def __init__(self, address: int, *, mask: int = 0, extended: bool = False): -//| """Construct a Match with the given properties. -//| -//| If mask is nonzero, then the filter is for any sender which matches all -//| the nonzero bits in mask. Otherwise, it matches exactly the given address. -//| If extended is true then only extended addresses are matched, otherwise -//| only standard addresses are matched.""" -//| - -STATIC mp_obj_t canio_match_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_address, ARG_mask, ARG_extended, NUM_ARGS }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_address, MP_ARG_INT | MP_ARG_REQUIRED }, - { MP_QSTR_mask, MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_extended, MP_ARG_BOOL, {.u_bool = false} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); - - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - int address_bits = args[ARG_extended].u_bool ? 0x1fffffff : 0x7ff; - int address = args[ARG_address].u_int; - int mask = args[ARG_mask].u_int; - - if (address & ~address_bits) { - mp_raise_ValueError_varg(translate("%q out of range"), MP_QSTR_address); - } - - if (mask & ~address_bits) { - mp_raise_ValueError_varg(translate("%q out of range"), MP_QSTR_mask); - } - - canio_match_obj_t *self = m_new_obj(canio_match_obj_t); - self->base.type = &canio_match_type; - common_hal_canio_match_construct(self, args[ARG_address].u_int, args[ARG_mask].u_int, args[ARG_extended].u_bool); - return self; -} - -//| address: int -//| """The address to match""" -//| - -STATIC mp_obj_t canio_match_address_get(mp_obj_t self_in) { - canio_match_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_match_get_address(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_match_address_get_obj, canio_match_address_get); - -const mp_obj_property_t canio_match_address_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_match_address_get_obj, - (mp_obj_t)&mp_const_none_obj, - (mp_obj_t)&mp_const_none_obj}, -}; - -//| -//| mask: int -//| """The optional mask of addresses to match""" -//| - -STATIC mp_obj_t canio_match_mask_get(mp_obj_t self_in) { - canio_match_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_match_get_mask(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_match_mask_get_obj, canio_match_mask_get); - -const mp_obj_property_t canio_match_mask_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_match_mask_get_obj, - (mp_obj_t)&mp_const_none_obj, - (mp_obj_t)&mp_const_none_obj}, -}; - -//| extended: bool -//| """True to match extended addresses, False to match standard addresses""" -//| - -STATIC mp_obj_t canio_match_extended_get(mp_obj_t self_in) { - canio_match_obj_t *self = self_in; - return mp_obj_new_bool(common_hal_canio_match_get_extended(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_match_extended_get_obj, canio_match_extended_get); - -const mp_obj_property_t canio_match_extended_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_match_extended_get_obj, - (mp_obj_t)&mp_const_none_obj, - (mp_obj_t)&mp_const_none_obj}, -}; - -STATIC const mp_rom_map_elem_t canio_match_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_address), MP_ROM_PTR(&canio_match_address_obj) }, - { MP_ROM_QSTR(MP_QSTR_mask), MP_ROM_PTR(&canio_match_mask_obj) }, - { MP_ROM_QSTR(MP_QSTR_extended), MP_ROM_PTR(&canio_match_extended_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(canio_match_locals_dict, canio_match_locals_dict_table); - -const mp_obj_type_t canio_match_type = { - { &mp_type_type }, - .name = MP_QSTR_Match, - .make_new = canio_match_make_new, - .locals_dict = (mp_obj_dict_t*)&canio_match_locals_dict, -}; diff --git a/shared-bindings/_canio/Match.h b/shared-bindings/_canio/Match.h deleted file mode 100644 index 5522c2636..000000000 --- a/shared-bindings/_canio/Match.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#pragma once - -#include "py/obj.h" -#include "shared-module/_canio/Match.h" - -extern const mp_obj_type_t canio_match_type; - -void common_hal_canio_match_construct(canio_match_obj_t *self, int address, int mask, bool extended); -int common_hal_canio_match_get_address(const canio_match_obj_t *self); -int common_hal_canio_match_get_mask(const canio_match_obj_t *self); -bool common_hal_canio_match_get_extended(const canio_match_obj_t *self); diff --git a/shared-bindings/_canio/Message.c b/shared-bindings/_canio/Message.c deleted file mode 100644 index 487ac9bfd..000000000 --- a/shared-bindings/_canio/Message.c +++ /dev/null @@ -1,212 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "shared-bindings/_canio/Message.h" - -#include "py/obj.h" -#include "py/objproperty.h" -#include "py/runtime.h" - -//| class Message: -//| def __init__(self, id: int=0, data: Optional[bytes] = None, *, size: Optional[int] = None, rtr: bool = False, extended: bool = False): -//| """Construct a Message to use with a CAN bus. Provide arguments to create a message to send. Otherwise, use Listener.readinto() to read a message. -//| -//| :param int id: The numeric ID of the message -//| :param bytes data: The content of the message -//| :param int size: The amount of data requested, for an rtr -//| :param bool rtr: True if the message represents an rtr (Remote Transmission Request) -//| :param bool extended: True if the message has an extended identifier, False if it has a standard identifier -//| -//| In CAN, messages can have a size from 0 to 8 bytes. -//| -//| For a non-rtr message, specify `data`. For an rtr-message, specify either `data` (a dummy buffer of the requested size) or `size`. -//| """ -//| ... -//| -STATIC mp_obj_t canio_message_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_id, ARG_data, ARG_size, ARG_rtr, ARG_extended, NUM_ARGS }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_id, MP_ARG_INT, {.u_obj = 0} }, - { MP_QSTR_data, MP_ARG_OBJ, {.u_obj = 0} }, - { MP_QSTR_size, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_rtr, MP_ARG_BOOL, {.u_bool = false} }, - { MP_QSTR_extended, MP_ARG_BOOL, {.u_bool = false} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); - - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - bool rtr = args[ARG_rtr].u_bool; - bool extended = args[ARG_extended].u_bool; - size_t size = (size_t)args[ARG_size].u_int; - bool specified_size = (size != (size_t)-1); - bool specified_data = (args[ARG_data].u_obj != NULL); - - if (specified_size && specified_data) { - mp_raise_TypeError(translate("specify size or data, but not both")); - } - - mp_buffer_info_t data; - if (specified_data) { - mp_get_buffer_raise(args[ARG_data].u_obj, &data, MP_BUFFER_READ); - } else if (specified_size) { - data.buf = 0; - data.len = size; - } else { - data.buf = 0; - data.len = 0; - } - - if (data.len > 8) { - mp_raise_ValueError(translate("Messages limited to 8 bytes")); - } - - canio_message_obj_t *self = m_new_obj(canio_message_obj_t); - self->base.type = &canio_message_type; - common_hal_canio_message_construct(self, args[ARG_id].u_int, data.buf, data.len, rtr, extended); - return self; -} - -//| id: int -//| """The numeric ID of the message""" -//| -STATIC mp_obj_t canio_message_id_get(const mp_obj_t self_in) { - canio_message_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_message_get_id(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_message_id_get_obj, canio_message_id_get); - -STATIC mp_obj_t canio_message_id_set(const mp_obj_t self_in, const mp_obj_t id) { - canio_message_obj_t *self = self_in; - common_hal_canio_message_set_id(self, mp_obj_get_int(id)); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_2(canio_message_id_set_obj, canio_message_id_set); - -STATIC const mp_obj_property_t canio_message_id_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_message_id_get_obj, - (mp_obj_t)&canio_message_id_set_obj, - (mp_obj_t)&mp_const_none_obj}, -}; - -//| data: bytes -//| """The content of the message, or dummy content in the case of an rtr. -//| -//| Assigning to data also sets the length and clears the rtr flag.""" -//| -STATIC mp_obj_t canio_message_data_get(const mp_obj_t self_in) { - canio_message_obj_t *self = self_in; - return mp_obj_new_bytes((const byte*)common_hal_canio_message_get_data(self), common_hal_canio_message_get_size(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_message_data_get_obj, canio_message_data_get); - -STATIC mp_obj_t canio_message_data_set(const mp_obj_t self_in, const mp_obj_t data_in) { - canio_message_obj_t *self = self_in; - mp_buffer_info_t data; - mp_get_buffer_raise(data_in, &data, MP_BUFFER_READ); - if (data.len > 8) { - mp_raise_ValueError(translate("Messages limited to 8 bytes")); - } - common_hal_canio_message_set_data(self, data.buf, data.len); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_2(canio_message_data_set_obj, canio_message_data_set); - - -STATIC const mp_obj_property_t canio_message_data_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_message_data_get_obj, - (mp_obj_t)&canio_message_data_set_obj, - (mp_obj_t)&mp_const_none_obj}, -}; - - -//| extended: bool -//| """True if the message represents a remote transmission request (RTR)""" -//| -STATIC mp_obj_t canio_message_extended_get(const mp_obj_t self_in) { - canio_message_obj_t *self = self_in; - return mp_obj_new_bool(common_hal_canio_message_get_extended(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_message_extended_get_obj, canio_message_extended_get); - -STATIC mp_obj_t canio_message_extended_set(const mp_obj_t self_in, const mp_obj_t extended) { - canio_message_obj_t *self = self_in; - common_hal_canio_message_set_extended(self, mp_obj_is_true(extended)); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_2(canio_message_extended_set_obj, canio_message_extended_set); - - -STATIC const mp_obj_property_t canio_message_extended_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_message_extended_get_obj, - (mp_obj_t)&canio_message_extended_set_obj, - (mp_obj_t)&mp_const_none_obj}, -}; - - -//| rtr: bool -//| """True if the message represents a remote transmission request (RTR). Setting rtr to true zeros out data""" -//| -STATIC mp_obj_t canio_message_rtr_get(const mp_obj_t self_in) { - canio_message_obj_t *self = self_in; - return mp_obj_new_bool(common_hal_canio_message_get_rtr(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_message_rtr_get_obj, canio_message_rtr_get); - -STATIC mp_obj_t canio_message_rtr_set(const mp_obj_t self_in, const mp_obj_t rtr) { - canio_message_obj_t *self = self_in; - common_hal_canio_message_set_rtr(self, mp_obj_is_true(rtr)); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_2(canio_message_rtr_set_obj, canio_message_rtr_set); - - -STATIC const mp_obj_property_t canio_message_rtr_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_message_rtr_get_obj, - (mp_obj_t)&canio_message_rtr_set_obj, - (mp_obj_t)&mp_const_none_obj}, -}; - - -STATIC const mp_rom_map_elem_t canio_message_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_id), MP_ROM_PTR(&canio_message_id_obj) }, - { MP_ROM_QSTR(MP_QSTR_data), MP_ROM_PTR(&canio_message_data_obj) }, - { MP_ROM_QSTR(MP_QSTR_rtr), MP_ROM_PTR(&canio_message_rtr_obj) }, - { MP_ROM_QSTR(MP_QSTR_extended), MP_ROM_PTR(&canio_message_extended_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(canio_message_locals_dict, canio_message_locals_dict_table); - -const mp_obj_type_t canio_message_type = { - { &mp_type_type }, - .name = MP_QSTR_Message, - .make_new = canio_message_make_new, - .locals_dict = (mp_obj_t)&canio_message_locals_dict, -}; diff --git a/shared-bindings/_canio/Message.h b/shared-bindings/_canio/Message.h deleted file mode 100644 index ed739af0d..000000000 --- a/shared-bindings/_canio/Message.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#pragma once - -#include "py/obj.h" -#include "shared-module/_canio/Message.h" - -extern const mp_obj_type_t canio_message_type; - -void common_hal_canio_message_construct(canio_message_obj_t *self, int id, void *data, size_t size, bool rtr, bool extended); -const void *common_hal_canio_message_get_data(const canio_message_obj_t *self); -void common_hal_canio_message_set_data(canio_message_obj_t *self, const void *data, size_t size); -bool common_hal_canio_message_get_extended(const canio_message_obj_t *self); -void common_hal_canio_message_set_extended(canio_message_obj_t *self, bool extended); -int common_hal_canio_message_get_id(const canio_message_obj_t *self); -void common_hal_canio_message_set_id(canio_message_obj_t *self, int id); -bool common_hal_canio_message_get_rtr(const canio_message_obj_t *self); -void common_hal_canio_message_set_rtr(canio_message_obj_t *self, bool rtr); -size_t common_hal_canio_message_get_size(const canio_message_obj_t *self); -void common_hal_canio_message_set_size(canio_message_obj_t *self, size_t size); diff --git a/shared-bindings/_canio/__init__.c b/shared-bindings/_canio/__init__.c deleted file mode 100644 index 29e43c5c4..000000000 --- a/shared-bindings/_canio/__init__.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -//| """CAN bus access -//| -//| The `_canio` module contains low level classes to support the CAN bus -//| protocol. -//| -//| CAN and Listener classes change hardware state and should be deinitialized when they -//| are no longer needed if the program continues after use. To do so, either -//| call :py:meth:`!deinit` or use a context manager. See -//| :ref:`lifetime-and-contextmanagers` for more info. -//| -//| For example:: -//| -//| import _canio -//| from board import * -//| -//| can = _canio.CAN(board.CAN_RX, board.CAN_TX, baudrate=1000000) -//| message = _canio.Message(id=0x0408, data="adafruit" -//| can.write(message)) -//| can.deinit() -//| -//| This example will write the data 'adafruit' onto the CAN bus to any -//| device listening for message id 0x0408. -//| -//| A CAN bus involves a transceiver, which is often a separate chip with a "standby" pin. -//| If your board has a CAN_STANDBY pin, ensure to set it to an output with the value False -//| to enable the transceiver. -//| -//| Other implementations of the CAN device may exist (for instance, attached -//| via an SPI bus). If so their constructor arguments may differ, but -//| otherwise we encourage implementors to follow the API that the core uses. -//| """ -//| - -#include "py/obj.h" -#include "py/enum.h" - -#include "shared-bindings/_canio/__init__.h" -#include "shared-bindings/_canio/CAN.h" -#include "shared-bindings/_canio/Match.h" -#include "shared-bindings/_canio/Message.h" -#include "shared-bindings/_canio/Listener.h" - -MAKE_ENUM_VALUE(canio_bus_state_type, bus_state, ERROR_ACTIVE, BUS_STATE_ERROR_ACTIVE); -MAKE_ENUM_VALUE(canio_bus_state_type, bus_state, ERROR_PASSIVE, BUS_STATE_ERROR_PASSIVE); -MAKE_ENUM_VALUE(canio_bus_state_type, bus_state, ERROR_WARNING, BUS_STATE_ERROR_WARNING); -MAKE_ENUM_VALUE(canio_bus_state_type, bus_state, BUS_OFF, BUS_STATE_OFF); - -//| class BusState: -//| """The state of the CAN bus""" -//| -//| ERROR_ACTIVE: object -//| """The bus is in the normal (active) state""" -//| -//| ERROR_WARNING: object -//| """The bus is in the normal (active) state, but a moderate number of errors have occurred recently. -//| -//| NOTE: Not all implementations may use ERROR_WARNING. Do not rely on seeing ERROR_WARNING before ERROR_PASSIVE.""" -//| -//| ERROR_PASSIVE: object -//| """The bus is in the passive state due to the number of errors that have occurred recently. -//| -//| This device will acknowledge packets it receives, but cannot transmit messages. -//| If additional errors occur, this device may progress to BUS_OFF. -//| If it successfully acknowledges other packets on the bus, it can return to ERROR_WARNING or ERROR_ACTIVE and transmit packets. -//| """ -//| -//| BUS_OFF: object -//| """The bus has turned off due to the number of errors that have -//| occurred recently. It must be restarted before it will send or receive -//| packets. This device will neither send or acknowledge packets on the bus.""" -//| -MAKE_ENUM_MAP(canio_bus_state) { - MAKE_ENUM_MAP_ENTRY(bus_state, ERROR_ACTIVE), - MAKE_ENUM_MAP_ENTRY(bus_state, ERROR_PASSIVE), - MAKE_ENUM_MAP_ENTRY(bus_state, ERROR_WARNING), - MAKE_ENUM_MAP_ENTRY(bus_state, BUS_OFF), -}; -STATIC MP_DEFINE_CONST_DICT(canio_bus_state_locals_dict, canio_bus_state_locals_table); - -MAKE_PRINTER(_canio, canio_bus_state); - -MAKE_ENUM_TYPE(_canio, BusState, canio_bus_state); - -STATIC const mp_rom_map_elem_t canio_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR_BusState), MP_ROM_PTR(&canio_bus_state_type) }, - { MP_ROM_QSTR(MP_QSTR_CAN), MP_ROM_PTR(&canio_can_type) }, - { MP_ROM_QSTR(MP_QSTR_Listener), MP_ROM_PTR(&canio_listener_type) }, - { MP_ROM_QSTR(MP_QSTR_Match), MP_ROM_PTR(&canio_match_type) }, - { MP_ROM_QSTR(MP_QSTR_Message), MP_ROM_PTR(&canio_message_type) }, - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR__canio) }, -}; - -STATIC MP_DEFINE_CONST_DICT(canio_module_globals, canio_module_globals_table); - -const mp_obj_module_t canio_module = { - .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&canio_module_globals, -}; diff --git a/shared-bindings/_canio/__init__.h b/shared-bindings/_canio/__init__.h deleted file mode 100644 index e24eba92c..000000000 --- a/shared-bindings/_canio/__init__.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#pragma once - -typedef enum { - BUS_STATE_ERROR_ACTIVE, BUS_STATE_ERROR_PASSIVE, BUS_STATE_ERROR_WARNING, BUS_STATE_OFF -} canio_bus_state_t; - -extern const mp_obj_type_t canio_bus_state_type; diff --git a/shared-bindings/canio/CAN.c b/shared-bindings/canio/CAN.c new file mode 100644 index 000000000..482d11546 --- /dev/null +++ b/shared-bindings/canio/CAN.c @@ -0,0 +1,422 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/enum.h" +#include "common-hal/canio/CAN.h" +#include "common-hal/canio/Listener.h" +#include "shared-bindings/canio/__init__.h" +#include "shared-bindings/canio/CAN.h" +#include "shared-bindings/canio/Listener.h" +#include "shared-bindings/canio/Match.h" +#include "shared-bindings/canio/Message.h" +#include "shared-bindings/microcontroller/Pin.h" + +#include "py/objproperty.h" +#include "py/runtime.h" + +//| +//| class CAN: +//| """CAN bus protocol""" +//| +//| def __init__(self, +//| tx: microcontroller.Pin, +//| rx: microcontroller.Pin, +//| *, +//| baudrate: int = 250000, +//| loopback: bool = False, +//| silent: bool = False, +//| auto_restart: bool = False, +//| ): +//| """A common shared-bus protocol. The rx and tx pins are generally +//| connected to a transceiver which controls the H and L pins on a +//| shared bus. +//| +//| :param ~microcontroller.Pin rx: the pin to receive with +//| :param ~microcontroller.Pin tx: the pin to transmit with +//| :param int baudrate: The bit rate of the bus in Hz. All devices on the bus must agree on this value. +//| :param bool loopback: When True the ``rx`` pin's value is ignored, and the device receives the packets it sends. +//| :param bool silent: When True the ``tx`` pin is always driven to the high logic level. This mode can be used to "sniff" a CAN bus without interfering. +//| :param bool auto_restart: If True, will restart communications after entering bus-off state +//| """ +//| ... +//| +STATIC mp_obj_t canio_can_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_rx, ARG_tx, ARG_baudrate, ARG_loopback, ARG_silent, ARG_auto_restart, NUM_ARGS }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_tx, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_rx, MP_ARG_OBJ | MP_ARG_REQUIRED }, + { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 250000} }, + { MP_QSTR_loopback, MP_ARG_BOOL, {.u_bool = false} }, + { MP_QSTR_silent, MP_ARG_BOOL, {.u_bool = false} }, + { MP_QSTR_auto_restart, MP_ARG_BOOL, {.u_bool = false} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); + + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mcu_pin_obj_t *rx_pin = validate_obj_is_free_pin_or_none(args[ARG_rx].u_obj); + mcu_pin_obj_t *tx_pin = validate_obj_is_free_pin_or_none(args[ARG_tx].u_obj); + if (!rx_pin && !tx_pin) { + mp_raise_ValueError(translate("tx and rx cannot both be None")); + } + + canio_can_obj_t *self = m_new_obj(canio_can_obj_t); + self->base.type = &canio_can_type; + common_hal_canio_can_construct(self, tx_pin, rx_pin, args[ARG_baudrate].u_int, args[ARG_loopback].u_bool, args[ARG_silent].u_bool); + + common_hal_canio_can_auto_restart_set(self, args[ARG_auto_restart].u_bool); + + return MP_OBJ_FROM_PTR(self); +} + + +//| auto_restart: bool +//| """If True, will restart communications after entering bus-off state""" +//| +STATIC mp_obj_t canio_can_auto_restart_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return mp_obj_new_bool(common_hal_canio_can_auto_restart_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_auto_restart_get_obj, canio_can_auto_restart_get); + +STATIC mp_obj_t canio_can_auto_restart_set(mp_obj_t self_in, mp_obj_t flag_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + common_hal_canio_can_auto_restart_set(self, mp_obj_is_true(flag_in)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(canio_can_auto_restart_set_obj, canio_can_auto_restart_set); + +STATIC const mp_obj_property_t canio_can_auto_restart_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_auto_restart_get_obj, + (mp_obj_t)&canio_can_auto_restart_set_obj, + (mp_obj_t)mp_const_none}, +}; + + +//| baudrate: int +//| """The baud rate (read-only)""" +//| +STATIC mp_obj_t canio_can_baudrate_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_baudrate_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_baudrate_get_obj, canio_can_baudrate_get); + +STATIC const mp_obj_property_t canio_can_baudrate_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_baudrate_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + +//| transmit_error_count: int +//| """The number of transmit errors (read-only). Increased for a detected transmission error, decreased for successful transmission. Limited to the range from 0 to 255 inclusive. Also called TEC.""" +//| +STATIC mp_obj_t canio_can_transmit_error_count_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_transmit_error_count_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_transmit_error_count_get_obj, canio_can_transmit_error_count_get); + +STATIC const mp_obj_property_t canio_can_transmit_error_count_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_transmit_error_count_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + +//| receive_error_count: int +//| """The number of receive errors (read-only). Increased for a detected reception error, decreased for successful reception. Limited to the range from 0 to 255 inclusive. Also called REC.""" +//| +STATIC mp_obj_t canio_can_receive_error_count_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_receive_error_count_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_receive_error_count_get_obj, canio_can_receive_error_count_get); + +STATIC const mp_obj_property_t canio_can_receive_error_count_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_receive_error_count_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + +//| error_warning_state_count: int +//| """The number of times the controller enterted the Error Warning state (read-only). This number wraps around to 0 after an implementation-defined number of errors.""" +//| +STATIC mp_obj_t canio_can_error_warning_state_count_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_error_warning_state_count_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_error_warning_state_count_get_obj, canio_can_error_warning_state_count_get); + +STATIC const mp_obj_property_t canio_can_error_warning_state_count_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_error_warning_state_count_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + +//| error_passive_state_count: int +//| """The number of times the controller enterted the Error Passive state (read-only). This number wraps around to 0 after an implementation-defined number of errors.""" +//| +STATIC mp_obj_t canio_can_error_passive_state_count_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_error_passive_state_count_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_error_passive_state_count_get_obj, canio_can_error_passive_state_count_get); + +STATIC const mp_obj_property_t canio_can_error_passive_state_count_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_error_passive_state_count_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + +//| bus_off_state_count: int +//| """The number of times the controller enterted the Bus Off state (read-only). This number wraps around to 0 after an implementation-defined number of errors.""" +//| +STATIC mp_obj_t canio_can_bus_off_state_count_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_bus_off_state_count_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_bus_off_state_count_get_obj, canio_can_bus_off_state_count_get); + +STATIC const mp_obj_property_t canio_can_bus_off_state_count_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_bus_off_state_count_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + +//| state: State +//| """The current state of the bus.""" +STATIC mp_obj_t canio_can_state_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return cp_enum_find(&canio_bus_state_type, common_hal_canio_can_state_get(self)); +} + +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_state_get_obj, canio_can_state_get); + +STATIC const mp_obj_property_t canio_can_state_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_state_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + + +//| def restart(self) -> None: +//| """If the device is in the bus off state, restart it.""" +//| ... +//| +STATIC mp_obj_t canio_can_restart(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + common_hal_canio_can_restart(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_can_restart_obj, canio_can_restart); + +//| def listen(self, match: Optional[Sequence[Match]]=None, *, timeout: float=10) -> Listener: +//| """Start receiving messages that match any one of the filters. +//| +//| Creating a listener is an expensive operation and can interfere with reception of messages by other listeners. +//| +//| There is an implementation-defined maximum number of listeners and limit to the complexity of the filters. +//| +//| If the hardware cannot support all the requested matches, a ValueError is raised. Note that generally there are some number of hardware filters shared among all fifos. +//| +//| A message can be received by at most one Listener. If more than one listener matches a message, it is undefined which one actually receives it. +//| +//| An empty filter list causes all messages to be accepted. +//| +//| Timeout dictates how long readinto, read and next() will block.""" +//| ... +//| +STATIC mp_obj_t canio_can_listen(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + common_hal_canio_can_check_for_deinit(self); + + enum { ARG_match, ARG_timeout, NUM_ARGS }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_match, MP_ARG_OBJ, {.u_obj = 0} }, + { MP_QSTR_timeout, MP_ARG_OBJ, {.u_obj = 0} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); + + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + size_t nmatch = 0; + mp_obj_t *match_objects = NULL; + + if (args[ARG_match].u_obj) { + mp_obj_get_array(args[ARG_match].u_obj, &nmatch, &match_objects); + } + + canio_match_obj_t *matches[nmatch]; + for (size_t i=0; iname); + } + matches[i] = MP_OBJ_TO_PTR(match_objects[i]); + } + + float timeout = args[ARG_timeout].u_obj ? mp_obj_get_float(args[ARG_timeout].u_obj) : 10.0f; + canio_listener_obj_t *listener = m_new_obj(canio_listener_obj_t); + listener->base.type = &canio_listener_type; + common_hal_canio_listener_construct(listener, self, nmatch, matches, timeout); + return listener; +} +MP_DEFINE_CONST_FUN_OBJ_KW(canio_can_listen_obj, 1, canio_can_listen); + +//| loopback: bool +//| """True if the device was created in loopback mode, False otherwise""" +//| +STATIC mp_obj_t canio_can_loopback_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return mp_obj_new_bool(common_hal_canio_can_loopback_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_loopback_get_obj, canio_can_loopback_get); + +STATIC const mp_obj_property_t canio_can_loopback_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_loopback_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + + +//| def send(message: Message) -> None: +//| """Send a message on the bus with the given data and id. +//| If the message could not be sent due to a full fifo or a bus error condition, RuntimeError is raised. +//| """ +//| ... +//| +STATIC mp_obj_t canio_can_send(mp_obj_t self_in, mp_obj_t message_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + mp_obj_type_t *message_type = mp_obj_get_type(message_in); + if (message_type != &canio_message_type) { + mp_raise_TypeError_varg(translate("expected '%q' but got '%q'"), MP_QSTR_Message, message_type->name); + } + + canio_message_obj_t *message = message_in; + common_hal_canio_can_send(self, message); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(canio_can_send_obj, canio_can_send); + +//| silent: bool +//| """True if the device was created in silent mode, False otherwise""" +//| +STATIC mp_obj_t canio_can_silent_get(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return mp_obj_new_bool(common_hal_canio_can_silent_get(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_can_silent_get_obj, canio_can_silent_get); + +STATIC const mp_obj_property_t canio_can_silent_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_can_silent_get_obj, + (mp_obj_t)mp_const_none, + (mp_obj_t)mp_const_none}, +}; + + +//| def deinit(self) -> None: +//| """Deinitialize this object, freeing its hardware resources""" +//| ... +//| +STATIC mp_obj_t canio_can_deinit(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_can_deinit_obj, canio_can_deinit); + +//| def __enter__(self) -> CAN: +//| """Returns self, to allow the object to be used in a `with` statement for resource control""" +//| ... +//| +STATIC mp_obj_t canio_can_enter(mp_obj_t self_in) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_can_check_for_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_can_enter_obj, canio_can_enter); + +//| def __exit__(self, unused1, unused2, unused3) -> None: +//| """Calls deinit()""" +//| ... +STATIC mp_obj_t canio_can_exit(size_t num_args, const mp_obj_t args[]) { + canio_can_obj_t *self = MP_OBJ_TO_PTR(args[0]); + common_hal_canio_can_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(canio_can_exit_obj, 4, 4, canio_can_exit); + +STATIC const mp_rom_map_elem_t canio_can_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&canio_can_enter_obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&canio_can_exit_obj) }, + { MP_ROM_QSTR(MP_QSTR_auto_restart), MP_ROM_PTR(&canio_can_auto_restart_obj) }, + { MP_ROM_QSTR(MP_QSTR_baudrate), MP_ROM_PTR(&canio_can_baudrate_obj) }, + { MP_ROM_QSTR(MP_QSTR_bus_off_state_count), MP_ROM_PTR(&canio_can_bus_off_state_count_obj) }, + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&canio_can_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR_error_passive_state_count), MP_ROM_PTR(&canio_can_error_passive_state_count_obj) }, + { MP_ROM_QSTR(MP_QSTR_error_warning_state_count), MP_ROM_PTR(&canio_can_error_warning_state_count_obj) }, + { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&canio_can_listen_obj) }, + { MP_ROM_QSTR(MP_QSTR_loopback), MP_ROM_PTR(&canio_can_loopback_obj) }, + { MP_ROM_QSTR(MP_QSTR_receive_error_count), MP_ROM_PTR(&canio_can_receive_error_count_obj) }, + { MP_ROM_QSTR(MP_QSTR_restart), MP_ROM_PTR(&canio_can_restart_obj) }, + { MP_ROM_QSTR(MP_QSTR_send), MP_ROM_PTR(&canio_can_send_obj) }, + { MP_ROM_QSTR(MP_QSTR_silent), MP_ROM_PTR(&canio_can_silent_obj) }, + { MP_ROM_QSTR(MP_QSTR_state), MP_ROM_PTR(&canio_can_state_obj) }, + { MP_ROM_QSTR(MP_QSTR_transmit_error_count), MP_ROM_PTR(&canio_can_transmit_error_count_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(canio_can_locals_dict, canio_can_locals_dict_table); + +const mp_obj_type_t canio_can_type = { + { &mp_type_type }, + .name = MP_QSTR_CAN, + .make_new = canio_can_make_new, + .locals_dict = (mp_obj_t)&canio_can_locals_dict, +}; diff --git a/shared-bindings/canio/CAN.h b/shared-bindings/canio/CAN.h new file mode 100644 index 000000000..66c972c28 --- /dev/null +++ b/shared-bindings/canio/CAN.h @@ -0,0 +1,54 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/canio/Message.h" + +extern const mp_obj_type_t canio_can_type; + +typedef struct canio_can_obj canio_can_obj_t; + +void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent); +bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self); +bool common_hal_canio_can_deinited(canio_can_obj_t *self); +int common_hal_canio_can_baudrate_get(canio_can_obj_t *self); +int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self); +int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self); +int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self); +bool common_hal_canio_can_loopback_get(canio_can_obj_t *self); +int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self); +canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self); +bool common_hal_canio_can_silent_get(canio_can_obj_t *self); +int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self); +void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool auto_restart); +void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self); +void common_hal_canio_can_deinit(canio_can_obj_t *self); +void common_hal_canio_can_restart(canio_can_obj_t *self); +void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *message); +void common_hal_canio_reset(void); diff --git a/shared-bindings/canio/Listener.c b/shared-bindings/canio/Listener.c new file mode 100644 index 000000000..0b50e5835 --- /dev/null +++ b/shared-bindings/canio/Listener.c @@ -0,0 +1,193 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/canio/Listener.h" +#include "shared-bindings/canio/Message.h" +#include "common-hal/canio/Listener.h" + +#include "py/runtime.h" +#include "py/objproperty.h" + +//| class Listener: +//| """Listens for CAN message +//| +//| _canio.Listener is not constructed directly, but instead by calling the +//| Listen method of a _canio.CAN object.""" +//| + +//| def read(self) -> Optional[Message]: +//| """Reads a message, after waiting up to self.timeout seconds +//| +//| If no message is received in time, None is returned. Otherwise, +//| a Message is returned.""" +//| ... +//| +STATIC mp_obj_t canio_listener_read(mp_obj_t self_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_check_for_deinit(self); + + canio_message_obj_t *message = m_new_obj(canio_message_obj_t); + self->base.type = &canio_message_type; + + if (common_hal_canio_listener_readinto(self, message)) { + return message; + } else { + m_free(message); // message did not escape into vm + } + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_read_obj, canio_listener_read); + +//| def readinto(self, message: Message) -> bool: +//| """Returns True (and modifies message) if a message was received +//| before ``timeout`` seconds elapsed, False otherwise.""" +//| ... +//| +STATIC mp_obj_t canio_listener_readinto(mp_obj_t self_in, mp_obj_t message) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + mp_obj_type_t *type = mp_obj_get_type(message); + if (type != &canio_message_type) { + mp_raise_TypeError_varg(translate("expected '%q' but got '%q'"), MP_QSTR_Message, type->name); + } + common_hal_canio_listener_check_for_deinit(self); + return mp_obj_new_bool(common_hal_canio_listener_readinto(self, message)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(canio_listener_readinto_obj, canio_listener_readinto); + +//| def in_waiting(self) -> int: +//| """Returns the number of messages waiting""" +//| ... +//| +STATIC mp_obj_t canio_listener_in_waiting(mp_obj_t self_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_listener_in_waiting(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_in_waiting_obj, canio_listener_in_waiting); + +//| def __iter__(self): +//| """Returns self, unless the object is deinitialized""" +//| ... +//| +STATIC mp_obj_t canio_listener_iter(mp_obj_t self_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_check_for_deinit(self); + return self; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_iter_obj, canio_listener_iter); + +//| def __next__(self): +//| """Reads a message, after waiting up to self.timeout seconds +//| +//| If no message is received in time, raises StopIteration. Otherwise, +//| a Message is returned.""" +//| ... +//| +STATIC mp_obj_t canio_listener_next(mp_obj_t self_in) { + mp_obj_t result = canio_listener_read(self_in); + if (result == mp_const_none) { + return MP_OBJ_STOP_ITERATION; + } + return result; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_next_obj, canio_listener_next); + +//| def deinit(self) -> None: +//| """Deinitialize this object, freeing its hardware resources""" +//| ... +//| +STATIC mp_obj_t canio_listener_deinit(mp_obj_t self_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_deinit_obj, canio_listener_deinit); + +//| def __enter__(self) -> CAN: +//| """Returns self, to allow the object to be used in a `with` statement for resource control""" +//| ... +//| +STATIC mp_obj_t canio_listener_enter(mp_obj_t self_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_check_for_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_enter_obj, canio_listener_enter); + +//| def __exit__(self, unused1, unused2, unused3) -> None: +//| """Calls deinit()""" +//| ... +STATIC mp_obj_t canio_listener_exit(size_t num_args, const mp_obj_t args[]) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(args[0]); + common_hal_canio_listener_deinit(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(canio_listener_exit_obj, 4, 4, canio_listener_exit); + + +//| timeout : float +STATIC mp_obj_t canio_listener_timeout_get(mp_obj_t self_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_check_for_deinit(self); + return mp_obj_new_float(common_hal_canio_listener_get_timeout(self)); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_timeout_get_obj, canio_listener_timeout_get); + +STATIC mp_obj_t canio_listener_timeout_set(mp_obj_t self_in, mp_obj_t timeout_in) { + canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_canio_listener_check_for_deinit(self); + common_hal_canio_listener_set_timeout(self, mp_obj_get_float(timeout_in)); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(canio_listener_timeout_set_obj, canio_listener_timeout_set); + +STATIC const mp_obj_property_t canio_listener_timeout_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_listener_timeout_get_obj, + (mp_obj_t)&canio_listener_timeout_set_obj, + (mp_obj_t)mp_const_none}, +}; + + + +STATIC const mp_rom_map_elem_t canio_listener_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&canio_listener_enter_obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&canio_listener_exit_obj) }, + { MP_ROM_QSTR(MP_QSTR___iter__), MP_ROM_PTR(&canio_listener_iter_obj) }, + { MP_ROM_QSTR(MP_QSTR___next__), MP_ROM_PTR(&canio_listener_next_obj) }, + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&canio_listener_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR_in_waiting), MP_ROM_PTR(&canio_listener_in_waiting_obj) }, + { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&canio_listener_read_obj) }, + { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&canio_listener_readinto_obj) }, + { MP_ROM_QSTR(MP_QSTR_timeout), MP_ROM_PTR(&canio_listener_timeout_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(canio_listener_locals_dict, canio_listener_locals_dict_table); + +const mp_obj_type_t canio_listener_type = { + { &mp_type_type }, + .name = MP_QSTR_Listener, + .locals_dict = (mp_obj_dict_t*)&canio_listener_locals_dict, +}; diff --git a/shared-bindings/canio/Listener.h b/shared-bindings/canio/Listener.h new file mode 100644 index 000000000..eaa3490df --- /dev/null +++ b/shared-bindings/canio/Listener.h @@ -0,0 +1,31 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" + +extern const mp_obj_type_t canio_listener_type; diff --git a/shared-bindings/canio/Match.c b/shared-bindings/canio/Match.c new file mode 100644 index 000000000..ff5d028fa --- /dev/null +++ b/shared-bindings/canio/Match.c @@ -0,0 +1,139 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/canio/Match.h" + +#include "py/objproperty.h" +#include "py/runtime.h" + +//| class Match: +//| """Describe CAN bus messages to match""" +//| +//| +//| def __init__(self, address: int, *, mask: int = 0, extended: bool = False): +//| """Construct a Match with the given properties. +//| +//| If mask is nonzero, then the filter is for any sender which matches all +//| the nonzero bits in mask. Otherwise, it matches exactly the given address. +//| If extended is true then only extended addresses are matched, otherwise +//| only standard addresses are matched.""" +//| + +STATIC mp_obj_t canio_match_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_address, ARG_mask, ARG_extended, NUM_ARGS }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_address, MP_ARG_INT | MP_ARG_REQUIRED }, + { MP_QSTR_mask, MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_extended, MP_ARG_BOOL, {.u_bool = false} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); + + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + int address_bits = args[ARG_extended].u_bool ? 0x1fffffff : 0x7ff; + int address = args[ARG_address].u_int; + int mask = args[ARG_mask].u_int; + + if (address & ~address_bits) { + mp_raise_ValueError_varg(translate("%q out of range"), MP_QSTR_address); + } + + if (mask & ~address_bits) { + mp_raise_ValueError_varg(translate("%q out of range"), MP_QSTR_mask); + } + + canio_match_obj_t *self = m_new_obj(canio_match_obj_t); + self->base.type = &canio_match_type; + common_hal_canio_match_construct(self, args[ARG_address].u_int, args[ARG_mask].u_int, args[ARG_extended].u_bool); + return self; +} + +//| address: int +//| """The address to match""" +//| + +STATIC mp_obj_t canio_match_address_get(mp_obj_t self_in) { + canio_match_obj_t *self = self_in; + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_match_get_address(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_match_address_get_obj, canio_match_address_get); + +const mp_obj_property_t canio_match_address_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_match_address_get_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| +//| mask: int +//| """The optional mask of addresses to match""" +//| + +STATIC mp_obj_t canio_match_mask_get(mp_obj_t self_in) { + canio_match_obj_t *self = self_in; + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_match_get_mask(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_match_mask_get_obj, canio_match_mask_get); + +const mp_obj_property_t canio_match_mask_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_match_mask_get_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| extended: bool +//| """True to match extended addresses, False to match standard addresses""" +//| + +STATIC mp_obj_t canio_match_extended_get(mp_obj_t self_in) { + canio_match_obj_t *self = self_in; + return mp_obj_new_bool(common_hal_canio_match_get_extended(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_match_extended_get_obj, canio_match_extended_get); + +const mp_obj_property_t canio_match_extended_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_match_extended_get_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +STATIC const mp_rom_map_elem_t canio_match_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_address), MP_ROM_PTR(&canio_match_address_obj) }, + { MP_ROM_QSTR(MP_QSTR_mask), MP_ROM_PTR(&canio_match_mask_obj) }, + { MP_ROM_QSTR(MP_QSTR_extended), MP_ROM_PTR(&canio_match_extended_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(canio_match_locals_dict, canio_match_locals_dict_table); + +const mp_obj_type_t canio_match_type = { + { &mp_type_type }, + .name = MP_QSTR_Match, + .make_new = canio_match_make_new, + .locals_dict = (mp_obj_dict_t*)&canio_match_locals_dict, +}; diff --git a/shared-bindings/canio/Match.h b/shared-bindings/canio/Match.h new file mode 100644 index 000000000..88996d730 --- /dev/null +++ b/shared-bindings/canio/Match.h @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" +#include "shared-module/canio/Match.h" + +extern const mp_obj_type_t canio_match_type; + +void common_hal_canio_match_construct(canio_match_obj_t *self, int address, int mask, bool extended); +int common_hal_canio_match_get_address(const canio_match_obj_t *self); +int common_hal_canio_match_get_mask(const canio_match_obj_t *self); +bool common_hal_canio_match_get_extended(const canio_match_obj_t *self); diff --git a/shared-bindings/canio/Message.c b/shared-bindings/canio/Message.c new file mode 100644 index 000000000..11de6ded9 --- /dev/null +++ b/shared-bindings/canio/Message.c @@ -0,0 +1,212 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/canio/Message.h" + +#include "py/obj.h" +#include "py/objproperty.h" +#include "py/runtime.h" + +//| class Message: +//| def __init__(self, id: int=0, data: Optional[bytes] = None, *, size: Optional[int] = None, rtr: bool = False, extended: bool = False): +//| """Construct a Message to use with a CAN bus. Provide arguments to create a message to send. Otherwise, use Listener.readinto() to read a message. +//| +//| :param int id: The numeric ID of the message +//| :param bytes data: The content of the message +//| :param int size: The amount of data requested, for an rtr +//| :param bool rtr: True if the message represents an rtr (Remote Transmission Request) +//| :param bool extended: True if the message has an extended identifier, False if it has a standard identifier +//| +//| In CAN, messages can have a size from 0 to 8 bytes. +//| +//| For a non-rtr message, specify `data`. For an rtr-message, specify either `data` (a dummy buffer of the requested size) or `size`. +//| """ +//| ... +//| +STATIC mp_obj_t canio_message_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_id, ARG_data, ARG_size, ARG_rtr, ARG_extended, NUM_ARGS }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_id, MP_ARG_INT, {.u_obj = 0} }, + { MP_QSTR_data, MP_ARG_OBJ, {.u_obj = 0} }, + { MP_QSTR_size, MP_ARG_INT, {.u_int = -1} }, + { MP_QSTR_rtr, MP_ARG_BOOL, {.u_bool = false} }, + { MP_QSTR_extended, MP_ARG_BOOL, {.u_bool = false} }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); + + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + bool rtr = args[ARG_rtr].u_bool; + bool extended = args[ARG_extended].u_bool; + size_t size = (size_t)args[ARG_size].u_int; + bool specified_size = (size != (size_t)-1); + bool specified_data = (args[ARG_data].u_obj != NULL); + + if (specified_size && specified_data) { + mp_raise_TypeError(translate("specify size or data, but not both")); + } + + mp_buffer_info_t data; + if (specified_data) { + mp_get_buffer_raise(args[ARG_data].u_obj, &data, MP_BUFFER_READ); + } else if (specified_size) { + data.buf = 0; + data.len = size; + } else { + data.buf = 0; + data.len = 0; + } + + if (data.len > 8) { + mp_raise_ValueError(translate("Messages limited to 8 bytes")); + } + + canio_message_obj_t *self = m_new_obj(canio_message_obj_t); + self->base.type = &canio_message_type; + common_hal_canio_message_construct(self, args[ARG_id].u_int, data.buf, data.len, rtr, extended); + return self; +} + +//| id: int +//| """The numeric ID of the message""" +//| +STATIC mp_obj_t canio_message_id_get(const mp_obj_t self_in) { + canio_message_obj_t *self = self_in; + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_message_get_id(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_message_id_get_obj, canio_message_id_get); + +STATIC mp_obj_t canio_message_id_set(const mp_obj_t self_in, const mp_obj_t id) { + canio_message_obj_t *self = self_in; + common_hal_canio_message_set_id(self, mp_obj_get_int(id)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(canio_message_id_set_obj, canio_message_id_set); + +STATIC const mp_obj_property_t canio_message_id_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_message_id_get_obj, + (mp_obj_t)&canio_message_id_set_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| data: bytes +//| """The content of the message, or dummy content in the case of an rtr. +//| +//| Assigning to data also sets the length and clears the rtr flag.""" +//| +STATIC mp_obj_t canio_message_data_get(const mp_obj_t self_in) { + canio_message_obj_t *self = self_in; + return mp_obj_new_bytes((const byte*)common_hal_canio_message_get_data(self), common_hal_canio_message_get_size(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_message_data_get_obj, canio_message_data_get); + +STATIC mp_obj_t canio_message_data_set(const mp_obj_t self_in, const mp_obj_t data_in) { + canio_message_obj_t *self = self_in; + mp_buffer_info_t data; + mp_get_buffer_raise(data_in, &data, MP_BUFFER_READ); + if (data.len > 8) { + mp_raise_ValueError(translate("Messages limited to 8 bytes")); + } + common_hal_canio_message_set_data(self, data.buf, data.len); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(canio_message_data_set_obj, canio_message_data_set); + + +STATIC const mp_obj_property_t canio_message_data_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_message_data_get_obj, + (mp_obj_t)&canio_message_data_set_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +//| extended: bool +//| """True if the message represents a remote transmission request (RTR)""" +//| +STATIC mp_obj_t canio_message_extended_get(const mp_obj_t self_in) { + canio_message_obj_t *self = self_in; + return mp_obj_new_bool(common_hal_canio_message_get_extended(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_message_extended_get_obj, canio_message_extended_get); + +STATIC mp_obj_t canio_message_extended_set(const mp_obj_t self_in, const mp_obj_t extended) { + canio_message_obj_t *self = self_in; + common_hal_canio_message_set_extended(self, mp_obj_is_true(extended)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(canio_message_extended_set_obj, canio_message_extended_set); + + +STATIC const mp_obj_property_t canio_message_extended_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_message_extended_get_obj, + (mp_obj_t)&canio_message_extended_set_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +//| rtr: bool +//| """True if the message represents a remote transmission request (RTR). Setting rtr to true zeros out data""" +//| +STATIC mp_obj_t canio_message_rtr_get(const mp_obj_t self_in) { + canio_message_obj_t *self = self_in; + return mp_obj_new_bool(common_hal_canio_message_get_rtr(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(canio_message_rtr_get_obj, canio_message_rtr_get); + +STATIC mp_obj_t canio_message_rtr_set(const mp_obj_t self_in, const mp_obj_t rtr) { + canio_message_obj_t *self = self_in; + common_hal_canio_message_set_rtr(self, mp_obj_is_true(rtr)); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(canio_message_rtr_set_obj, canio_message_rtr_set); + + +STATIC const mp_obj_property_t canio_message_rtr_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&canio_message_rtr_get_obj, + (mp_obj_t)&canio_message_rtr_set_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + + +STATIC const mp_rom_map_elem_t canio_message_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_id), MP_ROM_PTR(&canio_message_id_obj) }, + { MP_ROM_QSTR(MP_QSTR_data), MP_ROM_PTR(&canio_message_data_obj) }, + { MP_ROM_QSTR(MP_QSTR_rtr), MP_ROM_PTR(&canio_message_rtr_obj) }, + { MP_ROM_QSTR(MP_QSTR_extended), MP_ROM_PTR(&canio_message_extended_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(canio_message_locals_dict, canio_message_locals_dict_table); + +const mp_obj_type_t canio_message_type = { + { &mp_type_type }, + .name = MP_QSTR_Message, + .make_new = canio_message_make_new, + .locals_dict = (mp_obj_t)&canio_message_locals_dict, +}; diff --git a/shared-bindings/canio/Message.h b/shared-bindings/canio/Message.h new file mode 100644 index 000000000..34b632e84 --- /dev/null +++ b/shared-bindings/canio/Message.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" +#include "shared-module/canio/Message.h" + +extern const mp_obj_type_t canio_message_type; + +void common_hal_canio_message_construct(canio_message_obj_t *self, int id, void *data, size_t size, bool rtr, bool extended); +const void *common_hal_canio_message_get_data(const canio_message_obj_t *self); +void common_hal_canio_message_set_data(canio_message_obj_t *self, const void *data, size_t size); +bool common_hal_canio_message_get_extended(const canio_message_obj_t *self); +void common_hal_canio_message_set_extended(canio_message_obj_t *self, bool extended); +int common_hal_canio_message_get_id(const canio_message_obj_t *self); +void common_hal_canio_message_set_id(canio_message_obj_t *self, int id); +bool common_hal_canio_message_get_rtr(const canio_message_obj_t *self); +void common_hal_canio_message_set_rtr(canio_message_obj_t *self, bool rtr); +size_t common_hal_canio_message_get_size(const canio_message_obj_t *self); +void common_hal_canio_message_set_size(canio_message_obj_t *self, size_t size); diff --git a/shared-bindings/canio/__init__.c b/shared-bindings/canio/__init__.c new file mode 100644 index 000000000..bc191913d --- /dev/null +++ b/shared-bindings/canio/__init__.c @@ -0,0 +1,124 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//| """CAN bus access +//| +//| The `_canio` module contains low level classes to support the CAN bus +//| protocol. +//| +//| CAN and Listener classes change hardware state and should be deinitialized when they +//| are no longer needed if the program continues after use. To do so, either +//| call :py:meth:`!deinit` or use a context manager. See +//| :ref:`lifetime-and-contextmanagers` for more info. +//| +//| For example:: +//| +//| import _canio +//| from board import * +//| +//| can = _canio.CAN(board.CAN_RX, board.CAN_TX, baudrate=1000000) +//| message = _canio.Message(id=0x0408, data="adafruit" +//| can.write(message)) +//| can.deinit() +//| +//| This example will write the data 'adafruit' onto the CAN bus to any +//| device listening for message id 0x0408. +//| +//| A CAN bus involves a transceiver, which is often a separate chip with a "standby" pin. +//| If your board has a CAN_STANDBY pin, ensure to set it to an output with the value False +//| to enable the transceiver. +//| +//| Other implementations of the CAN device may exist (for instance, attached +//| via an SPI bus). If so their constructor arguments may differ, but +//| otherwise we encourage implementors to follow the API that the core uses. +//| """ +//| + +#include "py/obj.h" +#include "py/enum.h" + +#include "shared-bindings/canio/__init__.h" +#include "shared-bindings/canio/CAN.h" +#include "shared-bindings/canio/Match.h" +#include "shared-bindings/canio/Message.h" +#include "shared-bindings/canio/Listener.h" + +MAKE_ENUM_VALUE(canio_bus_state_type, bus_state, ERROR_ACTIVE, BUS_STATE_ERROR_ACTIVE); +MAKE_ENUM_VALUE(canio_bus_state_type, bus_state, ERROR_PASSIVE, BUS_STATE_ERROR_PASSIVE); +MAKE_ENUM_VALUE(canio_bus_state_type, bus_state, ERROR_WARNING, BUS_STATE_ERROR_WARNING); +MAKE_ENUM_VALUE(canio_bus_state_type, bus_state, BUS_OFF, BUS_STATE_OFF); + +//| class BusState: +//| """The state of the CAN bus""" +//| +//| ERROR_ACTIVE: object +//| """The bus is in the normal (active) state""" +//| +//| ERROR_WARNING: object +//| """The bus is in the normal (active) state, but a moderate number of errors have occurred recently. +//| +//| NOTE: Not all implementations may use ERROR_WARNING. Do not rely on seeing ERROR_WARNING before ERROR_PASSIVE.""" +//| +//| ERROR_PASSIVE: object +//| """The bus is in the passive state due to the number of errors that have occurred recently. +//| +//| This device will acknowledge packets it receives, but cannot transmit messages. +//| If additional errors occur, this device may progress to BUS_OFF. +//| If it successfully acknowledges other packets on the bus, it can return to ERROR_WARNING or ERROR_ACTIVE and transmit packets. +//| """ +//| +//| BUS_OFF: object +//| """The bus has turned off due to the number of errors that have +//| occurred recently. It must be restarted before it will send or receive +//| packets. This device will neither send or acknowledge packets on the bus.""" +//| +MAKE_ENUM_MAP(canio_bus_state) { + MAKE_ENUM_MAP_ENTRY(bus_state, ERROR_ACTIVE), + MAKE_ENUM_MAP_ENTRY(bus_state, ERROR_PASSIVE), + MAKE_ENUM_MAP_ENTRY(bus_state, ERROR_WARNING), + MAKE_ENUM_MAP_ENTRY(bus_state, BUS_OFF), +}; +STATIC MP_DEFINE_CONST_DICT(canio_bus_state_locals_dict, canio_bus_state_locals_table); + +MAKE_PRINTER(_canio, canio_bus_state); + +MAKE_ENUM_TYPE(_canio, BusState, canio_bus_state); + +STATIC const mp_rom_map_elem_t canio_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_BusState), MP_ROM_PTR(&canio_bus_state_type) }, + { MP_ROM_QSTR(MP_QSTR_CAN), MP_ROM_PTR(&canio_can_type) }, + { MP_ROM_QSTR(MP_QSTR_Listener), MP_ROM_PTR(&canio_listener_type) }, + { MP_ROM_QSTR(MP_QSTR_Match), MP_ROM_PTR(&canio_match_type) }, + { MP_ROM_QSTR(MP_QSTR_Message), MP_ROM_PTR(&canio_message_type) }, + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR__canio) }, +}; + +STATIC MP_DEFINE_CONST_DICT(canio_module_globals, canio_module_globals_table); + +const mp_obj_module_t canio_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&canio_module_globals, +}; diff --git a/shared-bindings/canio/__init__.h b/shared-bindings/canio/__init__.h new file mode 100644 index 000000000..e24eba92c --- /dev/null +++ b/shared-bindings/canio/__init__.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +typedef enum { + BUS_STATE_ERROR_ACTIVE, BUS_STATE_ERROR_PASSIVE, BUS_STATE_ERROR_WARNING, BUS_STATE_OFF +} canio_bus_state_t; + +extern const mp_obj_type_t canio_bus_state_type; diff --git a/shared-module/_canio/Match.c b/shared-module/_canio/Match.c deleted file mode 100644 index 3dcde18a7..000000000 --- a/shared-module/_canio/Match.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "shared-module/_canio/Match.h" - -void common_hal_canio_match_construct(canio_match_obj_t *self, int address, int mask, bool extended) { - self->address = address; - self->mask = mask; - self->extended = extended; -} - -int common_hal_canio_match_get_address(const canio_match_obj_t *self) { - return self->address; -} -int common_hal_canio_match_get_mask(const canio_match_obj_t *self) { - return self->mask; -} -bool common_hal_canio_match_get_extended(const canio_match_obj_t *self) { - return self->extended; -} diff --git a/shared-module/_canio/Match.h b/shared-module/_canio/Match.h deleted file mode 100644 index 25f047f37..000000000 --- a/shared-module/_canio/Match.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#pragma once - -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; - int address; - int mask; - bool extended; -} canio_match_obj_t; diff --git a/shared-module/_canio/Message.c b/shared-module/_canio/Message.c deleted file mode 100644 index a02bd0127..000000000 --- a/shared-module/_canio/Message.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "shared-module/_canio/Message.h" - -#include - -void common_hal_canio_message_construct(canio_message_obj_t *self, int id, void *data, size_t size, bool rtr, bool extended) -{ - self->id = id; - self->size = size; - self->rtr = rtr; - self->extended = extended; - if (data) { - memcpy(self->data, data, size); - } else { - memset(self->data, 0, size); - } -} - -int common_hal_canio_message_get_id(const canio_message_obj_t *self) -{ - return self->id; -} - -void common_hal_canio_message_set_id(canio_message_obj_t *self, int id) -{ - self->id = id; -} - - -const void *common_hal_canio_message_get_data(const canio_message_obj_t *self) -{ - return self->data; -} - -const void common_hal_canio_message_set_data(canio_message_obj_t *self, const void *data, size_t size) -{ - self->rtr = false; - self->size = size; - memcpy(self->data, data, size); -} - - -size_t common_hal_canio_message_get_size(const canio_message_obj_t *self) -{ - return self->size; -} - -void common_hal_canio_message_set_size(canio_message_obj_t *self, size_t size) -{ - memset(self->data, 0, size); - self->size = size; -} - - -bool common_hal_canio_message_get_rtr(const canio_message_obj_t *self) -{ - return self->rtr; -} - -void common_hal_canio_message_set_rtr(canio_message_obj_t *self, bool rtr) -{ - self->rtr = rtr; - if (rtr) { - memset(self->data, 0, self->size); - } -} - -bool common_hal_canio_message_get_extended(const canio_message_obj_t *self) -{ - return self->extended; -} - -void common_hal_canio_message_set_extended(canio_message_obj_t *self, bool extended) -{ - self->extended = extended; -} diff --git a/shared-module/_canio/Message.h b/shared-module/_canio/Message.h deleted file mode 100644 index b99c5c48e..000000000 --- a/shared-module/_canio/Message.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Jeff Epler for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#pragma once - -#include "py/obj.h" - -typedef struct { - mp_obj_base_t base; - int id; - uint8_t data[8]; - size_t size:4; - bool rtr:1; - bool extended:1; -} canio_message_obj_t; diff --git a/shared-module/canio/Match.c b/shared-module/canio/Match.c new file mode 100644 index 000000000..9e33b956f --- /dev/null +++ b/shared-module/canio/Match.c @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-module/canio/Match.h" + +void common_hal_canio_match_construct(canio_match_obj_t *self, int address, int mask, bool extended) { + self->address = address; + self->mask = mask; + self->extended = extended; +} + +int common_hal_canio_match_get_address(const canio_match_obj_t *self) { + return self->address; +} +int common_hal_canio_match_get_mask(const canio_match_obj_t *self) { + return self->mask; +} +bool common_hal_canio_match_get_extended(const canio_match_obj_t *self) { + return self->extended; +} diff --git a/shared-module/canio/Match.h b/shared-module/canio/Match.h new file mode 100644 index 000000000..25f047f37 --- /dev/null +++ b/shared-module/canio/Match.h @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + int address; + int mask; + bool extended; +} canio_match_obj_t; diff --git a/shared-module/canio/Message.c b/shared-module/canio/Message.c new file mode 100644 index 000000000..b8ebb7859 --- /dev/null +++ b/shared-module/canio/Message.c @@ -0,0 +1,101 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-module/canio/Message.h" + +#include + +void common_hal_canio_message_construct(canio_message_obj_t *self, int id, void *data, size_t size, bool rtr, bool extended) +{ + self->id = id; + self->size = size; + self->rtr = rtr; + self->extended = extended; + if (data) { + memcpy(self->data, data, size); + } else { + memset(self->data, 0, size); + } +} + +int common_hal_canio_message_get_id(const canio_message_obj_t *self) +{ + return self->id; +} + +void common_hal_canio_message_set_id(canio_message_obj_t *self, int id) +{ + self->id = id; +} + + +const void *common_hal_canio_message_get_data(const canio_message_obj_t *self) +{ + return self->data; +} + +const void common_hal_canio_message_set_data(canio_message_obj_t *self, const void *data, size_t size) +{ + self->rtr = false; + self->size = size; + memcpy(self->data, data, size); +} + + +size_t common_hal_canio_message_get_size(const canio_message_obj_t *self) +{ + return self->size; +} + +void common_hal_canio_message_set_size(canio_message_obj_t *self, size_t size) +{ + memset(self->data, 0, size); + self->size = size; +} + + +bool common_hal_canio_message_get_rtr(const canio_message_obj_t *self) +{ + return self->rtr; +} + +void common_hal_canio_message_set_rtr(canio_message_obj_t *self, bool rtr) +{ + self->rtr = rtr; + if (rtr) { + memset(self->data, 0, self->size); + } +} + +bool common_hal_canio_message_get_extended(const canio_message_obj_t *self) +{ + return self->extended; +} + +void common_hal_canio_message_set_extended(canio_message_obj_t *self, bool extended) +{ + self->extended = extended; +} diff --git a/shared-module/canio/Message.h b/shared-module/canio/Message.h new file mode 100644 index 000000000..b99c5c48e --- /dev/null +++ b/shared-module/canio/Message.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + int id; + uint8_t data[8]; + size_t size:4; + bool rtr:1; + bool extended:1; +} canio_message_obj_t; -- cgit v1.2.3 From 2fa269ccbc981c00eaf4f0bf6d7f5eaa52db4d08 Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Mon, 21 Sep 2020 20:56:03 -0700 Subject: Additional error handling --- ports/esp32s2/common-hal/wifi/Radio.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index 5bc69eab4..44f0fe2cf 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -160,9 +160,15 @@ mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self) { } wifi_ap_record_t ap_info; - esp_wifi_sta_get_ap_info(&ap_info); - - return MP_OBJ_NEW_SMALL_INT(ap_info.rssi); + // From esp_wifi.h, the possible return values (typos theirs): + // ESP_OK: succeed + // ESP_ERR_WIFI_CONN: The station interface don't initialized + // ESP_ERR_WIFI_NOT_CONNECT: The station is in disconnect status + if (esp_wifi_sta_get_ap_info(&ap_info) != ESP_OK){ + return mp_const_none; + } else { + return mp_obj_new_int(ap_info.rssi); + } } mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self) { -- cgit v1.2.3 From a77966a73640a8699d116e0f484199338c4477e9 Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Mon, 21 Sep 2020 21:36:46 -0700 Subject: Try to reuse/share existing objects --- ports/esp32s2/common-hal/wifi/Radio.c | 24 +++++++++--------------- ports/esp32s2/common-hal/wifi/Radio.h | 2 ++ 2 files changed, 11 insertions(+), 15 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index 44f0fe2cf..ab6177859 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -153,21 +153,18 @@ mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self) { } // Make sure the interface is in STA mode - wifi_mode_t if_mode; - esp_wifi_get_mode(&if_mode); - if (if_mode != WIFI_MODE_STA){ + if (self->sta_mode){ return mp_const_none; } - wifi_ap_record_t ap_info; // From esp_wifi.h, the possible return values (typos theirs): // ESP_OK: succeed // ESP_ERR_WIFI_CONN: The station interface don't initialized // ESP_ERR_WIFI_NOT_CONNECT: The station is in disconnect status - if (esp_wifi_sta_get_ap_info(&ap_info) != ESP_OK){ + if (esp_wifi_sta_get_ap_info(&self->ap_info) != ESP_OK){ return mp_const_none; } else { - return mp_obj_new_int(ap_info.rssi); + return mp_obj_new_int(self->ap_info.rssi); } } @@ -175,27 +172,24 @@ mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self) { if (!esp_netif_is_netif_up(self->netif)) { return mp_const_none; } - esp_netif_ip_info_t ip_info; - esp_netif_get_ip_info(self->netif, &ip_info); - return common_hal_ipaddress_new_ipv4address(ip_info.gw.addr); + esp_netif_get_ip_info(self->netif, &self->ip_info); + return common_hal_ipaddress_new_ipv4address(self->ip_info.gw.addr); } mp_obj_t common_hal_wifi_radio_get_ipv4_subnet(wifi_radio_obj_t *self) { if (!esp_netif_is_netif_up(self->netif)) { return mp_const_none; } - esp_netif_ip_info_t ip_info; - esp_netif_get_ip_info(self->netif, &ip_info); - return common_hal_ipaddress_new_ipv4address(ip_info.netmask.addr); + esp_netif_get_ip_info(self->netif, &self->ip_info); + return common_hal_ipaddress_new_ipv4address(self->ip_info.netmask.addr); } mp_obj_t common_hal_wifi_radio_get_ipv4_address(wifi_radio_obj_t *self) { if (!esp_netif_is_netif_up(self->netif)) { return mp_const_none; } - esp_netif_ip_info_t ip_info; - esp_netif_get_ip_info(self->netif, &ip_info); - return common_hal_ipaddress_new_ipv4address(ip_info.ip.addr); + esp_netif_get_ip_info(self->netif, &self->ip_info); + return common_hal_ipaddress_new_ipv4address(self->ip_info.ip.addr); } mp_int_t common_hal_wifi_radio_ping(wifi_radio_obj_t *self, mp_obj_t ip_address, mp_float_t timeout) { diff --git a/ports/esp32s2/common-hal/wifi/Radio.h b/ports/esp32s2/common-hal/wifi/Radio.h index 205aef176..ddcd9dc0d 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.h +++ b/ports/esp32s2/common-hal/wifi/Radio.h @@ -46,6 +46,8 @@ typedef struct { StaticEventGroup_t event_group; EventGroupHandle_t event_group_handle; wifi_config_t sta_config; + wifi_ap_record_t ap_info; + esp_netif_ip_info_t ip_info; esp_netif_t *netif; bool started; bool ap_mode; -- cgit v1.2.3 From add230b4da7c32c1b6fee3a328ccb8eebede42c5 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Tue, 22 Sep 2020 11:37:12 +0530 Subject: Update port.c --- ports/esp32s2/supervisor/port.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c index e52b7f376..3de63278d 100644 --- a/ports/esp32s2/supervisor/port.c +++ b/ports/esp32s2/supervisor/port.c @@ -43,6 +43,7 @@ #include "common-hal/wifi/__init__.h" #include "supervisor/memory.h" #include "supervisor/shared/tick.h" +#include "shared-bindings/rtc/__init__.h" #include "peripherals/rmt.h" #include "esp-idf/components/heap/include/esp_heap_caps.h" @@ -106,6 +107,11 @@ void reset_port(void) { spi_reset(); uart_reset(); #endif + +#if CIRCUITPY_RTC + rtc_reset(); +#endif + #if CIRCUITPY_WIFI wifi_reset(); #endif -- cgit v1.2.3 From 59580d0f2d744ac5f04600e371964aea9f79e833 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 22 Sep 2020 09:36:29 -0500 Subject: canio: Fix implementation bugs in atmel-sam --- ports/atmel-samd/common-hal/canio/CAN.c | 8 ++++---- ports/atmel-samd/common-hal/canio/Listener.c | 12 ++++++------ ports/atmel-samd/common-hal/canio/Listener.h | 2 +- ports/atmel-samd/common-hal/canio/__init__.h | 27 +++++++++++++-------------- 4 files changed, 24 insertions(+), 25 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/canio/CAN.c b/ports/atmel-samd/common-hal/canio/CAN.c index 01cc03dea..4f28698fb 100644 --- a/ports/atmel-samd/common-hal/canio/CAN.c +++ b/ports/atmel-samd/common-hal/canio/CAN.c @@ -176,7 +176,7 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mc { CAN_TXBC_Type bc = { - .bit.TBSA = (uint32_t)self->state->tx_fifo, + .bit.TBSA = (uint32_t)self->state->tx_buffer, .bit.NDTB = COMMON_HAL_CANIO_TX_FIFO_SIZE, .bit.TFQM = 0, // Messages are transmitted in the order submitted }; @@ -192,7 +192,7 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mc { CAN_GFC_Type gfc = { - .bit.RRFE = 1, + .bit.RRFE = 0, .bit.ANFS = CAN_GFC_ANFS_REJECT_Val, .bit.ANFE = CAN_GFC_ANFE_REJECT_Val, }; @@ -333,13 +333,13 @@ void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *messa maybe_auto_restart(self); // We have just one dedicated TX buffer, use it! - canio_can_fifo_t *ent = &self->state->tx_fifo[0]; + canio_can_tx_buffer_t *ent = &self->state->tx_buffer[0]; ent->txb0.bit.ESI = false; ent->txb0.bit.XTD = message->extended; ent->txb0.bit.RTR = message->rtr; if (message->extended) { - ent->txb0.bit.ID = message->id << 18; + ent->txb0.bit.ID = message->id; } else { ent->txb0.bit.ID = message->id << 18; // short addresses are left-justified } diff --git a/ports/atmel-samd/common-hal/canio/Listener.c b/ports/atmel-samd/common-hal/canio/Listener.c index bf8b3288d..02cfde9cc 100644 --- a/ports/atmel-samd/common-hal/canio/Listener.c +++ b/ports/atmel-samd/common-hal/canio/Listener.c @@ -358,15 +358,15 @@ bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_messag } while (!common_hal_canio_listener_in_waiting(self)); } int index = self->hw->RXFS.bit.F0GI; - canio_can_fifo_t *hw_message = &self->fifo[index]; - message->extended = hw_message->rxb0.bit.XTD; + canio_can_rx_fifo_t *hw_message = &self->fifo[index]; + message->extended = hw_message->rxf0.bit.XTD; if (message->extended) { - message->id = hw_message->rxb0.bit.ID; + message->id = hw_message->rxf0.bit.ID; } else { - message->id = hw_message->rxb0.bit.ID >> 18; // short addresses are left-justified + message->id = hw_message->rxf0.bit.ID >> 18; // short addresses are left-justified } - message->rtr = hw_message->rxb0.bit.RTR; - message->size = hw_message->rxb1.bit.DLC; + message->rtr = hw_message->rxf0.bit.RTR; + message->size = hw_message->rxf1.bit.DLC; if (!message->rtr) { memcpy(message->data, hw_message->data, message->size); } diff --git a/ports/atmel-samd/common-hal/canio/Listener.h b/ports/atmel-samd/common-hal/canio/Listener.h index a51a9fc37..1b81d82aa 100644 --- a/ports/atmel-samd/common-hal/canio/Listener.h +++ b/ports/atmel-samd/common-hal/canio/Listener.h @@ -38,7 +38,7 @@ typedef struct { typedef struct { mp_obj_base_t base; canio_can_obj_t *can; - canio_can_fifo_t *fifo; + canio_can_rx_fifo_t *fifo; canio_rxfifo_reg_t *hw; uint32_t timeout_ms; uint8_t fifo_idx; diff --git a/ports/atmel-samd/common-hal/canio/__init__.h b/ports/atmel-samd/common-hal/canio/__init__.h index cb491ab9e..32adc5bf9 100644 --- a/ports/atmel-samd/common-hal/canio/__init__.h +++ b/ports/atmel-samd/common-hal/canio/__init__.h @@ -42,26 +42,25 @@ typedef struct canio_listener canio_listener_t; typedef struct canio_can canio_can_t; typedef struct { - union { - CAN_RXBE_0_Type rxb0; - CAN_TXBE_0_Type txb0; - CAN_RXF0E_0_Type rxf0; - }; - union { - CAN_RXBE_1_Type rxb1; - CAN_TXBE_1_Type txb1; - CAN_RXF0E_1_Type rxf1; - }; + CAN_TXBE_0_Type txb0; + CAN_TXBE_1_Type txb1; COMPILER_ALIGNED(4) uint8_t data[COMMON_HAL_CANIO_MAX_MESSAGE_LENGTH]; -} canio_can_fifo_t; +} canio_can_tx_buffer_t; + +typedef struct { + CAN_RXF0E_0_Type rxf0; + CAN_RXF0E_1_Type rxf1; + COMPILER_ALIGNED(4) + uint8_t data[COMMON_HAL_CANIO_MAX_MESSAGE_LENGTH]; +} canio_can_rx_fifo_t; typedef uint32_t canio_can_filter_t; typedef struct { - canio_can_fifo_t tx_fifo[COMMON_HAL_CANIO_TX_FIFO_SIZE]; - canio_can_fifo_t rx0_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE]; - canio_can_fifo_t rx1_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE]; + canio_can_tx_buffer_t tx_buffer[COMMON_HAL_CANIO_TX_FIFO_SIZE]; + canio_can_rx_fifo_t rx0_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE]; + canio_can_rx_fifo_t rx1_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE]; CanMramSidfe standard_rx_filter[COMMON_HAL_CANIO_RX_FILTER_SIZE]; CanMramXifde extended_rx_filter[COMMON_HAL_CANIO_RX_FILTER_SIZE]; } canio_can_state_t; -- cgit v1.2.3 From 5384479a619b0bfbf6d3a184d43108936558869e Mon Sep 17 00:00:00 2001 From: lady ada Date: Tue, 22 Sep 2020 23:28:23 -0400 Subject: fix pins for rev C --- ports/atmel-samd/boards/qtpy_m0/board.c | 6 +++--- ports/atmel-samd/boards/qtpy_m0/mpconfigboard.h | 8 ++++---- ports/atmel-samd/boards/qtpy_m0/pins.c | 16 ++++++++-------- 3 files changed, 15 insertions(+), 15 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/qtpy_m0/board.c b/ports/atmel-samd/boards/qtpy_m0/board.c index 2add1867c..499be113f 100644 --- a/ports/atmel-samd/boards/qtpy_m0/board.c +++ b/ports/atmel-samd/boards/qtpy_m0/board.c @@ -30,9 +30,9 @@ #include "hal/include/hal_gpio.h" void board_init(void) { - gpio_set_pin_function(PIN_PA18, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(PIN_PA18, GPIO_DIRECTION_OUT); - gpio_set_pin_level(PIN_PA18, true); // Turn on neopixel by default + gpio_set_pin_function(PIN_PA15, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_direction(PIN_PA15, GPIO_DIRECTION_OUT); + gpio_set_pin_level(PIN_PA15, true); // Turn on neopixel by default } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/qtpy_m0/mpconfigboard.h b/ports/atmel-samd/boards/qtpy_m0/mpconfigboard.h index a88c1992d..713d2c03e 100644 --- a/ports/atmel-samd/boards/qtpy_m0/mpconfigboard.h +++ b/ports/atmel-samd/boards/qtpy_m0/mpconfigboard.h @@ -1,7 +1,7 @@ #define MICROPY_HW_BOARD_NAME "Adafruit QT Py M0" #define MICROPY_HW_MCU_NAME "samd21e18" -#define MICROPY_HW_NEOPIXEL (&pin_PA19) +#define MICROPY_HW_NEOPIXEL (&pin_PA18) #define MICROPY_PORT_A (0) #define MICROPY_PORT_B (0) @@ -9,9 +9,9 @@ #define IGNORE_PIN_PA00 1 #define IGNORE_PIN_PA01 1 -#define IGNORE_PIN_PA09 1 #define IGNORE_PIN_PA12 1 #define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA14 1 #define IGNORE_PIN_PA20 1 #define IGNORE_PIN_PA21 1 // USB is always used internally so skip the pin objects for it. @@ -48,8 +48,8 @@ #define DEFAULT_I2C_BUS_SDA (&pin_PA16) #define DEFAULT_SPI_BUS_SCK (&pin_PA11) -#define DEFAULT_SPI_BUS_MOSI (&pin_PA08) -#define DEFAULT_SPI_BUS_MISO (&pin_PA10) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA09) #define DEFAULT_UART_BUS_RX (&pin_PA07) #define DEFAULT_UART_BUS_TX (&pin_PA06) diff --git a/ports/atmel-samd/boards/qtpy_m0/pins.c b/ports/atmel-samd/boards/qtpy_m0/pins.c index 4ac10a7a6..636c48bff 100644 --- a/ports/atmel-samd/boards/qtpy_m0/pins.c +++ b/ports/atmel-samd/boards/qtpy_m0/pins.c @@ -31,16 +31,16 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA11) }, { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA11) }, - { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA10) }, - { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA10) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA09) }, - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA10) }, - { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA19) }, - { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_PA15) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, -- cgit v1.2.3 From 9db7625717ffee90eac0a88b8c1b0a4e68256ec1 Mon Sep 17 00:00:00 2001 From: lady ada Date: Wed, 23 Sep 2020 11:19:01 -0400 Subject: neopix is default on! --- ports/atmel-samd/boards/qtpy_m0/board.c | 1 + 1 file changed, 1 insertion(+) (limited to 'ports') diff --git a/ports/atmel-samd/boards/qtpy_m0/board.c b/ports/atmel-samd/boards/qtpy_m0/board.c index 499be113f..1a65a561f 100644 --- a/ports/atmel-samd/boards/qtpy_m0/board.c +++ b/ports/atmel-samd/boards/qtpy_m0/board.c @@ -33,6 +33,7 @@ void board_init(void) { gpio_set_pin_function(PIN_PA15, GPIO_PIN_FUNCTION_OFF); gpio_set_pin_direction(PIN_PA15, GPIO_DIRECTION_OUT); gpio_set_pin_level(PIN_PA15, true); // Turn on neopixel by default + never_reset_pin_number(PIN_PA15); } bool board_requests_safe_mode(void) { -- cgit v1.2.3 From 00517b26009d6b721145995e40725625b5152afd Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 23 Sep 2020 11:39:39 -0400 Subject: Move missing pin warning to shared-bindings --- ports/esp32s2/common-hal/busio/SPI.c | 9 --------- ports/stm/common-hal/busio/SPI.c | 9 --------- shared-bindings/busio/SPI.c | 4 ++++ 3 files changed, 4 insertions(+), 18 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/busio/SPI.c b/ports/esp32s2/common-hal/busio/SPI.c index 6e4e34474..eaafa87b7 100644 --- a/ports/esp32s2/common-hal/busio/SPI.c +++ b/ports/esp32s2/common-hal/busio/SPI.c @@ -116,15 +116,6 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) { - //SCK is not optional. MOSI and MISO are - if (!clock) { - mp_raise_ValueError(translate("Must provide SCK pin")); - } - - if (!miso && !mosi) { - mp_raise_ValueError(translate("Must provide MISO or MOSI pin")); - } - spi_bus_config_t bus_config; bus_config.mosi_io_num = mosi != NULL ? mosi->number : -1; bus_config.miso_io_num = miso != NULL ? miso->number : -1; diff --git a/ports/stm/common-hal/busio/SPI.c b/ports/stm/common-hal/busio/SPI.c index 913385e96..29fbdee56 100644 --- a/ports/stm/common-hal/busio/SPI.c +++ b/ports/stm/common-hal/busio/SPI.c @@ -127,15 +127,6 @@ STATIC int check_pins(busio_spi_obj_t *self, uint8_t mosi_len = MP_ARRAY_SIZE(mcu_spi_mosi_list); uint8_t miso_len = MP_ARRAY_SIZE(mcu_spi_miso_list); - //SCK is not optional. MOSI and MISO are - if (!sck) { - mp_raise_ValueError(translate("Must provide SCK pin")); - } - - if (!miso && !mosi) { - mp_raise_ValueError(translate("Must provide MISO or MOSI pin")); - } - // Loop over each possibility for SCK. Check whether MISO and/or MOSI can be used on the same peripheral for (uint i = 0; i < sck_len; i++) { const mcu_periph_obj_t *mcu_spi_sck = &mcu_spi_sck_list[i]; diff --git a/shared-bindings/busio/SPI.c b/shared-bindings/busio/SPI.c index aefe4f5a7..e47564c8c 100644 --- a/shared-bindings/busio/SPI.c +++ b/shared-bindings/busio/SPI.c @@ -96,6 +96,10 @@ STATIC mp_obj_t busio_spi_make_new(const mp_obj_type_t *type, size_t n_args, con const mcu_pin_obj_t* mosi = validate_obj_is_free_pin_or_none(args[ARG_MOSI].u_obj); const mcu_pin_obj_t* miso = validate_obj_is_free_pin_or_none(args[ARG_MISO].u_obj); + if (!miso && !mosi) { + mp_raise_ValueError(translate("Must provide MISO or MOSI pin")); + } + common_hal_busio_spi_construct(self, clock, mosi, miso); return MP_OBJ_FROM_PTR(self); } -- cgit v1.2.3 From eadb4de144005503dd648d16926527e5c40823f6 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 24 Sep 2020 16:58:24 -0500 Subject: qtpy_m0_haxpress: add --- ports/atmel-samd/boards/qtpy_m0_haxpress/board.c | 44 ++++++++++++++++ .../boards/qtpy_m0_haxpress/mpconfigboard.h | 60 ++++++++++++++++++++++ .../boards/qtpy_m0_haxpress/mpconfigboard.mk | 33 ++++++++++++ ports/atmel-samd/boards/qtpy_m0_haxpress/pins.c | 49 ++++++++++++++++++ 4 files changed, 186 insertions(+) create mode 100644 ports/atmel-samd/boards/qtpy_m0_haxpress/board.c create mode 100644 ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/qtpy_m0_haxpress/pins.c (limited to 'ports') diff --git a/ports/atmel-samd/boards/qtpy_m0_haxpress/board.c b/ports/atmel-samd/boards/qtpy_m0_haxpress/board.c new file mode 100644 index 000000000..1a65a561f --- /dev/null +++ b/ports/atmel-samd/boards/qtpy_m0_haxpress/board.c @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "common-hal/microcontroller/Pin.h" +#include "supervisor/shared/board.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { + gpio_set_pin_function(PIN_PA15, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_direction(PIN_PA15, GPIO_DIRECTION_OUT); + gpio_set_pin_level(PIN_PA15, true); // Turn on neopixel by default + never_reset_pin_number(PIN_PA15); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.h b/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.h new file mode 100644 index 000000000..4e557751f --- /dev/null +++ b/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.h @@ -0,0 +1,60 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit QT Py M0 Haxpress" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_NEOPIXEL (&pin_PA18) + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define SPI_FLASH_MOSI_PIN &pin_PA22 +#define SPI_FLASH_MISO_PIN &pin_PA19 +#define SPI_FLASH_SCK_PIN &pin_PA23 +#define SPI_FLASH_CS_PIN &pin_PA08 + +#define IGNORE_PIN_PA00 1 +#define IGNORE_PIN_PA01 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA17) +#define DEFAULT_I2C_BUS_SDA (&pin_PA16) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA09) + +#define DEFAULT_UART_BUS_RX (&pin_PA07) +#define DEFAULT_UART_BUS_TX (&pin_PA06) diff --git a/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk b/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk new file mode 100644 index 000000000..6c7bb3fca --- /dev/null +++ b/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk @@ -0,0 +1,33 @@ +USB_VID = 0x239A +USB_PID = 0x80CC +USB_PRODUCT = "QT Py M0 Haxpress" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 0 +LONGINT_IMPL = MPZ +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C + +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_COUNTIO = 0 +CIRCUITPY_RTC = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CPERIPHERAL = 0 + +SUPEROPT_GC = 0 + +CFLAGS_BOARD = --param max-inline-insns-auto=15 +ifeq ($(TRANSLATION), zh_Latn_pinyin) +RELEASE_NEEDS_CLEAN_BUILD = 1 +CFLAGS_INLINE_LIMIT = 35 +endif +ifeq ($(TRANSLATION), de_DE) +RELEASE_NEEDS_CLEAN_BUILD = 1 +CFLAGS_INLINE_LIMIT = 35 +SUPEROPT_VM = 0 +endif diff --git a/ports/atmel-samd/boards/qtpy_m0_haxpress/pins.c b/ports/atmel-samd/boards/qtpy_m0_haxpress/pins.c new file mode 100644 index 000000000..636c48bff --- /dev/null +++ b/ports/atmel-samd/boards/qtpy_m0_haxpress/pins.c @@ -0,0 +1,49 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA03) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA16) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA06) }, + + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA07) }, + + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA11) }, + + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA10) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_PA15) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From b92154357145f4e7d976306490ef33b5d5fe9c92 Mon Sep 17 00:00:00 2001 From: Mark Roberts Date: Fri, 25 Sep 2020 21:27:29 -0400 Subject: Requested changes take 1 --- .../atmel-samd/boards/hallowing_m0_express/board.c | 3 ++- .../atmel-samd/boards/hallowing_m4_express/board.c | 3 ++- ports/atmel-samd/boards/monster_m4sk/board.c | 3 ++- ports/atmel-samd/boards/pewpew_m4/board.c | 3 ++- ports/atmel-samd/boards/pybadge/board.c | 3 ++- ports/atmel-samd/boards/pybadge_airlift/board.c | 3 ++- ports/atmel-samd/boards/pygamer/board.c | 3 ++- ports/atmel-samd/boards/pygamer_advance/board.c | 3 ++- ports/atmel-samd/boards/pyportal/board.c | 3 ++- ports/atmel-samd/boards/pyportal_titano/board.c | 3 ++- .../boards/seeeduino_wio_terminal/board.c | 3 ++- ports/nrf/boards/clue_nrf52840_express/board.c | 3 ++- ports/nrf/boards/hiibot_bluefi/board.c | 3 ++- .../boards/makerdiary_nrf52840_m2_devkit/board.c | 3 ++- ports/nrf/boards/ohs2020_badge/board.c | 3 ++- ports/stm/boards/meowbit_v121/board.c | 3 ++- shared-module/displayio/Display.c | 25 ++++++---------------- shared-module/displayio/display_core.c | 4 ++-- 18 files changed, 41 insertions(+), 36 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/hallowing_m0_express/board.c b/ports/atmel-samd/boards/hallowing_m0_express/board.c index 4717e6ceb..14a2bdb81 100644 --- a/ports/atmel-samd/boards/hallowing_m0_express/board.c +++ b/ports/atmel-samd/boards/hallowing_m0_express/board.c @@ -110,7 +110,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // not SH1107 } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/hallowing_m4_express/board.c b/ports/atmel-samd/boards/hallowing_m4_express/board.c index 7da1d8128..61e797d65 100644 --- a/ports/atmel-samd/boards/hallowing_m4_express/board.c +++ b/ports/atmel-samd/boards/hallowing_m4_express/board.c @@ -91,7 +91,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // not SH1107 } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/monster_m4sk/board.c b/ports/atmel-samd/boards/monster_m4sk/board.c index 4dd65f8c9..45fea9d52 100644 --- a/ports/atmel-samd/boards/monster_m4sk/board.c +++ b/ports/atmel-samd/boards/monster_m4sk/board.c @@ -92,7 +92,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/pewpew_m4/board.c b/ports/atmel-samd/boards/pewpew_m4/board.c index 52a52b4b7..d02e0dc01 100644 --- a/ports/atmel-samd/boards/pewpew_m4/board.c +++ b/ports/atmel-samd/boards/pewpew_m4/board.c @@ -143,7 +143,8 @@ void board_init(void) { false, // data_as_commands false, // auto_refresh 20, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/pybadge/board.c b/ports/atmel-samd/boards/pybadge/board.c index 45298acc2..35f228c75 100644 --- a/ports/atmel-samd/boards/pybadge/board.c +++ b/ports/atmel-samd/boards/pybadge/board.c @@ -114,7 +114,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/pybadge_airlift/board.c b/ports/atmel-samd/boards/pybadge_airlift/board.c index 7495c7d48..fe3e4a017 100644 --- a/ports/atmel-samd/boards/pybadge_airlift/board.c +++ b/ports/atmel-samd/boards/pybadge_airlift/board.c @@ -92,7 +92,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/pygamer/board.c b/ports/atmel-samd/boards/pygamer/board.c index 2e83440ea..b478b5947 100644 --- a/ports/atmel-samd/boards/pygamer/board.c +++ b/ports/atmel-samd/boards/pygamer/board.c @@ -114,7 +114,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/pygamer_advance/board.c b/ports/atmel-samd/boards/pygamer_advance/board.c index 330446b6f..7dfe07c00 100644 --- a/ports/atmel-samd/boards/pygamer_advance/board.c +++ b/ports/atmel-samd/boards/pygamer_advance/board.c @@ -92,7 +92,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/pyportal/board.c b/ports/atmel-samd/boards/pyportal/board.c index d14b6b6a5..cd94f6887 100644 --- a/ports/atmel-samd/boards/pyportal/board.c +++ b/ports/atmel-samd/boards/pyportal/board.c @@ -100,7 +100,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/pyportal_titano/board.c b/ports/atmel-samd/boards/pyportal_titano/board.c index 0ee2e68aa..dc417f5d1 100644 --- a/ports/atmel-samd/boards/pyportal_titano/board.c +++ b/ports/atmel-samd/boards/pyportal_titano/board.c @@ -117,7 +117,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/seeeduino_wio_terminal/board.c b/ports/atmel-samd/boards/seeeduino_wio_terminal/board.c index b7fc736eb..58d0beca8 100644 --- a/ports/atmel-samd/boards/seeeduino_wio_terminal/board.c +++ b/ports/atmel-samd/boards/seeeduino_wio_terminal/board.c @@ -105,7 +105,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { diff --git a/ports/nrf/boards/clue_nrf52840_express/board.c b/ports/nrf/boards/clue_nrf52840_express/board.c index 45452a35e..523bd7677 100644 --- a/ports/nrf/boards/clue_nrf52840_express/board.c +++ b/ports/nrf/boards/clue_nrf52840_express/board.c @@ -91,7 +91,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // not SH1107 } bool board_requests_safe_mode(void) { diff --git a/ports/nrf/boards/hiibot_bluefi/board.c b/ports/nrf/boards/hiibot_bluefi/board.c index 6b53cab13..93e31aef0 100644 --- a/ports/nrf/boards/hiibot_bluefi/board.c +++ b/ports/nrf/boards/hiibot_bluefi/board.c @@ -92,7 +92,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { diff --git a/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/board.c b/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/board.c index e7f946f4d..e08d00dac 100644 --- a/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/board.c +++ b/ports/nrf/boards/makerdiary_nrf52840_m2_devkit/board.c @@ -92,7 +92,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { diff --git a/ports/nrf/boards/ohs2020_badge/board.c b/ports/nrf/boards/ohs2020_badge/board.c index 9fcf9d2bf..ec52690ce 100644 --- a/ports/nrf/boards/ohs2020_badge/board.c +++ b/ports/nrf/boards/ohs2020_badge/board.c @@ -91,7 +91,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - false); // backlight_on_high + false, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { diff --git a/ports/stm/boards/meowbit_v121/board.c b/ports/stm/boards/meowbit_v121/board.c index b74f13516..f67b4a49d 100644 --- a/ports/stm/boards/meowbit_v121/board.c +++ b/ports/stm/boards/meowbit_v121/board.c @@ -111,7 +111,8 @@ void board_init(void) { false, // data_as_commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { diff --git a/shared-module/displayio/Display.c b/shared-module/displayio/Display.c index afc4b7564..9864e9f9d 100644 --- a/shared-module/displayio/Display.c +++ b/shared-module/displayio/Display.c @@ -252,14 +252,8 @@ STATIC bool _refresh_area(displayio_display_obj_t* self, const displayio_area_t* // write one single row at a time if (self->SH1107_addressing) { subrectangles = rows_per_buffer; // vertical (column mode) write each separately (height times) - } - - // Skip this recalculation of subrectangles if SH1107 (each subrectangle is a single row) - // [mdroberts1243] I am worried/confused about the pixels_in_byte_share_row calculation though - // since it makes sense to be on a byte boundary (actually a page boundary too) - // seems to work as is though. - if ((displayio_area_size(&clipped) > buffer_size * pixels_per_word) - && (!self->SH1107_addressing)) { + rows_per_buffer = 1; + } else if (displayio_area_size(&clipped) > buffer_size * pixels_per_word) { rows_per_buffer = buffer_size * pixels_per_word / displayio_area_width(&clipped); if (rows_per_buffer == 0) { rows_per_buffer = 1; @@ -297,18 +291,13 @@ STATIC bool _refresh_area(displayio_display_obj_t* self, const displayio_area_t* .y2 = clipped.y1 + rows_per_buffer * (j + 1) }; if (self->SH1107_addressing) { - // one row only for SH1107 in vertical (column) mode - subrectangle.y1 = clipped.y1 + j; - subrectangle.y2 = clipped.y1 + (j + 1); - }; - if ((remaining_rows < rows_per_buffer) && (!self->SH1107_addressing)) { + // one row only for SH1107 in vertical (column) mode + subrectangle.y1 = clipped.y1 + j; + subrectangle.y2 = clipped.y1 + (j + 1); + } else if (remaining_rows < rows_per_buffer) { subrectangle.y2 = subrectangle.y1 + remaining_rows; } - if (self->SH1107_addressing) { - remaining_rows -= 1; - } else { - remaining_rows -= rows_per_buffer; - } + remaining_rows -= rows_per_buffer; displayio_display_core_set_region_to_update(&self->core, self->set_column_command, self->set_row_command, NO_COMMAND, NO_COMMAND, self->data_as_commands, false, diff --git a/shared-module/displayio/display_core.c b/shared-module/displayio/display_core.c index 6e05b4757..eb8c8f3b4 100644 --- a/shared-module/displayio/display_core.c +++ b/shared-module/displayio/display_core.c @@ -41,7 +41,7 @@ #include #define DISPLAYIO_CORE_DEBUG(...) (void)0 -//#define DISPLAYIO_CORE_DEBUG(...) mp_printf(&mp_plat_print __VA_OPT__(,) __VA_ARGS__) +// #define DISPLAYIO_CORE_DEBUG(...) mp_printf(&mp_plat_print __VA_OPT__(,) __VA_ARGS__) void displayio_display_core_construct(displayio_display_core_t* self, mp_obj_t bus, uint16_t width, uint16_t height, uint16_t ram_width, uint16_t ram_height, int16_t colstart, int16_t rowstart, uint16_t rotation, @@ -322,7 +322,7 @@ void displayio_display_core_start_refresh(displayio_display_core_t* self) { void displayio_display_core_finish_refresh(displayio_display_core_t* self) { if (self->current_group != NULL) { -// DISPLAYIO_CORE_DEBUG("displayiocore group_finish_refresh\n"); + DISPLAYIO_CORE_DEBUG("displayiocore group_finish_refresh\n"); displayio_group_finish_refresh(self->current_group); } self->full_refresh = false; -- cgit v1.2.3 From 22a7696faca36bb1abdc938e06bcd5e25fb89f33 Mon Sep 17 00:00:00 2001 From: Mark Roberts Date: Fri, 25 Sep 2020 22:17:59 -0400 Subject: Changes take 2: missed ugame10 board --- ports/atmel-samd/boards/ugame10/board.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/ugame10/board.c b/ports/atmel-samd/boards/ugame10/board.c index 3bb9eab7d..9f2b8d039 100644 --- a/ports/atmel-samd/boards/ugame10/board.c +++ b/ports/atmel-samd/boards/ugame10/board.c @@ -111,7 +111,8 @@ void board_init(void) { false, // data as commands true, // auto_refresh 60, // native_frames_per_second - true); // backlight_on_high + true, // backlight_on_high + false); // SH1107_addressing } bool board_requests_safe_mode(void) { -- cgit v1.2.3 From 9944935fdeb0783a8b1d1ce3fd98f9c7ea0924e3 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Sat, 26 Sep 2020 11:31:54 -0500 Subject: qtpy haxpress: enable RTC --- ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk | 1 - 1 file changed, 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk b/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk index 6c7bb3fca..df452688e 100644 --- a/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk +++ b/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk @@ -15,7 +15,6 @@ EXTERNAL_FLASH_DEVICES = GD25Q16C CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_BITBANGIO = 0 CIRCUITPY_COUNTIO = 0 -CIRCUITPY_RTC = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CPERIPHERAL = 0 -- cgit v1.2.3 From 791d20f16ccfc0328ef0fab0159a2b4985480928 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Sat, 26 Sep 2020 11:43:55 -0500 Subject: give qtpy haxpress its own USB PID --- ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk b/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk index df452688e..a63f14274 100644 --- a/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk +++ b/ports/atmel-samd/boards/qtpy_m0_haxpress/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x80CC +USB_PID = 0x00CC USB_PRODUCT = "QT Py M0 Haxpress" USB_MANUFACTURER = "Adafruit Industries LLC" -- cgit v1.2.3 From 96323ac3ac2e93b87834b368726f49b8b2796049 Mon Sep 17 00:00:00 2001 From: Anson He Date: Sun, 27 Sep 2020 10:21:25 +0800 Subject: Default power on Wio Terminal's 40 Pin --- .../boards/seeeduino_wio_terminal/board.c | 23 ++++++++++++++++++++++ .../boards/seeeduino_wio_terminal/mpconfigboard.h | 4 ++++ 2 files changed, 27 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/boards/seeeduino_wio_terminal/board.c b/ports/atmel-samd/boards/seeeduino_wio_terminal/board.c index b7fc736eb..f6b1e0dd1 100644 --- a/ports/atmel-samd/boards/seeeduino_wio_terminal/board.c +++ b/ports/atmel-samd/boards/seeeduino_wio_terminal/board.c @@ -31,8 +31,12 @@ #include "shared-bindings/displayio/FourWire.h" #include "shared-module/displayio/__init__.h" #include "shared-module/displayio/mipi_constants.h" +#include "shared-bindings/digitalio/DigitalInOut.h" displayio_fourwire_obj_t board_display_obj; +digitalio_digitalinout_obj_t CTR_5V; +digitalio_digitalinout_obj_t CTR_3V3; +digitalio_digitalinout_obj_t USB_HOST_ENABLE; uint8_t display_init_sequence[] = { 0x01, 0x80, 0x80, // Software reset then delay 0x80 (128ms) @@ -106,6 +110,25 @@ void board_init(void) { true, // auto_refresh 60, // native_frames_per_second true); // backlight_on_high + + // Enabling the Power of the 40-pin at the back + CTR_5V.base.type = &digitalio_digitalinout_type; + CTR_3V3.base.type = &digitalio_digitalinout_type; + USB_HOST_ENABLE.base.type = &digitalio_digitalinout_type; + + common_hal_digitalio_digitalinout_construct(&CTR_5V, PIN_CTR_5V); + common_hal_digitalio_digitalinout_construct(&CTR_3V3, PIN_CTR_3V3); + common_hal_digitalio_digitalinout_construct(&USB_HOST_ENABLE, PIN_USB_HOST_ENABLE); + + common_hal_digitalio_digitalinout_set_value(&CTR_5V, true); + common_hal_digitalio_digitalinout_set_value(&CTR_3V3, false); + common_hal_digitalio_digitalinout_set_value(&USB_HOST_ENABLE, false); + + // Never reset + common_hal_digitalio_digitalinout_never_reset(&CTR_5V); + common_hal_digitalio_digitalinout_never_reset(&CTR_3V3); + common_hal_digitalio_digitalinout_never_reset(&USB_HOST_ENABLE); + } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.h b/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.h index f7d0448df..c87ca46d8 100644 --- a/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.h +++ b/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.h @@ -27,6 +27,10 @@ #define DEFAULT_UART_BUS_RX (&pin_PB27) #define DEFAULT_UART_BUS_TX (&pin_PB26) +#define PIN_CTR_5V (&pin_PC14) +#define PIN_CTR_3V3 (&pin_PC15) +#define PIN_USB_HOST_ENABLE (&pin_PA27) + // USB is always used internally so skip the pin objects for it. #define IGNORE_PIN_PA24 1 #define IGNORE_PIN_PA25 1 -- cgit v1.2.3 From 128b4a013b83b02953b1cfd7f246bdd30dab5f9a Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Mon, 28 Sep 2020 12:11:08 -0400 Subject: Add non-calibrated ADC --- locale/circuitpython.pot | 12 +-- ports/esp32s2/Makefile | 51 ++++++------- ports/esp32s2/common-hal/analogio/AnalogIn.c | 103 ++++++++++++++++++++++++++ ports/esp32s2/common-hal/analogio/AnalogIn.h | 50 +++++++++++++ ports/esp32s2/common-hal/analogio/AnalogOut.c | 60 +++++++++++++++ ports/esp32s2/common-hal/analogio/AnalogOut.h | 44 +++++++++++ ports/esp32s2/common-hal/analogio/__init__.c | 1 + ports/esp32s2/mpconfigport.mk | 2 +- ports/esp32s2/peripherals/pins.c | 94 +++++++++++------------ ports/esp32s2/peripherals/pins.h | 3 + 10 files changed, 342 insertions(+), 78 deletions(-) create mode 100644 ports/esp32s2/common-hal/analogio/AnalogIn.c create mode 100644 ports/esp32s2/common-hal/analogio/AnalogIn.h create mode 100644 ports/esp32s2/common-hal/analogio/AnalogOut.c create mode 100644 ports/esp32s2/common-hal/analogio/AnalogOut.h create mode 100644 ports/esp32s2/common-hal/analogio/__init__.c (limited to 'ports') diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index c9114dd5c..2d994b01d 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-09-21 16:45-0500\n" +"POT-Creation-Date: 2020-09-25 18:14-0400\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -1167,14 +1167,10 @@ msgstr "" msgid "Must be a %q subclass." msgstr "" -#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +#: ports/mimxrt10xx/common-hal/busio/SPI.c shared-bindings/busio/SPI.c msgid "Must provide MISO or MOSI pin" msgstr "" -#: ports/stm/common-hal/busio/SPI.c -msgid "Must provide SCK pin" -msgstr "" - #: shared-bindings/rgbmatrix/RGBMatrix.c #, c-format msgid "Must use a multiple of 6 rgb pins, not %d" @@ -1415,6 +1411,10 @@ msgstr "" msgid "Pull not used when direction is output." msgstr "" +#: ports/stm/ref/pulseout-pre-timeralloc.c +msgid "PulseOut not supported on this chip" +msgstr "" + #: ports/stm/common-hal/os/__init__.c msgid "RNG DeInit Error" msgstr "" diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 229a3bf3a..013da7d89 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -73,30 +73,31 @@ INC += -I./peripherals INC += -I../../lib/mp-readline INC += -I../../lib/tinyusb/src INC += -I../../supervisor/shared/usb -INC += -Iesp-idf/components/freertos/include/freertos -INC += -Iesp-idf/components/freertos/xtensa/include -INC += -Iesp-idf/components/esp32s2/include -INC += -Iesp-idf/components/xtensa/esp32s2/include -INC += -Iesp-idf/components/esp_common/include -INC += -Iesp-idf/components/esp_event/include -INC += -Iesp-idf/components/esp_netif/include -INC += -Iesp-idf/components/esp_ringbuf/include -INC += -Iesp-idf/components/esp_rom/include -INC += -Iesp-idf/components/esp_wifi/include -INC += -Iesp-idf/components/xtensa/include -INC += -Iesp-idf/components/esp_timer/include -INC += -Iesp-idf/components/mbedtls/mbedtls/include -INC += -Iesp-idf/components/mbedtls/port/include/ -INC += -Iesp-idf/components/newlib/platform_include -INC += -Iesp-idf/components/lwip/lwip/src/include -INC += -Iesp-idf/components/lwip/port/esp32/include -INC += -Iesp-idf/components/lwip/include/apps/sntp -INC += -Iesp-idf/components/soc/include -INC += -Iesp-idf/components/soc/src/esp32s2/include -INC += -Iesp-idf/components/soc/soc/include -INC += -Iesp-idf/components/soc/soc/esp32s2/include -INC += -Iesp-idf/components/heap/include -INC += -Iesp-idf/components/esp_system/include +INC += -isystem esp-idf/components/freertos/include/freertos +INC += -isystem esp-idf/components/freertos/xtensa/include +INC += -isystem esp-idf/components/esp32s2/include +INC += -isystem esp-idf/components/driver/esp32s2/include +INC += -isystem esp-idf/components/xtensa/esp32s2/include +INC += -isystem esp-idf/components/esp_common/include +INC += -isystem esp-idf/components/esp_event/include +INC += -isystem esp-idf/components/esp_netif/include +INC += -isystem esp-idf/components/esp_ringbuf/include +INC += -isystem esp-idf/components/esp_rom/include +INC += -isystem esp-idf/components/esp_wifi/include +INC += -isystem esp-idf/components/xtensa/include +INC += -isystem esp-idf/components/esp_timer/include +INC += -isystem esp-idf/components/mbedtls/mbedtls/include +INC += -isystem esp-idf/components/mbedtls/port/include/ +INC += -isystem esp-idf/components/newlib/platform_include +INC += -isystem esp-idf/components/lwip/lwip/src/include +INC += -isystem esp-idf/components/lwip/port/esp32/include +INC += -isystem esp-idf/components/lwip/include/apps/sntp +INC += -isystem esp-idf/components/soc/include +INC += -isystem esp-idf/components/soc/src/esp32s2/include +INC += -isystem esp-idf/components/soc/soc/include +INC += -isystem esp-idf/components/soc/soc/esp32s2/include +INC += -isystem esp-idf/components/heap/include +INC += -isystem esp-idf/components/esp_system/include INC += -I$(BUILD)/esp-idf/config CFLAGS += -DHAVE_CONFIG_H \ @@ -260,7 +261,7 @@ ESP_IDF_COMPONENTS_LINK = freertos log esp_system esp32s2 bootloader_support pth ESP_IDF_COMPONENTS_INCLUDE = driver freertos log soc -INC += $(foreach component, $(ESP_IDF_COMPONENTS_INCLUDE), -Iesp-idf/components/$(component)/include) +INC += $(foreach component, $(ESP_IDF_COMPONENTS_INCLUDE), -isystem esp-idf/components/$(component)/include) ESP_IDF_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/$(component)/lib$(component).a) ESP_IDF_WIFI_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_WIFI_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/$(component)/lib$(component).a) diff --git a/ports/esp32s2/common-hal/analogio/AnalogIn.c b/ports/esp32s2/common-hal/analogio/AnalogIn.c new file mode 100644 index 000000000..1a15fc77c --- /dev/null +++ b/ports/esp32s2/common-hal/analogio/AnalogIn.c @@ -0,0 +1,103 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/analogio/AnalogIn.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + +#include "driver/adc.h" +// TODO: Add when ESP-IDF is updated latest version +// #include "esp-idf/components/esp_adc_cal/include/esp_adc_cal.h" + +#include "shared-bindings/microcontroller/Pin.h" + +#define DEFAULT_VREF 1100 +#define NO_OF_SAMPLES 64 +#define ATTENUATION ADC_ATTEN_DB_11 +#define DATA_WIDTH ADC_WIDTH_BIT_13 + +void common_hal_analogio_analogin_construct(analogio_analogin_obj_t* self, + const mcu_pin_obj_t *pin) { + if (pin->adc_index == 0 || pin->adc_channel == ADC_CHANNEL_MAX) { + mp_raise_ValueError(translate("Pin does not have ADC capabilities")); + } + common_hal_mcu_pin_claim(pin); + self->pin = pin; +} + +bool common_hal_analogio_analogin_deinited(analogio_analogin_obj_t *self) { + return self->pin == NULL; +} + +void common_hal_analogio_analogin_deinit(analogio_analogin_obj_t *self) { + if (common_hal_analogio_analogin_deinited(self)) { + return; + } + reset_pin_number(self->pin->number); + self->pin = NULL; +} + +uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { + if (self->pin->adc_index == ADC_UNIT_1) { + adc1_config_width(DATA_WIDTH); + adc1_config_channel_atten((adc1_channel_t)self->pin->adc_channel, ATTENUATION); + } else if (self->pin->adc_index == ADC_UNIT_2) { + adc2_config_channel_atten((adc2_channel_t)self->pin->adc_channel, ATTENUATION); + } + + // TODO: esp_adc_cal is only available in the latest version of the esp-idf. Enable when we update. + // Automatically select calibration process depending on status of efuse + // esp_adc_cal_characteristics_t *adc_chars = calloc(1, sizeof(esp_adc_cal_characteristics_t)); + // esp_adc_cal_characterize(self->pin->adc_index, ATTENUATION, DATA_WIDTH, DEFAULT_VREF, adc_chars); + + uint32_t adc_reading = 0; + //Multisampling + for (int i = 0; i < NO_OF_SAMPLES; i++) { + if (self->pin->adc_index == ADC_UNIT_1) { + adc_reading += adc1_get_raw((adc1_channel_t)self->pin->adc_channel); + } else { + int raw; + esp_err_t r = adc2_get_raw((adc2_channel_t)self->pin->adc_channel, DATA_WIDTH, &raw); + if ( r != ESP_OK ) { + mp_raise_ValueError(translate("ADC2 is being used by WiFi")); + } + adc_reading += raw; + } + } + adc_reading /= NO_OF_SAMPLES; + + // This corrects non-linear regions of the ADC range with a LUT, so it's a better reading than raw + // Enable when ESP-IDF is updated + //uint32_t voltage = esp_adc_cal_raw_to_voltage(adc_reading, adc_chars); + //return voltage * ((1 << 16) - 1)/3300; + + return adc_reading; +} + +float common_hal_analogio_analogin_get_reference_voltage(analogio_analogin_obj_t *self) { + return 3.3f; +} diff --git a/ports/esp32s2/common-hal/analogio/AnalogIn.h b/ports/esp32s2/common-hal/analogio/AnalogIn.h new file mode 100644 index 000000000..5ea4a913d --- /dev/null +++ b/ports/esp32s2/common-hal/analogio/AnalogIn.h @@ -0,0 +1,50 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ANALOGIO_ANALOGIN_H +#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ANALOGIO_ANALOGIN_H + +#include "common-hal/microcontroller/Pin.h" + +#include "esp-idf/components/soc/include/hal/adc_types.h" +#include "FreeRTOS.h" +#include "freertos/semphr.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t * pin; +} analogio_analogin_obj_t; + +static inline uint8_t stm32_adc_units(uint8_t adc_packed) { + return adc_packed >> 5; +} + +static inline uint8_t stm32_adc_channel(uint8_t adc_packed) { + return adc_packed & 0x1f; +} + +#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ANALOGIO_ANALOGIN_H diff --git a/ports/esp32s2/common-hal/analogio/AnalogOut.c b/ports/esp32s2/common-hal/analogio/AnalogOut.c new file mode 100644 index 000000000..d67dc6083 --- /dev/null +++ b/ports/esp32s2/common-hal/analogio/AnalogOut.c @@ -0,0 +1,60 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * SPDX-FileCopyrightText: Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2019, Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "py/mperrno.h" +#include "py/runtime.h" + +#include "shared-bindings/analogio/AnalogOut.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/translate.h" + +#include "common-hal/microcontroller/Pin.h" + +void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, + const mcu_pin_obj_t *pin) { + //mp_raise_ValueError(translate("No DAC on chip")); +} + +bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { + return true; +} + +void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { + +} + +void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, + uint16_t value) { + +} + +void analogout_reset(void) { + +} diff --git a/ports/esp32s2/common-hal/analogio/AnalogOut.h b/ports/esp32s2/common-hal/analogio/AnalogOut.h new file mode 100644 index 000000000..d5f29ffd7 --- /dev/null +++ b/ports/esp32s2/common-hal/analogio/AnalogOut.h @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGOUT_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t * pin; + uint8_t channel; + uint8_t dac_index:1; +} analogio_analogout_obj_t; + +void analogout_reset(void); + +#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGOUT_H diff --git a/ports/esp32s2/common-hal/analogio/__init__.c b/ports/esp32s2/common-hal/analogio/__init__.c new file mode 100644 index 000000000..eea58c77d --- /dev/null +++ b/ports/esp32s2/common-hal/analogio/__init__.c @@ -0,0 +1 @@ +// No analogio module functions. diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk index bbaabb1c3..d68fe469d 100644 --- a/ports/esp32s2/mpconfigport.mk +++ b/ports/esp32s2/mpconfigport.mk @@ -13,8 +13,8 @@ USB_SERIAL_NUMBER_LENGTH = 12 LONGINT_IMPL = MPZ # These modules are implemented in ports//common-hal: +# CIRCUITPY_ANALOGIO = 0 CIRCUITPY_FULL_BUILD = 1 -CIRCUITPY_ANALOGIO = 0 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 CIRCUITPY_COUNTIO = 0 diff --git a/ports/esp32s2/peripherals/pins.c b/ports/esp32s2/peripherals/pins.c index 34fd6483e..2c8b61c62 100755 --- a/ports/esp32s2/peripherals/pins.c +++ b/ports/esp32s2/peripherals/pins.c @@ -26,56 +26,58 @@ #include "peripherals/pins.h" -#define NO_ADC 0xff +#define NO_ADC 0 +#define NO_ADC_CHANNEL ADC_CHANNEL_MAX // This macro is used to simplify pin definition in boards//pins.c -#define PIN(p_name, p_number) \ +#define PIN(p_name, p_number, p_adc_index, p_adc_channel) \ const mcu_pin_obj_t pin_## p_name = { \ PIN_PREFIX_VALUES \ .number = p_number, \ + .adc_index = p_adc_index, \ + .adc_channel = p_adc_channel, \ } -PIN(GPIO0, 0); -PIN(GPIO1, 1); -PIN(GPIO2, 2); -PIN(GPIO3, 3); -PIN(GPIO4, 4); -PIN(GPIO5, 5); -PIN(GPIO6, 6); -PIN(GPIO7, 7); -PIN(GPIO8, 8); -PIN(GPIO9, 9); -PIN(GPIO10, 10); -PIN(GPIO11, 11); -PIN(GPIO12, 12); -PIN(GPIO13, 13); -PIN(GPIO14, 14); -PIN(GPIO15, 15); -PIN(GPIO16, 16); -PIN(GPIO17, 17); -PIN(GPIO18, 18); - -PIN(GPIO19, 19); -PIN(GPIO20, 20); -PIN(GPIO21, 21); -PIN(GPIO26, 26); -PIN(GPIO27, 27); -PIN(GPIO28, 28); -PIN(GPIO29, 29); -PIN(GPIO30, 30); -PIN(GPIO31, 31); -PIN(GPIO32, 32); -PIN(GPIO33, 33); -PIN(GPIO34, 34); -PIN(GPIO35, 35); -PIN(GPIO36, 36); -PIN(GPIO37, 37); -PIN(GPIO38, 38); -PIN(GPIO39, 39); -PIN(GPIO40, 40); -PIN(GPIO41, 41); -PIN(GPIO42, 42); -PIN(GPIO43, 43); -PIN(GPIO44, 44); -PIN(GPIO45, 45); -PIN(GPIO46, 46); +PIN(GPIO0, 0, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO1, 1, ADC_UNIT_1, ADC_CHANNEL_0); +PIN(GPIO2, 2, ADC_UNIT_1, ADC_CHANNEL_1); +PIN(GPIO3, 3, ADC_UNIT_1, ADC_CHANNEL_2); +PIN(GPIO4, 4, ADC_UNIT_1, ADC_CHANNEL_3); +PIN(GPIO5, 5, ADC_UNIT_1, ADC_CHANNEL_4); +PIN(GPIO6, 6, ADC_UNIT_1, ADC_CHANNEL_5); +PIN(GPIO7, 7, ADC_UNIT_1, ADC_CHANNEL_6); +PIN(GPIO8, 8, ADC_UNIT_1, ADC_CHANNEL_7); +PIN(GPIO9, 9, ADC_UNIT_1, ADC_CHANNEL_8); +PIN(GPIO10, 10, ADC_UNIT_1, ADC_CHANNEL_9); +PIN(GPIO11, 11, ADC_UNIT_2, ADC_CHANNEL_0); +PIN(GPIO12, 12, ADC_UNIT_2, ADC_CHANNEL_1); +PIN(GPIO13, 13, ADC_UNIT_2, ADC_CHANNEL_2); +PIN(GPIO14, 14, ADC_UNIT_2, ADC_CHANNEL_3); +PIN(GPIO15, 15, ADC_UNIT_2, ADC_CHANNEL_4); +PIN(GPIO16, 16, ADC_UNIT_2, ADC_CHANNEL_5); +PIN(GPIO17, 17, ADC_UNIT_2, ADC_CHANNEL_6); +PIN(GPIO18, 18, ADC_UNIT_2, ADC_CHANNEL_7); +PIN(GPIO19, 19, ADC_UNIT_2, ADC_CHANNEL_8); +PIN(GPIO20, 20, ADC_UNIT_2, ADC_CHANNEL_9); +PIN(GPIO21, 21, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO26, 26, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO27, 27, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO28, 28, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO29, 29, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO30, 30, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO31, 31, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO32, 32, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO33, 33, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO34, 34, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO35, 35, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO36, 36, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO37, 37, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO38, 38, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO39, 39, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO40, 40, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO41, 41, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO42, 42, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO43, 43, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO44, 44, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO45, 45, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO46, 46, NO_ADC, NO_ADC_CHANNEL); diff --git a/ports/esp32s2/peripherals/pins.h b/ports/esp32s2/peripherals/pins.h index 07d0b908e..3f41cf35b 100644 --- a/ports/esp32s2/peripherals/pins.h +++ b/ports/esp32s2/peripherals/pins.h @@ -35,10 +35,13 @@ #include "esp32s2_peripherals_config.h" #include "esp-idf/config/sdkconfig.h" #include "esp-idf/components/soc/include/hal/gpio_types.h" +#include "esp-idf/components/soc/include/hal/adc_types.h" typedef struct { PIN_PREFIX_FIELDS gpio_num_t number; + uint8_t adc_index:2; + uint8_t adc_channel:6; } mcu_pin_obj_t; extern const mcu_pin_obj_t pin_GPIO0; -- cgit v1.2.3 From abdbbf9e242e7ae8234d338f0b1d7a0c26fa6ad1 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Mon, 28 Sep 2020 15:10:12 -0700 Subject: One grep --- ports/esp32s2/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 662be481e..a32c83013 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -259,8 +259,7 @@ $(BUILD)/esp-idf/partition_table/partition-table.bin: $(BUILD)/esp-idf/config/sd menuconfig: $(BUILD)/esp-idf/config $(Q)ninja -C $(BUILD)/esp-idf menuconfig $(Q)diff --old-line-format= --unchanged-line-format= esp-idf-config/sdkconfig.defaults $(BUILD)/esp-idf/sdkconfig > $(BUILD)/sdkconfig.diff || true - $(Q)grep -Fvxf $(FLASH_SDKCONFIG) $(BUILD)/sdkconfig.diff > $(BUILD)/sdkconfig.stripped1 - $(Q)grep -Fvxf $(DEBUG_SDKCONFIG) $(BUILD)/sdkconfig.stripped1 > boards/$(BOARD)/sdkconfig + $(Q)grep -Fvxf $(DEBUG_SDKCONFIG) -f $(FLASH_SDKCONFIG) $(BUILD)/sdkconfig.diff > boards/$(BOARD)/sdkconfig # qstr builds include headers so we need to make sure they are up to date $(HEADER_BUILD)/qstr.i.last: | $(BUILD)/esp-idf/config/sdkconfig.h -- cgit v1.2.3 From 79ca430ddf25a71c73d6219fb68160fb405c3777 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 24 Sep 2020 13:58:45 -0500 Subject: Match: address -> id --- ports/atmel-samd/common-hal/canio/Listener.c | 60 ++++++++++++++-------------- shared-bindings/canio/Match.c | 46 ++++++++++----------- shared-bindings/canio/Match.h | 4 +- shared-module/canio/Match.c | 8 ++-- shared-module/canio/Match.h | 2 +- 5 files changed, 60 insertions(+), 60 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/canio/Listener.c b/ports/atmel-samd/common-hal/canio/Listener.c index 02cfde9cc..d21ebbb31 100644 --- a/ports/atmel-samd/common-hal/canio/Listener.c +++ b/ports/atmel-samd/common-hal/canio/Listener.c @@ -58,8 +58,8 @@ STATIC void static_assertions(void) { MP_STATIC_ASSERT(CAN_XIDFE_0_EFEC_STF0M_Val + 1 == CAN_XIDFE_0_EFEC_STF1M_Val); } -STATIC bool single_address_filter(canio_match_obj_t *match) { - return match->mask == 0 || match->mask == match->address; +STATIC bool single_id_filter(canio_match_obj_t *match) { + return match->mask == 0 || match->mask == match->id; } STATIC bool standard_filter_in_use(CanMramSidfe *filter) { @@ -76,7 +76,7 @@ STATIC size_t num_filters_needed(size_t nmatch, canio_match_obj_t **matches, boo if (extended != matches[i]->extended) { continue; } - if (single_address_filter(matches[i])) { + if (single_id_filter(matches[i])) { num_half_filters_needed += 1; } else { num_half_filters_needed += 2; @@ -191,7 +191,7 @@ STATIC void install_extended_filter(CanMramXidfe *extended, int id1, int id2, in } -#define NO_ADDRESS (-1) +#define NO_ID (-1) void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t **matches) { int fifo = self->fifo_idx; @@ -207,31 +207,31 @@ void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t ** CanMramSidfe *standard = next_standard_filter(self, NULL); CanMramXidfe *extended = next_extended_filter(self, NULL); - int first_address = NO_ADDRESS; + int first_id = NO_ID; - // step 1: single address standard matches + // step 1: single id standard matches // we have to gather up pairs and stuff them in a single filter entry for(size_t i = 0; iextended) { continue; } - if (!single_address_filter(match)) { + if (!single_id_filter(match)) { continue; } - if (first_address != NO_ADDRESS) { - install_standard_filter(standard, first_address, match->address, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_DUAL_Val); - first_address = NO_ADDRESS; + if (first_id != NO_ID) { + install_standard_filter(standard, first_id, match->id, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_DUAL_Val); + first_id = NO_ID; standard = next_standard_filter(self, standard); } else { - first_address = match->address; + first_id = match->id; } } - // step 1.5. odd single address standard match - if (first_address != NO_ADDRESS) { - install_standard_filter(standard, first_address, first_address, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_DUAL_Val); + // step 1.5. odd single id standard match + if (first_id != NO_ID) { + install_standard_filter(standard, first_id, first_id, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_DUAL_Val); standard = next_standard_filter(self, standard); - first_address = NO_ADDRESS; + first_id = NO_ID; } // step 2: standard mask filter @@ -240,36 +240,36 @@ void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t ** if (match->extended) { continue; } - if (single_address_filter(match)) { + if (single_id_filter(match)) { continue; } - install_standard_filter(standard, match->address, match->mask, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_CLASSIC_Val); + install_standard_filter(standard, match->id, match->mask, CAN_SIDFE_0_SFEC_STF0M_Val + fifo, CAN_SIDFE_0_SFT_CLASSIC_Val); standard = next_standard_filter(self, standard); } - // step 3: single address extended matches + // step 3: single id extended matches // we have to gather up pairs and stuff them in a single filter entry for(size_t i = 0; iextended) { continue; } - if (!single_address_filter(match)) { + if (!single_id_filter(match)) { continue; } - if (first_address != NO_ADDRESS) { - install_extended_filter(extended, first_address, match->address, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_DUAL_Val); - first_address = NO_ADDRESS; + if (first_id != NO_ID) { + install_extended_filter(extended, first_id, match->id, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_DUAL_Val); + first_id = NO_ID; extended = next_extended_filter(self, extended); } else { - first_address = match->address; + first_id = match->id; } } - // step 3.5. odd single address standard match - if (first_address != NO_ADDRESS) { - install_extended_filter(extended, first_address, first_address, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_DUAL_Val); + // step 3.5. odd single id standard match + if (first_id != NO_ID) { + install_extended_filter(extended, first_id, first_id, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_DUAL_Val); extended = next_extended_filter(self, extended); - first_address = NO_ADDRESS; + first_id = NO_ID; } // step 4: extended mask filters @@ -278,10 +278,10 @@ void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t ** if (!match->extended) { continue; } - if (single_address_filter(match)) { + if (single_id_filter(match)) { continue; } - install_extended_filter(extended, match->address, match->mask, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_CLASSIC_Val); + install_extended_filter(extended, match->id, match->mask, CAN_XIDFE_0_EFEC_STF0M_Val + fifo, CAN_XIDFE_1_EFT_CLASSIC_Val); extended = next_extended_filter(self, extended); } @@ -363,7 +363,7 @@ bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_messag if (message->extended) { message->id = hw_message->rxf0.bit.ID; } else { - message->id = hw_message->rxf0.bit.ID >> 18; // short addresses are left-justified + message->id = hw_message->rxf0.bit.ID >> 18; // short ids are left-justified } message->rtr = hw_message->rxf0.bit.RTR; message->size = hw_message->rxf1.bit.DLC; diff --git a/shared-bindings/canio/Match.c b/shared-bindings/canio/Match.c index ff5d028fa..91a9dd02a 100644 --- a/shared-bindings/canio/Match.c +++ b/shared-bindings/canio/Match.c @@ -33,19 +33,19 @@ //| """Describe CAN bus messages to match""" //| //| -//| def __init__(self, address: int, *, mask: int = 0, extended: bool = False): +//| def __init__(self, id: int, *, mask: int = 0, extended: bool = False): //| """Construct a Match with the given properties. //| -//| If mask is nonzero, then the filter is for any sender which matches all -//| the nonzero bits in mask. Otherwise, it matches exactly the given address. -//| If extended is true then only extended addresses are matched, otherwise -//| only standard addresses are matched.""" +//| If mask is nonzero, then the filter is for any id which matches all +//| the nonzero bits in mask. Otherwise, it matches exactly the given id. +//| If extended is true then only extended ids are matched, otherwise +//| only standard ids are matched.""" //| STATIC mp_obj_t canio_match_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_address, ARG_mask, ARG_extended, NUM_ARGS }; + enum { ARG_id, ARG_mask, ARG_extended, NUM_ARGS }; static const mp_arg_t allowed_args[] = { - { MP_QSTR_address, MP_ARG_INT | MP_ARG_REQUIRED }, + { MP_QSTR_id, MP_ARG_INT | MP_ARG_REQUIRED }, { MP_QSTR_mask, MP_ARG_INT, {.u_int = 0} }, { MP_QSTR_extended, MP_ARG_BOOL, {.u_bool = false} }, }; @@ -54,44 +54,44 @@ STATIC mp_obj_t canio_match_make_new(const mp_obj_type_t *type, size_t n_args, c mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - int address_bits = args[ARG_extended].u_bool ? 0x1fffffff : 0x7ff; - int address = args[ARG_address].u_int; + int id_bits = args[ARG_extended].u_bool ? 0x1fffffff : 0x7ff; + int id = args[ARG_id].u_int; int mask = args[ARG_mask].u_int; - if (address & ~address_bits) { - mp_raise_ValueError_varg(translate("%q out of range"), MP_QSTR_address); + if (id & ~id_bits) { + mp_raise_ValueError_varg(translate("%q out of range"), MP_QSTR_id); } - if (mask & ~address_bits) { + if (mask & ~id_bits) { mp_raise_ValueError_varg(translate("%q out of range"), MP_QSTR_mask); } canio_match_obj_t *self = m_new_obj(canio_match_obj_t); self->base.type = &canio_match_type; - common_hal_canio_match_construct(self, args[ARG_address].u_int, args[ARG_mask].u_int, args[ARG_extended].u_bool); + common_hal_canio_match_construct(self, args[ARG_id].u_int, args[ARG_mask].u_int, args[ARG_extended].u_bool); return self; } -//| address: int -//| """The address to match""" +//| id: int +//| """The id to match""" //| -STATIC mp_obj_t canio_match_address_get(mp_obj_t self_in) { +STATIC mp_obj_t canio_match_id_get(mp_obj_t self_in) { canio_match_obj_t *self = self_in; - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_match_get_address(self)); + return MP_OBJ_NEW_SMALL_INT(common_hal_canio_match_get_id(self)); } -MP_DEFINE_CONST_FUN_OBJ_1(canio_match_address_get_obj, canio_match_address_get); +MP_DEFINE_CONST_FUN_OBJ_1(canio_match_id_get_obj, canio_match_id_get); -const mp_obj_property_t canio_match_address_obj = { +const mp_obj_property_t canio_match_id_obj = { .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_match_address_get_obj, + .proxy = {(mp_obj_t)&canio_match_id_get_obj, (mp_obj_t)&mp_const_none_obj, (mp_obj_t)&mp_const_none_obj}, }; //| //| mask: int -//| """The optional mask of addresses to match""" +//| """The optional mask of ids to match""" //| STATIC mp_obj_t canio_match_mask_get(mp_obj_t self_in) { @@ -108,7 +108,7 @@ const mp_obj_property_t canio_match_mask_obj = { }; //| extended: bool -//| """True to match extended addresses, False to match standard addresses""" +//| """True to match extended ids, False to match standard ides""" //| STATIC mp_obj_t canio_match_extended_get(mp_obj_t self_in) { @@ -125,7 +125,7 @@ const mp_obj_property_t canio_match_extended_obj = { }; STATIC const mp_rom_map_elem_t canio_match_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_address), MP_ROM_PTR(&canio_match_address_obj) }, + { MP_ROM_QSTR(MP_QSTR_id), MP_ROM_PTR(&canio_match_id_obj) }, { MP_ROM_QSTR(MP_QSTR_mask), MP_ROM_PTR(&canio_match_mask_obj) }, { MP_ROM_QSTR(MP_QSTR_extended), MP_ROM_PTR(&canio_match_extended_obj) }, }; diff --git a/shared-bindings/canio/Match.h b/shared-bindings/canio/Match.h index 88996d730..01a75fd1c 100644 --- a/shared-bindings/canio/Match.h +++ b/shared-bindings/canio/Match.h @@ -31,7 +31,7 @@ extern const mp_obj_type_t canio_match_type; -void common_hal_canio_match_construct(canio_match_obj_t *self, int address, int mask, bool extended); -int common_hal_canio_match_get_address(const canio_match_obj_t *self); +void common_hal_canio_match_construct(canio_match_obj_t *self, int id, int mask, bool extended); +int common_hal_canio_match_get_id(const canio_match_obj_t *self); int common_hal_canio_match_get_mask(const canio_match_obj_t *self); bool common_hal_canio_match_get_extended(const canio_match_obj_t *self); diff --git a/shared-module/canio/Match.c b/shared-module/canio/Match.c index 9e33b956f..b4e8616e9 100644 --- a/shared-module/canio/Match.c +++ b/shared-module/canio/Match.c @@ -26,14 +26,14 @@ #include "shared-module/canio/Match.h" -void common_hal_canio_match_construct(canio_match_obj_t *self, int address, int mask, bool extended) { - self->address = address; +void common_hal_canio_match_construct(canio_match_obj_t *self, int id, int mask, bool extended) { + self->id = id; self->mask = mask; self->extended = extended; } -int common_hal_canio_match_get_address(const canio_match_obj_t *self) { - return self->address; +int common_hal_canio_match_get_id(const canio_match_obj_t *self) { + return self->id; } int common_hal_canio_match_get_mask(const canio_match_obj_t *self) { return self->mask; diff --git a/shared-module/canio/Match.h b/shared-module/canio/Match.h index 25f047f37..b52191d7c 100644 --- a/shared-module/canio/Match.h +++ b/shared-module/canio/Match.h @@ -30,7 +30,7 @@ typedef struct { mp_obj_base_t base; - int address; + int id; int mask; bool extended; } canio_match_obj_t; -- cgit v1.2.3 From 48bda589b81acad03bfe088c4c754040e9eb0783 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 24 Sep 2020 14:05:16 -0500 Subject: Listerner: read -> receive, drop readinto This prepares for creating a separate RemoteTransmissionRequest class --- ports/atmel-samd/common-hal/canio/Listener.c | 2 +- ports/atmel-samd/common-hal/canio/Listener.h | 4 ++-- shared-bindings/canio/CAN.h | 1 + shared-bindings/canio/Listener.c | 29 ++++++---------------------- shared-bindings/canio/Listener.h | 12 ++++++++++++ 5 files changed, 22 insertions(+), 26 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/canio/Listener.c b/ports/atmel-samd/common-hal/canio/Listener.c index d21ebbb31..7137f806b 100644 --- a/ports/atmel-samd/common-hal/canio/Listener.c +++ b/ports/atmel-samd/common-hal/canio/Listener.c @@ -348,7 +348,7 @@ int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self) { return self->hw->RXFS.bit.F0FL; } -bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_message_obj_t *message) { +bool common_hal_canio_listener_receiveinto(canio_listener_obj_t *self, canio_message_obj_t *message) { if (!common_hal_canio_listener_in_waiting(self)) { uint64_t deadline = supervisor_ticks_ms64() + self->timeout_ms; do { diff --git a/ports/atmel-samd/common-hal/canio/Listener.h b/ports/atmel-samd/common-hal/canio/Listener.h index 1b81d82aa..10e1a5f8a 100644 --- a/ports/atmel-samd/common-hal/canio/Listener.h +++ b/ports/atmel-samd/common-hal/canio/Listener.h @@ -35,7 +35,7 @@ typedef struct { __IO CAN_RXF0A_Type RXFA; /**< \brief (R/W 32) Rx FIFO n Acknowledge */ } canio_rxfifo_reg_t; -typedef struct { +typedef struct canio_listener_obj { mp_obj_base_t base; canio_can_obj_t *can; canio_can_rx_fifo_t *fifo; @@ -47,7 +47,7 @@ typedef struct { void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout); void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self); void common_hal_canio_listener_deinit(canio_listener_obj_t *self); -bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_message_obj_t *message); +bool common_hal_canio_listener_receiveinto(canio_listener_obj_t *self, canio_message_obj_t *message); int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self); float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self); void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout); diff --git a/shared-bindings/canio/CAN.h b/shared-bindings/canio/CAN.h index 66c972c28..08166dfd4 100644 --- a/shared-bindings/canio/CAN.h +++ b/shared-bindings/canio/CAN.h @@ -28,6 +28,7 @@ #include "py/obj.h" #include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/canio/__init__.h" #include "shared-bindings/canio/Message.h" extern const mp_obj_type_t canio_can_type; diff --git a/shared-bindings/canio/Listener.c b/shared-bindings/canio/Listener.c index 1f4176f0c..5159c8481 100644 --- a/shared-bindings/canio/Listener.c +++ b/shared-bindings/canio/Listener.c @@ -38,44 +38,28 @@ //| Listen method of a canio.CAN object.""" //| -//| def read(self) -> Optional[Message]: +//| def receive(self) -> Optional[Message]: //| """Reads a message, after waiting up to self.timeout seconds //| //| If no message is received in time, None is returned. Otherwise, //| a Message is returned.""" //| ... //| -STATIC mp_obj_t canio_listener_read(mp_obj_t self_in) { +STATIC mp_obj_t canio_listener_receive(mp_obj_t self_in) { canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); common_hal_canio_listener_check_for_deinit(self); canio_message_obj_t *message = m_new_obj(canio_message_obj_t); message->base.type = &canio_message_type; - if (common_hal_canio_listener_readinto(self, message)) { + if (common_hal_canio_listener_receiveinto(self, message)) { return message; } else { m_free(message); // message did not escape into vm } return mp_const_none; } -STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_read_obj, canio_listener_read); - -//| def readinto(self, message: Message) -> bool: -//| """Returns True (and modifies message) if a message was received -//| before ``timeout`` seconds elapsed, False otherwise.""" -//| ... -//| -STATIC mp_obj_t canio_listener_readinto(mp_obj_t self_in, mp_obj_t message) { - canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_obj_type_t *type = mp_obj_get_type(message); - if (type != &canio_message_type) { - mp_raise_TypeError_varg(translate("expected '%q' but got '%q'"), MP_QSTR_Message, type->name); - } - common_hal_canio_listener_check_for_deinit(self); - return mp_obj_new_bool(common_hal_canio_listener_readinto(self, message)); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_2(canio_listener_readinto_obj, canio_listener_readinto); +STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_receive_obj, canio_listener_receive); //| def in_waiting(self) -> int: //| """Returns the number of messages waiting""" @@ -100,7 +84,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(canio_listener_in_waiting_obj, canio_listener_i //| ... //| STATIC mp_obj_t canio_iternext(mp_obj_t self_in) { - mp_obj_t result = canio_listener_read(self_in); + mp_obj_t result = canio_listener_receive(self_in); if (result == mp_const_none) { return MP_OBJ_STOP_ITERATION; } @@ -170,8 +154,7 @@ STATIC const mp_rom_map_elem_t canio_listener_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&canio_listener_exit_obj) }, { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&canio_listener_deinit_obj) }, { MP_ROM_QSTR(MP_QSTR_in_waiting), MP_ROM_PTR(&canio_listener_in_waiting_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&canio_listener_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&canio_listener_readinto_obj) }, + { MP_ROM_QSTR(MP_QSTR_receive), MP_ROM_PTR(&canio_listener_receive_obj) }, { MP_ROM_QSTR(MP_QSTR_timeout), MP_ROM_PTR(&canio_listener_timeout_obj) }, }; STATIC MP_DEFINE_CONST_DICT(canio_listener_locals_dict, canio_listener_locals_dict_table); diff --git a/shared-bindings/canio/Listener.h b/shared-bindings/canio/Listener.h index eaa3490df..d925fa265 100644 --- a/shared-bindings/canio/Listener.h +++ b/shared-bindings/canio/Listener.h @@ -27,5 +27,17 @@ #pragma once #include "py/obj.h" +#include "shared-bindings/canio/CAN.h" +#include "shared-bindings/canio/Match.h" extern const mp_obj_type_t canio_listener_type; + +typedef struct canio_listener_obj canio_listener_obj_t; + +void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout); +void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self); +void common_hal_canio_listener_deinit(canio_listener_obj_t *self); +bool common_hal_canio_listener_receiveinto(canio_listener_obj_t *self, canio_message_obj_t *message); +int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self); +float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self); +void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout); -- cgit v1.2.3 From 3e97e9c4be9798c5cd6d4a8a633bdadd3246577c Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Sat, 26 Sep 2020 09:35:48 -0500 Subject: canio: Listener: shuffle function declarations around --- ports/atmel-samd/common-hal/canio/Listener.c | 1 + ports/atmel-samd/common-hal/canio/Listener.h | 8 -------- 2 files changed, 1 insertion(+), 8 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/canio/Listener.c b/ports/atmel-samd/common-hal/canio/Listener.c index 7137f806b..483802fa4 100644 --- a/ports/atmel-samd/common-hal/canio/Listener.c +++ b/ports/atmel-samd/common-hal/canio/Listener.c @@ -32,6 +32,7 @@ #include "common-hal/canio/__init__.h" #include "common-hal/canio/Listener.h" +#include "shared-bindings/canio/Listener.h" #include "shared-bindings/util.h" #include "supervisor/shared/tick.h" #include "component/can.h" diff --git a/ports/atmel-samd/common-hal/canio/Listener.h b/ports/atmel-samd/common-hal/canio/Listener.h index 10e1a5f8a..237dca870 100644 --- a/ports/atmel-samd/common-hal/canio/Listener.h +++ b/ports/atmel-samd/common-hal/canio/Listener.h @@ -43,11 +43,3 @@ typedef struct canio_listener_obj { uint32_t timeout_ms; uint8_t fifo_idx; } canio_listener_obj_t; - -void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout); -void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self); -void common_hal_canio_listener_deinit(canio_listener_obj_t *self); -bool common_hal_canio_listener_receiveinto(canio_listener_obj_t *self, canio_message_obj_t *message); -int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self); -float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self); -void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout); -- cgit v1.2.3 From f4e36fc7f6719cb938b6e11b3e5242b149600d7d Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 28 Sep 2020 17:14:39 -0500 Subject: CAN: Use mp_obj_t insteaed of canio_message_obj_t, get rid of rtr field --- ports/atmel-samd/common-hal/canio/CAN.c | 8 +++++--- ports/atmel-samd/common-hal/canio/Listener.c | 12 +++++++----- shared-bindings/canio/CAN.h | 2 +- shared-bindings/canio/Listener.c | 14 ++++---------- shared-bindings/canio/Listener.h | 2 +- shared-module/canio/Message.c | 2 -- shared-module/canio/Message.h | 1 - shared-module/canio/RemoteTransmissionRequest.c | 1 - 8 files changed, 18 insertions(+), 24 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/canio/CAN.c b/ports/atmel-samd/common-hal/canio/CAN.c index 4f28698fb..ec6b75951 100644 --- a/ports/atmel-samd/common-hal/canio/CAN.c +++ b/ports/atmel-samd/common-hal/canio/CAN.c @@ -328,16 +328,18 @@ static void maybe_auto_restart(canio_can_obj_t *self) { } } -void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *message) +void common_hal_canio_can_send(canio_can_obj_t *self, mp_obj_t message_in) { maybe_auto_restart(self); + canio_message_obj_t *message = message_in;; // We have just one dedicated TX buffer, use it! canio_can_tx_buffer_t *ent = &self->state->tx_buffer[0]; + bool rtr = message->base.type == &canio_remote_transmission_request_type; ent->txb0.bit.ESI = false; ent->txb0.bit.XTD = message->extended; - ent->txb0.bit.RTR = message->rtr; + ent->txb0.bit.RTR = rtr; if (message->extended) { ent->txb0.bit.ID = message->id; } else { @@ -350,7 +352,7 @@ void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *messa ent->txb1.bit.BRS = 0; // No bit rate switching ent->txb1.bit.DLC = message->size; - if (!message->rtr) { + if (!rtr) { memcpy(ent->data, message->data, message->size); } diff --git a/ports/atmel-samd/common-hal/canio/Listener.c b/ports/atmel-samd/common-hal/canio/Listener.c index 483802fa4..b27c8cd1b 100644 --- a/ports/atmel-samd/common-hal/canio/Listener.c +++ b/ports/atmel-samd/common-hal/canio/Listener.c @@ -349,30 +349,32 @@ int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self) { return self->hw->RXFS.bit.F0FL; } -bool common_hal_canio_listener_receiveinto(canio_listener_obj_t *self, canio_message_obj_t *message) { +mp_obj_t common_hal_canio_listener_receive(canio_listener_obj_t *self) { if (!common_hal_canio_listener_in_waiting(self)) { uint64_t deadline = supervisor_ticks_ms64() + self->timeout_ms; do { if (supervisor_ticks_ms64() > deadline) { - return false; + return NULL; } } while (!common_hal_canio_listener_in_waiting(self)); } int index = self->hw->RXFS.bit.F0GI; canio_can_rx_fifo_t *hw_message = &self->fifo[index]; + bool rtr = hw_message->rxf0.bit.RTR; + canio_message_obj_t *message = m_new_obj(canio_message_obj_t); + message->base.type = rtr ? &canio_remote_transmission_request_type : &canio_message_type; message->extended = hw_message->rxf0.bit.XTD; if (message->extended) { message->id = hw_message->rxf0.bit.ID; } else { message->id = hw_message->rxf0.bit.ID >> 18; // short ids are left-justified } - message->rtr = hw_message->rxf0.bit.RTR; message->size = hw_message->rxf1.bit.DLC; - if (!message->rtr) { + if (!rtr) { memcpy(message->data, hw_message->data, message->size); } self->hw->RXFA.bit.F0AI = index; - return true; + return message; } void common_hal_canio_listener_deinit(canio_listener_obj_t *self) { diff --git a/shared-bindings/canio/CAN.h b/shared-bindings/canio/CAN.h index 08166dfd4..8d61bc8ed 100644 --- a/shared-bindings/canio/CAN.h +++ b/shared-bindings/canio/CAN.h @@ -51,5 +51,5 @@ void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool auto_rest void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self); void common_hal_canio_can_deinit(canio_can_obj_t *self); void common_hal_canio_can_restart(canio_can_obj_t *self); -void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *message); +void common_hal_canio_can_send(canio_can_obj_t *self, mp_obj_t message); void common_hal_canio_reset(void); diff --git a/shared-bindings/canio/Listener.c b/shared-bindings/canio/Listener.c index 7b0e59063..e5a9a2f83 100644 --- a/shared-bindings/canio/Listener.c +++ b/shared-bindings/canio/Listener.c @@ -49,17 +49,11 @@ STATIC mp_obj_t canio_listener_receive(mp_obj_t self_in) { canio_listener_obj_t *self = MP_OBJ_TO_PTR(self_in); common_hal_canio_listener_check_for_deinit(self); - canio_message_obj_t *message = m_new_obj(canio_message_obj_t); - - if (common_hal_canio_listener_receiveinto(self, message)) { - if (message->rtr) { - message->base.type = &canio_remote_transmission_request_type; - } else { - message->base.type = &canio_message_type; - } + mp_obj_t message = common_hal_canio_listener_receive(self); + // note: receive fills out the type field of the message + + if (message) { return message; - } else { - m_free(message); // message did not escape into vm } return mp_const_none; } diff --git a/shared-bindings/canio/Listener.h b/shared-bindings/canio/Listener.h index d925fa265..527ffe4cb 100644 --- a/shared-bindings/canio/Listener.h +++ b/shared-bindings/canio/Listener.h @@ -37,7 +37,7 @@ typedef struct canio_listener_obj canio_listener_obj_t; void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout); void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self); void common_hal_canio_listener_deinit(canio_listener_obj_t *self); -bool common_hal_canio_listener_receiveinto(canio_listener_obj_t *self, canio_message_obj_t *message); +mp_obj_t common_hal_canio_listener_receive(canio_listener_obj_t *self); int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self); float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self); void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout); diff --git a/shared-module/canio/Message.c b/shared-module/canio/Message.c index 34c2e61f7..a1df4f693 100644 --- a/shared-module/canio/Message.c +++ b/shared-module/canio/Message.c @@ -32,7 +32,6 @@ void common_hal_canio_message_construct(canio_message_obj_t *self, int id, void { self->id = id; self->size = size; - self->rtr = !data; self->extended = extended; if (data) { memcpy(self->data, data, size); @@ -57,7 +56,6 @@ const void *common_hal_canio_message_get_data(const canio_message_obj_t *self) const void common_hal_canio_message_set_data(canio_message_obj_t *self, const void *data, size_t size) { - self->rtr = false; self->size = size; memcpy(self->data, data, size); } diff --git a/shared-module/canio/Message.h b/shared-module/canio/Message.h index b99c5c48e..1ca0d42e2 100644 --- a/shared-module/canio/Message.h +++ b/shared-module/canio/Message.h @@ -33,6 +33,5 @@ typedef struct { int id; uint8_t data[8]; size_t size:4; - bool rtr:1; bool extended:1; } canio_message_obj_t; diff --git a/shared-module/canio/RemoteTransmissionRequest.c b/shared-module/canio/RemoteTransmissionRequest.c index 00c9334b0..9b4d5632f 100644 --- a/shared-module/canio/RemoteTransmissionRequest.c +++ b/shared-module/canio/RemoteTransmissionRequest.c @@ -33,7 +33,6 @@ void common_hal_canio_remote_transmission_request_construct(canio_remote_transmi { self->id = id; self->size = size; - self->rtr = true; self->extended = extended; } -- cgit v1.2.3 From 66d55738c1315b223d3e5ed6bc710f8b1e443836 Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Mon, 28 Sep 2020 16:49:20 -0700 Subject: Enable DNS info --- ports/esp32s2/common-hal/wifi/Radio.c | 14 ++++++++++++++ ports/esp32s2/common-hal/wifi/Radio.h | 1 + shared-bindings/wifi/Radio.c | 17 +++++++++++++++++ shared-bindings/wifi/Radio.h | 1 + 4 files changed, 33 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index ab6177859..0184793a1 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -192,6 +192,20 @@ mp_obj_t common_hal_wifi_radio_get_ipv4_address(wifi_radio_obj_t *self) { return common_hal_ipaddress_new_ipv4address(self->ip_info.ip.addr); } +mp_obj_t common_hal_wifi_radio_get_ipv4_dns(wifi_radio_obj_t *self) { + if (!esp_netif_is_netif_up(self->netif)) { + return mp_const_none; + } + + esp_netif_get_dns_info(self->netif, ESP_NETIF_DNS_MAIN, &self->dns_info); + + // dns_info is of type esp_netif_dns_info_t, which is just ever so slightly + // different than esp_netif_ip_info_t used for + // common_hal_wifi_radio_get_ipv4_address (includes both ipv4 and 6), + // so some extra jumping is required to get to the actual address + return common_hal_ipaddress_new_ipv4address(self->dns_info.ip.u_addr.ip4.addr); +} + mp_int_t common_hal_wifi_radio_ping(wifi_radio_obj_t *self, mp_obj_t ip_address, mp_float_t timeout) { esp_ping_config_t ping_config = ESP_PING_DEFAULT_CONFIG(); ipaddress_ipaddress_to_esp_idf(ip_address, &ping_config.target_addr); diff --git a/ports/esp32s2/common-hal/wifi/Radio.h b/ports/esp32s2/common-hal/wifi/Radio.h index ddcd9dc0d..7c0cb996d 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.h +++ b/ports/esp32s2/common-hal/wifi/Radio.h @@ -48,6 +48,7 @@ typedef struct { wifi_config_t sta_config; wifi_ap_record_t ap_info; esp_netif_ip_info_t ip_info; + esp_netif_dns_info_t dns_info; esp_netif_t *netif; bool started; bool ap_mode; diff --git a/shared-bindings/wifi/Radio.c b/shared-bindings/wifi/Radio.c index 6c4e6a4f6..8c556aafe 100644 --- a/shared-bindings/wifi/Radio.c +++ b/shared-bindings/wifi/Radio.c @@ -227,6 +227,22 @@ const mp_obj_property_t wifi_radio_ipv4_address_obj = { (mp_obj_t)&mp_const_none_obj }, }; +//| ipv4_dns: Optional[ipaddress.IPv4Address] +//| """IP v4 Address of the DNS server in use when connected to an access point. None otherwise.""" +//| +STATIC mp_obj_t wifi_radio_get_ipv4_dns(mp_obj_t self) { + return common_hal_wifi_radio_get_ipv4_dns(self); + +} +MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ipv4_dns_obj, wifi_radio_get_ipv4_dns); + +const mp_obj_property_t wifi_radio_ipv4_dns_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&wifi_radio_get_ipv4_dns_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + //| def ping(self, ip, *, timeout: float = 0.5) -> float: //| """Ping an IP to test connectivity. Returns echo time in seconds. //| Returns None when it times out.""" @@ -268,6 +284,7 @@ STATIC const mp_rom_map_elem_t wifi_radio_locals_dict_table[] = { // { MP_ROM_QSTR(MP_QSTR_connect_to_enterprise), MP_ROM_PTR(&wifi_radio_connect_to_enterprise_obj) }, { MP_ROM_QSTR(MP_QSTR_ap_rssi), MP_ROM_PTR(&wifi_radio_ap_rssi_obj) }, + { MP_ROM_QSTR(MP_QSTR_ipv4_dns), MP_ROM_PTR(&wifi_radio_ipv4_dns_obj) }, { MP_ROM_QSTR(MP_QSTR_ipv4_gateway), MP_ROM_PTR(&wifi_radio_ipv4_gateway_obj) }, { MP_ROM_QSTR(MP_QSTR_ipv4_subnet), MP_ROM_PTR(&wifi_radio_ipv4_subnet_obj) }, { MP_ROM_QSTR(MP_QSTR_ipv4_address), MP_ROM_PTR(&wifi_radio_ipv4_address_obj) }, diff --git a/shared-bindings/wifi/Radio.h b/shared-bindings/wifi/Radio.h index 3c8ecbebd..fd0807a86 100644 --- a/shared-bindings/wifi/Radio.h +++ b/shared-bindings/wifi/Radio.h @@ -54,6 +54,7 @@ extern void common_hal_wifi_radio_stop_scanning_networks(wifi_radio_obj_t *self) extern wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout, uint8_t* bssid, size_t bssid_len); extern mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self); +extern mp_obj_t common_hal_wifi_radio_get_ipv4_dns(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ipv4_subnet(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ipv4_address(wifi_radio_obj_t *self); -- cgit v1.2.3 From 726dcdb60aa84b5070e5484a19e896abdaffeb93 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 24 Sep 2020 11:20:32 -0500 Subject: Add some NORETURN attributes I have a function where it should be impossible to reach the end, so I put in a safe-mode reset at the bottom: ``` int find_unused_slot(void) { // precondition: you already verified that a slot was available for (int i=0; i #include +#include "py/mpconfig.h" + // Copied from inc/uf2.h in https://github.com/Microsoft/uf2-samd21 #define DBL_TAP_MAGIC 0xf01669ef // Randomly selected, adjusted to have first and last bit set #define DBL_TAP_MAGIC_QUICK_BOOT 0xf02669ef extern uint32_t _bootloader_dbl_tap; -void reset_to_bootloader(void); -void reset(void); +void reset_to_bootloader(void) NORETURN; +void reset(void) NORETURN; bool bootloader_available(void); #endif // MICROPY_INCLUDED_ATMEL_SAMD_RESET_H diff --git a/ports/cxd56/supervisor/port.c b/ports/cxd56/supervisor/port.c index 6164f7411..92d335cd5 100644 --- a/ports/cxd56/supervisor/port.c +++ b/ports/cxd56/supervisor/port.c @@ -71,6 +71,8 @@ safe_mode_t port_init(void) { void reset_cpu(void) { boardctl(BOARDIOC_RESET, 0); + for (;;) { + } } void reset_port(void) { @@ -91,6 +93,9 @@ void reset_port(void) { } void reset_to_bootloader(void) { + boardctl(BOARDIOC_RESET, 0); + for (;;) { + } } supervisor_allocation* port_fixed_stack(void) { diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c index 3de63278d..60331d08e 100644 --- a/ports/esp32s2/supervisor/port.c +++ b/ports/esp32s2/supervisor/port.c @@ -121,6 +121,7 @@ void reset_to_bootloader(void) { } void reset_cpu(void) { + esp_restart(); } uint32_t *port_heap_get_bottom(void) { diff --git a/ports/litex/supervisor/port.c b/ports/litex/supervisor/port.c index 3125072e6..e55eb49f0 100644 --- a/ports/litex/supervisor/port.c +++ b/ports/litex/supervisor/port.c @@ -85,9 +85,17 @@ void reset_port(void) { void reset_to_bootloader(void) { reboot_ctrl_write(0xac); + for(;;) {} } void reset_cpu(void) { + // "You can reset Fomu by writing a special value to the CSR_REBOOT_CTRL + // register at 0xe0006000L. All writes to this register must start with + // 0xac, to ensure random values aren’t written. We can reboot Fomu by + // simply writing this value" -- + // https://workshop.fomu.im/en/latest/riscv.html + reboot_ctrl_write(0xac); + for(;;) {} } supervisor_allocation* port_fixed_stack(void) { diff --git a/ports/mimxrt10xx/reset.h b/ports/mimxrt10xx/reset.h index dc3106cf0..c7569202c 100644 --- a/ports/mimxrt10xx/reset.h +++ b/ports/mimxrt10xx/reset.h @@ -34,8 +34,8 @@ #define DBL_TAP_MAGIC 0xf01669ef // Randomly selected, adjusted to have first and last bit set #define DBL_TAP_MAGIC_QUICK_BOOT 0xf02669ef -void reset_to_bootloader(void); -void reset(void); +void reset_to_bootloader(void) NORETURN; +void reset(void) NORETURN; bool bootloader_available(void); #endif // MICROPY_INCLUDED_MIMXRT10XX_RESET_H diff --git a/ports/nrf/supervisor/port.c b/ports/nrf/supervisor/port.c index 2945f244d..bc8b47be7 100644 --- a/ports/nrf/supervisor/port.c +++ b/ports/nrf/supervisor/port.c @@ -234,6 +234,8 @@ void reset_cpu(void) { uint32_t ticks = nrfx_rtc_counter_get(&rtc_instance); overflow_tracker.overflowed_ticks += ticks / 32; NVIC_SystemReset(); + for (;;) { + } } // The uninitialized data section is placed directly after BSS, under the theory diff --git a/ports/stm/supervisor/port.c b/ports/stm/supervisor/port.c index e21105001..bb304a317 100644 --- a/ports/stm/supervisor/port.c +++ b/ports/stm/supervisor/port.c @@ -56,6 +56,8 @@ #include STM32_HAL_H +void NVIC_SystemReset(void) NORETURN; + #if (CPY_STM32H7) || (CPY_STM32F7) // Device memories must be accessed in order. @@ -247,7 +249,7 @@ void reset_port(void) { } void reset_to_bootloader(void) { - + NVIC_SystemReset(); } void reset_cpu(void) { diff --git a/supervisor/port.h b/supervisor/port.h index ddb96bd52..f5b3c15d1 100644 --- a/supervisor/port.h +++ b/supervisor/port.h @@ -44,7 +44,7 @@ extern uint32_t _ebss; safe_mode_t port_init(void); // Reset the microcontroller completely. -void reset_cpu(void); +void reset_cpu(void) NORETURN; // Reset the microcontroller state. void reset_port(void); @@ -53,7 +53,7 @@ void reset_port(void); void reset_board(void); // Reset to the bootloader -void reset_to_bootloader(void); +void reset_to_bootloader(void) NORETURN; // Get stack limit address uint32_t *port_stack_get_limit(void); diff --git a/supervisor/shared/safe_mode.h b/supervisor/shared/safe_mode.h index 7d3cd63b5..34fc3c8ae 100644 --- a/supervisor/shared/safe_mode.h +++ b/supervisor/shared/safe_mode.h @@ -27,6 +27,8 @@ #ifndef MICROPY_INCLUDED_SUPERVISOR_SAFE_MODE_H #define MICROPY_INCLUDED_SUPERVISOR_SAFE_MODE_H +#include "py/mpconfig.h" + typedef enum { NO_SAFE_MODE = 0, BROWNOUT, @@ -48,7 +50,7 @@ typedef enum { safe_mode_t wait_for_safe_mode_reset(void); void safe_mode_on_next_reset(safe_mode_t reason); -void reset_into_safe_mode(safe_mode_t reason); +void reset_into_safe_mode(safe_mode_t reason) NORETURN; void print_safe_mode_message(safe_mode_t reason); diff --git a/supervisor/stub/safe_mode.c b/supervisor/stub/safe_mode.c index 8072be2c6..a70ac6b6d 100644 --- a/supervisor/stub/safe_mode.c +++ b/supervisor/stub/safe_mode.c @@ -26,14 +26,15 @@ #include "supervisor/shared/safe_mode.h" +#include + safe_mode_t wait_for_safe_mode_reset(void) { return NO_SAFE_MODE; } void reset_into_safe_mode(safe_mode_t reason) { (void) reason; - for (;;) { - } + abort(); } void print_safe_mode_message(safe_mode_t reason) { -- cgit v1.2.3 From 1dbb59271c6086fa26088c9672be19bb1f66cdfd Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Fri, 25 Sep 2020 13:28:04 -0500 Subject: esp32: Use esp_restart from reset_to_bootloader; redeclare it NORETURN --- ports/esp32s2/supervisor/port.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c index 60331d08e..8b41076e1 100644 --- a/ports/esp32s2/supervisor/port.c +++ b/ports/esp32s2/supervisor/port.c @@ -56,6 +56,8 @@ uint32_t heap_size; STATIC esp_timer_handle_t _tick_timer; +extern void esp_restart(void) NORETURN; + void tick_timer_cb(void* arg) { supervisor_tick(); } @@ -118,6 +120,7 @@ void reset_port(void) { } void reset_to_bootloader(void) { + esp_restart(); } void reset_cpu(void) { -- cgit v1.2.3 From dd6e7f5a8afa9d089e1be7f5a5a8110e0044dbd7 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Fri, 25 Sep 2020 13:29:58 -0500 Subject: mimxrt10xx: Add required header for NORETURN definition --- ports/mimxrt10xx/reset.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'ports') diff --git a/ports/mimxrt10xx/reset.h b/ports/mimxrt10xx/reset.h index c7569202c..ea56df02a 100644 --- a/ports/mimxrt10xx/reset.h +++ b/ports/mimxrt10xx/reset.h @@ -30,6 +30,8 @@ #include #include +#include "py/mpconfig.h" + // Copied from inc/uf2.h in https://github.com/Microsoft/uf2-samd21 #define DBL_TAP_MAGIC 0xf01669ef // Randomly selected, adjusted to have first and last bit set #define DBL_TAP_MAGIC_QUICK_BOOT 0xf02669ef -- cgit v1.2.3 From 2a4a244245e3e03bfb89dcc49e56e83b71291bb2 Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Mon, 28 Sep 2020 17:25:09 -0700 Subject: Add ap_ssid and ap_bssid --- ports/esp32s2/common-hal/wifi/Radio.c | 39 +++++++++++++++++++++++++++++++++-- shared-bindings/wifi/Radio.c | 34 ++++++++++++++++++++++++++++++ shared-bindings/wifi/Radio.h | 2 ++ 3 files changed, 73 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index 0184793a1..019e8316c 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -38,6 +38,8 @@ #include "esp-idf/components/esp_wifi/include/esp_wifi.h" #include "esp-idf/components/lwip/include/apps/ping/ping_sock.h" +#define MAC_ADDRESS_LENGTH 6 + static void start_station(wifi_radio_obj_t *self) { if (self->sta_mode) { return; @@ -73,8 +75,6 @@ void common_hal_wifi_radio_set_enabled(wifi_radio_obj_t *self, bool enabled) { } } -#define MAC_ADDRESS_LENGTH 6 - mp_obj_t common_hal_wifi_radio_get_mac_address(wifi_radio_obj_t *self) { uint8_t mac[MAC_ADDRESS_LENGTH]; esp_wifi_get_mac(ESP_IF_WIFI_STA, mac); @@ -168,6 +168,41 @@ mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self) { } } +mp_obj_t common_hal_wifi_radio_get_ap_ssid(wifi_radio_obj_t *self) { + if (!esp_netif_is_netif_up(self->netif)) { + return mp_const_none; + } + + // Make sure the interface is in STA mode + if (self->sta_mode){ + return mp_const_none; + } + + if (esp_wifi_sta_get_ap_info(&self->ap_info) != ESP_OK){ + return mp_const_none; + } else { + const char* cstr = (const char*) self->ap_info.ssid; + return mp_obj_new_str(cstr, strlen(cstr)); + } +} + +mp_obj_t common_hal_wifi_radio_get_ap_bssid(wifi_radio_obj_t *self) { + if (!esp_netif_is_netif_up(self->netif)) { + return mp_const_none; + } + + // Make sure the interface is in STA mode + if (self->sta_mode){ + return mp_const_none; + } + + if (esp_wifi_sta_get_ap_info(&self->ap_info) != ESP_OK){ + return mp_const_none; + } else { + return mp_obj_new_bytes(self->ap_info.bssid, MAC_ADDRESS_LENGTH); + } +} + mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self) { if (!esp_netif_is_netif_up(self->netif)) { return mp_const_none; diff --git a/shared-bindings/wifi/Radio.c b/shared-bindings/wifi/Radio.c index 8c556aafe..96abadf6f 100644 --- a/shared-bindings/wifi/Radio.c +++ b/shared-bindings/wifi/Radio.c @@ -179,6 +179,38 @@ const mp_obj_property_t wifi_radio_ap_rssi_obj = { (mp_obj_t)&mp_const_none_obj }, }; +//| ap_ssid: int +//| """SSID of the currently connected AP. Returns none if not connected""" +//| +STATIC mp_obj_t wifi_radio_get_ap_ssid(mp_obj_t self) { + return common_hal_wifi_radio_get_ap_ssid(self); + +} +MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ap_ssid_obj, wifi_radio_get_ap_ssid); + +const mp_obj_property_t wifi_radio_ap_ssid_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&wifi_radio_get_ap_ssid_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + +//| ap_bssid: int +//| """BSSID (usually MAC) of the currently connected AP. Returns none if not connected""" +//| +STATIC mp_obj_t wifi_radio_get_ap_bssid(mp_obj_t self) { + return common_hal_wifi_radio_get_ap_bssid(self); + +} +MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ap_bssid_obj, wifi_radio_get_ap_bssid); + +const mp_obj_property_t wifi_radio_ap_bssid_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&wifi_radio_get_ap_bssid_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + //| ipv4_gateway: Optional[ipaddress.IPv4Address] //| """IP v4 Address of the gateway when connected to an access point. None otherwise.""" //| @@ -284,6 +316,8 @@ STATIC const mp_rom_map_elem_t wifi_radio_locals_dict_table[] = { // { MP_ROM_QSTR(MP_QSTR_connect_to_enterprise), MP_ROM_PTR(&wifi_radio_connect_to_enterprise_obj) }, { MP_ROM_QSTR(MP_QSTR_ap_rssi), MP_ROM_PTR(&wifi_radio_ap_rssi_obj) }, + { MP_ROM_QSTR(MP_QSTR_ap_ssid), MP_ROM_PTR(&wifi_radio_ap_ssid_obj) }, + { MP_ROM_QSTR(MP_QSTR_ap_bssid), MP_ROM_PTR(&wifi_radio_ap_bssid_obj) }, { MP_ROM_QSTR(MP_QSTR_ipv4_dns), MP_ROM_PTR(&wifi_radio_ipv4_dns_obj) }, { MP_ROM_QSTR(MP_QSTR_ipv4_gateway), MP_ROM_PTR(&wifi_radio_ipv4_gateway_obj) }, { MP_ROM_QSTR(MP_QSTR_ipv4_subnet), MP_ROM_PTR(&wifi_radio_ipv4_subnet_obj) }, diff --git a/shared-bindings/wifi/Radio.h b/shared-bindings/wifi/Radio.h index fd0807a86..bf30ac340 100644 --- a/shared-bindings/wifi/Radio.h +++ b/shared-bindings/wifi/Radio.h @@ -54,6 +54,8 @@ extern void common_hal_wifi_radio_stop_scanning_networks(wifi_radio_obj_t *self) extern wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout, uint8_t* bssid, size_t bssid_len); extern mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self); +extern mp_obj_t common_hal_wifi_radio_get_ap_ssid(wifi_radio_obj_t *self); +extern mp_obj_t common_hal_wifi_radio_get_ap_bssid(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ipv4_dns(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ipv4_subnet(wifi_radio_obj_t *self); -- cgit v1.2.3 From 4c7d9e3aafbde08399d9839d6cde968f4d1ae005 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Tue, 29 Sep 2020 11:14:30 +0530 Subject: Update make translate script --- Makefile | 7 +- locale/circuitpython.pot | 139 ++++++++++++++++++--- .../circuitplayground_express/mpconfigboard.h | 2 +- .../mpconfigboard.h | 2 +- .../mpconfigboard.h | 2 +- .../boards/escornabot_makech/mpconfigboard.h | 2 +- ports/atmel-samd/boards/meowmeow/mpconfigboard.h | 2 +- .../boards/electroniccats_bastwifi/mpconfigboard.h | 2 +- .../boards/espressif_kaluga_1/mpconfigboard.h | 2 +- .../boards/espressif_saola_1_wroom/mpconfigboard.h | 2 +- .../espressif_saola_1_wrover/mpconfigboard.h | 2 +- .../boards/microdev_micro_s2/mpconfigboard.h | 2 +- .../boards/muselab_nanoesp32_s2/mpconfigboard.h | 4 + .../unexpectedmaker_feathers2/mpconfigboard.h | 2 +- supervisor/shared/safe_mode.c | 4 +- 15 files changed, 145 insertions(+), 31 deletions(-) (limited to 'ports') diff --git a/Makefile b/Makefile index d016b770f..e7b2bb044 100644 --- a/Makefile +++ b/Makefile @@ -40,7 +40,8 @@ ALLSPHINXOPTS = -d $(BUILDDIR)/doctrees $(BASEOPTS) # the i18n builder cannot share the environment and doctrees with the others I18NSPHINXOPTS = $(BASEOPTS) -TRANSLATE_SOURCES = extmod lib main.c ports/atmel-samd ports/cxd56 ports/mimxrt10xx ports/nrf ports/stm py shared-bindings shared-module supervisor +TRANSLATE_SOURCES = extmod lib main.c ports/atmel-samd ports/cxd56 ports/esp32s2 ports/mimxrt10xx ports/nrf ports/stm py shared-bindings shared-module supervisor +TRANSLATE_SOURCES_EXC = -path ports/*/build-* -o -path ports/esp32s2/esp-idf .PHONY: help clean html dirhtml singlehtml pickle json htmlhelp qthelp devhelp epub latex latexpdf text man changes linkcheck doctest gettext stubs @@ -210,7 +211,7 @@ pseudoxml: all-source: locale/circuitpython.pot: all-source - find $(TRANSLATE_SOURCES) -iname "*.c" -print | (LC_ALL=C sort) | xgettext -f- -L C -s --add-location=file --keyword=translate -o circuitpython.pot -p locale + find $(TRANSLATE_SOURCES) -type d \( $(TRANSLATE_SOURCES_EXC) \) -prune -o -type f \( -iname "*.c" -o -iname "*.h" \) -print | (LC_ALL=C sort) | xgettext -f- -L C -s --add-location=file --keyword=translate -o circuitpython.pot -p locale # Historically, `make translate` updated the .pot file and ran msgmerge. # However, this was a frequent source of merge conflicts. Weblate can perform @@ -235,7 +236,7 @@ merge-translate: .PHONY: check-translate check-translate: - find $(TRANSLATE_SOURCES) -iname "*.c" -print | (LC_ALL=C sort) | xgettext -f- -L C -s --add-location=file --keyword=translate -o circuitpython.pot.tmp -p locale + find $(TRANSLATE_SOURCES) -type d \( $(TRANSLATE_SOURCES_EXC) \) -prune -o -type f \( -iname "*.c" -o -iname "*.h" \) -print | (LC_ALL=C sort) | xgettext -f- -L C -s --add-location=file --keyword=translate -o circuitpython.pot.tmp -p locale $(PYTHON) tools/check_translations.py locale/circuitpython.pot.tmp locale/circuitpython.pot; status=$$?; rm -f locale/circuitpython.pot.tmp; exit $$status stubs: diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 2b395356c..b6de5667e 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-09-24 16:55-0500\n" +"POT-Creation-Date: 2020-09-29 11:11+0530\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -280,7 +280,7 @@ msgstr "" msgid "Address type out of range" msgstr "" -#: ports/nrf/common-hal/busio/I2C.c +#: ports/esp32s2/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "All I2C peripherals are in use" msgstr "" @@ -288,11 +288,11 @@ msgstr "" msgid "All RX FIFOs in use" msgstr "" -#: ports/nrf/common-hal/busio/SPI.c +#: ports/esp32s2/common-hal/busio/SPI.c ports/nrf/common-hal/busio/SPI.c msgid "All SPI peripherals are in use" msgstr "" -#: ports/nrf/common-hal/busio/UART.c +#: ports/esp32s2/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "All UART peripherals are in use" msgstr "" @@ -314,6 +314,9 @@ msgstr "" #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/atmel-samd/common-hal/pulseio/PulseOut.c #: ports/cxd56/common-hal/pulseio/PulseOut.c +#: ports/esp32s2/common-hal/neopixel_write/__init__.c +#: ports/esp32s2/common-hal/pulseio/PulseIn.c +#: ports/esp32s2/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c #: ports/stm/peripherals/timers.c shared-bindings/pwmio/PWMOut.c @@ -333,6 +336,10 @@ msgstr "" msgid "Already running" msgstr "" +#: ports/esp32s2/common-hal/wifi/Radio.c +msgid "Already scanning for wifi networks" +msgstr "" + #: ports/cxd56/common-hal/analogio/AnalogIn.c msgid "AnalogIn not supported on given pin" msgstr "" @@ -550,6 +557,7 @@ msgstr "" msgid "Cannot set value when direction is input." msgstr "" +#: ports/esp32s2/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "Cannot specify RTS or CTS in RS485 mode" msgstr "" @@ -640,14 +648,15 @@ msgid "Could not initialize SDCard" msgstr "" #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c +#: ports/esp32s2/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "" -#: ports/stm/common-hal/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/pwmio/PWMOut.c ports/stm/common-hal/pwmio/PWMOut.c msgid "Could not initialize channel" msgstr "" -#: ports/stm/common-hal/pwmio/PWMOut.c +#: ports/esp32s2/common-hal/pwmio/PWMOut.c ports/stm/common-hal/pwmio/PWMOut.c msgid "Could not initialize timer" msgstr "" @@ -663,6 +672,10 @@ msgstr "" msgid "Could not restart PWM" msgstr "" +#: ports/esp32s2/common-hal/neopixel_write/__init__.c +msgid "Could not retrieve clock" +msgstr "" + #: shared-bindings/_bleio/Adapter.c msgid "Could not set address" msgstr "" @@ -753,6 +766,10 @@ msgstr "" msgid "ECB only operates on 16 bytes at a time" msgstr "" +#: ports/esp32s2/common-hal/busio/SPI.c +msgid "ESP-IDF memory allocation failed" +msgstr "" + #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/ps2io/Ps2.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -810,6 +827,10 @@ msgstr "" msgid "FFT is defined for ndarrays only" msgstr "" +#: ports/esp32s2/common-hal/socketpool/Socket.c +msgid "Failed SSL handshake" +msgstr "" + #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "" @@ -826,12 +847,21 @@ msgstr "" #: ports/atmel-samd/common-hal/busio/UART.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c +#: ports/esp32s2/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c #: ports/stm/common-hal/pulseio/PulseIn.c #, c-format msgid "Failed to allocate RX buffer of %d bytes" msgstr "" +#: ports/esp32s2/common-hal/wifi/__init__.c +msgid "Failed to allocate Wifi memory" +msgstr "" + +#: ports/esp32s2/common-hal/wifi/ScannedNetworks.c +msgid "Failed to allocate wifi scan memory" +msgstr "" + #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: internal error" msgstr "" @@ -840,6 +870,10 @@ msgstr "" msgid "Failed to connect: timeout" msgstr "" +#: ports/esp32s2/common-hal/wifi/__init__.c +msgid "Failed to init wifi" +msgstr "" + #: shared-module/audiomp3/MP3Decoder.c msgid "Failed to parse MP3 file" msgstr "" @@ -933,7 +967,7 @@ msgstr "" msgid "Input taking too long" msgstr "" -#: py/moduerrno.c +#: ports/esp32s2/common-hal/neopixel_write/__init__.c py/moduerrno.c msgid "Input/output error" msgstr "" @@ -1026,6 +1060,10 @@ msgstr "" msgid "Invalid format chunk size" msgstr "" +#: ports/esp32s2/common-hal/pwmio/PWMOut.c +msgid "Invalid frequency" +msgstr "" + #: ports/stm/common-hal/pwmio/PWMOut.c msgid "Invalid frequency supplied" msgstr "" @@ -1063,6 +1101,8 @@ msgstr "" #: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c #: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/esp32s2/common-hal/busio/I2C.c ports/esp32s2/common-hal/busio/SPI.c +#: ports/esp32s2/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c @@ -1194,21 +1234,25 @@ msgstr "" msgid "No DMA channel found" msgstr "" -#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +#: ports/esp32s2/common-hal/busio/SPI.c ports/mimxrt10xx/common-hal/busio/SPI.c +#: ports/stm/common-hal/busio/SPI.c msgid "No MISO Pin" msgstr "" -#: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c +#: ports/esp32s2/common-hal/busio/SPI.c ports/mimxrt10xx/common-hal/busio/SPI.c +#: ports/stm/common-hal/busio/SPI.c msgid "No MOSI Pin" msgstr "" #: ports/atmel-samd/common-hal/busio/UART.c +#: ports/esp32s2/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c #: ports/stm/common-hal/busio/UART.c msgid "No RX pin" msgstr "" #: ports/atmel-samd/common-hal/busio/UART.c +#: ports/esp32s2/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c #: ports/stm/common-hal/busio/UART.c msgid "No TX pin" @@ -1251,6 +1295,14 @@ msgstr "" msgid "No long integer support" msgstr "" +#: ports/esp32s2/common-hal/pwmio/PWMOut.c +msgid "No more channels available" +msgstr "" + +#: ports/esp32s2/common-hal/pwmio/PWMOut.c +msgid "No more timers available" +msgstr "" + #: ports/stm/common-hal/pwmio/PWMOut.c msgid "No more timers available on this pin." msgstr "" @@ -1314,6 +1366,14 @@ msgstr "" msgid "Only 8 or 16 bit mono with " msgstr "" +#: ports/esp32s2/common-hal/socketpool/SocketPool.c +msgid "Only IPv4 SOCK_STREAM sockets supported" +msgstr "" + +#: ports/esp32s2/common-hal/wifi/__init__.c +msgid "Only IPv4 addresses supported" +msgstr "" + #: shared-module/displayio/OnDiskBitmap.c #, c-format msgid "" @@ -1331,6 +1391,10 @@ msgstr "" msgid "Only raw int supported for ip" msgstr "" +#: ports/esp32s2/common-hal/socketpool/SocketPool.c +msgid "Out of sockets" +msgstr "" + #: shared-bindings/audiobusio/PDMIn.c msgid "Oversample must be multiple of 8." msgstr "" @@ -1345,6 +1409,7 @@ msgid "" "PWM frequency not writable when variable_frequency is False on construction." msgstr "" +#: ports/esp32s2/common-hal/displayio/ParallelBus.c #: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c #: ports/stm/common-hal/displayio/ParallelBus.c msgid "ParallelBus not yet supported" @@ -1390,6 +1455,12 @@ msgstr "" msgid "Polygon needs at least 3 points" msgstr "" +#: ports/esp32s2/common-hal/pulseio/PulseOut.c +msgid "" +"Port does not accept PWM carrier. Pass a pin, frequency and duty cycle " +"instead" +msgstr "" + #: ports/atmel-samd/common-hal/pulseio/PulseOut.c #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/pulseio/PulseOut.c @@ -1419,12 +1490,13 @@ msgstr "" msgid "RNG Init Error" msgstr "" +#: ports/esp32s2/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "RS485 inversion specified when not in RS485 mode" msgstr "" -#: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c -#: ports/nrf/common-hal/rtc/RTC.c +#: ports/cxd56/common-hal/rtc/RTC.c ports/esp32s2/common-hal/rtc/RTC.c +#: ports/mimxrt10xx/common-hal/rtc/RTC.c ports/nrf/common-hal/rtc/RTC.c msgid "RTC calibration is not supported on this board" msgstr "" @@ -1478,7 +1550,7 @@ msgstr "" msgid "SD card CSD format not supported" msgstr "" -#: ports/atmel-samd/common-hal/busio/I2C.c +#: ports/atmel-samd/common-hal/busio/I2C.c ports/esp32s2/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" msgstr "" @@ -1546,6 +1618,10 @@ msgstr "" msgid "Slices not supported" msgstr "" +#: ports/esp32s2/common-hal/socketpool/SocketPool.c +msgid "SocketPool can only be used with wifi.radio" +msgstr "" + #: shared-bindings/aesio/aes.c msgid "Source and destination buffers must be the same length" msgstr "" @@ -1708,6 +1784,10 @@ msgstr "" msgid "Unable to allocate buffers for signed conversion" msgstr "" +#: ports/esp32s2/common-hal/busio/I2C.c +msgid "Unable to create lock" +msgstr "" + #: shared-module/displayio/I2CDisplay.c #, c-format msgid "Unable to find I2C Display at %x" @@ -1734,6 +1814,11 @@ msgstr "" msgid "Unexpected nrfx uuid type" msgstr "" +#: ports/esp32s2/common-hal/socketpool/Socket.c +#, c-format +msgid "Unhandled ESP TLS error %d %d %x %d" +msgstr "" + #: shared-bindings/wifi/Radio.c msgid "Unknown failure" msgstr "" @@ -1769,7 +1854,7 @@ msgid "" msgstr "" #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c -#: ports/stm/common-hal/busio/I2C.c +#: ports/esp32s2/common-hal/busio/UART.c ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "" @@ -2009,6 +2094,7 @@ msgid "byteorder is not a string" msgstr "" #: ports/atmel-samd/common-hal/busio/UART.c +#: ports/esp32s2/common-hal/busio/UART.c msgid "bytes > 8 bits not supported" msgstr "" @@ -2523,7 +2609,7 @@ msgstr "" msgid "index is out of bounds" msgstr "" -#: py/obj.c +#: ports/esp32s2/common-hal/pulseio/PulseIn.c py/obj.c msgid "index out of range" msgstr "" @@ -3026,6 +3112,10 @@ msgstr "" msgid "polygon can only be registered in one parent" msgstr "" +#: ports/esp32s2/common-hal/pulseio/PulseIn.c +msgid "pop from an empty PulseIn" +msgstr "" + #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c @@ -3042,6 +3132,24 @@ msgstr "" msgid "pow() with 3 arguments requires integers" msgstr "" +#: ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h +#: ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h +#: ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h +#: ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h +#: ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h +#: ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h +#: ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h +msgid "pressing boot button at start up.\n" +msgstr "" + +#: ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h +#: ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h +#: ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h +#: ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h +#: ports/atmel-samd/boards/meowmeow/mpconfigboard.h +msgid "pressing both buttons at start up.\n" +msgstr "" + #: extmod/modutimeq.c msgid "queue overflow" msgstr "" @@ -3284,7 +3392,8 @@ msgstr "" msgid "tuple/list has wrong length" msgstr "" -#: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c +#: ports/atmel-samd/common-hal/busio/UART.c +#: ports/esp32s2/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c #: shared-bindings/busio/UART.c shared-bindings/canio/CAN.c msgid "tx and rx cannot both be None" msgstr "" diff --git a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h index 54789f04f..4321335e5 100644 --- a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h @@ -25,7 +25,7 @@ #define CALIBRATE_CRYSTALLESS 1 // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up.\n" +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing both buttons at start up.\n") // Increase stack size slightly due to CPX library import nesting #define CIRCUITPY_DEFAULT_STACK_SIZE (4248) //divisible by 8 diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h index e377275b7..5673be290 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h @@ -27,7 +27,7 @@ #define USER_NEOPIXELS_PIN (&pin_PB23) // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up.\n" +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing both buttons at start up.\n") // Increase stack size slightly due to CPX library import nesting #define CIRCUITPY_DEFAULT_STACK_SIZE (4248) // divisible by 8 diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h index cacbed0de..fab235149 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.h @@ -25,7 +25,7 @@ #define CALIBRATE_CRYSTALLESS 1 // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up.\n" +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing both buttons at start up.\n") // Increase stack size slightly due to CPX library import nesting. #define CIRCUITPY_DEFAULT_STACK_SIZE (4248) // divisible by 8 diff --git a/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h b/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h index ac1add545..c4c8c4f3c 100644 --- a/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h +++ b/ports/atmel-samd/boards/escornabot_makech/mpconfigboard.h @@ -11,7 +11,7 @@ #define CALIBRATE_CRYSTALLESS 1 // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up.\n" +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing both buttons at start up.\n") #define DEFAULT_I2C_BUS_SCL (&pin_PA08) #define DEFAULT_I2C_BUS_SDA (&pin_PA09) diff --git a/ports/atmel-samd/boards/meowmeow/mpconfigboard.h b/ports/atmel-samd/boards/meowmeow/mpconfigboard.h index 79d477cac..7bbbf3322 100644 --- a/ports/atmel-samd/boards/meowmeow/mpconfigboard.h +++ b/ports/atmel-samd/boards/meowmeow/mpconfigboard.h @@ -11,7 +11,7 @@ #define CALIBRATE_CRYSTALLESS 1 // Explanation of how a user got into safe mode. -#define BOARD_USER_SAFE_MODE_ACTION "pressing both buttons at start up.\n" +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing both buttons at start up.\n") #define DEFAULT_I2C_BUS_SCL (&pin_PA01) #define DEFAULT_I2C_BUS_SDA (&pin_PA00) diff --git a/ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h b/ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h index 2af3515f4..1ec61e946 100644 --- a/ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h +++ b/ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h @@ -31,6 +31,6 @@ #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) -#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n") #define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h b/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h index a4c8e6576..2c0f175ab 100644 --- a/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h +++ b/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h @@ -33,6 +33,6 @@ #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) -#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n") #define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h index 335aaeb5e..3f628c0f1 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h +++ b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h @@ -33,6 +33,6 @@ #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) -#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n") #define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h index d3ef8bb26..961522891 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h +++ b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h @@ -33,6 +33,6 @@ #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) -#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n") #define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h index c138c8ed1..b87b5dfa0 100644 --- a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h +++ b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h @@ -35,6 +35,6 @@ #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) -#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n") #define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h b/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h index 5a165decc..6b05ac06f 100644 --- a/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h +++ b/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h @@ -31,4 +31,8 @@ #define MICROPY_HW_NEOPIXEL (&pin_GPIO18) +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n") + #define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h index a65d00206..e5fed4e32 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h @@ -31,7 +31,7 @@ #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) -#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n") #define AUTORESET_DELAY_MS 500 diff --git a/supervisor/shared/safe_mode.c b/supervisor/shared/safe_mode.c index 1cf36e4b7..d59e754ed 100644 --- a/supervisor/shared/safe_mode.c +++ b/supervisor/shared/safe_mode.c @@ -119,9 +119,9 @@ void print_safe_mode_message(safe_mode_t reason) { #ifdef BOARD_USER_SAFE_MODE_ACTION // Output a user safe mode string if it's set. serial_write_compressed(translate("You requested starting safe mode by ")); - serial_write_compressed(translate(BOARD_USER_SAFE_MODE_ACTION)); + serial_write_compressed(BOARD_USER_SAFE_MODE_ACTION); serial_write_compressed(translate("To exit, please reset the board without ")); - serial_write_compressed(translate(BOARD_USER_SAFE_MODE_ACTION)); + serial_write_compressed(BOARD_USER_SAFE_MODE_ACTION); #else break; #endif -- cgit v1.2.3 From 611f81ac1afce82b74acbe8b282fef5300dac4d9 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 29 Sep 2020 14:25:53 -0500 Subject: canio: actually drop the _error_count properties thanks @tannewt --- ports/atmel-samd/common-hal/canio/CAN.c | 26 ------------- shared-bindings/canio/CAN.c | 69 --------------------------------- shared-bindings/canio/CAN.h | 3 -- 3 files changed, 98 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/canio/CAN.c b/ports/atmel-samd/common-hal/canio/CAN.c index ec6b75951..76599a9a7 100644 --- a/ports/atmel-samd/common-hal/canio/CAN.c +++ b/ports/atmel-samd/common-hal/canio/CAN.c @@ -275,21 +275,6 @@ int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self) return self->hw->ECR.bit.REC; } -int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self) -{ - return self->error_warning_state_count; -} - -int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self) -{ - return self->error_passive_state_count; -} - -int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self) -{ - return self->bus_off_state_count; -} - canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self) { CAN_PSR_Type psr = self->hw->PSR; if (psr.bit.BO) { @@ -419,17 +404,6 @@ STATIC void can_handler(int i) { Can *hw = can_insts[i]; uint32_t ir = hri_can_read_IR_reg(hw); - /* Count up errors*/ - if (ir & CAN_IE_EWE) { - self->error_warning_state_count += 1; - } - if (ir & CAN_IE_EPE) { - self->error_passive_state_count += 1; - } - if (ir & CAN_IE_BOE) { - self->bus_off_state_count += 1; - } - /* Acknowledge interrupt */ hri_can_write_IR_reg(hw, ir); } diff --git a/shared-bindings/canio/CAN.c b/shared-bindings/canio/CAN.c index 15ce3dc08..e8ab15a3c 100644 --- a/shared-bindings/canio/CAN.c +++ b/shared-bindings/canio/CAN.c @@ -171,72 +171,6 @@ STATIC const mp_obj_property_t canio_can_receive_error_count_obj = { (mp_obj_t)mp_const_none}, }; -//| error_warning_state_count: int -//| """The number of times the controller enterted the Error Warning -//| state (read-only). This number wraps around to 0 after an -//| implementation-defined number of errors. -//| -//| Not all implementations support this property. If the property -//| is unsupported, AttributeError will be raised.""" -//| -STATIC mp_obj_t canio_can_error_warning_state_count_get(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_error_warning_state_count_get(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_error_warning_state_count_get_obj, canio_can_error_warning_state_count_get); - -STATIC const mp_obj_property_t canio_can_error_warning_state_count_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_error_warning_state_count_get_obj, - (mp_obj_t)mp_const_none, - (mp_obj_t)mp_const_none}, -}; - -//| error_passive_state_count: int -//| """The number of times the controller enterted the Error Passive -//| state (read-only). This number wraps around to 0 after an -//| implementation-defined number of errors. -//| -//| Not all implementations support this property. If the property -//| is unsupported, AttributeError will be raised.""" -//| -STATIC mp_obj_t canio_can_error_passive_state_count_get(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_error_passive_state_count_get(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_error_passive_state_count_get_obj, canio_can_error_passive_state_count_get); - -STATIC const mp_obj_property_t canio_can_error_passive_state_count_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_error_passive_state_count_get_obj, - (mp_obj_t)mp_const_none, - (mp_obj_t)mp_const_none}, -}; - -//| bus_off_state_count: int -//| """The number of times the controller enterted the Bus Off state -//| (read-only). This number wraps around to 0 after an -//| implementation-defined number of errors. -//| -//| Not all implementations support this property. If the property -//| is unsupported, AttributeError will be raised.""" -//| -STATIC mp_obj_t canio_can_bus_off_state_count_get(mp_obj_t self_in) { - canio_can_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_canio_can_check_for_deinit(self); - return MP_OBJ_NEW_SMALL_INT(common_hal_canio_can_bus_off_state_count_get(self)); -} -MP_DEFINE_CONST_FUN_OBJ_1(canio_can_bus_off_state_count_get_obj, canio_can_bus_off_state_count_get); - -STATIC const mp_obj_property_t canio_can_bus_off_state_count_obj = { - .base.type = &mp_type_property, - .proxy = {(mp_obj_t)&canio_can_bus_off_state_count_get_obj, - (mp_obj_t)mp_const_none, - (mp_obj_t)mp_const_none}, -}; - //| state: State //| """The current state of the bus.""" STATIC mp_obj_t canio_can_state_get(mp_obj_t self_in) { @@ -414,10 +348,7 @@ STATIC const mp_rom_map_elem_t canio_can_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&canio_can_exit_obj) }, { MP_ROM_QSTR(MP_QSTR_auto_restart), MP_ROM_PTR(&canio_can_auto_restart_obj) }, { MP_ROM_QSTR(MP_QSTR_baudrate), MP_ROM_PTR(&canio_can_baudrate_obj) }, - { MP_ROM_QSTR(MP_QSTR_bus_off_state_count), MP_ROM_PTR(&canio_can_bus_off_state_count_obj) }, { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&canio_can_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_error_passive_state_count), MP_ROM_PTR(&canio_can_error_passive_state_count_obj) }, - { MP_ROM_QSTR(MP_QSTR_error_warning_state_count), MP_ROM_PTR(&canio_can_error_warning_state_count_obj) }, { MP_ROM_QSTR(MP_QSTR_listen), MP_ROM_PTR(&canio_can_listen_obj) }, { MP_ROM_QSTR(MP_QSTR_loopback), MP_ROM_PTR(&canio_can_loopback_obj) }, { MP_ROM_QSTR(MP_QSTR_receive_error_count), MP_ROM_PTR(&canio_can_receive_error_count_obj) }, diff --git a/shared-bindings/canio/CAN.h b/shared-bindings/canio/CAN.h index 8d61bc8ed..968b71f14 100644 --- a/shared-bindings/canio/CAN.h +++ b/shared-bindings/canio/CAN.h @@ -39,9 +39,6 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mc bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self); bool common_hal_canio_can_deinited(canio_can_obj_t *self); int common_hal_canio_can_baudrate_get(canio_can_obj_t *self); -int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self); -int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self); -int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self); bool common_hal_canio_can_loopback_get(canio_can_obj_t *self); int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self); canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self); -- cgit v1.2.3 From 2f6d7c90028304d2f38dc17b88ec0514ffe1f256 Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Tue, 29 Sep 2020 13:41:56 -0700 Subject: Make sure you're a STA before connecting --- ports/esp32s2/common-hal/wifi/Radio.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index a0b8b6adc..277a837fd 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -106,6 +106,8 @@ void common_hal_wifi_radio_stop_scanning_networks(wifi_radio_obj_t *self) { wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout, uint8_t* bssid, size_t bssid_len) { // check enabled + start_station(self); + wifi_config_t* config = &self->sta_config; memcpy(&config->sta.ssid, ssid, ssid_len); config->sta.ssid[ssid_len] = 0; -- cgit v1.2.3 From a2a0aa058f3330478343faed0345b6a02b0a3b3d Mon Sep 17 00:00:00 2001 From: Seon Rozenblum Date: Wed, 23 Sep 2020 05:20:10 +1000 Subject: Updated UM boards --- .../unexpectedmaker_feathers2/adafruit_dotstar.py | 198 +++++++++++ .../adafruit_pypixelbuf.py | 374 +++++++++++++++++++++ .../unexpectedmaker_feathers2/adafruit_requests.py | 311 +++++++++++++++++ .../boards/unexpectedmaker_feathers2/feathers2.py | 47 +++ .../unexpectedmaker_feathers2/mpconfigboard.h | 5 +- .../unexpectedmaker_feathers2/mpconfigboard.mk | 4 + .../boards/unexpectedmaker_feathers2/pins.c | 64 +++- .../adafruit_dotstar.py | 198 +++++++++++ .../adafruit_pypixelbuf.py | 374 +++++++++++++++++++++ .../unexpectedmaker_feathers2_prerelease/board.c | 56 +++ .../feathers2.py | 47 +++ .../mpconfigboard.h | 40 +++ .../mpconfigboard.mk | 21 ++ .../unexpectedmaker_feathers2_prerelease/pins.c | 56 +++ .../unexpectedmaker_feathers2_prerelease/sdkconfig | 35 ++ .../unexpectedmaker_pros2/adafruit_dotstar.py | 198 +++++++++++ .../unexpectedmaker_pros2/adafruit_pypixelbuf.py | 374 +++++++++++++++++++++ ports/esp32s2/boards/unexpectedmaker_pros2/board.c | 56 +++ .../boards/unexpectedmaker_pros2/mpconfigboard.h | 35 ++ .../boards/unexpectedmaker_pros2/mpconfigboard.mk | 21 ++ ports/esp32s2/boards/unexpectedmaker_pros2/pins.c | 58 ++++ .../esp32s2/boards/unexpectedmaker_pros2/pros2.py | 63 ++++ .../esp32s2/boards/unexpectedmaker_pros2/sdkconfig | 35 ++ 23 files changed, 2659 insertions(+), 11 deletions(-) create mode 100755 ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_dotstar.py create mode 100755 ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_pypixelbuf.py create mode 100755 ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_requests.py create mode 100644 ports/esp32s2/boards/unexpectedmaker_feathers2/feathers2.py create mode 100755 ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_dotstar.py create mode 100755 ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_pypixelbuf.py create mode 100644 ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/board.c create mode 100644 ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/feathers2.py create mode 100644 ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h create mode 100644 ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.mk create mode 100644 ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c create mode 100644 ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/sdkconfig create mode 100755 ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_dotstar.py create mode 100755 ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_pypixelbuf.py create mode 100644 ports/esp32s2/boards/unexpectedmaker_pros2/board.c create mode 100644 ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.h create mode 100644 ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.mk create mode 100644 ports/esp32s2/boards/unexpectedmaker_pros2/pins.c create mode 100644 ports/esp32s2/boards/unexpectedmaker_pros2/pros2.py create mode 100644 ports/esp32s2/boards/unexpectedmaker_pros2/sdkconfig (limited to 'ports') diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_dotstar.py b/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_dotstar.py new file mode 100755 index 000000000..65fbbe868 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_dotstar.py @@ -0,0 +1,198 @@ +# The MIT License (MIT) +# +# Copyright (c) 2016 Damien P. George (original Neopixel object) +# Copyright (c) 2017 Ladyada +# Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +# Copyright (c) 2019 Roy Hooper +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +""" +`adafruit_dotstar` - DotStar strip driver (for CircuitPython 5.0+ with _pixelbuf) +================================================================================= + +* Author(s): Damien P. George, Limor Fried, Scott Shawcroft & Roy Hooper +""" + +# pylint: disable=ungrouped-imports +import sys +import busio +import digitalio + +if sys.implementation.version[0] < 5: + import adafruit_pypixelbuf as _pixelbuf +else: + try: + import _pixelbuf + except ImportError: + import adafruit_pypixelbuf as _pixelbuf + +__version__ = "0.0.0-auto.0" +__repo__ = "https://github.com/adafruit/Adafruit_CircuitPython_DotStar.git" + +START_HEADER_SIZE = 4 + +# Pixel color order constants +RBG = "PRBG" +"""Red Blue Green""" +RGB = "PRGB" +"""Red Green Blue""" +GRB = "PGRB" +"""Green Red Blue""" +GBR = "PGBR" +"""Green Blue Red""" +BRG = "PBRG" +"""Blue Red Green""" +BGR = "PBGR" +"""Blue Green Red""" + + +class DotStar(_pixelbuf.PixelBuf): + """ + A sequence of dotstars. + + :param ~microcontroller.Pin clock: The pin to output dotstar clock on. + :param ~microcontroller.Pin data: The pin to output dotstar data on. + :param int n: The number of dotstars in the chain + :param float brightness: Brightness of the pixels between 0.0 and 1.0 + :param bool auto_write: True if the dotstars should immediately change when + set. If False, `show` must be called explicitly. + :param str pixel_order: Set the pixel order on the strip - different + strips implement this differently. If you send red, and it looks blue + or green on the strip, modify this! It should be one of the values above. + :param int baudrate: Desired clock rate if using hardware SPI (ignored if + using 'soft' SPI). This is only a recommendation; the actual clock + rate may be slightly different depending on what the system hardware + can provide. + + Example for Gemma M0: + + .. code-block:: python + + import adafruit_dotstar + import time + from board import * + + RED = 0x100000 + + with adafruit_dotstar.DotStar(APA102_SCK, APA102_MOSI, 1) as pixels: + pixels[0] = RED + time.sleep(2) + + .. py:method:: DotStar.show() + + Shows the new colors on the dotstars themselves if they haven't already + been autowritten. + + The colors may or may not be showing after this function returns because + it may be done asynchronously. + + .. py:method:: DotStar.fill(color) + + Colors all dotstars the given ***color***. + + .. py:attribute:: brightness + + Overall brightness of all dotstars (0 to 1.0) + """ + + def __init__( + self, + clock, + data, + n, + *, + brightness=1.0, + auto_write=True, + pixel_order=BGR, + baudrate=4000000 + ): + self._spi = None + try: + self._spi = busio.SPI(clock, MOSI=data) + while not self._spi.try_lock(): + pass + self._spi.configure(baudrate=baudrate) + + except (NotImplementedError, ValueError): + self.dpin = digitalio.DigitalInOut(data) + self.cpin = digitalio.DigitalInOut(clock) + self.dpin.direction = digitalio.Direction.OUTPUT + self.cpin.direction = digitalio.Direction.OUTPUT + self.cpin.value = False + + # Supply one extra clock cycle for each two pixels in the strip. + trailer_size = n // 16 + if n % 16 != 0: + trailer_size += 1 + + # Four empty bytes for the header. + header = bytearray(START_HEADER_SIZE) + # 0xff bytes for the trailer. + trailer = bytearray(b"\xff") * trailer_size + + super().__init__( + n, + byteorder=pixel_order, + brightness=brightness, + auto_write=auto_write, + header=header, + trailer=trailer, + ) + + def deinit(self): + """Blank out the DotStars and release the resources.""" + self.fill(0) + self.show() + if self._spi: + self._spi.deinit() + else: + self.dpin.deinit() + self.cpin.deinit() + + def __enter__(self): + return self + + def __exit__(self, exception_type, exception_value, traceback): + self.deinit() + + def __repr__(self): + return "[" + ", ".join([str(x) for x in self]) + "]" + + @property + def n(self): + """ + The number of dotstars in the chain (read-only) + """ + return len(self) + + def _transmit(self, buffer): + if self._spi: + self._spi.write(buffer) + else: + self._ds_writebytes(buffer) + + def _ds_writebytes(self, buffer): + for b in buffer: + for _ in range(8): + self.dpin.value = b & 0x80 + self.cpin.value = True + self.cpin.value = False + b = b << 1 + self.cpin.value = False diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_pypixelbuf.py b/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_pypixelbuf.py new file mode 100755 index 000000000..3cb83e970 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_pypixelbuf.py @@ -0,0 +1,374 @@ +# The MIT License (MIT) +# +# Based on the Adafruit NeoPixel and Adafruit Dotstar CircuitPython drivers. +# Copyright (c) 2019-2020 Roy Hooper +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +""" +`adafruit_pypixelbuf` - A pure python implementation of _pixelbuf +================================================================= +This class is used when _pixelbuf is not available in CircuitPython. It is based on the work +in neopixel.py and adafruit_dotstar.py. + +* Author(s): Damien P. George & Limor Fried & Scott Shawcroft & Roy Hooper +""" + +DOTSTAR_LED_START_FULL_BRIGHT = 0xFF +DOTSTAR_LED_START = 0b11100000 # Three "1" bits, followed by 5 brightness bits +DOTSTAR_LED_BRIGHTNESS = 0b00011111 + + +class PixelBuf: # pylint: disable=too-many-instance-attributes + """ + A sequence of RGB/RGBW pixels. + + This is the pure python implementation of CircuitPython's _pixelbuf. + + :param ~int n: Number of pixels + :param ~str byteorder: Byte order string constant (also sets bpp) + :param ~float brightness: Brightness (0 to 1.0, default 1.0) + :param ~bool auto_write: Whether to automatically write pixels (Default False) + :param bytes header: Sequence of bytes to always send before pixel values. + :param bytes trailer: Sequence of bytes to always send after pixel values. + """ + + def __init__( # pylint: disable=too-many-locals,too-many-arguments + self, + n, + byteorder="BGR", + brightness=1.0, + auto_write=False, + header=None, + trailer=None, + ): + + bpp, byteorder_tuple, has_white, dotstar_mode = self.parse_byteorder(byteorder) + + self.auto_write = False + + effective_bpp = 4 if dotstar_mode else bpp + _bytes = effective_bpp * n + buf = bytearray(_bytes) + offset = 0 + + if header is not None: + if not isinstance(header, bytearray): + raise TypeError("header must be a bytearray") + buf = header + buf + offset = len(header) + + if trailer is not None: + if not isinstance(trailer, bytearray): + raise TypeError("trailer must be a bytearray") + buf += trailer + + self._pixels = n + self._bytes = _bytes + self._byteorder = byteorder_tuple + self._byteorder_string = byteorder + self._has_white = has_white + self._bpp = bpp + self._pre_brightness_buffer = None + self._post_brightness_buffer = buf + self._offset = offset + self._dotstar_mode = dotstar_mode + self._pixel_step = effective_bpp + + if dotstar_mode: + self._byteorder_tuple = ( + byteorder_tuple[0] + 1, + byteorder_tuple[1] + 1, + byteorder_tuple[2] + 1, + 0, + ) + # Initialize the buffer with the dotstar start bytes. + for i in range(self._offset, self._bytes + self._offset, 4): + self._post_brightness_buffer[i] = DOTSTAR_LED_START_FULL_BRIGHT + + self._brightness = 1.0 + self.brightness = brightness + + self.auto_write = auto_write + + @staticmethod + def parse_byteorder(byteorder): + """ + Parse a Byteorder string for validity and determine bpp, byte order, and + dostar brightness bits. + + Byteorder strings may contain the following characters: + R - Red + G - Green + B - Blue + W - White + P - PWM (PWM Duty cycle for pixel - dotstars 0 - 1.0) + + :param: ~str bpp: bpp string. + :return: ~tuple: bpp, byteorder, has_white, dotstar_mode + """ + bpp = len(byteorder) + dotstar_mode = False + has_white = False + + if byteorder.strip("RGBWP") != "": + raise ValueError("Invalid Byteorder string") + + try: + r = byteorder.index("R") + g = byteorder.index("G") + b = byteorder.index("B") + except ValueError: + raise ValueError("Invalid Byteorder string") + if "W" in byteorder: + w = byteorder.index("W") + byteorder = (r, g, b, w) + has_white = True + elif "P" in byteorder: + lum = byteorder.index("P") + byteorder = (r, g, b, lum) + dotstar_mode = True + else: + byteorder = (r, g, b) + + return bpp, byteorder, has_white, dotstar_mode + + @property + def bpp(self): + """ + The number of bytes per pixel in the buffer (read-only). + """ + return self._bpp + + @property + def brightness(self): + """ + Float value between 0 and 1. Output brightness. + + When brightness is less than 1.0, a second buffer will be used to store the color values + before they are adjusted for brightness. + """ + return self._brightness + + @brightness.setter + def brightness(self, value): + value = min(max(value, 0.0), 1.0) + change = value - self._brightness + if -0.001 < change < 0.001: + return + + self._brightness = value + + if self._pre_brightness_buffer is None: + self._pre_brightness_buffer = bytearray(self._post_brightness_buffer) + + # Adjust brightness of existing pixels + offset_check = self._offset % self._pixel_step + for i in range(self._offset, self._bytes + self._offset): + # Don't adjust per-pixel luminance bytes in dotstar mode + if self._dotstar_mode and (i % 4 != offset_check): + continue + self._post_brightness_buffer[i] = int( + self._pre_brightness_buffer[i] * self._brightness + ) + + if self.auto_write: + self.show() + + @property + def byteorder(self): + """ + ByteOrder string for the buffer (read-only) + """ + return self._byteorder_string + + def __len__(self): + """ + Number of pixels. + """ + return self._pixels + + def show(self): + """ + Call the associated write function to display the pixels + """ + return self._transmit(self._post_brightness_buffer) + + def fill(self, color): + """ + Fills the given pixelbuf with the given color. + :param pixelbuf: A pixel object. + :param color: Color to set. + """ + r, g, b, w = self._parse_color(color) + for i in range(self._pixels): + self._set_item(i, r, g, b, w) + if self.auto_write: + self.show() + + def _parse_color(self, value): + r = 0 + g = 0 + b = 0 + w = 0 + if isinstance(value, int): + r = value >> 16 + g = (value >> 8) & 0xFF + b = value & 0xFF + w = 0 + + if self._dotstar_mode: + w = 1.0 + else: + if len(value) < 3 or len(value) > 4: + raise ValueError( + "Expected tuple of length {}, got {}".format(self._bpp, len(value)) + ) + if len(value) == self._bpp: + if self._bpp == 3: + r, g, b = value + else: + r, g, b, w = value + elif len(value) == 3: + r, g, b = value + if self._dotstar_mode: + w = 1.0 + + if self._bpp == 4: + if self._dotstar_mode: + # LED startframe is three "1" bits, followed by 5 brightness bits + # then 8 bits for each of R, G, and B. The order of those 3 are configurable and + # vary based on hardware + w = (int(w * 31) & 0b00011111) | DOTSTAR_LED_START + elif ( + self._has_white + and (isinstance(value, int) or len(value) == 3) + and r == g + and g == b + ): + # If all components are the same and we have a white pixel then use it + # instead of the individual components when all 4 values aren't explicitly given. + w = r + r = 0 + g = 0 + b = 0 + + return (r, g, b, w) + + def _set_item( + self, index, r, g, b, w + ): # pylint: disable=too-many-locals,too-many-branches,too-many-arguments + if index < 0: + index += len(self) + if index >= self._pixels or index < 0: + raise IndexError + offset = self._offset + (index * self._bpp) + + if self._pre_brightness_buffer is not None: + if self._bpp == 4: + self._pre_brightness_buffer[offset + self._byteorder[3]] = w + self._pre_brightness_buffer[offset + self._byteorder[0]] = r + self._pre_brightness_buffer[offset + self._byteorder[1]] = g + self._pre_brightness_buffer[offset + self._byteorder[2]] = b + + if self._bpp == 4: + # Only apply brightness if w is actually white (aka not DotStar.) + if not self._dotstar_mode: + w = int(w * self._brightness) + self._post_brightness_buffer[offset + self._byteorder[3]] = w + + self._post_brightness_buffer[offset + self._byteorder[0]] = int( + r * self._brightness + ) + self._post_brightness_buffer[offset + self._byteorder[1]] = int( + g * self._brightness + ) + self._post_brightness_buffer[offset + self._byteorder[2]] = int( + b * self._brightness + ) + + def __setitem__(self, index, val): + if isinstance(index, slice): + start, stop, step = index.indices(self._pixels) + for val_i, in_i in enumerate(range(start, stop, step)): + r, g, b, w = self._parse_color(val[val_i]) + self._set_item(in_i, r, g, b, w) + else: + r, g, b, w = self._parse_color(val) + self._set_item(index, r, g, b, w) + + if self.auto_write: + self.show() + + def _getitem(self, index): + start = self._offset + (index * self._bpp) + buffer = ( + self._pre_brightness_buffer + if self._pre_brightness_buffer is not None + else self._post_brightness_buffer + ) + value = [ + buffer[start + self._byteorder[0]], + buffer[start + self._byteorder[1]], + buffer[start + self._byteorder[2]], + ] + if self._has_white: + value.append(buffer[start + self._byteorder[3]]) + elif self._dotstar_mode: + value.append( + (buffer[start + self._byteorder[3]] & DOTSTAR_LED_BRIGHTNESS) / 31.0 + ) + return value + + def __getitem__(self, index): + if isinstance(index, slice): + out = [] + for in_i in range( + *index.indices(len(self._post_brightness_buffer) // self._bpp) + ): + out.append(self._getitem(in_i)) + return out + if index < 0: + index += len(self) + if index >= self._pixels or index < 0: + raise IndexError + return self._getitem(index) + + def _transmit(self, buffer): + raise NotImplementedError("Must be subclassed") + + +def wheel(pos): + """ + Helper to create a colorwheel. + + :param pos: int 0-255 of color value to return + :return: tuple of RGB values + """ + # Input a value 0 to 255 to get a color value. + # The colours are a transition r - g - b - back to r. + if pos < 0 or pos > 255: + return 0, 0, 0 + if pos < 85: + return 255 - pos * 3, pos * 3, 0 + if pos < 170: + pos -= 85 + return 0, 255 - pos * 3, pos * 3 + pos -= 170 + return pos * 3, 0, 255 - pos * 3 diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_requests.py b/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_requests.py new file mode 100755 index 000000000..0888937bf --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_requests.py @@ -0,0 +1,311 @@ +# The MIT License (MIT) +# +# Copyright (c) 2019 ladyada for Adafruit Industries +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. +""" +`adafruit_requests` +================================================================================ + +A requests-like library for web interfacing + + +* Author(s): ladyada, Paul Sokolovsky + +Implementation Notes +-------------------- + +Adapted from https://github.com/micropython/micropython-lib/tree/master/urequests + +micropython-lib consists of multiple modules from different sources and +authors. Each module comes under its own licensing terms. Short name of +a license can be found in a file within a module directory (usually +metadata.txt or setup.py). Complete text of each license used is provided +at https://github.com/micropython/micropython-lib/blob/master/LICENSE + +author='Paul Sokolovsky' +license='MIT' + +**Software and Dependencies:** + +* Adafruit CircuitPython firmware for the supported boards: + https://github.com/adafruit/circuitpython/releases + +""" + +import gc + +__version__ = "0.0.0-auto.0" +__repo__ = "https://github.com/adafruit/Adafruit_CircuitPython_Requests.git" + +_the_interface = None # pylint: disable=invalid-name +_the_sock = None # pylint: disable=invalid-name + + +def set_socket(sock, iface=None): + """Helper to set the global socket and optionally set the global network interface. + :param sock: socket object. + :param iface: internet interface object + + """ + global _the_sock # pylint: disable=invalid-name, global-statement + _the_sock = sock + if iface: + global _the_interface # pylint: disable=invalid-name, global-statement + _the_interface = iface + _the_sock.set_interface(iface) + + +class Response: + """The response from a request, contains all the headers/content""" + + encoding = None + + def __init__(self, sock): + self.socket = sock + self.encoding = "utf-8" + self._cached = None + self.status_code = None + self.reason = None + self._read_so_far = 0 + self.headers = {} + + def __enter__(self): + return self + + def __exit__(self, exc_type, exc_value, traceback): + self.close() + + def close(self): + """Close, delete and collect the response data""" + if self.socket: + self.socket.close() + del self.socket + del self._cached + gc.collect() + + @property + def content(self): + """The HTTP content direct from the socket, as bytes""" + # print(self.headers) + try: + content_length = int(self.headers["content-length"]) + except KeyError: + content_length = 0 + # print("Content length:", content_length) + if self._cached is None: + try: + self._cached = self.socket.recv(content_length) + finally: + self.socket.close() + self.socket = None + # print("Buffer length:", len(self._cached)) + return self._cached + + @property + def text(self): + """The HTTP content, encoded into a string according to the HTTP + header encoding""" + return str(self.content, self.encoding) + + def json(self): + """The HTTP content, parsed into a json dictionary""" + # pylint: disable=import-outside-toplevel + try: + import json as json_module + except ImportError: + import ujson as json_module + return json_module.loads(self.content) + + def iter_content(self, chunk_size=1, decode_unicode=False): + """An iterator that will stream data by only reading 'chunk_size' + bytes and yielding them, when we can't buffer the whole datastream""" + if decode_unicode: + raise NotImplementedError("Unicode not supported") + + while True: + chunk = self.socket.recv(chunk_size) + if chunk: + yield chunk + else: + return + + +# pylint: disable=too-many-branches, too-many-statements, unused-argument, too-many-arguments, too-many-locals +def request(method, url, data=None, json=None, headers=None, stream=False, timeout=1): + """Perform an HTTP request to the given url which we will parse to determine + whether to use SSL ('https://') or not. We can also send some provided 'data' + or a json dictionary which we will stringify. 'headers' is optional HTTP headers + sent along. 'stream' will determine if we buffer everything, or whether to only + read only when requested + """ + global _the_interface # pylint: disable=global-statement, invalid-name + global _the_sock # pylint: disable=global-statement, invalid-name + + if not headers: + headers = {} + + try: + proto, dummy, host, path = url.split("/", 3) + # replace spaces in path + path = path.replace(" ", "%20") + except ValueError: + proto, dummy, host = url.split("/", 2) + path = "" + if proto == "http:": + port = 80 + elif proto == "https:": + port = 443 + else: + raise ValueError("Unsupported protocol: " + proto) + + if ":" in host: + host, port = host.split(":", 1) + port = int(port) + + addr_info = _the_sock.getaddrinfo(host, port, 0, _the_sock.SOCK_STREAM)[0] + sock = _the_sock.socket(addr_info[0], addr_info[1], addr_info[2]) + resp = Response(sock) # our response + + sock.settimeout(timeout) # socket read timeout + + try: + if proto == "https:": + conntype = _the_interface.TLS_MODE + sock.connect( + (host, port), conntype + ) # for SSL we need to know the host name + else: + conntype = _the_interface.TCP_MODE + sock.connect(addr_info[-1], conntype) + sock.send( + b"%s /%s HTTP/1.0\r\n" % (bytes(method, "utf-8"), bytes(path, "utf-8")) + ) + if "Host" not in headers: + sock.send(b"Host: %s\r\n" % bytes(host, "utf-8")) + if "User-Agent" not in headers: + sock.send(b"User-Agent: Adafruit CircuitPython\r\n") + # Iterate over keys to avoid tuple alloc + for k in headers: + sock.send(k.encode()) + sock.send(b": ") + sock.send(headers[k].encode()) + sock.send(b"\r\n") + if json is not None: + assert data is None + # pylint: disable=import-outside-toplevel + try: + import json as json_module + except ImportError: + import ujson as json_module + # pylint: enable=import-outside-toplevel + data = json_module.dumps(json) + sock.send(b"Content-Type: application/json\r\n") + if data: + if isinstance(data, dict): + sock.send(b"Content-Type: application/x-www-form-urlencoded\r\n") + _post_data = "" + for k in data: + _post_data = "{}&{}={}".format(_post_data, k, data[k]) + data = _post_data[1:] + sock.send(b"Content-Length: %d\r\n" % len(data)) + sock.send(b"\r\n") + if data: + if isinstance(data, bytearray): + sock.send(bytes(data)) + else: + sock.send(bytes(data, "utf-8")) + + line = sock.readline() + # print(line) + line = line.split(None, 2) + status = int(line[1]) + reason = "" + if len(line) > 2: + reason = line[2].rstrip() + resp.headers = parse_headers(sock) + if resp.headers.get("transfer-encoding"): + if "chunked" in resp.headers.get("transfer-encoding"): + raise ValueError("Unsupported " + resp.headers.get("transfer-encoding")) + elif resp.headers.get("location") and not 200 <= status <= 299: + raise NotImplementedError("Redirects not yet supported") + + except: + sock.close() + raise + + resp.status_code = status + resp.reason = reason + return resp + + +def parse_headers(sock): + """ + Parses the header portion of an HTTP request/response from the socket. + Expects first line of HTTP request/response to have been read already + return: header dictionary + rtype: Dict + """ + headers = {} + while True: + line = sock.readline() + if not line or line == b"\r\n": + break + + # print("**line: ", line) + splits = line.split(b": ", 1) + title = splits[0] + content = "" + if len(splits) > 1: + content = splits[1] + if title and content: + title = str(title.lower(), "utf-8") + content = str(content, "utf-8") + headers[title] = content + return headers + + +def head(url, **kw): + """Send HTTP HEAD request""" + return request("HEAD", url, **kw) + + +def get(url, **kw): + """Send HTTP GET request""" + return request("GET", url, **kw) + + +def post(url, **kw): + """Send HTTP POST request""" + return request("POST", url, **kw) + + +def put(url, **kw): + """Send HTTP PUT request""" + return request("PUT", url, **kw) + + +def patch(url, **kw): + """Send HTTP PATCH request""" + return request("PATCH", url, **kw) + + +def delete(url, **kw): + """Send HTTP DELETE request""" + return request("DELETE", url, **kw) diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/feathers2.py b/ports/esp32s2/boards/unexpectedmaker_feathers2/feathers2.py new file mode 100644 index 000000000..0631cad7f --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/feathers2.py @@ -0,0 +1,47 @@ +# FeatherS2 Helper Library +# 2020 Seon Rozenblum, Unexpected Maker +# +# Project home: +# https://feathers2.io +# + +# Import required libraries +import time +import board +from digitalio import DigitalInOut, Direction, Pull + + +# Helper functions + +def enable_LDO2(state): + """Set the power for the second on-board LDO to allow no current draw when not needed.""" + + # Grab a reference to the LDO2 IO (21 in this case) + ldo2 = DigitalInOut(board.LDO2) + ldo2.direction = Direction.OUTPUT + + # Set the LDO2 power pin on / off + ldo2.value = state + + # A small delay to let the IO change state + time.sleep(0.035) + + +# Dotstar rainbow colour wheel +def dotstar_color_wheel(wheel_pos): + """Color wheel to allow for cycling through the rainbow of RGB colors.""" + wheel_pos = wheel_pos % 255 + + if wheel_pos < 85: + return 255 - wheel_pos * 3, 0, wheel_pos * 3 + elif wheel_pos < 170: + wheel_pos -= 85 + return 0, wheel_pos * 3, 255 - wheel_pos * 3 + else: + wheel_pos -= 170 + return wheel_pos * 3, 255 - wheel_pos * 3, 0 + + + +# Disable LDO2 by default +enable_LDO2(False) diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h index e5fed4e32..a77de1511 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h @@ -35,6 +35,5 @@ #define AUTORESET_DELAY_MS 500 -// Doesn't work with this on. -// #define MICROPY_HW_APA102_MOSI (&pin_GPIO44) -// #define MICROPY_HW_APA102_SCK (&pin_GPIO45) +#define MICROPY_HW_APA102_MOSI (&pin_GPIO40) +#define MICROPY_HW_APA102_SCK (&pin_GPIO45) diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk index 294736d17..91c321af9 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk @@ -16,3 +16,7 @@ CIRCUITPY_ESP_FLASH_FREQ=40m CIRCUITPY_ESP_FLASH_SIZE=16MB CIRCUITPY_BITBANG_APA102 = 1 + +# Include these Python libraries in firmware. +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DotStar + diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c b/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c index e8dd2edf6..5a29e029c 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c @@ -1,55 +1,103 @@ #include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) }, { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) }, { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) }, { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) }, { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO18) }, - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO14) }, - { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) }, { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO12) }, { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) }, { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO6) }, { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) }, { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO5) }, { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) }, { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) }, { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) }, { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) }, { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) }, { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO37) }, + { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) }, { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO44) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) }, { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO43) }, { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, - // Moving to 9 and 8 - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO38) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO8) }, + + { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO9) }, + + { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO0) }, + + { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) }, { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_GPIO1) }, + + { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) }, { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO3) }, + + { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO7) }, - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO8) }, - { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO7) }, + + { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO33) }, + + { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO38) }, + + { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO10) }, + + { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO11) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO11) }, - { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_GPIO44) }, // MTDO + // { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) }, // MTDO + { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_GPIO40) }, // MTDO + + // { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) }, { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_GPIO45) }, + + { MP_ROM_QSTR(MP_QSTR_LDO2), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) }, + + { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) }, { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_AMB), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_dotstar.py b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_dotstar.py new file mode 100755 index 000000000..65fbbe868 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_dotstar.py @@ -0,0 +1,198 @@ +# The MIT License (MIT) +# +# Copyright (c) 2016 Damien P. George (original Neopixel object) +# Copyright (c) 2017 Ladyada +# Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +# Copyright (c) 2019 Roy Hooper +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +""" +`adafruit_dotstar` - DotStar strip driver (for CircuitPython 5.0+ with _pixelbuf) +================================================================================= + +* Author(s): Damien P. George, Limor Fried, Scott Shawcroft & Roy Hooper +""" + +# pylint: disable=ungrouped-imports +import sys +import busio +import digitalio + +if sys.implementation.version[0] < 5: + import adafruit_pypixelbuf as _pixelbuf +else: + try: + import _pixelbuf + except ImportError: + import adafruit_pypixelbuf as _pixelbuf + +__version__ = "0.0.0-auto.0" +__repo__ = "https://github.com/adafruit/Adafruit_CircuitPython_DotStar.git" + +START_HEADER_SIZE = 4 + +# Pixel color order constants +RBG = "PRBG" +"""Red Blue Green""" +RGB = "PRGB" +"""Red Green Blue""" +GRB = "PGRB" +"""Green Red Blue""" +GBR = "PGBR" +"""Green Blue Red""" +BRG = "PBRG" +"""Blue Red Green""" +BGR = "PBGR" +"""Blue Green Red""" + + +class DotStar(_pixelbuf.PixelBuf): + """ + A sequence of dotstars. + + :param ~microcontroller.Pin clock: The pin to output dotstar clock on. + :param ~microcontroller.Pin data: The pin to output dotstar data on. + :param int n: The number of dotstars in the chain + :param float brightness: Brightness of the pixels between 0.0 and 1.0 + :param bool auto_write: True if the dotstars should immediately change when + set. If False, `show` must be called explicitly. + :param str pixel_order: Set the pixel order on the strip - different + strips implement this differently. If you send red, and it looks blue + or green on the strip, modify this! It should be one of the values above. + :param int baudrate: Desired clock rate if using hardware SPI (ignored if + using 'soft' SPI). This is only a recommendation; the actual clock + rate may be slightly different depending on what the system hardware + can provide. + + Example for Gemma M0: + + .. code-block:: python + + import adafruit_dotstar + import time + from board import * + + RED = 0x100000 + + with adafruit_dotstar.DotStar(APA102_SCK, APA102_MOSI, 1) as pixels: + pixels[0] = RED + time.sleep(2) + + .. py:method:: DotStar.show() + + Shows the new colors on the dotstars themselves if they haven't already + been autowritten. + + The colors may or may not be showing after this function returns because + it may be done asynchronously. + + .. py:method:: DotStar.fill(color) + + Colors all dotstars the given ***color***. + + .. py:attribute:: brightness + + Overall brightness of all dotstars (0 to 1.0) + """ + + def __init__( + self, + clock, + data, + n, + *, + brightness=1.0, + auto_write=True, + pixel_order=BGR, + baudrate=4000000 + ): + self._spi = None + try: + self._spi = busio.SPI(clock, MOSI=data) + while not self._spi.try_lock(): + pass + self._spi.configure(baudrate=baudrate) + + except (NotImplementedError, ValueError): + self.dpin = digitalio.DigitalInOut(data) + self.cpin = digitalio.DigitalInOut(clock) + self.dpin.direction = digitalio.Direction.OUTPUT + self.cpin.direction = digitalio.Direction.OUTPUT + self.cpin.value = False + + # Supply one extra clock cycle for each two pixels in the strip. + trailer_size = n // 16 + if n % 16 != 0: + trailer_size += 1 + + # Four empty bytes for the header. + header = bytearray(START_HEADER_SIZE) + # 0xff bytes for the trailer. + trailer = bytearray(b"\xff") * trailer_size + + super().__init__( + n, + byteorder=pixel_order, + brightness=brightness, + auto_write=auto_write, + header=header, + trailer=trailer, + ) + + def deinit(self): + """Blank out the DotStars and release the resources.""" + self.fill(0) + self.show() + if self._spi: + self._spi.deinit() + else: + self.dpin.deinit() + self.cpin.deinit() + + def __enter__(self): + return self + + def __exit__(self, exception_type, exception_value, traceback): + self.deinit() + + def __repr__(self): + return "[" + ", ".join([str(x) for x in self]) + "]" + + @property + def n(self): + """ + The number of dotstars in the chain (read-only) + """ + return len(self) + + def _transmit(self, buffer): + if self._spi: + self._spi.write(buffer) + else: + self._ds_writebytes(buffer) + + def _ds_writebytes(self, buffer): + for b in buffer: + for _ in range(8): + self.dpin.value = b & 0x80 + self.cpin.value = True + self.cpin.value = False + b = b << 1 + self.cpin.value = False diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_pypixelbuf.py b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_pypixelbuf.py new file mode 100755 index 000000000..3cb83e970 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_pypixelbuf.py @@ -0,0 +1,374 @@ +# The MIT License (MIT) +# +# Based on the Adafruit NeoPixel and Adafruit Dotstar CircuitPython drivers. +# Copyright (c) 2019-2020 Roy Hooper +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +""" +`adafruit_pypixelbuf` - A pure python implementation of _pixelbuf +================================================================= +This class is used when _pixelbuf is not available in CircuitPython. It is based on the work +in neopixel.py and adafruit_dotstar.py. + +* Author(s): Damien P. George & Limor Fried & Scott Shawcroft & Roy Hooper +""" + +DOTSTAR_LED_START_FULL_BRIGHT = 0xFF +DOTSTAR_LED_START = 0b11100000 # Three "1" bits, followed by 5 brightness bits +DOTSTAR_LED_BRIGHTNESS = 0b00011111 + + +class PixelBuf: # pylint: disable=too-many-instance-attributes + """ + A sequence of RGB/RGBW pixels. + + This is the pure python implementation of CircuitPython's _pixelbuf. + + :param ~int n: Number of pixels + :param ~str byteorder: Byte order string constant (also sets bpp) + :param ~float brightness: Brightness (0 to 1.0, default 1.0) + :param ~bool auto_write: Whether to automatically write pixels (Default False) + :param bytes header: Sequence of bytes to always send before pixel values. + :param bytes trailer: Sequence of bytes to always send after pixel values. + """ + + def __init__( # pylint: disable=too-many-locals,too-many-arguments + self, + n, + byteorder="BGR", + brightness=1.0, + auto_write=False, + header=None, + trailer=None, + ): + + bpp, byteorder_tuple, has_white, dotstar_mode = self.parse_byteorder(byteorder) + + self.auto_write = False + + effective_bpp = 4 if dotstar_mode else bpp + _bytes = effective_bpp * n + buf = bytearray(_bytes) + offset = 0 + + if header is not None: + if not isinstance(header, bytearray): + raise TypeError("header must be a bytearray") + buf = header + buf + offset = len(header) + + if trailer is not None: + if not isinstance(trailer, bytearray): + raise TypeError("trailer must be a bytearray") + buf += trailer + + self._pixels = n + self._bytes = _bytes + self._byteorder = byteorder_tuple + self._byteorder_string = byteorder + self._has_white = has_white + self._bpp = bpp + self._pre_brightness_buffer = None + self._post_brightness_buffer = buf + self._offset = offset + self._dotstar_mode = dotstar_mode + self._pixel_step = effective_bpp + + if dotstar_mode: + self._byteorder_tuple = ( + byteorder_tuple[0] + 1, + byteorder_tuple[1] + 1, + byteorder_tuple[2] + 1, + 0, + ) + # Initialize the buffer with the dotstar start bytes. + for i in range(self._offset, self._bytes + self._offset, 4): + self._post_brightness_buffer[i] = DOTSTAR_LED_START_FULL_BRIGHT + + self._brightness = 1.0 + self.brightness = brightness + + self.auto_write = auto_write + + @staticmethod + def parse_byteorder(byteorder): + """ + Parse a Byteorder string for validity and determine bpp, byte order, and + dostar brightness bits. + + Byteorder strings may contain the following characters: + R - Red + G - Green + B - Blue + W - White + P - PWM (PWM Duty cycle for pixel - dotstars 0 - 1.0) + + :param: ~str bpp: bpp string. + :return: ~tuple: bpp, byteorder, has_white, dotstar_mode + """ + bpp = len(byteorder) + dotstar_mode = False + has_white = False + + if byteorder.strip("RGBWP") != "": + raise ValueError("Invalid Byteorder string") + + try: + r = byteorder.index("R") + g = byteorder.index("G") + b = byteorder.index("B") + except ValueError: + raise ValueError("Invalid Byteorder string") + if "W" in byteorder: + w = byteorder.index("W") + byteorder = (r, g, b, w) + has_white = True + elif "P" in byteorder: + lum = byteorder.index("P") + byteorder = (r, g, b, lum) + dotstar_mode = True + else: + byteorder = (r, g, b) + + return bpp, byteorder, has_white, dotstar_mode + + @property + def bpp(self): + """ + The number of bytes per pixel in the buffer (read-only). + """ + return self._bpp + + @property + def brightness(self): + """ + Float value between 0 and 1. Output brightness. + + When brightness is less than 1.0, a second buffer will be used to store the color values + before they are adjusted for brightness. + """ + return self._brightness + + @brightness.setter + def brightness(self, value): + value = min(max(value, 0.0), 1.0) + change = value - self._brightness + if -0.001 < change < 0.001: + return + + self._brightness = value + + if self._pre_brightness_buffer is None: + self._pre_brightness_buffer = bytearray(self._post_brightness_buffer) + + # Adjust brightness of existing pixels + offset_check = self._offset % self._pixel_step + for i in range(self._offset, self._bytes + self._offset): + # Don't adjust per-pixel luminance bytes in dotstar mode + if self._dotstar_mode and (i % 4 != offset_check): + continue + self._post_brightness_buffer[i] = int( + self._pre_brightness_buffer[i] * self._brightness + ) + + if self.auto_write: + self.show() + + @property + def byteorder(self): + """ + ByteOrder string for the buffer (read-only) + """ + return self._byteorder_string + + def __len__(self): + """ + Number of pixels. + """ + return self._pixels + + def show(self): + """ + Call the associated write function to display the pixels + """ + return self._transmit(self._post_brightness_buffer) + + def fill(self, color): + """ + Fills the given pixelbuf with the given color. + :param pixelbuf: A pixel object. + :param color: Color to set. + """ + r, g, b, w = self._parse_color(color) + for i in range(self._pixels): + self._set_item(i, r, g, b, w) + if self.auto_write: + self.show() + + def _parse_color(self, value): + r = 0 + g = 0 + b = 0 + w = 0 + if isinstance(value, int): + r = value >> 16 + g = (value >> 8) & 0xFF + b = value & 0xFF + w = 0 + + if self._dotstar_mode: + w = 1.0 + else: + if len(value) < 3 or len(value) > 4: + raise ValueError( + "Expected tuple of length {}, got {}".format(self._bpp, len(value)) + ) + if len(value) == self._bpp: + if self._bpp == 3: + r, g, b = value + else: + r, g, b, w = value + elif len(value) == 3: + r, g, b = value + if self._dotstar_mode: + w = 1.0 + + if self._bpp == 4: + if self._dotstar_mode: + # LED startframe is three "1" bits, followed by 5 brightness bits + # then 8 bits for each of R, G, and B. The order of those 3 are configurable and + # vary based on hardware + w = (int(w * 31) & 0b00011111) | DOTSTAR_LED_START + elif ( + self._has_white + and (isinstance(value, int) or len(value) == 3) + and r == g + and g == b + ): + # If all components are the same and we have a white pixel then use it + # instead of the individual components when all 4 values aren't explicitly given. + w = r + r = 0 + g = 0 + b = 0 + + return (r, g, b, w) + + def _set_item( + self, index, r, g, b, w + ): # pylint: disable=too-many-locals,too-many-branches,too-many-arguments + if index < 0: + index += len(self) + if index >= self._pixels or index < 0: + raise IndexError + offset = self._offset + (index * self._bpp) + + if self._pre_brightness_buffer is not None: + if self._bpp == 4: + self._pre_brightness_buffer[offset + self._byteorder[3]] = w + self._pre_brightness_buffer[offset + self._byteorder[0]] = r + self._pre_brightness_buffer[offset + self._byteorder[1]] = g + self._pre_brightness_buffer[offset + self._byteorder[2]] = b + + if self._bpp == 4: + # Only apply brightness if w is actually white (aka not DotStar.) + if not self._dotstar_mode: + w = int(w * self._brightness) + self._post_brightness_buffer[offset + self._byteorder[3]] = w + + self._post_brightness_buffer[offset + self._byteorder[0]] = int( + r * self._brightness + ) + self._post_brightness_buffer[offset + self._byteorder[1]] = int( + g * self._brightness + ) + self._post_brightness_buffer[offset + self._byteorder[2]] = int( + b * self._brightness + ) + + def __setitem__(self, index, val): + if isinstance(index, slice): + start, stop, step = index.indices(self._pixels) + for val_i, in_i in enumerate(range(start, stop, step)): + r, g, b, w = self._parse_color(val[val_i]) + self._set_item(in_i, r, g, b, w) + else: + r, g, b, w = self._parse_color(val) + self._set_item(index, r, g, b, w) + + if self.auto_write: + self.show() + + def _getitem(self, index): + start = self._offset + (index * self._bpp) + buffer = ( + self._pre_brightness_buffer + if self._pre_brightness_buffer is not None + else self._post_brightness_buffer + ) + value = [ + buffer[start + self._byteorder[0]], + buffer[start + self._byteorder[1]], + buffer[start + self._byteorder[2]], + ] + if self._has_white: + value.append(buffer[start + self._byteorder[3]]) + elif self._dotstar_mode: + value.append( + (buffer[start + self._byteorder[3]] & DOTSTAR_LED_BRIGHTNESS) / 31.0 + ) + return value + + def __getitem__(self, index): + if isinstance(index, slice): + out = [] + for in_i in range( + *index.indices(len(self._post_brightness_buffer) // self._bpp) + ): + out.append(self._getitem(in_i)) + return out + if index < 0: + index += len(self) + if index >= self._pixels or index < 0: + raise IndexError + return self._getitem(index) + + def _transmit(self, buffer): + raise NotImplementedError("Must be subclassed") + + +def wheel(pos): + """ + Helper to create a colorwheel. + + :param pos: int 0-255 of color value to return + :return: tuple of RGB values + """ + # Input a value 0 to 255 to get a color value. + # The colours are a transition r - g - b - back to r. + if pos < 0 or pos > 255: + return 0, 0, 0 + if pos < 85: + return 255 - pos * 3, pos * 3, 0 + if pos < 170: + pos -= 85 + return 0, 255 - pos * 3, pos * 3 + pos -= 170 + return pos * 3, 0, 255 - pos * 3 diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/board.c b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/board.c new file mode 100644 index 000000000..1dc30b5af --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/board.c @@ -0,0 +1,56 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "shared-bindings/microcontroller/Pin.h" + +void board_init(void) { + // USB + common_hal_never_reset_pin(&pin_GPIO19); + common_hal_never_reset_pin(&pin_GPIO20); + + // Debug UART + common_hal_never_reset_pin(&pin_GPIO43); + common_hal_never_reset_pin(&pin_GPIO44); + + // SPI Flash and RAM + common_hal_never_reset_pin(&pin_GPIO26); + common_hal_never_reset_pin(&pin_GPIO27); + common_hal_never_reset_pin(&pin_GPIO28); + common_hal_never_reset_pin(&pin_GPIO29); + common_hal_never_reset_pin(&pin_GPIO30); + common_hal_never_reset_pin(&pin_GPIO31); + common_hal_never_reset_pin(&pin_GPIO32); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/feathers2.py b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/feathers2.py new file mode 100644 index 000000000..0631cad7f --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/feathers2.py @@ -0,0 +1,47 @@ +# FeatherS2 Helper Library +# 2020 Seon Rozenblum, Unexpected Maker +# +# Project home: +# https://feathers2.io +# + +# Import required libraries +import time +import board +from digitalio import DigitalInOut, Direction, Pull + + +# Helper functions + +def enable_LDO2(state): + """Set the power for the second on-board LDO to allow no current draw when not needed.""" + + # Grab a reference to the LDO2 IO (21 in this case) + ldo2 = DigitalInOut(board.LDO2) + ldo2.direction = Direction.OUTPUT + + # Set the LDO2 power pin on / off + ldo2.value = state + + # A small delay to let the IO change state + time.sleep(0.035) + + +# Dotstar rainbow colour wheel +def dotstar_color_wheel(wheel_pos): + """Color wheel to allow for cycling through the rainbow of RGB colors.""" + wheel_pos = wheel_pos % 255 + + if wheel_pos < 85: + return 255 - wheel_pos * 3, 0, wheel_pos * 3 + elif wheel_pos < 170: + wheel_pos -= 85 + return 0, wheel_pos * 3, 255 - wheel_pos * 3 + else: + wheel_pos -= 170 + return wheel_pos * 3, 255 - wheel_pos * 3, 0 + + + +# Disable LDO2 by default +enable_LDO2(False) diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h new file mode 100644 index 000000000..a65d00206 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "FeatherS2" +#define MICROPY_HW_MCU_NAME "ESP32S2" + +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + +#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" + +#define AUTORESET_DELAY_MS 500 + +// Doesn't work with this on. +// #define MICROPY_HW_APA102_MOSI (&pin_GPIO44) +// #define MICROPY_HW_APA102_SCK (&pin_GPIO45) diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.mk b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.mk new file mode 100644 index 000000000..4c809471b --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.mk @@ -0,0 +1,21 @@ +USB_VID = 0x239A +USB_PID = 0x80AC +USB_PRODUCT = "FeatherS2" +USB_MANUFACTURER = "UnexpectedMaker" +USB_DEVICES = "CDC,MSC,HID" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ + +# The default queue depth of 16 overflows on release builds, +# so increase it to 32. +CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 + +CIRCUITPY_ESP_FLASH_MODE=qio +CIRCUITPY_ESP_FLASH_FREQ=40m +CIRCUITPY_ESP_FLASH_SIZE=16MB + +CIRCUITPY_BITBANG_APA102 = 1 + +# Include these Python libraries in firmware. +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DotStar \ No newline at end of file diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c new file mode 100644 index 000000000..9476cafdf --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c @@ -0,0 +1,56 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO17) }, + + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO18) }, + + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO12) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO6) }, + + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO5) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO36) }, + + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO35) }, + + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) }, + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO37) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO43) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, + + // Moving to 9 and 8 + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO11) }, + + { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_GPIO40) }, // MTDO + { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_GPIO45) }, + { MP_ROM_QSTR(MP_QSTR_LDO2), MP_ROM_PTR(&pin_GPIO21) }, + + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_AMB), MP_ROM_PTR(&pin_GPIO4) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/sdkconfig b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/sdkconfig new file mode 100644 index 000000000..b73c4a8c2 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/sdkconfig @@ -0,0 +1,35 @@ +CONFIG_ESP32S2_SPIRAM_SUPPORT=y + +# +# SPI RAM config +# +# CONFIG_SPIRAM_TYPE_AUTO is not set +# CONFIG_SPIRAM_TYPE_ESPPSRAM16 is not set +# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set +CONFIG_SPIRAM_TYPE_ESPPSRAM64=y +CONFIG_SPIRAM_SIZE=8388608 + +# +# PSRAM clock and cs IO for ESP32S2 +# +CONFIG_DEFAULT_PSRAM_CLK_IO=30 +CONFIG_DEFAULT_PSRAM_CS_IO=26 +# end of PSRAM clock and cs IO for ESP32S2 + +CONFIG_SPIRAM_SPIWP_SD3_PIN=28 +# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set +# CONFIG_SPIRAM_RODATA is not set +# CONFIG_SPIRAM_USE_AHB_DBUS3 is not set +# CONFIG_SPIRAM_SPEED_80M is not set +CONFIG_SPIRAM_SPEED_40M=y +# CONFIG_SPIRAM_SPEED_26M is not set +# CONFIG_SPIRAM_SPEED_20M is not set +CONFIG_SPIRAM=y +CONFIG_SPIRAM_BOOT_INIT=y +# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set +CONFIG_SPIRAM_USE_MEMMAP=y +# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set +# CONFIG_SPIRAM_USE_MALLOC is not set +CONFIG_SPIRAM_MEMTEST=y +# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set +# end of SPI RAM config diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_dotstar.py b/ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_dotstar.py new file mode 100755 index 000000000..65fbbe868 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_dotstar.py @@ -0,0 +1,198 @@ +# The MIT License (MIT) +# +# Copyright (c) 2016 Damien P. George (original Neopixel object) +# Copyright (c) 2017 Ladyada +# Copyright (c) 2017 Scott Shawcroft for Adafruit Industries +# Copyright (c) 2019 Roy Hooper +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +""" +`adafruit_dotstar` - DotStar strip driver (for CircuitPython 5.0+ with _pixelbuf) +================================================================================= + +* Author(s): Damien P. George, Limor Fried, Scott Shawcroft & Roy Hooper +""" + +# pylint: disable=ungrouped-imports +import sys +import busio +import digitalio + +if sys.implementation.version[0] < 5: + import adafruit_pypixelbuf as _pixelbuf +else: + try: + import _pixelbuf + except ImportError: + import adafruit_pypixelbuf as _pixelbuf + +__version__ = "0.0.0-auto.0" +__repo__ = "https://github.com/adafruit/Adafruit_CircuitPython_DotStar.git" + +START_HEADER_SIZE = 4 + +# Pixel color order constants +RBG = "PRBG" +"""Red Blue Green""" +RGB = "PRGB" +"""Red Green Blue""" +GRB = "PGRB" +"""Green Red Blue""" +GBR = "PGBR" +"""Green Blue Red""" +BRG = "PBRG" +"""Blue Red Green""" +BGR = "PBGR" +"""Blue Green Red""" + + +class DotStar(_pixelbuf.PixelBuf): + """ + A sequence of dotstars. + + :param ~microcontroller.Pin clock: The pin to output dotstar clock on. + :param ~microcontroller.Pin data: The pin to output dotstar data on. + :param int n: The number of dotstars in the chain + :param float brightness: Brightness of the pixels between 0.0 and 1.0 + :param bool auto_write: True if the dotstars should immediately change when + set. If False, `show` must be called explicitly. + :param str pixel_order: Set the pixel order on the strip - different + strips implement this differently. If you send red, and it looks blue + or green on the strip, modify this! It should be one of the values above. + :param int baudrate: Desired clock rate if using hardware SPI (ignored if + using 'soft' SPI). This is only a recommendation; the actual clock + rate may be slightly different depending on what the system hardware + can provide. + + Example for Gemma M0: + + .. code-block:: python + + import adafruit_dotstar + import time + from board import * + + RED = 0x100000 + + with adafruit_dotstar.DotStar(APA102_SCK, APA102_MOSI, 1) as pixels: + pixels[0] = RED + time.sleep(2) + + .. py:method:: DotStar.show() + + Shows the new colors on the dotstars themselves if they haven't already + been autowritten. + + The colors may or may not be showing after this function returns because + it may be done asynchronously. + + .. py:method:: DotStar.fill(color) + + Colors all dotstars the given ***color***. + + .. py:attribute:: brightness + + Overall brightness of all dotstars (0 to 1.0) + """ + + def __init__( + self, + clock, + data, + n, + *, + brightness=1.0, + auto_write=True, + pixel_order=BGR, + baudrate=4000000 + ): + self._spi = None + try: + self._spi = busio.SPI(clock, MOSI=data) + while not self._spi.try_lock(): + pass + self._spi.configure(baudrate=baudrate) + + except (NotImplementedError, ValueError): + self.dpin = digitalio.DigitalInOut(data) + self.cpin = digitalio.DigitalInOut(clock) + self.dpin.direction = digitalio.Direction.OUTPUT + self.cpin.direction = digitalio.Direction.OUTPUT + self.cpin.value = False + + # Supply one extra clock cycle for each two pixels in the strip. + trailer_size = n // 16 + if n % 16 != 0: + trailer_size += 1 + + # Four empty bytes for the header. + header = bytearray(START_HEADER_SIZE) + # 0xff bytes for the trailer. + trailer = bytearray(b"\xff") * trailer_size + + super().__init__( + n, + byteorder=pixel_order, + brightness=brightness, + auto_write=auto_write, + header=header, + trailer=trailer, + ) + + def deinit(self): + """Blank out the DotStars and release the resources.""" + self.fill(0) + self.show() + if self._spi: + self._spi.deinit() + else: + self.dpin.deinit() + self.cpin.deinit() + + def __enter__(self): + return self + + def __exit__(self, exception_type, exception_value, traceback): + self.deinit() + + def __repr__(self): + return "[" + ", ".join([str(x) for x in self]) + "]" + + @property + def n(self): + """ + The number of dotstars in the chain (read-only) + """ + return len(self) + + def _transmit(self, buffer): + if self._spi: + self._spi.write(buffer) + else: + self._ds_writebytes(buffer) + + def _ds_writebytes(self, buffer): + for b in buffer: + for _ in range(8): + self.dpin.value = b & 0x80 + self.cpin.value = True + self.cpin.value = False + b = b << 1 + self.cpin.value = False diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_pypixelbuf.py b/ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_pypixelbuf.py new file mode 100755 index 000000000..3cb83e970 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_pypixelbuf.py @@ -0,0 +1,374 @@ +# The MIT License (MIT) +# +# Based on the Adafruit NeoPixel and Adafruit Dotstar CircuitPython drivers. +# Copyright (c) 2019-2020 Roy Hooper +# +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: +# +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. +# +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +# THE SOFTWARE. + +""" +`adafruit_pypixelbuf` - A pure python implementation of _pixelbuf +================================================================= +This class is used when _pixelbuf is not available in CircuitPython. It is based on the work +in neopixel.py and adafruit_dotstar.py. + +* Author(s): Damien P. George & Limor Fried & Scott Shawcroft & Roy Hooper +""" + +DOTSTAR_LED_START_FULL_BRIGHT = 0xFF +DOTSTAR_LED_START = 0b11100000 # Three "1" bits, followed by 5 brightness bits +DOTSTAR_LED_BRIGHTNESS = 0b00011111 + + +class PixelBuf: # pylint: disable=too-many-instance-attributes + """ + A sequence of RGB/RGBW pixels. + + This is the pure python implementation of CircuitPython's _pixelbuf. + + :param ~int n: Number of pixels + :param ~str byteorder: Byte order string constant (also sets bpp) + :param ~float brightness: Brightness (0 to 1.0, default 1.0) + :param ~bool auto_write: Whether to automatically write pixels (Default False) + :param bytes header: Sequence of bytes to always send before pixel values. + :param bytes trailer: Sequence of bytes to always send after pixel values. + """ + + def __init__( # pylint: disable=too-many-locals,too-many-arguments + self, + n, + byteorder="BGR", + brightness=1.0, + auto_write=False, + header=None, + trailer=None, + ): + + bpp, byteorder_tuple, has_white, dotstar_mode = self.parse_byteorder(byteorder) + + self.auto_write = False + + effective_bpp = 4 if dotstar_mode else bpp + _bytes = effective_bpp * n + buf = bytearray(_bytes) + offset = 0 + + if header is not None: + if not isinstance(header, bytearray): + raise TypeError("header must be a bytearray") + buf = header + buf + offset = len(header) + + if trailer is not None: + if not isinstance(trailer, bytearray): + raise TypeError("trailer must be a bytearray") + buf += trailer + + self._pixels = n + self._bytes = _bytes + self._byteorder = byteorder_tuple + self._byteorder_string = byteorder + self._has_white = has_white + self._bpp = bpp + self._pre_brightness_buffer = None + self._post_brightness_buffer = buf + self._offset = offset + self._dotstar_mode = dotstar_mode + self._pixel_step = effective_bpp + + if dotstar_mode: + self._byteorder_tuple = ( + byteorder_tuple[0] + 1, + byteorder_tuple[1] + 1, + byteorder_tuple[2] + 1, + 0, + ) + # Initialize the buffer with the dotstar start bytes. + for i in range(self._offset, self._bytes + self._offset, 4): + self._post_brightness_buffer[i] = DOTSTAR_LED_START_FULL_BRIGHT + + self._brightness = 1.0 + self.brightness = brightness + + self.auto_write = auto_write + + @staticmethod + def parse_byteorder(byteorder): + """ + Parse a Byteorder string for validity and determine bpp, byte order, and + dostar brightness bits. + + Byteorder strings may contain the following characters: + R - Red + G - Green + B - Blue + W - White + P - PWM (PWM Duty cycle for pixel - dotstars 0 - 1.0) + + :param: ~str bpp: bpp string. + :return: ~tuple: bpp, byteorder, has_white, dotstar_mode + """ + bpp = len(byteorder) + dotstar_mode = False + has_white = False + + if byteorder.strip("RGBWP") != "": + raise ValueError("Invalid Byteorder string") + + try: + r = byteorder.index("R") + g = byteorder.index("G") + b = byteorder.index("B") + except ValueError: + raise ValueError("Invalid Byteorder string") + if "W" in byteorder: + w = byteorder.index("W") + byteorder = (r, g, b, w) + has_white = True + elif "P" in byteorder: + lum = byteorder.index("P") + byteorder = (r, g, b, lum) + dotstar_mode = True + else: + byteorder = (r, g, b) + + return bpp, byteorder, has_white, dotstar_mode + + @property + def bpp(self): + """ + The number of bytes per pixel in the buffer (read-only). + """ + return self._bpp + + @property + def brightness(self): + """ + Float value between 0 and 1. Output brightness. + + When brightness is less than 1.0, a second buffer will be used to store the color values + before they are adjusted for brightness. + """ + return self._brightness + + @brightness.setter + def brightness(self, value): + value = min(max(value, 0.0), 1.0) + change = value - self._brightness + if -0.001 < change < 0.001: + return + + self._brightness = value + + if self._pre_brightness_buffer is None: + self._pre_brightness_buffer = bytearray(self._post_brightness_buffer) + + # Adjust brightness of existing pixels + offset_check = self._offset % self._pixel_step + for i in range(self._offset, self._bytes + self._offset): + # Don't adjust per-pixel luminance bytes in dotstar mode + if self._dotstar_mode and (i % 4 != offset_check): + continue + self._post_brightness_buffer[i] = int( + self._pre_brightness_buffer[i] * self._brightness + ) + + if self.auto_write: + self.show() + + @property + def byteorder(self): + """ + ByteOrder string for the buffer (read-only) + """ + return self._byteorder_string + + def __len__(self): + """ + Number of pixels. + """ + return self._pixels + + def show(self): + """ + Call the associated write function to display the pixels + """ + return self._transmit(self._post_brightness_buffer) + + def fill(self, color): + """ + Fills the given pixelbuf with the given color. + :param pixelbuf: A pixel object. + :param color: Color to set. + """ + r, g, b, w = self._parse_color(color) + for i in range(self._pixels): + self._set_item(i, r, g, b, w) + if self.auto_write: + self.show() + + def _parse_color(self, value): + r = 0 + g = 0 + b = 0 + w = 0 + if isinstance(value, int): + r = value >> 16 + g = (value >> 8) & 0xFF + b = value & 0xFF + w = 0 + + if self._dotstar_mode: + w = 1.0 + else: + if len(value) < 3 or len(value) > 4: + raise ValueError( + "Expected tuple of length {}, got {}".format(self._bpp, len(value)) + ) + if len(value) == self._bpp: + if self._bpp == 3: + r, g, b = value + else: + r, g, b, w = value + elif len(value) == 3: + r, g, b = value + if self._dotstar_mode: + w = 1.0 + + if self._bpp == 4: + if self._dotstar_mode: + # LED startframe is three "1" bits, followed by 5 brightness bits + # then 8 bits for each of R, G, and B. The order of those 3 are configurable and + # vary based on hardware + w = (int(w * 31) & 0b00011111) | DOTSTAR_LED_START + elif ( + self._has_white + and (isinstance(value, int) or len(value) == 3) + and r == g + and g == b + ): + # If all components are the same and we have a white pixel then use it + # instead of the individual components when all 4 values aren't explicitly given. + w = r + r = 0 + g = 0 + b = 0 + + return (r, g, b, w) + + def _set_item( + self, index, r, g, b, w + ): # pylint: disable=too-many-locals,too-many-branches,too-many-arguments + if index < 0: + index += len(self) + if index >= self._pixels or index < 0: + raise IndexError + offset = self._offset + (index * self._bpp) + + if self._pre_brightness_buffer is not None: + if self._bpp == 4: + self._pre_brightness_buffer[offset + self._byteorder[3]] = w + self._pre_brightness_buffer[offset + self._byteorder[0]] = r + self._pre_brightness_buffer[offset + self._byteorder[1]] = g + self._pre_brightness_buffer[offset + self._byteorder[2]] = b + + if self._bpp == 4: + # Only apply brightness if w is actually white (aka not DotStar.) + if not self._dotstar_mode: + w = int(w * self._brightness) + self._post_brightness_buffer[offset + self._byteorder[3]] = w + + self._post_brightness_buffer[offset + self._byteorder[0]] = int( + r * self._brightness + ) + self._post_brightness_buffer[offset + self._byteorder[1]] = int( + g * self._brightness + ) + self._post_brightness_buffer[offset + self._byteorder[2]] = int( + b * self._brightness + ) + + def __setitem__(self, index, val): + if isinstance(index, slice): + start, stop, step = index.indices(self._pixels) + for val_i, in_i in enumerate(range(start, stop, step)): + r, g, b, w = self._parse_color(val[val_i]) + self._set_item(in_i, r, g, b, w) + else: + r, g, b, w = self._parse_color(val) + self._set_item(index, r, g, b, w) + + if self.auto_write: + self.show() + + def _getitem(self, index): + start = self._offset + (index * self._bpp) + buffer = ( + self._pre_brightness_buffer + if self._pre_brightness_buffer is not None + else self._post_brightness_buffer + ) + value = [ + buffer[start + self._byteorder[0]], + buffer[start + self._byteorder[1]], + buffer[start + self._byteorder[2]], + ] + if self._has_white: + value.append(buffer[start + self._byteorder[3]]) + elif self._dotstar_mode: + value.append( + (buffer[start + self._byteorder[3]] & DOTSTAR_LED_BRIGHTNESS) / 31.0 + ) + return value + + def __getitem__(self, index): + if isinstance(index, slice): + out = [] + for in_i in range( + *index.indices(len(self._post_brightness_buffer) // self._bpp) + ): + out.append(self._getitem(in_i)) + return out + if index < 0: + index += len(self) + if index >= self._pixels or index < 0: + raise IndexError + return self._getitem(index) + + def _transmit(self, buffer): + raise NotImplementedError("Must be subclassed") + + +def wheel(pos): + """ + Helper to create a colorwheel. + + :param pos: int 0-255 of color value to return + :return: tuple of RGB values + """ + # Input a value 0 to 255 to get a color value. + # The colours are a transition r - g - b - back to r. + if pos < 0 or pos > 255: + return 0, 0, 0 + if pos < 85: + return 255 - pos * 3, pos * 3, 0 + if pos < 170: + pos -= 85 + return 0, 255 - pos * 3, pos * 3 + pos -= 170 + return pos * 3, 0, 255 - pos * 3 diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/board.c b/ports/esp32s2/boards/unexpectedmaker_pros2/board.c new file mode 100644 index 000000000..1dc30b5af --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_pros2/board.c @@ -0,0 +1,56 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "shared-bindings/microcontroller/Pin.h" + +void board_init(void) { + // USB + common_hal_never_reset_pin(&pin_GPIO19); + common_hal_never_reset_pin(&pin_GPIO20); + + // Debug UART + common_hal_never_reset_pin(&pin_GPIO43); + common_hal_never_reset_pin(&pin_GPIO44); + + // SPI Flash and RAM + common_hal_never_reset_pin(&pin_GPIO26); + common_hal_never_reset_pin(&pin_GPIO27); + common_hal_never_reset_pin(&pin_GPIO28); + common_hal_never_reset_pin(&pin_GPIO29); + common_hal_never_reset_pin(&pin_GPIO30); + common_hal_never_reset_pin(&pin_GPIO31); + common_hal_never_reset_pin(&pin_GPIO32); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.h new file mode 100644 index 000000000..2cfb7b6a0 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "ProS2" +#define MICROPY_HW_MCU_NAME "ESP32S2" + +#define AUTORESET_DELAY_MS 500 + +#define MICROPY_HW_APA102_MOSI (&pin_GPIO40) +#define MICROPY_HW_APA102_SCK (&pin_GPIO45) diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.mk b/ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.mk new file mode 100644 index 000000000..cb6823ba6 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.mk @@ -0,0 +1,21 @@ +USB_VID = 0x239A +USB_PID = 0x80AA +USB_PRODUCT = "ProS2" +USB_MANUFACTURER = "UnexpectedMaker" +USB_DEVICES = "CDC,MSC,HID" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ + +# The default queue depth of 16 overflows on release builds, +# so increase it to 32. +CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 + +CIRCUITPY_ESP_FLASH_MODE=qio +CIRCUITPY_ESP_FLASH_FREQ=40m +CIRCUITPY_ESP_FLASH_SIZE=16MB + +CIRCUITPY_BITBANG_APA102 = 1 + +# Include these Python libraries in firmware. +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DotStar diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/pins.c b/ports/esp32s2/boards/unexpectedmaker_pros2/pins.c new file mode 100644 index 000000000..349ad1bd5 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_pros2/pins.c @@ -0,0 +1,58 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO17) }, + + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO18) }, + + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO4) }, + + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO12) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO6) }, + + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO5) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO36) }, + + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO35) }, + + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) }, + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO37) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO43) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO11) }, + + { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_GPIO40) }, // MTDO + { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_GPIO45) }, + + { MP_ROM_QSTR(MP_QSTR_LDO2), MP_ROM_PTR(&pin_GPIO21) }, + + { MP_ROM_QSTR(MP_QSTR_VBAT_SENSE), MP_ROM_PTR(&pin_GPIO14) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/pros2.py b/ports/esp32s2/boards/unexpectedmaker_pros2/pros2.py new file mode 100644 index 000000000..3d2397d5d --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_pros2/pros2.py @@ -0,0 +1,63 @@ +# Pros2 Helper Library +# 2020 Seon Rozenblum, Unexpected Maker +# +# Project home: +# https://pros2.io +# + +# Import required libraries +import time +import board +from digitalio import DigitalInOut, Direction, Pull +from analogio import AnalogIn + + +# Helper functions + +def enable_LDO2(state): + """Set the power for the second on-board LDO to allow no current draw when not needed.""" + + # Grab a reference to the LDO2 IO (21 in this case) + ldo2 = DigitalInOut(board.LDO2) + ldo2.direction = Direction.OUTPUT + + # Set the LDO2 power pin on / off + ldo2.value = state + + # A small delay to let the IO change state + time.sleep(0.035) + + +# Dotstar rainbow colour wheel +def dotstar_color_wheel(wheel_pos): + """Color wheel to allow for cycling through the rainbow of RGB colors.""" + wheel_pos = wheel_pos % 255 + + if wheel_pos < 85: + return 255 - wheel_pos * 3, 0, wheel_pos * 3 + elif wheel_pos < 170: + wheel_pos -= 85 + return 0, wheel_pos * 3, 255 - wheel_pos * 3 + else: + wheel_pos -= 170 + return wheel_pos * 3, 255 - wheel_pos * 3, 0 + + +# Get a *rough* estimate of the current battery voltage +# If the battery is not present, the charge IC will still report it's trying to charge at X voltage +# so it will still show a voltage. +def get_battery_voltage(): + """ + Returns the current battery voltage. If no battery is connected, returns 3.7V + This is an approximation only, but useful to detect of the charge state of the battery is getting low. + """ + adc = AnalogIn(board.VBAT_SENSE) + + measured_vbat = adc.value # Read the value + measured_vbat /= 4095 # divide by 4095 as we are using the default ADC voltage range of 0-1V + measured_vbat *= 3.7 # Multiply by 3.7V, our reference voltage + return measured_vbat + + +# Disable LDO2 by default +enable_LDO2(False) diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/sdkconfig b/ports/esp32s2/boards/unexpectedmaker_pros2/sdkconfig new file mode 100644 index 000000000..b73c4a8c2 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_pros2/sdkconfig @@ -0,0 +1,35 @@ +CONFIG_ESP32S2_SPIRAM_SUPPORT=y + +# +# SPI RAM config +# +# CONFIG_SPIRAM_TYPE_AUTO is not set +# CONFIG_SPIRAM_TYPE_ESPPSRAM16 is not set +# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set +CONFIG_SPIRAM_TYPE_ESPPSRAM64=y +CONFIG_SPIRAM_SIZE=8388608 + +# +# PSRAM clock and cs IO for ESP32S2 +# +CONFIG_DEFAULT_PSRAM_CLK_IO=30 +CONFIG_DEFAULT_PSRAM_CS_IO=26 +# end of PSRAM clock and cs IO for ESP32S2 + +CONFIG_SPIRAM_SPIWP_SD3_PIN=28 +# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set +# CONFIG_SPIRAM_RODATA is not set +# CONFIG_SPIRAM_USE_AHB_DBUS3 is not set +# CONFIG_SPIRAM_SPEED_80M is not set +CONFIG_SPIRAM_SPEED_40M=y +# CONFIG_SPIRAM_SPEED_26M is not set +# CONFIG_SPIRAM_SPEED_20M is not set +CONFIG_SPIRAM=y +CONFIG_SPIRAM_BOOT_INIT=y +# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set +CONFIG_SPIRAM_USE_MEMMAP=y +# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set +# CONFIG_SPIRAM_USE_MALLOC is not set +CONFIG_SPIRAM_MEMTEST=y +# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set +# end of SPI RAM config -- cgit v1.2.3 From 4b1a7d812e93223ba4247eb3a96c4c94bdc96bb9 Mon Sep 17 00:00:00 2001 From: Seon Rozenblum Date: Wed, 23 Sep 2020 05:20:10 +1000 Subject: Updated UM boards --- .github/workflows/build.yml | 1 + .../unexpectedmaker_feathers2/mpconfigboard.mk | 3 +- .../mpconfigboard.mk | 2 +- .../unexpectedmaker_feathers2_prerelease/pins.c | 48 +++++++++++++++++++++- 4 files changed, 50 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 1c68a3e5c..40bf65209 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -421,6 +421,7 @@ jobs: - "microdev_micro_s2" - "muselab_nanoesp32_s2" - "unexpectedmaker_feathers2" + - "unexpectedmaker_feathers2_prerelease" steps: - name: Set up Python 3.8 diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk index 91c321af9..9857c0761 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk @@ -18,5 +18,4 @@ CIRCUITPY_ESP_FLASH_SIZE=16MB CIRCUITPY_BITBANG_APA102 = 1 # Include these Python libraries in firmware. -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DotStar - +# FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DotStar diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.mk b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.mk index 4c809471b..9857c0761 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.mk +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.mk @@ -18,4 +18,4 @@ CIRCUITPY_ESP_FLASH_SIZE=16MB CIRCUITPY_BITBANG_APA102 = 1 # Include these Python libraries in firmware. -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DotStar \ No newline at end of file +# FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DotStar diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c index 9476cafdf..967f5e8d9 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c @@ -1,52 +1,98 @@ #include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) }, { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) }, { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) }, { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) }, { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO13) }, + + { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) }, { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO12) }, { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) }, { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO6) }, { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) }, { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO5) }, { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) }, { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) }, { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) }, { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) }, { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) }, { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO37) }, + { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) }, { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO44) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) }, { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO43) }, { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, - // Moving to 9 and 8 { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO33) }, + + { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO0) }, + + { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) }, { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_GPIO1) }, + + { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) }, { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO3) }, + + { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) }, { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO7) }, + + { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO8) }, + + { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO9) }, + + { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO10) }, + + { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO11) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO11) }, { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_GPIO40) }, // MTDO { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_GPIO45) }, + { MP_ROM_QSTR(MP_QSTR_LDO2), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) }, { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO13) }, + + { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) }, { MP_ROM_QSTR(MP_QSTR_AMB), MP_ROM_PTR(&pin_GPIO4) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, -- cgit v1.2.3 From 819b5faa71ab8aa13a82308cc6fc820df46ec83b Mon Sep 17 00:00:00 2001 From: Seon Rozenblum Date: Wed, 30 Sep 2020 10:02:50 +1000 Subject: Removed ProS2 board files for now --- .../unexpectedmaker_feathers2/adafruit_dotstar.py | 198 ----------- .../adafruit_pypixelbuf.py | 374 --------------------- .../unexpectedmaker_feathers2/adafruit_requests.py | 311 ----------------- .../boards/unexpectedmaker_feathers2/feathers2.py | 47 --- .../boards/unexpectedmaker_feathers2/pins.c | 7 +- .../adafruit_dotstar.py | 198 ----------- .../adafruit_pypixelbuf.py | 374 --------------------- .../feathers2.py | 47 --- .../mpconfigboard.h | 8 +- .../unexpectedmaker_pros2/adafruit_dotstar.py | 198 ----------- .../unexpectedmaker_pros2/adafruit_pypixelbuf.py | 374 --------------------- ports/esp32s2/boards/unexpectedmaker_pros2/board.c | 56 --- .../boards/unexpectedmaker_pros2/mpconfigboard.h | 35 -- .../boards/unexpectedmaker_pros2/mpconfigboard.mk | 21 -- ports/esp32s2/boards/unexpectedmaker_pros2/pins.c | 58 ---- .../esp32s2/boards/unexpectedmaker_pros2/pros2.py | 63 ---- .../esp32s2/boards/unexpectedmaker_pros2/sdkconfig | 35 -- 17 files changed, 5 insertions(+), 2399 deletions(-) delete mode 100755 ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_dotstar.py delete mode 100755 ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_pypixelbuf.py delete mode 100755 ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_requests.py delete mode 100644 ports/esp32s2/boards/unexpectedmaker_feathers2/feathers2.py delete mode 100755 ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_dotstar.py delete mode 100755 ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_pypixelbuf.py delete mode 100644 ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/feathers2.py delete mode 100755 ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_dotstar.py delete mode 100755 ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_pypixelbuf.py delete mode 100644 ports/esp32s2/boards/unexpectedmaker_pros2/board.c delete mode 100644 ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.h delete mode 100644 ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.mk delete mode 100644 ports/esp32s2/boards/unexpectedmaker_pros2/pins.c delete mode 100644 ports/esp32s2/boards/unexpectedmaker_pros2/pros2.py delete mode 100644 ports/esp32s2/boards/unexpectedmaker_pros2/sdkconfig (limited to 'ports') diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_dotstar.py b/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_dotstar.py deleted file mode 100755 index 65fbbe868..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_dotstar.py +++ /dev/null @@ -1,198 +0,0 @@ -# The MIT License (MIT) -# -# Copyright (c) 2016 Damien P. George (original Neopixel object) -# Copyright (c) 2017 Ladyada -# Copyright (c) 2017 Scott Shawcroft for Adafruit Industries -# Copyright (c) 2019 Roy Hooper -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -# THE SOFTWARE. - -""" -`adafruit_dotstar` - DotStar strip driver (for CircuitPython 5.0+ with _pixelbuf) -================================================================================= - -* Author(s): Damien P. George, Limor Fried, Scott Shawcroft & Roy Hooper -""" - -# pylint: disable=ungrouped-imports -import sys -import busio -import digitalio - -if sys.implementation.version[0] < 5: - import adafruit_pypixelbuf as _pixelbuf -else: - try: - import _pixelbuf - except ImportError: - import adafruit_pypixelbuf as _pixelbuf - -__version__ = "0.0.0-auto.0" -__repo__ = "https://github.com/adafruit/Adafruit_CircuitPython_DotStar.git" - -START_HEADER_SIZE = 4 - -# Pixel color order constants -RBG = "PRBG" -"""Red Blue Green""" -RGB = "PRGB" -"""Red Green Blue""" -GRB = "PGRB" -"""Green Red Blue""" -GBR = "PGBR" -"""Green Blue Red""" -BRG = "PBRG" -"""Blue Red Green""" -BGR = "PBGR" -"""Blue Green Red""" - - -class DotStar(_pixelbuf.PixelBuf): - """ - A sequence of dotstars. - - :param ~microcontroller.Pin clock: The pin to output dotstar clock on. - :param ~microcontroller.Pin data: The pin to output dotstar data on. - :param int n: The number of dotstars in the chain - :param float brightness: Brightness of the pixels between 0.0 and 1.0 - :param bool auto_write: True if the dotstars should immediately change when - set. If False, `show` must be called explicitly. - :param str pixel_order: Set the pixel order on the strip - different - strips implement this differently. If you send red, and it looks blue - or green on the strip, modify this! It should be one of the values above. - :param int baudrate: Desired clock rate if using hardware SPI (ignored if - using 'soft' SPI). This is only a recommendation; the actual clock - rate may be slightly different depending on what the system hardware - can provide. - - Example for Gemma M0: - - .. code-block:: python - - import adafruit_dotstar - import time - from board import * - - RED = 0x100000 - - with adafruit_dotstar.DotStar(APA102_SCK, APA102_MOSI, 1) as pixels: - pixels[0] = RED - time.sleep(2) - - .. py:method:: DotStar.show() - - Shows the new colors on the dotstars themselves if they haven't already - been autowritten. - - The colors may or may not be showing after this function returns because - it may be done asynchronously. - - .. py:method:: DotStar.fill(color) - - Colors all dotstars the given ***color***. - - .. py:attribute:: brightness - - Overall brightness of all dotstars (0 to 1.0) - """ - - def __init__( - self, - clock, - data, - n, - *, - brightness=1.0, - auto_write=True, - pixel_order=BGR, - baudrate=4000000 - ): - self._spi = None - try: - self._spi = busio.SPI(clock, MOSI=data) - while not self._spi.try_lock(): - pass - self._spi.configure(baudrate=baudrate) - - except (NotImplementedError, ValueError): - self.dpin = digitalio.DigitalInOut(data) - self.cpin = digitalio.DigitalInOut(clock) - self.dpin.direction = digitalio.Direction.OUTPUT - self.cpin.direction = digitalio.Direction.OUTPUT - self.cpin.value = False - - # Supply one extra clock cycle for each two pixels in the strip. - trailer_size = n // 16 - if n % 16 != 0: - trailer_size += 1 - - # Four empty bytes for the header. - header = bytearray(START_HEADER_SIZE) - # 0xff bytes for the trailer. - trailer = bytearray(b"\xff") * trailer_size - - super().__init__( - n, - byteorder=pixel_order, - brightness=brightness, - auto_write=auto_write, - header=header, - trailer=trailer, - ) - - def deinit(self): - """Blank out the DotStars and release the resources.""" - self.fill(0) - self.show() - if self._spi: - self._spi.deinit() - else: - self.dpin.deinit() - self.cpin.deinit() - - def __enter__(self): - return self - - def __exit__(self, exception_type, exception_value, traceback): - self.deinit() - - def __repr__(self): - return "[" + ", ".join([str(x) for x in self]) + "]" - - @property - def n(self): - """ - The number of dotstars in the chain (read-only) - """ - return len(self) - - def _transmit(self, buffer): - if self._spi: - self._spi.write(buffer) - else: - self._ds_writebytes(buffer) - - def _ds_writebytes(self, buffer): - for b in buffer: - for _ in range(8): - self.dpin.value = b & 0x80 - self.cpin.value = True - self.cpin.value = False - b = b << 1 - self.cpin.value = False diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_pypixelbuf.py b/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_pypixelbuf.py deleted file mode 100755 index 3cb83e970..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_pypixelbuf.py +++ /dev/null @@ -1,374 +0,0 @@ -# The MIT License (MIT) -# -# Based on the Adafruit NeoPixel and Adafruit Dotstar CircuitPython drivers. -# Copyright (c) 2019-2020 Roy Hooper -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -# THE SOFTWARE. - -""" -`adafruit_pypixelbuf` - A pure python implementation of _pixelbuf -================================================================= -This class is used when _pixelbuf is not available in CircuitPython. It is based on the work -in neopixel.py and adafruit_dotstar.py. - -* Author(s): Damien P. George & Limor Fried & Scott Shawcroft & Roy Hooper -""" - -DOTSTAR_LED_START_FULL_BRIGHT = 0xFF -DOTSTAR_LED_START = 0b11100000 # Three "1" bits, followed by 5 brightness bits -DOTSTAR_LED_BRIGHTNESS = 0b00011111 - - -class PixelBuf: # pylint: disable=too-many-instance-attributes - """ - A sequence of RGB/RGBW pixels. - - This is the pure python implementation of CircuitPython's _pixelbuf. - - :param ~int n: Number of pixels - :param ~str byteorder: Byte order string constant (also sets bpp) - :param ~float brightness: Brightness (0 to 1.0, default 1.0) - :param ~bool auto_write: Whether to automatically write pixels (Default False) - :param bytes header: Sequence of bytes to always send before pixel values. - :param bytes trailer: Sequence of bytes to always send after pixel values. - """ - - def __init__( # pylint: disable=too-many-locals,too-many-arguments - self, - n, - byteorder="BGR", - brightness=1.0, - auto_write=False, - header=None, - trailer=None, - ): - - bpp, byteorder_tuple, has_white, dotstar_mode = self.parse_byteorder(byteorder) - - self.auto_write = False - - effective_bpp = 4 if dotstar_mode else bpp - _bytes = effective_bpp * n - buf = bytearray(_bytes) - offset = 0 - - if header is not None: - if not isinstance(header, bytearray): - raise TypeError("header must be a bytearray") - buf = header + buf - offset = len(header) - - if trailer is not None: - if not isinstance(trailer, bytearray): - raise TypeError("trailer must be a bytearray") - buf += trailer - - self._pixels = n - self._bytes = _bytes - self._byteorder = byteorder_tuple - self._byteorder_string = byteorder - self._has_white = has_white - self._bpp = bpp - self._pre_brightness_buffer = None - self._post_brightness_buffer = buf - self._offset = offset - self._dotstar_mode = dotstar_mode - self._pixel_step = effective_bpp - - if dotstar_mode: - self._byteorder_tuple = ( - byteorder_tuple[0] + 1, - byteorder_tuple[1] + 1, - byteorder_tuple[2] + 1, - 0, - ) - # Initialize the buffer with the dotstar start bytes. - for i in range(self._offset, self._bytes + self._offset, 4): - self._post_brightness_buffer[i] = DOTSTAR_LED_START_FULL_BRIGHT - - self._brightness = 1.0 - self.brightness = brightness - - self.auto_write = auto_write - - @staticmethod - def parse_byteorder(byteorder): - """ - Parse a Byteorder string for validity and determine bpp, byte order, and - dostar brightness bits. - - Byteorder strings may contain the following characters: - R - Red - G - Green - B - Blue - W - White - P - PWM (PWM Duty cycle for pixel - dotstars 0 - 1.0) - - :param: ~str bpp: bpp string. - :return: ~tuple: bpp, byteorder, has_white, dotstar_mode - """ - bpp = len(byteorder) - dotstar_mode = False - has_white = False - - if byteorder.strip("RGBWP") != "": - raise ValueError("Invalid Byteorder string") - - try: - r = byteorder.index("R") - g = byteorder.index("G") - b = byteorder.index("B") - except ValueError: - raise ValueError("Invalid Byteorder string") - if "W" in byteorder: - w = byteorder.index("W") - byteorder = (r, g, b, w) - has_white = True - elif "P" in byteorder: - lum = byteorder.index("P") - byteorder = (r, g, b, lum) - dotstar_mode = True - else: - byteorder = (r, g, b) - - return bpp, byteorder, has_white, dotstar_mode - - @property - def bpp(self): - """ - The number of bytes per pixel in the buffer (read-only). - """ - return self._bpp - - @property - def brightness(self): - """ - Float value between 0 and 1. Output brightness. - - When brightness is less than 1.0, a second buffer will be used to store the color values - before they are adjusted for brightness. - """ - return self._brightness - - @brightness.setter - def brightness(self, value): - value = min(max(value, 0.0), 1.0) - change = value - self._brightness - if -0.001 < change < 0.001: - return - - self._brightness = value - - if self._pre_brightness_buffer is None: - self._pre_brightness_buffer = bytearray(self._post_brightness_buffer) - - # Adjust brightness of existing pixels - offset_check = self._offset % self._pixel_step - for i in range(self._offset, self._bytes + self._offset): - # Don't adjust per-pixel luminance bytes in dotstar mode - if self._dotstar_mode and (i % 4 != offset_check): - continue - self._post_brightness_buffer[i] = int( - self._pre_brightness_buffer[i] * self._brightness - ) - - if self.auto_write: - self.show() - - @property - def byteorder(self): - """ - ByteOrder string for the buffer (read-only) - """ - return self._byteorder_string - - def __len__(self): - """ - Number of pixels. - """ - return self._pixels - - def show(self): - """ - Call the associated write function to display the pixels - """ - return self._transmit(self._post_brightness_buffer) - - def fill(self, color): - """ - Fills the given pixelbuf with the given color. - :param pixelbuf: A pixel object. - :param color: Color to set. - """ - r, g, b, w = self._parse_color(color) - for i in range(self._pixels): - self._set_item(i, r, g, b, w) - if self.auto_write: - self.show() - - def _parse_color(self, value): - r = 0 - g = 0 - b = 0 - w = 0 - if isinstance(value, int): - r = value >> 16 - g = (value >> 8) & 0xFF - b = value & 0xFF - w = 0 - - if self._dotstar_mode: - w = 1.0 - else: - if len(value) < 3 or len(value) > 4: - raise ValueError( - "Expected tuple of length {}, got {}".format(self._bpp, len(value)) - ) - if len(value) == self._bpp: - if self._bpp == 3: - r, g, b = value - else: - r, g, b, w = value - elif len(value) == 3: - r, g, b = value - if self._dotstar_mode: - w = 1.0 - - if self._bpp == 4: - if self._dotstar_mode: - # LED startframe is three "1" bits, followed by 5 brightness bits - # then 8 bits for each of R, G, and B. The order of those 3 are configurable and - # vary based on hardware - w = (int(w * 31) & 0b00011111) | DOTSTAR_LED_START - elif ( - self._has_white - and (isinstance(value, int) or len(value) == 3) - and r == g - and g == b - ): - # If all components are the same and we have a white pixel then use it - # instead of the individual components when all 4 values aren't explicitly given. - w = r - r = 0 - g = 0 - b = 0 - - return (r, g, b, w) - - def _set_item( - self, index, r, g, b, w - ): # pylint: disable=too-many-locals,too-many-branches,too-many-arguments - if index < 0: - index += len(self) - if index >= self._pixels or index < 0: - raise IndexError - offset = self._offset + (index * self._bpp) - - if self._pre_brightness_buffer is not None: - if self._bpp == 4: - self._pre_brightness_buffer[offset + self._byteorder[3]] = w - self._pre_brightness_buffer[offset + self._byteorder[0]] = r - self._pre_brightness_buffer[offset + self._byteorder[1]] = g - self._pre_brightness_buffer[offset + self._byteorder[2]] = b - - if self._bpp == 4: - # Only apply brightness if w is actually white (aka not DotStar.) - if not self._dotstar_mode: - w = int(w * self._brightness) - self._post_brightness_buffer[offset + self._byteorder[3]] = w - - self._post_brightness_buffer[offset + self._byteorder[0]] = int( - r * self._brightness - ) - self._post_brightness_buffer[offset + self._byteorder[1]] = int( - g * self._brightness - ) - self._post_brightness_buffer[offset + self._byteorder[2]] = int( - b * self._brightness - ) - - def __setitem__(self, index, val): - if isinstance(index, slice): - start, stop, step = index.indices(self._pixels) - for val_i, in_i in enumerate(range(start, stop, step)): - r, g, b, w = self._parse_color(val[val_i]) - self._set_item(in_i, r, g, b, w) - else: - r, g, b, w = self._parse_color(val) - self._set_item(index, r, g, b, w) - - if self.auto_write: - self.show() - - def _getitem(self, index): - start = self._offset + (index * self._bpp) - buffer = ( - self._pre_brightness_buffer - if self._pre_brightness_buffer is not None - else self._post_brightness_buffer - ) - value = [ - buffer[start + self._byteorder[0]], - buffer[start + self._byteorder[1]], - buffer[start + self._byteorder[2]], - ] - if self._has_white: - value.append(buffer[start + self._byteorder[3]]) - elif self._dotstar_mode: - value.append( - (buffer[start + self._byteorder[3]] & DOTSTAR_LED_BRIGHTNESS) / 31.0 - ) - return value - - def __getitem__(self, index): - if isinstance(index, slice): - out = [] - for in_i in range( - *index.indices(len(self._post_brightness_buffer) // self._bpp) - ): - out.append(self._getitem(in_i)) - return out - if index < 0: - index += len(self) - if index >= self._pixels or index < 0: - raise IndexError - return self._getitem(index) - - def _transmit(self, buffer): - raise NotImplementedError("Must be subclassed") - - -def wheel(pos): - """ - Helper to create a colorwheel. - - :param pos: int 0-255 of color value to return - :return: tuple of RGB values - """ - # Input a value 0 to 255 to get a color value. - # The colours are a transition r - g - b - back to r. - if pos < 0 or pos > 255: - return 0, 0, 0 - if pos < 85: - return 255 - pos * 3, pos * 3, 0 - if pos < 170: - pos -= 85 - return 0, 255 - pos * 3, pos * 3 - pos -= 170 - return pos * 3, 0, 255 - pos * 3 diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_requests.py b/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_requests.py deleted file mode 100755 index 0888937bf..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/adafruit_requests.py +++ /dev/null @@ -1,311 +0,0 @@ -# The MIT License (MIT) -# -# Copyright (c) 2019 ladyada for Adafruit Industries -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -# THE SOFTWARE. -""" -`adafruit_requests` -================================================================================ - -A requests-like library for web interfacing - - -* Author(s): ladyada, Paul Sokolovsky - -Implementation Notes --------------------- - -Adapted from https://github.com/micropython/micropython-lib/tree/master/urequests - -micropython-lib consists of multiple modules from different sources and -authors. Each module comes under its own licensing terms. Short name of -a license can be found in a file within a module directory (usually -metadata.txt or setup.py). Complete text of each license used is provided -at https://github.com/micropython/micropython-lib/blob/master/LICENSE - -author='Paul Sokolovsky' -license='MIT' - -**Software and Dependencies:** - -* Adafruit CircuitPython firmware for the supported boards: - https://github.com/adafruit/circuitpython/releases - -""" - -import gc - -__version__ = "0.0.0-auto.0" -__repo__ = "https://github.com/adafruit/Adafruit_CircuitPython_Requests.git" - -_the_interface = None # pylint: disable=invalid-name -_the_sock = None # pylint: disable=invalid-name - - -def set_socket(sock, iface=None): - """Helper to set the global socket and optionally set the global network interface. - :param sock: socket object. - :param iface: internet interface object - - """ - global _the_sock # pylint: disable=invalid-name, global-statement - _the_sock = sock - if iface: - global _the_interface # pylint: disable=invalid-name, global-statement - _the_interface = iface - _the_sock.set_interface(iface) - - -class Response: - """The response from a request, contains all the headers/content""" - - encoding = None - - def __init__(self, sock): - self.socket = sock - self.encoding = "utf-8" - self._cached = None - self.status_code = None - self.reason = None - self._read_so_far = 0 - self.headers = {} - - def __enter__(self): - return self - - def __exit__(self, exc_type, exc_value, traceback): - self.close() - - def close(self): - """Close, delete and collect the response data""" - if self.socket: - self.socket.close() - del self.socket - del self._cached - gc.collect() - - @property - def content(self): - """The HTTP content direct from the socket, as bytes""" - # print(self.headers) - try: - content_length = int(self.headers["content-length"]) - except KeyError: - content_length = 0 - # print("Content length:", content_length) - if self._cached is None: - try: - self._cached = self.socket.recv(content_length) - finally: - self.socket.close() - self.socket = None - # print("Buffer length:", len(self._cached)) - return self._cached - - @property - def text(self): - """The HTTP content, encoded into a string according to the HTTP - header encoding""" - return str(self.content, self.encoding) - - def json(self): - """The HTTP content, parsed into a json dictionary""" - # pylint: disable=import-outside-toplevel - try: - import json as json_module - except ImportError: - import ujson as json_module - return json_module.loads(self.content) - - def iter_content(self, chunk_size=1, decode_unicode=False): - """An iterator that will stream data by only reading 'chunk_size' - bytes and yielding them, when we can't buffer the whole datastream""" - if decode_unicode: - raise NotImplementedError("Unicode not supported") - - while True: - chunk = self.socket.recv(chunk_size) - if chunk: - yield chunk - else: - return - - -# pylint: disable=too-many-branches, too-many-statements, unused-argument, too-many-arguments, too-many-locals -def request(method, url, data=None, json=None, headers=None, stream=False, timeout=1): - """Perform an HTTP request to the given url which we will parse to determine - whether to use SSL ('https://') or not. We can also send some provided 'data' - or a json dictionary which we will stringify. 'headers' is optional HTTP headers - sent along. 'stream' will determine if we buffer everything, or whether to only - read only when requested - """ - global _the_interface # pylint: disable=global-statement, invalid-name - global _the_sock # pylint: disable=global-statement, invalid-name - - if not headers: - headers = {} - - try: - proto, dummy, host, path = url.split("/", 3) - # replace spaces in path - path = path.replace(" ", "%20") - except ValueError: - proto, dummy, host = url.split("/", 2) - path = "" - if proto == "http:": - port = 80 - elif proto == "https:": - port = 443 - else: - raise ValueError("Unsupported protocol: " + proto) - - if ":" in host: - host, port = host.split(":", 1) - port = int(port) - - addr_info = _the_sock.getaddrinfo(host, port, 0, _the_sock.SOCK_STREAM)[0] - sock = _the_sock.socket(addr_info[0], addr_info[1], addr_info[2]) - resp = Response(sock) # our response - - sock.settimeout(timeout) # socket read timeout - - try: - if proto == "https:": - conntype = _the_interface.TLS_MODE - sock.connect( - (host, port), conntype - ) # for SSL we need to know the host name - else: - conntype = _the_interface.TCP_MODE - sock.connect(addr_info[-1], conntype) - sock.send( - b"%s /%s HTTP/1.0\r\n" % (bytes(method, "utf-8"), bytes(path, "utf-8")) - ) - if "Host" not in headers: - sock.send(b"Host: %s\r\n" % bytes(host, "utf-8")) - if "User-Agent" not in headers: - sock.send(b"User-Agent: Adafruit CircuitPython\r\n") - # Iterate over keys to avoid tuple alloc - for k in headers: - sock.send(k.encode()) - sock.send(b": ") - sock.send(headers[k].encode()) - sock.send(b"\r\n") - if json is not None: - assert data is None - # pylint: disable=import-outside-toplevel - try: - import json as json_module - except ImportError: - import ujson as json_module - # pylint: enable=import-outside-toplevel - data = json_module.dumps(json) - sock.send(b"Content-Type: application/json\r\n") - if data: - if isinstance(data, dict): - sock.send(b"Content-Type: application/x-www-form-urlencoded\r\n") - _post_data = "" - for k in data: - _post_data = "{}&{}={}".format(_post_data, k, data[k]) - data = _post_data[1:] - sock.send(b"Content-Length: %d\r\n" % len(data)) - sock.send(b"\r\n") - if data: - if isinstance(data, bytearray): - sock.send(bytes(data)) - else: - sock.send(bytes(data, "utf-8")) - - line = sock.readline() - # print(line) - line = line.split(None, 2) - status = int(line[1]) - reason = "" - if len(line) > 2: - reason = line[2].rstrip() - resp.headers = parse_headers(sock) - if resp.headers.get("transfer-encoding"): - if "chunked" in resp.headers.get("transfer-encoding"): - raise ValueError("Unsupported " + resp.headers.get("transfer-encoding")) - elif resp.headers.get("location") and not 200 <= status <= 299: - raise NotImplementedError("Redirects not yet supported") - - except: - sock.close() - raise - - resp.status_code = status - resp.reason = reason - return resp - - -def parse_headers(sock): - """ - Parses the header portion of an HTTP request/response from the socket. - Expects first line of HTTP request/response to have been read already - return: header dictionary - rtype: Dict - """ - headers = {} - while True: - line = sock.readline() - if not line or line == b"\r\n": - break - - # print("**line: ", line) - splits = line.split(b": ", 1) - title = splits[0] - content = "" - if len(splits) > 1: - content = splits[1] - if title and content: - title = str(title.lower(), "utf-8") - content = str(content, "utf-8") - headers[title] = content - return headers - - -def head(url, **kw): - """Send HTTP HEAD request""" - return request("HEAD", url, **kw) - - -def get(url, **kw): - """Send HTTP GET request""" - return request("GET", url, **kw) - - -def post(url, **kw): - """Send HTTP POST request""" - return request("POST", url, **kw) - - -def put(url, **kw): - """Send HTTP PUT request""" - return request("PUT", url, **kw) - - -def patch(url, **kw): - """Send HTTP PATCH request""" - return request("PATCH", url, **kw) - - -def delete(url, **kw): - """Send HTTP DELETE request""" - return request("DELETE", url, **kw) diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/feathers2.py b/ports/esp32s2/boards/unexpectedmaker_feathers2/feathers2.py deleted file mode 100644 index 0631cad7f..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/feathers2.py +++ /dev/null @@ -1,47 +0,0 @@ -# FeatherS2 Helper Library -# 2020 Seon Rozenblum, Unexpected Maker -# -# Project home: -# https://feathers2.io -# - -# Import required libraries -import time -import board -from digitalio import DigitalInOut, Direction, Pull - - -# Helper functions - -def enable_LDO2(state): - """Set the power for the second on-board LDO to allow no current draw when not needed.""" - - # Grab a reference to the LDO2 IO (21 in this case) - ldo2 = DigitalInOut(board.LDO2) - ldo2.direction = Direction.OUTPUT - - # Set the LDO2 power pin on / off - ldo2.value = state - - # A small delay to let the IO change state - time.sleep(0.035) - - -# Dotstar rainbow colour wheel -def dotstar_color_wheel(wheel_pos): - """Color wheel to allow for cycling through the rainbow of RGB colors.""" - wheel_pos = wheel_pos % 255 - - if wheel_pos < 85: - return 255 - wheel_pos * 3, 0, wheel_pos * 3 - elif wheel_pos < 170: - wheel_pos -= 85 - return 0, wheel_pos * 3, 255 - wheel_pos * 3 - else: - wheel_pos -= 170 - return wheel_pos * 3, 255 - wheel_pos * 3, 0 - - - -# Disable LDO2 by default -enable_LDO2(False) diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c b/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c index 5a29e029c..c294fb9d3 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c @@ -45,12 +45,12 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO43) }, { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, - { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) }, { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO8) }, - { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) }, { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO9) }, { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) }, @@ -82,10 +82,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO11) }, { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO11) }, - // { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) }, // MTDO { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_GPIO40) }, // MTDO - - // { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) }, { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_GPIO45) }, diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_dotstar.py b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_dotstar.py deleted file mode 100755 index 65fbbe868..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_dotstar.py +++ /dev/null @@ -1,198 +0,0 @@ -# The MIT License (MIT) -# -# Copyright (c) 2016 Damien P. George (original Neopixel object) -# Copyright (c) 2017 Ladyada -# Copyright (c) 2017 Scott Shawcroft for Adafruit Industries -# Copyright (c) 2019 Roy Hooper -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -# THE SOFTWARE. - -""" -`adafruit_dotstar` - DotStar strip driver (for CircuitPython 5.0+ with _pixelbuf) -================================================================================= - -* Author(s): Damien P. George, Limor Fried, Scott Shawcroft & Roy Hooper -""" - -# pylint: disable=ungrouped-imports -import sys -import busio -import digitalio - -if sys.implementation.version[0] < 5: - import adafruit_pypixelbuf as _pixelbuf -else: - try: - import _pixelbuf - except ImportError: - import adafruit_pypixelbuf as _pixelbuf - -__version__ = "0.0.0-auto.0" -__repo__ = "https://github.com/adafruit/Adafruit_CircuitPython_DotStar.git" - -START_HEADER_SIZE = 4 - -# Pixel color order constants -RBG = "PRBG" -"""Red Blue Green""" -RGB = "PRGB" -"""Red Green Blue""" -GRB = "PGRB" -"""Green Red Blue""" -GBR = "PGBR" -"""Green Blue Red""" -BRG = "PBRG" -"""Blue Red Green""" -BGR = "PBGR" -"""Blue Green Red""" - - -class DotStar(_pixelbuf.PixelBuf): - """ - A sequence of dotstars. - - :param ~microcontroller.Pin clock: The pin to output dotstar clock on. - :param ~microcontroller.Pin data: The pin to output dotstar data on. - :param int n: The number of dotstars in the chain - :param float brightness: Brightness of the pixels between 0.0 and 1.0 - :param bool auto_write: True if the dotstars should immediately change when - set. If False, `show` must be called explicitly. - :param str pixel_order: Set the pixel order on the strip - different - strips implement this differently. If you send red, and it looks blue - or green on the strip, modify this! It should be one of the values above. - :param int baudrate: Desired clock rate if using hardware SPI (ignored if - using 'soft' SPI). This is only a recommendation; the actual clock - rate may be slightly different depending on what the system hardware - can provide. - - Example for Gemma M0: - - .. code-block:: python - - import adafruit_dotstar - import time - from board import * - - RED = 0x100000 - - with adafruit_dotstar.DotStar(APA102_SCK, APA102_MOSI, 1) as pixels: - pixels[0] = RED - time.sleep(2) - - .. py:method:: DotStar.show() - - Shows the new colors on the dotstars themselves if they haven't already - been autowritten. - - The colors may or may not be showing after this function returns because - it may be done asynchronously. - - .. py:method:: DotStar.fill(color) - - Colors all dotstars the given ***color***. - - .. py:attribute:: brightness - - Overall brightness of all dotstars (0 to 1.0) - """ - - def __init__( - self, - clock, - data, - n, - *, - brightness=1.0, - auto_write=True, - pixel_order=BGR, - baudrate=4000000 - ): - self._spi = None - try: - self._spi = busio.SPI(clock, MOSI=data) - while not self._spi.try_lock(): - pass - self._spi.configure(baudrate=baudrate) - - except (NotImplementedError, ValueError): - self.dpin = digitalio.DigitalInOut(data) - self.cpin = digitalio.DigitalInOut(clock) - self.dpin.direction = digitalio.Direction.OUTPUT - self.cpin.direction = digitalio.Direction.OUTPUT - self.cpin.value = False - - # Supply one extra clock cycle for each two pixels in the strip. - trailer_size = n // 16 - if n % 16 != 0: - trailer_size += 1 - - # Four empty bytes for the header. - header = bytearray(START_HEADER_SIZE) - # 0xff bytes for the trailer. - trailer = bytearray(b"\xff") * trailer_size - - super().__init__( - n, - byteorder=pixel_order, - brightness=brightness, - auto_write=auto_write, - header=header, - trailer=trailer, - ) - - def deinit(self): - """Blank out the DotStars and release the resources.""" - self.fill(0) - self.show() - if self._spi: - self._spi.deinit() - else: - self.dpin.deinit() - self.cpin.deinit() - - def __enter__(self): - return self - - def __exit__(self, exception_type, exception_value, traceback): - self.deinit() - - def __repr__(self): - return "[" + ", ".join([str(x) for x in self]) + "]" - - @property - def n(self): - """ - The number of dotstars in the chain (read-only) - """ - return len(self) - - def _transmit(self, buffer): - if self._spi: - self._spi.write(buffer) - else: - self._ds_writebytes(buffer) - - def _ds_writebytes(self, buffer): - for b in buffer: - for _ in range(8): - self.dpin.value = b & 0x80 - self.cpin.value = True - self.cpin.value = False - b = b << 1 - self.cpin.value = False diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_pypixelbuf.py b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_pypixelbuf.py deleted file mode 100755 index 3cb83e970..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/adafruit_pypixelbuf.py +++ /dev/null @@ -1,374 +0,0 @@ -# The MIT License (MIT) -# -# Based on the Adafruit NeoPixel and Adafruit Dotstar CircuitPython drivers. -# Copyright (c) 2019-2020 Roy Hooper -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -# THE SOFTWARE. - -""" -`adafruit_pypixelbuf` - A pure python implementation of _pixelbuf -================================================================= -This class is used when _pixelbuf is not available in CircuitPython. It is based on the work -in neopixel.py and adafruit_dotstar.py. - -* Author(s): Damien P. George & Limor Fried & Scott Shawcroft & Roy Hooper -""" - -DOTSTAR_LED_START_FULL_BRIGHT = 0xFF -DOTSTAR_LED_START = 0b11100000 # Three "1" bits, followed by 5 brightness bits -DOTSTAR_LED_BRIGHTNESS = 0b00011111 - - -class PixelBuf: # pylint: disable=too-many-instance-attributes - """ - A sequence of RGB/RGBW pixels. - - This is the pure python implementation of CircuitPython's _pixelbuf. - - :param ~int n: Number of pixels - :param ~str byteorder: Byte order string constant (also sets bpp) - :param ~float brightness: Brightness (0 to 1.0, default 1.0) - :param ~bool auto_write: Whether to automatically write pixels (Default False) - :param bytes header: Sequence of bytes to always send before pixel values. - :param bytes trailer: Sequence of bytes to always send after pixel values. - """ - - def __init__( # pylint: disable=too-many-locals,too-many-arguments - self, - n, - byteorder="BGR", - brightness=1.0, - auto_write=False, - header=None, - trailer=None, - ): - - bpp, byteorder_tuple, has_white, dotstar_mode = self.parse_byteorder(byteorder) - - self.auto_write = False - - effective_bpp = 4 if dotstar_mode else bpp - _bytes = effective_bpp * n - buf = bytearray(_bytes) - offset = 0 - - if header is not None: - if not isinstance(header, bytearray): - raise TypeError("header must be a bytearray") - buf = header + buf - offset = len(header) - - if trailer is not None: - if not isinstance(trailer, bytearray): - raise TypeError("trailer must be a bytearray") - buf += trailer - - self._pixels = n - self._bytes = _bytes - self._byteorder = byteorder_tuple - self._byteorder_string = byteorder - self._has_white = has_white - self._bpp = bpp - self._pre_brightness_buffer = None - self._post_brightness_buffer = buf - self._offset = offset - self._dotstar_mode = dotstar_mode - self._pixel_step = effective_bpp - - if dotstar_mode: - self._byteorder_tuple = ( - byteorder_tuple[0] + 1, - byteorder_tuple[1] + 1, - byteorder_tuple[2] + 1, - 0, - ) - # Initialize the buffer with the dotstar start bytes. - for i in range(self._offset, self._bytes + self._offset, 4): - self._post_brightness_buffer[i] = DOTSTAR_LED_START_FULL_BRIGHT - - self._brightness = 1.0 - self.brightness = brightness - - self.auto_write = auto_write - - @staticmethod - def parse_byteorder(byteorder): - """ - Parse a Byteorder string for validity and determine bpp, byte order, and - dostar brightness bits. - - Byteorder strings may contain the following characters: - R - Red - G - Green - B - Blue - W - White - P - PWM (PWM Duty cycle for pixel - dotstars 0 - 1.0) - - :param: ~str bpp: bpp string. - :return: ~tuple: bpp, byteorder, has_white, dotstar_mode - """ - bpp = len(byteorder) - dotstar_mode = False - has_white = False - - if byteorder.strip("RGBWP") != "": - raise ValueError("Invalid Byteorder string") - - try: - r = byteorder.index("R") - g = byteorder.index("G") - b = byteorder.index("B") - except ValueError: - raise ValueError("Invalid Byteorder string") - if "W" in byteorder: - w = byteorder.index("W") - byteorder = (r, g, b, w) - has_white = True - elif "P" in byteorder: - lum = byteorder.index("P") - byteorder = (r, g, b, lum) - dotstar_mode = True - else: - byteorder = (r, g, b) - - return bpp, byteorder, has_white, dotstar_mode - - @property - def bpp(self): - """ - The number of bytes per pixel in the buffer (read-only). - """ - return self._bpp - - @property - def brightness(self): - """ - Float value between 0 and 1. Output brightness. - - When brightness is less than 1.0, a second buffer will be used to store the color values - before they are adjusted for brightness. - """ - return self._brightness - - @brightness.setter - def brightness(self, value): - value = min(max(value, 0.0), 1.0) - change = value - self._brightness - if -0.001 < change < 0.001: - return - - self._brightness = value - - if self._pre_brightness_buffer is None: - self._pre_brightness_buffer = bytearray(self._post_brightness_buffer) - - # Adjust brightness of existing pixels - offset_check = self._offset % self._pixel_step - for i in range(self._offset, self._bytes + self._offset): - # Don't adjust per-pixel luminance bytes in dotstar mode - if self._dotstar_mode and (i % 4 != offset_check): - continue - self._post_brightness_buffer[i] = int( - self._pre_brightness_buffer[i] * self._brightness - ) - - if self.auto_write: - self.show() - - @property - def byteorder(self): - """ - ByteOrder string for the buffer (read-only) - """ - return self._byteorder_string - - def __len__(self): - """ - Number of pixels. - """ - return self._pixels - - def show(self): - """ - Call the associated write function to display the pixels - """ - return self._transmit(self._post_brightness_buffer) - - def fill(self, color): - """ - Fills the given pixelbuf with the given color. - :param pixelbuf: A pixel object. - :param color: Color to set. - """ - r, g, b, w = self._parse_color(color) - for i in range(self._pixels): - self._set_item(i, r, g, b, w) - if self.auto_write: - self.show() - - def _parse_color(self, value): - r = 0 - g = 0 - b = 0 - w = 0 - if isinstance(value, int): - r = value >> 16 - g = (value >> 8) & 0xFF - b = value & 0xFF - w = 0 - - if self._dotstar_mode: - w = 1.0 - else: - if len(value) < 3 or len(value) > 4: - raise ValueError( - "Expected tuple of length {}, got {}".format(self._bpp, len(value)) - ) - if len(value) == self._bpp: - if self._bpp == 3: - r, g, b = value - else: - r, g, b, w = value - elif len(value) == 3: - r, g, b = value - if self._dotstar_mode: - w = 1.0 - - if self._bpp == 4: - if self._dotstar_mode: - # LED startframe is three "1" bits, followed by 5 brightness bits - # then 8 bits for each of R, G, and B. The order of those 3 are configurable and - # vary based on hardware - w = (int(w * 31) & 0b00011111) | DOTSTAR_LED_START - elif ( - self._has_white - and (isinstance(value, int) or len(value) == 3) - and r == g - and g == b - ): - # If all components are the same and we have a white pixel then use it - # instead of the individual components when all 4 values aren't explicitly given. - w = r - r = 0 - g = 0 - b = 0 - - return (r, g, b, w) - - def _set_item( - self, index, r, g, b, w - ): # pylint: disable=too-many-locals,too-many-branches,too-many-arguments - if index < 0: - index += len(self) - if index >= self._pixels or index < 0: - raise IndexError - offset = self._offset + (index * self._bpp) - - if self._pre_brightness_buffer is not None: - if self._bpp == 4: - self._pre_brightness_buffer[offset + self._byteorder[3]] = w - self._pre_brightness_buffer[offset + self._byteorder[0]] = r - self._pre_brightness_buffer[offset + self._byteorder[1]] = g - self._pre_brightness_buffer[offset + self._byteorder[2]] = b - - if self._bpp == 4: - # Only apply brightness if w is actually white (aka not DotStar.) - if not self._dotstar_mode: - w = int(w * self._brightness) - self._post_brightness_buffer[offset + self._byteorder[3]] = w - - self._post_brightness_buffer[offset + self._byteorder[0]] = int( - r * self._brightness - ) - self._post_brightness_buffer[offset + self._byteorder[1]] = int( - g * self._brightness - ) - self._post_brightness_buffer[offset + self._byteorder[2]] = int( - b * self._brightness - ) - - def __setitem__(self, index, val): - if isinstance(index, slice): - start, stop, step = index.indices(self._pixels) - for val_i, in_i in enumerate(range(start, stop, step)): - r, g, b, w = self._parse_color(val[val_i]) - self._set_item(in_i, r, g, b, w) - else: - r, g, b, w = self._parse_color(val) - self._set_item(index, r, g, b, w) - - if self.auto_write: - self.show() - - def _getitem(self, index): - start = self._offset + (index * self._bpp) - buffer = ( - self._pre_brightness_buffer - if self._pre_brightness_buffer is not None - else self._post_brightness_buffer - ) - value = [ - buffer[start + self._byteorder[0]], - buffer[start + self._byteorder[1]], - buffer[start + self._byteorder[2]], - ] - if self._has_white: - value.append(buffer[start + self._byteorder[3]]) - elif self._dotstar_mode: - value.append( - (buffer[start + self._byteorder[3]] & DOTSTAR_LED_BRIGHTNESS) / 31.0 - ) - return value - - def __getitem__(self, index): - if isinstance(index, slice): - out = [] - for in_i in range( - *index.indices(len(self._post_brightness_buffer) // self._bpp) - ): - out.append(self._getitem(in_i)) - return out - if index < 0: - index += len(self) - if index >= self._pixels or index < 0: - raise IndexError - return self._getitem(index) - - def _transmit(self, buffer): - raise NotImplementedError("Must be subclassed") - - -def wheel(pos): - """ - Helper to create a colorwheel. - - :param pos: int 0-255 of color value to return - :return: tuple of RGB values - """ - # Input a value 0 to 255 to get a color value. - # The colours are a transition r - g - b - back to r. - if pos < 0 or pos > 255: - return 0, 0, 0 - if pos < 85: - return 255 - pos * 3, pos * 3, 0 - if pos < 170: - pos -= 85 - return 0, 255 - pos * 3, pos * 3 - pos -= 170 - return pos * 3, 0, 255 - pos * 3 diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/feathers2.py b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/feathers2.py deleted file mode 100644 index 0631cad7f..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/feathers2.py +++ /dev/null @@ -1,47 +0,0 @@ -# FeatherS2 Helper Library -# 2020 Seon Rozenblum, Unexpected Maker -# -# Project home: -# https://feathers2.io -# - -# Import required libraries -import time -import board -from digitalio import DigitalInOut, Direction, Pull - - -# Helper functions - -def enable_LDO2(state): - """Set the power for the second on-board LDO to allow no current draw when not needed.""" - - # Grab a reference to the LDO2 IO (21 in this case) - ldo2 = DigitalInOut(board.LDO2) - ldo2.direction = Direction.OUTPUT - - # Set the LDO2 power pin on / off - ldo2.value = state - - # A small delay to let the IO change state - time.sleep(0.035) - - -# Dotstar rainbow colour wheel -def dotstar_color_wheel(wheel_pos): - """Color wheel to allow for cycling through the rainbow of RGB colors.""" - wheel_pos = wheel_pos % 255 - - if wheel_pos < 85: - return 255 - wheel_pos * 3, 0, wheel_pos * 3 - elif wheel_pos < 170: - wheel_pos -= 85 - return 0, wheel_pos * 3, 255 - wheel_pos * 3 - else: - wheel_pos -= 170 - return wheel_pos * 3, 255 - wheel_pos * 3, 0 - - - -# Disable LDO2 by default -enable_LDO2(False) diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h index a65d00206..726c46e40 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h @@ -30,11 +30,9 @@ #define MICROPY_HW_MCU_NAME "ESP32S2" #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) - -#define BOARD_USER_SAFE_MODE_ACTION "pressing boot button at start up.\n" +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n") #define AUTORESET_DELAY_MS 500 -// Doesn't work with this on. -// #define MICROPY_HW_APA102_MOSI (&pin_GPIO44) -// #define MICROPY_HW_APA102_SCK (&pin_GPIO45) +#define MICROPY_HW_APA102_MOSI (&pin_GPIO40) +#define MICROPY_HW_APA102_SCK (&pin_GPIO45) \ No newline at end of file diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_dotstar.py b/ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_dotstar.py deleted file mode 100755 index 65fbbe868..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_dotstar.py +++ /dev/null @@ -1,198 +0,0 @@ -# The MIT License (MIT) -# -# Copyright (c) 2016 Damien P. George (original Neopixel object) -# Copyright (c) 2017 Ladyada -# Copyright (c) 2017 Scott Shawcroft for Adafruit Industries -# Copyright (c) 2019 Roy Hooper -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -# THE SOFTWARE. - -""" -`adafruit_dotstar` - DotStar strip driver (for CircuitPython 5.0+ with _pixelbuf) -================================================================================= - -* Author(s): Damien P. George, Limor Fried, Scott Shawcroft & Roy Hooper -""" - -# pylint: disable=ungrouped-imports -import sys -import busio -import digitalio - -if sys.implementation.version[0] < 5: - import adafruit_pypixelbuf as _pixelbuf -else: - try: - import _pixelbuf - except ImportError: - import adafruit_pypixelbuf as _pixelbuf - -__version__ = "0.0.0-auto.0" -__repo__ = "https://github.com/adafruit/Adafruit_CircuitPython_DotStar.git" - -START_HEADER_SIZE = 4 - -# Pixel color order constants -RBG = "PRBG" -"""Red Blue Green""" -RGB = "PRGB" -"""Red Green Blue""" -GRB = "PGRB" -"""Green Red Blue""" -GBR = "PGBR" -"""Green Blue Red""" -BRG = "PBRG" -"""Blue Red Green""" -BGR = "PBGR" -"""Blue Green Red""" - - -class DotStar(_pixelbuf.PixelBuf): - """ - A sequence of dotstars. - - :param ~microcontroller.Pin clock: The pin to output dotstar clock on. - :param ~microcontroller.Pin data: The pin to output dotstar data on. - :param int n: The number of dotstars in the chain - :param float brightness: Brightness of the pixels between 0.0 and 1.0 - :param bool auto_write: True if the dotstars should immediately change when - set. If False, `show` must be called explicitly. - :param str pixel_order: Set the pixel order on the strip - different - strips implement this differently. If you send red, and it looks blue - or green on the strip, modify this! It should be one of the values above. - :param int baudrate: Desired clock rate if using hardware SPI (ignored if - using 'soft' SPI). This is only a recommendation; the actual clock - rate may be slightly different depending on what the system hardware - can provide. - - Example for Gemma M0: - - .. code-block:: python - - import adafruit_dotstar - import time - from board import * - - RED = 0x100000 - - with adafruit_dotstar.DotStar(APA102_SCK, APA102_MOSI, 1) as pixels: - pixels[0] = RED - time.sleep(2) - - .. py:method:: DotStar.show() - - Shows the new colors on the dotstars themselves if they haven't already - been autowritten. - - The colors may or may not be showing after this function returns because - it may be done asynchronously. - - .. py:method:: DotStar.fill(color) - - Colors all dotstars the given ***color***. - - .. py:attribute:: brightness - - Overall brightness of all dotstars (0 to 1.0) - """ - - def __init__( - self, - clock, - data, - n, - *, - brightness=1.0, - auto_write=True, - pixel_order=BGR, - baudrate=4000000 - ): - self._spi = None - try: - self._spi = busio.SPI(clock, MOSI=data) - while not self._spi.try_lock(): - pass - self._spi.configure(baudrate=baudrate) - - except (NotImplementedError, ValueError): - self.dpin = digitalio.DigitalInOut(data) - self.cpin = digitalio.DigitalInOut(clock) - self.dpin.direction = digitalio.Direction.OUTPUT - self.cpin.direction = digitalio.Direction.OUTPUT - self.cpin.value = False - - # Supply one extra clock cycle for each two pixels in the strip. - trailer_size = n // 16 - if n % 16 != 0: - trailer_size += 1 - - # Four empty bytes for the header. - header = bytearray(START_HEADER_SIZE) - # 0xff bytes for the trailer. - trailer = bytearray(b"\xff") * trailer_size - - super().__init__( - n, - byteorder=pixel_order, - brightness=brightness, - auto_write=auto_write, - header=header, - trailer=trailer, - ) - - def deinit(self): - """Blank out the DotStars and release the resources.""" - self.fill(0) - self.show() - if self._spi: - self._spi.deinit() - else: - self.dpin.deinit() - self.cpin.deinit() - - def __enter__(self): - return self - - def __exit__(self, exception_type, exception_value, traceback): - self.deinit() - - def __repr__(self): - return "[" + ", ".join([str(x) for x in self]) + "]" - - @property - def n(self): - """ - The number of dotstars in the chain (read-only) - """ - return len(self) - - def _transmit(self, buffer): - if self._spi: - self._spi.write(buffer) - else: - self._ds_writebytes(buffer) - - def _ds_writebytes(self, buffer): - for b in buffer: - for _ in range(8): - self.dpin.value = b & 0x80 - self.cpin.value = True - self.cpin.value = False - b = b << 1 - self.cpin.value = False diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_pypixelbuf.py b/ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_pypixelbuf.py deleted file mode 100755 index 3cb83e970..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_pros2/adafruit_pypixelbuf.py +++ /dev/null @@ -1,374 +0,0 @@ -# The MIT License (MIT) -# -# Based on the Adafruit NeoPixel and Adafruit Dotstar CircuitPython drivers. -# Copyright (c) 2019-2020 Roy Hooper -# -# Permission is hereby granted, free of charge, to any person obtaining a copy -# of this software and associated documentation files (the "Software"), to deal -# in the Software without restriction, including without limitation the rights -# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -# copies of the Software, and to permit persons to whom the Software is -# furnished to do so, subject to the following conditions: -# -# The above copyright notice and this permission notice shall be included in -# all copies or substantial portions of the Software. -# -# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN -# THE SOFTWARE. - -""" -`adafruit_pypixelbuf` - A pure python implementation of _pixelbuf -================================================================= -This class is used when _pixelbuf is not available in CircuitPython. It is based on the work -in neopixel.py and adafruit_dotstar.py. - -* Author(s): Damien P. George & Limor Fried & Scott Shawcroft & Roy Hooper -""" - -DOTSTAR_LED_START_FULL_BRIGHT = 0xFF -DOTSTAR_LED_START = 0b11100000 # Three "1" bits, followed by 5 brightness bits -DOTSTAR_LED_BRIGHTNESS = 0b00011111 - - -class PixelBuf: # pylint: disable=too-many-instance-attributes - """ - A sequence of RGB/RGBW pixels. - - This is the pure python implementation of CircuitPython's _pixelbuf. - - :param ~int n: Number of pixels - :param ~str byteorder: Byte order string constant (also sets bpp) - :param ~float brightness: Brightness (0 to 1.0, default 1.0) - :param ~bool auto_write: Whether to automatically write pixels (Default False) - :param bytes header: Sequence of bytes to always send before pixel values. - :param bytes trailer: Sequence of bytes to always send after pixel values. - """ - - def __init__( # pylint: disable=too-many-locals,too-many-arguments - self, - n, - byteorder="BGR", - brightness=1.0, - auto_write=False, - header=None, - trailer=None, - ): - - bpp, byteorder_tuple, has_white, dotstar_mode = self.parse_byteorder(byteorder) - - self.auto_write = False - - effective_bpp = 4 if dotstar_mode else bpp - _bytes = effective_bpp * n - buf = bytearray(_bytes) - offset = 0 - - if header is not None: - if not isinstance(header, bytearray): - raise TypeError("header must be a bytearray") - buf = header + buf - offset = len(header) - - if trailer is not None: - if not isinstance(trailer, bytearray): - raise TypeError("trailer must be a bytearray") - buf += trailer - - self._pixels = n - self._bytes = _bytes - self._byteorder = byteorder_tuple - self._byteorder_string = byteorder - self._has_white = has_white - self._bpp = bpp - self._pre_brightness_buffer = None - self._post_brightness_buffer = buf - self._offset = offset - self._dotstar_mode = dotstar_mode - self._pixel_step = effective_bpp - - if dotstar_mode: - self._byteorder_tuple = ( - byteorder_tuple[0] + 1, - byteorder_tuple[1] + 1, - byteorder_tuple[2] + 1, - 0, - ) - # Initialize the buffer with the dotstar start bytes. - for i in range(self._offset, self._bytes + self._offset, 4): - self._post_brightness_buffer[i] = DOTSTAR_LED_START_FULL_BRIGHT - - self._brightness = 1.0 - self.brightness = brightness - - self.auto_write = auto_write - - @staticmethod - def parse_byteorder(byteorder): - """ - Parse a Byteorder string for validity and determine bpp, byte order, and - dostar brightness bits. - - Byteorder strings may contain the following characters: - R - Red - G - Green - B - Blue - W - White - P - PWM (PWM Duty cycle for pixel - dotstars 0 - 1.0) - - :param: ~str bpp: bpp string. - :return: ~tuple: bpp, byteorder, has_white, dotstar_mode - """ - bpp = len(byteorder) - dotstar_mode = False - has_white = False - - if byteorder.strip("RGBWP") != "": - raise ValueError("Invalid Byteorder string") - - try: - r = byteorder.index("R") - g = byteorder.index("G") - b = byteorder.index("B") - except ValueError: - raise ValueError("Invalid Byteorder string") - if "W" in byteorder: - w = byteorder.index("W") - byteorder = (r, g, b, w) - has_white = True - elif "P" in byteorder: - lum = byteorder.index("P") - byteorder = (r, g, b, lum) - dotstar_mode = True - else: - byteorder = (r, g, b) - - return bpp, byteorder, has_white, dotstar_mode - - @property - def bpp(self): - """ - The number of bytes per pixel in the buffer (read-only). - """ - return self._bpp - - @property - def brightness(self): - """ - Float value between 0 and 1. Output brightness. - - When brightness is less than 1.0, a second buffer will be used to store the color values - before they are adjusted for brightness. - """ - return self._brightness - - @brightness.setter - def brightness(self, value): - value = min(max(value, 0.0), 1.0) - change = value - self._brightness - if -0.001 < change < 0.001: - return - - self._brightness = value - - if self._pre_brightness_buffer is None: - self._pre_brightness_buffer = bytearray(self._post_brightness_buffer) - - # Adjust brightness of existing pixels - offset_check = self._offset % self._pixel_step - for i in range(self._offset, self._bytes + self._offset): - # Don't adjust per-pixel luminance bytes in dotstar mode - if self._dotstar_mode and (i % 4 != offset_check): - continue - self._post_brightness_buffer[i] = int( - self._pre_brightness_buffer[i] * self._brightness - ) - - if self.auto_write: - self.show() - - @property - def byteorder(self): - """ - ByteOrder string for the buffer (read-only) - """ - return self._byteorder_string - - def __len__(self): - """ - Number of pixels. - """ - return self._pixels - - def show(self): - """ - Call the associated write function to display the pixels - """ - return self._transmit(self._post_brightness_buffer) - - def fill(self, color): - """ - Fills the given pixelbuf with the given color. - :param pixelbuf: A pixel object. - :param color: Color to set. - """ - r, g, b, w = self._parse_color(color) - for i in range(self._pixels): - self._set_item(i, r, g, b, w) - if self.auto_write: - self.show() - - def _parse_color(self, value): - r = 0 - g = 0 - b = 0 - w = 0 - if isinstance(value, int): - r = value >> 16 - g = (value >> 8) & 0xFF - b = value & 0xFF - w = 0 - - if self._dotstar_mode: - w = 1.0 - else: - if len(value) < 3 or len(value) > 4: - raise ValueError( - "Expected tuple of length {}, got {}".format(self._bpp, len(value)) - ) - if len(value) == self._bpp: - if self._bpp == 3: - r, g, b = value - else: - r, g, b, w = value - elif len(value) == 3: - r, g, b = value - if self._dotstar_mode: - w = 1.0 - - if self._bpp == 4: - if self._dotstar_mode: - # LED startframe is three "1" bits, followed by 5 brightness bits - # then 8 bits for each of R, G, and B. The order of those 3 are configurable and - # vary based on hardware - w = (int(w * 31) & 0b00011111) | DOTSTAR_LED_START - elif ( - self._has_white - and (isinstance(value, int) or len(value) == 3) - and r == g - and g == b - ): - # If all components are the same and we have a white pixel then use it - # instead of the individual components when all 4 values aren't explicitly given. - w = r - r = 0 - g = 0 - b = 0 - - return (r, g, b, w) - - def _set_item( - self, index, r, g, b, w - ): # pylint: disable=too-many-locals,too-many-branches,too-many-arguments - if index < 0: - index += len(self) - if index >= self._pixels or index < 0: - raise IndexError - offset = self._offset + (index * self._bpp) - - if self._pre_brightness_buffer is not None: - if self._bpp == 4: - self._pre_brightness_buffer[offset + self._byteorder[3]] = w - self._pre_brightness_buffer[offset + self._byteorder[0]] = r - self._pre_brightness_buffer[offset + self._byteorder[1]] = g - self._pre_brightness_buffer[offset + self._byteorder[2]] = b - - if self._bpp == 4: - # Only apply brightness if w is actually white (aka not DotStar.) - if not self._dotstar_mode: - w = int(w * self._brightness) - self._post_brightness_buffer[offset + self._byteorder[3]] = w - - self._post_brightness_buffer[offset + self._byteorder[0]] = int( - r * self._brightness - ) - self._post_brightness_buffer[offset + self._byteorder[1]] = int( - g * self._brightness - ) - self._post_brightness_buffer[offset + self._byteorder[2]] = int( - b * self._brightness - ) - - def __setitem__(self, index, val): - if isinstance(index, slice): - start, stop, step = index.indices(self._pixels) - for val_i, in_i in enumerate(range(start, stop, step)): - r, g, b, w = self._parse_color(val[val_i]) - self._set_item(in_i, r, g, b, w) - else: - r, g, b, w = self._parse_color(val) - self._set_item(index, r, g, b, w) - - if self.auto_write: - self.show() - - def _getitem(self, index): - start = self._offset + (index * self._bpp) - buffer = ( - self._pre_brightness_buffer - if self._pre_brightness_buffer is not None - else self._post_brightness_buffer - ) - value = [ - buffer[start + self._byteorder[0]], - buffer[start + self._byteorder[1]], - buffer[start + self._byteorder[2]], - ] - if self._has_white: - value.append(buffer[start + self._byteorder[3]]) - elif self._dotstar_mode: - value.append( - (buffer[start + self._byteorder[3]] & DOTSTAR_LED_BRIGHTNESS) / 31.0 - ) - return value - - def __getitem__(self, index): - if isinstance(index, slice): - out = [] - for in_i in range( - *index.indices(len(self._post_brightness_buffer) // self._bpp) - ): - out.append(self._getitem(in_i)) - return out - if index < 0: - index += len(self) - if index >= self._pixels or index < 0: - raise IndexError - return self._getitem(index) - - def _transmit(self, buffer): - raise NotImplementedError("Must be subclassed") - - -def wheel(pos): - """ - Helper to create a colorwheel. - - :param pos: int 0-255 of color value to return - :return: tuple of RGB values - """ - # Input a value 0 to 255 to get a color value. - # The colours are a transition r - g - b - back to r. - if pos < 0 or pos > 255: - return 0, 0, 0 - if pos < 85: - return 255 - pos * 3, pos * 3, 0 - if pos < 170: - pos -= 85 - return 0, 255 - pos * 3, pos * 3 - pos -= 170 - return pos * 3, 0, 255 - pos * 3 diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/board.c b/ports/esp32s2/boards/unexpectedmaker_pros2/board.c deleted file mode 100644 index 1dc30b5af..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_pros2/board.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "boards/board.h" -#include "mpconfigboard.h" -#include "shared-bindings/microcontroller/Pin.h" - -void board_init(void) { - // USB - common_hal_never_reset_pin(&pin_GPIO19); - common_hal_never_reset_pin(&pin_GPIO20); - - // Debug UART - common_hal_never_reset_pin(&pin_GPIO43); - common_hal_never_reset_pin(&pin_GPIO44); - - // SPI Flash and RAM - common_hal_never_reset_pin(&pin_GPIO26); - common_hal_never_reset_pin(&pin_GPIO27); - common_hal_never_reset_pin(&pin_GPIO28); - common_hal_never_reset_pin(&pin_GPIO29); - common_hal_never_reset_pin(&pin_GPIO30); - common_hal_never_reset_pin(&pin_GPIO31); - common_hal_never_reset_pin(&pin_GPIO32); -} - -bool board_requests_safe_mode(void) { - return false; -} - -void reset_board(void) { - -} diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.h deleted file mode 100644 index 2cfb7b6a0..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -//Micropython setup - -#define MICROPY_HW_BOARD_NAME "ProS2" -#define MICROPY_HW_MCU_NAME "ESP32S2" - -#define AUTORESET_DELAY_MS 500 - -#define MICROPY_HW_APA102_MOSI (&pin_GPIO40) -#define MICROPY_HW_APA102_SCK (&pin_GPIO45) diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.mk b/ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.mk deleted file mode 100644 index cb6823ba6..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_pros2/mpconfigboard.mk +++ /dev/null @@ -1,21 +0,0 @@ -USB_VID = 0x239A -USB_PID = 0x80AA -USB_PRODUCT = "ProS2" -USB_MANUFACTURER = "UnexpectedMaker" -USB_DEVICES = "CDC,MSC,HID" - -INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = MPZ - -# The default queue depth of 16 overflows on release builds, -# so increase it to 32. -CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 - -CIRCUITPY_ESP_FLASH_MODE=qio -CIRCUITPY_ESP_FLASH_FREQ=40m -CIRCUITPY_ESP_FLASH_SIZE=16MB - -CIRCUITPY_BITBANG_APA102 = 1 - -# Include these Python libraries in firmware. -FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DotStar diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/pins.c b/ports/esp32s2/boards/unexpectedmaker_pros2/pins.c deleted file mode 100644 index 349ad1bd5..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_pros2/pins.c +++ /dev/null @@ -1,58 +0,0 @@ -#include "shared-bindings/board/__init__.h" - -STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) }, - { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO17) }, - - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) }, - { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO18) }, - - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO4) }, - { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO4) }, - - { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO12) }, - { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO12) }, - - { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO6) }, - { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO6) }, - - { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO5) }, - { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO5) }, - - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) }, - { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO36) }, - - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) }, - { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO35) }, - - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) }, - { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO37) }, - - { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO44) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, - - { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO43) }, - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, - - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO8) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO9) }, - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO1) }, - { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO3) }, - { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO7) }, - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO8) }, - { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO9) }, - { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO10) }, - { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO11) }, - - { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_GPIO40) }, // MTDO - { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_GPIO45) }, - - { MP_ROM_QSTR(MP_QSTR_LDO2), MP_ROM_PTR(&pin_GPIO21) }, - - { MP_ROM_QSTR(MP_QSTR_VBAT_SENSE), MP_ROM_PTR(&pin_GPIO14) }, - - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, -}; -MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/pros2.py b/ports/esp32s2/boards/unexpectedmaker_pros2/pros2.py deleted file mode 100644 index 3d2397d5d..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_pros2/pros2.py +++ /dev/null @@ -1,63 +0,0 @@ -# Pros2 Helper Library -# 2020 Seon Rozenblum, Unexpected Maker -# -# Project home: -# https://pros2.io -# - -# Import required libraries -import time -import board -from digitalio import DigitalInOut, Direction, Pull -from analogio import AnalogIn - - -# Helper functions - -def enable_LDO2(state): - """Set the power for the second on-board LDO to allow no current draw when not needed.""" - - # Grab a reference to the LDO2 IO (21 in this case) - ldo2 = DigitalInOut(board.LDO2) - ldo2.direction = Direction.OUTPUT - - # Set the LDO2 power pin on / off - ldo2.value = state - - # A small delay to let the IO change state - time.sleep(0.035) - - -# Dotstar rainbow colour wheel -def dotstar_color_wheel(wheel_pos): - """Color wheel to allow for cycling through the rainbow of RGB colors.""" - wheel_pos = wheel_pos % 255 - - if wheel_pos < 85: - return 255 - wheel_pos * 3, 0, wheel_pos * 3 - elif wheel_pos < 170: - wheel_pos -= 85 - return 0, wheel_pos * 3, 255 - wheel_pos * 3 - else: - wheel_pos -= 170 - return wheel_pos * 3, 255 - wheel_pos * 3, 0 - - -# Get a *rough* estimate of the current battery voltage -# If the battery is not present, the charge IC will still report it's trying to charge at X voltage -# so it will still show a voltage. -def get_battery_voltage(): - """ - Returns the current battery voltage. If no battery is connected, returns 3.7V - This is an approximation only, but useful to detect of the charge state of the battery is getting low. - """ - adc = AnalogIn(board.VBAT_SENSE) - - measured_vbat = adc.value # Read the value - measured_vbat /= 4095 # divide by 4095 as we are using the default ADC voltage range of 0-1V - measured_vbat *= 3.7 # Multiply by 3.7V, our reference voltage - return measured_vbat - - -# Disable LDO2 by default -enable_LDO2(False) diff --git a/ports/esp32s2/boards/unexpectedmaker_pros2/sdkconfig b/ports/esp32s2/boards/unexpectedmaker_pros2/sdkconfig deleted file mode 100644 index b73c4a8c2..000000000 --- a/ports/esp32s2/boards/unexpectedmaker_pros2/sdkconfig +++ /dev/null @@ -1,35 +0,0 @@ -CONFIG_ESP32S2_SPIRAM_SUPPORT=y - -# -# SPI RAM config -# -# CONFIG_SPIRAM_TYPE_AUTO is not set -# CONFIG_SPIRAM_TYPE_ESPPSRAM16 is not set -# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set -CONFIG_SPIRAM_TYPE_ESPPSRAM64=y -CONFIG_SPIRAM_SIZE=8388608 - -# -# PSRAM clock and cs IO for ESP32S2 -# -CONFIG_DEFAULT_PSRAM_CLK_IO=30 -CONFIG_DEFAULT_PSRAM_CS_IO=26 -# end of PSRAM clock and cs IO for ESP32S2 - -CONFIG_SPIRAM_SPIWP_SD3_PIN=28 -# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set -# CONFIG_SPIRAM_RODATA is not set -# CONFIG_SPIRAM_USE_AHB_DBUS3 is not set -# CONFIG_SPIRAM_SPEED_80M is not set -CONFIG_SPIRAM_SPEED_40M=y -# CONFIG_SPIRAM_SPEED_26M is not set -# CONFIG_SPIRAM_SPEED_20M is not set -CONFIG_SPIRAM=y -CONFIG_SPIRAM_BOOT_INIT=y -# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set -CONFIG_SPIRAM_USE_MEMMAP=y -# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set -# CONFIG_SPIRAM_USE_MALLOC is not set -CONFIG_SPIRAM_MEMTEST=y -# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set -# end of SPI RAM config -- cgit v1.2.3 From 66b8559fd4e4ea7d50adb12a87b7bac208b5fc16 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Mon, 28 Sep 2020 18:59:29 -0400 Subject: Change submodule, rework all includes --- .gitmodules | 6 +-- ports/esp32s2/Makefile | 61 ++++++++++++---------- ports/esp32s2/bindings/espidf/__init__.c | 2 +- ports/esp32s2/common-hal/busio/I2C.c | 2 +- ports/esp32s2/common-hal/busio/I2C.h | 2 +- ports/esp32s2/common-hal/busio/SPI.c | 2 +- ports/esp32s2/common-hal/busio/SPI.h | 6 +-- ports/esp32s2/common-hal/busio/UART.c | 2 +- ports/esp32s2/common-hal/busio/UART.h | 2 +- ports/esp32s2/common-hal/digitalio/DigitalInOut.c | 4 +- ports/esp32s2/common-hal/microcontroller/Pin.c | 4 +- .../esp32s2/common-hal/microcontroller/Processor.c | 2 +- ports/esp32s2/common-hal/neopixel_write/__init__.c | 4 +- ports/esp32s2/common-hal/pulseio/PulseIn.h | 4 +- ports/esp32s2/common-hal/pulseio/PulseOut.h | 4 +- ports/esp32s2/common-hal/pwmio/PWMOut.c | 2 +- ports/esp32s2/common-hal/pwmio/PWMOut.h | 2 +- ports/esp32s2/common-hal/rtc/RTC.c | 2 +- ports/esp32s2/common-hal/socketpool/Socket.h | 3 +- ports/esp32s2/common-hal/socketpool/SocketPool.c | 2 +- ports/esp32s2/common-hal/ssl/SSLContext.h | 2 +- ports/esp32s2/common-hal/ssl/__init__.c | 2 +- ports/esp32s2/common-hal/wifi/Network.h | 2 +- ports/esp32s2/common-hal/wifi/Radio.c | 4 +- ports/esp32s2/common-hal/wifi/Radio.h | 2 +- ports/esp32s2/common-hal/wifi/ScannedNetworks.c | 2 +- ports/esp32s2/common-hal/wifi/ScannedNetworks.h | 3 +- ports/esp32s2/common-hal/wifi/__init__.c | 7 +-- ports/esp32s2/esp-idf | 2 +- ports/esp32s2/mphalport.c | 4 +- ports/esp32s2/peripherals/pins.h | 2 +- ports/esp32s2/peripherals/rmt.c | 2 +- ports/esp32s2/peripherals/rmt.h | 2 +- ports/esp32s2/supervisor/internal_flash.c | 2 +- ports/esp32s2/supervisor/port.c | 4 +- ports/esp32s2/supervisor/usb.c | 8 +-- shared-bindings/socketpool/Socket.c | 1 - shared-bindings/socketpool/SocketPool.c | 1 - shared-bindings/wifi/ScannedNetworks.c | 1 - 39 files changed, 89 insertions(+), 82 deletions(-) (limited to 'ports') diff --git a/.gitmodules b/.gitmodules index 3603cea69..f66ce8aaf 100644 --- a/.gitmodules +++ b/.gitmodules @@ -144,12 +144,12 @@ [submodule "frozen/Adafruit_CircuitPython_BLE_Apple_Notification_Center"] path = frozen/Adafruit_CircuitPython_BLE_Apple_Notification_Center url = https://github.com/adafruit/Adafruit_CircuitPython_BLE_Apple_Notification_Center -[submodule "ports/esp32s2/esp-idf"] - path = ports/esp32s2/esp-idf - url = https://github.com/tannewt/esp-idf.git [submodule "frozen/Adafruit_CircuitPython_RFM9x"] path = frozen/Adafruit_CircuitPython_RFM9x url = https://github.com/adafruit/Adafruit_CircuitPython_RFM9x.git [submodule "frozen/Adafruit_CircuitPython_RFM69"] path = frozen/Adafruit_CircuitPython_RFM69 url = https://github.com/adafruit/Adafruit_CircuitPython_RFM69.git +[submodule "ports/esp32s2/esp-idf"] + path = ports/esp32s2/esp-idf + url = https://github.com/espressif/esp-idf.git diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 229a3bf3a..49b9c6d2b 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -73,30 +73,37 @@ INC += -I./peripherals INC += -I../../lib/mp-readline INC += -I../../lib/tinyusb/src INC += -I../../supervisor/shared/usb -INC += -Iesp-idf/components/freertos/include/freertos -INC += -Iesp-idf/components/freertos/xtensa/include -INC += -Iesp-idf/components/esp32s2/include -INC += -Iesp-idf/components/xtensa/esp32s2/include -INC += -Iesp-idf/components/esp_common/include -INC += -Iesp-idf/components/esp_event/include -INC += -Iesp-idf/components/esp_netif/include -INC += -Iesp-idf/components/esp_ringbuf/include -INC += -Iesp-idf/components/esp_rom/include -INC += -Iesp-idf/components/esp_wifi/include -INC += -Iesp-idf/components/xtensa/include -INC += -Iesp-idf/components/esp_timer/include -INC += -Iesp-idf/components/mbedtls/mbedtls/include -INC += -Iesp-idf/components/mbedtls/port/include/ -INC += -Iesp-idf/components/newlib/platform_include -INC += -Iesp-idf/components/lwip/lwip/src/include -INC += -Iesp-idf/components/lwip/port/esp32/include -INC += -Iesp-idf/components/lwip/include/apps/sntp -INC += -Iesp-idf/components/soc/include -INC += -Iesp-idf/components/soc/src/esp32s2/include -INC += -Iesp-idf/components/soc/soc/include -INC += -Iesp-idf/components/soc/soc/esp32s2/include -INC += -Iesp-idf/components/heap/include -INC += -Iesp-idf/components/esp_system/include + +INC += -isystem esp-idf +INC += -isystem esp-idf/components/driver/include +INC += -isystem esp-idf/components/hal/esp32s2/include +INC += -isystem esp-idf/components/hal/include + +INC += -isystem esp-idf/components/freertos/include/freertos +INC += -isystem esp-idf/components/freertos/xtensa/include +INC += -isystem esp-idf/components/esp32s2/include +INC += -isystem esp-idf/components/xtensa/esp32s2/include +INC += -isystem esp-idf/components/esp_common/include +INC += -isystem esp-idf/components/esp_event/include +INC += -isystem esp-idf/components/esp_netif/include +INC += -isystem esp-idf/components/esp_ringbuf/include +INC += -isystem esp-idf/components/esp_rom/include +INC += -isystem esp-idf/components/esp_wifi/include +INC += -isystem esp-idf/components/xtensa/include +INC += -isystem esp-idf/components/esp_timer/include +INC += -isystem esp-idf/components/mbedtls/mbedtls/include +INC += -isystem esp-idf/components/mbedtls/port/include/ +INC += -isystem esp-idf/components/newlib/platform_include +INC += -isystem esp-idf/components/lwip/lwip/src/include +INC += -isystem esp-idf/components/lwip/port/esp32/include +INC += -isystem esp-idf/components/lwip/include/apps/sntp +INC += -isystem esp-idf/components/hal/include +INC += -isystem esp-idf/components/soc/include +INC += -isystem esp-idf/components/soc/src/esp32s2/include +INC += -isystem esp-idf/components/soc/soc/include +INC += -isystem esp-idf/components/soc/soc/esp32s2/include +INC += -isystem esp-idf/components/heap/include +INC += -isystem esp-idf/components/esp_system/include INC += -I$(BUILD)/esp-idf/config CFLAGS += -DHAVE_CONFIG_H \ @@ -256,7 +263,7 @@ menuconfig: $(BUILD)/esp-idf/config $(HEADER_BUILD)/qstr.i.last: | $(BUILD)/esp-idf/config/sdkconfig.h # Order here matters -ESP_IDF_COMPONENTS_LINK = freertos log esp_system esp32s2 bootloader_support pthread esp_timer vfs spi_flash app_update esp_common esp32s2 heap newlib driver xtensa soc esp_ringbuf esp_wifi esp_event wpa_supplicant mbedtls efuse nvs_flash esp_netif lwip esp_rom esp-tls +ESP_IDF_COMPONENTS_LINK = freertos log hal esp_system esp32s2 bootloader_support pthread esp_timer vfs spi_flash app_update esp_common esp32s2 heap newlib driver xtensa soc esp_ringbuf esp_wifi esp_event wpa_supplicant mbedtls efuse nvs_flash esp_netif lwip esp_rom esp-tls ESP_IDF_COMPONENTS_INCLUDE = driver freertos log soc @@ -268,11 +275,11 @@ ESP_IDF_WIFI_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_WIFI_COMPONENT MBEDTLS_COMPONENTS_LINK = crypto tls x509 MBEDTLS_COMPONENTS_LINK_EXPANDED = $(foreach component, $(MBEDTLS_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/mbedtls/mbedtls/library/libmbed$(component).a) -BINARY_BLOBS = esp-idf/components/xtensa/esp32s2/libhal.a +BINARY_BLOBS = esp-idf/components/xtensa/esp32s2/libxt_hal.a BINARY_WIFI_BLOBS = libcoexist.a libcore.a libespnow.a libmesh.a libnet80211.a libpp.a librtc.a libsmartconfig.a libphy.a BINARY_BLOBS += $(addprefix esp-idf/components/esp_wifi/lib/esp32s2/, $(BINARY_WIFI_BLOBS)) -ESP_IDF_COMPONENTS_EXPANDED += $(BUILD)/esp-idf/esp-idf/soc/soc/esp32s2/libsoc_esp32s2.a esp-idf/components/xtensa/esp32s2/libhal.a +ESP_IDF_COMPONENTS_EXPANDED += $(BUILD)/esp-idf/esp-idf/soc/soc/esp32s2/libsoc_esp32s2.a esp-idf/components/xtensa/esp32s2/libxt_hal.a ESP_AUTOGEN_LD = $(BUILD)/esp-idf/esp-idf/esp32s2/esp32s2_out.ld $(BUILD)/esp-idf/esp-idf/esp32s2/ld/esp32s2.project.ld FLASH_FLAGS = --flash_mode $(CIRCUITPY_ESP_FLASH_MODE) --flash_freq $(CIRCUITPY_ESP_FLASH_FREQ) --flash_size $(CIRCUITPY_ESP_FLASH_SIZE) diff --git a/ports/esp32s2/bindings/espidf/__init__.c b/ports/esp32s2/bindings/espidf/__init__.c index 3b910cfe6..554bfaa39 100644 --- a/ports/esp32s2/bindings/espidf/__init__.c +++ b/ports/esp32s2/bindings/espidf/__init__.c @@ -29,7 +29,7 @@ #include "bindings/espidf/__init__.h" -#include "esp-idf/components/heap/include/esp_heap_caps.h" +#include "components/heap/include/esp_heap_caps.h" //| """Direct access to a few ESP-IDF details. This module *should not* include any functionality //| that could be implemented by other frameworks. It should only include ESP-IDF specific diff --git a/ports/esp32s2/common-hal/busio/I2C.c b/ports/esp32s2/common-hal/busio/I2C.c index 57270372f..6f1953128 100644 --- a/ports/esp32s2/common-hal/busio/I2C.c +++ b/ports/esp32s2/common-hal/busio/I2C.c @@ -28,7 +28,7 @@ #include "py/mperrno.h" #include "py/runtime.h" -#include "driver/i2c.h" +#include "components/driver/include/driver/i2c.h" #include "shared-bindings/microcontroller/__init__.h" #include "shared-bindings/microcontroller/Pin.h" diff --git a/ports/esp32s2/common-hal/busio/I2C.h b/ports/esp32s2/common-hal/busio/I2C.h index 24a3fd495..c39d6d744 100644 --- a/ports/esp32s2/common-hal/busio/I2C.h +++ b/ports/esp32s2/common-hal/busio/I2C.h @@ -29,7 +29,7 @@ #include "common-hal/microcontroller/Pin.h" -#include "esp-idf/components/soc/include/hal/i2c_types.h" +#include "components/hal/include/hal/i2c_types.h" #include "FreeRTOS.h" #include "freertos/semphr.h" #include "py/obj.h" diff --git a/ports/esp32s2/common-hal/busio/SPI.c b/ports/esp32s2/common-hal/busio/SPI.c index eaafa87b7..1906ca6f0 100644 --- a/ports/esp32s2/common-hal/busio/SPI.c +++ b/ports/esp32s2/common-hal/busio/SPI.c @@ -266,7 +266,7 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self, self->bits = bits; self->target_frequency = baudrate; self->hal_context.timing_conf = &self->timing_conf; - esp_err_t result = spi_hal_get_clock_conf(&self->hal_context, + esp_err_t result = spi_hal_cal_clock_conf(&self->hal_context, self->target_frequency, 128 /* duty_cycle */, self->connected_through_gpio, diff --git a/ports/esp32s2/common-hal/busio/SPI.h b/ports/esp32s2/common-hal/busio/SPI.h index 38fbe42ff..f6c1c344a 100644 --- a/ports/esp32s2/common-hal/busio/SPI.h +++ b/ports/esp32s2/common-hal/busio/SPI.h @@ -29,9 +29,9 @@ #include "common-hal/microcontroller/Pin.h" -#include "esp-idf/components/driver/include/driver/spi_common_internal.h" -#include "esp-idf/components/soc/include/hal/spi_hal.h" -#include "esp-idf/components/soc/include/hal/spi_types.h" +#include "components/driver/include/driver/spi_common_internal.h" +#include "components/hal/include/hal/spi_hal.h" +#include "components/hal/include/hal/spi_types.h" #include "py/obj.h" typedef struct { diff --git a/ports/esp32s2/common-hal/busio/UART.c b/ports/esp32s2/common-hal/busio/UART.c index b0162adba..98cebba67 100644 --- a/ports/esp32s2/common-hal/busio/UART.c +++ b/ports/esp32s2/common-hal/busio/UART.c @@ -27,7 +27,7 @@ #include "shared-bindings/microcontroller/__init__.h" #include "shared-bindings/busio/UART.h" -#include "driver/uart.h" +#include "components/driver/include/driver/uart.h" #include "mpconfigport.h" #include "lib/utils/interrupt_char.h" diff --git a/ports/esp32s2/common-hal/busio/UART.h b/ports/esp32s2/common-hal/busio/UART.h index b3cc92966..1d7f13511 100644 --- a/ports/esp32s2/common-hal/busio/UART.h +++ b/ports/esp32s2/common-hal/busio/UART.h @@ -29,7 +29,7 @@ #include "common-hal/microcontroller/Pin.h" -#include "esp-idf/components/soc/include/hal/uart_types.h" +#include "components/hal/include/hal/uart_types.h" #include "py/obj.h" typedef struct { diff --git a/ports/esp32s2/common-hal/digitalio/DigitalInOut.c b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c index fb3ee10ad..2c7902616 100644 --- a/ports/esp32s2/common-hal/digitalio/DigitalInOut.c +++ b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c @@ -28,9 +28,9 @@ #include "py/runtime.h" #include "supervisor/shared/translate.h" -#include "driver/gpio.h" +#include "components/driver/include/driver/gpio.h" -#include "esp-idf/components/soc/include/hal/gpio_hal.h" +#include "components/hal/include/hal/gpio_hal.h" void common_hal_digitalio_digitalinout_never_reset( digitalio_digitalinout_obj_t *self) { diff --git a/ports/esp32s2/common-hal/microcontroller/Pin.c b/ports/esp32s2/common-hal/microcontroller/Pin.c index 546dca848..3c2611efe 100644 --- a/ports/esp32s2/common-hal/microcontroller/Pin.c +++ b/ports/esp32s2/common-hal/microcontroller/Pin.c @@ -31,8 +31,8 @@ #include "py/mphal.h" -#include "esp-idf/components/driver/include/driver/gpio.h" -#include "esp-idf/components/soc/include/hal/gpio_hal.h" +#include "components/driver/include/driver/gpio.h" +#include "components/hal/include/hal/gpio_hal.h" #ifdef MICROPY_HW_NEOPIXEL bool neopixel_in_use; diff --git a/ports/esp32s2/common-hal/microcontroller/Processor.c b/ports/esp32s2/common-hal/microcontroller/Processor.c index c64fa010e..b81521601 100644 --- a/ports/esp32s2/common-hal/microcontroller/Processor.c +++ b/ports/esp32s2/common-hal/microcontroller/Processor.c @@ -34,7 +34,7 @@ #include "soc/efuse_reg.h" -#include "esp-idf/components/driver/esp32s2/include/driver/temp_sensor.h" +#include "components/driver/esp32s2/include/driver/temp_sensor.h" float common_hal_mcu_processor_get_temperature(void) { float tsens_out; diff --git a/ports/esp32s2/common-hal/neopixel_write/__init__.c b/ports/esp32s2/common-hal/neopixel_write/__init__.c index 193d754f4..553cb79f8 100644 --- a/ports/esp32s2/common-hal/neopixel_write/__init__.c +++ b/ports/esp32s2/common-hal/neopixel_write/__init__.c @@ -43,8 +43,8 @@ #include "py/mphal.h" #include "py/runtime.h" #include "shared-bindings/neopixel_write/__init__.h" -#include "driver/rmt.h" -#include "rmt.h" +#include "components/driver/include/driver/rmt.h" +#include "peripherals/rmt.h" #define WS2812_T0H_NS (350) #define WS2812_T0L_NS (1000) diff --git a/ports/esp32s2/common-hal/pulseio/PulseIn.h b/ports/esp32s2/common-hal/pulseio/PulseIn.h index 97d70d4b0..289605ed0 100644 --- a/ports/esp32s2/common-hal/pulseio/PulseIn.h +++ b/ports/esp32s2/common-hal/pulseio/PulseIn.h @@ -30,8 +30,8 @@ #include "common-hal/microcontroller/Pin.h" #include "py/obj.h" -#include "driver/rmt.h" -#include "rmt.h" +#include "components/driver/include/driver/rmt.h" +#include "peripherals/rmt.h" typedef struct { mp_obj_base_t base; diff --git a/ports/esp32s2/common-hal/pulseio/PulseOut.h b/ports/esp32s2/common-hal/pulseio/PulseOut.h index 629591af6..c3952452f 100644 --- a/ports/esp32s2/common-hal/pulseio/PulseOut.h +++ b/ports/esp32s2/common-hal/pulseio/PulseOut.h @@ -28,8 +28,8 @@ #define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PULSEIO_PULSEOUT_H #include "common-hal/microcontroller/Pin.h" -#include "driver/rmt.h" -#include "rmt.h" +#include "components/driver/include/driver/rmt.h" +#include "peripherals/rmt.h" #include "py/obj.h" diff --git a/ports/esp32s2/common-hal/pwmio/PWMOut.c b/ports/esp32s2/common-hal/pwmio/PWMOut.c index d745b7789..e1fdd4760 100644 --- a/ports/esp32s2/common-hal/pwmio/PWMOut.c +++ b/ports/esp32s2/common-hal/pwmio/PWMOut.c @@ -28,7 +28,7 @@ #include "common-hal/pwmio/PWMOut.h" #include "shared-bindings/pwmio/PWMOut.h" #include "py/runtime.h" -#include "driver/ledc.h" +#include "components/driver/include/driver/ledc.h" #define INDEX_EMPTY 0xFF diff --git a/ports/esp32s2/common-hal/pwmio/PWMOut.h b/ports/esp32s2/common-hal/pwmio/PWMOut.h index c489e5a27..9055dee8e 100644 --- a/ports/esp32s2/common-hal/pwmio/PWMOut.h +++ b/ports/esp32s2/common-hal/pwmio/PWMOut.h @@ -28,7 +28,7 @@ #define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PWMIO_PWMOUT_H #include "common-hal/microcontroller/Pin.h" -#include "driver/ledc.h" +#include "components/driver/include/driver/ledc.h" typedef struct { mp_obj_base_t base; diff --git a/ports/esp32s2/common-hal/rtc/RTC.c b/ports/esp32s2/common-hal/rtc/RTC.c index 1218186a8..4d8713639 100644 --- a/ports/esp32s2/common-hal/rtc/RTC.c +++ b/ports/esp32s2/common-hal/rtc/RTC.c @@ -28,7 +28,7 @@ #include "py/obj.h" #include "py/runtime.h" -#include "soc/rtc_periph.h" +#include "components/soc/soc/include/soc/rtc_periph.h" #include "shared-bindings/rtc/RTC.h" void common_hal_rtc_get_time(timeutils_struct_time_t *tm) { diff --git a/ports/esp32s2/common-hal/socketpool/Socket.h b/ports/esp32s2/common-hal/socketpool/Socket.h index c23dd171c..de63c8ab2 100644 --- a/ports/esp32s2/common-hal/socketpool/Socket.h +++ b/ports/esp32s2/common-hal/socketpool/Socket.h @@ -32,7 +32,8 @@ #include "common-hal/socketpool/SocketPool.h" #include "common-hal/ssl/SSLContext.h" -#include "esp-idf/components/esp-tls/esp_tls.h" +#include "components/esp-tls/esp_tls.h" +#include "components/log/include/esp_log.h" typedef struct { mp_obj_base_t base; diff --git a/ports/esp32s2/common-hal/socketpool/SocketPool.c b/ports/esp32s2/common-hal/socketpool/SocketPool.c index 4a07f21c4..1d4d04b03 100644 --- a/ports/esp32s2/common-hal/socketpool/SocketPool.c +++ b/ports/esp32s2/common-hal/socketpool/SocketPool.c @@ -29,7 +29,7 @@ #include "py/runtime.h" #include "shared-bindings/wifi/__init__.h" -#include "esp-idf/components/lwip/lwip/src/include/lwip/netdb.h" +#include "components/lwip/lwip/src/include/lwip/netdb.h" #include "bindings/espidf/__init__.h" diff --git a/ports/esp32s2/common-hal/ssl/SSLContext.h b/ports/esp32s2/common-hal/ssl/SSLContext.h index 41d199f08..e359ac0de 100644 --- a/ports/esp32s2/common-hal/ssl/SSLContext.h +++ b/ports/esp32s2/common-hal/ssl/SSLContext.h @@ -29,7 +29,7 @@ #include "py/obj.h" -#include "esp-idf/components/esp-tls/esp_tls.h" +#include "components/esp-tls/esp_tls.h" typedef struct { mp_obj_base_t base; diff --git a/ports/esp32s2/common-hal/ssl/__init__.c b/ports/esp32s2/common-hal/ssl/__init__.c index a105e5362..8d386d0c3 100644 --- a/ports/esp32s2/common-hal/ssl/__init__.c +++ b/ports/esp32s2/common-hal/ssl/__init__.c @@ -26,7 +26,7 @@ #include "shared-bindings/ssl/SSLContext.h" -#include "esp-idf/components/mbedtls/esp_crt_bundle/include/esp_crt_bundle.h" +#include "components/mbedtls/esp_crt_bundle/include/esp_crt_bundle.h" void common_hal_ssl_create_default_context(ssl_sslcontext_obj_t* self) { memset(&self->ssl_config, 0, sizeof(esp_tls_cfg_t)); diff --git a/ports/esp32s2/common-hal/wifi/Network.h b/ports/esp32s2/common-hal/wifi/Network.h index ab75fcafe..9345bb457 100644 --- a/ports/esp32s2/common-hal/wifi/Network.h +++ b/ports/esp32s2/common-hal/wifi/Network.h @@ -29,7 +29,7 @@ #include "py/obj.h" -#include "esp-idf/components/esp_wifi/include/esp_wifi_types.h" +#include "components/esp_wifi/include/esp_wifi_types.h" typedef struct { mp_obj_base_t base; diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index a0b8b6adc..ac3e2ee4c 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -35,8 +35,8 @@ #include "shared-bindings/wifi/ScannedNetworks.h" #include "shared-module/ipaddress/__init__.h" -#include "esp-idf/components/esp_wifi/include/esp_wifi.h" -#include "esp-idf/components/lwip/include/apps/ping/ping_sock.h" +#include "components/esp_wifi/include/esp_wifi.h" +#include "components/lwip/include/apps/ping/ping_sock.h" static void start_station(wifi_radio_obj_t *self) { if (self->sta_mode) { diff --git a/ports/esp32s2/common-hal/wifi/Radio.h b/ports/esp32s2/common-hal/wifi/Radio.h index 205aef176..8679cbef1 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.h +++ b/ports/esp32s2/common-hal/wifi/Radio.h @@ -29,7 +29,7 @@ #include "py/obj.h" -#include "esp-idf/components/esp_event/include/esp_event.h" +#include "components/esp_event/include/esp_event.h" #include "shared-bindings/wifi/ScannedNetworks.h" diff --git a/ports/esp32s2/common-hal/wifi/ScannedNetworks.c b/ports/esp32s2/common-hal/wifi/ScannedNetworks.c index 507c6d186..cc733308d 100644 --- a/ports/esp32s2/common-hal/wifi/ScannedNetworks.c +++ b/ports/esp32s2/common-hal/wifi/ScannedNetworks.c @@ -37,7 +37,7 @@ #include "shared-bindings/wifi/Radio.h" #include "shared-bindings/wifi/ScannedNetworks.h" -#include "esp-idf/components/esp_wifi/include/esp_wifi.h" +#include "components/esp_wifi/include/esp_wifi.h" static void wifi_scannednetworks_done(wifi_scannednetworks_obj_t *self) { self->done = true; diff --git a/ports/esp32s2/common-hal/wifi/ScannedNetworks.h b/ports/esp32s2/common-hal/wifi/ScannedNetworks.h index cd57e95f2..db0c2a148 100644 --- a/ports/esp32s2/common-hal/wifi/ScannedNetworks.h +++ b/ports/esp32s2/common-hal/wifi/ScannedNetworks.h @@ -35,7 +35,8 @@ #include "FreeRTOS.h" #include "freertos/event_groups.h" -#include "esp-idf/components/esp_wifi/include/esp_wifi_types.h" +#include "components/esp_wifi/include/esp_wifi_types.h" +#include "components/log/include/esp_log.h" typedef struct { mp_obj_base_t base; diff --git a/ports/esp32s2/common-hal/wifi/__init__.c b/ports/esp32s2/common-hal/wifi/__init__.c index b9ea9da06..5c8d2e952 100644 --- a/ports/esp32s2/common-hal/wifi/__init__.c +++ b/ports/esp32s2/common-hal/wifi/__init__.c @@ -31,13 +31,14 @@ #include "py/runtime.h" -#include "esp-idf/components/esp_wifi/include/esp_wifi.h" +#include "components/esp_wifi/include/esp_wifi.h" -#include "esp-idf/components/heap/include/esp_heap_caps.h" +#include "components/heap/include/esp_heap_caps.h" wifi_radio_obj_t common_hal_wifi_radio_obj; -#include "esp_log.h" +#include "components/log/include/esp_log.h" + static const char* TAG = "wifi"; static void event_handler(void* arg, esp_event_base_t event_base, diff --git a/ports/esp32s2/esp-idf b/ports/esp32s2/esp-idf index de733cdab..8bc19ba89 160000 --- a/ports/esp32s2/esp-idf +++ b/ports/esp32s2/esp-idf @@ -1 +1 @@ -Subproject commit de733cdab556c5713c94ba95078f4024dd56fd87 +Subproject commit 8bc19ba893e5544d571a753d82b44a84799b94b1 diff --git a/ports/esp32s2/mphalport.c b/ports/esp32s2/mphalport.c index e1662a6ce..9b4c4bc5e 100644 --- a/ports/esp32s2/mphalport.c +++ b/ports/esp32s2/mphalport.c @@ -31,8 +31,8 @@ #include "py/mpstate.h" #include "py/gc.h" -#include "esp-idf/components/xtensa/include/esp_debug_helpers.h" -#include "esp-idf/components/esp_rom/include/esp32s2/rom/ets_sys.h" +#include "components/xtensa/include/esp_debug_helpers.h" +#include "components/esp_rom/include/esp32s2/rom/ets_sys.h" void mp_hal_delay_us(mp_uint_t delay) { ets_delay_us(delay); diff --git a/ports/esp32s2/peripherals/pins.h b/ports/esp32s2/peripherals/pins.h index 07d0b908e..9776fbb78 100644 --- a/ports/esp32s2/peripherals/pins.h +++ b/ports/esp32s2/peripherals/pins.h @@ -34,7 +34,7 @@ #include "esp32s2_peripherals_config.h" #include "esp-idf/config/sdkconfig.h" -#include "esp-idf/components/soc/include/hal/gpio_types.h" +#include "components/hal/include/hal/gpio_types.h" typedef struct { PIN_PREFIX_FIELDS diff --git a/ports/esp32s2/peripherals/rmt.c b/ports/esp32s2/peripherals/rmt.c index b7629dbd5..2be5f06d8 100644 --- a/ports/esp32s2/peripherals/rmt.c +++ b/ports/esp32s2/peripherals/rmt.c @@ -24,7 +24,7 @@ * THE SOFTWARE. */ -#include "rmt.h" +#include "peripherals/rmt.h" #include "py/runtime.h" bool rmt_reserved_channels[RMT_CHANNEL_MAX]; diff --git a/ports/esp32s2/peripherals/rmt.h b/ports/esp32s2/peripherals/rmt.h index 01ed09907..020f8dc3e 100644 --- a/ports/esp32s2/peripherals/rmt.h +++ b/ports/esp32s2/peripherals/rmt.h @@ -28,7 +28,7 @@ #define MICROPY_INCLUDED_ESP32S2_PERIPHERALS_RMT_H #include "py/mphal.h" -#include "driver/rmt.h" +#include "components/driver/include/driver/rmt.h" #include void esp32s2_peripherals_rmt_reset(void); diff --git a/ports/esp32s2/supervisor/internal_flash.c b/ports/esp32s2/supervisor/internal_flash.c index 4b216a095..de69a49f9 100644 --- a/ports/esp32s2/supervisor/internal_flash.c +++ b/ports/esp32s2/supervisor/internal_flash.c @@ -37,7 +37,7 @@ #include "py/runtime.h" #include "lib/oofatfs/ff.h" -#include "esp-idf/components/spi_flash/include/esp_partition.h" +#include "components/spi_flash/include/esp_partition.h" #include "supervisor/usb.h" diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c index 3de63278d..d2630617b 100644 --- a/ports/esp32s2/supervisor/port.c +++ b/ports/esp32s2/supervisor/port.c @@ -46,8 +46,8 @@ #include "shared-bindings/rtc/__init__.h" #include "peripherals/rmt.h" -#include "esp-idf/components/heap/include/esp_heap_caps.h" -#include "esp-idf/components/soc/soc/esp32s2/include/soc/cache_memory.h" +#include "components/heap/include/esp_heap_caps.h" +#include "components/soc/soc/esp32s2/include/soc/cache_memory.h" #define HEAP_SIZE (48 * 1024) diff --git a/ports/esp32s2/supervisor/usb.c b/ports/esp32s2/supervisor/usb.c index 39eb8204f..c91c2ec4b 100644 --- a/ports/esp32s2/supervisor/usb.c +++ b/ports/esp32s2/supervisor/usb.c @@ -29,10 +29,10 @@ #include "lib/utils/interrupt_char.h" #include "lib/mp-readline/readline.h" -#include "esp-idf/components/soc/soc/esp32s2/include/soc/usb_periph.h" -#include "esp-idf/components/driver/include/driver/periph_ctrl.h" -#include "esp-idf/components/driver/include/driver/gpio.h" -#include "esp-idf/components/esp_rom/include/esp32s2/rom/gpio.h" +#include "components/soc/soc/esp32s2/include/soc/usb_periph.h" +#include "components/driver/include/driver/periph_ctrl.h" +#include "components/driver/include/driver/gpio.h" +#include "components/esp_rom/include/esp32s2/rom/gpio.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" diff --git a/shared-bindings/socketpool/Socket.c b/shared-bindings/socketpool/Socket.c index e1b1e6967..de05b8eb4 100644 --- a/shared-bindings/socketpool/Socket.c +++ b/shared-bindings/socketpool/Socket.c @@ -36,7 +36,6 @@ #include "py/runtime.h" #include "py/mperrno.h" -#include "esp_log.h" static const char* TAG = "socket binding"; //| class Socket: diff --git a/shared-bindings/socketpool/SocketPool.c b/shared-bindings/socketpool/SocketPool.c index 0eeebd691..9f56e8c7e 100644 --- a/shared-bindings/socketpool/SocketPool.c +++ b/shared-bindings/socketpool/SocketPool.c @@ -37,7 +37,6 @@ #include "shared-bindings/socketpool/Socket.h" #include "shared-bindings/socketpool/SocketPool.h" -#include "esp_log.h" static const char* TAG = "socketpool binding"; //| class SocketPool: diff --git a/shared-bindings/wifi/ScannedNetworks.c b/shared-bindings/wifi/ScannedNetworks.c index c927d7282..d04f0f92a 100644 --- a/shared-bindings/wifi/ScannedNetworks.c +++ b/shared-bindings/wifi/ScannedNetworks.c @@ -32,7 +32,6 @@ #include "py/runtime.h" #include "shared-bindings/wifi/ScannedNetworks.h" -#include "esp_log.h" static const char *TAG = "cp iternext"; //| class ScannedNetworks: -- cgit v1.2.3 From a09a158ddc89da5c870437a0706c862944e08321 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Wed, 30 Sep 2020 11:36:51 -0700 Subject: Fix trailing line --- .../esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h index 726c46e40..ee97d62c6 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h @@ -35,4 +35,4 @@ #define AUTORESET_DELAY_MS 500 #define MICROPY_HW_APA102_MOSI (&pin_GPIO40) -#define MICROPY_HW_APA102_SCK (&pin_GPIO45) \ No newline at end of file +#define MICROPY_HW_APA102_SCK (&pin_GPIO45) -- cgit v1.2.3 From a739d314f1a9f5fee6517eb425a2c691969fd7f7 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Tue, 29 Sep 2020 13:04:39 -0700 Subject: Add Metro ESP32S2 Also fix two bugs: * Crash when resetting board.SPI when it hasn't been inited. * Reading back the output value is always false. Fixes #3353 --- .../esp32s2/boards/adafruit_metro_esp32s2/board.c | 43 +++++++++++++++++++ .../boards/adafruit_metro_esp32s2/mpconfigboard.h | 48 ++++++++++++++++++++++ .../boards/adafruit_metro_esp32s2/mpconfigboard.mk | 17 ++++++++ ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c | 44 ++++++++++++++++++++ .../boards/adafruit_metro_esp32s2/sdkconfig | 33 +++++++++++++++ ports/esp32s2/common-hal/digitalio/DigitalInOut.c | 18 +++++++- ports/esp32s2/common-hal/digitalio/DigitalInOut.h | 1 + shared-module/board/__init__.c | 4 +- 8 files changed, 205 insertions(+), 3 deletions(-) create mode 100644 ports/esp32s2/boards/adafruit_metro_esp32s2/board.c create mode 100644 ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.h create mode 100644 ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.mk create mode 100644 ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c create mode 100644 ports/esp32s2/boards/adafruit_metro_esp32s2/sdkconfig (limited to 'ports') diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/board.c b/ports/esp32s2/boards/adafruit_metro_esp32s2/board.c new file mode 100644 index 000000000..7380be6da --- /dev/null +++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/board.c @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "shared-bindings/microcontroller/Pin.h" + +void board_init(void) { + // USB + common_hal_never_reset_pin(&pin_GPIO19); + common_hal_never_reset_pin(&pin_GPIO20); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.h b/ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.h new file mode 100644 index 000000000..7280aab9c --- /dev/null +++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "Metro ESP32S2" +#define MICROPY_HW_MCU_NAME "ESP32S2" + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO45) + +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n") + +#define AUTORESET_DELAY_MS 500 + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO34) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO33) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO36) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO35) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO37) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO5) +#define DEFAULT_UART_BUS_TX (&pin_GPIO6) diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.mk b/ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.mk new file mode 100644 index 000000000..e78098d64 --- /dev/null +++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x239A +USB_PID = 0x80E0 +USB_PRODUCT = "Metro ESP32S2" +USB_MANUFACTURER = "Adafruit" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ + +# The default queue depth of 16 overflows on release builds, +# so increase it to 32. +CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 + +CIRCUITPY_ESP_FLASH_MODE=dio +CIRCUITPY_ESP_FLASH_FREQ=40m +CIRCUITPY_ESP_FLASH_SIZE=4MB + +CIRCUITPY_MODULE=wrover diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c b/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c new file mode 100644 index 000000000..08d2b2a1a --- /dev/null +++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c @@ -0,0 +1,44 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO1) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO2) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO3) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO4) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO5) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO5) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO6) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO6) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO7) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO8) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO9) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO42) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_GPIO33) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_GPIO34) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO45) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_DEBUG_RX), MP_ROM_PTR(&pin_GPIO38) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_DEBUG_TX), MP_ROM_PTR(&pin_GPIO37) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_GPIO35) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_GPIO37) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/sdkconfig b/ports/esp32s2/boards/adafruit_metro_esp32s2/sdkconfig new file mode 100644 index 000000000..9d8bbde96 --- /dev/null +++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/sdkconfig @@ -0,0 +1,33 @@ +CONFIG_ESP32S2_SPIRAM_SUPPORT=y + +# +# SPI RAM config +# +# CONFIG_SPIRAM_TYPE_AUTO is not set +CONFIG_SPIRAM_TYPE_ESPPSRAM16=y +# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set +# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set +CONFIG_SPIRAM_SIZE=2097152 + +# +# PSRAM clock and cs IO for ESP32S2 +# +CONFIG_DEFAULT_PSRAM_CLK_IO=30 +CONFIG_DEFAULT_PSRAM_CS_IO=26 +# end of PSRAM clock and cs IO for ESP32S2 + +# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set +# CONFIG_SPIRAM_RODATA is not set +# CONFIG_SPIRAM_SPEED_80M is not set +CONFIG_SPIRAM_SPEED_40M=y +# CONFIG_SPIRAM_SPEED_26M is not set +# CONFIG_SPIRAM_SPEED_20M is not set +CONFIG_SPIRAM=y +CONFIG_SPIRAM_BOOT_INIT=y +# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set +CONFIG_SPIRAM_USE_MEMMAP=y +# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set +# CONFIG_SPIRAM_USE_MALLOC is not set +CONFIG_SPIRAM_MEMTEST=y +# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set +# end of SPI RAM config diff --git a/ports/esp32s2/common-hal/digitalio/DigitalInOut.c b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c index fb3ee10ad..d27985181 100644 --- a/ports/esp32s2/common-hal/digitalio/DigitalInOut.c +++ b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c @@ -42,6 +42,16 @@ digitalinout_result_t common_hal_digitalio_digitalinout_construct( claim_pin(pin); self->pin = pin; + gpio_config_t config; + config.pin_bit_mask = 1ull << pin->number; + config.mode = GPIO_MODE_INPUT; + config.pull_up_en = GPIO_PULLUP_DISABLE; + config.pull_down_en = GPIO_PULLDOWN_DISABLE; + config.intr_type = GPIO_INTR_DISABLE; + if (gpio_config(&config) != ESP_OK) { + return DIGITALINOUT_PIN_BUSY; + } + return DIGITALINOUT_OK; } @@ -67,7 +77,7 @@ void common_hal_digitalio_digitalinout_switch_to_input( digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_output( digitalio_digitalinout_obj_t *self, bool value, digitalio_drive_mode_t drive_mode) { - gpio_set_level(self->pin->number, value); + common_hal_digitalio_digitalinout_set_value(self, value); return common_hal_digitalio_digitalinout_set_drive_mode(self, drive_mode); } @@ -82,12 +92,16 @@ digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( void common_hal_digitalio_digitalinout_set_value( digitalio_digitalinout_obj_t *self, bool value) { + self->output_value = value; gpio_set_level(self->pin->number, value); } bool common_hal_digitalio_digitalinout_get_value( digitalio_digitalinout_obj_t *self) { - return gpio_get_level(self->pin->number) == 1; + if (common_hal_digitalio_digitalinout_get_direction(self) == DIRECTION_INPUT) { + return gpio_get_level(self->pin->number) == 1; + } + return self->output_value; } digitalinout_result_t common_hal_digitalio_digitalinout_set_drive_mode( diff --git a/ports/esp32s2/common-hal/digitalio/DigitalInOut.h b/ports/esp32s2/common-hal/digitalio/DigitalInOut.h index 6877f1741..c09c5502d 100644 --- a/ports/esp32s2/common-hal/digitalio/DigitalInOut.h +++ b/ports/esp32s2/common-hal/digitalio/DigitalInOut.h @@ -33,6 +33,7 @@ typedef struct { mp_obj_base_t base; const mcu_pin_obj_t *pin; + bool output_value; } digitalio_digitalinout_obj_t; #endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_DIGITALIO_DIGITALINOUT_H diff --git a/shared-module/board/__init__.c b/shared-module/board/__init__.c index fb4f731b8..39b68a0f1 100644 --- a/shared-module/board/__init__.c +++ b/shared-module/board/__init__.c @@ -167,7 +167,9 @@ void reset_board_busses(void) { } #endif // make sure SPI lock is not held over a soft reset - common_hal_busio_spi_unlock(&spi_obj); + if (spi_singleton != NULL) { + common_hal_busio_spi_unlock(spi_singleton); + } if (!display_using_spi) { spi_singleton = NULL; } -- cgit v1.2.3 From e01e8dd6b9c886c091bdbe735f4a3f63a4fb6859 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Wed, 30 Sep 2020 16:36:13 -0400 Subject: Revert HAL refactor changes to avoid USB breaking changes past esp-idf dde6222cd --- ports/esp32s2/Makefile | 6 +++--- ports/esp32s2/common-hal/busio/I2C.h | 2 +- ports/esp32s2/common-hal/busio/SPI.h | 4 ++-- ports/esp32s2/common-hal/busio/UART.h | 2 +- ports/esp32s2/common-hal/digitalio/DigitalInOut.c | 2 +- ports/esp32s2/common-hal/microcontroller/Pin.c | 2 +- ports/esp32s2/esp-idf | 2 +- ports/esp32s2/peripherals/pins.h | 2 +- 8 files changed, 11 insertions(+), 11 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 49b9c6d2b..700af9b19 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -263,7 +263,7 @@ menuconfig: $(BUILD)/esp-idf/config $(HEADER_BUILD)/qstr.i.last: | $(BUILD)/esp-idf/config/sdkconfig.h # Order here matters -ESP_IDF_COMPONENTS_LINK = freertos log hal esp_system esp32s2 bootloader_support pthread esp_timer vfs spi_flash app_update esp_common esp32s2 heap newlib driver xtensa soc esp_ringbuf esp_wifi esp_event wpa_supplicant mbedtls efuse nvs_flash esp_netif lwip esp_rom esp-tls +ESP_IDF_COMPONENTS_LINK = freertos log esp_system esp32s2 bootloader_support pthread esp_timer vfs spi_flash app_update esp_common esp32s2 heap newlib driver xtensa soc esp_ringbuf esp_wifi esp_event wpa_supplicant mbedtls efuse nvs_flash esp_netif lwip esp_rom esp-tls ESP_IDF_COMPONENTS_INCLUDE = driver freertos log soc @@ -275,11 +275,11 @@ ESP_IDF_WIFI_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_WIFI_COMPONENT MBEDTLS_COMPONENTS_LINK = crypto tls x509 MBEDTLS_COMPONENTS_LINK_EXPANDED = $(foreach component, $(MBEDTLS_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/mbedtls/mbedtls/library/libmbed$(component).a) -BINARY_BLOBS = esp-idf/components/xtensa/esp32s2/libxt_hal.a +BINARY_BLOBS = esp-idf/components/xtensa/esp32s2/libhal.a BINARY_WIFI_BLOBS = libcoexist.a libcore.a libespnow.a libmesh.a libnet80211.a libpp.a librtc.a libsmartconfig.a libphy.a BINARY_BLOBS += $(addprefix esp-idf/components/esp_wifi/lib/esp32s2/, $(BINARY_WIFI_BLOBS)) -ESP_IDF_COMPONENTS_EXPANDED += $(BUILD)/esp-idf/esp-idf/soc/soc/esp32s2/libsoc_esp32s2.a esp-idf/components/xtensa/esp32s2/libxt_hal.a +ESP_IDF_COMPONENTS_EXPANDED += $(BUILD)/esp-idf/esp-idf/soc/soc/esp32s2/libsoc_esp32s2.a esp-idf/components/xtensa/esp32s2/libhal.a ESP_AUTOGEN_LD = $(BUILD)/esp-idf/esp-idf/esp32s2/esp32s2_out.ld $(BUILD)/esp-idf/esp-idf/esp32s2/ld/esp32s2.project.ld FLASH_FLAGS = --flash_mode $(CIRCUITPY_ESP_FLASH_MODE) --flash_freq $(CIRCUITPY_ESP_FLASH_FREQ) --flash_size $(CIRCUITPY_ESP_FLASH_SIZE) diff --git a/ports/esp32s2/common-hal/busio/I2C.h b/ports/esp32s2/common-hal/busio/I2C.h index c39d6d744..1a989e30a 100644 --- a/ports/esp32s2/common-hal/busio/I2C.h +++ b/ports/esp32s2/common-hal/busio/I2C.h @@ -29,7 +29,7 @@ #include "common-hal/microcontroller/Pin.h" -#include "components/hal/include/hal/i2c_types.h" +#include "components/soc/include/hal/i2c_types.h" #include "FreeRTOS.h" #include "freertos/semphr.h" #include "py/obj.h" diff --git a/ports/esp32s2/common-hal/busio/SPI.h b/ports/esp32s2/common-hal/busio/SPI.h index f6c1c344a..d6203feae 100644 --- a/ports/esp32s2/common-hal/busio/SPI.h +++ b/ports/esp32s2/common-hal/busio/SPI.h @@ -30,8 +30,8 @@ #include "common-hal/microcontroller/Pin.h" #include "components/driver/include/driver/spi_common_internal.h" -#include "components/hal/include/hal/spi_hal.h" -#include "components/hal/include/hal/spi_types.h" +#include "components/soc/include/hal/spi_hal.h" +#include "components/soc/include/hal/spi_types.h" #include "py/obj.h" typedef struct { diff --git a/ports/esp32s2/common-hal/busio/UART.h b/ports/esp32s2/common-hal/busio/UART.h index 1d7f13511..751fb2e00 100644 --- a/ports/esp32s2/common-hal/busio/UART.h +++ b/ports/esp32s2/common-hal/busio/UART.h @@ -29,7 +29,7 @@ #include "common-hal/microcontroller/Pin.h" -#include "components/hal/include/hal/uart_types.h" +#include "components/soc/include/hal/uart_types.h" #include "py/obj.h" typedef struct { diff --git a/ports/esp32s2/common-hal/digitalio/DigitalInOut.c b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c index 2c7902616..46c47a285 100644 --- a/ports/esp32s2/common-hal/digitalio/DigitalInOut.c +++ b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c @@ -30,7 +30,7 @@ #include "components/driver/include/driver/gpio.h" -#include "components/hal/include/hal/gpio_hal.h" +#include "components/soc/include/hal/gpio_hal.h" void common_hal_digitalio_digitalinout_never_reset( digitalio_digitalinout_obj_t *self) { diff --git a/ports/esp32s2/common-hal/microcontroller/Pin.c b/ports/esp32s2/common-hal/microcontroller/Pin.c index 3c2611efe..0f4669fe0 100644 --- a/ports/esp32s2/common-hal/microcontroller/Pin.c +++ b/ports/esp32s2/common-hal/microcontroller/Pin.c @@ -32,7 +32,7 @@ #include "py/mphal.h" #include "components/driver/include/driver/gpio.h" -#include "components/hal/include/hal/gpio_hal.h" +#include "components/soc/include/hal/gpio_hal.h" #ifdef MICROPY_HW_NEOPIXEL bool neopixel_in_use; diff --git a/ports/esp32s2/esp-idf b/ports/esp32s2/esp-idf index 8bc19ba89..dde6222cd 160000 --- a/ports/esp32s2/esp-idf +++ b/ports/esp32s2/esp-idf @@ -1 +1 @@ -Subproject commit 8bc19ba893e5544d571a753d82b44a84799b94b1 +Subproject commit dde6222cdceca978b2588fbf0eb25b8255741fba diff --git a/ports/esp32s2/peripherals/pins.h b/ports/esp32s2/peripherals/pins.h index 9776fbb78..0cf63a029 100644 --- a/ports/esp32s2/peripherals/pins.h +++ b/ports/esp32s2/peripherals/pins.h @@ -34,7 +34,7 @@ #include "esp32s2_peripherals_config.h" #include "esp-idf/config/sdkconfig.h" -#include "components/hal/include/hal/gpio_types.h" +#include "components/soc/include/hal/gpio_types.h" typedef struct { PIN_PREFIX_FIELDS -- cgit v1.2.3 From 0bbd067a17eaf89ec5fdc87d18555edb4608f784 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Thu, 1 Oct 2020 13:06:48 -0400 Subject: Revert ADC calibration removal, complete merge --- ports/esp32s2/Makefile | 5 +---- ports/esp32s2/common-hal/analogio/AnalogIn.c | 18 +++++++----------- ports/esp32s2/common-hal/analogio/AnalogIn.h | 2 +- 3 files changed, 9 insertions(+), 16 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 128983505..f19c960f4 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -77,6 +77,7 @@ INC += -I../../supervisor/shared/usb INC += -isystem esp-idf INC += -isystem esp-idf/components/driver/include INC += -isystem esp-idf/components/hal/esp32s2/include +INC += -isystem esp-idf/components/driver/esp32s2/include INC += -isystem esp-idf/components/hal/include INC += -isystem esp-idf/components/freertos/include/freertos @@ -97,10 +98,6 @@ INC += -isystem esp-idf/components/newlib/platform_include INC += -isystem esp-idf/components/lwip/lwip/src/include INC += -isystem esp-idf/components/lwip/port/esp32/include INC += -isystem esp-idf/components/lwip/include/apps/sntp -<<<<<<< HEAD -======= -INC += -isystem esp-idf/components/hal/include ->>>>>>> esp32-update-idf INC += -isystem esp-idf/components/soc/include INC += -isystem esp-idf/components/soc/src/esp32s2/include INC += -isystem esp-idf/components/soc/soc/include diff --git a/ports/esp32s2/common-hal/analogio/AnalogIn.c b/ports/esp32s2/common-hal/analogio/AnalogIn.c index 1a15fc77c..d8acc5728 100644 --- a/ports/esp32s2/common-hal/analogio/AnalogIn.c +++ b/ports/esp32s2/common-hal/analogio/AnalogIn.c @@ -29,9 +29,9 @@ #include "py/runtime.h" #include "supervisor/shared/translate.h" -#include "driver/adc.h" -// TODO: Add when ESP-IDF is updated latest version -// #include "esp-idf/components/esp_adc_cal/include/esp_adc_cal.h" +#include "components/driver/include/driver/adc_common.h" + +#include "components/esp_adc_cal/include/esp_adc_cal.h" #include "shared-bindings/microcontroller/Pin.h" @@ -69,10 +69,9 @@ uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { adc2_config_channel_atten((adc2_channel_t)self->pin->adc_channel, ATTENUATION); } - // TODO: esp_adc_cal is only available in the latest version of the esp-idf. Enable when we update. // Automatically select calibration process depending on status of efuse - // esp_adc_cal_characteristics_t *adc_chars = calloc(1, sizeof(esp_adc_cal_characteristics_t)); - // esp_adc_cal_characterize(self->pin->adc_index, ATTENUATION, DATA_WIDTH, DEFAULT_VREF, adc_chars); + esp_adc_cal_characteristics_t *adc_chars = calloc(1, sizeof(esp_adc_cal_characteristics_t)); + esp_adc_cal_characterize(self->pin->adc_index, ATTENUATION, DATA_WIDTH, DEFAULT_VREF, adc_chars); uint32_t adc_reading = 0; //Multisampling @@ -91,11 +90,8 @@ uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) { adc_reading /= NO_OF_SAMPLES; // This corrects non-linear regions of the ADC range with a LUT, so it's a better reading than raw - // Enable when ESP-IDF is updated - //uint32_t voltage = esp_adc_cal_raw_to_voltage(adc_reading, adc_chars); - //return voltage * ((1 << 16) - 1)/3300; - - return adc_reading; + uint32_t voltage = esp_adc_cal_raw_to_voltage(adc_reading, adc_chars); + return voltage * ((1 << 16) - 1)/3300; } float common_hal_analogio_analogin_get_reference_voltage(analogio_analogin_obj_t *self) { diff --git a/ports/esp32s2/common-hal/analogio/AnalogIn.h b/ports/esp32s2/common-hal/analogio/AnalogIn.h index 5ea4a913d..548cbb5cc 100644 --- a/ports/esp32s2/common-hal/analogio/AnalogIn.h +++ b/ports/esp32s2/common-hal/analogio/AnalogIn.h @@ -29,7 +29,7 @@ #include "common-hal/microcontroller/Pin.h" -#include "esp-idf/components/soc/include/hal/adc_types.h" +#include "components/soc/include/hal/adc_types.h" #include "FreeRTOS.h" #include "freertos/semphr.h" #include "py/obj.h" -- cgit v1.2.3 From 9a3bd82f40784c53f39d3fb806476c6fd2083da6 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Thu, 1 Oct 2020 13:19:54 -0400 Subject: Update TinyUSB include compatibility --- ports/esp32s2/Makefile | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 700af9b19..04b3e4346 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -76,9 +76,6 @@ INC += -I../../supervisor/shared/usb INC += -isystem esp-idf INC += -isystem esp-idf/components/driver/include -INC += -isystem esp-idf/components/hal/esp32s2/include -INC += -isystem esp-idf/components/hal/include - INC += -isystem esp-idf/components/freertos/include/freertos INC += -isystem esp-idf/components/freertos/xtensa/include INC += -isystem esp-idf/components/esp32s2/include @@ -98,6 +95,8 @@ INC += -isystem esp-idf/components/lwip/lwip/src/include INC += -isystem esp-idf/components/lwip/port/esp32/include INC += -isystem esp-idf/components/lwip/include/apps/sntp INC += -isystem esp-idf/components/hal/include +INC += -isystem esp-idf/components/hal/esp32s2/include +INC += -isystem esp-idf/components/log/include/ INC += -isystem esp-idf/components/soc/include INC += -isystem esp-idf/components/soc/src/esp32s2/include INC += -isystem esp-idf/components/soc/soc/include -- cgit v1.2.3 From 0467a828808f15cc5f0e502667f61e4a448450df Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Mon, 5 Oct 2020 12:58:42 -0400 Subject: Fix/remove various style issues --- locale/circuitpython.pot | 2 +- ports/esp32s2/common-hal/analogio/AnalogIn.h | 8 -------- ports/esp32s2/common-hal/analogio/AnalogOut.c | 3 +-- ports/esp32s2/common-hal/analogio/AnalogOut.h | 4 ++-- ports/esp32s2/mpconfigport.mk | 1 - 5 files changed, 4 insertions(+), 14 deletions(-) (limited to 'ports') diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index d0bbe6707..1960a3694 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-10-01 17:17-0400\n" +"POT-Creation-Date: 2020-10-05 12:59-0400\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" diff --git a/ports/esp32s2/common-hal/analogio/AnalogIn.h b/ports/esp32s2/common-hal/analogio/AnalogIn.h index 548cbb5cc..b9c4866f2 100644 --- a/ports/esp32s2/common-hal/analogio/AnalogIn.h +++ b/ports/esp32s2/common-hal/analogio/AnalogIn.h @@ -39,12 +39,4 @@ typedef struct { const mcu_pin_obj_t * pin; } analogio_analogin_obj_t; -static inline uint8_t stm32_adc_units(uint8_t adc_packed) { - return adc_packed >> 5; -} - -static inline uint8_t stm32_adc_channel(uint8_t adc_packed) { - return adc_packed & 0x1f; -} - #endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ANALOGIO_ANALOGIN_H diff --git a/ports/esp32s2/common-hal/analogio/AnalogOut.c b/ports/esp32s2/common-hal/analogio/AnalogOut.c index d67dc6083..b23c40514 100644 --- a/ports/esp32s2/common-hal/analogio/AnalogOut.c +++ b/ports/esp32s2/common-hal/analogio/AnalogOut.c @@ -39,7 +39,7 @@ void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, const mcu_pin_obj_t *pin) { - //mp_raise_ValueError(translate("No DAC on chip")); + mp_raise_NotImplementedError(translate("No DAC on chip")); } bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { @@ -52,7 +52,6 @@ void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, uint16_t value) { - } void analogout_reset(void) { diff --git a/ports/esp32s2/common-hal/analogio/AnalogOut.h b/ports/esp32s2/common-hal/analogio/AnalogOut.h index d5f29ffd7..a8cbc39d5 100644 --- a/ports/esp32s2/common-hal/analogio/AnalogOut.h +++ b/ports/esp32s2/common-hal/analogio/AnalogOut.h @@ -25,8 +25,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGOUT_H -#define MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ANALOGIO_ANALOGOUT_H +#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ANALOGIO_ANALOGOUT_H #include "common-hal/microcontroller/Pin.h" diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk index d68fe469d..4e8a7bdef 100644 --- a/ports/esp32s2/mpconfigport.mk +++ b/ports/esp32s2/mpconfigport.mk @@ -13,7 +13,6 @@ USB_SERIAL_NUMBER_LENGTH = 12 LONGINT_IMPL = MPZ # These modules are implemented in ports//common-hal: -# CIRCUITPY_ANALOGIO = 0 CIRCUITPY_FULL_BUILD = 1 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 -- cgit v1.2.3 From 5c00ba8592fd0b9eba9e5c795630638a79fc4044 Mon Sep 17 00:00:00 2001 From: Seon Rozenblum Date: Fri, 2 Oct 2020 19:25:04 +1000 Subject: Removed hardware APA settings from mpconfigboard.h because they make the APA flicker on boot. I need to look into why, but I don't think they are being used for anything right now anyway. --- ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h | 4 ++-- .../boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h index a77de1511..5a885f29c 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h @@ -35,5 +35,5 @@ #define AUTORESET_DELAY_MS 500 -#define MICROPY_HW_APA102_MOSI (&pin_GPIO40) -#define MICROPY_HW_APA102_SCK (&pin_GPIO45) +// #define MICROPY_HW_APA102_MOSI (&pin_GPIO40) +// #define MICROPY_HW_APA102_SCK (&pin_GPIO45) diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h index ee97d62c6..90a368006 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h @@ -34,5 +34,5 @@ #define AUTORESET_DELAY_MS 500 -#define MICROPY_HW_APA102_MOSI (&pin_GPIO40) -#define MICROPY_HW_APA102_SCK (&pin_GPIO45) +// #define MICROPY_HW_APA102_MOSI (&pin_GPIO40) +// #define MICROPY_HW_APA102_SCK (&pin_GPIO45) -- cgit v1.2.3 From 0d7552b67eac91500db5e5ba25607df8bd3e16e5 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Tue, 6 Oct 2020 12:48:28 -0400 Subject: Update ESP-IDF to newer fixed fork --- .gitmodules | 2 +- ports/esp32s2/esp-idf | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/.gitmodules b/.gitmodules index f66ce8aaf..b1ae2276c 100644 --- a/.gitmodules +++ b/.gitmodules @@ -152,4 +152,4 @@ url = https://github.com/adafruit/Adafruit_CircuitPython_RFM69.git [submodule "ports/esp32s2/esp-idf"] path = ports/esp32s2/esp-idf - url = https://github.com/espressif/esp-idf.git + url = https://github.com/hierophect/esp-idf.git diff --git a/ports/esp32s2/esp-idf b/ports/esp32s2/esp-idf index dde6222cd..a7f777988 160000 --- a/ports/esp32s2/esp-idf +++ b/ports/esp32s2/esp-idf @@ -1 +1 @@ -Subproject commit dde6222cdceca978b2588fbf0eb25b8255741fba +Subproject commit a7f77798816661f7c4ae198f3878bc92a9274f82 -- cgit v1.2.3 From 68cb384f8faed451c3e31a83ae087646b0c0a9f6 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Tue, 6 Oct 2020 13:29:12 -0400 Subject: Remove logging from shared-bindings, fix translations, revert config target macro --- locale/circuitpython.pot | 14 +++++++++----- ports/esp32s2/common-hal/socketpool/Socket.h | 1 - ports/esp32s2/common-hal/wifi/ScannedNetworks.h | 1 - ports/esp32s2/mpconfigport.h | 3 --- shared-bindings/socketpool/Socket.c | 3 --- shared-bindings/socketpool/SocketPool.c | 3 --- shared-bindings/wifi/ScannedNetworks.c | 3 --- 7 files changed, 9 insertions(+), 19 deletions(-) (limited to 'ports') diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 62e1fbb10..199f39c58 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-10-05 12:59-0400\n" +"POT-Creation-Date: 2020-10-06 13:26-0400\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -271,6 +271,10 @@ msgstr "" msgid "A hardware interrupt channel is already in use" msgstr "" +#: ports/esp32s2/common-hal/analogio/AnalogIn.c +msgid "ADC2 is being used by WiFi" +msgstr "" + #: shared-bindings/_bleio/Address.c shared-bindings/ipaddress/IPv4Address.c #, c-format msgid "Address must be %d bytes long" @@ -1225,6 +1229,7 @@ msgid "No CCCD for this Characteristic" msgstr "" #: ports/atmel-samd/common-hal/analogio/AnalogOut.c +#: ports/esp32s2/common-hal/analogio/AnalogOut.c #: ports/stm/common-hal/analogio/AnalogOut.c msgid "No DAC on chip" msgstr "" @@ -1421,6 +1426,7 @@ msgstr "" #: ports/atmel-samd/common-hal/analogio/AnalogIn.c #: ports/cxd56/common-hal/analogio/AnalogIn.c +#: ports/esp32s2/common-hal/analogio/AnalogIn.c #: ports/mimxrt10xx/common-hal/analogio/AnalogIn.c #: ports/nrf/common-hal/analogio/AnalogIn.c #: ports/stm/common-hal/analogio/AnalogIn.c @@ -1482,10 +1488,6 @@ msgstr "" msgid "Pull not used when direction is output." msgstr "" -#: ports/stm/ref/pulseout-pre-timeralloc.c -msgid "PulseOut not supported on this chip" -msgstr "" - #: ports/stm/common-hal/os/__init__.c msgid "RNG DeInit Error" msgstr "" @@ -3148,6 +3150,7 @@ msgstr "" msgid "pow() with 3 arguments requires integers" msgstr "" +#: ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.h #: ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h #: ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h #: ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h @@ -3155,6 +3158,7 @@ msgstr "" #: ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h #: ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h #: ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h +#: ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h msgid "pressing boot button at start up.\n" msgstr "" diff --git a/ports/esp32s2/common-hal/socketpool/Socket.h b/ports/esp32s2/common-hal/socketpool/Socket.h index de63c8ab2..62b5ded58 100644 --- a/ports/esp32s2/common-hal/socketpool/Socket.h +++ b/ports/esp32s2/common-hal/socketpool/Socket.h @@ -33,7 +33,6 @@ #include "common-hal/ssl/SSLContext.h" #include "components/esp-tls/esp_tls.h" -#include "components/log/include/esp_log.h" typedef struct { mp_obj_base_t base; diff --git a/ports/esp32s2/common-hal/wifi/ScannedNetworks.h b/ports/esp32s2/common-hal/wifi/ScannedNetworks.h index db0c2a148..36da387f2 100644 --- a/ports/esp32s2/common-hal/wifi/ScannedNetworks.h +++ b/ports/esp32s2/common-hal/wifi/ScannedNetworks.h @@ -36,7 +36,6 @@ #include "freertos/event_groups.h" #include "components/esp_wifi/include/esp_wifi_types.h" -#include "components/log/include/esp_log.h" typedef struct { mp_obj_base_t base; diff --git a/ports/esp32s2/mpconfigport.h b/ports/esp32s2/mpconfigport.h index 066d0fd2c..cec8dd35d 100644 --- a/ports/esp32s2/mpconfigport.h +++ b/ports/esp32s2/mpconfigport.h @@ -36,9 +36,6 @@ #include "py/circuitpy_mpconfig.h" -// ESP-IDF leaves this undefined but uses it everywhere. -// Defining it will reduce chance of undef errors. -#define CONFIG_IDF_TARGET_ESP32 (0) #define MICROPY_PORT_ROOT_POINTERS \ CIRCUITPY_COMMON_ROOT_POINTERS diff --git a/shared-bindings/socketpool/Socket.c b/shared-bindings/socketpool/Socket.c index de05b8eb4..b0af57a5d 100644 --- a/shared-bindings/socketpool/Socket.c +++ b/shared-bindings/socketpool/Socket.c @@ -36,8 +36,6 @@ #include "py/runtime.h" #include "py/mperrno.h" -static const char* TAG = "socket binding"; - //| class Socket: //| """TCP, UDP and RAW socket. Cannot be created directly. Instead, call //| `SocketPool.socket()`. @@ -182,7 +180,6 @@ STATIC mp_obj_t socketpool_socket_connect(mp_obj_t self_in, mp_obj_t addr_in) { bool ok = common_hal_socketpool_socket_connect(self, host, hostlen, port); if (!ok) { - ESP_EARLY_LOGW(TAG, "socket connect failed"); mp_raise_OSError(0); } diff --git a/shared-bindings/socketpool/SocketPool.c b/shared-bindings/socketpool/SocketPool.c index 9f56e8c7e..527cf7e98 100644 --- a/shared-bindings/socketpool/SocketPool.c +++ b/shared-bindings/socketpool/SocketPool.c @@ -37,8 +37,6 @@ #include "shared-bindings/socketpool/Socket.h" #include "shared-bindings/socketpool/SocketPool.h" -static const char* TAG = "socketpool binding"; - //| class SocketPool: //| """A pool of socket resources available for the given radio. Only one //| SocketPool can be created for each radio. @@ -121,7 +119,6 @@ STATIC mp_obj_t socketpool_socketpool_getaddrinfo(size_t n_args, const mp_obj_t } if (ip_str == mp_const_none) { - ESP_EARLY_LOGW(TAG, "no ip str"); mp_raise_OSError(0); } diff --git a/shared-bindings/wifi/ScannedNetworks.c b/shared-bindings/wifi/ScannedNetworks.c index d04f0f92a..9316faa45 100644 --- a/shared-bindings/wifi/ScannedNetworks.c +++ b/shared-bindings/wifi/ScannedNetworks.c @@ -32,8 +32,6 @@ #include "py/runtime.h" #include "shared-bindings/wifi/ScannedNetworks.h" -static const char *TAG = "cp iternext"; - //| class ScannedNetworks: //| """Iterates over all `wifi.Network` objects found while scanning. This object is always created //| by a `wifi.Radio`: it has no user-visible constructor.""" @@ -46,7 +44,6 @@ STATIC mp_obj_t scannednetworks_iternext(mp_obj_t self_in) { return network; } - ESP_EARLY_LOGI(TAG, "stop iteration"); return MP_OBJ_STOP_ITERATION; } -- cgit v1.2.3 From d5c8e557691f307871aabdf7d10f49768c43b4f9 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Tue, 6 Oct 2020 15:00:26 -0400 Subject: Add AnalogIO --- ports/esp32s2/common-hal/analogio/AnalogOut.c | 22 ++++++++++++++++++---- ports/esp32s2/common-hal/analogio/AnalogOut.h | 1 - ports/esp32s2/supervisor/port.c | 5 +++++ 3 files changed, 23 insertions(+), 5 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/analogio/AnalogOut.c b/ports/esp32s2/common-hal/analogio/AnalogOut.c index b23c40514..a85a17183 100644 --- a/ports/esp32s2/common-hal/analogio/AnalogOut.c +++ b/ports/esp32s2/common-hal/analogio/AnalogOut.c @@ -35,25 +35,39 @@ #include "shared-bindings/microcontroller/Pin.h" #include "supervisor/shared/translate.h" +#include "components/driver/include/driver/dac.h" + #include "common-hal/microcontroller/Pin.h" void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, const mcu_pin_obj_t *pin) { - mp_raise_NotImplementedError(translate("No DAC on chip")); + if (pin == &pin_GPIO17) { + self->channel = DAC_CHANNEL_1; + } else if (pin == &pin_GPIO18) { + self->channel = DAC_CHANNEL_2; + } else { + mp_raise_ValueError(translate("Invalid DAC pin supplied")); + } + dac_output_enable(self->channel); } bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { - return true; + return (self->channel == DAC_CHANNEL_MAX); } void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { - + dac_output_disable(self->channel); + self->channel = DAC_CHANNEL_MAX; } void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, uint16_t value) { + uint8_t dac_value = (value * 255) / 65535; + dac_output_enable(self->channel); + dac_output_voltage(self->channel, dac_value); } void analogout_reset(void) { - + dac_output_disable(DAC_CHANNEL_1); + dac_output_disable(DAC_CHANNEL_2); } diff --git a/ports/esp32s2/common-hal/analogio/AnalogOut.h b/ports/esp32s2/common-hal/analogio/AnalogOut.h index a8cbc39d5..6285151ba 100644 --- a/ports/esp32s2/common-hal/analogio/AnalogOut.h +++ b/ports/esp32s2/common-hal/analogio/AnalogOut.h @@ -36,7 +36,6 @@ typedef struct { mp_obj_base_t base; const mcu_pin_obj_t * pin; uint8_t channel; - uint8_t dac_index:1; } analogio_analogout_obj_t; void analogout_reset(void); diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c index 4290b9bb4..0b9c03f74 100644 --- a/ports/esp32s2/supervisor/port.c +++ b/ports/esp32s2/supervisor/port.c @@ -35,6 +35,7 @@ #include "freertos/task.h" #include "common-hal/microcontroller/Pin.h" +#include "common-hal/analogio/AnalogOut.h" #include "common-hal/busio/I2C.h" #include "common-hal/busio/SPI.h" #include "common-hal/busio/UART.h" @@ -95,6 +96,10 @@ void reset_port(void) { // A larger delay so the idle task can run and do any IDF cleanup needed. vTaskDelay(4); +#if CIRCUITPY_ANALOGIO + analogout_reset(); +#endif + #if CIRCUITPY_PULSEIO esp32s2_peripherals_rmt_reset(); pulsein_reset(); -- cgit v1.2.3 From 01e9e355cefe53edcbd6662e98d926c248fc5b95 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 24 Sep 2020 11:19:46 -0500 Subject: canio: implement for stm32f405 The has successfully run my loopback self-test program for CAN, which tests transmission, reception, and filtering. The 1M baud rate setting was also verified on saleae to be accurate. --- ports/stm/Makefile | 4 + .../feather_stm32f405_express/mpconfigboard.mk | 2 + ports/stm/boards/feather_stm32f405_express/pins.c | 3 + ports/stm/common-hal/canio/CAN.c | 279 ++++++++++++++++++ ports/stm/common-hal/canio/CAN.h | 60 ++++ ports/stm/common-hal/canio/Listener.c | 314 +++++++++++++++++++++ ports/stm/common-hal/canio/Listener.h | 47 +++ ports/stm/common-hal/canio/__init__.c | 25 ++ ports/stm/common-hal/canio/__init__.h | 27 ++ ports/stm/hal_conf/stm32_hal_conf.h | 2 +- ports/stm/peripherals/stm32f4/stm32f405xx/periph.c | 23 ++ ports/stm/peripherals/stm32f4/stm32f405xx/periph.h | 6 + 12 files changed, 791 insertions(+), 1 deletion(-) create mode 100644 ports/stm/common-hal/canio/CAN.c create mode 100644 ports/stm/common-hal/canio/CAN.h create mode 100644 ports/stm/common-hal/canio/Listener.c create mode 100644 ports/stm/common-hal/canio/Listener.h create mode 100644 ports/stm/common-hal/canio/__init__.c create mode 100644 ports/stm/common-hal/canio/__init__.h (limited to 'ports') diff --git a/ports/stm/Makefile b/ports/stm/Makefile index 9e1d10b99..b9426e07e 100755 --- a/ports/stm/Makefile +++ b/ports/stm/Makefile @@ -198,6 +198,10 @@ SRC_STM32 = $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES_LOWER)xx_,\ ll_utils.c \ ) +ifeq ($(CIRCUITPY_CANIO),1) +SRC_STM32 += $(HAL_DIR)/Src/stm32$(MCU_SERIES_LOWER)xx_hal_can.c +endif + # Need this to avoid UART linker problems. TODO: rewrite to use registered callbacks. # Does not exist for F4 and lower ifeq ($(MCU_VARIANT),$(filter $(MCU_VARIANT),STM32F765xx STM32F767xx STM32F769xx STM32H743xx)) diff --git a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk index 4d0bd4598..086622384 100644 --- a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk @@ -16,3 +16,5 @@ LD_DEFAULT = boards/STM32F405_default.ld # UF2 boot option LD_BOOT = boards/STM32F405_boot.ld UF2_OFFSET = 0x8010000 + +CIRCUITPY_CANIO = 1 diff --git a/ports/stm/boards/feather_stm32f405_express/pins.c b/ports/stm/boards/feather_stm32f405_express/pins.c index 571076c33..e20ad5028 100644 --- a/ports/stm/boards/feather_stm32f405_express/pins.c +++ b/ports/stm/boards/feather_stm32f405_express/pins.c @@ -47,5 +47,8 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_SDIO_CLOCK), MP_ROM_PTR(&pin_PC12) }, { MP_ROM_QSTR(MP_QSTR_SDIO_COMMAND), MP_ROM_PTR(&pin_PD02) }, { MP_ROM_QSTR(MP_QSTR_SDIO_DATA), MP_ROM_PTR(&sdio_data_tuple) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_PB08) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/common-hal/canio/CAN.c b/ports/stm/common-hal/canio/CAN.c new file mode 100644 index 000000000..0edf1217e --- /dev/null +++ b/ports/stm/common-hal/canio/CAN.c @@ -0,0 +1,279 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "py/mperrno.h" + +#include "common-hal/canio/CAN.h" +#include "peripherals/periph.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "supervisor/port.h" + +STATIC bool reserved_can[MP_ARRAY_SIZE(mcu_can_banks)]; + +STATIC const mcu_periph_obj_t *find_pin_function(const mcu_periph_obj_t *table, size_t sz, const mcu_pin_obj_t *pin, int periph_index) { + for(size_t i = 0; iperiph_index) { + continue; + } + if (pin == table->pin) { + return table; + } + } + return NULL; +} + + +__attribute__((optimize("O0"))) +void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent) +{ +#define DIV_ROUND(a, b) (((a) + (b)/2) / (b)) +#define DIV_ROUND_UP(a, b) (((a) + (b) - 1) / (b)) + + const uint8_t can_tx_len = MP_ARRAY_SIZE(mcu_can_tx_list); + const uint8_t can_rx_len = MP_ARRAY_SIZE(mcu_can_rx_list); + + const mcu_periph_obj_t *mcu_tx = find_pin_function(mcu_can_tx_list, can_tx_len, tx, -1); + if (!mcu_tx) { + mp_raise_ValueError_varg(translate("Invalid %q pin selection"), MP_QSTR_tx); + } + int periph_index = mcu_tx->periph_index; + + const mcu_periph_obj_t *mcu_rx = find_pin_function(mcu_can_rx_list, can_rx_len, rx, periph_index); + if (!mcu_rx) { + mp_raise_ValueError_varg(translate("Invalid %q pin selection"), MP_QSTR_rx); + } + + if (reserved_can[periph_index]) { + mp_raise_ValueError(translate("Hardware busy, try alternative pins")); + } + + const uint32_t can_frequency = 42000000; + uint32_t clocks_per_bit = DIV_ROUND(can_frequency, baudrate); + uint32_t clocks_to_sample = DIV_ROUND(clocks_per_bit * 7, 8); + uint32_t clocks_after_sample = clocks_per_bit - clocks_to_sample; + uint32_t divisor = MAX(DIV_ROUND_UP(clocks_to_sample, 16), DIV_ROUND_UP(clocks_after_sample, 8)); + const uint32_t sjw = 3; + + uint32_t tq_per_bit = DIV_ROUND(clocks_per_bit, divisor); + uint32_t tq_to_sample = DIV_ROUND(clocks_to_sample, divisor); + uint32_t tq_after_sample = tq_per_bit - tq_to_sample; + + if (divisor > 1023) { + mp_raise_OSError(MP_EINVAL); // baudrate cannot be attained (16kHz or something is lower bound, should never happen) + } + + { + GPIO_InitTypeDef GPIO_InitStruct = { + .Pin = pin_mask(tx->number), + .Speed = GPIO_SPEED_FREQ_VERY_HIGH, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_PULLUP, + .Alternate = mcu_tx->altfn_index, + }; + HAL_GPIO_Init(pin_port(tx->port), &GPIO_InitStruct); + + GPIO_InitStruct.Pin = pin_mask(rx->number); + GPIO_InitStruct.Alternate = mcu_rx->altfn_index; + HAL_GPIO_Init(pin_port(rx->port), &GPIO_InitStruct); + } + + CAN_TypeDef *hw = mcu_can_banks[periph_index - 1]; + + // CAN2 shares resources with CAN1. So we always enable CAN1, then split + // the filter banks equally between them. + + __HAL_RCC_CAN1_CLK_ENABLE(); + + if(hw == CAN2) { + __HAL_RCC_CAN2_CLK_ENABLE(); + self->start_filter_bank = 14; + self->end_filter_bank = 28; + self->filter_hw = CAN1; + } else { + self->start_filter_bank = 0; + self->end_filter_bank = 14; + self->filter_hw = hw; + } + + CAN_InitTypeDef init = { + .AutoRetransmission = ENABLE, + .AutoBusOff = ENABLE, + .Prescaler = divisor, + .Mode = (loopback ? CAN_MODE_LOOPBACK : 0) | (silent ? CAN_MODE_SILENT_LOOPBACK : 0), + .SyncJumpWidth = (sjw-1) << CAN_BTR_SJW_Pos, + .TimeSeg1 = (tq_to_sample-2) << CAN_BTR_TS1_Pos, + .TimeSeg2 = (tq_after_sample-1) << CAN_BTR_TS2_Pos, + }; + + self->periph_index = periph_index; + self->silent = silent; + self->loopback = loopback; + self->baudrate = baudrate; + + self->handle.Instance = hw; + self->handle.Init = init; + self->handle.State = HAL_CAN_STATE_RESET; + + HAL_CAN_Init(&self->handle); + + // Set the filter split as 14:14 + // COULDDO(@jepler): Dynamically allocate filter banks between CAN1/2 + self->filter_hw->FMR |= CAN_FMR_FINIT; + self->filter_hw->FMR = CAN_FMR_FINIT | (14 << CAN_FMR_CAN2SB_Pos); + + // Clear every filter enable bit for this can HW + uint32_t fa1r = self->filter_hw->FA1R; + for (int i = self->start_filter_bank; iend_filter_bank; i++) { + fa1r &= ~(1 << i); + } + self->filter_hw->FA1R = fa1r; + CLEAR_BIT(self->filter_hw->FMR, CAN_FMR_FINIT); + + HAL_CAN_Start(&self->handle); + + reserved_can[periph_index] = true; +} + +bool common_hal_canio_can_loopback_get(canio_can_obj_t *self) +{ + return self->loopback; +} + +int common_hal_canio_can_baudrate_get(canio_can_obj_t *self) +{ + return self->baudrate; +} + +int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self) +{ + return (self->handle.Instance->ESR & CAN_ESR_TEC) >> CAN_ESR_TEC_Pos; +} + +int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self) +{ + return (self->handle.Instance->ESR & CAN_ESR_REC) >> CAN_ESR_REC_Pos; +} + +int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self) +{ + return self->error_warning_state_count; +} + +int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self) +{ + return self->error_passive_state_count; +} + +int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self) +{ + return self->bus_off_state_count; +} + +canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self) { + uint32_t esr = self->handle.Instance->ESR; + if (READ_BIT(esr, CAN_ESR_BOFF)) { + return BUS_STATE_OFF; + } + if (READ_BIT(esr, CAN_ESR_EPVF)) { + return BUS_STATE_ERROR_PASSIVE; + } + if (READ_BIT(esr, CAN_ESR_EWGF)) { + return BUS_STATE_ERROR_WARNING; + } + return BUS_STATE_ERROR_ACTIVE; +} + +void common_hal_canio_can_restart(canio_can_obj_t *self) { + if (!common_hal_canio_can_auto_restart_get(self)) { + HAL_CAN_Start(&self->handle); + } +} + +bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self) { + return READ_BIT(self->handle.Instance->MCR, CAN_MCR_ABOM); +} + +void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool value) { + if(value) { + SET_BIT(self->handle.Instance->MCR, CAN_MCR_ABOM); + } else { + CLEAR_BIT(self->handle.Instance->MCR, CAN_MCR_ABOM); + } +} + +void common_hal_canio_can_send(canio_can_obj_t *self, mp_obj_t message_in) +{ + canio_message_obj_t *message = message_in; + uint32_t mailbox; + bool rtr = message->base.type == &canio_remote_transmission_request_type; + CAN_TxHeaderTypeDef header = { + .StdId = message->id, + .ExtId = message->id, + .IDE = message->extended ? CAN_ID_EXT : CAN_ID_STD, + .RTR = rtr ? CAN_RTR_REMOTE : CAN_RTR_DATA, + .DLC = message->size, + }; + HAL_StatusTypeDef status = HAL_CAN_AddTxMessage(&self->handle, &header, message->data, &mailbox); + if (status != HAL_OK) { + mp_raise_OSError(MP_ENOMEM); + } +} + +bool common_hal_canio_can_silent_get(canio_can_obj_t *self) { + return self->silent; +} + +bool common_hal_canio_can_deinited(canio_can_obj_t *self) { + return !self->handle.Instance; +} + +void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self) { + if (common_hal_canio_can_deinited(self)) { + raise_deinited_error(); + } +} + +void common_hal_canio_can_deinit(canio_can_obj_t *self) +{ + if (self->handle.Instance) { + SET_BIT(self->handle.Instance->MCR, CAN_MCR_RESET); + while (READ_BIT(self->handle.Instance->MCR, CAN_MCR_RESET)) { + } + reserved_can[self->periph_index] = 0; + } + self->handle.Instance = NULL; +} + +void common_hal_canio_reset(void) { + for (size_t i=0; iMCR, CAN_MCR_RESET); + reserved_can[i] = 0; + } +} diff --git a/ports/stm/common-hal/canio/CAN.h b/ports/stm/common-hal/canio/CAN.h new file mode 100644 index 000000000..bffc0f65f --- /dev/null +++ b/ports/stm/common-hal/canio/CAN.h @@ -0,0 +1,60 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" +#include "shared-bindings/canio/__init__.h" +#include "shared-bindings/canio/CAN.h" +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/canio/__init__.h" +#include "shared-module/canio/Message.h" + +#include "stm32f4xx_hal.h" +#include "stm32f4xx_hal_can.h" + +#define FILTER_BANK_COUNT (28) + +typedef struct canio_can_obj { + mp_obj_base_t base; + CAN_HandleTypeDef handle; + CAN_TypeDef *filter_hw; + volatile uint32_t error_warning_state_count; + volatile uint32_t error_passive_state_count; + volatile uint32_t bus_off_state_count; + int baudrate; + const mcu_pin_obj_t *rx_pin; + const mcu_pin_obj_t *tx_pin; + bool loopback:1; + bool silent:1; + bool auto_restart:1; + bool fifo0_in_use:1; + bool fifo1_in_use:1; + uint8_t periph_index:2; + uint8_t start_filter_bank; + uint8_t end_filter_bank; + long filter_in_use; // bitmask for the 28 filter banks +} canio_can_obj_t; diff --git a/ports/stm/common-hal/canio/Listener.c b/ports/stm/common-hal/canio/Listener.c new file mode 100644 index 000000000..dd968979d --- /dev/null +++ b/ports/stm/common-hal/canio/Listener.c @@ -0,0 +1,314 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "common-hal/canio/__init__.h" +#include "common-hal/canio/Listener.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/tick.h" +#include "supervisor/shared/safe_mode.h" + +STATIC void allow_filter_change(canio_can_obj_t *can) { + can->filter_hw->FMR |= CAN_FMR_FINIT; +} + +STATIC void prevent_filter_change(canio_can_obj_t *can) { + can->filter_hw->FMR &= ~CAN_FMR_FINIT; +} + +STATIC bool filter_in_use(canio_can_obj_t *can, int idx) { + return can->filter_hw->FA1R & (1<extended) { + num_extended_mask += 1; + } else { + num_standard_mask += 1; + } + } + return num_extended_mask + num_standard_mask/2; +} + +STATIC size_t num_filters_available(canio_can_obj_t *can) { + size_t available = 0; + for(size_t i = can->start_filter_bank; i < can->end_filter_bank; i++) { + if (!filter_in_use(can, i)) { + available++; + } + } + return available; +} + +STATIC void clear_filters(canio_listener_obj_t *self) { + canio_can_obj_t *can = self->can; + + allow_filter_change(can); + uint32_t fa1r = can->filter_hw->FA1R; + for(size_t i = can->start_filter_bank; i < can->end_filter_bank; i++) { + if (((can->filter_hw->FFA1R >> i) & 1) == self->fifo_idx) { + fa1r &= ~(1<filter_hw->FA1R = fa1r; + prevent_filter_change(can); +} + +STATIC int next_filter(canio_can_obj_t *can) { + uint32_t fa1r = can->filter_hw->FA1R; + for(size_t i = can->start_filter_bank; i < can->end_filter_bank; i++) { + if (!(fa1r & (1<can); + + // filter is already deactivated, so we skip deactivating it here + // CLEAR_BIT(self->can->filter_hw->FA1R, bank); + + self->can->filter_hw->sFilterRegister[bank].FR1 = + (((match1->id & 0x7ff) << 5)) | + (((match1->mask & 0x7ff) << 5 | FILTER16_IDE)) << 16; + self->can->filter_hw->sFilterRegister[bank].FR2 = + (((match2->id & 0x7ff) << 5)) | + (((match2->mask & 0x7ff) << 5 | FILTER16_IDE)) << 16; + + // filter mode: 0 = mask + // (this bit should be clear already, we never set it; but just in case) + CLEAR_BIT(self->can->filter_hw->FM1R, 1 << bank); + // filter scale: 0 = 16 bits + CLEAR_BIT(self->can->filter_hw->FS1R, 1 << bank); + // fifo assignment: 1 = FIFO 1 + if (self->fifo_idx) { + SET_BIT(self->can->filter_hw->FFA1R, 1 << bank); + } else { + CLEAR_BIT(self->can->filter_hw->FFA1R, 1 << bank); + } + + // filter activation: 1 = enabled + SET_BIT(self->can->filter_hw->FA1R, 1 << bank); +} + +STATIC void install_extended_filter(canio_listener_obj_t *self, canio_match_obj_t *match) { + int bank = next_filter(self->can); + + // filter is already deactivated, so we skip deactivating it here + // CLEAR_BIT(self->can->filter_hw->FA1R, bank); + + self->can->filter_hw->sFilterRegister[bank].FR1 = + ((match->id << 3) | FILTER32_IDE); + self->can->filter_hw->sFilterRegister[bank].FR2 = + ((match->mask << 3) | FILTER32_IDE); + + // filter mode: 0 = mask + // (this bit should be clear already, we never set it; but just in case) + CLEAR_BIT(self->can->filter_hw->FM1R, 1 << bank); + // filter scale: 1 = 32 bits + SET_BIT(self->can->filter_hw->FS1R, 1 << bank); + // fifo assignment: 1 = FIFO 1 + if (self->fifo_idx) { + SET_BIT(self->can->filter_hw->FFA1R, 1 << bank); + } else { + CLEAR_BIT(self->can->filter_hw->FFA1R, 1 << bank); + } + + // filter activation: 1 = enabled + SET_BIT(self->can->filter_hw->FA1R, 1 << bank); +} + +STATIC void install_all_match_filter(canio_listener_obj_t *self) { + int bank = next_filter(self->can); + + // filter is already deactivated, so we skip deactivating it here + // CLEAR_BIT(self->can->filter_hw->FA1R, bank); + + self->can->filter_hw->sFilterRegister[bank].FR1 = 0; + self->can->filter_hw->sFilterRegister[bank].FR2 = 0; + + // filter mode: 0 = mask + // (this bit should be clear already, we never set it; but just in case) + CLEAR_BIT(self->can->filter_hw->FM1R, bank); + // filter scale: 1 = 32 bits + SET_BIT(self->can->filter_hw->FS1R, bank); + // fifo assignment: 1 = FIFO 1 + if (self->fifo_idx) { + SET_BIT(self->can->filter_hw->FFA1R, bank); + } else { + CLEAR_BIT(self->can->filter_hw->FFA1R, bank); + } + + // filter activation: 1 = enabled + SET_BIT(self->can->filter_hw->FA1R, (1 << bank)); +} + + +#define NO_ADDRESS (-1) +void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t **matches) { + allow_filter_change(self->can); + if (!nmatch) { + install_all_match_filter(self); + } else { + canio_match_obj_t *first_match = NULL; + for(size_t i = 0; iextended) { + install_extended_filter(self, matches[i]); + } else { + if (first_match) { + install_standard_filter(self, first_match, matches[i]); + first_match = NULL; + } else { + first_match = matches[i]; + } + } + } + if (first_match) { + install_standard_filter(self, first_match, first_match); + } + } + prevent_filter_change(self->can); +} + + +void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout) { + if (!can->fifo0_in_use) { + self->fifo_idx = 0; + self->rfr = &can->handle.Instance->RF0R; + can->fifo0_in_use = true; + } else if (!can->fifo1_in_use) { + self->fifo_idx = 1; + self->rfr = &can->handle.Instance->RF1R; + can->fifo1_in_use = true; + } else { + mp_raise_ValueError(translate("All RX FIFOs in use")); + } + + if (num_filters_needed(nmatch, matches) > num_filters_available(can)) { + mp_raise_ValueError(translate("Filters too complex")); + } + + // Nothing can fail now so it's safe to assign self->can + self->can = can; + + self->mailbox = &can->handle.Instance->sFIFOMailBox[self->fifo_idx]; + set_filters(self, nmatch, matches); + common_hal_canio_listener_set_timeout(self, timeout); +} + +void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout) { + self->timeout_ms = (int)MICROPY_FLOAT_C_FUN(ceil)(timeout * 1000); +} + +float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self) { + return self->timeout_ms / 1000.0f; +} + +void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self) { + if (!self->can) { + raise_deinited_error(); + } + common_hal_canio_can_check_for_deinit(self->can); +} + +int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self) { + return *(self->rfr) & CAN_RF0R_FMP0; +} + +mp_obj_t common_hal_canio_listener_receive(canio_listener_obj_t *self) { + if (!common_hal_canio_listener_in_waiting(self)) { + uint64_t deadline = supervisor_ticks_ms64() + self->timeout_ms; + do { + if (supervisor_ticks_ms64() > deadline) { + return NULL; + } + } while (!common_hal_canio_listener_in_waiting(self)); + } + + uint32_t rir = self->mailbox->RIR; + uint32_t rdtr = self->mailbox->RDTR; + + bool rtr = rir & CAN_RI0R_RTR; + canio_message_obj_t *message = m_new_obj(canio_message_obj_t); + message->base.type = rtr ? &canio_remote_transmission_request_type : &canio_message_type; + message->extended = rir & CAN_RI0R_IDE; + if (message->extended) { + message->id = rir >> 3; + } else { + message->id = rir >> 21; + } + message->size = rdtr & CAN_RDT0R_DLC; + if (!rtr) { + uint32_t payload[] = { self->mailbox->RDLR, self->mailbox->RDHR }; + MP_STATIC_ASSERT(sizeof(payload) == sizeof(message->data)); + memcpy(message->data, payload, sizeof(payload)); + } + // Release the mailbox + SET_BIT(*self->rfr, CAN_RF0R_RFOM0); + return message; +} + +void common_hal_canio_listener_deinit(canio_listener_obj_t *self) { + if (self->can) { + clear_filters(self); + if (self->fifo_idx == 0) { + self->can->fifo0_in_use = false; + } + if (self->fifo_idx == 1) { + self->can->fifo1_in_use = false; + } + } + self->fifo_idx = -1; + self->can = NULL; + self->mailbox = NULL; + self->rfr = NULL; +} diff --git a/ports/stm/common-hal/canio/Listener.h b/ports/stm/common-hal/canio/Listener.h new file mode 100644 index 000000000..2e1778888 --- /dev/null +++ b/ports/stm/common-hal/canio/Listener.h @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "common-hal/canio/CAN.h" +#include "shared-module/canio/Match.h" + +typedef struct canio_listener_obj { + mp_obj_base_t base; + canio_can_obj_t *can; + CAN_FIFOMailBox_TypeDef *mailbox; + __IO uint32_t *rfr; + uint32_t timeout_ms; + uint8_t fifo_idx; +} canio_listener_obj_t; + +void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout); +void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self); +void common_hal_canio_listener_deinit(canio_listener_obj_t *self); +bool common_hal_canio_listener_receiveinto(canio_listener_obj_t *self, canio_message_obj_t *message); +int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self); +float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self); +void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout); diff --git a/ports/stm/common-hal/canio/__init__.c b/ports/stm/common-hal/canio/__init__.c new file mode 100644 index 000000000..7932bfc2d --- /dev/null +++ b/ports/stm/common-hal/canio/__init__.c @@ -0,0 +1,25 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ diff --git a/ports/stm/common-hal/canio/__init__.h b/ports/stm/common-hal/canio/__init__.h new file mode 100644 index 000000000..20b6638cd --- /dev/null +++ b/ports/stm/common-hal/canio/__init__.h @@ -0,0 +1,27 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once diff --git a/ports/stm/hal_conf/stm32_hal_conf.h b/ports/stm/hal_conf/stm32_hal_conf.h index c91be86fd..8000e7e83 100644 --- a/ports/stm/hal_conf/stm32_hal_conf.h +++ b/ports/stm/hal_conf/stm32_hal_conf.h @@ -11,7 +11,7 @@ */ #define HAL_MODULE_ENABLED #define HAL_ADC_MODULE_ENABLED -// #define HAL_CAN_MODULE_ENABLED +#define HAL_CAN_MODULE_ENABLED // #define HAL_CEC_MODULE_ENABLED // #define HAL_COMP_MODULE_ENABLED #define HAL_CORTEX_MODULE_ENABLED diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/periph.c b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.c index c58234671..2f9accbf1 100644 --- a/ports/stm/peripherals/stm32f4/stm32f405xx/periph.c +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.c @@ -216,3 +216,26 @@ const mcu_periph_obj_t mcu_sdio_data2_list[1] = { const mcu_periph_obj_t mcu_sdio_data3_list[1] = { PERIPH(1, 12, &pin_PC11), }; + +//CAN +CAN_TypeDef * mcu_can_banks[2] = {CAN1, CAN2}; + +const mcu_periph_obj_t mcu_can_tx_list[6] = { + PERIPH(1, 9, &pin_PA11), + PERIPH(1, 9, &pin_PB08), + PERIPH(1, 9, &pin_PD00), + PERIPH(1, 9, &pin_PI09), + + PERIPH(2, 9, &pin_PB12), + PERIPH(2, 9, &pin_PB05), +}; + +const mcu_periph_obj_t mcu_can_rx_list[6] = { + PERIPH(1, 9, &pin_PA12), + PERIPH(1, 9, &pin_PB09), + PERIPH(1, 9, &pin_PD01), + PERIPH(1, 9, &pin_PH13), + + PERIPH(2, 9, &pin_PB13), + PERIPH(2, 9, &pin_PB06), +}; diff --git a/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h index 5b64fe10c..03198af55 100644 --- a/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h +++ b/ports/stm/peripherals/stm32f4/stm32f405xx/periph.h @@ -71,5 +71,11 @@ extern const mcu_periph_obj_t mcu_sdio_data1_list[1]; extern const mcu_periph_obj_t mcu_sdio_data2_list[1]; extern const mcu_periph_obj_t mcu_sdio_data3_list[1]; +// CAN +extern CAN_TypeDef * mcu_can_banks[2]; + +extern const mcu_periph_obj_t mcu_can_tx_list[6]; +extern const mcu_periph_obj_t mcu_can_rx_list[6]; + #endif // MICROPY_INCLUDED_STM32_PERIPHERALS_STM32F405XX_PERIPH_H -- cgit v1.2.3 From 7df01d3fbd321855cc65dc185d17933e4c5b388f Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 5 Oct 2020 12:41:22 -0500 Subject: stm32: canio: enable on all stm32f405 boards --- ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk | 2 -- ports/stm/mpconfigport.mk | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk index 086622384..4d0bd4598 100644 --- a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk @@ -16,5 +16,3 @@ LD_DEFAULT = boards/STM32F405_default.ld # UF2 boot option LD_BOOT = boards/STM32F405_boot.ld UF2_OFFSET = 0x8010000 - -CIRCUITPY_CANIO = 1 diff --git a/ports/stm/mpconfigport.mk b/ports/stm/mpconfigport.mk index b827aa48b..bcecaa517 100644 --- a/ports/stm/mpconfigport.mk +++ b/ports/stm/mpconfigport.mk @@ -4,6 +4,7 @@ INTERNAL_LIBM ?= 1 USB_SERIAL_NUMBER_LENGTH ?= 24 ifeq ($(MCU_VARIANT),STM32F405xx) + CIRCUITPY_CANIO = 1 CIRCUITPY_FRAMEBUFFERIO ?= 1 CIRCUITPY_RGBMATRIX ?= 1 CIRCUITPY_SDIOIO ?= 1 -- cgit v1.2.3 From 23bd2496de3eb07385f74801df9971f9b63236bb Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 5 Oct 2020 12:41:31 -0500 Subject: stm32: canio: remove some unneeded declarations --- ports/stm/common-hal/canio/Listener.c | 1 + ports/stm/common-hal/canio/Listener.h | 8 -------- 2 files changed, 1 insertion(+), 8 deletions(-) (limited to 'ports') diff --git a/ports/stm/common-hal/canio/Listener.c b/ports/stm/common-hal/canio/Listener.c index dd968979d..09456d39d 100644 --- a/ports/stm/common-hal/canio/Listener.c +++ b/ports/stm/common-hal/canio/Listener.c @@ -32,6 +32,7 @@ #include "common-hal/canio/__init__.h" #include "common-hal/canio/Listener.h" +#include "shared-bindings/canio/Listener.h" #include "shared-bindings/util.h" #include "supervisor/shared/tick.h" #include "supervisor/shared/safe_mode.h" diff --git a/ports/stm/common-hal/canio/Listener.h b/ports/stm/common-hal/canio/Listener.h index 2e1778888..2d0e302e9 100644 --- a/ports/stm/common-hal/canio/Listener.h +++ b/ports/stm/common-hal/canio/Listener.h @@ -37,11 +37,3 @@ typedef struct canio_listener_obj { uint32_t timeout_ms; uint8_t fifo_idx; } canio_listener_obj_t; - -void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout); -void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self); -void common_hal_canio_listener_deinit(canio_listener_obj_t *self); -bool common_hal_canio_listener_receiveinto(canio_listener_obj_t *self, canio_message_obj_t *message); -int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self); -float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self); -void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout); -- cgit v1.2.3 From a7dccb39a487cdd2e65d9b9b588829818de1d16f Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 5 Oct 2020 12:41:50 -0500 Subject: stm32: canio: remove unused functions --- ports/stm/common-hal/canio/CAN.c | 15 --------------- 1 file changed, 15 deletions(-) (limited to 'ports') diff --git a/ports/stm/common-hal/canio/CAN.c b/ports/stm/common-hal/canio/CAN.c index 0edf1217e..244cc037c 100644 --- a/ports/stm/common-hal/canio/CAN.c +++ b/ports/stm/common-hal/canio/CAN.c @@ -181,21 +181,6 @@ int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self) return (self->handle.Instance->ESR & CAN_ESR_REC) >> CAN_ESR_REC_Pos; } -int common_hal_canio_can_error_warning_state_count_get(canio_can_obj_t *self) -{ - return self->error_warning_state_count; -} - -int common_hal_canio_can_error_passive_state_count_get(canio_can_obj_t *self) -{ - return self->error_passive_state_count; -} - -int common_hal_canio_can_bus_off_state_count_get(canio_can_obj_t *self) -{ - return self->bus_off_state_count; -} - canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self) { uint32_t esr = self->handle.Instance->ESR; if (READ_BIT(esr, CAN_ESR_BOFF)) { -- cgit v1.2.3 From e5a0af9216a6d868fad9105a4eb44e0889f54e29 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 6 Oct 2020 09:18:53 -0500 Subject: stm32: canio: When Tx mailboxes are full, cancel an old message .. also add the 8ms wait for transmission that the atmel sam port has --- ports/stm/common-hal/canio/CAN.c | 18 ++++++++++++++++++ ports/stm/common-hal/canio/CAN.h | 1 + 2 files changed, 19 insertions(+) (limited to 'ports') diff --git a/ports/stm/common-hal/canio/CAN.c b/ports/stm/common-hal/canio/CAN.c index 244cc037c..8ff91aaca 100644 --- a/ports/stm/common-hal/canio/CAN.c +++ b/ports/stm/common-hal/canio/CAN.c @@ -225,10 +225,28 @@ void common_hal_canio_can_send(canio_can_obj_t *self, mp_obj_t message_in) .RTR = rtr ? CAN_RTR_REMOTE : CAN_RTR_DATA, .DLC = message->size, }; + uint32_t free_level = HAL_CAN_GetTxMailboxesFreeLevel(&self->handle); + if (free_level == 0) { + // There's no free Tx mailbox. We need to cancel some message without + // transmitting it, because once the bus returns to active state it's + // preferable to transmit the newest messages instead of older messages. + // + // We don't strictly guarantee that we abort the oldest Tx request, + // rather we just abort a different index each time. This permits us + // to avoid tracking this information altogether. + HAL_CAN_AbortTxRequest(&self->handle, 1 << (self->cancel_mailbox)); + self->cancel_mailbox = (self->cancel_mailbox + 1) % 3; + } HAL_StatusTypeDef status = HAL_CAN_AddTxMessage(&self->handle, &header, message->data, &mailbox); if (status != HAL_OK) { mp_raise_OSError(MP_ENOMEM); } + + // wait 8ms (hard coded for now) for TX to occur + uint64_t deadline = port_get_raw_ticks(NULL) + 8; + while (port_get_raw_ticks(NULL) < deadline && HAL_CAN_IsTxMessagePending(&self->handle, 1 << mailbox)) { + RUN_BACKGROUND_TASKS; + } } bool common_hal_canio_can_silent_get(canio_can_obj_t *self) { diff --git a/ports/stm/common-hal/canio/CAN.h b/ports/stm/common-hal/canio/CAN.h index bffc0f65f..94d7e99a8 100644 --- a/ports/stm/common-hal/canio/CAN.h +++ b/ports/stm/common-hal/canio/CAN.h @@ -54,6 +54,7 @@ typedef struct canio_can_obj { bool fifo0_in_use:1; bool fifo1_in_use:1; uint8_t periph_index:2; + uint8_t cancel_mailbox; uint8_t start_filter_bank; uint8_t end_filter_bank; long filter_in_use; // bitmask for the 28 filter banks -- cgit v1.2.3 From abe0405d6e643614557edd65995b61c04c656c44 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 6 Oct 2020 10:31:01 -0500 Subject: stm32: canio: Fix canio.CAN.restart() --- ports/stm/common-hal/canio/CAN.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/stm/common-hal/canio/CAN.c b/ports/stm/common-hal/canio/CAN.c index 8ff91aaca..62c4e9935 100644 --- a/ports/stm/common-hal/canio/CAN.c +++ b/ports/stm/common-hal/canio/CAN.c @@ -197,7 +197,15 @@ canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self) { void common_hal_canio_can_restart(canio_can_obj_t *self) { if (!common_hal_canio_can_auto_restart_get(self)) { - HAL_CAN_Start(&self->handle); + // "If ABOM is cleared, the software must initiate the recovering + // sequence by requesting bxCAN to enter and to leave initialization + // mode." + self->handle.Instance->MCR |= CAN_MCR_INRQ; + while ((self->handle.Instance->MSR & CAN_MSR_INAK) == 0) { + } + self->handle.Instance->MCR &= ~CAN_MCR_INRQ; + while ((self->handle.Instance->MSR & CAN_MSR_INAK)) { + } } } -- cgit v1.2.3 From eed3387f4e625335a5d2f6582946ec75d1c1ed10 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 6 Oct 2020 10:31:38 -0500 Subject: stm32: canio: Fix message cancellation .. it's necessary to wait for a cancellation request to actually free the respective Tx mailbox --- ports/stm/common-hal/canio/CAN.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/stm/common-hal/canio/CAN.c b/ports/stm/common-hal/canio/CAN.c index 62c4e9935..fe1c3f2b1 100644 --- a/ports/stm/common-hal/canio/CAN.c +++ b/ports/stm/common-hal/canio/CAN.c @@ -241,13 +241,21 @@ void common_hal_canio_can_send(canio_can_obj_t *self, mp_obj_t message_in) // // We don't strictly guarantee that we abort the oldest Tx request, // rather we just abort a different index each time. This permits us - // to avoid tracking this information altogether. + // to just track a single cancel index HAL_CAN_AbortTxRequest(&self->handle, 1 << (self->cancel_mailbox)); self->cancel_mailbox = (self->cancel_mailbox + 1) % 3; + // The abort request may not have completed immediately, so wait for + // the Tx mailbox to become free + do { + free_level = HAL_CAN_GetTxMailboxesFreeLevel(&self->handle); + } while (!free_level); } HAL_StatusTypeDef status = HAL_CAN_AddTxMessage(&self->handle, &header, message->data, &mailbox); if (status != HAL_OK) { - mp_raise_OSError(MP_ENOMEM); + // this is a "shouldn't happen" condition. we don't throw because the + // contract of send() is that it queues the packet to be sent if + // possible and does not signal success or failure to actually send. + return; } // wait 8ms (hard coded for now) for TX to occur -- cgit v1.2.3 From 81d7ef0256d5450e56809c5fe198693cc6cb9925 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 6 Oct 2020 20:13:23 -0500 Subject: stm: canio: remove stray optimization flag for debugging --- ports/stm/common-hal/canio/CAN.c | 1 - 1 file changed, 1 deletion(-) (limited to 'ports') diff --git a/ports/stm/common-hal/canio/CAN.c b/ports/stm/common-hal/canio/CAN.c index fe1c3f2b1..52d5cad1f 100644 --- a/ports/stm/common-hal/canio/CAN.c +++ b/ports/stm/common-hal/canio/CAN.c @@ -50,7 +50,6 @@ STATIC const mcu_periph_obj_t *find_pin_function(const mcu_periph_obj_t *table, } -__attribute__((optimize("O0"))) void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent) { #define DIV_ROUND(a, b) (((a) + (b)/2) / (b)) -- cgit v1.2.3 From 16ed875f4e88fbf0ecd9f5fa71b1c28d7a5e444b Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 6 Oct 2020 20:14:50 -0500 Subject: canio: remove unused fields these relate to properties that were removed as well --- ports/atmel-samd/common-hal/canio/CAN.h | 3 --- ports/stm/common-hal/canio/CAN.h | 3 --- 2 files changed, 6 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/canio/CAN.h b/ports/atmel-samd/common-hal/canio/CAN.h index cdea60e7d..15ac0f4b7 100644 --- a/ports/atmel-samd/common-hal/canio/CAN.h +++ b/ports/atmel-samd/common-hal/canio/CAN.h @@ -41,9 +41,6 @@ typedef struct canio_can_obj { mp_obj_base_t base; Can *hw; canio_can_state_t *state; - volatile uint32_t error_warning_state_count; - volatile uint32_t error_passive_state_count; - volatile uint32_t bus_off_state_count; int baudrate; uint8_t rx_pin_number:8; uint8_t tx_pin_number:8; diff --git a/ports/stm/common-hal/canio/CAN.h b/ports/stm/common-hal/canio/CAN.h index 94d7e99a8..3157d0a03 100644 --- a/ports/stm/common-hal/canio/CAN.h +++ b/ports/stm/common-hal/canio/CAN.h @@ -42,9 +42,6 @@ typedef struct canio_can_obj { mp_obj_base_t base; CAN_HandleTypeDef handle; CAN_TypeDef *filter_hw; - volatile uint32_t error_warning_state_count; - volatile uint32_t error_passive_state_count; - volatile uint32_t bus_off_state_count; int baudrate; const mcu_pin_obj_t *rx_pin; const mcu_pin_obj_t *tx_pin; -- cgit v1.2.3 From b7ed18d622fb6ca5b02034cbd2ac8d256374d77d Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 8 Oct 2020 00:52:00 +0700 Subject: change idf to espressif fix hal includes --- .gitmodules | 2 +- ports/esp32s2/common-hal/busio/I2C.h | 2 +- ports/esp32s2/common-hal/busio/SPI.h | 4 ++-- ports/esp32s2/common-hal/busio/UART.h | 2 +- ports/esp32s2/common-hal/digitalio/DigitalInOut.c | 2 +- ports/esp32s2/common-hal/microcontroller/Pin.c | 2 +- ports/esp32s2/esp-idf | 2 +- ports/esp32s2/peripherals/pins.h | 2 +- 8 files changed, 9 insertions(+), 9 deletions(-) (limited to 'ports') diff --git a/.gitmodules b/.gitmodules index b1ae2276c..f66ce8aaf 100644 --- a/.gitmodules +++ b/.gitmodules @@ -152,4 +152,4 @@ url = https://github.com/adafruit/Adafruit_CircuitPython_RFM69.git [submodule "ports/esp32s2/esp-idf"] path = ports/esp32s2/esp-idf - url = https://github.com/hierophect/esp-idf.git + url = https://github.com/espressif/esp-idf.git diff --git a/ports/esp32s2/common-hal/busio/I2C.h b/ports/esp32s2/common-hal/busio/I2C.h index 1a989e30a..c39d6d744 100644 --- a/ports/esp32s2/common-hal/busio/I2C.h +++ b/ports/esp32s2/common-hal/busio/I2C.h @@ -29,7 +29,7 @@ #include "common-hal/microcontroller/Pin.h" -#include "components/soc/include/hal/i2c_types.h" +#include "components/hal/include/hal/i2c_types.h" #include "FreeRTOS.h" #include "freertos/semphr.h" #include "py/obj.h" diff --git a/ports/esp32s2/common-hal/busio/SPI.h b/ports/esp32s2/common-hal/busio/SPI.h index d6203feae..f6c1c344a 100644 --- a/ports/esp32s2/common-hal/busio/SPI.h +++ b/ports/esp32s2/common-hal/busio/SPI.h @@ -30,8 +30,8 @@ #include "common-hal/microcontroller/Pin.h" #include "components/driver/include/driver/spi_common_internal.h" -#include "components/soc/include/hal/spi_hal.h" -#include "components/soc/include/hal/spi_types.h" +#include "components/hal/include/hal/spi_hal.h" +#include "components/hal/include/hal/spi_types.h" #include "py/obj.h" typedef struct { diff --git a/ports/esp32s2/common-hal/busio/UART.h b/ports/esp32s2/common-hal/busio/UART.h index 751fb2e00..1d7f13511 100644 --- a/ports/esp32s2/common-hal/busio/UART.h +++ b/ports/esp32s2/common-hal/busio/UART.h @@ -29,7 +29,7 @@ #include "common-hal/microcontroller/Pin.h" -#include "components/soc/include/hal/uart_types.h" +#include "components/hal/include/hal/uart_types.h" #include "py/obj.h" typedef struct { diff --git a/ports/esp32s2/common-hal/digitalio/DigitalInOut.c b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c index a2a0209f9..152db1e71 100644 --- a/ports/esp32s2/common-hal/digitalio/DigitalInOut.c +++ b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c @@ -30,7 +30,7 @@ #include "components/driver/include/driver/gpio.h" -#include "components/soc/include/hal/gpio_hal.h" +#include "components/hal/include/hal/gpio_hal.h" void common_hal_digitalio_digitalinout_never_reset( digitalio_digitalinout_obj_t *self) { diff --git a/ports/esp32s2/common-hal/microcontroller/Pin.c b/ports/esp32s2/common-hal/microcontroller/Pin.c index 0f4669fe0..3c2611efe 100644 --- a/ports/esp32s2/common-hal/microcontroller/Pin.c +++ b/ports/esp32s2/common-hal/microcontroller/Pin.c @@ -32,7 +32,7 @@ #include "py/mphal.h" #include "components/driver/include/driver/gpio.h" -#include "components/soc/include/hal/gpio_hal.h" +#include "components/hal/include/hal/gpio_hal.h" #ifdef MICROPY_HW_NEOPIXEL bool neopixel_in_use; diff --git a/ports/esp32s2/esp-idf b/ports/esp32s2/esp-idf index a7f777988..8bc19ba89 160000 --- a/ports/esp32s2/esp-idf +++ b/ports/esp32s2/esp-idf @@ -1 +1 @@ -Subproject commit a7f77798816661f7c4ae198f3878bc92a9274f82 +Subproject commit 8bc19ba893e5544d571a753d82b44a84799b94b1 diff --git a/ports/esp32s2/peripherals/pins.h b/ports/esp32s2/peripherals/pins.h index 0cf63a029..9776fbb78 100644 --- a/ports/esp32s2/peripherals/pins.h +++ b/ports/esp32s2/peripherals/pins.h @@ -34,7 +34,7 @@ #include "esp32s2_peripherals_config.h" #include "esp-idf/config/sdkconfig.h" -#include "components/soc/include/hal/gpio_types.h" +#include "components/hal/include/hal/gpio_types.h" typedef struct { PIN_PREFIX_FIELDS -- cgit v1.2.3 From 085d2a22746f4e16915d64a81ac6b62123d650ee Mon Sep 17 00:00:00 2001 From: gamblor21 Date: Wed, 7 Oct 2020 14:09:26 -0500 Subject: Update submodule to merge commit --- ports/atmel-samd/peripherals | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals index 2ff4ab051..a7e39c4d0 160000 --- a/ports/atmel-samd/peripherals +++ b/ports/atmel-samd/peripherals @@ -1 +1 @@ -Subproject commit 2ff4ab05101ce7d3e105009cc6612df6e992123f +Subproject commit a7e39c4d01aa5916015beecb021777617e77b0ad -- cgit v1.2.3 From 09bc4157516dd59754a3eb1a5dbbb72a758ebe93 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Mon, 28 Sep 2020 19:21:17 -0700 Subject: Unify iMX flash config and add Metro M7 1011 This unifies the flash config to the settings used by the Boot ROM. This makes the config unique per board which allows for changing quad enable and status bit differences per flash device. It also allows for timing differences due to the board layout. This change also tweaks linker layout to leave more ram space for the CircuitPython heap. --- .github/workflows/build.yml | 1 + extmod/vfs_fat_diskio.c | 37 ++-- ports/mimxrt10xx/Makefile | 2 +- ports/mimxrt10xx/boards/board.h | 8 + .../boards/feather_m7_1011/flash_config.c | 187 ++++++++++------- .../boards/feather_mimxrt1011/flash_config.c | 187 ++++++++++------- .../boards/feather_mimxrt1062/flash_config.c | 187 ++++++++++------- .../mimxrt10xx/boards/imxrt1010_evk/flash_config.c | 188 ++++++++++------- .../mimxrt10xx/boards/imxrt1020_evk/flash_config.c | 191 ++++++++++------- .../mimxrt10xx/boards/imxrt1060_evk/flash_config.c | 189 ++++++++++------- ports/mimxrt10xx/boards/metro_m7_1011/board.c | 52 +++++ .../mimxrt10xx/boards/metro_m7_1011/flash_config.c | 179 ++++++++++++++++ .../boards/metro_m7_1011/mpconfigboard.h | 20 ++ .../boards/metro_m7_1011/mpconfigboard.mk | 12 ++ ports/mimxrt10xx/boards/metro_m7_1011/pins.c | 59 ++++++ ports/mimxrt10xx/boards/teensy40/flash_config.c | 201 +++++++++++------- ports/mimxrt10xx/boards/teensy41/flash_config.c | 191 ++++++++++------- ports/mimxrt10xx/linking/common.ld | 3 - .../mimxrt10xx/supervisor/flexspi_nor_flash_ops.c | 228 ++------------------- ports/mimxrt10xx/supervisor/internal_flash.c | 121 +---------- ports/mimxrt10xx/supervisor/internal_flash.h | 17 +- ports/mimxrt10xx/supervisor/port.c | 22 +- ports/mimxrt10xx/supervisor/usb.c | 4 - supervisor/shared/background_callback.c | 3 +- supervisor/shared/filesystem.c | 17 +- supervisor/shared/flash.c | 49 +++-- 26 files changed, 1394 insertions(+), 961 deletions(-) create mode 100644 ports/mimxrt10xx/boards/metro_m7_1011/board.c create mode 100644 ports/mimxrt10xx/boards/metro_m7_1011/flash_config.c create mode 100644 ports/mimxrt10xx/boards/metro_m7_1011/mpconfigboard.h create mode 100644 ports/mimxrt10xx/boards/metro_m7_1011/mpconfigboard.mk create mode 100644 ports/mimxrt10xx/boards/metro_m7_1011/pins.c (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index dc3dc6835..cced2d702 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -243,6 +243,7 @@ jobs: - "metro_m0_express" - "metro_m4_airlift_lite" - "metro_m4_express" + - "metro_m7_1011" - "metro_nrf52840_express" - "mini_sam_m4" - "monster_m4sk" diff --git a/extmod/vfs_fat_diskio.c b/extmod/vfs_fat_diskio.c index ac8924394..432c03b7c 100644 --- a/extmod/vfs_fat_diskio.c +++ b/extmod/vfs_fat_diskio.c @@ -123,7 +123,7 @@ DRESULT disk_write ( DRESULT disk_ioctl ( bdev_t pdrv, /* Physical drive nmuber (0..) */ - BYTE cmd, /* Control code */ + BYTE cmd, /* Control code */ void *buff /* Buffer to send/receive control data */ ) { @@ -133,7 +133,7 @@ DRESULT disk_ioctl ( } // First part: call the relevant method of the underlying block device - mp_obj_t ret = mp_const_none; + mp_int_t out_value = 0; if (vfs->flags & FSUSER_HAVE_IOCTL) { // new protocol with ioctl static const uint8_t op_map[8] = { @@ -144,9 +144,19 @@ DRESULT disk_ioctl ( }; uint8_t bp_op = op_map[cmd & 7]; if (bp_op != 0) { - vfs->u.ioctl[2] = MP_OBJ_NEW_SMALL_INT(bp_op); - vfs->u.ioctl[3] = MP_OBJ_NEW_SMALL_INT(0); // unused - ret = mp_call_method_n_kw(2, 0, vfs->u.ioctl); + if (vfs->flags & FSUSER_NATIVE) { + bool (*f)(size_t, mp_int_t*) = (void*)(uintptr_t)vfs->u.ioctl[2]; + if (!f(bp_op, (mp_int_t*) &out_value)) { + return RES_ERROR; + } + } else { + vfs->u.ioctl[2] = MP_OBJ_NEW_SMALL_INT(bp_op); + vfs->u.ioctl[3] = MP_OBJ_NEW_SMALL_INT(0); // unused + mp_obj_t ret = mp_call_method_n_kw(2, 0, vfs->u.ioctl); + if (ret != mp_const_none) { + out_value = mp_obj_get_int(ret); + } + } } } else { // old protocol with sync and count @@ -157,10 +167,13 @@ DRESULT disk_ioctl ( } break; - case GET_SECTOR_COUNT: - ret = mp_call_method_n_kw(0, 0, vfs->u.old.count); + case GET_SECTOR_COUNT: { + mp_obj_t ret = mp_call_method_n_kw(0, 0, vfs->u.old.count); + if (ret != mp_const_none) { + out_value = mp_obj_get_int(ret); + } break; - + } case GET_SECTOR_SIZE: // old protocol has fixed sector size of 512 bytes break; @@ -177,16 +190,16 @@ DRESULT disk_ioctl ( return RES_OK; case GET_SECTOR_COUNT: { - *((DWORD*)buff) = mp_obj_get_int(ret); + *((DWORD*)buff) = out_value; return RES_OK; } case GET_SECTOR_SIZE: { - if (ret == mp_const_none) { + if (out_value == 0) { // Default sector size *((WORD*)buff) = 512; } else { - *((WORD*)buff) = mp_obj_get_int(ret); + *((WORD*)buff) = out_value; } #if _MAX_SS != _MIN_SS // need to store ssize because we use it in disk_read/disk_write @@ -202,7 +215,7 @@ DRESULT disk_ioctl ( case IOCTL_INIT: case IOCTL_STATUS: { DSTATUS stat; - if (ret != mp_const_none && MP_OBJ_SMALL_INT_VALUE(ret) != 0) { + if (out_value != 0) { // error initialising stat = STA_NOINIT; } else if (vfs->writeblocks[0] == MP_OBJ_NULL) { diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile index 248798f63..12c9bde4f 100644 --- a/ports/mimxrt10xx/Makefile +++ b/ports/mimxrt10xx/Makefile @@ -75,7 +75,7 @@ INC += \ # NDEBUG disables assert() statements. This reduces code size pretty dramatically, per tannewt. -CFLAGS += -Os -DNDEBUG +CFLAGS += -Os -DNDEBUG -ffreestanding # TinyUSB defines CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_MIMXRT10XX -DCFG_TUD_MIDI_RX_BUFSIZE=512 -DCFG_TUD_CDC_RX_BUFSIZE=512 -DCFG_TUD_MIDI_TX_BUFSIZE=512 -DCFG_TUD_CDC_TX_BUFSIZE=512 -DCFG_TUD_MSC_BUFSIZE=1024 diff --git a/ports/mimxrt10xx/boards/board.h b/ports/mimxrt10xx/boards/board.h index 92d02d900..678c223ae 100644 --- a/ports/mimxrt10xx/boards/board.h +++ b/ports/mimxrt10xx/boards/board.h @@ -33,6 +33,7 @@ #include "py/mpconfig.h" #include "fsl_common.h" +#include "fsl_flexspi_nor_config.h" // Initializes board related state once on start up. void board_init(void); @@ -45,4 +46,11 @@ bool board_requests_safe_mode(void); // Reset the state of off MCU components such as neopixels. void reset_board(void); +#define SEQUENCE(first, second, third, fourth) first, second, third, fourth +#define TWO_EMPTY_STEPS 0x00000000 +#define EMPTY_SEQUENCE SEQUENCE(TWO_EMPTY_STEPS, TWO_EMPTY_STEPS, TWO_EMPTY_STEPS, TWO_EMPTY_STEPS) + +// FlexSPI configuration that stores command info. +extern const flexspi_nor_config_t qspiflash_config; + #endif // MICROPY_INCLUDED_MIMXRT10XX_BOARDS_BOARD_H diff --git a/ports/mimxrt10xx/boards/feather_m7_1011/flash_config.c b/ports/mimxrt10xx/boards/feather_m7_1011/flash_config.c index b74c0b151..282464c75 100644 --- a/ports/mimxrt10xx/boards/feather_m7_1011/flash_config.c +++ b/ports/mimxrt10xx/boards/feather_m7_1011/flash_config.c @@ -6,7 +6,7 @@ */ #include "fsl_flexspi_nor_boot.h" -#include "fsl_flexspi_nor_config.h" +#include "boards/board.h" __attribute__((section(".boot_hdr.ivt"))) @@ -35,88 +35,135 @@ const BOOT_DATA_T boot_data = { 0xFFFFFFFF /* empty - extra data word */ }; +// Config for W25Q32JV with QSPI routed. __attribute__((section(".boot_hdr.conf"))) -// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 const flexspi_nor_config_t qspiflash_config = { + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, .memConfig = { .tag = FLEXSPI_CFG_BLK_TAG, .version = FLEXSPI_CFG_BLK_VERSION, .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, - .csHoldTime = 1u, - .csSetupTime = 2u, - // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .csHoldTime = 3u, + .csSetupTime = 3u, + + .busyOffset = 0u, // Status bit 0 indicates busy. + .busyBitPolarity = 0u, // Busy when the bit is 1. + + .deviceModeCfgEnable = 1u, + .deviceModeType = kDeviceConfigCmdType_QuadEnable, + .deviceModeSeq = { + .seqId = 4u, + .seqNum = 1u, + }, + .deviceModeArg = 0x02, // Bit pattern for setting Quad Enable. .deviceType = kFlexSpiDeviceType_SerialNOR, .sflashPadType = kSerialFlash_4Pads, - .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .serialClkFreq = kFlexSpiSerialClk_133MHz, .sflashA1Size = FLASH_SIZE, .lookupTable = { // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) - // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | - // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) - // Read LUTs - FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), - FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), - 0, - 0, - - 0x24040405, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000406, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x08180420, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x081804D8, - 0, - 0, - 0, - - 0x08180402, - 0x00002004, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000460, + // The high 16 bits is command 1 and the low are command 0. + // Within a command, the top 6 bits are the opcode, the next two are the number + // of pads and then last byte is the operand. The operand's meaning changes + // per opcode. + + // Indices with ROM should always have the same function because the ROM + // bootloader uses it. + + // 0: ROM: Read LUTs + // Quad version + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */, + RADDR_SDR, FLEXSPI_4PAD, 24 /* bits to transmit */), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */, + READ_SDR, FLEXSPI_4PAD, 0x04), + // Single fast read version, good for debugging. + // FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */, + // RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + // FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */, + // READ_SDR, FLEXSPI_1PAD, 0x04), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 1: ROM: Read status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */, + READ_SDR, FLEXSPI_1PAD, 0x02), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 2: Empty + EMPTY_SEQUENCE, + + // 3: ROM: Write Enable + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */, + STOP, FLEXSPI_1PAD, 0x00), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 4: Config: Write Status -2 + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x31 /* the command to send */, + WRITE_SDR, FLEXSPI_1PAD, 0x01 /* number of bytes to write */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 5: ROM: Erase Sector + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 6: Empty + EMPTY_SEQUENCE, + + // 7: Empty + EMPTY_SEQUENCE, + + // 8: Block Erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 9: ROM: Page program + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + + FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 10: Empty + EMPTY_SEQUENCE, + + // 11: ROM: Chip erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 12: Empty + EMPTY_SEQUENCE, + + // 13: ROM: Read SFDP + EMPTY_SEQUENCE, + + // 14: ROM: Restore no cmd + EMPTY_SEQUENCE, + + // 15: ROM: Dummy + EMPTY_SEQUENCE }, }, - .pageSize = 256u, - .sectorSize = 4u * 1024u, - .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, - .blockSize = 0x00010000, - .isUniformBlockSize = false, }; diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c b/ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c index b74c0b151..51cc0f164 100644 --- a/ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c +++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c @@ -6,7 +6,7 @@ */ #include "fsl_flexspi_nor_boot.h" -#include "fsl_flexspi_nor_config.h" +#include "boards/board.h" __attribute__((section(".boot_hdr.ivt"))) @@ -35,88 +35,135 @@ const BOOT_DATA_T boot_data = { 0xFFFFFFFF /* empty - extra data word */ }; +// Config for W25Q64JV with QSPI routed. __attribute__((section(".boot_hdr.conf"))) -// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 const flexspi_nor_config_t qspiflash_config = { + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, .memConfig = { .tag = FLEXSPI_CFG_BLK_TAG, .version = FLEXSPI_CFG_BLK_VERSION, .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, - .csHoldTime = 1u, - .csSetupTime = 2u, - // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .csHoldTime = 3u, + .csSetupTime = 3u, + + .busyOffset = 0u, // Status bit 0 indicates busy. + .busyBitPolarity = 0u, // Busy when the bit is 1. + + .deviceModeCfgEnable = 1u, + .deviceModeType = kDeviceConfigCmdType_QuadEnable, + .deviceModeSeq = { + .seqId = 4u, + .seqNum = 1u, + }, + .deviceModeArg = 0x02, .deviceType = kFlexSpiDeviceType_SerialNOR, .sflashPadType = kSerialFlash_4Pads, - .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .serialClkFreq = kFlexSpiSerialClk_133MHz, .sflashA1Size = FLASH_SIZE, .lookupTable = { // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) - // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | - // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) - // Read LUTs - FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), - FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), - 0, - 0, - - 0x24040405, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000406, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x08180420, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x081804D8, - 0, - 0, - 0, - - 0x08180402, - 0x00002004, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000460, + // The high 16 bits is command 1 and the low are command 0. + // Within a command, the top 6 bits are the opcode, the next two are the number + // of pads and then last byte is the operand. The operand's meaning changes + // per opcode. + + // Indices with ROM should always have the same function because the ROM + // bootloader uses it. + + // 0: ROM: Read LUTs + // Quad version + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */, + RADDR_SDR, FLEXSPI_4PAD, 24 /* bits to transmit */), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */, + READ_SDR, FLEXSPI_4PAD, 0x04), + // Single fast read version, good for debugging. + // FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */, + // RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + // FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */, + // READ_SDR, FLEXSPI_1PAD, 0x04), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 1: ROM: Read status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */, + READ_SDR, FLEXSPI_1PAD, 0x01), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 2: Empty + EMPTY_SEQUENCE, + + // 3: ROM: Write Enable + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */, + STOP, FLEXSPI_1PAD, 0x00), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 4: Config: Write Status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x31 /* the command to send */, + WRITE_SDR, FLEXSPI_1PAD, 0x01), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 5: ROM: Erase Sector + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 6: Empty + EMPTY_SEQUENCE, + + // 7: Empty + EMPTY_SEQUENCE, + + // 8: Block Erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 9: ROM: Page program + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + + FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 10: Empty + EMPTY_SEQUENCE, + + // 11: ROM: Chip erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 12: Empty + EMPTY_SEQUENCE, + + // 13: ROM: Read SFDP + EMPTY_SEQUENCE, + + // 14: ROM: Restore no cmd + EMPTY_SEQUENCE, + + // 15: ROM: Dummy + EMPTY_SEQUENCE }, }, - .pageSize = 256u, - .sectorSize = 4u * 1024u, - .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, - .blockSize = 0x00010000, - .isUniformBlockSize = false, }; diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c b/ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c index b74c0b151..51cc0f164 100644 --- a/ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c +++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c @@ -6,7 +6,7 @@ */ #include "fsl_flexspi_nor_boot.h" -#include "fsl_flexspi_nor_config.h" +#include "boards/board.h" __attribute__((section(".boot_hdr.ivt"))) @@ -35,88 +35,135 @@ const BOOT_DATA_T boot_data = { 0xFFFFFFFF /* empty - extra data word */ }; +// Config for W25Q64JV with QSPI routed. __attribute__((section(".boot_hdr.conf"))) -// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 const flexspi_nor_config_t qspiflash_config = { + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, .memConfig = { .tag = FLEXSPI_CFG_BLK_TAG, .version = FLEXSPI_CFG_BLK_VERSION, .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, - .csHoldTime = 1u, - .csSetupTime = 2u, - // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .csHoldTime = 3u, + .csSetupTime = 3u, + + .busyOffset = 0u, // Status bit 0 indicates busy. + .busyBitPolarity = 0u, // Busy when the bit is 1. + + .deviceModeCfgEnable = 1u, + .deviceModeType = kDeviceConfigCmdType_QuadEnable, + .deviceModeSeq = { + .seqId = 4u, + .seqNum = 1u, + }, + .deviceModeArg = 0x02, .deviceType = kFlexSpiDeviceType_SerialNOR, .sflashPadType = kSerialFlash_4Pads, - .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .serialClkFreq = kFlexSpiSerialClk_133MHz, .sflashA1Size = FLASH_SIZE, .lookupTable = { // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) - // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | - // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) - // Read LUTs - FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), - FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), - 0, - 0, - - 0x24040405, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000406, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x08180420, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x081804D8, - 0, - 0, - 0, - - 0x08180402, - 0x00002004, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000460, + // The high 16 bits is command 1 and the low are command 0. + // Within a command, the top 6 bits are the opcode, the next two are the number + // of pads and then last byte is the operand. The operand's meaning changes + // per opcode. + + // Indices with ROM should always have the same function because the ROM + // bootloader uses it. + + // 0: ROM: Read LUTs + // Quad version + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */, + RADDR_SDR, FLEXSPI_4PAD, 24 /* bits to transmit */), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */, + READ_SDR, FLEXSPI_4PAD, 0x04), + // Single fast read version, good for debugging. + // FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */, + // RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + // FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */, + // READ_SDR, FLEXSPI_1PAD, 0x04), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 1: ROM: Read status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */, + READ_SDR, FLEXSPI_1PAD, 0x01), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 2: Empty + EMPTY_SEQUENCE, + + // 3: ROM: Write Enable + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */, + STOP, FLEXSPI_1PAD, 0x00), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 4: Config: Write Status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x31 /* the command to send */, + WRITE_SDR, FLEXSPI_1PAD, 0x01), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 5: ROM: Erase Sector + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 6: Empty + EMPTY_SEQUENCE, + + // 7: Empty + EMPTY_SEQUENCE, + + // 8: Block Erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 9: ROM: Page program + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + + FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 10: Empty + EMPTY_SEQUENCE, + + // 11: ROM: Chip erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 12: Empty + EMPTY_SEQUENCE, + + // 13: ROM: Read SFDP + EMPTY_SEQUENCE, + + // 14: ROM: Restore no cmd + EMPTY_SEQUENCE, + + // 15: ROM: Dummy + EMPTY_SEQUENCE }, }, - .pageSize = 256u, - .sectorSize = 4u * 1024u, - .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, - .blockSize = 0x00010000, - .isUniformBlockSize = false, }; diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c index 7e8fb75b2..19573bd99 100644 --- a/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c +++ b/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c @@ -6,7 +6,8 @@ */ #include "fsl_flexspi_nor_boot.h" -#include "fsl_flexspi_nor_config.h" +#include "boards/board.h" + __attribute__((section(".boot_hdr.ivt"))) /************************************* @@ -34,88 +35,135 @@ const BOOT_DATA_T boot_data = { 0xFFFFFFFF /* empty - extra data word */ }; +// Config for AT25SF128A with QSPI routed. __attribute__((section(".boot_hdr.conf"))) -// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 const flexspi_nor_config_t qspiflash_config = { + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, .memConfig = { .tag = FLEXSPI_CFG_BLK_TAG, .version = FLEXSPI_CFG_BLK_VERSION, .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, - .csHoldTime = 1u, - .csSetupTime = 2u, - // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .csHoldTime = 3u, + .csSetupTime = 3u, + + .busyOffset = 0u, // Status bit 0 indicates busy. + .busyBitPolarity = 0u, // Busy when the bit is 1. + + .deviceModeCfgEnable = 1u, + .deviceModeType = kDeviceConfigCmdType_QuadEnable, + .deviceModeSeq = { + .seqId = 4u, + .seqNum = 1u, + }, + .deviceModeArg = 0x02, .deviceType = kFlexSpiDeviceType_SerialNOR, .sflashPadType = kSerialFlash_4Pads, - .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .serialClkFreq = kFlexSpiSerialClk_60MHz, .sflashA1Size = FLASH_SIZE, .lookupTable = { // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) - // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | - // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) - // Read LUTs - FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), - FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), - 0, - 0, - - 0x24040405, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000406, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x08180420, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x081804D8, - 0, - 0, - 0, - - 0x08180402, - 0x00002004, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000460, + // The high 16 bits is command 1 and the low are command 0. + // Within a command, the top 6 bits are the opcode, the next two are the number + // of pads and then last byte is the operand. The operand's meaning changes + // per opcode. + + // Indices with ROM should always have the same function because the ROM + // bootloader uses it. + + // 0: ROM: Read LUTs + // Quad version + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */, + RADDR_SDR, FLEXSPI_4PAD, 24 /* bits to transmit */), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */, + READ_SDR, FLEXSPI_4PAD, 0x04), + // Single fast read version, good for debugging. + // FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */, + // RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + // FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */, + // READ_SDR, FLEXSPI_1PAD, 0x04), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 1: ROM: Read status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */, + READ_SDR, FLEXSPI_1PAD, 0x02), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 2: Empty + EMPTY_SEQUENCE, + + // 3: ROM: Write Enable + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */, + STOP, FLEXSPI_1PAD, 0x00), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 4: Config: Write Status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x31 /* the command to send */, + WRITE_SDR, FLEXSPI_1PAD, 0x01), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 5: ROM: Erase Sector + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 6: Empty + EMPTY_SEQUENCE, + + // 7: Empty + EMPTY_SEQUENCE, + + // 8: Block Erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 9: ROM: Page program + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + + FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 10: Empty + EMPTY_SEQUENCE, + + // 11: ROM: Chip erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 12: Empty + EMPTY_SEQUENCE, + + // 13: ROM: Read SFDP + EMPTY_SEQUENCE, + + // 14: ROM: Restore no cmd + EMPTY_SEQUENCE, + + // 15: ROM: Dummy + EMPTY_SEQUENCE }, }, - .pageSize = 256u, - .sectorSize = 4u * 1024u, - .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, - .blockSize = 0x00010000, - .isUniformBlockSize = false, }; diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c index 43ffe0dd1..40b566618 100644 --- a/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c +++ b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c @@ -6,7 +6,7 @@ */ #include "fsl_flexspi_nor_boot.h" -#include "fsl_flexspi_nor_config.h" +#include "boards/board.h" __attribute__((section(".boot_hdr.ivt"))) @@ -35,92 +35,135 @@ const BOOT_DATA_T boot_data = { 0xFFFFFFFF /* empty - extra data word */ }; +// Config for IS25LP064A with QSPI routed. __attribute__((section(".boot_hdr.conf"))) -// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 const flexspi_nor_config_t qspiflash_config = { + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, .memConfig = { .tag = FLEXSPI_CFG_BLK_TAG, .version = FLEXSPI_CFG_BLK_VERSION, -#ifdef BOARD_USING_SECONDARY_QSPI_PINMUX - .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromInternally, -#else .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, -#endif - .csHoldTime = 1u, - .csSetupTime = 2u, - // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .csHoldTime = 3u, + .csSetupTime = 3u, + + .busyOffset = 0u, // Status bit 0 indicates busy. + .busyBitPolarity = 0u, // Busy when the bit is 1. + + .deviceModeCfgEnable = 1u, + .deviceModeType = kDeviceConfigCmdType_QuadEnable, + .deviceModeSeq = { + .seqId = 4u, + .seqNum = 1u, + }, + .deviceModeArg = 0x40, .deviceType = kFlexSpiDeviceType_SerialNOR, .sflashPadType = kSerialFlash_4Pads, - .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .serialClkFreq = kFlexSpiSerialClk_30MHz, .sflashA1Size = FLASH_SIZE, .lookupTable = { // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) - // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | - // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) - // Read LUTs - FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), - FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), - 0, - 0, - - 0x24040405, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000406, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x08180420, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x081804D8, - 0, - 0, - 0, - - 0x08180402, - 0x00002004, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000460, + // The high 16 bits is command 1 and the low are command 0. + // Within a command, the top 6 bits are the opcode, the next two are the number + // of pads and then last byte is the operand. The operand's meaning changes + // per opcode. + + // Indices with ROM should always have the same function because the ROM + // bootloader uses it. + + // 0: ROM: Read LUTs + // Quad version + // SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */, + // RADDR_SDR, FLEXSPI_4PAD, 24 bits to transmit ), + // FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */, + // READ_SDR, FLEXSPI_4PAD, 0x04), + // Single fast read version, good for debugging. + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */, + READ_SDR, FLEXSPI_1PAD, 0x04), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 1: ROM: Read status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */, + READ_SDR, FLEXSPI_1PAD, 0x01), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 2: Empty + EMPTY_SEQUENCE, + + // 3: ROM: Write Enable + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */, + STOP, FLEXSPI_1PAD, 0x00), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 4: Config: Write Status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01 /* the command to send */, + WRITE_SDR, FLEXSPI_1PAD, 0x01), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 5: ROM: Erase Sector + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 6: Empty + EMPTY_SEQUENCE, + + // 7: Empty + EMPTY_SEQUENCE, + + // 8: Block Erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 9: ROM: Page program + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + + FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 10: Empty + EMPTY_SEQUENCE, + + // 11: ROM: Chip erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 12: Empty + EMPTY_SEQUENCE, + + // 13: ROM: Read SFDP + EMPTY_SEQUENCE, + + // 14: ROM: Restore no cmd + EMPTY_SEQUENCE, + + // 15: ROM: Dummy + EMPTY_SEQUENCE }, }, - .pageSize = 256u, - .sectorSize = 4u * 1024u, - .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, - .blockSize = 0x00010000, - .isUniformBlockSize = false, }; diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c index 7e046d494..d79a8d0f9 100644 --- a/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c +++ b/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c @@ -6,10 +6,10 @@ */ #include "fsl_flexspi_nor_boot.h" -#include "fsl_flexspi_nor_config.h" +#include "boards/board.h" -__attribute__((section(".boot_hdr.ivt"))) +__attribute__((section(".boot_hdr.ivt"))) /************************************* * IVT Data *************************************/ @@ -35,88 +35,135 @@ const BOOT_DATA_T boot_data = { 0xFFFFFFFF /* empty - extra data word */ }; +// Config for IS25WP064A with QSPI routed. __attribute__((section(".boot_hdr.conf"))) -// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 const flexspi_nor_config_t qspiflash_config = { + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, .memConfig = { .tag = FLEXSPI_CFG_BLK_TAG, .version = FLEXSPI_CFG_BLK_VERSION, .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, - .csHoldTime = 1u, - .csSetupTime = 2u, - // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .csHoldTime = 3u, + .csSetupTime = 3u, + + .busyOffset = 0u, // Status bit 0 indicates busy. + .busyBitPolarity = 0u, // Busy when the bit is 1. + + .deviceModeCfgEnable = 1u, + .deviceModeType = kDeviceConfigCmdType_QuadEnable, + .deviceModeSeq = { + .seqId = 4u, + .seqNum = 1u, + }, + .deviceModeArg = 0x40, .deviceType = kFlexSpiDeviceType_SerialNOR, .sflashPadType = kSerialFlash_4Pads, - .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .serialClkFreq = kFlexSpiSerialClk_60MHz, .sflashA1Size = FLASH_SIZE, .lookupTable = { // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) - // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | - // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) - // Read LUTs - FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), - FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), - 0, - 0, - - 0x24040405, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000406, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x08180420, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x081804D8, - 0, - 0, - 0, - - 0x08180402, - 0x00002004, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000460, + // The high 16 bits is command 1 and the low are command 0. + // Within a command, the top 6 bits are the opcode, the next two are the number + // of pads and then last byte is the operand. The operand's meaning changes + // per opcode. + + // Indices with ROM should always have the same function because the ROM + // bootloader uses it. + + // 0: ROM: Read LUTs + // Quad version + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */, + RADDR_SDR, FLEXSPI_4PAD, 24 /* bits to transmit */), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */, + READ_SDR, FLEXSPI_4PAD, 0x04), + // Single fast read version, good for debugging. + // FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */, + // RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + // FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */, + // READ_SDR, FLEXSPI_1PAD, 0x04), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 1: ROM: Read status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */, + READ_SDR, FLEXSPI_1PAD, 0x02), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 2: Empty + EMPTY_SEQUENCE, + + // 3: ROM: Write Enable + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */, + STOP, FLEXSPI_1PAD, 0x00), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 4: Config: Write Status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01 /* the command to send */, + WRITE_SDR, FLEXSPI_1PAD, 0x01), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 5: ROM: Erase Sector + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 6: Empty + EMPTY_SEQUENCE, + + // 7: Empty + EMPTY_SEQUENCE, + + // 8: Block Erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 9: ROM: Page program + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + + FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 10: Empty + EMPTY_SEQUENCE, + + // 11: ROM: Chip erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 12: Empty + EMPTY_SEQUENCE, + + // 13: ROM: Read SFDP + EMPTY_SEQUENCE, + + // 14: ROM: Restore no cmd + EMPTY_SEQUENCE, + + // 15: ROM: Dummy + EMPTY_SEQUENCE }, }, - .pageSize = 256u, - .sectorSize = 4u * 1024u, - .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, - .blockSize = 0x00010000, - .isUniformBlockSize = false, }; diff --git a/ports/mimxrt10xx/boards/metro_m7_1011/board.c b/ports/mimxrt10xx/boards/metro_m7_1011/board.c new file mode 100644 index 000000000..ed543e1b0 --- /dev/null +++ b/ports/mimxrt10xx/boards/metro_m7_1011/board.c @@ -0,0 +1,52 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2019 Artur Pacholec + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "shared-bindings/microcontroller/Pin.h" + +void board_init(void) { + // SWD Pins + common_hal_never_reset_pin(&pin_GPIO_AD_13);//SWDIO + common_hal_never_reset_pin(&pin_GPIO_AD_12);//SWCLK + + // FLEX flash + common_hal_never_reset_pin(&pin_GPIO_SD_12); + common_hal_never_reset_pin(&pin_GPIO_SD_11); + common_hal_never_reset_pin(&pin_GPIO_SD_10); + common_hal_never_reset_pin(&pin_GPIO_SD_09); + common_hal_never_reset_pin(&pin_GPIO_SD_08); + common_hal_never_reset_pin(&pin_GPIO_SD_07); + common_hal_never_reset_pin(&pin_GPIO_SD_06); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/mimxrt10xx/boards/metro_m7_1011/flash_config.c b/ports/mimxrt10xx/boards/metro_m7_1011/flash_config.c new file mode 100644 index 000000000..30ce67523 --- /dev/null +++ b/ports/mimxrt10xx/boards/metro_m7_1011/flash_config.c @@ -0,0 +1,179 @@ +/* + * Copyright 2017 NXP + * All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include "fsl_flexspi_nor_boot.h" +#include "boards/board.h" + + +__attribute__((section(".boot_hdr.ivt"))) +/************************************* + * IVT Data + *************************************/ +const ivt image_vector_table = { + IVT_HEADER, /* IVT Header */ + IMAGE_ENTRY_ADDRESS, /* Image Entry Function */ + IVT_RSVD, /* Reserved = 0 */ + (uint32_t)DCD_ADDRESS, /* Address where DCD information is stored */ + (uint32_t)BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure is stored */ + (uint32_t)&image_vector_table, /* Pointer to IVT Self (absolute address */ + (uint32_t)CSF_ADDRESS, /* Address where CSF file is stored */ + IVT_RSVD /* Reserved = 0 */ +}; + +__attribute__((section(".boot_hdr.boot_data"))) +/************************************* + * Boot Data + *************************************/ +const BOOT_DATA_T boot_data = { + FLASH_BASE, /* boot start location */ + FLASH_SIZE, /* size */ + PLUGIN_FLAG, /* Plugin flag*/ + 0xFFFFFFFF /* empty - extra data word */ +}; + +// Config for W25Q16JV with QSPI routed. +__attribute__((section(".boot_hdr.conf"))) +const flexspi_nor_config_t qspiflash_config = { + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, + .memConfig = + { + .tag = FLEXSPI_CFG_BLK_TAG, + .version = FLEXSPI_CFG_BLK_VERSION, + .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, + .csHoldTime = 3u, + .csSetupTime = 3u, + + .busyOffset = 0u, // Status bit 0 indicates busy. + .busyBitPolarity = 0u, // Busy when the bit is 1. + + .deviceModeCfgEnable = 1u, + .deviceModeType = kDeviceConfigCmdType_QuadEnable, + .deviceModeSeq = { + .seqId = 4u, + .seqNum = 1u, + }, + .deviceModeArg = 0x0200, + .configCmdEnable = 1u, + .configModeType[0] = kDeviceConfigCmdType_Generic, + .configCmdSeqs[0] = { + .seqId = 2u, + .seqNum = 1u, + }, + .deviceType = kFlexSpiDeviceType_SerialNOR, + .sflashPadType = kSerialFlash_4Pads, + .serialClkFreq = kFlexSpiSerialClk_60MHz, + .sflashA1Size = FLASH_SIZE, + .lookupTable = + { + // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) + // The high 16 bits is command 1 and the low are command 0. + // Within a command, the top 6 bits are the opcode, the next two are the number + // of pads and then last byte is the operand. The operand's meaning changes + // per opcode. + + // Indices with ROM should always have the same function because the ROM + // bootloader uses it. + + // 0: ROM: Read LUTs + // Quad version + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */, + RADDR_SDR, FLEXSPI_4PAD, 24 /* bits to transmit */), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */, + READ_SDR, FLEXSPI_4PAD, 0x04), + // Single fast read version, good for debugging. + // FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */, + // RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + // FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */, + // READ_SDR, FLEXSPI_1PAD, 0x04), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 1: ROM: Read status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */, + READ_SDR, FLEXSPI_1PAD, 0x02), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 2: Empty + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x35 /* the command to send */, + DUMMY_SDR, FLEXSPI_1PAD, 8), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 3: ROM: Write Enable + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */, + STOP, FLEXSPI_1PAD, 0x00), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 4: Config: Write Status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01 /* the command to send */, + WRITE_SDR, FLEXSPI_1PAD, 0x02), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 5: ROM: Erase Sector + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 6: Empty + EMPTY_SEQUENCE, + + // 7: Empty + EMPTY_SEQUENCE, + + // 8: Block Erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 9: ROM: Page program + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + + FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 10: Empty + EMPTY_SEQUENCE, + + // 11: ROM: Chip erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 12: Empty + EMPTY_SEQUENCE, + + // 13: ROM: Read SFDP + EMPTY_SEQUENCE, + + // 14: ROM: Restore no cmd + EMPTY_SEQUENCE, + + // 15: ROM: Dummy + EMPTY_SEQUENCE + }, + }, +}; diff --git a/ports/mimxrt10xx/boards/metro_m7_1011/mpconfigboard.h b/ports/mimxrt10xx/boards/metro_m7_1011/mpconfigboard.h new file mode 100644 index 000000000..b11edb18b --- /dev/null +++ b/ports/mimxrt10xx/boards/metro_m7_1011/mpconfigboard.h @@ -0,0 +1,20 @@ +#define MICROPY_HW_BOARD_NAME "Metro MIMXRT1011" +#define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A" + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO_00) + +// If you change this, then make sure to update the linker scripts as well to +// make sure you don't overwrite code +#define CIRCUITPY_INTERNAL_NVM_SIZE 0 + +#define BOARD_FLASH_SIZE (2 * 1024 * 1024) + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_02) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_01) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_AD_06) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_04) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_03) + +#define DEFAULT_UART_BUS_RX (&pin_GPIO_09) +#define DEFAULT_UART_BUS_TX (&pin_GPIO_10) diff --git a/ports/mimxrt10xx/boards/metro_m7_1011/mpconfigboard.mk b/ports/mimxrt10xx/boards/metro_m7_1011/mpconfigboard.mk new file mode 100644 index 000000000..8cb150bb4 --- /dev/null +++ b/ports/mimxrt10xx/boards/metro_m7_1011/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x239A +USB_PID = 0x8092 +USB_PRODUCT = "Metro M7 1011" +USB_MANUFACTURER = "Adafruit" + +CHIP_VARIANT = MIMXRT1011DAE5A +CHIP_FAMILY = MIMXRT1011 +FLASH = W25Q16JV + +# Include these Python libraries in the firmware +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_ESP32SPI +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Requests diff --git a/ports/mimxrt10xx/boards/metro_m7_1011/pins.c b/ports/mimxrt10xx/boards/metro_m7_1011/pins.c new file mode 100644 index 000000000..e88493413 --- /dev/null +++ b/ports/mimxrt10xx/boards/metro_m7_1011/pins.c @@ -0,0 +1,59 @@ +#include "shared-bindings/board/__init__.h" + +#include "boards/board.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + // Analog + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_08) }, + + // Digital + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_SD_00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_SD_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_SD_02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13),MP_ROM_PTR(&pin_GPIO_03) }, + + // ESP control + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_CS), MP_ROM_PTR(&pin_GPIO_AD_14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_GPIO0), MP_ROM_PTR(&pin_GPIO_SD_05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_BUSY), MP_ROM_PTR(&pin_GPIO_AD_11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RESET), MP_ROM_PTR(&pin_GPIO_AD_07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_TX), MP_ROM_PTR(&pin_GPIO_09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RX), MP_ROM_PTR(&pin_GPIO_10) }, + + // SPI + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_AD_06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_AD_03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_AD_04) }, + + // UART + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_09) }, + + // I2C + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_02) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO_00) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/mimxrt10xx/boards/teensy40/flash_config.c b/ports/mimxrt10xx/boards/teensy40/flash_config.c index 426deb884..30ce67523 100644 --- a/ports/mimxrt10xx/boards/teensy40/flash_config.c +++ b/ports/mimxrt10xx/boards/teensy40/flash_config.c @@ -6,12 +6,8 @@ */ #include "fsl_flexspi_nor_boot.h" -#include "fsl_flexspi_nor_config.h" +#include "boards/board.h" -/* Component ID definition, used by tools. */ -#ifndef FSL_COMPONENT_ID -#define FSL_COMPONENT_ID "platform.drivers.xip_device" -#endif __attribute__((section(".boot_hdr.ivt"))) /************************************* @@ -39,88 +35,145 @@ const BOOT_DATA_T boot_data = { 0xFFFFFFFF /* empty - extra data word */ }; +// Config for W25Q16JV with QSPI routed. __attribute__((section(".boot_hdr.conf"))) -// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 const flexspi_nor_config_t qspiflash_config = { + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, .memConfig = { .tag = FLEXSPI_CFG_BLK_TAG, .version = FLEXSPI_CFG_BLK_VERSION, .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, - .csHoldTime = 1u, - .csSetupTime = 2u, - // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .csHoldTime = 3u, + .csSetupTime = 3u, + + .busyOffset = 0u, // Status bit 0 indicates busy. + .busyBitPolarity = 0u, // Busy when the bit is 1. + + .deviceModeCfgEnable = 1u, + .deviceModeType = kDeviceConfigCmdType_QuadEnable, + .deviceModeSeq = { + .seqId = 4u, + .seqNum = 1u, + }, + .deviceModeArg = 0x0200, + .configCmdEnable = 1u, + .configModeType[0] = kDeviceConfigCmdType_Generic, + .configCmdSeqs[0] = { + .seqId = 2u, + .seqNum = 1u, + }, .deviceType = kFlexSpiDeviceType_SerialNOR, .sflashPadType = kSerialFlash_4Pads, - .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .serialClkFreq = kFlexSpiSerialClk_60MHz, .sflashA1Size = FLASH_SIZE, .lookupTable = { // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) - // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | - // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) - // Read LUTs - FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), - FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), - 0, - 0, - - 0x24040405, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000406, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x08180420, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x081804D8, - 0, - 0, - 0, - - 0x08180402, - 0x00002004, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000460, + // The high 16 bits is command 1 and the low are command 0. + // Within a command, the top 6 bits are the opcode, the next two are the number + // of pads and then last byte is the operand. The operand's meaning changes + // per opcode. + + // Indices with ROM should always have the same function because the ROM + // bootloader uses it. + + // 0: ROM: Read LUTs + // Quad version + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */, + RADDR_SDR, FLEXSPI_4PAD, 24 /* bits to transmit */), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */, + READ_SDR, FLEXSPI_4PAD, 0x04), + // Single fast read version, good for debugging. + // FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */, + // RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + // FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */, + // READ_SDR, FLEXSPI_1PAD, 0x04), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 1: ROM: Read status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */, + READ_SDR, FLEXSPI_1PAD, 0x02), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 2: Empty + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x35 /* the command to send */, + DUMMY_SDR, FLEXSPI_1PAD, 8), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 3: ROM: Write Enable + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */, + STOP, FLEXSPI_1PAD, 0x00), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 4: Config: Write Status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x01 /* the command to send */, + WRITE_SDR, FLEXSPI_1PAD, 0x02), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 5: ROM: Erase Sector + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 6: Empty + EMPTY_SEQUENCE, + + // 7: Empty + EMPTY_SEQUENCE, + + // 8: Block Erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 9: ROM: Page program + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + + FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 10: Empty + EMPTY_SEQUENCE, + + // 11: ROM: Chip erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 12: Empty + EMPTY_SEQUENCE, + + // 13: ROM: Read SFDP + EMPTY_SEQUENCE, + + // 14: ROM: Restore no cmd + EMPTY_SEQUENCE, + + // 15: ROM: Dummy + EMPTY_SEQUENCE }, }, - .pageSize = 256u, - .sectorSize = 4u * 1024u, - .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, - .blockSize = 0x00010000, - .isUniformBlockSize = false, }; diff --git a/ports/mimxrt10xx/boards/teensy41/flash_config.c b/ports/mimxrt10xx/boards/teensy41/flash_config.c index 426deb884..7b2bfb768 100644 --- a/ports/mimxrt10xx/boards/teensy41/flash_config.c +++ b/ports/mimxrt10xx/boards/teensy41/flash_config.c @@ -6,12 +6,8 @@ */ #include "fsl_flexspi_nor_boot.h" -#include "fsl_flexspi_nor_config.h" +#include "boards/board.h" -/* Component ID definition, used by tools. */ -#ifndef FSL_COMPONENT_ID -#define FSL_COMPONENT_ID "platform.drivers.xip_device" -#endif __attribute__((section(".boot_hdr.ivt"))) /************************************* @@ -39,88 +35,135 @@ const BOOT_DATA_T boot_data = { 0xFFFFFFFF /* empty - extra data word */ }; +// Config for W25Q64JV with QSPI routed. __attribute__((section(".boot_hdr.conf"))) -// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39 const flexspi_nor_config_t qspiflash_config = { + .pageSize = 256u, + .sectorSize = 4u * 1024u, + .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, + .blockSize = 0x00010000, + .isUniformBlockSize = false, .memConfig = { .tag = FLEXSPI_CFG_BLK_TAG, .version = FLEXSPI_CFG_BLK_VERSION, .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad, - .csHoldTime = 1u, - .csSetupTime = 2u, - // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock + .csHoldTime = 3u, + .csSetupTime = 3u, + + .busyOffset = 0u, // Status bit 0 indicates busy. + .busyBitPolarity = 0u, // Busy when the bit is 1. + + .deviceModeCfgEnable = 1u, + .deviceModeType = kDeviceConfigCmdType_QuadEnable, + .deviceModeSeq = { + .seqId = 4u, + .seqNum = 1u, + }, + .deviceModeArg = 0x02, .deviceType = kFlexSpiDeviceType_SerialNOR, .sflashPadType = kSerialFlash_4Pads, - .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03 + .serialClkFreq = kFlexSpiSerialClk_60MHz, .sflashA1Size = FLASH_SIZE, .lookupTable = { // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1) - // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | - // FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1)) - // Read LUTs - FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18), - FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04), - 0, - 0, - - 0x24040405, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000406, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x08180420, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x081804D8, - 0, - 0, - 0, - - 0x08180402, - 0x00002004, - 0, - 0, - - 0, - 0, - 0, - 0, - - 0x00000460, + // The high 16 bits is command 1 and the low are command 0. + // Within a command, the top 6 bits are the opcode, the next two are the number + // of pads and then last byte is the operand. The operand's meaning changes + // per opcode. + + // Indices with ROM should always have the same function because the ROM + // bootloader uses it. + + // 0: ROM: Read LUTs + // Quad version + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB /* the command to send */, + RADDR_SDR, FLEXSPI_4PAD, 24 /* bits to transmit */), + FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 6 /* 6 dummy cycles, 2 for M7-0 and 4 dummy */, + READ_SDR, FLEXSPI_4PAD, 0x04), + // Single fast read version, good for debugging. + // FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x0B /* the command to send */, + // RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + // FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_1PAD, 8 /* 8 dummy clocks */, + // READ_SDR, FLEXSPI_1PAD, 0x04), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 1: ROM: Read status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05 /* the command to send */, + READ_SDR, FLEXSPI_1PAD, 0x01), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 2: Empty + EMPTY_SEQUENCE, + + // 3: ROM: Write Enable + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06 /* the command to send */, + STOP, FLEXSPI_1PAD, 0x00), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 4: Config: Write Status + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x31 /* the command to send */, + WRITE_SDR, FLEXSPI_1PAD, 0x01), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 5: ROM: Erase Sector + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 6: Empty + EMPTY_SEQUENCE, + + // 7: Empty + EMPTY_SEQUENCE, + + // 8: Block Erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 9: ROM: Page program + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02 /* the command to send */, + RADDR_SDR, FLEXSPI_1PAD, 24 /* bits to transmit */), + + FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04 /* data out */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 10: Empty + EMPTY_SEQUENCE, + + // 11: ROM: Chip erase + SEQUENCE(FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60 /* the command to send */, + STOP, FLEXSPI_1PAD, 0), + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS, + TWO_EMPTY_STEPS), + + // 12: Empty + EMPTY_SEQUENCE, + + // 13: ROM: Read SFDP + EMPTY_SEQUENCE, + + // 14: ROM: Restore no cmd + EMPTY_SEQUENCE, + + // 15: ROM: Dummy + EMPTY_SEQUENCE }, }, - .pageSize = 256u, - .sectorSize = 4u * 1024u, - .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz, - .blockSize = 0x00010000, - .isUniformBlockSize = false, }; diff --git a/ports/mimxrt10xx/linking/common.ld b/ports/mimxrt10xx/linking/common.ld index 90fc78093..720361aa0 100644 --- a/ports/mimxrt10xx/linking/common.ld +++ b/ports/mimxrt10xx/linking/common.ld @@ -62,7 +62,6 @@ SECTIONS KEEP(*(.isr_vector)) /* Startup code */ *(EXCLUDE_FILE( - *flexspi_nor_flash_ops.o *fsl_flexspi.o ) .text*) /* .text* sections (code) */ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ @@ -84,7 +83,6 @@ SECTIONS { . = ALIGN(4); *(.data*) /* .data* sections */ - *flexspi_nor_flash_ops.o(.text*) *fsl_flexspi.o(.text*) . = ALIGN(4); } > OCRAM AT> FLASH_FIRMWARE @@ -110,7 +108,6 @@ SECTIONS .itcm : { . = ALIGN(4); - *(.itcm.*) . = ALIGN(4); diff --git a/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c index 28d5115ac..353ba3176 100644 --- a/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c +++ b/ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c @@ -9,23 +9,10 @@ #include "fsl_flexspi.h" #include "internal_flash.h" +#include "boards/board.h" +#include "supervisor/linker.h" -#define FLASH_QUAD_ENABLE 0x02 -#define FLASH_BUSY_STATUS_POL 1 -#define FLASH_BUSY_STATUS_OFFSET 0 - -static inline void flexspi_clock_init(void) -{ - /* Switch to PLL2 for XIP to avoid hardfault during re-initialize clock. */ - CLOCK_InitSysPfd(kCLOCK_Pfd2, 24); /* Set PLL2 PFD2 clock 396MHZ. */ - CLOCK_SetMux(kCLOCK_FlexspiMux, 0x2); /* Choose PLL2 PFD2 clock as flexspi source clock. */ - CLOCK_SetDiv(kCLOCK_FlexspiDiv, 2); /* flexspi clock 133M. */ -} - -extern flexspi_device_config_t deviceconfig; -extern const uint32_t customLUT[CUSTOM_LUT_LENGTH]; - -status_t flexspi_nor_write_enable(FLEXSPI_Type *base, uint32_t baseAddr) +status_t PLACE_IN_ITCM(flexspi_nor_write_enable)(FLEXSPI_Type *base, uint32_t baseAddr) { flexspi_transfer_t flashXfer; status_t status; @@ -35,14 +22,14 @@ status_t flexspi_nor_write_enable(FLEXSPI_Type *base, uint32_t baseAddr) flashXfer.port = kFLEXSPI_PortA1; flashXfer.cmdType = kFLEXSPI_Command; flashXfer.SeqNumber = 1; - flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; + flashXfer.seqIndex = ROM_INDEX_WRITEENABLE; status = FLEXSPI_TransferBlocking(base, &flashXfer); return status; } -status_t flexspi_nor_wait_bus_busy(FLEXSPI_Type *base) +status_t PLACE_IN_ITCM(flexspi_nor_wait_bus_busy)(FLEXSPI_Type *base) { /* Wait status ready. */ bool isBusy; @@ -54,7 +41,7 @@ status_t flexspi_nor_wait_bus_busy(FLEXSPI_Type *base) flashXfer.port = kFLEXSPI_PortA1; flashXfer.cmdType = kFLEXSPI_Read; flashXfer.SeqNumber = 1; - flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_READSTATUSREG; + flashXfer.seqIndex = ROM_INDEX_READSTATUSREG; flashXfer.data = &readValue; flashXfer.dataSize = 1; @@ -66,72 +53,15 @@ status_t flexspi_nor_wait_bus_busy(FLEXSPI_Type *base) { return status; } - if (FLASH_BUSY_STATUS_POL) - { - if (readValue & (1U << FLASH_BUSY_STATUS_OFFSET)) - { - isBusy = true; - } - else - { - isBusy = false; - } - } - else - { - if (readValue & (1U << FLASH_BUSY_STATUS_OFFSET)) - { - isBusy = false; - } - else - { - isBusy = true; - } - } - + size_t busyBit = readValue & (1U << qspiflash_config.memConfig.busyOffset); + isBusy = (qspiflash_config.memConfig.busyBitPolarity == 0 && busyBit != 0) || + (qspiflash_config.memConfig.busyBitPolarity == 1 && busyBit == 0); } while (isBusy); return status; } -status_t flexspi_nor_enable_quad_mode(FLEXSPI_Type *base) -{ - flexspi_transfer_t flashXfer; - status_t status; - uint32_t writeValue = FLASH_QUAD_ENABLE; - - /* Write enable */ - status = flexspi_nor_write_enable(base, 0); - - if (status != kStatus_Success) - { - return status; - } - - /* Enable quad mode. */ - flashXfer.deviceAddress = 0; - flashXfer.port = kFLEXSPI_PortA1; - flashXfer.cmdType = kFLEXSPI_Write; - flashXfer.SeqNumber = 1; - flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG; - flashXfer.data = &writeValue; - flashXfer.dataSize = 1; - - status = FLEXSPI_TransferBlocking(base, &flashXfer); - if (status != kStatus_Success) - { - return status; - } - - status = flexspi_nor_wait_bus_busy(base); - - /* Do software reset. */ - FLEXSPI_SoftwareReset(base); - - return status; -} - -status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address) +status_t PLACE_IN_ITCM(flexspi_nor_flash_erase_sector)(FLEXSPI_Type *base, uint32_t address) { status_t status; flexspi_transfer_t flashXfer; @@ -141,7 +71,7 @@ status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address) flashXfer.port = kFLEXSPI_PortA1; flashXfer.cmdType = kFLEXSPI_Command; flashXfer.SeqNumber = 1; - flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; + flashXfer.seqIndex = ROM_INDEX_WRITEENABLE; status = FLEXSPI_TransferBlocking(base, &flashXfer); @@ -154,7 +84,7 @@ status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address) flashXfer.port = kFLEXSPI_PortA1; flashXfer.cmdType = kFLEXSPI_Command; flashXfer.SeqNumber = 1; - flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_ERASESECTOR; + flashXfer.seqIndex = ROM_INDEX_ERASESECTOR; status = FLEXSPI_TransferBlocking(base, &flashXfer); if (status != kStatus_Success) @@ -170,7 +100,7 @@ status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address) return status; } -status_t flexspi_nor_flash_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src, uint32_t length) +status_t PLACE_IN_ITCM(flexspi_nor_flash_page_program)(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src) { status_t status; flexspi_transfer_t flashXfer; @@ -188,48 +118,7 @@ status_t flexspi_nor_flash_program(FLEXSPI_Type *base, uint32_t dstAddr, const u flashXfer.port = kFLEXSPI_PortA1; flashXfer.cmdType = kFLEXSPI_Write; flashXfer.SeqNumber = 1; - flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD; - flashXfer.data = (uint32_t *)src; - flashXfer.dataSize = length; - status = FLEXSPI_TransferBlocking(base, &flashXfer); - - if (status != kStatus_Success) - { - return status; - } - - status = flexspi_nor_wait_bus_busy(base); - - /* Do software reset. */ -#if defined(FSL_FEATURE_SOC_OTFAD_COUNT) - base->AHBCR |= FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK; - base->AHBCR &= ~(FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK); -#else - FLEXSPI_SoftwareReset(base); -#endif - - return status; -} - -status_t flexspi_nor_flash_page_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src) -{ - status_t status; - flexspi_transfer_t flashXfer; - - /* Write enable */ - status = flexspi_nor_write_enable(base, dstAddr); - - if (status != kStatus_Success) - { - return status; - } - - /* Prepare page program command */ - flashXfer.deviceAddress = dstAddr; - flashXfer.port = kFLEXSPI_PortA1; - flashXfer.cmdType = kFLEXSPI_Write; - flashXfer.SeqNumber = 1; - flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD; + flashXfer.seqIndex = ROM_INDEX_PAGEPROGRAM; flashXfer.data = (uint32_t *)src; flashXfer.dataSize = FLASH_PAGE_SIZE; status = FLEXSPI_TransferBlocking(base, &flashXfer); @@ -251,92 +140,3 @@ status_t flexspi_nor_flash_page_program(FLEXSPI_Type *base, uint32_t dstAddr, co return status; } - -status_t flexspi_nor_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId) -{ - uint32_t temp; - flexspi_transfer_t flashXfer; - flashXfer.deviceAddress = 0; - flashXfer.port = kFLEXSPI_PortA1; - flashXfer.cmdType = kFLEXSPI_Read; - flashXfer.SeqNumber = 1; - flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_READID; - flashXfer.data = &temp; - flashXfer.dataSize = 1; - - status_t status = FLEXSPI_TransferBlocking(base, &flashXfer); - - *vendorId = temp; - - /* Do software reset. */ -#if defined(FSL_FEATURE_SOC_OTFAD_COUNT) - base->AHBCR |= FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK; - base->AHBCR &= ~(FLEXSPI_AHBCR_CLRAHBRXBUF_MASK | FLEXSPI_AHBCR_CLRAHBTXBUF_MASK); -#else - FLEXSPI_SoftwareReset(base); -#endif - - return status; -} - -status_t flexspi_nor_erase_chip(FLEXSPI_Type *base) -{ - status_t status; - flexspi_transfer_t flashXfer; - - /* Write enable */ - status = flexspi_nor_write_enable(base, 0); - - if (status != kStatus_Success) - { - return status; - } - - flashXfer.deviceAddress = 0; - flashXfer.port = kFLEXSPI_PortA1; - flashXfer.cmdType = kFLEXSPI_Command; - flashXfer.SeqNumber = 1; - flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_ERASECHIP; - - status = FLEXSPI_TransferBlocking(base, &flashXfer); - - if (status != kStatus_Success) - { - return status; - } - - status = flexspi_nor_wait_bus_busy(base); - - return status; -} - -void flexspi_nor_flash_init(FLEXSPI_Type *base) -{ - flexspi_config_t config; - - flexspi_clock_init(); - - /*Get FLEXSPI default settings and configure the flexspi. */ - FLEXSPI_GetDefaultConfig(&config); - - /*Set AHB buffer size for reading data through AHB bus. */ - config.ahbConfig.enableAHBPrefetch = true; - config.ahbConfig.enableAHBBufferable = true; - config.ahbConfig.enableReadAddressOpt = true; - config.ahbConfig.enableAHBCachable = true; -#ifdef BOARD_USING_SECONDARY_QSPI_PINMUX - config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackInternally; -#else - config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackFromDqsPad; -#endif - FLEXSPI_Init(base, &config); - - /* Configure flash settings according to serial flash feature. */ - FLEXSPI_SetFlashConfig(base, &deviceconfig, kFLEXSPI_PortA1); - - /* Update LUT table. */ - FLEXSPI_UpdateLUT(base, 0, customLUT, CUSTOM_LUT_LENGTH); - - /* Do software reset. */ - FLEXSPI_SoftwareReset(base); -} diff --git a/ports/mimxrt10xx/supervisor/internal_flash.c b/ports/mimxrt10xx/supervisor/internal_flash.c index 09f44cced..e194cbed9 100644 --- a/ports/mimxrt10xx/supervisor/internal_flash.c +++ b/ports/mimxrt10xx/supervisor/internal_flash.c @@ -30,6 +30,7 @@ #include #include +#include "boards/board.h" #include "extmod/vfs.h" #include "extmod/vfs_fat.h" #include "py/mphal.h" @@ -50,125 +51,14 @@ extern uint32_t __fatfs_flash_length[]; uint8_t _flash_cache[SECTOR_SIZE] __attribute__((aligned(4))); uint32_t _flash_page_addr = NO_CACHE; -static bool init_done = false; - -flexspi_device_config_t deviceconfig = { - .flexspiRootClk = 133000000, - .flashSize = (BOARD_FLASH_SIZE / 1024), - .CSIntervalUnit = kFLEXSPI_CsIntervalUnit1SckCycle, - .CSInterval = 2, - .CSHoldTime = 3, - .CSSetupTime = 3, - .dataValidTime = 0, - .columnspace = 0, - .enableWordAddress = 0, - .AWRSeqIndex = 0, - .AWRSeqNumber = 0, - .ARDSeqIndex = NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD, - .ARDSeqNumber = 1, - .AHBWriteWaitUnit = kFLEXSPI_AhbWriteWaitUnit2AhbCycle, - .AHBWriteWaitInterval = 0, -}; - -const uint32_t customLUT[CUSTOM_LUT_LENGTH] = { - /* Normal read mode -SDR */ - /* Normal read mode -SDR */ - [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x03, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), - [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL + 1] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), - - /* Fast read mode - SDR */ - [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x0B, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), - [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST + 1] = FLEXSPI_LUT_SEQ( - kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_1PAD, 0x08, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), - - /* Fast read quad mode - SDR */ - [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xEB, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 0x18), - [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD + 1] = FLEXSPI_LUT_SEQ( - kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 0x06, kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04), - - /* Read extend parameters */ - [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x81, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), - - /* Write Enable */ - [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x06, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), - - /* Erase Sector */ - [4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x20, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), - - /* Page Program - single mode */ - [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x02, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), - [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE + 1] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), - - /* Page Program - quad mode */ - [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x32, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), - [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD + 1] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_4PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), - - /* Read ID */ - [4 * NOR_CMD_LUT_SEQ_IDX_READID] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x9F, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), - - /* Enable Quad mode */ - [4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x31, kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04), - - /* Read status register */ - [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUSREG] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x05, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04), - - /* Erase whole chip */ - [4 * NOR_CMD_LUT_SEQ_IDX_ERASECHIP] = - FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xC7, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), -}; extern status_t flexspi_nor_flash_erase_sector(FLEXSPI_Type *base, uint32_t address); extern status_t flexspi_nor_flash_page_program(FLEXSPI_Type *base, uint32_t dstAddr, const uint32_t *src); -extern status_t flexspi_nor_get_vendor_id(FLEXSPI_Type *base, uint8_t *vendorId); extern status_t flexspi_nor_enable_quad_mode(FLEXSPI_Type *base); -extern status_t flexspi_nor_erase_chip(FLEXSPI_Type *base); -extern void flexspi_nor_flash_init(FLEXSPI_Type *base); - -void supervisor_flash_init(void) { - if (init_done) - return; - - SCB_DisableDCache(); - - status_t status; - uint8_t vendorID = 0; - - flexspi_nor_flash_init(FLEXSPI); - - /* Get vendor ID. */ - status = flexspi_nor_get_vendor_id(FLEXSPI, &vendorID); - if (status != kStatus_Success) { - printf("flexspi_nor_get_vendor_id fail %ld\r\n", status); - return; - } - - /* Enter quad mode. */ - __disable_irq(); - status = flexspi_nor_enable_quad_mode(FLEXSPI); - if (status != kStatus_Success) - { - printf("flexspi_nor_enable_quad_mode fail %ld\r\n", status); - return; - } - __enable_irq(); - - SCB_EnableDCache(); - init_done = true; +void PLACE_IN_ITCM(supervisor_flash_init)(void) { + // Update the LUT to make sure all entries are available. + FLEXSPI_UpdateLUT(FLEXSPI, 0, (const uint32_t*) &qspiflash_config.memConfig.lookupTable, 64); } static inline uint32_t lba2addr(uint32_t block) { @@ -183,7 +73,7 @@ uint32_t supervisor_flash_get_block_count(void) { return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE; } -void port_internal_flash_flush(void) { +void PLACE_IN_ITCM(port_internal_flash_flush)(void) { if (_flash_page_addr == NO_CACHE) return; status_t status; @@ -211,6 +101,7 @@ void port_internal_flash_flush(void) { DCACHE_CleanInvalidateByRange(_flash_page_addr, SECTOR_SIZE); } + _flash_page_addr = NO_CACHE; } mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { diff --git a/ports/mimxrt10xx/supervisor/internal_flash.h b/ports/mimxrt10xx/supervisor/internal_flash.h index daee66620..ae33fd134 100644 --- a/ports/mimxrt10xx/supervisor/internal_flash.h +++ b/ports/mimxrt10xx/supervisor/internal_flash.h @@ -34,20 +34,11 @@ #define INTERNAL_FLASH_SYSTICK_MASK (0x1ff) // 512ms #define INTERNAL_FLASH_IDLE_TICK(tick) (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2) -#define CUSTOM_LUT_LENGTH 60 #define FLASH_PAGE_SIZE 256 -#define NOR_CMD_LUT_SEQ_IDX_READ_NORMAL 7 -#define NOR_CMD_LUT_SEQ_IDX_READ_FAST 13 -#define NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD 0 -#define NOR_CMD_LUT_SEQ_IDX_READSTATUS 1 -#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 2 -#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 3 -#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE 6 -#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD 4 -#define NOR_CMD_LUT_SEQ_IDX_READID 8 -#define NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG 9 -#define NOR_CMD_LUT_SEQ_IDX_READSTATUSREG 12 -#define NOR_CMD_LUT_SEQ_IDX_ERASECHIP 5 +#define ROM_INDEX_WRITEENABLE 3 +#define ROM_INDEX_ERASESECTOR 5 +#define ROM_INDEX_PAGEPROGRAM 9 +#define ROM_INDEX_READSTATUSREG 1 #endif // MICROPY_INCLUDED_MIMXRT10XX_INTERNAL_FLASH_H diff --git a/ports/mimxrt10xx/supervisor/port.c b/ports/mimxrt10xx/supervisor/port.c index 38cf16a49..e3fef373f 100644 --- a/ports/mimxrt10xx/supervisor/port.c +++ b/ports/mimxrt10xx/supervisor/port.c @@ -72,7 +72,8 @@ #define NO_EXECUTION 1 #define EXECUTION 0 -// Shareable if the memory system manages coherency. +// Shareable if the memory system manages coherency. This means shared between memory bus masters, +// not just CPUs. #define NOT_SHAREABLE 0 #define SHAREABLE 1 @@ -207,9 +208,11 @@ __attribute__((used, naked)) void Reset_Handler(void) { MPU->RBAR = ARM_MPU_RBAR(13, 0x20000000U); MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_32KB); - // This is OCRAM. + // This is OCRAM. We mark it as shareable so that it isn't cached. This makes USB work at the + // cost of 1/4 speed OCRAM accesses. It will leave more room for caching data from the flash + // too which might be a net win. MPU->RBAR = ARM_MPU_RBAR(14, 0x20200000U); - MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_512KB); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_512KB); // We steal 64k from FlexRAM for ITCM and DTCM so disable those memory regions here. MPU->RBAR = ARM_MPU_RBAR(15, 0x20280000U); @@ -322,19 +325,22 @@ void reset_cpu(void) { reset(); } -supervisor_allocation* port_fixed_stack(void) { - return NULL; -} - extern uint32_t _ld_heap_start, _ld_heap_end, _ld_stack_top, _ld_stack_bottom; uint32_t *port_stack_get_limit(void) { - return &_ld_heap_start; + return &_ld_stack_bottom; } uint32_t *port_stack_get_top(void) { return &_ld_stack_top; } +supervisor_allocation _fixed_stack; +supervisor_allocation* port_fixed_stack(void) { + _fixed_stack.ptr = port_stack_get_limit(); + _fixed_stack.length = (port_stack_get_top() - port_stack_get_limit()) * sizeof(uint32_t); + return &_fixed_stack; +} + uint32_t *port_heap_get_bottom(void) { return &_ld_heap_start; } diff --git a/ports/mimxrt10xx/supervisor/usb.c b/ports/mimxrt10xx/supervisor/usb.c index af259405a..91135289c 100644 --- a/ports/mimxrt10xx/supervisor/usb.c +++ b/ports/mimxrt10xx/supervisor/usb.c @@ -50,10 +50,6 @@ void init_usb_hardware(void) { phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK); phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06); usb_phy->TX = phytx; - - // Temporarily disable the data cache until we can sort out all of the spots in TinyUSB that - // need the cache invalidated or cleaned. - SCB_DisableDCache(); } void USB_OTG1_IRQHandler(void) { diff --git a/supervisor/shared/background_callback.c b/supervisor/shared/background_callback.c index 8e12dd362..ef686cbab 100644 --- a/supervisor/shared/background_callback.c +++ b/supervisor/shared/background_callback.c @@ -29,6 +29,7 @@ #include "py/gc.h" #include "py/mpconfig.h" #include "supervisor/background_callback.h" +#include "supervisor/linker.h" #include "supervisor/shared/tick.h" #include "shared-bindings/microcontroller/__init__.h" @@ -63,7 +64,7 @@ void background_callback_add(background_callback_t *cb, background_callback_fun } static bool in_background_callback; -void background_callback_run_all() { +void PLACE_IN_ITCM(background_callback_run_all)() { if (!callback_head) { return; } diff --git a/supervisor/shared/filesystem.c b/supervisor/shared/filesystem.c index f6b94e38b..88603be0c 100644 --- a/supervisor/shared/filesystem.c +++ b/supervisor/shared/filesystem.c @@ -105,13 +105,19 @@ void filesystem_init(bool create_allowed, bool force_create) { // set label #ifdef CIRCUITPY_DRIVE_LABEL - f_setlabel(&vfs_fat->fatfs, CIRCUITPY_DRIVE_LABEL); + res = f_setlabel(&vfs_fat->fatfs, CIRCUITPY_DRIVE_LABEL); #else - f_setlabel(&vfs_fat->fatfs, "CIRCUITPY"); + res = f_setlabel(&vfs_fat->fatfs, "CIRCUITPY"); #endif + if (res != FR_OK) { + return; + } // inhibit file indexing on MacOS - f_mkdir(&vfs_fat->fatfs, "/.fseventsd"); + res = f_mkdir(&vfs_fat->fatfs, "/.fseventsd"); + if (res != FR_OK) { + return; + } make_empty_file(&vfs_fat->fatfs, "/.metadata_never_index"); make_empty_file(&vfs_fat->fatfs, "/.Trashes"); make_empty_file(&vfs_fat->fatfs, "/.fseventsd/no_log"); @@ -119,7 +125,10 @@ void filesystem_init(bool create_allowed, bool force_create) { make_sample_code_file(&vfs_fat->fatfs); // create empty lib directory - f_mkdir(&vfs_fat->fatfs, "/lib"); + res = f_mkdir(&vfs_fat->fatfs, "/lib"); + if (res != FR_OK) { + return; + } // and ensure everything is flushed supervisor_flash_flush(); diff --git a/supervisor/shared/flash.c b/supervisor/shared/flash.c index 9f52ddbc4..1e09fe14b 100644 --- a/supervisor/shared/flash.c +++ b/supervisor/shared/flash.c @@ -88,9 +88,6 @@ static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_blo mp_uint_t flash_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { if (block_num == 0) { - if (num_blocks > 1) { - return 1; // error - } // fake the MBR so we can decide on our own partition table for (int i = 0; i < 446; i++) { @@ -104,9 +101,13 @@ mp_uint_t flash_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_bloc dest[510] = 0x55; dest[511] = 0xaa; - - return 0; // ok - + if (num_blocks > 1) { + dest += 512; + num_blocks -= 1; + // Fall through and do a read from flash. + } else { + return 0; // Done and ok. + } } return supervisor_flash_read_blocks(dest, block_num - PART1_START_BLOCK, num_blocks); } @@ -159,16 +160,37 @@ STATIC mp_obj_t supervisor_flash_obj_writeblocks(mp_obj_t self, mp_obj_t block_n } STATIC MP_DEFINE_CONST_FUN_OBJ_3(supervisor_flash_obj_writeblocks_obj, supervisor_flash_obj_writeblocks); +bool flash_ioctl(size_t cmd, mp_int_t* out_value) { + *out_value = 0; + switch (cmd) { + case BP_IOCTL_INIT: + supervisor_flash_init(); + break; + case BP_IOCTL_DEINIT: + supervisor_flash_flush(); + break; // TODO properly + case BP_IOCTL_SYNC: + supervisor_flash_flush(); + break; + case BP_IOCTL_SEC_COUNT: + *out_value = flash_get_block_count(); + break; + case BP_IOCTL_SEC_SIZE: + *out_value = supervisor_flash_get_block_size(); + break; + default: + return false; + } + return true; +} + STATIC mp_obj_t supervisor_flash_obj_ioctl(mp_obj_t self, mp_obj_t cmd_in, mp_obj_t arg_in) { mp_int_t cmd = mp_obj_get_int(cmd_in); - switch (cmd) { - case BP_IOCTL_INIT: supervisor_flash_init(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_DEINIT: supervisor_flash_flush(); return MP_OBJ_NEW_SMALL_INT(0); // TODO properly - case BP_IOCTL_SYNC: supervisor_flash_flush(); return MP_OBJ_NEW_SMALL_INT(0); - case BP_IOCTL_SEC_COUNT: return MP_OBJ_NEW_SMALL_INT(flash_get_block_count()); - case BP_IOCTL_SEC_SIZE: return MP_OBJ_NEW_SMALL_INT(supervisor_flash_get_block_size()); - default: return mp_const_none; + mp_int_t out_value; + if (flash_ioctl(cmd, &out_value)) { + return MP_OBJ_NEW_SMALL_INT(out_value); } + return mp_const_none; } STATIC MP_DEFINE_CONST_FUN_OBJ_3(supervisor_flash_obj_ioctl_obj, supervisor_flash_obj_ioctl); @@ -200,4 +222,5 @@ void supervisor_flash_init_vfs(fs_user_mount_t *vfs) { vfs->writeblocks[2] = (mp_obj_t)flash_write_blocks; // native version vfs->u.ioctl[0] = (mp_obj_t)&supervisor_flash_obj_ioctl_obj; vfs->u.ioctl[1] = (mp_obj_t)&supervisor_flash_obj; + vfs->u.ioctl[2] = (mp_obj_t)flash_ioctl; // native version } -- cgit v1.2.3 From ef42d6bb6caaab8599fe0ac6211eca444ca109f1 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Wed, 7 Oct 2020 16:12:07 -0700 Subject: Update USB PID --- ports/mimxrt10xx/boards/metro_m7_1011/mpconfigboard.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/mimxrt10xx/boards/metro_m7_1011/mpconfigboard.mk b/ports/mimxrt10xx/boards/metro_m7_1011/mpconfigboard.mk index 8cb150bb4..1a3f7e766 100644 --- a/ports/mimxrt10xx/boards/metro_m7_1011/mpconfigboard.mk +++ b/ports/mimxrt10xx/boards/metro_m7_1011/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x8092 +USB_PID = 0x80E2 USB_PRODUCT = "Metro M7 1011" USB_MANUFACTURER = "Adafruit" -- cgit v1.2.3 From 9fcf96cb645d726cd4c80b9cce438f1633dab95f Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Wed, 7 Oct 2020 17:11:32 -0700 Subject: Replace _bleio.ConnectionError with the native version Replace uses of _bleio.ConnectionError with regular ConnectionError Fixes #3008 --- ports/nrf/common-hal/_bleio/__init__.c | 4 ++-- shared-bindings/_bleio/CharacteristicBuffer.c | 2 +- shared-bindings/_bleio/Connection.c | 2 +- shared-bindings/_bleio/PacketBuffer.c | 2 +- shared-bindings/_bleio/__init__.c | 15 +-------------- shared-bindings/_bleio/__init__.h | 2 -- 6 files changed, 6 insertions(+), 21 deletions(-) (limited to 'ports') diff --git a/ports/nrf/common-hal/_bleio/__init__.c b/ports/nrf/common-hal/_bleio/__init__.c index 496c9429f..5293f7ad1 100644 --- a/ports/nrf/common-hal/_bleio/__init__.c +++ b/ports/nrf/common-hal/_bleio/__init__.c @@ -50,7 +50,7 @@ void check_nrf_error(uint32_t err_code) { mp_raise_msg(&mp_type_TimeoutError, NULL); return; case BLE_ERROR_INVALID_CONN_HANDLE: - mp_raise_bleio_ConnectionError(translate("Not connected")); + mp_raise_ConnectionError(translate("Not connected")); return; default: mp_raise_bleio_BluetoothError(translate("Unknown soft device error: %04x"), err_code); @@ -115,7 +115,7 @@ bleio_adapter_obj_t common_hal_bleio_adapter_obj = { void common_hal_bleio_check_connected(uint16_t conn_handle) { if (conn_handle == BLE_CONN_HANDLE_INVALID) { - mp_raise_bleio_ConnectionError(translate("Not connected")); + mp_raise_ConnectionError(translate("Not connected")); } } diff --git a/shared-bindings/_bleio/CharacteristicBuffer.c b/shared-bindings/_bleio/CharacteristicBuffer.c index 7bcbc807e..4d6c836c1 100644 --- a/shared-bindings/_bleio/CharacteristicBuffer.c +++ b/shared-bindings/_bleio/CharacteristicBuffer.c @@ -37,7 +37,7 @@ STATIC void raise_error_if_not_connected(bleio_characteristic_buffer_obj_t *self) { if (!common_hal_bleio_characteristic_buffer_connected(self)) { - mp_raise_bleio_ConnectionError(translate("Not connected")); + mp_raise_ConnectionError(translate("Not connected")); } } diff --git a/shared-bindings/_bleio/Connection.c b/shared-bindings/_bleio/Connection.c index b5eeaa906..fe82af098 100644 --- a/shared-bindings/_bleio/Connection.c +++ b/shared-bindings/_bleio/Connection.c @@ -63,7 +63,7 @@ void bleio_connection_ensure_connected(bleio_connection_obj_t *self) { if (!common_hal_bleio_connection_get_connected(self)) { - mp_raise_bleio_ConnectionError(translate("Connection has been disconnected and can no longer be used. Create a new connection.")); + mp_raise_ConnectionError(translate("Connection has been disconnected and can no longer be used. Create a new connection.")); } } diff --git a/shared-bindings/_bleio/PacketBuffer.c b/shared-bindings/_bleio/PacketBuffer.c index 8c8970939..f2a3cbce0 100644 --- a/shared-bindings/_bleio/PacketBuffer.c +++ b/shared-bindings/_bleio/PacketBuffer.c @@ -161,7 +161,7 @@ STATIC mp_obj_t bleio_packet_buffer_write(mp_uint_t n_args, const mp_obj_t *pos_ // gatts write events, which may not have been sent yet. // // IDEAL: - // mp_raise_bleio_ConnectionError(translate("Not connected")); + // mp_raise_ConnectionError(translate("Not connected")); // TEMPORARY: num_bytes_written = 0; } diff --git a/shared-bindings/_bleio/__init__.c b/shared-bindings/_bleio/__init__.c index 3d9084dd5..2ef70a64f 100644 --- a/shared-bindings/_bleio/__init__.c +++ b/shared-bindings/_bleio/__init__.c @@ -63,7 +63,6 @@ //| """Catchall exception for Bluetooth related errors.""" //| ... MP_DEFINE_BLEIO_EXCEPTION(BluetoothError, Exception) - NORETURN void mp_raise_bleio_BluetoothError(const compressed_string_t* fmt, ...) { va_list argptr; va_start(argptr,fmt); @@ -71,18 +70,6 @@ NORETURN void mp_raise_bleio_BluetoothError(const compressed_string_t* fmt, ...) va_end(argptr); nlr_raise(exception); } -//| class ConnectionError(BluetoothError): -//| """Raised when a connection is unavailable.""" -//| ... -//| -MP_DEFINE_BLEIO_EXCEPTION(ConnectionError, bleio_BluetoothError) -NORETURN void mp_raise_bleio_ConnectionError(const compressed_string_t* fmt, ...) { - va_list argptr; - va_start(argptr,fmt); - mp_obj_t exception = mp_obj_new_exception_msg_vlist(&mp_type_bleio_ConnectionError, fmt, argptr); - va_end(argptr); - nlr_raise(exception); -} //| class RoleError(BluetoothError): //| """Raised when a resource is used as the mismatched role. For example, if a local CCCD is @@ -93,6 +80,7 @@ MP_DEFINE_BLEIO_EXCEPTION(RoleError, bleio_BluetoothError) NORETURN void mp_raise_bleio_RoleError(const compressed_string_t* msg) { mp_raise_msg(&mp_type_bleio_RoleError, msg); } + //| class SecurityError(BluetoothError): //| """Raised when a security related error occurs.""" //| ... @@ -183,7 +171,6 @@ STATIC const mp_rom_map_elem_t bleio_module_globals_table[] = { // Errors { MP_ROM_QSTR(MP_QSTR_BluetoothError), OBJ_FROM_PTR(&mp_type_bleio_BluetoothError) }, - { MP_ROM_QSTR(MP_QSTR_ConnectionError), OBJ_FROM_PTR(&mp_type_bleio_ConnectionError) }, { MP_ROM_QSTR(MP_QSTR_RoleError), OBJ_FROM_PTR(&mp_type_bleio_RoleError) }, { MP_ROM_QSTR(MP_QSTR_SecurityError), OBJ_FROM_PTR(&mp_type_bleio_SecurityError) }, diff --git a/shared-bindings/_bleio/__init__.h b/shared-bindings/_bleio/__init__.h index 588b1f197..65ba9b3a5 100644 --- a/shared-bindings/_bleio/__init__.h +++ b/shared-bindings/_bleio/__init__.h @@ -51,14 +51,12 @@ const mp_obj_type_t mp_type_bleio_ ## exc_name = { \ }; extern const mp_obj_type_t mp_type_bleio_BluetoothError; -extern const mp_obj_type_t mp_type_bleio_ConnectionError; extern const mp_obj_type_t mp_type_bleio_RoleError; extern const mp_obj_type_t mp_type_bleio_SecurityError; extern mp_obj_t bleio_set_adapter(mp_obj_t adapter_obj); NORETURN void mp_raise_bleio_BluetoothError(const compressed_string_t* msg, ...); -NORETURN void mp_raise_bleio_ConnectionError(const compressed_string_t* msg, ...); NORETURN void mp_raise_bleio_RoleError(const compressed_string_t* msg); NORETURN void mp_raise_bleio_SecurityError(const compressed_string_t* msg, ...); -- cgit v1.2.3 From d93a1961c4dc3f0bc02b79b6ac116638a4f64794 Mon Sep 17 00:00:00 2001 From: Seon Rozenblum Date: Thu, 8 Oct 2020 14:03:16 +1100 Subject: Fixed the FeatherS2 prerelease hardware name --- .../esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h index 90a368006..93d901bec 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h @@ -26,7 +26,7 @@ //Micropython setup -#define MICROPY_HW_BOARD_NAME "FeatherS2" +#define MICROPY_HW_BOARD_NAME "FeatherS2 PreRelease" #define MICROPY_HW_MCU_NAME "ESP32S2" #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) -- cgit v1.2.3 From e1fc85c56bb5e308d497c09eca8154243f85a83c Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 8 Oct 2020 13:30:32 +0700 Subject: fix usb issue with latest idf --- ports/esp32s2/Makefile | 6 +++--- ports/esp32s2/supervisor/usb.c | 34 ++++++++++++++++++++++++++++++---- 2 files changed, 33 insertions(+), 7 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index f8818eca0..935ced7cc 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -271,7 +271,7 @@ menuconfig: $(BUILD)/esp-idf/config $(HEADER_BUILD)/qstr.i.last: | $(BUILD)/esp-idf/config/sdkconfig.h # Order here matters -ESP_IDF_COMPONENTS_LINK = freertos log esp_system esp32s2 bootloader_support pthread esp_timer vfs spi_flash app_update esp_common esp32s2 heap newlib driver xtensa soc esp_ringbuf esp_wifi esp_event wpa_supplicant mbedtls efuse nvs_flash esp_netif lwip esp_rom esp-tls +ESP_IDF_COMPONENTS_LINK = freertos log hal esp_system esp32s2 bootloader_support pthread esp_timer vfs spi_flash app_update esp_common esp32s2 heap newlib driver xtensa soc esp_ringbuf esp_wifi esp_event wpa_supplicant mbedtls efuse nvs_flash esp_netif lwip esp_rom esp-tls ESP_IDF_COMPONENTS_INCLUDE = driver freertos log soc @@ -283,11 +283,11 @@ ESP_IDF_WIFI_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_WIFI_COMPONENT MBEDTLS_COMPONENTS_LINK = crypto tls x509 MBEDTLS_COMPONENTS_LINK_EXPANDED = $(foreach component, $(MBEDTLS_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/mbedtls/mbedtls/library/libmbed$(component).a) -BINARY_BLOBS = esp-idf/components/xtensa/esp32s2/libhal.a +BINARY_BLOBS = esp-idf/components/xtensa/esp32s2/libxt_hal.a BINARY_WIFI_BLOBS = libcoexist.a libcore.a libespnow.a libmesh.a libnet80211.a libpp.a librtc.a libsmartconfig.a libphy.a BINARY_BLOBS += $(addprefix esp-idf/components/esp_wifi/lib/esp32s2/, $(BINARY_WIFI_BLOBS)) -ESP_IDF_COMPONENTS_EXPANDED += $(BUILD)/esp-idf/esp-idf/soc/soc/esp32s2/libsoc_esp32s2.a esp-idf/components/xtensa/esp32s2/libhal.a +ESP_IDF_COMPONENTS_EXPANDED += $(BUILD)/esp-idf/esp-idf/soc/soc/esp32s2/libsoc_esp32s2.a esp-idf/components/xtensa/esp32s2/libxt_hal.a ESP_AUTOGEN_LD = $(BUILD)/esp-idf/esp-idf/esp32s2/esp32s2_out.ld $(BUILD)/esp-idf/esp-idf/esp32s2/ld/esp32s2.project.ld FLASH_FLAGS = --flash_mode $(CIRCUITPY_ESP_FLASH_MODE) --flash_freq $(CIRCUITPY_ESP_FLASH_FREQ) --flash_size $(CIRCUITPY_ESP_FLASH_SIZE) diff --git a/ports/esp32s2/supervisor/usb.c b/ports/esp32s2/supervisor/usb.c index c91c2ec4b..1ad6af047 100644 --- a/ports/esp32s2/supervisor/usb.c +++ b/ports/esp32s2/supervisor/usb.c @@ -33,6 +33,8 @@ #include "components/driver/include/driver/periph_ctrl.h" #include "components/driver/include/driver/gpio.h" #include "components/esp_rom/include/esp32s2/rom/gpio.h" +#include "components/esp_rom/include/esp_rom_gpio.h" +#include "components/hal/esp32s2/include/hal/gpio_ll.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" @@ -68,6 +70,33 @@ void usb_device_task(void* param) } } +static void configure_pins (usb_hal_context_t *usb) +{ + /* usb_periph_iopins currently configures USB_OTG as USB Device. + * Introduce additional parameters in usb_hal_context_t when adding support + * for USB Host. + */ + for ( const usb_iopin_dsc_t *iopin = usb_periph_iopins; iopin->pin != -1; ++iopin ) { + if ( (usb->use_external_phy) || (iopin->ext_phy_only == 0) ) { + esp_rom_gpio_pad_select_gpio(iopin->pin); + if ( iopin->is_output ) { + esp_rom_gpio_connect_out_signal(iopin->pin, iopin->func, false, false); + } + else { + esp_rom_gpio_connect_in_signal(iopin->pin, iopin->func, false); + if ( (iopin->pin != GPIO_FUNC_IN_LOW) && (iopin->pin != GPIO_FUNC_IN_HIGH) ) { + gpio_ll_input_enable(&GPIO, iopin->pin); + } + } + esp_rom_gpio_pad_unhold(iopin->pin); + } + } + if ( !usb->use_external_phy ) { + gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3); + gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3); + } +} + void init_usb_hardware(void) { periph_module_reset(PERIPH_USB_MODULE); periph_module_enable(PERIPH_USB_MODULE); @@ -75,10 +104,7 @@ void init_usb_hardware(void) { .use_external_phy = false // use built-in PHY }; usb_hal_init(&hal); - - // Initialize the pin drive strength. - gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3); - gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3); + configure_pins(&hal); (void) xTaskCreateStatic(usb_device_task, "usbd", -- cgit v1.2.3 From 5af1e054a74a9d088c3c2ca2bbac86ebd326d937 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Thu, 8 Oct 2020 14:57:41 -0400 Subject: Fix strange merge submodule edit --- ports/atmel-samd/peripherals | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals index 2ff4ab051..a7e39c4d0 160000 --- a/ports/atmel-samd/peripherals +++ b/ports/atmel-samd/peripherals @@ -1 +1 @@ -Subproject commit 2ff4ab05101ce7d3e105009cc6612df6e992123f +Subproject commit a7e39c4d01aa5916015beecb021777617e77b0ad -- cgit v1.2.3 From 2b2003f3e70a1e829bdd1ccffb1ed5bf933696dd Mon Sep 17 00:00:00 2001 From: askpatricw <4002194+askpatrickw@users.noreply.github.com> Date: Thu, 8 Oct 2020 22:46:10 -0700 Subject: Set default hostname --- ports/esp32s2/boards/adafruit_metro_esp32s2/sdkconfig | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/sdkconfig b/ports/esp32s2/boards/adafruit_metro_esp32s2/sdkconfig index 9d8bbde96..80b9a2cf8 100644 --- a/ports/esp32s2/boards/adafruit_metro_esp32s2/sdkconfig +++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/sdkconfig @@ -31,3 +31,9 @@ CONFIG_SPIRAM_USE_MEMMAP=y CONFIG_SPIRAM_MEMTEST=y # CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set # end of SPI RAM config + +# +# LWIP +# +CONFIG_LWIP_LOCAL_HOSTNAME="Metro-ESP32S2" +# end of LWIP -- cgit v1.2.3 From ccbc15046a818094124565667d9687ff41e1b0a8 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Fri, 9 Oct 2020 13:29:35 -0400 Subject: Fix submodule issue --- ports/atmel-samd/peripherals | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals index 2ff4ab051..a7e39c4d0 160000 --- a/ports/atmel-samd/peripherals +++ b/ports/atmel-samd/peripherals @@ -1 +1 @@ -Subproject commit 2ff4ab05101ce7d3e105009cc6612df6e992123f +Subproject commit a7e39c4d01aa5916015beecb021777617e77b0ad -- cgit v1.2.3 From 3ccf644dd0afd85ad8d8c6c67494cebab172b5a8 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Fri, 9 Oct 2020 12:53:00 -0700 Subject: Fix autoreload on SAMD21 The issue was that a time.sleep() would set the RTC wake up further into the future even if we wanted to tick every ms. Ticking every ms is used to time the autoreload delay and without it, autoreload doesn't work. Fixes #3528 --- ports/atmel-samd/supervisor/port.c | 58 ++++++++++++++++++++++---------------- 1 file changed, 34 insertions(+), 24 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c index 8d52c30c5..e69062296 100644 --- a/ports/atmel-samd/supervisor/port.c +++ b/ports/atmel-samd/supervisor/port.c @@ -430,6 +430,33 @@ uint32_t port_get_saved_word(void) { static volatile uint64_t overflowed_ticks = 0; static volatile bool _ticks_enabled = false; +static uint32_t _get_count(void) { + #ifdef SAM_D5X_E5X + while ((RTC->MODE0.SYNCBUSY.reg & (RTC_MODE0_SYNCBUSY_COUNTSYNC | RTC_MODE0_SYNCBUSY_COUNT)) != 0) {} + #endif + #ifdef SAMD21 + while (RTC->MODE0.STATUS.bit.SYNCBUSY != 0) {} + #endif + + return RTC->MODE0.COUNT.reg; +} + +static void _port_interrupt_after_ticks(uint32_t ticks) { + uint32_t current_ticks = _get_count(); + if (ticks > 1 << 28) { + // We'll interrupt sooner with an overflow. + return; + } +#ifdef SAMD21 + if (hold_interrupt) { + return; + } +#endif + RTC->MODE0.COMP[0].reg = current_ticks + (ticks << 4); + RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_CMP0; + RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_CMP0; +} + void RTC_Handler(void) { uint32_t intflag = RTC->MODE0.INTFLAG.reg; if (intflag & RTC_MODE0_INTFLAG_OVF) { @@ -452,7 +479,7 @@ void RTC_Handler(void) { supervisor_tick(); // Check _ticks_enabled again because a tick handler may have turned it off. if (_ticks_enabled) { - port_interrupt_after_ticks(1); + _port_interrupt_after_ticks(1); } } #endif @@ -462,17 +489,6 @@ void RTC_Handler(void) { } } -static uint32_t _get_count(void) { - #ifdef SAM_D5X_E5X - while ((RTC->MODE0.SYNCBUSY.reg & (RTC_MODE0_SYNCBUSY_COUNTSYNC | RTC_MODE0_SYNCBUSY_COUNT)) != 0) {} - #endif - #ifdef SAMD21 - while (RTC->MODE0.STATUS.bit.SYNCBUSY != 0) {} - #endif - - return RTC->MODE0.COUNT.reg; -} - uint64_t port_get_raw_ticks(uint8_t* subticks) { uint32_t current_ticks = _get_count(); if (subticks != NULL) { @@ -490,7 +506,7 @@ void port_enable_tick(void) { #endif #ifdef SAMD21 _ticks_enabled = true; - port_interrupt_after_ticks(1); + _port_interrupt_after_ticks(1); #endif } @@ -505,20 +521,14 @@ void port_disable_tick(void) { #endif } +// This is called by sleep, we ignore it when our ticks are enabled because +// they'll wake us up earlier. If we don't, we'll mess up ticks by overwriting +// the next RTC wake up time. void port_interrupt_after_ticks(uint32_t ticks) { - uint32_t current_ticks = _get_count(); - if (ticks > 1 << 28) { - // We'll interrupt sooner with an overflow. - return; - } -#ifdef SAMD21 - if (hold_interrupt) { + if (_ticks_enabled) { return; } -#endif - RTC->MODE0.COMP[0].reg = current_ticks + (ticks << 4); - RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_CMP0; - RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_CMP0; + _port_interrupt_after_ticks(ticks); } void port_sleep_until_interrupt(void) { -- cgit v1.2.3 From 70a94c8d2dec709e6692a89131f04e05b81bcae0 Mon Sep 17 00:00:00 2001 From: lady ada Date: Sat, 10 Oct 2020 12:27:35 -0400 Subject: fix for https://github.com/adafruit/circuitpython/issues/3534 --- ports/atmel-samd/boards/matrixportal_m4/mpconfigboard.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/matrixportal_m4/mpconfigboard.h b/ports/atmel-samd/boards/matrixportal_m4/mpconfigboard.h index 0368d577b..cbca94e03 100644 --- a/ports/atmel-samd/boards/matrixportal_m4/mpconfigboard.h +++ b/ports/atmel-samd/boards/matrixportal_m4/mpconfigboard.h @@ -15,8 +15,8 @@ #define MICROPY_PORT_C (0) #define MICROPY_PORT_D (0) -#define DEFAULT_I2C_BUS_SCL (&pin_PB03) -#define DEFAULT_I2C_BUS_SDA (&pin_PB02) +#define DEFAULT_I2C_BUS_SCL (&pin_PB30) +#define DEFAULT_I2C_BUS_SDA (&pin_PB31) #define DEFAULT_SPI_BUS_SCK (&pin_PA16) #define DEFAULT_SPI_BUS_MOSI (&pin_PA19) -- cgit v1.2.3 From b9e308c248ec953ebd2fc8c16c03b2cc06cfafc5 Mon Sep 17 00:00:00 2001 From: Targett363 Date: Sat, 10 Oct 2020 21:11:06 +0100 Subject: Adding Wroom and Wrover board files --- .../boards/targett_module_clip_wroom/board.c | 51 ++++++++++++++++++++++ .../targett_module_clip_wroom/mpconfigboard.h | 40 +++++++++++++++++ .../targett_module_clip_wroom/mpconfigboard.mk | 17 ++++++++ .../boards/targett_module_clip_wroom/pins.c | 48 ++++++++++++++++++++ .../boards/targett_module_clip_wroom/sdkconfig | 0 .../boards/targett_module_clip_wrover/board.c | 47 ++++++++++++++++++++ .../targett_module_clip_wrover/mpconfigboard.h | 38 ++++++++++++++++ .../targett_module_clip_wrover/mpconfigboard.mk | 17 ++++++++ .../boards/targett_module_clip_wrover/pins.c | 48 ++++++++++++++++++++ .../boards/targett_module_clip_wrover/sdkconfig | 33 ++++++++++++++ 10 files changed, 339 insertions(+) create mode 100644 ports/esp32s2/boards/targett_module_clip_wroom/board.c create mode 100644 ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.h create mode 100644 ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk create mode 100644 ports/esp32s2/boards/targett_module_clip_wroom/pins.c create mode 100644 ports/esp32s2/boards/targett_module_clip_wroom/sdkconfig create mode 100644 ports/esp32s2/boards/targett_module_clip_wrover/board.c create mode 100644 ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h create mode 100644 ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk create mode 100644 ports/esp32s2/boards/targett_module_clip_wrover/pins.c create mode 100644 ports/esp32s2/boards/targett_module_clip_wrover/sdkconfig (limited to 'ports') diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/board.c b/ports/esp32s2/boards/targett_module_clip_wroom/board.c new file mode 100644 index 000000000..7f5de0e0d --- /dev/null +++ b/ports/esp32s2/boards/targett_module_clip_wroom/board.c @@ -0,0 +1,51 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "shared-bindings/microcontroller/Pin.h" + +void board_init(void) { + // USB + common_hal_never_reset_pin(&pin_GPIO19); + common_hal_never_reset_pin(&pin_GPIO20); + + // Debug UART + common_hal_never_reset_pin(&pin_GPIO43); + common_hal_never_reset_pin(&pin_GPIO44); + + // Crystal + common_hal_never_reset_pin(&pin_GPIO15); + common_hal_never_reset_pin(&pin_GPIO16); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.h b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.h new file mode 100644 index 000000000..6cf69138e --- /dev/null +++ b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +//Essentially the same as the Saola board but without the neopixel + +#define MICROPY_HW_BOARD_NAME "Targett Module Clip w/Wroom" +#define MICROPY_HW_MCU_NAME "ESP32S2" + +//#define MICROPY_HW_NEOPIXEL (&pin_GPIO18) + +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n") + +#define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk new file mode 100644 index 000000000..71793344e --- /dev/null +++ b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x239A +USB_PID = 0x80A8 +USB_PRODUCT = "Targett Module Clip w/WROOM" +USB_MANUFACTURER = "Targett" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ + +# The default queue depth of 16 overflows on release builds, +# so increase it to 32. +CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 + +CIRCUITPY_ESP_FLASH_MODE=dio +CIRCUITPY_ESP_FLASH_FREQ=40m +CIRCUITPY_ESP_FLASH_SIZE=4MB + +CIRCUITPY_MODULE=wroom diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/pins.c b/ports/esp32s2/boards/targett_module_clip_wroom/pins.c new file mode 100644 index 000000000..99db09645 --- /dev/null +++ b/ports/esp32s2/boards/targett_module_clip_wroom/pins.c @@ -0,0 +1,48 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) }, + { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) }, + { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) }, + { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) }, + + + { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) }, + { MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) }, + { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) }, + { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) }, + { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) }, + { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) }, + { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) }, + { MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) }, + { MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, + { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) }, + { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) }, + + //{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO18) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/sdkconfig b/ports/esp32s2/boards/targett_module_clip_wroom/sdkconfig new file mode 100644 index 000000000..e69de29bb diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/board.c b/ports/esp32s2/boards/targett_module_clip_wrover/board.c new file mode 100644 index 000000000..9f708874b --- /dev/null +++ b/ports/esp32s2/boards/targett_module_clip_wrover/board.c @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "shared-bindings/microcontroller/Pin.h" + +void board_init(void) { + // USB + common_hal_never_reset_pin(&pin_GPIO19); + common_hal_never_reset_pin(&pin_GPIO20); + + // Debug UART + common_hal_never_reset_pin(&pin_GPIO43); + common_hal_never_reset_pin(&pin_GPIO44); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h new file mode 100644 index 000000000..961522891 --- /dev/null +++ b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "Saola 1 w/Wrover" +#define MICROPY_HW_MCU_NAME "ESP32S2" + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO18) + +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n") + +#define AUTORESET_DELAY_MS 500 diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk new file mode 100644 index 000000000..d5ff1c5ac --- /dev/null +++ b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x239A +USB_PID = 0x80A6 +USB_PRODUCT = "Saola 1 w/WROVER" +USB_MANUFACTURER = "Espressif" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ + +# The default queue depth of 16 overflows on release builds, +# so increase it to 32. +CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 + +CIRCUITPY_ESP_FLASH_MODE=dio +CIRCUITPY_ESP_FLASH_FREQ=40m +CIRCUITPY_ESP_FLASH_SIZE=4MB + +CIRCUITPY_MODULE=wrover diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/pins.c b/ports/esp32s2/boards/targett_module_clip_wrover/pins.c new file mode 100644 index 000000000..0562d9331 --- /dev/null +++ b/ports/esp32s2/boards/targett_module_clip_wrover/pins.c @@ -0,0 +1,48 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) }, + { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) }, + { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) }, + { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) }, + + + { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) }, + { MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) }, + { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) }, + { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) }, + { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) }, + { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) }, + { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) }, + { MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) }, + { MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, + { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) }, + { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO18) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/sdkconfig b/ports/esp32s2/boards/targett_module_clip_wrover/sdkconfig new file mode 100644 index 000000000..9d8bbde96 --- /dev/null +++ b/ports/esp32s2/boards/targett_module_clip_wrover/sdkconfig @@ -0,0 +1,33 @@ +CONFIG_ESP32S2_SPIRAM_SUPPORT=y + +# +# SPI RAM config +# +# CONFIG_SPIRAM_TYPE_AUTO is not set +CONFIG_SPIRAM_TYPE_ESPPSRAM16=y +# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set +# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set +CONFIG_SPIRAM_SIZE=2097152 + +# +# PSRAM clock and cs IO for ESP32S2 +# +CONFIG_DEFAULT_PSRAM_CLK_IO=30 +CONFIG_DEFAULT_PSRAM_CS_IO=26 +# end of PSRAM clock and cs IO for ESP32S2 + +# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set +# CONFIG_SPIRAM_RODATA is not set +# CONFIG_SPIRAM_SPEED_80M is not set +CONFIG_SPIRAM_SPEED_40M=y +# CONFIG_SPIRAM_SPEED_26M is not set +# CONFIG_SPIRAM_SPEED_20M is not set +CONFIG_SPIRAM=y +CONFIG_SPIRAM_BOOT_INIT=y +# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set +CONFIG_SPIRAM_USE_MEMMAP=y +# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set +# CONFIG_SPIRAM_USE_MALLOC is not set +CONFIG_SPIRAM_MEMTEST=y +# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set +# end of SPI RAM config -- cgit v1.2.3 From f38e868e90fb467cf0f910e4990ffacba07abefb Mon Sep 17 00:00:00 2001 From: Targett363 Date: Sat, 10 Oct 2020 21:28:26 +0100 Subject: Actually adding Wrover board files this time --- ports/esp32s2/boards/espressif_saola_1_wrover/board.c | 4 ++++ ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h | 6 ++++-- ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk | 4 ++-- 3 files changed, 10 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/board.c b/ports/esp32s2/boards/espressif_saola_1_wrover/board.c index 9f708874b..83dcb920a 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wrover/board.c +++ b/ports/esp32s2/boards/espressif_saola_1_wrover/board.c @@ -36,6 +36,10 @@ void board_init(void) { // Debug UART common_hal_never_reset_pin(&pin_GPIO43); common_hal_never_reset_pin(&pin_GPIO44); + + //Crystal + common_hal_never_reset_pin(&pin_GPIO15); + common_hal_never_reset_pin(&pin_GPIO16); } bool board_requests_safe_mode(void) { diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h index 961522891..3c74d27fa 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h +++ b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h @@ -26,10 +26,12 @@ //Micropython setup -#define MICROPY_HW_BOARD_NAME "Saola 1 w/Wrover" +//Same setup as the Saola board but with no Neopixel on board + +#define MICROPY_HW_BOARD_NAME "Targett Module Clip w/Wrover" #define MICROPY_HW_MCU_NAME "ESP32S2" -#define MICROPY_HW_NEOPIXEL (&pin_GPIO18) +//#define MICROPY_HW_NEOPIXEL (&pin_GPIO18) #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk index d5ff1c5ac..4b70f4a68 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk +++ b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk @@ -1,7 +1,7 @@ USB_VID = 0x239A USB_PID = 0x80A6 -USB_PRODUCT = "Saola 1 w/WROVER" -USB_MANUFACTURER = "Espressif" +USB_PRODUCT = "Targett Module Clip w/WROVER" +USB_MANUFACTURER = "Targett" INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = MPZ -- cgit v1.2.3 From 74954286f09b2fc861db759232569520552f7cd8 Mon Sep 17 00:00:00 2001 From: Targett363 Date: Sat, 10 Oct 2020 21:44:14 +0100 Subject: Putting the Saola Wrover files back and adding my Wrover board files this time --- ports/esp32s2/boards/espressif_saola_1_wrover/board.c | 4 ---- ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h | 6 ++---- ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk | 4 ++-- ports/esp32s2/boards/targett_module_clip_wrover/board.c | 4 ++++ ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h | 6 ++++-- ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk | 4 ++-- 6 files changed, 14 insertions(+), 14 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/board.c b/ports/esp32s2/boards/espressif_saola_1_wrover/board.c index 83dcb920a..9f708874b 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wrover/board.c +++ b/ports/esp32s2/boards/espressif_saola_1_wrover/board.c @@ -36,10 +36,6 @@ void board_init(void) { // Debug UART common_hal_never_reset_pin(&pin_GPIO43); common_hal_never_reset_pin(&pin_GPIO44); - - //Crystal - common_hal_never_reset_pin(&pin_GPIO15); - common_hal_never_reset_pin(&pin_GPIO16); } bool board_requests_safe_mode(void) { diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h index 3c74d27fa..961522891 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h +++ b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h @@ -26,12 +26,10 @@ //Micropython setup -//Same setup as the Saola board but with no Neopixel on board - -#define MICROPY_HW_BOARD_NAME "Targett Module Clip w/Wrover" +#define MICROPY_HW_BOARD_NAME "Saola 1 w/Wrover" #define MICROPY_HW_MCU_NAME "ESP32S2" -//#define MICROPY_HW_NEOPIXEL (&pin_GPIO18) +#define MICROPY_HW_NEOPIXEL (&pin_GPIO18) #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk index 4b70f4a68..d5ff1c5ac 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk +++ b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk @@ -1,7 +1,7 @@ USB_VID = 0x239A USB_PID = 0x80A6 -USB_PRODUCT = "Targett Module Clip w/WROVER" -USB_MANUFACTURER = "Targett" +USB_PRODUCT = "Saola 1 w/WROVER" +USB_MANUFACTURER = "Espressif" INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = MPZ diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/board.c b/ports/esp32s2/boards/targett_module_clip_wrover/board.c index 9f708874b..83dcb920a 100644 --- a/ports/esp32s2/boards/targett_module_clip_wrover/board.c +++ b/ports/esp32s2/boards/targett_module_clip_wrover/board.c @@ -36,6 +36,10 @@ void board_init(void) { // Debug UART common_hal_never_reset_pin(&pin_GPIO43); common_hal_never_reset_pin(&pin_GPIO44); + + //Crystal + common_hal_never_reset_pin(&pin_GPIO15); + common_hal_never_reset_pin(&pin_GPIO16); } bool board_requests_safe_mode(void) { diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h index 961522891..3c74d27fa 100644 --- a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h +++ b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h @@ -26,10 +26,12 @@ //Micropython setup -#define MICROPY_HW_BOARD_NAME "Saola 1 w/Wrover" +//Same setup as the Saola board but with no Neopixel on board + +#define MICROPY_HW_BOARD_NAME "Targett Module Clip w/Wrover" #define MICROPY_HW_MCU_NAME "ESP32S2" -#define MICROPY_HW_NEOPIXEL (&pin_GPIO18) +//#define MICROPY_HW_NEOPIXEL (&pin_GPIO18) #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk index d5ff1c5ac..4b70f4a68 100644 --- a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk +++ b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk @@ -1,7 +1,7 @@ USB_VID = 0x239A USB_PID = 0x80A6 -USB_PRODUCT = "Saola 1 w/WROVER" -USB_MANUFACTURER = "Espressif" +USB_PRODUCT = "Targett Module Clip w/WROVER" +USB_MANUFACTURER = "Targett" INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = MPZ -- cgit v1.2.3 From ead0d51fd711d38bab8dc7cff8373b6fdd60a180 Mon Sep 17 00:00:00 2001 From: Targett363 Date: Sat, 10 Oct 2020 22:22:01 +0100 Subject: Commenting out Neopixel in pins.c --- ports/esp32s2/boards/targett_module_clip_wrover/pins.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/pins.c b/ports/esp32s2/boards/targett_module_clip_wrover/pins.c index 0562d9331..99db09645 100644 --- a/ports/esp32s2/boards/targett_module_clip_wrover/pins.c +++ b/ports/esp32s2/boards/targett_module_clip_wrover/pins.c @@ -43,6 +43,6 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) }, { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) }, - { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO18) }, + //{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO18) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From 5721cf0710202294476c83500394a8dbd1c20d5b Mon Sep 17 00:00:00 2001 From: Targett363 Date: Sat, 10 Oct 2020 22:42:24 +0100 Subject: tidying up board names --- ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk | 2 +- ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk index 71793344e..580caa71b 100644 --- a/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk +++ b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk @@ -1,6 +1,6 @@ USB_VID = 0x239A USB_PID = 0x80A8 -USB_PRODUCT = "Targett Module Clip w/WROOM" +USB_PRODUCT = "Targett Module Clip w/Wroom" USB_MANUFACTURER = "Targett" INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk index 4b70f4a68..6832d2101 100644 --- a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk +++ b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk @@ -1,6 +1,6 @@ USB_VID = 0x239A USB_PID = 0x80A6 -USB_PRODUCT = "Targett Module Clip w/WROVER" +USB_PRODUCT = "Targett Module Clip w/Wrover" USB_MANUFACTURER = "Targett" INTERNAL_FLASH_FILESYSTEM = 1 -- cgit v1.2.3 From f5f1e29dc0503483ecdaef853b0b9361a5731b55 Mon Sep 17 00:00:00 2001 From: warriorofwire <3454741+WarriorOfWire@users.noreply.github.com> Date: Sun, 31 May 2020 14:25:09 -0700 Subject: disable async/await on a several small ucontrollers --- ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk | 1 + ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk | 2 ++ ports/atmel-samd/boards/datum_distance/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/datum_imu/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/datum_light/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/datum_weather/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk | 2 ++ ports/atmel-samd/boards/pewpew10/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/shirtty/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk | 3 +++ ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk | 2 ++ ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk | 2 ++ ports/atmel-samd/boards/uchip/mpconfigboard.mk | 1 + ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk | 3 +++ ports/nrf/boards/pca10100/mpconfigboard.mk | 2 ++ ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.mk | 3 +++ 28 files changed, 75 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk index d31d1f54a..2c0056847 100644 --- a/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk +++ b/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk @@ -10,3 +10,4 @@ INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 +MICROPY_PY_ASYNC_AWAIT = 0 diff --git a/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk index 7eb83a123..230bce4f2 100644 --- a/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk +++ b/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk index fd24edafa..1d652737a 100644 --- a/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk +++ b/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk index a5722c9ad..e4d0916fa 100644 --- a/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk +++ b/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk b/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk index 055e6b19e..47a543450 100644 --- a/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk @@ -9,3 +9,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk b/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk index 892a5371e..201c9b142 100644 --- a/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk +++ b/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 CIRCUITPY_COUNTIO = 0 CIRCUITPY_ROTARYIO = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk index 5656d4cb8..fa437bf36 100755 --- a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk @@ -16,6 +16,7 @@ CIRCUITPY_COUNTIO = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_VECTORIO = 0 +MICROPY_PY_ASYNC_AWAIT = 0 SUPEROPT_GC = 0 @@ -33,3 +34,4 @@ RELEASE_NEEDS_CLEAN_BUILD = 1 CFLAGS_INLINE_LIMIT = 35 SUPEROPT_VM = 0 endif + diff --git a/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk b/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk index ae05d32f2..365b935ee 100644 --- a/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk +++ b/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk b/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk index 6fd05f403..f5900c8f7 100644 --- a/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk +++ b/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/datum_light/mpconfigboard.mk b/ports/atmel-samd/boards/datum_light/mpconfigboard.mk index d42a7869d..3cefa856f 100644 --- a/ports/atmel-samd/boards/datum_light/mpconfigboard.mk +++ b/ports/atmel-samd/boards/datum_light/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk b/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk index d92cbc71b..1293a5aaa 100644 --- a/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk +++ b/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk index 143910318..0f784be8a 100644 --- a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk index 69ebdfc23..b53508570 100644 --- a/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk index 1ad429295..fe588b163 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk @@ -21,10 +21,13 @@ CIRCUITPY_SAMD = 0 CIRCUITPY_USB_MIDI = 0 CIRCUITPY_USB_HID = 0 CIRCUITPY_TOUCHIO = 0 +MICROPY_PY_ASYNC_AWAIT = 0 CFLAGS_INLINE_LIMIT = 35 + # Make more room. SUPEROPT_GC = 0 # Include these Python libraries in firmware. FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_RFM69 + diff --git a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk index 44606e340..f2e27d1e2 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk @@ -22,6 +22,8 @@ CIRCUITPY_SAMD = 0 CIRCUITPY_USB_MIDI = 0 CIRCUITPY_USB_HID = 0 CIRCUITPY_TOUCHIO = 0 +MICROPY_PY_ASYNC_AWAIT = 0 + CFLAGS_INLINE_LIMIT = 35 # Make more room. SUPEROPT_GC = 0 @@ -29,3 +31,4 @@ SUPEROPT_GC = 0 # Include these Python libraries in firmware. FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_RFM9x + diff --git a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk index 0345417a9..10705f280 100644 --- a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk @@ -9,6 +9,7 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 +MICROPY_PY_ASYNC_AWAIT = 0 SUPEROPT_GC = 0 @@ -21,3 +22,4 @@ ifeq ($(TRANSLATION), de_DE) RELEASE_NEEDS_CLEAN_BUILD = 1 CFLAGS_INLINE_LIMIT = 35 endif + diff --git a/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk b/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk index 1cc91a8df..b5e1ce69a 100644 --- a/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk @@ -24,3 +24,6 @@ SUPEROPT_GC = 0 FROZEN_MPY_DIRS += $(TOP)/frozen/pew-pewpew-standalone-10.x CFLAGS_BOARD = --param max-inline-insns-auto=15 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk index bedec87f4..b89bee482 100644 --- a/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk +++ b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/shirtty/mpconfigboard.mk b/ports/atmel-samd/boards/shirtty/mpconfigboard.mk index a04e09769..ed4960cd8 100644 --- a/ports/atmel-samd/boards/shirtty/mpconfigboard.mk +++ b/ports/atmel-samd/boards/shirtty/mpconfigboard.mk @@ -13,3 +13,6 @@ CIRCUITPY_I2CPERIPHERAL = 1 CIRCUITPY_TOUCHIO = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk index 22e2059a9..18b057a18 100644 --- a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk index a2bd577cd..c97207b21 100644 --- a/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk index 9460d0009..d9bde8183 100644 --- a/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk @@ -11,3 +11,6 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk index 735d42297..a65c570c7 100644 --- a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk @@ -9,6 +9,7 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 +MICROPY_PY_ASYNC_AWAIT = 0 SUPEROPT_GC = 0 @@ -22,3 +23,4 @@ RELEASE_NEEDS_CLEAN_BUILD = 1 CFLAGS_INLINE_LIMIT = 35 SUPEROPT_VM = 0 endif + diff --git a/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk b/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk index 402db7ebc..82d2768d8 100644 --- a/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk +++ b/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk @@ -17,6 +17,7 @@ CIRCUITPY_COUNTIO = 0 CIRCUITPY_RTC = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CPERIPHERAL = 0 +MICROPY_PY_ASYNC_AWAIT = 0 SUPEROPT_GC = 0 @@ -34,3 +35,4 @@ RELEASE_NEEDS_CLEAN_BUILD = 1 CFLAGS_INLINE_LIMIT = 35 SUPEROPT_VM = 0 endif + diff --git a/ports/atmel-samd/boards/uchip/mpconfigboard.mk b/ports/atmel-samd/boards/uchip/mpconfigboard.mk index d08690a15..7270effde 100644 --- a/ports/atmel-samd/boards/uchip/mpconfigboard.mk +++ b/ports/atmel-samd/boards/uchip/mpconfigboard.mk @@ -14,3 +14,4 @@ CIRCUITPY_FULL_BUILD = 0 CFLAGS_INLINE_LIMIT = 45 SUPEROPT_GC = 0 +MICROPY_PY_ASYNC_AWAIT = 0 diff --git a/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk b/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk index 9309fdce0..b08d36b59 100644 --- a/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk +++ b/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk @@ -28,3 +28,6 @@ CIRCUITPY_COUNTIO=0 # Include these Python libraries in firmware. FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SD + +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/nrf/boards/pca10100/mpconfigboard.mk b/ports/nrf/boards/pca10100/mpconfigboard.mk index f952983f5..6a6ca72ce 100644 --- a/ports/nrf/boards/pca10100/mpconfigboard.mk +++ b/ports/nrf/boards/pca10100/mpconfigboard.mk @@ -29,3 +29,5 @@ SUPEROPT_GC = 0 # Override optimization to keep binary small OPTIMIZATION_FLAGS = -Os +MICROPY_PY_ASYNC_AWAIT = 0 + diff --git a/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.mk b/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.mk index f66b2eaf7..7077766a3 100644 --- a/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.mk +++ b/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.mk @@ -6,3 +6,6 @@ USB_MANUFACTURER = "SparkFun Electronics" MCU_CHIP = nrf52840 INTERNAL_FLASH_FILESYSTEM = 1 + +MICROPY_PY_ASYNC_AWAIT = 0 + -- cgit v1.2.3 From 60deb321d1801ad86c9dfcfc09fd4c69eec1ef06 Mon Sep 17 00:00:00 2001 From: Targett363 Date: Sat, 10 Oct 2020 23:55:05 +0100 Subject: adding USB PID VID --- ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk | 4 ++-- ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk index 580caa71b..e307d7d62 100644 --- a/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk +++ b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk @@ -1,5 +1,5 @@ -USB_VID = 0x239A -USB_PID = 0x80A8 +USB_VID = 0x1209 +USB_PID = 0x0011 USB_PRODUCT = "Targett Module Clip w/Wroom" USB_MANUFACTURER = "Targett" diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk index 6832d2101..aff5ffd6c 100644 --- a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk +++ b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk @@ -1,5 +1,5 @@ -USB_VID = 0x239A -USB_PID = 0x80A6 +USB_VID = 0x1209 +USB_PID = 0x0012 USB_PRODUCT = "Targett Module Clip w/Wrover" USB_MANUFACTURER = "Targett" -- cgit v1.2.3 From 3c46e3a6aab8895f19302c4fe165d61d30f1a45e Mon Sep 17 00:00:00 2001 From: Kenny Date: Sun, 11 Oct 2020 08:16:36 -0700 Subject: Turn off async for circuitplayground express Firmware too large --- ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk | 1 + 1 file changed, 1 insertion(+) (limited to 'ports') diff --git a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk index 81391b953..13ec9e861 100644 --- a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk @@ -15,6 +15,7 @@ LONGINT_IMPL = MPZ CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CPERIPHERAL = 0 +MICROPY_PY_ASYNC_AWAIT = 0 SUPEROPT_GC = 0 CFLAGS_INLINE_LIMIT = 55 -- cgit v1.2.3 From 94beeabc515986e366de569e85d395ab2678ee3d Mon Sep 17 00:00:00 2001 From: Kenny <3454741+WarriorOfWire@users.noreply.github.com> Date: Sun, 11 Oct 2020 22:42:21 -0700 Subject: remove unnecessary board configuration and address feedback --- ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk | 1 - ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk | 1 - ports/atmel-samd/boards/datum_distance/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/datum_imu/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/datum_light/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/datum_weather/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk | 2 -- ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk | 2 -- ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk | 1 - ports/atmel-samd/boards/pewpew10/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/shirtty/mpconfigboard.mk | 3 --- .../atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk | 3 --- ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk | 1 - ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk | 1 - ports/atmel-samd/boards/uchip/mpconfigboard.mk | 1 - ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk | 3 --- ports/nrf/boards/pca10100/mpconfigboard.mk | 3 +-- ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.mk | 1 - py/circuitpy_mpconfig.mk | 4 +--- py/compile.c | 2 -- 30 files changed, 2 insertions(+), 72 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk index 2c0056847..d31d1f54a 100644 --- a/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk +++ b/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.mk @@ -10,4 +10,3 @@ INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 -MICROPY_PY_ASYNC_AWAIT = 0 diff --git a/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk index 230bce4f2..7eb83a123 100644 --- a/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk +++ b/ports/atmel-samd/boards/arduino_mkrzero/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk index 1d652737a..fd24edafa 100644 --- a/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk +++ b/ports/atmel-samd/boards/arduino_nano_33_iot/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk b/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk index e4d0916fa..a5722c9ad 100644 --- a/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk +++ b/ports/atmel-samd/boards/arduino_zero/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk b/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk index 47a543450..055e6b19e 100644 --- a/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/bast_pro_mini_m0/mpconfigboard.mk @@ -9,6 +9,3 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk b/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk index 201c9b142..892a5371e 100644 --- a/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk +++ b/ports/atmel-samd/boards/catwan_usbstick/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 CIRCUITPY_COUNTIO = 0 CIRCUITPY_ROTARYIO = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk index fa437bf36..178258b6c 100755 --- a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk @@ -34,4 +34,3 @@ RELEASE_NEEDS_CLEAN_BUILD = 1 CFLAGS_INLINE_LIMIT = 35 SUPEROPT_VM = 0 endif - diff --git a/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk b/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk index 365b935ee..ae05d32f2 100644 --- a/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk +++ b/ports/atmel-samd/boards/datum_distance/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk b/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk index f5900c8f7..6fd05f403 100644 --- a/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk +++ b/ports/atmel-samd/boards/datum_imu/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/datum_light/mpconfigboard.mk b/ports/atmel-samd/boards/datum_light/mpconfigboard.mk index 3cefa856f..d42a7869d 100644 --- a/ports/atmel-samd/boards/datum_light/mpconfigboard.mk +++ b/ports/atmel-samd/boards/datum_light/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk b/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk index 1293a5aaa..d92cbc71b 100644 --- a/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk +++ b/ports/atmel-samd/boards/datum_weather/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk index 0f784be8a..143910318 100644 --- a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk index b53508570..69ebdfc23 100644 --- a/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk index fe588b163..c33ab0740 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk @@ -21,7 +21,6 @@ CIRCUITPY_SAMD = 0 CIRCUITPY_USB_MIDI = 0 CIRCUITPY_USB_HID = 0 CIRCUITPY_TOUCHIO = 0 -MICROPY_PY_ASYNC_AWAIT = 0 CFLAGS_INLINE_LIMIT = 35 # Make more room. @@ -30,4 +29,3 @@ SUPEROPT_GC = 0 # Include these Python libraries in firmware. FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_RFM69 - diff --git a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk index f2e27d1e2..49b0ef5e3 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk @@ -22,7 +22,6 @@ CIRCUITPY_SAMD = 0 CIRCUITPY_USB_MIDI = 0 CIRCUITPY_USB_HID = 0 CIRCUITPY_TOUCHIO = 0 -MICROPY_PY_ASYNC_AWAIT = 0 CFLAGS_INLINE_LIMIT = 35 # Make more room. @@ -31,4 +30,3 @@ SUPEROPT_GC = 0 # Include these Python libraries in firmware. FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_RFM9x - diff --git a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk index 10705f280..e2604c89b 100644 --- a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk @@ -9,7 +9,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 -MICROPY_PY_ASYNC_AWAIT = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk b/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk index b5e1ce69a..1cc91a8df 100644 --- a/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pewpew10/mpconfigboard.mk @@ -24,6 +24,3 @@ SUPEROPT_GC = 0 FROZEN_MPY_DIRS += $(TOP)/frozen/pew-pewpew-standalone-10.x CFLAGS_BOARD = --param max-inline-insns-auto=15 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk index b89bee482..bedec87f4 100644 --- a/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk +++ b/ports/atmel-samd/boards/seeeduino_xiao/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/shirtty/mpconfigboard.mk b/ports/atmel-samd/boards/shirtty/mpconfigboard.mk index ed4960cd8..a04e09769 100644 --- a/ports/atmel-samd/boards/shirtty/mpconfigboard.mk +++ b/ports/atmel-samd/boards/shirtty/mpconfigboard.mk @@ -13,6 +13,3 @@ CIRCUITPY_I2CPERIPHERAL = 1 CIRCUITPY_TOUCHIO = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk index 18b057a18..22e2059a9 100644 --- a/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sparkfun_qwiic_micro_no_flash/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk index c97207b21..a2bd577cd 100644 --- a/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sparkfun_samd21_dev/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk index d9bde8183..9460d0009 100644 --- a/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sparkfun_samd21_mini/mpconfigboard.mk @@ -11,6 +11,3 @@ LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 SUPEROPT_GC = 0 - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk index a65c570c7..4cd50a030 100644 --- a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk @@ -9,7 +9,6 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 -MICROPY_PY_ASYNC_AWAIT = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk b/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk index 82d2768d8..7eda151f3 100644 --- a/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk +++ b/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk @@ -35,4 +35,3 @@ RELEASE_NEEDS_CLEAN_BUILD = 1 CFLAGS_INLINE_LIMIT = 35 SUPEROPT_VM = 0 endif - diff --git a/ports/atmel-samd/boards/uchip/mpconfigboard.mk b/ports/atmel-samd/boards/uchip/mpconfigboard.mk index 7270effde..d08690a15 100644 --- a/ports/atmel-samd/boards/uchip/mpconfigboard.mk +++ b/ports/atmel-samd/boards/uchip/mpconfigboard.mk @@ -14,4 +14,3 @@ CIRCUITPY_FULL_BUILD = 0 CFLAGS_INLINE_LIMIT = 45 SUPEROPT_GC = 0 -MICROPY_PY_ASYNC_AWAIT = 0 diff --git a/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk b/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk index b08d36b59..9309fdce0 100644 --- a/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk +++ b/ports/atmel-samd/boards/xinabox_cs11/mpconfigboard.mk @@ -28,6 +28,3 @@ CIRCUITPY_COUNTIO=0 # Include these Python libraries in firmware. FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_SD - -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/nrf/boards/pca10100/mpconfigboard.mk b/ports/nrf/boards/pca10100/mpconfigboard.mk index 6a6ca72ce..86ba65454 100644 --- a/ports/nrf/boards/pca10100/mpconfigboard.mk +++ b/ports/nrf/boards/pca10100/mpconfigboard.mk @@ -24,10 +24,9 @@ CIRCUITPY_RTC = 1 CIRCUITPY_SDCARDIO = 0 CIRCUITPY_TOUCHIO = 0 CIRCUITPY_ULAB = 0 +MICROPY_PY_ASYNC_AWAIT = 0 SUPEROPT_GC = 0 # Override optimization to keep binary small OPTIMIZATION_FLAGS = -Os -MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.mk b/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.mk index 7077766a3..eb28ef5ea 100644 --- a/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.mk +++ b/ports/nrf/boards/sparkfun_nrf52840_mini/mpconfigboard.mk @@ -8,4 +8,3 @@ MCU_CHIP = nrf52840 INTERNAL_FLASH_FILESYSTEM = 1 MICROPY_PY_ASYNC_AWAIT = 0 - diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk index ba75d29a5..91850448d 100644 --- a/py/circuitpy_mpconfig.mk +++ b/py/circuitpy_mpconfig.mk @@ -32,6 +32,7 @@ CIRCUITPY_FULL_BUILD ?= 1 CFLAGS += -DCIRCUITPY_FULL_BUILD=$(CIRCUITPY_FULL_BUILD) +# async/await language keyword support MICROPY_PY_ASYNC_AWAIT ?= $(CIRCUITPY_FULL_BUILD) CFLAGS += -DMICROPY_PY_ASYNC_AWAIT=$(MICROPY_PY_ASYNC_AWAIT) @@ -292,6 +293,3 @@ CFLAGS += -DCIRCUITPY_WIFI=$(CIRCUITPY_WIFI) # Enabled micropython.native decorator (experimental) CIRCUITPY_ENABLE_MPY_NATIVE ?= 0 CFLAGS += -DCIRCUITPY_ENABLE_MPY_NATIVE=$(CIRCUITPY_ENABLE_MPY_NATIVE) - -# async/await language keyword support -MICROPY_PY_ASYNC_AWAIT ?= $(CIRCUITPY_FULL_BUILD) diff --git a/py/compile.c b/py/compile.c index 45a586594..04bcf5bc1 100644 --- a/py/compile.c +++ b/py/compile.c @@ -40,8 +40,6 @@ #if MICROPY_ENABLE_COMPILER -#define DEBUG_PRINT(...) mp_printf(&mp_plat_print __VA_OPT__(,) __VA_ARGS__) - // TODO need to mangle __attr names #define INVALID_LABEL (0xffff) -- cgit v1.2.3 From 10badd93c3ce4d2cdf074fe03bf23f9e481aa03e Mon Sep 17 00:00:00 2001 From: Kenny <3454741+WarriorOfWire@users.noreply.github.com> Date: Sun, 11 Oct 2020 22:52:27 -0700 Subject: leftover newlines --- ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk | 1 - ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk | 1 - 2 files changed, 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk index e2604c89b..0345417a9 100644 --- a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.mk @@ -21,4 +21,3 @@ ifeq ($(TRANSLATION), de_DE) RELEASE_NEEDS_CLEAN_BUILD = 1 CFLAGS_INLINE_LIMIT = 35 endif - diff --git a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk index 4cd50a030..735d42297 100644 --- a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.mk @@ -22,4 +22,3 @@ RELEASE_NEEDS_CLEAN_BUILD = 1 CFLAGS_INLINE_LIMIT = 35 SUPEROPT_VM = 0 endif - -- cgit v1.2.3 From 8ddbebd2c1500ceba4b6628882f5a128743d323d Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 12 Oct 2020 13:35:15 -0500 Subject: esp32s2: fix build after qstr rule changes --- ports/esp32s2/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index a97ab0b00..8d891edd0 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -269,7 +269,7 @@ menuconfig: $(BUILD)/esp-idf/config $(Q)grep -Fvxf $(DEBUG_SDKCONFIG) -f $(FLASH_SDKCONFIG) $(BUILD)/sdkconfig.diff > boards/$(BOARD)/sdkconfig # qstr builds include headers so we need to make sure they are up to date -$(HEADER_BUILD)/qstr.i.last: | $(BUILD)/esp-idf/config/sdkconfig.h +$(HEADER_BUILD)/qstr.split: | $(BUILD)/esp-idf/config/sdkconfig.h ESP_IDF_COMPONENTS_LINK = freertos log hal esp_system esp_adc_cal esp32s2 bootloader_support pthread esp_timer vfs spi_flash app_update esp_common esp32s2 heap newlib driver xtensa soc esp_ringbuf esp_wifi esp_event wpa_supplicant mbedtls efuse nvs_flash esp_netif lwip esp_rom esp-tls -- cgit v1.2.3 From a0e5e961c594e26713aa9e255bf6e43214bf42a4 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Mon, 12 Oct 2020 17:43:13 -0700 Subject: Fix STM RTC read so it's atomic. Fixes #3376 --- ports/stm/supervisor/port.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/stm/supervisor/port.c b/ports/stm/supervisor/port.c index bb304a317..79e4584b0 100644 --- a/ports/stm/supervisor/port.c +++ b/ports/stm/supervisor/port.c @@ -190,6 +190,7 @@ safe_mode_t port_init(void) { _hrtc.Init.OutPut = RTC_OUTPUT_DISABLE; HAL_RTC_Init(&_hrtc); + HAL_RTCEx_EnableBypassShadow(&_hrtc); HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn); // Turn off SysTick @@ -328,9 +329,23 @@ volatile uint32_t cached_date = 0; volatile uint32_t seconds_to_minute = 0; volatile uint32_t cached_hours_minutes = 0; uint64_t port_get_raw_ticks(uint8_t* subticks) { - uint32_t subseconds = rtc_clock_frequency - (uint32_t)(RTC->SSR); + // Disable IRQs to ensure we read all of the RTC registers as close in time as possible. Read + // SSR twice to make sure we didn't read across a tick. + __disable_irq(); + uint32_t first_ssr = (uint32_t)(RTC->SSR); uint32_t time = (uint32_t)(RTC->TR & RTC_TR_RESERVED_MASK); uint32_t date = (uint32_t)(RTC->DR & RTC_DR_RESERVED_MASK); + uint32_t ssr = (uint32_t)(RTC->SSR); + while (ssr != first_ssr) { + first_ssr = ssr; + time = (uint32_t)(RTC->TR & RTC_TR_RESERVED_MASK); + date = (uint32_t)(RTC->DR & RTC_DR_RESERVED_MASK); + ssr = (uint32_t)(RTC->SSR); + } + __enable_irq(); + + uint32_t subseconds = rtc_clock_frequency - 1 - ssr; + if (date != cached_date) { uint32_t year = (uint8_t)((date & (RTC_DR_YT | RTC_DR_YU)) >> 16U); uint8_t month = (uint8_t)((date & (RTC_DR_MT | RTC_DR_MU)) >> 8U); @@ -349,6 +364,7 @@ uint64_t port_get_raw_ticks(uint8_t* subticks) { hours = (uint8_t)RTC_Bcd2ToByte(hours); minutes = (uint8_t)RTC_Bcd2ToByte(minutes); seconds_to_minute = 60 * (60 * hours + minutes); + cached_hours_minutes = hours_minutes; } uint8_t seconds = (uint8_t)(time & (RTC_TR_ST | RTC_TR_SU)); seconds = (uint8_t)RTC_Bcd2ToByte(seconds); -- cgit v1.2.3 From 379e73af2e55b1f0c517883360e29d5dbc27a20b Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Mon, 12 Oct 2020 18:36:18 -0700 Subject: Finer grained, per port tick locking Fixes #3504 hopefully. --- ports/atmel-samd/common-hal/pulseio/PulseIn.h | 1 - ports/atmel-samd/supervisor/port.c | 37 ++++++++++++++++++--------- ports/litex/supervisor/port.c | 6 ++++- ports/nrf/supervisor/port.c | 6 ++++- supervisor/shared/tick.c | 2 -- 5 files changed, 35 insertions(+), 17 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.h b/ports/atmel-samd/common-hal/pulseio/PulseIn.h index 99358178f..b91bbd703 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.h +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.h @@ -51,7 +51,6 @@ void pulsein_reset(void); void pulsein_interrupt_handler(uint8_t channel); void pulsein_timer_interrupt_handler(uint8_t index); #ifdef SAMD21 -void rtc_set_continuous(void); void rtc_start_pulsein(void); void rtc_end_pulsein(void); #endif diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c index e69062296..6686d794c 100644 --- a/ports/atmel-samd/supervisor/port.c +++ b/ports/atmel-samd/supervisor/port.c @@ -96,19 +96,21 @@ #endif volatile bool hold_interrupt = false; #ifdef SAMD21 +static void rtc_set_continuous(bool continuous) { + while (RTC->MODE0.STATUS.bit.SYNCBUSY); + // TODO: DaveP: Do we need the RREQ here? + RTC->MODE0.READREQ.reg = RTC_READREQ_RREQ | (continuous ? RTC_READREQ_RCONT : 0) | 0x0010; + while (RTC->MODE0.STATUS.bit.SYNCBUSY); +} + void rtc_start_pulsein(void) { - rtc_set_continuous(); + rtc_set_continuous(true); hold_interrupt = true; } void rtc_end_pulsein(void) { hold_interrupt = false; -} - -void rtc_set_continuous(void) { - while (RTC->MODE0.STATUS.bit.SYNCBUSY); - RTC->MODE0.READREQ.reg = RTC_READREQ_RREQ | RTC_READREQ_RCONT | 0x0010; - while (RTC->MODE0.STATUS.bit.SYNCBUSY); + rtc_set_continuous(false); } #endif @@ -430,19 +432,28 @@ uint32_t port_get_saved_word(void) { static volatile uint64_t overflowed_ticks = 0; static volatile bool _ticks_enabled = false; -static uint32_t _get_count(void) { +static uint32_t _get_count(uint32_t* overflow_count) { #ifdef SAM_D5X_E5X while ((RTC->MODE0.SYNCBUSY.reg & (RTC_MODE0_SYNCBUSY_COUNTSYNC | RTC_MODE0_SYNCBUSY_COUNT)) != 0) {} #endif #ifdef SAMD21 + // Request a read so we don't stall the bus later. See section 14.3.1.5 Read Request + RTC->MODE0.READREQ.reg = RTC_READREQ_RREQ | 0x0010; while (RTC->MODE0.STATUS.bit.SYNCBUSY != 0) {} #endif + // Disable interrupts so we can grab the count and the overflow. + common_hal_mcu_disable_interrupts(); + uint32_t count = RTC->MODE0.COUNT.reg; + if (overflow_count != NULL) { + *overflow_count = overflowed_ticks; + } + common_hal_mcu_enable_interrupts(); - return RTC->MODE0.COUNT.reg; + return count; } static void _port_interrupt_after_ticks(uint32_t ticks) { - uint32_t current_ticks = _get_count(); + uint32_t current_ticks = _get_count(NULL); if (ticks > 1 << 28) { // We'll interrupt sooner with an overflow. return; @@ -490,12 +501,13 @@ void RTC_Handler(void) { } uint64_t port_get_raw_ticks(uint8_t* subticks) { - uint32_t current_ticks = _get_count(); + uint32_t overflow_count; + uint32_t current_ticks = _get_count(&overflow_count); if (subticks != NULL) { *subticks = (current_ticks % 16) * 2; } - return overflowed_ticks + current_ticks / 16; + return overflow_count + current_ticks / 16; } // Enable 1/1024 second tick. @@ -505,6 +517,7 @@ void port_enable_tick(void) { RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_PER2; #endif #ifdef SAMD21 + // TODO: Switch to using the PER *event* from the RTC to generate an interrupt via EVSYS. _ticks_enabled = true; _port_interrupt_after_ticks(1); #endif diff --git a/ports/litex/supervisor/port.c b/ports/litex/supervisor/port.c index e55eb49f0..02617b9af 100644 --- a/ports/litex/supervisor/port.c +++ b/ports/litex/supervisor/port.c @@ -128,7 +128,11 @@ uint32_t port_get_saved_word(void) { } uint64_t port_get_raw_ticks(uint8_t* subticks) { - return raw_ticks; + // Reading 64 bits may take two loads, so turn of interrupts while we do it. + irq_setie(false); + uint64_t raw_tick_snapshot = raw_ticks; + irq_setie(true); + return raw_tick_snapshot; } // Enable 1/1024 second tick. diff --git a/ports/nrf/supervisor/port.c b/ports/nrf/supervisor/port.c index bc8b47be7..493de43e0 100644 --- a/ports/nrf/supervisor/port.c +++ b/ports/nrf/supervisor/port.c @@ -274,11 +274,15 @@ uint32_t port_get_saved_word(void) { } uint64_t port_get_raw_ticks(uint8_t* subticks) { + common_hal_mcu_disable_interrupts(); uint32_t rtc = nrfx_rtc_counter_get(&rtc_instance); + uint32_t overflow_count = overflow_tracker.overflowed_ticks; + common_hal_mcu_enable_interrupts(); + if (subticks != NULL) { *subticks = (rtc % 32); } - return overflow_tracker.overflowed_ticks + rtc / 32; + return overflow_count + rtc / 32; } // Enable 1/1024 second tick. diff --git a/supervisor/shared/tick.c b/supervisor/shared/tick.c index 91ffa307d..a2855a570 100644 --- a/supervisor/shared/tick.c +++ b/supervisor/shared/tick.c @@ -125,9 +125,7 @@ void supervisor_tick(void) { uint64_t supervisor_ticks_ms64() { uint64_t result; - common_hal_mcu_disable_interrupts(); result = port_get_raw_ticks(NULL); - common_hal_mcu_enable_interrupts(); result = result * 1000 / 1024; return result; } -- cgit v1.2.3 From ceb531086ed2e5d1e2ee1f1439820a5145fd981e Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Tue, 13 Oct 2020 14:22:02 +0530 Subject: Add method to set custom hostname --- locale/circuitpython.pot | 8 ++++++-- ports/esp32s2/boards/microdev_micro_s2/sdkconfig | 5 +++++ ports/esp32s2/common-hal/wifi/Radio.c | 4 ++++ shared-bindings/wifi/Radio.c | 22 ++++++++++++++++++++++ shared-bindings/wifi/Radio.h | 3 ++- 5 files changed, 39 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index fc564feea..76681d209 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-10-10 23:49-0700\n" +"POT-Creation-Date: 2020-10-12 14:16+0530\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -947,6 +947,10 @@ msgstr "" msgid "Hardware in use, try alternative pins" msgstr "" +#: shared-bindings/wifi/Radio.c +msgid "Hostname must be between 1 and 63 characters" +msgstr "" + #: extmod/vfs_posix_file.c py/objstringio.c msgid "I/O operation on closed file" msgstr "" @@ -1026,6 +1030,7 @@ msgstr "" msgid "Invalid BSSID" msgstr "" +#: ports/esp32s2/common-hal/analogio/AnalogOut.c #: ports/stm/common-hal/analogio/AnalogOut.c msgid "Invalid DAC pin supplied" msgstr "" @@ -1237,7 +1242,6 @@ msgid "No CCCD for this Characteristic" msgstr "" #: ports/atmel-samd/common-hal/analogio/AnalogOut.c -#: ports/esp32s2/common-hal/analogio/AnalogOut.c #: ports/stm/common-hal/analogio/AnalogOut.c msgid "No DAC on chip" msgstr "" diff --git a/ports/esp32s2/boards/microdev_micro_s2/sdkconfig b/ports/esp32s2/boards/microdev_micro_s2/sdkconfig index 67ac6d2f3..4b8cc5cc3 100644 --- a/ports/esp32s2/boards/microdev_micro_s2/sdkconfig +++ b/ports/esp32s2/boards/microdev_micro_s2/sdkconfig @@ -32,3 +32,8 @@ CONFIG_SPIRAM_MEMTEST=y # CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set # end of SPI RAM config +# +# LWIP +# +CONFIG_LWIP_LOCAL_HOSTNAME="microS2" +# end of LWIP diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index b62ad611b..61d63e1f2 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -104,6 +104,10 @@ void common_hal_wifi_radio_stop_scanning_networks(wifi_radio_obj_t *self) { self->current_scan = NULL; } +void common_hal_wifi_radio_set_hostname(wifi_radio_obj_t *self, const char *hostname) { + esp_netif_set_hostname(self->netif, hostname); +} + wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout, uint8_t* bssid, size_t bssid_len) { // check enabled start_station(self); diff --git a/shared-bindings/wifi/Radio.c b/shared-bindings/wifi/Radio.c index 928f21da9..9c774e141 100644 --- a/shared-bindings/wifi/Radio.c +++ b/shared-bindings/wifi/Radio.c @@ -102,6 +102,26 @@ STATIC mp_obj_t wifi_radio_stop_scanning_networks(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_stop_scanning_networks_obj, wifi_radio_stop_scanning_networks); +//| def set_hostname(self, hostname: ReadableBuffer) -> None: +//| """Sets hostname for wifi interface. When the hostname is altered after interface started/connected +//| the changes would only be reflected once the interface restarts/reconnects.""" +//| ... +//| +STATIC mp_obj_t wifi_radio_set_hostname(mp_obj_t self_in, mp_obj_t hostname_in) { + mp_buffer_info_t hostname; + mp_get_buffer_raise(hostname_in, &hostname, MP_BUFFER_READ); + + if (hostname.len < 1 || hostname.len > 63) { + mp_raise_ValueError(translate("Hostname must be between 1 and 63 characters")); + } + + wifi_radio_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_wifi_radio_set_hostname(self, hostname.buf); + + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_2(wifi_radio_set_hostname_obj, wifi_radio_set_hostname); + //| def connect(self, ssid: ReadableBuffer, password: ReadableBuffer = b"", *, channel: Optional[int] = 0, timeout: Optional[float] = None) -> bool: //| """Connects to the given ssid and waits for an ip address. Reconnections are handled //| automatically once one connection succeeds.""" @@ -216,6 +236,8 @@ STATIC const mp_rom_map_elem_t wifi_radio_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_start_scanning_networks), MP_ROM_PTR(&wifi_radio_start_scanning_networks_obj) }, { MP_ROM_QSTR(MP_QSTR_stop_scanning_networks), MP_ROM_PTR(&wifi_radio_stop_scanning_networks_obj) }, + { MP_ROM_QSTR(MP_QSTR_set_hostname), MP_ROM_PTR(&wifi_radio_set_hostname_obj) }, + { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&wifi_radio_connect_obj) }, // { MP_ROM_QSTR(MP_QSTR_connect_to_enterprise), MP_ROM_PTR(&wifi_radio_connect_to_enterprise_obj) }, diff --git a/shared-bindings/wifi/Radio.h b/shared-bindings/wifi/Radio.h index b5341d51c..4226ae2a9 100644 --- a/shared-bindings/wifi/Radio.h +++ b/shared-bindings/wifi/Radio.h @@ -35,7 +35,6 @@ const mp_obj_type_t wifi_radio_type; - typedef enum { WIFI_RADIO_ERROR_NONE, WIFI_RADIO_ERROR_UNKNOWN, @@ -46,6 +45,8 @@ typedef enum { extern bool common_hal_wifi_radio_get_enabled(wifi_radio_obj_t *self); extern void common_hal_wifi_radio_set_enabled(wifi_radio_obj_t *self, bool enabled); +extern void common_hal_wifi_radio_set_hostname(wifi_radio_obj_t *self, const char *hostname); + extern mp_obj_t common_hal_wifi_radio_get_mac_address(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_start_scanning_networks(wifi_radio_obj_t *self); -- cgit v1.2.3 From 2bc40bcadf36d27d2807ac155f185e6cc55e9ecb Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Tue, 13 Oct 2020 10:15:34 -0700 Subject: Remove readreq when changing continuous --- ports/atmel-samd/supervisor/port.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c index 6686d794c..d65d09825 100644 --- a/ports/atmel-samd/supervisor/port.c +++ b/ports/atmel-samd/supervisor/port.c @@ -98,8 +98,7 @@ volatile bool hold_interrupt = false; #ifdef SAMD21 static void rtc_set_continuous(bool continuous) { while (RTC->MODE0.STATUS.bit.SYNCBUSY); - // TODO: DaveP: Do we need the RREQ here? - RTC->MODE0.READREQ.reg = RTC_READREQ_RREQ | (continuous ? RTC_READREQ_RCONT : 0) | 0x0010; + RTC->MODE0.READREQ.reg = (continuous ? RTC_READREQ_RCONT : 0) | 0x0010; while (RTC->MODE0.STATUS.bit.SYNCBUSY); } -- cgit v1.2.3 From 2b33968a1e4bf72017c983e1d92c80c73b071745 Mon Sep 17 00:00:00 2001 From: Brian Dean Date: Tue, 13 Oct 2020 16:46:25 -0400 Subject: Add new board to atmel-samd port: bdmicro_vina_d51 --- ports/atmel-samd/boards/bdmicro_vina_d51/board.c | 48 +++++++++++++ .../boards/bdmicro_vina_d51/mpconfigboard.h | 28 ++++++++ .../boards/bdmicro_vina_d51/mpconfigboard.mk | 12 ++++ ports/atmel-samd/boards/bdmicro_vina_d51/pins.c | 82 ++++++++++++++++++++++ 4 files changed, 170 insertions(+) create mode 100644 ports/atmel-samd/boards/bdmicro_vina_d51/board.c create mode 100644 ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/bdmicro_vina_d51/pins.c (limited to 'ports') diff --git a/ports/atmel-samd/boards/bdmicro_vina_d51/board.c b/ports/atmel-samd/boards/bdmicro_vina_d51/board.c new file mode 100644 index 000000000..bd63baa6f --- /dev/null +++ b/ports/atmel-samd/boards/bdmicro_vina_d51/board.c @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" + +void board_init(void) +{ + // struct port_config pin_conf; + // port_get_config_defaults(&pin_conf); + // + // pin_conf.direction = PORT_PIN_DIR_OUTPUT; + // port_pin_set_config(MICROPY_HW_LED_TX, &pin_conf); + // port_pin_set_output_level(MICROPY_HW_LED_TX, true); + // + // port_pin_set_config(MICROPY_HW_LED_RX, &pin_conf); + // port_pin_set_output_level(MICROPY_HW_LED_RX, true); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.h b/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.h new file mode 100644 index 000000000..6bc9bb706 --- /dev/null +++ b/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.h @@ -0,0 +1,28 @@ +#define MICROPY_HW_BOARD_NAME "BDMICRO VINA-D51" +#define MICROPY_HW_MCU_NAME "samd51n20" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// These are pins not to reset. +// Don't reset QSPI data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +#define MICROPY_PORT_B (PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SDA (&pin_PB02) +#define DEFAULT_I2C_BUS_SCL (&pin_PB03) +#define DEFAULT_SPI_BUS_MISO (&pin_PB23) +#define DEFAULT_UART_BUS_TX (&pin_PB24) +#define DEFAULT_UART_BUS_RX (&pin_PB25) +#define DEFAULT_SPI_BUS_MOSI (&pin_PC27) +#define DEFAULT_SPI_BUS_SCK (&pin_PC28) +#define MICROPY_HW_LED_STATUS (&pin_PA15) +#define MICROPY_HW_LED_RX (&pin_PC05) +#define MICROPY_HW_LED_TX (&pin_PC06) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.mk b/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.mk new file mode 100644 index 000000000..f1b2f4c1d --- /dev/null +++ b/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.mk @@ -0,0 +1,12 @@ +USB_VID = 0x31e2 +USB_PID = 0x2011 +USB_PRODUCT = "VINA-D51" +USB_MANUFACTURER = "BDMICRO LLC" + +CHIP_VARIANT = SAMD51N20A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "MX25L51245G","GD25S512MD" +LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c b/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c new file mode 100644 index 000000000..d0006393c --- /dev/null +++ b/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c @@ -0,0 +1,82 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PC01) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PC10) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PC11) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PC20) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC21) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB31) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_DAC0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_ESP01_EN), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_ESP01_GPIO0), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_UART3_RTS), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_ESP01_GPIO2), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_UART3_CTS), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_ESP01_RESET), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_ESP01_RX), MP_ROM_PTR(&pin_PB21) }, + { MP_ROM_QSTR(MP_QSTR_UART3_RX), MP_ROM_PTR(&pin_PB21) }, + { MP_ROM_QSTR(MP_QSTR_ESP01_TX), MP_ROM_PTR(&pin_PB20) }, + { MP_ROM_QSTR(MP_QSTR_UART3_TX), MP_ROM_PTR(&pin_PB20) }, + { MP_ROM_QSTR(MP_QSTR_I2C_SCL), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_I2C_SDA), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_I2S_FS-0), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_I2S_FS_1), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_I2S_MCK_0), MP_ROM_PTR(&pin_PB17) }, + { MP_ROM_QSTR(MP_QSTR_I2S_MCK_1), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_I2S_SCK_0), MP_ROM_PTR(&pin_PB16) }, + { MP_ROM_QSTR(MP_QSTR_I2S_SCK_1), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_I2S_SDI), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_I2S_SDO), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_LED_B), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_LED_STATUS), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_PB18) }, + { MP_ROM_QSTR(MP_QSTR_LED_R), MP_ROM_PTR(&pin_PB19) }, + { MP_ROM_QSTR(MP_QSTR_LED_RX), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_LED_TX), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_RS485_RE), MP_ROM_PTR(&pin_PC15) }, + { MP_ROM_QSTR(MP_QSTR_RS485_RX), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_RS485_TE), MP_ROM_PTR(&pin_PC14) }, + { MP_ROM_QSTR(MP_QSTR_RS485_TX), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_SPI_MISO), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB23) }, + { MP_ROM_QSTR(MP_QSTR_SPI_MOSI), MP_ROM_PTR(&pin_PC27) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PC27) }, + { MP_ROM_QSTR(MP_QSTR_SPI_SCK), MP_ROM_PTR(&pin_PC28) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PC28) }, + { MP_ROM_QSTR(MP_QSTR_SPI_SS), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_UART1_CTS), MP_ROM_PTR(&pin_PC19) }, + { MP_ROM_QSTR(MP_QSTR_UART1_RTS), MP_ROM_PTR(&pin_PC18) }, + { MP_ROM_QSTR(MP_QSTR_UART1_RX), MP_ROM_PTR(&pin_PC17) }, + { MP_ROM_QSTR(MP_QSTR_UART1_TX), MP_ROM_PTR(&pin_PC16) }, + { MP_ROM_QSTR(MP_QSTR_UART2_RX), MP_ROM_PTR(&pin_PB25) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB25) }, + { MP_ROM_QSTR(MP_QSTR_UART2_TX), MP_ROM_PTR(&pin_PB24) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB24) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From 56427d9abe7d905da7c11a3d935481bea23a78ff Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Tue, 13 Oct 2020 14:02:29 -0700 Subject: Fix stm sleep too long --- ports/stm/supervisor/port.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/stm/supervisor/port.c b/ports/stm/supervisor/port.c index 79e4584b0..a8aab00ff 100644 --- a/ports/stm/supervisor/port.c +++ b/ports/stm/supervisor/port.c @@ -423,7 +423,7 @@ void port_interrupt_after_ticks(uint32_t ticks) { alarm.AlarmMask = RTC_ALARMMASK_ALL; } - alarm.AlarmTime.SubSeconds = rtc_clock_frequency - + alarm.AlarmTime.SubSeconds = rtc_clock_frequency - 1 - ((raw_ticks % 1024) * 32); alarm.AlarmTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE; alarm.AlarmTime.StoreOperation = RTC_STOREOPERATION_SET; -- cgit v1.2.3 From 4270061db491bae1e7cca9ca2cbed5db70f9062e Mon Sep 17 00:00:00 2001 From: gamblor21 Date: Tue, 13 Oct 2020 18:52:27 -0500 Subject: Moved ORDEREDDICT define to central location --- ports/atmel-samd/mpconfigport.h | 2 -- ports/litex/mpconfigport.h | 1 - ports/mimxrt10xx/mpconfigport.h | 1 - ports/nrf/mpconfigport.h | 1 - ports/stm/mpconfigport.h | 1 - ports/unix/mpconfigport.h | 1 - py/circuitpy_mpconfig.h | 1 + 7 files changed, 1 insertion(+), 7 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h index f185142e4..afe1cc4c6 100644 --- a/ports/atmel-samd/mpconfigport.h +++ b/ports/atmel-samd/mpconfigport.h @@ -43,7 +43,6 @@ #define MICROPY_PY_SYS_PLATFORM "Atmel SAMD21" #define SPI_FLASH_MAX_BAUDRATE 8000000 #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (0) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) #define MICROPY_PY_FUNCTION_ATTRS (0) // MICROPY_PY_UJSON depends on MICROPY_PY_IO #define MICROPY_PY_IO (0) @@ -81,7 +80,6 @@ #endif #define SPI_FLASH_MAX_BAUDRATE 24000000 #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (1) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) #define MICROPY_PY_FUNCTION_ATTRS (1) // MICROPY_PY_UJSON depends on MICROPY_PY_IO #define MICROPY_PY_IO (1) diff --git a/ports/litex/mpconfigport.h b/ports/litex/mpconfigport.h index fcf9d3b73..a7caf8526 100644 --- a/ports/litex/mpconfigport.h +++ b/ports/litex/mpconfigport.h @@ -30,7 +30,6 @@ #define CIRCUITPY_INTERNAL_NVM_SIZE (0) #define MICROPY_NLR_THUMB (0) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) #define MICROPY_PY_UBINASCII (1) #define MICROPY_PY_UJSON (1) diff --git a/ports/mimxrt10xx/mpconfigport.h b/ports/mimxrt10xx/mpconfigport.h index 7e7df0123..7496256d0 100644 --- a/ports/mimxrt10xx/mpconfigport.h +++ b/ports/mimxrt10xx/mpconfigport.h @@ -40,7 +40,6 @@ extern uint8_t _ld_default_stack_size; // 20kiB stack #define CIRCUITPY_DEFAULT_STACK_SIZE ((uint32_t) &_ld_default_stack_size) #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (0) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) #define MICROPY_PY_FUNCTION_ATTRS (0) #define MICROPY_PY_IO (1) #define MICROPY_PY_UJSON (1) diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h index 36a9819dc..4ed42cd82 100644 --- a/ports/nrf/mpconfigport.h +++ b/ports/nrf/mpconfigport.h @@ -34,7 +34,6 @@ #include "nrf_sdm.h" // for SD_FLASH_SIZE #include "peripherals/nrf/nvm.h" // for FLASH_PAGE_SIZE -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) #define MICROPY_PY_FUNCTION_ATTRS (1) #define MICROPY_PY_IO (1) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) diff --git a/ports/stm/mpconfigport.h b/ports/stm/mpconfigport.h index e054ffbb5..9489b4765 100644 --- a/ports/stm/mpconfigport.h +++ b/ports/stm/mpconfigport.h @@ -30,7 +30,6 @@ #include -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) #define MICROPY_PY_FUNCTION_ATTRS (1) #define MICROPY_PY_IO (1) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) diff --git a/ports/unix/mpconfigport.h b/ports/unix/mpconfigport.h index 3ae4ff786..d6bbad9ce 100644 --- a/ports/unix/mpconfigport.h +++ b/ports/unix/mpconfigport.h @@ -99,7 +99,6 @@ #define MICROPY_PY_SYS_STDFILES (1) #define MICROPY_PY_SYS_EXC_INFO (1) #define MICROPY_PY_COLLECTIONS_DEQUE (1) -#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) #ifndef MICROPY_PY_MATH_SPECIAL_FUNCTIONS #define MICROPY_PY_MATH_SPECIAL_FUNCTIONS (1) #endif diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 0583ae1c9..a3ffe52f6 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -195,6 +195,7 @@ typedef long mp_off_t; #define MICROPY_PY_BUILTINS_STR_PARTITION (CIRCUITPY_FULL_BUILD) #define MICROPY_PY_BUILTINS_STR_SPLITLINES (CIRCUITPY_FULL_BUILD) #define MICROPY_PY_UERRNO (CIRCUITPY_FULL_BUILD) +#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (CIRCUITPY_FULL_BUILD) // Opposite setting is deliberate. #define MICROPY_PY_UERRNO_ERRORCODE (!CIRCUITPY_FULL_BUILD) #ifndef MICROPY_PY_URE -- cgit v1.2.3 From 18fbff4f57e0c0b25ecaa3e1064c71b7a09f320b Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Wed, 14 Oct 2020 11:11:59 +0530 Subject: Update wifi hostname method --- ports/esp32s2/common-hal/wifi/Radio.c | 9 +++++++++ shared-bindings/wifi/Radio.c | 23 +++++++++++++++++------ shared-bindings/wifi/Radio.h | 1 + 3 files changed, 27 insertions(+), 6 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index 61d63e1f2..5e349c09d 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -104,6 +104,15 @@ void common_hal_wifi_radio_stop_scanning_networks(wifi_radio_obj_t *self) { self->current_scan = NULL; } +mp_obj_t common_hal_wifi_radio_get_hostname(wifi_radio_obj_t *self) { + const char *hostname = NULL; + esp_netif_get_hostname(self->netif, &hostname); + if (hostname == NULL) { + return mp_const_none; + } + return mp_obj_new_str(hostname, strlen(hostname)); +} + void common_hal_wifi_radio_set_hostname(wifi_radio_obj_t *self, const char *hostname) { esp_netif_set_hostname(self->netif, hostname); } diff --git a/shared-bindings/wifi/Radio.c b/shared-bindings/wifi/Radio.c index 9c774e141..481294463 100644 --- a/shared-bindings/wifi/Radio.c +++ b/shared-bindings/wifi/Radio.c @@ -50,7 +50,6 @@ //| STATIC mp_obj_t wifi_radio_get_enabled(mp_obj_t self) { return mp_obj_new_bool(common_hal_wifi_radio_get_enabled(self)); - } MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_enabled_obj, wifi_radio_get_enabled); @@ -102,11 +101,16 @@ STATIC mp_obj_t wifi_radio_stop_scanning_networks(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_stop_scanning_networks_obj, wifi_radio_stop_scanning_networks); -//| def set_hostname(self, hostname: ReadableBuffer) -> None: -//| """Sets hostname for wifi interface. When the hostname is altered after interface started/connected -//| the changes would only be reflected once the interface restarts/reconnects.""" -//| ... +//| hostname: ReadableBuffer +//| """Hostname for wifi interface. When the hostname is altered after interface started/connected +//| the changes would only be reflected once the interface restarts/reconnects.""" //| +STATIC mp_obj_t wifi_radio_get_hostname(mp_obj_t self_in) { + wifi_radio_obj_t *self = MP_OBJ_TO_PTR(self_in); + return common_hal_wifi_radio_get_hostname(self); +} +MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_hostname_obj, wifi_radio_get_hostname); + STATIC mp_obj_t wifi_radio_set_hostname(mp_obj_t self_in, mp_obj_t hostname_in) { mp_buffer_info_t hostname; mp_get_buffer_raise(hostname_in, &hostname, MP_BUFFER_READ); @@ -122,6 +126,13 @@ STATIC mp_obj_t wifi_radio_set_hostname(mp_obj_t self_in, mp_obj_t hostname_in) } MP_DEFINE_CONST_FUN_OBJ_2(wifi_radio_set_hostname_obj, wifi_radio_set_hostname); +const mp_obj_property_t wifi_radio_hostname_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&wifi_radio_get_hostname_obj, + (mp_obj_t)&wifi_radio_set_hostname_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + //| def connect(self, ssid: ReadableBuffer, password: ReadableBuffer = b"", *, channel: Optional[int] = 0, timeout: Optional[float] = None) -> bool: //| """Connects to the given ssid and waits for an ip address. Reconnections are handled //| automatically once one connection succeeds.""" @@ -236,7 +247,7 @@ STATIC const mp_rom_map_elem_t wifi_radio_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_start_scanning_networks), MP_ROM_PTR(&wifi_radio_start_scanning_networks_obj) }, { MP_ROM_QSTR(MP_QSTR_stop_scanning_networks), MP_ROM_PTR(&wifi_radio_stop_scanning_networks_obj) }, - { MP_ROM_QSTR(MP_QSTR_set_hostname), MP_ROM_PTR(&wifi_radio_set_hostname_obj) }, + { MP_ROM_QSTR(MP_QSTR_hostname), MP_ROM_PTR(&wifi_radio_hostname_obj) }, { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&wifi_radio_connect_obj) }, // { MP_ROM_QSTR(MP_QSTR_connect_to_enterprise), MP_ROM_PTR(&wifi_radio_connect_to_enterprise_obj) }, diff --git a/shared-bindings/wifi/Radio.h b/shared-bindings/wifi/Radio.h index 4226ae2a9..a6a616154 100644 --- a/shared-bindings/wifi/Radio.h +++ b/shared-bindings/wifi/Radio.h @@ -45,6 +45,7 @@ typedef enum { extern bool common_hal_wifi_radio_get_enabled(wifi_radio_obj_t *self); extern void common_hal_wifi_radio_set_enabled(wifi_radio_obj_t *self, bool enabled); +extern mp_obj_t common_hal_wifi_radio_get_hostname(wifi_radio_obj_t *self); extern void common_hal_wifi_radio_set_hostname(wifi_radio_obj_t *self, const char *hostname); extern mp_obj_t common_hal_wifi_radio_get_mac_address(wifi_radio_obj_t *self); -- cgit v1.2.3 From 852a91e1b73f217926379c114cafa6089980976e Mon Sep 17 00:00:00 2001 From: Brian Dean Date: Wed, 14 Oct 2020 08:29:28 -0400 Subject: boards/bdmicro_vina_d51/pins.c: Fix illegal QSTR name (hyphen). --- ports/atmel-samd/boards/bdmicro_vina_d51/pins.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c b/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c index d0006393c..931e0328f 100644 --- a/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c +++ b/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c @@ -41,7 +41,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB03) }, { MP_ROM_QSTR(MP_QSTR_I2C_SDA), MP_ROM_PTR(&pin_PB02) }, { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB02) }, - { MP_ROM_QSTR(MP_QSTR_I2S_FS-0), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_I2S_FS_0), MP_ROM_PTR(&pin_PA20) }, { MP_ROM_QSTR(MP_QSTR_I2S_FS_1), MP_ROM_PTR(&pin_PA23) }, { MP_ROM_QSTR(MP_QSTR_I2S_MCK_0), MP_ROM_PTR(&pin_PB17) }, { MP_ROM_QSTR(MP_QSTR_I2S_MCK_1), MP_ROM_PTR(&pin_PB13) }, -- cgit v1.2.3 From e6d0b207ec0abaf69171578d0beb668b17aec4b8 Mon Sep 17 00:00:00 2001 From: gamblor21 Date: Wed, 14 Oct 2020 14:06:34 -0500 Subject: Removed MICROPY_PY_COLLECTIONS_NAMEDTUPLE__ASDICT from unix coverage --- ports/unix/mpconfigport_coverage.h | 1 - py/objnamedtuple.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/unix/mpconfigport_coverage.h b/ports/unix/mpconfigport_coverage.h index 51015a587..468d69a73 100644 --- a/ports/unix/mpconfigport_coverage.h +++ b/ports/unix/mpconfigport_coverage.h @@ -49,7 +49,6 @@ #define MICROPY_VFS_FAT (1) #define MICROPY_FATFS_USE_LABEL (1) #define MICROPY_PY_FRAMEBUF (1) -#define MICROPY_PY_COLLECTIONS_NAMEDTUPLE__ASDICT (1) // TODO these should be generic, not bound to fatfs #define mp_type_fileio mp_type_vfs_posix_fileio diff --git a/py/objnamedtuple.c b/py/objnamedtuple.c index 6c36909e7..ab2f2f3c0 100644 --- a/py/objnamedtuple.c +++ b/py/objnamedtuple.c @@ -46,7 +46,7 @@ size_t mp_obj_namedtuple_find_field(const mp_obj_namedtuple_type_t *type, qstr n return (size_t)-1; } -#if MICROPY_PY_COLLECTIONS_NAMEDTUPLE__ASDICT +#if MICROPY_PY_COLLECTIONS_ORDEREDDICT STATIC mp_obj_t namedtuple_asdict(mp_obj_t self_in) { mp_obj_namedtuple_t *self = MP_OBJ_TO_PTR(self_in); const qstr *fields = ((mp_obj_namedtuple_type_t*)self->tuple.base.type)->fields; -- cgit v1.2.3 From 0a9bcc538bf7540dbcb374fd447b11fe9e881494 Mon Sep 17 00:00:00 2001 From: gamblor21 Date: Wed, 14 Oct 2020 20:14:55 -0500 Subject: Removed ordered dict for all SAMD21 --- ports/atmel-samd/mpconfigport.h | 1 + 1 file changed, 1 insertion(+) (limited to 'ports') diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h index afe1cc4c6..f7ccff4da 100644 --- a/ports/atmel-samd/mpconfigport.h +++ b/ports/atmel-samd/mpconfigport.h @@ -48,6 +48,7 @@ #define MICROPY_PY_IO (0) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (0) #define MICROPY_PY_UJSON (0) +#define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) #define MICROPY_PY_UERRNO_LIST \ X(EPERM) \ X(ENOENT) \ -- cgit v1.2.3 From 97fae546595753b4d7c19344f5ed4d4a233a127c Mon Sep 17 00:00:00 2001 From: Enrique Casado Date: Thu, 15 Oct 2020 12:39:14 +0200 Subject: Add DynOSSAT-EDU boards --- .github/workflows/build.yml | 2 + ports/atmel-samd/boards/dynossat_edu_eps/board.c | 38 +++++++++++++++++++ .../boards/dynossat_edu_eps/mpconfigboard.h | 40 ++++++++++++++++++++ .../boards/dynossat_edu_eps/mpconfigboard.mk | 23 +++++++++++ ports/atmel-samd/boards/dynossat_edu_eps/pins.c | 32 ++++++++++++++++ ports/atmel-samd/boards/dynossat_edu_obc/board.c | 38 +++++++++++++++++++ .../boards/dynossat_edu_obc/mpconfigboard.h | 44 ++++++++++++++++++++++ .../boards/dynossat_edu_obc/mpconfigboard.mk | 15 ++++++++ ports/atmel-samd/boards/dynossat_edu_obc/pins.c | 40 ++++++++++++++++++++ 9 files changed, 272 insertions(+) create mode 100644 ports/atmel-samd/boards/dynossat_edu_eps/board.c create mode 100644 ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/dynossat_edu_eps/pins.c create mode 100644 ports/atmel-samd/boards/dynossat_edu_obc/board.c create mode 100644 ports/atmel-samd/boards/dynossat_edu_obc/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/dynossat_edu_obc/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/dynossat_edu_obc/pins.c (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 0edc8c023..b3455cb53 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -198,6 +198,8 @@ jobs: - "datum_imu" - "datum_light" - "datum_weather" + - "dynossat_edu_eps" + - "dynossat_edu_obc" - "electronut_labs_blip" - "electronut_labs_papyr" - "escornabot_makech" diff --git a/ports/atmel-samd/boards/dynossat_edu_eps/board.c b/ports/atmel-samd/boards/dynossat_edu_eps/board.c new file mode 100644 index 000000000..c8e20206a --- /dev/null +++ b/ports/atmel-samd/boards/dynossat_edu_eps/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.h b/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.h new file mode 100644 index 000000000..ef4fa8f99 --- /dev/null +++ b/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.h @@ -0,0 +1,40 @@ +#define MICROPY_HW_BOARD_NAME "DynOSSAT-EDU-EPS" +#define MICROPY_HW_MCU_NAME "samd21g18" + +#define MICROPY_HW_NEOPIXEL (&pin_PA06) + +#define SPI_FLASH_MOSI_PIN &pin_PA22 +#define SPI_FLASH_MISO_PIN &pin_PA21 +#define SPI_FLASH_SCK_PIN &pin_PA23 +#define SPI_FLASH_CS_PIN &pin_PA20 + +// These are pins not to reset. +#define MICROPY_PORT_A ( 0 ) +#define MICROPY_PORT_B ( 0 ) +#define MICROPY_PORT_C ( 0 ) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA12) +#define DEFAULT_SPI_BUS_MISO (&pin_PB10) + +#define DEFAULT_UART_BUS_RX (&pin_PA17) +#define DEFAULT_UART_BUS_TX (&pin_PA16) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA15 1 +#define IGNORE_PIN_PA18 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 diff --git a/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.mk b/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.mk new file mode 100644 index 000000000..a1005e09d --- /dev/null +++ b/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.mk @@ -0,0 +1,23 @@ +USB_VID = 0 +USB_PID = 0 + +USB_PRODUCT = "DynOSSAT-EDU EPS v1.0" +USB_MANUFACTURER = "Blackhand Dynamics SL" + +CHIP_VARIANT = SAMD21G18A +CHIP_FAMILY = samd21 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "GD25Q32C" +LONGINT_IMPL = MPZ + +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_COUNTIO = 0 +CIRCUITPY_I2CPERIPHERAL = 0 +CIRCUITPY_VECTORIO = 0 + +CFLAGS_INLINE_LIMIT = 60 + +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/dynossat_edu_eps/pins.c b/ports/atmel-samd/boards/dynossat_edu_eps/pins.c new file mode 100644 index 000000000..a910311d4 --- /dev/null +++ b/ports/atmel-samd/boards/dynossat_edu_eps/pins.c @@ -0,0 +1,32 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_PA30) }, + { MP_ROM_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_PA31) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_OVTEMP), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_SAT_RESET), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_SAT_PWR_ENABLE), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_INT_IMU_OBC), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_PWRMON_SDA), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PWRMON_SCL), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PWRMON_ALERT), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C_MONITOR), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/dynossat_edu_obc/board.c b/ports/atmel-samd/boards/dynossat_edu_obc/board.c new file mode 100644 index 000000000..c8e20206a --- /dev/null +++ b/ports/atmel-samd/boards/dynossat_edu_obc/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) +{ +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/dynossat_edu_obc/mpconfigboard.h b/ports/atmel-samd/boards/dynossat_edu_obc/mpconfigboard.h new file mode 100644 index 000000000..d7df8db74 --- /dev/null +++ b/ports/atmel-samd/boards/dynossat_edu_obc/mpconfigboard.h @@ -0,0 +1,44 @@ +#define MICROPY_HW_BOARD_NAME "DynOSSAT-EDU-OBC" +#define MICROPY_HW_MCU_NAME "samd51j20" + +#define MICROPY_HW_NEOPIXEL (&pin_PA08) + +#define SPI_FLASH_MOSI_PIN &pin_PA16 +#define SPI_FLASH_MISO_PIN &pin_PA18 +#define SPI_FLASH_SCK_PIN &pin_PA17 +#define SPI_FLASH_CS_PIN &pin_PA19 + +// These are pins not to reset. +#define MICROPY_PORT_A ( PORT_PA16 | PORT_PA17 | PORT_PA18 | PORT_PA19 ) +#define MICROPY_PORT_B ( 0 ) +#define MICROPY_PORT_C ( 0 ) +#define MICROPY_PORT_D ( 0 ) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PB13) +#define DEFAULT_I2C_BUS_SDA (&pin_PB12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB03) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB02) +#define DEFAULT_SPI_BUS_MISO (&pin_PB01) + +#define DEFAULT_UART_BUS_RX (&pin_PA23) +#define DEFAULT_UART_BUS_TX (&pin_PA22) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA02 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PB00 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB31 1 diff --git a/ports/atmel-samd/boards/dynossat_edu_obc/mpconfigboard.mk b/ports/atmel-samd/boards/dynossat_edu_obc/mpconfigboard.mk new file mode 100644 index 000000000..d5c626d13 --- /dev/null +++ b/ports/atmel-samd/boards/dynossat_edu_obc/mpconfigboard.mk @@ -0,0 +1,15 @@ +USB_VID = 0 +USB_PID = 0 +USB_PRODUCT = "DynOSSAT-EDU OBC v1.0" +USB_MANUFACTURER = "Blackhand Dynamics SL" + +CHIP_VARIANT = SAMD51J20A +CHIP_FAMILY = samd51 + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q32C +LONGINT_IMPL = MPZ + +CFLAGS_INLINE_LIMIT = 60 +SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/dynossat_edu_obc/pins.c b/ports/atmel-samd/boards/dynossat_edu_obc/pins.c new file mode 100644 index 000000000..a560360f7 --- /dev/null +++ b/ports/atmel-samd/boards/dynossat_edu_obc/pins.c @@ -0,0 +1,40 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB14) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB11) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB10) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB30) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_D32), MP_ROM_PTR(&pin_PA30) }, + { MP_ROM_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_PA31) }, + { MP_ROM_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_PB22) }, + { MP_ROM_QSTR(MP_QSTR_INT_IMU), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_SAT_POWER), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From 82b49afe43494bb1d05bd7786a4f75a0288bf695 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 15 Oct 2020 11:15:48 -0400 Subject: enable CIRCUITPY_BLEIO_HCI on non-nRF boards where it will fit --- ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.mk | 4 ---- ports/atmel-samd/mpconfigport.mk | 3 +++ ports/nrf/mpconfigport.mk | 3 +++ py/circuitpy_mpconfig.mk | 10 +++++----- 4 files changed, 11 insertions(+), 9 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.mk b/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.mk index e999629c3..4895cda77 100644 --- a/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.mk +++ b/ports/atmel-samd/boards/metro_m4_airlift_lite/mpconfigboard.mk @@ -6,10 +6,6 @@ USB_MANUFACTURER = "Adafruit Industries LLC" CHIP_VARIANT = SAMD51J19A CHIP_FAMILY = samd51 -# Support _bleio via the on-board ESP32 module. -CIRCUITPY_BLEIO = 1 -CIRCUITPY_BLEIO_HCI = 1 - QSPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 3 EXTERNAL_FLASH_DEVICES = "S25FL116K, S25FL216K, GD25Q16C" diff --git a/ports/atmel-samd/mpconfigport.mk b/ports/atmel-samd/mpconfigport.mk index a16daf4b0..1929e146d 100644 --- a/ports/atmel-samd/mpconfigport.mk +++ b/ports/atmel-samd/mpconfigport.mk @@ -37,6 +37,9 @@ ifndef CIRCUITPY_TOUCHIO_USE_NATIVE CIRCUITPY_TOUCHIO_USE_NATIVE = 1 endif +# No room for HCI _bleio on SAMD21. +CIRCUITPY_BLEIO_HCI = 0 + CIRCUITPY_SDCARDIO ?= 0 # Not enough RAM for framebuffers diff --git a/ports/nrf/mpconfigport.mk b/ports/nrf/mpconfigport.mk index ed689545d..9560064fb 100644 --- a/ports/nrf/mpconfigport.mk +++ b/ports/nrf/mpconfigport.mk @@ -23,6 +23,9 @@ CIRCUITPY_AUDIOCORE ?= 1 CIRCUITPY_AUDIOMIXER ?= 1 CIRCUITPY_AUDIOPWMIO ?= 1 +# Native BLEIO is not compatible with HCI _bleio. +CIRCUITPY_BLEIO_HCI = 0 + CIRCUITPY_BLEIO ?= 1 # No I2CPeripheral implementation diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk index 91850448d..a6aabec33 100644 --- a/py/circuitpy_mpconfig.mk +++ b/py/circuitpy_mpconfig.mk @@ -79,14 +79,14 @@ CFLAGS += -DCIRCUITPY_AUDIOMP3=$(CIRCUITPY_AUDIOMP3) CIRCUITPY_BITBANGIO ?= $(CIRCUITPY_FULL_BUILD) CFLAGS += -DCIRCUITPY_BITBANGIO=$(CIRCUITPY_BITBANGIO) -# Explicitly enabled for boards that support _bleio. -CIRCUITPY_BLEIO ?= 0 -CFLAGS += -DCIRCUITPY_BLEIO=$(CIRCUITPY_BLEIO) - # _bleio can be supported on most any board via HCI -CIRCUITPY_BLEIO_HCI ?= 0 +CIRCUITPY_BLEIO_HCI ?= $(CIRCUITPY_FULL_BUILD) CFLAGS += -DCIRCUITPY_BLEIO_HCI=$(CIRCUITPY_BLEIO_HCI) +# Explicitly enabled for boards that support _bleio. +CIRCUITPY_BLEIO ?= $(CIRCUITPY_BLEIO_HCI) +CFLAGS += -DCIRCUITPY_BLEIO=$(CIRCUITPY_BLEIO) + CIRCUITPY_BOARD ?= 1 CFLAGS += -DCIRCUITPY_BOARD=$(CIRCUITPY_BOARD) -- cgit v1.2.3 From f51e75c1d216de5ce0c4cdb985756d9cf2b73f4c Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 15 Oct 2020 15:24:24 -0400 Subject: cxd56 needed more precise include for __packed; needed SRC_C += on some ports --- devices/ble_hci/common-hal/_bleio/Adapter.c | 1 - devices/ble_hci/common-hal/_bleio/hci_include/att_internal.h | 2 +- devices/ble_hci/common-hal/_bleio/hci_include/hci.h | 4 +++- mpy-cross/mpy-cross.mk | 2 +- ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.mk | 8 ++++---- ports/cxd56/Makefile | 2 +- ports/mimxrt10xx/Makefile | 2 +- ports/unix/Makefile | 2 +- 8 files changed, 12 insertions(+), 11 deletions(-) (limited to 'ports') diff --git a/devices/ble_hci/common-hal/_bleio/Adapter.c b/devices/ble_hci/common-hal/_bleio/Adapter.c index 559b586de..753a88648 100644 --- a/devices/ble_hci/common-hal/_bleio/Adapter.c +++ b/devices/ble_hci/common-hal/_bleio/Adapter.c @@ -45,7 +45,6 @@ #include "shared-bindings/_bleio/Address.h" #include "shared-bindings/_bleio/Characteristic.h" #include "shared-bindings/_bleio/Service.h" -#include "shared-bindings/nvm/ByteArray.h" #include "shared-bindings/_bleio/Connection.h" #include "shared-bindings/_bleio/ScanEntry.h" #include "shared-bindings/time/__init__.h" diff --git a/devices/ble_hci/common-hal/_bleio/hci_include/att_internal.h b/devices/ble_hci/common-hal/_bleio/hci_include/att_internal.h index 1c75275da..d6a4cb79c 100644 --- a/devices/ble_hci/common-hal/_bleio/hci_include/att_internal.h +++ b/devices/ble_hci/common-hal/_bleio/hci_include/att_internal.h @@ -11,7 +11,7 @@ #include // for __packed -#include +#include #define BT_EATT_PSM 0x27 #define BT_ATT_DEFAULT_LE_MTU 23 diff --git a/devices/ble_hci/common-hal/_bleio/hci_include/hci.h b/devices/ble_hci/common-hal/_bleio/hci_include/hci.h index 6c3a2b5bd..b6c5ee34b 100644 --- a/devices/ble_hci/common-hal/_bleio/hci_include/hci.h +++ b/devices/ble_hci/common-hal/_bleio/hci_include/hci.h @@ -12,7 +12,9 @@ #define ZEPHYR_INCLUDE_BLUETOOTH_HCI_H_ #include -#include +// for __packed +#include + #include "addr.h" #define BIT(n) (1UL << (n)) diff --git a/mpy-cross/mpy-cross.mk b/mpy-cross/mpy-cross.mk index b4c8e34a2..629054af9 100644 --- a/mpy-cross/mpy-cross.mk +++ b/mpy-cross/mpy-cross.mk @@ -66,7 +66,7 @@ LDFLAGS += -static -static-libgcc -static-libstdc++ endif # source files -SRC_C = \ +SRC_C += \ main.c \ gccollect.c \ supervisor/stub/safe_mode.c \ diff --git a/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.mk b/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.mk index 18cef738e..249265151 100644 --- a/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.mk +++ b/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.mk @@ -11,12 +11,12 @@ LONGINT_IMPL = MPZ # Not needed. CIRCUITPY_AUDIOBUSIO = 0 -CIRCUITPY_FRAMEBUFFERIO = 0 +CIRCUITPY_AUDIOMP3 = 0 +CIRCUITPY_BLEIO_HCI = 0 CIRCUITPY_DISPLAYIO = 0 -CIRCUITPY_RGBMATRIX = 0 +CIRCUITPY_FRAMEBUFFERIO = 0 CIRCUITPY_PS2IO = 0 -CIRCUITPY_AUDIOMP3 = 0 - +CIRCUITPY_RGBMATRIX = 0 CIRCUITPY_ULAB = 0 # Override optimization to keep binary small diff --git a/ports/cxd56/Makefile b/ports/cxd56/Makefile index 7e145f5e2..5201f0db5 100644 --- a/ports/cxd56/Makefile +++ b/ports/cxd56/Makefile @@ -162,7 +162,7 @@ SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) SRC_S = supervisor/cpu.s -SRC_C = \ +SRC_C += \ background.c \ fatfs_port.c \ mphalport.c \ diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile index 12c9bde4f..a17e5f703 100644 --- a/ports/mimxrt10xx/Makefile +++ b/ports/mimxrt10xx/Makefile @@ -147,7 +147,7 @@ SRC_SDK := \ SRC_SDK := $(addprefix sdk/devices/$(CHIP_FAMILY)/, $(SRC_SDK)) -SRC_C = \ +SRC_C += \ background.c \ boards/$(BOARD)/board.c \ boards/$(BOARD)/flash_config.c \ diff --git a/ports/unix/Makefile b/ports/unix/Makefile index 5d4b168fe..4bfb13c6a 100644 --- a/ports/unix/Makefile +++ b/ports/unix/Makefile @@ -134,7 +134,7 @@ SRC_MOD += modjni.c endif # source files -SRC_C = \ +SRC_C += \ main.c \ gccollect.c \ unix_mphal.c \ -- cgit v1.2.3 From 45a3bd1c042dd27eacf78cdcf116f97a7839eee0 Mon Sep 17 00:00:00 2001 From: Seon Rozenblum Date: Wed, 14 Oct 2020 19:18:38 +1100 Subject: Added default LWIP hostnames to FeatherS2 boards --- ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig | 5 +++++ ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/sdkconfig | 6 ++++++ 2 files changed, 11 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig b/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig index 67ac6d2f3..c9d44460c 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig @@ -32,3 +32,8 @@ CONFIG_SPIRAM_MEMTEST=y # CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set # end of SPI RAM config +# +# LWIP +# +CONFIG_LWIP_LOCAL_HOSTNAME="UMFeatherS2" +# end of LWIP diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/sdkconfig b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/sdkconfig index b73c4a8c2..00e0bb256 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/sdkconfig +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/sdkconfig @@ -33,3 +33,9 @@ CONFIG_SPIRAM_USE_MEMMAP=y CONFIG_SPIRAM_MEMTEST=y # CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set # end of SPI RAM config + +# +# LWIP +# +CONFIG_LWIP_LOCAL_HOSTNAME="UMFeatherS2" +# end of LWIP -- cgit v1.2.3 From 1d05ad6b22bedc52c5a1b9e44e806aa09fafd16c Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 15 Oct 2020 16:34:19 -0400 Subject: no _bleio for litex; ESP32S2 defines BIT() already --- devices/ble_hci/common-hal/_bleio/hci_include/hci.h | 3 +++ ports/litex/mpconfigport.mk | 1 + 2 files changed, 4 insertions(+) (limited to 'ports') diff --git a/devices/ble_hci/common-hal/_bleio/hci_include/hci.h b/devices/ble_hci/common-hal/_bleio/hci_include/hci.h index b6c5ee34b..5213edbf0 100644 --- a/devices/ble_hci/common-hal/_bleio/hci_include/hci.h +++ b/devices/ble_hci/common-hal/_bleio/hci_include/hci.h @@ -17,7 +17,10 @@ #include "addr.h" +// ESP32S2 build environment defines this already. +#ifndef BIT #define BIT(n) (1UL << (n)) +#endif /* Special own address types for LL privacy (used in adv & scan parameters) */ #define BT_HCI_OWN_ADDR_RPA_OR_PUBLIC 0x02 diff --git a/ports/litex/mpconfigport.mk b/ports/litex/mpconfigport.mk index 427e9ea84..485a75fde 100644 --- a/ports/litex/mpconfigport.mk +++ b/ports/litex/mpconfigport.mk @@ -16,6 +16,7 @@ CIRCUITPY_ANALOGIO = 0 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_BLEIO_HCI = 0 CIRCUITPY_BOARD = 0 CIRCUITPY_BUSIO = 0 CIRCUITPY_COUNTIO = 0 -- cgit v1.2.3 From 12ed3fc72f6eb81fd193258e757efdcf633c4c1d Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Thu, 15 Oct 2020 18:48:28 -0400 Subject: disable on winterbloom_sol and thunderpack --- ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk | 2 +- ports/stm/boards/thunderpack/mpconfigboard.mk | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk index 9217cdf23..fcefaee9b 100644 --- a/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk +++ b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk @@ -18,7 +18,7 @@ LONGINT_IMPL = MPZ # Disable modules that are unusable on this special-purpose board. CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 -CIRCUITPY_BLEIO = 0 +CIRCUITPY_BLEIO_HCI = 0 CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_FRAMEBUFFERIO = 0 CIRCUITPY_GAMEPAD = 0 diff --git a/ports/stm/boards/thunderpack/mpconfigboard.mk b/ports/stm/boards/thunderpack/mpconfigboard.mk index bb50f8710..d303582e0 100644 --- a/ports/stm/boards/thunderpack/mpconfigboard.mk +++ b/ports/stm/boards/thunderpack/mpconfigboard.mk @@ -7,6 +7,7 @@ INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_NVM = 1 +CIRCUITPY_BLEIO_HCI = 0 MCU_SERIES = F4 MCU_VARIANT = STM32F411xE -- cgit v1.2.3 From b336039aab03bd9f609bad0c211981961b6685d2 Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Thu, 15 Oct 2020 23:18:30 -0700 Subject: Disable the long way and return an ap_info object still needs work and cleanup --- ports/esp32s2/common-hal/wifi/Radio.c | 69 +++++++++++++++++++---------- ports/esp32s2/common-hal/wifi/Radio.h | 2 + shared-bindings/wifi/Radio.c | 83 +++++++++++++++++++++-------------- shared-bindings/wifi/Radio.h | 5 ++- 4 files changed, 102 insertions(+), 57 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index 13bcccc80..b1f9e67e0 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -25,6 +25,7 @@ */ #include "shared-bindings/wifi/Radio.h" +#include "shared-bindings/wifi/Network.h" #include @@ -149,7 +150,7 @@ wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t return WIFI_RADIO_ERROR_NONE; } -mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self) { +mp_obj_t common_hal_wifi_radio_get_ap_info(wifi_radio_obj_t *self) { if (!esp_netif_is_netif_up(self->netif)) { return mp_const_none; } @@ -159,18 +160,21 @@ mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self) { return mp_const_none; } + wifi_network_obj_t *apnet = m_new_obj(wifi_network_obj_t); + apnet->base.type = &wifi_network_type; // From esp_wifi.h, the possible return values (typos theirs): // ESP_OK: succeed // ESP_ERR_WIFI_CONN: The station interface don't initialized // ESP_ERR_WIFI_NOT_CONNECT: The station is in disconnect status - if (esp_wifi_sta_get_ap_info(&self->ap_info) != ESP_OK){ + if (esp_wifi_sta_get_ap_info(&self->apnet.record) != ESP_OK){ return mp_const_none; } else { - return mp_obj_new_int(self->ap_info.rssi); + memcpy(&apnet->record, &self->apnet.record, sizeof(wifi_ap_record_t)); + return MP_OBJ_FROM_PTR(apnet); } } -mp_obj_t common_hal_wifi_radio_get_ap_ssid(wifi_radio_obj_t *self) { +mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self) { if (!esp_netif_is_netif_up(self->netif)) { return mp_const_none; } @@ -180,30 +184,51 @@ mp_obj_t common_hal_wifi_radio_get_ap_ssid(wifi_radio_obj_t *self) { return mp_const_none; } + // From esp_wifi.h, the possible return values (typos theirs): + // ESP_OK: succeed + // ESP_ERR_WIFI_CONN: The station interface don't initialized + // ESP_ERR_WIFI_NOT_CONNECT: The station is in disconnect status if (esp_wifi_sta_get_ap_info(&self->ap_info) != ESP_OK){ return mp_const_none; } else { - const char* cstr = (const char*) self->ap_info.ssid; - return mp_obj_new_str(cstr, strlen(cstr)); + return mp_obj_new_int(self->ap_info.rssi); } } -mp_obj_t common_hal_wifi_radio_get_ap_bssid(wifi_radio_obj_t *self) { - if (!esp_netif_is_netif_up(self->netif)) { - return mp_const_none; - } - - // Make sure the interface is in STA mode - if (self->sta_mode){ - return mp_const_none; - } - - if (esp_wifi_sta_get_ap_info(&self->ap_info) != ESP_OK){ - return mp_const_none; - } else { - return mp_obj_new_bytes(self->ap_info.bssid, MAC_ADDRESS_LENGTH); - } -} +// mp_obj_t common_hal_wifi_radio_get_ap_ssid(wifi_radio_obj_t *self) { +// if (!esp_netif_is_netif_up(self->netif)) { +// return mp_const_none; +// } + +// // Make sure the interface is in STA mode +// if (self->sta_mode){ +// return mp_const_none; +// } + +// if (esp_wifi_sta_get_ap_info(&self->ap_info) != ESP_OK){ +// return mp_const_none; +// } else { +// const char* cstr = (const char*) self->ap_info.ssid; +// return mp_obj_new_str(cstr, strlen(cstr)); +// } +// } + +// mp_obj_t common_hal_wifi_radio_get_ap_bssid(wifi_radio_obj_t *self) { +// if (!esp_netif_is_netif_up(self->netif)) { +// return mp_const_none; +// } + +// // Make sure the interface is in STA mode +// if (self->sta_mode){ +// return mp_const_none; +// } + +// if (esp_wifi_sta_get_ap_info(&self->ap_info) != ESP_OK){ +// return mp_const_none; +// } else { +// return mp_obj_new_bytes(self->ap_info.bssid, MAC_ADDRESS_LENGTH); +// } +// } mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self) { if (!esp_netif_is_netif_up(self->netif)) { diff --git a/ports/esp32s2/common-hal/wifi/Radio.h b/ports/esp32s2/common-hal/wifi/Radio.h index 272c3a62e..f441096f7 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.h +++ b/ports/esp32s2/common-hal/wifi/Radio.h @@ -32,6 +32,7 @@ #include "components/esp_event/include/esp_event.h" #include "shared-bindings/wifi/ScannedNetworks.h" +#include "shared-bindings/wifi/Network.h" // Event bits for the Radio event group. #define WIFI_SCAN_DONE_BIT BIT0 @@ -47,6 +48,7 @@ typedef struct { EventGroupHandle_t event_group_handle; wifi_config_t sta_config; wifi_ap_record_t ap_info; + wifi_network_obj_t apnet; esp_netif_ip_info_t ip_info; esp_netif_dns_info_t dns_info; esp_netif_t *netif; diff --git a/shared-bindings/wifi/Radio.c b/shared-bindings/wifi/Radio.c index 96abadf6f..d75532769 100644 --- a/shared-bindings/wifi/Radio.c +++ b/shared-bindings/wifi/Radio.c @@ -179,37 +179,37 @@ const mp_obj_property_t wifi_radio_ap_rssi_obj = { (mp_obj_t)&mp_const_none_obj }, }; -//| ap_ssid: int -//| """SSID of the currently connected AP. Returns none if not connected""" -//| -STATIC mp_obj_t wifi_radio_get_ap_ssid(mp_obj_t self) { - return common_hal_wifi_radio_get_ap_ssid(self); - -} -MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ap_ssid_obj, wifi_radio_get_ap_ssid); - -const mp_obj_property_t wifi_radio_ap_ssid_obj = { - .base.type = &mp_type_property, - .proxy = { (mp_obj_t)&wifi_radio_get_ap_ssid_obj, - (mp_obj_t)&mp_const_none_obj, - (mp_obj_t)&mp_const_none_obj }, -}; - -//| ap_bssid: int -//| """BSSID (usually MAC) of the currently connected AP. Returns none if not connected""" -//| -STATIC mp_obj_t wifi_radio_get_ap_bssid(mp_obj_t self) { - return common_hal_wifi_radio_get_ap_bssid(self); - -} -MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ap_bssid_obj, wifi_radio_get_ap_bssid); - -const mp_obj_property_t wifi_radio_ap_bssid_obj = { - .base.type = &mp_type_property, - .proxy = { (mp_obj_t)&wifi_radio_get_ap_bssid_obj, - (mp_obj_t)&mp_const_none_obj, - (mp_obj_t)&mp_const_none_obj }, -}; +// //| ap_ssid: int +// //| """SSID of the currently connected AP. Returns none if not connected""" +// //| +// STATIC mp_obj_t wifi_radio_get_ap_ssid(mp_obj_t self) { +// return common_hal_wifi_radio_get_ap_ssid(self); + +// } +// MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ap_ssid_obj, wifi_radio_get_ap_ssid); + +// const mp_obj_property_t wifi_radio_ap_ssid_obj = { +// .base.type = &mp_type_property, +// .proxy = { (mp_obj_t)&wifi_radio_get_ap_ssid_obj, +// (mp_obj_t)&mp_const_none_obj, +// (mp_obj_t)&mp_const_none_obj }, +// }; + +// //| ap_bssid: int +// //| """BSSID (usually MAC) of the currently connected AP. Returns none if not connected""" +// //| +// STATIC mp_obj_t wifi_radio_get_ap_bssid(mp_obj_t self) { +// return common_hal_wifi_radio_get_ap_bssid(self); + +// } +// MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ap_bssid_obj, wifi_radio_get_ap_bssid); + +// const mp_obj_property_t wifi_radio_ap_bssid_obj = { +// .base.type = &mp_type_property, +// .proxy = { (mp_obj_t)&wifi_radio_get_ap_bssid_obj, +// (mp_obj_t)&mp_const_none_obj, +// (mp_obj_t)&mp_const_none_obj }, +// }; //| ipv4_gateway: Optional[ipaddress.IPv4Address] //| """IP v4 Address of the gateway when connected to an access point. None otherwise.""" @@ -275,6 +275,22 @@ const mp_obj_property_t wifi_radio_ipv4_dns_obj = { (mp_obj_t)&mp_const_none_obj }, }; +//| ap_info: Optional[Network] +//| """None otherwise.""" +//| +STATIC mp_obj_t wifi_radio_get_ap_info(mp_obj_t self) { + return common_hal_wifi_radio_get_ap_info(self); + +} +MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ap_info_obj, wifi_radio_get_ap_info); + +const mp_obj_property_t wifi_radio_ap_info_obj = { + .base.type = &mp_type_property, + .proxy = { (mp_obj_t)&wifi_radio_get_ap_info_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj }, +}; + //| def ping(self, ip, *, timeout: float = 0.5) -> float: //| """Ping an IP to test connectivity. Returns echo time in seconds. //| Returns None when it times out.""" @@ -315,9 +331,10 @@ STATIC const mp_rom_map_elem_t wifi_radio_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_connect), MP_ROM_PTR(&wifi_radio_connect_obj) }, // { MP_ROM_QSTR(MP_QSTR_connect_to_enterprise), MP_ROM_PTR(&wifi_radio_connect_to_enterprise_obj) }, + { MP_ROM_QSTR(MP_QSTR_ap_info), MP_ROM_PTR(&wifi_radio_ap_info_obj) }, { MP_ROM_QSTR(MP_QSTR_ap_rssi), MP_ROM_PTR(&wifi_radio_ap_rssi_obj) }, - { MP_ROM_QSTR(MP_QSTR_ap_ssid), MP_ROM_PTR(&wifi_radio_ap_ssid_obj) }, - { MP_ROM_QSTR(MP_QSTR_ap_bssid), MP_ROM_PTR(&wifi_radio_ap_bssid_obj) }, + // { MP_ROM_QSTR(MP_QSTR_ap_ssid), MP_ROM_PTR(&wifi_radio_ap_ssid_obj) }, + // { MP_ROM_QSTR(MP_QSTR_ap_bssid), MP_ROM_PTR(&wifi_radio_ap_bssid_obj) }, { MP_ROM_QSTR(MP_QSTR_ipv4_dns), MP_ROM_PTR(&wifi_radio_ipv4_dns_obj) }, { MP_ROM_QSTR(MP_QSTR_ipv4_gateway), MP_ROM_PTR(&wifi_radio_ipv4_gateway_obj) }, { MP_ROM_QSTR(MP_QSTR_ipv4_subnet), MP_ROM_PTR(&wifi_radio_ipv4_subnet_obj) }, diff --git a/shared-bindings/wifi/Radio.h b/shared-bindings/wifi/Radio.h index bf30ac340..6dca40c56 100644 --- a/shared-bindings/wifi/Radio.h +++ b/shared-bindings/wifi/Radio.h @@ -53,9 +53,10 @@ extern void common_hal_wifi_radio_stop_scanning_networks(wifi_radio_obj_t *self) extern wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout, uint8_t* bssid, size_t bssid_len); +extern mp_obj_t common_hal_wifi_radio_get_ap_info(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self); -extern mp_obj_t common_hal_wifi_radio_get_ap_ssid(wifi_radio_obj_t *self); -extern mp_obj_t common_hal_wifi_radio_get_ap_bssid(wifi_radio_obj_t *self); +// extern mp_obj_t common_hal_wifi_radio_get_ap_ssid(wifi_radio_obj_t *self); +// extern mp_obj_t common_hal_wifi_radio_get_ap_bssid(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ipv4_dns(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ipv4_subnet(wifi_radio_obj_t *self); -- cgit v1.2.3 From 9d840aab0b81db61e185eeac5d8359489ff36320 Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Thu, 15 Oct 2020 23:45:11 -0700 Subject: Cleaned up and now testing --- ports/esp32s2/common-hal/wifi/Radio.c | 66 +++-------------------------------- ports/esp32s2/common-hal/wifi/Radio.h | 3 +- shared-bindings/wifi/Radio.c | 53 +--------------------------- shared-bindings/wifi/Radio.h | 3 -- 4 files changed, 7 insertions(+), 118 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index b1f9e67e0..6203a151b 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -160,76 +160,20 @@ mp_obj_t common_hal_wifi_radio_get_ap_info(wifi_radio_obj_t *self) { return mp_const_none; } - wifi_network_obj_t *apnet = m_new_obj(wifi_network_obj_t); - apnet->base.type = &wifi_network_type; + wifi_network_obj_t *ap_info = m_new_obj(wifi_network_obj_t); + ap_info->base.type = &wifi_network_type; // From esp_wifi.h, the possible return values (typos theirs): // ESP_OK: succeed // ESP_ERR_WIFI_CONN: The station interface don't initialized // ESP_ERR_WIFI_NOT_CONNECT: The station is in disconnect status - if (esp_wifi_sta_get_ap_info(&self->apnet.record) != ESP_OK){ + if (esp_wifi_sta_get_ap_info(&self->ap_info.record) != ESP_OK){ return mp_const_none; } else { - memcpy(&apnet->record, &self->apnet.record, sizeof(wifi_ap_record_t)); - return MP_OBJ_FROM_PTR(apnet); + memcpy(&ap_info->record, &self->ap_info.record, sizeof(wifi_ap_record_t)); + return MP_OBJ_FROM_PTR(ap_info); } } -mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self) { - if (!esp_netif_is_netif_up(self->netif)) { - return mp_const_none; - } - - // Make sure the interface is in STA mode - if (self->sta_mode){ - return mp_const_none; - } - - // From esp_wifi.h, the possible return values (typos theirs): - // ESP_OK: succeed - // ESP_ERR_WIFI_CONN: The station interface don't initialized - // ESP_ERR_WIFI_NOT_CONNECT: The station is in disconnect status - if (esp_wifi_sta_get_ap_info(&self->ap_info) != ESP_OK){ - return mp_const_none; - } else { - return mp_obj_new_int(self->ap_info.rssi); - } -} - -// mp_obj_t common_hal_wifi_radio_get_ap_ssid(wifi_radio_obj_t *self) { -// if (!esp_netif_is_netif_up(self->netif)) { -// return mp_const_none; -// } - -// // Make sure the interface is in STA mode -// if (self->sta_mode){ -// return mp_const_none; -// } - -// if (esp_wifi_sta_get_ap_info(&self->ap_info) != ESP_OK){ -// return mp_const_none; -// } else { -// const char* cstr = (const char*) self->ap_info.ssid; -// return mp_obj_new_str(cstr, strlen(cstr)); -// } -// } - -// mp_obj_t common_hal_wifi_radio_get_ap_bssid(wifi_radio_obj_t *self) { -// if (!esp_netif_is_netif_up(self->netif)) { -// return mp_const_none; -// } - -// // Make sure the interface is in STA mode -// if (self->sta_mode){ -// return mp_const_none; -// } - -// if (esp_wifi_sta_get_ap_info(&self->ap_info) != ESP_OK){ -// return mp_const_none; -// } else { -// return mp_obj_new_bytes(self->ap_info.bssid, MAC_ADDRESS_LENGTH); -// } -// } - mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self) { if (!esp_netif_is_netif_up(self->netif)) { return mp_const_none; diff --git a/ports/esp32s2/common-hal/wifi/Radio.h b/ports/esp32s2/common-hal/wifi/Radio.h index f441096f7..c7f484eaf 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.h +++ b/ports/esp32s2/common-hal/wifi/Radio.h @@ -47,8 +47,7 @@ typedef struct { StaticEventGroup_t event_group; EventGroupHandle_t event_group_handle; wifi_config_t sta_config; - wifi_ap_record_t ap_info; - wifi_network_obj_t apnet; + wifi_network_obj_t ap_info; esp_netif_ip_info_t ip_info; esp_netif_dns_info_t dns_info; esp_netif_t *netif; diff --git a/shared-bindings/wifi/Radio.c b/shared-bindings/wifi/Radio.c index d75532769..450331009 100644 --- a/shared-bindings/wifi/Radio.c +++ b/shared-bindings/wifi/Radio.c @@ -163,54 +163,6 @@ STATIC mp_obj_t wifi_radio_connect(size_t n_args, const mp_obj_t *pos_args, mp_m } STATIC MP_DEFINE_CONST_FUN_OBJ_KW(wifi_radio_connect_obj, 1, wifi_radio_connect); -//| ap_rssi: int -//| """RSSI of the currently connected AP. Returns none if not connected""" -//| -STATIC mp_obj_t wifi_radio_get_ap_rssi(mp_obj_t self) { - return common_hal_wifi_radio_get_ap_rssi(self); - -} -MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ap_rssi_obj, wifi_radio_get_ap_rssi); - -const mp_obj_property_t wifi_radio_ap_rssi_obj = { - .base.type = &mp_type_property, - .proxy = { (mp_obj_t)&wifi_radio_get_ap_rssi_obj, - (mp_obj_t)&mp_const_none_obj, - (mp_obj_t)&mp_const_none_obj }, -}; - -// //| ap_ssid: int -// //| """SSID of the currently connected AP. Returns none if not connected""" -// //| -// STATIC mp_obj_t wifi_radio_get_ap_ssid(mp_obj_t self) { -// return common_hal_wifi_radio_get_ap_ssid(self); - -// } -// MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ap_ssid_obj, wifi_radio_get_ap_ssid); - -// const mp_obj_property_t wifi_radio_ap_ssid_obj = { -// .base.type = &mp_type_property, -// .proxy = { (mp_obj_t)&wifi_radio_get_ap_ssid_obj, -// (mp_obj_t)&mp_const_none_obj, -// (mp_obj_t)&mp_const_none_obj }, -// }; - -// //| ap_bssid: int -// //| """BSSID (usually MAC) of the currently connected AP. Returns none if not connected""" -// //| -// STATIC mp_obj_t wifi_radio_get_ap_bssid(mp_obj_t self) { -// return common_hal_wifi_radio_get_ap_bssid(self); - -// } -// MP_DEFINE_CONST_FUN_OBJ_1(wifi_radio_get_ap_bssid_obj, wifi_radio_get_ap_bssid); - -// const mp_obj_property_t wifi_radio_ap_bssid_obj = { -// .base.type = &mp_type_property, -// .proxy = { (mp_obj_t)&wifi_radio_get_ap_bssid_obj, -// (mp_obj_t)&mp_const_none_obj, -// (mp_obj_t)&mp_const_none_obj }, -// }; - //| ipv4_gateway: Optional[ipaddress.IPv4Address] //| """IP v4 Address of the gateway when connected to an access point. None otherwise.""" //| @@ -276,7 +228,7 @@ const mp_obj_property_t wifi_radio_ipv4_dns_obj = { }; //| ap_info: Optional[Network] -//| """None otherwise.""" +//| """Network object containing BSSID, SSID, channel, and RSSI when connected to an access point. None otherwise.""" //| STATIC mp_obj_t wifi_radio_get_ap_info(mp_obj_t self) { return common_hal_wifi_radio_get_ap_info(self); @@ -332,9 +284,6 @@ STATIC const mp_rom_map_elem_t wifi_radio_locals_dict_table[] = { // { MP_ROM_QSTR(MP_QSTR_connect_to_enterprise), MP_ROM_PTR(&wifi_radio_connect_to_enterprise_obj) }, { MP_ROM_QSTR(MP_QSTR_ap_info), MP_ROM_PTR(&wifi_radio_ap_info_obj) }, - { MP_ROM_QSTR(MP_QSTR_ap_rssi), MP_ROM_PTR(&wifi_radio_ap_rssi_obj) }, - // { MP_ROM_QSTR(MP_QSTR_ap_ssid), MP_ROM_PTR(&wifi_radio_ap_ssid_obj) }, - // { MP_ROM_QSTR(MP_QSTR_ap_bssid), MP_ROM_PTR(&wifi_radio_ap_bssid_obj) }, { MP_ROM_QSTR(MP_QSTR_ipv4_dns), MP_ROM_PTR(&wifi_radio_ipv4_dns_obj) }, { MP_ROM_QSTR(MP_QSTR_ipv4_gateway), MP_ROM_PTR(&wifi_radio_ipv4_gateway_obj) }, { MP_ROM_QSTR(MP_QSTR_ipv4_subnet), MP_ROM_PTR(&wifi_radio_ipv4_subnet_obj) }, diff --git a/shared-bindings/wifi/Radio.h b/shared-bindings/wifi/Radio.h index 6dca40c56..38cc93337 100644 --- a/shared-bindings/wifi/Radio.h +++ b/shared-bindings/wifi/Radio.h @@ -54,9 +54,6 @@ extern void common_hal_wifi_radio_stop_scanning_networks(wifi_radio_obj_t *self) extern wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout, uint8_t* bssid, size_t bssid_len); extern mp_obj_t common_hal_wifi_radio_get_ap_info(wifi_radio_obj_t *self); -extern mp_obj_t common_hal_wifi_radio_get_ap_rssi(wifi_radio_obj_t *self); -// extern mp_obj_t common_hal_wifi_radio_get_ap_ssid(wifi_radio_obj_t *self); -// extern mp_obj_t common_hal_wifi_radio_get_ap_bssid(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ipv4_dns(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self); extern mp_obj_t common_hal_wifi_radio_get_ipv4_subnet(wifi_radio_obj_t *self); -- cgit v1.2.3 From 6631c8d393df83db3b9348b18e04c3580811c1bc Mon Sep 17 00:00:00 2001 From: Enrique Casado Date: Fri, 16 Oct 2020 13:52:46 +0200 Subject: Add USB VID&PID --- ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.mk | 8 ++++---- ports/atmel-samd/boards/dynossat_edu_obc/mpconfigboard.mk | 11 ++++++----- 2 files changed, 10 insertions(+), 9 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.mk b/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.mk index a1005e09d..3c0cc07be 100644 --- a/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.mk +++ b/ports/atmel-samd/boards/dynossat_edu_eps/mpconfigboard.mk @@ -1,8 +1,8 @@ -USB_VID = 0 -USB_PID = 0 +USB_VID = 0x04D8 +USB_PID = 0xEAD1 -USB_PRODUCT = "DynOSSAT-EDU EPS v1.0" -USB_MANUFACTURER = "Blackhand Dynamics SL" +USB_PRODUCT = "DynOSSAT-EDU-EPS-v1.0" +USB_MANUFACTURER = "BH Dynamics" CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 diff --git a/ports/atmel-samd/boards/dynossat_edu_obc/mpconfigboard.mk b/ports/atmel-samd/boards/dynossat_edu_obc/mpconfigboard.mk index d5c626d13..360940cf1 100644 --- a/ports/atmel-samd/boards/dynossat_edu_obc/mpconfigboard.mk +++ b/ports/atmel-samd/boards/dynossat_edu_obc/mpconfigboard.mk @@ -1,14 +1,15 @@ -USB_VID = 0 -USB_PID = 0 -USB_PRODUCT = "DynOSSAT-EDU OBC v1.0" -USB_MANUFACTURER = "Blackhand Dynamics SL" +USB_VID = 0x04D8 +USB_PID = 0xEAD2 + +USB_PRODUCT = "DynOSSAT-EDU-OBC-v1.0" +USB_MANUFACTURER = "BH Dynamics" CHIP_VARIANT = SAMD51J20A CHIP_FAMILY = samd51 SPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 -EXTERNAL_FLASH_DEVICES = GD25Q32C +EXTERNAL_FLASH_DEVICES = "GD25Q32C" LONGINT_IMPL = MPZ CFLAGS_INLINE_LIMIT = 60 -- cgit v1.2.3 From 76f1db7a8795f2594db6b6d0d6f38a48a2cfd8af Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Sat, 17 Oct 2020 00:23:31 -0700 Subject: Set sta_mode flag for actual use/checking --- ports/esp32s2/common-hal/wifi/Radio.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index 6203a151b..80afc5eaa 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -53,6 +53,8 @@ static void start_station(wifi_radio_obj_t *self) { } esp_wifi_set_mode(next_mode); + self->sta_mode = 1; + esp_wifi_set_config(WIFI_MODE_STA, &self->sta_config); } @@ -156,7 +158,7 @@ mp_obj_t common_hal_wifi_radio_get_ap_info(wifi_radio_obj_t *self) { } // Make sure the interface is in STA mode - if (self->sta_mode){ + if (!self->sta_mode){ return mp_const_none; } -- cgit v1.2.3 From 396979a67e538da087136ce01dbc4c7a670bf60e Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Sun, 11 Oct 2020 21:01:12 -0500 Subject: atmel-samd: parallelize lto linking This decreases the link time, especially on desktop machines with many CPU cores. However, it does come at a slight cost in binary size, making the flash section about 200 bytes bigger for circuitplayground_express. Before, linking build-circuitplayground_express/firmware.elf takes 8.8s elapsed time, leaving 3128 bytes free in flash. After, linking build-circuitplayground_express/firmware.elf takes 2.8s elapsed time, leaving 2924 bytes free in flash. (-6 seconds, -204 bytes free) If necessary, we can make this per-board or even per-translation to squeeze full builds. --- ports/atmel-samd/Makefile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile index 1ee21679d..2593377eb 100644 --- a/ports/atmel-samd/Makefile +++ b/ports/atmel-samd/Makefile @@ -121,7 +121,7 @@ $(echo PERIPHERALS_CHIP_FAMILY=$(PERIPHERALS_CHIP_FAMILY)) ifeq ($(DEBUG), 1) CFLAGS += -ggdb3 -Og # You may want to disable -flto if it interferes with debugging. - CFLAGS += -flto -flto-partition=none + CFLAGS += -flto # You may want to enable these flags to make setting breakpoints easier. # CFLAGS += -fno-inline -fno-ipa-sra ifeq ($(CHIP_FAMILY), samd21) @@ -144,7 +144,7 @@ else CFLAGS += -finline-limit=$(CFLAGS_INLINE_LIMIT) endif - CFLAGS += -flto -flto-partition=none + CFLAGS += -flto ifeq ($(CIRCUITPY_FULL_BUILD),0) CFLAGS += --param inline-unit-growth=15 --param max-inline-insns-auto=20 @@ -197,6 +197,7 @@ endif LDFLAGS = $(CFLAGS) -nostartfiles -Wl,-nostdlib -Wl,-T,$(GENERATED_LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs +LDFLAGS += -flto=$(shell nproc) LIBS := -lgcc -lc # Use toolchain libm if we're not using our own. -- cgit v1.2.3 From aa3c890ead4a006f273d6188a0a9fa2a19550458 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 12 Oct 2020 12:48:47 -0500 Subject: samd: pin: Fix 'undefined reference to pin_PA30' .. when PA30 is IGNOREd --- ports/atmel-samd/common-hal/microcontroller/Pin.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/microcontroller/Pin.c b/ports/atmel-samd/common-hal/microcontroller/Pin.c index bec9dc1e2..7dd87a3b2 100644 --- a/ports/atmel-samd/common-hal/microcontroller/Pin.c +++ b/ports/atmel-samd/common-hal/microcontroller/Pin.c @@ -223,9 +223,11 @@ bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) { #ifdef MICROPY_HW_NEOPIXEL if (pin == MICROPY_HW_NEOPIXEL) { // Special case for Metro M0 where the NeoPixel is also SWCLK +#ifndef IGNORE_PIN_PA30 if (MICROPY_HW_NEOPIXEL == &pin_PA30 && DSU->STATUSB.bit.DBGPRES == 1) { return false; } +#endif return !neopixel_in_use; } #endif -- cgit v1.2.3 From 4b9fc5de537a166963264cc23eb56f6aea22edde Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 12 Oct 2020 15:46:31 -0500 Subject: samd: update peripherals submodule this is possible now that the undefined reference to pin_PA30 has been resolved. --- ports/atmel-samd/peripherals | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals index a7e39c4d0..710954269 160000 --- a/ports/atmel-samd/peripherals +++ b/ports/atmel-samd/peripherals @@ -1 +1 @@ -Subproject commit a7e39c4d01aa5916015beecb021777617e77b0ad +Subproject commit 710954269a34d1b0c5534965f31689a09cf1d197 -- cgit v1.2.3 From eb0b023dee5e6688ead7d875084086a6eea3ce89 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 13 Oct 2020 14:42:30 -0500 Subject: samd: extend IGNORE_PIN_foo to all sam e5x/e5x pins --- .../common-hal/microcontroller/__init__.c | 77 +++++++++++----------- 1 file changed, 38 insertions(+), 39 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/microcontroller/__init__.c b/ports/atmel-samd/common-hal/microcontroller/__init__.c index 09212a0d1..50a1ec038 100644 --- a/ports/atmel-samd/common-hal/microcontroller/__init__.c +++ b/ports/atmel-samd/common-hal/microcontroller/__init__.c @@ -275,120 +275,119 @@ STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_PB31), MP_ROM_PTR(&pin_PB31) }, #endif -// These are SAMD51 specific so we assume we want them in RAM -#if defined(PIN_PC00) +#if defined(PIN_PC00) && !defined(IGNORE_PIN_PC00) { MP_ROM_QSTR(MP_QSTR_PC00), MP_ROM_PTR(&pin_PC00) }, #endif -#if defined(PIN_PC01) +#if defined(PIN_PC01) && !defined(IGNORE_PIN_PC01) { MP_ROM_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, #endif -#if defined(PIN_PC02) +#if defined(PIN_PC02) && !defined(IGNORE_PIN_PC02) { MP_ROM_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, #endif -#if defined(PIN_PC03) +#if defined(PIN_PC03) && !defined(IGNORE_PIN_PC03) { MP_ROM_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, #endif -#if defined(PIN_PC04) +#if defined(PIN_PC04) && !defined(IGNORE_PIN_PC04) { MP_ROM_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, #endif -#if defined(PIN_PC05) +#if defined(PIN_PC05) && !defined(IGNORE_PIN_PC05) { MP_ROM_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, #endif -#if defined(PIN_PC06) +#if defined(PIN_PC06) && !defined(IGNORE_PIN_PC06) { MP_ROM_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, #endif -#if defined(PIN_PC07) +#if defined(PIN_PC07) && !defined(IGNORE_PIN_PC07) { MP_ROM_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, #endif -#if defined(PIN_PC10) +#if defined(PIN_PC10) && !defined(IGNORE_PIN_PC10) { MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, #endif -#if defined(PIN_PC11) +#if defined(PIN_PC11) && !defined(IGNORE_PIN_PC11) { MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) }, #endif -#if defined(PIN_PC12) +#if defined(PIN_PC12) && !defined(IGNORE_PIN_PC12) { MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) }, #endif -#if defined(PIN_PC13) +#if defined(PIN_PC13) && !defined(IGNORE_PIN_PC13) { MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) }, #endif -#if defined(PIN_PC14) +#if defined(PIN_PC14) && !defined(IGNORE_PIN_PC14) { MP_ROM_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_PC14) }, #endif -#if defined(PIN_PC15) +#if defined(PIN_PC15) && !defined(IGNORE_PIN_PC15) { MP_ROM_QSTR(MP_QSTR_PC15), MP_ROM_PTR(&pin_PC15) }, #endif -#if defined(PIN_PC16) +#if defined(PIN_PC16) && !defined(IGNORE_PIN_PC16) { MP_ROM_QSTR(MP_QSTR_PC16), MP_ROM_PTR(&pin_PC16) }, #endif -#if defined(PIN_PC17) +#if defined(PIN_PC17) && !defined(IGNORE_PIN_PC17) { MP_ROM_QSTR(MP_QSTR_PC17), MP_ROM_PTR(&pin_PC17) }, #endif -#if defined(PIN_PC18) +#if defined(PIN_PC18) && !defined(IGNORE_PIN_PC18) { MP_ROM_QSTR(MP_QSTR_PC18), MP_ROM_PTR(&pin_PC18) }, #endif -#if defined(PIN_PC19) +#if defined(PIN_PC19) && !defined(IGNORE_PIN_PC19) { MP_ROM_QSTR(MP_QSTR_PC19), MP_ROM_PTR(&pin_PC19) }, #endif -#if defined(PIN_PC20) +#if defined(PIN_PC20) && !defined(IGNORE_PIN_PC20) { MP_ROM_QSTR(MP_QSTR_PC20), MP_ROM_PTR(&pin_PC20) }, #endif -#if defined(PIN_PC21) +#if defined(PIN_PC21) && !defined(IGNORE_PIN_PC21) { MP_ROM_QSTR(MP_QSTR_PC21), MP_ROM_PTR(&pin_PC21) }, #endif -#if defined(PIN_PC22) +#if defined(PIN_PC22) && !defined(IGNORE_PIN_PC22) { MP_ROM_QSTR(MP_QSTR_PC22), MP_ROM_PTR(&pin_PC22) }, #endif -#if defined(PIN_PC23) +#if defined(PIN_PC23) && !defined(IGNORE_PIN_PC23) { MP_ROM_QSTR(MP_QSTR_PC23), MP_ROM_PTR(&pin_PC23) }, #endif -#if defined(PIN_PC24) +#if defined(PIN_PC24) && !defined(IGNORE_PIN_PC24) { MP_ROM_QSTR(MP_QSTR_PC24), MP_ROM_PTR(&pin_PC24) }, #endif -#if defined(PIN_PC25) +#if defined(PIN_PC25) && !defined(IGNORE_PIN_PC25) { MP_ROM_QSTR(MP_QSTR_PC25), MP_ROM_PTR(&pin_PC25) }, #endif -#if defined(PIN_PC26) +#if defined(PIN_PC26) && !defined(IGNORE_PIN_PC26) { MP_ROM_QSTR(MP_QSTR_PC26), MP_ROM_PTR(&pin_PC26) }, #endif -#if defined(PIN_PC27) +#if defined(PIN_PC27) && !defined(IGNORE_PIN_PC27) { MP_ROM_QSTR(MP_QSTR_PC27), MP_ROM_PTR(&pin_PC27) }, #endif -#if defined(PIN_PC28) +#if defined(PIN_PC28) && !defined(IGNORE_PIN_PC28) { MP_ROM_QSTR(MP_QSTR_PC28), MP_ROM_PTR(&pin_PC28) }, #endif -#if defined(PIN_PC30) +#if defined(PIN_PC30) && !defined(IGNORE_PIN_PC30) { MP_ROM_QSTR(MP_QSTR_PC30), MP_ROM_PTR(&pin_PC30) }, #endif -#if defined(PIN_PC31) +#if defined(PIN_PC31) && !defined(IGNORE_PIN_PC31) { MP_ROM_QSTR(MP_QSTR_PC31), MP_ROM_PTR(&pin_PC31) }, #endif -#if defined(PIN_PD00) +#if defined(PIN_PD00) && !defined(IGNORE_PIN_PD00) { MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_PD00) }, #endif -#if defined(PIN_PD01) +#if defined(PIN_PD01) && !defined(IGNORE_PIN_PD01) { MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) }, #endif -#if defined(PIN_PD08) +#if defined(PIN_PD08) && !defined(IGNORE_PIN_PD08) { MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, #endif -#if defined(PIN_PD09) +#if defined(PIN_PD09) && !defined(IGNORE_PIN_PD09) { MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, #endif -#if defined(PIN_PD10) +#if defined(PIN_PD10) && !defined(IGNORE_PIN_PD10) { MP_ROM_QSTR(MP_QSTR_PD10), MP_ROM_PTR(&pin_PD10) }, #endif -#if defined(PIN_PD11) +#if defined(PIN_PD11) && !defined(IGNORE_PIN_PD11) { MP_ROM_QSTR(MP_QSTR_PD11), MP_ROM_PTR(&pin_PD11) }, #endif -#if defined(PIN_PD12) +#if defined(PIN_PD12) && !defined(IGNORE_PIN_PD12) { MP_ROM_QSTR(MP_QSTR_PD12), MP_ROM_PTR(&pin_PD12) }, #endif -#if defined(PIN_PD20) +#if defined(PIN_PD20) && !defined(IGNORE_PIN_PD20) { MP_ROM_QSTR(MP_QSTR_PD20), MP_ROM_PTR(&pin_PD20) }, #endif -#if defined(PIN_PD21) +#if defined(PIN_PD21) && !defined(IGNORE_PIN_PD21) { MP_ROM_QSTR(MP_QSTR_PD21), MP_ROM_PTR(&pin_PD21) }, #endif }; -- cgit v1.2.3 From 194d99f58856c3c0a3d838f99e823a6d0181063c Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Sat, 17 Oct 2020 19:07:15 -0500 Subject: sparkfun_lumidrive: Can't IGNORE pins that are default bus pins The SDA, SCL, and MISO pins were ignored. This error was not diagnosed before now. --- ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.h b/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.h index d184945f3..80f37429f 100755 --- a/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.h +++ b/ports/atmel-samd/boards/sparkfun_lumidrive/mpconfigboard.h @@ -35,9 +35,6 @@ #define IGNORE_PIN_PA12 1 #define IGNORE_PIN_PA15 1 #define IGNORE_PIN_PA16 1 -#define IGNORE_PIN_PA21 1 -#define IGNORE_PIN_PA22 1 -#define IGNORE_PIN_PA23 1 #define IGNORE_PIN_PA27 1 #define IGNORE_PIN_PA28 1 -- cgit v1.2.3 From fb768dfc14ab3b98905927f984a080e551513ea8 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Sat, 17 Oct 2020 19:08:32 -0500 Subject: samd: AnalogOut: Better handle boards which IGNOREd analog pins --- ports/atmel-samd/common-hal/analogio/AnalogOut.c | 45 +++++++++++++++--------- 1 file changed, 29 insertions(+), 16 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/analogio/AnalogOut.c b/ports/atmel-samd/common-hal/analogio/AnalogOut.c index fac4c6bfc..1565b0a8f 100644 --- a/ports/atmel-samd/common-hal/analogio/AnalogOut.c +++ b/ports/atmel-samd/common-hal/analogio/AnalogOut.c @@ -44,26 +44,36 @@ #include "hpl/pm/hpl_pm_base.h" #endif +#define HAVE_ANALOGOUT ( \ + (defined(PIN_PA02) && !defined(IGNORE_PA02)) || \ + (defined(SAM_D5X_E5X) && defined(PIN_PA05) && !defined(IGNORE_PA05)) \ +) + void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, const mcu_pin_obj_t *pin) { - #if defined(SAMD21) && !defined(PIN_PA02) + #if !HAVE_ANALOGOUT mp_raise_NotImplementedError(translate("No DAC on chip")); #else - if (pin->number != PIN_PA02 - #ifdef SAM_D5X_E5X - && pin->number != PIN_PA05 + + int channel = -1; + + #if defined(PIN_PA02) && !defined(IGNORE_PIN_PA02) + if (pin->number != PIN_PA02) { + channel = 0; + } + #endif + #if defined(PIN_PA05) && defined(PIN_PA05) && !defined(IGNORE_PIN_PA05) + if (pin->number != PIN_PA05) { + channel = 1; + } #endif - ) { + + if(channel == -1) { mp_raise_ValueError(translate("AnalogOut not supported on given pin")); return; } - self->channel = 0; - #ifdef SAM_D5X_E5X - if (pin->number == PIN_PA05) { - self->channel = 1; - } - #endif + self->channel = channel; #ifdef SAM_D5X_E5X hri_mclk_set_APBDMASK_DAC_bit(MCLK); @@ -105,11 +115,15 @@ void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, } bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { + #if !HAVE_ANALOGOUT + return false; + #else return self->deinited; + #endif } void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { - #if (defined(SAMD21) && defined(PIN_PA02)) || defined(SAM_D5X_E5X) + #if HAVE_ANALOGOUT if (common_hal_analogio_analogout_deinited(self)) { return; } @@ -130,12 +144,11 @@ void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, uint16_t value) { - #if defined(SAMD21) && !defined(PIN_PA02) - return; - #endif + #if HAVE_ANALOGOUT // Input is 16 bit so make sure and set LEFTADJ to 1 so it takes the top // bits. This is currently done in asf4_conf/*/hpl_dac_config.h. dac_sync_write(&self->descriptor, self->channel, &value, 1); + #endif } void analogout_reset(void) { @@ -143,7 +156,7 @@ void analogout_reset(void) { // if it was enabled, so do that instead if AudioOut is enabled. #if CIRCUITPY_AUDIOIO audioout_reset(); -#else +#elif HAVE_ANALOGOUT #ifdef SAMD21 while (DAC->STATUS.reg & DAC_STATUS_SYNCBUSY) {} #endif -- cgit v1.2.3 From cc411f47eb009dab7a20f3a220cc569b7e310116 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Sat, 17 Oct 2020 19:10:22 -0500 Subject: samd: Update peripherals submodule (https://github.com/adafruit/samd-peripherals/pull/37) --- ports/atmel-samd/peripherals | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals index 710954269..a7e39c4d0 160000 --- a/ports/atmel-samd/peripherals +++ b/ports/atmel-samd/peripherals @@ -1 +1 @@ -Subproject commit 710954269a34d1b0c5534965f31689a09cf1d197 +Subproject commit a7e39c4d01aa5916015beecb021777617e77b0ad -- cgit v1.2.3 From d6805c0dd40e142654fd45e4d6d43af08871a2c8 Mon Sep 17 00:00:00 2001 From: askpatricw <4002194+askpatrickw@users.noreply.github.com> Date: Sun, 18 Oct 2020 17:15:59 -0700 Subject: SDA and SCL were flipped --- ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c index 967f5e8d9..a1036f850 100644 --- a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c @@ -46,11 +46,11 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO43) }, { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO38) }, { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) }, { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO38) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO33) }, { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) }, { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO33) }, -- cgit v1.2.3 From eb139c9babeda44a7e613602f8aa86d6207cb994 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Mon, 19 Oct 2020 17:41:16 -0700 Subject: Correct pins to not reset. They must have the PORT_ prefix otherwise they mask the wrong pins. Fixes #3552 --- ports/atmel-samd/boards/matrixportal_m4/mpconfigboard.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/matrixportal_m4/mpconfigboard.h b/ports/atmel-samd/boards/matrixportal_m4/mpconfigboard.h index cbca94e03..475752afb 100644 --- a/ports/atmel-samd/boards/matrixportal_m4/mpconfigboard.h +++ b/ports/atmel-samd/boards/matrixportal_m4/mpconfigboard.h @@ -9,7 +9,7 @@ // These are pins not to reset. // QSPI Data pins, PA23 is NeoPixel -#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 | PA23) +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 | PORT_PA23) // QSPI CS, QSPI SCK #define MICROPY_PORT_B (PORT_PB10 | PORT_PB11) #define MICROPY_PORT_C (0) -- cgit v1.2.3 From a2fce305d6b9407ad6af4e6d4721c47fc9e264d4 Mon Sep 17 00:00:00 2001 From: Targett363 Date: Tue, 20 Oct 2020 10:42:14 +0100 Subject: Replacing placeholder PIDs with correct PIDs --- ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk | 2 +- ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk index e307d7d62..f88cb75d2 100644 --- a/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk +++ b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x1209 -USB_PID = 0x0011 +USB_PID = 0x3252 USB_PRODUCT = "Targett Module Clip w/Wroom" USB_MANUFACTURER = "Targett" diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk index aff5ffd6c..e2dc15584 100644 --- a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk +++ b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x1209 -USB_PID = 0x0012 +USB_PID = 0x3253 USB_PRODUCT = "Targett Module Clip w/Wrover" USB_MANUFACTURER = "Targett" -- cgit v1.2.3 From 1eab0692b50f05f6b8194897386cda7720634fe6 Mon Sep 17 00:00:00 2001 From: Christian Walther Date: Tue, 20 Oct 2020 16:37:24 +0200 Subject: Fix missing `nproc` on macOS. 396979a breaks building on macOS: `nproc` is a Linux thing, use a cross-platform alternative. --- ports/atmel-samd/Makefile | 2 +- py/mkenv.mk | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile index 2593377eb..111f12b4e 100644 --- a/ports/atmel-samd/Makefile +++ b/ports/atmel-samd/Makefile @@ -197,7 +197,7 @@ endif LDFLAGS = $(CFLAGS) -nostartfiles -Wl,-nostdlib -Wl,-T,$(GENERATED_LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs -LDFLAGS += -flto=$(shell nproc) +LDFLAGS += -flto=$(shell $(NPROC)) LIBS := -lgcc -lc # Use toolchain libm if we're not using our own. diff --git a/py/mkenv.mk b/py/mkenv.mk index b76dd60f8..cb678e8e7 100644 --- a/py/mkenv.mk +++ b/py/mkenv.mk @@ -55,6 +55,8 @@ PYTHON3 ?= python3 RM = rm RSYNC = rsync SED = sed +# Linux has 'nproc', macOS has 'sysctl -n hw.logicalcpu', this is cross-platform +NPROC = $(PYTHON) -c 'import multiprocessing as mp; print(mp.cpu_count())' AS = $(CROSS_COMPILE)as CC = $(CROSS_COMPILE)gcc -- cgit v1.2.3 From 8beb36c240d162bfb3f12dceb46d409eee26722d Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Tue, 20 Oct 2020 09:24:03 -0700 Subject: Use one lto partition This leads to smaller code size at the expense of slower linking. We can turn partitioning back on with GCC10 because it produces smaller code. --- ports/atmel-samd/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile index 2593377eb..817cc9e3b 100644 --- a/ports/atmel-samd/Makefile +++ b/ports/atmel-samd/Makefile @@ -121,7 +121,7 @@ $(echo PERIPHERALS_CHIP_FAMILY=$(PERIPHERALS_CHIP_FAMILY)) ifeq ($(DEBUG), 1) CFLAGS += -ggdb3 -Og # You may want to disable -flto if it interferes with debugging. - CFLAGS += -flto + CFLAGS += -flto -flto-partition=none # You may want to enable these flags to make setting breakpoints easier. # CFLAGS += -fno-inline -fno-ipa-sra ifeq ($(CHIP_FAMILY), samd21) @@ -144,7 +144,7 @@ else CFLAGS += -finline-limit=$(CFLAGS_INLINE_LIMIT) endif - CFLAGS += -flto + CFLAGS += -flto -flto-partition=none ifeq ($(CIRCUITPY_FULL_BUILD),0) CFLAGS += --param inline-unit-growth=15 --param max-inline-insns-auto=20 -- cgit v1.2.3 From c58b0adf64a99916a3b360d62dee3b2964f3876b Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Tue, 20 Oct 2020 14:49:57 -0700 Subject: Reset sta_mode and ap_mode flags --- ports/esp32s2/common-hal/wifi/__init__.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/__init__.c b/ports/esp32s2/common-hal/wifi/__init__.c index 5c8d2e952..65186e9b1 100644 --- a/ports/esp32s2/common-hal/wifi/__init__.c +++ b/ports/esp32s2/common-hal/wifi/__init__.c @@ -100,6 +100,13 @@ void common_hal_wifi_init(void) { wifi_radio_obj_t* self = &common_hal_wifi_radio_obj; self->netif = esp_netif_create_default_wifi_sta(); + // Even though we just called esp_netif_create_default_wifi_sta, + // station mode isn't actually set until esp_wifi_set_mode() + // is called and the configuration is loaded via esp_wifi_set_config(). + // Set both convienence flags to false so it's not forgotten. + self->sta_mode = 0; + self->ap_mode = 0; + self->event_group_handle = xEventGroupCreateStatic(&self->event_group); ESP_ERROR_CHECK(esp_event_handler_instance_register(WIFI_EVENT, ESP_EVENT_ANY_ID, -- cgit v1.2.3 From e202da4dadeadfe22d30251d99c5247f024bd746 Mon Sep 17 00:00:00 2001 From: "Ryan T. Hamilton" Date: Tue, 20 Oct 2020 15:14:35 -0700 Subject: Change comment wording --- ports/esp32s2/common-hal/wifi/__init__.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/__init__.c b/ports/esp32s2/common-hal/wifi/__init__.c index 65186e9b1..833ef0623 100644 --- a/ports/esp32s2/common-hal/wifi/__init__.c +++ b/ports/esp32s2/common-hal/wifi/__init__.c @@ -101,7 +101,7 @@ void common_hal_wifi_init(void) { self->netif = esp_netif_create_default_wifi_sta(); // Even though we just called esp_netif_create_default_wifi_sta, - // station mode isn't actually set until esp_wifi_set_mode() + // station mode isn't actually ready for use until esp_wifi_set_mode() // is called and the configuration is loaded via esp_wifi_set_config(). // Set both convienence flags to false so it's not forgotten. self->sta_mode = 0; -- cgit v1.2.3 From ff69ab603d0ccec3b44ce72e5f365a0c91d33b97 Mon Sep 17 00:00:00 2001 From: Jerry Needell Date: Wed, 21 Oct 2020 17:07:30 -0400 Subject: fix CPB SPI pin definitions --- ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h index 17b044b14..ef34465dc 100644 --- a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h +++ b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h @@ -59,8 +59,8 @@ #define DEFAULT_I2C_BUS_SCL (&pin_P0_04) #define DEFAULT_I2C_BUS_SDA (&pin_P0_05) -#define DEFAULT_SPI_BUS_SCK (&pin_P0_05) -#define DEFAULT_SPI_BUS_MOSI (&pin_P1_03) +#define DEFAULT_SPI_BUS_SCK (&pin_P0_02) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_03) #define DEFAULT_SPI_BUS_MISO (&pin_P0_29) #define DEFAULT_UART_BUS_RX (&pin_P0_30) -- cgit v1.2.3 From f431f859e74a92099079bd8753c2319566dbf3c7 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Thu, 22 Oct 2020 21:32:44 +0530 Subject: Initial support for native touchio --- ports/esp32s2/common-hal/touchio/TouchIn.c | 109 ++++++++++++++++++++++++++++ ports/esp32s2/common-hal/touchio/TouchIn.h | 42 +++++++++++ ports/esp32s2/common-hal/touchio/__init__.c | 1 + ports/esp32s2/mpconfigport.mk | 4 + ports/esp32s2/peripherals/pins.c | 95 +++++++++++++----------- ports/esp32s2/peripherals/pins.h | 1 + 6 files changed, 208 insertions(+), 44 deletions(-) create mode 100644 ports/esp32s2/common-hal/touchio/TouchIn.c create mode 100644 ports/esp32s2/common-hal/touchio/TouchIn.h create mode 100644 ports/esp32s2/common-hal/touchio/__init__.c (limited to 'ports') diff --git a/ports/esp32s2/common-hal/touchio/TouchIn.c b/ports/esp32s2/common-hal/touchio/TouchIn.c new file mode 100644 index 000000000..7d30d1a32 --- /dev/null +++ b/ports/esp32s2/common-hal/touchio/TouchIn.c @@ -0,0 +1,109 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/touchio/TouchIn.h" +#include "py/runtime.h" + +#include "driver/touch_pad.h" + +static const touch_pad_t touch_pad[] = { + TOUCH_PAD_NUM1, + TOUCH_PAD_NUM2, + TOUCH_PAD_NUM3, + TOUCH_PAD_NUM4, + TOUCH_PAD_NUM5, + TOUCH_PAD_NUM6, + TOUCH_PAD_NUM7, + TOUCH_PAD_NUM8, + TOUCH_PAD_NUM9, + TOUCH_PAD_NUM10, + TOUCH_PAD_NUM11, + TOUCH_PAD_NUM12, + TOUCH_PAD_NUM13, + TOUCH_PAD_NUM14 +}; + +static uint16_t get_raw_reading(touchio_touchin_obj_t *self) { + uint32_t touch_value; + touch_pad_read_raw_data(touch_pad[self->pin], &touch_value); + return touch_value; +} + +void common_hal_touchio_touchin_construct(touchio_touchin_obj_t* self, + const mcu_pin_obj_t *pin) { + if (!pin->has_touch) { + mp_raise_ValueError(translate("Invalid pin")); + } + claim_pin(pin); + + touch_pad_init(); + touch_pad_config(touch_pad[pin->number]); + + touch_pad_set_fsm_mode(TOUCH_FSM_MODE_TIMER); + touch_pad_fsm_start(); + + // Initial values for pins will vary, depending on what peripherals the pins + // share on-chip. + + // Set a "touched" threshold not too far above the initial value. + // For simple finger touch, the values may vary as much as a factor of two, + // but for touches using fruit or other objects, the difference is much less. + + self->pin = pin->number; + self->threshold = get_raw_reading(self) + 100; +} + +bool common_hal_touchio_touchin_deinited(touchio_touchin_obj_t* self) { + return self->pin == 0xff; +} + +void common_hal_touchio_touchin_deinit(touchio_touchin_obj_t* self) { + if (common_hal_touchio_touchin_deinited(self)) { + return; + } + + //touch_pad_deinit(); + + reset_pin_number(self->pin); + self->pin = 0xff; +} + +bool common_hal_touchio_touchin_get_value(touchio_touchin_obj_t *self) { + uint16_t reading = get_raw_reading(self); + return reading > self->threshold; +} + +uint16_t common_hal_touchio_touchin_get_raw_value(touchio_touchin_obj_t *self) { + return get_raw_reading(self); +} + +uint16_t common_hal_touchio_touchin_get_threshold(touchio_touchin_obj_t *self) { + return self->threshold; +} + +void common_hal_touchio_touchin_set_threshold(touchio_touchin_obj_t *self, uint16_t new_threshold) { + self->threshold = new_threshold; +} diff --git a/ports/esp32s2/common-hal/touchio/TouchIn.h b/ports/esp32s2/common-hal/touchio/TouchIn.h new file mode 100644 index 000000000..81d80c9dd --- /dev/null +++ b/ports/esp32s2/common-hal/touchio/TouchIn.h @@ -0,0 +1,42 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_TOUCHIO_TOUCHIN_H +#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_TOUCHIO_TOUCHIN_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + uint8_t pin; + uint16_t threshold; +} touchio_touchin_obj_t; + +void touchin_reset(void); + +#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_TOUCHIO_TOUCHIN_H diff --git a/ports/esp32s2/common-hal/touchio/__init__.c b/ports/esp32s2/common-hal/touchio/__init__.c new file mode 100644 index 000000000..d2290447c --- /dev/null +++ b/ports/esp32s2/common-hal/touchio/__init__.c @@ -0,0 +1 @@ +// No touchio module functions. diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk index 4e8a7bdef..60a3a14ca 100644 --- a/ports/esp32s2/mpconfigport.mk +++ b/ports/esp32s2/mpconfigport.mk @@ -26,4 +26,8 @@ CIRCUITPY_USB_MIDI = 0 CIRCUITPY_WIFI = 1 CIRCUITPY_ESPIDF = 1 +ifndef CIRCUITPY_TOUCHIO_USE_NATIVE +CIRCUITPY_TOUCHIO_USE_NATIVE = 1 +endif + CIRCUITPY_MODULE ?= none diff --git a/ports/esp32s2/peripherals/pins.c b/ports/esp32s2/peripherals/pins.c index 2c8b61c62..e372c84b1 100755 --- a/ports/esp32s2/peripherals/pins.c +++ b/ports/esp32s2/peripherals/pins.c @@ -29,55 +29,62 @@ #define NO_ADC 0 #define NO_ADC_CHANNEL ADC_CHANNEL_MAX +#define TOUCH \ + .has_touch = true, + +#define NO_TOUCH \ + .has_touch = false, + // This macro is used to simplify pin definition in boards//pins.c -#define PIN(p_name, p_number, p_adc_index, p_adc_channel) \ +#define PIN(p_name, p_number, p_adc_index, p_adc_channel, p_touch_channel) \ const mcu_pin_obj_t pin_## p_name = { \ PIN_PREFIX_VALUES \ .number = p_number, \ .adc_index = p_adc_index, \ .adc_channel = p_adc_channel, \ + p_touch_channel \ } -PIN(GPIO0, 0, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO1, 1, ADC_UNIT_1, ADC_CHANNEL_0); -PIN(GPIO2, 2, ADC_UNIT_1, ADC_CHANNEL_1); -PIN(GPIO3, 3, ADC_UNIT_1, ADC_CHANNEL_2); -PIN(GPIO4, 4, ADC_UNIT_1, ADC_CHANNEL_3); -PIN(GPIO5, 5, ADC_UNIT_1, ADC_CHANNEL_4); -PIN(GPIO6, 6, ADC_UNIT_1, ADC_CHANNEL_5); -PIN(GPIO7, 7, ADC_UNIT_1, ADC_CHANNEL_6); -PIN(GPIO8, 8, ADC_UNIT_1, ADC_CHANNEL_7); -PIN(GPIO9, 9, ADC_UNIT_1, ADC_CHANNEL_8); -PIN(GPIO10, 10, ADC_UNIT_1, ADC_CHANNEL_9); -PIN(GPIO11, 11, ADC_UNIT_2, ADC_CHANNEL_0); -PIN(GPIO12, 12, ADC_UNIT_2, ADC_CHANNEL_1); -PIN(GPIO13, 13, ADC_UNIT_2, ADC_CHANNEL_2); -PIN(GPIO14, 14, ADC_UNIT_2, ADC_CHANNEL_3); -PIN(GPIO15, 15, ADC_UNIT_2, ADC_CHANNEL_4); -PIN(GPIO16, 16, ADC_UNIT_2, ADC_CHANNEL_5); -PIN(GPIO17, 17, ADC_UNIT_2, ADC_CHANNEL_6); -PIN(GPIO18, 18, ADC_UNIT_2, ADC_CHANNEL_7); -PIN(GPIO19, 19, ADC_UNIT_2, ADC_CHANNEL_8); -PIN(GPIO20, 20, ADC_UNIT_2, ADC_CHANNEL_9); -PIN(GPIO21, 21, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO26, 26, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO27, 27, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO28, 28, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO29, 29, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO30, 30, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO31, 31, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO32, 32, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO33, 33, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO34, 34, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO35, 35, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO36, 36, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO37, 37, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO38, 38, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO39, 39, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO40, 40, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO41, 41, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO42, 42, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO43, 43, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO44, 44, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO45, 45, NO_ADC, NO_ADC_CHANNEL); -PIN(GPIO46, 46, NO_ADC, NO_ADC_CHANNEL); +PIN(GPIO0, 0, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO1, 1, ADC_UNIT_1, ADC_CHANNEL_0, TOUCH); +PIN(GPIO2, 2, ADC_UNIT_1, ADC_CHANNEL_1, TOUCH); +PIN(GPIO3, 3, ADC_UNIT_1, ADC_CHANNEL_2, TOUCH); +PIN(GPIO4, 4, ADC_UNIT_1, ADC_CHANNEL_3, TOUCH); +PIN(GPIO5, 5, ADC_UNIT_1, ADC_CHANNEL_4, TOUCH); +PIN(GPIO6, 6, ADC_UNIT_1, ADC_CHANNEL_5, TOUCH); +PIN(GPIO7, 7, ADC_UNIT_1, ADC_CHANNEL_6, TOUCH); +PIN(GPIO8, 8, ADC_UNIT_1, ADC_CHANNEL_7, TOUCH); +PIN(GPIO9, 9, ADC_UNIT_1, ADC_CHANNEL_8, TOUCH); +PIN(GPIO10, 10, ADC_UNIT_1, ADC_CHANNEL_9, TOUCH); +PIN(GPIO11, 11, ADC_UNIT_2, ADC_CHANNEL_0, TOUCH); +PIN(GPIO12, 12, ADC_UNIT_2, ADC_CHANNEL_1, TOUCH); +PIN(GPIO13, 13, ADC_UNIT_2, ADC_CHANNEL_2, TOUCH); +PIN(GPIO14, 14, ADC_UNIT_2, ADC_CHANNEL_3, TOUCH); +PIN(GPIO15, 15, ADC_UNIT_2, ADC_CHANNEL_4, NO_TOUCH); +PIN(GPIO16, 16, ADC_UNIT_2, ADC_CHANNEL_5, NO_TOUCH); +PIN(GPIO17, 17, ADC_UNIT_2, ADC_CHANNEL_6, NO_TOUCH); +PIN(GPIO18, 18, ADC_UNIT_2, ADC_CHANNEL_7, NO_TOUCH); +PIN(GPIO19, 19, ADC_UNIT_2, ADC_CHANNEL_8, NO_TOUCH); +PIN(GPIO20, 20, ADC_UNIT_2, ADC_CHANNEL_9, NO_TOUCH); +PIN(GPIO21, 21, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO26, 26, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO27, 27, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO28, 28, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO29, 29, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO30, 30, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO31, 31, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO32, 32, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO33, 33, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO34, 34, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO35, 35, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO36, 36, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO37, 37, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO38, 38, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO39, 39, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO40, 40, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO41, 41, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO42, 42, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO43, 43, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO44, 44, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO45, 45, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO46, 46, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); diff --git a/ports/esp32s2/peripherals/pins.h b/ports/esp32s2/peripherals/pins.h index 84123a80e..8be57f320 100644 --- a/ports/esp32s2/peripherals/pins.h +++ b/ports/esp32s2/peripherals/pins.h @@ -41,6 +41,7 @@ typedef struct { PIN_PREFIX_FIELDS gpio_num_t number; + bool has_touch:1; uint8_t adc_index:2; uint8_t adc_channel:6; } mcu_pin_obj_t; -- cgit v1.2.3 From ef97ed6ab6938bc9c12987d7584cbc715a0f85bf Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Fri, 23 Oct 2020 13:17:49 +0530 Subject: Update touchio implementation --- ports/esp32s2/common-hal/touchio/TouchIn.c | 41 +++++-------- ports/esp32s2/common-hal/touchio/TouchIn.h | 2 +- ports/esp32s2/peripherals/pins.c | 94 ++++++++++++++---------------- ports/esp32s2/peripherals/pins.h | 3 +- 4 files changed, 62 insertions(+), 78 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/touchio/TouchIn.c b/ports/esp32s2/common-hal/touchio/TouchIn.c index 7d30d1a32..3e3e4b551 100644 --- a/ports/esp32s2/common-hal/touchio/TouchIn.c +++ b/ports/esp32s2/common-hal/touchio/TouchIn.c @@ -29,42 +29,31 @@ #include "driver/touch_pad.h" -static const touch_pad_t touch_pad[] = { - TOUCH_PAD_NUM1, - TOUCH_PAD_NUM2, - TOUCH_PAD_NUM3, - TOUCH_PAD_NUM4, - TOUCH_PAD_NUM5, - TOUCH_PAD_NUM6, - TOUCH_PAD_NUM7, - TOUCH_PAD_NUM8, - TOUCH_PAD_NUM9, - TOUCH_PAD_NUM10, - TOUCH_PAD_NUM11, - TOUCH_PAD_NUM12, - TOUCH_PAD_NUM13, - TOUCH_PAD_NUM14 -}; - static uint16_t get_raw_reading(touchio_touchin_obj_t *self) { uint32_t touch_value; - touch_pad_read_raw_data(touch_pad[self->pin], &touch_value); + touch_pad_read_raw_data((touch_pad_t)self->pin->touch_channel, &touch_value); + if (touch_value > UINT16_MAX) { + return UINT16_MAX; + } return touch_value; } void common_hal_touchio_touchin_construct(touchio_touchin_obj_t* self, const mcu_pin_obj_t *pin) { - if (!pin->has_touch) { + if (pin->touch_channel == TOUCH_PAD_MAX) { mp_raise_ValueError(translate("Invalid pin")); } claim_pin(pin); touch_pad_init(); - touch_pad_config(touch_pad[pin->number]); + touch_pad_config((touch_pad_t)pin->touch_channel); touch_pad_set_fsm_mode(TOUCH_FSM_MODE_TIMER); touch_pad_fsm_start(); + // wait for "raw data" to reset + mp_hal_delay_ms(10); + // Initial values for pins will vary, depending on what peripherals the pins // share on-chip. @@ -72,23 +61,21 @@ void common_hal_touchio_touchin_construct(touchio_touchin_obj_t* self, // For simple finger touch, the values may vary as much as a factor of two, // but for touches using fruit or other objects, the difference is much less. - self->pin = pin->number; + self->pin = pin; self->threshold = get_raw_reading(self) + 100; } bool common_hal_touchio_touchin_deinited(touchio_touchin_obj_t* self) { - return self->pin == 0xff; + return self->pin == NULL; } void common_hal_touchio_touchin_deinit(touchio_touchin_obj_t* self) { if (common_hal_touchio_touchin_deinited(self)) { return; } - - //touch_pad_deinit(); - - reset_pin_number(self->pin); - self->pin = 0xff; + touch_pad_deinit(); + reset_pin_number(self->pin->touch_channel); + self->pin = NULL; } bool common_hal_touchio_touchin_get_value(touchio_touchin_obj_t *self) { diff --git a/ports/esp32s2/common-hal/touchio/TouchIn.h b/ports/esp32s2/common-hal/touchio/TouchIn.h index 81d80c9dd..585bb37bf 100644 --- a/ports/esp32s2/common-hal/touchio/TouchIn.h +++ b/ports/esp32s2/common-hal/touchio/TouchIn.h @@ -33,7 +33,7 @@ typedef struct { mp_obj_base_t base; - uint8_t pin; + const mcu_pin_obj_t * pin; uint16_t threshold; } touchio_touchin_obj_t; diff --git a/ports/esp32s2/peripherals/pins.c b/ports/esp32s2/peripherals/pins.c index e372c84b1..0d3d89ad5 100755 --- a/ports/esp32s2/peripherals/pins.c +++ b/ports/esp32s2/peripherals/pins.c @@ -29,11 +29,7 @@ #define NO_ADC 0 #define NO_ADC_CHANNEL ADC_CHANNEL_MAX -#define TOUCH \ - .has_touch = true, - -#define NO_TOUCH \ - .has_touch = false, +#define NO_TOUCH_CHANNEL TOUCH_PAD_MAX // This macro is used to simplify pin definition in boards//pins.c #define PIN(p_name, p_number, p_adc_index, p_adc_channel, p_touch_channel) \ @@ -42,49 +38,49 @@ const mcu_pin_obj_t pin_## p_name = { \ .number = p_number, \ .adc_index = p_adc_index, \ .adc_channel = p_adc_channel, \ - p_touch_channel \ + .touch_channel = p_touch_channel, \ } -PIN(GPIO0, 0, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO1, 1, ADC_UNIT_1, ADC_CHANNEL_0, TOUCH); -PIN(GPIO2, 2, ADC_UNIT_1, ADC_CHANNEL_1, TOUCH); -PIN(GPIO3, 3, ADC_UNIT_1, ADC_CHANNEL_2, TOUCH); -PIN(GPIO4, 4, ADC_UNIT_1, ADC_CHANNEL_3, TOUCH); -PIN(GPIO5, 5, ADC_UNIT_1, ADC_CHANNEL_4, TOUCH); -PIN(GPIO6, 6, ADC_UNIT_1, ADC_CHANNEL_5, TOUCH); -PIN(GPIO7, 7, ADC_UNIT_1, ADC_CHANNEL_6, TOUCH); -PIN(GPIO8, 8, ADC_UNIT_1, ADC_CHANNEL_7, TOUCH); -PIN(GPIO9, 9, ADC_UNIT_1, ADC_CHANNEL_8, TOUCH); -PIN(GPIO10, 10, ADC_UNIT_1, ADC_CHANNEL_9, TOUCH); -PIN(GPIO11, 11, ADC_UNIT_2, ADC_CHANNEL_0, TOUCH); -PIN(GPIO12, 12, ADC_UNIT_2, ADC_CHANNEL_1, TOUCH); -PIN(GPIO13, 13, ADC_UNIT_2, ADC_CHANNEL_2, TOUCH); -PIN(GPIO14, 14, ADC_UNIT_2, ADC_CHANNEL_3, TOUCH); -PIN(GPIO15, 15, ADC_UNIT_2, ADC_CHANNEL_4, NO_TOUCH); -PIN(GPIO16, 16, ADC_UNIT_2, ADC_CHANNEL_5, NO_TOUCH); -PIN(GPIO17, 17, ADC_UNIT_2, ADC_CHANNEL_6, NO_TOUCH); -PIN(GPIO18, 18, ADC_UNIT_2, ADC_CHANNEL_7, NO_TOUCH); -PIN(GPIO19, 19, ADC_UNIT_2, ADC_CHANNEL_8, NO_TOUCH); -PIN(GPIO20, 20, ADC_UNIT_2, ADC_CHANNEL_9, NO_TOUCH); -PIN(GPIO21, 21, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO26, 26, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO27, 27, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO28, 28, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO29, 29, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO30, 30, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO31, 31, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO32, 32, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO33, 33, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO34, 34, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO35, 35, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO36, 36, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO37, 37, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO38, 38, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO39, 39, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO40, 40, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO41, 41, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO42, 42, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO43, 43, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO44, 44, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO45, 45, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); -PIN(GPIO46, 46, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH); +PIN(GPIO0, 0, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO1, 1, ADC_UNIT_1, ADC_CHANNEL_0, TOUCH_PAD_NUM1); +PIN(GPIO2, 2, ADC_UNIT_1, ADC_CHANNEL_1, TOUCH_PAD_NUM2); +PIN(GPIO3, 3, ADC_UNIT_1, ADC_CHANNEL_2, TOUCH_PAD_NUM3); +PIN(GPIO4, 4, ADC_UNIT_1, ADC_CHANNEL_3, TOUCH_PAD_NUM4); +PIN(GPIO5, 5, ADC_UNIT_1, ADC_CHANNEL_4, TOUCH_PAD_NUM5); +PIN(GPIO6, 6, ADC_UNIT_1, ADC_CHANNEL_5, TOUCH_PAD_NUM6); +PIN(GPIO7, 7, ADC_UNIT_1, ADC_CHANNEL_6, TOUCH_PAD_NUM7); +PIN(GPIO8, 8, ADC_UNIT_1, ADC_CHANNEL_7, TOUCH_PAD_NUM8); +PIN(GPIO9, 9, ADC_UNIT_1, ADC_CHANNEL_8, TOUCH_PAD_NUM9); +PIN(GPIO10, 10, ADC_UNIT_1, ADC_CHANNEL_9, TOUCH_PAD_NUM10); +PIN(GPIO11, 11, ADC_UNIT_2, ADC_CHANNEL_0, TOUCH_PAD_NUM11); +PIN(GPIO12, 12, ADC_UNIT_2, ADC_CHANNEL_1, TOUCH_PAD_NUM12); +PIN(GPIO13, 13, ADC_UNIT_2, ADC_CHANNEL_2, TOUCH_PAD_NUM13); +PIN(GPIO14, 14, ADC_UNIT_2, ADC_CHANNEL_3, TOUCH_PAD_NUM14); +PIN(GPIO15, 15, ADC_UNIT_2, ADC_CHANNEL_4, NO_TOUCH_CHANNEL); +PIN(GPIO16, 16, ADC_UNIT_2, ADC_CHANNEL_5, NO_TOUCH_CHANNEL); +PIN(GPIO17, 17, ADC_UNIT_2, ADC_CHANNEL_6, NO_TOUCH_CHANNEL); +PIN(GPIO18, 18, ADC_UNIT_2, ADC_CHANNEL_7, NO_TOUCH_CHANNEL); +PIN(GPIO19, 19, ADC_UNIT_2, ADC_CHANNEL_8, NO_TOUCH_CHANNEL); +PIN(GPIO20, 20, ADC_UNIT_2, ADC_CHANNEL_9, NO_TOUCH_CHANNEL); +PIN(GPIO21, 21, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO26, 26, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO27, 27, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO28, 28, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO29, 29, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO30, 30, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO31, 31, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO32, 32, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO33, 33, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO34, 34, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO35, 35, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO36, 36, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO37, 37, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO38, 38, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO39, 39, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO40, 40, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO41, 41, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO42, 42, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO43, 43, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO44, 44, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO45, 45, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +PIN(GPIO46, 46, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); diff --git a/ports/esp32s2/peripherals/pins.h b/ports/esp32s2/peripherals/pins.h index 8be57f320..c78eb8385 100644 --- a/ports/esp32s2/peripherals/pins.h +++ b/ports/esp32s2/peripherals/pins.h @@ -37,13 +37,14 @@ #include "components/hal/include/hal/gpio_types.h" #include "components/hal/include/hal/adc_types.h" +#include "components/hal/include/hal/touch_sensor_types.h" typedef struct { PIN_PREFIX_FIELDS gpio_num_t number; - bool has_touch:1; uint8_t adc_index:2; uint8_t adc_channel:6; + uint8_t touch_channel; } mcu_pin_obj_t; extern const mcu_pin_obj_t pin_GPIO0; -- cgit v1.2.3 From 396d92f867c66673c8dffc77f7c0cbcaa83a157f Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Wed, 21 Oct 2020 10:38:01 -0500 Subject: esp32s2: Add canio This works in loopback mode, though the hardware filtering only permits a single address or mask filter. --- ports/esp32s2/Makefile | 4 +- .../boards/espressif_kaluga_1/mpconfigboard.mk | 2 +- ports/esp32s2/common-hal/canio/CAN.c | 297 +++++++++++++++++++++ ports/esp32s2/common-hal/canio/CAN.h | 52 ++++ ports/esp32s2/common-hal/canio/Listener.c | 182 +++++++++++++ ports/esp32s2/common-hal/canio/Listener.h | 40 +++ ports/esp32s2/common-hal/canio/__init__.c | 25 ++ ports/esp32s2/common-hal/canio/__init__.h | 27 ++ ports/esp32s2/mpconfigport.mk | 1 + 9 files changed, 627 insertions(+), 3 deletions(-) create mode 100644 ports/esp32s2/common-hal/canio/CAN.c create mode 100644 ports/esp32s2/common-hal/canio/CAN.h create mode 100644 ports/esp32s2/common-hal/canio/Listener.c create mode 100644 ports/esp32s2/common-hal/canio/Listener.h create mode 100644 ports/esp32s2/common-hal/canio/__init__.c create mode 100644 ports/esp32s2/common-hal/canio/__init__.h (limited to 'ports') diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 8d891edd0..5d8ccad50 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -331,10 +331,10 @@ $(BUILD)/firmware.uf2: $(BUILD)/circuitpython-firmware.bin $(Q)$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0xbfdd4eee -b 0x0000 -c -o $@ $^ flash: $(BUILD)/firmware.bin - esptool.py --chip esp32s2 -p $(PORT) --no-stub -b 460800 --before=default_reset --after=hard_reset write_flash $(FLASH_FLAGS) 0x0000 $^ + esptool.py --chip esp32s2 -p $(PORT) -b 460800 --before=default_reset --after=hard_reset write_flash $(FLASH_FLAGS) 0x0000 $^ flash-circuitpython-only: $(BUILD)/circuitpython-firmware.bin - esptool.py --chip esp32s2 -p $(PORT) --no-stub -b 460800 --before=default_reset --after=hard_reset write_flash $(FLASH_FLAGS) 0x10000 $^ + esptool.py --chip esp32s2 -p $(PORT) -b 460800 --before=default_reset --after=hard_reset write_flash $(FLASH_FLAGS) 0x10000 $^ include $(TOP)/py/mkrules.mk diff --git a/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.mk b/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.mk index ba85e46ef..2dce03881 100644 --- a/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.mk +++ b/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.mk @@ -11,7 +11,7 @@ LONGINT_IMPL = MPZ CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 CIRCUITPY_ESP_FLASH_MODE=dio -CIRCUITPY_ESP_FLASH_FREQ=40m +CIRCUITPY_ESP_FLASH_FREQ=80m CIRCUITPY_ESP_FLASH_SIZE=4MB CIRCUITPY_MODULE=wrover diff --git a/ports/esp32s2/common-hal/canio/CAN.c b/ports/esp32s2/common-hal/canio/CAN.c new file mode 100644 index 000000000..f1741969d --- /dev/null +++ b/ports/esp32s2/common-hal/canio/CAN.c @@ -0,0 +1,297 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +#include "py/runtime.h" +#include "py/mperrno.h" + +#include "common-hal/canio/CAN.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "supervisor/port.h" +#include "hal/twai_ll.h" + +#include "hal/twai_types.h" + +STATIC bool reserved_can; + +twai_timing_config_t get_t_config(int baudrate) { + switch(baudrate) { + case 1000000: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_1MBITS(); + return t_config; + } + case 800000: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_800KBITS(); + return t_config; + } + case 500000: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_500KBITS(); + return t_config; + } + case 250000: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_250KBITS(); + return t_config; + } + case 125000: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_125KBITS(); + return t_config; + } + case 100000: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_100KBITS(); + return t_config; + } + case 50000: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_50KBITS(); + return t_config; + } + case 25000: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_25KBITS(); + return t_config; + } + case 20000: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_20KBITS(); + return t_config; + } + case 16000: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_16KBITS(); + return t_config; + } + case 12500: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_12_5KBITS(); + return t_config; + } + case 10000: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_10KBITS(); + return t_config; + } + case 5000: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_5KBITS(); + return t_config; + } + case 1000: + { + twai_timing_config_t t_config = TWAI_TIMING_CONFIG_1KBITS(); + return t_config; + } + default: + mp_raise_ValueError(translate("Baudrate not supported by peripheral")); + } +} + +__attribute__((optimize("O0"))) +void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent) +{ +#define DIV_ROUND(a, b) (((a) + (b)/2) / (b)) +#define DIV_ROUND_UP(a, b) (((a) + (b) - 1) / (b)) + if (reserved_can) { + mp_raise_ValueError(translate("All CAN peripherals are in use")); + } + + if (loopback && silent) { + mp_raise_ValueError(translate("loopback + silent mode not supported by peripheral")); + } + + self->t_config = get_t_config(baudrate);; + twai_general_config_t g_config = TWAI_GENERAL_CONFIG_DEFAULT(-1, -1, TWAI_MODE_NORMAL); + g_config.tx_io = tx->number; + g_config.rx_io = rx->number; + if (loopback) { + g_config.mode = TWAI_MODE_NO_ACK; + } + if (silent) { + g_config.mode = TWAI_MODE_LISTEN_ONLY; + } + self->g_config = g_config; + + { + twai_filter_config_t f_config = TWAI_FILTER_CONFIG_ACCEPT_ALL(); + self->f_config = f_config; + } + + esp_err_t result = twai_driver_install(&self->g_config, &self->t_config, &self->f_config); + if (result == ESP_ERR_NO_MEM) { + mp_raise_msg(&mp_type_MemoryError, translate("ESP-IDF memory allocation failed")); + } else if (result == ESP_ERR_INVALID_ARG) { + mp_raise_ValueError(translate("Invalid pins")); + } else if (result != ESP_OK) { + mp_raise_OSError_msg_varg(translate("twai_driver_install returned esp-idf error #%d"), (int)result); + } + + result = twai_start(); + if (result != ESP_OK) { + mp_raise_OSError_msg_varg(translate("twai_start returned esp-idf error #%d"), (int)result); + } + + self->silent = silent; + self->loopback = loopback; + self->baudrate = baudrate; + self->tx_pin = tx; + self->rx_pin = rx; + + claim_pin(tx); + claim_pin(rx); + + reserved_can = true; +} + +bool common_hal_canio_can_loopback_get(canio_can_obj_t *self) +{ + return self->loopback; +} + +int common_hal_canio_can_baudrate_get(canio_can_obj_t *self) +{ + return self->baudrate; +} + +int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self) +{ + twai_status_info_t info; + twai_get_status_info(&info); + return info.tx_error_counter; +} + +int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self) +{ + twai_status_info_t info; + twai_get_status_info(&info); + return info.rx_error_counter; +} + +canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self) { + twai_status_info_t info; + twai_get_status_info(&info); + if (info.state == TWAI_STATE_BUS_OFF || info.state == TWAI_STATE_RECOVERING) { + return BUS_STATE_OFF; + } + if (info.tx_error_counter > 127 || info.rx_error_counter > 127) { + return BUS_STATE_ERROR_PASSIVE; + } + if (info.tx_error_counter > 96 || info.rx_error_counter > 96) { + return BUS_STATE_ERROR_WARNING; + } + return BUS_STATE_ERROR_ACTIVE; +} + +static void can_restart(void) { + twai_status_info_t info; + twai_get_status_info(&info); + if (info.state != TWAI_STATE_BUS_OFF) { + return; + } + twai_initiate_recovery(); + // wait 100ms (hard coded for now) for bus to recover + uint64_t deadline = port_get_raw_ticks(NULL) + 100; + do { + twai_get_status_info(&info); + } while (port_get_raw_ticks(NULL) < deadline && (info.state == TWAI_STATE_BUS_OFF || info.state == TWAI_STATE_RECOVERING)); +} + +void canio_maybe_auto_restart(canio_can_obj_t *self) { + if (self->auto_restart) can_restart(); +} + +void common_hal_canio_can_restart(canio_can_obj_t *self) { + if (!common_hal_canio_can_auto_restart_get(self)) { + can_restart(); + } +} + +bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self) { + return self->auto_restart; +} + +void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool value) { + self->auto_restart = value; + canio_maybe_auto_restart(self); +} + +void common_hal_canio_can_send(canio_can_obj_t *self, mp_obj_t message_in) +{ + canio_maybe_auto_restart(self); + canio_message_obj_t *message = message_in; + bool rtr = message->base.type == &canio_remote_transmission_request_type; + twai_message_t message_out = { + .extd = message->extended, + .rtr = rtr, + .self = self->loopback, + .identifier = message->id, + .data_length_code = message->size, + }; + if (!rtr) { + memcpy(message_out.data, message->data, message->size); + } + // Allow transmission to occur in background + twai_transmit(&message_out, 0); +} + +bool common_hal_canio_can_silent_get(canio_can_obj_t *self) { + return self->silent; +} + +bool common_hal_canio_can_deinited(canio_can_obj_t *self) { + return !self->tx_pin; +} + +void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self) { + if (common_hal_canio_can_deinited(self)) { + raise_deinited_error(); + } +} + +void common_hal_canio_can_deinit(canio_can_obj_t *self) +{ + if (self->tx_pin) { + (void)twai_stop(); + (void)twai_driver_uninstall(); + reset_pin_number(self->tx_pin->number); + reset_pin_number(self->rx_pin->number); + reserved_can = false; + } + self->tx_pin = NULL; + self->rx_pin = NULL; +} + +void common_hal_canio_reset(void) { + (void)twai_stop(); + (void)twai_driver_uninstall(); + reserved_can = false; +} diff --git a/ports/esp32s2/common-hal/canio/CAN.h b/ports/esp32s2/common-hal/canio/CAN.h new file mode 100644 index 000000000..e15d51590 --- /dev/null +++ b/ports/esp32s2/common-hal/canio/CAN.h @@ -0,0 +1,52 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" +#include "shared-bindings/canio/__init__.h" +#include "shared-bindings/canio/CAN.h" +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/canio/__init__.h" +#include "shared-module/canio/Message.h" + +#include "driver/twai.h" + +#define FILTER_BANK_COUNT (28) + +typedef struct canio_can_obj { + mp_obj_base_t base; + int baudrate; + const mcu_pin_obj_t *rx_pin; + const mcu_pin_obj_t *tx_pin; + bool loopback:1; + bool silent:1; + bool auto_restart:1; + bool fifo_in_use:1; + twai_filter_config_t f_config; + twai_general_config_t g_config; + twai_timing_config_t t_config; +} canio_can_obj_t; diff --git a/ports/esp32s2/common-hal/canio/Listener.c b/ports/esp32s2/common-hal/canio/Listener.c new file mode 100644 index 000000000..fddbfeb58 --- /dev/null +++ b/ports/esp32s2/common-hal/canio/Listener.c @@ -0,0 +1,182 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "py/obj.h" +#include "py/runtime.h" + +#include "common-hal/canio/__init__.h" +#include "common-hal/canio/Listener.h" +#include "shared-bindings/canio/Listener.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/tick.h" +#include "supervisor/shared/safe_mode.h" + +#include "hal/twai_ll.h" + +// IDE = "extended ID" flag of packet header. We always add this bit to the +// mask because a match is always for just one kind of address length +#define FILTER16_IDE (1<<3) +#define FILTER32_IDE (1<<2) + +// Work around a problem reported at +// https://github.com/espressif/esp-idf/issues/6020 where +// twai_ll_set_acc_filter does not work under -Os optimization +__attribute__((optimize("O0"))) +__attribute__((noinline)) +static void canio_set_acc_filter(twai_dev_t* hw, uint32_t code, uint32_t mask, bool single_filter) +{ + uint32_t code_swapped = __builtin_bswap32(code); + uint32_t mask_swapped = __builtin_bswap32(mask); + for (int i = 0; i < 4; i++) { + hw->acceptance_filter.acr[i].val = ((code_swapped >> (i * 8)) & 0xFF); + hw->acceptance_filter.amr[i].val = ((mask_swapped >> (i * 8)) & 0xFF); + } + hw->mode_reg.afm = single_filter; +} + +STATIC void install_standard_filter(canio_listener_obj_t *self, canio_match_obj_t *match) { + canio_set_acc_filter(&TWAI, match->id << 21, ~(match->mask << 21), true); + self->extended = false; + self->standard = true; +} + +STATIC void install_extended_filter(canio_listener_obj_t *self, canio_match_obj_t *match) { + canio_set_acc_filter(&TWAI, match->id << 3, ~(match->mask << 3), true); + self->extended = true; + self->standard = false; +} + +STATIC void install_all_match_filter(canio_listener_obj_t *self) { + canio_set_acc_filter(&TWAI, 0u, ~0u, true); + self->extended = true; + self->standard = true; +} + +__attribute__((noinline,optimize("O0"))) +void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t **matches) { + twai_ll_enter_reset_mode(&TWAI); + + if (!nmatch) { + install_all_match_filter(self); + } else { + canio_match_obj_t *match = matches[0]; + if (match->extended) { + install_extended_filter(self, match); + } else { + install_standard_filter(self, match); + } + } + + twai_ll_exit_reset_mode(&TWAI); +} + + +void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout) { + if (can->fifo_in_use) { + mp_raise_ValueError(translate("All RX FIFOs in use")); + } + if (nmatch > 1) { + mp_raise_ValueError(translate("Filters too complex")); + } + + // Nothing can fail now so it's safe to assign self->can + can->fifo_in_use = 1; + self->can = can; + self->pending = false; + + set_filters(self, nmatch, matches); + self->extended = self->standard = true; + + common_hal_canio_listener_set_timeout(self, timeout); +} + +void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout) { + self->timeout_ms = (int)MICROPY_FLOAT_C_FUN(ceil)(timeout * 1000); +} + +float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self) { + return self->timeout_ms / 1000.0f; +} + +void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self) { + if (!self->can) { + raise_deinited_error(); + } + common_hal_canio_can_check_for_deinit(self->can); +} + +// The API has no peek method so we must receive a packet into a holding area +// and then we can say that we have 1 message pending +int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self) { + while (!self->pending && twai_receive(&self->message_in, 0) == ESP_OK) { + if (self->message_in.extd && self->extended) { + self->pending = true; + } + if (!self->message_in.extd && self->standard) { + self->pending = true; + } + } + return self->pending; +} + +mp_obj_t common_hal_canio_listener_receive(canio_listener_obj_t *self) { + if (!common_hal_canio_listener_in_waiting(self)) { + uint64_t deadline = supervisor_ticks_ms64() + self->timeout_ms; + do { + if (supervisor_ticks_ms64() > deadline) { + return NULL; + } + } while (!common_hal_canio_listener_in_waiting(self)); + } + + bool rtr = self->message_in.rtr; + + int dlc = self->message_in.data_length_code; + canio_message_obj_t *message = m_new_obj(canio_message_obj_t); + message->base.type = rtr ? &canio_remote_transmission_request_type : &canio_message_type; + message->extended = self->message_in.extd; + message->id = self->message_in.identifier; + message->size = dlc; + + if (!rtr) { + MP_STATIC_ASSERT(sizeof(self->message_in.data) == sizeof(message->data)); + memcpy(message->data, self->message_in.data, sizeof(message->data)); + } + + self->pending = false; + + return message; +} + +void common_hal_canio_listener_deinit(canio_listener_obj_t *self) { + if (self->can) { + self->can->fifo_in_use = false; + } + self->can = NULL; +} diff --git a/ports/esp32s2/common-hal/canio/Listener.h b/ports/esp32s2/common-hal/canio/Listener.h new file mode 100644 index 000000000..d24900e43 --- /dev/null +++ b/ports/esp32s2/common-hal/canio/Listener.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "common-hal/canio/CAN.h" +#include "shared-module/canio/Match.h" + +typedef struct canio_listener_obj { + mp_obj_base_t base; + canio_can_obj_t *can; + bool extended:1; + bool standard:1; + bool pending:1; + twai_message_t message_in; + uint32_t timeout_ms; +} canio_listener_obj_t; diff --git a/ports/esp32s2/common-hal/canio/__init__.c b/ports/esp32s2/common-hal/canio/__init__.c new file mode 100644 index 000000000..7932bfc2d --- /dev/null +++ b/ports/esp32s2/common-hal/canio/__init__.c @@ -0,0 +1,25 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ diff --git a/ports/esp32s2/common-hal/canio/__init__.h b/ports/esp32s2/common-hal/canio/__init__.h new file mode 100644 index 000000000..20b6638cd --- /dev/null +++ b/ports/esp32s2/common-hal/canio/__init__.h @@ -0,0 +1,27 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk index 4e8a7bdef..c9863572a 100644 --- a/ports/esp32s2/mpconfigport.mk +++ b/ports/esp32s2/mpconfigport.mk @@ -16,6 +16,7 @@ LONGINT_IMPL = MPZ CIRCUITPY_FULL_BUILD = 1 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_CANIO = 1 CIRCUITPY_COUNTIO = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CPERIPHERAL = 0 -- cgit v1.2.3 From 32f2a8d54cf54bb3f9dcba33f4b617d4dcf8b596 Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Mon, 26 Oct 2020 11:03:54 -0400 Subject: Fix readme link --- ports/esp32s2/README.md | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/README.md b/ports/esp32s2/README.md index 8a6dfbd2d..f3e678de8 100644 --- a/ports/esp32s2/README.md +++ b/ports/esp32s2/README.md @@ -30,18 +30,20 @@ Connect these pins using a [USB adapter](https://www.adafruit.com/product/4090) ## Building and flashing ## -Before building or flashing the ESP32-S2, you must [install the esp-idf](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html). This must be re-done ever time the esp-idf is updated, but not every time you build. Run `cd ports/esp32s2` from `circuitpython/` to move to the esp32s2 port root, and run: +Before building or flashing the ESP32-S2, you must [install the esp-idf](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/get-started/index.html). This must be re-done ever time the esp-idf is updated, but not every time you build. Run `cd ports/esp32s2` from `circuitpython/` to move to the esp32s2 port root, and run: ``` ./esp-idf/install.sh ``` -Additionally, any time you open a new bash environment for building or flashing, you must add the esp-idf tools to your path: +After this initial installation, you must add the esp-idf tools to your path. You must also do this **any time you open a new bash environment for building or flashing**: ``` . esp-idf/export.sh ``` +When Circuitpython updates the ESP-IDF to a new release, you may need to run this installation process again. The exact commands used may also vary based on your bash environment. + Building boards such as the Saola is typically done through `make flash`. The default port is `tty.SLAB_USBtoUART`, which will only work on certain Mac setups. On most machines, both Mac and Linux, you will need to set the port yourself by running `ls /dev/tty.usb*` and selecting the one that only appears when your development board is plugged in. An example make command with the port setting is as follows: ``` -- cgit v1.2.3 From 5deb045a8112100de3cb28fdb7b6c56444663503 Mon Sep 17 00:00:00 2001 From: Gaetan Date: Mon, 26 Oct 2020 23:32:57 +0100 Subject: Ready to PR * ../../.github/workflows/build.yml + boards/holyiot_nrf52840/board.c + boards/holyiot_nrf52840/mpconfigboard.h + boards/holyiot_nrf52840/mpconfigboard.mk + boards/holyiot_nrf52840/pins.c --- .github/workflows/build.yml | 1 + ports/nrf/boards/holyiot_nrf52840/board.c | 38 ++++++++++++++ ports/nrf/boards/holyiot_nrf52840/mpconfigboard.h | 33 ++++++++++++ ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk | 8 +++ ports/nrf/boards/holyiot_nrf52840/pins.c | 59 ++++++++++++++++++++++ 5 files changed, 139 insertions(+) create mode 100644 ports/nrf/boards/holyiot_nrf52840/board.c create mode 100644 ports/nrf/boards/holyiot_nrf52840/mpconfigboard.h create mode 100644 ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk create mode 100644 ports/nrf/boards/holyiot_nrf52840/pins.c (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index feb6a7f63..cada55aaa 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -214,6 +214,7 @@ jobs: - "hallowing_m0_express" - "hallowing_m4_express" - "hiibot_bluefi" + - "holyiot_nrf52840" - "ikigaisense_vita" - "imxrt1010_evk" - "imxrt1020_evk" diff --git a/ports/nrf/boards/holyiot_nrf52840/board.c b/ports/nrf/boards/holyiot_nrf52840/board.c new file mode 100644 index 000000000..4421970ee --- /dev/null +++ b/ports/nrf/boards/holyiot_nrf52840/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.h b/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.h new file mode 100644 index 000000000..3b64d3a62 --- /dev/null +++ b/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "Holyiot nRF52840" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_LED_STATUS (&pin_P0_19) diff --git a/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk b/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk new file mode 100644 index 000000000..d85de7507 --- /dev/null +++ b/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x80A0 +USB_PRODUCT = "HOLYIOTNRF52840" +USB_MANUFACTURER = "Holyiot" + +MCU_CHIP = nrf52840 + +INTERNAL_FLASH_FILESYSTEM = 1 \ No newline at end of file diff --git a/ports/nrf/boards/holyiot_nrf52840/pins.c b/ports/nrf/boards/holyiot_nrf52840/pins.c new file mode 100644 index 000000000..4e2593e58 --- /dev/null +++ b/ports/nrf/boards/holyiot_nrf52840/pins.c @@ -0,0 +1,59 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + + { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) }, + + { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) }, + + + { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, + + // RESET { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) }, + +}; + + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); \ No newline at end of file -- cgit v1.2.3 From fc591c8d847ad543ee2e8a368574783e2c230309 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Mon, 19 Oct 2020 18:30:26 -0700 Subject: Add EInk Portal --- .../boards/adafruit_esp32s2_eink_portal/board.c | 47 ++++++++++++++++++++++ .../adafruit_esp32s2_eink_portal/mpconfigboard.h | 45 +++++++++++++++++++++ .../adafruit_esp32s2_eink_portal/mpconfigboard.mk | 17 ++++++++ .../boards/adafruit_esp32s2_eink_portal/pins.c | 39 ++++++++++++++++++ .../boards/adafruit_esp32s2_eink_portal/sdkconfig | 33 +++++++++++++++ 5 files changed, 181 insertions(+) create mode 100644 ports/esp32s2/boards/adafruit_esp32s2_eink_portal/board.c create mode 100644 ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.h create mode 100644 ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.mk create mode 100644 ports/esp32s2/boards/adafruit_esp32s2_eink_portal/pins.c create mode 100644 ports/esp32s2/boards/adafruit_esp32s2_eink_portal/sdkconfig (limited to 'ports') diff --git a/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/board.c b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/board.c new file mode 100644 index 000000000..9f708874b --- /dev/null +++ b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/board.c @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "shared-bindings/microcontroller/Pin.h" + +void board_init(void) { + // USB + common_hal_never_reset_pin(&pin_GPIO19); + common_hal_never_reset_pin(&pin_GPIO20); + + // Debug UART + common_hal_never_reset_pin(&pin_GPIO43); + common_hal_never_reset_pin(&pin_GPIO44); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.h b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.h new file mode 100644 index 000000000..5a17a0cad --- /dev/null +++ b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "EInk Portal" +#define MICROPY_HW_MCU_NAME "ESP32S2" + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO1) + +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n") + +#define AUTORESET_DELAY_MS 500 + +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO34) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO33) + +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO36) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO35) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO37) diff --git a/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.mk b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.mk new file mode 100644 index 000000000..31aff57da --- /dev/null +++ b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x239A +USB_PID = 0x80E6 +USB_PRODUCT = "EInk Portal" +USB_MANUFACTURER = "Adafruit" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ + +# The default queue depth of 16 overflows on release builds, +# so increase it to 32. +CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 + +CIRCUITPY_ESP_FLASH_MODE=dio +CIRCUITPY_ESP_FLASH_FREQ=40m +CIRCUITPY_ESP_FLASH_SIZE=4MB + +CIRCUITPY_MODULE=wrover diff --git a/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/pins.c b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/pins.c new file mode 100644 index 000000000..2cf3d2402 --- /dev/null +++ b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/pins.c @@ -0,0 +1,39 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_AD1), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO13) }, + + { MP_ROM_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_GPIO16) }, + + { MP_ROM_QSTR(MP_QSTR_EPD_BUSY), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_EPD_RESET), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_EPD_DC), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_EPD_CS), MP_ROM_PTR(&pin_GPIO8) }, + + { MP_ROM_QSTR(MP_QSTR_BUTTON_A), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_B), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_C), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_D), MP_ROM_PTR(&pin_GPIO11) }, + + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_GPIO2) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO34) }, + + { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_GPIO21) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO1) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/sdkconfig b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/sdkconfig new file mode 100644 index 000000000..9d8bbde96 --- /dev/null +++ b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/sdkconfig @@ -0,0 +1,33 @@ +CONFIG_ESP32S2_SPIRAM_SUPPORT=y + +# +# SPI RAM config +# +# CONFIG_SPIRAM_TYPE_AUTO is not set +CONFIG_SPIRAM_TYPE_ESPPSRAM16=y +# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set +# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set +CONFIG_SPIRAM_SIZE=2097152 + +# +# PSRAM clock and cs IO for ESP32S2 +# +CONFIG_DEFAULT_PSRAM_CLK_IO=30 +CONFIG_DEFAULT_PSRAM_CS_IO=26 +# end of PSRAM clock and cs IO for ESP32S2 + +# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set +# CONFIG_SPIRAM_RODATA is not set +# CONFIG_SPIRAM_SPEED_80M is not set +CONFIG_SPIRAM_SPEED_40M=y +# CONFIG_SPIRAM_SPEED_26M is not set +# CONFIG_SPIRAM_SPEED_20M is not set +CONFIG_SPIRAM=y +CONFIG_SPIRAM_BOOT_INIT=y +# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set +CONFIG_SPIRAM_USE_MEMMAP=y +# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set +# CONFIG_SPIRAM_USE_MALLOC is not set +CONFIG_SPIRAM_MEMTEST=y +# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set +# end of SPI RAM config -- cgit v1.2.3 From 95cb5961d26a4e1e048d48266d21547dc9229ba9 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Mon, 26 Oct 2020 16:58:56 -0700 Subject: Fix ESP32-S2 SPI when DMA is sometimes used --- ports/esp32s2/common-hal/busio/SPI.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/busio/SPI.c b/ports/esp32s2/common-hal/busio/SPI.c index 1906ca6f0..490419f34 100644 --- a/ports/esp32s2/common-hal/busio/SPI.c +++ b/ports/esp32s2/common-hal/busio/SPI.c @@ -357,6 +357,9 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_ou } else { hal->dma_enabled = 0; burst_length = sizeof(hal->hw->data_buf); + // When switching to non-DMA, we need to make sure DMA is off. Otherwise, + // the S2 will transmit zeroes instead of our data. + spi_ll_txdma_disable(hal->hw); } // This rounds up. -- cgit v1.2.3 From 2ba66599670c0d3d0f5ef5dc8780c34cf9d61231 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 26 Oct 2020 19:07:37 -0500 Subject: esp32s2: Makefile: restore --no-stub --- ports/esp32s2/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 5d8ccad50..8d891edd0 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -331,10 +331,10 @@ $(BUILD)/firmware.uf2: $(BUILD)/circuitpython-firmware.bin $(Q)$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0xbfdd4eee -b 0x0000 -c -o $@ $^ flash: $(BUILD)/firmware.bin - esptool.py --chip esp32s2 -p $(PORT) -b 460800 --before=default_reset --after=hard_reset write_flash $(FLASH_FLAGS) 0x0000 $^ + esptool.py --chip esp32s2 -p $(PORT) --no-stub -b 460800 --before=default_reset --after=hard_reset write_flash $(FLASH_FLAGS) 0x0000 $^ flash-circuitpython-only: $(BUILD)/circuitpython-firmware.bin - esptool.py --chip esp32s2 -p $(PORT) -b 460800 --before=default_reset --after=hard_reset write_flash $(FLASH_FLAGS) 0x10000 $^ + esptool.py --chip esp32s2 -p $(PORT) --no-stub -b 460800 --before=default_reset --after=hard_reset write_flash $(FLASH_FLAGS) 0x10000 $^ include $(TOP)/py/mkrules.mk -- cgit v1.2.3 From 3a501a04951849ddd83455706fe87a6950d051fe Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 26 Oct 2020 19:18:37 -0500 Subject: esp32s2: canio: respond to review comments * explain the introduction of the temporary variable in get_t_config * get rid of unneeded __attribute__ * get rid of unneeded members of canio_can_obj_t * get rid of unneeded header inclusion --- ports/esp32s2/common-hal/canio/CAN.c | 14 ++++++-------- ports/esp32s2/common-hal/canio/CAN.h | 3 --- 2 files changed, 6 insertions(+), 11 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/canio/CAN.c b/ports/esp32s2/common-hal/canio/CAN.c index f1741969d..768fde243 100644 --- a/ports/esp32s2/common-hal/canio/CAN.c +++ b/ports/esp32s2/common-hal/canio/CAN.c @@ -33,7 +33,6 @@ #include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/util.h" #include "supervisor/port.h" -#include "hal/twai_ll.h" #include "hal/twai_types.h" @@ -43,6 +42,10 @@ twai_timing_config_t get_t_config(int baudrate) { switch(baudrate) { case 1000000: { + // TWAI_TIMING_CONFIG_abc expands to a C designated initializer list + // { .brp = 4, ...}. This is only acceptable to the compiler as an + // initializer and 'return TWAI_TIMING_CONFIG_1MBITS()` is not valid. + // Instead, introduce a temporary, named variable and return it. twai_timing_config_t t_config = TWAI_TIMING_CONFIG_1MBITS(); return t_config; } @@ -116,7 +119,6 @@ twai_timing_config_t get_t_config(int baudrate) { } } -__attribute__((optimize("O0"))) void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent) { #define DIV_ROUND(a, b) (((a) + (b)/2) / (b)) @@ -129,7 +131,7 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mc mp_raise_ValueError(translate("loopback + silent mode not supported by peripheral")); } - self->t_config = get_t_config(baudrate);; + twai_timing_config_t t_config = get_t_config(baudrate); twai_general_config_t g_config = TWAI_GENERAL_CONFIG_DEFAULT(-1, -1, TWAI_MODE_NORMAL); g_config.tx_io = tx->number; g_config.rx_io = rx->number; @@ -139,14 +141,10 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mc if (silent) { g_config.mode = TWAI_MODE_LISTEN_ONLY; } - self->g_config = g_config; - { twai_filter_config_t f_config = TWAI_FILTER_CONFIG_ACCEPT_ALL(); - self->f_config = f_config; - } - esp_err_t result = twai_driver_install(&self->g_config, &self->t_config, &self->f_config); + esp_err_t result = twai_driver_install(&g_config, &t_config, &f_config); if (result == ESP_ERR_NO_MEM) { mp_raise_msg(&mp_type_MemoryError, translate("ESP-IDF memory allocation failed")); } else if (result == ESP_ERR_INVALID_ARG) { diff --git a/ports/esp32s2/common-hal/canio/CAN.h b/ports/esp32s2/common-hal/canio/CAN.h index e15d51590..85fb6972b 100644 --- a/ports/esp32s2/common-hal/canio/CAN.h +++ b/ports/esp32s2/common-hal/canio/CAN.h @@ -46,7 +46,4 @@ typedef struct canio_can_obj { bool silent:1; bool auto_restart:1; bool fifo_in_use:1; - twai_filter_config_t f_config; - twai_general_config_t g_config; - twai_timing_config_t t_config; } canio_can_obj_t; -- cgit v1.2.3 From 54c0e98a37fc3c997d3a7a566a67e33d1636f46a Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Tue, 27 Oct 2020 13:58:23 -0700 Subject: Fix openbook build --- ports/atmel-samd/boards/openbook_m4/board.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/openbook_m4/board.c b/ports/atmel-samd/boards/openbook_m4/board.c index f0010f6d7..07dd1741a 100644 --- a/ports/atmel-samd/boards/openbook_m4/board.c +++ b/ports/atmel-samd/boards/openbook_m4/board.c @@ -97,7 +97,8 @@ void board_init(void) { &pin_PA01, // busy_pin false, // busy_state 5, // seconds_per_frame - false); // chip_select (don't always toggle chip select) + false, // chip_select (don't always toggle chip select) + false); // grayscale } bool board_requests_safe_mode(void) { -- cgit v1.2.3 From d0426b3438a934257c5351f7eb2d9cdd79881c03 Mon Sep 17 00:00:00 2001 From: Noel Gaetan Date: Tue, 27 Oct 2020 23:54:46 +0100 Subject: Update pins.c fix mistake --- ports/nrf/boards/holyiot_nrf52840/pins.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/holyiot_nrf52840/pins.c b/ports/nrf/boards/holyiot_nrf52840/pins.c index 4e2593e58..cdec4dfa8 100644 --- a/ports/nrf/boards/holyiot_nrf52840/pins.c +++ b/ports/nrf/boards/holyiot_nrf52840/pins.c @@ -51,9 +51,9 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, - // RESET { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) }, + // RESET { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) } }; -MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); \ No newline at end of file +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From 27827a4fef74dc66996ecb670f01ad5d58500899 Mon Sep 17 00:00:00 2001 From: Gaetan Date: Wed, 28 Oct 2020 00:34:07 +0100 Subject: Fix EOF error modifié : mpconfigboard.mk modifié : pins.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk | 2 +- ports/nrf/boards/holyiot_nrf52840/pins.c | 4 +--- 2 files changed, 2 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk b/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk index d85de7507..ead205953 100644 --- a/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk +++ b/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk @@ -5,4 +5,4 @@ USB_MANUFACTURER = "Holyiot" MCU_CHIP = nrf52840 -INTERNAL_FLASH_FILESYSTEM = 1 \ No newline at end of file +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/boards/holyiot_nrf52840/pins.c b/ports/nrf/boards/holyiot_nrf52840/pins.c index 4e2593e58..604744e0e 100644 --- a/ports/nrf/boards/holyiot_nrf52840/pins.c +++ b/ports/nrf/boards/holyiot_nrf52840/pins.c @@ -43,7 +43,6 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) }, - { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, @@ -55,5 +54,4 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { }; - -MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); \ No newline at end of file +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From 9b911b2211715e9da7ae55b691f54fe2f33a4486 Mon Sep 17 00:00:00 2001 From: Gaetan Date: Wed, 28 Oct 2020 00:38:07 +0100 Subject: modifié : pins.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- ports/nrf/boards/holyiot_nrf52840/pins.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/nrf/boards/holyiot_nrf52840/pins.c b/ports/nrf/boards/holyiot_nrf52840/pins.c index 604744e0e..8e0667591 100644 --- a/ports/nrf/boards/holyiot_nrf52840/pins.c +++ b/ports/nrf/boards/holyiot_nrf52840/pins.c @@ -50,8 +50,12 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, - // RESET { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) }, + // RESET { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) } }; +<<<<<<< HEAD +======= + +>>>>>>> d0426b3438a934257c5351f7eb2d9cdd79881c03 MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From b44011d196a0a7294fca1e1825054761979ba075 Mon Sep 17 00:00:00 2001 From: Gaetan Date: Wed, 28 Oct 2020 01:43:42 +0100 Subject: fix railing Whitespace pin.c --- ports/nrf/boards/holyiot_nrf52840/pins.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/nrf/boards/holyiot_nrf52840/pins.c b/ports/nrf/boards/holyiot_nrf52840/pins.c index c9e222b67..83be4f0ac 100644 --- a/ports/nrf/boards/holyiot_nrf52840/pins.c +++ b/ports/nrf/boards/holyiot_nrf52840/pins.c @@ -49,7 +49,7 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) }, { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, - + // RESET { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) } }; -- cgit v1.2.3 From 5e3bfa1956ca4d327fcad23ce508ebbdaeac4d69 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Wed, 28 Oct 2020 20:08:25 +0530 Subject: countio implementation for esp32s2 --- ports/esp32s2/common-hal/countio/Counter.c | 69 +++++++++++++++++++++++++++++ ports/esp32s2/common-hal/countio/Counter.h | 15 +++++++ ports/esp32s2/common-hal/countio/__init__.c | 1 + ports/esp32s2/mpconfigport.mk | 2 +- 4 files changed, 86 insertions(+), 1 deletion(-) create mode 100644 ports/esp32s2/common-hal/countio/Counter.c create mode 100644 ports/esp32s2/common-hal/countio/Counter.h create mode 100644 ports/esp32s2/common-hal/countio/__init__.c (limited to 'ports') diff --git a/ports/esp32s2/common-hal/countio/Counter.c b/ports/esp32s2/common-hal/countio/Counter.c new file mode 100644 index 000000000..6a76a163d --- /dev/null +++ b/ports/esp32s2/common-hal/countio/Counter.c @@ -0,0 +1,69 @@ +#include "common-hal/countio/Counter.h" + +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + +#include "driver/pcnt.h" + +static void pcnt_init(countio_counter_obj_t* self) { + int unit = PCNT_UNIT_0; + // Prepare configuration for the PCNT unit + pcnt_config_t pcnt_config = { + // Set PCNT input signal and control GPIOs + .pulse_gpio_num = self->pin->number, + .ctrl_gpio_num = PCNT_PIN_NOT_USED, + .channel = PCNT_CHANNEL_0, + .unit = unit, + // What to do on the positive / negative edge of pulse input? + .pos_mode = PCNT_COUNT_INC, // Count up on the positive edge + .neg_mode = PCNT_COUNT_DIS, // Keep the counter value on the negative edge + }; + // Initialize PCNT unit + pcnt_unit_config(&pcnt_config); + + // Configure and enable the input filter + pcnt_set_filter_value(unit, 100); + pcnt_filter_enable(unit); + + // Initialize PCNT's counter + pcnt_counter_pause(unit); + pcnt_counter_clear(unit); + + // Everything is set up, now go to counting + pcnt_counter_resume(unit); +} + +void common_hal_countio_counter_construct(countio_counter_obj_t* self, + const mcu_pin_obj_t* pin) { + claim_pin(pin); + self->pin = pin; + pcnt_init(self); +} + +bool common_hal_countio_counter_deinited(countio_counter_obj_t* self) { + return self->pin == NULL; +} + +void common_hal_countio_counter_deinit(countio_counter_obj_t* self) { + if (common_hal_countio_counter_deinited(self)) { + return; + } + reset_pin_number(self->pin->number); + self->pin = NULL; +} + +mp_int_t common_hal_countio_counter_get_count(countio_counter_obj_t* self) { + int16_t count; + pcnt_get_counter_value(PCNT_UNIT_0, &count); + return count+self->count; +} + +void common_hal_countio_counter_set_count(countio_counter_obj_t* self, + mp_int_t new_count) { + self->count = new_count; + pcnt_counter_clear(PCNT_UNIT_0); +} + +void common_hal_countio_counter_reset(countio_counter_obj_t* self) { + common_hal_countio_counter_set_count(self, 0); +} diff --git a/ports/esp32s2/common-hal/countio/Counter.h b/ports/esp32s2/common-hal/countio/Counter.h new file mode 100644 index 000000000..3406f9daa --- /dev/null +++ b/ports/esp32s2/common-hal/countio/Counter.h @@ -0,0 +1,15 @@ + +#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_COUNTIO_COUNTER_H +#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_COUNTIO_COUNTER_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t * pin; + mp_int_t count; +} countio_counter_obj_t; + +#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_COUNTIO_COUNT_H diff --git a/ports/esp32s2/common-hal/countio/__init__.c b/ports/esp32s2/common-hal/countio/__init__.c new file mode 100644 index 000000000..b95b20d15 --- /dev/null +++ b/ports/esp32s2/common-hal/countio/__init__.c @@ -0,0 +1 @@ +//No countio module functions diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk index c06c89c90..bdb25a87b 100644 --- a/ports/esp32s2/mpconfigport.mk +++ b/ports/esp32s2/mpconfigport.mk @@ -17,7 +17,7 @@ CIRCUITPY_FULL_BUILD = 1 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 CIRCUITPY_CANIO = 1 -CIRCUITPY_COUNTIO = 0 +CIRCUITPY_COUNTIO = 1 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_ROTARYIO = 0 -- cgit v1.2.3 From 5ab2f16f64f0935ac8ad6fa776c435d55a3cff1e Mon Sep 17 00:00:00 2001 From: Gaetan Date: Wed, 28 Oct 2020 22:08:10 +0100 Subject: Change Board Name to ADM_B_NRF52840_1 edit : .github/workflows/build.yml rename : ports/nrf/boards/holyiot_nrf52840/board.c -> ports/nrf/boards/ADM_B_NRF52840_1/board.c rename : ports/nrf/boards/holyiot_nrf52840/mpconfigboard.h -> ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.h rename : ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk -> ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.mk rename : ports/nrf/boards/holyiot_nrf52840/pins.c -> ports/nrf/boards/ADM_B_NRF52840_1/pins.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .github/workflows/build.yml | 2 +- ports/nrf/boards/ADM_B_NRF52840_1/board.c | 38 +++++++++++++++ ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.h | 33 +++++++++++++ ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.mk | 8 +++ ports/nrf/boards/ADM_B_NRF52840_1/pins.c | 57 ++++++++++++++++++++++ ports/nrf/boards/holyiot_nrf52840/board.c | 38 --------------- ports/nrf/boards/holyiot_nrf52840/mpconfigboard.h | 33 ------------- ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk | 8 --- ports/nrf/boards/holyiot_nrf52840/pins.c | 57 ---------------------- 9 files changed, 137 insertions(+), 137 deletions(-) create mode 100644 ports/nrf/boards/ADM_B_NRF52840_1/board.c create mode 100644 ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.h create mode 100644 ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.mk create mode 100644 ports/nrf/boards/ADM_B_NRF52840_1/pins.c delete mode 100644 ports/nrf/boards/holyiot_nrf52840/board.c delete mode 100644 ports/nrf/boards/holyiot_nrf52840/mpconfigboard.h delete mode 100644 ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk delete mode 100644 ports/nrf/boards/holyiot_nrf52840/pins.c (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index cada55aaa..1a967046c 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -162,6 +162,7 @@ jobs: board: - "8086_commander" - "TG-Watch02A" + - "ADM_B_NRF52840_1" - "aloriumtech_evo_m51" - "aramcon_badge_2019" - "arduino_mkr1300" @@ -214,7 +215,6 @@ jobs: - "hallowing_m0_express" - "hallowing_m4_express" - "hiibot_bluefi" - - "holyiot_nrf52840" - "ikigaisense_vita" - "imxrt1010_evk" - "imxrt1020_evk" diff --git a/ports/nrf/boards/ADM_B_NRF52840_1/board.c b/ports/nrf/boards/ADM_B_NRF52840_1/board.c new file mode 100644 index 000000000..4421970ee --- /dev/null +++ b/ports/nrf/boards/ADM_B_NRF52840_1/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.h b/ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.h new file mode 100644 index 000000000..575d09feb --- /dev/null +++ b/ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "AtelierDuMaker nRF52840 Breakout" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_LED_STATUS (&pin_P0_19) diff --git a/ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.mk b/ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.mk new file mode 100644 index 000000000..f3a2e830d --- /dev/null +++ b/ports/nrf/boards/ADM_B_NRF52840_1/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x80A0 +USB_PRODUCT = "ADM_B_NRF52840_1" +USB_MANUFACTURER = "AtelierDuMaker" + +MCU_CHIP = nrf52840 + +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/boards/ADM_B_NRF52840_1/pins.c b/ports/nrf/boards/ADM_B_NRF52840_1/pins.c new file mode 100644 index 000000000..83be4f0ac --- /dev/null +++ b/ports/nrf/boards/ADM_B_NRF52840_1/pins.c @@ -0,0 +1,57 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + + { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) }, + + { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) }, + + { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, + + // RESET { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) } + +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/holyiot_nrf52840/board.c b/ports/nrf/boards/holyiot_nrf52840/board.c deleted file mode 100644 index 4421970ee..000000000 --- a/ports/nrf/boards/holyiot_nrf52840/board.c +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "boards/board.h" - -void board_init(void) { -} - -bool board_requests_safe_mode(void) { - return false; -} - -void reset_board(void) { - -} diff --git a/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.h b/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.h deleted file mode 100644 index 3b64d3a62..000000000 --- a/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Glenn Ruben Bakke - * - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "nrfx/hal/nrf_gpio.h" - -#define MICROPY_HW_BOARD_NAME "Holyiot nRF52840" -#define MICROPY_HW_MCU_NAME "nRF52840" - -#define MICROPY_HW_LED_STATUS (&pin_P0_19) diff --git a/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk b/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk deleted file mode 100644 index ead205953..000000000 --- a/ports/nrf/boards/holyiot_nrf52840/mpconfigboard.mk +++ /dev/null @@ -1,8 +0,0 @@ -USB_VID = 0x239A -USB_PID = 0x80A0 -USB_PRODUCT = "HOLYIOTNRF52840" -USB_MANUFACTURER = "Holyiot" - -MCU_CHIP = nrf52840 - -INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/boards/holyiot_nrf52840/pins.c b/ports/nrf/boards/holyiot_nrf52840/pins.c deleted file mode 100644 index 83be4f0ac..000000000 --- a/ports/nrf/boards/holyiot_nrf52840/pins.c +++ /dev/null @@ -1,57 +0,0 @@ -#include "shared-bindings/board/__init__.h" - -STATIC const mp_rom_map_elem_t board_module_globals_table[] = { - - { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P0_02) }, - { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, - { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) }, - { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) }, - { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, - { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, - { MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) }, - { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, - { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, - { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, - { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, - { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, - { MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) }, - { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) }, - { MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) }, - { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, - { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, - { MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_28) }, - { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, - { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, - { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) }, - - { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, - { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, - { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) }, - { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, - { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, - { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, - { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) }, - { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, - { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, - { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, - { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) }, - { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, - { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, - { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, - { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, - { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, - { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, - { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) }, - - { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, - { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, - { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, - { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) }, - { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, - { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, - - // RESET { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) } - -}; - -MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From 25bad660c6cfc0c697ad02da18d9b9e8c1d9053e Mon Sep 17 00:00:00 2001 From: lady ada Date: Wed, 28 Oct 2020 19:23:18 -0400 Subject: add light sensor, move batt monitor --- ports/esp32s2/boards/adafruit_esp32s2_eink_portal/pins.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/pins.c b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/pins.c index 2cf3d2402..65bc3fb53 100644 --- a/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/pins.c +++ b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/pins.c @@ -18,8 +18,10 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_BUTTON_C), MP_ROM_PTR(&pin_GPIO12) }, { MP_ROM_QSTR(MP_QSTR_BUTTON_D), MP_ROM_PTR(&pin_GPIO11) }, - { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO2) }, - { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_GPIO3) }, + + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_GPIO4) }, { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO33) }, { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO34) }, -- cgit v1.2.3 From 59b9ca409cc6d1835567f866f9a96c04bc78d2c3 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Wed, 28 Oct 2020 20:33:10 -0400 Subject: matrixportal ESP TX and RX pins were swapped --- ports/atmel-samd/boards/matrixportal_m4/pins.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/matrixportal_m4/pins.c b/ports/atmel-samd/boards/matrixportal_m4/pins.c index 34865597b..1f9956d9e 100644 --- a/ports/atmel-samd/boards/matrixportal_m4/pins.c +++ b/ports/atmel-samd/boards/matrixportal_m4/pins.c @@ -16,8 +16,8 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_BUSY), MP_ROM_PTR(&pin_PA22) }, { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RESET), MP_ROM_PTR(&pin_PA21) }, { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RTS), MP_ROM_PTR(&pin_PA18) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_TX), MP_ROM_PTR(&pin_PA12) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RX), MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_TX), MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_ESP_RX), MP_ROM_PTR(&pin_PA12) }, { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_PB30) }, { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_PB31) }, -- cgit v1.2.3 From a7616808e951b52e2ced08a7a279a224490ae404 Mon Sep 17 00:00:00 2001 From: "ITACA Innovation S.R.L" <40298126+ITACAInnovation@users.noreply.github.com> Date: Sat, 31 Oct 2020 10:12:49 +0100 Subject: Updated pinout --- ports/atmel-samd/boards/uchip/pins.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/uchip/pins.c b/ports/atmel-samd/boards/uchip/pins.c index 856a22074..cfb643233 100644 --- a/ports/atmel-samd/boards/uchip/pins.c +++ b/ports/atmel-samd/boards/uchip/pins.c @@ -1,14 +1,15 @@ #include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA10) }, - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA09) }, - { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA11) }, - { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA02) }, - { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA03) }, - { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA04) }, { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA16) }, { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA10) }, @@ -19,8 +20,10 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA22) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA23) }, - { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA03) }, - { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA31) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA30) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_PA03) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA09) }, { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA08) }, { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA22) }, -- cgit v1.2.3 From 9a8484b853116e6f95f50da6d3bc66323d55ca9f Mon Sep 17 00:00:00 2001 From: "ITACA Innovation S.R.L" <40298126+ITACAInnovation@users.noreply.github.com> Date: Sat, 31 Oct 2020 11:06:56 +0100 Subject: Update mpconfigboard.h Removed ignore PA30 PA31 in order to allow using them as pinout --- ports/atmel-samd/boards/uchip/mpconfigboard.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/uchip/mpconfigboard.h b/ports/atmel-samd/boards/uchip/mpconfigboard.h index 1877a41ef..5d6af4b78 100644 --- a/ports/atmel-samd/boards/uchip/mpconfigboard.h +++ b/ports/atmel-samd/boards/uchip/mpconfigboard.h @@ -16,8 +16,6 @@ #define IGNORE_PIN_PA27 1 #define IGNORE_PIN_PA28 1 -#define IGNORE_PIN_PA30 1 -#define IGNORE_PIN_PA31 1 #define IGNORE_PIN_PB01 1 #define IGNORE_PIN_PB02 1 -- cgit v1.2.3 From 1762a36438f7b54536186ab4d3bb11ef77553168 Mon Sep 17 00:00:00 2001 From: Jerry Needell Date: Sun, 1 Nov 2020 05:46:13 -0500 Subject: restore analogio to feather_m0_rfm9x/rfm69 builds --- ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk | 2 +- ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk index c33ab0740..d746cdf81 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.mk @@ -12,7 +12,7 @@ CIRCUITPY_FULL_BUILD = 0 # A number of modules are removed for RFM69 to make room for frozen libraries. # Many I/O functions are not available. -CIRCUITPY_ANALOGIO = 0 +CIRCUITPY_ANALOGIO = 1 CIRCUITPY_PULSEIO = 0 CIRCUITPY_NEOPIXEL_WRITE = 1 CIRCUITPY_ROTARYIO = 0 diff --git a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk index 49b0ef5e3..d37334688 100644 --- a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.mk @@ -13,7 +13,7 @@ CIRCUITPY_FULL_BUILD = 0 # A number of modules are removed for RFM9x to make room for frozen libraries. # Many I/O functions are not available. -CIRCUITPY_ANALOGIO = 0 +CIRCUITPY_ANALOGIO = 1 CIRCUITPY_PULSEIO = 0 CIRCUITPY_NEOPIXEL_WRITE = 1 CIRCUITPY_ROTARYIO = 0 -- cgit v1.2.3 From 4438050f794edea5c6a3f919964908800dd6b522 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Sun, 1 Nov 2020 18:00:07 +0530 Subject: Add pcnt handler --- locale/circuitpython.pot | 9 +++- ports/esp32s2/Makefile | 1 + ports/esp32s2/common-hal/countio/Counter.c | 70 +++++++++++++++++------------- ports/esp32s2/common-hal/countio/Counter.h | 31 +++++++++++-- ports/esp32s2/pcnt_handler.c | 67 ++++++++++++++++++++++++++++ ports/esp32s2/pcnt_handler.h | 35 +++++++++++++++ 6 files changed, 177 insertions(+), 36 deletions(-) create mode 100644 ports/esp32s2/pcnt_handler.c create mode 100644 ports/esp32s2/pcnt_handler.h (limited to 'ports') diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 16c3dd973..1336ab25c 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-10-21 20:13-0500\n" +"POT-Creation-Date: 2020-11-01 11:11+0530\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -1109,7 +1109,8 @@ msgid "Invalid phase" msgstr "" #: ports/atmel-samd/common-hal/audioio/AudioOut.c -#: ports/atmel-samd/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c +#: ports/atmel-samd/common-hal/touchio/TouchIn.c +#: ports/esp32s2/common-hal/touchio/TouchIn.c shared-bindings/pwmio/PWMOut.c #: shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid pin" msgstr "" @@ -1271,6 +1272,10 @@ msgstr "" msgid "No MOSI Pin" msgstr "" +#: ports/esp32s2/pcnt_handler.c +msgid "No PCNT unit free" +msgstr "" + #: ports/atmel-samd/common-hal/busio/UART.c #: ports/esp32s2/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 8d891edd0..6dbbf58d4 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -173,6 +173,7 @@ SRC_C += \ background.c \ fatfs_port.c \ mphalport.c \ + pcnt_handler.c \ bindings/espidf/__init__.c \ boards/$(BOARD)/board.c \ boards/$(BOARD)/pins.c \ diff --git a/ports/esp32s2/common-hal/countio/Counter.c b/ports/esp32s2/common-hal/countio/Counter.c index 6a76a163d..435762473 100644 --- a/ports/esp32s2/common-hal/countio/Counter.c +++ b/ports/esp32s2/common-hal/countio/Counter.c @@ -1,67 +1,75 @@ -#include "common-hal/countio/Counter.h" +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ -#include "py/runtime.h" -#include "supervisor/shared/translate.h" +#include "common-hal/countio/Counter.h" +#include "common-hal/microcontroller/Pin.h" -#include "driver/pcnt.h" +void common_hal_countio_counter_construct(countio_counter_obj_t* self, + const mcu_pin_obj_t* pin) { + claim_pin(pin); -static void pcnt_init(countio_counter_obj_t* self) { - int unit = PCNT_UNIT_0; // Prepare configuration for the PCNT unit pcnt_config_t pcnt_config = { // Set PCNT input signal and control GPIOs - .pulse_gpio_num = self->pin->number, + .pulse_gpio_num = pin->number, .ctrl_gpio_num = PCNT_PIN_NOT_USED, .channel = PCNT_CHANNEL_0, - .unit = unit, // What to do on the positive / negative edge of pulse input? .pos_mode = PCNT_COUNT_INC, // Count up on the positive edge .neg_mode = PCNT_COUNT_DIS, // Keep the counter value on the negative edge }; // Initialize PCNT unit - pcnt_unit_config(&pcnt_config); - - // Configure and enable the input filter - pcnt_set_filter_value(unit, 100); - pcnt_filter_enable(unit); + pcnt_handler_init(&pcnt_config); - // Initialize PCNT's counter - pcnt_counter_pause(unit); - pcnt_counter_clear(unit); - - // Everything is set up, now go to counting - pcnt_counter_resume(unit); -} - -void common_hal_countio_counter_construct(countio_counter_obj_t* self, - const mcu_pin_obj_t* pin) { - claim_pin(pin); - self->pin = pin; - pcnt_init(self); + self->pin = pin->number; + self->unit = pcnt_config.unit; } bool common_hal_countio_counter_deinited(countio_counter_obj_t* self) { - return self->pin == NULL; + return self->unit == PCNT_UNIT_MAX; } void common_hal_countio_counter_deinit(countio_counter_obj_t* self) { if (common_hal_countio_counter_deinited(self)) { return; } - reset_pin_number(self->pin->number); - self->pin = NULL; + reset_pin_number(self->pin); + pcnt_handler_deinit(&self->unit); } mp_int_t common_hal_countio_counter_get_count(countio_counter_obj_t* self) { int16_t count; - pcnt_get_counter_value(PCNT_UNIT_0, &count); + pcnt_get_counter_value(self->unit, &count); return count+self->count; } void common_hal_countio_counter_set_count(countio_counter_obj_t* self, mp_int_t new_count) { self->count = new_count; - pcnt_counter_clear(PCNT_UNIT_0); + pcnt_counter_clear(self->unit); } void common_hal_countio_counter_reset(countio_counter_obj_t* self) { diff --git a/ports/esp32s2/common-hal/countio/Counter.h b/ports/esp32s2/common-hal/countio/Counter.h index 3406f9daa..63d1eb98b 100644 --- a/ports/esp32s2/common-hal/countio/Counter.h +++ b/ports/esp32s2/common-hal/countio/Counter.h @@ -1,15 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ #ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_COUNTIO_COUNTER_H #define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_COUNTIO_COUNTER_H -#include "common-hal/microcontroller/Pin.h" - #include "py/obj.h" +#include "pcnt_handler.h" typedef struct { mp_obj_base_t base; - const mcu_pin_obj_t * pin; + uint8_t pin; mp_int_t count; + pcnt_unit_t unit; } countio_counter_obj_t; #endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_COUNTIO_COUNT_H diff --git a/ports/esp32s2/pcnt_handler.c b/ports/esp32s2/pcnt_handler.c new file mode 100644 index 000000000..56fb0f21c --- /dev/null +++ b/ports/esp32s2/pcnt_handler.c @@ -0,0 +1,67 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "pcnt_handler.h" + +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + +#define PCNT_UNIT_ACTIVE 1 +#define PCNT_UNIT_INACTIVE 0 + +static uint8_t pcnt_state[4]; + +void pcnt_handler_init(pcnt_config_t* pcnt_config) { + // Look for available pcnt unit + for (uint8_t i = 0; i<=3; i++) { + if (pcnt_state[i] == PCNT_UNIT_INACTIVE) { + pcnt_config->unit = (pcnt_unit_t)i; + pcnt_state[i] = PCNT_UNIT_ACTIVE; + break; + } else if (i == 3) { + mp_raise_RuntimeError(translate("No PCNT unit free")); + } + } + + // Initialize PCNT unit + pcnt_unit_config(pcnt_config); + + // Configure and enable the input filter + pcnt_set_filter_value(pcnt_config->unit, 100); + pcnt_filter_enable(pcnt_config->unit); + + // Initialize PCNT's counter + pcnt_counter_pause(pcnt_config->unit); + pcnt_counter_clear(pcnt_config->unit); + + // Everything is set up, now go to counting + pcnt_counter_resume(pcnt_config->unit); +} + +void pcnt_handler_deinit(pcnt_unit_t* unit) { + pcnt_state[*unit] = PCNT_UNIT_INACTIVE; + *unit = PCNT_UNIT_MAX; +} diff --git a/ports/esp32s2/pcnt_handler.h b/ports/esp32s2/pcnt_handler.h new file mode 100644 index 000000000..4bdaee1b8 --- /dev/null +++ b/ports/esp32s2/pcnt_handler.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_PCNT_HANDLER_H +#define MICROPY_INCLUDED_ESP32S2_PCNT_HANDLER_H + +#include "driver/pcnt.h" + +extern void pcnt_handler_init(pcnt_config_t* pcnt_config); +extern void pcnt_handler_deinit(pcnt_unit_t* unit); + +#endif // MICROPY_INCLUDED_ESP32S2_PCNT_HANDLER_H -- cgit v1.2.3 From 72b829dff02cb9b8ebe6e2b47354f06650dbe864 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Sun, 1 Nov 2020 14:52:03 -0500 Subject: add binascii to most builds --- ports/atmel-samd/mpconfigport.h | 1 + py/circuitpy_mpconfig.h | 10 ++++++++++ py/objmodule.c | 7 ++++++- 3 files changed, 17 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h index f7ccff4da..ed10da9b9 100644 --- a/ports/atmel-samd/mpconfigport.h +++ b/ports/atmel-samd/mpconfigport.h @@ -47,6 +47,7 @@ // MICROPY_PY_UJSON depends on MICROPY_PY_IO #define MICROPY_PY_IO (0) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (0) +#define MICROPY_PY_UBINASCII (0) #define MICROPY_PY_UJSON (0) #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (0) #define MICROPY_PY_UERRNO_LIST \ diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 1e01bd9c5..08efabddb 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -197,6 +197,9 @@ typedef long mp_off_t; #ifndef MICROPY_PY_COLLECTIONS_ORDEREDDICT #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (CIRCUITPY_FULL_BUILD) #endif +#ifndef MICROPY_PY_UBINASCII +#define MICROPY_PY_UBINASCII (CIRCUITPY_FULL_BUILD) +#endif // Opposite setting is deliberate. #define MICROPY_PY_UERRNO_ERRORCODE (!CIRCUITPY_FULL_BUILD) #ifndef MICROPY_PY_URE @@ -699,6 +702,12 @@ extern const struct _mp_obj_module_t ustack_module; #endif // These modules are not yet in shared-bindings, but we prefer the non-uxxx names. +#if MICROPY_PY_UBINASCII +#define BINASCII_MODULE { MP_ROM_QSTR(MP_QSTR_binascii), MP_ROM_PTR(&mp_module_ubinascii) }, +#else +#define BINASCII_MODULE +#endif + #if MICROPY_PY_UERRNO #define ERRNO_MODULE { MP_ROM_QSTR(MP_QSTR_errno), MP_ROM_PTR(&mp_module_uerrno) }, #else @@ -770,6 +779,7 @@ extern const struct _mp_obj_module_t wifi_module; AUDIOMIXER_MODULE \ AUDIOMP3_MODULE \ AUDIOPWMIO_MODULE \ + BINASCII_MODULE \ BITBANGIO_MODULE \ BLEIO_MODULE \ BOARD_MODULE \ diff --git a/py/objmodule.c b/py/objmodule.c index 757aece04..90796c535 100644 --- a/py/objmodule.c +++ b/py/objmodule.c @@ -239,7 +239,12 @@ STATIC const mp_rom_map_elem_t mp_builtin_module_table[] = { { MP_ROM_QSTR(MP_QSTR_hashlib), MP_ROM_PTR(&mp_module_uhashlib) }, #endif #if MICROPY_PY_UBINASCII - { MP_ROM_QSTR(MP_QSTR_binascii), MP_ROM_PTR(&mp_module_ubinascii) }, +#if CIRCUITPY +// CircuitPython: Defined in MICROPY_PORT_BUILTIN_MODULES, so not defined here. +// TODO: move to shared-bindings/ +#else + { MP_ROM_QSTR(MP_QSTR_ubinascii), MP_ROM_PTR(&mp_module_ubinascii) }, +#endif #endif #if MICROPY_PY_URANDOM { MP_ROM_QSTR(MP_QSTR_urandom), MP_ROM_PTR(&mp_module_urandom) }, -- cgit v1.2.3 From 4e52757f2653b16b91856df7575ec503c02c5d22 Mon Sep 17 00:00:00 2001 From: "ITACA Innovation S.R.L" <40298126+ITACAInnovation@users.noreply.github.com> Date: Sun, 1 Nov 2020 22:22:55 +0100 Subject: Update pins.c Added LED, BOOST_EN and VEXT_SELECT pins. --- ports/atmel-samd/boards/uchip/pins.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/boards/uchip/pins.c b/ports/atmel-samd/boards/uchip/pins.c index cfb643233..2d7eeebe1 100644 --- a/ports/atmel-samd/boards/uchip/pins.c +++ b/ports/atmel-samd/boards/uchip/pins.c @@ -1,6 +1,9 @@ #include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_LED_BUILTIN), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_BOOST_EN), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_VEXT_SELECT), MP_ROM_PTR(&pin_PA15) }, { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA06) }, { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA08) }, -- cgit v1.2.3 From 041c2a9f6174996a7c841e4ff7a1e158958c9745 Mon Sep 17 00:00:00 2001 From: Brian Dean Date: Mon, 2 Nov 2020 08:35:25 -0500 Subject: .../boards/bdmicro_vina_d51: PAD updates for better resource flexibility. --- .../boards/bdmicro_vina_d51/mpconfigboard.h | 10 +- ports/atmel-samd/boards/bdmicro_vina_d51/pins.c | 118 +++++++++++---------- 2 files changed, 68 insertions(+), 60 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.h b/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.h index 6bc9bb706..8b015df05 100644 --- a/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.h +++ b/ports/atmel-samd/boards/bdmicro_vina_d51/mpconfigboard.h @@ -12,14 +12,14 @@ #define BOARD_HAS_CRYSTAL 1 -#define DEFAULT_I2C_BUS_SDA (&pin_PB02) -#define DEFAULT_I2C_BUS_SCL (&pin_PB03) +#define DEFAULT_I2C_BUS_SCL (&pin_PA16) +#define DEFAULT_I2C_BUS_SDA (&pin_PA17) +#define DEFAULT_UART_BUS_RX (&pin_PB20) +#define DEFAULT_UART_BUS_TX (&pin_PB21) #define DEFAULT_SPI_BUS_MISO (&pin_PB23) -#define DEFAULT_UART_BUS_TX (&pin_PB24) -#define DEFAULT_UART_BUS_RX (&pin_PB25) #define DEFAULT_SPI_BUS_MOSI (&pin_PC27) #define DEFAULT_SPI_BUS_SCK (&pin_PC28) -#define MICROPY_HW_LED_STATUS (&pin_PA15) +#define MICROPY_HW_LED_STATUS (&pin_PA23) #define MICROPY_HW_LED_RX (&pin_PC05) #define MICROPY_HW_LED_TX (&pin_PC06) diff --git a/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c b/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c index 931e0328f..8eeab8a9a 100644 --- a/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c +++ b/ports/atmel-samd/boards/bdmicro_vina_d51/pins.c @@ -1,64 +1,70 @@ #include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PB08) }, - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB09) }, - { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PC00) }, - { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PC01) }, - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB00) }, - { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PB01) }, - { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB05) }, - { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB06) }, - { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB07) }, - { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PC10) }, - { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PC11) }, - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA14) }, - { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA13) }, - { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PB14) }, - { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB15) }, - { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PC20) }, - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC21) }, - { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA12) }, - { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB31) }, - { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA16) }, - { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PC00) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC02) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB31) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PC16) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PC13) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA14) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA15) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PB12) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_PB13) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PC17) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PC18) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PC19) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC20) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PC21) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB18) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PB19) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PC12) }, { MP_ROM_QSTR(MP_QSTR_DAC0), MP_ROM_PTR(&pin_PA02) }, { MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_ESP01_EN), MP_ROM_PTR(&pin_PC03) }, + { MP_ROM_QSTR(MP_QSTR_ESP01_EN), MP_ROM_PTR(&pin_PC15) }, + { MP_ROM_QSTR(MP_QSTR_E5), MP_ROM_PTR(&pin_PC15) }, { MP_ROM_QSTR(MP_QSTR_ESP01_GPIO0), MP_ROM_PTR(&pin_PA18) }, - { MP_ROM_QSTR(MP_QSTR_UART3_RTS), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_E3), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_ESP01_GPIO2), MP_ROM_PTR(&pin_PA19) }, - { MP_ROM_QSTR(MP_QSTR_UART3_CTS), MP_ROM_PTR(&pin_PA19) }, - { MP_ROM_QSTR(MP_QSTR_ESP01_RESET), MP_ROM_PTR(&pin_PC02) }, - { MP_ROM_QSTR(MP_QSTR_ESP01_RX), MP_ROM_PTR(&pin_PB21) }, - { MP_ROM_QSTR(MP_QSTR_UART3_RX), MP_ROM_PTR(&pin_PB21) }, - { MP_ROM_QSTR(MP_QSTR_ESP01_TX), MP_ROM_PTR(&pin_PB20) }, - { MP_ROM_QSTR(MP_QSTR_UART3_TX), MP_ROM_PTR(&pin_PB20) }, - { MP_ROM_QSTR(MP_QSTR_I2C_SCL), MP_ROM_PTR(&pin_PB03) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB03) }, - { MP_ROM_QSTR(MP_QSTR_I2C_SDA), MP_ROM_PTR(&pin_PB02) }, - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_E4), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_ESP01_RESET), MP_ROM_PTR(&pin_PC14) }, + { MP_ROM_QSTR(MP_QSTR_E6), MP_ROM_PTR(&pin_PC14) }, + { MP_ROM_QSTR(MP_QSTR_ESP01_RX), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_UART3_RX), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_I2C3_SCL), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_E2), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_ESP01_TX), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_UART3_TX), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_I2C3_SDA), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_E1), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_I2C1_SCL), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_I2C1_SDA), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA17) }, { MP_ROM_QSTR(MP_QSTR_I2S_FS_0), MP_ROM_PTR(&pin_PA20) }, - { MP_ROM_QSTR(MP_QSTR_I2S_FS_1), MP_ROM_PTR(&pin_PA23) }, { MP_ROM_QSTR(MP_QSTR_I2S_MCK_0), MP_ROM_PTR(&pin_PB17) }, - { MP_ROM_QSTR(MP_QSTR_I2S_MCK_1), MP_ROM_PTR(&pin_PB13) }, { MP_ROM_QSTR(MP_QSTR_I2S_SCK_0), MP_ROM_PTR(&pin_PB16) }, - { MP_ROM_QSTR(MP_QSTR_I2S_SCK_1), MP_ROM_PTR(&pin_PB12) }, { MP_ROM_QSTR(MP_QSTR_I2S_SDI), MP_ROM_PTR(&pin_PA22) }, { MP_ROM_QSTR(MP_QSTR_I2S_SDO), MP_ROM_PTR(&pin_PA21) }, - { MP_ROM_QSTR(MP_QSTR_LED_B), MP_ROM_PTR(&pin_PA15) }, - { MP_ROM_QSTR(MP_QSTR_LED_STATUS), MP_ROM_PTR(&pin_PA15) }, - { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_PB18) }, - { MP_ROM_QSTR(MP_QSTR_LED_R), MP_ROM_PTR(&pin_PB19) }, + { MP_ROM_QSTR(MP_QSTR_LED_B), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_LED_STATUS), MP_ROM_PTR(&pin_PA23) }, + { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_PB15) }, + { MP_ROM_QSTR(MP_QSTR_LED_R), MP_ROM_PTR(&pin_PB14) }, { MP_ROM_QSTR(MP_QSTR_LED_RX), MP_ROM_PTR(&pin_PC05) }, { MP_ROM_QSTR(MP_QSTR_LED_TX), MP_ROM_PTR(&pin_PC06) }, - { MP_ROM_QSTR(MP_QSTR_RS485_RE), MP_ROM_PTR(&pin_PC15) }, - { MP_ROM_QSTR(MP_QSTR_RS485_RX), MP_ROM_PTR(&pin_PC13) }, - { MP_ROM_QSTR(MP_QSTR_RS485_TE), MP_ROM_PTR(&pin_PC14) }, - { MP_ROM_QSTR(MP_QSTR_RS485_TX), MP_ROM_PTR(&pin_PC12) }, + { MP_ROM_QSTR(MP_QSTR_RS485_RE), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_RS485_RX), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_RS485_TE), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_RS485_TX), MP_ROM_PTR(&pin_PB02) }, { MP_ROM_QSTR(MP_QSTR_SPI_MISO), MP_ROM_PTR(&pin_PB23) }, { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB23) }, { MP_ROM_QSTR(MP_QSTR_SPI_MOSI), MP_ROM_PTR(&pin_PC27) }, @@ -67,14 +73,16 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PC28) }, { MP_ROM_QSTR(MP_QSTR_SPI_SS), MP_ROM_PTR(&pin_PB22) }, { MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PB22) }, - { MP_ROM_QSTR(MP_QSTR_UART1_CTS), MP_ROM_PTR(&pin_PC19) }, - { MP_ROM_QSTR(MP_QSTR_UART1_RTS), MP_ROM_PTR(&pin_PC18) }, - { MP_ROM_QSTR(MP_QSTR_UART1_RX), MP_ROM_PTR(&pin_PC17) }, - { MP_ROM_QSTR(MP_QSTR_UART1_TX), MP_ROM_PTR(&pin_PC16) }, - { MP_ROM_QSTR(MP_QSTR_UART2_RX), MP_ROM_PTR(&pin_PB25) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB25) }, - { MP_ROM_QSTR(MP_QSTR_UART2_TX), MP_ROM_PTR(&pin_PB24) }, - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB24) }, + { MP_ROM_QSTR(MP_QSTR_UART1_CTS), MP_ROM_PTR(&pin_PC25) }, + { MP_ROM_QSTR(MP_QSTR_UART1_RTS), MP_ROM_PTR(&pin_PC24) }, + { MP_ROM_QSTR(MP_QSTR_UART1_RX), MP_ROM_PTR(&pin_PB24) }, + { MP_ROM_QSTR(MP_QSTR_UART1_TX), MP_ROM_PTR(&pin_PB25) }, + { MP_ROM_QSTR(MP_QSTR_UART2_RX), MP_ROM_PTR(&pin_PB20) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB20) }, + { MP_ROM_QSTR(MP_QSTR_I2C2_SCL), MP_ROM_PTR(&pin_PB20) }, + { MP_ROM_QSTR(MP_QSTR_UART2_TX), MP_ROM_PTR(&pin_PB21) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB21) }, + { MP_ROM_QSTR(MP_QSTR_I2C2_SDA), MP_ROM_PTR(&pin_PB21) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, -- cgit v1.2.3 From 1f7a3f0dfab05ab9551f0e1ecff9f45805897837 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Mon, 2 Nov 2020 15:28:30 -0500 Subject: Rev C Feather M4 CAN pin changes --- ports/atmel-samd/boards/feather_m4_can/pins.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/feather_m4_can/pins.c b/ports/atmel-samd/boards/feather_m4_can/pins.c index 2b67709f8..015047330 100644 --- a/ports/atmel-samd/boards/feather_m4_can/pins.c +++ b/ports/atmel-samd/boards/feather_m4_can/pins.c @@ -36,6 +36,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14) }, { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA16) }, { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA18) }, @@ -45,14 +46,17 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA22) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA23) }, - { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_PB03) }, + + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PB00) }, - { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_PB01) }, - { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_PB01) }, + { MP_ROM_QSTR(MP_QSTR_BOOST_ENABLE), MP_ROM_PTR(&pin_PB13) }, { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_PB15) }, { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_PB14) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_STANDBY), MP_ROM_PTR(&pin_PB13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CAN_STANDBY), MP_ROM_PTR(&pin_PB12) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, -- cgit v1.2.3 From 23afe08b6f81b70e2f24c609e6c43b0682aaf30b Mon Sep 17 00:00:00 2001 From: Lucian Copeland Date: Mon, 2 Nov 2020 17:15:19 -0500 Subject: Add GPIO reset to end of neopixel-write --- ports/esp32s2/common-hal/neopixel_write/__init__.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/neopixel_write/__init__.c b/ports/esp32s2/common-hal/neopixel_write/__init__.c index 553cb79f8..63d50bf14 100644 --- a/ports/esp32s2/common-hal/neopixel_write/__init__.c +++ b/ports/esp32s2/common-hal/neopixel_write/__init__.c @@ -125,4 +125,6 @@ void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout // Free channel again esp32s2_peripherals_free_rmt(config.channel); + // Swap pin back to GPIO mode + gpio_set_direction(digitalinout->pin->number, GPIO_MODE_OUTPUT); } -- cgit v1.2.3 From 6c61a53e0fc7a2b56156551a7da07e8734e00a33 Mon Sep 17 00:00:00 2001 From: lady ada Date: Mon, 2 Nov 2020 18:38:23 -0500 Subject: io naming for gpio (credit to @kattni) --- ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c | 60 ++++++++++++++-------- 1 file changed, 40 insertions(+), 20 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c b/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c index 08d2b2a1a..a7fc8b2d7 100644 --- a/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c +++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c @@ -2,41 +2,61 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO1) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO2) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO3) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO4) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO5) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO5) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO6) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO6) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO7) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO8) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO9) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO10) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO11) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO12) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO13) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO14) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO15) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO16) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO21) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO42) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) }, { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_GPIO33) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO33),MP_ROM_PTR(&pin_GPIO33) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_GPIO34) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO34),MP_ROM_PTR(&pin_GPIO34) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_GPIO35) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO35),MP_ROM_PTR(&pin_GPIO35) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_GPIO37) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO37),MP_ROM_PTR(&pin_GPIO37) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO42) }, { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO45) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) }, { MP_OBJ_NEW_QSTR(MP_QSTR_DEBUG_RX), MP_ROM_PTR(&pin_GPIO38) }, { MP_OBJ_NEW_QSTR(MP_QSTR_DEBUG_TX), MP_ROM_PTR(&pin_GPIO37) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_GPIO35) }, - { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_GPIO37) }, - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, -- cgit v1.2.3 From 18838e390a71366ccaa1aaeda8964e65d70fc43f Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Thu, 29 Oct 2020 19:38:25 -0700 Subject: reduce connection footprint and fix recv --- ports/esp32s2/common-hal/socketpool/Socket.c | 22 ++++++++--------- ports/esp32s2/esp-idf-config/sdkconfig.defaults | 33 ++++++++++++++++--------- 2 files changed, 31 insertions(+), 24 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/socketpool/Socket.c b/ports/esp32s2/common-hal/socketpool/Socket.c index 0a994c604..750415dc7 100644 --- a/ports/esp32s2/common-hal/socketpool/Socket.c +++ b/ports/esp32s2/common-hal/socketpool/Socket.c @@ -79,15 +79,15 @@ mp_uint_t common_hal_socketpool_socket_send(socketpool_socket_obj_t* self, const mp_uint_t common_hal_socketpool_socket_recv_into(socketpool_socket_obj_t* self, const uint8_t* buf, mp_uint_t len) { size_t received = 0; - ssize_t last_read = 1; + int status = 0; uint64_t start_ticks = supervisor_ticks_ms64(); int sockfd; esp_err_t err = esp_tls_get_conn_sockfd(self->tcp, &sockfd); if (err != ESP_OK) { mp_raise_OSError(MP_EBADF); } - while (received < len && - last_read > 0 && + while (received == 0 && + status >= 0 && (self->timeout_ms == 0 || supervisor_ticks_ms64() - start_ticks <= self->timeout_ms) && !mp_hal_is_interrupted()) { RUN_BACKGROUND_TASKS; @@ -95,27 +95,25 @@ mp_uint_t common_hal_socketpool_socket_recv_into(socketpool_socket_obj_t* self, if (available == 0) { // This reads the raw socket buffer and is used for non-TLS connections // and between encrypted TLS blocks. - int status = lwip_ioctl(sockfd, FIONREAD, &available); - if (status < 0) { - last_read = status; - break; - } + status = lwip_ioctl(sockfd, FIONREAD, &available); } size_t remaining = len - received; if (available > remaining) { available = remaining; } if (available > 0) { - last_read = esp_tls_conn_read(self->tcp, (void*) buf + received, available); - received += last_read; + status = esp_tls_conn_read(self->tcp, (void*) buf + received, available); + if (status > 0) { + received += status; + } } } - if (last_read == 0) { + if (received == 0) { // socket closed common_hal_socketpool_socket_close(self); } - if (last_read < 0) { + if (status < 0) { mp_raise_BrokenPipeError(); } return received; diff --git a/ports/esp32s2/esp-idf-config/sdkconfig.defaults b/ports/esp32s2/esp-idf-config/sdkconfig.defaults index 4094367e0..37b33fc69 100644 --- a/ports/esp32s2/esp-idf-config/sdkconfig.defaults +++ b/ports/esp32s2/esp-idf-config/sdkconfig.defaults @@ -135,6 +135,7 @@ CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y # CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set # CONFIG_COMPILER_WARN_WRITE_STRINGS is not set # CONFIG_COMPILER_DISABLE_GCC8_WARNINGS is not set +# CONFIG_COMPILER_DUMP_RTL_FILES is not set # end of Compiler options # @@ -332,12 +333,13 @@ CONFIG_ESP_TIMER_IMPL_SYSTIMER=y # # Wi-Fi # -CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 -CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32 +CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=4 +CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=8 # CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1 -CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32 +CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM=16 +CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=16 # CONFIG_ESP32_WIFI_CSI_ENABLED is not set CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y CONFIG_ESP32_WIFI_TX_BA_WIN=6 @@ -439,7 +441,7 @@ CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y # CONFIG_LWIP_L2_TO_L3_COPY is not set # CONFIG_LWIP_IRAM_OPTIMIZATION is not set CONFIG_LWIP_TIMERS_ONDEMAND=y -CONFIG_LWIP_MAX_SOCKETS=10 +CONFIG_LWIP_MAX_SOCKETS=4 # CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set # CONFIG_LWIP_SO_LINGER is not set CONFIG_LWIP_SO_REUSE=y @@ -459,6 +461,9 @@ CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32 CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y # CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set +# +# CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set + # # DHCP server # @@ -474,15 +479,15 @@ CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8 # # TCP # -CONFIG_LWIP_MAX_ACTIVE_TCP=16 -CONFIG_LWIP_MAX_LISTENING_TCP=16 +CONFIG_LWIP_MAX_ACTIVE_TCP=4 +CONFIG_LWIP_MAX_LISTENING_TCP=4 CONFIG_LWIP_TCP_MAXRTX=12 CONFIG_LWIP_TCP_SYNMAXRTX=6 CONFIG_LWIP_TCP_MSS=1440 CONFIG_LWIP_TCP_TMR_INTERVAL=250 CONFIG_LWIP_TCP_MSL=60000 -CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744 -CONFIG_LWIP_TCP_WND_DEFAULT=5744 +CONFIG_LWIP_TCP_SND_BUF_DEFAULT=2880 +CONFIG_LWIP_TCP_WND_DEFAULT=2880 CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 CONFIG_LWIP_TCP_QUEUE_OOSEQ=y # CONFIG_LWIP_TCP_SACK_OUT is not set @@ -505,6 +510,8 @@ CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF # CONFIG_LWIP_PPP_SUPPORT is not set +CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3 +CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5 # CONFIG_LWIP_SLIP_SUPPORT is not set # @@ -552,8 +559,10 @@ CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y # CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 -CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096 -# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set +CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=2048 +CONFIG_MBEDTLS_DYNAMIC_BUFFER=y +CONFIG_MBEDTLS_DYNAMIC_FREE_PEER_CERT=y +CONFIG_MBEDTLS_DYNAMIC_FREE_CONFIG_DATA=y # CONFIG_MBEDTLS_DEBUG is not set # @@ -824,8 +833,8 @@ CONFIG_TCP_MAXRTX=12 CONFIG_TCP_SYNMAXRTX=6 CONFIG_TCP_MSS=1440 CONFIG_TCP_MSL=60000 -CONFIG_TCP_SND_BUF_DEFAULT=5744 -CONFIG_TCP_WND_DEFAULT=5744 +CONFIG_TCP_SND_BUF_DEFAULT=2880 +CONFIG_TCP_WND_DEFAULT=2880 CONFIG_TCP_RECVMBOX_SIZE=6 CONFIG_TCP_QUEUE_OOSEQ=y # CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set -- cgit v1.2.3 From 7441344c6f29d9dbf7f8cedef55f394c42916963 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Mon, 2 Nov 2020 17:22:24 -0800 Subject: Add new config options to default --- ports/esp32s2/esp-idf-config/sdkconfig.defaults | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/esp-idf-config/sdkconfig.defaults b/ports/esp32s2/esp-idf-config/sdkconfig.defaults index 37b33fc69..025b05caa 100644 --- a/ports/esp32s2/esp-idf-config/sdkconfig.defaults +++ b/ports/esp32s2/esp-idf-config/sdkconfig.defaults @@ -264,6 +264,11 @@ CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP=y # CONFIG_PM_ENABLE is not set # end of Power Management +# +# ADC-Calibration +# +# end of ADC-Calibration + # # Common ESP-related # @@ -403,6 +408,7 @@ CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 # CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y # CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set +# CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set CONFIG_FREERTOS_DEBUG_OCDAWARE=y # end of FreeRTOS @@ -715,6 +721,7 @@ CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20 CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1 CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192 +# CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set # # Auto-detect flash chips -- cgit v1.2.3 From c4521287e39abf92f1833a25f950aa5bd8e4857c Mon Sep 17 00:00:00 2001 From: lady ada Date: Mon, 2 Nov 2020 23:22:53 -0500 Subject: add rx/tx default uart names --- ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c b/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c index a7fc8b2d7..dbd6cfef8 100644 --- a/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c +++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c @@ -19,8 +19,12 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO4) }, { MP_OBJ_NEW_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO5) }, { MP_OBJ_NEW_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO6) }, { MP_OBJ_NEW_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) }, { MP_OBJ_NEW_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) }, { MP_OBJ_NEW_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) }, -- cgit v1.2.3 From 4055c5ac61f824f7f2cfd72e670037af2f601427 Mon Sep 17 00:00:00 2001 From: Ed Hagerty Date: Tue, 3 Nov 2020 17:14:58 +0000 Subject: Update README.md --- ports/esp32s2/README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/esp32s2/README.md b/ports/esp32s2/README.md index f3e678de8..0738d520e 100644 --- a/ports/esp32s2/README.md +++ b/ports/esp32s2/README.md @@ -30,7 +30,7 @@ Connect these pins using a [USB adapter](https://www.adafruit.com/product/4090) ## Building and flashing ## -Before building or flashing the ESP32-S2, you must [install the esp-idf](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/get-started/index.html). This must be re-done ever time the esp-idf is updated, but not every time you build. Run `cd ports/esp32s2` from `circuitpython/` to move to the esp32s2 port root, and run: +Before building or flashing the ESP32-S2, you must [install the esp-idf](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/get-started/index.html). This must be re-done every time the esp-idf is updated, but not every time you build. Run `cd ports/esp32s2` from `circuitpython/` to move to the esp32s2 port root, and run: ``` ./esp-idf/install.sh -- cgit v1.2.3 From ca935c0dafba767f8eae681664972d0f6a0c5507 Mon Sep 17 00:00:00 2001 From: "ITACA Innovation S.R.L" <40298126+ITACAInnovation@users.noreply.github.com> Date: Tue, 3 Nov 2020 21:22:19 +0100 Subject: Update pins.c Changed builtin to standard --- ports/atmel-samd/boards/uchip/pins.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/uchip/pins.c b/ports/atmel-samd/boards/uchip/pins.c index 2d7eeebe1..de5508110 100644 --- a/ports/atmel-samd/boards/uchip/pins.c +++ b/ports/atmel-samd/boards/uchip/pins.c @@ -1,7 +1,7 @@ #include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_LED_BUILTIN), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA07) }, { MP_ROM_QSTR(MP_QSTR_BOOST_EN), MP_ROM_PTR(&pin_PA14) }, { MP_ROM_QSTR(MP_QSTR_VEXT_SELECT), MP_ROM_PTR(&pin_PA15) }, { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA06) }, -- cgit v1.2.3 From fe6bfde590fc325c984c679825024241afd23a5f Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Wed, 4 Nov 2020 21:20:24 +0530 Subject: move pcnt handler --- locale/circuitpython.pot | 10 ++--- ports/esp32s2/Makefile | 2 +- ports/esp32s2/pcnt_handler.c | 67 -------------------------------- ports/esp32s2/pcnt_handler.h | 35 ----------------- ports/esp32s2/peripherals/pcnt_handler.c | 67 ++++++++++++++++++++++++++++++++ ports/esp32s2/peripherals/pcnt_handler.h | 35 +++++++++++++++++ 6 files changed, 108 insertions(+), 108 deletions(-) delete mode 100644 ports/esp32s2/pcnt_handler.c delete mode 100644 ports/esp32s2/pcnt_handler.h create mode 100644 ports/esp32s2/peripherals/pcnt_handler.c create mode 100644 ports/esp32s2/peripherals/pcnt_handler.h (limited to 'ports') diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 1336ab25c..b4445abfb 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-11-01 11:11+0530\n" +"POT-Creation-Date: 2020-11-04 21:18+0530\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME \n" "Language-Team: LANGUAGE \n" @@ -296,6 +296,10 @@ msgstr "" msgid "All I2C peripherals are in use" msgstr "" +#: ports/esp32s2/peripherals/pcnt_handler.c +msgid "All PCNT units in use" +msgstr "" + #: ports/atmel-samd/common-hal/canio/Listener.c #: ports/esp32s2/common-hal/canio/Listener.c #: ports/stm/common-hal/canio/Listener.c @@ -1272,10 +1276,6 @@ msgstr "" msgid "No MOSI Pin" msgstr "" -#: ports/esp32s2/pcnt_handler.c -msgid "No PCNT unit free" -msgstr "" - #: ports/atmel-samd/common-hal/busio/UART.c #: ports/esp32s2/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 6dbbf58d4..56f0d46a3 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -173,7 +173,6 @@ SRC_C += \ background.c \ fatfs_port.c \ mphalport.c \ - pcnt_handler.c \ bindings/espidf/__init__.c \ boards/$(BOARD)/board.c \ boards/$(BOARD)/pins.c \ @@ -189,6 +188,7 @@ SRC_C += \ lib/utils/pyexec.c \ lib/utils/stdout_helpers.c \ lib/utils/sys_stdio_mphal.c \ + peripherals/pcnt_handler.c \ peripherals/pins.c \ peripherals/rmt.c \ supervisor/shared/memory.c diff --git a/ports/esp32s2/pcnt_handler.c b/ports/esp32s2/pcnt_handler.c deleted file mode 100644 index 56fb0f21c..000000000 --- a/ports/esp32s2/pcnt_handler.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 microDev - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "pcnt_handler.h" - -#include "py/runtime.h" -#include "supervisor/shared/translate.h" - -#define PCNT_UNIT_ACTIVE 1 -#define PCNT_UNIT_INACTIVE 0 - -static uint8_t pcnt_state[4]; - -void pcnt_handler_init(pcnt_config_t* pcnt_config) { - // Look for available pcnt unit - for (uint8_t i = 0; i<=3; i++) { - if (pcnt_state[i] == PCNT_UNIT_INACTIVE) { - pcnt_config->unit = (pcnt_unit_t)i; - pcnt_state[i] = PCNT_UNIT_ACTIVE; - break; - } else if (i == 3) { - mp_raise_RuntimeError(translate("No PCNT unit free")); - } - } - - // Initialize PCNT unit - pcnt_unit_config(pcnt_config); - - // Configure and enable the input filter - pcnt_set_filter_value(pcnt_config->unit, 100); - pcnt_filter_enable(pcnt_config->unit); - - // Initialize PCNT's counter - pcnt_counter_pause(pcnt_config->unit); - pcnt_counter_clear(pcnt_config->unit); - - // Everything is set up, now go to counting - pcnt_counter_resume(pcnt_config->unit); -} - -void pcnt_handler_deinit(pcnt_unit_t* unit) { - pcnt_state[*unit] = PCNT_UNIT_INACTIVE; - *unit = PCNT_UNIT_MAX; -} diff --git a/ports/esp32s2/pcnt_handler.h b/ports/esp32s2/pcnt_handler.h deleted file mode 100644 index 4bdaee1b8..000000000 --- a/ports/esp32s2/pcnt_handler.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 microDev - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP32S2_PCNT_HANDLER_H -#define MICROPY_INCLUDED_ESP32S2_PCNT_HANDLER_H - -#include "driver/pcnt.h" - -extern void pcnt_handler_init(pcnt_config_t* pcnt_config); -extern void pcnt_handler_deinit(pcnt_unit_t* unit); - -#endif // MICROPY_INCLUDED_ESP32S2_PCNT_HANDLER_H diff --git a/ports/esp32s2/peripherals/pcnt_handler.c b/ports/esp32s2/peripherals/pcnt_handler.c new file mode 100644 index 000000000..5a0cc9a7c --- /dev/null +++ b/ports/esp32s2/peripherals/pcnt_handler.c @@ -0,0 +1,67 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "pcnt_handler.h" + +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + +#define PCNT_UNIT_ACTIVE 1 +#define PCNT_UNIT_INACTIVE 0 + +static uint8_t pcnt_state[4]; + +void pcnt_handler_init(pcnt_config_t* pcnt_config) { + // Look for available pcnt unit + for (uint8_t i = 0; i<=3; i++) { + if (pcnt_state[i] == PCNT_UNIT_INACTIVE) { + pcnt_config->unit = (pcnt_unit_t)i; + pcnt_state[i] = PCNT_UNIT_ACTIVE; + break; + } else if (i == 3) { + mp_raise_RuntimeError(translate("All PCNT units in use")); + } + } + + // Initialize PCNT unit + pcnt_unit_config(pcnt_config); + + // Configure and enable the input filter + pcnt_set_filter_value(pcnt_config->unit, 100); + pcnt_filter_enable(pcnt_config->unit); + + // Initialize PCNT's counter + pcnt_counter_pause(pcnt_config->unit); + pcnt_counter_clear(pcnt_config->unit); + + // Everything is set up, now go to counting + pcnt_counter_resume(pcnt_config->unit); +} + +void pcnt_handler_deinit(pcnt_unit_t* unit) { + pcnt_state[*unit] = PCNT_UNIT_INACTIVE; + *unit = PCNT_UNIT_MAX; +} diff --git a/ports/esp32s2/peripherals/pcnt_handler.h b/ports/esp32s2/peripherals/pcnt_handler.h new file mode 100644 index 000000000..f44ee1f83 --- /dev/null +++ b/ports/esp32s2/peripherals/pcnt_handler.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H +#define MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H + +#include "driver/pcnt.h" + +extern void pcnt_handler_init(pcnt_config_t* pcnt_config); +extern void pcnt_handler_deinit(pcnt_unit_t* unit); + +#endif // MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H -- cgit v1.2.3 From 92cd599ea31482b5462438334ef36ae3cfd9dba8 Mon Sep 17 00:00:00 2001 From: cyz Date: Thu, 5 Nov 2020 09:14:53 +0800 Subject: Modify the pins of the hiibot_bluefi. --- ports/nrf/boards/hiibot_bluefi/pins.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/nrf/boards/hiibot_bluefi/pins.c b/ports/nrf/boards/hiibot_bluefi/pins.c index 340ea948c..bce4ee52d 100644 --- a/ports/nrf/boards/hiibot_bluefi/pins.c +++ b/ports/nrf/boards/hiibot_bluefi/pins.c @@ -109,10 +109,10 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_P0_27) }, { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_P0_27) }, - { MP_ROM_QSTR(MP_QSTR_P27), MP_ROM_PTR(&pin_P1_14) }, - { MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_P1_14) }, - { MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_P1_14) }, - { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_P27), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_P1_13) }, + //{ MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_P1_13) }, // P28~P33/D28~D33 connecte into QSPI FlashROM (W25Q16JV_IQ) -- cgit v1.2.3 From d8ef9a127b4914f7d9b50131c15e653aef94cb8f Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Thu, 5 Nov 2020 10:10:39 +0530 Subject: rename pcnt_handler to pcnt --- ports/esp32s2/Makefile | 2 +- ports/esp32s2/common-hal/countio/Counter.c | 5 ++- ports/esp32s2/common-hal/countio/Counter.h | 2 +- ports/esp32s2/peripherals/pcnt.c | 67 ++++++++++++++++++++++++++++++ ports/esp32s2/peripherals/pcnt.h | 35 ++++++++++++++++ ports/esp32s2/peripherals/pcnt_handler.c | 67 ------------------------------ ports/esp32s2/peripherals/pcnt_handler.h | 35 ---------------- 7 files changed, 107 insertions(+), 106 deletions(-) create mode 100644 ports/esp32s2/peripherals/pcnt.c create mode 100644 ports/esp32s2/peripherals/pcnt.h delete mode 100644 ports/esp32s2/peripherals/pcnt_handler.c delete mode 100644 ports/esp32s2/peripherals/pcnt_handler.h (limited to 'ports') diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 56f0d46a3..55d6e91d4 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -188,7 +188,7 @@ SRC_C += \ lib/utils/pyexec.c \ lib/utils/stdout_helpers.c \ lib/utils/sys_stdio_mphal.c \ - peripherals/pcnt_handler.c \ + peripherals/pcnt.c \ peripherals/pins.c \ peripherals/rmt.c \ supervisor/shared/memory.c diff --git a/ports/esp32s2/common-hal/countio/Counter.c b/ports/esp32s2/common-hal/countio/Counter.c index 435762473..81f9f7ad2 100644 --- a/ports/esp32s2/common-hal/countio/Counter.c +++ b/ports/esp32s2/common-hal/countio/Counter.c @@ -42,7 +42,8 @@ void common_hal_countio_counter_construct(countio_counter_obj_t* self, .neg_mode = PCNT_COUNT_DIS, // Keep the counter value on the negative edge }; // Initialize PCNT unit - pcnt_handler_init(&pcnt_config); + // This also sets pcnt_config.unit + peripherals_pcnt_init(&pcnt_config); self->pin = pin->number; self->unit = pcnt_config.unit; @@ -57,7 +58,7 @@ void common_hal_countio_counter_deinit(countio_counter_obj_t* self) { return; } reset_pin_number(self->pin); - pcnt_handler_deinit(&self->unit); + peripherals_pcnt_deinit(&self->unit); } mp_int_t common_hal_countio_counter_get_count(countio_counter_obj_t* self) { diff --git a/ports/esp32s2/common-hal/countio/Counter.h b/ports/esp32s2/common-hal/countio/Counter.h index 63d1eb98b..20fe5b83e 100644 --- a/ports/esp32s2/common-hal/countio/Counter.h +++ b/ports/esp32s2/common-hal/countio/Counter.h @@ -28,7 +28,7 @@ #define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_COUNTIO_COUNTER_H #include "py/obj.h" -#include "pcnt_handler.h" +#include "peripherals/pcnt.h" typedef struct { mp_obj_base_t base; diff --git a/ports/esp32s2/peripherals/pcnt.c b/ports/esp32s2/peripherals/pcnt.c new file mode 100644 index 000000000..e7eb32c1d --- /dev/null +++ b/ports/esp32s2/peripherals/pcnt.c @@ -0,0 +1,67 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "peripherals/pcnt.h" + +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + +#define PCNT_UNIT_ACTIVE 1 +#define PCNT_UNIT_INACTIVE 0 + +static uint8_t pcnt_state[4]; + +void peripherals_pcnt_init(pcnt_config_t* pcnt_config) { + // Look for available pcnt unit + for (uint8_t i = 0; i<=3; i++) { + if (pcnt_state[i] == PCNT_UNIT_INACTIVE) { + pcnt_config->unit = (pcnt_unit_t)i; + pcnt_state[i] = PCNT_UNIT_ACTIVE; + break; + } else if (i == 3) { + mp_raise_RuntimeError(translate("All PCNT units in use")); + } + } + + // Initialize PCNT unit + pcnt_unit_config(pcnt_config); + + // Configure and enable the input filter + pcnt_set_filter_value(pcnt_config->unit, 100); + pcnt_filter_enable(pcnt_config->unit); + + // Initialize PCNT's counter + pcnt_counter_pause(pcnt_config->unit); + pcnt_counter_clear(pcnt_config->unit); + + // Everything is set up, now go to counting + pcnt_counter_resume(pcnt_config->unit); +} + +void peripherals_pcnt_deinit(pcnt_unit_t* unit) { + pcnt_state[*unit] = PCNT_UNIT_INACTIVE; + *unit = PCNT_UNIT_MAX; +} diff --git a/ports/esp32s2/peripherals/pcnt.h b/ports/esp32s2/peripherals/pcnt.h new file mode 100644 index 000000000..64072501c --- /dev/null +++ b/ports/esp32s2/peripherals/pcnt.h @@ -0,0 +1,35 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H +#define MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H + +#include "driver/pcnt.h" + +extern void peripherals_pcnt_init(pcnt_config_t* pcnt_config); +extern void peripherals_pcnt_deinit(pcnt_unit_t* unit); + +#endif // MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H diff --git a/ports/esp32s2/peripherals/pcnt_handler.c b/ports/esp32s2/peripherals/pcnt_handler.c deleted file mode 100644 index 5a0cc9a7c..000000000 --- a/ports/esp32s2/peripherals/pcnt_handler.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 microDev - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "pcnt_handler.h" - -#include "py/runtime.h" -#include "supervisor/shared/translate.h" - -#define PCNT_UNIT_ACTIVE 1 -#define PCNT_UNIT_INACTIVE 0 - -static uint8_t pcnt_state[4]; - -void pcnt_handler_init(pcnt_config_t* pcnt_config) { - // Look for available pcnt unit - for (uint8_t i = 0; i<=3; i++) { - if (pcnt_state[i] == PCNT_UNIT_INACTIVE) { - pcnt_config->unit = (pcnt_unit_t)i; - pcnt_state[i] = PCNT_UNIT_ACTIVE; - break; - } else if (i == 3) { - mp_raise_RuntimeError(translate("All PCNT units in use")); - } - } - - // Initialize PCNT unit - pcnt_unit_config(pcnt_config); - - // Configure and enable the input filter - pcnt_set_filter_value(pcnt_config->unit, 100); - pcnt_filter_enable(pcnt_config->unit); - - // Initialize PCNT's counter - pcnt_counter_pause(pcnt_config->unit); - pcnt_counter_clear(pcnt_config->unit); - - // Everything is set up, now go to counting - pcnt_counter_resume(pcnt_config->unit); -} - -void pcnt_handler_deinit(pcnt_unit_t* unit) { - pcnt_state[*unit] = PCNT_UNIT_INACTIVE; - *unit = PCNT_UNIT_MAX; -} diff --git a/ports/esp32s2/peripherals/pcnt_handler.h b/ports/esp32s2/peripherals/pcnt_handler.h deleted file mode 100644 index f44ee1f83..000000000 --- a/ports/esp32s2/peripherals/pcnt_handler.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2020 microDev - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H -#define MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H - -#include "driver/pcnt.h" - -extern void pcnt_handler_init(pcnt_config_t* pcnt_config); -extern void pcnt_handler_deinit(pcnt_unit_t* unit); - -#endif // MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H -- cgit v1.2.3 From ac8a0faa0d64fd07af65a798c7e1fc5ce4e39df2 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Fri, 6 Nov 2020 01:42:20 +0530 Subject: update peripherals_pcnt_init() --- ports/esp32s2/common-hal/countio/Counter.c | 14 ++++++++++---- ports/esp32s2/peripherals/pcnt.c | 23 +++++++++++------------ ports/esp32s2/peripherals/pcnt.h | 2 +- 3 files changed, 22 insertions(+), 17 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/countio/Counter.c b/ports/esp32s2/common-hal/countio/Counter.c index 81f9f7ad2..fe52d93ad 100644 --- a/ports/esp32s2/common-hal/countio/Counter.c +++ b/ports/esp32s2/common-hal/countio/Counter.c @@ -27,12 +27,15 @@ #include "common-hal/countio/Counter.h" #include "common-hal/microcontroller/Pin.h" +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + void common_hal_countio_counter_construct(countio_counter_obj_t* self, const mcu_pin_obj_t* pin) { claim_pin(pin); // Prepare configuration for the PCNT unit - pcnt_config_t pcnt_config = { + const pcnt_config_t pcnt_config = { // Set PCNT input signal and control GPIOs .pulse_gpio_num = pin->number, .ctrl_gpio_num = PCNT_PIN_NOT_USED, @@ -41,12 +44,15 @@ void common_hal_countio_counter_construct(countio_counter_obj_t* self, .pos_mode = PCNT_COUNT_INC, // Count up on the positive edge .neg_mode = PCNT_COUNT_DIS, // Keep the counter value on the negative edge }; + // Initialize PCNT unit - // This also sets pcnt_config.unit - peripherals_pcnt_init(&pcnt_config); + const int8_t unit = peripherals_pcnt_init(pcnt_config); + if (unit == -1) { + mp_raise_RuntimeError(translate("All PCNT units in use")); + } self->pin = pin->number; - self->unit = pcnt_config.unit; + self->unit = (pcnt_unit_t)unit; } bool common_hal_countio_counter_deinited(countio_counter_obj_t* self) { diff --git a/ports/esp32s2/peripherals/pcnt.c b/ports/esp32s2/peripherals/pcnt.c index e7eb32c1d..555a0ec1d 100644 --- a/ports/esp32s2/peripherals/pcnt.c +++ b/ports/esp32s2/peripherals/pcnt.c @@ -26,39 +26,38 @@ #include "peripherals/pcnt.h" -#include "py/runtime.h" -#include "supervisor/shared/translate.h" - #define PCNT_UNIT_ACTIVE 1 #define PCNT_UNIT_INACTIVE 0 static uint8_t pcnt_state[4]; -void peripherals_pcnt_init(pcnt_config_t* pcnt_config) { +int peripherals_pcnt_init(pcnt_config_t pcnt_config) { // Look for available pcnt unit for (uint8_t i = 0; i<=3; i++) { if (pcnt_state[i] == PCNT_UNIT_INACTIVE) { - pcnt_config->unit = (pcnt_unit_t)i; + pcnt_config.unit = (pcnt_unit_t)i; pcnt_state[i] = PCNT_UNIT_ACTIVE; break; } else if (i == 3) { - mp_raise_RuntimeError(translate("All PCNT units in use")); + return -1; } } // Initialize PCNT unit - pcnt_unit_config(pcnt_config); + pcnt_unit_config(&pcnt_config); // Configure and enable the input filter - pcnt_set_filter_value(pcnt_config->unit, 100); - pcnt_filter_enable(pcnt_config->unit); + pcnt_set_filter_value(pcnt_config.unit, 100); + pcnt_filter_enable(pcnt_config.unit); // Initialize PCNT's counter - pcnt_counter_pause(pcnt_config->unit); - pcnt_counter_clear(pcnt_config->unit); + pcnt_counter_pause(pcnt_config.unit); + pcnt_counter_clear(pcnt_config.unit); // Everything is set up, now go to counting - pcnt_counter_resume(pcnt_config->unit); + pcnt_counter_resume(pcnt_config.unit); + + return pcnt_config.unit; } void peripherals_pcnt_deinit(pcnt_unit_t* unit) { diff --git a/ports/esp32s2/peripherals/pcnt.h b/ports/esp32s2/peripherals/pcnt.h index 64072501c..abed80fd0 100644 --- a/ports/esp32s2/peripherals/pcnt.h +++ b/ports/esp32s2/peripherals/pcnt.h @@ -29,7 +29,7 @@ #include "driver/pcnt.h" -extern void peripherals_pcnt_init(pcnt_config_t* pcnt_config); +extern int peripherals_pcnt_init(pcnt_config_t pcnt_config); extern void peripherals_pcnt_deinit(pcnt_unit_t* unit); #endif // MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H -- cgit v1.2.3