From 35ef6c687fdd27a01e4e3a31731eeb622becc2fb Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Wed, 11 Nov 2020 23:11:12 +0530 Subject: nvm implementation for esp32s2 --- ports/esp32s2/Makefile | 2 + .../esp32s2/common-hal/microcontroller/__init__.c | 12 ++++ ports/esp32s2/common-hal/nvm/ByteArray.c | 80 ++++++++++++++++++++++ ports/esp32s2/common-hal/nvm/ByteArray.h | 38 ++++++++++ ports/esp32s2/common-hal/nvm/__init__.c | 1 + ports/esp32s2/mpconfigport.h | 7 +- ports/esp32s2/mpconfigport.mk | 2 +- 7 files changed, 139 insertions(+), 3 deletions(-) create mode 100644 ports/esp32s2/common-hal/nvm/ByteArray.c create mode 100644 ports/esp32s2/common-hal/nvm/ByteArray.h create mode 100644 ports/esp32s2/common-hal/nvm/__init__.c (limited to 'ports') diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 55d6e91d4..ec389e9fe 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -104,6 +104,8 @@ INC += -isystem esp-idf/components/soc/soc/include INC += -isystem esp-idf/components/soc/soc/esp32s2/include INC += -isystem esp-idf/components/heap/include INC += -isystem esp-idf/components/esp_system/include +INC += -isystem esp-idf/components/spi_flash/include +INC += -isystem esp-idf/components/nvs_flash/include INC += -I$(BUILD)/esp-idf/config CFLAGS += -DHAVE_CONFIG_H \ diff --git a/ports/esp32s2/common-hal/microcontroller/__init__.c b/ports/esp32s2/common-hal/microcontroller/__init__.c index 6b2e18673..dc4d2c095 100644 --- a/ports/esp32s2/common-hal/microcontroller/__init__.c +++ b/ports/esp32s2/common-hal/microcontroller/__init__.c @@ -35,6 +35,7 @@ #include "shared-bindings/microcontroller/__init__.h" #include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/microcontroller/Processor.h" +#include "shared-bindings/nvm/ByteArray.h" #include "supervisor/filesystem.h" #include "supervisor/shared/safe_mode.h" @@ -85,6 +86,17 @@ const mcu_processor_obj_t common_hal_mcu_processor_obj = { }, }; +#if CIRCUITPY_INTERNAL_NVM_SIZE > 0 +// The singleton nvm.ByteArray object. +const nvm_bytearray_obj_t common_hal_mcu_nvm_obj = { + .base = { + .type = &nvm_bytearray_type, + }, + .start_address = (uint8_t*) CIRCUITPY_INTERNAL_NVM_START_ADDR, + .len = CIRCUITPY_INTERNAL_NVM_SIZE, +}; +#endif + // This maps MCU pin names to pin objects. STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_GPIO0), MP_ROM_PTR(&pin_GPIO0) }, diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.c b/ports/esp32s2/common-hal/nvm/ByteArray.c new file mode 100644 index 000000000..30051df1e --- /dev/null +++ b/ports/esp32s2/common-hal/nvm/ByteArray.c @@ -0,0 +1,80 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/nvm/ByteArray.h" + +#include "py/runtime.h" + +#include "nvs_flash.h" + +uint32_t common_hal_nvm_bytearray_get_length(nvm_bytearray_obj_t *self) { + return self->len; +} + +static nvs_handle get_nvs_handle(void) { + // Initialize NVS + esp_err_t err = nvs_flash_init(); + if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) { + // NVS partition was truncated and needs to be erased + // Retry nvs_flash_init + ESP_ERROR_CHECK(nvs_flash_erase()); + err = nvs_flash_init(); + } + ESP_ERROR_CHECK(err); + + // Open NVS handle + nvs_handle nvs_handle; + if (nvs_open("CPY", NVS_READWRITE, &nvs_handle) != ESP_OK) { + mp_raise_RuntimeError(translate("NVS Error")); + } + return nvs_handle; +} + +bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, + uint32_t start_index, uint8_t* values, uint32_t len) { + char index[9]; + sprintf(index, "%i", start_index); + // start nvs + nvs_handle handle = get_nvs_handle(); + bool status = ((nvs_set_u8(handle, (const char *)index, *values) == ESP_OK) && (nvs_commit(handle) == ESP_OK)); + // close nvs + nvs_close(handle); + return status; +} + +// NVM memory is memory mapped so reading it is easy. +void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self, + uint32_t start_index, uint32_t len, uint8_t* values) { + char index[9]; + sprintf(index, "%i", start_index); + // start nvs + nvs_handle handle = get_nvs_handle(); + if (nvs_get_u8(handle, (const char *)index, values) != ESP_OK) { + mp_raise_RuntimeError(translate("NVS Error")); + } + // close nvs + nvs_close(handle); +} diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.h b/ports/esp32s2/common-hal/nvm/ByteArray.h new file mode 100644 index 000000000..44b63d724 --- /dev/null +++ b/ports/esp32s2/common-hal/nvm/ByteArray.h @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_NVM_BYTEARRAY_H +#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_NVM_BYTEARRAY_H + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + uint8_t* start_address; + uint32_t len; +} nvm_bytearray_obj_t; + +#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_NVM_BYTEARRAY_H diff --git a/ports/esp32s2/common-hal/nvm/__init__.c b/ports/esp32s2/common-hal/nvm/__init__.c new file mode 100644 index 000000000..1b702a158 --- /dev/null +++ b/ports/esp32s2/common-hal/nvm/__init__.c @@ -0,0 +1 @@ +// No nvm module functions. diff --git a/ports/esp32s2/mpconfigport.h b/ports/esp32s2/mpconfigport.h index cec8dd35d..11ea5f638 100644 --- a/ports/esp32s2/mpconfigport.h +++ b/ports/esp32s2/mpconfigport.h @@ -28,7 +28,6 @@ #ifndef ESP32S2_MPCONFIGPORT_H__ #define ESP32S2_MPCONFIGPORT_H__ -#define CIRCUITPY_INTERNAL_NVM_SIZE (0) #define MICROPY_NLR_THUMB (0) #define MICROPY_PY_UJSON (1) @@ -36,11 +35,15 @@ #include "py/circuitpy_mpconfig.h" - #define MICROPY_PORT_ROOT_POINTERS \ CIRCUITPY_COMMON_ROOT_POINTERS #define MICROPY_NLR_SETJMP (1) #define CIRCUITPY_DEFAULT_STACK_SIZE 0x6000 +#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x9000) + +#ifndef CIRCUITPY_INTERNAL_NVM_SIZE +#define CIRCUITPY_INTERNAL_NVM_SIZE (20000) +#endif #endif // __INCLUDED_ESP32S2_MPCONFIGPORT_H diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk index 4579b95ab..7f3b4241a 100644 --- a/ports/esp32s2/mpconfigport.mk +++ b/ports/esp32s2/mpconfigport.mk @@ -21,7 +21,7 @@ CIRCUITPY_COUNTIO = 1 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_ROTARYIO = 1 -CIRCUITPY_NVM = 0 +CIRCUITPY_NVM = 1 # We don't have enough endpoints to include MIDI. CIRCUITPY_USB_MIDI = 0 CIRCUITPY_WIFI = 1 -- cgit v1.2.3 From c4917cdabd97c016a46b6193e93b274573d94193 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Mon, 16 Nov 2020 00:11:00 +0530 Subject: frequencyio implementation for esp32s2 --- ports/esp32s2/common-hal/frequencyio/FrequencyIn.c | 158 +++++++++++++++++++++ ports/esp32s2/common-hal/frequencyio/FrequencyIn.h | 43 ++++++ ports/esp32s2/common-hal/frequencyio/__init__.c | 1 + ports/esp32s2/mpconfigport.mk | 2 +- 4 files changed, 203 insertions(+), 1 deletion(-) create mode 100644 ports/esp32s2/common-hal/frequencyio/FrequencyIn.c create mode 100644 ports/esp32s2/common-hal/frequencyio/FrequencyIn.h create mode 100644 ports/esp32s2/common-hal/frequencyio/__init__.c (limited to 'ports') diff --git a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c new file mode 100644 index 000000000..fce1d34d8 --- /dev/null +++ b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c @@ -0,0 +1,158 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/frequencyio/FrequencyIn.h" + +#include + +#include "py/runtime.h" + +#include "supervisor/shared/tick.h" +#include "shared-bindings/time/__init__.h" + +#include "common-hal/microcontroller/Pin.h" + +static void frequencyin_interrupt_handler(void *self_in) { + frequencyio_frequencyin_obj_t* self = self_in; + // get counter value + int16_t count; + pcnt_get_counter_value(self->unit, &count); + self->frequency = count / 2.0 / self->capture_period; + + // reset counter + pcnt_counter_clear(self->unit); +} + +static void init_timer(frequencyio_frequencyin_obj_t* self, uint16_t capture_period) { + // Prepare configuration for the timer module + timer_config_t config = { + .alarm_en = true, + .counter_en = false, + .intr_type = TIMER_INTR_LEVEL, + .counter_dir = TIMER_COUNT_UP, + .auto_reload = true, + .divider = 80 // 1 us per tick + }; + + // Initialize timer module + timer_init(TIMER_GROUP_0, TIMER_0, &config); + timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0); + timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, capture_period * 1000000); + timer_enable_intr(TIMER_GROUP_0, TIMER_0); + timer_isr_register(TIMER_GROUP_0, TIMER_0, &frequencyin_interrupt_handler, (void *)self, 0, &self->handle); + + // Start timer + timer_start(TIMER_GROUP_0, TIMER_0); +} + +void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t* self, + const mcu_pin_obj_t* pin, const uint16_t capture_period) { + if ((capture_period == 0) || (capture_period > 500)) { + mp_raise_ValueError(translate("Invalid capture period. Valid range: 1 - 500")); + } + + // Prepare configuration for the PCNT unit + const pcnt_config_t pcnt_config = { + // Set PCNT input signal and control GPIOs + .pulse_gpio_num = pin->number, + .ctrl_gpio_num = PCNT_PIN_NOT_USED, + .channel = PCNT_CHANNEL_0, + .lctrl_mode = PCNT_MODE_DISABLE, + .hctrl_mode = PCNT_MODE_KEEP, + .pos_mode = PCNT_COUNT_INC, // count both rising and falling edges + .neg_mode = PCNT_COUNT_INC, + .counter_h_lim = 0, + .counter_l_lim = 0, + }; + + // Initialize PCNT unit + const int8_t unit = peripherals_pcnt_init(pcnt_config); + if (unit == -1) { + mp_raise_RuntimeError(translate("All PCNT units in use")); + } + + // set the GPIO back to high-impedance, as pcnt_unit_config sets it as pull-up + gpio_set_pull_mode(pin->number, GPIO_FLOATING); + + // initialize timer + init_timer(self, capture_period); + + self->pin = pin->number; + self->unit = (pcnt_unit_t)unit; + self->capture_period = capture_period; + + claim_pin(pin); +} + +bool common_hal_frequencyio_frequencyin_deinited(frequencyio_frequencyin_obj_t* self) { + return self->unit == PCNT_UNIT_MAX; +} + +void common_hal_frequencyio_frequencyin_deinit(frequencyio_frequencyin_obj_t* self) { + if (common_hal_frequencyio_frequencyin_deinited(self)) { + return; + } + reset_pin_number(self->pin); + peripherals_pcnt_deinit(&self->unit); + if (self->handle) { + timer_deinit(TIMER_GROUP_0, TIMER_0); + esp_intr_free(self->handle); + self->handle = NULL; + } +} + +uint32_t common_hal_frequencyio_frequencyin_get_item(frequencyio_frequencyin_obj_t* self) { + return (1000 / (self->capture_period / self->frequency)); +} + +void common_hal_frequencyio_frequencyin_pause(frequencyio_frequencyin_obj_t* self) { + pcnt_counter_pause(self->unit); + timer_pause(TIMER_GROUP_0, TIMER_0); +} + +void common_hal_frequencyio_frequencyin_resume(frequencyio_frequencyin_obj_t* self) { + pcnt_counter_resume(self->unit); + timer_start(TIMER_GROUP_0, TIMER_0); +} + +void common_hal_frequencyio_frequencyin_clear(frequencyio_frequencyin_obj_t* self) { + self->frequency = 0; + pcnt_counter_clear(self->unit); + timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0); +} + +uint16_t common_hal_frequencyio_frequencyin_get_capture_period(frequencyio_frequencyin_obj_t *self) { + return self->capture_period; +} + +void common_hal_frequencyio_frequencyin_set_capture_period(frequencyio_frequencyin_obj_t *self, uint16_t capture_period) { + if ((capture_period == 0) || (capture_period > 500)) { + mp_raise_ValueError(translate("Invalid capture period. Valid range: 1 - 500")); + } + self->capture_period = capture_period; + common_hal_frequencyio_frequencyin_clear(self); + timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, capture_period * 1000000); +} diff --git a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h new file mode 100644 index 000000000..01e617d13 --- /dev/null +++ b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h @@ -0,0 +1,43 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_FREQUENCYIO_FREQUENCYIN_H +#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_FREQUENCYIO_FREQUENCYIN_H + +#include "py/obj.h" +#include "driver/timer.h" +#include "peripherals/pcnt.h" + +typedef struct { + mp_obj_base_t base; + pcnt_unit_t unit; + intr_handle_t handle; + uint8_t pin; + uint32_t frequency; + uint16_t capture_period; +} frequencyio_frequencyin_obj_t; + +#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_FREQUENCYIO_FREQUENCYIN_H diff --git a/ports/esp32s2/common-hal/frequencyio/__init__.c b/ports/esp32s2/common-hal/frequencyio/__init__.c new file mode 100644 index 000000000..487814bd0 --- /dev/null +++ b/ports/esp32s2/common-hal/frequencyio/__init__.c @@ -0,0 +1 @@ +// No ferquencyio module functions. diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk index 4579b95ab..a84965a6a 100644 --- a/ports/esp32s2/mpconfigport.mk +++ b/ports/esp32s2/mpconfigport.mk @@ -18,7 +18,7 @@ CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 CIRCUITPY_CANIO = 1 CIRCUITPY_COUNTIO = 1 -CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_FREQUENCYIO = 1 CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_ROTARYIO = 1 CIRCUITPY_NVM = 0 -- cgit v1.2.3 From 2bec02738fb7eacaaea710bd448b98a418eb2693 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Mon, 16 Nov 2020 11:44:11 +0530 Subject: move interrupt handler to iram --- ports/esp32s2/common-hal/frequencyio/FrequencyIn.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c index fce1d34d8..ec7ebb21a 100644 --- a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c +++ b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c @@ -35,7 +35,7 @@ #include "common-hal/microcontroller/Pin.h" -static void frequencyin_interrupt_handler(void *self_in) { +static void IRAM_ATTR frequencyin_interrupt_handler(void *self_in) { frequencyio_frequencyin_obj_t* self = self_in; // get counter value int16_t count; @@ -44,6 +44,10 @@ static void frequencyin_interrupt_handler(void *self_in) { // reset counter pcnt_counter_clear(self->unit); + + // reset interrupt + TIMERG0.int_clr.t0 = 1; + TIMERG0.hw_timer[0].config.alarm_en = 1; } static void init_timer(frequencyio_frequencyin_obj_t* self, uint16_t capture_period) { @@ -62,7 +66,7 @@ static void init_timer(frequencyio_frequencyin_obj_t* self, uint16_t capture_per timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0); timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, capture_period * 1000000); timer_enable_intr(TIMER_GROUP_0, TIMER_0); - timer_isr_register(TIMER_GROUP_0, TIMER_0, &frequencyin_interrupt_handler, (void *)self, 0, &self->handle); + timer_isr_register(TIMER_GROUP_0, TIMER_0, frequencyin_interrupt_handler, (void *)self, ESP_INTR_FLAG_IRAM, &self->handle); // Start timer timer_start(TIMER_GROUP_0, TIMER_0); -- cgit v1.2.3 From f2824f6a68b3d326e0f4a137880e08147a0074d2 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Mon, 16 Nov 2020 12:55:55 +0530 Subject: update frequency measurement --- ports/esp32s2/common-hal/frequencyio/FrequencyIn.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c index ec7ebb21a..bdbe782ad 100644 --- a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c +++ b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c @@ -84,12 +84,9 @@ void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t* .pulse_gpio_num = pin->number, .ctrl_gpio_num = PCNT_PIN_NOT_USED, .channel = PCNT_CHANNEL_0, - .lctrl_mode = PCNT_MODE_DISABLE, - .hctrl_mode = PCNT_MODE_KEEP, + // What to do on the positive / negative edge of pulse input? .pos_mode = PCNT_COUNT_INC, // count both rising and falling edges .neg_mode = PCNT_COUNT_INC, - .counter_h_lim = 0, - .counter_l_lim = 0, }; // Initialize PCNT unit @@ -129,7 +126,7 @@ void common_hal_frequencyio_frequencyin_deinit(frequencyio_frequencyin_obj_t* se } uint32_t common_hal_frequencyio_frequencyin_get_item(frequencyio_frequencyin_obj_t* self) { - return (1000 / (self->capture_period / self->frequency)); + return self->frequency; } void common_hal_frequencyio_frequencyin_pause(frequencyio_frequencyin_obj_t* self) { -- cgit v1.2.3 From 18e463cca538ed80f03ce9eda0e2ff757f1ba8f4 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Mon, 16 Nov 2020 23:32:22 +0530 Subject: add pcnt overflow handler & clean-up --- ports/esp32s2/common-hal/frequencyio/FrequencyIn.c | 91 +++++++++++++--------- ports/esp32s2/common-hal/frequencyio/FrequencyIn.h | 3 +- 2 files changed, 57 insertions(+), 37 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c index bdbe782ad..20d744139 100644 --- a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c +++ b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c @@ -26,16 +26,21 @@ #include "shared-bindings/frequencyio/FrequencyIn.h" -#include - #include "py/runtime.h" -#include "supervisor/shared/tick.h" -#include "shared-bindings/time/__init__.h" +static void IRAM_ATTR pcnt_overflow_handler(void *self_in) { + frequencyio_frequencyin_obj_t* self = self_in; + // reset counter + pcnt_counter_clear(self->unit); -#include "common-hal/microcontroller/Pin.h" + // increase multiplier + self->multiplier++; + + // reset interrupt + PCNT.int_clr.val = BIT(self->unit); +} -static void IRAM_ATTR frequencyin_interrupt_handler(void *self_in) { +static void IRAM_ATTR timer_interrupt_handler(void *self_in) { frequencyio_frequencyin_obj_t* self = self_in; // get counter value int16_t count; @@ -50,9 +55,41 @@ static void IRAM_ATTR frequencyin_interrupt_handler(void *self_in) { TIMERG0.hw_timer[0].config.alarm_en = 1; } -static void init_timer(frequencyio_frequencyin_obj_t* self, uint16_t capture_period) { +static void init_pcnt(frequencyio_frequencyin_obj_t* self) { + // Prepare configuration for the PCNT unit + const pcnt_config_t pcnt_config = { + // Set PCNT input signal and control GPIOs + .pulse_gpio_num = self->pin, + .ctrl_gpio_num = PCNT_PIN_NOT_USED, + .channel = PCNT_CHANNEL_0, + // What to do on the positive / negative edge of pulse input? + .pos_mode = PCNT_COUNT_INC, // count both rising and falling edges + .neg_mode = PCNT_COUNT_INC, + // Set counter limit + .counter_h_lim = INT16_MAX, + .counter_l_lim = 0, + }; + + // Initialize PCNT unit + const int8_t unit = peripherals_pcnt_init(pcnt_config); + if (unit == -1) { + mp_raise_RuntimeError(translate("All PCNT units in use")); + } + + // set the GPIO back to high-impedance, as pcnt_unit_config sets it as pull-up + gpio_set_pull_mode(self->pin, GPIO_FLOATING); + + self->unit = (pcnt_unit_t)unit; + + // enable pcnt interrupt + pcnt_event_enable(self->unit, PCNT_EVT_H_LIM); + pcnt_isr_register(pcnt_overflow_handler, (void *)self, ESP_INTR_FLAG_IRAM, &self->handle); + pcnt_intr_enable(self->unit); +} + +static void init_timer(frequencyio_frequencyin_obj_t* self) { // Prepare configuration for the timer module - timer_config_t config = { + const timer_config_t config = { .alarm_en = true, .counter_en = false, .intr_type = TIMER_INTR_LEVEL, @@ -64,9 +101,9 @@ static void init_timer(frequencyio_frequencyin_obj_t* self, uint16_t capture_per // Initialize timer module timer_init(TIMER_GROUP_0, TIMER_0, &config); timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0); - timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, capture_period * 1000000); + timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, self->capture_period * 1000000); + timer_isr_register(TIMER_GROUP_0, TIMER_0, timer_interrupt_handler, (void *)self, ESP_INTR_FLAG_IRAM, &self->handle); timer_enable_intr(TIMER_GROUP_0, TIMER_0); - timer_isr_register(TIMER_GROUP_0, TIMER_0, frequencyin_interrupt_handler, (void *)self, ESP_INTR_FLAG_IRAM, &self->handle); // Start timer timer_start(TIMER_GROUP_0, TIMER_0); @@ -78,33 +115,15 @@ void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t* mp_raise_ValueError(translate("Invalid capture period. Valid range: 1 - 500")); } - // Prepare configuration for the PCNT unit - const pcnt_config_t pcnt_config = { - // Set PCNT input signal and control GPIOs - .pulse_gpio_num = pin->number, - .ctrl_gpio_num = PCNT_PIN_NOT_USED, - .channel = PCNT_CHANNEL_0, - // What to do on the positive / negative edge of pulse input? - .pos_mode = PCNT_COUNT_INC, // count both rising and falling edges - .neg_mode = PCNT_COUNT_INC, - }; - - // Initialize PCNT unit - const int8_t unit = peripherals_pcnt_init(pcnt_config); - if (unit == -1) { - mp_raise_RuntimeError(translate("All PCNT units in use")); - } - - // set the GPIO back to high-impedance, as pcnt_unit_config sets it as pull-up - gpio_set_pull_mode(pin->number, GPIO_FLOATING); - - // initialize timer - init_timer(self, capture_period); - self->pin = pin->number; - self->unit = (pcnt_unit_t)unit; + self->handle = NULL; + self->multiplier = 0; self->capture_period = capture_period; + // initialize pcnt and timer + init_pcnt(self); + init_timer(self); + claim_pin(pin); } @@ -118,15 +137,15 @@ void common_hal_frequencyio_frequencyin_deinit(frequencyio_frequencyin_obj_t* se } reset_pin_number(self->pin); peripherals_pcnt_deinit(&self->unit); + timer_deinit(TIMER_GROUP_0, TIMER_0); if (self->handle) { - timer_deinit(TIMER_GROUP_0, TIMER_0); esp_intr_free(self->handle); self->handle = NULL; } } uint32_t common_hal_frequencyio_frequencyin_get_item(frequencyio_frequencyin_obj_t* self) { - return self->frequency; + return (self->frequency + (self->multiplier * INT16_MAX)); } void common_hal_frequencyio_frequencyin_pause(frequencyio_frequencyin_obj_t* self) { diff --git a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h index 01e617d13..ce3bf8f2f 100644 --- a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h +++ b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h @@ -36,7 +36,8 @@ typedef struct { pcnt_unit_t unit; intr_handle_t handle; uint8_t pin; - uint32_t frequency; + uint8_t multiplier; + uint16_t frequency; uint16_t capture_period; } frequencyio_frequencyin_obj_t; -- cgit v1.2.3 From 0686cde2263a50e2074f741417d169a1c1ea752e Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Tue, 17 Nov 2020 01:19:12 +0530 Subject: update internal nvm size --- ports/esp32s2/common-hal/nvm/ByteArray.c | 4 ++-- ports/esp32s2/mpconfigport.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.c b/ports/esp32s2/common-hal/nvm/ByteArray.c index 30051df1e..d90f7fbdc 100644 --- a/ports/esp32s2/common-hal/nvm/ByteArray.c +++ b/ports/esp32s2/common-hal/nvm/ByteArray.c @@ -56,7 +56,7 @@ static nvs_handle get_nvs_handle(void) { bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, uint32_t start_index, uint8_t* values, uint32_t len) { char index[9]; - sprintf(index, "%i", start_index); + sprintf(index, "%i", start_index - CIRCUITPY_INTERNAL_NVM_START_ADDR); // start nvs nvs_handle handle = get_nvs_handle(); bool status = ((nvs_set_u8(handle, (const char *)index, *values) == ESP_OK) && (nvs_commit(handle) == ESP_OK)); @@ -69,7 +69,7 @@ bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self, uint32_t start_index, uint32_t len, uint8_t* values) { char index[9]; - sprintf(index, "%i", start_index); + sprintf(index, "%i", start_index - CIRCUITPY_INTERNAL_NVM_START_ADDR); // start nvs nvs_handle handle = get_nvs_handle(); if (nvs_get_u8(handle, (const char *)index, values) != ESP_OK) { diff --git a/ports/esp32s2/mpconfigport.h b/ports/esp32s2/mpconfigport.h index 11ea5f638..db7393d8e 100644 --- a/ports/esp32s2/mpconfigport.h +++ b/ports/esp32s2/mpconfigport.h @@ -43,7 +43,7 @@ #define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x9000) #ifndef CIRCUITPY_INTERNAL_NVM_SIZE -#define CIRCUITPY_INTERNAL_NVM_SIZE (20000) +#define CIRCUITPY_INTERNAL_NVM_SIZE (20 * 1024) #endif #endif // __INCLUDED_ESP32S2_MPCONFIGPORT_H -- cgit v1.2.3 From 119e9d38202cb26f7f04d1050263e27e1083865a Mon Sep 17 00:00:00 2001 From: jgillick Date: Mon, 16 Nov 2020 23:50:00 -0800 Subject: Add Thunderpack 1.2 --- ports/stm/boards/thunderpack_v12/board.c | 38 ++ ports/stm/boards/thunderpack_v12/mpconfigboard.h | 61 +++ ports/stm/boards/thunderpack_v12/mpconfigboard.mk | 20 + ports/stm/boards/thunderpack_v12/pins.c | 39 ++ .../boards/thunderpack_v12/stm32f4xx_hal_conf.h | 440 +++++++++++++++++++++ ports/stm/common-hal/microcontroller/Pin.c | 33 ++ 6 files changed, 631 insertions(+) create mode 100644 ports/stm/boards/thunderpack_v12/board.c create mode 100644 ports/stm/boards/thunderpack_v12/mpconfigboard.h create mode 100644 ports/stm/boards/thunderpack_v12/mpconfigboard.mk create mode 100644 ports/stm/boards/thunderpack_v12/pins.c create mode 100644 ports/stm/boards/thunderpack_v12/stm32f4xx_hal_conf.h (limited to 'ports') diff --git a/ports/stm/boards/thunderpack_v12/board.c b/ports/stm/boards/thunderpack_v12/board.c new file mode 100644 index 000000000..4421970ee --- /dev/null +++ b/ports/stm/boards/thunderpack_v12/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/thunderpack_v12/mpconfigboard.h b/ports/stm/boards/thunderpack_v12/mpconfigboard.h new file mode 100644 index 000000000..4c71b8aeb --- /dev/null +++ b/ports/stm/boards/thunderpack_v12/mpconfigboard.h @@ -0,0 +1,61 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#define MICROPY_HW_BOARD_NAME "THUNDERPACK_v12" +#define MICROPY_HW_MCU_NAME "STM32F411CE" + +// Non-volatile memory config +#define CIRCUITPY_INTERNAL_NVM_SIZE (0x4000) +#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x08010000) +#define CIRCUITPY_INTERNAL_NVM_SECTOR FLASH_SECTOR_4 + +// Putting the entire flash sector in the NVM byte array buffer +// would take up too much RAM. This limits how much of the sector we use. +#define NVM_BYTEARRAY_BUFFER_SIZE 512 + +// Flash config +#define FLASH_SIZE (0x80000) +#define FLASH_PAGE_SIZE (0x4000) +#define BOARD_FLASH_SIZE (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE- 0x2000 - 0xC000) + +// On-board flash +#define SPI_FLASH_MOSI_PIN (&pin_PB15) +#define SPI_FLASH_MISO_PIN (&pin_PB14) +#define SPI_FLASH_SCK_PIN (&pin_PB13) +#define SPI_FLASH_CS_PIN (&pin_PB12) + +// Status LEDs +#define MICROPY_HW_LED_STATUS (&pin_PA02) +#define MICROPY_HW_APA102_MOSI (&pin_PB08) +#define MICROPY_HW_APA102_SCK (&pin_PB00) + +// I2C +#define DEFAULT_I2C_BUS_SCL (&pin_PB06) +#define DEFAULT_I2C_BUS_SDA (&pin_PB07) + +// General config +#define BOARD_OSC_DIV (24) +#define BOARD_OVERWRITE_SWD (1) +#define BOARD_NO_VBUS_SENSE (1) \ No newline at end of file diff --git a/ports/stm/boards/thunderpack_v12/mpconfigboard.mk b/ports/stm/boards/thunderpack_v12/mpconfigboard.mk new file mode 100644 index 000000000..d11cfb750 --- /dev/null +++ b/ports/stm/boards/thunderpack_v12/mpconfigboard.mk @@ -0,0 +1,20 @@ +USB_VID = 0x239A +USB_PID = 0x806A +USB_PRODUCT = "Thunderpack STM32F411" +USB_MANUFACTURER = "Jeremy Gillick" +USB_DEVICES = "CDC,MSC" + +LONGINT_IMPL = NONE + +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = GD25Q16C + +CIRCUITPY_NVM = 1 + +MCU_SERIES = F4 +MCU_VARIANT = STM32F411xE +MCU_PACKAGE = UFQFPN48 + +LD_COMMON = boards/common_nvm.ld +LD_FILE = boards/STM32F411_nvm.ld diff --git a/ports/stm/boards/thunderpack_v12/pins.c b/ports/stm/boards/thunderpack_v12/pins.c new file mode 100644 index 000000000..1e07621ea --- /dev/null +++ b/ports/stm/boards/thunderpack_v12/pins.c @@ -0,0 +1,39 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_PA0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_PA1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_PA3), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_PA4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA5), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PA8), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PA9), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + + { MP_ROM_QSTR(MP_QSTR_PB0), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_PB5), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB6), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB7), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_PB8), MP_ROM_PTR(&pin_PB08) }, + + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_PA03) }, + + { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_PB04) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, + + { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_PB00) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/thunderpack_v12/stm32f4xx_hal_conf.h b/ports/stm/boards/thunderpack_v12/stm32f4xx_hal_conf.h new file mode 100644 index 000000000..5cb563422 --- /dev/null +++ b/ports/stm/boards/thunderpack_v12/stm32f4xx_hal_conf.h @@ -0,0 +1,440 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf_template.h + * @author MCD Application Team + * @brief HAL configuration template file. + * This file should be copied to the application folder and renamed + * to stm32f4xx_hal_conf.h. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + +#define HAL_ADC_MODULE_ENABLED +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_CAN_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +#define HAL_DAC_MODULE_ENABLED +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_PCCARD_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +#define HAL_I2C_MODULE_ENABLED +#define HAL_I2S_MODULE_ENABLED +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +/* #define HAL_PCD_MODULE_ENABLED */ +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_FMPI2C_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_EXTI_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)24000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)40000) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32f4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f4xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32f4xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/common-hal/microcontroller/Pin.c b/ports/stm/common-hal/microcontroller/Pin.c index 2c513f4aa..cf5cd754f 100644 --- a/ports/stm/common-hal/microcontroller/Pin.c +++ b/ports/stm/common-hal/microcontroller/Pin.c @@ -35,6 +35,10 @@ #ifdef MICROPY_HW_NEOPIXEL bool neopixel_in_use; #endif +#ifdef MICROPY_HW_APA102_MOSI +bool apa102_sck_in_use; +bool apa102_mosi_in_use; +#endif #if defined(LQFP144) #define GPIO_PORT_COUNT 7 @@ -66,6 +70,10 @@ void reset_all_pins(void) { #ifdef MICROPY_HW_NEOPIXEL neopixel_in_use = false; #endif + #ifdef MICROPY_HW_APA102_MOSI + apa102_sck_in_use = false; + apa102_mosi_in_use = false; + #endif } // Mark pin as free and return it to a quiescent state. @@ -85,6 +93,15 @@ void reset_pin_number(uint8_t pin_port, uint8_t pin_number) { return; } #endif + #ifdef MICROPY_HW_APA102_MOSI + if ((pin_port == MICROPY_HW_APA102_MOSI->port && pin_number == MICROPY_HW_APA102_MOSI->number) + || (pin_port == MICROPY_HW_APA102_SCK->port && pin_number == MICROPY_HW_APA102_MOSI->number)) { + apa102_mosi_in_use = false; + apa102_sck_in_use = false; + rgb_led_status_init(); + return; + } + #endif } void never_reset_pin_number(uint8_t pin_port, uint8_t pin_number) { @@ -108,6 +125,14 @@ void claim_pin(const mcu_pin_obj_t* pin) { neopixel_in_use = true; } #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin == MICROPY_HW_APA102_MOSI) { + apa102_mosi_in_use = true; + } + if (pin == MICROPY_HW_APA102_SCK) { + apa102_sck_in_use = true; + } + #endif } bool pin_number_is_free(uint8_t pin_port, uint8_t pin_number) { @@ -120,6 +145,14 @@ bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) { return !neopixel_in_use; } #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin == MICROPY_HW_APA102_MOSI) { + return !apa102_mosi_in_use; + } + if (pin == MICROPY_HW_APA102_SCK) { + return !apa102_sck_in_use; + } + #endif return pin_number_is_free(pin->port, pin->number); } -- cgit v1.2.3 From ff987e7496152c3175608570d90f36753b4c4670 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Wed, 18 Nov 2020 12:16:14 +0530 Subject: add timer peripheral --- ports/esp32s2/Makefile | 1 + ports/esp32s2/peripherals/timer.c | 73 +++++++++++++++++++++++++++++++++++++++ ports/esp32s2/peripherals/timer.h | 41 ++++++++++++++++++++++ ports/esp32s2/supervisor/port.c | 23 +++++++----- 4 files changed, 129 insertions(+), 9 deletions(-) create mode 100644 ports/esp32s2/peripherals/timer.c create mode 100644 ports/esp32s2/peripherals/timer.h (limited to 'ports') diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 55d6e91d4..931e4d063 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -188,6 +188,7 @@ SRC_C += \ lib/utils/pyexec.c \ lib/utils/stdout_helpers.c \ lib/utils/sys_stdio_mphal.c \ + peripherals/timer.c \ peripherals/pcnt.c \ peripherals/pins.c \ peripherals/rmt.c \ diff --git a/ports/esp32s2/peripherals/timer.c b/ports/esp32s2/peripherals/timer.c new file mode 100644 index 000000000..3aee33dc5 --- /dev/null +++ b/ports/esp32s2/peripherals/timer.c @@ -0,0 +1,73 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "peripherals/timer.h" + +#define TIMER_FREE 1 +#define TIMER_BUSY 0 + +static uint8_t timer_state[2][2]; + +void peripherals_timer_reset(void) { + timer_index_t timer; + for (uint8_t i = 0; i < 2; i++) { + for (uint8_t j = 0; j < 2; j++) { + if (timer_state[i][j] == TIMER_BUSY) { + timer.idx = (timer_idx_t)j; + timer.group = (timer_group_t)i; + timer_state[i][j] = TIMER_FREE; + peripherals_timer_deinit(&timer); + } + } + } +} + +void peripherals_timer_init(const timer_config_t * config, timer_index_t * timer) { + // get free timer + for (uint8_t i = 0; i < 2; i++) { + for (uint8_t j = 0; j < 2; j++) { + if (timer_state[i][j] == TIMER_FREE) { + timer->idx = (timer_idx_t)j; + timer->group = (timer_group_t)i; + timer_state[i][j] = TIMER_BUSY; + goto init_timer; + } else if (i == 1 && j == 1) { + timer->idx = TIMER_MAX; + timer->group = TIMER_GROUP_MAX; + return; + } + } + } + +init_timer: + // initialize timer module + timer_init(timer->group, timer->idx, config); + timer_set_counter_value(timer->group, timer->idx, 0); +} + +void peripherals_timer_deinit(timer_index_t * timer) { + timer_deinit(timer->group, timer->idx); +} diff --git a/ports/esp32s2/peripherals/timer.h b/ports/esp32s2/peripherals/timer.h new file mode 100644 index 000000000..8c9ebd91c --- /dev/null +++ b/ports/esp32s2/peripherals/timer.h @@ -0,0 +1,41 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_PERIPHERALS_TIMER_HANDLER_H +#define MICROPY_INCLUDED_ESP32S2_PERIPHERALS_TIMER_HANDLER_H + +#include "driver/timer.h" + +typedef struct { + timer_idx_t idx; + timer_group_t group; +} timer_index_t; + +extern void peripherals_timer_init(const timer_config_t * config, timer_index_t * timer); +extern void peripherals_timer_deinit(timer_index_t * timer); +extern void peripherals_timer_reset(void); + +#endif // MICROPY_INCLUDED_ESP32S2_PERIPHERALS_TIMER_HANDLER_H diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c index ef032c4a7..4bf792516 100644 --- a/ports/esp32s2/supervisor/port.c +++ b/ports/esp32s2/supervisor/port.c @@ -50,6 +50,7 @@ #include "peripherals/rmt.h" #include "peripherals/pcnt.h" +#include "peripherals/timer.h" #include "components/heap/include/esp_heap_caps.h" #include "components/soc/soc/esp32s2/include/soc/cache_memory.h" @@ -103,15 +104,6 @@ void reset_port(void) { analogout_reset(); #endif -#if CIRCUITPY_PULSEIO - esp32s2_peripherals_rmt_reset(); - pulsein_reset(); -#endif - -#if CIRCUITPY_PWMIO - pwmout_reset(); -#endif - #if CIRCUITPY_BUSIO i2c_reset(); spi_reset(); @@ -122,6 +114,19 @@ void reset_port(void) { peripherals_pcnt_reset(); #endif +#if CIRCUITPY_FREQUENCYIO + peripherals_timer_reset(); +#endif + +#if CIRCUITPY_PULSEIO + esp32s2_peripherals_rmt_reset(); + pulsein_reset(); +#endif + +#if CIRCUITPY_PWMIO + pwmout_reset(); +#endif + #if CIRCUITPY_RTC rtc_reset(); #endif -- cgit v1.2.3 From c457d373e18a5bcadec44e0815bea8b9beb30a97 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Wed, 18 Nov 2020 12:24:48 +0530 Subject: update init_timer & frequency calculation --- ports/esp32s2/common-hal/frequencyio/FrequencyIn.c | 55 ++++++++++++++-------- ports/esp32s2/common-hal/frequencyio/FrequencyIn.h | 5 +- 2 files changed, 38 insertions(+), 22 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c index 20d744139..12d612abb 100644 --- a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c +++ b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.c @@ -29,7 +29,7 @@ #include "py/runtime.h" static void IRAM_ATTR pcnt_overflow_handler(void *self_in) { - frequencyio_frequencyin_obj_t* self = self_in; + frequencyio_frequencyin_obj_t * self = self_in; // reset counter pcnt_counter_clear(self->unit); @@ -41,18 +41,26 @@ static void IRAM_ATTR pcnt_overflow_handler(void *self_in) { } static void IRAM_ATTR timer_interrupt_handler(void *self_in) { - frequencyio_frequencyin_obj_t* self = self_in; + frequencyio_frequencyin_obj_t * self = self_in; // get counter value int16_t count; pcnt_get_counter_value(self->unit, &count); - self->frequency = count / 2.0 / self->capture_period; + self->frequency = ((count / 2.0) + (self->multiplier * INT16_MAX / 4.0)) / (self->capture_period); + + // reset multiplier + self->multiplier = 0; // reset counter pcnt_counter_clear(self->unit); // reset interrupt - TIMERG0.int_clr.t0 = 1; - TIMERG0.hw_timer[0].config.alarm_en = 1; + timg_dev_t *device = self->timer.group ? &(TIMERG1) : &(TIMERG0); + if (self->timer.idx) { + device->int_clr.t1 = 1; + } else { + device->int_clr.t0 = 1; + } + device->hw_timer[self->timer.idx].config.alarm_en = 1; } static void init_pcnt(frequencyio_frequencyin_obj_t* self) { @@ -70,7 +78,7 @@ static void init_pcnt(frequencyio_frequencyin_obj_t* self) { .counter_l_lim = 0, }; - // Initialize PCNT unit + // initialize PCNT const int8_t unit = peripherals_pcnt_init(pcnt_config); if (unit == -1) { mp_raise_RuntimeError(translate("All PCNT units in use")); @@ -98,15 +106,22 @@ static void init_timer(frequencyio_frequencyin_obj_t* self) { .divider = 80 // 1 us per tick }; - // Initialize timer module - timer_init(TIMER_GROUP_0, TIMER_0, &config); - timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0); - timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, self->capture_period * 1000000); - timer_isr_register(TIMER_GROUP_0, TIMER_0, timer_interrupt_handler, (void *)self, ESP_INTR_FLAG_IRAM, &self->handle); - timer_enable_intr(TIMER_GROUP_0, TIMER_0); + // initialize Timer + peripherals_timer_init(&config, &self->timer); + if (self->timer.idx == TIMER_MAX || self->timer.group == TIMER_GROUP_MAX) { + mp_raise_RuntimeError(translate("All timers in use")); + } + + timer_idx_t idx = self->timer.idx; + timer_group_t group = self->timer.group; + + // enable timer interrupt + timer_set_alarm_value(group, idx, self->capture_period * 1000000); + timer_isr_register(group, idx, timer_interrupt_handler, (void *)self, ESP_INTR_FLAG_IRAM, &self->handle); + timer_enable_intr(group, idx); - // Start timer - timer_start(TIMER_GROUP_0, TIMER_0); + // start timer + timer_start(self->timer.group, self->timer.idx); } void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t* self, @@ -137,7 +152,7 @@ void common_hal_frequencyio_frequencyin_deinit(frequencyio_frequencyin_obj_t* se } reset_pin_number(self->pin); peripherals_pcnt_deinit(&self->unit); - timer_deinit(TIMER_GROUP_0, TIMER_0); + peripherals_timer_deinit(&self->timer); if (self->handle) { esp_intr_free(self->handle); self->handle = NULL; @@ -145,23 +160,23 @@ void common_hal_frequencyio_frequencyin_deinit(frequencyio_frequencyin_obj_t* se } uint32_t common_hal_frequencyio_frequencyin_get_item(frequencyio_frequencyin_obj_t* self) { - return (self->frequency + (self->multiplier * INT16_MAX)); + return self->frequency; } void common_hal_frequencyio_frequencyin_pause(frequencyio_frequencyin_obj_t* self) { pcnt_counter_pause(self->unit); - timer_pause(TIMER_GROUP_0, TIMER_0); + timer_pause(self->timer.group, self->timer.idx); } void common_hal_frequencyio_frequencyin_resume(frequencyio_frequencyin_obj_t* self) { pcnt_counter_resume(self->unit); - timer_start(TIMER_GROUP_0, TIMER_0); + timer_start(self->timer.group, self->timer.idx); } void common_hal_frequencyio_frequencyin_clear(frequencyio_frequencyin_obj_t* self) { self->frequency = 0; pcnt_counter_clear(self->unit); - timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0); + timer_set_counter_value(self->timer.group, self->timer.idx, 0); } uint16_t common_hal_frequencyio_frequencyin_get_capture_period(frequencyio_frequencyin_obj_t *self) { @@ -174,5 +189,5 @@ void common_hal_frequencyio_frequencyin_set_capture_period(frequencyio_frequency } self->capture_period = capture_period; common_hal_frequencyio_frequencyin_clear(self); - timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, capture_period * 1000000); + timer_set_alarm_value(self->timer.group, self->timer.idx, capture_period * 1000000); } diff --git a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h index ce3bf8f2f..cf9d2ae53 100644 --- a/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h +++ b/ports/esp32s2/common-hal/frequencyio/FrequencyIn.h @@ -28,16 +28,17 @@ #define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_FREQUENCYIO_FREQUENCYIN_H #include "py/obj.h" -#include "driver/timer.h" #include "peripherals/pcnt.h" +#include "peripherals/timer.h" typedef struct { mp_obj_base_t base; pcnt_unit_t unit; + timer_index_t timer; intr_handle_t handle; uint8_t pin; uint8_t multiplier; - uint16_t frequency; + uint32_t frequency; uint16_t capture_period; } frequencyio_frequencyin_obj_t; -- cgit v1.2.3 From bab41afce759916af15ab57645691336ea2bdd06 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Wed, 18 Nov 2020 12:34:56 +0530 Subject: ps2io implementation for esp32s2 --- ports/esp32s2/common-hal/ps2io/Ps2.c | 393 ++++++++++++++++++++++++++++++ ports/esp32s2/common-hal/ps2io/Ps2.h | 60 +++++ ports/esp32s2/common-hal/ps2io/__init__.c | 1 + ports/esp32s2/mpconfigport.mk | 4 + 4 files changed, 458 insertions(+) create mode 100644 ports/esp32s2/common-hal/ps2io/Ps2.c create mode 100644 ports/esp32s2/common-hal/ps2io/Ps2.h create mode 100644 ports/esp32s2/common-hal/ps2io/__init__.c (limited to 'ports') diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.c b/ports/esp32s2/common-hal/ps2io/Ps2.c new file mode 100644 index 000000000..2156a4247 --- /dev/null +++ b/ports/esp32s2/common-hal/ps2io/Ps2.c @@ -0,0 +1,393 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "common-hal/ps2io/Ps2.h" + +#include "py/runtime.h" +#include "supervisor/port.h" +#include "shared-bindings/ps2io/Ps2.h" +#include "shared-bindings/microcontroller/__init__.h" + +#define STATE_IDLE 0 +#define STATE_RECV 1 +#define STATE_RECV_PARITY 2 +#define STATE_RECV_STOP 3 +#define STATE_RECV_ERR 10 + +#define ERROR_STARTBIT 0x01 +#define ERROR_TIMEOUT 0x02 +#define ERROR_PARITY 0x04 +#define ERROR_STOPBIT 0x08 +#define ERROR_BUFFER 0x10 + +#define ERROR_TX_CLKLO 0x100 +#define ERROR_TX_CLKHI 0x200 +#define ERROR_TX_ACKDATA 0x400 +#define ERROR_TX_ACKCLK 0x800 +#define ERROR_TX_RTS 0x1000 +#define ERROR_TX_NORESP 0x2000 + +static void IRAM_ATTR ps2_interrupt_handler(void *self_in); + +static void ps2_set_config(ps2io_ps2_obj_t* self) { + // turn on falling edge interrupt + gpio_set_intr_type(self->clk_pin, GPIO_INTR_NEGEDGE); + gpio_isr_register(ps2_interrupt_handler, (void *)self, ESP_INTR_FLAG_IRAM, &self->handle); + gpio_intr_enable(self->clk_pin); +} + +static void disable_interrupt(ps2io_ps2_obj_t* self) { + // turn off fallling edge interrupt + gpio_intr_disable(self->clk_pin); +} + +static void resume_interrupt(ps2io_ps2_obj_t* self) { + self->state = STATE_IDLE; + gpio_intr_enable(self->clk_pin); +} + +static void clk_hi(ps2io_ps2_obj_t* self) { + // external pull-up + gpio_set_direction(self->clk_pin, GPIO_MODE_INPUT); + gpio_pullup_dis(self->clk_pin); +} + +static bool wait_clk_lo(ps2io_ps2_obj_t* self, uint32_t us) { + clk_hi(self); + common_hal_mcu_delay_us(1); + while (gpio_get_level(self->clk_pin) && us) { + --us; + common_hal_mcu_delay_us(1); + } + return us; +} + +static bool wait_clk_hi(ps2io_ps2_obj_t* self, uint32_t us) { + clk_hi(self); + common_hal_mcu_delay_us(1); + while (!gpio_get_level(self->clk_pin) && us) { + --us; + common_hal_mcu_delay_us(1); + } + return us; +} + +static void clk_lo(ps2io_ps2_obj_t* self) { + gpio_pullup_dis(self->clk_pin); + gpio_set_direction(self->clk_pin, GPIO_MODE_OUTPUT); + gpio_set_level(self->clk_pin, 0); +} + +static void data_hi(ps2io_ps2_obj_t* self) { + // external pull-up + gpio_set_direction(self->data_pin, GPIO_MODE_INPUT); + gpio_pullup_dis(self->data_pin); +} + +static bool wait_data_lo(ps2io_ps2_obj_t* self, uint32_t us) { + data_hi(self); + common_hal_mcu_delay_us(1); + while (gpio_get_level(self->data_pin) && us) { + --us; + common_hal_mcu_delay_us(1); + } + return us; +} + +static bool wait_data_hi(ps2io_ps2_obj_t* self, uint32_t us) { + data_hi(self); + common_hal_mcu_delay_us(1); + while (!gpio_get_level(self->data_pin) && us) { + --us; + common_hal_mcu_delay_us(1); + } + return us; +} + +static void data_lo(ps2io_ps2_obj_t* self) { + gpio_pullup_dis(self->data_pin); + gpio_set_direction(self->data_pin, GPIO_MODE_OUTPUT); + gpio_set_level(self->data_pin, 0); +} + +static void idle(ps2io_ps2_obj_t* self) { + clk_hi(self); + data_hi(self); +} + +static void inhibit(ps2io_ps2_obj_t* self) { + clk_lo(self); + data_hi(self); +} + +static void delay_us(uint32_t t) { + common_hal_mcu_delay_us(t); +} + +static void IRAM_ATTR ps2_interrupt_handler(void *self_in) { + // Grab the current time first. + uint64_t current_tick = port_get_raw_ticks(NULL); + + ps2io_ps2_obj_t * self = self_in; + int data_bit = gpio_get_level(self->data_pin) ? 1 : 0; + + // test for timeout + if (self->state != STATE_IDLE) { + int64_t diff_ms = current_tick - self->last_raw_ticks; + if (diff_ms > 1) { // a.k.a. > 1.001ms + self->last_errors |= ERROR_TIMEOUT; + self->state = STATE_IDLE; + } + } + + self->last_raw_ticks = current_tick; + + if (self->state == STATE_IDLE) { + self->bits = 0; + self->parity = false; + self->bitcount = 0; + self->state = STATE_RECV; + if (data_bit) { + // start bit should be 0 + self->last_errors |= ERROR_STARTBIT; + self->state = STATE_RECV_ERR; + } else { + self->state = STATE_RECV; + } + + } else if (self->state == STATE_RECV) { + if (data_bit) { + self->bits |= data_bit << self->bitcount; + self->parity = !self->parity; + } + ++self->bitcount; + if (self->bitcount >= 8) { + self->state = STATE_RECV_PARITY; + } + + } else if (self->state == STATE_RECV_PARITY) { + ++self->bitcount; + if (data_bit) { + self->parity = !self->parity; + } + if (!self->parity) { + self->last_errors |= ERROR_PARITY; + self->state = STATE_RECV_ERR; + } else { + self->state = STATE_RECV_STOP; + } + + } else if (self->state == STATE_RECV_STOP) { + ++self->bitcount; + if (! data_bit) { + self->last_errors |= ERROR_STOPBIT; + } else if (self->waiting_cmd_response) { + self->cmd_response = self->bits; + self->waiting_cmd_response = false; + } else if (self->bufcount >= sizeof(self->buffer)) { + self->last_errors |= ERROR_BUFFER; + } else { + self->buffer[self->bufposw] = self->bits; + self->bufposw = (self->bufposw + 1) % sizeof(self->buffer); + self->bufcount++; + } + self->state = STATE_IDLE; + + } else if (self->state == STATE_RECV_ERR) { + // just count the bits until idle + if (++self->bitcount >= 10) { + self->state = STATE_IDLE; + } + } +} + +void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self, + const mcu_pin_obj_t* data_pin, const mcu_pin_obj_t* clk_pin) { + clk_hi(self); + data_hi(self); + + self->clk_pin = (gpio_num_t)clk_pin->number; + self->data_pin = (gpio_num_t)data_pin->number; + self->state = STATE_IDLE; + self->bufcount = 0; + self->bufposr = 0; + self->bufposw = 0; + self->waiting_cmd_response = false; + + claim_pin(clk_pin); + claim_pin(data_pin); + + // set config will enable the interrupt. + ps2_set_config(self); +} + +bool common_hal_ps2io_ps2_deinited(ps2io_ps2_obj_t* self) { + return self->clk_pin == GPIO_NUM_MAX; +} + +void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t* self) { + if (common_hal_ps2io_ps2_deinited(self)) { + return; + } + if (self->handle) { + esp_intr_free(self->handle); + self->handle = NULL; + } + reset_pin_number(self->clk_pin); + reset_pin_number(self->data_pin); + self->clk_pin = GPIO_NUM_MAX; + self->data_pin = GPIO_NUM_MAX; +} + +uint16_t common_hal_ps2io_ps2_get_len(ps2io_ps2_obj_t* self) { + return self->bufcount; +} + +int16_t common_hal_ps2io_ps2_popleft(ps2io_ps2_obj_t* self) { + common_hal_mcu_disable_interrupts(); + if (self->bufcount <= 0) { + common_hal_mcu_enable_interrupts(); + return -1; + } + uint8_t b = self->buffer[self->bufposr]; + self->bufposr = (self->bufposr + 1) % sizeof(self->buffer); + self->bufcount -= 1; + common_hal_mcu_enable_interrupts(); + return b; +} + +uint16_t common_hal_ps2io_ps2_clear_errors(ps2io_ps2_obj_t* self) { + common_hal_mcu_disable_interrupts(); + uint16_t errors = self->last_errors; + self->last_errors = 0; + common_hal_mcu_enable_interrupts(); + return errors; +} + +// Based upon TMK implementation of PS/2 protocol +// https://github.com/tmk/tmk_keyboard/blob/master/tmk_core/protocol/ps2_interrupt.c + +int16_t common_hal_ps2io_ps2_sendcmd(ps2io_ps2_obj_t* self, uint8_t b) { + disable_interrupt(self); + inhibit(self); + delay_us(100); + + /* RTS and start bit */ + data_lo(self); + clk_hi(self); + if (!wait_clk_lo(self, 10000)) { + self->last_errors |= ERROR_TX_RTS; + goto ERROR; + } + + bool parity = true; + for (uint8_t i = 0; i < 8; i++) { + delay_us(15); + if (b & (1 << i)) { + parity = !parity; + data_hi(self); + } else { + data_lo(self); + } + if (!wait_clk_hi(self, 50)) { + self->last_errors |= ERROR_TX_CLKHI; + goto ERROR; + } + if (!wait_clk_lo(self, 50)) { + self->last_errors |= ERROR_TX_CLKLO; + goto ERROR; + } + } + + delay_us(15); + if (parity) { + data_hi(self); + } else { + data_lo(self); + } + if (!wait_clk_hi(self, 50)) { + self->last_errors |= ERROR_TX_CLKHI; + goto ERROR; + } + if (!wait_clk_lo(self, 50)) { + self->last_errors |= ERROR_TX_CLKLO; + goto ERROR; + } + + /* Stop bit */ + delay_us(15); + data_hi(self); + + /* Ack */ + if (!wait_data_lo(self, 50)) { + self->last_errors |= ERROR_TX_ACKDATA; + goto ERROR; + } + if (!wait_clk_lo(self, 50)) { + self->last_errors |= ERROR_TX_ACKCLK; + goto ERROR; + } + + /* wait for idle state */ + if (!wait_clk_hi(self, 50)) { + self->last_errors |= ERROR_TX_ACKCLK; + goto ERROR; + } + if (!wait_data_hi(self, 50)) { + self->last_errors |= ERROR_TX_ACKDATA; + goto ERROR; + } + + /* Wait for response byte */ + self->waiting_cmd_response = true; + idle(self); + resume_interrupt(self); + + for (int i = 0; i < 25; ++i) { + delay_us(1000); + common_hal_mcu_disable_interrupts(); + bool has_response = !self->waiting_cmd_response; + uint8_t response = self->cmd_response; + common_hal_mcu_enable_interrupts(); + + if (has_response) { + return response; + } + } + + /* No response */ + common_hal_mcu_disable_interrupts(); + self->waiting_cmd_response = false; + self->last_errors |= ERROR_TX_NORESP; + common_hal_mcu_enable_interrupts(); + return -1; + + /* Other errors */ +ERROR: + idle(self); + resume_interrupt(self); + return -1; +} diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.h b/ports/esp32s2/common-hal/ps2io/Ps2.h new file mode 100644 index 000000000..51ebde448 --- /dev/null +++ b/ports/esp32s2/common-hal/ps2io/Ps2.h @@ -0,0 +1,60 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 microDev + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PS2IO_PS2_H +#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PS2IO_PS2_H + +#include "common-hal/microcontroller/Pin.h" + +#include "py/obj.h" +#include "driver/gpio.h" + +typedef struct { + mp_obj_base_t base; + gpio_num_t clk_pin; + gpio_num_t data_pin; + + uint8_t state; + uint64_t last_raw_ticks; + + uint16_t bits; + bool parity; + uint8_t bitcount; + + uint8_t buffer[16]; + uint8_t bufcount; + uint8_t bufposr; + uint8_t bufposw; + + uint16_t last_errors; + + bool waiting_cmd_response; + uint8_t cmd_response; + + intr_handle_t handle; +} ps2io_ps2_obj_t; + +#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PS2IO_PS2_H diff --git a/ports/esp32s2/common-hal/ps2io/__init__.c b/ports/esp32s2/common-hal/ps2io/__init__.c new file mode 100644 index 000000000..ba4b4249f --- /dev/null +++ b/ports/esp32s2/common-hal/ps2io/__init__.c @@ -0,0 +1 @@ +// No ps2io module functions. diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk index 335d2caf7..26bb51611 100644 --- a/ports/esp32s2/mpconfigport.mk +++ b/ports/esp32s2/mpconfigport.mk @@ -28,6 +28,10 @@ CIRCUITPY_WIFI = 1 CIRCUITPY_WATCHDOG ?= 1 CIRCUITPY_ESPIDF = 1 +ifndef CIRCUITPY_PS2IO +CIRCUITPY_PS2IO = 1 +endif + ifndef CIRCUITPY_TOUCHIO_USE_NATIVE CIRCUITPY_TOUCHIO_USE_NATIVE = 1 endif -- cgit v1.2.3 From 0d3e81f969adc6d8744e8e720ec4b01848a8fa6c Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Wed, 18 Nov 2020 22:22:42 +0530 Subject: update interrupt handling --- ports/esp32s2/common-hal/ps2io/Ps2.c | 13 +++++-------- ports/esp32s2/common-hal/ps2io/Ps2.h | 2 -- 2 files changed, 5 insertions(+), 10 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.c b/ports/esp32s2/common-hal/ps2io/Ps2.c index 2156a4247..9c19ea950 100644 --- a/ports/esp32s2/common-hal/ps2io/Ps2.c +++ b/ports/esp32s2/common-hal/ps2io/Ps2.c @@ -55,18 +55,18 @@ static void IRAM_ATTR ps2_interrupt_handler(void *self_in); static void ps2_set_config(ps2io_ps2_obj_t* self) { // turn on falling edge interrupt gpio_set_intr_type(self->clk_pin, GPIO_INTR_NEGEDGE); - gpio_isr_register(ps2_interrupt_handler, (void *)self, ESP_INTR_FLAG_IRAM, &self->handle); - gpio_intr_enable(self->clk_pin); + gpio_install_isr_service(ESP_INTR_FLAG_IRAM); + gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self); } static void disable_interrupt(ps2io_ps2_obj_t* self) { // turn off fallling edge interrupt - gpio_intr_disable(self->clk_pin); + gpio_isr_handler_remove(self->clk_pin); } static void resume_interrupt(ps2io_ps2_obj_t* self) { self->state = STATE_IDLE; - gpio_intr_enable(self->clk_pin); + gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self); } static void clk_hi(ps2io_ps2_obj_t* self) { @@ -252,10 +252,7 @@ void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t* self) { if (common_hal_ps2io_ps2_deinited(self)) { return; } - if (self->handle) { - esp_intr_free(self->handle); - self->handle = NULL; - } + gpio_uninstall_isr_service(); reset_pin_number(self->clk_pin); reset_pin_number(self->data_pin); self->clk_pin = GPIO_NUM_MAX; diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.h b/ports/esp32s2/common-hal/ps2io/Ps2.h index 51ebde448..eb93829b4 100644 --- a/ports/esp32s2/common-hal/ps2io/Ps2.h +++ b/ports/esp32s2/common-hal/ps2io/Ps2.h @@ -53,8 +53,6 @@ typedef struct { bool waiting_cmd_response; uint8_t cmd_response; - - intr_handle_t handle; } ps2io_ps2_obj_t; #endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PS2IO_PS2_H -- cgit v1.2.3 From 081aec44290cdacc2a28cf8b5c01d34c3d681d93 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Wed, 18 Nov 2020 16:39:34 -0800 Subject: Retry connection when getting NOT_AUTHED I saw it once with a correct password. Retrying may still fail but at least it'll try first. --- ports/esp32s2/common-hal/wifi/__init__.c | 1 + 1 file changed, 1 insertion(+) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/__init__.c b/ports/esp32s2/common-hal/wifi/__init__.c index 2eb3719b4..70f1d98cb 100644 --- a/ports/esp32s2/common-hal/wifi/__init__.c +++ b/ports/esp32s2/common-hal/wifi/__init__.c @@ -59,6 +59,7 @@ static void event_handler(void* arg, esp_event_base_t event_base, ESP_EARLY_LOGW(TAG, "reason %d 0x%02x", reason, reason); if (radio->retries_left > 0 && (reason == WIFI_REASON_AUTH_EXPIRE || + reason == WIFI_REASON_NOT_AUTHED || reason == WIFI_REASON_ASSOC_EXPIRE || reason == WIFI_REASON_CONNECTION_FAIL || reason == WIFI_REASON_4WAY_HANDSHAKE_TIMEOUT)) { -- cgit v1.2.3 From 9a642fc0490c22b60460bcca8dec3b0b93344d81 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Wed, 18 Nov 2020 20:37:26 -0600 Subject: samd21: Enable terse error reporting on resource constrained chip family This reclaims over 1kB of flash space by simplifying certain exception messages. e.g., it will no longer display the requested/actual length when a fixed list/tuple of N items is needed: if (MICROPY_ERROR_REPORTING == MICROPY_ERROR_REPORTING_TERSE) { mp_raise_ValueError(translate("tuple/list has wrong length")); } else { mp_raise_ValueError_varg(translate("requested length %d but object has length %d"), (int)len, (int)seq_len); Other chip families including samd51 keep their current error reporting capabilities. --- ports/atmel-samd/mpconfigport.h | 1 + py/circuitpy_mpconfig.h | 2 ++ 2 files changed, 3 insertions(+) (limited to 'ports') diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h index ed10da9b9..3069def33 100644 --- a/ports/atmel-samd/mpconfigport.h +++ b/ports/atmel-samd/mpconfigport.h @@ -42,6 +42,7 @@ #define CIRCUITPY_MCU_FAMILY samd21 #define MICROPY_PY_SYS_PLATFORM "Atmel SAMD21" #define SPI_FLASH_MAX_BAUDRATE 8000000 +#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE) #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (0) #define MICROPY_PY_FUNCTION_ATTRS (0) // MICROPY_PY_UJSON depends on MICROPY_PY_IO diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 85e152670..4c2e33be0 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -64,7 +64,9 @@ #define MICROPY_ENABLE_FINALISER (1) #define MICROPY_ENABLE_GC (1) #define MICROPY_ENABLE_SOURCE_LINE (1) +#ifndef MICROPY_ERROR_REPORTING #define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_NORMAL) +#endif #define MICROPY_FLOAT_HIGH_QUALITY_HASH (0) #define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) #define MICROPY_GC_ALLOC_THRESHOLD (0) -- cgit v1.2.3 From b56645808c88cca22a42cb66ed7b3ddc8383436a Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Thu, 19 Nov 2020 11:44:22 +0530 Subject: fix crash on user code exit --- ports/esp32s2/common-hal/ps2io/Ps2.c | 6 ++++-- ports/esp32s2/common-hal/ps2io/Ps2.h | 2 ++ ports/esp32s2/supervisor/port.c | 5 +++++ shared-bindings/ps2io/Ps2.c | 5 +++-- 4 files changed, 14 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.c b/ports/esp32s2/common-hal/ps2io/Ps2.c index 9c19ea950..56199f4cb 100644 --- a/ports/esp32s2/common-hal/ps2io/Ps2.c +++ b/ports/esp32s2/common-hal/ps2io/Ps2.c @@ -26,9 +26,7 @@ #include "common-hal/ps2io/Ps2.h" -#include "py/runtime.h" #include "supervisor/port.h" -#include "shared-bindings/ps2io/Ps2.h" #include "shared-bindings/microcontroller/__init__.h" #define STATE_IDLE 0 @@ -259,6 +257,10 @@ void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t* self) { self->data_pin = GPIO_NUM_MAX; } +void ps2_reset(void) { + gpio_uninstall_isr_service(); +} + uint16_t common_hal_ps2io_ps2_get_len(ps2io_ps2_obj_t* self) { return self->bufcount; } diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.h b/ports/esp32s2/common-hal/ps2io/Ps2.h index eb93829b4..497952b25 100644 --- a/ports/esp32s2/common-hal/ps2io/Ps2.h +++ b/ports/esp32s2/common-hal/ps2io/Ps2.h @@ -55,4 +55,6 @@ typedef struct { uint8_t cmd_response; } ps2io_ps2_obj_t; +void ps2_reset(void); + #endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PS2IO_PS2_H diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c index 47d0c7f46..f66a8511a 100644 --- a/ports/esp32s2/supervisor/port.c +++ b/ports/esp32s2/supervisor/port.c @@ -41,6 +41,7 @@ #include "common-hal/busio/I2C.h" #include "common-hal/busio/SPI.h" #include "common-hal/busio/UART.h" +#include "common-hal/ps2io/Ps2.h" #include "common-hal/pulseio/PulseIn.h" #include "common-hal/pwmio/PWMOut.h" #include "common-hal/watchdog/WatchDogTimer.h" @@ -104,6 +105,10 @@ void reset_port(void) { analogout_reset(); #endif +#if CIRCUITPY_PS2IO + ps2_reset(); +#endif + #if CIRCUITPY_PULSEIO esp32s2_peripherals_rmt_reset(); pulsein_reset(); diff --git a/shared-bindings/ps2io/Ps2.c b/shared-bindings/ps2io/Ps2.c index 0977e08ff..07fa5cebb 100644 --- a/shared-bindings/ps2io/Ps2.c +++ b/shared-bindings/ps2io/Ps2.c @@ -116,8 +116,9 @@ STATIC void check_for_deinit(ps2io_ps2_obj_t *self) { //| ... //| STATIC mp_obj_t ps2io_ps2_obj___exit__(size_t n_args, const mp_obj_t *args) { - (void)n_args; - common_hal_ps2io_ps2_deinit(args[0]); + mp_check_self(MP_OBJ_IS_TYPE(args[0], &ps2io_ps2_type)); + ps2io_ps2_obj_t *self = MP_OBJ_TO_PTR(args[0]); + common_hal_ps2io_ps2_deinit(self); return mp_const_none; } STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(ps2io_ps2___exit___obj, 4, 4, ps2io_ps2_obj___exit__); -- cgit v1.2.3 From 040eaa044344562ec1f9905d67b612ea2ec12949 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Thu, 19 Nov 2020 15:30:15 +0530 Subject: re-organize and clean-up --- ports/esp32s2/common-hal/ps2io/Ps2.c | 200 +++++++++++++++++------------------ 1 file changed, 100 insertions(+), 100 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/ps2io/Ps2.c b/ports/esp32s2/common-hal/ps2io/Ps2.c index 56199f4cb..003f0d827 100644 --- a/ports/esp32s2/common-hal/ps2io/Ps2.c +++ b/ports/esp32s2/common-hal/ps2io/Ps2.c @@ -48,103 +48,16 @@ #define ERROR_TX_RTS 0x1000 #define ERROR_TX_NORESP 0x2000 -static void IRAM_ATTR ps2_interrupt_handler(void *self_in); - -static void ps2_set_config(ps2io_ps2_obj_t* self) { - // turn on falling edge interrupt - gpio_set_intr_type(self->clk_pin, GPIO_INTR_NEGEDGE); - gpio_install_isr_service(ESP_INTR_FLAG_IRAM); - gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self); -} - -static void disable_interrupt(ps2io_ps2_obj_t* self) { - // turn off fallling edge interrupt - gpio_isr_handler_remove(self->clk_pin); -} - -static void resume_interrupt(ps2io_ps2_obj_t* self) { - self->state = STATE_IDLE; - gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self); -} - -static void clk_hi(ps2io_ps2_obj_t* self) { - // external pull-up - gpio_set_direction(self->clk_pin, GPIO_MODE_INPUT); - gpio_pullup_dis(self->clk_pin); -} - -static bool wait_clk_lo(ps2io_ps2_obj_t* self, uint32_t us) { - clk_hi(self); - common_hal_mcu_delay_us(1); - while (gpio_get_level(self->clk_pin) && us) { - --us; - common_hal_mcu_delay_us(1); - } - return us; -} - -static bool wait_clk_hi(ps2io_ps2_obj_t* self, uint32_t us) { - clk_hi(self); - common_hal_mcu_delay_us(1); - while (!gpio_get_level(self->clk_pin) && us) { - --us; - common_hal_mcu_delay_us(1); - } - return us; -} - -static void clk_lo(ps2io_ps2_obj_t* self) { - gpio_pullup_dis(self->clk_pin); - gpio_set_direction(self->clk_pin, GPIO_MODE_OUTPUT); - gpio_set_level(self->clk_pin, 0); -} - -static void data_hi(ps2io_ps2_obj_t* self) { - // external pull-up - gpio_set_direction(self->data_pin, GPIO_MODE_INPUT); - gpio_pullup_dis(self->data_pin); -} - -static bool wait_data_lo(ps2io_ps2_obj_t* self, uint32_t us) { - data_hi(self); - common_hal_mcu_delay_us(1); - while (gpio_get_level(self->data_pin) && us) { - --us; - common_hal_mcu_delay_us(1); - } - return us; -} - -static bool wait_data_hi(ps2io_ps2_obj_t* self, uint32_t us) { - data_hi(self); - common_hal_mcu_delay_us(1); - while (!gpio_get_level(self->data_pin) && us) { - --us; - common_hal_mcu_delay_us(1); - } - return us; -} - -static void data_lo(ps2io_ps2_obj_t* self) { - gpio_pullup_dis(self->data_pin); - gpio_set_direction(self->data_pin, GPIO_MODE_OUTPUT); - gpio_set_level(self->data_pin, 0); -} - -static void idle(ps2io_ps2_obj_t* self) { - clk_hi(self); - data_hi(self); -} - -static void inhibit(ps2io_ps2_obj_t* self) { - clk_lo(self); - data_hi(self); +void ps2_reset(void) { + gpio_uninstall_isr_service(); } static void delay_us(uint32_t t) { common_hal_mcu_delay_us(t); } +/* interrupt handling */ + static void IRAM_ATTR ps2_interrupt_handler(void *self_in) { // Grab the current time first. uint64_t current_tick = port_get_raw_ticks(NULL); @@ -222,11 +135,99 @@ static void IRAM_ATTR ps2_interrupt_handler(void *self_in) { } } -void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self, - const mcu_pin_obj_t* data_pin, const mcu_pin_obj_t* clk_pin) { +static void enable_interrupt(ps2io_ps2_obj_t* self) { + // turn on falling edge interrupt + gpio_install_isr_service(ESP_INTR_FLAG_IRAM); + gpio_set_intr_type(self->clk_pin, GPIO_INTR_NEGEDGE); + gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self); +} + +static void disable_interrupt(ps2io_ps2_obj_t* self) { + // turn off fallling edge interrupt + gpio_isr_handler_remove(self->clk_pin); +} + +static void resume_interrupt(ps2io_ps2_obj_t* self) { + self->state = STATE_IDLE; + gpio_isr_handler_add(self->clk_pin, ps2_interrupt_handler, (void*)self); +} + +/* gpio handling */ + +static void clk_hi(ps2io_ps2_obj_t* self) { + // external pull-up + gpio_set_direction(self->clk_pin, GPIO_MODE_INPUT); +} + +static bool wait_clk_lo(ps2io_ps2_obj_t* self, uint32_t us) { + clk_hi(self); + delay_us(1); + while (gpio_get_level(self->clk_pin) && us) { + --us; + delay_us(1); + } + return us; +} + +static bool wait_clk_hi(ps2io_ps2_obj_t* self, uint32_t us) { + clk_hi(self); + delay_us(1); + while (!gpio_get_level(self->clk_pin) && us) { + --us; + delay_us(1); + } + return us; +} + +static void clk_lo(ps2io_ps2_obj_t* self) { + gpio_set_direction(self->clk_pin, GPIO_MODE_OUTPUT); + gpio_set_level(self->clk_pin, 0); +} + +static void data_hi(ps2io_ps2_obj_t* self) { + // external pull-up + gpio_set_direction(self->data_pin, GPIO_MODE_INPUT); +} + +static bool wait_data_lo(ps2io_ps2_obj_t* self, uint32_t us) { + data_hi(self); + delay_us(1); + while (gpio_get_level(self->data_pin) && us) { + --us; + delay_us(1); + } + return us; +} + +static bool wait_data_hi(ps2io_ps2_obj_t* self, uint32_t us) { + data_hi(self); + delay_us(1); + while (!gpio_get_level(self->data_pin) && us) { + --us; + delay_us(1); + } + return us; +} + +static void data_lo(ps2io_ps2_obj_t* self) { + gpio_set_direction(self->data_pin, GPIO_MODE_OUTPUT); + gpio_set_level(self->data_pin, 0); +} + +static void idle(ps2io_ps2_obj_t* self) { clk_hi(self); data_hi(self); +} + +static void inhibit(ps2io_ps2_obj_t* self) { + clk_lo(self); + data_hi(self); +} + +/* ps2io module functions */ +void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self, + const mcu_pin_obj_t* data_pin, const mcu_pin_obj_t* clk_pin) { self->clk_pin = (gpio_num_t)clk_pin->number; self->data_pin = (gpio_num_t)data_pin->number; self->state = STATE_IDLE; @@ -235,11 +236,11 @@ void common_hal_ps2io_ps2_construct(ps2io_ps2_obj_t* self, self->bufposw = 0; self->waiting_cmd_response = false; + idle(self); + enable_interrupt(self); + claim_pin(clk_pin); claim_pin(data_pin); - - // set config will enable the interrupt. - ps2_set_config(self); } bool common_hal_ps2io_ps2_deinited(ps2io_ps2_obj_t* self) { @@ -257,10 +258,6 @@ void common_hal_ps2io_ps2_deinit(ps2io_ps2_obj_t* self) { self->data_pin = GPIO_NUM_MAX; } -void ps2_reset(void) { - gpio_uninstall_isr_service(); -} - uint16_t common_hal_ps2io_ps2_get_len(ps2io_ps2_obj_t* self) { return self->bufcount; } @@ -291,6 +288,8 @@ uint16_t common_hal_ps2io_ps2_clear_errors(ps2io_ps2_obj_t* self) { int16_t common_hal_ps2io_ps2_sendcmd(ps2io_ps2_obj_t* self, uint8_t b) { disable_interrupt(self); + + /* terminate a transmission if we have */ inhibit(self); delay_us(100); @@ -321,6 +320,7 @@ int16_t common_hal_ps2io_ps2_sendcmd(ps2io_ps2_obj_t* self, uint8_t b) { } } + /* Parity bit */ delay_us(15); if (parity) { data_hi(self); -- cgit v1.2.3 From bc9036f35370fcd0e4806c42dd47a8c6bb42a085 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Fri, 20 Nov 2020 00:15:30 +0530 Subject: use pointer to get nvs handle --- ports/esp32s2/common-hal/nvm/ByteArray.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.c b/ports/esp32s2/common-hal/nvm/ByteArray.c index d90f7fbdc..9f8ced3ec 100644 --- a/ports/esp32s2/common-hal/nvm/ByteArray.c +++ b/ports/esp32s2/common-hal/nvm/ByteArray.c @@ -27,14 +27,13 @@ #include "common-hal/nvm/ByteArray.h" #include "py/runtime.h" - #include "nvs_flash.h" uint32_t common_hal_nvm_bytearray_get_length(nvm_bytearray_obj_t *self) { return self->len; } -static nvs_handle get_nvs_handle(void) { +static void get_nvs_handle(nvs_handle_t * nvs_handle) { // Initialize NVS esp_err_t err = nvs_flash_init(); if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) { @@ -46,32 +45,31 @@ static nvs_handle get_nvs_handle(void) { ESP_ERROR_CHECK(err); // Open NVS handle - nvs_handle nvs_handle; - if (nvs_open("CPY", NVS_READWRITE, &nvs_handle) != ESP_OK) { + if (nvs_open("CPY", NVS_READWRITE, nvs_handle) != ESP_OK) { mp_raise_RuntimeError(translate("NVS Error")); } - return nvs_handle; } bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, uint32_t start_index, uint8_t* values, uint32_t len) { char index[9]; - sprintf(index, "%i", start_index - CIRCUITPY_INTERNAL_NVM_START_ADDR); + sprintf(index, "%i", start_index); // start nvs - nvs_handle handle = get_nvs_handle(); + nvs_handle_t handle; + get_nvs_handle(&handle); bool status = ((nvs_set_u8(handle, (const char *)index, *values) == ESP_OK) && (nvs_commit(handle) == ESP_OK)); // close nvs nvs_close(handle); return status; } -// NVM memory is memory mapped so reading it is easy. void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self, uint32_t start_index, uint32_t len, uint8_t* values) { char index[9]; - sprintf(index, "%i", start_index - CIRCUITPY_INTERNAL_NVM_START_ADDR); + sprintf(index, "%i", start_index); // start nvs - nvs_handle handle = get_nvs_handle(); + nvs_handle_t handle; + get_nvs_handle(&handle); if (nvs_get_u8(handle, (const char *)index, values) != ESP_OK) { mp_raise_RuntimeError(translate("NVS Error")); } -- cgit v1.2.3 From a25b27520d077424219832d764e9e59da6759562 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Fri, 20 Nov 2020 00:22:00 +0530 Subject: update nvm implementation --- ports/esp32s2/common-hal/nvm/ByteArray.c | 40 +++++++++++++++++++++++++++----- 1 file changed, 34 insertions(+), 6 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.c b/ports/esp32s2/common-hal/nvm/ByteArray.c index 9f8ced3ec..e304dd830 100644 --- a/ports/esp32s2/common-hal/nvm/ByteArray.c +++ b/ports/esp32s2/common-hal/nvm/ByteArray.c @@ -26,6 +26,8 @@ #include "common-hal/nvm/ByteArray.h" +#include + #include "py/runtime.h" #include "nvs_flash.h" @@ -53,26 +55,52 @@ static void get_nvs_handle(nvs_handle_t * nvs_handle) { bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, uint32_t start_index, uint8_t* values, uint32_t len) { char index[9]; - sprintf(index, "%i", start_index); + + uint8_t buffer[len]; + memcpy(buffer, values, len); + // start nvs nvs_handle_t handle; get_nvs_handle(&handle); - bool status = ((nvs_set_u8(handle, (const char *)index, *values) == ESP_OK) && (nvs_commit(handle) == ESP_OK)); + + // stage flash changes + for (uint32_t i = 0; i < len; i++) { + sprintf(index, "%i", start_index + i); + if (nvs_set_u8(handle, (const char *)index, buffer[i]) != ESP_OK) { + return false; + } + } + + // commit flash changes + if (nvs_commit(handle) != ESP_OK) { + return false; + } + // close nvs nvs_close(handle); - return status; + return true; } void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self, uint32_t start_index, uint32_t len, uint8_t* values) { char index[9]; - sprintf(index, "%i", start_index); + uint8_t buffer[len]; + // start nvs nvs_handle_t handle; get_nvs_handle(&handle); - if (nvs_get_u8(handle, (const char *)index, values) != ESP_OK) { - mp_raise_RuntimeError(translate("NVS Error")); + + // get from flash + for (uint32_t i = 0; i < len; i++) { + sprintf(index, "%i", start_index + i); + if (nvs_get_u8(handle, (const char *)index, &buffer[i]) != ESP_OK) { + mp_raise_RuntimeError(translate("NVS Error")); + } } + + // set into values + memcpy(values, buffer, len); + // close nvs nvs_close(handle); } -- cgit v1.2.3 From 0556f9f851f0bd5fdb392b925af1076affbf5e00 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 19 Nov 2020 15:12:56 -0600 Subject: Revert "samd21: Enable terse error reporting on resource constrained chip family" This reverts commit 9a642fc0490c22b60460bcca8dec3b0b93344d81. --- ports/atmel-samd/mpconfigport.h | 1 - py/circuitpy_mpconfig.h | 2 -- 2 files changed, 3 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h index 3069def33..ed10da9b9 100644 --- a/ports/atmel-samd/mpconfigport.h +++ b/ports/atmel-samd/mpconfigport.h @@ -42,7 +42,6 @@ #define CIRCUITPY_MCU_FAMILY samd21 #define MICROPY_PY_SYS_PLATFORM "Atmel SAMD21" #define SPI_FLASH_MAX_BAUDRATE 8000000 -#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE) #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (0) #define MICROPY_PY_FUNCTION_ATTRS (0) // MICROPY_PY_UJSON depends on MICROPY_PY_IO diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 4c2e33be0..85e152670 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -64,9 +64,7 @@ #define MICROPY_ENABLE_FINALISER (1) #define MICROPY_ENABLE_GC (1) #define MICROPY_ENABLE_SOURCE_LINE (1) -#ifndef MICROPY_ERROR_REPORTING #define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_NORMAL) -#endif #define MICROPY_FLOAT_HIGH_QUALITY_HASH (0) #define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) #define MICROPY_GC_ALLOC_THRESHOLD (0) -- cgit v1.2.3 From c06fc8e02dc7c17e827e3fe736dc7226d7819452 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 19 Nov 2020 16:13:54 -0600 Subject: Introduce, use mp_raise_arg1 This raises an exception with a given object value. Saves a bit of code size. --- extmod/modure.c | 6 +++--- extmod/moduzlib.c | 2 +- ports/unix/modjni.c | 4 ++-- py/modsys.c | 2 +- py/objdict.c | 6 +++--- py/objset.c | 2 +- py/objstr.c | 2 +- py/pystack.c | 4 ++-- py/runtime.c | 8 ++++++-- py/runtime.h | 1 + 10 files changed, 21 insertions(+), 16 deletions(-) (limited to 'ports') diff --git a/extmod/modure.c b/extmod/modure.c index a20f3ee42..bb54bc732 100644 --- a/extmod/modure.c +++ b/extmod/modure.c @@ -43,7 +43,7 @@ STATIC mp_obj_t match_group(mp_obj_t self_in, mp_obj_t no_in) { mp_obj_match_t *self = MP_OBJ_TO_PTR(self_in); mp_int_t no = mp_obj_get_int(no_in); if (no < 0 || no >= self->num_matches) { - nlr_raise(mp_obj_new_exception_arg1(&mp_type_IndexError, no_in)); + mp_raise_arg1(&mp_type_IndexError, no_in); } const char *start = self->caps[no * 2]; @@ -82,7 +82,7 @@ STATIC void match_span_helper(size_t n_args, const mp_obj_t *args, mp_obj_t span if (n_args == 2) { no = mp_obj_get_int(args[1]); if (no < 0 || no >= self->num_matches) { - nlr_raise(mp_obj_new_exception_arg1(&mp_type_IndexError, args[1])); + mp_raise_arg1(&mp_type_IndexError, args[1]); } } @@ -326,7 +326,7 @@ STATIC mp_obj_t re_sub_helper(mp_obj_t self_in, size_t n_args, const mp_obj_t *a } if (match_no >= (unsigned int)match->num_matches) { - nlr_raise(mp_obj_new_exception_arg1(&mp_type_IndexError, MP_OBJ_NEW_SMALL_INT(match_no))); + mp_raise_arg1(&mp_type_IndexError, MP_OBJ_NEW_SMALL_INT(match_no)); } const char *start_match = match->caps[match_no * 2]; diff --git a/extmod/moduzlib.c b/extmod/moduzlib.c index 8422e7598..b344f9642 100644 --- a/extmod/moduzlib.c +++ b/extmod/moduzlib.c @@ -179,7 +179,7 @@ STATIC mp_obj_t mod_uzlib_decompress(size_t n_args, const mp_obj_t *args) { return res; error: - nlr_raise(mp_obj_new_exception_arg1(&mp_type_ValueError, MP_OBJ_NEW_SMALL_INT(st))); + mp_raise_arg1(&mp_type_ValueError, MP_OBJ_NEW_SMALL_INT(st)); } STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mod_uzlib_decompress_obj, 1, 3, mod_uzlib_decompress); diff --git a/ports/unix/modjni.c b/ports/unix/modjni.c index 8ec5ae54d..82d1ccd55 100644 --- a/ports/unix/modjni.c +++ b/ports/unix/modjni.c @@ -102,9 +102,9 @@ STATIC void check_exception(void) { mp_obj_t py_e = new_jobject(exc); JJ1(ExceptionClear); if (JJ(IsInstanceOf, exc, IndexException_class)) { - nlr_raise(mp_obj_new_exception_arg1(&mp_type_IndexError, py_e)); + mp_raise_arg1(&mp_type_IndexError, py_e); } - nlr_raise(mp_obj_new_exception_arg1(&mp_type_Exception, py_e)); + mp_raise_arg1(&mp_type_Exception, py_e); } } diff --git a/py/modsys.c b/py/modsys.c index a1d2cf831..31f28a36f 100644 --- a/py/modsys.c +++ b/py/modsys.c @@ -96,7 +96,7 @@ STATIC mp_obj_t mp_sys_exit(size_t n_args, const mp_obj_t *args) { if (n_args == 0) { exc = mp_obj_new_exception(&mp_type_SystemExit); } else { - exc = mp_obj_new_exception_arg1(&mp_type_SystemExit, args[0]); + mp_raise_arg1(&mp_type_SystemExit, args[0]); } nlr_raise(exc); } diff --git a/py/objdict.c b/py/objdict.c index 63fd86f35..098aec5d2 100644 --- a/py/objdict.c +++ b/py/objdict.c @@ -169,7 +169,7 @@ mp_obj_t mp_obj_dict_get(mp_obj_t self_in, mp_obj_t index) { mp_obj_dict_t *self = MP_OBJ_TO_PTR(self_in); mp_map_elem_t *elem = mp_map_lookup(&self->map, index, MP_MAP_LOOKUP); if (elem == NULL) { - nlr_raise(mp_obj_new_exception_arg1(&mp_type_KeyError, index)); + mp_raise_arg1(&mp_type_KeyError, index); } else { return elem->value; } @@ -185,7 +185,7 @@ STATIC mp_obj_t dict_subscr(mp_obj_t self_in, mp_obj_t index, mp_obj_t value) { mp_obj_dict_t *self = MP_OBJ_TO_PTR(self_in); mp_map_elem_t *elem = mp_map_lookup(&self->map, index, MP_MAP_LOOKUP); if (elem == NULL) { - nlr_raise(mp_obj_new_exception_arg1(&mp_type_KeyError, index)); + mp_raise_arg1(&mp_type_KeyError, index); } else { return elem->value; } @@ -272,7 +272,7 @@ STATIC mp_obj_t dict_get_helper(size_t n_args, const mp_obj_t *args, mp_map_look if (elem == NULL || elem->value == MP_OBJ_NULL) { if (n_args == 2) { if (lookup_kind == MP_MAP_LOOKUP_REMOVE_IF_FOUND) { - nlr_raise(mp_obj_new_exception_arg1(&mp_type_KeyError, args[1])); + mp_raise_arg1(&mp_type_KeyError, args[1]); } else { value = mp_const_none; } diff --git a/py/objset.c b/py/objset.c index 45b5c1260..c5d54aede 100644 --- a/py/objset.c +++ b/py/objset.c @@ -378,7 +378,7 @@ STATIC mp_obj_t set_remove(mp_obj_t self_in, mp_obj_t item) { check_set(self_in); mp_obj_set_t *self = MP_OBJ_TO_PTR(self_in); if (mp_set_lookup(&self->set, item, MP_MAP_LOOKUP_REMOVE_IF_FOUND) == MP_OBJ_NULL) { - nlr_raise(mp_obj_new_exception_arg1(&mp_type_KeyError, item)); + mp_raise_arg1(&mp_type_KeyError, item); } return mp_const_none; } diff --git a/py/objstr.c b/py/objstr.c index 6a03f5fc3..34ccab86d 100644 --- a/py/objstr.c +++ b/py/objstr.c @@ -1087,7 +1087,7 @@ STATIC vstr_t mp_obj_str_format_helper(const char *str, const char *top, int *ar field_name = lookup; mp_map_elem_t *key_elem = mp_map_lookup(kwargs, field_q, MP_MAP_LOOKUP); if (key_elem == NULL) { - nlr_raise(mp_obj_new_exception_arg1(&mp_type_KeyError, field_q)); + mp_raise_arg1(&mp_type_KeyError, field_q); } arg = key_elem->value; } diff --git a/py/pystack.c b/py/pystack.c index f79ea9210..0def75b10 100644 --- a/py/pystack.c +++ b/py/pystack.c @@ -43,8 +43,8 @@ void *mp_pystack_alloc(size_t n_bytes) { #endif if (MP_STATE_THREAD(pystack_cur) + n_bytes > MP_STATE_THREAD(pystack_end)) { // out of memory in the pystack - nlr_raise(mp_obj_new_exception_arg1(&mp_type_RuntimeError, - MP_OBJ_NEW_QSTR(MP_QSTR_pystack_space_exhausted))); + mp_raise_arg1(&mp_type_RuntimeError, + MP_OBJ_NEW_QSTR(MP_QSTR_pystack_space_exhausted)); } void *ptr = MP_STATE_THREAD(pystack_cur); MP_STATE_THREAD(pystack_cur) += n_bytes; diff --git a/py/runtime.c b/py/runtime.c index e63e2337d..3745e16e3 100644 --- a/py/runtime.c +++ b/py/runtime.c @@ -1514,6 +1514,10 @@ NORETURN void m_malloc_fail(size_t num_bytes) { translate("memory allocation failed, allocating %u bytes"), (uint)num_bytes); } +NORETURN void mp_raise_arg1(const mp_obj_type_t *exc_type, mp_obj_t arg) { + nlr_raise(mp_obj_new_exception_arg1(exc_type, arg)); +} + NORETURN void mp_raise_msg(const mp_obj_type_t *exc_type, const compressed_string_t *msg) { if (msg == NULL) { nlr_raise(mp_obj_new_exception(exc_type)); @@ -1580,7 +1584,7 @@ NORETURN void mp_raise_TypeError_varg(const compressed_string_t *fmt, ...) { } NORETURN void mp_raise_OSError(int errno_) { - nlr_raise(mp_obj_new_exception_arg1(&mp_type_OSError, MP_OBJ_NEW_SMALL_INT(errno_))); + mp_raise_arg1(&mp_type_OSError, MP_OBJ_NEW_SMALL_INT(errno_)); } NORETURN void mp_raise_OSError_msg(const compressed_string_t *msg) { @@ -1607,7 +1611,7 @@ NORETURN void mp_raise_ConnectionError(const compressed_string_t *msg) { } NORETURN void mp_raise_BrokenPipeError(void) { - nlr_raise(mp_obj_new_exception_arg1(&mp_type_BrokenPipeError, MP_OBJ_NEW_SMALL_INT(MP_EPIPE))); + mp_raise_arg1(&mp_type_BrokenPipeError, MP_OBJ_NEW_SMALL_INT(MP_EPIPE)); } NORETURN void mp_raise_NotImplementedError(const compressed_string_t *msg) { diff --git a/py/runtime.h b/py/runtime.h index ad7d0feab..5e8fda35c 100644 --- a/py/runtime.h +++ b/py/runtime.h @@ -150,6 +150,7 @@ mp_obj_t mp_import_name(qstr name, mp_obj_t fromlist, mp_obj_t level); mp_obj_t mp_import_from(mp_obj_t module, qstr name); void mp_import_all(mp_obj_t module); +NORETURN void mp_raise_arg1(const mp_obj_type_t *exc_type, mp_obj_t arg); NORETURN void mp_raise_msg(const mp_obj_type_t *exc_type, const compressed_string_t *msg); NORETURN void mp_raise_msg_varg(const mp_obj_type_t *exc_type, const compressed_string_t *fmt, ...); NORETURN void mp_raise_msg_vlist(const mp_obj_type_t *exc_type, const compressed_string_t *fmt, va_list argptr); -- cgit v1.2.3 From aaca3eccf12d4b6ea6e294af81c8d19ad330be0c Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 19 Nov 2020 16:19:37 -0600 Subject: samd: PDMIn: Reduce code unrolling on samd21 only Instead of unrolling the code 16 times, unroll it 4 times and loop over it 4 times. This gives the same 16 iterations, but at an expense of less flash space. --- ports/atmel-samd/common-hal/audiobusio/PDMIn.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/common-hal/audiobusio/PDMIn.c b/ports/atmel-samd/common-hal/audiobusio/PDMIn.c index 3c9ec05c2..8911aef2f 100644 --- a/ports/atmel-samd/common-hal/audiobusio/PDMIn.c +++ b/ports/atmel-samd/common-hal/audiobusio/PDMIn.c @@ -337,7 +337,11 @@ const uint16_t sinc_filter [OVERSAMPLING] = { 94, 63, 39, 21, 9, 2, 0, 0 }; -#define REPEAT_16_TIMES(X) X X X X X X X X X X X X X X X X +#ifdef SAMD21 +#define REPEAT_16_TIMES(X) do { for(uint8_t j=0; j<4; j++) { X X X X } } while (0) +#else +#define REPEAT_16_TIMES(X) do { X X X X X X X X X X X X X X X X } while(0) +#endif static uint16_t filter_sample(uint32_t pdm_samples[4]) { uint16_t running_sum = 0; @@ -354,7 +358,7 @@ static uint16_t filter_sample(uint32_t pdm_samples[4]) { filter_ptr++; pdm_sample <<= 1; } - ) + ); } return running_sum; } -- cgit v1.2.3 From 17a8bafe0513c81565d25a6633808c639d5fa1f6 Mon Sep 17 00:00:00 2001 From: BennyE Date: Thu, 19 Nov 2020 23:39:48 +0100 Subject: Choose best AP in range if no channel/bssid given --- ports/esp32s2/common-hal/wifi/Radio.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index 1945da207..61c95dea8 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -142,6 +142,11 @@ wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t } else { config->sta.bssid_set = 0; } + // if channel and bssid both not set, do a full scan instead of fast scan + // this will ensure that the best AP is chosen automatically + if ((self->sta.bssid_set == 0) && (self->sta.channel == NULL)) { + config.scan_method = WIFI_ALL_CHANNEL_SCAN; + } esp_wifi_set_config(ESP_IF_WIFI_STA, config); self->starting_retries = 5; self->retries_left = 5; -- cgit v1.2.3 From 6760cdf678061abeaf2627e5903c8601eee6fc66 Mon Sep 17 00:00:00 2001 From: BennyE Date: Fri, 20 Nov 2020 00:11:17 +0100 Subject: Let connect() choose strongest AP if channel and BSSID are not given --- ports/esp32s2/common-hal/wifi/Radio.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index 61c95dea8..bcbca0ec7 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -142,10 +142,10 @@ wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t } else { config->sta.bssid_set = 0; } - // if channel and bssid both not set, do a full scan instead of fast scan - // this will ensure that the best AP is chosen automatically - if ((self->sta.bssid_set == 0) && (self->sta.channel == NULL)) { - config.scan_method = WIFI_ALL_CHANNEL_SCAN; + // If channel is 0 (default/unset) and BSSID is not given, do a full scan instead of fast scan + // This will ensure that the best AP in range is chosen automatically + if ((config->sta.bssid_set == 0) && (config->sta.channel == 0)) { + config->sta.scan_method = WIFI_ALL_CHANNEL_SCAN; } esp_wifi_set_config(ESP_IF_WIFI_STA, config); self->starting_retries = 5; -- cgit v1.2.3 From 2773f534c946df46da5ba87c0968b5e4912a6b2b Mon Sep 17 00:00:00 2001 From: BennyE Date: Fri, 20 Nov 2020 09:40:32 +0100 Subject: Update ports/esp32s2/common-hal/wifi/Radio.c adding suggested changes --- ports/esp32s2/common-hal/wifi/Radio.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c index bcbca0ec7..f7c431a56 100644 --- a/ports/esp32s2/common-hal/wifi/Radio.c +++ b/ports/esp32s2/common-hal/wifi/Radio.c @@ -146,6 +146,8 @@ wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t // This will ensure that the best AP in range is chosen automatically if ((config->sta.bssid_set == 0) && (config->sta.channel == 0)) { config->sta.scan_method = WIFI_ALL_CHANNEL_SCAN; + } else { + config->sta.scan_method = WIFI_FAST_SCAN; } esp_wifi_set_config(ESP_IF_WIFI_STA, config); self->starting_retries = 5; -- cgit v1.2.3 From 0a06530d52524c76a026ed843165fa79a0526c1b Mon Sep 17 00:00:00 2001 From: Seth Kerr Date: Fri, 20 Nov 2020 15:06:57 -0500 Subject: adding CP-Sapling --- ports/atmel-samd/boards/CP_Sapling_m0/board.c | 40 +++++++++++++++ .../boards/CP_Sapling_m0/mpconfigboard.h | 57 ++++++++++++++++++++++ .../boards/CP_Sapling_m0/mpconfigboard.mk | 24 +++++++++ ports/atmel-samd/boards/CP_Sapling_m0/pins.c | 38 +++++++++++++++ 4 files changed, 159 insertions(+) create mode 100644 ports/atmel-samd/boards/CP_Sapling_m0/board.c create mode 100644 ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/CP_Sapling_m0/pins.c (limited to 'ports') diff --git a/ports/atmel-samd/boards/CP_Sapling_m0/board.c b/ports/atmel-samd/boards/CP_Sapling_m0/board.c new file mode 100644 index 000000000..b745bd906 --- /dev/null +++ b/ports/atmel-samd/boards/CP_Sapling_m0/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "common-hal/microcontroller/Pin.h" +#include "supervisor/shared/board.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.h b/ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.h new file mode 100644 index 000000000..c67f022eb --- /dev/null +++ b/ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.h @@ -0,0 +1,57 @@ +#define MICROPY_HW_BOARD_NAME "CP Sapling M0" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_NEOPIXEL (&pin_PA15) + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define IGNORE_PIN_PA02 1 +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA04 1 +#define IGNORE_PIN_PA05 1 +#define IGNORE_PIN_PA06 1 +#define IGNORE_PIN_PA07 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +#define DEFAULT_SPI_BUS_SS (&pin_PA22) +#define DEFAULT_SPI_BUS_SCK (&pin_PA19) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA18) +#define DEFAULT_SPI_BUS_MISO (&pin_PA17) diff --git a/ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.mk b/ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.mk new file mode 100644 index 000000000..861a0a5f7 --- /dev/null +++ b/ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.mk @@ -0,0 +1,24 @@ +USB_VID = 0x1209 +USB_PID = 0x4DDD +USB_PRODUCT = "CP Sapling" +USB_MANUFACTURER = "Oak Development Technologies" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_FULL_BUILD = 0 + +SUPEROPT_GC = 0 + +CFLAGS_BOARD = --param max-inline-insns-auto=15 +ifeq ($(TRANSLATION), zh_Latn_pinyin) +RELEASE_NEEDS_CLEAN_BUILD = 1 +CFLAGS_INLINE_LIMIT = 35 +endif +ifeq ($(TRANSLATION), de_DE) +RELEASE_NEEDS_CLEAN_BUILD = 1 +CFLAGS_INLINE_LIMIT = 35 +SUPEROPT_VM = 0 +endif diff --git a/ports/atmel-samd/boards/CP_Sapling_m0/pins.c b/ports/atmel-samd/boards/CP_Sapling_m0/pins.c new file mode 100644 index 000000000..ccffe2b3a --- /dev/null +++ b/ports/atmel-samd/boards/CP_Sapling_m0/pins.c @@ -0,0 +1,38 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA00) }, + + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA01) }, + + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PA22) }, + + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA19) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA18) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From b69bbfa3d6dbbe86216f4ea72df54cfd24612fe0 Mon Sep 17 00:00:00 2001 From: Seth Kerr Date: Fri, 20 Nov 2020 15:17:44 -0500 Subject: fixed issues with trailing whitespace check --- ports/atmel-samd/boards/CP_Sapling_m0/board.c | 2 +- ports/atmel-samd/boards/CP_Sapling_m0/pins.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/CP_Sapling_m0/board.c b/ports/atmel-samd/boards/CP_Sapling_m0/board.c index b745bd906..ce5636676 100644 --- a/ports/atmel-samd/boards/CP_Sapling_m0/board.c +++ b/ports/atmel-samd/boards/CP_Sapling_m0/board.c @@ -29,7 +29,7 @@ #include "supervisor/shared/board.h" #include "hal/include/hal_gpio.h" -void board_init(void) { +void board_init(void) { } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/CP_Sapling_m0/pins.c b/ports/atmel-samd/boards/CP_Sapling_m0/pins.c index ccffe2b3a..d527aaddc 100644 --- a/ports/atmel-samd/boards/CP_Sapling_m0/pins.c +++ b/ports/atmel-samd/boards/CP_Sapling_m0/pins.c @@ -7,7 +7,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA00) }, { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA00) }, - + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA01) }, { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA01) }, @@ -31,7 +31,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, - + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, }; -- cgit v1.2.3 From 29e91424d483f0b427957be1c859f7f758f6fbea Mon Sep 17 00:00:00 2001 From: Seth Kerr Date: Fri, 20 Nov 2020 15:29:35 -0500 Subject: removing cp sapling temporarily to read --- ports/atmel-samd/boards/CP_Sapling_m0/board.c | 40 --------------- .../boards/CP_Sapling_m0/mpconfigboard.h | 57 ---------------------- .../boards/CP_Sapling_m0/mpconfigboard.mk | 24 --------- ports/atmel-samd/boards/CP_Sapling_m0/pins.c | 38 --------------- 4 files changed, 159 deletions(-) delete mode 100644 ports/atmel-samd/boards/CP_Sapling_m0/board.c delete mode 100644 ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.h delete mode 100644 ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.mk delete mode 100644 ports/atmel-samd/boards/CP_Sapling_m0/pins.c (limited to 'ports') diff --git a/ports/atmel-samd/boards/CP_Sapling_m0/board.c b/ports/atmel-samd/boards/CP_Sapling_m0/board.c deleted file mode 100644 index ce5636676..000000000 --- a/ports/atmel-samd/boards/CP_Sapling_m0/board.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "boards/board.h" -#include "common-hal/microcontroller/Pin.h" -#include "supervisor/shared/board.h" -#include "hal/include/hal_gpio.h" - -void board_init(void) { -} - -bool board_requests_safe_mode(void) { - return false; -} - -void reset_board(void) { -} diff --git a/ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.h b/ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.h deleted file mode 100644 index c67f022eb..000000000 --- a/ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.h +++ /dev/null @@ -1,57 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "CP Sapling M0" -#define MICROPY_HW_MCU_NAME "samd21e18" - -#define MICROPY_HW_NEOPIXEL (&pin_PA15) - -#define MICROPY_PORT_A (0) -#define MICROPY_PORT_B (0) -#define MICROPY_PORT_C (0) - -#define IGNORE_PIN_PA02 1 -#define IGNORE_PIN_PA03 1 -#define IGNORE_PIN_PA04 1 -#define IGNORE_PIN_PA05 1 -#define IGNORE_PIN_PA06 1 -#define IGNORE_PIN_PA07 1 -#define IGNORE_PIN_PA12 1 -#define IGNORE_PIN_PA13 1 -#define IGNORE_PIN_PA14 1 -#define IGNORE_PIN_PA20 1 -#define IGNORE_PIN_PA21 1 -// USB is always used internally so skip the pin objects for it. -#define IGNORE_PIN_PA24 1 -#define IGNORE_PIN_PA25 1 -#define IGNORE_PIN_PA27 1 -#define IGNORE_PIN_PA28 1 -#define IGNORE_PIN_PA30 1 -#define IGNORE_PIN_PA31 1 -#define IGNORE_PIN_PB01 1 -#define IGNORE_PIN_PB02 1 -#define IGNORE_PIN_PB03 1 -#define IGNORE_PIN_PB04 1 -#define IGNORE_PIN_PB05 1 -#define IGNORE_PIN_PB06 1 -#define IGNORE_PIN_PB07 1 -#define IGNORE_PIN_PB08 1 -#define IGNORE_PIN_PB09 1 -#define IGNORE_PIN_PB10 1 -#define IGNORE_PIN_PB11 1 -#define IGNORE_PIN_PB12 1 -#define IGNORE_PIN_PB13 1 -#define IGNORE_PIN_PB14 1 -#define IGNORE_PIN_PB15 1 -#define IGNORE_PIN_PB16 1 -#define IGNORE_PIN_PB17 1 -#define IGNORE_PIN_PB22 1 -#define IGNORE_PIN_PB23 1 -#define IGNORE_PIN_PB30 1 -#define IGNORE_PIN_PB31 1 -#define IGNORE_PIN_PB00 1 - -#define DEFAULT_I2C_BUS_SCL (&pin_PA09) -#define DEFAULT_I2C_BUS_SDA (&pin_PA08) - -#define DEFAULT_SPI_BUS_SS (&pin_PA22) -#define DEFAULT_SPI_BUS_SCK (&pin_PA19) -#define DEFAULT_SPI_BUS_MOSI (&pin_PA18) -#define DEFAULT_SPI_BUS_MISO (&pin_PA17) diff --git a/ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.mk b/ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.mk deleted file mode 100644 index 861a0a5f7..000000000 --- a/ports/atmel-samd/boards/CP_Sapling_m0/mpconfigboard.mk +++ /dev/null @@ -1,24 +0,0 @@ -USB_VID = 0x1209 -USB_PID = 0x4DDD -USB_PRODUCT = "CP Sapling" -USB_MANUFACTURER = "Oak Development Technologies" - -CHIP_VARIANT = SAMD21E18A -CHIP_FAMILY = samd21 - -INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE -CIRCUITPY_FULL_BUILD = 0 - -SUPEROPT_GC = 0 - -CFLAGS_BOARD = --param max-inline-insns-auto=15 -ifeq ($(TRANSLATION), zh_Latn_pinyin) -RELEASE_NEEDS_CLEAN_BUILD = 1 -CFLAGS_INLINE_LIMIT = 35 -endif -ifeq ($(TRANSLATION), de_DE) -RELEASE_NEEDS_CLEAN_BUILD = 1 -CFLAGS_INLINE_LIMIT = 35 -SUPEROPT_VM = 0 -endif diff --git a/ports/atmel-samd/boards/CP_Sapling_m0/pins.c b/ports/atmel-samd/boards/CP_Sapling_m0/pins.c deleted file mode 100644 index d527aaddc..000000000 --- a/ports/atmel-samd/boards/CP_Sapling_m0/pins.c +++ /dev/null @@ -1,38 +0,0 @@ -#include "shared-bindings/board/__init__.h" - -STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, - - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA00) }, - { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA00) }, - - { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA01) }, - { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA01) }, - - { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA09) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, - - { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA22) }, - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA22) }, - { MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PA22) }, - - { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA19) }, - { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA19) }, - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA19) }, - - { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA17) }, - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA17) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA17) }, - - { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA18) }, - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA18) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA18) }, - - { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, - - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, -}; -MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From c4f4cdd8c15ef54ed05533b3f4c9d28bf9f9c46f Mon Sep 17 00:00:00 2001 From: Seth Kerr Date: Fri, 20 Nov 2020 15:31:49 -0500 Subject: readding cp_sapling directory --- ports/atmel-samd/boards/cp_sapling_m0/board.c | 40 +++++++++++++++ .../boards/cp_sapling_m0/mpconfigboard.h | 57 ++++++++++++++++++++++ .../boards/cp_sapling_m0/mpconfigboard.mk | 24 +++++++++ ports/atmel-samd/boards/cp_sapling_m0/pins.c | 38 +++++++++++++++ 4 files changed, 159 insertions(+) create mode 100644 ports/atmel-samd/boards/cp_sapling_m0/board.c create mode 100644 ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/cp_sapling_m0/pins.c (limited to 'ports') diff --git a/ports/atmel-samd/boards/cp_sapling_m0/board.c b/ports/atmel-samd/boards/cp_sapling_m0/board.c new file mode 100644 index 000000000..b745bd906 --- /dev/null +++ b/ports/atmel-samd/boards/cp_sapling_m0/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "common-hal/microcontroller/Pin.h" +#include "supervisor/shared/board.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.h b/ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.h new file mode 100644 index 000000000..c67f022eb --- /dev/null +++ b/ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.h @@ -0,0 +1,57 @@ +#define MICROPY_HW_BOARD_NAME "CP Sapling M0" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_NEOPIXEL (&pin_PA15) + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define IGNORE_PIN_PA02 1 +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA04 1 +#define IGNORE_PIN_PA05 1 +#define IGNORE_PIN_PA06 1 +#define IGNORE_PIN_PA07 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +#define DEFAULT_SPI_BUS_SS (&pin_PA22) +#define DEFAULT_SPI_BUS_SCK (&pin_PA19) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA18) +#define DEFAULT_SPI_BUS_MISO (&pin_PA17) diff --git a/ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.mk b/ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.mk new file mode 100644 index 000000000..861a0a5f7 --- /dev/null +++ b/ports/atmel-samd/boards/cp_sapling_m0/mpconfigboard.mk @@ -0,0 +1,24 @@ +USB_VID = 0x1209 +USB_PID = 0x4DDD +USB_PRODUCT = "CP Sapling" +USB_MANUFACTURER = "Oak Development Technologies" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_FULL_BUILD = 0 + +SUPEROPT_GC = 0 + +CFLAGS_BOARD = --param max-inline-insns-auto=15 +ifeq ($(TRANSLATION), zh_Latn_pinyin) +RELEASE_NEEDS_CLEAN_BUILD = 1 +CFLAGS_INLINE_LIMIT = 35 +endif +ifeq ($(TRANSLATION), de_DE) +RELEASE_NEEDS_CLEAN_BUILD = 1 +CFLAGS_INLINE_LIMIT = 35 +SUPEROPT_VM = 0 +endif diff --git a/ports/atmel-samd/boards/cp_sapling_m0/pins.c b/ports/atmel-samd/boards/cp_sapling_m0/pins.c new file mode 100644 index 000000000..ccffe2b3a --- /dev/null +++ b/ports/atmel-samd/boards/cp_sapling_m0/pins.c @@ -0,0 +1,38 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA00) }, + + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA01) }, + + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PA22) }, + + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA19) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA18) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From 1c92b1bf61cb0625a6ff7114623cd1cfdc6d5d75 Mon Sep 17 00:00:00 2001 From: Seth Kerr Date: Fri, 20 Nov 2020 15:35:52 -0500 Subject: forgot to run pre-commit local --- ports/atmel-samd/boards/cp_sapling_m0/board.c | 2 +- ports/atmel-samd/boards/cp_sapling_m0/pins.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/cp_sapling_m0/board.c b/ports/atmel-samd/boards/cp_sapling_m0/board.c index b745bd906..ce5636676 100644 --- a/ports/atmel-samd/boards/cp_sapling_m0/board.c +++ b/ports/atmel-samd/boards/cp_sapling_m0/board.c @@ -29,7 +29,7 @@ #include "supervisor/shared/board.h" #include "hal/include/hal_gpio.h" -void board_init(void) { +void board_init(void) { } bool board_requests_safe_mode(void) { diff --git a/ports/atmel-samd/boards/cp_sapling_m0/pins.c b/ports/atmel-samd/boards/cp_sapling_m0/pins.c index ccffe2b3a..d527aaddc 100644 --- a/ports/atmel-samd/boards/cp_sapling_m0/pins.c +++ b/ports/atmel-samd/boards/cp_sapling_m0/pins.c @@ -7,7 +7,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA00) }, { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA00) }, - + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA01) }, { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA01) }, @@ -31,7 +31,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA18) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, - + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, }; -- cgit v1.2.3 From 0b858440b0d64ede9e340de4862684c8be2b5b2b Mon Sep 17 00:00:00 2001 From: jgillick Date: Sun, 22 Nov 2020 01:15:05 -0800 Subject: Fix formatting. --- ports/stm/common-hal/microcontroller/Pin.c | 174 +++++++++++++---------------- 1 file changed, 77 insertions(+), 97 deletions(-) (limited to 'ports') diff --git a/ports/stm/common-hal/microcontroller/Pin.c b/ports/stm/common-hal/microcontroller/Pin.c index 547ac87ae..4b68d205b 100644 --- a/ports/stm/common-hal/microcontroller/Pin.c +++ b/ports/stm/common-hal/microcontroller/Pin.c @@ -41,170 +41,150 @@ bool apa102_mosi_in_use; #endif #if defined(TFBGA216) -GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, GPIOI, GPIOJ, GPIOK}; + GPIO_TypeDef * ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, GPIOI, GPIOJ, GPIOK}; #elif defined(LQFP144) -GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG}; + GPIO_TypeDef * ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG}; #elif defined(LQFP100_f4) || (LQFP100_x7) -GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE}; + GPIO_TypeDef * ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE}; #elif defined(LQFP64) -GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC, GPIOD}; + GPIO_TypeDef * ports[] = {GPIOA, GPIOB, GPIOC, GPIOD}; #elif defined(UFQFPN48) -GPIO_TypeDef *ports[] = {GPIOA, GPIOB, GPIOC}; + GPIO_TypeDef * ports[] = {GPIOA, GPIOB, GPIOC}; #endif + #define GPIO_PORT_COUNT (MP_ARRAY_SIZE(ports)) STATIC uint16_t claimed_pins[GPIO_PORT_COUNT]; STATIC uint16_t __ALIGNED(4) never_reset_pins[GPIO_PORT_COUNT]; -void reset_all_pins(void) -{ +void reset_all_pins(void) { // Reset claimed pins - for (uint8_t i = 0; i < GPIO_PORT_COUNT; i++) - { + for (uint8_t i = 0; i < GPIO_PORT_COUNT; i++) { claimed_pins[i] = never_reset_pins[i]; } - for (uint8_t i = 0; i < GPIO_PORT_COUNT; i++) - { + for (uint8_t i = 0; i < GPIO_PORT_COUNT; i++) { HAL_GPIO_DeInit(ports[i], ~never_reset_pins[i]); } -#ifdef MICROPY_HW_NEOPIXEL + #ifdef MICROPY_HW_NEOPIXEL neopixel_in_use = false; -#endif -#ifdef MICROPY_HW_APA102_MOSI - apa102_sck_in_use = false; - apa102_mosi_in_use = false; -#endif + #endif + #ifdef MICROPY_HW_APA102_MOSI + apa102_sck_in_use = false; + apa102_mosi_in_use = false; + #endif } // Mark pin as free and return it to a quiescent state. -void reset_pin_number(uint8_t pin_port, uint8_t pin_number) -{ - if (pin_number == NO_PIN) - { +void reset_pin_number(uint8_t pin_port, uint8_t pin_number) { + if ( pin_number == NO_PIN ) { return; } - if (pin_port == 0x0F) - { + if (pin_port == 0x0F) { return; } // Clear claimed bit & reset - claimed_pins[pin_port] &= ~(1 << pin_number); - never_reset_pins[pin_port] &= ~(1 << pin_number); - HAL_GPIO_DeInit(ports[pin_port], 1 << pin_number); + claimed_pins[pin_port] &= ~(1<port && pin_number == MICROPY_HW_NEOPIXEL->number) - { + #ifdef MICROPY_HW_NEOPIXEL + if (pin_port == MICROPY_HW_NEOPIXEL->port && pin_number == MICROPY_HW_NEOPIXEL->number) { neopixel_in_use = false; rgb_led_status_init(); return; } -#endif -#ifdef MICROPY_HW_APA102_MOSI - if ((pin_port == MICROPY_HW_APA102_MOSI->port && pin_number == MICROPY_HW_APA102_MOSI->number) || (pin_port == MICROPY_HW_APA102_SCK->port && pin_number == MICROPY_HW_APA102_MOSI->number)) - { - apa102_mosi_in_use = false; - apa102_sck_in_use = false; - rgb_led_status_init(); - return; - } -#endif + #endif + #ifdef MICROPY_HW_APA102_MOSI + if ((pin_port == MICROPY_HW_APA102_MOSI->port && pin_number == MICROPY_HW_APA102_MOSI->number) || (pin_port == MICROPY_HW_APA102_SCK->port && pin_number == MICROPY_HW_APA102_MOSI->number)) + { + apa102_mosi_in_use = false; + apa102_sck_in_use = false; + rgb_led_status_init(); + return; + } + #endif } -void never_reset_pin_number(uint8_t pin_port, uint8_t pin_number) -{ - if (pin_number == NO_PIN) - { +void never_reset_pin_number(uint8_t pin_port, uint8_t pin_number) { + if ( pin_number == NO_PIN ) { return; } - never_reset_pins[pin_port] |= 1 << pin_number; + never_reset_pins[pin_port] |= 1<port, pin->number); } -void common_hal_reset_pin(const mcu_pin_obj_t *pin) -{ +void common_hal_reset_pin(const mcu_pin_obj_t* pin) { reset_pin_number(pin->port, pin->number); } -void claim_pin(uint8_t pin_port, uint8_t pin_number) -{ +void claim_pin(uint8_t pin_port, uint8_t pin_number) { // Set bit in claimed_pins bitmask. - claimed_pins[pin_port] |= 1 << pin_number; + claimed_pins[pin_port] |= 1<port, pin->number); } -GPIO_TypeDef *pin_port(uint8_t pin_port) -{ +GPIO_TypeDef * pin_port(uint8_t pin_port) { return ports[pin_port]; } -uint16_t pin_mask(uint8_t pin_number) -{ - return 1 << pin_number; +uint16_t pin_mask(uint8_t pin_number) { + return 1<port * 16 + pin->number; } -void common_hal_mcu_pin_claim(const mcu_pin_obj_t *pin) -{ +void common_hal_mcu_pin_claim(const mcu_pin_obj_t* pin) { claim_pin(pin->port, pin->number); -#ifdef MICROPY_HW_NEOPIXEL - if (pin == MICROPY_HW_NEOPIXEL) - { + #ifdef MICROPY_HW_NEOPIXEL + if (pin == MICROPY_HW_NEOPIXEL) { neopixel_in_use = true; } -#endif -#ifdef MICROPY_HW_APA102_MOSI - if (pin == MICROPY_HW_APA102_MOSI) - { - apa102_mosi_in_use = true; - } - if (pin == MICROPY_HW_APA102_SCK) - { - apa102_sck_in_use = true; - } -#endif + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin == MICROPY_HW_APA102_MOSI) + { + apa102_mosi_in_use = true; + } + if (pin == MICROPY_HW_APA102_SCK) + { + apa102_sck_in_use = true; + } + #endif } -void common_hal_mcu_pin_reset_number(uint8_t pin_no) -{ +void common_hal_mcu_pin_reset_number(uint8_t pin_no) { reset_pin_number(pin_no / 16, pin_no % 16); -} +} \ No newline at end of file -- cgit v1.2.3 From 381889f6bc025617fe85b248fae0f6b05ed50c01 Mon Sep 17 00:00:00 2001 From: jgillick Date: Sun, 22 Nov 2020 01:19:28 -0800 Subject: Cleanup --- ports/stm/boards/thunderpack_v12/mpconfigboard.h | 8 +- .../boards/thunderpack_v12/stm32f4xx_hal_conf.h | 440 --------------------- ports/stm/common-hal/microcontroller/Pin.c | 52 +-- 3 files changed, 28 insertions(+), 472 deletions(-) delete mode 100644 ports/stm/boards/thunderpack_v12/stm32f4xx_hal_conf.h (limited to 'ports') diff --git a/ports/stm/boards/thunderpack_v12/mpconfigboard.h b/ports/stm/boards/thunderpack_v12/mpconfigboard.h index 4c71b8aeb..426e0678d 100644 --- a/ports/stm/boards/thunderpack_v12/mpconfigboard.h +++ b/ports/stm/boards/thunderpack_v12/mpconfigboard.h @@ -30,10 +30,7 @@ #define CIRCUITPY_INTERNAL_NVM_SIZE (0x4000) #define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x08010000) #define CIRCUITPY_INTERNAL_NVM_SECTOR FLASH_SECTOR_4 - -// Putting the entire flash sector in the NVM byte array buffer -// would take up too much RAM. This limits how much of the sector we use. -#define NVM_BYTEARRAY_BUFFER_SIZE 512 +#define NVM_BYTEARRAY_BUFFER_SIZE 512 // Flash config #define FLASH_SIZE (0x80000) @@ -47,7 +44,6 @@ #define SPI_FLASH_CS_PIN (&pin_PB12) // Status LEDs -#define MICROPY_HW_LED_STATUS (&pin_PA02) #define MICROPY_HW_APA102_MOSI (&pin_PB08) #define MICROPY_HW_APA102_SCK (&pin_PB00) @@ -58,4 +54,4 @@ // General config #define BOARD_OSC_DIV (24) #define BOARD_OVERWRITE_SWD (1) -#define BOARD_NO_VBUS_SENSE (1) \ No newline at end of file +#define BOARD_NO_VBUS_SENSE (1) diff --git a/ports/stm/boards/thunderpack_v12/stm32f4xx_hal_conf.h b/ports/stm/boards/thunderpack_v12/stm32f4xx_hal_conf.h deleted file mode 100644 index 5cb563422..000000000 --- a/ports/stm/boards/thunderpack_v12/stm32f4xx_hal_conf.h +++ /dev/null @@ -1,440 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f4xx_hal_conf_template.h - * @author MCD Application Team - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32f4xx_hal_conf.h. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2017 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F4xx_HAL_CONF_H -#define __STM32F4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED - -#define HAL_ADC_MODULE_ENABLED -/* #define HAL_CRYP_MODULE_ENABLED */ -/* #define HAL_CAN_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ -/* #define HAL_CRYP_MODULE_ENABLED */ -#define HAL_DAC_MODULE_ENABLED -/* #define HAL_DCMI_MODULE_ENABLED */ -/* #define HAL_DMA2D_MODULE_ENABLED */ -/* #define HAL_ETH_MODULE_ENABLED */ -/* #define HAL_NAND_MODULE_ENABLED */ -/* #define HAL_NOR_MODULE_ENABLED */ -/* #define HAL_PCCARD_MODULE_ENABLED */ -/* #define HAL_SRAM_MODULE_ENABLED */ -/* #define HAL_SDRAM_MODULE_ENABLED */ -/* #define HAL_HASH_MODULE_ENABLED */ -#define HAL_I2C_MODULE_ENABLED -#define HAL_I2S_MODULE_ENABLED -/* #define HAL_IWDG_MODULE_ENABLED */ -/* #define HAL_LTDC_MODULE_ENABLED */ -/* #define HAL_RNG_MODULE_ENABLED */ -/* #define HAL_RTC_MODULE_ENABLED */ -/* #define HAL_SAI_MODULE_ENABLED */ -/* #define HAL_SD_MODULE_ENABLED */ -/* #define HAL_MMC_MODULE_ENABLED */ -#define HAL_SPI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -#define HAL_USART_MODULE_ENABLED -/* #define HAL_IRDA_MODULE_ENABLED */ -/* #define HAL_SMARTCARD_MODULE_ENABLED */ -/* #define HAL_WWDG_MODULE_ENABLED */ -/* #define HAL_PCD_MODULE_ENABLED */ -/* #define HAL_HCD_MODULE_ENABLED */ -/* #define HAL_DSI_MODULE_ENABLED */ -/* #define HAL_QSPI_MODULE_ENABLED */ -/* #define HAL_QSPI_MODULE_ENABLED */ -/* #define HAL_CEC_MODULE_ENABLED */ -/* #define HAL_FMPI2C_MODULE_ENABLED */ -/* #define HAL_SPDIFRX_MODULE_ENABLED */ -/* #define HAL_DFSDM_MODULE_ENABLED */ -/* #define HAL_LPTIM_MODULE_ENABLED */ -/* #define HAL_EXTI_MODULE_ENABLED */ -#define HAL_GPIO_MODULE_ENABLED -#define HAL_EXTI_MODULE_ENABLED -#define HAL_DMA_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -#define HAL_CORTEX_MODULE_ENABLED - -/* ########################## HSE/HSI Values adaptation ##################### */ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)24000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)40000) -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature. */ -/** - * @brief External Low Speed oscillator (LSE) value. - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ -#endif /* LSE_STARTUP_TIMEOUT */ - - -/** - * @brief External clock source for I2S peripheral - * This value is used by the I2S HAL module to compute the I2S clock source - * frequency, this source is inserted directly through I2S_CKIN pad. - */ -#if !defined (EXTERNAL_CLOCK_VALUE) - #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */ -#define USE_RTOS 0U -#define PREFETCH_ENABLE 1U -#define INSTRUCTION_CACHE_ENABLE 1U -#define DATA_CACHE_ENABLE 1U - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1U */ - -/* ################## Ethernet peripheral configuration ##################### */ - -/* Section 1 : Ethernet peripheral configuration */ - -/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ -#define MAC_ADDR0 2U -#define MAC_ADDR1 0U -#define MAC_ADDR2 0U -#define MAC_ADDR3 0U -#define MAC_ADDR4 0U -#define MAC_ADDR5 0U - -/* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ - -/* Section 2: PHY configuration section */ - -/* DP83848_PHY_ADDRESS Address*/ -#define DP83848_PHY_ADDRESS 0x01U -/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ -#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) -/* PHY Configuration delay */ -#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) - -#define PHY_READ_TO ((uint32_t)0x0000FFFFU) -#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) - -/* Section 3: Common PHY Registers */ - -#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ - -#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ -#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ - -#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ -#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ - -/* Section 4: Extended PHY Registers */ -#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ - -#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ - -/* ################## SPI peripheral configuration ########################## */ - -/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver -* Activated: CRC code is present inside driver -* Deactivated: CRC code cleaned from driver -*/ - -#define USE_SPI_CRC 0U - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32f4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_EXTI_MODULE_ENABLED - #include "stm32f4xx_hal_exti.h" -#endif /* HAL_EXTI_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32f4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32f4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32f4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32f4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32f4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32f4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32f4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DMA2D_MODULE_ENABLED - #include "stm32f4xx_hal_dma2d.h" -#endif /* HAL_DMA2D_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32f4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_DCMI_MODULE_ENABLED - #include "stm32f4xx_hal_dcmi.h" -#endif /* HAL_DCMI_MODULE_ENABLED */ - -#ifdef HAL_ETH_MODULE_ENABLED - #include "stm32f4xx_hal_eth.h" -#endif /* HAL_ETH_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32f4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32f4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32f4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_PCCARD_MODULE_ENABLED - #include "stm32f4xx_hal_pccard.h" -#endif /* HAL_PCCARD_MODULE_ENABLED */ - -#ifdef HAL_SDRAM_MODULE_ENABLED - #include "stm32f4xx_hal_sdram.h" -#endif /* HAL_SDRAM_MODULE_ENABLED */ - -#ifdef HAL_HASH_MODULE_ENABLED - #include "stm32f4xx_hal_hash.h" -#endif /* HAL_HASH_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32f4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_I2S_MODULE_ENABLED - #include "stm32f4xx_hal_i2s.h" -#endif /* HAL_I2S_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32f4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LTDC_MODULE_ENABLED - #include "stm32f4xx_hal_ltdc.h" -#endif /* HAL_LTDC_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32f4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32f4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32f4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32f4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32f4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_MMC_MODULE_ENABLED - #include "stm32f4xx_hal_mmc.h" -#endif /* HAL_MMC_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32f4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32f4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32f4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32f4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32f4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32f4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32f4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32f4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32f4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -#ifdef HAL_DSI_MODULE_ENABLED - #include "stm32f4xx_hal_dsi.h" -#endif /* HAL_DSI_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32f4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_CEC_MODULE_ENABLED - #include "stm32f4xx_hal_cec.h" -#endif /* HAL_CEC_MODULE_ENABLED */ - -#ifdef HAL_FMPI2C_MODULE_ENABLED - #include "stm32f4xx_hal_fmpi2c.h" -#endif /* HAL_FMPI2C_MODULE_ENABLED */ - -#ifdef HAL_SPDIFRX_MODULE_ENABLED - #include "stm32f4xx_hal_spdifrx.h" -#endif /* HAL_SPDIFRX_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32f4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED - #include "stm32f4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ports/stm/common-hal/microcontroller/Pin.c b/ports/stm/common-hal/microcontroller/Pin.c index 4b68d205b..7d259e052 100644 --- a/ports/stm/common-hal/microcontroller/Pin.c +++ b/ports/stm/common-hal/microcontroller/Pin.c @@ -71,8 +71,8 @@ void reset_all_pins(void) { neopixel_in_use = false; #endif #ifdef MICROPY_HW_APA102_MOSI - apa102_sck_in_use = false; - apa102_mosi_in_use = false; + apa102_sck_in_use = false; + apa102_mosi_in_use = false; #endif } @@ -98,13 +98,13 @@ void reset_pin_number(uint8_t pin_port, uint8_t pin_number) { } #endif #ifdef MICROPY_HW_APA102_MOSI - if ((pin_port == MICROPY_HW_APA102_MOSI->port && pin_number == MICROPY_HW_APA102_MOSI->number) || (pin_port == MICROPY_HW_APA102_SCK->port && pin_number == MICROPY_HW_APA102_MOSI->number)) - { - apa102_mosi_in_use = false; - apa102_sck_in_use = false; - rgb_led_status_init(); - return; - } + if ((pin_port == MICROPY_HW_APA102_MOSI->port && pin_number == MICROPY_HW_APA102_MOSI->number) || (pin_port == MICROPY_HW_APA102_SCK->port && pin_number == MICROPY_HW_APA102_MOSI->number)) + { + apa102_mosi_in_use = false; + apa102_sck_in_use = false; + rgb_led_status_init(); + return; + } #endif } @@ -141,14 +141,14 @@ bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) { } #endif #ifdef MICROPY_HW_APA102_MOSI - if (pin == MICROPY_HW_APA102_MOSI) - { - return !apa102_mosi_in_use; - } - if (pin == MICROPY_HW_APA102_SCK) - { - return !apa102_sck_in_use; - } + if (pin == MICROPY_HW_APA102_MOSI) + { + return !apa102_mosi_in_use; + } + if (pin == MICROPY_HW_APA102_SCK) + { + return !apa102_sck_in_use; + } #endif return pin_number_is_free(pin->port, pin->number); @@ -174,17 +174,17 @@ void common_hal_mcu_pin_claim(const mcu_pin_obj_t* pin) { } #endif #ifdef MICROPY_HW_APA102_MOSI - if (pin == MICROPY_HW_APA102_MOSI) - { - apa102_mosi_in_use = true; - } - if (pin == MICROPY_HW_APA102_SCK) - { - apa102_sck_in_use = true; - } + if (pin == MICROPY_HW_APA102_MOSI) + { + apa102_mosi_in_use = true; + } + if (pin == MICROPY_HW_APA102_SCK) + { + apa102_sck_in_use = true; + } #endif } void common_hal_mcu_pin_reset_number(uint8_t pin_no) { reset_pin_number(pin_no / 16, pin_no % 16); -} \ No newline at end of file +} -- cgit v1.2.3 From 56634eb00e524a6f51a44f4041cd73a04528fe47 Mon Sep 17 00:00:00 2001 From: jgillick Date: Sun, 22 Nov 2020 01:31:41 -0800 Subject: Rename thunderpack to v11 --- .github/workflows/build.yml | 3 +- ports/stm/boards/thunderpack/board.c | 38 ---------------- ports/stm/boards/thunderpack/mpconfigboard.h | 53 ----------------------- ports/stm/boards/thunderpack/mpconfigboard.mk | 17 -------- ports/stm/boards/thunderpack/pins.c | 34 --------------- ports/stm/boards/thunderpack_v11/board.c | 38 ++++++++++++++++ ports/stm/boards/thunderpack_v11/mpconfigboard.h | 53 +++++++++++++++++++++++ ports/stm/boards/thunderpack_v11/mpconfigboard.mk | 17 ++++++++ ports/stm/boards/thunderpack_v11/pins.c | 34 +++++++++++++++ 9 files changed, 144 insertions(+), 143 deletions(-) delete mode 100644 ports/stm/boards/thunderpack/board.c delete mode 100644 ports/stm/boards/thunderpack/mpconfigboard.h delete mode 100644 ports/stm/boards/thunderpack/mpconfigboard.mk delete mode 100644 ports/stm/boards/thunderpack/pins.c create mode 100644 ports/stm/boards/thunderpack_v11/board.c create mode 100644 ports/stm/boards/thunderpack_v11/mpconfigboard.h create mode 100644 ports/stm/boards/thunderpack_v11/mpconfigboard.mk create mode 100644 ports/stm/boards/thunderpack_v11/pins.c (limited to 'ports') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index f3e728a05..c5762c4ab 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -317,7 +317,8 @@ jobs: - "teensy40" - "teensy41" - "teknikio_bluebird" - - "thunderpack" + - "thunderpack_v11" + - "thunderpack_v12" - "tinkeringtech_scoutmakes_azul" - "trellis_m4_express" - "trinket_m0" diff --git a/ports/stm/boards/thunderpack/board.c b/ports/stm/boards/thunderpack/board.c deleted file mode 100644 index 4421970ee..000000000 --- a/ports/stm/boards/thunderpack/board.c +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "boards/board.h" - -void board_init(void) { -} - -bool board_requests_safe_mode(void) { - return false; -} - -void reset_board(void) { - -} diff --git a/ports/stm/boards/thunderpack/mpconfigboard.h b/ports/stm/boards/thunderpack/mpconfigboard.h deleted file mode 100644 index c2649e255..000000000 --- a/ports/stm/boards/thunderpack/mpconfigboard.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2019 Lucian Copeland for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#define MICROPY_HW_BOARD_NAME "THUNDERPACK" -#define MICROPY_HW_MCU_NAME "STM32F411CE" - -// Non-volatile memory config -#define CIRCUITPY_INTERNAL_NVM_SIZE (0x4000) -#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x08010000) -#define CIRCUITPY_INTERNAL_NVM_SECTOR FLASH_SECTOR_4 - -// Putting the entire flash sector in the NVM byte array buffer -// would take up too much RAM. This limits how much of the sector we use. -#define NVM_BYTEARRAY_BUFFER_SIZE 512 - -// Flash config -#define FLASH_SIZE (0x80000) -#define FLASH_PAGE_SIZE (0x4000) -#define BOARD_FLASH_SIZE (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE- 0x2000 - 0xC000) - -#define HSE_VALUE ((uint32_t)24000000U) -#define BOARD_OVERWRITE_SWD (1) -#define BOARD_NO_VBUS_SENSE (1) - -#define BOARD_HAS_LOW_SPEED_CRYSTAL (0) - -// Status LEDs -#define MICROPY_HW_LED_STATUS (&pin_PA02) - -#define DEFAULT_I2C_BUS_SCL (&pin_PB06) -#define DEFAULT_I2C_BUS_SDA (&pin_PB07) diff --git a/ports/stm/boards/thunderpack/mpconfigboard.mk b/ports/stm/boards/thunderpack/mpconfigboard.mk deleted file mode 100644 index d303582e0..000000000 --- a/ports/stm/boards/thunderpack/mpconfigboard.mk +++ /dev/null @@ -1,17 +0,0 @@ -USB_VID = 0x239A -USB_PID = 0x8069 -USB_PRODUCT = "Thunderpack STM32F411" -USB_MANUFACTURER = "Jeremy Gillick" - -INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE - -CIRCUITPY_NVM = 1 -CIRCUITPY_BLEIO_HCI = 0 - -MCU_SERIES = F4 -MCU_VARIANT = STM32F411xE -MCU_PACKAGE = UFQFPN48 - -LD_COMMON = boards/common_nvm.ld -LD_FILE = boards/STM32F411_nvm.ld diff --git a/ports/stm/boards/thunderpack/pins.c b/ports/stm/boards/thunderpack/pins.c deleted file mode 100644 index eed54eb3c..000000000 --- a/ports/stm/boards/thunderpack/pins.c +++ /dev/null @@ -1,34 +0,0 @@ -#include "shared-bindings/board/__init__.h" - -STATIC const mp_rom_map_elem_t board_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR_PA0), MP_ROM_PTR(&pin_PA00) }, - { MP_ROM_QSTR(MP_QSTR_PA1), MP_ROM_PTR(&pin_PA01) }, - { MP_ROM_QSTR(MP_QSTR_PA2), MP_ROM_PTR(&pin_PA02) }, - { MP_ROM_QSTR(MP_QSTR_PA3), MP_ROM_PTR(&pin_PA03) }, - { MP_ROM_QSTR(MP_QSTR_PA4), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_PA5), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_PA6), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_PA7), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_PA8), MP_ROM_PTR(&pin_PA08) }, - { MP_ROM_QSTR(MP_QSTR_PA9), MP_ROM_PTR(&pin_PA09) }, - { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, - { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, - { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, - - { MP_ROM_QSTR(MP_QSTR_PB5), MP_ROM_PTR(&pin_PB05) }, - { MP_ROM_QSTR(MP_QSTR_PB6), MP_ROM_PTR(&pin_PB06) }, - { MP_ROM_QSTR(MP_QSTR_PB7), MP_ROM_PTR(&pin_PB07) }, - - { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PA00) }, - { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PA01) }, - { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PA02) }, - { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_PA03) }, - - { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_PB04) }, - - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, - - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, -}; -MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/stm/boards/thunderpack_v11/board.c b/ports/stm/boards/thunderpack_v11/board.c new file mode 100644 index 000000000..4421970ee --- /dev/null +++ b/ports/stm/boards/thunderpack_v11/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/stm/boards/thunderpack_v11/mpconfigboard.h b/ports/stm/boards/thunderpack_v11/mpconfigboard.h new file mode 100644 index 000000000..c2649e255 --- /dev/null +++ b/ports/stm/boards/thunderpack_v11/mpconfigboard.h @@ -0,0 +1,53 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#define MICROPY_HW_BOARD_NAME "THUNDERPACK" +#define MICROPY_HW_MCU_NAME "STM32F411CE" + +// Non-volatile memory config +#define CIRCUITPY_INTERNAL_NVM_SIZE (0x4000) +#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x08010000) +#define CIRCUITPY_INTERNAL_NVM_SECTOR FLASH_SECTOR_4 + +// Putting the entire flash sector in the NVM byte array buffer +// would take up too much RAM. This limits how much of the sector we use. +#define NVM_BYTEARRAY_BUFFER_SIZE 512 + +// Flash config +#define FLASH_SIZE (0x80000) +#define FLASH_PAGE_SIZE (0x4000) +#define BOARD_FLASH_SIZE (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE- 0x2000 - 0xC000) + +#define HSE_VALUE ((uint32_t)24000000U) +#define BOARD_OVERWRITE_SWD (1) +#define BOARD_NO_VBUS_SENSE (1) + +#define BOARD_HAS_LOW_SPEED_CRYSTAL (0) + +// Status LEDs +#define MICROPY_HW_LED_STATUS (&pin_PA02) + +#define DEFAULT_I2C_BUS_SCL (&pin_PB06) +#define DEFAULT_I2C_BUS_SDA (&pin_PB07) diff --git a/ports/stm/boards/thunderpack_v11/mpconfigboard.mk b/ports/stm/boards/thunderpack_v11/mpconfigboard.mk new file mode 100644 index 000000000..d303582e0 --- /dev/null +++ b/ports/stm/boards/thunderpack_v11/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x239A +USB_PID = 0x8069 +USB_PRODUCT = "Thunderpack STM32F411" +USB_MANUFACTURER = "Jeremy Gillick" + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE + +CIRCUITPY_NVM = 1 +CIRCUITPY_BLEIO_HCI = 0 + +MCU_SERIES = F4 +MCU_VARIANT = STM32F411xE +MCU_PACKAGE = UFQFPN48 + +LD_COMMON = boards/common_nvm.ld +LD_FILE = boards/STM32F411_nvm.ld diff --git a/ports/stm/boards/thunderpack_v11/pins.c b/ports/stm/boards/thunderpack_v11/pins.c new file mode 100644 index 000000000..eed54eb3c --- /dev/null +++ b/ports/stm/boards/thunderpack_v11/pins.c @@ -0,0 +1,34 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_PA0), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_PA1), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_PA2), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_PA3), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_PA4), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_PA5), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_PA6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_PA7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_PA8), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_PA9), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_PA14) }, + + { MP_ROM_QSTR(MP_QSTR_PB5), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_PB6), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_PB7), MP_ROM_PTR(&pin_PB07) }, + + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_PA03) }, + + { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_PB04) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); -- cgit v1.2.3 From fe6e50b770f7dffda1d49c503362c59e674224c2 Mon Sep 17 00:00:00 2001 From: jgillick Date: Sun, 22 Nov 2020 01:49:23 -0800 Subject: Update USB_PID --- ports/stm/boards/thunderpack_v12/mpconfigboard.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/stm/boards/thunderpack_v12/mpconfigboard.mk b/ports/stm/boards/thunderpack_v12/mpconfigboard.mk index d11cfb750..7bfe27367 100644 --- a/ports/stm/boards/thunderpack_v12/mpconfigboard.mk +++ b/ports/stm/boards/thunderpack_v12/mpconfigboard.mk @@ -1,5 +1,5 @@ USB_VID = 0x239A -USB_PID = 0x806A +USB_PID = 0x8071 USB_PRODUCT = "Thunderpack STM32F411" USB_MANUFACTURER = "Jeremy Gillick" USB_DEVICES = "CDC,MSC" -- cgit v1.2.3 From f3b5ca5f01058cb1d50be09838bc55b22d3aae69 Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Sun, 22 Nov 2020 19:20:21 +0530 Subject: replace goto with conditional break --- ports/esp32s2/peripherals/timer.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/peripherals/timer.c b/ports/esp32s2/peripherals/timer.c index 3aee33dc5..0ae140387 100644 --- a/ports/esp32s2/peripherals/timer.c +++ b/ports/esp32s2/peripherals/timer.c @@ -46,6 +46,8 @@ void peripherals_timer_reset(void) { } void peripherals_timer_init(const timer_config_t * config, timer_index_t * timer) { + bool break_loop = false; + // get free timer for (uint8_t i = 0; i < 2; i++) { for (uint8_t j = 0; j < 2; j++) { @@ -53,16 +55,17 @@ void peripherals_timer_init(const timer_config_t * config, timer_index_t * timer timer->idx = (timer_idx_t)j; timer->group = (timer_group_t)i; timer_state[i][j] = TIMER_BUSY; - goto init_timer; + break_loop = true; + break; } else if (i == 1 && j == 1) { timer->idx = TIMER_MAX; timer->group = TIMER_GROUP_MAX; return; } } + if (break_loop) {break;} } -init_timer: // initialize timer module timer_init(timer->group, timer->idx, config); timer_set_counter_value(timer->group, timer->idx, 0); -- cgit v1.2.3 From 661c20dd180343a3a5c7a52e63875888218422ba Mon Sep 17 00:00:00 2001 From: jgillick Date: Sun, 22 Nov 2020 18:25:37 -0800 Subject: Create a new linker script with more space for the firmware. --- ports/stm/boards/STM32F411_nvm_flash.ld | 29 +++++++++++++++++++++++ ports/stm/boards/thunderpack_v12/mpconfigboard.h | 12 ++++++---- ports/stm/boards/thunderpack_v12/mpconfigboard.mk | 2 +- ports/stm/supervisor/internal_flash.h | 4 ++++ 4 files changed, 41 insertions(+), 6 deletions(-) create mode 100644 ports/stm/boards/STM32F411_nvm_flash.ld (limited to 'ports') diff --git a/ports/stm/boards/STM32F411_nvm_flash.ld b/ports/stm/boards/STM32F411_nvm_flash.ld new file mode 100644 index 000000000..ced739765 --- /dev/null +++ b/ports/stm/boards/STM32F411_nvm_flash.ld @@ -0,0 +1,29 @@ +/* + GNU linker script for STM32F411 with nvm and an external flash chip, and reserves + more space for the CircuitPython firmware and less for the filesystem + (since the filesystem will be on the external flash chip). +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 32K /* sectors 1,2 are 16K */ + FLASH_NVM (rwx) : ORIGIN = 0x0800C000, LENGTH = 16K /* sector 3 is 16K */ + FLASH_FIRMWARE (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 24K; +_minimum_heap_size = 16K; + +/* Define the top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); diff --git a/ports/stm/boards/thunderpack_v12/mpconfigboard.h b/ports/stm/boards/thunderpack_v12/mpconfigboard.h index 426e0678d..773ca297e 100644 --- a/ports/stm/boards/thunderpack_v12/mpconfigboard.h +++ b/ports/stm/boards/thunderpack_v12/mpconfigboard.h @@ -28,14 +28,16 @@ // Non-volatile memory config #define CIRCUITPY_INTERNAL_NVM_SIZE (0x4000) -#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x08010000) -#define CIRCUITPY_INTERNAL_NVM_SECTOR FLASH_SECTOR_4 +#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x0800C000) +#define CIRCUITPY_INTERNAL_NVM_SECTOR FLASH_SECTOR_3 #define NVM_BYTEARRAY_BUFFER_SIZE 512 // Flash config -#define FLASH_SIZE (0x80000) -#define FLASH_PAGE_SIZE (0x4000) -#define BOARD_FLASH_SIZE (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE- 0x2000 - 0xC000) +#define FLASH_SIZE (0x80000) +#define FLASH_PAGE_SIZE (0x4000) +#define BOARD_FLASH_SIZE (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE- 0x2000 - 0xC000) +#define INTERNAL_FLASH_FILESYSTEM_SIZE 0x8000 +#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000 // On-board flash #define SPI_FLASH_MOSI_PIN (&pin_PB15) diff --git a/ports/stm/boards/thunderpack_v12/mpconfigboard.mk b/ports/stm/boards/thunderpack_v12/mpconfigboard.mk index 7bfe27367..744565e69 100644 --- a/ports/stm/boards/thunderpack_v12/mpconfigboard.mk +++ b/ports/stm/boards/thunderpack_v12/mpconfigboard.mk @@ -17,4 +17,4 @@ MCU_VARIANT = STM32F411xE MCU_PACKAGE = UFQFPN48 LD_COMMON = boards/common_nvm.ld -LD_FILE = boards/STM32F411_nvm.ld +LD_FILE = boards/STM32F411_nvm_flash.ld diff --git a/ports/stm/supervisor/internal_flash.h b/ports/stm/supervisor/internal_flash.h index ad5cba62d..5746deac8 100644 --- a/ports/stm/supervisor/internal_flash.h +++ b/ports/stm/supervisor/internal_flash.h @@ -41,9 +41,13 @@ #ifdef STM32F411xE #define STM32_FLASH_SIZE 0x80000 //512KiB +#ifndef INTERNAL_FLASH_FILESYSTEM_SIZE #define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB +#endif +#ifndef INTERNAL_FLASH_FILESYSTEM_START_ADDR #define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000 #endif +#endif #ifdef STM32F412Zx #define STM32_FLASH_SIZE 0x100000 //1MB -- cgit v1.2.3 From 4c5e7520f5950f831ea18866f49645c507d0f811 Mon Sep 17 00:00:00 2001 From: jgillick Date: Mon, 23 Nov 2020 00:25:41 -0800 Subject: Fix NVM by clearing FLASH_FLAG_PGPERR --- ports/stm/boards/thunderpack_v11/mpconfigboard.h | 2 +- ports/stm/boards/thunderpack_v12/mpconfigboard.h | 26 +++++++++++------------ ports/stm/boards/thunderpack_v12/mpconfigboard.mk | 1 + ports/stm/common-hal/microcontroller/Pin.c | 15 +++++++------ ports/stm/common-hal/nvm/ByteArray.c | 2 +- ports/stm/supervisor/internal_flash.h | 4 ++-- 6 files changed, 26 insertions(+), 24 deletions(-) (limited to 'ports') diff --git a/ports/stm/boards/thunderpack_v11/mpconfigboard.h b/ports/stm/boards/thunderpack_v11/mpconfigboard.h index c2649e255..7d4a8dff3 100644 --- a/ports/stm/boards/thunderpack_v11/mpconfigboard.h +++ b/ports/stm/boards/thunderpack_v11/mpconfigboard.h @@ -23,7 +23,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#define MICROPY_HW_BOARD_NAME "THUNDERPACK" +#define MICROPY_HW_BOARD_NAME "THUNDERPACK_v11" #define MICROPY_HW_MCU_NAME "STM32F411CE" // Non-volatile memory config diff --git a/ports/stm/boards/thunderpack_v12/mpconfigboard.h b/ports/stm/boards/thunderpack_v12/mpconfigboard.h index 773ca297e..57486da28 100644 --- a/ports/stm/boards/thunderpack_v12/mpconfigboard.h +++ b/ports/stm/boards/thunderpack_v12/mpconfigboard.h @@ -27,17 +27,16 @@ #define MICROPY_HW_MCU_NAME "STM32F411CE" // Non-volatile memory config -#define CIRCUITPY_INTERNAL_NVM_SIZE (0x4000) -#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x0800C000) -#define CIRCUITPY_INTERNAL_NVM_SECTOR FLASH_SECTOR_3 -#define NVM_BYTEARRAY_BUFFER_SIZE 512 +#define CIRCUITPY_INTERNAL_NVM_SIZE (0x4000) +#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x0800C000) +#define CIRCUITPY_INTERNAL_NVM_SECTOR FLASH_SECTOR_3 +#define NVM_BYTEARRAY_BUFFER_SIZE 512 // Flash config -#define FLASH_SIZE (0x80000) -#define FLASH_PAGE_SIZE (0x4000) -#define BOARD_FLASH_SIZE (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE- 0x2000 - 0xC000) +#define FLASH_SIZE (0x80000) +#define FLASH_PAGE_SIZE (0x4000) +#define BOARD_FLASH_SIZE (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE- 0x2000 - 0xC000) #define INTERNAL_FLASH_FILESYSTEM_SIZE 0x8000 -#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000 // On-board flash #define SPI_FLASH_MOSI_PIN (&pin_PB15) @@ -45,15 +44,14 @@ #define SPI_FLASH_SCK_PIN (&pin_PB13) #define SPI_FLASH_CS_PIN (&pin_PB12) +#define HSE_VALUE ((uint32_t)24000000U) +#define BOARD_OVERWRITE_SWD (1) +#define BOARD_NO_VBUS_SENSE (1) +#define BOARD_HAS_LOW_SPEED_CRYSTAL (0) + // Status LEDs #define MICROPY_HW_APA102_MOSI (&pin_PB08) #define MICROPY_HW_APA102_SCK (&pin_PB00) - // I2C #define DEFAULT_I2C_BUS_SCL (&pin_PB06) #define DEFAULT_I2C_BUS_SDA (&pin_PB07) - -// General config -#define BOARD_OSC_DIV (24) -#define BOARD_OVERWRITE_SWD (1) -#define BOARD_NO_VBUS_SENSE (1) diff --git a/ports/stm/boards/thunderpack_v12/mpconfigboard.mk b/ports/stm/boards/thunderpack_v12/mpconfigboard.mk index 744565e69..d0bc22680 100644 --- a/ports/stm/boards/thunderpack_v12/mpconfigboard.mk +++ b/ports/stm/boards/thunderpack_v12/mpconfigboard.mk @@ -11,6 +11,7 @@ EXTERNAL_FLASH_DEVICE_COUNT = 1 EXTERNAL_FLASH_DEVICES = GD25Q16C CIRCUITPY_NVM = 1 +CIRCUITPY_BLEIO_HCI = 0 MCU_SERIES = F4 MCU_VARIANT = STM32F411xE diff --git a/ports/stm/common-hal/microcontroller/Pin.c b/ports/stm/common-hal/microcontroller/Pin.c index 7d259e052..0e333c71c 100644 --- a/ports/stm/common-hal/microcontroller/Pin.c +++ b/ports/stm/common-hal/microcontroller/Pin.c @@ -35,7 +35,7 @@ #ifdef MICROPY_HW_NEOPIXEL bool neopixel_in_use; #endif -#ifdef MICROPY_HW_APA102_MOSI +#if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK) bool apa102_sck_in_use; bool apa102_mosi_in_use; #endif @@ -70,7 +70,7 @@ void reset_all_pins(void) { #ifdef MICROPY_HW_NEOPIXEL neopixel_in_use = false; #endif - #ifdef MICROPY_HW_APA102_MOSI + #if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK) apa102_sck_in_use = false; apa102_mosi_in_use = false; #endif @@ -97,8 +97,11 @@ void reset_pin_number(uint8_t pin_port, uint8_t pin_number) { return; } #endif - #ifdef MICROPY_HW_APA102_MOSI - if ((pin_port == MICROPY_HW_APA102_MOSI->port && pin_number == MICROPY_HW_APA102_MOSI->number) || (pin_port == MICROPY_HW_APA102_SCK->port && pin_number == MICROPY_HW_APA102_MOSI->number)) + #if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK) + if ( + (pin_port == MICROPY_HW_APA102_MOSI->port && pin_number == MICROPY_HW_APA102_MOSI->number) + || (pin_port == MICROPY_HW_APA102_SCK->port && pin_number == MICROPY_HW_APA102_MOSI->number) + ) { apa102_mosi_in_use = false; apa102_sck_in_use = false; @@ -140,7 +143,7 @@ bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) { return !neopixel_in_use; } #endif - #ifdef MICROPY_HW_APA102_MOSI + #if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK) if (pin == MICROPY_HW_APA102_MOSI) { return !apa102_mosi_in_use; @@ -173,7 +176,7 @@ void common_hal_mcu_pin_claim(const mcu_pin_obj_t* pin) { neopixel_in_use = true; } #endif - #ifdef MICROPY_HW_APA102_MOSI + #if defined(MICROPY_HW_APA102_MOSI) && defined(MICROPY_HW_APA102_SCK) if (pin == MICROPY_HW_APA102_MOSI) { apa102_mosi_in_use = true; diff --git a/ports/stm/common-hal/nvm/ByteArray.c b/ports/stm/common-hal/nvm/ByteArray.c index 462d3aa9d..b7a1ff035 100644 --- a/ports/stm/common-hal/nvm/ByteArray.c +++ b/ports/stm/common-hal/nvm/ByteArray.c @@ -48,7 +48,7 @@ bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, // Erase flash sector HAL_FLASH_Unlock(); - __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGSERR ); + __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR ); FLASH_Erase_Sector(CIRCUITPY_INTERNAL_NVM_SECTOR, VOLTAGE_RANGE_3); // Write bytes to flash diff --git a/ports/stm/supervisor/internal_flash.h b/ports/stm/supervisor/internal_flash.h index 5746deac8..19ae03e0b 100644 --- a/ports/stm/supervisor/internal_flash.h +++ b/ports/stm/supervisor/internal_flash.h @@ -42,10 +42,10 @@ #ifdef STM32F411xE #define STM32_FLASH_SIZE 0x80000 //512KiB #ifndef INTERNAL_FLASH_FILESYSTEM_SIZE -#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB + #define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB #endif #ifndef INTERNAL_FLASH_FILESYSTEM_START_ADDR -#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000 + #define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000 #endif #endif -- cgit v1.2.3 From 70e978f48b587620bb1407d9717f0a8fc3d4cf26 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Mon, 16 Nov 2020 16:57:01 -0600 Subject: stm: disable ulab on two resource-constrained boards --- ports/stm/boards/meowbit_v121/mpconfigboard.mk | 2 ++ ports/stm/boards/thunderpack/mpconfigboard.mk | 2 ++ 2 files changed, 4 insertions(+) (limited to 'ports') diff --git a/ports/stm/boards/meowbit_v121/mpconfigboard.mk b/ports/stm/boards/meowbit_v121/mpconfigboard.mk index c416700e3..86b0cb5ab 100644 --- a/ports/stm/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm/boards/meowbit_v121/mpconfigboard.mk @@ -20,3 +20,5 @@ LD_COMMON = boards/common_default.ld LD_FILE = boards/STM32F401xe_boot.ld # For debugging - also comment BOOTLOADER_OFFSET and BOARD_VTOR_DEFER # LD_FILE = boards/STM32F401xe_fs.ld + +CIRCUITPY_ULAB = 0 diff --git a/ports/stm/boards/thunderpack/mpconfigboard.mk b/ports/stm/boards/thunderpack/mpconfigboard.mk index d303582e0..8f645068d 100644 --- a/ports/stm/boards/thunderpack/mpconfigboard.mk +++ b/ports/stm/boards/thunderpack/mpconfigboard.mk @@ -15,3 +15,5 @@ MCU_PACKAGE = UFQFPN48 LD_COMMON = boards/common_nvm.ld LD_FILE = boards/STM32F411_nvm.ld + +CIRCUITPY_ULAB = 0 -- cgit v1.2.3 From efda9124374dcbffb4f8a58d227e439d34ca7760 Mon Sep 17 00:00:00 2001 From: Kattni Rembor Date: Mon, 23 Nov 2020 15:53:28 -0500 Subject: Add pin names from silk --- ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c index 40c9e91e4..f1ce4b8c6 100644 --- a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c +++ b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c @@ -16,11 +16,16 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_EPD_CS), MP_ROM_PTR(&pin_GPIO8) }, { MP_ROM_QSTR(MP_QSTR_BUTTON_A), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO15) }, { MP_ROM_QSTR(MP_QSTR_BUTTON_B), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO14) }, { MP_ROM_QSTR(MP_QSTR_BUTTON_C), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO12) }, { MP_ROM_QSTR(MP_QSTR_BUTTON_D), MP_ROM_PTR(&pin_GPIO11) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO11) }, { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO3) }, { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO4) }, { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_GPIO4) }, @@ -36,6 +41,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_GPIO21) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO1) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, -- cgit v1.2.3 From 3730862362e914cc92b6977cb5d809856467f8f9 Mon Sep 17 00:00:00 2001 From: Kattni Rembor Date: Mon, 23 Nov 2020 15:56:36 -0500 Subject: Update to match silk rev 1 --- ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c index f1ce4b8c6..6c2dc1151 100644 --- a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c +++ b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c @@ -41,7 +41,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_GPIO21) }, { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO1) }, - { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO1) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, -- cgit v1.2.3 From 7928a0d45419181d3f29c809aa0c3c87e58359e3 Mon Sep 17 00:00:00 2001 From: Kattni Rembor Date: Mon, 23 Nov 2020 16:02:45 -0500 Subject: Blank lines to group aliases. --- ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'ports') diff --git a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c index 6c2dc1151..0cefb6dfb 100644 --- a/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c +++ b/ports/esp32s2/boards/adafruit_magtag_2.9_grayscale/pins.c @@ -17,10 +17,13 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_BUTTON_A), MP_ROM_PTR(&pin_GPIO15) }, { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_B), MP_ROM_PTR(&pin_GPIO14) }, { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_C), MP_ROM_PTR(&pin_GPIO12) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON_D), MP_ROM_PTR(&pin_GPIO11) }, { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO11) }, -- cgit v1.2.3 From 2635132ce590a44e79dbee8230fe92dbba8e3667 Mon Sep 17 00:00:00 2001 From: Seth Kerr Date: Mon, 23 Nov 2020 19:21:12 -0500 Subject: adding 'haxpress' kind of build for CP Sapling for use with SPI Flash --- .../boards/cp_sapling_m0_spiflash/board.c | 40 ++++++++++++++ .../boards/cp_sapling_m0_spiflash/mpconfigboard.h | 62 ++++++++++++++++++++++ .../boards/cp_sapling_m0_spiflash/mpconfigboard.mk | 33 ++++++++++++ .../boards/cp_sapling_m0_spiflash/pins.c | 38 +++++++++++++ ports/atmel-samd/boards/icy-tree-sof-m0/board.c | 44 +++++++++++++++ .../boards/icy-tree-sof-m0/mpconfigboard.h | 55 +++++++++++++++++++ .../boards/icy-tree-sof-m0/mpconfigboard.mk | 24 +++++++++ ports/atmel-samd/boards/icy-tree-sof-m0/pins.c | 49 +++++++++++++++++ 8 files changed, 345 insertions(+) create mode 100644 ports/atmel-samd/boards/cp_sapling_m0_spiflash/board.c create mode 100644 ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/cp_sapling_m0_spiflash/pins.c create mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/board.c create mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h create mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk create mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/pins.c (limited to 'ports') diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/board.c b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/board.c new file mode 100644 index 000000000..ce5636676 --- /dev/null +++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/board.c @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "common-hal/microcontroller/Pin.h" +#include "supervisor/shared/board.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h new file mode 100644 index 000000000..a129566d2 --- /dev/null +++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h @@ -0,0 +1,62 @@ +#define MICROPY_HW_BOARD_NAME "CP Sapling M0" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_NEOPIXEL (&pin_PA15) + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define SPI_FLASH_MOSI_PIN &pin_PA18 +#define SPI_FLASH_MISO_PIN &pin_PA17 +#define SPI_FLASH_SCK_PIN &pin_PA19 +#define SPI_FLASH_CS_PIN &pin_PA22 + +#define IGNORE_PIN_PA02 1 +#define IGNORE_PIN_PA03 1 +#define IGNORE_PIN_PA04 1 +#define IGNORE_PIN_PA05 1 +#define IGNORE_PIN_PA06 1 +#define IGNORE_PIN_PA07 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA09) +#define DEFAULT_I2C_BUS_SDA (&pin_PA08) + +#define DEFAULT_SPI_BUS_SS (&pin_PA22) +#define DEFAULT_SPI_BUS_SCK (&pin_PA19) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA18) +#define DEFAULT_SPI_BUS_MISO (&pin_PA17) diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk new file mode 100644 index 000000000..c81209db3 --- /dev/null +++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk @@ -0,0 +1,33 @@ +USB_VID = 0x1209 +USB_PID = 0x4DDD +USB_PRODUCT = "CP Sapling" +USB_MANUFACTURER = "Oak Development Technologies" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 0 +LONGINT_IMPL = MPZ +SPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = AT25DF081A + +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_AUDIOBUSIO = 0 +CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_COUNTIO = 0 +CIRCUITPY_FREQUENCYIO = 0 +CIRCUITPY_I2CPERIPHERAL = 0 + +SUPEROPT_GC = 0 + +CFLAGS_BOARD = --param max-inline-insns-auto=15 +ifeq ($(TRANSLATION), zh_Latn_pinyin) +RELEASE_NEEDS_CLEAN_BUILD = 1 +CFLAGS_INLINE_LIMIT = 35 +endif +ifeq ($(TRANSLATION), de_DE) +RELEASE_NEEDS_CLEAN_BUILD = 1 +CFLAGS_INLINE_LIMIT = 35 +SUPEROPT_VM = 0 +endif diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/pins.c b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/pins.c new file mode 100644 index 000000000..d527aaddc --- /dev/null +++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/pins.c @@ -0,0 +1,38 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA08) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA08) }, + + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA00) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA00) }, + + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA01) }, + + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA22) }, + { MP_ROM_QSTR(MP_QSTR_SS), MP_ROM_PTR(&pin_PA22) }, + + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA19) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA19) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA18) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA15) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/board.c b/ports/atmel-samd/boards/icy-tree-sof-m0/board.c new file mode 100644 index 000000000..1a65a561f --- /dev/null +++ b/ports/atmel-samd/boards/icy-tree-sof-m0/board.c @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "common-hal/microcontroller/Pin.h" +#include "supervisor/shared/board.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { + gpio_set_pin_function(PIN_PA15, GPIO_PIN_FUNCTION_OFF); + gpio_set_pin_direction(PIN_PA15, GPIO_DIRECTION_OUT); + gpio_set_pin_level(PIN_PA15, true); // Turn on neopixel by default + never_reset_pin_number(PIN_PA15); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h b/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h new file mode 100644 index 000000000..713d2c03e --- /dev/null +++ b/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h @@ -0,0 +1,55 @@ +#define MICROPY_HW_BOARD_NAME "Adafruit QT Py M0" +#define MICROPY_HW_MCU_NAME "samd21e18" + +#define MICROPY_HW_NEOPIXEL (&pin_PA18) + +#define MICROPY_PORT_A (0) +#define MICROPY_PORT_B (0) +#define MICROPY_PORT_C (0) + +#define IGNORE_PIN_PA00 1 +#define IGNORE_PIN_PA01 1 +#define IGNORE_PIN_PA12 1 +#define IGNORE_PIN_PA13 1 +#define IGNORE_PIN_PA14 1 +#define IGNORE_PIN_PA20 1 +#define IGNORE_PIN_PA21 1 +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PA27 1 +#define IGNORE_PIN_PA28 1 +#define IGNORE_PIN_PA30 1 +#define IGNORE_PIN_PA31 1 +#define IGNORE_PIN_PB01 1 +#define IGNORE_PIN_PB02 1 +#define IGNORE_PIN_PB03 1 +#define IGNORE_PIN_PB04 1 +#define IGNORE_PIN_PB05 1 +#define IGNORE_PIN_PB06 1 +#define IGNORE_PIN_PB07 1 +#define IGNORE_PIN_PB08 1 +#define IGNORE_PIN_PB09 1 +#define IGNORE_PIN_PB10 1 +#define IGNORE_PIN_PB11 1 +#define IGNORE_PIN_PB12 1 +#define IGNORE_PIN_PB13 1 +#define IGNORE_PIN_PB14 1 +#define IGNORE_PIN_PB15 1 +#define IGNORE_PIN_PB16 1 +#define IGNORE_PIN_PB17 1 +#define IGNORE_PIN_PB22 1 +#define IGNORE_PIN_PB23 1 +#define IGNORE_PIN_PB30 1 +#define IGNORE_PIN_PB31 1 +#define IGNORE_PIN_PB00 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA17) +#define DEFAULT_I2C_BUS_SDA (&pin_PA16) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA11) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA10) +#define DEFAULT_SPI_BUS_MISO (&pin_PA09) + +#define DEFAULT_UART_BUS_RX (&pin_PA07) +#define DEFAULT_UART_BUS_TX (&pin_PA06) diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk b/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk new file mode 100644 index 000000000..964cbe643 --- /dev/null +++ b/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk @@ -0,0 +1,24 @@ +USB_VID = 0x239A +USB_PID = 0x80CC +USB_PRODUCT = "QT Py M0" +USB_MANUFACTURER = "Adafruit Industries LLC" + +CHIP_VARIANT = SAMD21E18A +CHIP_FAMILY = samd21 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = NONE +CIRCUITPY_FULL_BUILD = 0 + +SUPEROPT_GC = 0 + +CFLAGS_BOARD = --param max-inline-insns-auto=15 +ifeq ($(TRANSLATION), zh_Latn_pinyin) +RELEASE_NEEDS_CLEAN_BUILD = 1 +CFLAGS_INLINE_LIMIT = 35 +endif +ifeq ($(TRANSLATION), de_DE) +RELEASE_NEEDS_CLEAN_BUILD = 1 +CFLAGS_INLINE_LIMIT = 35 +SUPEROPT_VM = 0 +endif diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/pins.c b/ports/atmel-samd/boards/icy-tree-sof-m0/pins.c new file mode 100644 index 000000000..636c48bff --- /dev/null +++ b/ports/atmel-samd/boards/icy-tree-sof-m0/pins.c @@ -0,0 +1,49 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA02) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA03) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA03) }, + + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04) }, + + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA05) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA05) }, + + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA16) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA17) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA17) }, + + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA06) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA06) }, + + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA07) }, + + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA11) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA11) }, + + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA09) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA09) }, + + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA10) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA10) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA18) }, + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_PA15) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From e5cee989771f6c79b91e8c3a039d167bf7022fa4 Mon Sep 17 00:00:00 2001 From: Seth Kerr Date: Mon, 23 Nov 2020 19:31:06 -0500 Subject: removing icy tree files/directory --- ports/atmel-samd/boards/icy-tree-sof-m0/board.c | 44 ----------------- .../boards/icy-tree-sof-m0/mpconfigboard.h | 55 ---------------------- .../boards/icy-tree-sof-m0/mpconfigboard.mk | 24 ---------- ports/atmel-samd/boards/icy-tree-sof-m0/pins.c | 49 ------------------- 4 files changed, 172 deletions(-) delete mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/board.c delete mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h delete mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk delete mode 100644 ports/atmel-samd/boards/icy-tree-sof-m0/pins.c (limited to 'ports') diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/board.c b/ports/atmel-samd/boards/icy-tree-sof-m0/board.c deleted file mode 100644 index 1a65a561f..000000000 --- a/ports/atmel-samd/boards/icy-tree-sof-m0/board.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include "boards/board.h" -#include "common-hal/microcontroller/Pin.h" -#include "supervisor/shared/board.h" -#include "hal/include/hal_gpio.h" - -void board_init(void) { - gpio_set_pin_function(PIN_PA15, GPIO_PIN_FUNCTION_OFF); - gpio_set_pin_direction(PIN_PA15, GPIO_DIRECTION_OUT); - gpio_set_pin_level(PIN_PA15, true); // Turn on neopixel by default - never_reset_pin_number(PIN_PA15); -} - -bool board_requests_safe_mode(void) { - return false; -} - -void reset_board(void) { -} diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h b/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h deleted file mode 100644 index 713d2c03e..000000000 --- a/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.h +++ /dev/null @@ -1,55 +0,0 @@ -#define MICROPY_HW_BOARD_NAME "Adafruit QT Py M0" -#define MICROPY_HW_MCU_NAME "samd21e18" - -#define MICROPY_HW_NEOPIXEL (&pin_PA18) - -#define MICROPY_PORT_A (0) -#define MICROPY_PORT_B (0) -#define MICROPY_PORT_C (0) - -#define IGNORE_PIN_PA00 1 -#define IGNORE_PIN_PA01 1 -#define IGNORE_PIN_PA12 1 -#define IGNORE_PIN_PA13 1 -#define IGNORE_PIN_PA14 1 -#define IGNORE_PIN_PA20 1 -#define IGNORE_PIN_PA21 1 -// USB is always used internally so skip the pin objects for it. -#define IGNORE_PIN_PA24 1 -#define IGNORE_PIN_PA25 1 -#define IGNORE_PIN_PA27 1 -#define IGNORE_PIN_PA28 1 -#define IGNORE_PIN_PA30 1 -#define IGNORE_PIN_PA31 1 -#define IGNORE_PIN_PB01 1 -#define IGNORE_PIN_PB02 1 -#define IGNORE_PIN_PB03 1 -#define IGNORE_PIN_PB04 1 -#define IGNORE_PIN_PB05 1 -#define IGNORE_PIN_PB06 1 -#define IGNORE_PIN_PB07 1 -#define IGNORE_PIN_PB08 1 -#define IGNORE_PIN_PB09 1 -#define IGNORE_PIN_PB10 1 -#define IGNORE_PIN_PB11 1 -#define IGNORE_PIN_PB12 1 -#define IGNORE_PIN_PB13 1 -#define IGNORE_PIN_PB14 1 -#define IGNORE_PIN_PB15 1 -#define IGNORE_PIN_PB16 1 -#define IGNORE_PIN_PB17 1 -#define IGNORE_PIN_PB22 1 -#define IGNORE_PIN_PB23 1 -#define IGNORE_PIN_PB30 1 -#define IGNORE_PIN_PB31 1 -#define IGNORE_PIN_PB00 1 - -#define DEFAULT_I2C_BUS_SCL (&pin_PA17) -#define DEFAULT_I2C_BUS_SDA (&pin_PA16) - -#define DEFAULT_SPI_BUS_SCK (&pin_PA11) -#define DEFAULT_SPI_BUS_MOSI (&pin_PA10) -#define DEFAULT_SPI_BUS_MISO (&pin_PA09) - -#define DEFAULT_UART_BUS_RX (&pin_PA07) -#define DEFAULT_UART_BUS_TX (&pin_PA06) diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk b/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk deleted file mode 100644 index 964cbe643..000000000 --- a/ports/atmel-samd/boards/icy-tree-sof-m0/mpconfigboard.mk +++ /dev/null @@ -1,24 +0,0 @@ -USB_VID = 0x239A -USB_PID = 0x80CC -USB_PRODUCT = "QT Py M0" -USB_MANUFACTURER = "Adafruit Industries LLC" - -CHIP_VARIANT = SAMD21E18A -CHIP_FAMILY = samd21 - -INTERNAL_FLASH_FILESYSTEM = 1 -LONGINT_IMPL = NONE -CIRCUITPY_FULL_BUILD = 0 - -SUPEROPT_GC = 0 - -CFLAGS_BOARD = --param max-inline-insns-auto=15 -ifeq ($(TRANSLATION), zh_Latn_pinyin) -RELEASE_NEEDS_CLEAN_BUILD = 1 -CFLAGS_INLINE_LIMIT = 35 -endif -ifeq ($(TRANSLATION), de_DE) -RELEASE_NEEDS_CLEAN_BUILD = 1 -CFLAGS_INLINE_LIMIT = 35 -SUPEROPT_VM = 0 -endif diff --git a/ports/atmel-samd/boards/icy-tree-sof-m0/pins.c b/ports/atmel-samd/boards/icy-tree-sof-m0/pins.c deleted file mode 100644 index 636c48bff..000000000 --- a/ports/atmel-samd/boards/icy-tree-sof-m0/pins.c +++ /dev/null @@ -1,49 +0,0 @@ -#include "shared-bindings/board/__init__.h" - -STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA02) }, - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, - - { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA03) }, - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA03) }, - - { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA04) }, - { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA04) }, - - { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PA05) }, - { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA05) }, - - { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA16) }, - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA16) }, - - { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA17) }, - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA17) }, - - { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA06) }, - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA06) }, - - { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) }, - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA07) }, - - { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA11) }, - { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA11) }, - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA11) }, - - { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA09) }, - { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA09) }, - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PA09) }, - - { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA10) }, - { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA10) }, - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA10) }, - - { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_PA18) }, - { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_PA15) }, - - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, -}; -MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); -- cgit v1.2.3 From 6ff24410ebe9e75456b9d5d64f37fbe019caf42c Mon Sep 17 00:00:00 2001 From: microDev <70126934+microDev1@users.noreply.github.com> Date: Tue, 24 Nov 2020 11:44:11 +0530 Subject: use values pointer directly --- ports/esp32s2/common-hal/nvm/ByteArray.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) (limited to 'ports') diff --git a/ports/esp32s2/common-hal/nvm/ByteArray.c b/ports/esp32s2/common-hal/nvm/ByteArray.c index e304dd830..71321e7e6 100644 --- a/ports/esp32s2/common-hal/nvm/ByteArray.c +++ b/ports/esp32s2/common-hal/nvm/ByteArray.c @@ -26,8 +26,6 @@ #include "common-hal/nvm/ByteArray.h" -#include - #include "py/runtime.h" #include "nvs_flash.h" @@ -56,9 +54,6 @@ bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, uint32_t start_index, uint8_t* values, uint32_t len) { char index[9]; - uint8_t buffer[len]; - memcpy(buffer, values, len); - // start nvs nvs_handle_t handle; get_nvs_handle(&handle); @@ -66,7 +61,7 @@ bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, // stage flash changes for (uint32_t i = 0; i < len; i++) { sprintf(index, "%i", start_index + i); - if (nvs_set_u8(handle, (const char *)index, buffer[i]) != ESP_OK) { + if (nvs_set_u8(handle, (const char *)index, values[i]) != ESP_OK) { return false; } } @@ -84,7 +79,6 @@ bool common_hal_nvm_bytearray_set_bytes(nvm_bytearray_obj_t *self, void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self, uint32_t start_index, uint32_t len, uint8_t* values) { char index[9]; - uint8_t buffer[len]; // start nvs nvs_handle_t handle; @@ -93,14 +87,11 @@ void common_hal_nvm_bytearray_get_bytes(nvm_bytearray_obj_t *self, // get from flash for (uint32_t i = 0; i < len; i++) { sprintf(index, "%i", start_index + i); - if (nvs_get_u8(handle, (const char *)index, &buffer[i]) != ESP_OK) { + if (nvs_get_u8(handle, (const char *)index, &values[i]) != ESP_OK) { mp_raise_RuntimeError(translate("NVS Error")); } } - // set into values - memcpy(values, buffer, len); - // close nvs nvs_close(handle); } -- cgit v1.2.3 From f8499a468e79999decdf5002016bbfe99994f47b Mon Sep 17 00:00:00 2001 From: jgillick Date: Mon, 23 Nov 2020 22:56:38 -0800 Subject: Remove filesystem from linker script. --- ports/stm/boards/STM32F411_nvm_flash.ld | 29 ----------------------- ports/stm/boards/STM32F411_nvm_nofs.ld | 27 +++++++++++++++++++++ ports/stm/boards/thunderpack_v12/mpconfigboard.h | 4 ++-- ports/stm/boards/thunderpack_v12/mpconfigboard.mk | 2 +- 4 files changed, 30 insertions(+), 32 deletions(-) delete mode 100644 ports/stm/boards/STM32F411_nvm_flash.ld create mode 100644 ports/stm/boards/STM32F411_nvm_nofs.ld (limited to 'ports') diff --git a/ports/stm/boards/STM32F411_nvm_flash.ld b/ports/stm/boards/STM32F411_nvm_flash.ld deleted file mode 100644 index ced739765..000000000 --- a/ports/stm/boards/STM32F411_nvm_flash.ld +++ /dev/null @@ -1,29 +0,0 @@ -/* - GNU linker script for STM32F411 with nvm and an external flash chip, and reserves - more space for the CircuitPython firmware and less for the filesystem - (since the filesystem will be on the external flash chip). -*/ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 32K /* sectors 1,2 are 16K */ - FLASH_NVM (rwx) : ORIGIN = 0x0800C000, LENGTH = 16K /* sector 3 is 16K */ - FLASH_FIRMWARE (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K -} - -/* produce a link error if there is not this amount of RAM for these sections */ -_minimum_stack_size = 24K; -_minimum_heap_size = 16K; - -/* Define the top end of the stack. The stack is full descending so begins just - above last byte of RAM. Note that EABI requires the stack to be 8-byte - aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); - -/* RAM extents for the garbage collector */ -_ram_start = ORIGIN(RAM); -_ram_end = ORIGIN(RAM) + LENGTH(RAM); diff --git a/ports/stm/boards/STM32F411_nvm_nofs.ld b/ports/stm/boards/STM32F411_nvm_nofs.ld new file mode 100644 index 000000000..e4630518c --- /dev/null +++ b/ports/stm/boards/STM32F411_nvm_nofs.ld @@ -0,0 +1,27 @@ +/* + GNU linker script for STM32F411 with nvm and an external flash chip. + No space is reserved for a filesystem. +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_NVM (rwx) : ORIGIN = 0x08004000, LENGTH = 16K /* sector 1 is 16K */ + FLASH_FIRMWARE (rx) : ORIGIN = 0x08008000, LENGTH = 480K /* sector 2,3 is 16k, sector 4 is 64K, sectors 5,6,7 are 128K */ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 24K; +_minimum_heap_size = 16K; + +/* Define the top end of the stack. The stack is full descending so begins just + above last byte of RAM. Note that EABI requires the stack to be 8-byte + aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); diff --git a/ports/stm/boards/thunderpack_v12/mpconfigboard.h b/ports/stm/boards/thunderpack_v12/mpconfigboard.h index 57486da28..fb5f389a3 100644 --- a/ports/stm/boards/thunderpack_v12/mpconfigboard.h +++ b/ports/stm/boards/thunderpack_v12/mpconfigboard.h @@ -28,8 +28,8 @@ // Non-volatile memory config #define CIRCUITPY_INTERNAL_NVM_SIZE (0x4000) -#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x0800C000) -#define CIRCUITPY_INTERNAL_NVM_SECTOR FLASH_SECTOR_3 +#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x08004000) +#define CIRCUITPY_INTERNAL_NVM_SECTOR FLASH_SECTOR_1 #define NVM_BYTEARRAY_BUFFER_SIZE 512 // Flash config diff --git a/ports/stm/boards/thunderpack_v12/mpconfigboard.mk b/ports/stm/boards/thunderpack_v12/mpconfigboard.mk index d0bc22680..a2e1da101 100644 --- a/ports/stm/boards/thunderpack_v12/mpconfigboard.mk +++ b/ports/stm/boards/thunderpack_v12/mpconfigboard.mk @@ -18,4 +18,4 @@ MCU_VARIANT = STM32F411xE MCU_PACKAGE = UFQFPN48 LD_COMMON = boards/common_nvm.ld -LD_FILE = boards/STM32F411_nvm_flash.ld +LD_FILE = boards/STM32F411_nvm_nofs.ld -- cgit v1.2.3 From 686edcef3f392ce96ae86bd66e91b6c93f2f986f Mon Sep 17 00:00:00 2001 From: Seth Kerr Date: Tue, 24 Nov 2020 07:41:32 -0500 Subject: fixing PID issues with CI Test (whoops) --- ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h | 2 +- ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'ports') diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h index a129566d2..9c69c4802 100644 --- a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h +++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.h @@ -1,4 +1,4 @@ -#define MICROPY_HW_BOARD_NAME "CP Sapling M0" +#define MICROPY_HW_BOARD_NAME "CP Sapling M0 w/ SPI Flash" #define MICROPY_HW_MCU_NAME "samd21e18" #define MICROPY_HW_NEOPIXEL (&pin_PA15) diff --git a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk index c81209db3..99e13f791 100644 --- a/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk +++ b/ports/atmel-samd/boards/cp_sapling_m0_spiflash/mpconfigboard.mk @@ -1,6 +1,6 @@ USB_VID = 0x1209 -USB_PID = 0x4DDD -USB_PRODUCT = "CP Sapling" +USB_PID = 0x4DDE +USB_PRODUCT = "CP Sapling M0 w/ SPI Flash" USB_MANUFACTURER = "Oak Development Technologies" CHIP_VARIANT = SAMD21E18A -- cgit v1.2.3 From c451b22255706989f58cfd88be486e5117979a28 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Tue, 24 Nov 2020 10:26:47 -0600 Subject: Disable 3-arg pow() function on m0 boards `pow(a, b, c)` can compute `(a ** b) % c` efficiently (in time and memory). This can be useful for extremely specific applications, like implementing the RSA cryptosystem. For typical uses of CircuitPython, this is not an important feature. A survey of the bundle and learn system didn't find any uses. Disable it on M0 builds so that we can fit in needed upgrades to the USB stack. --- ports/atmel-samd/mpconfigport.mk | 4 ++++ py/circuitpy_mpconfig.h | 2 +- py/circuitpy_mpconfig.mk | 3 +++ 3 files changed, 8 insertions(+), 1 deletion(-) (limited to 'ports') diff --git a/ports/atmel-samd/mpconfigport.mk b/ports/atmel-samd/mpconfigport.mk index 1929e146d..17e3995bf 100644 --- a/ports/atmel-samd/mpconfigport.mk +++ b/ports/atmel-samd/mpconfigport.mk @@ -29,6 +29,10 @@ ifndef CIRCUITPY_AUDIOMP3 CIRCUITPY_AUDIOMP3 = 0 endif +ifndef CIRCUITPY_BUILTINS_POW3 +CIRCUITPY_BUILTINS_POW3 = 0 +endif + ifndef CIRCUITPY_FREQUENCYIO CIRCUITPY_FREQUENCYIO = 0 endif diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 85e152670..28fd4095c 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -184,7 +184,7 @@ typedef long mp_off_t; // Turning off FULL_BUILD removes some functionality to reduce flash size on tiny SAMD21s #define MICROPY_BUILTIN_METHOD_CHECK_SELF_ARG (CIRCUITPY_FULL_BUILD) #define MICROPY_CPYTHON_COMPAT (CIRCUITPY_FULL_BUILD) -#define MICROPY_PY_BUILTINS_POW3 (CIRCUITPY_FULL_BUILD) +#define MICROPY_PY_BUILTINS_POW3 (CIRCUITPY_BUILTINS_POW3) #define MICROPY_COMP_FSTRING_LITERAL (MICROPY_CPYTHON_COMPAT) #define MICROPY_MODULE_WEAK_LINKS (0) #define MICROPY_PY_ALL_SPECIAL_METHODS (CIRCUITPY_FULL_BUILD) diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk index a6aabec33..08e773718 100644 --- a/py/circuitpy_mpconfig.mk +++ b/py/circuitpy_mpconfig.mk @@ -90,6 +90,9 @@ CFLAGS += -DCIRCUITPY_BLEIO=$(CIRCUITPY_BLEIO) CIRCUITPY_BOARD ?= 1 CFLAGS += -DCIRCUITPY_BOARD=$(CIRCUITPY_BOARD) +CIRCUITPY_BUILTINS_POW3 ?= $(CIRCUITPY_FULL_BUILD) +CFLAGS += -DCIRCUITPY_BUILTINS_POW3=$(CIRCUITPY_BUILTINS_POW3) + CIRCUITPY_BUSIO ?= 1 CFLAGS += -DCIRCUITPY_BUSIO=$(CIRCUITPY_BUSIO) -- cgit v1.2.3