From a7f72eb2d8ecd7ee1d48935907e0e819e5efaca7 Mon Sep 17 00:00:00 2001 From: dean Date: Tue, 30 Jan 2018 17:18:57 -0500 Subject: DM: added write_readinto to bitbangio --- shared-module/bitbangio/SPI.c | 66 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) (limited to 'shared-module') diff --git a/shared-module/bitbangio/SPI.c b/shared-module/bitbangio/SPI.c index 0576a6e56..f65cbeaec 100644 --- a/shared-module/bitbangio/SPI.c +++ b/shared-module/bitbangio/SPI.c @@ -238,3 +238,69 @@ bool shared_module_bitbangio_spi_read(bitbangio_spi_obj_t *self, uint8_t *data, } return true; } + +// transfer +bool shared_module_bitbangio_spi_transfer(bitbangio_spi_obj_t *self, const uint8_t *dout, uint8_t *din, size_t len) { + if (len > 0 && (!self->has_mosi || !self->has_miso) ) { + nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, + "Cannot transfer without MOSI and MISO pins.")); + } + uint32_t delay_half = self->delay_half; + + // only MSB transfer is implemented + + // If a port defines MICROPY_PY_MACHINE_SPI_MIN_DELAY, and the configured + // delay_half is equal to this value, then the software SPI implementation + // will run as fast as possible, limited only by CPU speed and GPIO time. + #ifdef MICROPY_PY_MACHINE_SPI_MIN_DELAY + if (delay_half <= MICROPY_PY_MACHINE_SPI_MIN_DELAY) { + for (size_t i = 0; i < len; ++i) { + uint8_t data_out = dout[i]; + uint8_t data_in = 0; + for (int j = 0; j < 8; ++j, data_out <<= 1) { + common_hal_digitalio_digitalinout_set_value(&self->mosi, (data_out >> 7) & 1); + common_hal_digitalio_digitalinout_set_value(&self->clock, 1 - self->polarity); + data_in = (data_in << 1) | common_hal_digitalio_digitalinout_get_value(&self->miso); + common_hal_digitalio_digitalinout_set_value(&self->clock, self->polarity); + } + din[i] = data_in; + + if (dest != NULL) { + dest[i] = data_in; + } + } + return true; + } + #endif + + for (size_t i = 0; i < len; ++i) { + uint8_t data_out = dout[i]; + uint8_t data_in = 0; + for (int j = 0; j < 8; ++j, data_out <<= 1) { + common_hal_digitalio_digitalinout_set_value(&self->mosi, (data_out >> 7) & 1); + if (self->phase == 0) { + common_hal_mcu_delay_us(delay_half); + common_hal_digitalio_digitalinout_set_value(&self->clock, 1 - self->polarity); + } else { + common_hal_digitalio_digitalinout_set_value(&self->clock, 1 - self->polarity); + common_hal_mcu_delay_us(delay_half); + } + data_in = (data_in << 1) | common_hal_digitalio_digitalinout_get_value(&self->miso); + if (self->phase == 0) { + common_hal_mcu_delay_us(delay_half); + common_hal_digitalio_digitalinout_set_value(&self->clock, self->polarity); + } else { + common_hal_digitalio_digitalinout_set_value(&self->clock, self->polarity); + common_hal_mcu_delay_us(delay_half); + } + } + din[i] = data_in; + + // Some ports need a regular callback, but probably we don't need + // to do this every byte, or even at all. + #ifdef MICROPY_EVENT_POLL_HOOK + MICROPY_EVENT_POLL_HOOK; + #endif + } + return true; +} -- cgit v1.2.3 From 68309c3fac4c59cc6c22ffa0a9a7e64a582f6dfc Mon Sep 17 00:00:00 2001 From: dean Date: Mon, 5 Feb 2018 10:44:29 -0500 Subject: replace tabs with spaces --- shared-bindings/bitbangio/SPI.c | 20 ++++++++++---------- shared-module/bitbangio/SPI.c | 42 ++++++++++++++++++++--------------------- 2 files changed, 31 insertions(+), 31 deletions(-) (limited to 'shared-module') diff --git a/shared-bindings/bitbangio/SPI.c b/shared-bindings/bitbangio/SPI.c index 43d24b5bf..53d6fec05 100644 --- a/shared-bindings/bitbangio/SPI.c +++ b/shared-bindings/bitbangio/SPI.c @@ -244,23 +244,23 @@ STATIC mp_obj_t bitbangio_spi_write_readinto(size_t n_args, const mp_obj_t *args raise_error_if_deinited(shared_module_bitbangio_spi_deinited(self)); mp_buffer_info_t bufinfoin; - mp_get_buffer_raise(args[2], &bufinfoin, MP_BUFFER_WRITE); + mp_get_buffer_raise(args[2], &bufinfoin, MP_BUFFER_WRITE); - if (bufinfoin.len == 0) { - return mp_const_none; - } + if (bufinfoin.len == 0) { + return mp_const_none; + } - mp_buffer_info_t bufinfoout; - mp_get_buffer_raise(args[1], &bufinfoout, MP_BUFFER_READ); + mp_buffer_info_t bufinfoout; + mp_get_buffer_raise(args[1], &bufinfoout, MP_BUFFER_READ); - if (bufinfoout.len != bufinfoin.len) { - mp_raise_ValueError("buffers must be of equal length"); - } + if (bufinfoout.len != bufinfoin.len) { + mp_raise_ValueError("buffers must be of equal length"); + } bool ok = shared_module_bitbangio_spi_transfer(self, ((uint8_t*)bufinfoout.buf), ((uint8_t*)bufinfoin.buf), - bufinfoin.len); + bufinfoin.len); if (!ok) { mp_raise_OSError(MP_EIO); } diff --git a/shared-module/bitbangio/SPI.c b/shared-module/bitbangio/SPI.c index f65cbeaec..e572d4aab 100644 --- a/shared-module/bitbangio/SPI.c +++ b/shared-module/bitbangio/SPI.c @@ -257,13 +257,13 @@ bool shared_module_bitbangio_spi_transfer(bitbangio_spi_obj_t *self, const uint8 for (size_t i = 0; i < len; ++i) { uint8_t data_out = dout[i]; uint8_t data_in = 0; - for (int j = 0; j < 8; ++j, data_out <<= 1) { - common_hal_digitalio_digitalinout_set_value(&self->mosi, (data_out >> 7) & 1); - common_hal_digitalio_digitalinout_set_value(&self->clock, 1 - self->polarity); - data_in = (data_in << 1) | common_hal_digitalio_digitalinout_get_value(&self->miso); - common_hal_digitalio_digitalinout_set_value(&self->clock, self->polarity); - } - din[i] = data_in; + for (int j = 0; j < 8; ++j, data_out <<= 1) { + common_hal_digitalio_digitalinout_set_value(&self->mosi, (data_out >> 7) & 1); + common_hal_digitalio_digitalinout_set_value(&self->clock, 1 - self->polarity); + data_in = (data_in << 1) | common_hal_digitalio_digitalinout_get_value(&self->miso); + common_hal_digitalio_digitalinout_set_value(&self->clock, self->polarity); + } + din[i] = data_in; if (dest != NULL) { dest[i] = data_in; @@ -279,20 +279,20 @@ bool shared_module_bitbangio_spi_transfer(bitbangio_spi_obj_t *self, const uint8 for (int j = 0; j < 8; ++j, data_out <<= 1) { common_hal_digitalio_digitalinout_set_value(&self->mosi, (data_out >> 7) & 1); if (self->phase == 0) { - common_hal_mcu_delay_us(delay_half); - common_hal_digitalio_digitalinout_set_value(&self->clock, 1 - self->polarity); - } else { - common_hal_digitalio_digitalinout_set_value(&self->clock, 1 - self->polarity); - common_hal_mcu_delay_us(delay_half); - } - data_in = (data_in << 1) | common_hal_digitalio_digitalinout_get_value(&self->miso); - if (self->phase == 0) { - common_hal_mcu_delay_us(delay_half); - common_hal_digitalio_digitalinout_set_value(&self->clock, self->polarity); - } else { - common_hal_digitalio_digitalinout_set_value(&self->clock, self->polarity); - common_hal_mcu_delay_us(delay_half); - } + common_hal_mcu_delay_us(delay_half); + common_hal_digitalio_digitalinout_set_value(&self->clock, 1 - self->polarity); + } else { + common_hal_digitalio_digitalinout_set_value(&self->clock, 1 - self->polarity); + common_hal_mcu_delay_us(delay_half); + } + data_in = (data_in << 1) | common_hal_digitalio_digitalinout_get_value(&self->miso); + if (self->phase == 0) { + common_hal_mcu_delay_us(delay_half); + common_hal_digitalio_digitalinout_set_value(&self->clock, self->polarity); + } else { + common_hal_digitalio_digitalinout_set_value(&self->clock, self->polarity); + common_hal_mcu_delay_us(delay_half); + } } din[i] = data_in; -- cgit v1.2.3