From 7ad2e6ace34a6d417ec1b84472fa409d5451137b Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott@tannewt.org>
Date: Mon, 22 Oct 2018 17:57:28 -0700
Subject: Add stack validity check and raise an error when it happens.

The backtrace cannot be given because it relies on the validity
of the qstr data structures on the heap which may have been
corrupted.

In fact, it still can crash hard when the bytecode itself is
overwritten. To fix, we'd need a way to skip gathering the
backtrace completely.

This also increases the default stack size on M4s so it can
accomodate the stack needed by ASF4s nvm API.
---
 supervisor/shared/stack.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

(limited to 'supervisor/shared/stack.c')

diff --git a/supervisor/shared/stack.c b/supervisor/shared/stack.c
index 6b74742eb..8f4da4ce6 100755
--- a/supervisor/shared/stack.c
+++ b/supervisor/shared/stack.c
@@ -27,6 +27,7 @@
 #include "stack.h"
 
 #include "py/mpconfig.h"
+#include "py/runtime.h"
 #include "supervisor/cpu.h"
 
 extern uint32_t _estack;
@@ -37,6 +38,8 @@ supervisor_allocation* stack_alloc = NULL;
 
 #define EXCEPTION_STACK_SIZE 1024
 
+#define STACK_CANARY_VALUE 0x017829ef
+
 void allocate_stack(void) {
     mp_uint_t regs[10];
     mp_uint_t sp = cpu_get_regs_and_sp(regs);
@@ -50,6 +53,19 @@ void allocate_stack(void) {
     } else {
         current_stack_size = next_stack_size;
     }
+    *stack_alloc->ptr = STACK_CANARY_VALUE;
+}
+
+inline bool stack_ok(void) {
+    return *stack_alloc->ptr == STACK_CANARY_VALUE;
+}
+
+inline void assert_heap_ok(void) {
+    if (!stack_ok()) {
+        asm("nop");
+        while(true) {}
+        mp_raise_RuntimeError(translate("Stack clobbered heap."));
+    }
 }
 
 void stack_init(void) {
@@ -58,6 +74,7 @@ void stack_init(void) {
 
 void stack_resize(void) {
     if (next_stack_size == current_stack_size) {
+        *stack_alloc->ptr = STACK_CANARY_VALUE;
         return;
     }
     free_memory(stack_alloc);
-- 
cgit v1.2.3


From 6ef863997186e1893cdf19c0e04d0a8a3f33ad9d Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott@tannewt.org>
Date: Thu, 6 Dec 2018 14:24:20 -0800
Subject: Rework safe mode and have heap overwrite trigger it.

This creates a common safe mode mechanic that ports can share.
As a result, the nRF52 now has safe mode support as well.

The common safe mode adds a 700ms delay at startup where a reset
during that window will cause a reset into safe mode. This window
is designated by a yellow status pixel and flashing the single led
three times.

A couple NeoPixel fixes are included for the nRF52 as well.

Fixes #1034. Fixes #990. Fixes #615.
---
 main.c                                             |  59 +++-------
 .../boards/arduino_mkr1300/mpconfigboard.h         |   2 +
 .../atmel-samd/boards/arduino_zero/mpconfigboard.h |   3 +-
 .../circuitplayground_express/mpconfigboard.h      |   2 +
 .../mpconfigboard.h                                |   2 +
 .../boards/feather_m0_adalogger/mpconfigboard.h    |   3 +-
 .../boards/feather_m0_basic/mpconfigboard.h        |   2 +-
 .../boards/feather_m0_express/mpconfigboard.h      |   2 +
 .../feather_m0_express_crickit/mpconfigboard.h     |   2 +
 .../boards/feather_m0_rfm69/mpconfigboard.h        |   2 +-
 .../boards/feather_m0_rfm9x/mpconfigboard.h        |   2 +-
 .../boards/feather_m0_supersized/mpconfigboard.h   |   2 +
 .../boards/feather_m4_express/mpconfigboard.h      |   1 +
 .../feather_radiofruit_zigbee/mpconfigboard.h      |   1 +
 ports/atmel-samd/boards/gemma_m0/mpconfigboard.h   |   2 +
 .../boards/grandcentral_m4_express/mpconfigboard.h |   2 +
 .../boards/hallowing_m0_express/mpconfigboard.h    |   1 +
 .../boards/itsybitsy_m0_express/mpconfigboard.h    |   2 +
 .../boards/itsybitsy_m4_express/mpconfigboard.h    |   2 +
 ports/atmel-samd/boards/meowmeow/mpconfigboard.h   |   2 +
 .../boards/metro_m0_express/mpconfigboard.h        |   1 +
 .../boards/metro_m4_express/mpconfigboard.h        |   2 +
 .../atmel-samd/boards/mini_sam_m4/mpconfigboard.h  |   2 +
 ports/atmel-samd/boards/trinket_m0/mpconfigboard.h |   2 +
 .../boards/trinket_m0_haxpress/mpconfigboard.h     |   1 +
 ports/atmel-samd/supervisor/port.c                 |  68 ++++-------
 ports/nrf/boards/feather_nrf52832/mpconfigboard.h  |   2 +
 .../feather_nrf52840_express/mpconfigboard.h       |   2 +
 ports/nrf/boards/particle_argon/mpconfigboard.h    |   2 +
 ports/nrf/boards/particle_boron/mpconfigboard.h    |   2 +
 ports/nrf/boards/particle_xenon/mpconfigboard.h    |   2 +
 ports/nrf/boards/pca10040/mpconfigboard.h          |   2 +
 ports/nrf/boards/pca10040/pins.c                   |   4 +
 ports/nrf/boards/pca10056/mpconfigboard.h          |   2 +
 ports/nrf/boards/pca10059/mpconfigboard.h          |   2 +
 ports/nrf/common-hal/neopixel_write/__init__.c     |  23 +++-
 ports/nrf/peripherals/nrf/clocks.c                 |   3 +
 ports/nrf/supervisor/port.c                        |  49 ++++----
 py/obj.c                                           |   2 +
 supervisor/port.h                                  |  18 ++-
 supervisor/shared/rgb_led_status.h                 |   2 +
 supervisor/shared/safe_mode.c                      | 126 +++++++++++++++++++++
 supervisor/shared/safe_mode.h                      |  47 ++++++++
 supervisor/shared/stack.c                          |   7 +-
 supervisor/shared/stack.h                          |   4 +-
 supervisor/shared/translate.c                      |   8 ++
 supervisor/shared/translate.h                      |   2 +-
 supervisor/supervisor.mk                           |   1 +
 48 files changed, 351 insertions(+), 133 deletions(-)
 create mode 100644 supervisor/shared/safe_mode.c
 create mode 100644 supervisor/shared/safe_mode.h

(limited to 'supervisor/shared/stack.c')

diff --git a/main.c b/main.c
index 00babd20c..aac2c5566 100755
--- a/main.c
+++ b/main.c
@@ -51,6 +51,7 @@
 #include "supervisor/shared/autoreload.h"
 #include "supervisor/shared/translate.h"
 #include "supervisor/shared/rgb_led_status.h"
+#include "supervisor/shared/safe_mode.h"
 #include "supervisor/shared/status_leds.h"
 #include "supervisor/shared/stack.h"
 #include "supervisor/serial.h"
@@ -140,12 +141,6 @@ const char* first_existing_file_in_list(const char ** filenames) {
     return NULL;
 }
 
-void write_compressed(const compressed_string_t* compressed) {
-    char decompressed[compressed->length];
-    decompress(compressed, decompressed);
-    serial_write(decompressed);
-}
-
 bool maybe_run_list(const char ** filenames, pyexec_result_t* exec_result) {
     const char* filename = first_existing_file_in_list(filenames);
     if (filename == NULL) {
@@ -166,11 +161,11 @@ bool run_code_py(safe_mode_t safe_mode) {
     if (serial_connected_at_start) {
         serial_write("\n");
         if (autoreload_is_enabled()) {
-            write_compressed(translate("Auto-reload is on. Simply save files over USB to run them or enter REPL to disable.\n"));
+            serial_write_compressed(translate("Auto-reload is on. Simply save files over USB to run them or enter REPL to disable.\n"));
         } else if (safe_mode != NO_SAFE_MODE) {
-            write_compressed(translate("Running in safe mode! Auto-reload is off.\n"));
+            serial_write_compressed(translate("Running in safe mode! Auto-reload is off.\n"));
         } else if (!autoreload_is_enabled()) {
-            write_compressed(translate("Auto-reload is off.\n"));
+            serial_write_compressed(translate("Auto-reload is off.\n"));
         }
     }
     #endif
@@ -184,7 +179,7 @@ bool run_code_py(safe_mode_t safe_mode) {
     bool found_main = false;
 
     if (safe_mode != NO_SAFE_MODE) {
-        write_compressed(translate("Running in safe mode! Not running saved code.\n"));
+        serial_write_compressed(translate("Running in safe mode! Not running saved code.\n"));
     } else {
         new_status_color(MAIN_RUNNING);
 
@@ -200,7 +195,7 @@ bool run_code_py(safe_mode_t safe_mode) {
         if (!found_main){
             found_main = maybe_run_list(double_extension_filenames, &result);
             if (found_main) {
-                write_compressed(translate("WARNING: Your code filename has two extensions\n"));
+                serial_write_compressed(translate("WARNING: Your code filename has two extensions\n"));
             }
         }
         stop_mp();
@@ -239,37 +234,14 @@ bool run_code_py(safe_mode_t safe_mode) {
 
             if (!serial_connected_at_start) {
                 if (autoreload_is_enabled()) {
-                    write_compressed(translate("Auto-reload is on. Simply save files over USB to run them or enter REPL to disable.\n"));
+                    serial_write_compressed(translate("Auto-reload is on. Simply save files over USB to run them or enter REPL to disable.\n"));
                 } else {
-                    write_compressed(translate("Auto-reload is off.\n"));
-                }
-            }
-            // Output a user safe mode string if its set.
-            #ifdef BOARD_USER_SAFE_MODE
-            if (safe_mode == USER_SAFE_MODE) {
-                serial_write("\n");
-                write_compressed(translate("You requested starting safe mode by "));
-                serial_write(BOARD_USER_SAFE_MODE_ACTION);
-                serial_write("\n");
-                write_compressed(translate("To exit, please reset the board without "));
-                serial_write(BOARD_USER_SAFE_MODE_ACTION);
-                serial_write("\n");
-            } else
-            #endif
-            if (safe_mode != NO_SAFE_MODE) {
-                serial_write("\n");
-                write_compressed(translate("You are running in safe mode which means something really bad happened.\n"));
-                if (safe_mode == HARD_CRASH) {
-                    write_compressed(translate("Looks like our core CircuitPython code crashed hard. Whoops!\n"));
-                    write_compressed(translate("Please file an issue here with the contents of your CIRCUITPY drive:\n"));
-                    serial_write("https://github.com/adafruit/circuitpython/issues\n");
-                } else if (safe_mode == BROWNOUT) {
-                    write_compressed(translate("The microcontroller's power dipped. Please make sure your power supply provides\n"));
-                    write_compressed(translate("enough power for the whole circuit and press reset (after ejecting CIRCUITPY).\n"));
+                    serial_write_compressed(translate("Auto-reload is off.\n"));
                 }
             }
+            print_safe_mode_message(safe_mode);
             serial_write("\n");
-            write_compressed(translate("Press any key to enter the REPL. Use CTRL-D to reload."));
+            serial_write_compressed(translate("Press any key to enter the REPL. Use CTRL-D to reload."));
         }
         if (serial_connected_before_animation && !serial_connected()) {
             serial_connected_at_start = false;
@@ -394,6 +366,11 @@ int __attribute__((used)) main(void) {
     init_status_leds();
     rgb_led_status_init();
 
+    // Wait briefly to give a reset window where we'll enter safe mode after the reset.
+    if (safe_mode == NO_SAFE_MODE) {
+        safe_mode = wait_for_safe_mode_reset();
+    }
+
     stack_init();
 
     // Create a new filesystem only if we're not in a safe mode.
@@ -427,7 +404,7 @@ int __attribute__((used)) main(void) {
         }
         if (exit_code == PYEXEC_FORCED_EXIT) {
             if (!first_run) {
-                write_compressed(translate("soft reboot\n"));
+                serial_write_compressed(translate("soft reboot\n"));
             }
             first_run = false;
             skip_repl = run_code_py(safe_mode);
@@ -455,12 +432,12 @@ void gc_collect(void) {
 }
 
 void NORETURN nlr_jump_fail(void *val) {
-    HardFault_Handler();
+    reset_into_safe_mode(MICROPY_NLR_JUMP_FAIL);
     while (true) {}
 }
 
 void NORETURN __fatal_error(const char *msg) {
-    HardFault_Handler();
+    reset_into_safe_mode(MICROPY_FATAL_ERROR);
     while (true) {}
 }
 
diff --git a/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.h b/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.h
index 1e8d926fd..1deda871a 100644
--- a/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.h
+++ b/ports/atmel-samd/boards/arduino_mkr1300/mpconfigboard.h
@@ -5,6 +5,8 @@
 #define MICROPY_PORT_B        (0)
 #define MICROPY_PORT_C        (0)
 
+#define MICROPY_HW_LED_STATUS   (&pin_PB23)
+
 #define CIRCUITPY_INTERNAL_NVM_SIZE 0
 
 #define BOARD_FLASH_SIZE (0x00040000 - 0x2000 - 0x010000)
diff --git a/ports/atmel-samd/boards/arduino_zero/mpconfigboard.h b/ports/atmel-samd/boards/arduino_zero/mpconfigboard.h
index 9a6256c68..7ab09d447 100644
--- a/ports/atmel-samd/boards/arduino_zero/mpconfigboard.h
+++ b/ports/atmel-samd/boards/arduino_zero/mpconfigboard.h
@@ -1,7 +1,8 @@
 #define MICROPY_HW_BOARD_NAME "Arduino Zero"
 #define MICROPY_HW_MCU_NAME "samd21g18"
 
-// #define MICROPY_HW_LED_MSC  &pin_PA17 // red
+#define MICROPY_HW_LED_STATUS   (&pin_PA17)
+
 #define MICROPY_HW_LED_TX   &pin_PA27
 #define MICROPY_HW_LED_RX   &pin_PB03
 
diff --git a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h
index 2ad13e81c..e6a7e0676 100644
--- a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h
+++ b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.h
@@ -1,6 +1,8 @@
 #define MICROPY_HW_BOARD_NAME "Adafruit CircuitPlayground Express"
 #define MICROPY_HW_MCU_NAME "samd21g18"
 
+#define MICROPY_HW_LED_STATUS   (&pin_PA17)
+
 // Don't allow touch on A0 (PA02), because it's connected to the speaker.
 #define PA02_NO_TOUCH       (true)
 
diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h
index 250300858..e66d9c40e 100644
--- a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h
+++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.h
@@ -1,6 +1,8 @@
 #define MICROPY_HW_BOARD_NAME "Adafruit CircuitPlayground Express with Crickit libraries"
 #define MICROPY_HW_MCU_NAME "samd21g18"
 
+#define MICROPY_HW_LED_STATUS   (&pin_PA17)
+
 // No framebuf on CRICKit version to save space.
 #define MICROPY_PY_FRAMEBUF         (0)
 
diff --git a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h
index c28c4aafb..787a3ee55 100644
--- a/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h
+++ b/ports/atmel-samd/boards/feather_m0_adalogger/mpconfigboard.h
@@ -1,5 +1,6 @@
 // LEDs
-//#define MICROPY_HW_LED_MSC              PIN_PA17 // red
+#define MICROPY_HW_LED_STATUS   (&pin_PA17)
+
 #define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 Adalogger"
 #define MICROPY_HW_MCU_NAME "samd21g18"
 
diff --git a/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.h
index d66efb36f..2a21b8f02 100644
--- a/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.h
+++ b/ports/atmel-samd/boards/feather_m0_basic/mpconfigboard.h
@@ -1,5 +1,5 @@
 // LEDs
-//#define MICROPY_HW_LED_MSC              PIN_PA17 // red
+#define MICROPY_HW_LED_STATUS   (&pin_PA17)
 
 #define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 Basic"
 #define MICROPY_HW_MCU_NAME "samd21g18"
diff --git a/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h
index 1f02ee995..7c10a92ec 100644
--- a/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h
+++ b/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h
@@ -1,6 +1,8 @@
 #define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 Express"
 #define MICROPY_HW_MCU_NAME "samd21g18"
 
+#define MICROPY_HW_LED_STATUS   (&pin_PA17)
+
 #define MICROPY_HW_NEOPIXEL (&pin_PA06)
 
 #define SPI_FLASH_MOSI_PIN          &pin_PA08
diff --git a/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.h
index b5544e253..abbf0b08c 100644
--- a/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.h
+++ b/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.h
@@ -1,6 +1,8 @@
 #define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 Express with Crickit libraries"
 #define MICROPY_HW_MCU_NAME "samd21g18"
 
+#define MICROPY_HW_LED_STATUS   (&pin_PA17)
+
 #define MICROPY_HW_NEOPIXEL (&pin_PA06)
 
 #define SPI_FLASH_MOSI_PIN          &pin_PA08
diff --git a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.h
index c385a97ea..a0f79ed72 100644
--- a/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.h
+++ b/ports/atmel-samd/boards/feather_m0_rfm69/mpconfigboard.h
@@ -1,5 +1,5 @@
 // LEDs
-//#define MICROPY_HW_LED_MSC              PIN_PA17 // red
+#define MICROPY_HW_LED_STATUS   (&pin_PA17)
 
 #define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 RFM69"
 #define MICROPY_HW_MCU_NAME "samd21g18"
diff --git a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.h
index 1e3a0bda0..85c24bfd0 100644
--- a/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.h
+++ b/ports/atmel-samd/boards/feather_m0_rfm9x/mpconfigboard.h
@@ -1,5 +1,5 @@
 // LEDs
-//#define MICROPY_HW_LED_MSC              PIN_PA17 // red
+#define MICROPY_HW_LED_STATUS   (&pin_PA17)
 
 #define MICROPY_HW_BOARD_NAME "Adafruit Feather M0 RFM9x"
 #define MICROPY_HW_MCU_NAME "samd21g18"
diff --git a/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.h
index 6bf1df156..5ad265bf1 100644
--- a/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.h
+++ b/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.h
@@ -3,6 +3,8 @@
 #define MICROPY_HW_BOARD_NAME "Hacked Feather M0 Express with 8Mbyte SPI flash"
 #define MICROPY_HW_MCU_NAME "samd21g18"
 
+#define MICROPY_HW_LED_STATUS   (&pin_PA17)
+
 #define MICROPY_HW_NEOPIXEL (&pin_PA06)
 
 #define SPI_FLASH_MOSI_PIN          &pin_PA08
diff --git a/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.h b/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.h
index 98906a844..ed1dfe763 100644
--- a/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.h
+++ b/ports/atmel-samd/boards/feather_m4_express/mpconfigboard.h
@@ -5,6 +5,7 @@
 
 // Rev E
 
+#define MICROPY_HW_LED_STATUS   (&pin_PA23)
 #define MICROPY_HW_NEOPIXEL (&pin_PB03)
 
 // These are pins not to reset.
diff --git a/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.h b/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.h
index c4e025178..7df31f3a9 100755
--- a/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.h
+++ b/ports/atmel-samd/boards/feather_radiofruit_zigbee/mpconfigboard.h
@@ -1,6 +1,7 @@
 #define MICROPY_HW_BOARD_NAME "Adafruit Feather RadioFruit Zigbee"
 #define MICROPY_HW_MCU_NAME "samr21g18"
 
+#define MICROPY_HW_LED_STATUS   (&pin_PA27)
 #define MICROPY_HW_NEOPIXEL (&pin_PA22)
 
 #define SPI_FLASH_MOSI_PIN          &pin_PA31
diff --git a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.h b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.h
index 08d1803f2..59e0b3c61 100644
--- a/ports/atmel-samd/boards/gemma_m0/mpconfigboard.h
+++ b/ports/atmel-samd/boards/gemma_m0/mpconfigboard.h
@@ -1,6 +1,8 @@
 #define MICROPY_HW_BOARD_NAME "Adafruit Gemma M0"
 #define MICROPY_HW_MCU_NAME "samd21e18"
 
+#define MICROPY_HW_LED_STATUS   (&pin_PA23)
+
 #define MICROPY_HW_APA102_MOSI   (&pin_PA00)
 #define MICROPY_HW_APA102_SCK    (&pin_PA01)
 
diff --git a/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.h b/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.h
index 57078eaea..e1bef0019 100644
--- a/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.h
+++ b/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.h
@@ -5,6 +5,8 @@
 
 // This is for Rev B which is green and has the SD card slot at the edge of the board.
 
+#define MICROPY_HW_LED_STATUS   (&pin_PB01)
+
 #define MICROPY_HW_LED_TX   &(pin_PC30)
 #define MICROPY_HW_LED_RX   &(pin_PC31)
 
diff --git a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h
index 5869c01ff..1a570092b 100644
--- a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h
+++ b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.h
@@ -1,6 +1,7 @@
 #define MICROPY_HW_BOARD_NAME "HalloWing M0 Express"
 #define MICROPY_HW_MCU_NAME "samd21g18"
 
+#define MICROPY_HW_LED_STATUS   (&pin_PA23)
 #define MICROPY_HW_NEOPIXEL (&pin_PA12)
 
 #define SPI_FLASH_MOSI_PIN          &pin_PB10
diff --git a/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.h
index 4de28d388..530e7e4c3 100644
--- a/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.h
+++ b/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.h
@@ -1,6 +1,8 @@
 #define MICROPY_HW_BOARD_NAME "Adafruit ItsyBitsy M0 Express"
 #define MICROPY_HW_MCU_NAME "samd21g18"
 
+#define MICROPY_HW_LED_STATUS   (&pin_PA17)
+
 #define CIRCUITPY_BITBANG_APA102
 #define MICROPY_HW_APA102_MOSI   (&pin_PA01)
 #define MICROPY_HW_APA102_SCK    (&pin_PA00)
diff --git a/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.h b/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.h
index 5bbfec9ce..f4d17ac64 100644
--- a/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.h
+++ b/ports/atmel-samd/boards/itsybitsy_m4_express/mpconfigboard.h
@@ -4,6 +4,8 @@
 #define CIRCUITPY_MCU_FAMILY samd51
 
 // This is for Rev B
+#define MICROPY_HW_LED_STATUS   (&pin_PA22)
+
 #define MICROPY_HW_APA102_MOSI   (&pin_PB03)
 #define MICROPY_HW_APA102_SCK    (&pin_PB02)
 
diff --git a/ports/atmel-samd/boards/meowmeow/mpconfigboard.h b/ports/atmel-samd/boards/meowmeow/mpconfigboard.h
index f07eb9cce..fe741a0f7 100644
--- a/ports/atmel-samd/boards/meowmeow/mpconfigboard.h
+++ b/ports/atmel-samd/boards/meowmeow/mpconfigboard.h
@@ -1,6 +1,8 @@
 #define MICROPY_HW_BOARD_NAME "Meow Meow"
 #define MICROPY_HW_MCU_NAME "samd21g18"
 
+#define MICROPY_HW_LED_STATUS   (&pin_PB23)
+
 // These are pins not to reset.
 #define MICROPY_PORT_A        (0)
 #define MICROPY_PORT_B        (0)
diff --git a/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h
index f08d129dc..4835ee7d2 100644
--- a/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h
+++ b/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h
@@ -1,6 +1,7 @@
 #define MICROPY_HW_BOARD_NAME "Adafruit Metro M0 Express"
 #define MICROPY_HW_MCU_NAME "samd21g18"
 
+#define MICROPY_HW_LED_STATUS   (&pin_PA17)
 #define MICROPY_HW_LED_TX   &pin_PA27
 // Comment this out if you have trouble connecting over SWD. It's one of the SWD pins.
 #define MICROPY_HW_LED_RX   &pin_PA31
diff --git a/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.h b/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.h
index 06feb1a22..073468899 100644
--- a/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.h
+++ b/ports/atmel-samd/boards/metro_m4_express/mpconfigboard.h
@@ -8,6 +8,8 @@
 #define MICROPY_HW_LED_TX   (&pin_PA27)
 #define MICROPY_HW_LED_RX   (&pin_PB06)
 
+#define MICROPY_HW_LED_STATUS   (&pin_PA16)
+
 #define MICROPY_HW_NEOPIXEL (&pin_PB22)
 
 // These are pins not to reset.
diff --git a/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.h b/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.h
index 338e8b7c9..cd754924e 100644
--- a/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.h
+++ b/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.h
@@ -3,6 +3,8 @@
 
 #define CIRCUITPY_MCU_FAMILY samd51
 
+#define MICROPY_HW_LED_STATUS   (&pin_PA15)
+
 // RGB Status LED Pins
 #define MICROPY_HW_APA102_MOSI   (&pin_PB03)
 #define MICROPY_HW_APA102_SCK    (&pin_PB02)
diff --git a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.h b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.h
index c311f540c..cef35983e 100644
--- a/ports/atmel-samd/boards/trinket_m0/mpconfigboard.h
+++ b/ports/atmel-samd/boards/trinket_m0/mpconfigboard.h
@@ -2,6 +2,8 @@
 #define MICROPY_HW_MCU_NAME "samd21e18"
 
 // Rev B - Black
+#define MICROPY_HW_LED_STATUS   (&pin_PA10)
+
 #define MICROPY_HW_APA102_MOSI   (&pin_PA00)
 #define MICROPY_HW_APA102_SCK    (&pin_PA01)
 
diff --git a/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.h b/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.h
index dfbd873b6..369d84b8b 100644
--- a/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.h
+++ b/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.h
@@ -2,6 +2,7 @@
 #define MICROPY_HW_MCU_NAME "samd21e18"
 
 // Rev B - Black
+#define MICROPY_HW_LED_STATUS   (&pin_PA10)
 // #define MICROPY_HW_APA102_MOSI   (&pin_PA00)
 // #define MICROPY_HW_APA102_SCK    (&pin_PA01)
 
diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c
index 7b51400ef..941838618 100644
--- a/ports/atmel-samd/supervisor/port.c
+++ b/ports/atmel-samd/supervisor/port.c
@@ -64,6 +64,9 @@
 #include "reset.h"
 #include "tick.h"
 
+#include "supervisor/shared/safe_mode.h"
+#include "supervisor/shared/stack.h"
+
 #include "tusb.h"
 
 #ifdef CIRCUITPY_GAMEPAD_TICKS
@@ -153,35 +156,6 @@ safe_mode_t port_init(void) {
     samd_peripherals_enable_cache();
 #endif
 
-// On power on start or external reset, set _ezero to the canary word. If it
-// gets killed, we boot in safe mode. _ezero is the boundary between statically
-// allocated memory including the fixed MicroPython heap and the stack. If either
-// misbehaves, the canary will not be intact after soft reset.
-#ifdef CIRCUITPY_CANARY_WORD
-#ifdef SAMD21
-    bool power_on_or_external_reset = hri_pm_get_RCAUSE_POR_bit(PM) || hri_pm_get_RCAUSE_EXT_bit(PM);
-    bool system_reset = hri_pm_get_RCAUSE_SYST_bit(PM);
-#endif
-#ifdef SAMD51
-    bool power_on_or_external_reset = hri_rstc_get_RCAUSE_POR_bit(RSTC) || hri_rstc_get_RCAUSE_EXT_bit(RSTC);
-    bool system_reset = hri_rstc_get_RCAUSE_SYST_bit(RSTC);
-#endif
-   if (power_on_or_external_reset) {
-        _ezero = CIRCUITPY_CANARY_WORD;
-    } else if (system_reset) {
-        // If we're starting from a system reset we're likely coming from the
-        // bootloader or hard fault handler. If we're coming from the handler
-        // the canary will be CIRCUITPY_SAFE_RESTART_WORD and we don't want to
-        // revive the canary so that a second hard fault won't restart. Resets
-        // from anywhere else are ok.
-        if (_ezero == CIRCUITPY_SAFE_RESTART_WORD) {
-            _ezero = ~CIRCUITPY_CANARY_WORD;
-        } else {
-            _ezero = CIRCUITPY_CANARY_WORD;
-        }
-    }
-#endif
-
 #ifdef SAMD21
     hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, 2);
     _pm_init();
@@ -200,13 +174,6 @@ safe_mode_t port_init(void) {
     // Init the board last so everything else is ready
     board_init();
 
-    #ifdef CIRCUITPY_CANARY_WORD
-    // Run in safe mode if the canary is corrupt.
-    if (_ezero != CIRCUITPY_CANARY_WORD) {
-        return HARD_CRASH;
-    }
-    #endif
-
     #ifdef SAMD21
     if (PM->RCAUSE.bit.BOD33 == 1 || PM->RCAUSE.bit.BOD12 == 1) {
         return BROWNOUT;
@@ -280,6 +247,20 @@ void reset_to_bootloader(void) {
     reset();
 }
 
+void reset_cpu(void) {
+    reset();
+}
+
+extern uint32_t _ebss;
+// Place the word to save just after our BSS section that gets blanked.
+void port_set_saved_word(uint32_t value) {
+    _ebss = value;
+}
+
+uint32_t port_get_saved_word(void) {
+    return _ebss;
+}
+
 /**
  * \brief Default interrupt handler for unused IRQs.
  */
@@ -290,18 +271,9 @@ __attribute__((used)) void HardFault_Handler(void)
     // loop below.
     REG_MTB_MASTER = 0x00000000 + 6;
 #endif
-#ifdef CIRCUITPY_CANARY_WORD
-    // If the canary is intact, then kill it and reset so we have a chance to
-    // read our files.
-    if (_ezero == CIRCUITPY_CANARY_WORD) {
-        _ezero = CIRCUITPY_SAFE_RESTART_WORD;
-        NVIC_SystemReset();
-    }
-#endif
+
+    reset_into_safe_mode(HARD_CRASH);
     while (true) {
-        asm("");
-    }
-    for (uint32_t i = 0; i < 100000; i++) {
-        asm("noop;");
+        asm("nop;");
     }
 }
diff --git a/ports/nrf/boards/feather_nrf52832/mpconfigboard.h b/ports/nrf/boards/feather_nrf52832/mpconfigboard.h
index e751ec182..4959e1ca9 100644
--- a/ports/nrf/boards/feather_nrf52832/mpconfigboard.h
+++ b/ports/nrf/boards/feather_nrf52832/mpconfigboard.h
@@ -28,6 +28,8 @@
 #define MICROPY_HW_MCU_NAME         "nRF52832"
 #define MICROPY_PY_SYS_PLATFORM     "nRF52"
 
+#define MICROPY_HW_LED_STATUS       (&pin_P0_17)
+
 #define MICROPY_HW_UART_RX          NRF_GPIO_PIN_MAP(0, 8)
 #define MICROPY_HW_UART_TX          NRF_GPIO_PIN_MAP(0, 6)
 
diff --git a/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h
index bd1cad504..da72c085e 100644
--- a/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h
+++ b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h
@@ -35,6 +35,8 @@
 
 #define MICROPY_HW_NEOPIXEL         (&pin_P0_16)
 
+#define MICROPY_HW_LED_STATUS       (&pin_P1_15)
+
 #ifdef QSPI_FLASH_FILESYSTEM
 #define MICROPY_QSPI_DATA0                NRF_GPIO_PIN_MAP(0, 17)
 #define MICROPY_QSPI_DATA1                NRF_GPIO_PIN_MAP(0, 22)
diff --git a/ports/nrf/boards/particle_argon/mpconfigboard.h b/ports/nrf/boards/particle_argon/mpconfigboard.h
index 4a5c1b0c8..bd9a46349 100644
--- a/ports/nrf/boards/particle_argon/mpconfigboard.h
+++ b/ports/nrf/boards/particle_argon/mpconfigboard.h
@@ -33,6 +33,8 @@
 #define MICROPY_HW_MCU_NAME         "nRF52840"
 #define MICROPY_PY_SYS_PLATFORM     "Particle Argon"
 
+#define MICROPY_HW_LED_STATUS          (&pin_P1_12)
+
 #define MICROPY_HW_RGB_LED_RED         (&pin_P0_13)
 #define MICROPY_HW_RGB_LED_GREEN       (&pin_P0_14)
 #define MICROPY_HW_RGB_LED_BLUE        (&pin_P0_15)
diff --git a/ports/nrf/boards/particle_boron/mpconfigboard.h b/ports/nrf/boards/particle_boron/mpconfigboard.h
index ac5caee0f..ed675c811 100644
--- a/ports/nrf/boards/particle_boron/mpconfigboard.h
+++ b/ports/nrf/boards/particle_boron/mpconfigboard.h
@@ -33,6 +33,8 @@
 #define MICROPY_HW_MCU_NAME         "nRF52840"
 #define MICROPY_PY_SYS_PLATFORM     "Particle Boron"
 
+#define MICROPY_HW_LED_STATUS          (&pin_P1_12)
+
 #define MICROPY_HW_RGB_LED_RED         (&pin_P0_13)
 #define MICROPY_HW_RGB_LED_GREEN       (&pin_P0_14)
 #define MICROPY_HW_RGB_LED_BLUE        (&pin_P0_15)
diff --git a/ports/nrf/boards/particle_xenon/mpconfigboard.h b/ports/nrf/boards/particle_xenon/mpconfigboard.h
index d3ce22327..0b119b8bf 100644
--- a/ports/nrf/boards/particle_xenon/mpconfigboard.h
+++ b/ports/nrf/boards/particle_xenon/mpconfigboard.h
@@ -33,6 +33,8 @@
 #define MICROPY_HW_MCU_NAME         "nRF52840"
 #define MICROPY_PY_SYS_PLATFORM     "Particle Xenon"
 
+#define MICROPY_HW_LED_STATUS          (&pin_P1_12)
+
 #define MICROPY_HW_RGB_LED_RED         (&pin_P0_13)
 #define MICROPY_HW_RGB_LED_GREEN       (&pin_P0_14)
 #define MICROPY_HW_RGB_LED_BLUE        (&pin_P0_15)
diff --git a/ports/nrf/boards/pca10040/mpconfigboard.h b/ports/nrf/boards/pca10040/mpconfigboard.h
index ebf808ce2..396102832 100644
--- a/ports/nrf/boards/pca10040/mpconfigboard.h
+++ b/ports/nrf/boards/pca10040/mpconfigboard.h
@@ -29,6 +29,8 @@
 #define MICROPY_HW_MCU_NAME         "nRF52832"
 #define MICROPY_PY_SYS_PLATFORM     "nRF52-DK"
 
+#define MICROPY_HW_LED_STATUS          (&pin_P0_17)
+
 #define MICROPY_HW_UART_RX          NRF_GPIO_PIN_MAP(0, 8)
 #define MICROPY_HW_UART_TX          NRF_GPIO_PIN_MAP(0, 6)
 #define MICROPY_HW_UART_HWFC        (0)
diff --git a/ports/nrf/boards/pca10040/pins.c b/ports/nrf/boards/pca10040/pins.c
index 9671358c9..95acd8ffd 100644
--- a/ports/nrf/boards/pca10040/pins.c
+++ b/ports/nrf/boards/pca10040/pins.c
@@ -21,9 +21,13 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) },
     { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) },
     { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) },
+    { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_17) },
     { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) },
+    { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_P0_18) },
     { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) },
+    { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_P0_19) },
     { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) },
+    { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_P0_20) },
     { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) },
     { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) },
     { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) },
diff --git a/ports/nrf/boards/pca10056/mpconfigboard.h b/ports/nrf/boards/pca10056/mpconfigboard.h
index 83c3f66c1..8d420721f 100644
--- a/ports/nrf/boards/pca10056/mpconfigboard.h
+++ b/ports/nrf/boards/pca10056/mpconfigboard.h
@@ -33,6 +33,8 @@
 #define PORT_HEAP_SIZE              (128 * 1024)
 #define CIRCUITPY_AUTORELOAD_DELAY_MS 500
 
+#define MICROPY_HW_LED_STATUS          (&pin_P0_13)
+
 #define DEFAULT_I2C_BUS_SCL         (&pin_P0_27)
 #define DEFAULT_I2C_BUS_SDA         (&pin_P0_26)
 
diff --git a/ports/nrf/boards/pca10059/mpconfigboard.h b/ports/nrf/boards/pca10059/mpconfigboard.h
index b248011ec..03abd65e8 100644
--- a/ports/nrf/boards/pca10059/mpconfigboard.h
+++ b/ports/nrf/boards/pca10059/mpconfigboard.h
@@ -28,5 +28,7 @@
 #define MICROPY_HW_MCU_NAME         "nRF52840"
 #define MICROPY_PY_SYS_PLATFORM     "nRF52840-DK"
 
+#define MICROPY_HW_LED_STATUS          (&pin_P0_06)
+
 #define PORT_HEAP_SIZE              (128 * 1024)
 #define CIRCUITPY_AUTORELOAD_DELAY_MS 500
diff --git a/ports/nrf/common-hal/neopixel_write/__init__.c b/ports/nrf/common-hal/neopixel_write/__init__.c
index c4cb194f3..c9da436b8 100644
--- a/ports/nrf/common-hal/neopixel_write/__init__.c
+++ b/ports/nrf/common-hal/neopixel_write/__init__.c
@@ -28,6 +28,8 @@
 #include "shared-bindings/neopixel_write/__init__.h"
 #include "nrf_pwm.h"
 
+#include "tick.h"
+
 // https://github.com/adafruit/Adafruit_NeoPixel/blob/master/Adafruit_NeoPixel.cpp
 // [[[Begin of the Neopixel NRF52 EasyDMA implementation
 //                                    by the Hackerspace San Salvador]]]
@@ -95,6 +97,9 @@ static NRF_PWM_Type* find_free_pwm (void) {
     return NULL;
 }
 
+uint64_t next_start_tick_ms = 0;
+uint32_t next_start_tick_us = 1000;
+
 void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, uint32_t numBytes) {
     // To support both the SoftDevice + Neopixels we use the EasyDMA
     // feature from the NRF25. However this technique implies to
@@ -117,7 +122,7 @@ void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout
 
     // only malloc if there is PWM device available
     if ( pwm != NULL ) {
-        if (numBytes == 4) {
+        if (pattern_size <= sizeof(one_pixel) * sizeof(uint32_t)) {
             pixels_pattern = (uint16_t *) one_pixel;
         } else {
             pixels_pattern = (uint16_t *) m_malloc_maybe(pattern_size, false);
@@ -125,6 +130,9 @@ void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout
         }
     }
 
+    // Wait to make sure we don't append onto the last transmission.
+    wait_until(next_start_tick_ms, next_start_tick_us);
+
     // Use the identified device to choose the implementation
     // If a PWM device is available use DMA
     if ( (pixels_pattern != NULL) && (pwm != NULL) ) {
@@ -140,8 +148,8 @@ void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout
         }
 
         // Zero padding to indicate the end of sequence
-        pixels_pattern[++pos] = 0 | (0x8000);  // Seq end
-        pixels_pattern[++pos] = 0 | (0x8000);  // Seq end
+        pixels_pattern[pos++] = 0 | (0x8000);  // Seq end
+        pixels_pattern[pos++] = 0 | (0x8000);  // Seq end
 
         // Set the wave mode to count UP
         // Set the PWM to use the 16MHz clock
@@ -274,4 +282,13 @@ void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout
         // Enable interrupts again
         __enable_irq();
     }
+
+    // Update the next start.
+    current_tick(&next_start_tick_ms, &next_start_tick_us);
+    if (next_start_tick_us < 100) {
+        next_start_tick_ms += 1;
+        next_start_tick_us = 100 - next_start_tick_us;
+    } else {
+        next_start_tick_us -= 100;
+    }
 }
diff --git a/ports/nrf/peripherals/nrf/clocks.c b/ports/nrf/peripherals/nrf/clocks.c
index 811c0161a..4acb878db 100644
--- a/ports/nrf/peripherals/nrf/clocks.c
+++ b/ports/nrf/peripherals/nrf/clocks.c
@@ -32,4 +32,7 @@ void nrf_peripherals_clocks_init(void) {
     // generalized.
     NRF_CLOCK->LFCLKSRC = (uint32_t)((CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk);
     NRF_CLOCK->TASKS_LFCLKSTART = 1UL;
+
+    // Wait for clocks to start.
+    while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) {}
 }
diff --git a/ports/nrf/supervisor/port.c b/ports/nrf/supervisor/port.c
index fcb3ae55c..fe7458a27 100644
--- a/ports/nrf/supervisor/port.c
+++ b/ports/nrf/supervisor/port.c
@@ -28,6 +28,9 @@
 #include "supervisor/port.h"
 #include "boards/board.h"
 
+#include "nrfx/hal/nrf_power.h"
+#include "nrfx/drivers/include/nrfx_power.h"
+
 #include "nrf/cache.h"
 #include "nrf/clocks.h"
 #include "nrf/power.h"
@@ -41,37 +44,32 @@
 #include "common-hal/pulseio/PulseOut.h"
 #include "tick.h"
 
-safe_mode_t port_init(void) {
+static void power_warning_handler(void) {
+    reset_into_safe_mode(BROWNOUT);
+}
 
+safe_mode_t port_init(void) {
     nrf_peripherals_clocks_init();
 
     // If GPIO voltage is set wrong in UICR, this will fix it, and
     // will also do a reset to make the change take effect.
     nrf_peripherals_power_init();
 
+    nrfx_power_pofwarn_config_t power_failure_config;
+    power_failure_config.handler = power_warning_handler;
+    power_failure_config.thr = NRF_POWER_POFTHR_V27;
+    power_failure_config.thrvddh = NRF_POWER_POFTHRVDDH_V27;
+    nrfx_power_pof_init(&power_failure_config);
+    nrfx_power_pof_enable(&power_failure_config);
+
     nrf_peripherals_enable_cache();
 
     // Configure millisecond timer initialization.
     tick_init();
 
-#if 0
-    #ifdef CIRCUITPY_CANARY_WORD
-    // Run in safe mode if the canary is corrupt.
-    if (_ezero != CIRCUITPY_CANARY_WORD) {
-        return HARD_CRASH;
-    }
-    #endif
-#endif
-
     // Will do usb_init() if chip supports USB.
     board_init();
 
-#if 0
-    if (board_requests_safe_mode()) {
-        return USER_SAFE_MODE;
-    }
-#endif
-
     return NO_SAFE_MODE;
 }
 
@@ -93,13 +91,26 @@ void reset_to_bootloader(void) {
     enum { DFU_MAGIC_SERIAL = 0x4e };
 
     NRF_POWER->GPREGRET = DFU_MAGIC_SERIAL;
+    reset_cpu();
+}
+
+void reset_cpu(void) {
     NVIC_SystemReset();
 }
 
+extern uint32_t _ebss;
+// Place the word to save just after our BSS section that gets blanked.
+void port_set_saved_word(uint32_t value) {
+    _ebss = value;
+}
+
+uint32_t port_get_saved_word(void) {
+    return _ebss;
+}
 
-void HardFault_Handler(void)
-{
+void HardFault_Handler(void) {
+    reset_into_safe_mode(HARD_CRASH);
     while (true) {
-        asm("");
+        asm("nop;");
     }
 }
diff --git a/py/obj.c b/py/obj.c
index c20b549a3..fb59eec82 100644
--- a/py/obj.c
+++ b/py/obj.c
@@ -488,6 +488,8 @@ mp_obj_t mp_obj_subscr(mp_obj_t base, mp_obj_t index, mp_obj_t value) {
     mp_obj_type_t *type = mp_obj_get_type(base);
     if (type->subscr != NULL) {
         mp_obj_t ret = type->subscr(base, index, value);
+        // May have called port specific C code. Make sure it didn't mess up the heap.
+        assert_heap_ok();
         if (ret != MP_OBJ_NULL) {
             return ret;
         }
diff --git a/supervisor/port.h b/supervisor/port.h
index dd4a82209..59898c8e4 100644
--- a/supervisor/port.h
+++ b/supervisor/port.h
@@ -33,12 +33,7 @@
 #error "Please define PORT_HEAP_SIZE to specify heap size in bytes."
 #endif
 
-typedef enum {
-  NO_SAFE_MODE = 0,
-  BROWNOUT,
-  HARD_CRASH,
-  USER_SAFE_MODE,
-} safe_mode_t;
+#include "supervisor/shared/safe_mode.h"
 
 // Provided by the linker;
 extern uint32_t _ezero;
@@ -51,7 +46,10 @@ extern uint32_t _ebss;
 
 safe_mode_t port_init(void);
 
-// Reset the microcontroller.
+// Reset the microcontroller completely.
+void reset_cpu(void);
+
+// Reset the microcontroller state.
 void reset_port(void);
 
 // Reset the rest of the board.
@@ -60,8 +58,8 @@ void reset_board(void);
 // Reset to the bootloader
 void reset_to_bootloader(void);
 
-#ifdef NRF52_SERIES
-void HardFault_Handler(void);
-#endif
+// Save and retrieve a word from memory that is preserved over reset. Used for safe mode.
+void port_set_saved_word(uint32_t);
+uint32_t port_get_saved_word(void);
 
 #endif  // MICROPY_INCLUDED_SUPERVISOR_PORT_H
diff --git a/supervisor/shared/rgb_led_status.h b/supervisor/shared/rgb_led_status.h
index 9542b3197..83f4822d7 100644
--- a/supervisor/shared/rgb_led_status.h
+++ b/supervisor/shared/rgb_led_status.h
@@ -36,6 +36,8 @@
 #include "py/mpconfig.h"
 #include "rgb_led_colors.h"
 
+#include "supervisor/shared/safe_mode.h"
+
 // Overall, the time module must be implemented.
 // To work with a DotStar, one must have MICROPY_HW_APA102_SCK and
 // MICROPY_HW_APA102_MOSI defined and bitbangio.SPI or busio.SPI implemented.
diff --git a/supervisor/shared/safe_mode.c b/supervisor/shared/safe_mode.c
new file mode 100644
index 000000000..c1ce1fc9c
--- /dev/null
+++ b/supervisor/shared/safe_mode.c
@@ -0,0 +1,126 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "supervisor/shared/safe_mode.h"
+
+#include "mphalport.h"
+// #include "py/mpconfig.h"
+
+#include "shared-bindings/digitalio/DigitalInOut.h"
+
+#include "supervisor/serial.h"
+#include "supervisor/shared/rgb_led_colors.h"
+#include "supervisor/shared/rgb_led_status.h"
+#include "supervisor/shared/translate.h"
+
+#define SAFE_MODE_DATA_GUARD 0xad0000af
+#define SAFE_MODE_DATA_GUARD_MASK 0xff0000ff
+
+static safe_mode_t current_safe_mode;
+
+safe_mode_t wait_for_safe_mode_reset(void) {
+    uint32_t reset_state = port_get_saved_word();
+    safe_mode_t safe_mode = NO_SAFE_MODE;
+    if ((reset_state & SAFE_MODE_DATA_GUARD_MASK) == SAFE_MODE_DATA_GUARD) {
+        safe_mode = (reset_state & ~SAFE_MODE_DATA_GUARD_MASK) >> 8;
+    }
+    if (safe_mode != NO_SAFE_MODE) {
+        port_set_saved_word(SAFE_MODE_DATA_GUARD);
+        current_safe_mode = safe_mode;
+        return safe_mode;
+    }
+    port_set_saved_word(SAFE_MODE_DATA_GUARD | (MANUAL_SAFE_MODE << 8));
+    // Wait for a while to allow for reset.
+    temp_status_color(SAFE_MODE);
+    #ifdef MICROPY_HW_LED_STATUS
+    digitalio_digitalinout_obj_t status_led;
+    common_hal_digitalio_digitalinout_construct(&status_led, MICROPY_HW_LED_STATUS);
+    common_hal_digitalio_digitalinout_switch_to_output(&status_led, true, DRIVE_MODE_PUSH_PULL);
+    #endif
+    uint64_t start_ticks = ticks_ms;
+    uint64_t diff = 0;
+    while (diff < 700) {
+        #ifdef MICROPY_HW_LED_STATUS
+        // Blink on for 100, off for 100, on for 100, off for 100 and on for 200
+        common_hal_digitalio_digitalinout_set_value(&status_led, diff > 100 && diff / 100 != 2 && diff / 100 != 4);
+        #endif
+        diff = ticks_ms - start_ticks;
+    }
+    #ifdef MICROPY_HW_LED_STATUS
+    common_hal_digitalio_digitalinout_deinit(&status_led);
+    #endif
+    clear_temp_status();
+    port_set_saved_word(SAFE_MODE_DATA_GUARD);
+    return NO_SAFE_MODE;
+}
+
+void reset_into_safe_mode(safe_mode_t reason) {
+    if (current_safe_mode > BROWNOUT && reason > BROWNOUT) {
+        while (true) {
+            // This very bad because it means running in safe mode didn't save us. Only ignore brownout
+            // because it may be due to a switch bouncing.
+        }
+    }
+
+    port_set_saved_word(SAFE_MODE_DATA_GUARD | (reason << 8));
+    reset_cpu();
+}
+
+void print_safe_mode_message(safe_mode_t reason) {
+    // Output a user safe mode string if its set.
+    #ifdef BOARD_USER_SAFE_MODE
+    if (reason == USER_SAFE_MODE) {
+        serial_write("\r\n");
+        serial_write_compressed(translate("You requested starting safe mode by "));
+        serial_write(BOARD_USER_SAFE_MODE_ACTION);
+        serial_write("\r\n");
+        serial_write_compressed(translate("To exit, please reset the board without "));
+        serial_write(BOARD_USER_SAFE_MODE_ACTION);
+        serial_write("\r\n");
+    } else
+    #endif
+    if (reason != NO_SAFE_MODE) {
+        serial_write("\r\n");
+        serial_write_compressed(translate("You are running in safe mode which means something unanticipated happened.\n"));
+        if (reason == HARD_CRASH || reason == MICROPY_NLR_JUMP_FAIL || reason == MICROPY_FATAL_ERROR) {
+            serial_write_compressed(translate("Looks like our core CircuitPython code crashed hard. Whoops!\nPlease file an issue at https://github.com/adafruit/circuitpython/issues\n with the contents of your CIRCUITPY drive and this message:\n"));
+            if (reason == HARD_CRASH) {
+                serial_write_compressed(translate("Crash into the HardFault_Handler.\n"));
+            } else if (reason == MICROPY_NLR_JUMP_FAIL) {
+                serial_write_compressed(translate("MicroPython NLR jump failed. Likely memory corruption.\n"));
+            } else if (reason == MICROPY_FATAL_ERROR) {
+                serial_write_compressed(translate("MicroPython fatal error.\n"));
+            }
+        } else if (reason == BROWNOUT) {
+            serial_write_compressed(translate("The microcontroller's power dipped. Please make sure your power supply provides\nenough power for the whole circuit and press reset (after ejecting CIRCUITPY).\n"));
+        } else if (reason == HEAP_OVERWRITTEN) {
+            serial_write_compressed(translate("The CircuitPython heap was corrupted because the stack was too small.\nPlease increase stack size limits and press reset (after ejecting CIRCUITPY).\nIf you didn't change the stack, then file an issue here with the contents of your CIRCUITPY drive:\n"));
+            serial_write("https://github.com/adafruit/circuitpython/issues\r\n");
+        } else if (reason == MANUAL_SAFE_MODE) {
+            serial_write_compressed(translate("The reset button was pressed while booting CircuitPython. Press again to exit safe mode.\n"));
+        }
+    }
+}
diff --git a/supervisor/shared/safe_mode.h b/supervisor/shared/safe_mode.h
new file mode 100644
index 000000000..eba2668ac
--- /dev/null
+++ b/supervisor/shared/safe_mode.h
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_SUPERVISOR_SAFE_MODE_H
+#define MICROPY_INCLUDED_SUPERVISOR_SAFE_MODE_H
+
+typedef enum {
+  NO_SAFE_MODE = 0,
+  BROWNOUT,
+  HARD_CRASH,
+  USER_SAFE_MODE,
+  HEAP_OVERWRITTEN,
+  MANUAL_SAFE_MODE,
+  MICROPY_NLR_JUMP_FAIL,
+  MICROPY_FATAL_ERROR
+} safe_mode_t;
+
+safe_mode_t wait_for_safe_mode_reset(void);
+
+void reset_into_safe_mode(safe_mode_t reason);
+
+void print_safe_mode_message(safe_mode_t reason);
+
+#endif  // MICROPY_INCLUDED_SUPERVISOR_SAFE_MODE_H
diff --git a/supervisor/shared/stack.c b/supervisor/shared/stack.c
index 8f4da4ce6..71e239c0a 100755
--- a/supervisor/shared/stack.c
+++ b/supervisor/shared/stack.c
@@ -29,6 +29,7 @@
 #include "py/mpconfig.h"
 #include "py/runtime.h"
 #include "supervisor/cpu.h"
+#include "supervisor/shared/safe_mode.h"
 
 extern uint32_t _estack;
 
@@ -38,8 +39,6 @@ supervisor_allocation* stack_alloc = NULL;
 
 #define EXCEPTION_STACK_SIZE 1024
 
-#define STACK_CANARY_VALUE 0x017829ef
-
 void allocate_stack(void) {
     mp_uint_t regs[10];
     mp_uint_t sp = cpu_get_regs_and_sp(regs);
@@ -62,9 +61,7 @@ inline bool stack_ok(void) {
 
 inline void assert_heap_ok(void) {
     if (!stack_ok()) {
-        asm("nop");
-        while(true) {}
-        mp_raise_RuntimeError(translate("Stack clobbered heap."));
+        reset_into_safe_mode(HEAP_OVERWRITTEN);
     }
 }
 
diff --git a/supervisor/shared/stack.h b/supervisor/shared/stack.h
index 8f1e881f2..1fb43be57 100755
--- a/supervisor/shared/stack.h
+++ b/supervisor/shared/stack.h
@@ -40,7 +40,9 @@ uint32_t get_current_stack_size(void);
 bool stack_ok(void);
 
 // Use this after any calls into a library which may use a lot of stack. This will raise a Python
-// exception when the stack has likely overwritten a portio of the heap.
+// exception when the stack has likely overwritten a portion of the heap.
 void assert_heap_ok(void);
 
+#define STACK_CANARY_VALUE 0x017829ef
+
 #endif  // MICROPY_INCLUDED_SUPERVISOR_STACK_H
diff --git a/supervisor/shared/translate.c b/supervisor/shared/translate.c
index 1fa361c15..aa5e4517c 100644
--- a/supervisor/shared/translate.c
+++ b/supervisor/shared/translate.c
@@ -34,6 +34,14 @@
 #include "genhdr/compression.generated.h"
 #endif
 
+#include "supervisor/serial.h"
+
+void serial_write_compressed(const compressed_string_t* compressed) {
+    char decompressed[compressed->length];
+    decompress(compressed, decompressed);
+    serial_write(decompressed);
+}
+
 char* decompress(const compressed_string_t* compressed, char* decompressed) {
     uint8_t this_byte = 0;
     uint8_t this_bit = 7;
diff --git a/supervisor/shared/translate.h b/supervisor/shared/translate.h
index 3a1ba4076..5e8acbb6a 100644
--- a/supervisor/shared/translate.h
+++ b/supervisor/shared/translate.h
@@ -35,7 +35,7 @@ typedef struct {
 } compressed_string_t;
 
 const compressed_string_t* translate(const char* c);
-
+void serial_write_compressed(const compressed_string_t* compressed);
 char* decompress(const compressed_string_t* compressed, char* decompressed);
 
 #endif  // MICROPY_INCLUDED_SUPERVISOR_TRANSLATE_H
diff --git a/supervisor/supervisor.mk b/supervisor/supervisor.mk
index 73c76ebb7..56ad8a3ba 100644
--- a/supervisor/supervisor.mk
+++ b/supervisor/supervisor.mk
@@ -6,6 +6,7 @@ SRC_SUPERVISOR = \
 	supervisor/shared/flash.c \
 	supervisor/shared/micropython.c \
 	supervisor/shared/rgb_led_status.c \
+	supervisor/shared/safe_mode.c \
 	supervisor/shared/stack.c \
 	supervisor/shared/status_leds.c \
 	supervisor/shared/translate.c
-- 
cgit v1.2.3


From bce6d124af6531f2d6ad6835546eaa471d0657a0 Mon Sep 17 00:00:00 2001
From: Dan Halbert <halbert@halwitz.org>
Date: Thu, 20 Dec 2018 21:28:36 -0500
Subject: Don't check for corrupt heap too early; Fix QSPI timing

---
 ports/nrf/supervisor/qspi_flash.c | 20 +++++++++++---------
 supervisor/shared/stack.c         |  2 +-
 2 files changed, 12 insertions(+), 10 deletions(-)

(limited to 'supervisor/shared/stack.c')

diff --git a/ports/nrf/supervisor/qspi_flash.c b/ports/nrf/supervisor/qspi_flash.c
index 048db06f2..4738607bf 100644
--- a/ports/nrf/supervisor/qspi_flash.c
+++ b/ports/nrf/supervisor/qspi_flash.c
@@ -40,15 +40,13 @@
 
 bool spi_flash_command(uint8_t command) {
     nrf_qspi_cinstr_conf_t cinstr_cfg = {
-        .opcode = 0,
-        .length = 0,
+        .opcode = command,
+        .length = 1,
         .io2_level = true,
         .io3_level = true,
         .wipwait = false,
         .wren = false
     };
-    cinstr_cfg.opcode = command;
-    cinstr_cfg.length = 1;
     nrfx_qspi_cinstr_xfer(&cinstr_cfg, NULL, NULL);
     return true;
 }
@@ -91,8 +89,7 @@ bool spi_flash_write_data(uint32_t address, uint8_t* data, uint32_t length) {
 }
 
 bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t length) {
-    nrfx_qspi_read(data, length, address);
-    return true;
+    return nrfx_qspi_read(data, length, address) == NRFX_SUCCESS;
 }
 
 void spi_flash_init(void) {
@@ -115,7 +112,7 @@ void spi_flash_init(void) {
             .dpmconfig = false
         },
         .phy_if = {
-            .sck_freq = NRF_QSPI_FREQ_32MDIV16, // Start at a slow 2mhz and speed up once we know what we're talking to.
+            .sck_freq = NRF_QSPI_FREQ_32MDIV16, // Start at a slow 2MHz and speed up once we know what we're talking to.
             .sck_delay = 10,    // min time CS must stay high before going low again. in unit of 62.5 ns
             .spi_mode = NRF_QSPI_MODE_0,
             .dpmen = false
@@ -145,7 +142,7 @@ void spi_flash_init_device(const external_flash_device* device) {
     // Switch to single output line if the device doesn't support quad programs.
     if (!device->supports_qspi_writes) {
         NRF_QSPI->IFCONFIG0 &= ~QSPI_IFCONFIG0_WRITEOC_Msk;
-        NRF_QSPI->IFCONFIG0 |= QSPI_IFCONFIG0_WRITEOC_PP;
+        NRF_QSPI->IFCONFIG0 |= QSPI_IFCONFIG0_WRITEOC_PP << QSPI_IFCONFIG0_WRITEOC_Pos;
     }
 
     // Speed up as much as we can.
@@ -153,6 +150,11 @@ void spi_flash_init_device(const external_flash_device* device) {
     while (32000000 / (sckfreq + 1) > device->max_clock_speed_mhz * 1000000 && sckfreq < 16) {
         sckfreq += 1;
     }
+    // No more than 16 MHz. At 32 MHz GD25Q16C doesn't work reliably on Feather 52840, even though
+    // it should work up to 104 MHz.
+    // sckfreq = 0 is 32 Mhz
+    // sckfreq = 1 is 16 MHz, etc.
+    sckfreq = MAX(1, sckfreq);
     NRF_QSPI->IFCONFIG1 &= ~QSPI_IFCONFIG1_SCKFREQ_Msk;
-    NRF_QSPI->IFCONFIG1 |=  sckfreq << QSPI_IFCONFIG1_SCKDELAY_Pos;
+    NRF_QSPI->IFCONFIG1 |=  sckfreq << QSPI_IFCONFIG1_SCKFREQ_Pos;
 }
diff --git a/supervisor/shared/stack.c b/supervisor/shared/stack.c
index 71e239c0a..311fa31b2 100755
--- a/supervisor/shared/stack.c
+++ b/supervisor/shared/stack.c
@@ -56,7 +56,7 @@ void allocate_stack(void) {
 }
 
 inline bool stack_ok(void) {
-    return *stack_alloc->ptr == STACK_CANARY_VALUE;
+    return stack_alloc == NULL || *stack_alloc->ptr == STACK_CANARY_VALUE;
 }
 
 inline void assert_heap_ok(void) {
-- 
cgit v1.2.3


From f3151bb6c4adac5ed9cf03d3977ab6d9662c0e05 Mon Sep 17 00:00:00 2001
From: Kamil Tomaszewski <kamil.tomaszewski@sony.com>
Date: Fri, 18 Oct 2019 11:05:08 +0200
Subject: Use get top and limit stack functions

---
 main.c                     | 2 +-
 supervisor/shared/memory.c | 7 +++----
 supervisor/shared/stack.c  | 3 ++-
 3 files changed, 6 insertions(+), 6 deletions(-)

(limited to 'supervisor/shared/stack.c')

diff --git a/main.c b/main.c
index 6b56f5ff6..8715672ea 100755
--- a/main.c
+++ b/main.c
@@ -477,7 +477,7 @@ void gc_collect(void) {
 
     // This naively collects all object references from an approximate stack
     // range.
-    gc_collect_root((void**)sp, ((uint32_t)&_estack - sp) / sizeof(uint32_t));
+    gc_collect_root((void**)sp, ((uint32_t)port_stack_get_top() - sp) / sizeof(uint32_t));
     gc_collect_end();
 }
 
diff --git a/supervisor/shared/memory.c b/supervisor/shared/memory.c
index 11133415d..38040d11d 100755
--- a/supervisor/shared/memory.c
+++ b/supervisor/shared/memory.c
@@ -25,6 +25,7 @@
  */
 
 #include "supervisor/memory.h"
+#include "supervisor/port.h"
 
 #include <stddef.h>
 
@@ -36,12 +37,10 @@ static supervisor_allocation allocations[CIRCUITPY_SUPERVISOR_ALLOC_COUNT];
 // We use uint32_t* to ensure word (4 byte) alignment.
 uint32_t* low_address;
 uint32_t* high_address;
-extern uint32_t _ebss;
-extern uint32_t _estack;
 
 void memory_init(void) {
-    low_address = &_ebss;
-    high_address = &_estack;
+    low_address = port_stack_get_limit();
+    high_address = port_stack_get_top();
 }
 
 void free_memory(supervisor_allocation* allocation) {
diff --git a/supervisor/shared/stack.c b/supervisor/shared/stack.c
index 311fa31b2..dcecf2067 100755
--- a/supervisor/shared/stack.c
+++ b/supervisor/shared/stack.c
@@ -29,6 +29,7 @@
 #include "py/mpconfig.h"
 #include "py/runtime.h"
 #include "supervisor/cpu.h"
+#include "supervisor/port.h"
 #include "supervisor/shared/safe_mode.h"
 
 extern uint32_t _estack;
@@ -43,7 +44,7 @@ void allocate_stack(void) {
     mp_uint_t regs[10];
     mp_uint_t sp = cpu_get_regs_and_sp(regs);
 
-    mp_uint_t c_size = (uint32_t) &_estack - sp;
+    mp_uint_t c_size = (uint32_t) port_stack_get_top() - sp;
 
     stack_alloc = allocate_memory(c_size + next_stack_size + EXCEPTION_STACK_SIZE, true);
     if (stack_alloc == NULL) {
-- 
cgit v1.2.3


From 7d8dac9211dab92d750a0351335b4ad3fffc05e2 Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott@tannewt.org>
Date: Wed, 8 Jan 2020 20:32:45 -0800
Subject: Refine iMX RT memory layout and add three boards

Introduces a way to place CircuitPython code and data into
tightly coupled memory (TCM) which is accessible by the CPU in a
single cycle. It also frees up room in the corresponding cache for
intermittent data. Loading from external flash is slow!

The data cache is also now enabled.

Adds support for the iMX RT 1021 chip. Adds three new boards:
* iMX RT 1020 EVK
* iMX RT 1060 EVK
* Teensy 4.0

Related to #2492, #2472 and #2477. Fixes #2475.
---
 .github/workflows/build.yml                        |   3 +
 .gitmodules                                        |   2 +-
 lib/tinyusb                                        |   2 +-
 ports/mimxrt10xx/Makefile                          |  20 +-
 ports/mimxrt10xx/background.c                      |   3 +-
 ports/mimxrt10xx/boards/feather_mimxrt1011/board.c |  16 -
 .../boards/feather_mimxrt1011/flash_config.c       | 122 +++++++
 .../boards/feather_mimxrt1011/mpconfigboard.h      |  11 -
 .../boards/feather_mimxrt1011/mpconfigboard.mk     |  15 +-
 ports/mimxrt10xx/boards/feather_mimxrt1062/board.c |  16 -
 .../boards/feather_mimxrt1062/flash_config.c       | 122 +++++++
 .../boards/feather_mimxrt1062/mpconfigboard.h      |   8 -
 .../boards/feather_mimxrt1062/mpconfigboard.mk     |  15 +-
 ports/mimxrt10xx/boards/imxrt1010_evk/board.c      |  16 -
 .../mimxrt10xx/boards/imxrt1010_evk/flash_config.c | 141 ++++++++
 .../boards/imxrt1010_evk/mpconfigboard.h           |  17 -
 .../boards/imxrt1010_evk/mpconfigboard.mk          |  16 +-
 ports/mimxrt10xx/boards/imxrt1010_evk/pins.c       |  30 +-
 ports/mimxrt10xx/boards/imxrt1020_evk/board.c      |  39 +++
 .../mimxrt10xx/boards/imxrt1020_evk/flash_config.c | 122 +++++++
 .../boards/imxrt1020_evk/mpconfigboard.h           |  14 +
 .../boards/imxrt1020_evk/mpconfigboard.mk          |   8 +
 ports/mimxrt10xx/boards/imxrt1020_evk/pins.c       |  84 +++++
 ports/mimxrt10xx/boards/imxrt1060_evk/board.c      |  39 +++
 .../mimxrt10xx/boards/imxrt1060_evk/flash_config.c | 141 ++++++++
 .../boards/imxrt1060_evk/mpconfigboard.h           |  14 +
 .../boards/imxrt1060_evk/mpconfigboard.mk          |   8 +
 ports/mimxrt10xx/boards/imxrt1060_evk/pins.c       | 128 +++++++
 .../boards/mimxrt1011-bootloader-external-flash.ld | 106 ------
 .../mimxrt10xx/boards/mimxrt1011-external-flash.ld | 123 -------
 .../boards/mimxrt1062-bootloader-external-flash.ld | 106 ------
 ports/mimxrt10xx/boards/teensy40/board.c           |  39 +++
 ports/mimxrt10xx/boards/teensy40/board.ld          |   1 +
 ports/mimxrt10xx/boards/teensy40/flash_config.c    | 141 ++++++++
 ports/mimxrt10xx/boards/teensy40/mpconfigboard.h   |  18 +
 ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk  |   8 +
 ports/mimxrt10xx/boards/teensy40/pins.c            |  87 +++++
 .../common-hal/microcontroller/__init__.c          |   6 +-
 ports/mimxrt10xx/linking/chip_family/MIMXRT1011.ld |   2 +
 ports/mimxrt10xx/linking/chip_family/MIMXRT1021.ld |   2 +
 ports/mimxrt10xx/linking/chip_family/MIMXRT1062.ld |   2 +
 ports/mimxrt10xx/linking/common.ld                 | 158 +++++++++
 ports/mimxrt10xx/linking/flash/AT25SF128A.ld       |   1 +
 ports/mimxrt10xx/linking/flash/IS25LP064A.ld       |   1 +
 ports/mimxrt10xx/linking/flash/IS25WP064A.ld       |   1 +
 ports/mimxrt10xx/linking/flash/W25Q16JV.ld         |   1 +
 ports/mimxrt10xx/linking/flash/W25Q64JV.ld         |   1 +
 ports/mimxrt10xx/mpconfigport.h                    |  12 +-
 ports/mimxrt10xx/mpconfigport.mk                   |  17 +-
 ports/mimxrt10xx/mphalport.c                       |   2 +-
 .../peripherals/mimxrt10xx/MIMXRT1021/clocks.c     | 371 +++++++++++++++++++++
 .../peripherals/mimxrt10xx/MIMXRT1021/periph.c     | 218 ++++++++++++
 .../peripherals/mimxrt10xx/MIMXRT1021/periph.h     |  43 +++
 .../peripherals/mimxrt10xx/MIMXRT1021/pins.c       | 128 +++++++
 .../peripherals/mimxrt10xx/MIMXRT1021/pins.h       | 129 +++++++
 .../peripherals/mimxrt10xx/MIMXRT1062/periph.c     |   2 +-
 ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h   |   2 +
 ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h     |   2 +
 ports/mimxrt10xx/reset.c                           |   2 +-
 ports/mimxrt10xx/reset.h                           |   2 -
 ports/mimxrt10xx/sdk                               |   2 +-
 ports/mimxrt10xx/supervisor/internal_flash.c       |  10 +-
 ports/mimxrt10xx/supervisor/port.c                 | 201 ++++++++++-
 py/map.c                                           |   4 +-
 py/mpstate.c                                       |   3 +-
 py/obj.c                                           |   3 +-
 py/objdict.c                                       |   5 +-
 py/objfun.c                                        |   4 +-
 py/qstr.c                                          |   4 +-
 py/runtime.c                                       |   8 +-
 py/runtime.h                                       |  10 +-
 py/vm.c                                            |   4 +-
 py/vmentrytable.h                                  |   4 +-
 supervisor/linker.h                                |  42 +++
 supervisor/port.h                                  |   6 +
 supervisor/shared/filesystem.c                     |   2 +-
 supervisor/shared/memory.c                         |   7 +-
 supervisor/shared/safe_mode.c                      |   3 +
 supervisor/shared/safe_mode.h                      |   1 +
 supervisor/shared/stack.c                          |   7 +
 supervisor/shared/tick.c                           |   8 +-
 tools/build_board_info.py                          |   3 +-
 82 files changed, 2717 insertions(+), 530 deletions(-)
 create mode 100644 ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c
 create mode 100644 ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c
 create mode 100644 ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c
 create mode 100644 ports/mimxrt10xx/boards/imxrt1020_evk/board.c
 create mode 100644 ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c
 create mode 100644 ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.h
 create mode 100644 ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk
 create mode 100644 ports/mimxrt10xx/boards/imxrt1020_evk/pins.c
 create mode 100644 ports/mimxrt10xx/boards/imxrt1060_evk/board.c
 create mode 100644 ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c
 create mode 100644 ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.h
 create mode 100644 ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk
 create mode 100644 ports/mimxrt10xx/boards/imxrt1060_evk/pins.c
 delete mode 100644 ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld
 delete mode 100644 ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld
 delete mode 100644 ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld
 create mode 100644 ports/mimxrt10xx/boards/teensy40/board.c
 create mode 100644 ports/mimxrt10xx/boards/teensy40/board.ld
 create mode 100644 ports/mimxrt10xx/boards/teensy40/flash_config.c
 create mode 100644 ports/mimxrt10xx/boards/teensy40/mpconfigboard.h
 create mode 100644 ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk
 create mode 100644 ports/mimxrt10xx/boards/teensy40/pins.c
 create mode 100644 ports/mimxrt10xx/linking/chip_family/MIMXRT1011.ld
 create mode 100644 ports/mimxrt10xx/linking/chip_family/MIMXRT1021.ld
 create mode 100644 ports/mimxrt10xx/linking/chip_family/MIMXRT1062.ld
 create mode 100644 ports/mimxrt10xx/linking/common.ld
 create mode 100644 ports/mimxrt10xx/linking/flash/AT25SF128A.ld
 create mode 100644 ports/mimxrt10xx/linking/flash/IS25LP064A.ld
 create mode 100644 ports/mimxrt10xx/linking/flash/IS25WP064A.ld
 create mode 100644 ports/mimxrt10xx/linking/flash/W25Q16JV.ld
 create mode 100644 ports/mimxrt10xx/linking/flash/W25Q64JV.ld
 create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c
 create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c
 create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h
 create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.c
 create mode 100644 ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.h
 create mode 100755 supervisor/linker.h

(limited to 'supervisor/shared/stack.c')

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 921a40d27..cfb6c2f08 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -113,6 +113,8 @@ jobs:
         - "hallowing_m0_express"
         - "hallowing_m4_express"
         - "imxrt1010_evk"
+        - "imxrt1020_evk"
+        - "imxrt1060_evk"
         - "itsybitsy_m0_express"
         - "itsybitsy_m4_express"
         - "itsybitsy_nrf52840_express"
@@ -163,6 +165,7 @@ jobs:
         - "stm32f411ve_discovery"
         - "stm32f412zg_discovery"
         - "stringcar_m0_express"
+        - "teensy40"
         - "teknikio_bluebird"
         - "trellis_m4_express"
         - "trinket_m0"
diff --git a/.gitmodules b/.gitmodules
index 44fc818c8..cb36ad4c4 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -110,4 +110,4 @@
 	url = https://github.com/adafruit/Adafruit_MP3
 [submodule "ports/mimxrt10xx/sdk"]
 	path = ports/mimxrt10xx/sdk
-	url = https://github.com/arturo182/MIMXRT10xx_SDK
+	url = https://github.com/adafruit/MIMXRT10xx_SDK
diff --git a/lib/tinyusb b/lib/tinyusb
index dda4c9a94..1f95f439e 160000
--- a/lib/tinyusb
+++ b/lib/tinyusb
@@ -1 +1 @@
-Subproject commit dda4c9a94b509238faa7b5ab5b9464c1d2e63ff0
+Subproject commit 1f95f439e11f519e69d75a4a8b7b9f28eaf5060e
diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile
index 68ddea565..d46806dc6 100644
--- a/ports/mimxrt10xx/Makefile
+++ b/ports/mimxrt10xx/Makefile
@@ -71,6 +71,7 @@ INC += \
 	-Isdk/CMSIS/Include \
 	-Isdk/devices/$(CHIP_FAMILY) \
 	-Isdk/devices/$(CHIP_FAMILY)/drivers \
+	-Isdk/devices/$(CHIP_FAMILY)/xip \
 
 # NDEBUG disables assert() statements. This reduces code size pretty dramatically, per tannewt.
 
@@ -114,6 +115,7 @@ CFLAGS += \
 	-mfpu=fpv5-sp-d16 \
 	-DCPU_$(CHIP_VARIANT) \
 	-DDEBUG \
+	-DIMXRT10XX \
 	-DXIP_EXTERNAL_FLASH=1 \
 	-DXIP_BOOT_HEADER_ENABLE=1 \
 	-D__START=main \
@@ -121,7 +123,11 @@ CFLAGS += \
 	-ffunction-sections -fdata-sections -fstack-usage \
 	-D__STARTUP_CLEAR_BSS
 
-LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs
+LD_FILES = $(wildcard boards/$(BOARD)/*.ld) $(addprefix linking/, flash/$(FLASH).ld chip_family/$(CHIP_FAMILY).ld common.ld)
+
+LD_SCRIPT_FLAG := -Wl,-T,
+
+LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib $(addprefix $(LD_SCRIPT_FLAG), $(LD_FILES)) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs
 LIBS := -lgcc -lc -lnosys -lm
 
 # Use toolchain libm if we're not using our own.
@@ -154,6 +160,7 @@ SRC_SDK := $(addprefix sdk/devices/$(CHIP_FAMILY)/, $(SRC_SDK))
 SRC_C = \
 	background.c \
 	boards/$(BOARD)/board.c \
+	boards/$(BOARD)/flash_config.c \
 	boards/$(BOARD)/pins.c \
 	fatfs_port.c \
 	lib/mp-readline/readline.c \
@@ -231,20 +238,23 @@ OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o))
 
 SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED)
 
-all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2
+all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 $(BUILD)/firmware.hex
 
-$(BUILD)/firmware.elf: $(LD_FILE) $(OBJ)
+$(BUILD)/firmware.elf: $(OBJ) $(LD_FILES)
 	$(STEPECHO) "LINK $@"
-	$(Q)$(CC) -o $@ $(LDFLAGS) $(filter-out $<,$^) -Wl,--start-group $(LIBS) -Wl,--end-group
+	$(Q)$(CC) -o $@ $(LDFLAGS) $(filter-out %.ld, $^) -Wl,--start-group $(LIBS) -Wl,--end-group
 
 $(BUILD)/firmware.bin: $(BUILD)/firmware.elf
 	$(STEPECHO) "Create $@"
-	$(Q)$(OBJCOPY) -O binary -j .interrupts -j .text -j .ARM.exidx -j .data $^ $@
+	$(Q)$(OBJCOPY) -O binary -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $^ $@
 
 $(BUILD)/firmware.uf2: $(BUILD)/firmware.bin
 	$(STEPECHO) "Create $@"
 	$(Q)$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -b $(BOOTLOADER_SIZE) -f MIMXRT10XX -c -o $@ $^
 
+$(BUILD)/firmware.hex: $(BUILD)/firmware.elf
+	$(Q)$(OBJCOPY) -O ihex -j .flash_config -j .ivt -j .text -j .ARM.exidx -j .data -j .itcm -j .dtcm_data $< $@
+
 include $(TOP)/py/mkrules.mk
 
 # Print out the value of a make variable.
diff --git a/ports/mimxrt10xx/background.c b/ports/mimxrt10xx/background.c
index 8c7333cf8..c0b217685 100644
--- a/ports/mimxrt10xx/background.c
+++ b/ports/mimxrt10xx/background.c
@@ -34,6 +34,7 @@
 
 #include "py/runtime.h"
 #include "shared-module/network/__init__.h"
+#include "supervisor/linker.h"
 #include "supervisor/shared/stack.h"
 
 // TODO
@@ -51,7 +52,7 @@ void background_tasks_reset(void) {
     running_background_tasks = false;
 }
 
-void run_background_tasks(void) {
+void PLACE_IN_ITCM(run_background_tasks)(void) {
     // Don't call ourselves recursively.
     if (running_background_tasks) {
         return;
diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c b/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c
index 8e73df4ad..52dd498b3 100644
--- a/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c
+++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/board.c
@@ -27,24 +27,8 @@
 
 #include "boards/board.h"
 #include "mpconfigboard.h"
-#include "fsl_iomuxc.h"
 
 void board_init(void) {
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1,1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 1U);
-
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B,0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 0x10E1U);
 }
 
 bool board_requests_safe_mode(void) {
diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c b/ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c
new file mode 100644
index 000000000..b74c0b151
--- /dev/null
+++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/flash_config.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright 2017 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "fsl_flexspi_nor_boot.h"
+#include "fsl_flexspi_nor_config.h"
+
+
+__attribute__((section(".boot_hdr.ivt")))
+/*************************************
+ *  IVT Data
+ *************************************/
+const ivt image_vector_table = {
+  IVT_HEADER,                         /* IVT Header */
+  IMAGE_ENTRY_ADDRESS,                /* Image Entry Function */
+  IVT_RSVD,                           /* Reserved = 0 */
+  (uint32_t)DCD_ADDRESS,              /* Address where DCD information is stored */
+  (uint32_t)BOOT_DATA_ADDRESS,        /* Address where BOOT Data Structure is stored */
+  (uint32_t)&image_vector_table,      /* Pointer to IVT Self (absolute address */
+  (uint32_t)CSF_ADDRESS,              /* Address where CSF file is stored */
+  IVT_RSVD                            /* Reserved = 0 */
+};
+
+__attribute__((section(".boot_hdr.boot_data")))
+/*************************************
+ *  Boot Data
+ *************************************/
+const BOOT_DATA_T boot_data = {
+  FLASH_BASE,                 /* boot start location */
+  FLASH_SIZE,                 /* size */
+  PLUGIN_FLAG,                /* Plugin flag*/
+  0xFFFFFFFF                  /* empty - extra data word */
+};
+
+__attribute__((section(".boot_hdr.conf")))
+// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39
+const flexspi_nor_config_t qspiflash_config = {
+    .memConfig =
+        {
+            .tag              = FLEXSPI_CFG_BLK_TAG,
+            .version          = FLEXSPI_CFG_BLK_VERSION,
+            .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
+            .csHoldTime       = 1u,
+            .csSetupTime      = 2u,
+            // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock
+            .deviceType    = kFlexSpiDeviceType_SerialNOR,
+            .sflashPadType = kSerialFlash_4Pads,
+            .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03
+            .sflashA1Size  = FLASH_SIZE,
+            .lookupTable =
+                {
+                    // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)
+                    // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) |
+                    //  FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
+                    // Read LUTs
+                    FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
+                    FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
+                    0,
+                    0,
+
+                    0x24040405,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000406,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x08180420,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x081804D8,
+                    0,
+                    0,
+                    0,
+
+                    0x08180402,
+                    0x00002004,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000460,
+                },
+        },
+    .pageSize           = 256u,
+    .sectorSize         = 4u * 1024u,
+    .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz,
+    .blockSize          = 0x00010000,
+    .isUniformBlockSize = false,
+};
diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h
index 98d1f478b..a715a2c56 100644
--- a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h
+++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.h
@@ -1,19 +1,8 @@
 #define MICROPY_HW_BOARD_NAME "Feather MIMXRT1011"
 #define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A"
 
-//TODO
-//#define MICROPY_HW_LED_STATUS   (&pin_PA27)
-
 #define MICROPY_HW_NEOPIXEL (&pin_GPIO_SD_05)
 
-// These are pins not to reset.
-// QSPI Data pins
-//#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 )
-// QSPI CS, and QSPI SCK
-//#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 )
-//#define MICROPY_PORT_C ( 0 )
-//#define MICROPY_PORT_D ( 0 )
-
 // If you change this, then make sure to update the linker scripts as well to
 // make sure you don't overwrite code
 #define CIRCUITPY_INTERNAL_NVM_SIZE 0
diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk
index 6efd3f329..08164b140 100644
--- a/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk
+++ b/ports/mimxrt10xx/boards/feather_mimxrt1011/mpconfigboard.mk
@@ -1,21 +1,8 @@
-LD_FILE = boards/mimxrt1011-bootloader-external-flash.ld
 USB_VID = 0x239A
 USB_PID = 0x8074
 USB_PRODUCT = "Feather MIMXRT1011"
 USB_MANUFACTURER = "arturo182"
-USB_DEVICES = "CDC,MSC,HID"
 
 CHIP_VARIANT = MIMXRT1011DAE5A
 CHIP_FAMILY = MIMXRT1011
-
-INTERNAL_FLASH_FILESYSTEM = 1
-
-CIRCUITPY_DISPLAYIO = 0
-CIRCUITPY_AUDIOIO = 0
-CIRCUITPY_AUDIOBUSIO = 0
-CIRCUITPY_FREQUENCYIO = 0
-CIRCUITPY_I2CSLAVE = 0
-CIRCUITPY_NVM = 0
-CIRCUITPY_ROTARYIO = 0
-
-LONGINT_IMPL = MPZ
+FLASH = W25Q64JV
diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c b/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c
index 979dd82ce..52dd498b3 100644
--- a/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c
+++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/board.c
@@ -27,24 +27,8 @@
 
 #include "boards/board.h"
 #include "mpconfigboard.h"
-#include "fsl_iomuxc.h"
 
 void board_init(void) {
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK,1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, 1U);
-
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_06_FLEXSPIA_SS0_B,0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_09_FLEXSPIA_DATA01, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_08_FLEXSPIA_DATA00, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B1_05_FLEXSPIA_DQS, 0x10E1U);
 }
 
 bool board_requests_safe_mode(void) {
diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c b/ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c
new file mode 100644
index 000000000..b74c0b151
--- /dev/null
+++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/flash_config.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright 2017 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "fsl_flexspi_nor_boot.h"
+#include "fsl_flexspi_nor_config.h"
+
+
+__attribute__((section(".boot_hdr.ivt")))
+/*************************************
+ *  IVT Data
+ *************************************/
+const ivt image_vector_table = {
+  IVT_HEADER,                         /* IVT Header */
+  IMAGE_ENTRY_ADDRESS,                /* Image Entry Function */
+  IVT_RSVD,                           /* Reserved = 0 */
+  (uint32_t)DCD_ADDRESS,              /* Address where DCD information is stored */
+  (uint32_t)BOOT_DATA_ADDRESS,        /* Address where BOOT Data Structure is stored */
+  (uint32_t)&image_vector_table,      /* Pointer to IVT Self (absolute address */
+  (uint32_t)CSF_ADDRESS,              /* Address where CSF file is stored */
+  IVT_RSVD                            /* Reserved = 0 */
+};
+
+__attribute__((section(".boot_hdr.boot_data")))
+/*************************************
+ *  Boot Data
+ *************************************/
+const BOOT_DATA_T boot_data = {
+  FLASH_BASE,                 /* boot start location */
+  FLASH_SIZE,                 /* size */
+  PLUGIN_FLAG,                /* Plugin flag*/
+  0xFFFFFFFF                  /* empty - extra data word */
+};
+
+__attribute__((section(".boot_hdr.conf")))
+// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39
+const flexspi_nor_config_t qspiflash_config = {
+    .memConfig =
+        {
+            .tag              = FLEXSPI_CFG_BLK_TAG,
+            .version          = FLEXSPI_CFG_BLK_VERSION,
+            .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
+            .csHoldTime       = 1u,
+            .csSetupTime      = 2u,
+            // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock
+            .deviceType    = kFlexSpiDeviceType_SerialNOR,
+            .sflashPadType = kSerialFlash_4Pads,
+            .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03
+            .sflashA1Size  = FLASH_SIZE,
+            .lookupTable =
+                {
+                    // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)
+                    // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) |
+                    //  FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
+                    // Read LUTs
+                    FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
+                    FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
+                    0,
+                    0,
+
+                    0x24040405,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000406,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x08180420,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x081804D8,
+                    0,
+                    0,
+                    0,
+
+                    0x08180402,
+                    0x00002004,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000460,
+                },
+        },
+    .pageSize           = 256u,
+    .sectorSize         = 4u * 1024u,
+    .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz,
+    .blockSize          = 0x00010000,
+    .isUniformBlockSize = false,
+};
diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h
index b91209c82..4c3953187 100644
--- a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h
+++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.h
@@ -6,14 +6,6 @@
 
 //#define MICROPY_HW_NEOPIXEL (&pin_PB22)
 
-// These are pins not to reset.
-// QSPI Data pins
-//#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 )
-// QSPI CS, and QSPI SCK
-//#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 )
-//#define MICROPY_PORT_C ( 0 )
-//#define MICROPY_PORT_D ( 0 )
-
 // If you change this, then make sure to update the linker scripts as well to
 // make sure you don't overwrite code
 #define CIRCUITPY_INTERNAL_NVM_SIZE 0
diff --git a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk
index b2e356e55..1c8646991 100644
--- a/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk
+++ b/ports/mimxrt10xx/boards/feather_mimxrt1062/mpconfigboard.mk
@@ -1,21 +1,8 @@
-LD_FILE = boards/mimxrt1062-bootloader-external-flash.ld
 USB_VID = 0x239A
 USB_PID = 0x8076
 USB_PRODUCT = "Feather MIMXRT1062"
 USB_MANUFACTURER = "arturo182"
-USB_DEVICES = "CDC,MSC,HID"
 
 CHIP_VARIANT = MIMXRT1062DVJ6A
 CHIP_FAMILY = MIMXRT1062
-
-INTERNAL_FLASH_FILESYSTEM = 1
-
-CIRCUITPY_DISPLAYIO = 0
-CIRCUITPY_AUDIOIO = 0
-CIRCUITPY_AUDIOBUSIO = 0
-CIRCUITPY_FREQUENCYIO = 0
-CIRCUITPY_I2CSLAVE = 0
-CIRCUITPY_NVM = 0
-CIRCUITPY_ROTARYIO = 0
-
-LONGINT_IMPL = MPZ
+FLASH = W25Q64JV
diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/board.c b/ports/mimxrt10xx/boards/imxrt1010_evk/board.c
index 8e73df4ad..52dd498b3 100644
--- a/ports/mimxrt10xx/boards/imxrt1010_evk/board.c
+++ b/ports/mimxrt10xx/boards/imxrt1010_evk/board.c
@@ -27,24 +27,8 @@
 
 #include "boards/board.h"
 #include "mpconfigboard.h"
-#include "fsl_iomuxc.h"
 
 void board_init(void) {
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1,1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 1U);
-    IOMUXC_SetPinMux(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 1U);
-
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_06_FLEXSPI_A_SS0_B,0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_07_FLEXSPI_A_DATA1, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_08_FLEXSPI_A_DATA2, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_09_FLEXSPI_A_DATA0, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_10_FLEXSPI_A_SCLK, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_11_FLEXSPI_A_DATA3, 0x10E1U);
-    IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_12_FLEXSPI_A_DQS, 0x10E1U);
 }
 
 bool board_requests_safe_mode(void) {
diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c
new file mode 100644
index 000000000..c281d4541
--- /dev/null
+++ b/ports/mimxrt10xx/boards/imxrt1010_evk/flash_config.c
@@ -0,0 +1,141 @@
+/*
+ * Copyright 2017 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "fsl_flexspi_nor_boot.h"
+#include "fsl_flexspi_nor_config.h"
+
+/* Component ID definition, used by tools. */
+#ifndef FSL_COMPONENT_ID
+#define FSL_COMPONENT_ID "platform.drivers.xip_device"
+#endif
+
+#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
+#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
+    __attribute__((section(".boot_hdr.ivt")))
+#elif defined(__ICCARM__)
+#pragma location=".boot_hdr.ivt"
+#endif
+/*************************************
+ *  IVT Data
+ *************************************/
+const ivt image_vector_table = {
+  IVT_HEADER,                         /* IVT Header */
+  IMAGE_ENTRY_ADDRESS,                /* Image Entry Function */
+  IVT_RSVD,                           /* Reserved = 0 */
+  (uint32_t)DCD_ADDRESS,              /* Address where DCD information is stored */
+  (uint32_t)BOOT_DATA_ADDRESS,        /* Address where BOOT Data Structure is stored */
+  (uint32_t)&image_vector_table,      /* Pointer to IVT Self (absolute address */
+  (uint32_t)CSF_ADDRESS,              /* Address where CSF file is stored */
+  IVT_RSVD                            /* Reserved = 0 */
+};
+
+#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
+    __attribute__((section(".boot_hdr.boot_data")))
+#elif defined(__ICCARM__)
+#pragma location=".boot_hdr.boot_data"
+#endif
+/*************************************
+ *  Boot Data
+ *************************************/
+const BOOT_DATA_T boot_data = {
+  FLASH_BASE,                 /* boot start location */
+  FLASH_SIZE,                 /* size */
+  PLUGIN_FLAG,                /* Plugin flag*/
+  0xFFFFFFFF                  /* empty - extra data word */
+};
+#endif
+
+#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
+__attribute__((section(".boot_hdr.conf")))
+#elif defined(__ICCARM__)
+#pragma location = ".boot_hdr.conf"
+#endif
+
+// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39
+const flexspi_nor_config_t qspiflash_config = {
+    .memConfig =
+        {
+            .tag              = FLEXSPI_CFG_BLK_TAG,
+            .version          = FLEXSPI_CFG_BLK_VERSION,
+            .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
+            .csHoldTime       = 1u,
+            .csSetupTime      = 2u,
+            // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock
+            .deviceType    = kFlexSpiDeviceType_SerialNOR,
+            .sflashPadType = kSerialFlash_4Pads,
+            .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03
+            .sflashA1Size  = FLASH_SIZE,
+            .lookupTable =
+                {
+                    // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)
+                    // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) |
+                    //  FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
+                    // Read LUTs
+                    FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
+                    FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
+                    0,
+                    0,
+
+                    0x24040405,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000406,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x08180420,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x081804D8,
+                    0,
+                    0,
+                    0,
+
+                    0x08180402,
+                    0x00002004,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000460,
+                },
+        },
+    .pageSize           = 256u,
+    .sectorSize         = 4u * 1024u,
+    .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz,
+    .blockSize          = 0x00010000,
+    .isUniformBlockSize = false,
+};
diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h
index 12cb5e8a8..128e33111 100644
--- a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h
+++ b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h
@@ -1,19 +1,6 @@
 #define MICROPY_HW_BOARD_NAME "IMXRT1010-EVK"
 #define MICROPY_HW_MCU_NAME "IMXRT1011DAE5A"
 
-//TODO
-//#define MICROPY_HW_LED_STATUS   (&pin_PA27)
-
-//#define MICROPY_HW_NEOPIXEL (&pin_PB22)
-
-// These are pins not to reset.
-// QSPI Data pins
-//#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 )
-// QSPI CS, and QSPI SCK
-//#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 | PORT_PB22 )
-//#define MICROPY_PORT_C ( 0 )
-//#define MICROPY_PORT_D ( 0 )
-
 // If you change this, then make sure to update the linker scripts as well to
 // make sure you don't overwrite code
 #define CIRCUITPY_INTERNAL_NVM_SIZE 0
@@ -23,9 +10,5 @@
 #define DEFAULT_I2C_BUS_SCL (&pin_GPIO_02)
 #define DEFAULT_I2C_BUS_SDA (&pin_GPIO_01)
 
-#define DEFAULT_SPI_BUS_SCK  (&pin_GPIO_AD_06)
-#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_04)
-#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_03)
-
 #define DEFAULT_UART_BUS_RX (&pin_GPIO_09)
 #define DEFAULT_UART_BUS_TX (&pin_GPIO_10)
diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk
index 4401647c4..81eb63597 100644
--- a/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk
+++ b/ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.mk
@@ -1,22 +1,8 @@
-LD_FILE = boards/mimxrt1011-bootloader-external-flash.ld
 USB_VID = 0x239A
 USB_PID = 0x8078
 USB_PRODUCT = "IMXRT1010-EVK"
 USB_MANUFACTURER = "NXP"
-USB_DEVICES = "CDC,MSC,HID"
 
 CHIP_VARIANT = MIMXRT1011DAE5A
 CHIP_FAMILY = MIMXRT1011
-
-INTERNAL_FLASH_FILESYSTEM = 1
-
-CIRCUITPY_DISPLAYIO = 0
-CIRCUITPY_AUDIOIO = 0
-CIRCUITPY_AUDIOBUSIO = 0
-CIRCUITPY_FREQUENCYIO = 0
-CIRCUITPY_I2CSLAVE = 0
-CIRCUITPY_NEOPIXEL_WRITE = 0
-CIRCUITPY_NVM = 0
-CIRCUITPY_ROTARYIO = 0
-
-LONGINT_IMPL = MPZ
+FLASH = AT25SF128A
diff --git a/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c b/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c
index cfc876369..a5a598760 100644
--- a/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c
+++ b/ports/mimxrt10xx/boards/imxrt1010_evk/pins.c
@@ -4,21 +4,25 @@
 
 STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
     { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_09) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_09) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_10) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_10) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_AD_05) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_AD_06) },
-    //{ MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_08) }, // Connected to audio codec
-    //{ MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_01) }, // Connected to audio codec
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_08) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_01) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_AD_01) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_AD_02) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_SD_02) },
-    //{ MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_03) }, // Connected to audio codec
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_03) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_AD_05) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_AD_04) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_AD_03) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_AD_06) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_01) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_02) },
 
     { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_07) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_09) },
@@ -27,8 +31,24 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
     { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_01) },
     { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_02) },
 
-    { MP_OBJ_NEW_QSTR(MP_QSTR_USR_LED), MP_ROM_PTR(&pin_GPIO_11) },
-    { MP_OBJ_NEW_QSTR(MP_QSTR_USR_SW), MP_ROM_PTR(&pin_GPIO_SD_05) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_USER_LED), MP_ROM_PTR(&pin_GPIO_11) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_USER_SW), MP_ROM_PTR(&pin_GPIO_SD_05) },
+
+    // Audio Interface
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_INT), MP_ROM_PTR(&pin_GPIO_00) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_SYNC), MP_ROM_PTR(&pin_GPIO_07) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_BCLK), MP_ROM_PTR(&pin_GPIO_06) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_RXD), MP_ROM_PTR(&pin_GPIO_03) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_TXD), MP_ROM_PTR(&pin_GPIO_04) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_MCLK), MP_ROM_PTR(&pin_GPIO_08) },
+
+    // SPDIF
+    { MP_ROM_QSTR(MP_QSTR_SPDIF_IN), MP_ROM_PTR(&pin_GPIO_10) },
+    { MP_ROM_QSTR(MP_QSTR_SPDIF_OUT), MP_ROM_PTR(&pin_GPIO_11) },
+
+    // Freelink UART
+    { MP_ROM_QSTR(MP_QSTR_FREELINK_TX), MP_ROM_PTR(&pin_GPIO_10) },
+    { MP_ROM_QSTR(MP_QSTR_FREELINK_RX), MP_ROM_PTR(&pin_GPIO_09) },
 
     { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
     { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/board.c b/ports/mimxrt10xx/boards/imxrt1020_evk/board.c
new file mode 100644
index 000000000..52dd498b3
--- /dev/null
+++ b/ports/mimxrt10xx/boards/imxrt1020_evk/board.c
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ * Copyright (c) 2019 Artur Pacholec
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+
+void board_init(void) {
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+}
diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c
new file mode 100644
index 000000000..b74c0b151
--- /dev/null
+++ b/ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright 2017 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "fsl_flexspi_nor_boot.h"
+#include "fsl_flexspi_nor_config.h"
+
+
+__attribute__((section(".boot_hdr.ivt")))
+/*************************************
+ *  IVT Data
+ *************************************/
+const ivt image_vector_table = {
+  IVT_HEADER,                         /* IVT Header */
+  IMAGE_ENTRY_ADDRESS,                /* Image Entry Function */
+  IVT_RSVD,                           /* Reserved = 0 */
+  (uint32_t)DCD_ADDRESS,              /* Address where DCD information is stored */
+  (uint32_t)BOOT_DATA_ADDRESS,        /* Address where BOOT Data Structure is stored */
+  (uint32_t)&image_vector_table,      /* Pointer to IVT Self (absolute address */
+  (uint32_t)CSF_ADDRESS,              /* Address where CSF file is stored */
+  IVT_RSVD                            /* Reserved = 0 */
+};
+
+__attribute__((section(".boot_hdr.boot_data")))
+/*************************************
+ *  Boot Data
+ *************************************/
+const BOOT_DATA_T boot_data = {
+  FLASH_BASE,                 /* boot start location */
+  FLASH_SIZE,                 /* size */
+  PLUGIN_FLAG,                /* Plugin flag*/
+  0xFFFFFFFF                  /* empty - extra data word */
+};
+
+__attribute__((section(".boot_hdr.conf")))
+// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39
+const flexspi_nor_config_t qspiflash_config = {
+    .memConfig =
+        {
+            .tag              = FLEXSPI_CFG_BLK_TAG,
+            .version          = FLEXSPI_CFG_BLK_VERSION,
+            .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
+            .csHoldTime       = 1u,
+            .csSetupTime      = 2u,
+            // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock
+            .deviceType    = kFlexSpiDeviceType_SerialNOR,
+            .sflashPadType = kSerialFlash_4Pads,
+            .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03
+            .sflashA1Size  = FLASH_SIZE,
+            .lookupTable =
+                {
+                    // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)
+                    // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) |
+                    //  FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
+                    // Read LUTs
+                    FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
+                    FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
+                    0,
+                    0,
+
+                    0x24040405,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000406,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x08180420,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x081804D8,
+                    0,
+                    0,
+                    0,
+
+                    0x08180402,
+                    0x00002004,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000460,
+                },
+        },
+    .pageSize           = 256u,
+    .sectorSize         = 4u * 1024u,
+    .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz,
+    .blockSize          = 0x00010000,
+    .isUniformBlockSize = false,
+};
diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.h b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.h
new file mode 100644
index 000000000..a40df100e
--- /dev/null
+++ b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.h
@@ -0,0 +1,14 @@
+#define MICROPY_HW_BOARD_NAME "iMX RT 1020 EVK"
+#define MICROPY_HW_MCU_NAME "IMXRT1021DAG5A"
+
+// If you change this, then make sure to update the linker scripts as well to
+// make sure you don't overwrite code
+#define CIRCUITPY_INTERNAL_NVM_SIZE 0
+
+#define BOARD_FLASH_SIZE (8 * 1024 * 1024)
+
+#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_SD_B1_03)
+#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_SD_B1_02)
+
+#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_B1_09)
+#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_B1_08)
diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk
new file mode 100644
index 000000000..62a2c90de
--- /dev/null
+++ b/ports/mimxrt10xx/boards/imxrt1020_evk/mpconfigboard.mk
@@ -0,0 +1,8 @@
+USB_VID = 0x16C0
+USB_PID = 0x8888
+USB_PRODUCT = "iMX RT 1020 EVK"
+USB_MANUFACTURER = "NXP"
+
+CHIP_VARIANT = MIMXRT1021DAG5A
+CHIP_FAMILY = MIMXRT1021
+FLASH = IS25LP064A
diff --git a/ports/mimxrt10xx/boards/imxrt1020_evk/pins.c b/ports/mimxrt10xx/boards/imxrt1020_evk/pins.c
new file mode 100644
index 000000000..ef8115a64
--- /dev/null
+++ b/ports/mimxrt10xx/boards/imxrt1020_evk/pins.c
@@ -0,0 +1,84 @@
+#include "shared-bindings/board/__init__.h"
+
+#include "boards/board.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_AD_B1_09) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_B1_09) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_AD_B1_08) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_B1_08) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_AD_B0_09) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_AD_B0_07) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_AD_B0_05) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_AD_B0_06) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_AD_B0_14) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_AD_B1_06) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_AD_B1_07) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_AD_B0_15) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_AD_B0_11) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_AD_B0_12) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_AD_B0_13) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_AD_B0_10) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_SD_B1_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_SD_B1_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_SD_B1_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_SD_B1_02) },
+
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B1_10) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_11) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B1_12) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_13) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_15) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B1_14) },
+
+    { MP_OBJ_NEW_QSTR(MP_QSTR_USER_LED), MP_ROM_PTR(&pin_GPIO_AD_B0_05) },
+
+    // SD Card
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_GPIO_SD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_SW), MP_ROM_PTR(&pin_GPIO_SD_B0_06) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CMD), MP_ROM_PTR(&pin_GPIO_SD_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D0), MP_ROM_PTR(&pin_GPIO_SD_B0_04) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D1), MP_ROM_PTR(&pin_GPIO_SD_B0_05) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D2), MP_ROM_PTR(&pin_GPIO_SD_B0_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D3), MP_ROM_PTR(&pin_GPIO_SD_B0_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_PWREN), MP_ROM_PTR(&pin_GPIO_SD_B1_04) },
+
+    // // Audio Interface
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_INT), MP_ROM_PTR(&pin_GPIO_AD_B1_04) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_SYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_02) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_BCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_RXD), MP_ROM_PTR(&pin_GPIO_AD_B1_05) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_TXD), MP_ROM_PTR(&pin_GPIO_AD_B1_03) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_MCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
+
+    // // Ethernet
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_MDIO), MP_ROM_PTR(&pin_GPIO_EMC_40) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_MDC), MP_ROM_PTR(&pin_GPIO_EMC_41) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD0), MP_ROM_PTR(&pin_GPIO_AD_B0_10) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD1), MP_ROM_PTR(&pin_GPIO_AD_B0_09) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_CRS_DV), MP_ROM_PTR(&pin_GPIO_AD_B0_11) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD0), MP_ROM_PTR(&pin_GPIO_AD_B0_14) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD1), MP_ROM_PTR(&pin_GPIO_AD_B0_15) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXEN), MP_ROM_PTR(&pin_GPIO_AD_B0_13) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_INT), MP_ROM_PTR(&pin_GPIO_AD_B1_06) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_RST), MP_ROM_PTR(&pin_GPIO_AD_B0_04) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_CLK), MP_ROM_PTR(&pin_GPIO_AD_B0_08) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXER), MP_ROM_PTR(&pin_GPIO_AD_B0_12) },
+
+    // // Freelink UART
+    { MP_ROM_QSTR(MP_QSTR_FREELINK_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_06) },
+    { MP_ROM_QSTR(MP_QSTR_FREELINK_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_07) },
+
+    // CAN
+    { MP_ROM_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_GPIO_SD_B1_00) },
+    { MP_ROM_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_GPIO_SD_B1_01) },
+    { MP_ROM_QSTR(MP_QSTR_CAN_STBY), MP_ROM_PTR(&pin_GPIO_AD_B1_13) },
+
+    //
+    { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SDA), MP_ROM_PTR(&pin_GPIO_SD_B1_03) },
+    { MP_ROM_QSTR(MP_QSTR_ACCELEROMETER_SCL), MP_ROM_PTR(&pin_GPIO_SD_B1_02) },
+
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/board.c b/ports/mimxrt10xx/boards/imxrt1060_evk/board.c
new file mode 100644
index 000000000..52dd498b3
--- /dev/null
+++ b/ports/mimxrt10xx/boards/imxrt1060_evk/board.c
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ * Copyright (c) 2019 Artur Pacholec
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+
+void board_init(void) {
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+}
diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c b/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c
new file mode 100644
index 000000000..c281d4541
--- /dev/null
+++ b/ports/mimxrt10xx/boards/imxrt1060_evk/flash_config.c
@@ -0,0 +1,141 @@
+/*
+ * Copyright 2017 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "fsl_flexspi_nor_boot.h"
+#include "fsl_flexspi_nor_config.h"
+
+/* Component ID definition, used by tools. */
+#ifndef FSL_COMPONENT_ID
+#define FSL_COMPONENT_ID "platform.drivers.xip_device"
+#endif
+
+#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
+#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
+    __attribute__((section(".boot_hdr.ivt")))
+#elif defined(__ICCARM__)
+#pragma location=".boot_hdr.ivt"
+#endif
+/*************************************
+ *  IVT Data
+ *************************************/
+const ivt image_vector_table = {
+  IVT_HEADER,                         /* IVT Header */
+  IMAGE_ENTRY_ADDRESS,                /* Image Entry Function */
+  IVT_RSVD,                           /* Reserved = 0 */
+  (uint32_t)DCD_ADDRESS,              /* Address where DCD information is stored */
+  (uint32_t)BOOT_DATA_ADDRESS,        /* Address where BOOT Data Structure is stored */
+  (uint32_t)&image_vector_table,      /* Pointer to IVT Self (absolute address */
+  (uint32_t)CSF_ADDRESS,              /* Address where CSF file is stored */
+  IVT_RSVD                            /* Reserved = 0 */
+};
+
+#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
+    __attribute__((section(".boot_hdr.boot_data")))
+#elif defined(__ICCARM__)
+#pragma location=".boot_hdr.boot_data"
+#endif
+/*************************************
+ *  Boot Data
+ *************************************/
+const BOOT_DATA_T boot_data = {
+  FLASH_BASE,                 /* boot start location */
+  FLASH_SIZE,                 /* size */
+  PLUGIN_FLAG,                /* Plugin flag*/
+  0xFFFFFFFF                  /* empty - extra data word */
+};
+#endif
+
+#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
+__attribute__((section(".boot_hdr.conf")))
+#elif defined(__ICCARM__)
+#pragma location = ".boot_hdr.conf"
+#endif
+
+// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39
+const flexspi_nor_config_t qspiflash_config = {
+    .memConfig =
+        {
+            .tag              = FLEXSPI_CFG_BLK_TAG,
+            .version          = FLEXSPI_CFG_BLK_VERSION,
+            .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
+            .csHoldTime       = 1u,
+            .csSetupTime      = 2u,
+            // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock
+            .deviceType    = kFlexSpiDeviceType_SerialNOR,
+            .sflashPadType = kSerialFlash_4Pads,
+            .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03
+            .sflashA1Size  = FLASH_SIZE,
+            .lookupTable =
+                {
+                    // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)
+                    // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) |
+                    //  FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
+                    // Read LUTs
+                    FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
+                    FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
+                    0,
+                    0,
+
+                    0x24040405,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000406,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x08180420,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x081804D8,
+                    0,
+                    0,
+                    0,
+
+                    0x08180402,
+                    0x00002004,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000460,
+                },
+        },
+    .pageSize           = 256u,
+    .sectorSize         = 4u * 1024u,
+    .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz,
+    .blockSize          = 0x00010000,
+    .isUniformBlockSize = false,
+};
diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.h b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.h
new file mode 100644
index 000000000..8eccd8aee
--- /dev/null
+++ b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.h
@@ -0,0 +1,14 @@
+#define MICROPY_HW_BOARD_NAME "iMX RT 1060 EVK"
+#define MICROPY_HW_MCU_NAME "IMXRT1062DVJ6A"
+
+// If you change this, then make sure to update the linker scripts as well to
+// make sure you don't overwrite code
+#define CIRCUITPY_INTERNAL_NVM_SIZE 0
+
+#define BOARD_FLASH_SIZE (8 * 1024 * 1024)
+
+#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_AD_B1_00)
+#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_AD_B1_01)
+
+#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_B1_07)
+#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_B1_06)
diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk
new file mode 100644
index 000000000..a70d1deeb
--- /dev/null
+++ b/ports/mimxrt10xx/boards/imxrt1060_evk/mpconfigboard.mk
@@ -0,0 +1,8 @@
+USB_VID = 0x16C0
+USB_PID = 0x8888
+USB_PRODUCT = "iMX RT 1060 EVK"
+USB_MANUFACTURER = "NXP"
+
+CHIP_VARIANT = MIMXRT1062DVJ6A
+CHIP_FAMILY = MIMXRT1062
+FLASH = IS25WP064A
diff --git a/ports/mimxrt10xx/boards/imxrt1060_evk/pins.c b/ports/mimxrt10xx/boards/imxrt1060_evk/pins.c
new file mode 100644
index 000000000..2d268952d
--- /dev/null
+++ b/ports/mimxrt10xx/boards/imxrt1060_evk/pins.c
@@ -0,0 +1,128 @@
+#include "shared-bindings/board/__init__.h"
+
+#include "boards/board.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_AD_B1_07) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_B1_07) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_AD_B1_06) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_B1_06) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_AD_B0_11) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_AD_B1_08) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_AD_B0_09) }, // Connected to audio codec
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_AD_B0_10) }, // Connected to audio codec
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_AD_B1_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_AD_B1_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_AD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_AD_B0_02) }, // Connected to audio codec
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_SD_B0_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_SD_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_SD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_SD_B0_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
+
+    // i2c sensor is on I2C1_SCL/SDA
+
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B1_10) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_11) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B1_04) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_05) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
+
+    { MP_OBJ_NEW_QSTR(MP_QSTR_USER_LED), MP_ROM_PTR(&pin_GPIO_AD_B0_09) },
+
+    // Camera Sensor Interface
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_VSYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_06) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_PWDN), MP_ROM_PTR(&pin_GPIO_AD_B1_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_HSYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_07) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D9), MP_ROM_PTR(&pin_GPIO_AD_B1_08) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_MCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_05) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D8), MP_ROM_PTR(&pin_GPIO_AD_B1_09) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D7), MP_ROM_PTR(&pin_GPIO_AD_B1_10) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_PIXCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_04) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D6), MP_ROM_PTR(&pin_GPIO_AD_B1_11) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D2), MP_ROM_PTR(&pin_GPIO_AD_B1_15) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D5), MP_ROM_PTR(&pin_GPIO_AD_B1_12) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D3), MP_ROM_PTR(&pin_GPIO_AD_B1_14) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CSI_D4), MP_ROM_PTR(&pin_GPIO_AD_B1_13) },
+
+    // SD Card
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CLK), MP_ROM_PTR(&pin_GPIO_SD_B0_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_SW), MP_ROM_PTR(&pin_GPIO_B1_12) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_CMD), MP_ROM_PTR(&pin_GPIO_SD_B0_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D0), MP_ROM_PTR(&pin_GPIO_SD_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D1), MP_ROM_PTR(&pin_GPIO_SD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D2), MP_ROM_PTR(&pin_GPIO_SD_B0_04) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_D3), MP_ROM_PTR(&pin_GPIO_SD_B0_05) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SD_PWREN), MP_ROM_PTR(&pin_GPIO_AD_B1_03) },
+
+    // LCD Interface
+    { MP_ROM_QSTR(MP_QSTR_LCD_BACKLIGHT), MP_ROM_PTR(&pin_GPIO_B1_15) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_RST), MP_ROM_PTR(&pin_GPIO_AD_B0_02) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_ENABLE), MP_ROM_PTR(&pin_GPIO_B0_01) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_VSYNC), MP_ROM_PTR(&pin_GPIO_B0_03) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_HSYNC), MP_ROM_PTR(&pin_GPIO_B0_02) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_CLK), MP_ROM_PTR(&pin_GPIO_B0_00) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D0), MP_ROM_PTR(&pin_GPIO_B0_04) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D1), MP_ROM_PTR(&pin_GPIO_B0_05) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D2), MP_ROM_PTR(&pin_GPIO_B0_06) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D3), MP_ROM_PTR(&pin_GPIO_B0_07) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D4), MP_ROM_PTR(&pin_GPIO_B0_08) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D5), MP_ROM_PTR(&pin_GPIO_B0_09) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D6), MP_ROM_PTR(&pin_GPIO_B0_10) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D7), MP_ROM_PTR(&pin_GPIO_B0_11) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D8), MP_ROM_PTR(&pin_GPIO_B0_12) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D9), MP_ROM_PTR(&pin_GPIO_B0_13) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D10), MP_ROM_PTR(&pin_GPIO_B0_14) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D11), MP_ROM_PTR(&pin_GPIO_B0_15) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D12), MP_ROM_PTR(&pin_GPIO_B1_00) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D13), MP_ROM_PTR(&pin_GPIO_B1_01) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D14), MP_ROM_PTR(&pin_GPIO_B1_02) },
+    { MP_ROM_QSTR(MP_QSTR_LCD_D15), MP_ROM_PTR(&pin_GPIO_B1_03) },
+
+    // Touch Interface
+    { MP_ROM_QSTR(MP_QSTR_LCD_TOUCH_INT), MP_ROM_PTR(&pin_GPIO_AD_B0_11) },
+
+    // Audio Interface
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_INT), MP_ROM_PTR(&pin_GPIO_AD_B1_08) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_SYNC), MP_ROM_PTR(&pin_GPIO_AD_B1_15) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_BCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_14) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_RXD), MP_ROM_PTR(&pin_GPIO_AD_B1_12) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_TXD), MP_ROM_PTR(&pin_GPIO_AD_B1_13) },
+    { MP_ROM_QSTR(MP_QSTR_AUDIO_MCLK), MP_ROM_PTR(&pin_GPIO_AD_B1_09) },
+
+    // SPDIF
+    { MP_ROM_QSTR(MP_QSTR_SPDIF_IN), MP_ROM_PTR(&pin_GPIO_AD_B1_03) },
+    { MP_ROM_QSTR(MP_QSTR_SPDIF_OUT), MP_ROM_PTR(&pin_GPIO_AD_B1_02) },
+
+    // Ethernet
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_MDIO), MP_ROM_PTR(&pin_GPIO_EMC_41) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_MDC), MP_ROM_PTR(&pin_GPIO_EMC_40) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD0), MP_ROM_PTR(&pin_GPIO_B1_04) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXD1), MP_ROM_PTR(&pin_GPIO_B1_05) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_CRS_DV), MP_ROM_PTR(&pin_GPIO_B1_06) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD0), MP_ROM_PTR(&pin_GPIO_B1_07) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXD1), MP_ROM_PTR(&pin_GPIO_B1_08) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_TXEN), MP_ROM_PTR(&pin_GPIO_B1_09) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_INT), MP_ROM_PTR(&pin_GPIO_AD_B0_10) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_RST), MP_ROM_PTR(&pin_GPIO_AD_B0_09) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_CLK), MP_ROM_PTR(&pin_GPIO_B1_10) },
+    { MP_ROM_QSTR(MP_QSTR_ETHERNET_RXER), MP_ROM_PTR(&pin_GPIO_B1_11) },
+
+    // Freelink UART
+    { MP_ROM_QSTR(MP_QSTR_FREELINK_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_12) },
+    { MP_ROM_QSTR(MP_QSTR_FREELINK_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_13) },
+
+    // CAN
+    { MP_ROM_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_14) },
+    { MP_ROM_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_15) },
+    { MP_ROM_QSTR(MP_QSTR_CAN_STBY), MP_ROM_PTR(&pin_GPIO_AD_B0_05) },
+
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld b/ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld
deleted file mode 100644
index d36ee1239..000000000
--- a/ports/mimxrt10xx/boards/mimxrt1011-bootloader-external-flash.ld
+++ /dev/null
@@ -1,106 +0,0 @@
-ENTRY(Reset_Handler)
-
-_minimum_stack_size = 64K;
-_minimum_heap_size = 0;
-
-MEMORY
-{
-    FLASH (rx)            : ORIGIN = 0x60000000, LENGTH = 8M
-    FLASH_BOOTLOADER (rx) : ORIGIN = 0x60000000, LENGTH = 48K
-    FLASH_ISR (rx)        : ORIGIN = 0x6000C000, LENGTH = 1K
-    FLASH_TEXT (rx)       : ORIGIN = 0x6000C400, LENGTH = 975K
-    FLASH_FATFS (r)       : ORIGIN = 0x60100000, LENGTH = 7M
-    RAM (rwx)             : ORIGIN = 0x00000000, LENGTH = 32K
-    OCRAM (rwx)           : ORIGIN = 0x20200000, LENGTH = 64K
-}
-
-_estack = ORIGIN(OCRAM) + LENGTH(OCRAM);
-_bootloader_dbl_tap = ORIGIN(RAM) + LENGTH(RAM) - 4;
-
-__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS);
-__fatfs_flash_length     = LENGTH(FLASH_FATFS);
-
-__RAM_VECTOR_TABLE_SIZE_BYTES = 0;
-
-SECTIONS
-{
-    .interrupts :
-    {
-        __VECTOR_TABLE = .;
-        __VECTOR_RAM = .;
-
-        . = ALIGN(4);
-        KEEP(*(.isr_vector))         /* Startup code */
-        . = ALIGN(4);
-    } > FLASH_ISR
-
-    .text :
-    {
-        . = ALIGN(4);
-    *(EXCLUDE_FILE(
-        *flexspi_nor_flash_ops.o
-        *fsl_flexspi.o
-    ) .text*)                /* .text* sections (code) */
-        *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-        . = ALIGN(4);
-    } > FLASH_TEXT
-
-    .ARM.exidx :
-    {
-        *(.ARM.exidx*)
-        *(.gnu.linkonce.armexidx.*)
-        _etext = .;        /* define a global symbol at end of code */
-        __etext = .;       /* define a global symbol at end of code */
-    } > FLASH_TEXT
-
-    /* used by the startup to initialize data */
-    _sidata = .;
-
-    .data : AT (_sidata)
-    {
-        . = ALIGN(4);
-        __data_start__ = .;     /* create a global symbol at data start */
-
-        *(.data*)               /* .data* sections */
-        *flexspi_nor_flash_ops.o(.text*)
-        *fsl_flexspi.o(.text*)
-        . = ALIGN(4);
-
-        __data_end__ = .;       /* define a global symbol at data end */
-    } > RAM
-
-    /* Uninitialized data section */
-    .bss :
-    {
-        . = ALIGN(4);
-        __bss_start__ = .;
-
-        *(.bss*)
-        *(COMMON)
-
-        . = ALIGN(4);
-        __bss_end__ = .;
-        PROVIDE(end = .);
-    } > RAM
-
-    .heap :
-    {
-        . = ALIGN(8);
-        _heap_start = .;    /* define a global symbol at heap start */
-
-        . += _minimum_heap_size;
-
-        __HeapLimit = .;
-    } > OCRAM
-
-    .stack :
-    {
-        . = ALIGN(8);
-        . += _minimum_stack_size;
-    } > OCRAM
-
-    .ARM.attributes 0 : { *(.ARM.attributes) }
-}
-
-ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data")
-ASSERT(_estack - _minimum_stack_size >= __HeapLimit, "region OCRAM overflowed with stack and heap")
diff --git a/ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld b/ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld
deleted file mode 100644
index f1b0d8554..000000000
--- a/ports/mimxrt10xx/boards/mimxrt1011-external-flash.ld
+++ /dev/null
@@ -1,123 +0,0 @@
-ENTRY(Reset_Handler)
-
-_minimum_stack_size = 64K;
-_minimum_heap_size = 0;
-
-MEMORY
-{
-    FLASH (rx)        : ORIGIN = 0x60000000, LENGTH = 8M
-    FLASH_CONFIG (rx) : ORIGIN = 0x60000400, LENGTH = 3K
-    FLASH_IVT (rx)    : ORIGIN = 0x60001000, LENGTH = 4K
-    FLASH_ISR (rx)    : ORIGIN = 0x60002000, LENGTH = 1K
-    FLASH_TEXT (rx)   : ORIGIN = 0x60002400, LENGTH = 1015K
-    FLASH_FATFS (r)   : ORIGIN = 0x60100000, LENGTH = 7M
-    RAM (rwx)         : ORIGIN = 0x00000000, LENGTH = 32K
-    OCRAM (rwx)       : ORIGIN = 0x20200000, LENGTH = 64K
-}
-
-_estack = ORIGIN(OCRAM) + LENGTH(OCRAM);
-_bootloader_dbl_tap = 0;
-
-__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS);
-__fatfs_flash_length     = LENGTH(FLASH_FATFS);
-
-__RAM_VECTOR_TABLE_SIZE_BYTES = 0;
-
-SECTIONS
-{
-    .flash_config :
-    {
-        . = ALIGN(4);
-        KEEP(* (.boot_hdr.conf))
-        . = ALIGN(4);
-    } > FLASH_CONFIG
-
-    .ivt :
-    {
-        . = ALIGN(4);
-        KEEP(* (.boot_hdr.ivt))
-        KEEP(* (.boot_hdr.boot_data))
-        KEEP(* (.boot_hdr.dcd_data))
-        . = ALIGN(4);
-    } > FLASH_IVT
-
-    .interrupts :
-    {
-        __VECTOR_TABLE = .;
-        __VECTOR_RAM = .;
-
-        . = ALIGN(4);
-        KEEP(*(.isr_vector))         /* Startup code */
-        . = ALIGN(4);
-    } > FLASH_ISR
-
-    .text :
-    {
-        . = ALIGN(4);
-    *(EXCLUDE_FILE(
-        *flexspi_nor_flash_ops.o
-        *fsl_flexspi.o
-    ) .text*)                /* .text* sections (code) */
-        *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-        . = ALIGN(4);
-    } > FLASH_TEXT
-
-    .ARM.exidx :
-    {
-        *(.ARM.exidx*)
-        *(.gnu.linkonce.armexidx.*)
-        _etext = .;        /* define a global symbol at end of code */
-        __etext = .;       /* define a global symbol at end of code */
-    } > FLASH_TEXT
-
-    /* used by the startup to initialize data */
-    _sidata = .;
-
-    .data : AT (_sidata)
-    {
-        . = ALIGN(4);
-        __data_start__ = .;     /* create a global symbol at data start */
-
-        *(.data*)               /* .data* sections */
-        *flexspi_nor_flash_ops.o(.text*)
-        *fsl_flexspi.o(.text*)
-        . = ALIGN(4);
-
-        __data_end__ = .;       /* define a global symbol at data end */
-    } > RAM
-
-    /* Uninitialized data section */
-    .bss :
-    {
-        . = ALIGN(4);
-        __bss_start__ = .;
-
-        *(.bss*)
-        *(COMMON)
-
-        . = ALIGN(4);
-        __bss_end__ = .;
-        PROVIDE(end = .);
-    } > RAM
-
-    .heap :
-    {
-        . = ALIGN(8);
-        _heap_start = .;    /* define a global symbol at heap start */
-
-        . += _minimum_heap_size;
-
-        __HeapLimit = .;
-    } > OCRAM
-
-    .stack :
-    {
-        . = ALIGN(8);
-        . += _minimum_stack_size;
-    } > OCRAM
-
-    .ARM.attributes 0 : { *(.ARM.attributes) }
-}
-
-ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data")
-ASSERT(_estack - _minimum_stack_size >= __HeapLimit, "region OCRAM overflowed with stack and heap")
diff --git a/ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld b/ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld
deleted file mode 100644
index 16442607f..000000000
--- a/ports/mimxrt10xx/boards/mimxrt1062-bootloader-external-flash.ld
+++ /dev/null
@@ -1,106 +0,0 @@
-ENTRY(Reset_Handler)
-
-_minimum_stack_size = 64K;
-_minimum_heap_size = 0;
-
-MEMORY
-{
-    FLASH (rx)            : ORIGIN = 0x60000000, LENGTH = 8M
-    FLASH_BOOTLOADER (rx) : ORIGIN = 0x60000000, LENGTH = 48K
-    FLASH_ISR (rx)        : ORIGIN = 0x6000C000, LENGTH = 1K
-    FLASH_TEXT (rx)       : ORIGIN = 0x6000C400, LENGTH = 975K
-    FLASH_FATFS (r)       : ORIGIN = 0x60100000, LENGTH = 7M
-    RAM (rwx)             : ORIGIN = 0x00000000, LENGTH = 128K
-    OCRAM (rwx)           : ORIGIN = 0x20200000, LENGTH = 768K
-}
-
-_estack = ORIGIN(OCRAM) + LENGTH(OCRAM);
-_bootloader_dbl_tap = ORIGIN(RAM) + LENGTH(RAM) - 4;
-
-__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS);
-__fatfs_flash_length     = LENGTH(FLASH_FATFS);
-
-__RAM_VECTOR_TABLE_SIZE_BYTES = 0;
-
-SECTIONS
-{
-    .interrupts :
-    {
-        __VECTOR_TABLE = .;
-        __VECTOR_RAM = .;
-
-        . = ALIGN(4);
-        KEEP(*(.isr_vector))         /* Startup code */
-        . = ALIGN(4);
-    } > FLASH_ISR
-
-    .text :
-    {
-        . = ALIGN(4);
-    *(EXCLUDE_FILE(
-        *flexspi_nor_flash_ops.o
-        *fsl_flexspi.o
-    ) .text*)                /* .text* sections (code) */
-        *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-        . = ALIGN(4);
-    } > FLASH_TEXT
-
-    .ARM.exidx :
-    {
-        *(.ARM.exidx*)
-        *(.gnu.linkonce.armexidx.*)
-        _etext = .;        /* define a global symbol at end of code */
-        __etext = .;       /* define a global symbol at end of code */
-    } > FLASH_TEXT
-
-    /* used by the startup to initialize data */
-    _sidata = .;
-
-    .data : AT (_sidata)
-    {
-        . = ALIGN(4);
-        __data_start__ = .;     /* create a global symbol at data start */
-
-        *(.data*)               /* .data* sections */
-        *flexspi_nor_flash_ops.o(.text*)
-        *fsl_flexspi.o(.text*)
-        . = ALIGN(4);
-
-        __data_end__ = .;       /* define a global symbol at data end */
-    } > RAM
-
-    /* Uninitialized data section */
-    .bss :
-    {
-        . = ALIGN(4);
-        __bss_start__ = .;
-
-        *(.bss*)
-        *(COMMON)
-
-        . = ALIGN(4);
-        __bss_end__ = .;
-        PROVIDE(end = .);
-    } > RAM
-
-    .heap :
-    {
-        . = ALIGN(8);
-        _heap_start = .;    /* define a global symbol at heap start */
-
-        . += _minimum_heap_size;
-
-        __HeapLimit = .;
-    } > OCRAM
-
-    .stack :
-    {
-        . = ALIGN(8);
-        . += _minimum_stack_size;
-    } > OCRAM
-
-    .ARM.attributes 0 : { *(.ARM.attributes) }
-}
-
-ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data")
-ASSERT(_estack - _minimum_stack_size >= __HeapLimit, "region OCRAM overflowed with stack and heap")
diff --git a/ports/mimxrt10xx/boards/teensy40/board.c b/ports/mimxrt10xx/boards/teensy40/board.c
new file mode 100644
index 000000000..52dd498b3
--- /dev/null
+++ b/ports/mimxrt10xx/boards/teensy40/board.c
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ * Copyright (c) 2019 Artur Pacholec
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+
+void board_init(void) {
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+}
diff --git a/ports/mimxrt10xx/boards/teensy40/board.ld b/ports/mimxrt10xx/boards/teensy40/board.ld
new file mode 100644
index 000000000..8f19810a3
--- /dev/null
+++ b/ports/mimxrt10xx/boards/teensy40/board.ld
@@ -0,0 +1 @@
+_ld_reserved_flash_size = 4K;
diff --git a/ports/mimxrt10xx/boards/teensy40/flash_config.c b/ports/mimxrt10xx/boards/teensy40/flash_config.c
new file mode 100644
index 000000000..a0661280b
--- /dev/null
+++ b/ports/mimxrt10xx/boards/teensy40/flash_config.c
@@ -0,0 +1,141 @@
+/*
+ * Copyright 2017 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "fsl_flexspi_nor_boot.h"
+#include "fsl_flexspi_nor_config.h"
+
+/* Component ID definition, used by tools. */
+#ifndef FSL_COMPONENT_ID
+#define FSL_COMPONENT_ID "platform.drivers.xip_device"
+#endif
+
+#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
+#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
+    __attribute__((section(".boot_hdr.ivt")))
+#elif defined(__ICCARM__)
+#pragma location=".boot_hdr.ivt"
+#endif
+/*************************************
+ *  IVT Data
+ *************************************/
+const ivt image_vector_table = {
+  IVT_HEADER,                         /* IVT Header */
+  IMAGE_ENTRY_ADDRESS,                /* Image Entry Function */
+  IVT_RSVD,                           /* Reserved = 0 */
+  (uint32_t)DCD_ADDRESS,              /* Address where DCD information is stored */
+  (uint32_t)BOOT_DATA_ADDRESS,        /* Address where BOOT Data Structure is stored */
+  (uint32_t)&image_vector_table,      /* Pointer to IVT Self (absolute address */
+  (uint32_t)CSF_ADDRESS,              /* Address where CSF file is stored */
+  IVT_RSVD                            /* Reserved = 0 */
+};
+
+#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
+    __attribute__((section(".boot_hdr.boot_data")))
+#elif defined(__ICCARM__)
+#pragma location=".boot_hdr.boot_data"
+#endif
+/*************************************
+ *  Boot Data
+ *************************************/
+const BOOT_DATA_T boot_data = {
+  FLASH_BASE,                 /* boot start location */
+  FLASH_SIZE,                 /* size */
+  PLUGIN_FLAG,                /* Plugin flag*/
+  0xFFFFFFFF                  /* empty - extra data word */
+};
+#endif
+
+#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
+__attribute__((section(".boot_hdr.conf")))
+#elif defined(__ICCARM__)
+#pragma location = ".boot_hdr.conf"
+#endif
+
+// Values copied from https://github.com/PaulStoffregen/cores/blob/ddb23fa5d97dac763bc06e11b9b41f026bd51f0a/teensy4/bootdata.c#L39
+const flexspi_nor_config_t qspiflash_config = {
+    .memConfig =
+        {
+            .tag              = FLEXSPI_CFG_BLK_TAG,
+            .version          = FLEXSPI_CFG_BLK_VERSION,
+            .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
+            .csHoldTime       = 1u,
+            .csSetupTime      = 2u,
+            // Enable DDR mode, Wordaddressable, Safe configuration, Differential clock
+            .deviceType    = kFlexSpiDeviceType_SerialNOR,
+            .sflashPadType = kSerialFlash_4Pads,
+            .serialClkFreq = kFlexSpiSerialClk_60MHz, // 03
+            .sflashA1Size  = 0x00200000,
+            .lookupTable =
+                {
+                    // FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)
+                    // (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) |
+                    //  FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
+                    // Read LUTs
+                    FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
+                    FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
+                    0,
+                    0,
+
+                    0x24040405,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000406,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x08180420,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x081804D8,
+                    0,
+                    0,
+                    0,
+
+                    0x08180402,
+                    0x00002004,
+                    0,
+                    0,
+
+                    0,
+                    0,
+                    0,
+                    0,
+
+                    0x00000460,
+                },
+        },
+    .pageSize           = 256u,
+    .sectorSize         = 4u * 1024u,
+    .ipcmdSerialClkFreq = kFlexSpiSerialClk_30MHz,
+    .blockSize          = 0x00010000,
+    .isUniformBlockSize = false,
+};
diff --git a/ports/mimxrt10xx/boards/teensy40/mpconfigboard.h b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.h
new file mode 100644
index 000000000..718d9b967
--- /dev/null
+++ b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.h
@@ -0,0 +1,18 @@
+#define MICROPY_HW_BOARD_NAME "Teensy 4.0"
+#define MICROPY_HW_MCU_NAME "IMXRT1062DVJ6A"
+
+// If you change this, then make sure to update the linker scripts as well to
+// make sure you don't overwrite code
+#define CIRCUITPY_INTERNAL_NVM_SIZE 0
+
+#define BOARD_FLASH_SIZE (2 * 1024 * 1024)
+
+#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_AD_B1_00)
+#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_AD_B1_01)
+
+#define DEFAULT_SPI_BUS_SCK  (&pin_GPIO_B0_03)
+#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_B0_02)
+#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_B0_01)
+
+#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_B0_03)
+#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_B0_02)
diff --git a/ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk
new file mode 100644
index 000000000..5913f9c9c
--- /dev/null
+++ b/ports/mimxrt10xx/boards/teensy40/mpconfigboard.mk
@@ -0,0 +1,8 @@
+USB_VID = 0x239A
+USB_PID = 0x8888
+USB_PRODUCT = "Teensy 4.0"
+USB_MANUFACTURER = "PJRC"
+
+CHIP_VARIANT = MIMXRT1062DVJ6A
+CHIP_FAMILY = MIMXRT1062
+FLASH = W25Q16JV
diff --git a/ports/mimxrt10xx/boards/teensy40/pins.c b/ports/mimxrt10xx/boards/teensy40/pins.c
new file mode 100644
index 000000000..9066ce0d2
--- /dev/null
+++ b/ports/mimxrt10xx/boards/teensy40/pins.c
@@ -0,0 +1,87 @@
+#include "shared-bindings/board/__init__.h"
+
+#include "boards/board.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+    // With USB on left. Bottom edge.
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_AD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_GPIO_AD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_AD_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_GPIO_AD_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_EMC_04) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_EMC_05) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_EMC_06) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO_EMC_08) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO_B0_10) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO_B1_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO_B1_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO_B0_11) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO_B0_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_B0_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_B0_01) },
+
+    // Top edge
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_AD_B1_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_B1_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_AD_B1_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_B1_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO_AD_B1_07) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO_AD_B1_07) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO_AD_B1_06) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO_AD_B1_06) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SDA0), MP_ROM_PTR(&pin_GPIO_AD_B1_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_SCL0), MP_ROM_PTR(&pin_GPIO_AD_B1_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO_AD_B1_10) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO_AD_B1_10) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO_AD_B1_11) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO_AD_B1_11) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_GPIO_AD_B1_08) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO_AD_B1_08) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO_AD_B1_09) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO_AD_B1_09) },
+
+    // Back side
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO_AD_B0_12) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_GPIO_AD_B0_12) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO_AD_B0_13) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_GPIO_AD_B0_13) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_GPIO_AD_B1_14) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_GPIO_AD_B1_14) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_GPIO_AD_B1_15) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_A13), MP_ROM_PTR(&pin_GPIO_AD_B1_15) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_GPIO_EMC_32) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D29), MP_ROM_PTR(&pin_GPIO_EMC_31) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_GPIO_EMC_37) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_GPIO_EMC_36) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D32), MP_ROM_PTR(&pin_GPIO_B0_12) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_GPIO_EMC_07) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D34), MP_ROM_PTR(&pin_GPIO_SD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_DAT1), MP_ROM_PTR(&pin_GPIO_SD_B0_03) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_GPIO_SD_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_DAT0), MP_ROM_PTR(&pin_GPIO_SD_B0_02) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_GPIO_SD_B0_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CLK), MP_ROM_PTR(&pin_GPIO_SD_B0_01) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_GPIO_SD_B0_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_CMD), MP_ROM_PTR(&pin_GPIO_SD_B0_00) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D38), MP_ROM_PTR(&pin_GPIO_SD_B0_04) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_DAT3), MP_ROM_PTR(&pin_GPIO_SD_B0_04) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_D39), MP_ROM_PTR(&pin_GPIO_SD_B0_05) },
+    { MP_OBJ_NEW_QSTR(MP_QSTR_DAT2), MP_ROM_PTR(&pin_GPIO_SD_B0_05) },
+
+    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/mimxrt10xx/common-hal/microcontroller/__init__.c b/ports/mimxrt10xx/common-hal/microcontroller/__init__.c
index 68de3a890..a9f4c740f 100644
--- a/ports/mimxrt10xx/common-hal/microcontroller/__init__.c
+++ b/ports/mimxrt10xx/common-hal/microcontroller/__init__.c
@@ -72,10 +72,10 @@ void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) {
         }
         // Pretend to be the first of the two reset presses needed to enter the
         // bootloader. That way one reset will end in the bootloader.
-        _bootloader_dbl_tap = DBL_TAP_MAGIC;
+        SNVS->LPGPR[0] = DBL_TAP_MAGIC;
     } else {
         // Set up the default.
-        _bootloader_dbl_tap = DBL_TAP_MAGIC_QUICK_BOOT;
+        SNVS->LPGPR[0] = DBL_TAP_MAGIC_QUICK_BOOT;
     }
     if (runmode == RUNMODE_SAFE_MODE) {
         safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE);
@@ -229,6 +229,7 @@ STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_13), MP_ROM_PTR(&pin_GPIO_AD_B1_13) },
     { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_14), MP_ROM_PTR(&pin_GPIO_AD_B1_14) },
     { MP_ROM_QSTR(MP_QSTR_GPIO_AD_B1_15), MP_ROM_PTR(&pin_GPIO_AD_B1_15) },
+    #ifdef MIMXRT1062_SERIES
     { MP_ROM_QSTR(MP_QSTR_GPIO_B0_00), MP_ROM_PTR(&pin_GPIO_B0_00) },
     { MP_ROM_QSTR(MP_QSTR_GPIO_B0_01), MP_ROM_PTR(&pin_GPIO_B0_01) },
     { MP_ROM_QSTR(MP_QSTR_GPIO_B0_02), MP_ROM_PTR(&pin_GPIO_B0_02) },
@@ -261,6 +262,7 @@ STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = {
     { MP_ROM_QSTR(MP_QSTR_GPIO_B1_13), MP_ROM_PTR(&pin_GPIO_B1_13) },
     { MP_ROM_QSTR(MP_QSTR_GPIO_B1_14), MP_ROM_PTR(&pin_GPIO_B1_14) },
     { MP_ROM_QSTR(MP_QSTR_GPIO_B1_15), MP_ROM_PTR(&pin_GPIO_B1_15) },
+    #endif
     { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_00), MP_ROM_PTR(&pin_GPIO_SD_B0_00) },
     { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_01), MP_ROM_PTR(&pin_GPIO_SD_B0_01) },
     { MP_ROM_QSTR(MP_QSTR_GPIO_SD_B0_02), MP_ROM_PTR(&pin_GPIO_SD_B0_02) },
diff --git a/ports/mimxrt10xx/linking/chip_family/MIMXRT1011.ld b/ports/mimxrt10xx/linking/chip_family/MIMXRT1011.ld
new file mode 100644
index 000000000..0d0beebaa
--- /dev/null
+++ b/ports/mimxrt10xx/linking/chip_family/MIMXRT1011.ld
@@ -0,0 +1,2 @@
+ram_size = 128K;
+flash_config_location = 0x60000400;
diff --git a/ports/mimxrt10xx/linking/chip_family/MIMXRT1021.ld b/ports/mimxrt10xx/linking/chip_family/MIMXRT1021.ld
new file mode 100644
index 000000000..21f2ea872
--- /dev/null
+++ b/ports/mimxrt10xx/linking/chip_family/MIMXRT1021.ld
@@ -0,0 +1,2 @@
+ram_size = 256K;
+flash_config_location = 0x60000000;
diff --git a/ports/mimxrt10xx/linking/chip_family/MIMXRT1062.ld b/ports/mimxrt10xx/linking/chip_family/MIMXRT1062.ld
new file mode 100644
index 000000000..e07c5c2c3
--- /dev/null
+++ b/ports/mimxrt10xx/linking/chip_family/MIMXRT1062.ld
@@ -0,0 +1,2 @@
+ram_size = 1M;
+flash_config_location = 0x60000000;
diff --git a/ports/mimxrt10xx/linking/common.ld b/ports/mimxrt10xx/linking/common.ld
new file mode 100644
index 000000000..5cead9ed0
--- /dev/null
+++ b/ports/mimxrt10xx/linking/common.ld
@@ -0,0 +1,158 @@
+/* Template for iMX RT 10xx linking. This is the last of four linker scripts passed in.
+
+The first three provide variables for this one.
+
+Boards can setup reserved flash with _ld_reserved_flash_size in board.ld. */
+
+ENTRY(Reset_Handler)
+
+code_size = 1M;
+_ld_default_stack_size = 20K;
+
+/* Default reserved flash to nothing. */
+_ld_reserved_flash_size = DEFINED(_ld_reserved_flash_size) ? _ld_reserved_flash_size : 0K ;
+
+MEMORY
+{
+    /* These next two sections are included in place of a bootloader. If a UF2 is used to load, it
+      will ignore these two sections because it lives there. */
+    /* This is the first block and is read so that the bootrom knows the optimal way to interface with the flash chip. */
+    FLASH_CONFIG (rx)     : ORIGIN = flash_config_location, LENGTH = 512
+    /* This can't move because the bootrom looks at this address. */
+    FLASH_IVT (rx)        : ORIGIN = 0x60001000, LENGTH = 4K
+    /* Place the ISRs 48k in to leave room for the bootloader when it is available. */
+    FLASH_TEXT (rx)        : ORIGIN = 0x6000C000, LENGTH = code_size - 48K
+    FLASH_FATFS (r)       : ORIGIN = 0x60100000, LENGTH = _ld_flash_size - code_size - _ld_reserved_flash_size
+    /* Teensy uses the last bit of flash for recovery. */
+    RESERVED_FLASH        : ORIGIN = 0x60100000 + _ld_flash_size - _ld_reserved_flash_size, LENGTH = _ld_reserved_flash_size
+    OCRAM (rwx)           : ORIGIN = 0x20200000, LENGTH = ram_size - 64K
+    DTCM (x)              : ORIGIN = 0x20000000, LENGTH = 32K
+    ITCM (x)              : ORIGIN = 0x00000000, LENGTH = 32K
+}
+
+__RAM_VECTOR_TABLE_SIZE_BYTES = 0;
+
+SECTIONS
+{
+    .flash_config :
+    {
+        . = ALIGN(4);
+        KEEP(* (.boot_hdr.conf))
+        . = ALIGN(4);
+    } > FLASH_CONFIG
+
+    .ivt :
+    {
+        . = ALIGN(4);
+        KEEP(* (.boot_hdr.ivt))
+        KEEP(* (.boot_hdr.boot_data))
+        KEEP(* (.boot_hdr.dcd_data))
+        . = ALIGN(4);
+    } > FLASH_IVT
+    image_vector_table = LOADADDR(.ivt);
+
+    .text :
+    {
+        . = ALIGN(4);
+        __VECTOR_TABLE = .;
+        __VECTOR_RAM = .;
+        _ld_isr_table = .;
+
+        KEEP(*(.isr_vector))         /* Startup code */
+    *(EXCLUDE_FILE(
+        *flexspi_nor_flash_ops.o
+        *fsl_flexspi.o
+    ) .text*)                /* .text* sections (code) */
+        *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+        . = ALIGN(4);
+    } > FLASH_TEXT
+
+    .ARM.exidx :
+    {
+        *(.ARM.exidx*)
+        *(.gnu.linkonce.armexidx.*)
+        _etext = .;        /* define a global symbol at end of code */
+        __etext = .;       /* define a global symbol at end of code */
+    } > FLASH_TEXT
+
+    _ld_filesystem_start = ORIGIN(FLASH_FATFS);
+    _ld_filesystem_end = _ld_filesystem_start + LENGTH(FLASH_FATFS);
+
+    .data :
+    {
+        . = ALIGN(4);
+        _sidata = .;
+        __data_start__ = .;     /* create a global symbol at data start */
+
+        *(.data*)               /* .data* sections */
+        *flexspi_nor_flash_ops.o(.text*)
+        *fsl_flexspi.o(.text*)
+        . = ALIGN(4);
+
+        __data_end__ = .;       /* define a global symbol at data end */
+    } > OCRAM AT> FLASH_TEXT
+
+    /* Uninitialized data section */
+    .bss :
+    {
+        . = ALIGN(4);
+        __bss_start__ = .;
+
+        *(.bss*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        __bss_end__ = .;
+        _ld_heap_start = .;
+        PROVIDE(end = .);
+    } > OCRAM
+    _ld_heap_end = ORIGIN(OCRAM) + LENGTH(OCRAM);
+
+    .itcm :
+    {
+        . = ALIGN(4);
+
+        *(.itcm.*)
+
+        . = ALIGN(4);
+    } > ITCM AT> FLASH_TEXT
+    _ld_itcm_destination = ADDR(.itcm);
+    _ld_itcm_flash_copy = LOADADDR(.itcm);
+    _ld_itcm_size = SIZEOF(.itcm);
+
+    .dtcm_data :
+    {
+        . = ALIGN(4);
+
+        *(.dtcm_data.*)
+
+        . = ALIGN(4);
+    } > DTCM AT> FLASH_TEXT
+    _ld_dtcm_data_destination = ADDR(.dtcm_data);
+    _ld_dtcm_data_flash_copy = LOADADDR(.dtcm_data);
+    _ld_dtcm_data_size = SIZEOF(.dtcm_data);
+
+    .dtcm_bss :
+    {
+        . = ALIGN(4);
+
+        *(.dtcm_bss.*)
+
+        . = ALIGN(4);
+    } > DTCM AT> DTCM
+    _ld_dtcm_bss_start = ADDR(.dtcm_bss);
+    _ld_dtcm_bss_end = ADDR(.dtcm_bss) + SIZEOF(.dtcm_bss);
+
+    .stack :
+    {
+        . = ALIGN(8);
+        _ld_stack_bottom = .;
+        . += _ld_default_stack_size;
+    } > DTCM
+    _ld_stack_top = ORIGIN(DTCM) + LENGTH(DTCM);
+    _estack = _ld_stack_top;
+
+    .ARM.attributes 0 : { *(.ARM.attributes) }
+}
+
+ASSERT(__data_end__ <= ORIGIN(FLASH_TEXT) + LENGTH(FLASH_TEXT), "region FLASH_TEXT overflowed with text and data")
diff --git a/ports/mimxrt10xx/linking/flash/AT25SF128A.ld b/ports/mimxrt10xx/linking/flash/AT25SF128A.ld
new file mode 100644
index 000000000..205d9dd83
--- /dev/null
+++ b/ports/mimxrt10xx/linking/flash/AT25SF128A.ld
@@ -0,0 +1 @@
+_ld_flash_size = 16M;
diff --git a/ports/mimxrt10xx/linking/flash/IS25LP064A.ld b/ports/mimxrt10xx/linking/flash/IS25LP064A.ld
new file mode 100644
index 000000000..53d296ec8
--- /dev/null
+++ b/ports/mimxrt10xx/linking/flash/IS25LP064A.ld
@@ -0,0 +1 @@
+_ld_flash_size = 8M;
diff --git a/ports/mimxrt10xx/linking/flash/IS25WP064A.ld b/ports/mimxrt10xx/linking/flash/IS25WP064A.ld
new file mode 100644
index 000000000..53d296ec8
--- /dev/null
+++ b/ports/mimxrt10xx/linking/flash/IS25WP064A.ld
@@ -0,0 +1 @@
+_ld_flash_size = 8M;
diff --git a/ports/mimxrt10xx/linking/flash/W25Q16JV.ld b/ports/mimxrt10xx/linking/flash/W25Q16JV.ld
new file mode 100644
index 000000000..9ce06b44a
--- /dev/null
+++ b/ports/mimxrt10xx/linking/flash/W25Q16JV.ld
@@ -0,0 +1 @@
+_ld_flash_size = 2M;
diff --git a/ports/mimxrt10xx/linking/flash/W25Q64JV.ld b/ports/mimxrt10xx/linking/flash/W25Q64JV.ld
new file mode 100644
index 000000000..53d296ec8
--- /dev/null
+++ b/ports/mimxrt10xx/linking/flash/W25Q64JV.ld
@@ -0,0 +1 @@
+_ld_flash_size = 8M;
diff --git a/ports/mimxrt10xx/mpconfigport.h b/ports/mimxrt10xx/mpconfigport.h
index 47b793fed..745c12f7d 100644
--- a/ports/mimxrt10xx/mpconfigport.h
+++ b/ports/mimxrt10xx/mpconfigport.h
@@ -28,11 +28,17 @@
 #ifndef __INCLUDED_MPCONFIGPORT_H
 #define __INCLUDED_MPCONFIGPORT_H
 
+#include <stdint.h>
+
 #define MICROPY_PY_SYS_PLATFORM                     "NXP IMXRT10XX"
 #define SPI_FLASH_MAX_BAUDRATE 24000000
 
+extern uint8_t _ld_filesystem_start;
+extern uint8_t _ld_filesystem_end;
+extern uint8_t _ld_default_stack_size;
+
 // 20kiB stack
-#define CIRCUITPY_DEFAULT_STACK_SIZE                0x5000
+#define CIRCUITPY_DEFAULT_STACK_SIZE                ((uint32_t) &_ld_default_stack_size)
 #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED          (0)
 #define MICROPY_PY_COLLECTIONS_ORDEREDDICT          (0)
 #define MICROPY_PY_FUNCTION_ATTRS                   (0)
@@ -40,6 +46,10 @@
 #define MICROPY_PY_UJSON                            (1)
 #define MICROPY_PY_REVERSE_SPECIAL_METHODS          (0)
 
+
+#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR ((uint32_t) &_ld_filesystem_start)
+#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE ((uint32_t) (&_ld_filesystem_end - &_ld_filesystem_start))
+
 #include "py/circuitpy_mpconfig.h"
 
 #define MICROPY_PORT_ROOT_POINTERS \
diff --git a/ports/mimxrt10xx/mpconfigport.mk b/ports/mimxrt10xx/mpconfigport.mk
index f1106e88f..b928ce3bb 100644
--- a/ports/mimxrt10xx/mpconfigport.mk
+++ b/ports/mimxrt10xx/mpconfigport.mk
@@ -1,6 +1,4 @@
-# Define an equivalent for MICROPY_LONGINT_IMPL, to pass to $(MPY-TOOL) in py/mkrules.mk
-# $(MPY-TOOL) needs to know what kind of longint to use (if any) to freeze long integers.
-# This should correspond to the MICROPY_LONGINT_IMPL definition in mpconfigport.h.
+LD_FILE = $(FLASH).ld $(CHIP_FAMILY).ld imxrt10xx.ld
 
 ifeq ($(LONGINT_IMPL),NONE)
 MPY_TOOL_LONGINT_IMPL = -mlongint-impl=none
@@ -16,5 +14,18 @@ endif
 
 INTERNAL_LIBM = 1
 
+USB_DEVICES = "CDC,MSC,HID"
 USB_SERIAL_NUMBER_LENGTH = 32
 USB_MSC_MAX_PACKET_SIZE = 512
+
+INTERNAL_FLASH_FILESYSTEM = 1
+
+CIRCUITPY_DISPLAYIO = 0
+CIRCUITPY_AUDIOIO = 0
+CIRCUITPY_AUDIOBUSIO = 0
+CIRCUITPY_FREQUENCYIO = 0
+CIRCUITPY_I2CSLAVE = 0
+CIRCUITPY_NVM = 0
+CIRCUITPY_ROTARYIO = 0
+
+LONGINT_IMPL = MPZ
diff --git a/ports/mimxrt10xx/mphalport.c b/ports/mimxrt10xx/mphalport.c
index b333730b9..06275cd83 100644
--- a/ports/mimxrt10xx/mphalport.c
+++ b/ports/mimxrt10xx/mphalport.c
@@ -49,7 +49,7 @@ void mp_hal_delay_ms(mp_uint_t delay) {
 }
 
 void mp_hal_delay_us(mp_uint_t delay) {
-#ifdef MIMXRT1011_SERIES
+#if defined(MIMXRT1011_SERIES) || defined(MIMXRT1021_SERIES)
     SDK_DelayAtLeastUs(delay, SystemCoreClock);
 #else
     SDK_DelayAtLeastUs(delay);
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c
new file mode 100644
index 000000000..7dc08f6dd
--- /dev/null
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/clocks.c
@@ -0,0 +1,371 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Artur Pacholec
+ * Copyright (c) 2020 Scott Shawcroft
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+/*
+ * Copyright 2019 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include "mpconfigport.h"
+
+#include "fsl_clock.h"
+#include "fsl_iomuxc.h"
+
+// These values are pulled from the SDK's devices/MIMXRT1021/project_template/clock_config.* files.
+
+#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */
+#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */
+
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 500000000U /*!< Core clock frequency: 500000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT 500000000UL
+#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT 40000000UL
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL
+#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL
+#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL
+#define BOARD_BOOTCLOCKRUN_ENET1_TX_CLK 0UL
+#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK 0UL
+#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK 0UL
+#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK 500000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 132000000UL
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 62500000UL
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 62500000UL
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 125000000UL
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 62500000UL
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 30000000UL
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL
+#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 62500000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 117333333UL
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
+#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL
+#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 176000000UL
+#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 176000000UL
+
+const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = {
+    .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
+    .numerator   = 0, /* 30 bit numerator of fractional loop divider */
+    .denominator = 1, /* 30 bit denominator of fractional loop divider */
+    .src         = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+};
+const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN = {
+    .loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */
+    .src         = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+};
+const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN = {
+    .enableClkOutput     = false, /* Disable the PLL providing the ENET 125MHz reference clock */
+    .enableClkOutput500M = true,  /* Enable the PLL providing the ENET 500MHz reference clock */
+    .enableClkOutput25M  = false, /* Disable the PLL providing the ENET 25MHz reference clock */
+    .loopDivider         = 1,     /* Set frequency of ethernet reference clock to 50 MHz */
+    .src                 = 0,     /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
+};
+
+// Based on the hello_world example in the SDK
+void clocks_init(void) {
+    /* Init RTC OSC clock frequency. */
+    CLOCK_SetRtcXtalFreq(32768U);
+    /* Enable 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
+    /* Use free 1MHz clock output. */
+    XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
+    /* Set XTAL 24MHz clock frequency. */
+    CLOCK_SetXtalFreq(24000000U);
+    /* Enable XTAL 24MHz clock source. */
+    CLOCK_InitExternalClk(0);
+    /* Enable internal RC. */
+    CLOCK_InitRcOsc24M();
+    /* Switch clock source to external OSC. */
+    CLOCK_SwitchOsc(kCLOCK_XtalOsc);
+    /* Set Oscillator ready counter value. */
+    CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
+    /* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 1);     /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
+    /* Setting the VDD_SOC to 1.5V. It is necessary to config AHB to 500Mhz. */
+    DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12);
+    /* Waiting for DCDC_STS_DC_OK bit is asserted */
+    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
+    {
+    }
+    /* Set AHB_PODF. */
+    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
+    /* Disable IPG clock gate. */
+    CLOCK_DisableClock(kCLOCK_Adc1);
+    CLOCK_DisableClock(kCLOCK_Adc2);
+    CLOCK_DisableClock(kCLOCK_Xbar1);
+    CLOCK_DisableClock(kCLOCK_Xbar2);
+    /* Set IPG_PODF. */
+    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
+    /* Set ARM_PODF. */
+    CLOCK_SetDiv(kCLOCK_ArmDiv, 0);
+    /* Set PERIPH_CLK2_PODF. */
+    CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
+    /* Disable PERCLK clock gate. */
+    CLOCK_DisableClock(kCLOCK_Gpt1);
+    CLOCK_DisableClock(kCLOCK_Gpt1S);
+    CLOCK_DisableClock(kCLOCK_Gpt2);
+    CLOCK_DisableClock(kCLOCK_Gpt2S);
+    CLOCK_DisableClock(kCLOCK_Pit);
+    /* Set PERCLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
+    /* Disable USDHC1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc1);
+    /* Set USDHC1_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc1Div, 2);
+    /* Set Usdhc1 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0);
+    /* Disable USDHC2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Usdhc2);
+    /* Set USDHC2_PODF. */
+    CLOCK_SetDiv(kCLOCK_Usdhc2Div, 2);
+    /* Set Usdhc2 clock source. */
+    CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left
+     * unchanged. Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as
+     * well.*/
+#ifndef SKIP_SYSCLK_INIT
+    /* Disable Semc clock gate. */
+    CLOCK_DisableClock(kCLOCK_Semc);
+    /* Set SEMC_PODF. */
+    CLOCK_SetDiv(kCLOCK_SemcDiv, 7);
+    /* Set Semc alt clock source. */
+    CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
+    /* Set Semc clock source. */
+    CLOCK_SetMux(kCLOCK_SemcMux, 0);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left
+     * unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as
+     * well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Disable Flexspi clock gate. */
+    CLOCK_DisableClock(kCLOCK_FlexSpi);
+    /* Set FLEXSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3);
+    /* Set Flexspi clock source. */
+    CLOCK_SetMux(kCLOCK_FlexspiMux, 2);
+#endif
+    /* Disable LPSPI clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpspi1);
+    CLOCK_DisableClock(kCLOCK_Lpspi2);
+    CLOCK_DisableClock(kCLOCK_Lpspi3);
+    CLOCK_DisableClock(kCLOCK_Lpspi4);
+    /* Set LPSPI_PODF. */
+    CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
+    /* Set Lpspi clock source. */
+    CLOCK_SetMux(kCLOCK_LpspiMux, 2);
+    /* Disable TRACE clock gate. */
+    CLOCK_DisableClock(kCLOCK_Trace);
+    /* Set TRACE_PODF. */
+    CLOCK_SetDiv(kCLOCK_TraceDiv, 2);
+    /* Set Trace clock source. */
+    CLOCK_SetMux(kCLOCK_TraceMux, 2);
+    /* Disable SAI1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai1);
+    /* Set SAI1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
+    /* Set SAI1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
+    /* Set Sai1 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
+    /* Disable SAI2 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai2);
+    /* Set SAI2_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);
+    /* Set SAI2_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai2Div, 1);
+    /* Set Sai2 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai2Mux, 0);
+    /* Disable SAI3 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Sai3);
+    /* Set SAI3_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
+    /* Set SAI3_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
+    /* Set Sai3 clock source. */
+    CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
+    /* Disable Lpi2c clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpi2c1);
+    CLOCK_DisableClock(kCLOCK_Lpi2c2);
+    CLOCK_DisableClock(kCLOCK_Lpi2c3);
+    /* Set LPI2C_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
+    /* Set Lpi2c clock source. */
+    CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
+    /* Disable CAN clock gate. */
+    CLOCK_DisableClock(kCLOCK_Can1);
+    CLOCK_DisableClock(kCLOCK_Can2);
+    CLOCK_DisableClock(kCLOCK_Can1S);
+    CLOCK_DisableClock(kCLOCK_Can2S);
+    /* Set CAN_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_CanDiv, 1);
+    /* Set Can clock source. */
+    CLOCK_SetMux(kCLOCK_CanMux, 2);
+    /* Disable UART clock gate. */
+    CLOCK_DisableClock(kCLOCK_Lpuart1);
+    CLOCK_DisableClock(kCLOCK_Lpuart2);
+    CLOCK_DisableClock(kCLOCK_Lpuart3);
+    CLOCK_DisableClock(kCLOCK_Lpuart4);
+    CLOCK_DisableClock(kCLOCK_Lpuart5);
+    CLOCK_DisableClock(kCLOCK_Lpuart6);
+    CLOCK_DisableClock(kCLOCK_Lpuart7);
+    CLOCK_DisableClock(kCLOCK_Lpuart8);
+    /* Set UART_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
+    /* Set Uart clock source. */
+    CLOCK_SetMux(kCLOCK_UartMux, 0);
+    /* Disable SPDIF clock gate. */
+    CLOCK_DisableClock(kCLOCK_Spdif);
+    /* Set SPDIF0_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
+    /* Set SPDIF0_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
+    /* Set Spdif clock source. */
+    CLOCK_SetMux(kCLOCK_SpdifMux, 3);
+    /* Disable Flexio1 clock gate. */
+    CLOCK_DisableClock(kCLOCK_Flexio1);
+    /* Set FLEXIO1_CLK_PRED. */
+    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
+    /* Set FLEXIO1_CLK_PODF. */
+    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
+    /* Set Flexio1 clock source. */
+    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
+    /* Set Pll3 sw clock source. */
+    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
+    /* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
+     * With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left
+     * unchanged. Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as
+     * well.*/
+#ifndef SKIP_SYSCLK_INIT
+#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
+    #warning "SKIP_SYSCLK_INIT should be defined to keep system pll (selected to be SEMC source clock in SDK projects) unchanged."
+#endif
+    /* Init System PLL. */
+    CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
+    /* Init System pfd0. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
+    /* Init System pfd1. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
+    /* Init System pfd2. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd2, 18);
+    /* Init System pfd3. */
+    CLOCK_InitSysPfd(kCLOCK_Pfd3, 18);
+#endif
+    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
+     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left
+     * unchanged. Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as
+     * well.*/
+#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
+    /* Init Usb1 PLL. */
+    CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
+    /* Init Usb1 pfd0. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22);
+    /* Init Usb1 pfd1. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
+    /* Init Usb1 pfd2. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
+    /* Init Usb1 pfd3. */
+    CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18);
+    /* Disable Usb1 PLL output for USBPHY1. */
+    CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK;
+#endif
+    /* DeInit Audio PLL. */
+    CLOCK_DeinitAudioPll();
+    /* Bypass Audio PLL. */
+    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
+    /* Set divider for Audio PLL. */
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
+    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
+    /* Enable Audio PLL output. */
+    CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
+    /* Init Enet PLL. */
+    CLOCK_InitEnetPll(&enetPllConfig_BOARD_BootClockRUN);
+    /* Set preperiph clock source. */
+    CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
+    /* Set periph clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphMux, 0);
+    /* Set periph clock2 clock source. */
+    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
+    /* Set per clock source. */
+    CLOCK_SetMux(kCLOCK_PerclkMux, 0);
+    /* Set clock out1 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
+    /* Set clock out1 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
+    /* Set clock out2 divider. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
+    /* Set clock out2 source. */
+    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(3);
+    /* Set clock out1 drives clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
+    /* Disable clock out1. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
+    /* Disable clock out2. */
+    CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
+    /* Set SAI1 MCLK1 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
+    /* Set SAI1 MCLK2 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
+    /* Set SAI1 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
+    /* Set SAI2 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
+    /* Set SAI3 MCLK3 clock source. */
+    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
+    /* Set MQS configuration. */
+    IOMUXC_MQSConfig(IOMUXC_GPR, kIOMUXC_MqsPwmOverSampleRate32, 0);
+    /* Set ENET Tx clock source. */
+    IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1RefClkMode, false);
+    /* Set GPT1 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
+    /* Set GPT2 High frequency reference clock source. */
+    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+
+    CLOCK_EnableClock(kCLOCK_Iomuxc);
+}
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c
new file mode 100644
index 000000000..39e4f0131
--- /dev/null
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c
@@ -0,0 +1,218 @@
+ /*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Lucian Copeland for Adafruit Industries
+ * Copyright (c) 2019 Artur Pacholec
+ * Copyright (c) 2020 Scott Shawcroft
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/obj.h"
+#include "py/mphal.h"
+#include "mimxrt10xx/periph.h"
+
+LPI2C_Type *mcu_i2c_banks[] = { LPI2C1, LPI2C2, LPI2C3, LPI2C4 };
+
+const mcu_periph_obj_t mcu_i2c_sda_list[8] = {
+    PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_B1_15),
+    PERIPH_PIN(1, 6, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 1, &pin_GPIO_EMC_03),
+
+    PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_B1_09),
+    PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SDA_SELECT_INPUT, 1, &pin_GPIO_EMC_18),
+
+    PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_B0_09),
+    PERIPH_PIN(3, 4, kIOMUXC_LPI2C3_SDA_SELECT_INPUT, 1, &pin_GPIO_SD_B0_01),
+
+    PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 0, &pin_GPIO_EMC_10),
+    PERIPH_PIN(4, 3, kIOMUXC_LPI2C4_SDA_SELECT_INPUT, 1, &pin_GPIO_SD_B1_03),
+};
+
+const mcu_periph_obj_t mcu_i2c_scl_list[8] = {
+    PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_B1_14),
+    PERIPH_PIN(1, 6, kIOMUXC_LPI2C1_SCL_SELECT_INPUT, 1, &pin_GPIO_EMC_02),
+
+    PERIPH_PIN(2, 0, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_B1_08),
+    PERIPH_PIN(2, 2, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 1, &pin_GPIO_EMC_19),
+
+    PERIPH_PIN(3, 1, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 0, &pin_GPIO_AD_B0_08),
+    PERIPH_PIN(3, 4, kIOMUXC_LPI2C3_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_B0_00),
+
+    PERIPH_PIN(4, 2, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 0, &pin_GPIO_EMC_11),
+    PERIPH_PIN(4, 3, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_B1_02),
+};
+
+LPSPI_Type *mcu_spi_banks[] = { LPSPI1, LPSPI2, LPSPI3, LPSPI4 };
+
+const mcu_periph_obj_t mcu_spi_sck_list[8] = {
+    PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B0_10),
+    PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 1, &pin_GPIO_SD_B0_02),
+
+    PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_EMC_00),
+    PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_EMC_10),
+    PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 2, &pin_GPIO_SD_B1_07),
+
+    PERIPH_PIN(3, 2, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B1_12),
+
+    PERIPH_PIN(4, 2, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B1_02),
+    PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_EMC_32),
+};
+
+const mcu_periph_obj_t mcu_spi_mosi_list[8] = {
+    PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B0_13),
+    PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDO_SELECT_INPUT, 1, &pin_GPIO_SD_B0_05),
+
+    PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_EMC_03),
+    PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_EMC_13),
+    PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 2, &pin_GPIO_SD_B1_09),
+
+    PERIPH_PIN(3, 2, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B1_15),
+
+    PERIPH_PIN(4, 2, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 0, &pin_GPIO_AD_B1_05),
+    PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SDO_SELECT_INPUT, 1, &pin_GPIO_EMC_35),
+};
+
+const mcu_periph_obj_t mcu_spi_miso_list[8] = {
+    PERIPH_PIN(1, 1, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B0_12),
+    PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SDI_SELECT_INPUT, 1, &pin_GPIO_SD_B0_04),
+
+    PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_EMC_02),
+    PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_12),
+    PERIPH_PIN(2, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 2, &pin_GPIO_SD_B1_08),
+
+    PERIPH_PIN(3, 2, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B1_14),
+
+    PERIPH_PIN(4, 2, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 0, &pin_GPIO_AD_B1_04),
+    PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_34),
+};
+
+LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 };
+
+const mcu_periph_obj_t mcu_uart_rx_list[16] = {
+    PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_07),
+
+    PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_23),
+    PERIPH_PIN(2, 2, kIOMUXC_LPUART2_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_09),
+
+    PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_07),
+    PERIPH_PIN(3, 2, kIOMUXC_LPUART3_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_15),
+
+    PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_03),
+    PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_33),
+    PERIPH_PIN(4, 2, kIOMUXC_LPUART4_RX_SELECT_INPUT, 2, &pin_GPIO_AD_B1_11),
+
+    PERIPH_PIN(5, 2, kIOMUXC_LPUART5_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_39),
+    PERIPH_PIN(5, 2, kIOMUXC_LPUART5_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_11),
+
+    PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_13),
+    PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_01),
+
+    PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_35),
+    PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_SD_B0_05),
+
+    PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_27),
+    PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_03),
+};
+
+const mcu_periph_obj_t mcu_uart_tx_list[16] = {
+    PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_06),
+
+    PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_22),
+    PERIPH_PIN(2, 2, kIOMUXC_LPUART2_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_08),
+
+    PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_06),
+    PERIPH_PIN(3, 2, kIOMUXC_LPUART3_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_14),
+
+    PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_02),
+    PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 1, &pin_GPIO_EMC_32),
+    PERIPH_PIN(4, 2, kIOMUXC_LPUART4_TX_SELECT_INPUT, 2, &pin_GPIO_AD_B1_10),
+
+    PERIPH_PIN(5, 2, kIOMUXC_LPUART5_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_38),
+    PERIPH_PIN(5, 2, kIOMUXC_LPUART5_TX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_10),
+
+    PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_12),
+    PERIPH_PIN(6, 2, kIOMUXC_LPUART6_TX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_00),
+
+    PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_34),
+    PERIPH_PIN(7, 2, kIOMUXC_LPUART7_TX_SELECT_INPUT, 1, &pin_GPIO_SD_B0_04),
+
+    PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 0, &pin_GPIO_EMC_26),
+    PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 1, &pin_GPIO_SD_B1_02),
+};
+
+const mcu_pwm_obj_t mcu_pwm_list[39] = {
+    PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_26),
+    PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_AD_B1_06),
+
+    PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_24),
+    PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_AD_B1_08),
+
+    PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_22),
+    PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_AD_B1_10),
+
+    PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_20),
+    PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 6, &pin_GPIO_AD_B1_12),
+
+    PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_27),
+    PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_AD_B1_07),
+
+    PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_25),
+    PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_AD_B1_09),
+
+    PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_23),
+    PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_AD_B1_11),
+
+    PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_21),
+    PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 6, &pin_GPIO_AD_B1_13),
+
+    PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 7, &pin_GPIO_EMC_28),
+    PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 7, &pin_GPIO_EMC_29),
+    PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 7, &pin_GPIO_EMC_30),
+
+    PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_38),
+    PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 4, &pin_GPIO_AD_B0_14),
+
+    PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_36),
+    PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 4, &pin_GPIO_AD_B0_12),
+
+    PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_30),
+    PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 4, &pin_GPIO_AD_B0_10),
+
+    PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_28),
+    PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 4, &pin_GPIO_AD_B0_06),
+
+    PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_39),
+    PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 4, &pin_GPIO_AD_B0_15),
+
+    PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_37),
+    PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 4, &pin_GPIO_AD_B0_13),
+
+    PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_31),
+    PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 4, &pin_GPIO_AD_B0_11),
+
+    PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_29),
+    PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 4, &pin_GPIO_AD_B0_07),
+
+    PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmX, 6, &pin_GPIO_EMC_10),
+    PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmX, 6, &pin_GPIO_EMC_11),
+    PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmX, 6, &pin_GPIO_EMC_12),
+    PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmX, 6, &pin_GPIO_EMC_13),
+};
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h
new file mode 100644
index 000000000..1d720f633
--- /dev/null
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Artur Pacholec
+ * Copyright (c) 2020 Scott Shawcroft
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PERIPH_H
+#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PERIPH_H
+
+extern const mcu_periph_obj_t mcu_i2c_sda_list[8];
+extern const mcu_periph_obj_t mcu_i2c_scl_list[8];
+
+extern const mcu_periph_obj_t mcu_spi_sck_list[8];
+extern const mcu_periph_obj_t mcu_spi_mosi_list[8];
+extern const mcu_periph_obj_t mcu_spi_miso_list[8];
+
+extern const mcu_periph_obj_t mcu_uart_rx_list[16];
+extern const mcu_periph_obj_t mcu_uart_tx_list[16];
+
+extern const mcu_pwm_obj_t mcu_pwm_list[39];
+
+#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PERIP_H
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.c
new file mode 100644
index 000000000..4106c9bad
--- /dev/null
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.c
@@ -0,0 +1,128 @@
+ /*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Lucian Copeland for Adafruit Industries
+ * Copyright (c) 2019 Artur Pacholec
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/obj.h"
+#include "py/mphal.h"
+#include "mimxrt10xx/pins.h"
+
+const mcu_pin_obj_t pin_GPIO_AD_B0_00 = PIN(GPIO1, 0, GPIO_AD_B0_00, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_01 = PIN(GPIO1, 1, GPIO_AD_B0_01, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_02 = PIN(GPIO1, 2, GPIO_AD_B0_02, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_03 = PIN(GPIO1, 3, GPIO_AD_B0_03, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_04 = PIN(GPIO1, 4, GPIO_AD_B0_04, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_05 = PIN(GPIO1, 5, GPIO_AD_B0_05, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_06 = PIN(GPIO1, 6, GPIO_AD_B0_06, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_07 = PIN(GPIO1, 7, GPIO_AD_B0_07, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_08 = PIN(GPIO1, 8, GPIO_AD_B0_08, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_09 = PIN(GPIO1, 9, GPIO_AD_B0_09, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_10 = PIN(GPIO1, 10, GPIO_AD_B0_10, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_11 = PIN(GPIO1, 11, GPIO_AD_B0_11, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_12 = PIN(GPIO1, 12, GPIO_AD_B0_12, ADC1, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_13 = PIN(GPIO1, 13, GPIO_AD_B0_13, ADC2, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B0_14 = PIN(GPIO1, 14, GPIO_AD_B0_14, ADC2, 1);
+const mcu_pin_obj_t pin_GPIO_AD_B0_15 = PIN(GPIO1, 15, GPIO_AD_B0_15, ADC1, 2);
+
+const mcu_pin_obj_t pin_GPIO_AD_B1_00 = PIN(GPIO1, 16, GPIO_AD_B1_00, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_AD_B1_01 = PIN(GPIO1, 17, GPIO_AD_B1_01, ADC1, 3);
+const mcu_pin_obj_t pin_GPIO_AD_B1_02 = PIN(GPIO1, 18, GPIO_AD_B1_02, ADC2, 3);
+const mcu_pin_obj_t pin_GPIO_AD_B1_03 = PIN(GPIO1, 19, GPIO_AD_B1_03, ADC1, 4);
+const mcu_pin_obj_t pin_GPIO_AD_B1_04 = PIN(GPIO1, 20, GPIO_AD_B1_04, ADC2, 4);
+const mcu_pin_obj_t pin_GPIO_AD_B1_05 = PIN(GPIO1, 21, GPIO_AD_B1_05, ADC2, 5);
+const mcu_pin_obj_t pin_GPIO_AD_B1_06 = PIN(GPIO1, 22, GPIO_AD_B1_06, ADC2, 6);
+const mcu_pin_obj_t pin_GPIO_AD_B1_07 = PIN(GPIO1, 23, GPIO_AD_B1_07, ADC2, 7);
+const mcu_pin_obj_t pin_GPIO_AD_B1_08 = PIN(GPIO1, 24, GPIO_AD_B1_08, ADC2, 8);
+const mcu_pin_obj_t pin_GPIO_AD_B1_09 = PIN(GPIO1, 25, GPIO_AD_B1_09, ADC2, 9);
+const mcu_pin_obj_t pin_GPIO_AD_B1_10 = PIN(GPIO1, 26, GPIO_AD_B1_10, ADC2, 10);
+const mcu_pin_obj_t pin_GPIO_AD_B1_11 = PIN(GPIO1, 27, GPIO_AD_B1_11, ADC2, 11);
+const mcu_pin_obj_t pin_GPIO_AD_B1_12 = PIN(GPIO1, 28, GPIO_AD_B1_12, ADC2, 12);
+const mcu_pin_obj_t pin_GPIO_AD_B1_13 = PIN(GPIO1, 29, GPIO_AD_B1_13, ADC2, 13);
+const mcu_pin_obj_t pin_GPIO_AD_B1_14 = PIN(GPIO1, 30, GPIO_AD_B1_14, ADC2, 14);
+const mcu_pin_obj_t pin_GPIO_AD_B1_15 = PIN(GPIO1, 31, GPIO_AD_B1_15, ADC2, 15);
+
+const mcu_pin_obj_t pin_GPIO_EMC_00 = PIN(GPIO2, 0, GPIO_EMC_00, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_01 = PIN(GPIO2, 1, GPIO_EMC_01, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_02 = PIN(GPIO2, 2, GPIO_EMC_02, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_03 = PIN(GPIO2, 3, GPIO_EMC_03, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_04 = PIN(GPIO2, 4, GPIO_EMC_04, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_05 = PIN(GPIO2, 5, GPIO_EMC_05, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_06 = PIN(GPIO2, 6, GPIO_EMC_06, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_07 = PIN(GPIO2, 7, GPIO_EMC_07, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_08 = PIN(GPIO2, 8, GPIO_EMC_08, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_09 = PIN(GPIO2, 9, GPIO_EMC_09, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_10 = PIN(GPIO2, 10, GPIO_EMC_10, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_11 = PIN(GPIO2, 11, GPIO_EMC_11, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_12 = PIN(GPIO2, 12, GPIO_EMC_12, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_13 = PIN(GPIO2, 13, GPIO_EMC_13, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_14 = PIN(GPIO2, 14, GPIO_EMC_14, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_15 = PIN(GPIO2, 15, GPIO_EMC_15, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_16 = PIN(GPIO2, 16, GPIO_EMC_16, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_17 = PIN(GPIO2, 17, GPIO_EMC_17, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_18 = PIN(GPIO2, 18, GPIO_EMC_18, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_19 = PIN(GPIO2, 19, GPIO_EMC_19, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_20 = PIN(GPIO2, 20, GPIO_EMC_20, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_21 = PIN(GPIO2, 21, GPIO_EMC_21, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_22 = PIN(GPIO2, 22, GPIO_EMC_22, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_23 = PIN(GPIO2, 23, GPIO_EMC_23, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_24 = PIN(GPIO2, 24, GPIO_EMC_24, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_25 = PIN(GPIO2, 25, GPIO_EMC_25, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_26 = PIN(GPIO2, 26, GPIO_EMC_26, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_27 = PIN(GPIO2, 27, GPIO_EMC_27, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_28 = PIN(GPIO2, 28, GPIO_EMC_28, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_29 = PIN(GPIO2, 29, GPIO_EMC_29, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_30 = PIN(GPIO2, 30, GPIO_EMC_30, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_31 = PIN(GPIO2, 31, GPIO_EMC_31, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_32 = PIN(GPIO3, 0, GPIO_EMC_32, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_33 = PIN(GPIO3, 1, GPIO_EMC_33, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_34 = PIN(GPIO3, 2, GPIO_EMC_34, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_35 = PIN(GPIO3, 3, GPIO_EMC_35, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_36 = PIN(GPIO3, 4, GPIO_EMC_36, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_37 = PIN(GPIO3, 5, GPIO_EMC_37, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_38 = PIN(GPIO3, 6, GPIO_EMC_38, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_39 = PIN(GPIO3, 7, GPIO_EMC_39, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_40 = PIN(GPIO3, 8, GPIO_EMC_40, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_EMC_41 = PIN(GPIO3, 9, GPIO_EMC_41, NO_ADC, 0);
+
+const mcu_pin_obj_t pin_GPIO_SD_B0_00 = PIN(GPIO3, 13, GPIO_SD_B0_00, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B0_01 = PIN(GPIO3, 14, GPIO_SD_B0_01, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B0_02 = PIN(GPIO3, 15, GPIO_SD_B0_02, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B0_03 = PIN(GPIO3, 16, GPIO_SD_B0_03, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B0_04 = PIN(GPIO3, 17, GPIO_SD_B0_04, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B0_05 = PIN(GPIO3, 18, GPIO_SD_B0_05, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B0_06 = PIN(GPIO3, 19, GPIO_SD_B0_06, NO_ADC, 0);
+
+const mcu_pin_obj_t pin_GPIO_SD_B1_00 = PIN(GPIO3, 20, GPIO_SD_B1_00, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B1_01 = PIN(GPIO3, 21, GPIO_SD_B1_01, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B1_02 = PIN(GPIO3, 22, GPIO_SD_B1_02, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B1_03 = PIN(GPIO3, 23, GPIO_SD_B1_03, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B1_04 = PIN(GPIO3, 24, GPIO_SD_B1_04, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B1_05 = PIN(GPIO3, 25, GPIO_SD_B1_05, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B1_06 = PIN(GPIO3, 26, GPIO_SD_B1_06, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B1_07 = PIN(GPIO3, 27, GPIO_SD_B1_07, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B1_08 = PIN(GPIO3, 28, GPIO_SD_B1_08, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B1_09 = PIN(GPIO3, 29, GPIO_SD_B1_09, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B1_10 = PIN(GPIO3, 30, GPIO_SD_B1_10, NO_ADC, 0);
+const mcu_pin_obj_t pin_GPIO_SD_B1_11 = PIN(GPIO3, 31, GPIO_SD_B1_11, NO_ADC, 0);
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.h
new file mode 100644
index 000000000..a13bacfc3
--- /dev/null
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/pins.h
@@ -0,0 +1,129 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Artur Pacholec
+ * Copyright (c) 2020 Scott Shawcroft
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PINS_H
+#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PINS_H
+
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_00;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_01;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_02;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_03;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_04;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_05;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_06;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_07;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_08;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_09;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_10;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_11;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_12;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_13;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_14;
+extern const mcu_pin_obj_t pin_GPIO_AD_B0_15;
+
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_00;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_01;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_02;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_03;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_04;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_05;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_06;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_07;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_08;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_09;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_10;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_11;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_12;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_13;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_14;
+extern const mcu_pin_obj_t pin_GPIO_AD_B1_15;
+
+extern const mcu_pin_obj_t pin_GPIO_EMC_00;
+extern const mcu_pin_obj_t pin_GPIO_EMC_01;
+extern const mcu_pin_obj_t pin_GPIO_EMC_02;
+extern const mcu_pin_obj_t pin_GPIO_EMC_03;
+extern const mcu_pin_obj_t pin_GPIO_EMC_04;
+extern const mcu_pin_obj_t pin_GPIO_EMC_05;
+extern const mcu_pin_obj_t pin_GPIO_EMC_06;
+extern const mcu_pin_obj_t pin_GPIO_EMC_07;
+extern const mcu_pin_obj_t pin_GPIO_EMC_08;
+extern const mcu_pin_obj_t pin_GPIO_EMC_09;
+extern const mcu_pin_obj_t pin_GPIO_EMC_10;
+extern const mcu_pin_obj_t pin_GPIO_EMC_11;
+extern const mcu_pin_obj_t pin_GPIO_EMC_12;
+extern const mcu_pin_obj_t pin_GPIO_EMC_13;
+extern const mcu_pin_obj_t pin_GPIO_EMC_14;
+extern const mcu_pin_obj_t pin_GPIO_EMC_15;
+extern const mcu_pin_obj_t pin_GPIO_EMC_16;
+extern const mcu_pin_obj_t pin_GPIO_EMC_17;
+extern const mcu_pin_obj_t pin_GPIO_EMC_18;
+extern const mcu_pin_obj_t pin_GPIO_EMC_19;
+extern const mcu_pin_obj_t pin_GPIO_EMC_20;
+extern const mcu_pin_obj_t pin_GPIO_EMC_21;
+extern const mcu_pin_obj_t pin_GPIO_EMC_22;
+extern const mcu_pin_obj_t pin_GPIO_EMC_23;
+extern const mcu_pin_obj_t pin_GPIO_EMC_24;
+extern const mcu_pin_obj_t pin_GPIO_EMC_25;
+extern const mcu_pin_obj_t pin_GPIO_EMC_26;
+extern const mcu_pin_obj_t pin_GPIO_EMC_27;
+extern const mcu_pin_obj_t pin_GPIO_EMC_28;
+extern const mcu_pin_obj_t pin_GPIO_EMC_29;
+extern const mcu_pin_obj_t pin_GPIO_EMC_30;
+extern const mcu_pin_obj_t pin_GPIO_EMC_31;
+extern const mcu_pin_obj_t pin_GPIO_EMC_32;
+extern const mcu_pin_obj_t pin_GPIO_EMC_33;
+extern const mcu_pin_obj_t pin_GPIO_EMC_34;
+extern const mcu_pin_obj_t pin_GPIO_EMC_35;
+extern const mcu_pin_obj_t pin_GPIO_EMC_36;
+extern const mcu_pin_obj_t pin_GPIO_EMC_37;
+extern const mcu_pin_obj_t pin_GPIO_EMC_38;
+extern const mcu_pin_obj_t pin_GPIO_EMC_39;
+extern const mcu_pin_obj_t pin_GPIO_EMC_40;
+extern const mcu_pin_obj_t pin_GPIO_EMC_41;
+
+extern const mcu_pin_obj_t pin_GPIO_SD_B0_00;
+extern const mcu_pin_obj_t pin_GPIO_SD_B0_01;
+extern const mcu_pin_obj_t pin_GPIO_SD_B0_02;
+extern const mcu_pin_obj_t pin_GPIO_SD_B0_03;
+extern const mcu_pin_obj_t pin_GPIO_SD_B0_04;
+extern const mcu_pin_obj_t pin_GPIO_SD_B0_05;
+extern const mcu_pin_obj_t pin_GPIO_SD_B0_06;
+
+extern const mcu_pin_obj_t pin_GPIO_SD_B1_00;
+extern const mcu_pin_obj_t pin_GPIO_SD_B1_01;
+extern const mcu_pin_obj_t pin_GPIO_SD_B1_02;
+extern const mcu_pin_obj_t pin_GPIO_SD_B1_03;
+extern const mcu_pin_obj_t pin_GPIO_SD_B1_04;
+extern const mcu_pin_obj_t pin_GPIO_SD_B1_05;
+extern const mcu_pin_obj_t pin_GPIO_SD_B1_06;
+extern const mcu_pin_obj_t pin_GPIO_SD_B1_07;
+extern const mcu_pin_obj_t pin_GPIO_SD_B1_08;
+extern const mcu_pin_obj_t pin_GPIO_SD_B1_09;
+extern const mcu_pin_obj_t pin_GPIO_SD_B1_10;
+extern const mcu_pin_obj_t pin_GPIO_SD_B1_11;
+
+#endif // MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PINS_H
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c
index fc90e2374..3f0473a88 100644
--- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c
@@ -71,7 +71,7 @@ const mcu_periph_obj_t mcu_spi_sck_list[8] = {
     PERIPH_PIN(2, 2, kIOMUXC_LPSPI2_SCK_SELECT_INPUT, 1, &pin_GPIO_EMC_00),
 
     PERIPH_PIN(3, 7, kIOMUXC_LPSPI3_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B0_00),
-    PERIPH_PIN(3, 2, kIOMUXC_LPSPI3_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_B1_15),
+    PERIPH_PIN(3, 2, kIOMUXC_LPSPI3_SCK_SELECT_INPUT, 1, &pin_GPIO_AD_B1_15),
 
     PERIPH_PIN(4, 3, kIOMUXC_LPSPI4_SCK_SELECT_INPUT, 0, &pin_GPIO_B0_03),
     PERIPH_PIN(4, 1, kIOMUXC_LPSPI4_SCK_SELECT_INPUT, 1, &pin_GPIO_B1_07),
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h
index 301eb0db4..9b9713bb4 100644
--- a/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h
@@ -70,6 +70,8 @@ extern LPUART_Type *mcu_uart_banks[];
 
 #ifdef MIMXRT1011_SERIES
 #include "MIMXRT1011/periph.h"
+#elif defined(MIMXRT1021_SERIES)
+#include "MIMXRT1021/periph.h"
 #elif defined(MIMXRT1062_SERIES)
 #include "MIMXRT1062/periph.h"
 #endif
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h
index 64a8324bd..404a411e1 100644
--- a/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/pins.h
@@ -68,6 +68,8 @@ typedef struct {
 
 #ifdef MIMXRT1011_SERIES
 #include "MIMXRT1011/pins.h"
+#elif defined(MIMXRT1021_SERIES)
+#include "MIMXRT1021/pins.h"
 #elif defined(MIMXRT1062_SERIES)
 #include "MIMXRT1062/pins.h"
 #endif
diff --git a/ports/mimxrt10xx/reset.c b/ports/mimxrt10xx/reset.c
index dc4a1dce1..a3a4f667d 100644
--- a/ports/mimxrt10xx/reset.c
+++ b/ports/mimxrt10xx/reset.c
@@ -35,5 +35,5 @@ void reset(void) {
 }
 
 bool bootloader_available(void) {
-    return &_bootloader_dbl_tap >= 0;
+    return SNVS->LPGPR[0] >= 0;
 }
diff --git a/ports/mimxrt10xx/reset.h b/ports/mimxrt10xx/reset.h
index b6dfc38cc..dc3106cf0 100644
--- a/ports/mimxrt10xx/reset.h
+++ b/ports/mimxrt10xx/reset.h
@@ -34,8 +34,6 @@
 #define DBL_TAP_MAGIC 0xf01669ef // Randomly selected, adjusted to have first and last bit set
 #define DBL_TAP_MAGIC_QUICK_BOOT 0xf02669ef
 
-extern volatile uint32_t _bootloader_dbl_tap;
-
 void reset_to_bootloader(void);
 void reset(void);
 bool bootloader_available(void);
diff --git a/ports/mimxrt10xx/sdk b/ports/mimxrt10xx/sdk
index 2251c7b79..4e7438e65 160000
--- a/ports/mimxrt10xx/sdk
+++ b/ports/mimxrt10xx/sdk
@@ -1 +1 @@
-Subproject commit 2251c7b79343966a57a0f36d897873dd40b692b9
+Subproject commit 4e7438e654f4a6b4f386b4bb9e817d74a0fbffc7
diff --git a/ports/mimxrt10xx/supervisor/internal_flash.c b/ports/mimxrt10xx/supervisor/internal_flash.c
index e15b4962e..7e9d8fa37 100644
--- a/ports/mimxrt10xx/supervisor/internal_flash.c
+++ b/ports/mimxrt10xx/supervisor/internal_flash.c
@@ -166,11 +166,13 @@ void supervisor_flash_init(void) {
     }
     __enable_irq();
 
+    SCB_EnableDCache();
+
     init_done = true;
 }
 
 static inline uint32_t lba2addr(uint32_t block) {
-    return ((uint32_t)__fatfs_flash_start_addr) + block * FILESYSTEM_BLOCK_SIZE;
+    return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR + block * FILESYSTEM_BLOCK_SIZE;
 }
 
 uint32_t supervisor_flash_get_block_size(void) {
@@ -178,7 +180,7 @@ uint32_t supervisor_flash_get_block_size(void) {
 }
 
 uint32_t supervisor_flash_get_block_count(void) {
-    return ((uint32_t) __fatfs_flash_length) / FILESYSTEM_BLOCK_SIZE;
+    return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE;
 }
 
 void supervisor_flash_flush(void) {
@@ -191,20 +193,20 @@ void supervisor_flash_flush(void) {
 
         __disable_irq();
         status = flexspi_nor_flash_erase_sector(FLEXSPI, sector_addr);
+        __enable_irq();
         if (status != kStatus_Success) {
             printf("Page erase failure %ld!\r\n", status);
             return;
         }
-        __enable_irq();
 
         for (int i = 0; i < SECTOR_SIZE / FLASH_PAGE_SIZE; ++i) {
             __disable_irq();
             status = flexspi_nor_flash_page_program(FLEXSPI, sector_addr + i * FLASH_PAGE_SIZE, (void *)_flash_cache + i * FLASH_PAGE_SIZE);
+            __enable_irq();
             if (status != kStatus_Success) {
                 printf("Page program failure %ld!\r\n", status);
                 return;
             }
-            __enable_irq();
         }
 
         DCACHE_CleanInvalidateByRange(_flash_page_addr, SECTOR_SIZE);
diff --git a/ports/mimxrt10xx/supervisor/port.c b/ports/mimxrt10xx/supervisor/port.c
index 357307427..555b78359 100644
--- a/ports/mimxrt10xx/supervisor/port.c
+++ b/ports/mimxrt10xx/supervisor/port.c
@@ -3,8 +3,8 @@
  *
  * The MIT License (MIT)
  *
- * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
- * Copyright (c) 2017 Artur Pacholec
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ * Copyright (c) 2020 Artur Pacholec
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -24,6 +24,12 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  */
+/*
+ * Copyright 2018 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
 
 #include "boards/board.h"
 #include "supervisor/port.h"
@@ -54,16 +60,139 @@
 #include "fsl_gpio.h"
 #include "fsl_lpuart.h"
 
-void mpu_init(void)
-{
-	ARM_MPU_Disable();
+// Device memories must be accessed in order.
+#define DEVICE 2
+// Normal memory can have accesses reorder and prefetched.
+#define NORMAL 0
+
+// Prevents instruction access.
+#define NO_EXECUTION 1
+#define EXECUTION 0
+
+// Shareable if the memory system manages coherency.
+#define NOT_SHAREABLE 0
+#define SHAREABLE 1
+
+//
+#define NOT_CACHEABLE 0
+#define CACHEABLE 1
+
+#define NOT_BUFFERABLE 0
+#define BUFFERABLE 1
+
+#define NO_SUBREGIONS 0
+
+extern uint32_t _ld_flash_size;
+
+extern uint8_t _ld_dtcm_bss_start;
+extern uint8_t _ld_dtcm_bss_end;
+extern uint8_t _ld_dtcm_data_destination;
+extern uint8_t _ld_dtcm_data_size;
+extern uint8_t _ld_dtcm_data_flash_copy;
+extern uint8_t _ld_itcm_destination;
+extern uint8_t _ld_itcm_size;
+extern uint8_t _ld_itcm_flash_copy;
+
+// This is called before RAM is setup! Be very careful what you do here.
+void SystemInitHook(void) {
+    // asm("bkpt");
+    /* Disable I cache and D cache */
+    if (SCB_CCR_IC_Msk == (SCB_CCR_IC_Msk & SCB->CCR))
+    {
+        SCB_DisableICache();
+    }
+    if (SCB_CCR_DC_Msk == (SCB_CCR_DC_Msk & SCB->CCR))
+    {
+        SCB_DisableDCache();
+    }
+    // Configure FlexRAM. The e is one block of ITCM (0b11) and DTCM (0b10). The rest is two OCRAM
+    // (0b01). We shift in zeroes for all unimplemented banks.
+    IOMUXC_GPR->GPR17 = (0xe5555555) >> (32 - 2 * FSL_FEATURE_FLEXRAM_INTERNAL_RAM_TOTAL_BANK_NUMBERS);
+
+    // Switch from FlexRAM fuse config to the IOMUXC values.
+    IOMUXC_GPR->GPR16 |= IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL(1);
+
+    // Let the core know the TCM sizes changed.
+    uint32_t current_gpr14 = IOMUXC_GPR->GPR14;
+    current_gpr14 &= ~IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ_MASK;
+    current_gpr14 |= IOMUXC_GPR_GPR14_CM7_CFGDTCMSZ(0x6);
+    current_gpr14 &= ~IOMUXC_GPR_GPR14_CM7_CFGITCMSZ_MASK;
+    current_gpr14 |= IOMUXC_GPR_GPR14_CM7_CFGITCMSZ(0x6);
+    IOMUXC_GPR->GPR14 = current_gpr14;
+
+    /* Disable MPU */
+    ARM_MPU_Disable();
+
+    // Copy all of the code to run from ITCM.
+    memcpy(&_ld_itcm_destination, &_ld_itcm_flash_copy, (size_t) &_ld_itcm_size);
+
+    // Copy all of the data to run from DTCM.
+    memcpy(&_ld_dtcm_data_destination, &_ld_dtcm_data_flash_copy, (size_t) &_ld_dtcm_data_size);
+
+    // Clear DTCM bss.
+    memset(&_ld_dtcm_bss_start, 0, (size_t) (&_ld_dtcm_bss_end - &_ld_dtcm_bss_start));
+
+    // The first number in RBAR is the region number. When searching for a policy, the region with
+    // the highest number wins. If none match, then the default policy set at enable applies.
 
-	SCB_EnableDCache();
-	SCB_EnableICache();
+    // This is an undocumented region and is likely more registers.
+    MPU->RBAR = ARM_MPU_RBAR(8, 0xC0000000U);
+    MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, DEVICE, NOT_SHAREABLE, NOT_CACHEABLE, NOT_BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_512MB);
+
+    // This is the SEMC region where external RAM and 8+ flash would live. Disable for now, even though the EVKs have stuff here.
+    MPU->RBAR = ARM_MPU_RBAR(9, 0x80000000U);
+    MPU->RASR = ARM_MPU_RASR(NO_EXECUTION, ARM_MPU_AP_NONE, DEVICE, NOT_SHAREABLE, NOT_CACHEABLE, NOT_BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_1GB);
+
+    // FlexSPI2 is 0x70000000
+
+    // This the first 1MB of flash is the bootloader and CircuitPython read-only data.
+    MPU->RBAR = ARM_MPU_RBAR(10, 0x60000000U);
+    MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_1MB);
+
+    // The remainder of flash is the fat filesystem which could have code on it too. Make sure that
+    // we set the region to the minimal size so that bad data doesn't get speculatively fetched.
+    // Thanks to Damien for the tip!
+    uint32_t region_size = ARM_MPU_REGION_SIZE_32B;
+    uint32_t filesystem_size = &_ld_filesystem_end - &_ld_filesystem_start;
+    while (filesystem_size > (1u << (region_size + 1))) {
+        region_size += 1;
+    }
+    // Mask out as much of the remainder as we can. For example on an 8MB flash, 7MB are for the
+    // filesystem. The region_size here must be a power of 2 so it is 8MB. Using the subregion mask
+    // we can ignore 1/8th size chunks. So, we ignore the last 1MB using the subregion.
+    uint32_t remainder = (1u << (region_size + 1)) - filesystem_size;
+    uint32_t subregion_size = (1u << (region_size + 1)) / 8;
+    uint16_t subregion_mask = 0xff00 >> (remainder / subregion_size);
+
+    MPU->RBAR = ARM_MPU_RBAR(11, 0x60100000U);
+    MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, (uint8_t) subregion_mask, region_size);
+
+    // This the ITCM. Set it to read-only because we've loaded everything already and it's easy to
+    // accidentally write the wrong value to 0x00000000 (aka NULL).
+    MPU->RBAR = ARM_MPU_RBAR(12, 0x00000000U);
+    MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_RO, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_32KB);
+
+    // This the DTCM.
+    MPU->RBAR = ARM_MPU_RBAR(13, 0x20000000U);
+    MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_32KB);
+
+    // This is OCRAM.
+    MPU->RBAR = ARM_MPU_RBAR(14, 0x20200000U);
+    MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_512KB);
+
+    // We steal 64k from FlexRAM for ITCM and DTCM so disable those memory regions here.
+    MPU->RBAR = ARM_MPU_RBAR(15, 0x20280000U);
+    MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, 0x80, ARM_MPU_REGION_SIZE_512KB);
+
+    /* Enable MPU */
+    ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
+
+    /* Enable I cache and D cache */
+    SCB_EnableDCache();
+    SCB_EnableICache();
 }
 
 safe_mode_t port_init(void) {
-    mpu_init();
     clocks_init();
 
     // Configure millisecond timer initialization.
@@ -129,7 +258,7 @@ void reset_port(void) {
 }
 
 void reset_to_bootloader(void) {
-    _bootloader_dbl_tap = DBL_TAP_MAGIC;
+    SNVS->LPGPR[0] = DBL_TAP_MAGIC;
     reset();
 }
 
@@ -137,23 +266,64 @@ void reset_cpu(void) {
     reset();
 }
 
-extern uint32_t _heap_start, _estack;
+extern uint32_t _ld_heap_start, _ld_heap_end, _ld_stack_top, _ld_stack_bottom;
 uint32_t *port_stack_get_limit(void) {
-    return &_heap_start;
+    return &_ld_heap_start;
 }
 
 uint32_t *port_stack_get_top(void) {
-    return &_estack;
+    return &_ld_stack_top;
+}
+
+uint32_t *port_heap_get_bottom(void) {
+    return &_ld_heap_start;
+}
+
+// Get heap top address
+uint32_t *port_heap_get_top(void) {
+    return &_ld_heap_end;
 }
 
-extern uint32_t __bss_end__;
 // Place the word to save just after our BSS section that gets blanked.
 void port_set_saved_word(uint32_t value) {
-    __bss_end__ = value;
+    SNVS->LPGPR[1] = value;
 }
 
 uint32_t port_get_saved_word(void) {
-    return __bss_end__;
+    return SNVS->LPGPR[1];
+}
+
+/**
+ * \brief Default interrupt handler for unused IRQs.
+ */
+__attribute__((used)) void MemManage_Handler(void)
+{
+    reset_into_safe_mode(MEM_MANAGE);
+    while (true) {
+        asm("nop;");
+    }
+}
+
+/**
+ * \brief Default interrupt handler for unused IRQs.
+ */
+__attribute__((used)) void BusFault_Handler(void)
+{
+    reset_into_safe_mode(MEM_MANAGE);
+    while (true) {
+        asm("nop;");
+    }
+}
+
+/**
+ * \brief Default interrupt handler for unused IRQs.
+ */
+__attribute__((used)) void UsageFault_Handler(void)
+{
+    reset_into_safe_mode(MEM_MANAGE);
+    while (true) {
+        asm("nop;");
+    }
 }
 
 /**
@@ -166,3 +336,4 @@ __attribute__((used)) void HardFault_Handler(void)
         asm("nop;");
     }
 }
+
diff --git a/py/map.c b/py/map.c
index 6abf4853f..57c11dbc9 100644
--- a/py/map.c
+++ b/py/map.c
@@ -33,6 +33,8 @@
 #include "py/misc.h"
 #include "py/runtime.h"
 
+#include "supervisor/linker.h"
+
 #if MICROPY_DEBUG_VERBOSE // print debugging info
 #define DEBUG_PRINT (1)
 #else // don't print debugging info
@@ -143,7 +145,7 @@ STATIC void mp_map_rehash(mp_map_t *map) {
 //  - returns slot, with key non-null and value=MP_OBJ_NULL if it was added
 // MP_MAP_LOOKUP_REMOVE_IF_FOUND behaviour:
 //  - returns NULL if not found, else the slot if was found in with key null and value non-null
-mp_map_elem_t *mp_map_lookup(mp_map_t *map, mp_obj_t index, mp_map_lookup_kind_t lookup_kind) {
+mp_map_elem_t *PLACE_IN_ITCM(mp_map_lookup)(mp_map_t *map, mp_obj_t index, mp_map_lookup_kind_t lookup_kind) {
     // If the map is a fixed array then we must only be called for a lookup
     assert(!map->is_fixed || lookup_kind == MP_MAP_LOOKUP);
 
diff --git a/py/mpstate.c b/py/mpstate.c
index 6ce64adfd..32f1d60a5 100644
--- a/py/mpstate.c
+++ b/py/mpstate.c
@@ -25,9 +25,10 @@
  */
 
 #include "py/mpstate.h"
+#include "supervisor/linker.h"
 
 #if MICROPY_DYNAMIC_COMPILER
 mp_dynamic_compiler_t mp_dynamic_compiler = {0};
 #endif
 
-mp_state_ctx_t mp_state_ctx;
+mp_state_ctx_t PLACE_IN_DTCM_BSS(mp_state_ctx);
diff --git a/py/obj.c b/py/obj.c
index 09e71be4d..f1e00de1a 100644
--- a/py/obj.c
+++ b/py/obj.c
@@ -38,6 +38,7 @@
 #include "py/stackctrl.h"
 #include "py/stream.h" // for mp_obj_print
 
+#include "supervisor/linker.h"
 #include "supervisor/shared/stack.h"
 #include "supervisor/shared/translate.h"
 
@@ -128,7 +129,7 @@ void mp_obj_print_exception(const mp_print_t *print, mp_obj_t exc) {
     mp_print_str(print, "\n");
 }
 
-bool mp_obj_is_true(mp_obj_t arg) {
+bool PLACE_IN_ITCM(mp_obj_is_true)(mp_obj_t arg) {
     if (arg == mp_const_false) {
         return 0;
     } else if (arg == mp_const_true) {
diff --git a/py/objdict.c b/py/objdict.c
index 683fcb748..3ec3cbe80 100644
--- a/py/objdict.c
+++ b/py/objdict.c
@@ -31,6 +31,7 @@
 #include "py/builtin.h"
 #include "py/objtype.h"
 
+#include "supervisor/linker.h"
 #include "supervisor/shared/translate.h"
 
 #define MP_OBJ_IS_DICT_TYPE(o) (MP_OBJ_IS_OBJ(o) && ((mp_obj_base_t*)MP_OBJ_TO_PTR(o))->type->make_new == dict_make_new)
@@ -324,7 +325,7 @@ STATIC mp_obj_t dict_popitem(mp_obj_t self_in) {
 }
 STATIC MP_DEFINE_CONST_FUN_OBJ_1(dict_popitem_obj, dict_popitem);
 
-STATIC mp_obj_t dict_update(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) {
+STATIC mp_obj_t PLACE_IN_ITCM(dict_update)(size_t n_args, const mp_obj_t *args, mp_map_t *kwargs) {
     mp_check_self(MP_OBJ_IS_DICT_TYPE(args[0]));
     mp_obj_dict_t *self = MP_OBJ_TO_PTR(args[0]);
     mp_ensure_not_fixed(self);
@@ -590,7 +591,7 @@ size_t mp_obj_dict_len(mp_obj_t self_in) {
     return self->map.used;
 }
 
-mp_obj_t mp_obj_dict_store(mp_obj_t self_in, mp_obj_t key, mp_obj_t value) {
+mp_obj_t PLACE_IN_ITCM(mp_obj_dict_store)(mp_obj_t self_in, mp_obj_t key, mp_obj_t value) {
     mp_check_self(MP_OBJ_IS_DICT_TYPE(self_in));
     mp_obj_dict_t *self = MP_OBJ_TO_PTR(self_in);
     mp_ensure_not_fixed(self);
diff --git a/py/objfun.c b/py/objfun.c
index 7e5899456..c586a290a 100644
--- a/py/objfun.c
+++ b/py/objfun.c
@@ -34,6 +34,8 @@
 #include "py/bc.h"
 #include "py/stackctrl.h"
 
+#include "supervisor/linker.h"
+
 #if MICROPY_DEBUG_VERBOSE // print debugging info
 #define DEBUG_PRINT (1)
 #else // don't print debugging info
@@ -249,7 +251,7 @@ mp_code_state_t *mp_obj_fun_bc_prepare_codestate(mp_obj_t self_in, size_t n_args
 }
 #endif
 
-STATIC mp_obj_t fun_bc_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+STATIC mp_obj_t PLACE_IN_ITCM(fun_bc_call)(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) {
     MP_STACK_CHECK();
 
     DEBUG_printf("Input n_args: " UINT_FMT ", n_kw: " UINT_FMT "\n", n_args, n_kw);
diff --git a/py/qstr.c b/py/qstr.c
index eea57c1e0..bb8024435 100755
--- a/py/qstr.c
+++ b/py/qstr.c
@@ -33,6 +33,8 @@
 #include "py/qstr.h"
 #include "py/gc.h"
 
+#include "supervisor/linker.h"
+
 // NOTE: we are using linear arrays to store and search for qstr's (unique strings, interned strings)
 // ultimately we will replace this with a static hash table of some kind
 // also probably need to include the length in the string data, to allow null bytes in the string
@@ -248,7 +250,7 @@ qstr qstr_from_strn(const char *str, size_t len) {
     return q;
 }
 
-mp_uint_t qstr_hash(qstr q) {
+mp_uint_t PLACE_IN_ITCM(qstr_hash)(qstr q) {
     return Q_GET_HASH(find_qstr(q));
 }
 
diff --git a/py/runtime.c b/py/runtime.c
index a786619bf..48416bab2 100644
--- a/py/runtime.c
+++ b/py/runtime.c
@@ -200,7 +200,7 @@ mp_obj_t mp_load_build_class(void) {
     return MP_OBJ_FROM_PTR(&mp_builtin___build_class___obj);
 }
 
-void mp_store_name(qstr qst, mp_obj_t obj) {
+void PLACE_IN_ITCM(mp_store_name)(qstr qst, mp_obj_t obj) {
     DEBUG_OP_printf("store name %s <- %p\n", qstr_str(qst), obj);
     mp_obj_dict_store(MP_OBJ_FROM_PTR(mp_locals_get()), MP_OBJ_NEW_QSTR(qst), obj);
 }
@@ -211,7 +211,7 @@ void mp_delete_name(qstr qst) {
     mp_obj_dict_delete(MP_OBJ_FROM_PTR(mp_locals_get()), MP_OBJ_NEW_QSTR(qst));
 }
 
-void mp_store_global(qstr qst, mp_obj_t obj) {
+void PLACE_IN_ITCM(mp_store_global)(qstr qst, mp_obj_t obj) {
     DEBUG_OP_printf("store global %s <- %p\n", qstr_str(qst), obj);
     mp_obj_dict_store(MP_OBJ_FROM_PTR(mp_globals_get()), MP_OBJ_NEW_QSTR(qst), obj);
 }
@@ -283,7 +283,7 @@ mp_obj_t mp_unary_op(mp_unary_op_t op, mp_obj_t arg) {
     }
 }
 
-mp_obj_t mp_binary_op(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) {
+mp_obj_t PLACE_IN_ITCM(mp_binary_op)(mp_binary_op_t op, mp_obj_t lhs, mp_obj_t rhs) {
     DEBUG_OP_printf("binary " UINT_FMT " %q %p %p\n", op, mp_binary_op_method_name[op], lhs, rhs);
 
     // TODO correctly distinguish inplace operators for mutable objects
@@ -641,7 +641,7 @@ mp_obj_t mp_call_method_n_kw(size_t n_args, size_t n_kw, const mp_obj_t *args) {
 #if !MICROPY_STACKLESS
 STATIC
 #endif
-void mp_call_prepare_args_n_kw_var(bool have_self, size_t n_args_n_kw, const mp_obj_t *args, mp_call_args_t *out_args) {
+void PLACE_IN_ITCM(mp_call_prepare_args_n_kw_var)(bool have_self, size_t n_args_n_kw, const mp_obj_t *args, mp_call_args_t *out_args) {
     mp_obj_t fun = *args++;
     mp_obj_t self = MP_OBJ_NULL;
     if (have_self) {
diff --git a/py/runtime.h b/py/runtime.h
index e8398cf0e..4121352df 100644
--- a/py/runtime.h
+++ b/py/runtime.h
@@ -29,6 +29,8 @@
 #include "py/mpstate.h"
 #include "py/pystack.h"
 
+#include "supervisor/linker.h"
+
 typedef enum {
     MP_VM_RETURN_NORMAL,
     MP_VM_RETURN_YIELD,
@@ -84,10 +86,10 @@ void mp_arg_parse_all_kw_array(size_t n_pos, size_t n_kw, const mp_obj_t *args,
 NORETURN void mp_arg_error_terse_mismatch(void);
 NORETURN void mp_arg_error_unimpl_kw(void);
 
-static inline mp_obj_dict_t *mp_locals_get(void) { return MP_STATE_THREAD(dict_locals); }
-static inline void mp_locals_set(mp_obj_dict_t *d) { MP_STATE_THREAD(dict_locals) = d; }
-static inline mp_obj_dict_t *mp_globals_get(void) { return MP_STATE_THREAD(dict_globals); }
-static inline void mp_globals_set(mp_obj_dict_t *d) { MP_STATE_THREAD(dict_globals) = d; }
+static inline mp_obj_dict_t *PLACE_IN_ITCM(mp_locals_get)(void) { return MP_STATE_THREAD(dict_locals); }
+static inline void PLACE_IN_ITCM(mp_locals_set)(mp_obj_dict_t *d) { MP_STATE_THREAD(dict_locals) = d; }
+static inline mp_obj_dict_t *PLACE_IN_ITCM(mp_globals_get)(void) { return MP_STATE_THREAD(dict_globals); }
+static inline void PLACE_IN_ITCM(mp_globals_set)(mp_obj_dict_t *d) { MP_STATE_THREAD(dict_globals) = d; }
 
 mp_obj_t mp_load_name(qstr qst);
 mp_obj_t mp_load_global(qstr qst);
diff --git a/py/vm.c b/py/vm.c
index 353fc8810..4f0340681 100644
--- a/py/vm.c
+++ b/py/vm.c
@@ -35,6 +35,8 @@
 #include "py/bc0.h"
 #include "py/bc.h"
 
+#include "supervisor/linker.h"
+
 #if 0
 #define TRACE(ip) printf("sp=%d ", (int)(sp - &code_state->state[0] + 1)); mp_bytecode_print2(ip, 1, code_state->fun_bc->const_table);
 #else
@@ -116,7 +118,7 @@
 //  MP_VM_RETURN_NORMAL, sp valid, return value in *sp
 //  MP_VM_RETURN_YIELD, ip, sp valid, yielded value in *sp
 //  MP_VM_RETURN_EXCEPTION, exception in fastn[0]
-mp_vm_return_kind_t mp_execute_bytecode(mp_code_state_t *code_state, volatile mp_obj_t inject_exc) {
+mp_vm_return_kind_t PLACE_IN_ITCM(mp_execute_bytecode)(mp_code_state_t *code_state, volatile mp_obj_t inject_exc) {
 #define SELECTIVE_EXC_IP (0)
 #if SELECTIVE_EXC_IP
 #define MARK_EXC_IP_SELECTIVE() { code_state->ip = ip; } /* stores ip 1 byte past last opcode */
diff --git a/py/vmentrytable.h b/py/vmentrytable.h
index a0e2d4065..31a96dbec 100644
--- a/py/vmentrytable.h
+++ b/py/vmentrytable.h
@@ -29,7 +29,9 @@
 #pragma clang diagnostic ignored "-Winitializer-overrides"
 #endif // __clang__
 
-static const void *const entry_table[256] = {
+#include "supervisor/linker.h"
+
+static const void *const PLACE_IN_DTCM_DATA(entry_table[256]) = {
     [0 ... 255] = &&entry_default,
     [MP_BC_LOAD_CONST_FALSE] = &&entry_MP_BC_LOAD_CONST_FALSE,
     [MP_BC_LOAD_CONST_NONE] = &&entry_MP_BC_LOAD_CONST_NONE,
diff --git a/supervisor/linker.h b/supervisor/linker.h
new file mode 100755
index 000000000..b58414433
--- /dev/null
+++ b/supervisor/linker.h
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// These macros are used to place code and data into different linking sections.
+
+#ifndef MICROPY_INCLUDED_SUPERVISOR_LINKER_H
+#define MICROPY_INCLUDED_SUPERVISOR_LINKER_H
+
+#if defined(IMXRT10XX)
+#define PLACE_IN_DTCM_DATA(name) name __attribute__((section(".dtcm_data." #name )))
+#define PLACE_IN_DTCM_BSS(name) name __attribute__((section(".dtcm_bss." #name )))
+#define PLACE_IN_ITCM(name) __attribute__((section(".itcm." #name ))) name
+#else
+#define PLACE_IN_DTCM_DATA(name) name
+#define PLACE_IN_DTCM_BSS(name) name
+#define PLACE_IN_ITCM(name) name
+#endif
+
+#endif  // MICROPY_INCLUDED_SUPERVISOR_LINKER_H
diff --git a/supervisor/port.h b/supervisor/port.h
index c8a011978..b289583dd 100644
--- a/supervisor/port.h
+++ b/supervisor/port.h
@@ -60,6 +60,12 @@ uint32_t *port_stack_get_limit(void);
 // Get stack top address
 uint32_t *port_stack_get_top(void);
 
+// Get heap bottom address
+uint32_t *port_heap_get_bottom(void);
+
+// Get heap top address
+uint32_t *port_heap_get_top(void);
+
 // Save and retrieve a word from memory that is preserved over reset. Used for safe mode.
 void port_set_saved_word(uint32_t);
 uint32_t port_get_saved_word(void);
diff --git a/supervisor/shared/filesystem.c b/supervisor/shared/filesystem.c
index 92727f6fb..3b799619f 100644
--- a/supervisor/shared/filesystem.c
+++ b/supervisor/shared/filesystem.c
@@ -75,7 +75,7 @@ static void make_sample_code_file(FATFS *fatfs) {
     FIL fs;
     UINT char_written = 0;
     const byte buffer[] = "print('Hello World!')\n";
-    //Create or modify existing code.py file 
+    //Create or modify existing code.py file
     f_open(fatfs, &fs, "/code.py", FA_WRITE | FA_CREATE_ALWAYS);
     f_write(&fs, buffer, sizeof(buffer) - 1, &char_written);
     f_close(&fs);
diff --git a/supervisor/shared/memory.c b/supervisor/shared/memory.c
index 38040d11d..14c3b4979 100755
--- a/supervisor/shared/memory.c
+++ b/supervisor/shared/memory.c
@@ -39,11 +39,14 @@ uint32_t* low_address;
 uint32_t* high_address;
 
 void memory_init(void) {
-    low_address = port_stack_get_limit();
-    high_address = port_stack_get_top();
+    low_address = port_heap_get_bottom();
+    high_address = port_heap_get_top();
 }
 
 void free_memory(supervisor_allocation* allocation) {
+    if (allocation == NULL) {
+        return;
+    }
     int32_t index = 0;
     bool found = false;
     for (index = 0; index < CIRCUITPY_SUPERVISOR_ALLOC_COUNT; index++) {
diff --git a/supervisor/shared/safe_mode.c b/supervisor/shared/safe_mode.c
index aba31e9c9..c957aee53 100644
--- a/supervisor/shared/safe_mode.c
+++ b/supervisor/shared/safe_mode.c
@@ -157,6 +157,9 @@ void print_safe_mode_message(safe_mode_t reason) {
             case FLASH_WRITE_FAIL:
                 serial_write_compressed(translate("Failed to write internal flash."));
                 break;
+            case MEM_MANAGE:
+                serial_write_compressed(translate("Invalid memory access."));
+                break;
             default:
                 serial_write_compressed(translate("Unknown reason."));
                 break;
diff --git a/supervisor/shared/safe_mode.h b/supervisor/shared/safe_mode.h
index e05fca0e4..5b09c4b54 100644
--- a/supervisor/shared/safe_mode.h
+++ b/supervisor/shared/safe_mode.h
@@ -40,6 +40,7 @@ typedef enum {
   PROGRAMMATIC_SAFE_MODE,
   NORDIC_SOFT_DEVICE_ASSERT,
   FLASH_WRITE_FAIL,
+  MEM_MANAGE,
 } safe_mode_t;
 
 safe_mode_t wait_for_safe_mode_reset(void);
diff --git a/supervisor/shared/stack.c b/supervisor/shared/stack.c
index dcecf2067..2b7b1c03a 100755
--- a/supervisor/shared/stack.c
+++ b/supervisor/shared/stack.c
@@ -46,6 +46,10 @@ void allocate_stack(void) {
 
     mp_uint_t c_size = (uint32_t) port_stack_get_top() - sp;
 
+    if (port_stack_get_top() != port_heap_get_top()) {
+        return;
+    }
+
     stack_alloc = allocate_memory(c_size + next_stack_size + EXCEPTION_STACK_SIZE, true);
     if (stack_alloc == NULL) {
         stack_alloc = allocate_memory(c_size + CIRCUITPY_DEFAULT_STACK_SIZE + EXCEPTION_STACK_SIZE, true);
@@ -71,6 +75,9 @@ void stack_init(void) {
 }
 
 void stack_resize(void) {
+    if (stack_alloc == NULL) {
+        return;
+    }
     if (next_stack_size == current_stack_size) {
         *stack_alloc->ptr = STACK_CANARY_VALUE;
         return;
diff --git a/supervisor/shared/tick.c b/supervisor/shared/tick.c
index 69256081c..5668f8fa1 100644
--- a/supervisor/shared/tick.c
+++ b/supervisor/shared/tick.c
@@ -25,11 +25,13 @@
  */
 
 #include "supervisor/shared/tick.h"
+
+#include "supervisor/linker.h"
 #include "supervisor/filesystem.h"
 #include "supervisor/shared/autoreload.h"
 
-static volatile uint64_t ticks_ms;
-static volatile uint32_t background_ticks_ms32;
+static volatile uint64_t PLACE_IN_DTCM_BSS(ticks_ms);
+static volatile uint32_t PLACE_IN_DTCM_BSS(background_ticks_ms32);
 
 #if CIRCUITPY_GAMEPAD
 #include "shared-module/gamepad/__init__.h"
@@ -77,7 +79,7 @@ uint32_t supervisor_ticks_ms32() {
 
 extern void run_background_tasks(void);
 
-void supervisor_run_background_tasks_if_tick() {
+void PLACE_IN_ITCM(supervisor_run_background_tasks_if_tick)() {
     uint32_t now32 = ticks_ms;
 
     if (now32 == background_ticks_ms32) {
diff --git a/tools/build_board_info.py b/tools/build_board_info.py
index d583fc63f..1f074dddf 100644
--- a/tools/build_board_info.py
+++ b/tools/build_board_info.py
@@ -18,6 +18,7 @@ BIN = ('bin',)
 UF2 = ('uf2',)
 BIN_UF2 = ('bin', 'uf2')
 HEX = ('hex',)
+HEX_UF2 = ('hex', 'uf2')
 SPK = ('spk',)
 
 # Default extensions
@@ -26,7 +27,7 @@ extension_by_port = {
     "atmel-samd": UF2,
     "stm32f4": BIN,
     "cxd56": SPK,
-    "mimxrt10xx": UF2,
+    "mimxrt10xx": HEX_UF2,
 }
 
 # Per board overrides
-- 
cgit v1.2.3


From 6aaab005c5f3a781fec229640c74bf44a601fc97 Mon Sep 17 00:00:00 2001
From: Scott Shawcroft <scott@tannewt.org>
Date: Fri, 17 Apr 2020 16:23:28 -0700
Subject: Initial ESP32S2 port.

Basic blinky works but doesn't check pins.
---
 .github/workflows/build.yml                        |  84 ++-
 .gitmodules                                        |   3 +
 conf.py                                            |   2 +
 main.c                                             |  12 +-
 ports/atmel-samd/mpconfigport.h                    |   2 -
 ports/atmel-samd/supervisor/port.c                 |   4 +
 ports/esp32s2/.gitignore                           |   2 +
 ports/esp32s2/CMakeLists.txt                       |  11 +
 ports/esp32s2/Makefile                             | 279 +++++++
 ports/esp32s2/background.c                         |  63 ++
 ports/esp32s2/background.h                         |  35 +
 ports/esp32s2/boards/board.h                       |  45 ++
 .../esp32s2/boards/espressif_saola_1_wroom/board.c |  39 +
 .../boards/espressif_saola_1_wroom/mpconfigboard.h |  32 +
 .../espressif_saola_1_wroom/mpconfigboard.mk       |  20 +
 .../esp32s2/boards/espressif_saola_1_wroom/pins.c  |  46 ++
 .../boards/espressif_saola_1_wroom/sdkconfig       |   0
 .../boards/espressif_saola_1_wrover/board.c        |  39 +
 .../espressif_saola_1_wrover/mpconfigboard.h       |  32 +
 .../espressif_saola_1_wrover/mpconfigboard.mk      |  20 +
 .../esp32s2/boards/espressif_saola_1_wrover/pins.c |  46 ++
 .../boards/espressif_saola_1_wrover/sdkconfig      |   0
 ports/esp32s2/common-hal/board/__init__.c          |   1 +
 ports/esp32s2/common-hal/digitalio/DigitalInOut.c  | 137 ++++
 ports/esp32s2/common-hal/digitalio/DigitalInOut.h  |  38 +
 ports/esp32s2/common-hal/digitalio/__init__.c      |   1 +
 ports/esp32s2/common-hal/microcontroller/Pin.c     |  46 ++
 ports/esp32s2/common-hal/microcontroller/Pin.h     |  44 ++
 .../esp32s2/common-hal/microcontroller/Processor.c |  46 ++
 .../esp32s2/common-hal/microcontroller/Processor.h |  39 +
 .../esp32s2/common-hal/microcontroller/__init__.c  | 128 ++++
 ports/esp32s2/common-hal/neopixel_write/__init__.c |  33 +
 ports/esp32s2/common-hal/os/__init__.c             |  61 ++
 ports/esp32s2/common-hal/supervisor/Runtime.c      |  38 +
 ports/esp32s2/common-hal/supervisor/Runtime.h      |  37 +
 ports/esp32s2/common-hal/supervisor/__init__.c     |  40 +
 ports/esp32s2/common-hal/time/__init__.c           |  45 ++
 ports/esp32s2/esp-idf                              |   1 +
 ports/esp32s2/esp32s2_peripherals_config.h         |  38 +
 ports/esp32s2/fatfs_port.c                         |  33 +
 ports/esp32s2/mpconfigport.h                       |  45 ++
 ports/esp32s2/mpconfigport.mk                      |  35 +
 ports/esp32s2/mphalport.c                          |  42 ++
 ports/esp32s2/mphalport.h                          |  41 +
 ports/esp32s2/partitions.csv                       |  10 +
 ports/esp32s2/peripherals/pins.c                   |  81 ++
 ports/esp32s2/peripherals/pins.h                   |  86 +++
 ports/esp32s2/qstrdefsport.h                       |   1 +
 ports/esp32s2/sdkconfig.defaults                   | 822 +++++++++++++++++++++
 ports/esp32s2/supervisor/internal_flash.c          | 122 +++
 ports/esp32s2/supervisor/internal_flash.h          |  38 +
 .../supervisor/internal_flash_root_pointers.h      |  31 +
 ports/esp32s2/supervisor/port.c                    | 162 ++++
 ports/esp32s2/supervisor/usb.c                     |  80 ++
 ports/litex/supervisor/port.c                      |   4 +
 py/circuitpy_mpconfig.h                            |   8 +
 supervisor/port.h                                  |   3 +
 supervisor/shared/memory.c                         |   2 +
 supervisor/shared/stack.c                          |  26 +-
 supervisor/shared/stack.h                          |   2 +
 supervisor/shared/usb/tusb_config.h                |   2 +
 supervisor/shared/usb/usb.c                        |   2 +
 supervisor/supervisor.mk                           |  11 +-
 tools/build_board_info.py                          |   3 +-
 tools/join_bins.py                                 |  20 +
 65 files changed, 3279 insertions(+), 22 deletions(-)
 create mode 100644 ports/esp32s2/.gitignore
 create mode 100644 ports/esp32s2/CMakeLists.txt
 create mode 100644 ports/esp32s2/Makefile
 create mode 100644 ports/esp32s2/background.c
 create mode 100644 ports/esp32s2/background.h
 create mode 100644 ports/esp32s2/boards/board.h
 create mode 100644 ports/esp32s2/boards/espressif_saola_1_wroom/board.c
 create mode 100644 ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h
 create mode 100644 ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk
 create mode 100644 ports/esp32s2/boards/espressif_saola_1_wroom/pins.c
 create mode 100644 ports/esp32s2/boards/espressif_saola_1_wroom/sdkconfig
 create mode 100644 ports/esp32s2/boards/espressif_saola_1_wrover/board.c
 create mode 100644 ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h
 create mode 100644 ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk
 create mode 100644 ports/esp32s2/boards/espressif_saola_1_wrover/pins.c
 create mode 100644 ports/esp32s2/boards/espressif_saola_1_wrover/sdkconfig
 create mode 100644 ports/esp32s2/common-hal/board/__init__.c
 create mode 100644 ports/esp32s2/common-hal/digitalio/DigitalInOut.c
 create mode 100644 ports/esp32s2/common-hal/digitalio/DigitalInOut.h
 create mode 100644 ports/esp32s2/common-hal/digitalio/__init__.c
 create mode 100644 ports/esp32s2/common-hal/microcontroller/Pin.c
 create mode 100644 ports/esp32s2/common-hal/microcontroller/Pin.h
 create mode 100644 ports/esp32s2/common-hal/microcontroller/Processor.c
 create mode 100644 ports/esp32s2/common-hal/microcontroller/Processor.h
 create mode 100644 ports/esp32s2/common-hal/microcontroller/__init__.c
 create mode 100644 ports/esp32s2/common-hal/neopixel_write/__init__.c
 create mode 100644 ports/esp32s2/common-hal/os/__init__.c
 create mode 100644 ports/esp32s2/common-hal/supervisor/Runtime.c
 create mode 100644 ports/esp32s2/common-hal/supervisor/Runtime.h
 create mode 100644 ports/esp32s2/common-hal/supervisor/__init__.c
 create mode 100644 ports/esp32s2/common-hal/time/__init__.c
 create mode 160000 ports/esp32s2/esp-idf
 create mode 100644 ports/esp32s2/esp32s2_peripherals_config.h
 create mode 100644 ports/esp32s2/fatfs_port.c
 create mode 100644 ports/esp32s2/mpconfigport.h
 create mode 100644 ports/esp32s2/mpconfigport.mk
 create mode 100644 ports/esp32s2/mphalport.c
 create mode 100644 ports/esp32s2/mphalport.h
 create mode 100644 ports/esp32s2/partitions.csv
 create mode 100755 ports/esp32s2/peripherals/pins.c
 create mode 100644 ports/esp32s2/peripherals/pins.h
 create mode 100644 ports/esp32s2/qstrdefsport.h
 create mode 100644 ports/esp32s2/sdkconfig.defaults
 create mode 100644 ports/esp32s2/supervisor/internal_flash.c
 create mode 100644 ports/esp32s2/supervisor/internal_flash.h
 create mode 100644 ports/esp32s2/supervisor/internal_flash_root_pointers.h
 create mode 100644 ports/esp32s2/supervisor/port.c
 create mode 100644 ports/esp32s2/supervisor/usb.c
 create mode 100644 tools/join_bins.py

(limited to 'supervisor/shared/stack.c')

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 4216f6139..c379e890e 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -73,7 +73,6 @@ jobs:
     - name: New boards check
       run: python3 -u ci_new_boards_check.py
       working-directory: tools
-
     - name: Build mpy-cross.static-raspbian
       run: make -C mpy-cross -j2 -f Makefile.static-raspbian
     - uses: actions/upload-artifact@v1.0.0
@@ -359,3 +358,86 @@ jobs:
         AWS_ACCESS_KEY_ID: ${{ secrets.AWS_ACCESS_KEY_ID }}
         AWS_SECRET_ACCESS_KEY: ${{ secrets.AWS_SECRET_ACCESS_KEY }}
       if: github.event_name == 'push' || (github.event_name == 'release' && (github.event.action == 'published' || github.event.action == 'rerequested'))
+  build-xtensa:
+    runs-on: ubuntu-latest
+    needs: test
+    strategy:
+      fail-fast: false
+      matrix:
+        board:
+        - "espressif_saola_1_wroom"
+        - "espressif_saola_1_wrover"
+
+    steps:
+    - name: Set up Python 3.8
+      uses: actions/setup-python@v1
+      with:
+        python-version: 3.8
+    - uses: actions/checkout@v2
+      with:
+        submodules: true
+        fetch-depth: 0
+    - run: git fetch --recurse-submodules=no https://github.com/adafruit/circuitpython refs/tags/*:refs/tags/*
+    - run: git submodule sync
+    - run: git submodule foreach git remote -v
+    - run: git submodule foreach git fetch --recurse-submodules=no origin +refs/tags/*:refs/tags/*
+    - name: CircuitPython version
+      run: git describe --dirty --tags
+    - uses: actions/cache@v1
+      name: Fetch IDF tool cache
+      id: idf-cache
+      with:
+        path: ${{ github.workspace }}/.idf_tools
+        key: ${{ runner.os }}-idf-tools-${{ hashFiles('.git/modules/ports/esp32s2/esp-idf/HEAD') }}
+    - name: Install IDF tools
+      if: steps.idf-cache.outputs.cache-hit != 'true'
+      run: |
+        $IDF_PATH/tools/idf_tools.py --non-interactive install required
+        $IDF_PATH/tools/idf_tools.py --non-interactive install cmake
+        $IDF_PATH/tools/idf_tools.py --non-interactive install-python-env
+        rm -rf $IDF_TOOLS_PATH/dist
+      env:
+        IDF_PATH: ${{ github.workspace }}/ports/esp32s2/esp-idf
+        IDF_TOOLS_PATH: ${{ github.workspace }}/.idf_tools
+    - name: Install CircuitPython deps
+      run: |
+        source $IDF_PATH/export.sh
+        pip install requests sh click setuptools awscli
+        sudo apt-get install -y gettext ninja-build
+      env:
+        IDF_PATH: ${{ github.workspace }}/ports/esp32s2/esp-idf
+        IDF_TOOLS_PATH: ${{ github.workspace }}/.idf_tools
+    - name: Versions
+      run: |
+        source $IDF_PATH/export.sh
+        gcc --version
+        xtensa-esp32s2-elf-gcc --version
+        python3 --version
+        ninja --version
+        cmake --version
+      shell: bash
+      env:
+        IDF_PATH: ${{ github.workspace }}/ports/esp32s2/esp-idf
+        IDF_TOOLS_PATH: ${{ github.workspace }}/.idf_tools
+    - name: mpy-cross
+      run: make -C mpy-cross -j2
+    - name: build
+      run: |
+        source $IDF_PATH/export.sh
+        python3 -u build_release_files.py
+      working-directory: tools
+      shell: bash
+      env:
+        IDF_PATH: ${{ github.workspace }}/ports/esp32s2/esp-idf
+        IDF_TOOLS_PATH: ${{ github.workspace }}/.idf_tools
+        BOARDS: ${{ matrix.board }}
+    - uses: actions/upload-artifact@v1.0.0
+      with:
+        name: ${{ matrix.board }}
+        path: bin/${{ matrix.board }}
+    - name: Upload to S3
+      run: "[ -z \"$AWS_ACCESS_KEY_ID\" ] || aws s3 cp bin/ s3://adafruit-circuit-python/bin/ --recursive --no-progress --region us-east-1"
+      env:
+        AWS_ACCESS_KEY_ID: ${{ secrets.AWS_ACCESS_KEY_ID }}
+        AWS_SECRET_ACCESS_KEY: ${{ secrets.AWS_SECRET_ACCESS_KEY }}
+      if: github.event_name == 'push' || (github.event_name == 'release' && (github.event.action == 'published' || github.event.action == 'rerequested'))
diff --git a/.gitmodules b/.gitmodules
index 2884f79a5..a990aed2a 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -140,3 +140,6 @@
 [submodule "frozen/Adafruit_CircuitPython_BLE_Apple_Notification_Center"]
 	path = frozen/Adafruit_CircuitPython_BLE_Apple_Notification_Center
 	url = https://github.com/adafruit/Adafruit_CircuitPython_BLE_Apple_Notification_Center
+[submodule "ports/esp32s2/esp-idf"]
+	path = ports/esp32s2/esp-idf
+	url = https://github.com/tannewt/esp-idf.git
diff --git a/conf.py b/conf.py
index d6fa8f7e5..f5aa957de 100644
--- a/conf.py
+++ b/conf.py
@@ -136,6 +136,8 @@ exclude_patterns = ["**/build*",
                     "ports/atmel-samd/tools",
                     "ports/cxd56/mkspk",
                     "ports/cxd56/spresense-exported-sdk",
+                    "ports/esp32s2/esp-idf",
+                    "ports/esp32s2/peripherals",
                     "ports/litex/hw",
                     "ports/minimal",
                     "ports/mimxrt10xx/peripherals",
diff --git a/main.c b/main.c
index c60cded16..c05157e86 100755
--- a/main.c
+++ b/main.c
@@ -105,12 +105,18 @@ void start_mp(supervisor_allocation* heap) {
     // Stack limit should be less than real stack size, so we have a chance
     // to recover from limit hit.  (Limit is measured in bytes.)
     mp_stack_ctrl_init();
-    mp_stack_set_limit(stack_alloc->length - 1024);
+
+    if (stack_alloc != NULL) {
+        mp_stack_set_limit(stack_alloc->length - 1024);
+    }
+
 
 #if MICROPY_MAX_STACK_USAGE
     // _ezero (same as _ebss) is an int, so start 4 bytes above it.
-    mp_stack_set_bottom(stack_alloc->ptr);
-    mp_stack_fill_with_sentinel();
+    if (stack_alloc != NULL) {
+        mp_stack_set_bottom(stack_alloc->ptr);
+        mp_stack_fill_with_sentinel();
+    }
 #endif
 
     // Sync the file systems in case any used RAM from the GC to cache. As soon
diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h
index 04ad98c22..63e92c967 100644
--- a/ports/atmel-samd/mpconfigport.h
+++ b/ports/atmel-samd/mpconfigport.h
@@ -48,7 +48,6 @@
 // MICROPY_PY_UJSON depends on MICROPY_PY_IO
 #define MICROPY_PY_IO                               (0)
 #define MICROPY_PY_UJSON                            (0)
-#define MICROPY_PY_REVERSE_SPECIAL_METHODS          (0)
 #define MICROPY_PY_UERRNO_LIST \
     X(EPERM) \
     X(ENOENT) \
@@ -79,7 +78,6 @@
 // MICROPY_PY_UJSON depends on MICROPY_PY_IO
 #define MICROPY_PY_IO                               (1)
 #define MICROPY_PY_UJSON                            (1)
-#define MICROPY_PY_REVERSE_SPECIAL_METHODS          (1)
 //      MICROPY_PY_UERRNO_LIST - Use the default
 
 #endif // SAMD51
diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c
index 04e2c9191..eadd3e8f5 100644
--- a/ports/atmel-samd/supervisor/port.c
+++ b/ports/atmel-samd/supervisor/port.c
@@ -361,6 +361,10 @@ void reset_cpu(void) {
     reset();
 }
 
+supervisor_allocation* port_fixed_stack(void) {
+    return NULL;
+}
+
 uint32_t *port_stack_get_limit(void) {
     return &_ebss;
 }
diff --git a/ports/esp32s2/.gitignore b/ports/esp32s2/.gitignore
new file mode 100644
index 000000000..4bfc5e784
--- /dev/null
+++ b/ports/esp32s2/.gitignore
@@ -0,0 +1,2 @@
+build*
+sdkconfig.old
diff --git a/ports/esp32s2/CMakeLists.txt b/ports/esp32s2/CMakeLists.txt
new file mode 100644
index 000000000..c831e4846
--- /dev/null
+++ b/ports/esp32s2/CMakeLists.txt
@@ -0,0 +1,11 @@
+# The following five lines of boilerplate have to be in your project's
+# CMakeLists in this exact order for cmake to work correctly
+cmake_minimum_required(VERSION 3.5)
+
+set(ENV{IDF_PATH} ${CMAKE_SOURCE_DIR}/esp-idf)
+set(COMPONENTS esptool_py soc driver log main)
+
+include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+project(circuitpython)
+
+idf_build_set_property(__OUTPUT_SDKCONFIG 0)
diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile
new file mode 100644
index 000000000..6fe805811
--- /dev/null
+++ b/ports/esp32s2/Makefile
@@ -0,0 +1,279 @@
+# This file is part of the MicroPython project, http://micropython.org/
+#
+# The MIT License (MIT)
+#
+# Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+# THE SOFTWARE.
+
+# Select the board to build for.
+ifeq ($(BOARD),)
+  $(error You must provide a BOARD parameter)
+else
+  ifeq ($(wildcard boards/$(BOARD)/.),)
+    $(error Invalid BOARD specified)
+  endif
+endif
+
+# If the build directory is not given, make it reflect the board name.
+BUILD ?= build-$(BOARD)
+
+include ../../py/mkenv.mk
+# Board-specific
+include boards/$(BOARD)/mpconfigboard.mk
+# Port-specific
+include mpconfigport.mk
+
+# CircuitPython-specific
+include $(TOP)/py/circuitpy_mpconfig.mk
+
+# qstr definitions (must come before including py.mk)
+QSTR_DEFS = qstrdefsport.h
+
+# include py core make definitions
+include $(TOP)/py/py.mk
+
+include $(TOP)/supervisor/supervisor.mk
+
+# Include make rules and variables common across CircuitPython builds.
+include $(TOP)/py/circuitpy_defns.mk
+
+CROSS_COMPILE = xtensa-esp32s2-elf-
+
+#######################################
+# CFLAGS
+#######################################
+
+INC += -I.
+INC += -I../..
+INC += -I$(BUILD)
+INC += -I$(BUILD)/genhdr
+INC += -I./boards
+INC += -I./boards/$(BOARD)
+INC += -I./peripherals
+INC += -I../../lib/mp-readline
+INC += -I../../lib/tinyusb/src
+INC += -I../../supervisor/shared/usb
+INC += -Iesp-idf/components/freertos/include/freertos
+INC += -Iesp-idf/components/freertos/xtensa/include
+INC += -Iesp-idf/components/esp32s2/include
+INC += -Iesp-idf/components/xtensa/esp32s2/include
+INC += -Iesp-idf/components/esp_common/include
+INC += -Iesp-idf/components/esp_rom/include
+INC += -Iesp-idf/components/xtensa/include
+INC += -Iesp-idf/components/esp_timer/include
+INC += -Iesp-idf/components/soc/include
+INC += -Iesp-idf/components/soc/src/esp32s2/include
+INC += -Iesp-idf/components/soc/soc/include
+INC += -Iesp-idf/components/soc/soc/esp32s2/include
+INC += -Iesp-idf/components/heap/include
+INC += -Iesp-idf/components/esp_system/include
+INC += -I$(BUILD)/esp-idf/config
+
+CFLAGS += -DHAVE_CONFIG_H \
+          -DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" \
+          -DUNITY_INCLUDE_CONFIG_H -DWITH_POSIX
+
+# Make our canary value match FreeRTOS's
+CFLAGS += -DSTACK_CANARY_VALUE=0xa5a5a5a5
+
+#Debugging/Optimization
+ifeq ($(DEBUG), 1)
+  CFLAGS += -ggdb
+  # You may want to enable these flags to make setting breakpoints easier.
+  # CFLAGS += -fno-inline -fno-ipa-sra
+else
+  CFLAGS += -Os -DNDEBUG -ggdb3
+  # TODO: Test with -flto
+  ### CFLAGS += -flto
+endif
+
+CFLAGS += $(INC) -Werror -Wall -mlongcalls -std=gnu11 -Wl,--gc-sections $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT)
+
+LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib  -Wl,-Map=$@.map -Wl,-cref
+LDFLAGS += -L$(BUILD)/esp-idf/esp-idf/esp32s2 \
+           -Tesp32s2_out.ld \
+           -L$(BUILD)/esp-idf/esp-idf/esp32s2/ld \
+           -Tesp32s2.project.ld \
+           -Lesp-idf/components/esp32s2/ld \
+           -Tesp32s2.peripherals.ld \
+           -Lesp-idf/components/esp_rom/esp32s2/ld \
+           -Tesp32s2.rom.ld \
+           -Tesp32s2.rom.libgcc.ld \
+           -Tesp32s2.rom.newlib-data.ld \
+           -Tesp32s2.rom.newlib-funcs.ld \
+           -Tesp32s2.rom.spiflash.ld
+LIBS := -lgcc -lc
+
+#
+
+LDFLAGS +=  -Wl,-Bstatic \
+			-Wl,--no-warn-mismatch \
+			-Wl,--build-id=none \
+			-fno-rtti
+
+# Use toolchain libm if we're not using our own.
+ifndef INTERNAL_LIBM
+LIBS += -lm
+endif
+
+# TinyUSB defines
+CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32S2 -DCFG_TUSB_OS=OPT_OS_FREERTOS -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD_CDC_TX_BUFSIZE=1024 -DCFG_TUD_MSC_BUFSIZE=4096 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128
+
+
+######################################
+# source
+######################################
+
+
+SRC_C += \
+	background.c \
+	fatfs_port.c \
+	mphalport.c \
+	boards/$(BOARD)/board.c \
+	boards/$(BOARD)/pins.c \
+	lib/libc/string0.c \
+	lib/mp-readline/readline.c \
+	lib/oofatfs/ff.c \
+	lib/oofatfs/option/ccsbcs.c \
+	lib/timeutils/timeutils.c \
+	lib/utils/buffer_helper.c \
+	lib/utils/context_manager_helpers.c \
+	lib/utils/interrupt_char.c \
+	lib/utils/pyexec.c \
+	lib/utils/stdout_helpers.c \
+	lib/utils/sys_stdio_mphal.c \
+	peripherals/pins.c \
+	supervisor/shared/memory.c
+
+ifneq ($(USB),FALSE)
+SRC_C += lib/tinyusb/src/portable/espressif/esp32s2/dcd_esp32s2.c
+endif
+
+SRC_S =
+
+SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \
+                          $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \
+                          $(addprefix common-hal/, $(SRC_COMMON_HAL))
+
+SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \
+                             $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \
+                             $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL))
+
+
+ifneq ($(FROZEN_MPY_DIR),)
+FROZEN_MPY_PY_FILES := $(shell find -L $(FROZEN_MPY_DIR) -type f -name '*.py')
+FROZEN_MPY_MPY_FILES := $(addprefix $(BUILD)/,$(FROZEN_MPY_PY_FILES:.py=.mpy))
+endif
+
+OBJ += $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
+OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o))
+OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o))
+ifeq ($(INTERNAL_LIBM),1)
+OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o))
+endif
+OBJ += $(addprefix $(BUILD)/, $(SRC_S:.S=.o))
+OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o))
+
+$(BUILD)/$(FATFS_DIR)/ff.o: COPT += -Os
+$(filter $(PY_BUILD)/../extmod/vfs_fat_%.o, $(PY_O)): COPT += -Os
+
+# List of sources for qstr extraction
+SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_MOD) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED)
+# Sources that only hold QSTRs after pre-processing.
+SRC_QSTR_PREPROCESSOR +=
+
+# IDF build commands
+IDF_PATH = $(realpath ./esp-idf)
+# create the directory
+$(BUILD)/esp-idf:
+	$(Q)$(MKDIR) -p $@
+
+# create the config headers
+$(BUILD)/esp-idf/config/sdkconfig.h: boards/$(BOARD)/sdkconfig | $(BUILD)/esp-idf
+	IDF_PATH=$(IDF_PATH) cmake -S . -B $(BUILD)/esp-idf -DSDKCONFIG=$(BUILD)/esp-idf/sdkconfig -DSDKCONFIG_DEFAULTS="sdkconfig.defaults;boards/$(BOARD)/sdkconfig" -DCMAKE_TOOLCHAIN_FILE=$IDF_PATH/tools/cmake/toolchain-esp32s2.cmake -DIDF_TARGET=esp32s2 -GNinja
+
+# build a lib
+# Adding -d explain -j 1 -v to the ninja line will output debug info
+$(BUILD)/esp-idf/esp-idf/%.a: $(BUILD)/esp-idf/config/sdkconfig.h
+	ninja -C $(BUILD)/esp-idf esp-idf/$*.a
+
+$(BUILD)/esp-idf/esp-idf/esp32s2/esp32s2_out.ld: $(BUILD)/esp-idf/config/sdkconfig.h
+	ninja -C $(BUILD)/esp-idf esp-idf/esp32s2/esp32s2_out.ld
+
+$(BUILD)/esp-idf/esp-idf/esp32s2/ld/esp32s2.project.ld: $(BUILD)/esp-idf/config/sdkconfig.h
+	ninja -C $(BUILD)/esp-idf esp-idf/esp32s2/ld/esp32s2.project.ld
+
+
+$(BUILD)/esp-idf/partition_table/partition-table.bin: $(BUILD)/esp-idf/config/sdkconfig.h
+	IDF_PATH=$(IDF_PATH) ninja -C $(BUILD)/esp-idf partition_table/partition-table.bin
+
+$(BUILD)/esp-idf/bootloader/bootloader.bin: $(BUILD)/esp-idf/config/sdkconfig.h
+	ninja -C $(BUILD)/esp-idf bootloader/bootloader.bin
+
+# run menuconfig
+menuconfig: $(BUILD)/esp-idf/config
+	ninja -C $(BUILD)/esp-idf menuconfig
+	diff --old-line-format= --unchanged-line-format= sdkconfig.defaults $(BUILD)/esp-idf/sdkconfig > boards/$(BOARD)/sdkconfig || true
+
+# qstr builds include headers so we need to make sure they are up to date
+$(HEADER_BUILD)/qstr.i.last: | $(BUILD)/esp-idf/config/sdkconfig.h
+
+# Order here matters
+ESP_IDF_COMPONENTS_LINK = freertos log esp_system esp32s2 bootloader_support pthread esp_timer vfs spi_flash app_update esp_common esp32s2 heap newlib driver xtensa soc esp_ringbuf #
+
+ESP_IDF_COMPONENTS_INCLUDE = driver freertos log soc
+
+INC += $(foreach component, $(ESP_IDF_COMPONENTS_INCLUDE), -Iesp-idf/components/$(component)/include)
+
+ESP_IDF_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/$(component)/lib$(component).a)
+BINARY_BLOBS = esp-idf/components/xtensa/esp32s2/libhal.a
+BINARY_WIFI_BLOBS = libcoexist.a libcore.a libespnow.a libmesh.a libnet80211.a libpp.a librtc.a libsmartconfig.a libphy.a
+BINARY_BLOBS += $(addprefix esp-idf/components/esp_wifi/lib/esp32s2/, $(BINARY_WIFI_BLOBS))
+
+ESP_IDF_COMPONENTS_EXPANDED += $(BUILD)/esp-idf/esp-idf/soc/soc/esp32s2/libsoc_esp32s2.a esp-idf/components/xtensa/esp32s2/libhal.a
+ESP_AUTOGEN_LD = $(BUILD)/esp-idf/esp-idf/esp32s2/esp32s2_out.ld $(BUILD)/esp-idf/esp-idf/esp32s2/ld/esp32s2.project.ld
+
+FLASH_FLAGS = --flash_mode $(CIRCUITPY_ESP_FLASH_MODE) --flash_freq $(CIRCUITPY_ESP_FLASH_FREQ) --flash_size $(CIRCUITPY_ESP_FLASH_SIZE)
+
+all: $(BUILD)/firmware.bin
+
+$(BUILD)/firmware.elf: $(OBJ) | $(ESP_IDF_COMPONENTS_EXPANDED) $(ESP_AUTOGEN_LD)
+	$(STEPECHO) "LINK $@"
+	$(Q)$(CC) -o $@ $(LDFLAGS) $^ $(ESP_IDF_COMPONENTS_EXPANDED) $(BINARY_BLOBS) build-$(BOARD)/esp-idf/esp-idf/newlib/libnewlib.a -u newlib_include_pthread_impl
+	# $(Q)$(SIZE) $@ | $(PYTHON3) $(TOP)/tools/build_memory_info.py $(BUILD)/esp-idf/esp-idf/esp32s2/esp32s2_out.ld
+
+$(BUILD)/circuitpython-firmware.bin: $(BUILD)/firmware.elf
+	$(STEPECHO) "Create $@"
+	$(Q)esptool.py --chip esp32s2 elf2image $(FLASH_FLAGS) --elf-sha256-offset 0xb0 -o $@ $^
+#	$(Q)$(OBJCOPY) -O binary $^ $@
+#   $(Q)$(OBJCOPY) -O binary -j .vectors -j .text -j .data $^ $@
+
+$(BUILD)/firmware.bin: $(BUILD)/esp-idf/partition_table/partition-table.bin $(BUILD)/esp-idf/bootloader/bootloader.bin $(BUILD)/circuitpython-firmware.bin
+	$(Q)$(PYTHON) ../../tools/join_bins.py $@ 0x1000 $(BUILD)/esp-idf/bootloader/bootloader.bin 0x8000 $(BUILD)/esp-idf/partition_table/partition-table.bin 0x10000 $(BUILD)/circuitpython-firmware.bin
+
+flash: $(BUILD)/firmware.bin
+	esptool.py --chip esp32s2 -p /dev/tty.SLAB_USBtoUART -b 460800 --before=default_reset --after=hard_reset write_flash $(FLASH_FLAGS) 0x0000 $^
+
+include $(TOP)/py/mkrules.mk
+
+# Print out the value of a make variable.
+# https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile
+print-%:
+	@echo $* = $($*)
diff --git a/ports/esp32s2/background.c b/ports/esp32s2/background.c
new file mode 100644
index 000000000..e22cf4aac
--- /dev/null
+++ b/ports/esp32s2/background.c
@@ -0,0 +1,63 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+#include "supervisor/filesystem.h"
+#include "supervisor/shared/stack.h"
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+
+#if CIRCUITPY_DISPLAYIO
+#include "shared-module/displayio/__init__.h"
+#endif
+
+static bool running_background_tasks = false;
+
+void background_tasks_reset(void) {
+    running_background_tasks = false;
+}
+
+void run_background_tasks(void) {
+    // Don't call ourselves recursively.
+    if (running_background_tasks) {
+        return;
+    }
+
+    // Delay for 1 tick so that we don't starve the idle task.
+    // TODO: 1 tick is 10ms which is a long time! Can we delegate to idle for a minimal amount of
+    // time?
+    vTaskDelay(1);
+    running_background_tasks = true;
+    filesystem_background();
+
+    // #if CIRCUITPY_DISPLAYIO
+    // displayio_background();
+    // #endif
+    running_background_tasks = false;
+
+    assert_heap_ok();
+}
diff --git a/ports/esp32s2/background.h b/ports/esp32s2/background.h
new file mode 100644
index 000000000..0e1fb7a56
--- /dev/null
+++ b/ports/esp32s2/background.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Dan Halbert for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_BACKGROUND_H
+#define MICROPY_INCLUDED_ESP32S2_BACKGROUND_H
+
+#include <stdbool.h>
+
+void background_tasks_reset(void);
+void run_background_tasks(void);
+
+#endif  // MICROPY_INCLUDED_ESP32S2_BACKGROUND_H
diff --git a/ports/esp32s2/boards/board.h b/ports/esp32s2/boards/board.h
new file mode 100644
index 000000000..2f0db8135
--- /dev/null
+++ b/ports/esp32s2/boards/board.h
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// This file defines board specific functions.
+
+#ifndef MICROPY_INCLUDED_ESP32S2_BOARDS_BOARD_H
+#define MICROPY_INCLUDED_ESP32S2_BOARDS_BOARD_H
+
+#include <stdbool.h>
+
+// Initializes board related state once on start up.
+void board_init(void);
+
+// Returns true if the user initiates safe mode in a board specific way.
+// Also add BOARD_USER_SAFE_MODE in mpconfigboard.h to explain the board specific
+// way.
+bool board_requests_safe_mode(void);
+
+// Reset the state of off MCU components such as neopixels.
+void reset_board(void);
+
+#endif  // MICROPY_INCLUDED_ESP32S2_BOARDS_BOARD_H
diff --git a/ports/esp32s2/boards/espressif_saola_1_wroom/board.c b/ports/esp32s2/boards/espressif_saola_1_wroom/board.c
new file mode 100644
index 000000000..a3a351f27
--- /dev/null
+++ b/ports/esp32s2/boards/espressif_saola_1_wroom/board.c
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+
+void board_init(void) {
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h
new file mode 100644
index 000000000..78652e215
--- /dev/null
+++ b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+//Micropython setup
+
+#define MICROPY_HW_BOARD_NAME       "Saola 1 w/Wroom"
+#define MICROPY_HW_MCU_NAME         "ESP32S2"
+
+#define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk
new file mode 100644
index 000000000..aa82588a5
--- /dev/null
+++ b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk
@@ -0,0 +1,20 @@
+USB_VID = 0x239A
+USB_PID = 0x80A8
+USB_PRODUCT = "Saola 1 w/WROOM"
+USB_MANUFACTURER = "Espressif"
+USB_DEVICES = "CDC,MSC,HID"
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = MPZ
+
+# The default queue depth of 16 overflows on release builds,
+# so increase it to 32.
+CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
+
+CIRCUITPY_NEOPIXEL_WRITE = 0
+CIRCUITPY_DIGITALIO = 0
+CIRCUITPY_MICROCONTROLLER = 0
+
+CIRCUITPY_ESP_FLASH_MODE=dio
+CIRCUITPY_ESP_FLASH_FREQ=40m
+CIRCUITPY_ESP_FLASH_SIZE=4MB
diff --git a/ports/esp32s2/boards/espressif_saola_1_wroom/pins.c b/ports/esp32s2/boards/espressif_saola_1_wroom/pins.c
new file mode 100644
index 000000000..1d4e2c4eb
--- /dev/null
+++ b/ports/esp32s2/boards/espressif_saola_1_wroom/pins.c
@@ -0,0 +1,46 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
+    { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
+    { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
+    { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
+    { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
+    { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
+    { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
+    { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
+    { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
+    { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
+    { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
+    { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
+    { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+    { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
+    { MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
+    { MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
+    { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
+
+
+    { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
+    { MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) },
+    { MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) },
+    { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
+    { MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) },
+    { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
+    { MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) },
+    { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
+    { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
+    { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
+    { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
+    { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) },
+    { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) },
+    { MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) },
+    { MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
+    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
+    { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
+    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
+    { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
+    { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },
+    { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/esp32s2/boards/espressif_saola_1_wroom/sdkconfig b/ports/esp32s2/boards/espressif_saola_1_wroom/sdkconfig
new file mode 100644
index 000000000..e69de29bb
diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/board.c b/ports/esp32s2/boards/espressif_saola_1_wrover/board.c
new file mode 100644
index 000000000..a3a351f27
--- /dev/null
+++ b/ports/esp32s2/boards/espressif_saola_1_wrover/board.c
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+
+void board_init(void) {
+}
+
+bool board_requests_safe_mode(void) {
+    return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h
new file mode 100644
index 000000000..7d08ccf7f
--- /dev/null
+++ b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h
@@ -0,0 +1,32 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+//Micropython setup
+
+#define MICROPY_HW_BOARD_NAME       "Saola 1 w/Wrover"
+#define MICROPY_HW_MCU_NAME         "ESP32S2"
+
+#define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk
new file mode 100644
index 000000000..ff7e6228a
--- /dev/null
+++ b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk
@@ -0,0 +1,20 @@
+USB_VID = 0x239A
+USB_PID = 0x80A6
+USB_PRODUCT = "Saola 1 w/WROVER"
+USB_MANUFACTURER = "Espressif"
+USB_DEVICES = "CDC,MSC,HID"
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = MPZ
+
+# The default queue depth of 16 overflows on release builds,
+# so increase it to 32.
+CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
+
+CIRCUITPY_NEOPIXEL_WRITE = 0
+CIRCUITPY_DIGITALIO = 0
+CIRCUITPY_MICROCONTROLLER = 0
+
+CIRCUITPY_ESP_FLASH_MODE=dio
+CIRCUITPY_ESP_FLASH_FREQ=40m
+CIRCUITPY_ESP_FLASH_SIZE=4MB
diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/pins.c b/ports/esp32s2/boards/espressif_saola_1_wrover/pins.c
new file mode 100644
index 000000000..1d4e2c4eb
--- /dev/null
+++ b/ports/esp32s2/boards/espressif_saola_1_wrover/pins.c
@@ -0,0 +1,46 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
+    { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
+    { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
+    { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
+    { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
+    { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
+    { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
+    { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
+    { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
+    { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
+    { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
+    { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
+    { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+    { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
+    { MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
+    { MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
+    { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
+
+
+    { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
+    { MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) },
+    { MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) },
+    { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
+    { MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) },
+    { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
+    { MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) },
+    { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
+    { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
+    { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
+    { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
+    { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) },
+    { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) },
+    { MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) },
+    { MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
+    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
+    { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
+    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
+    { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
+    { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },
+    { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/sdkconfig b/ports/esp32s2/boards/espressif_saola_1_wrover/sdkconfig
new file mode 100644
index 000000000..e69de29bb
diff --git a/ports/esp32s2/common-hal/board/__init__.c b/ports/esp32s2/common-hal/board/__init__.c
new file mode 100644
index 000000000..7a409d503
--- /dev/null
+++ b/ports/esp32s2/common-hal/board/__init__.c
@@ -0,0 +1 @@
+// No board module functions.
diff --git a/ports/esp32s2/common-hal/digitalio/DigitalInOut.c b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c
new file mode 100644
index 000000000..349da6bf4
--- /dev/null
+++ b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c
@@ -0,0 +1,137 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017-2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "shared-bindings/digitalio/DigitalInOut.h"
+#include "py/runtime.h"
+#include "supervisor/shared/translate.h"
+
+#include "driver/gpio.h"
+
+
+#include "esp_log.h"
+
+static const char* TAG = "CircuitPython digitalio";
+
+void common_hal_digitalio_digitalinout_never_reset(
+        digitalio_digitalinout_obj_t *self) {
+    (void)self;
+}
+
+digitalinout_result_t common_hal_digitalio_digitalinout_construct(
+        digitalio_digitalinout_obj_t *self, const mcu_pin_obj_t *pin) {
+
+    // claim_pin(pin);
+    self->pin = pin;
+
+    ESP_EARLY_LOGW(TAG, "construct %d", pin->number);
+
+    return DIGITALINOUT_OK;
+}
+
+bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t *self) {
+    return self->pin == mp_const_none;
+}
+
+void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self) {
+    if (common_hal_digitalio_digitalinout_deinited(self)) {
+        return;
+    }
+
+    // reset_pin_number(0, self->pin->number);
+    self->pin = mp_const_none;
+}
+
+void common_hal_digitalio_digitalinout_switch_to_input(
+        digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) {
+    gpio_config_t config = {
+        .pin_bit_mask = 1 << self->pin->number,
+        .mode = GPIO_MODE_INPUT
+    };
+    if (pull == PULL_UP) {
+        config.pull_up_en = GPIO_PULLUP_ENABLE;
+    } else if (pull == PULL_DOWN) {
+        config.pull_down_en = GPIO_PULLDOWN_ENABLE;
+    }
+
+    gpio_config(&config);
+}
+
+void common_hal_digitalio_digitalinout_switch_to_output(
+        digitalio_digitalinout_obj_t *self, bool value,
+        digitalio_drive_mode_t drive_mode) {
+    gpio_config_t config = {
+        .pin_bit_mask = 1ULL << self->pin->number,
+        .mode = GPIO_MODE_OUTPUT
+    };
+    if (drive_mode == DRIVE_MODE_OPEN_DRAIN) {
+        config.mode = GPIO_MODE_OUTPUT_OD;
+    }
+    gpio_set_level(self->pin->number, value);
+    gpio_config(&config);
+}
+
+digitalio_direction_t common_hal_digitalio_digitalinout_get_direction(
+        digitalio_digitalinout_obj_t *self) {
+
+    return DIRECTION_OUTPUT;
+}
+
+void common_hal_digitalio_digitalinout_set_value(
+        digitalio_digitalinout_obj_t *self, bool value) {
+    ESP_EARLY_LOGW(TAG, "set %d %d", self->pin->number, value);
+    gpio_set_level(self->pin->number, value);
+}
+
+bool common_hal_digitalio_digitalinout_get_value(
+        digitalio_digitalinout_obj_t *self) {
+    return true;
+}
+
+void common_hal_digitalio_digitalinout_set_drive_mode(
+        digitalio_digitalinout_obj_t *self,
+        digitalio_drive_mode_t drive_mode) {
+    (void)self;
+    (void)drive_mode;
+}
+
+digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode(
+        digitalio_digitalinout_obj_t *self) {
+    // if (common_hal_digitalio_digitalinout_get_direction(self) == DIRECTION_OUTPUT)
+    //     return DRIVE_MODE_PUSH_PULL;
+    // else
+    return DRIVE_MODE_OPEN_DRAIN;
+}
+
+void common_hal_digitalio_digitalinout_set_pull(
+        digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) {
+    (void)self;
+    (void)pull;
+}
+
+digitalio_pull_t common_hal_digitalio_digitalinout_get_pull(
+        digitalio_digitalinout_obj_t *self) {
+    return PULL_NONE;
+}
diff --git a/ports/esp32s2/common-hal/digitalio/DigitalInOut.h b/ports/esp32s2/common-hal/digitalio/DigitalInOut.h
new file mode 100644
index 000000000..6877f1741
--- /dev/null
+++ b/ports/esp32s2/common-hal/digitalio/DigitalInOut.h
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ * Copyright (c) 2019 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_DIGITALIO_DIGITALINOUT_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_DIGITALIO_DIGITALINOUT_H
+
+#include "common-hal/microcontroller/Pin.h"
+
+typedef struct {
+    mp_obj_base_t base;
+    const mcu_pin_obj_t *pin;
+} digitalio_digitalinout_obj_t;
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_DIGITALIO_DIGITALINOUT_H
diff --git a/ports/esp32s2/common-hal/digitalio/__init__.c b/ports/esp32s2/common-hal/digitalio/__init__.c
new file mode 100644
index 000000000..20fad4595
--- /dev/null
+++ b/ports/esp32s2/common-hal/digitalio/__init__.c
@@ -0,0 +1 @@
+// No digitalio module functions.
diff --git a/ports/esp32s2/common-hal/microcontroller/Pin.c b/ports/esp32s2/common-hal/microcontroller/Pin.c
new file mode 100644
index 000000000..e142191fd
--- /dev/null
+++ b/ports/esp32s2/common-hal/microcontroller/Pin.c
@@ -0,0 +1,46 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries
+ * Copyright (c) 2019 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "shared-bindings/microcontroller/Pin.h"
+
+#include "py/mphal.h"
+
+// Mark pin as free and return it to a quiescent state.
+void reset_pin_number(uint8_t pin_port, uint8_t pin_number) {
+}
+
+
+void claim_pin(const mcu_pin_obj_t* pin) {
+}
+
+bool pin_number_is_free(uint8_t pin_port, uint8_t pin_number) {
+    return true;
+}
+
+bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) {
+    return pin_number_is_free(0, pin->number);
+}
diff --git a/ports/esp32s2/common-hal/microcontroller/Pin.h b/ports/esp32s2/common-hal/microcontroller/Pin.h
new file mode 100644
index 000000000..ab5574422
--- /dev/null
+++ b/ports/esp32s2/common-hal/microcontroller/Pin.h
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Scott Shawcroft
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_MICROCONTROLLER_PIN_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_MICROCONTROLLER_PIN_H
+
+#include "py/mphal.h"
+
+#include "peripherals/pins.h"
+
+void reset_all_pins(void);
+// reset_pin_number takes the pin number instead of the pointer so that objects don't
+// need to store a full pointer.
+void reset_pin_number(uint8_t pin_port, uint8_t pin_number);
+void claim_pin(const mcu_pin_obj_t* pin);
+bool pin_number_is_free(uint8_t pin_port, uint8_t pin_number);
+void never_reset_pin_number(uint8_t pin_port, uint8_t pin_number);
+// GPIO_TypeDef * pin_port(uint8_t pin_port);
+uint16_t pin_mask(uint8_t pin_number);
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_MICROCONTROLLER_PIN_H
diff --git a/ports/esp32s2/common-hal/microcontroller/Processor.c b/ports/esp32s2/common-hal/microcontroller/Processor.c
new file mode 100644
index 000000000..8eaf1a33d
--- /dev/null
+++ b/ports/esp32s2/common-hal/microcontroller/Processor.c
@@ -0,0 +1,46 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Dan Halbert for Adafruit Industries
+ * Copyright (c) 2019 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <math.h>
+#include "common-hal/microcontroller/Processor.h"
+#include "py/runtime.h"
+#include "supervisor/shared/translate.h"
+
+float common_hal_mcu_processor_get_temperature(void) {
+    return NAN;
+}
+
+float common_hal_mcu_processor_get_voltage(void) {
+    return NAN;
+}
+
+uint32_t common_hal_mcu_processor_get_frequency(void) {
+    return 0;
+}
+
+void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) {
+}
diff --git a/ports/esp32s2/common-hal/microcontroller/Processor.h b/ports/esp32s2/common-hal/microcontroller/Processor.h
new file mode 100644
index 000000000..a2ea261c8
--- /dev/null
+++ b/ports/esp32s2/common-hal/microcontroller/Processor.h
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Dan  Halbert for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_LITEX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H
+#define MICROPY_INCLUDED_LITEX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H
+
+#define COMMON_HAL_MCU_PROCESSOR_UID_LENGTH 15
+
+#include "py/obj.h"
+
+typedef struct {
+    mp_obj_base_t base;
+    // Stores no state currently.
+} mcu_processor_obj_t;
+
+#endif // MICROPY_INCLUDED_LITEX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H
diff --git a/ports/esp32s2/common-hal/microcontroller/__init__.c b/ports/esp32s2/common-hal/microcontroller/__init__.c
new file mode 100644
index 000000000..a36d0c440
--- /dev/null
+++ b/ports/esp32s2/common-hal/microcontroller/__init__.c
@@ -0,0 +1,128 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries
+ * Copyright (c) 2019 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mphal.h"
+#include "py/obj.h"
+#include "py/runtime.h"
+
+#include "common-hal/microcontroller/Pin.h"
+#include "common-hal/microcontroller/Processor.h"
+
+#include "shared-bindings/microcontroller/__init__.h"
+#include "shared-bindings/microcontroller/Pin.h"
+#include "shared-bindings/microcontroller/Processor.h"
+
+#include "supervisor/filesystem.h"
+#include "supervisor/shared/safe_mode.h"
+
+void common_hal_mcu_delay_us(uint32_t delay) {
+
+}
+
+volatile uint32_t nesting_count = 0;
+
+void common_hal_mcu_disable_interrupts(void) {
+    nesting_count++;
+}
+
+void common_hal_mcu_enable_interrupts(void) {
+    if (nesting_count == 0) {
+
+    }
+    nesting_count--;
+    if (nesting_count > 0) {
+        return;
+    }
+}
+
+void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) {
+    if(runmode == RUNMODE_SAFE_MODE)
+        safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE);
+}
+
+void common_hal_mcu_reset(void) {
+    filesystem_flush(); //TODO: implement as part of flash improvements
+    // NVIC_SystemReset();
+    while(1);
+}
+
+// The singleton microcontroller.Processor object, bound to microcontroller.cpu
+// It currently only has properties, and no state.
+const mcu_processor_obj_t common_hal_mcu_processor_obj = {
+    .base = {
+        .type = &mcu_processor_type,
+    },
+};
+
+// This maps MCU pin names to pin objects.
+STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = {
+    { MP_ROM_QSTR(MP_QSTR_GPIO0), MP_ROM_PTR(&pin_GPIO0) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO1), MP_ROM_PTR(&pin_GPIO1) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO2), MP_ROM_PTR(&pin_GPIO2) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO3), MP_ROM_PTR(&pin_GPIO3) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO4), MP_ROM_PTR(&pin_GPIO4) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO5), MP_ROM_PTR(&pin_GPIO5) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO6), MP_ROM_PTR(&pin_GPIO6) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO7), MP_ROM_PTR(&pin_GPIO7) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO8), MP_ROM_PTR(&pin_GPIO8) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO9), MP_ROM_PTR(&pin_GPIO9) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO10), MP_ROM_PTR(&pin_GPIO10) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO11), MP_ROM_PTR(&pin_GPIO11) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO12), MP_ROM_PTR(&pin_GPIO12) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO13), MP_ROM_PTR(&pin_GPIO13) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO14), MP_ROM_PTR(&pin_GPIO14) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO15), MP_ROM_PTR(&pin_GPIO15) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO16), MP_ROM_PTR(&pin_GPIO16) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO17), MP_ROM_PTR(&pin_GPIO17) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO18), MP_ROM_PTR(&pin_GPIO18) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO19), MP_ROM_PTR(&pin_GPIO19) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO20), MP_ROM_PTR(&pin_GPIO20) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO21), MP_ROM_PTR(&pin_GPIO21) },
+
+    { MP_ROM_QSTR(MP_QSTR_GPIO26), MP_ROM_PTR(&pin_GPIO26) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO27), MP_ROM_PTR(&pin_GPIO27) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO28), MP_ROM_PTR(&pin_GPIO28) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO29), MP_ROM_PTR(&pin_GPIO29) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO30), MP_ROM_PTR(&pin_GPIO30) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO31), MP_ROM_PTR(&pin_GPIO31) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO32), MP_ROM_PTR(&pin_GPIO32) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO33), MP_ROM_PTR(&pin_GPIO33) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO34), MP_ROM_PTR(&pin_GPIO34) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO35), MP_ROM_PTR(&pin_GPIO35) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO36), MP_ROM_PTR(&pin_GPIO36) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO37), MP_ROM_PTR(&pin_GPIO37) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO38), MP_ROM_PTR(&pin_GPIO38) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO39), MP_ROM_PTR(&pin_GPIO39) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO40), MP_ROM_PTR(&pin_GPIO40) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO41), MP_ROM_PTR(&pin_GPIO41) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO42), MP_ROM_PTR(&pin_GPIO42) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO43), MP_ROM_PTR(&pin_GPIO43) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO44), MP_ROM_PTR(&pin_GPIO44) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO45), MP_ROM_PTR(&pin_GPIO45) },
+    { MP_ROM_QSTR(MP_QSTR_GPIO46), MP_ROM_PTR(&pin_GPIO46) },
+};
+MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_global_dict_table);
diff --git a/ports/esp32s2/common-hal/neopixel_write/__init__.c b/ports/esp32s2/common-hal/neopixel_write/__init__.c
new file mode 100644
index 000000000..a9b42fc96
--- /dev/null
+++ b/ports/esp32s2/common-hal/neopixel_write/__init__.c
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 hathach for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mphal.h"
+#include "shared-bindings/neopixel_write/__init__.h"
+
+void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, uint32_t numBytes) {
+    (void)digitalinout;
+    (void)numBytes;
+}
diff --git a/ports/esp32s2/common-hal/os/__init__.c b/ports/esp32s2/common-hal/os/__init__.c
new file mode 100644
index 000000000..17bda75ad
--- /dev/null
+++ b/ports/esp32s2/common-hal/os/__init__.c
@@ -0,0 +1,61 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Sean Cross
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "genhdr/mpversion.h"
+#include "py/mpconfig.h"
+#include "py/objstr.h"
+#include "py/objtuple.h"
+#include "py/qstr.h"
+
+STATIC const qstr os_uname_info_fields[] = {
+    MP_QSTR_sysname, MP_QSTR_nodename,
+    MP_QSTR_release, MP_QSTR_version, MP_QSTR_machine
+};
+STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "esp32s2");
+STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "esp32s2");
+STATIC const MP_DEFINE_STR_OBJ(os_uname_info_release_obj, MICROPY_VERSION_STRING);
+STATIC const MP_DEFINE_STR_OBJ(os_uname_info_version_obj, MICROPY_GIT_TAG " on " MICROPY_BUILD_DATE);
+STATIC const MP_DEFINE_STR_OBJ(os_uname_info_machine_obj, MICROPY_HW_BOARD_NAME " with " MICROPY_HW_MCU_NAME);
+
+
+STATIC MP_DEFINE_ATTRTUPLE(
+    os_uname_info_obj,
+    os_uname_info_fields,
+    5,
+    (mp_obj_t)&os_uname_info_sysname_obj,
+    (mp_obj_t)&os_uname_info_nodename_obj,
+    (mp_obj_t)&os_uname_info_release_obj,
+    (mp_obj_t)&os_uname_info_version_obj,
+    (mp_obj_t)&os_uname_info_machine_obj
+);
+
+mp_obj_t common_hal_os_uname(void) {
+    return (mp_obj_t)&os_uname_info_obj;
+}
+
+bool common_hal_os_urandom(uint8_t* buffer, uint32_t length) {
+    return false;
+}
diff --git a/ports/esp32s2/common-hal/supervisor/Runtime.c b/ports/esp32s2/common-hal/supervisor/Runtime.c
new file mode 100644
index 000000000..feab6987d
--- /dev/null
+++ b/ports/esp32s2/common-hal/supervisor/Runtime.c
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 Michael Schroeder
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdbool.h>
+#include "shared-bindings/supervisor/Runtime.h"
+#include "supervisor/serial.h"
+
+bool common_hal_get_serial_connected(void) {
+    return (bool) serial_connected();
+}
+
+bool common_hal_get_serial_bytes_available(void) {
+  return (bool) serial_bytes_available();
+}
+
diff --git a/ports/esp32s2/common-hal/supervisor/Runtime.h b/ports/esp32s2/common-hal/supervisor/Runtime.h
new file mode 100644
index 000000000..d1fe24621
--- /dev/null
+++ b/ports/esp32s2/common-hal/supervisor/Runtime.h
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 Michael Schroeder
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_LITEX_COMMON_HAL_SUPERVISOR_RUNTIME_H
+#define MICROPY_INCLUDED_LITEX_COMMON_HAL_SUPERVISOR_RUNTIME_H
+
+#include "py/obj.h"
+
+typedef struct {
+    mp_obj_base_t base;
+    // Stores no state currently.
+} super_runtime_obj_t;
+
+#endif // MICROPY_INCLUDED_LITEX_COMMON_HAL_SUPERVISOR_RUNTIME_H
diff --git a/ports/esp32s2/common-hal/supervisor/__init__.c b/ports/esp32s2/common-hal/supervisor/__init__.c
new file mode 100644
index 000000000..ac88556b4
--- /dev/null
+++ b/ports/esp32s2/common-hal/supervisor/__init__.c
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 Michael Schroeder
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+
+#include "py/obj.h"
+
+#include "shared-bindings/supervisor/__init__.h"
+#include "shared-bindings/supervisor/Runtime.h"
+
+
+// The singleton supervisor.Runtime object, bound to supervisor.runtime
+// It currently only has properties, and no state.
+const super_runtime_obj_t common_hal_supervisor_runtime_obj = {
+    .base = {
+        .type = &supervisor_runtime_type,
+    },
+};
\ No newline at end of file
diff --git a/ports/esp32s2/common-hal/time/__init__.c b/ports/esp32s2/common-hal/time/__init__.c
new file mode 100644
index 000000000..c85077868
--- /dev/null
+++ b/ports/esp32s2/common-hal/time/__init__.c
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/mphal.h"
+
+#include "tick.h"
+
+uint64_t common_hal_time_monotonic(void) {
+    return supervisor_ticks_ms64();
+}
+
+uint64_t common_hal_time_monotonic_ns(void) {
+    uint64_t ms;
+    uint32_t us_until_ms;
+    current_tick(&ms, &us_until_ms);
+    // us counts down.
+    return 1000 * (ms * 1000 + (1000 - us_until_ms));
+}
+
+void common_hal_time_delay_ms(uint32_t delay) {
+    mp_hal_delay_ms(delay);
+}
diff --git a/ports/esp32s2/esp-idf b/ports/esp32s2/esp-idf
new file mode 160000
index 000000000..0daf6e0e4
--- /dev/null
+++ b/ports/esp32s2/esp-idf
@@ -0,0 +1 @@
+Subproject commit 0daf6e0e41f95d22d193d08941a00df9525bc405
diff --git a/ports/esp32s2/esp32s2_peripherals_config.h b/ports/esp32s2/esp32s2_peripherals_config.h
new file mode 100644
index 000000000..aac1a2fa6
--- /dev/null
+++ b/ports/esp32s2/esp32s2_peripherals_config.h
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_PERIPHERALS_CONFIG_H
+#define MICROPY_INCLUDED_ESP32S2_PERIPHERALS_CONFIG_H
+
+#include "py/obj.h"
+
+extern const mp_obj_type_t mcu_pin_type;
+
+#define PIN_PREFIX_VALUES { &mcu_pin_type },
+#define PIN_PREFIX_FIELDS mp_obj_base_t base;
+
+
+#endif // MICROPY_INCLUDED_ESP32S2_PERIPHERALS_CONFIG_H
diff --git a/ports/esp32s2/fatfs_port.c b/ports/esp32s2/fatfs_port.c
new file mode 100644
index 000000000..13ac21fb1
--- /dev/null
+++ b/ports/esp32s2/fatfs_port.c
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2013, 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "py/runtime.h"
+#include "lib/oofatfs/ff.h"
+
+DWORD get_fattime(void) {
+	// TODO: Implement this function. For now, fake it.
+    return ((2016 - 1980) << 25) | ((12) << 21) | ((4) << 16) | ((00) << 11) | ((18) << 5) | (23 / 2);
+}
diff --git a/ports/esp32s2/mpconfigport.h b/ports/esp32s2/mpconfigport.h
new file mode 100644
index 000000000..c307d4791
--- /dev/null
+++ b/ports/esp32s2/mpconfigport.h
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2015 Glenn Ruben Bakke
+ * Copyright (c) 2019 Dan Halbert for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef ESP32S2_MPCONFIGPORT_H__
+#define ESP32S2_MPCONFIGPORT_H__
+
+#define CIRCUITPY_INTERNAL_NVM_SIZE         (0)
+#define MICROPY_NLR_THUMB                   (0)
+
+#define MICROPY_PY_UJSON            (0)
+
+#include "py/circuitpy_mpconfig.h"
+
+
+#define MICROPY_PORT_ROOT_POINTERS \
+	CIRCUITPY_COMMON_ROOT_POINTERS
+#define MICROPY_NLR_SETJMP                  (1)
+#define CIRCUITPY_DEFAULT_STACK_SIZE        0x6000
+
+
+#endif  // __INCLUDED_ESP32S2_MPCONFIGPORT_H
diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk
new file mode 100644
index 000000000..6d66d9057
--- /dev/null
+++ b/ports/esp32s2/mpconfigport.mk
@@ -0,0 +1,35 @@
+# Define an equivalent for MICROPY_LONGINT_IMPL, to pass to $(MPY-TOOL) in py/mkrules.mk
+# $(MPY-TOOL) needs to know what kind of longint to use (if any) to freeze long integers.
+# This should correspond to the MICROPY_LONGINT_IMPL definition in mpconfigport.h.
+MPY_TOOL_LONGINT_IMPL = -mlongint-impl=mpz
+
+# Internal math library is substantially smaller than toolchain one
+INTERNAL_LIBM = 1
+
+# Chip supplied serial number, in bytes
+USB_SERIAL_NUMBER_LENGTH = 30
+
+# Longints can be implemented as mpz, as longlong, or not
+LONGINT_IMPL = MPZ
+
+CIRCUITPY_FULL_BUILD = 0
+CIRCUITPY_ANALOGIO = 0
+CIRCUITPY_AUDIOBUSIO = 0
+CIRCUITPY_AUDIOIO = 0
+CIRCUITPY_BITBANGIO = 0
+CIRCUITPY_BOARD = 1
+CIRCUITPY_DIGITALIO = 1
+CIRCUITPY_BUSIO = 0
+CIRCUITPY_DISPLAYIO = 0
+CIRCUITPY_FREQUENCYIO = 0
+CIRCUITPY_I2CSLAVE = 0
+CIRCUITPY_MICROCONTROLLER = 1
+CIRCUITPY_NVM = 0
+CIRCUITPY_PULSEIO = 0
+CIRCUITPY_ROTARYIO = 0
+CIRCUITPY_RTC = 0
+CIRCUITPY_TOUCHIO = 0
+
+# Enable USB support
+CIRCUITPY_USB_HID = 1
+CIRCUITPY_USB_MIDI = 1
diff --git a/ports/esp32s2/mphalport.c b/ports/esp32s2/mphalport.c
new file mode 100644
index 000000000..772b61c9e
--- /dev/null
+++ b/ports/esp32s2/mphalport.c
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2015 Glenn Ruben Bakke
+ * Copyright (c) 2018 Artur Pacholec
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <string.h>
+
+#include "py/mphal.h"
+#include "py/mpstate.h"
+#include "py/gc.h"
+
+#include "esp-idf/components/xtensa/include/esp_debug_helpers.h"
+
+void mp_hal_delay_us(mp_uint_t delay) {
+    mp_hal_delay_ms(delay / 1000);
+}
+
+mp_uint_t cpu_get_regs_and_sp(mp_uint_t *regs) {
+    return (mp_uint_t) __builtin_frame_address(0);
+}
diff --git a/ports/esp32s2/mphalport.h b/ports/esp32s2/mphalport.h
new file mode 100644
index 000000000..4feddbd9b
--- /dev/null
+++ b/ports/esp32s2/mphalport.h
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2015 Glenn Ruben Bakke
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef __ESP32S2_HAL
+#define __ESP32S2_HAL
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "lib/utils/interrupt_char.h"
+#include "py/mpconfig.h"
+#include "supervisor/shared/tick.h"
+
+#define mp_hal_ticks_ms()       ((mp_uint_t) supervisor_ticks_ms32())
+
+bool mp_hal_stdin_any(void);
+
+#endif
diff --git a/ports/esp32s2/partitions.csv b/ports/esp32s2/partitions.csv
new file mode 100644
index 000000000..47fb295e5
--- /dev/null
+++ b/ports/esp32s2/partitions.csv
@@ -0,0 +1,10 @@
+# ESP-IDF Partition Table
+# Name,   Type, SubType, Offset,  Size, Flags
+# bootloader.bin         0x1000
+# partition table        0x8000, 0xC00
+otadata,  data, ota,     0xd000,  0x2000,
+ota_0,    0,    ota_0,  0x10000, 512K,
+ota_1,    0,    ota_1,  0x90000, 512K,
+phy_init, data, phy,   0x110000,  0x1000,
+nvs,      data, nvs,   0x111000,  0x6000,
+user_fs,  data, fat,   0x200000,  2M,
diff --git a/ports/esp32s2/peripherals/pins.c b/ports/esp32s2/peripherals/pins.c
new file mode 100755
index 000000000..34fd6483e
--- /dev/null
+++ b/ports/esp32s2/peripherals/pins.c
@@ -0,0 +1,81 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "peripherals/pins.h"
+
+#define NO_ADC 0xff
+
+// This macro is used to simplify pin definition in boards/<board>/pins.c
+#define PIN(p_name, p_number) \
+const mcu_pin_obj_t pin_## p_name = { \
+    PIN_PREFIX_VALUES \
+    .number = p_number, \
+}
+
+PIN(GPIO0, 0);
+PIN(GPIO1, 1);
+PIN(GPIO2, 2);
+PIN(GPIO3, 3);
+PIN(GPIO4, 4);
+PIN(GPIO5, 5);
+PIN(GPIO6, 6);
+PIN(GPIO7, 7);
+PIN(GPIO8, 8);
+PIN(GPIO9, 9);
+PIN(GPIO10, 10);
+PIN(GPIO11, 11);
+PIN(GPIO12, 12);
+PIN(GPIO13, 13);
+PIN(GPIO14, 14);
+PIN(GPIO15, 15);
+PIN(GPIO16, 16);
+PIN(GPIO17, 17);
+PIN(GPIO18, 18);
+
+PIN(GPIO19, 19);
+PIN(GPIO20, 20);
+PIN(GPIO21, 21);
+PIN(GPIO26, 26);
+PIN(GPIO27, 27);
+PIN(GPIO28, 28);
+PIN(GPIO29, 29);
+PIN(GPIO30, 30);
+PIN(GPIO31, 31);
+PIN(GPIO32, 32);
+PIN(GPIO33, 33);
+PIN(GPIO34, 34);
+PIN(GPIO35, 35);
+PIN(GPIO36, 36);
+PIN(GPIO37, 37);
+PIN(GPIO38, 38);
+PIN(GPIO39, 39);
+PIN(GPIO40, 40);
+PIN(GPIO41, 41);
+PIN(GPIO42, 42);
+PIN(GPIO43, 43);
+PIN(GPIO44, 44);
+PIN(GPIO45, 45);
+PIN(GPIO46, 46);
diff --git a/ports/esp32s2/peripherals/pins.h b/ports/esp32s2/peripherals/pins.h
new file mode 100644
index 000000000..1a74b0367
--- /dev/null
+++ b/ports/esp32s2/peripherals/pins.h
@@ -0,0 +1,86 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// DO NOT include this file directly. Use shared-bindings/microcontroller/Pin.h instead to ensure
+// that all necessary includes are already included.
+
+#ifndef MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PINS_H
+#define MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PINS_H
+
+#include <stdint.h>
+
+#include "esp32s2_peripherals_config.h"
+
+typedef struct {
+    PIN_PREFIX_FIELDS
+    uint8_t number;
+} mcu_pin_obj_t;
+
+extern const mcu_pin_obj_t pin_GPIO0;
+extern const mcu_pin_obj_t pin_GPIO1;
+extern const mcu_pin_obj_t pin_GPIO2;
+extern const mcu_pin_obj_t pin_GPIO3;
+extern const mcu_pin_obj_t pin_GPIO4;
+extern const mcu_pin_obj_t pin_GPIO5;
+extern const mcu_pin_obj_t pin_GPIO6;
+extern const mcu_pin_obj_t pin_GPIO7;
+extern const mcu_pin_obj_t pin_GPIO8;
+extern const mcu_pin_obj_t pin_GPIO9;
+extern const mcu_pin_obj_t pin_GPIO10;
+extern const mcu_pin_obj_t pin_GPIO11;
+extern const mcu_pin_obj_t pin_GPIO12;
+extern const mcu_pin_obj_t pin_GPIO13;
+extern const mcu_pin_obj_t pin_GPIO14;
+extern const mcu_pin_obj_t pin_GPIO15;
+extern const mcu_pin_obj_t pin_GPIO16;
+extern const mcu_pin_obj_t pin_GPIO17;
+extern const mcu_pin_obj_t pin_GPIO18;
+extern const mcu_pin_obj_t pin_GPIO19;
+extern const mcu_pin_obj_t pin_GPIO20;
+extern const mcu_pin_obj_t pin_GPIO21;
+extern const mcu_pin_obj_t pin_GPIO26;
+extern const mcu_pin_obj_t pin_GPIO27;
+extern const mcu_pin_obj_t pin_GPIO28;
+extern const mcu_pin_obj_t pin_GPIO29;
+extern const mcu_pin_obj_t pin_GPIO30;
+extern const mcu_pin_obj_t pin_GPIO31;
+extern const mcu_pin_obj_t pin_GPIO32;
+extern const mcu_pin_obj_t pin_GPIO33;
+extern const mcu_pin_obj_t pin_GPIO34;
+extern const mcu_pin_obj_t pin_GPIO35;
+extern const mcu_pin_obj_t pin_GPIO36;
+extern const mcu_pin_obj_t pin_GPIO37;
+extern const mcu_pin_obj_t pin_GPIO38;
+extern const mcu_pin_obj_t pin_GPIO39;
+extern const mcu_pin_obj_t pin_GPIO40;
+extern const mcu_pin_obj_t pin_GPIO41;
+extern const mcu_pin_obj_t pin_GPIO42;
+extern const mcu_pin_obj_t pin_GPIO43;
+extern const mcu_pin_obj_t pin_GPIO44;
+extern const mcu_pin_obj_t pin_GPIO45;
+extern const mcu_pin_obj_t pin_GPIO46;
+
+#endif // MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PINS_H
diff --git a/ports/esp32s2/qstrdefsport.h b/ports/esp32s2/qstrdefsport.h
new file mode 100644
index 000000000..3ba897069
--- /dev/null
+++ b/ports/esp32s2/qstrdefsport.h
@@ -0,0 +1 @@
+// qstrs specific to this port
diff --git a/ports/esp32s2/sdkconfig.defaults b/ports/esp32s2/sdkconfig.defaults
new file mode 100644
index 000000000..f7deb53fb
--- /dev/null
+++ b/ports/esp32s2/sdkconfig.defaults
@@ -0,0 +1,822 @@
+#
+# Automatically generated file. DO NOT EDIT.
+# Espressif IoT Development Framework (ESP-IDF) Project Configuration
+#
+CONFIG_IDF_CMAKE=y
+CONFIG_IDF_TARGET="esp32s2"
+CONFIG_IDF_TARGET_ESP32S2=y
+CONFIG_IDF_FIRMWARE_CHIP_ID=0x0002
+
+#
+# SDK tool configuration
+#
+CONFIG_SDK_TOOLPREFIX="xtensa-esp32s2-elf-"
+# CONFIG_SDK_TOOLCHAIN_SUPPORTS_TIME_WIDE_64_BITS is not set
+# end of SDK tool configuration
+
+#
+# Build type
+#
+CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y
+# CONFIG_APP_BUILD_TYPE_ELF_RAM is not set
+CONFIG_APP_BUILD_GENERATE_BINARIES=y
+CONFIG_APP_BUILD_BOOTLOADER=y
+CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y
+# end of Build type
+
+#
+# Application manager
+#
+CONFIG_APP_COMPILE_TIME_DATE=y
+# CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set
+# CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set
+# CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set
+CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16
+# end of Application manager
+
+#
+# Bootloader config
+#
+CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
+# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set
+# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set
+# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set
+# CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set
+# CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set
+# CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set
+CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y
+# CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set
+# CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set
+CONFIG_BOOTLOADER_LOG_LEVEL=3
+# CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_8V is not set
+CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y
+# CONFIG_BOOTLOADER_FACTORY_RESET is not set
+# CONFIG_BOOTLOADER_APP_TEST is not set
+CONFIG_BOOTLOADER_WDT_ENABLE=y
+# CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set
+CONFIG_BOOTLOADER_WDT_TIME_MS=9000
+# CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set
+# CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set
+CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0
+# CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set
+# end of Bootloader config
+
+#
+# Security features
+#
+# CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set
+# CONFIG_SECURE_BOOT is not set
+# CONFIG_SECURE_FLASH_ENC_ENABLED is not set
+# end of Security features
+
+#
+# Serial flasher config
+#
+CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200
+# CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set
+# CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set
+CONFIG_ESPTOOLPY_FLASHMODE_DIO=y
+# CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set
+CONFIG_ESPTOOLPY_FLASHMODE="dio"
+# CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set
+CONFIG_ESPTOOLPY_FLASHFREQ_40M=y
+# CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set
+# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set
+CONFIG_ESPTOOLPY_FLASHFREQ="40m"
+# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set
+# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set
+CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
+# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set
+# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set
+CONFIG_ESPTOOLPY_FLASHSIZE="4MB"
+CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y
+CONFIG_ESPTOOLPY_BEFORE_RESET=y
+# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set
+CONFIG_ESPTOOLPY_BEFORE="default_reset"
+CONFIG_ESPTOOLPY_AFTER_RESET=y
+# CONFIG_ESPTOOLPY_AFTER_NORESET is not set
+CONFIG_ESPTOOLPY_AFTER="hard_reset"
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_9600B is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_57600B is not set
+CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B=y
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_230400B is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_921600B is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_2MB is not set
+# CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER is not set
+CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL=115200
+CONFIG_ESPTOOLPY_MONITOR_BAUD=115200
+# end of Serial flasher config
+
+#
+# Partition Table
+#
+# CONFIG_PARTITION_TABLE_SINGLE_APP is not set
+# CONFIG_PARTITION_TABLE_TWO_OTA is not set
+CONFIG_PARTITION_TABLE_CUSTOM=y
+CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
+CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
+CONFIG_PARTITION_TABLE_OFFSET=0x8000
+CONFIG_PARTITION_TABLE_MD5=y
+# end of Partition Table
+
+#
+# Compiler options
+#
+CONFIG_COMPILER_OPTIMIZATION_DEFAULT=y
+# CONFIG_COMPILER_OPTIMIZATION_SIZE is not set
+# CONFIG_COMPILER_OPTIMIZATION_PERF is not set
+# CONFIG_COMPILER_OPTIMIZATION_NONE is not set
+# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE is not set
+CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
+# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set
+# CONFIG_COMPILER_CXX_EXCEPTIONS is not set
+# CONFIG_COMPILER_CXX_RTTI is not set
+CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y
+# CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set
+# CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set
+# CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set
+# CONFIG_COMPILER_WARN_WRITE_STRINGS is not set
+# CONFIG_COMPILER_DISABLE_GCC8_WARNINGS is not set
+# end of Compiler options
+
+#
+# Component config
+#
+
+#
+# Application Level Tracing
+#
+# CONFIG_APPTRACE_DEST_TRAX is not set
+CONFIG_APPTRACE_DEST_NONE=y
+CONFIG_APPTRACE_LOCK_ENABLE=y
+# end of Application Level Tracing
+
+#
+# Driver configurations
+#
+
+#
+# ADC configuration
+#
+# CONFIG_ADC_FORCE_XPD_FSM is not set
+CONFIG_ADC_DISABLE_DAC=y
+# end of ADC configuration
+
+#
+# SPI configuration
+#
+# CONFIG_SPI_MASTER_IN_IRAM is not set
+CONFIG_SPI_MASTER_ISR_IN_IRAM=y
+# CONFIG_SPI_SLAVE_IN_IRAM is not set
+CONFIG_SPI_SLAVE_ISR_IN_IRAM=y
+# end of SPI configuration
+
+#
+# UART configuration
+#
+# CONFIG_UART_ISR_IN_IRAM is not set
+# end of UART configuration
+# end of Driver configurations
+
+#
+# eFuse Bit Manager
+#
+# CONFIG_EFUSE_CUSTOM_TABLE is not set
+# CONFIG_EFUSE_VIRTUAL is not set
+CONFIG_EFUSE_MAX_BLK_LEN=256
+# end of eFuse Bit Manager
+
+#
+# ESP32S2-specific
+#
+# CONFIG_ESP32S2_DEFAULT_CPU_FREQ_80 is not set
+CONFIG_ESP32S2_DEFAULT_CPU_FREQ_160=y
+# CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240 is not set
+CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ=160
+
+#
+# Memory protection
+#
+# CONFIG_ESP32S2_MEMPROT_FEATURE is not set
+# end of Memory protection
+
+#
+# Cache config
+#
+# CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB is not set
+CONFIG_ESP32S2_INSTRUCTION_CACHE_16KB=y
+# CONFIG_ESP32S2_INSTRUCTION_CACHE_LINE_16B is not set
+CONFIG_ESP32S2_INSTRUCTION_CACHE_LINE_32B=y
+# CONFIG_ESP32S2_DATA_CACHE_0KB is not set
+# CONFIG_ESP32S2_DATA_CACHE_8KB is not set
+CONFIG_ESP32S2_DATA_CACHE_16KB=y
+# CONFIG_ESP32S2_DATA_CACHE_LINE_16B is not set
+CONFIG_ESP32S2_DATA_CACHE_LINE_32B=y
+# CONFIG_ESP32S2_INSTRUCTION_CACHE_WRAP is not set
+# CONFIG_ESP32S2_DATA_CACHE_WRAP is not set
+# end of Cache config
+
+# CONFIG_ESP32S2_SPIRAM_SUPPORT is not set
+# CONFIG_ESP32S2_TRAX is not set
+CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM=0x0
+# CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE is not set
+CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO=y
+CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES=2
+# CONFIG_ESP32S2_ULP_COPROC_ENABLED is not set
+CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM=0
+CONFIG_ESP32S2_DEBUG_OCDAWARE=y
+# CONFIG_ESP32S2_DEBUG_STUBS_ENABLE is not set
+CONFIG_ESP32S2_BROWNOUT_DET=y
+CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_7=y
+# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_6 is not set
+# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_5 is not set
+# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_4 is not set
+# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_3 is not set
+# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_2 is not set
+# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_1 is not set
+CONFIG_ESP32S2_BROWNOUT_DET_LVL=7
+CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC_FRC1=y
+# CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC is not set
+# CONFIG_ESP32S2_TIME_SYSCALL_USE_FRC1 is not set
+# CONFIG_ESP32S2_TIME_SYSCALL_USE_NONE is not set
+CONFIG_ESP32S2_RTC_CLK_SRC_INT_RC=y
+# CONFIG_ESP32S2_RTC_CLK_SRC_EXT_CRYS is not set
+# CONFIG_ESP32S2_RTC_CLK_SRC_EXT_OSC is not set
+# CONFIG_ESP32S2_RTC_CLK_SRC_INT_8MD256 is not set
+CONFIG_ESP32S2_RTC_CLK_CAL_CYCLES=576
+# CONFIG_ESP32S2_NO_BLOBS is not set
+# end of ESP32S2-specific
+
+#
+# Power Management
+#
+# CONFIG_PM_ENABLE is not set
+# end of Power Management
+
+#
+# Common ESP-related
+#
+CONFIG_ESP_ERR_TO_NAME_LOOKUP=y
+CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32
+CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304
+CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584
+CONFIG_ESP_IPC_TASK_STACK_SIZE=1024
+CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048
+CONFIG_ESP_CONSOLE_UART_DEFAULT=y
+# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set
+# CONFIG_ESP_CONSOLE_UART_NONE is not set
+CONFIG_ESP_CONSOLE_UART_NUM=0
+CONFIG_ESP_CONSOLE_UART_TX_GPIO=1
+CONFIG_ESP_CONSOLE_UART_RX_GPIO=3
+CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
+CONFIG_ESP_INT_WDT=y
+CONFIG_ESP_INT_WDT_TIMEOUT_MS=300
+CONFIG_ESP_TASK_WDT=y
+# CONFIG_ESP_TASK_WDT_PANIC is not set
+CONFIG_ESP_TASK_WDT_TIMEOUT_S=5
+CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
+CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y
+CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y
+# end of Common ESP-related
+
+#
+# Ethernet
+#
+CONFIG_ETH_ENABLED=y
+CONFIG_ETH_USE_SPI_ETHERNET=y
+# CONFIG_ETH_SPI_ETHERNET_DM9051 is not set
+# CONFIG_ETH_USE_OPENETH is not set
+# end of Ethernet
+
+#
+# Event Loop Library
+#
+# CONFIG_ESP_EVENT_LOOP_PROFILING is not set
+CONFIG_ESP_EVENT_POST_FROM_ISR=y
+CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y
+# end of Event Loop Library
+
+#
+# ESP NETIF Adapter
+#
+CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120
+CONFIG_ESP_NETIF_TCPIP_LWIP=y
+# CONFIG_ESP_NETIF_LOOPBACK is not set
+CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER=y
+# end of ESP NETIF Adapter
+
+#
+# ESP System Settings
+#
+CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
+# CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT is not set
+# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
+# CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set
+# end of ESP System Settings
+
+#
+# High resolution timer (esp_timer)
+#
+# CONFIG_ESP_TIMER_PROFILING is not set
+CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584
+CONFIG_ESP_TIMER_IMPL_SYSTIMER=y
+# end of High resolution timer (esp_timer)
+
+#
+# Wi-Fi
+#
+CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10
+CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32
+# CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set
+CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y
+CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1
+CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32
+# CONFIG_ESP32_WIFI_CSI_ENABLED is not set
+CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y
+CONFIG_ESP32_WIFI_TX_BA_WIN=6
+CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y
+CONFIG_ESP32_WIFI_RX_BA_WIN=6
+CONFIG_ESP32_WIFI_NVS_ENABLED=y
+CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752
+CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32
+# CONFIG_ESP32_WIFI_DEBUG_LOG_ENABLE is not set
+CONFIG_ESP32_WIFI_IRAM_OPT=y
+CONFIG_ESP32_WIFI_RX_IRAM_OPT=y
+# CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set
+# end of Wi-Fi
+
+#
+# PHY
+#
+# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set
+CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20
+CONFIG_ESP32_PHY_MAX_TX_POWER=20
+# end of PHY
+
+#
+# Core dump
+#
+# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set
+# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set
+CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y
+# end of Core dump
+
+#
+# FreeRTOS
+#
+CONFIG_FREERTOS_UNICORE=y
+CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF
+CONFIG_FREERTOS_CORETIMER_0=y
+# CONFIG_FREERTOS_CORETIMER_1 is not set
+CONFIG_FREERTOS_OPTIMIZED_SCHEDULER=y
+CONFIG_FREERTOS_HZ=100
+CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y
+# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set
+# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set
+CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y
+# CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set
+CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y
+CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1
+CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y
+# CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE is not set
+# CONFIG_FREERTOS_ASSERT_DISABLE is not set
+CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536
+CONFIG_FREERTOS_ISR_STACKSIZE=1536
+# CONFIG_FREERTOS_LEGACY_HOOKS is not set
+CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16
+CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y
+# CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set
+CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1
+CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048
+CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10
+CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0
+# CONFIG_FREERTOS_USE_TRACE_FACILITY is not set
+# CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set
+CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER=y
+CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y
+# CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set
+CONFIG_FREERTOS_DEBUG_OCDAWARE=y
+# end of FreeRTOS
+
+#
+# Heap memory debugging
+#
+CONFIG_HEAP_POISONING_DISABLED=y
+# CONFIG_HEAP_POISONING_LIGHT is not set
+# CONFIG_HEAP_POISONING_COMPREHENSIVE is not set
+CONFIG_HEAP_TRACING_OFF=y
+# CONFIG_HEAP_TRACING_STANDALONE is not set
+# CONFIG_HEAP_TRACING_TOHOST is not set
+# CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set
+# end of Heap memory debugging
+
+#
+# Log output
+#
+# CONFIG_LOG_DEFAULT_LEVEL_NONE is not set
+# CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set
+# CONFIG_LOG_DEFAULT_LEVEL_WARN is not set
+CONFIG_LOG_DEFAULT_LEVEL_INFO=y
+# CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set
+# CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set
+CONFIG_LOG_DEFAULT_LEVEL=3
+CONFIG_LOG_COLORS=y
+CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y
+# CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set
+# end of Log output
+
+#
+# LWIP
+#
+CONFIG_LWIP_LOCAL_HOSTNAME="espressif"
+CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y
+# CONFIG_LWIP_L2_TO_L3_COPY is not set
+# CONFIG_LWIP_IRAM_OPTIMIZATION is not set
+CONFIG_LWIP_TIMERS_ONDEMAND=y
+CONFIG_LWIP_MAX_SOCKETS=10
+# CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set
+CONFIG_LWIP_SO_REUSE=y
+CONFIG_LWIP_SO_REUSE_RXTOALL=y
+# CONFIG_LWIP_SO_RCVBUF is not set
+# CONFIG_LWIP_NETBUF_RECVINFO is not set
+CONFIG_LWIP_IP_FRAG=y
+# CONFIG_LWIP_IP_REASSEMBLY is not set
+# CONFIG_LWIP_IP_FORWARD is not set
+# CONFIG_LWIP_STATS is not set
+# CONFIG_LWIP_ETHARP_TRUST_IP_MAC is not set
+CONFIG_LWIP_ESP_GRATUITOUS_ARP=y
+CONFIG_LWIP_GARP_TMR_INTERVAL=60
+CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32
+CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y
+# CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set
+
+#
+# DHCP server
+#
+CONFIG_LWIP_DHCPS_LEASE_UNIT=60
+CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8
+# end of DHCP server
+
+# CONFIG_LWIP_AUTOIP is not set
+# CONFIG_LWIP_IPV6_AUTOCONFIG is not set
+CONFIG_LWIP_NETIF_LOOPBACK=y
+CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8
+
+#
+# TCP
+#
+CONFIG_LWIP_MAX_ACTIVE_TCP=16
+CONFIG_LWIP_MAX_LISTENING_TCP=16
+CONFIG_LWIP_TCP_MAXRTX=12
+CONFIG_LWIP_TCP_SYNMAXRTX=6
+CONFIG_LWIP_TCP_MSS=1440
+CONFIG_LWIP_TCP_TMR_INTERVAL=250
+CONFIG_LWIP_TCP_MSL=60000
+CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744
+CONFIG_LWIP_TCP_WND_DEFAULT=5744
+CONFIG_LWIP_TCP_RECVMBOX_SIZE=6
+CONFIG_LWIP_TCP_QUEUE_OOSEQ=y
+# CONFIG_LWIP_TCP_SACK_OUT is not set
+# CONFIG_LWIP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set
+CONFIG_LWIP_TCP_OVERSIZE_MSS=y
+# CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set
+# CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set
+# end of TCP
+
+#
+# UDP
+#
+CONFIG_LWIP_MAX_UDP_PCBS=16
+CONFIG_LWIP_UDP_RECVMBOX_SIZE=6
+# end of UDP
+
+CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072
+CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y
+# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set
+CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF
+# CONFIG_LWIP_PPP_SUPPORT is not set
+
+#
+# ICMP
+#
+# CONFIG_LWIP_MULTICAST_PING is not set
+# CONFIG_LWIP_BROADCAST_PING is not set
+# end of ICMP
+
+#
+# LWIP RAW API
+#
+CONFIG_LWIP_MAX_RAW_PCBS=16
+# end of LWIP RAW API
+
+#
+# SNTP
+#
+CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1
+CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000
+# end of SNTP
+
+CONFIG_LWIP_ESP_LWIP_ASSERT=y
+# end of LWIP
+
+#
+# mbedTLS
+#
+CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y
+# CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set
+# CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set
+CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y
+CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384
+CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096
+# CONFIG_MBEDTLS_DEBUG is not set
+
+#
+# Certificate Bundle
+#
+CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y
+CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y
+# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set
+# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set
+# CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set
+# end of Certificate Bundle
+
+# CONFIG_MBEDTLS_ECP_RESTARTABLE is not set
+# CONFIG_MBEDTLS_CMAC_C is not set
+CONFIG_MBEDTLS_HARDWARE_AES=y
+CONFIG_MBEDTLS_AES_USE_INTERRUPT=y
+CONFIG_MBEDTLS_HARDWARE_GCM=y
+CONFIG_MBEDTLS_HARDWARE_MPI=y
+CONFIG_MBEDTLS_HARDWARE_SHA=y
+CONFIG_MBEDTLS_HAVE_TIME=y
+# CONFIG_MBEDTLS_HAVE_TIME_DATE is not set
+CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y
+# CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set
+# CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set
+# CONFIG_MBEDTLS_TLS_DISABLED is not set
+CONFIG_MBEDTLS_TLS_SERVER=y
+CONFIG_MBEDTLS_TLS_CLIENT=y
+CONFIG_MBEDTLS_TLS_ENABLED=y
+
+#
+# TLS Key Exchange Methods
+#
+CONFIG_MBEDTLS_PSK_MODES=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_PSK=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y
+CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y
+# end of TLS Key Exchange Methods
+
+CONFIG_MBEDTLS_SSL_RENEGOTIATION=y
+# CONFIG_MBEDTLS_SSL_PROTO_SSL3 is not set
+CONFIG_MBEDTLS_SSL_PROTO_TLS1=y
+CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y
+CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y
+CONFIG_MBEDTLS_SSL_PROTO_DTLS=y
+CONFIG_MBEDTLS_SSL_ALPN=y
+CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y
+CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y
+
+#
+# Symmetric Ciphers
+#
+CONFIG_MBEDTLS_AES_C=y
+# CONFIG_MBEDTLS_CAMELLIA_C is not set
+# CONFIG_MBEDTLS_DES_C is not set
+CONFIG_MBEDTLS_RC4_DISABLED=y
+# CONFIG_MBEDTLS_RC4_ENABLED_NO_DEFAULT is not set
+# CONFIG_MBEDTLS_RC4_ENABLED is not set
+# CONFIG_MBEDTLS_BLOWFISH_C is not set
+# CONFIG_MBEDTLS_XTEA_C is not set
+CONFIG_MBEDTLS_CCM_C=y
+CONFIG_MBEDTLS_GCM_C=y
+# end of Symmetric Ciphers
+
+# CONFIG_MBEDTLS_RIPEMD160_C is not set
+
+#
+# Certificates
+#
+CONFIG_MBEDTLS_PEM_PARSE_C=y
+CONFIG_MBEDTLS_PEM_WRITE_C=y
+CONFIG_MBEDTLS_X509_CRL_PARSE_C=y
+CONFIG_MBEDTLS_X509_CSR_PARSE_C=y
+# end of Certificates
+
+CONFIG_MBEDTLS_ECP_C=y
+CONFIG_MBEDTLS_ECDH_C=y
+CONFIG_MBEDTLS_ECDSA_C=y
+# CONFIG_MBEDTLS_ECJPAKE_C is not set
+CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y
+CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y
+CONFIG_MBEDTLS_ECP_NIST_OPTIM=y
+# CONFIG_MBEDTLS_SECURITY_RISKS is not set
+# end of mbedTLS
+
+#
+# Newlib
+#
+CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y
+# CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set
+# CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set
+# CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set
+# CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set
+CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y
+# CONFIG_NEWLIB_NANO_FORMAT is not set
+# end of Newlib
+
+#
+# NVS
+#
+# end of NVS
+
+#
+# PThreads
+#
+CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5
+CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072
+CONFIG_PTHREAD_STACK_MIN=768
+CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1
+CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
+# end of PThreads
+
+#
+# SPI Flash driver
+#
+# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
+# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
+CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
+CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
+# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set
+# CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set
+# CONFIG_SPI_FLASH_USE_LEGACY_IMPL is not set
+# CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set
+CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y
+CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20
+CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1
+
+#
+# Auto-detect flash chips
+#
+CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y
+CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y
+CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y
+# end of Auto-detect flash chips
+# end of SPI Flash driver
+
+#
+# Virtual file system
+#
+CONFIG_VFS_SUPPORT_IO=y
+CONFIG_VFS_SUPPORT_DIR=y
+CONFIG_VFS_SUPPORT_SELECT=y
+CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y
+CONFIG_VFS_SUPPORT_TERMIOS=y
+
+#
+# Host File System I/O (Semihosting)
+#
+CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1
+CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN=128
+# end of Host File System I/O (Semihosting)
+# end of Virtual file system
+
+#
+# Supplicant
+#
+CONFIG_WPA_MBEDTLS_CRYPTO=y
+# CONFIG_WPA_DEBUG_PRINT is not set
+# CONFIG_WPA_TESTING_OPTIONS is not set
+# CONFIG_WPA_TLS_V12 is not set
+# end of Supplicant
+# end of Component config
+
+#
+# Compatibility options
+#
+# CONFIG_LEGACY_INCLUDE_COMMON_HEADERS is not set
+# end of Compatibility options
+
+# Deprecated options for backward compatibility
+CONFIG_TOOLPREFIX="xtensa-esp32s2-elf-"
+# CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set
+# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set
+# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set
+CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y
+# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set
+# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set
+CONFIG_LOG_BOOTLOADER_LEVEL=3
+# CONFIG_APP_ROLLBACK_ENABLE is not set
+# CONFIG_FLASH_ENCRYPTION_ENABLED is not set
+# CONFIG_FLASHMODE_QIO is not set
+# CONFIG_FLASHMODE_QOUT is not set
+CONFIG_FLASHMODE_DIO=y
+# CONFIG_FLASHMODE_DOUT is not set
+# CONFIG_MONITOR_BAUD_9600B is not set
+# CONFIG_MONITOR_BAUD_57600B is not set
+CONFIG_MONITOR_BAUD_115200B=y
+# CONFIG_MONITOR_BAUD_230400B is not set
+# CONFIG_MONITOR_BAUD_921600B is not set
+# CONFIG_MONITOR_BAUD_2MB is not set
+# CONFIG_MONITOR_BAUD_OTHER is not set
+CONFIG_MONITOR_BAUD_OTHER_VAL=115200
+CONFIG_MONITOR_BAUD=115200
+CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG=y
+# CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE is not set
+# CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED is not set
+CONFIG_OPTIMIZATION_ASSERTIONS_SILENT=y
+# CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set
+# CONFIG_CXX_EXCEPTIONS is not set
+CONFIG_STACK_CHECK_NONE=y
+# CONFIG_STACK_CHECK_NORM is not set
+# CONFIG_STACK_CHECK_STRONG is not set
+# CONFIG_STACK_CHECK_ALL is not set
+# CONFIG_WARN_WRITE_STRINGS is not set
+# CONFIG_DISABLE_GCC8_WARNINGS is not set
+# CONFIG_ESP32_APPTRACE_DEST_TRAX is not set
+CONFIG_ESP32_APPTRACE_DEST_NONE=y
+CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y
+CONFIG_ADC2_DISABLE_DAC=y
+CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32
+CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304
+CONFIG_MAIN_TASK_STACK_SIZE=3584
+CONFIG_IPC_TASK_STACK_SIZE=1024
+CONFIG_CONSOLE_UART_DEFAULT=y
+# CONFIG_CONSOLE_UART_CUSTOM is not set
+# CONFIG_CONSOLE_UART_NONE is not set
+CONFIG_CONSOLE_UART_NUM=0
+CONFIG_CONSOLE_UART_TX_GPIO=1
+CONFIG_CONSOLE_UART_RX_GPIO=3
+CONFIG_CONSOLE_UART_BAUDRATE=115200
+CONFIG_INT_WDT=y
+CONFIG_INT_WDT_TIMEOUT_MS=300
+CONFIG_TASK_WDT=y
+# CONFIG_TASK_WDT_PANIC is not set
+CONFIG_TASK_WDT_TIMEOUT_S=5
+CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
+# CONFIG_EVENT_LOOP_PROFILING is not set
+CONFIG_POST_EVENTS_FROM_ISR=y
+CONFIG_POST_EVENTS_FROM_IRAM_ISR=y
+CONFIG_ESP32S2_PANIC_PRINT_HALT=y
+# CONFIG_ESP32S2_PANIC_PRINT_REBOOT is not set
+# CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set
+# CONFIG_ESP32S2_PANIC_GDBSTUB is not set
+CONFIG_TIMER_TASK_STACK_SIZE=3584
+CONFIG_SUPPORT_STATIC_ALLOCATION=y
+# CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set
+CONFIG_TIMER_TASK_PRIORITY=1
+CONFIG_TIMER_TASK_STACK_DEPTH=2048
+CONFIG_TIMER_QUEUE_LENGTH=10
+# CONFIG_L2_TO_L3_COPY is not set
+# CONFIG_USE_ONLY_LWIP_SELECT is not set
+CONFIG_ESP_GRATUITOUS_ARP=y
+CONFIG_GARP_TMR_INTERVAL=60
+CONFIG_TCPIP_RECVMBOX_SIZE=32
+CONFIG_TCP_MAXRTX=12
+CONFIG_TCP_SYNMAXRTX=6
+CONFIG_TCP_MSS=1440
+CONFIG_TCP_MSL=60000
+CONFIG_TCP_SND_BUF_DEFAULT=5744
+CONFIG_TCP_WND_DEFAULT=5744
+CONFIG_TCP_RECVMBOX_SIZE=6
+CONFIG_TCP_QUEUE_OOSEQ=y
+# CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set
+CONFIG_TCP_OVERSIZE_MSS=y
+# CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set
+# CONFIG_TCP_OVERSIZE_DISABLE is not set
+CONFIG_UDP_RECVMBOX_SIZE=6
+CONFIG_TCPIP_TASK_STACK_SIZE=3072
+CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y
+# CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set
+CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF
+# CONFIG_PPP_SUPPORT is not set
+CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5
+CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072
+CONFIG_ESP32_PTHREAD_STACK_MIN=768
+CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1
+CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread"
+CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y
+# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set
+# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set
+CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y
+CONFIG_SUPPORT_TERMIOS=y
+CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1
+CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN=128
+# End of deprecated options
diff --git a/ports/esp32s2/supervisor/internal_flash.c b/ports/esp32s2/supervisor/internal_flash.c
new file mode 100644
index 000000000..aab7e587a
--- /dev/null
+++ b/ports/esp32s2/supervisor/internal_flash.c
@@ -0,0 +1,122 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2013, 2014 Damien P. George
+ * Copyright (c) 2019 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "supervisor/internal_flash.h"
+
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+
+#include "extmod/vfs.h"
+#include "extmod/vfs_fat.h"
+#include "py/mphal.h"
+#include "py/obj.h"
+#include "py/runtime.h"
+#include "lib/oofatfs/ff.h"
+
+#include "esp-idf/components/spi_flash/include/esp_partition.h"
+
+#include "esp_log.h"
+
+
+static const char* TAG = "CircuitPython Internal Flash";
+
+#include "supervisor/usb.h"
+
+STATIC const esp_partition_t * _partition;
+
+void supervisor_flash_init(void) {
+    _partition = esp_partition_find_first(ESP_PARTITION_TYPE_DATA,
+                                          ESP_PARTITION_SUBTYPE_DATA_FAT,
+                                          NULL);
+
+    ESP_EARLY_LOGW(TAG, "fatfs partition %p", _partition);
+}
+
+uint32_t supervisor_flash_get_block_size(void) {
+    return FILESYSTEM_BLOCK_SIZE;
+}
+
+uint32_t supervisor_flash_get_block_count(void) {
+    return _partition->size / FILESYSTEM_BLOCK_SIZE;
+}
+
+void port_internal_flash_flush(void) {
+
+}
+
+// TODO: Split the caching out of supervisor/shared/external_flash so we can use it.
+#define SECTOR_SIZE 4096
+STATIC uint8_t _cache[SECTOR_SIZE];
+STATIC uint32_t _cache_lba;
+
+mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) {
+    esp_err_t ok = esp_partition_read(_partition,
+                                      block * FILESYSTEM_BLOCK_SIZE,
+                                      dest,
+                                      num_blocks * FILESYSTEM_BLOCK_SIZE);
+    ESP_EARLY_LOGW(TAG, "read %d", ok);
+    return 0;
+}
+
+mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32_t num_blocks) {
+    uint32_t blocks_per_sector = SECTOR_SIZE / FILESYSTEM_BLOCK_SIZE;
+    uint32_t block = 0;
+    while (block < num_blocks) {
+        uint32_t block_address = lba + block;
+        uint32_t sector_offset = block_address / blocks_per_sector * SECTOR_SIZE;
+        uint8_t block_offset = block_address % blocks_per_sector;
+
+        esp_err_t result;
+        if (_cache_lba != block_address) {
+            result = esp_partition_read(_partition,
+                                        sector_offset,
+                                        _cache,
+                                        SECTOR_SIZE);
+            ESP_EARLY_LOGW(TAG, "flash read before write %d", result);
+            _cache_lba = sector_offset;
+        }
+        for (uint8_t b = block_offset; b < blocks_per_sector; b++) {
+            memcpy(_cache + b * FILESYSTEM_BLOCK_SIZE,
+                   src + block * FILESYSTEM_BLOCK_SIZE,
+                   FILESYSTEM_BLOCK_SIZE);
+            block++;
+        }
+        result = esp_partition_erase_range(_partition, sector_offset, SECTOR_SIZE);
+        ESP_EARLY_LOGW(TAG, "erase %d", result);
+        result = esp_partition_write(_partition,
+                                     sector_offset,
+                                     _cache,
+                                     SECTOR_SIZE);
+        ESP_EARLY_LOGW(TAG, "write %d", result);
+    }
+
+    return 0; // success
+}
+
+void supervisor_flash_release_cache(void) {
+}
+
diff --git a/ports/esp32s2/supervisor/internal_flash.h b/ports/esp32s2/supervisor/internal_flash.h
new file mode 100644
index 000000000..e06ef2d16
--- /dev/null
+++ b/ports/esp32s2/supervisor/internal_flash.h
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2013, 2014 Damien P. George
+ * Copyright (c) 2019 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_ESP32S2_INTERNAL_FLASH_H
+#define MICROPY_INCLUDED_ESP32S2_INTERNAL_FLASH_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "py/mpconfig.h"
+
+#define INTERNAL_FLASH_SYSTICK_MASK     (0x1ff) // 512ms
+#define INTERNAL_FLASH_IDLE_TICK(tick)  (((tick) & INTERNAL_FLASH_SYSTICK_MASK) == 2)
+
+#endif  // MICROPY_INCLUDED_ESP32S2_INTERNAL_FLASH_H
diff --git a/ports/esp32s2/supervisor/internal_flash_root_pointers.h b/ports/esp32s2/supervisor/internal_flash_root_pointers.h
new file mode 100644
index 000000000..ae3e45e14
--- /dev/null
+++ b/ports/esp32s2/supervisor/internal_flash_root_pointers.h
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#ifndef MICROPY_INCLUDED_LITEX_INTERNAL_FLASH_ROOT_POINTERS_H
+#define MICROPY_INCLUDED_LITEX_INTERNAL_FLASH_ROOT_POINTERS_H
+
+#define FLASH_ROOT_POINTERS
+
+#endif  // MICROPY_INCLUDED_LITEX_INTERNAL_FLASH_ROOT_POINTERS_H
diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c
new file mode 100644
index 000000000..4389bb6a8
--- /dev/null
+++ b/ports/esp32s2/supervisor/port.c
@@ -0,0 +1,162 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ * Copyright (c) 2019 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+#include <sys/time.h>
+#include "supervisor/port.h"
+#include "boards/board.h"
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+
+#include "supervisor/memory.h"
+#include "supervisor/shared/tick.h"
+
+#include "esp_log.h"
+
+static const char* TAG = "CircuitPython";
+
+STATIC esp_timer_handle_t _tick_timer;
+
+void tick_timer_cb(void* arg) {
+    supervisor_tick();
+}
+
+safe_mode_t port_init(void) {
+    esp_timer_create_args_t args;
+    args.callback = &tick_timer_cb;
+    args.arg = NULL;
+    args.dispatch_method = ESP_TIMER_TASK;
+    args.name = "CircuitPython Tick";
+    esp_err_t result = esp_timer_create(&args, &_tick_timer);
+    if (result != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Unable to create tick timer.");
+    }
+    ESP_EARLY_LOGW(TAG, "port init done");
+    return NO_SAFE_MODE;
+}
+
+void reset_port(void) {
+
+}
+
+void reset_to_bootloader(void) {
+}
+
+void reset_cpu(void) {
+}
+
+uint32_t heap[64 / sizeof(uint32_t) * 1024];
+
+uint32_t *port_heap_get_bottom(void) {
+    return heap;
+}
+
+uint32_t *port_heap_get_top(void) {
+    return heap + sizeof(heap) / sizeof(heap[0]);
+}
+
+uint32_t *port_stack_get_limit(void) {
+    #pragma GCC diagnostic push
+    #pragma GCC diagnostic ignored "-Wcast-align"
+    return (uint32_t*) pxTaskGetStackStart(NULL);
+    #pragma GCC diagnostic pop
+}
+
+uint32_t *port_stack_get_top(void) {
+    return port_stack_get_limit() + CONFIG_ESP_MAIN_TASK_STACK_SIZE / (sizeof(uint32_t) / sizeof(StackType_t));
+}
+
+supervisor_allocation _fixed_stack;
+
+supervisor_allocation* port_fixed_stack(void) {
+
+    ESP_EARLY_LOGW(TAG, "port fixed stack");
+    _fixed_stack.ptr = port_stack_get_limit();
+    ESP_EARLY_LOGW(TAG, "got limit %p", _fixed_stack.ptr);
+    _fixed_stack.length = (port_stack_get_top() - port_stack_get_limit()) * sizeof(uint32_t);
+    ESP_EARLY_LOGW(TAG, "got length %d", _fixed_stack.length);
+    return &_fixed_stack;
+}
+
+// Place the word to save just after our BSS section that gets blanked.
+void port_set_saved_word(uint32_t value) {
+}
+
+uint32_t port_get_saved_word(void) {
+    return 0;
+}
+
+uint64_t port_get_raw_ticks(uint8_t* subticks) {
+    struct timeval tv_now;
+    gettimeofday(&tv_now, NULL);
+    uint64_t all_subticks = (uint64_t)tv_now.tv_usec / 32768;
+    if (subticks != NULL) {
+        *subticks = all_subticks % 32;
+    }
+    return (uint64_t)tv_now.tv_sec * 1024L + all_subticks / 32;
+}
+
+// Enable 1/1024 second tick.
+void port_enable_tick(void) {
+    esp_err_t result = esp_timer_start_periodic(_tick_timer, 1000000 / 1024);
+    if (result != ESP_OK) {
+        ESP_EARLY_LOGE(TAG, "Unable to start tick timer.");
+    }
+}
+
+// Disable 1/1024 second tick.
+void port_disable_tick(void) {
+    esp_timer_stop(_tick_timer);
+}
+
+TickType_t sleep_time_set;
+TickType_t sleep_time_duration;
+void port_interrupt_after_ticks(uint32_t ticks) {
+    // ESP_EARLY_LOGW(TAG, "after ticks");
+    sleep_time_set = xTaskGetTickCount();
+    sleep_time_duration = ticks / portTICK_PERIOD_MS;
+    // esp_sleep_enable_timer_wakeup(uint64_t time_in_us)
+}
+
+void port_sleep_until_interrupt(void) {
+    // ESP_EARLY_LOGW(TAG, "sleep until");
+    // FreeRTOS delay here maybe.
+    // Light sleep shuts down BLE and wifi.
+    // esp_light_sleep_start()
+    vTaskDelayUntil(&sleep_time_set, sleep_time_duration);
+}
+
+
+// Wrap main in app_main that the IDF expects.
+extern void main(void);
+void app_main(void) {
+    ESP_EARLY_LOGW(TAG, "Hello from CircuitPython");
+    // ESP_LOGW(TAG, "Hello from CircuitPython");
+
+    main();
+}
diff --git a/ports/esp32s2/supervisor/usb.c b/ports/esp32s2/supervisor/usb.c
new file mode 100644
index 000000000..7a24a90cb
--- /dev/null
+++ b/ports/esp32s2/supervisor/usb.c
@@ -0,0 +1,80 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 hathach for Adafruit Industries
+ * Copyright (c) 2019 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "supervisor/usb.h"
+#include "lib/utils/interrupt_char.h"
+#include "lib/mp-readline/readline.h"
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+
+#include "hal/usb_hal.h"
+
+#include "tusb.h"
+
+#ifdef CFG_TUSB_DEBUG
+  #define USBD_STACK_SIZE     (3*configMINIMAL_STACK_SIZE)
+#else
+  #define USBD_STACK_SIZE     (3*configMINIMAL_STACK_SIZE/2)
+#endif
+
+StackType_t  usb_device_stack[USBD_STACK_SIZE];
+StaticTask_t usb_device_taskdef;
+
+// USB Device Driver task
+// This top level thread process all usb events and invoke callbacks
+void usb_device_task(void* param)
+{
+  (void) param;
+
+  // RTOS forever loop
+  while (1)
+  {
+    // tinyusb device task
+    if (tusb_inited()) {
+        tud_task();
+        tud_cdc_write_flush();
+    }
+    vTaskDelay(10);
+  }
+}
+
+void init_usb_hardware(void) {
+    usb_hal_context_t hal = {
+        .use_external_phy = false // use built-in PHY
+    };
+    usb_hal_init(&hal);
+
+    (void) xTaskCreateStatic(usb_device_task,
+                             "usbd",
+                             USBD_STACK_SIZE,
+                             NULL,
+                             configMAX_PRIORITIES-1,
+                             usb_device_stack,
+                             &usb_device_taskdef);
+}
+
diff --git a/ports/litex/supervisor/port.c b/ports/litex/supervisor/port.c
index 2297b15b1..4721d82fa 100644
--- a/ports/litex/supervisor/port.c
+++ b/ports/litex/supervisor/port.c
@@ -91,6 +91,10 @@ void reset_to_bootloader(void) {
 void reset_cpu(void) {
 }
 
+supervisor_allocation* port_fixed_stack(void) {
+    return NULL;
+}
+
 uint32_t *port_heap_get_bottom(void) {
     return port_stack_get_limit();
 }
diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h
index 6ea413216..3e5affda9 100644
--- a/py/circuitpy_mpconfig.h
+++ b/py/circuitpy_mpconfig.h
@@ -216,6 +216,10 @@ typedef long mp_off_t;
 #define MP_SSIZE_MAX (0x7fffffff)
 #endif
 
+#ifndef MICROPY_PY_REVERSE_SPECIAL_METHODS
+#define MICROPY_PY_REVERSE_SPECIAL_METHODS    (CIRCUITPY_FULL_BUILD)
+#endif
+
 #if INTERNAL_FLASH_FILESYSTEM == 0 && QSPI_FLASH_FILESYSTEM == 0 && SPI_FLASH_FILESYSTEM == 0 && !DISABLE_FILESYSTEM
 #error No *_FLASH_FILESYSTEM set!
 #endif
@@ -610,6 +614,10 @@ extern const struct _mp_obj_module_t ustack_module;
 #endif
 
 #if defined(CIRCUITPY_ULAB) && CIRCUITPY_ULAB
+// ulab requires reverse special methods
+#if defined(MICROPY_PY_REVERSE_SPECIAL_METHODS) && !MICROPY_PY_REVERSE_SPECIAL_METHODS
+#error "ulab requires MICROPY_PY_REVERSE_SPECIAL_METHODS"
+#endif
 #define ULAB_MODULE \
     { MP_ROM_QSTR(MP_QSTR_ulab), MP_ROM_PTR(&ulab_user_cmodule) },
 #else
diff --git a/supervisor/port.h b/supervisor/port.h
index ccbb314ad..8a12d34c8 100644
--- a/supervisor/port.h
+++ b/supervisor/port.h
@@ -29,6 +29,7 @@
 
 #include "py/mpconfig.h"
 
+#include "supervisor/memory.h"
 #include "supervisor/shared/safe_mode.h"
 
 // Provided by the linker;
@@ -60,6 +61,8 @@ uint32_t *port_stack_get_limit(void);
 // Get stack top address
 uint32_t *port_stack_get_top(void);
 
+supervisor_allocation* port_fixed_stack(void);
+
 // Get heap bottom address
 uint32_t *port_heap_get_bottom(void);
 
diff --git a/supervisor/shared/memory.c b/supervisor/shared/memory.c
index d52334eb4..8ae8a1699 100755
--- a/supervisor/shared/memory.c
+++ b/supervisor/shared/memory.c
@@ -129,5 +129,7 @@ supervisor_allocation* allocate_memory(uint32_t length, bool high) {
 }
 
 void supervisor_move_memory(void) {
+    #if CIRCUITPY_DISPLAYIO
     supervisor_display_move_memory();
+    #endif
 }
diff --git a/supervisor/shared/stack.c b/supervisor/shared/stack.c
index 2b7b1c03a..e7aa956b0 100755
--- a/supervisor/shared/stack.c
+++ b/supervisor/shared/stack.c
@@ -41,22 +41,24 @@ supervisor_allocation* stack_alloc = NULL;
 #define EXCEPTION_STACK_SIZE 1024
 
 void allocate_stack(void) {
-    mp_uint_t regs[10];
-    mp_uint_t sp = cpu_get_regs_and_sp(regs);
 
-    mp_uint_t c_size = (uint32_t) port_stack_get_top() - sp;
+    if (port_fixed_stack() != NULL) {
+        stack_alloc = port_fixed_stack();
+        current_stack_size = stack_alloc->length;
+    } else {
+        mp_uint_t regs[10];
+        mp_uint_t sp = cpu_get_regs_and_sp(regs);
 
-    if (port_stack_get_top() != port_heap_get_top()) {
-        return;
+        mp_uint_t c_size = (uint32_t) port_stack_get_top() - sp;
+        stack_alloc = allocate_memory(c_size + next_stack_size + EXCEPTION_STACK_SIZE, true);
+        if (stack_alloc == NULL) {
+            stack_alloc = allocate_memory(c_size + CIRCUITPY_DEFAULT_STACK_SIZE + EXCEPTION_STACK_SIZE, true);
+            current_stack_size = CIRCUITPY_DEFAULT_STACK_SIZE;
+        } else {
+            current_stack_size = next_stack_size;
+        }
     }
 
-    stack_alloc = allocate_memory(c_size + next_stack_size + EXCEPTION_STACK_SIZE, true);
-    if (stack_alloc == NULL) {
-        stack_alloc = allocate_memory(c_size + CIRCUITPY_DEFAULT_STACK_SIZE + EXCEPTION_STACK_SIZE, true);
-        current_stack_size = CIRCUITPY_DEFAULT_STACK_SIZE;
-    } else {
-        current_stack_size = next_stack_size;
-    }
     *stack_alloc->ptr = STACK_CANARY_VALUE;
 }
 
diff --git a/supervisor/shared/stack.h b/supervisor/shared/stack.h
index 1fb43be57..7096f0b3e 100755
--- a/supervisor/shared/stack.h
+++ b/supervisor/shared/stack.h
@@ -43,6 +43,8 @@ bool stack_ok(void);
 // exception when the stack has likely overwritten a portion of the heap.
 void assert_heap_ok(void);
 
+#ifndef STACK_CANARY_VALUE
 #define STACK_CANARY_VALUE 0x017829ef
+#endif
 
 #endif  // MICROPY_INCLUDED_SUPERVISOR_STACK_H
diff --git a/supervisor/shared/usb/tusb_config.h b/supervisor/shared/usb/tusb_config.h
index 1b0c83416..627de743e 100644
--- a/supervisor/shared/usb/tusb_config.h
+++ b/supervisor/shared/usb/tusb_config.h
@@ -52,7 +52,9 @@
 #define CFG_TUSB_DEBUG              0
 
 /*------------- RTOS -------------*/
+#ifndef CFG_TUSB_OS
 #define CFG_TUSB_OS                 OPT_OS_NONE
+#endif
 //#define CFG_TUD_TASK_QUEUE_SZ     16
 //#define CFG_TUD_TASK_PRIO         0
 //#define CFG_TUD_TASK_STACK_SZ     150
diff --git a/supervisor/shared/usb/usb.c b/supervisor/shared/usb/usb.c
index 774055a82..edf810118 100644
--- a/supervisor/shared/usb/usb.c
+++ b/supervisor/shared/usb/usb.c
@@ -75,7 +75,9 @@ void usb_init(void) {
 
 void usb_background(void) {
     if (usb_enabled()) {
+        #if CFG_TUSB_OS == OPT_OS_NONE
         tud_task();
+        #endif
         tud_cdc_write_flush();
     }
 }
diff --git a/supervisor/supervisor.mk b/supervisor/supervisor.mk
index d6422f074..195e4a9b2 100644
--- a/supervisor/supervisor.mk
+++ b/supervisor/supervisor.mk
@@ -3,7 +3,6 @@ SRC_SUPERVISOR = \
 	supervisor/port.c \
 	supervisor/shared/autoreload.c \
 	supervisor/shared/board.c \
-	supervisor/shared/display.c \
 	supervisor/shared/filesystem.c \
 	supervisor/shared/flash.c \
 	supervisor/shared/micropython.c \
@@ -104,6 +103,14 @@ else
 	CFLAGS += -DUSB_AVAILABLE
 endif
 
+SUPERVISOR_O = $(addprefix $(BUILD)/, $(SRC_SUPERVISOR:.c=.o))
+
+ifeq ($(CIRCUITPY_DISPLAYIO), 1)
+	SRC_SUPERVISOR += \
+		supervisor/shared/display.c
+
+	SUPERVISOR_O += $(BUILD)/autogen_display_resources.o
+endif
 ifndef USB_INTERFACE_NAME
 USB_INTERFACE_NAME = "CircuitPython"
 endif
@@ -182,8 +189,6 @@ ifeq ($(USB_RENUMBER_ENDPOINTS), 0)
 USB_DESCRIPTOR_ARGS += --no-renumber_endpoints
 endif
 
-SUPERVISOR_O = $(addprefix $(BUILD)/, $(SRC_SUPERVISOR:.c=.o)) $(BUILD)/autogen_display_resources.o
-
 $(BUILD)/supervisor/shared/translate.o: $(HEADER_BUILD)/qstrdefs.generated.h
 
 $(BUILD)/autogen_usb_descriptor.c $(BUILD)/genhdr/autogen_usb_descriptor.h: autogen_usb_descriptor.intermediate
diff --git a/tools/build_board_info.py b/tools/build_board_info.py
index 3594f2ae7..7eed2c70c 100644
--- a/tools/build_board_info.py
+++ b/tools/build_board_info.py
@@ -12,7 +12,7 @@ from sh.contrib import git
 sys.path.append("adabot")
 import adabot.github_requests as github
 
-SUPPORTED_PORTS = ["nrf", "atmel-samd", "stm", "cxd56", "mimxrt10xx", "litex"]
+SUPPORTED_PORTS = ["atmel-samd", "cxd56", "esp32s2", "litex", "mimxrt10xx", "nrf", "stm"]
 
 BIN = ('bin',)
 UF2 = ('uf2',)
@@ -35,6 +35,7 @@ extension_by_port = {
     "cxd56": SPK,
     "mimxrt10xx": HEX_UF2,
     "litex": DFU,
+    "esp32s2": BIN
 }
 
 # Per board overrides
diff --git a/tools/join_bins.py b/tools/join_bins.py
new file mode 100644
index 000000000..cb73aaabb
--- /dev/null
+++ b/tools/join_bins.py
@@ -0,0 +1,20 @@
+import sys
+
+output_filename = sys.argv[1]
+input_filenames = {}
+i = 2
+while i < len(sys.argv):
+    offset = int(sys.argv[i], 16)
+    filename = sys.argv[i + 1]
+    input_filenames[offset] = filename
+    i += 2
+
+with open(output_filename, "wb") as output_file:
+    offsets = sorted(input_filenames.keys())
+    for offset in offsets:
+        input_filename = input_filenames[offset]
+        # Fill with ones to save NOR flash.
+        while output_file.tell() < offset:
+            output_file.write(b"\xff")
+        with open(input_filename, "rb") as input_file:
+            output_file.write(input_file.read())
-- 
cgit v1.2.3