From 7b79ac37399927070e1931022f5759393202ed3d Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Sun, 20 Oct 2019 23:50:12 -0400 Subject: Parameterize linker script --- tools/gen_ld_files.py | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100755 tools/gen_ld_files.py (limited to 'tools') diff --git a/tools/gen_ld_files.py b/tools/gen_ld_files.py new file mode 100755 index 000000000..fc80d46c9 --- /dev/null +++ b/tools/gen_ld_files.py @@ -0,0 +1,47 @@ +#! /usr/bin/env python3 +import argparse + +import os +import os.path +import sys +import re +from string import Template + +parser = argparse.ArgumentParser(description='Apply #define values to .template.ld file.') +parser.add_argument('template_files', metavar='TEMPLATE_FILE', type=argparse.FileType('r'), + nargs='+', help="template filename: .template.ld") +parser.add_argument('--defines', type=argparse.FileType('r'), required=True) +parser.add_argument('--out_dir', required=True) + +args = parser.parse_args() + +defines = {} + +# We're looking for lines like this: +# ///DEFINE_VALUE NAME_OF_VALUE +VALUE_LINE_RE = re.compile(r'^([^/].*); ///DEFINE_VALUE (\w+)(.*)$') + +for line in args.defines: + match = VALUE_LINE_RE.match(line.strip()) + if match: + value = match.group(1).strip() + name = match.group(2) + lambda_exp = match.group(3).strip() + # Apply the given lambda to the value if it is present, else just store the value. + defines[match.group(2)] = eval(lambda_exp)(value) if lambda_exp else value + +#print(defines) +fail = False + +for template_file in args.template_files: + ld_template_basename = os.path.basename(template_file.name) + ld_pathname = os.path.join(args.out_dir, ld_template_basename.replace('.template.ld', '.ld')) + with open(ld_pathname, 'w') as output: + try: + output.write(Template(template_file.read()).substitute(defines)) + except KeyError as e: + print("ERROR: {}: No #define for '{}'".format(ld_pathname, e.args[0]), file=sys.stderr) + fail = True + +if fail: + sys.exit(1) -- cgit v1.2.3 From 67ff1c92f0d1d6a93c5f1fdf6d5e07c66d39df0a Mon Sep 17 00:00:00 2001 From: Thea Flowers Date: Tue, 12 Nov 2019 13:29:35 -0800 Subject: Allow boards to change the "CircuitPython" text in their USB interface description. In cases where more than one board is connected to a single computer it can become pretty hard to figure out which board you're actually talking to. For example, if you have several MIDI-compatible boards they all show up as "CircuitPython MIDI". This change allows boards to replace the "CircuitPython" part of their USB descriptors with more specific text, for example, "CircuitPython Feather" or just "Feather". This will let folks more easily tell boards apart. The new option is named `USB_INTERFACE_NAME` and is available in `mkconfigboard.mk`. For example: ``` USB_INTERFACE_NAME = "Feather" ``` --- supervisor/supervisor.mk | 5 +++++ tools/gen_usb_descriptor.py | 28 ++++++++++++++++------------ 2 files changed, 21 insertions(+), 12 deletions(-) (limited to 'tools') diff --git a/supervisor/supervisor.mk b/supervisor/supervisor.mk index ad0f716fb..b2e4eb1dc 100644 --- a/supervisor/supervisor.mk +++ b/supervisor/supervisor.mk @@ -91,6 +91,10 @@ else CFLAGS += -DUSB_AVAILABLE endif +ifndef USB_INTERFACE_NAME +USB_INTERFACE_NAME = "CircuitPython" +endif + ifndef USB_DEVICES USB_DEVICES = "CDC,MSC,AUDIO,HID" endif @@ -145,6 +149,7 @@ USB_DESCRIPTOR_ARGS = \ --vid $(USB_VID)\ --pid $(USB_PID)\ --serial_number_length $(USB_SERIAL_NUMBER_LENGTH)\ + --interface_name $(USB_INTERFACE_NAME)\ --devices $(USB_DEVICES)\ --hid_devices $(USB_HID_DEVICES)\ --msc_max_packet_size $(USB_MSC_MAX_PACKET_SIZE)\ diff --git a/tools/gen_usb_descriptor.py b/tools/gen_usb_descriptor.py index 21a480f99..5e25528f9 100644 --- a/tools/gen_usb_descriptor.py +++ b/tools/gen_usb_descriptor.py @@ -8,6 +8,7 @@ sys.path.append("../../tools/usb_descriptor") from adafruit_usb_descriptor import audio, audio10, cdc, hid, midi, msc, standard, util import hid_report_descriptors +DEFAULT_INTERFACE_NAME = 'CircuitPython' ALL_DEVICES='CDC,MSC,AUDIO,HID' ALL_DEVICES_SET=frozenset(ALL_DEVICES.split(',')) DEFAULT_DEVICES='CDC,MSC,AUDIO,HID' @@ -32,6 +33,9 @@ parser.add_argument('--devices', type=lambda l: tuple(l.split(',')), default=DEF help='devices to include in descriptor (AUDIO includes MIDI support)') parser.add_argument('--hid_devices', type=lambda l: tuple(l.split(',')), default=DEFAULT_HID_DEVICES, help='HID devices to include in HID report descriptor') +parser.add_argument('--interface_name', type=str, + help='The name/prefix to use in the interface descriptions', + default=DEFAULT_INTERFACE_NAME) parser.add_argument('--msc_max_packet_size', type=int, default=64, help='Max packet size for MSC') parser.add_argument('--no-renumber_endpoints', dest='renumber_endpoints', action='store_false', @@ -151,7 +155,7 @@ cdc_comm_interface = standard.InterfaceDescriptor( bInterfaceClass=cdc.CDC_CLASS_COMM, # Communications Device Class bInterfaceSubClass=cdc.CDC_SUBCLASS_ACM, # Abstract control model bInterfaceProtocol=cdc.CDC_PROTOCOL_NONE, - iInterface=StringIndex.index("CircuitPython CDC control"), + iInterface=StringIndex.index("{} CDC control".format(args.interface_name)), subdescriptors=[ cdc.Header( description="CDC comm", @@ -172,7 +176,7 @@ cdc_comm_interface = standard.InterfaceDescriptor( cdc_data_interface = standard.InterfaceDescriptor( description="CDC data", bInterfaceClass=cdc.CDC_CLASS_DATA, - iInterface=StringIndex.index("CircuitPython CDC data"), + iInterface=StringIndex.index("{} CDC data".format(args.interface_name)), subdescriptors=[ standard.EndpointDescriptor( description="CDC data out", @@ -192,7 +196,7 @@ msc_interfaces = [ bInterfaceClass=msc.MSC_CLASS, bInterfaceSubClass=msc.MSC_SUBCLASS_TRANSPARENT, bInterfaceProtocol=msc.MSC_PROTOCOL_BULK, - iInterface=StringIndex.index("CircuitPython Mass Storage"), + iInterface=StringIndex.index("{} Mass Storage".format(args.interface_name)), subdescriptors=[ standard.EndpointDescriptor( description="MSC in", @@ -256,7 +260,7 @@ hid_interfaces = [ bInterfaceClass=hid.HID_CLASS, bInterfaceSubClass=hid.HID_SUBCLASS_NOBOOT, bInterfaceProtocol=hid.HID_PROTOCOL_NONE, - iInterface=StringIndex.index("CircuitPython HID"), + iInterface=StringIndex.index("{} HID".format(args.interface_name)), subdescriptors=[ hid.HIDDescriptor( description="HID", @@ -272,9 +276,9 @@ hid_interfaces = [ # USB OUT -> midi_in_jack_emb -> midi_out_jack_ext -> CircuitPython midi_in_jack_emb = midi.InJackDescriptor( - description="MIDI PC -> CircuitPython", + description="MIDI PC -> {}".format(args.interface_name), bJackType=midi.JACK_TYPE_EMBEDDED, - iJack=StringIndex.index("CircuitPython usb_midi.ports[0]")) + iJack=StringIndex.index("{} usb_midi.ports[0]".format(args.interface_name))) midi_out_jack_ext = midi.OutJackDescriptor( description="MIDI data out to user code.", bJackType=midi.JACK_TYPE_EXTERNAL, @@ -287,10 +291,10 @@ midi_in_jack_ext = midi.InJackDescriptor( bJackType=midi.JACK_TYPE_EXTERNAL, iJack=0) midi_out_jack_emb = midi.OutJackDescriptor( - description="MIDI PC <- CircuitPython", + description="MIDI PC <- {}".format(args.interface_name), bJackType=midi.JACK_TYPE_EMBEDDED, input_pins=[(midi_in_jack_ext, 1)], - iJack=StringIndex.index("CircuitPython usb_midi.ports[1]")) + iJack=StringIndex.index("{} usb_midi.ports[1]".format(args.interface_name))) audio_midi_interface = standard.InterfaceDescriptor( @@ -298,7 +302,7 @@ audio_midi_interface = standard.InterfaceDescriptor( bInterfaceClass=audio.AUDIO_CLASS_DEVICE, bInterfaceSubClass=audio.AUDIO_SUBCLASS_MIDI_STREAMING, bInterfaceProtocol=audio.AUDIO_PROTOCOL_V1, - iInterface=StringIndex.index("CircuitPython MIDI"), + iInterface=StringIndex.index("{} MIDI".format(args.interface_name)), subdescriptors=[ midi.Header( jacks_and_elements=[ @@ -309,12 +313,12 @@ audio_midi_interface = standard.InterfaceDescriptor( ], ), standard.EndpointDescriptor( - description="MIDI data out to CircuitPython", + description="MIDI data out to {}".format(args.interface_name), bEndpointAddress=args.midi_ep_num_out | standard.EndpointDescriptor.DIRECTION_OUT, bmAttributes=standard.EndpointDescriptor.TYPE_BULK), midi.DataEndpointDescriptor(baAssocJack=[midi_in_jack_emb]), standard.EndpointDescriptor( - description="MIDI data in from CircuitPython", + description="MIDI data in from {}".format(args.interface_name), bEndpointAddress=args.midi_ep_num_in | standard.EndpointDescriptor.DIRECTION_IN, bmAttributes=standard.EndpointDescriptor.TYPE_BULK, bInterval = 0x0), @@ -334,7 +338,7 @@ audio_control_interface = standard.InterfaceDescriptor( bInterfaceClass=audio.AUDIO_CLASS_DEVICE, bInterfaceSubClass=audio.AUDIO_SUBCLASS_CONTROL, bInterfaceProtocol=audio.AUDIO_PROTOCOL_V1, - iInterface=StringIndex.index("CircuitPython Audio"), + iInterface=StringIndex.index("{} Audio".format(args.interface_name)), subdescriptors=[ cs_ac_interface, ]) -- cgit v1.2.3 From fe6ec9a7d48986981e09a26d0ecc99af0a9febe7 Mon Sep 17 00:00:00 2001 From: Melissa LeBlanc-Williams Date: Tue, 19 Nov 2019 14:53:58 -0800 Subject: Added Edgebadge alias for Pybadge --- lib/stm32lib | 1 + tools/build_board_info.py | 1 + 2 files changed, 2 insertions(+) create mode 160000 lib/stm32lib (limited to 'tools') diff --git a/lib/stm32lib b/lib/stm32lib new file mode 160000 index 000000000..b2487bdea --- /dev/null +++ b/lib/stm32lib @@ -0,0 +1 @@ +Subproject commit b2487bdea963af3343fc198681c9dc698e267303 diff --git a/tools/build_board_info.py b/tools/build_board_info.py index efa481a63..710cdb0c2 100644 --- a/tools/build_board_info.py +++ b/tools/build_board_info.py @@ -48,6 +48,7 @@ extension_by_board = { aliases_by_board = { "circuitplayground_express": ["circuitplayground_express_4h", "circuitplayground_express_digikey_pycon2019"], + "pybadge": ["edgebadge"], "gemma_m0": ["gemma_m0_pycon2018"], "pewpew10": ["pewpew13"] } -- cgit v1.2.3 From d628d2a261bb28b84c6b257a990bd9a30cbe369c Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Fri, 6 Dec 2019 15:18:20 -0500 Subject: atmel-samd working --- ports/atmel-samd/bindings/samd/Clock.c | 260 +++++++++++++++++++++ .../common-hal/frequencyio/FrequencyIn.c | 2 +- ports/atmel-samd/mpconfigport.h | 48 ++-- ports/atmel-samd/peripherals | 2 +- ports/atmel-samd/supervisor/port.c | 54 ++++- py/circuitpy_mpconfig.h | 3 +- tools/build_memory_info.py | 3 +- 7 files changed, 349 insertions(+), 23 deletions(-) (limited to 'tools') diff --git a/ports/atmel-samd/bindings/samd/Clock.c b/ports/atmel-samd/bindings/samd/Clock.c index be597c444..b88bb82e2 100644 --- a/ports/atmel-samd/bindings/samd/Clock.c +++ b/ports/atmel-samd/bindings/samd/Clock.c @@ -163,3 +163,263 @@ const mp_obj_type_t samd_clock_type = { .print = samd_clock_print, .locals_dict = (mp_obj_t)&samd_clock_locals_dict, }; + +#ifdef SAMD21 + +#ifdef SAMD21_EXPOSE_ALL_CLOCKS +CLOCK_SOURCE(XOSC); +CLOCK_SOURCE(GCLKIN); +CLOCK_SOURCE(GCLKGEN1); +CLOCK_SOURCE(OSCULP32K); +#endif +CLOCK_SOURCE(OSC32K); +CLOCK_SOURCE(XOSC32K); +#ifdef SAMD21_EXPOSE_ALL_CLOCKS +CLOCK_SOURCE(OSC8M); +CLOCK_SOURCE(DFLL48M); +CLOCK_SOURCE(DPLL96M); + +CLOCK_GCLK_(SYSCTRL, DFLL48); +CLOCK_GCLK_(SYSCTRL, FDPLL); +CLOCK_GCLK_(SYSCTRL, FDPLL32K); +CLOCK_GCLK(WDT); +#endif +CLOCK_GCLK(RTC); +#ifdef SAMD21_EXPOSE_ALL_CLOCKS +CLOCK_GCLK(EIC); +CLOCK_GCLK(USB); +CLOCK_GCLK_(EVSYS, 0); +CLOCK_GCLK_(EVSYS, 1); +CLOCK_GCLK_(EVSYS, 2); +CLOCK_GCLK_(EVSYS, 3); +CLOCK_GCLK_(EVSYS, 4); +CLOCK_GCLK_(EVSYS, 5); +CLOCK_GCLK_(EVSYS, 6); +CLOCK_GCLK_(EVSYS, 7); +CLOCK_GCLK_(EVSYS, 8); +CLOCK_GCLK_(EVSYS, 9); +CLOCK_GCLK_(EVSYS, 10); +CLOCK_GCLK_(EVSYS, 11); +CLOCK(SERCOMx_SLOW, 1, 19); +CLOCK_GCLK_(SERCOM0, CORE); +CLOCK_GCLK_(SERCOM1, CORE); +CLOCK_GCLK_(SERCOM2, CORE); +CLOCK_GCLK_(SERCOM3, CORE); +CLOCK_GCLK_(SERCOM4, CORE); +CLOCK_GCLK_(SERCOM5, CORE); +CLOCK(TCC0_TCC1, 1, 26); +CLOCK(TCC2_TCC3, 1, 27); +CLOCK(TC4_TC5, 1, 28); +CLOCK(TC6_TC7, 1, 29); +CLOCK_GCLK(ADC); +CLOCK_GCLK_(AC, DIG); +CLOCK_GCLK_(AC, ANA); +CLOCK_GCLK(DAC); +CLOCK_GCLK(PTC); +CLOCK_GCLK_(I2S, 0); +CLOCK_GCLK_(I2S, 1); + +CLOCK(SYSTICK, 2, 0); +#endif + +STATIC const mp_rom_map_elem_t samd_clock_global_dict_table[] = { +#ifdef SAMD21_EXPOSE_ALL_CLOCKS + CLOCK_ENTRY(XOSC), + CLOCK_ENTRY(GCLKIN), + CLOCK_ENTRY(GCLKGEN1), + CLOCK_ENTRY(OSCULP32K), +#endif + CLOCK_ENTRY(OSC32K), + CLOCK_ENTRY(XOSC32K), +#ifdef SAMD21_EXPOSE_ALL_CLOCKS + CLOCK_ENTRY(OSC8M), + CLOCK_ENTRY(DFLL48M), + CLOCK_ENTRY(DPLL96M), + CLOCK_ENTRY_(SYSCTRL, DFLL48), + CLOCK_ENTRY_(SYSCTRL, FDPLL), + CLOCK_ENTRY_(SYSCTRL, FDPLL32K), + CLOCK_ENTRY(WDT), +#endif + CLOCK_ENTRY(RTC), +#ifdef SAMD21_EXPOSE_ALL_CLOCKS + CLOCK_ENTRY(EIC), + CLOCK_ENTRY(USB), + CLOCK_ENTRY_(EVSYS, 0), + CLOCK_ENTRY_(EVSYS, 1), + CLOCK_ENTRY_(EVSYS, 2), + CLOCK_ENTRY_(EVSYS, 3), + CLOCK_ENTRY_(EVSYS, 4), + CLOCK_ENTRY_(EVSYS, 5), + CLOCK_ENTRY_(EVSYS, 6), + CLOCK_ENTRY_(EVSYS, 7), + CLOCK_ENTRY_(EVSYS, 8), + CLOCK_ENTRY_(EVSYS, 9), + CLOCK_ENTRY_(EVSYS, 10), + CLOCK_ENTRY_(EVSYS, 11), + CLOCK_ENTRY(SERCOMx_SLOW), + CLOCK_ENTRY_(SERCOM0, CORE), + CLOCK_ENTRY_(SERCOM1, CORE), + CLOCK_ENTRY_(SERCOM2, CORE), + CLOCK_ENTRY_(SERCOM3, CORE), + CLOCK_ENTRY_(SERCOM4, CORE), + CLOCK_ENTRY_(SERCOM5, CORE), + CLOCK_ENTRY(TCC0_TCC1), + CLOCK_ENTRY(TCC2_TCC3), + CLOCK_ENTRY(TC4_TC5), + CLOCK_ENTRY(TC6_TC7), + CLOCK_ENTRY(ADC), + CLOCK_ENTRY_(AC, DIG), + CLOCK_ENTRY_(AC, ANA), + CLOCK_ENTRY(DAC), + CLOCK_ENTRY(PTC), + CLOCK_ENTRY_(I2S, 0), + CLOCK_ENTRY_(I2S, 1), + + CLOCK_ENTRY(SYSTICK), +#endif +}; +MP_DEFINE_CONST_DICT(samd_clock_globals, samd_clock_global_dict_table); + +#endif // SAMD21 + +#ifdef SAMD51 + + + +#include +#include +#include +#include +#include +#include +#include + +CLOCK_SOURCE(XOSC0); +CLOCK_SOURCE(XOSC1); +CLOCK_SOURCE(GCLKIN); +CLOCK_SOURCE(GCLKGEN1); +CLOCK_SOURCE(OSCULP32K); +CLOCK_SOURCE(XOSC32K); +CLOCK_SOURCE(DFLL); +CLOCK_SOURCE(DPLL0); +CLOCK_SOURCE(DPLL1); + +CLOCK_GCLK_(OSCCTRL, DFLL48); +CLOCK_GCLK_(OSCCTRL, FDPLL0); +CLOCK_GCLK_(OSCCTRL, FDPLL1); +CLOCK_GCLK_(OSCCTRL, FDPLL032K); // GCLK_OSCCTRL_FDPLL1_32K, GCLK_SDHC0_SLOW, GCLK_SDHC1_SLOW, GCLK_SERCOM[0..7]_SLOW +CLOCK_GCLK(EIC); +CLOCK_GCLK_(FREQM, MSR); +// 6: GCLK_FREQM_REF +CLOCK_GCLK_(SERCOM0, CORE); +CLOCK_GCLK_(SERCOM1, CORE); +CLOCK(TC0_TC1, 1, 9); +CLOCK_GCLK(USB); +CLOCK_GCLK_(EVSYS, 0); +CLOCK_GCLK_(EVSYS, 1); +CLOCK_GCLK_(EVSYS, 2); +CLOCK_GCLK_(EVSYS, 3); +CLOCK_GCLK_(EVSYS, 4); +CLOCK_GCLK_(EVSYS, 5); +CLOCK_GCLK_(EVSYS, 6); +CLOCK_GCLK_(EVSYS, 7); +CLOCK_GCLK_(EVSYS, 8); +CLOCK_GCLK_(EVSYS, 9); +CLOCK_GCLK_(EVSYS, 10); +CLOCK_GCLK_(EVSYS, 11); +CLOCK_GCLK_(SERCOM2, CORE); +CLOCK_GCLK_(SERCOM3, CORE); +CLOCK(TCC0_TCC1, 1, 25); +CLOCK(TC2_TC3, 1, 26); +CLOCK_GCLK(CAN0); +CLOCK_GCLK(CAN1); +CLOCK(TCC2_TCC3, 1, 29); +CLOCK(TC4_TC5, 1, 30); +// CLOCK_GCLK(PDEC); +// CLOCK_GCLK(AC); +// CLOCK_GCLK(CCL); +CLOCK_GCLK_(SERCOM4, CORE); +CLOCK_GCLK_(SERCOM5, CORE); +CLOCK_GCLK_(SERCOM6, CORE); +CLOCK_GCLK_(SERCOM7, CORE); +CLOCK_GCLK(TCC4); +CLOCK(TC6_TC7, 1, 39); +CLOCK_GCLK(ADC0); +CLOCK_GCLK(ADC1); +CLOCK_GCLK(DAC); +CLOCK_GCLK_(I2S, 0); +CLOCK_GCLK_(I2S, 1); +// CLOCK_GCLK(SDHC0); +// CLOCK_GCLK(SDHC1); +// 47: GCLK_CM4_TRACE + +CLOCK(SYSTICK, 2, 0); +CLOCK(CPU, 2, 1); +CLOCK(RTC, 2, 2); + + +STATIC const mp_rom_map_elem_t samd_clock_global_dict_table[] = { + CLOCK_ENTRY(XOSC0), + CLOCK_ENTRY(XOSC1), + CLOCK_ENTRY(GCLKIN), + CLOCK_ENTRY(GCLKGEN1), + CLOCK_ENTRY(OSCULP32K), + CLOCK_ENTRY(XOSC32K), + CLOCK_ENTRY(DFLL), + CLOCK_ENTRY(DPLL0), + CLOCK_ENTRY(DPLL1), + + CLOCK_ENTRY_(OSCCTRL, DFLL48), + CLOCK_ENTRY_(OSCCTRL, FDPLL0), + CLOCK_ENTRY_(OSCCTRL, FDPLL1), + CLOCK_ENTRY_(OSCCTRL, FDPLL032K), + CLOCK_ENTRY(EIC), + CLOCK_ENTRY_(FREQM, MSR), + CLOCK_ENTRY_(SERCOM0, CORE), + CLOCK_ENTRY_(SERCOM1, CORE), + CLOCK_ENTRY(TC0_TC1), + CLOCK_ENTRY(USB), + CLOCK_ENTRY_(EVSYS, 0), + CLOCK_ENTRY_(EVSYS, 1), + CLOCK_ENTRY_(EVSYS, 2), + CLOCK_ENTRY_(EVSYS, 3), + CLOCK_ENTRY_(EVSYS, 4), + CLOCK_ENTRY_(EVSYS, 5), + CLOCK_ENTRY_(EVSYS, 6), + CLOCK_ENTRY_(EVSYS, 7), + CLOCK_ENTRY_(EVSYS, 8), + CLOCK_ENTRY_(EVSYS, 9), + CLOCK_ENTRY_(EVSYS, 10), + CLOCK_ENTRY_(EVSYS, 11), + CLOCK_ENTRY_(SERCOM2, CORE), + CLOCK_ENTRY_(SERCOM3, CORE), + CLOCK_ENTRY(TCC0_TCC1), + CLOCK_ENTRY(TC2_TC3), + CLOCK_ENTRY(CAN0), + CLOCK_ENTRY(CAN1), + CLOCK_ENTRY(TCC2_TCC3), + CLOCK_ENTRY(TC4_TC5), + // CLOCK_ENTRY(PDEC), + // CLOCK_ENTRY(AC), + // CLOCK_ENTRY(CCL), + CLOCK_ENTRY_(SERCOM4, CORE), + CLOCK_ENTRY_(SERCOM5, CORE), + CLOCK_ENTRY_(SERCOM6, CORE), + CLOCK_ENTRY_(SERCOM7, CORE), + CLOCK_ENTRY(TCC4), + CLOCK_ENTRY(TC6_TC7), + CLOCK_ENTRY(ADC0), + CLOCK_ENTRY(ADC1), + CLOCK_ENTRY(DAC), + CLOCK_ENTRY_(I2S, 0), + CLOCK_ENTRY_(I2S, 1), + // CLOCK_ENTRY(SDHC0), + // CLOCK_ENTRY(SDHC1), + + CLOCK_ENTRY(SYSTICK), + CLOCK_ENTRY(CPU), + CLOCK_ENTRY(RTC), +}; +MP_DEFINE_CONST_DICT(samd_clock_globals, samd_clock_global_dict_table); + +#endif // SAMD51 diff --git a/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c b/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c index d34049946..6258818c8 100644 --- a/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +++ b/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c @@ -213,7 +213,7 @@ void frequencyin_samd51_start_dpll() { // Will also enable the Lock Bypass due to low-frequency sources causing DPLL unlocks // as outlined in the Errata (1.12.1) OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0) | OSCCTRL_DPLLRATIO_LDR(2999); - if (board_has_crystal()) { // we can use XOSC32K directly as the source + if (BOARD_HAS_CRYSTAL) { // we can use XOSC32K directly as the source OSC32KCTRL->XOSC32K.bit.EN32K = 1; OSCCTRL->Dpll[1].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_REFCLK(1) | OSCCTRL_DPLLCTRLB_LBYPASS; diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h index 9733d270a..ecb962194 100644 --- a/ports/atmel-samd/mpconfigport.h +++ b/ports/atmel-samd/mpconfigport.h @@ -30,28 +30,16 @@ // Definitions for which SAMD chip we're using. #include "include/sam.h" + +//////////////////////////////////////////////////////////////////////////////////////////////////// +#ifdef SAMD21 + #if INTERNAL_FLASH_FILESYSTEM #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (64*1024) #else #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) #endif -#ifndef CALIBRATE_CRYSTALLESS -#define CALIBRATE_CRYSTALLESS (0) -#endif - -// if CALIBRATE_CRYSTALLESS is requested, make room for storing -// calibration data generated from external USB. -#ifndef CIRCUITPY_INTERNAL_CONFIG_SIZE - #if CALIBRATE_CRYSTALLESS - #define CIRCUITPY_INTERNAL_CONFIG_SIZE (256) - #else - #define CIRCUITPY_INTERNAL_CONFIG_SIZE (0) - #endif -#endif - -#ifdef SAMD21 - // HMCRAMC0_SIZE is defined in the ASF4 include files for each SAMD21 chip. #define RAM_SIZE HMCRAMC0_SIZE #define BOOTLOADER_SIZE (8*1024) @@ -84,6 +72,8 @@ #endif // SAMD21 +//////////////////////////////////////////////////////////////////////////////////////////////////// + #ifdef SAMD51 #ifndef CIRCUITPY_INTERNAL_NVM_SIZE @@ -110,6 +100,7 @@ #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (1) #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) #define MICROPY_PY_FUNCTION_ATTRS (1) +// MICROPY_PY_UJSON depends on MICROPY_PY_IO #define MICROPY_PY_IO (1) #define MICROPY_PY_UJSON (1) #define MICROPY_PY_REVERSE_SPECIAL_METHODS (1) @@ -117,6 +108,29 @@ #endif // SAMD51 +//////////////////////////////////////////////////////////////////////////////////////////////////// + +// This also includes mpconfigboard.h. +#include "py/circuitpy_mpconfig.h" + +#ifndef CALIBRATE_CRYSTALLESS +#define CALIBRATE_CRYSTALLESS (0) +#endif + +#ifndef BOARD_HAS_CRYSTAL +#define BOARD_HAS_CRYSTAL (0) +#endif + +// if CALIBRATE_CRYSTALLESS is requested, make room for storing +// calibration data generated from external USB. +#ifndef CIRCUITPY_INTERNAL_CONFIG_SIZE + #if CALIBRATE_CRYSTALLESS + #define CIRCUITPY_INTERNAL_CONFIG_SIZE (NVMCTRL_ROW_SIZE) // 256 + #else + #define CIRCUITPY_INTERNAL_CONFIG_SIZE (0) + #endif +#endif + // Flash layout, starting at 0x00000000 // // bootloader (8 or 16kB) @@ -155,8 +169,6 @@ #include "peripherals/samd/dma.h" -#include "py/circuitpy_mpconfig.h" - #define MICROPY_PORT_ROOT_POINTERS \ CIRCUITPY_COMMON_ROOT_POINTERS \ mp_obj_t playing_audio[AUDIO_DMA_CHANNEL_COUNT]; diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals index 2ba5b20ba..bb26a4145 160000 --- a/ports/atmel-samd/peripherals +++ b/ports/atmel-samd/peripherals @@ -1 +1 @@ -Subproject commit 2ba5b20ba725e1c91c77875fba3a5e22059cdb92 +Subproject commit bb26a4145c86a51debc6571bb1f791e0d4fd296b diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c index e962281c1..5662b159b 100644 --- a/ports/atmel-samd/supervisor/port.c +++ b/ports/atmel-samd/supervisor/port.c @@ -24,12 +24,16 @@ * THE SOFTWARE. */ +#include +#include + #include "boards/board.h" #include "supervisor/port.h" // ASF 4 #include "atmel_start_pins.h" #include "hal/include/hal_delay.h" +#include "hal/include/hal_flash.h" #include "hal/include/hal_gpio.h" #include "hal/include/hal_init.h" #include "hpl/gclk/hpl_gclk_base.h" @@ -94,6 +98,40 @@ extern volatile bool mp_msc_enabled; __attribute__((__aligned__(TRACE_BUFFER_SIZE_BYTES))) uint32_t mtb[TRACE_BUFFER_SIZE] = {0}; #endif +#if CALIBRATE_CRYSTALLESS +static void save_usb_clock_calibration(void) { + // If we are on USB lets double check our fine calibration for the clock and + // save the new value if its different enough. + SYSCTRL->DFLLSYNC.bit.READREQ = 1; + uint16_t saved_calibration = 0x1ff; + if (strcmp((char*) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, "CIRCUITPYTHON1") == 0) { + saved_calibration = ((uint16_t *) CIRCUITPY_INTERNAL_CONFIG_START_ADDR)[8]; + } + while (SYSCTRL->PCLKSR.bit.DFLLRDY == 0) { + // TODO(tannewt): Run the mass storage stuff if this takes a while. + } + int16_t current_calibration = SYSCTRL->DFLLVAL.bit.FINE; + if (abs(current_calibration - saved_calibration) > 10) { + // Copy the full internal config page to memory. + uint8_t page_buffer[NVMCTRL_ROW_SIZE]; + memcpy(page_buffer, (uint8_t*) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, NVMCTRL_ROW_SIZE); + + // Modify it. + memcpy(page_buffer, "CIRCUITPYTHON1", 15); + // First 16 bytes (0-15) are ID. Little endian! + page_buffer[16] = current_calibration & 0xff; + page_buffer[17] = current_calibration >> 8; + + // Write it back. + // We don't use features that use any advanced NVMCTRL features so we can fake the descriptor + // whenever we need it instead of storing it long term. + struct flash_descriptor desc; + desc.dev.hw = NVMCTRL; + flash_write(&desc, (uint32_t) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, page_buffer, NVMCTRL_ROW_SIZE); + } +} +#endif + safe_mode_t port_init(void) { #if defined(SAMD21) @@ -168,7 +206,19 @@ safe_mode_t port_init(void) { hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, 2); _pm_init(); #endif - clock_init(); + +#if CALIBRATE_CRYSTALLESS + uint32_t fine = DEFAULT_DFLL48M_FINE_CALIBRATION; + // The fine calibration data is stored in an NVM page after the text and data storage but before + // the optional file system. The first 16 bytes are the identifier for the section. + if (strcmp((char*) CIRCUITPY_INTERNAL_CONFIG_START_ADDR, "CIRCUITPYTHON1") == 0) { + fine = ((uint16_t *) CIRCUITPY_INTERNAL_CONFIG_START_ADDR)[8]; + } + clock_init(BOARD_HAS_CRYSTAL, fine); +#else + // Use a default fine value + clock_init(BOARD_HAS_CRYSTAL, DEFAULT_DFLL48M_FINE_CALIBRATION); +#endif // Configure millisecond timer initialization. tick_init(); @@ -257,9 +307,11 @@ void reset_port(void) { // gpio_set_pin_function(PIN_PB15, GPIO_PIN_FUNCTION_M); // GCLK1, D6 // #endif +#if CALIBRATE_CRYSTALLESS if (tud_cdc_connected()) { save_usb_clock_calibration(); } +#endif } void reset_to_bootloader(void) { diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index cf21d26dd..c4606074f 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -174,7 +174,8 @@ typedef long mp_off_t; { MP_OBJ_NEW_QSTR(MP_QSTR_input), (mp_obj_t)&mp_builtin_input_obj }, \ { MP_OBJ_NEW_QSTR(MP_QSTR_open), (mp_obj_t)&mp_builtin_open_obj }, -// board specific definitions +////////////////////////////////////////////////////////////////////////////////////////////////// +// board-specific definitions, which control and may override definitions below. #include "mpconfigboard.h" // CIRCUITPY_FULL_BUILD is defined in a *.mk file. diff --git a/tools/build_memory_info.py b/tools/build_memory_info.py index 0dcd5f6e4..f128561ab 100644 --- a/tools/build_memory_info.py +++ b/tools/build_memory_info.py @@ -41,6 +41,7 @@ data = 0 bss = 0 # stdin is the linker output. for line in sys.stdin: + print(line) line = line.strip() if not line.startswith("text"): text, data, bss = map(int, line.split()[:3]) @@ -64,7 +65,7 @@ for region in regions: free_flash = regions["FLASH_FIRMWARE"] - text - data free_ram = regions["RAM"] - data - bss print("{} bytes free in flash firmware space out of {} bytes ({}kB).".format(free_flash, regions["FLASH_FIRMWARE"], regions["FLASH_FIRMWARE"] / 1024)) -print("{} bytes free in ram for stack out of {} bytes ({}kB).".format(free_ram, regions["RAM"], regions["RAM"] / 1024)) +print("{} bytes free in ram for heap out of {} bytes ({}kB).".format(free_ram, regions["RAM"], regions["RAM"] / 1024)) print() # Check that we have free flash space. GCC doesn't fail when the text + data -- cgit v1.2.3 From 013c84086288141696e4c09250c61b6f2dbdf4d2 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Tue, 10 Dec 2019 17:57:17 -0500 Subject: working on all ports --- ports/atmel-samd/Makefile | 15 +---- ports/atmel-samd/boards/common.template.ld | 4 +- ports/atmel-samd/mpconfigport.h | 47 +++++++++---- ports/atmel-samd/peripherals | 2 +- ports/cxd56/boards/spresense/mpconfigboard.mk | 2 + ports/nrf/Makefile | 34 ++++------ .../circuitplayground_bluefruit/mpconfigboard.h | 3 - ports/nrf/boards/common.template.ld | 8 +-- .../feather_nrf52840_express/mpconfigboard.h | 3 - .../itsybitsy_nrf52840_express/mpconfigboard.h | 3 - .../boards/metro_nrf52840_express/mpconfigboard.h | 3 - ports/nrf/boards/pca10059/mpconfigboard.mk | 2 +- ports/nrf/ld_defines.c | 39 +++++++++++ ports/nrf/mpconfigport.h | 76 +++++++++++++++++----- ports/nrf/mpconfigport.mk | 2 +- ports/nrf/supervisor/internal_flash.c | 8 +-- py/circuitpy_defns.mk | 12 ++++ supervisor/supervisor.mk | 6 +- tools/build_memory_info.py | 20 ++++-- 19 files changed, 189 insertions(+), 100 deletions(-) create mode 100644 ports/nrf/ld_defines.c (limited to 'tools') diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile index 32517c801..83fd879aa 100644 --- a/ports/atmel-samd/Makefile +++ b/ports/atmel-samd/Makefile @@ -157,7 +157,7 @@ endif -LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs +LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib -Wl,-T,$(GENERATED_LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs LIBS := -lgcc -lc # Use toolchain libm if we're not using our own. @@ -324,19 +324,10 @@ SRC_QSTR_PREPROCESSOR += peripherals/samd/$(CHIP_FAMILY)/clocks.c all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 -LD_FILE = $(BUILD)/$(notdir $(patsubst %.template.ld,%.ld,$(LD_TEMPLATE_FILE))) - -# ld_defines.pp is generated from ld_defines.c. See py/mkrules.mk. -# Run gen_ld_files.py over ALL *.template.ld files, not just LD_TEMPLATE_FILE, -# because it may include other template files. -$(LD_FILE): $(BUILD)/ld_defines.pp boards/*.template.ld - $(STEPECHO) "GEN $@" - $(Q)$(PYTHON3) $(TOP)/tools/gen_ld_files.py --defines $< --out_dir $(BUILD) boards/*.template.ld - -$(BUILD)/firmware.elf: $(OBJ) $(LD_FILE) +$(BUILD)/firmware.elf: $(OBJ) $(GENERATED_LD_FILE) $(STEPECHO) "LINK $@" $(Q)$(CC) -o $@ $(LDFLAGS) $(OBJ) -Wl,--start-group $(LIBS) -Wl,--end-group - $(Q)$(SIZE) $@ | $(PYTHON3) $(TOP)/tools/build_memory_info.py $(LD_FILE) + $(Q)$(SIZE) $@ | $(PYTHON3) $(TOP)/tools/build_memory_info.py $(GENERATED_LD_FILE) $(BUILD)/firmware.bin: $(BUILD)/firmware.elf $(STEPECHO) "Create $@" diff --git a/ports/atmel-samd/boards/common.template.ld b/ports/atmel-samd/boards/common.template.ld index 4c537e001..1054605c8 100644 --- a/ports/atmel-samd/boards/common.template.ld +++ b/ports/atmel-samd/boards/common.template.ld @@ -6,9 +6,9 @@ MEMORY FLASH_BOOTLOADER (rx): ORIGIN = ${BOOTLOADER_START_ADDR}, LENGTH = ${BOOTLOADER_SIZE} FLASH_FIRMWARE (rx) : ORIGIN = ${CIRCUITPY_FIRMWARE_START_ADDR}, LENGTH = ${CIRCUITPY_FIRMWARE_SIZE} - FLASH_NVM (r) : ORIGIN = ${CIRCUITPY_INTERNAL_NVM_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_NVM_SIZE} - FLASH_CONFIG (r) : ORIGIN = ${CIRCUITPY_INTERNAL_CONFIG_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_CONFIG_SIZE} FLASH_FILESYSTEM (r) : ORIGIN = ${CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE} + FLASH_CONFIG (r) : ORIGIN = ${CIRCUITPY_INTERNAL_CONFIG_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_CONFIG_SIZE} + FLASH_NVM (r) : ORIGIN = ${CIRCUITPY_INTERNAL_NVM_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_NVM_SIZE} RAM (xrw) : ORIGIN = 0x20000000, LENGTH = ${RAM_SIZE} } diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h index ecb962194..6ab95c8a5 100644 --- a/ports/atmel-samd/mpconfigport.h +++ b/ports/atmel-samd/mpconfigport.h @@ -81,12 +81,12 @@ #endif // If CIRCUITPY is internal, use half of flash for it. -#ifndef CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE - #if INTERNAL_FLASH_FILESYSTEM - #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (FLASH_SIZE/2) - #else - #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) +#if INTERNAL_FLASH_FILESYSTEM + #ifndef CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE + #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (FLASH_SIZE/2) #endif +#else + #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) #endif // HSRAM_SIZE is defined in the ASF4 include files for each SAMD51 chip. @@ -135,9 +135,9 @@ // // bootloader (8 or 16kB) // firmware +// internal CIRCUITPY flash filesystem (optional) // internal config, used to store crystalless clock calibration info (optional) // microntroller.nvm (optional) -// internal CIRCUITPY flash filesystem (optional) // Define these regions starting up from the bottom of flash: @@ -147,18 +147,43 @@ // Define these regions start down from the top of flash: -#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR \ - (FLASH_SIZE - CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE) - #define CIRCUITPY_INTERNAL_NVM_START_ADDR \ - (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR - CIRCUITPY_INTERNAL_NVM_SIZE) + (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE) #define CIRCUITPY_INTERNAL_CONFIG_START_ADDR \ (CIRCUITPY_INTERNAL_NVM_START_ADDR - CIRCUITPY_INTERNAL_CONFIG_SIZE) +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR \ + (CIRCUITPY_INTERNAL_CONFIG_START_ADDR - CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE) + // The firmware space is the space left over between the fixed lower and upper regions. #define CIRCUITPY_FIRMWARE_SIZE \ - (CIRCUITPY_INTERNAL_CONFIG_START_ADDR - CIRCUITPY_FIRMWARE_START_ADDR) + (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR - CIRCUITPY_FIRMWARE_START_ADDR) + +#if BOOTLOADER_START_ADDR % FLASH_PAGE_SIZE != 0 +#error BOOTLOADER_START_ADDR must be on a flash page boundary. +#endif + +#if CIRCUITPY_INTERNAL_NVM_START_ADDR % FLASH_PAGE_SIZE != 0 +#error CIRCUITPY_INTERNAL_NVM_START_ADDR must be on a flash page boundary. +#endif +#if CIRCUITPY_INTERNAL_NVM_SIZE % FLASH_PAGE_SIZE != 0 +#error CIRCUITPY_INTERNAL_NVM_SIZE must be a multiple of FLASH_PAGE_SIZE. +#endif + +#if CIRCUITPY_INTERNAL_CONFIG_START_ADDR % FLASH_PAGE_SIZE != 0 +#error CIRCUITPY_INTERNAL_CONFIG_SIZE must be on a flash page boundary. +#endif +#if CIRCUITPY_INTERNAL_CONFIG_SIZE % FLASH_PAGE_SIZE != 0 +#error CIRCUITPY_INTERNAL_CONFIG_SIZE must be a multiple of FLASH_PAGE_SIZE. +#endif + +#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR % FLASH_PAGE_SIZE != 0 +#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be on a flash page boundary. +#endif +#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE % FLASH_PAGE_SIZE != 0 +#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be a multiple of FLASH_PAGE_SIZE. +#endif #if CIRCUITPY_FIRMWARE_SIZE < 0 #error No space left in flash for firmware after specifying other regions! diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals index bb26a4145..4c0deecf8 160000 --- a/ports/atmel-samd/peripherals +++ b/ports/atmel-samd/peripherals @@ -1 +1 @@ -Subproject commit bb26a4145c86a51debc6571bb1f791e0d4fd296b +Subproject commit 4c0deecf889da0074c1dbc9a5e2d24cb7c7a31c6 diff --git a/ports/cxd56/boards/spresense/mpconfigboard.mk b/ports/cxd56/boards/spresense/mpconfigboard.mk index a2d4e5d88..7b8ac6ff6 100644 --- a/ports/cxd56/boards/spresense/mpconfigboard.mk +++ b/ports/cxd56/boards/spresense/mpconfigboard.mk @@ -2,3 +2,5 @@ USB_VID = 0x054c USB_PID = 0x0bc2 USB_PRODUCT = "Spresense" USB_MANUFACTURER = "Sony" + +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile index b96b8affb..e7af13a73 100755 --- a/ports/nrf/Makefile +++ b/ports/nrf/Makefile @@ -63,8 +63,6 @@ ifneq ($(SD), ) include bluetooth/bluetooth_common.mk endif -FROZEN_MPY_DIR = freeze - CROSS_COMPILE = arm-none-eabi- FATFS_DIR = lib/oofatfs @@ -92,7 +90,7 @@ INC += -I../../supervisor/shared/usb ifeq ($(DEBUG), 1) CFLAGS += -ggdb3 -Og else - CFLAGS += -Os -DNDEBUG + CFLAGS += -Os -DNDEBUG -ggdb3 CFLAGS += -flto -flto-partition=none endif @@ -118,7 +116,7 @@ CFLAGS += \ # TODO: check this CFLAGS += -D__START=main -LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs +LDFLAGS = $(CFLAGS) -nostartfiles -fshort-enums -Wl,-nostdlib -Wl,-T,$(GENERATED_LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs LIBS := -lgcc -lc LDFLAGS += -mthumb -mcpu=cortex-m4 @@ -193,15 +191,16 @@ SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \ $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL)) -SRC_S = supervisor/cpu.s +# There may be duplicates between SRC_COMMON_HAL_EXPANDED and SRC_SHARED_MODULE_EXPANDED, +# because a few modules have files both in common-hal/ and shared-modules/. +# Doing a $(sort ...) removes duplicates as part of sorting. +SRC_COMMON_HAL_SHARED_MODULE_EXPANDED = $(sort $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED)) -FROZEN_MPY_PY_FILES := $(shell find -L $(FROZEN_MPY_DIR) -type f -name '*.py') -FROZEN_MPY_MPY_FILES := $(addprefix $(BUILD)/,$(FROZEN_MPY_PY_FILES:.py=.mpy)) +SRC_S = supervisor/cpu.s OBJ += $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_NRFX:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o)) -OBJ += $(addprefix $(BUILD)/, $(SRC_SHARED_MODULE_EXPANDED:.c=.o)) +OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_SHARED_MODULE_EXPANDED:.c=.o)) ifeq ($(INTERNAL_LIBM),1) OBJ += $(addprefix $(BUILD)/, $(SRC_LIBM:.c=.o)) endif @@ -219,19 +218,10 @@ SRC_QSTR_PREPROCESSOR += all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 -LD_FILE = $(BUILD)/$(notdir $(patsubst %.template.ld,%.ld,$(LD_TEMPLATE_FILE))) - -# ld_defines.pp is generated from ld_defines.c. See py/mkrules.mk. -# Run gen_ld_files.py over ALL *.template.ld files, not just LD_TEMPLATE_FILE, -# because it may include other template files. -$(LD_FILE): $(BUILD)/ld_defines.pp boards/*.template.ld - $(STEPECHO) "GEN $@" - $(Q)$(PYTHON3) $(TOP)/tools/gen_ld_files.py --defines $< --out_dir $(BUILD) boards/*.template.ld - -$(BUILD)/firmware.elf: $(OBJ) +$(BUILD)/firmware.elf: $(OBJ) $(GENERATED_LD_FILE) $(STEPECHO) "LINK $@" - $(Q)$(CC) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group - $(Q)$(SIZE) $@ | $(PYTHON3) $(TOP)/tools/build_memory_info.py $(LD_FILE) + $(Q)$(CC) -o $@ $(LDFLAGS) $(OBJ) -Wl,--start-group $(LIBS) -Wl,--end-group + $(Q)$(SIZE) $@ | $(PYTHON3) $(TOP)/tools/build_memory_info.py $(GENERATED_LD_FILE) $(BUILD)/firmware.bin: $(BUILD)/firmware.elf $(STEPECHO) "Create $@" @@ -273,7 +263,7 @@ else ifeq ($(FLASHER), pyocd) flash: $(BUILD)/firmware.hex pyocd-flashtool -t $(MCU_VARIANT) $< --sector_erase - #pyocd-tool -t $(MCU_VARIANT) erase $(BOOT_SETTING_ADDR) +# pyocd-tool -t $(MCU_VARIANT) erase $(BOOT_SETTING_ADDR) pyocd-tool -t $(MCU_VARIANT) write32 $(BOOT_SETTING_ADDR) 0x00000001 pyocd-tool -t $(MCU_VARIANT) reset diff --git a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h index 7ca9b12ae..5abb86820 100644 --- a/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h +++ b/ports/nrf/boards/circuitplayground_bluefruit/mpconfigboard.h @@ -30,9 +30,6 @@ #define MICROPY_HW_BOARD_NAME "Adafruit Circuit Playground Bluefruit" #define MICROPY_HW_MCU_NAME "nRF52840" -#define FLASH_SIZE (0x100000) -#define FLASH_PAGE_SIZE (4096) - #define MICROPY_HW_LED_STATUS (&pin_P1_14) // Unusually, board does not have a 32 kHz xtal. Nearly all boards do. diff --git a/ports/nrf/boards/common.template.ld b/ports/nrf/boards/common.template.ld index 9fd066de1..f26723492 100644 --- a/ports/nrf/boards/common.template.ld +++ b/ports/nrf/boards/common.template.ld @@ -9,11 +9,11 @@ MEMORY /* nRF SoftDevice */ FLASH_MBR (rx) : ORIGIN = ${MBR_START_ADDR}, LENGTH = ${MBR_SIZE} FLASH_SD (rx) : ORIGIN = ${SD_FLASH_START_ADDR}, LENGTH = ${SD_FLASH_SIZE} - FLASH_ISR (rx) : ORIGIN = ${CIRCUITPY_ISR_START_ADDR}, LENGTH = ${CIRCUITPY_ISR_LENGTH} + FLASH_ISR (rx) : ORIGIN = ${ISR_START_ADDR}, LENGTH = ${ISR_SIZE} FLASH_FIRMWARE (rx) : ORIGIN = ${CIRCUITPY_FIRMWARE_START_ADDR}, LENGTH = ${CIRCUITPY_FIRMWARE_SIZE} + FLASH_FATFS (r) : ORIGIN = ${CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE} FLASH_BLE_CONFIG (r) : ORIGIN = ${CIRCUITPY_BLE_CONFIG_START_ADDR}, LENGTH = ${CIRCUITPY_BLE_CONFIG_SIZE} FLASH_NVM (r) : ORIGIN = ${CIRCUITPY_INTERNAL_NVM_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_NVM_SIZE} - FLASH_FATFS (r) : ORIGIN = ${CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR}, LENGTH = ${CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE} FLASH_BOOTLOADER (rx) : ORIGIN = ${BOOTLOADER_START_ADDR}, LENGTH = ${BOOTLOADER_SIZE} FLASH_BOOTLOADER_SETTINGS (r) : ORIGIN = ${BOOTLOADER_SETTINGS_START_ADDR}, LENGTH = ${BOOTLOADER_SETTINGS_SIZE} RAM (xrw) : ORIGIN = 0x20004000, LENGTH = 0x03C000 /* 240 KiB */ @@ -32,10 +32,6 @@ _estack = ORIGIN(RAM) + LENGTH(RAM); _ram_end = ORIGIN(RAM) + LENGTH(RAM); _heap_end = 0x20020000; /* tunable */ -/* Flash region for File System */ -__fatfs_flash_start_addr = ORIGIN(FLASH_FATFS); -__fatfs_flash_length = LENGTH(FLASH_FATFS); - /* define output sections */ SECTIONS { diff --git a/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h index b388515e4..64988e1a2 100644 --- a/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h +++ b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h @@ -30,9 +30,6 @@ #define MICROPY_HW_BOARD_NAME "Adafruit Feather nRF52840 Express" #define MICROPY_HW_MCU_NAME "nRF52840" -#define FLASH_SIZE (0x100000) -#define FLASH_PAGE_SIZE (4096) - #define MICROPY_HW_NEOPIXEL (&pin_P0_16) #define MICROPY_HW_LED_STATUS (&pin_P1_15) diff --git a/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.h b/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.h index 2f17460ae..629463e4e 100644 --- a/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.h +++ b/ports/nrf/boards/itsybitsy_nrf52840_express/mpconfigboard.h @@ -3,9 +3,6 @@ #define MICROPY_HW_BOARD_NAME "Adafruit ItsyBitsy nRF52840 Express" #define MICROPY_HW_MCU_NAME "nRF52840" -#define FLASH_SIZE (0x100000) -#define FLASH_PAGE_SIZE (4096) - #define MICROPY_HW_LED_STATUS (&pin_P0_06) #define MICROPY_HW_APA102_MOSI (&pin_P0_08) diff --git a/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.h b/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.h index 5188a379f..837355154 100644 --- a/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.h +++ b/ports/nrf/boards/metro_nrf52840_express/mpconfigboard.h @@ -30,9 +30,6 @@ #define MICROPY_HW_BOARD_NAME "Adafruit Metro nRF52840 Express" #define MICROPY_HW_MCU_NAME "nRF52840" -#define FLASH_SIZE (0x100000) -#define FLASH_PAGE_SIZE (4096) - #define MICROPY_HW_NEOPIXEL (&pin_P0_13) #define MICROPY_HW_LED_STATUS (&pin_P1_13) diff --git a/ports/nrf/boards/pca10059/mpconfigboard.mk b/ports/nrf/boards/pca10059/mpconfigboard.mk index f9ff9c21c..3f97b0821 100644 --- a/ports/nrf/boards/pca10059/mpconfigboard.mk +++ b/ports/nrf/boards/pca10059/mpconfigboard.mk @@ -5,4 +5,4 @@ USB_MANUFACTURER = "Nordic Semiconductor" MCU_CHIP = nrf52840 -INTERNAL_FLASH_FILEYSTEM = 1 +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/ld_defines.c b/ports/nrf/ld_defines.c new file mode 100644 index 000000000..0ec6dfdb5 --- /dev/null +++ b/ports/nrf/ld_defines.c @@ -0,0 +1,39 @@ +// Fake source file used only to capture #define values for use in ld template files. +#include "mpconfigport.h" + +// For each value needed in the LD file, create a C-like line: +// /*NAME_OF_VALUE=*/ NAME_OF_VALUE; +// The C preprocessor will replace NAME_OF_VALUE with the actual value. +// This will be post-processed by tools/gen_ld_files.py to extract the name and value. + +// The next line is a marker to start looking for definitions. Lines above the next line are ignored. +// START_LD_DEFINES + +/*MBR_START_ADDR=*/ MBR_START_ADDR; +/*MBR_SIZE=*/ MBR_SIZE; + +/*SD_FLASH_START_ADDR=*/ SD_FLASH_START_ADDR; +/*SD_FLASH_SIZE=*/ SD_FLASH_SIZE; + +/*ISR_START_ADDR=*/ ISR_START_ADDR; +/*ISR_SIZE=*/ ISR_SIZE; + +/*CIRCUITPY_DEFAULT_STACK_SIZE=*/ CIRCUITPY_DEFAULT_STACK_SIZE; + +/*CIRCUITPY_FIRMWARE_START_ADDR=*/ CIRCUITPY_FIRMWARE_START_ADDR; +/*CIRCUITPY_FIRMWARE_SIZE=*/ CIRCUITPY_FIRMWARE_SIZE; + +/*CIRCUITPY_BLE_CONFIG_START_ADDR=*/ CIRCUITPY_BLE_CONFIG_START_ADDR; +/*CIRCUITPY_BLE_CONFIG_SIZE=*/ CIRCUITPY_BLE_CONFIG_SIZE; + +/*CIRCUITPY_INTERNAL_NVM_START_ADDR=*/ CIRCUITPY_INTERNAL_NVM_START_ADDR; +/*CIRCUITPY_INTERNAL_NVM_SIZE=*/ CIRCUITPY_INTERNAL_NVM_SIZE; + +/*CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR=*/ CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR; +/*CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE=*/ CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE; + +/*BOOTLOADER_START_ADDR=*/ BOOTLOADER_START_ADDR; +/*BOOTLOADER_SIZE=*/ BOOTLOADER_SIZE; + +/*BOOTLOADER_SETTINGS_START_ADDR=*/ BOOTLOADER_SETTINGS_START_ADDR; +/*BOOTLOADER_SETTINGS_SIZE=*/ BOOTLOADER_SETTINGS_SIZE; diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h index 00d4a51ad..d10f12f6a 100644 --- a/ports/nrf/mpconfigport.h +++ b/ports/nrf/mpconfigport.h @@ -30,8 +30,13 @@ #include "ble_drv.h" +#include "nrf_mbr.h" // for MBR_SIZE +#include "nrf_sdm.h" // for SD_FLASH_SIZE +#include "peripherals/nrf/nvm.h" // for FLASH_PAGE_SIZE + #ifdef NRF52840 #define MICROPY_PY_SYS_PLATFORM "nRF52840" +#define FLASH_SIZE (0x100000) // 1MiB #endif #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) @@ -45,11 +50,12 @@ // 24kiB stack #define CIRCUITPY_DEFAULT_STACK_SIZE 0x6000 -#if INTERNAL_FLASH_FILESYSTEM -#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (64*1024) -#else -#define CIRCUITPYINTERNAL_FLASH_FILESYSTEM_SIZE (0) -#endif +//////////////////////////////////////////////////////////////////////////////////////////////////// + +// This also includes mpconfigboard.h. +#include "py/circuitpy_mpconfig.h" + +// Definitions that might be overriden by mpconfigboard.h #ifndef CIRCUITPY_INTERNAL_NVM_SIZE #define CIRCUITPY_INTERNAL_NVM_SIZE (8192) @@ -60,14 +66,22 @@ #define BOARD_HAS_32KHZ_XTAL (1) #endif +#if INTERNAL_FLASH_FILESYSTEM + #ifndef CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE + #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (256*1024) + #endif +#else + #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) +#endif + // Flash layout, starting at 0x00000000 // // SoftDevice // ISR // firmware +// internal CIRCUITPY flash filesystem (optional) // BLE config (bonding info, etc.) (optional) // microntroller.nvm (optional) -// internal CIRCUITPY flash filesystem (optional) // bootloader (note the MBR at 0x0 redirects to the bootloader here, in high flash) // bootloader settings @@ -76,14 +90,14 @@ // Define these regions starting up from the bottom of flash: #define MBR_START_ADDR (0x0) -// MBR_SIZE is from nrf_sdm.h +// MBR_SIZE is from nrf_mbr.h #define SD_FLASH_START_ADDR (MBR_START_ADDR + MBR_SIZE) // SD_FLASH_SIZE is from nrf_sdm.h -#define ISR_FLASH_START_ADDR (SD_FLASH_START_ADDR + SD_FLASH_SIZE) -#define ISR_FLASH_SIZE (0x1000) // 4kiB +#define ISR_START_ADDR (SD_FLASH_START_ADDR + SD_FLASH_SIZE) +#define ISR_SIZE (0x1000) // 4kiB -#define CIRCUITPY_FIRMWARE_START_ADDR (ISR_FLASH_START_ADDR + ISR_FLASH_LENGTH) +#define CIRCUITPY_FIRMWARE_START_ADDR (ISR_START_ADDR + ISR_SIZE) // Define these regions starting down from the bootloader: @@ -92,22 +106,52 @@ #define BOOTLOADER_SETTINGS_START_ADDR (0x000FF000) #define BOOTLOADER_SETTINGS_SIZE (0x1000) // 4kiB -#define FLASH_FATFS_SIZE (256*1024) -#define FLASH_FATFS_START_ADDR (BOOTLOADER_START_ADDR - FLASH_FATFS_SIZE) - -#define CIRCUITPY_INTERNAL_NVM_START_ADDR (FLASH_FATFS_START_ADDR - CIRCUITPY_INTERNAL_NVM_SIZE) +#define CIRCUITPY_INTERNAL_NVM_START_ADDR (BOOTLOADER_START_ADDR - CIRCUITPY_INTERNAL_NVM_SIZE) +// 32kiB for bonding, etc. #define CIRCUITPY_BLE_CONFIG_SIZE (32*1024) #define CIRCUITPY_BLE_CONFIG_START_ADDR (CIRCUITPY_INTERNAL_NVM_START_ADDR - CIRCUITPY_BLE_CONFIG_SIZE) +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR (CIRCUITPY_BLE_CONFIG_START_ADDR - CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE) + // The firmware space is the space left over between the fixed lower and upper regions. -#define CIRCUITPY_FIRMWARE_SIZE (CIRCUITPY_BLE_CONFIG_START_ADDR - CIRCUITPY_FIRMWARE_START_ADDR) +#define CIRCUITPY_FIRMWARE_SIZE (CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR - CIRCUITPY_FIRMWARE_START_ADDR) + +#if BOOTLOADER_START_ADDR % FLASH_PAGE_SIZE != 0 +#error BOOTLOADER_START_ADDR must be on a flash page boundary. +#endif + +#if CIRCUITPY_INTERNAL_NVM_START_ADDR % FLASH_PAGE_SIZE != 0 +#error CIRCUITPY_INTERNAL_NVM_START_ADDR must be on a flash page boundary. +#endif +#if CIRCUITPY_INTERNAL_NVM_SIZE % FLASH_PAGE_SIZE != 0 +#error CIRCUITPY_INTERNAL_NVM_SIZE must be a multiple of FLASH_PAGE_SIZE. +#endif + +#if CIRCUITPY_BLE_CONFIG_START_ADDR % FLASH_PAGE_SIZE != 0 +#error CIRCUITPY_BLE_CONFIG_SIZE must be on a flash page boundary. +#endif +#if CIRCUITPY_BLE_CONFIG_SIZE % FLASH_PAGE_SIZE != 0 +#error CIRCUITPY_BLE_CONFIG_SIZE must be a multiple of FLASH_PAGE_SIZE. +#endif + +#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR % FLASH_PAGE_SIZE != 0 +#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be on a flash page boundary. +#endif +#if CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE % FLASH_PAGE_SIZE != 0 +#error CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE must be a multiple of FLASH_PAGE_SIZE. +#endif #if CIRCUITPY_FIRMWARE_SIZE < 0 #error No space left in flash for firmware after specifying other regions! #endif -#include "py/circuitpy_mpconfig.h" +#if CIRCUITPY_FIRMWARE_SIZE < 0 +#error No space left in flash for firmware after specifying other regions! +#endif + + + #define MICROPY_PORT_ROOT_POINTERS \ CIRCUITPY_COMMON_ROOT_POINTERS \ diff --git a/ports/nrf/mpconfigport.mk b/ports/nrf/mpconfigport.mk index 47cabffb5..9b738d4b3 100644 --- a/ports/nrf/mpconfigport.mk +++ b/ports/nrf/mpconfigport.mk @@ -53,7 +53,7 @@ CIRCUITPY_FREQUENCYIO = 0 # nRF52840-specific -ifeq($(MCU_CHIP),nrf52840) +ifeq ($(MCU_CHIP),nrf52840) MCU_SERIES = m4 MCU_VARIANT = nrf52 MCU_SUB_VARIANT = nrf52840 diff --git a/ports/nrf/supervisor/internal_flash.c b/ports/nrf/supervisor/internal_flash.c index c43454eb3..07aa5079f 100644 --- a/ports/nrf/supervisor/internal_flash.c +++ b/ports/nrf/supervisor/internal_flash.c @@ -42,10 +42,6 @@ #include "nrf_sdm.h" #endif -// defined in linker -extern uint32_t __fatfs_flash_start_addr[]; -extern uint32_t __fatfs_flash_length[]; - #define NO_CACHE 0xffffffff uint8_t _flash_cache[FLASH_PAGE_SIZE] __attribute__((aligned(4))); @@ -56,7 +52,7 @@ uint32_t _flash_page_addr = NO_CACHE; /* Internal Flash API *------------------------------------------------------------------*/ static inline uint32_t lba2addr(uint32_t block) { - return ((uint32_t)__fatfs_flash_start_addr) + block * FILESYSTEM_BLOCK_SIZE; + return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_START_ADDR + block * FILESYSTEM_BLOCK_SIZE; } void supervisor_flash_init(void) { @@ -67,7 +63,7 @@ uint32_t supervisor_flash_get_block_size(void) { } uint32_t supervisor_flash_get_block_count(void) { - return ((uint32_t) __fatfs_flash_length) / FILESYSTEM_BLOCK_SIZE ; + return CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE / FILESYSTEM_BLOCK_SIZE ; } void supervisor_flash_flush(void) { diff --git a/py/circuitpy_defns.mk b/py/circuitpy_defns.mk index 34c097e36..265b552bb 100644 --- a/py/circuitpy_defns.mk +++ b/py/circuitpy_defns.mk @@ -402,6 +402,18 @@ $(addprefix lib/,\ ) endif +ifdef LD_TEMPLATE_FILE +# Generate a linker script (.ld file) from a template, for those builds that use it. +GENERATED_LD_FILE = $(BUILD)/$(notdir $(patsubst %.template.ld,%.ld,$(LD_TEMPLATE_FILE))) +# +# ld_defines.pp is generated from ld_defines.c. See py/mkrules.mk. +# Run gen_ld_files.py over ALL *.template.ld files, not just LD_TEMPLATE_FILE, +# because it may include other template files. +$(GENERATED_LD_FILE): $(BUILD)/ld_defines.pp boards/*.template.ld + $(STEPECHO) "GEN $@" + $(Q)$(PYTHON3) $(TOP)/tools/gen_ld_files.py --defines $< --out_dir $(BUILD) boards/*.template.ld +endif + .PHONY: check-release-needs-clean-build check-release-needs-clean-build: diff --git a/supervisor/supervisor.mk b/supervisor/supervisor.mk index 87d506b3b..96a14c25b 100644 --- a/supervisor/supervisor.mk +++ b/supervisor/supervisor.mk @@ -25,14 +25,12 @@ CFLAGS += -DINTERNAL_FLASH_FILESYSTEM=$(INTERNAL_FLASH_FILESYSTEM) ifndef QSPI_FLASH_FILESYSTEM QSPI_FLASH_FILESYSTEM = 0 endif -# EXPRESS_BOARD is obsolete and should be removed when samd-peripherals is updated. -CFLAGS += -DQSPI_FLASH_FILESYSTEM=$(QSPI_FLASH_FILESYSTEM) -DEXPRESS_BOARD +CFLAGS += -DQSPI_FLASH_FILESYSTEM=$(QSPI_FLASH_FILESYSTEM) ifndef SPI_FLASH_FILESYSTEM SPI_FLASH_FILESYSTEM = 0 endif -# EXPRESS_BOARD is obsolete and should be removed when samd-peripherals is updated. -CFLAGS += -DSPI_FLASH_FILESYSTEM=$(SPI_FLASH_FILESYSTEM) -DEXPRESS_BOARD +CFLAGS += -DSPI_FLASH_FILESYSTEM=$(SPI_FLASH_FILESYSTEM) ifeq ($(CIRCUITPY_BLEIO),1) SRC_SUPERVISOR += supervisor/shared/bluetooth.c diff --git a/tools/build_memory_info.py b/tools/build_memory_info.py index f128561ab..afe49650e 100644 --- a/tools/build_memory_info.py +++ b/tools/build_memory_info.py @@ -41,7 +41,8 @@ data = 0 bss = 0 # stdin is the linker output. for line in sys.stdin: - print(line) + # Uncomment to see linker output. + # print(line) line = line.strip() if not line.startswith("text"): text, data, bss = map(int, line.split()[:3]) @@ -51,7 +52,7 @@ regions = {} with open(sys.argv[1], "r") as f: for line in f: line = line.strip() - if line.startswith(("FLASH_FIRMWARE", "RAM")): + if line.startswith(("FLASH_FIRMWARE", "FLASH", "RAM")): regions[line.split()[0]] = line.split("=")[-1] for region in regions: @@ -62,10 +63,17 @@ for region in regions: space = M_PATTERN.sub(M_REPLACE, space) regions[region] = eval(space) -free_flash = regions["FLASH_FIRMWARE"] - text - data -free_ram = regions["RAM"] - data - bss -print("{} bytes free in flash firmware space out of {} bytes ({}kB).".format(free_flash, regions["FLASH_FIRMWARE"], regions["FLASH_FIRMWARE"] / 1024)) -print("{} bytes free in ram for heap out of {} bytes ({}kB).".format(free_ram, regions["RAM"], regions["RAM"] / 1024)) +# TODO Remove check for both FLASH_FIRMWARE and FLASH after all ports are converted to use FLASH_FIRMWARE. +try: + firmware_region = regions["FLASH_FIRMWARE"] +except KeyError: + firmware_region = regions["FLASH"] +ram_region = regions["RAM"] + +free_flash = firmware_region - text - data +free_ram = ram_region - data - bss +print("{} bytes free in flash firmware space out of {} bytes ({}kB).".format(free_flash, firmware_region, firmware_region / 1024)) +print("{} bytes free in ram for heap out of {} bytes ({}kB).".format(free_ram, ram_region, ram_region / 1024)) print() # Check that we have free flash space. GCC doesn't fail when the text + data -- cgit v1.2.3 From d9ca4c9a608c08585e37eba88f86a1d89e1335e4 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Tue, 10 Dec 2019 22:39:44 -0500 Subject: fix build failures --- .../boards/kicksat-sprite/mpconfigboard.h | 2 - .../boards/kicksat-sprite/mpconfigboard.mk | 1 - ports/atmel-samd/mpconfigport.h | 64 ++++++++++++++-------- .../boards/electronut_labs_papyr/mpconfigboard.mk | 2 +- .../mpconfigboard.mk | 2 +- ports/nrf/mpconfigport.h | 4 -- tools/build_memory_info.py | 2 +- 7 files changed, 44 insertions(+), 33 deletions(-) (limited to 'tools') diff --git a/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.h b/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.h index 6664524d2..4d911ad64 100644 --- a/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.h +++ b/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.h @@ -10,8 +10,6 @@ #define MICROPY_PORT_C (0) #define MICROPY_PORT_D (0) -#define CALIBRATE_CRYSTALLESS 1 - #define CIRCUITPY_INTERNAL_NVM_SIZE 0 #define DEFAULT_I2C_BUS_SCL (&pin_PA17) diff --git a/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.mk b/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.mk index b89469776..df1a2d8eb 100644 --- a/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.mk +++ b/ports/atmel-samd/boards/kicksat-sprite/mpconfigboard.mk @@ -6,7 +6,6 @@ USB_MANUFACTURER = "maholli" CHIP_VARIANT = SAMD51G19A CHIP_FAMILY = samd51 -QSPI_FLASH_FILESYSTEM = 0 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h index 6ab95c8a5..a319c6199 100644 --- a/ports/atmel-samd/mpconfigport.h +++ b/ports/atmel-samd/mpconfigport.h @@ -30,15 +30,11 @@ // Definitions for which SAMD chip we're using. #include "include/sam.h" +// Definitions that control circuitpy_mpconfig.h: //////////////////////////////////////////////////////////////////////////////////////////////////// -#ifdef SAMD21 -#if INTERNAL_FLASH_FILESYSTEM -#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (64*1024) -#else -#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) -#endif +#ifdef SAMD21 // HMCRAMC0_SIZE is defined in the ASF4 include files for each SAMD21 chip. #define RAM_SIZE HMCRAMC0_SIZE @@ -66,29 +62,12 @@ X(EISDIR) \ X(EINVAL) \ -#ifndef CIRCUITPY_INTERNAL_NVM_SIZE -#define CIRCUITPY_INTERNAL_NVM_SIZE (256) -#endif - #endif // SAMD21 //////////////////////////////////////////////////////////////////////////////////////////////////// #ifdef SAMD51 -#ifndef CIRCUITPY_INTERNAL_NVM_SIZE -#define CIRCUITPY_INTERNAL_NVM_SIZE (8192) -#endif - -// If CIRCUITPY is internal, use half of flash for it. -#if INTERNAL_FLASH_FILESYSTEM - #ifndef CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE - #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (FLASH_SIZE/2) - #endif -#else - #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) -#endif - // HSRAM_SIZE is defined in the ASF4 include files for each SAMD51 chip. #define RAM_SIZE HSRAM_SIZE #define BOOTLOADER_SIZE (16*1024) @@ -113,6 +92,45 @@ // This also includes mpconfigboard.h. #include "py/circuitpy_mpconfig.h" +// Definitions that can be overridden by mpconfigboard.h: + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +#ifdef SAMD21 + +#if INTERNAL_FLASH_FILESYSTEM +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (64*1024) +#else +#define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) +#endif + +#ifndef CIRCUITPY_INTERNAL_NVM_SIZE +#define CIRCUITPY_INTERNAL_NVM_SIZE (256) +#endif + +#endif // SAMD21 + +//////////////////////////////////////////////////////////////////////////////////////////////////// + +#ifdef SAMD51 + +#ifndef CIRCUITPY_INTERNAL_NVM_SIZE +#define CIRCUITPY_INTERNAL_NVM_SIZE (8192) +#endif + +// If CIRCUITPY is internal, use half of flash for it. +#if INTERNAL_FLASH_FILESYSTEM + #ifndef CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE + #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (FLASH_SIZE/2) + #endif +#else + #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) +#endif + +#endif // SAMD51 + +//////////////////////////////////////////////////////////////////////////////////////////////////// + #ifndef CALIBRATE_CRYSTALLESS #define CALIBRATE_CRYSTALLESS (0) #endif diff --git a/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.mk b/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.mk index be7175e4e..569dccc9c 100644 --- a/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.mk +++ b/ports/nrf/boards/electronut_labs_papyr/mpconfigboard.mk @@ -5,4 +5,4 @@ USB_MANUFACTURER = "Electronut Labs" MCU_CHIP = nrf52840 -INTERNAL_FLASH_FILEYSTEM = 1 +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.mk b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.mk index 0a29c54e5..55ca410d9 100644 --- a/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.mk +++ b/ports/nrf/boards/makerdiary_nrf52840_mdk_usb_dongle/mpconfigboard.mk @@ -5,4 +5,4 @@ USB_MANUFACTURER = "makerdiary" MCU_CHIP = nrf52840 -INTERNAL_FLASH_FILEYSTEM = 1 +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/mpconfigport.h b/ports/nrf/mpconfigport.h index d10f12f6a..c6d148234 100644 --- a/ports/nrf/mpconfigport.h +++ b/ports/nrf/mpconfigport.h @@ -146,10 +146,6 @@ #error No space left in flash for firmware after specifying other regions! #endif -#if CIRCUITPY_FIRMWARE_SIZE < 0 -#error No space left in flash for firmware after specifying other regions! -#endif - diff --git a/tools/build_memory_info.py b/tools/build_memory_info.py index afe49650e..f61b843ce 100644 --- a/tools/build_memory_info.py +++ b/tools/build_memory_info.py @@ -61,7 +61,7 @@ for region in regions: space = space.split("/*")[0] space = K_PATTERN.sub(K_REPLACE, space) space = M_PATTERN.sub(M_REPLACE, space) - regions[region] = eval(space) + regions[region] = int(eval(space)) # TODO Remove check for both FLASH_FIRMWARE and FLASH after all ports are converted to use FLASH_FIRMWARE. try: -- cgit v1.2.3 From d67a9a827111114c1984390fd303e9812af6654c Mon Sep 17 00:00:00 2001 From: Melissa LeBlanc-Williams Date: Wed, 11 Dec 2019 11:41:10 -0800 Subject: Added PyPortal Pynt alias --- tools/build_board_info.py | 1 + 1 file changed, 1 insertion(+) (limited to 'tools') diff --git a/tools/build_board_info.py b/tools/build_board_info.py index 710cdb0c2..7c4484a65 100644 --- a/tools/build_board_info.py +++ b/tools/build_board_info.py @@ -49,6 +49,7 @@ extension_by_board = { aliases_by_board = { "circuitplayground_express": ["circuitplayground_express_4h", "circuitplayground_express_digikey_pycon2019"], "pybadge": ["edgebadge"], + "pyportal": ["pyportal_pynt"], "gemma_m0": ["gemma_m0_pycon2018"], "pewpew10": ["pewpew13"] } -- cgit v1.2.3