Merge pull request #2568 from hierophect/stm32-loader-linkers

STM32: UF2 build option for STM32F405

13 files changed, 174 insertions, 75 deletions

diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile
index ccadeac8a..3a6191c85 100755
--- a/ports/stm32f4/Makefile
+++ b/ports/stm32f4/Makefile
@@ -26,11 +26,11 @@
 
 # Select the board to build for.
 ifeq ($(BOARD),)
-  $(error You must provide a BOARD parameter)
+	$(error You must provide a BOARD parameter)
 else
-  ifeq ($(wildcard boards/$(BOARD)/.),)
-    $(error Invalid BOARD specified)
-  endif
+	ifeq ($(wildcard boards/$(BOARD)/.),)
+		$(error Invalid BOARD specified)
+	endif
 endif
 
 # If the build directory is not given, make it reflect the board name.
@@ -80,19 +80,16 @@ INC += -I../../supervisor/shared/usb
 
 #Debugging/Optimization
 ifeq ($(DEBUG), 1)
-  CFLAGS += -ggdb
-  # You may want to enable these flags to make setting breakpoints easier.
-  CFLAGS += -fno-inline -fno-ipa-sra
+	CFLAGS += -ggdb
+	# You may want to enable these flags to make setting breakpoints easier.
+	CFLAGS += -fno-inline -fno-ipa-sra
 else
-  CFLAGS += -Os -DNDEBUG
-  CFLAGS += -ggdb
-  # TODO: Test with -flto
-  ### CFLAGS += -flto
+	CFLAGS += -Os -DNDEBUG
+	CFLAGS += -ggdb
+	# TODO: Test with -flto
+	### CFLAGS += -flto
 endif
 
-ifndef BOOTLOADER_OFFSET
-	BOOTLOADER_OFFSET := 0x8000000
-endif
 
 C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(CMSIS_MCU)
 
@@ -115,6 +112,22 @@ CFLAGS += \
 # TODO: check this
 CFLAGS += -D__START=main
 
+#need both command and valid file to use uf2 bootloader
+ifndef LD_FILE
+    ifneq ($(and $(UF2_BOOTLOADER),$(LD_BOOT)),)
+        LD_FILE = $(LD_BOOT)
+        BOOTLOADER_OFFSET = $(UF2_OFFSET)
+        CFLAGS += -DUF2_BOOTLOADER_ENABLED
+    else
+        LD_FILE = $(LD_DEFAULT)
+    endif
+endif
+
+# Add bootloader specific items
+ifndef BOOTLOADER_OFFSET
+	BOOTLOADER_OFFSET := 0x8000000
+endif
+
 LDFLAGS = $(CFLAGS) -fshort-enums -Wl,-nostdlib -Wl,-T,$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nano.specs
 LIBS := -lgcc -lc
 
@@ -210,12 +223,12 @@ SRC_S = \
 	boards/startup_$(MCU_SUB_VARIANT).s
 
 SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \
-                          $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \
-                          $(addprefix common-hal/, $(SRC_COMMON_HAL))
+						  $(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \
+						  $(addprefix common-hal/, $(SRC_COMMON_HAL))
 
 SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) \
-                             $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \
-                             $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL))
+							 $(addprefix shared-module/, $(SRC_SHARED_MODULE)) \
+							 $(addprefix shared-module/, $(SRC_SHARED_MODULE_INTERNAL))
 
 
 ifneq ($(FROZEN_MPY_DIR),)
diff --git a/ports/stm32f4/boards/STM32F401_boot.ld b/ports/stm32f4/boards/STM32F401_boot.ld
index ffdd7097c..125d785fc 100644
--- a/ports/stm32f4/boards/STM32F401_boot.ld
+++ b/ports/stm32f4/boards/STM32F401_boot.ld
@@ -5,9 +5,9 @@
 /* Specify the memory areas */
 MEMORY
 {
-    FLASH (rx)      : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */
-    FLASH_ISR (rx)  : ORIGIN = 0x08010000, LENGTH = 64K 
-    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */
+    FLASH (rx)      : ORIGIN = 0x08010000, LENGTH = 512K - 64K  /* entire flash, sans bootloader region */
+    FLASH_ISR (rx)  : ORIGIN = 0x08010000, LENGTH = 64K         /* sector 4 */
+    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K        /* sectors 5,6,7 are 128K */
     RAM (xrw)       : ORIGIN = 0x20000194, LENGTH = 96K - 0x194
 }
 
diff --git a/ports/stm32f4/boards/STM32F405_boot.ld b/ports/stm32f4/boards/STM32F405_boot.ld
new file mode 100644
index 000000000..64da3b652
--- /dev/null
+++ b/ports/stm32f4/boards/STM32F405_boot.ld
@@ -0,0 +1,107 @@
+/*
+    GNU linker script for STM32F405 with bootloader
+    Based on Micropython
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x08010000, LENGTH = 1024K - 64K         /* entire flash, sans bootloader region */
+    FLASH_ISR (rx)  : ORIGIN = 0x08010000, LENGTH = 64K                 /* sector 0 */
+    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 1024K - 64K - 64K   /* sectors 5+ */
+    CCMRAM (xrw)    : ORIGIN = 0x10000000, LENGTH = 64K
+    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 128K
+}
+
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 16K;
+
+/* Define the top end of the stack.  The stack is full descending so begins just
+   above last byte of RAM.  Note that EABI requires the stack to be 8-byte
+   aligned for a call. */
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_start = ORIGIN(RAM);
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+
+ENTRY(Reset_Handler)
+
+/* define output sections */
+SECTIONS
+{
+    /* The startup code goes first into FLASH */
+    .isr_vector :
+    {
+        . = ALIGN(4);
+        KEEP(*(.isr_vector)) /* Startup code */
+
+        /* This first flash block is 16K annd the isr vectors only take up
+           about 400 bytes. Micropython pads this with files, but this didn't
+           work with the size of Circuitpython's ff object. */
+
+        . = ALIGN(4);
+    } >FLASH_ISR
+
+    /* The program code and other data goes into FLASH */
+    .text :
+    {
+        . = ALIGN(4);
+        *(.text*)          /* .text* sections (code) */
+        *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    /*  *(.glue_7)   */    /* glue arm to thumb code */
+    /*  *(.glue_7t)  */    /* glue thumb to arm code */
+
+        . = ALIGN(4);
+        _etext = .;        /* define a global symbol at end of code */
+    } >FLASH_TEXT
+
+    /* used by the startup to initialize data */
+    _sidata = LOADADDR(.data);
+
+    /* This is the initialized data section
+    The program executes knowing that the data is in the RAM
+    but the loader puts the initial values in the FLASH (inidata).
+    It is one task of the startup to copy the initial values from FLASH to RAM. */
+    .data :
+    {
+        . = ALIGN(4);
+        _sdata = .;        /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
+        *(.data*)          /* .data* sections */
+
+        . = ALIGN(4);
+        _edata = .;        /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
+    } >RAM AT> FLASH_TEXT
+
+    /* Uninitialized data section */
+    .bss :
+    {
+        . = ALIGN(4);
+        _sbss = .;         /* define a global symbol at bss start; used by startup code */
+        *(.bss*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        _ebss = .;         /* define a global symbol at bss end; used by startup code and GC */
+    } >RAM
+
+    /* this is to define the start of the heap, and make sure we have a minimum size */
+    .heap :
+    {
+        . = ALIGN(4);
+        . = . + _minimum_heap_size;
+        . = ALIGN(4);
+    } >RAM
+
+    /* this just checks there is enough RAM for the stack */
+    .stack :
+    {
+        . = ALIGN(4);
+        . = . + _minimum_stack_size;
+        . = ALIGN(4);
+    } >RAM
+
+    .ARM.attributes 0 : { *(.ARM.attributes) }
+}
+
diff --git a/ports/stm32f4/boards/STM32F401.ld b/ports/stm32f4/boards/STM32F405_default.ld
index bf1f21cf6..c2b8c843e 100644
--- a/ports/stm32f4/boards/STM32F401.ld
+++ b/ports/stm32f4/boards/STM32F405_default.ld
@@ -1,39 +1,29 @@
 /*
-    GNU linker script for STM32F401 with bootloader (from Meowbit Micropython)
-    Doesn't work: 
-
-    Traceback (most recent call last):
-  File "../../tools/build_memory_info.py", line 64, in <module>
-    regions[region] = int(eval(space))
-  File "<string>", line 1, in <module>
-NameError: name 'FLASH_ISR' is not defined
+    GNU linker script for STM32F405 via Micropython
 */
 
 /* Specify the memory areas */
-/*     FLASH_FS (rx)   : ORIGIN = 0x08020000, LENGTH = 128K */
-/* sectors 5 128K */
 MEMORY
 {
-    FLASH (rx)      : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */
-    FLASH_ISR (rx)  : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4, sec 0~3 reserved for booloader */
-    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5, 6,7 are 128K */
-    RAM (xrw)       : ORIGIN = 0x20000194, LENGTH = 96K - 0x194
+    FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */
+    FLASH_ISR (rx)  : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
+    FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 1008K /* sectors 0-7*/
+    CCMRAM (xrw)    : ORIGIN = 0x10000000, LENGTH = 64K
+    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 128K
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
 _minimum_stack_size = 2K;
 _minimum_heap_size = 16K;
 
-/* Define the stack.  The stack is full descending so begins just above last byte
-   of RAM.  Note that EABI requires the stack to be 8-byte aligned for a call. */
-_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
-_sstack = _estack - 16K; /* tunable */
+/* Define tho top end of the stack.  The stack is full descending so begins just
+   above last byte of RAM.  Note that EABI requires the stack to be 8-byte
+   aligned for a call. */
+_estack = ORIGIN(RAM) + LENGTH(RAM);
 
 /* RAM extents for the garbage collector */
 _ram_start = ORIGIN(RAM);
 _ram_end = ORIGIN(RAM) + LENGTH(RAM);
-_heap_start = _ebss; /* heap starts just after statically allocated memory */
-_heap_end = _sstack;
 
 ENTRY(Reset_Handler)
 
@@ -47,25 +37,8 @@ SECTIONS
         KEEP(*(.isr_vector)) /* Startup code */
 
         /* This first flash block is 16K annd the isr vectors only take up
-           about 400 bytes. So we pull in a couple of object files to pad it
-           out. */
-
-        . = ALIGN(4);
-
-        /* NOTE: If you update the list of files contained in .isr_vector,
-                 then be sure to also update smhal/Makefile where it forcibly
-           builds each of these files with -Os */
-
-        */ff.o(.text*)
-        */vfs_fat_*.o(.text*)
-        */py/formatfloat.o(.text*)
-        */py/parsenum.o(.text*)
-        */py/mpprint.o(.text*)
-
-        */py/compile.o(.text*)
-        */py/objset.o(.text*)
-        */py/mpz.o(.text*)
-        */py/vm.o(.text*)
+           about 400 bytes. Micropython pads this with files, but this didn't
+           work with the size of Circuitpython's ff object. */
 
         . = ALIGN(4);
     } >FLASH_ISR
@@ -130,3 +103,5 @@ SECTIONS
 
     .ARM.attributes 0 : { *(.ARM.attributes) }
 }
+
+
diff --git a/ports/stm32f4/boards/STM32F405.ld b/ports/stm32f4/boards/STM32F405_fs.ld
index 7f7c91784..7f7c91784 100644
--- a/ports/stm32f4/boards/STM32F405.ld
+++ b/ports/stm32f4/boards/STM32F405_fs.ld
diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h
index a1d83a25a..ad9bba7b0 100644
--- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h
+++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.h
@@ -40,6 +40,11 @@
 #define SPI_FLASH_SCK_PIN           (&pin_PB03)
 #define SPI_FLASH_CS_PIN            (&pin_PA15)
 
+// Bootloader only
+#ifdef UF2_BOOTLOADER_ENABLED
+    #define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader
+#endif
+
 #define DEFAULT_I2C_BUS_SCL (&pin_PB06)
 #define DEFAULT_I2C_BUS_SDA (&pin_PB07)
 
diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk
index 5bad4e81f..312ca6b48 100644
--- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk
+++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk
@@ -14,6 +14,9 @@ MCU_VARIANT = stm32f4
 MCU_SUB_VARIANT = stm32f405xx
 MCU_PACKAGE = 64
 CMSIS_MCU = STM32F405xx
-LD_FILE = boards/STM32F405.ld
-TEXT0_ADDR = 0x08000000
-TEXT1_ADDR = 0x08010000
\ No newline at end of file
+
+# Default includes filesystem, but uses external flash
+LD_DEFAULT = boards/STM32F405_default.ld 
+LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option
+UF2_OFFSET = 0x8010000
+
diff --git a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk
index 340fd9d3b..dce69276d 100644
--- a/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk
+++ b/ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk
@@ -20,4 +20,5 @@ MCU_SUB_VARIANT = stm32f401xe
 MCU_PACKAGE = 64
 CMSIS_MCU = STM32F401xE
 LD_FILE = boards/STM32F401_boot.ld 
-# LD_FILE = boards/STM32F401_fs.ld #use for internal flash
\ No newline at end of file
+# LD_FILE = boards/STM32F401_fs.ld # use for internal flash
+
diff --git a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk
index d46ee0b08..a8472608b 100644
--- a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk
+++ b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk
@@ -15,5 +15,4 @@ MCU_SUB_VARIANT = stm32f411xe
 MCU_PACKAGE = 48
 CMSIS_MCU = STM32F411xE
 LD_FILE = boards/STM32F411VETx_FLASH.ld
-TEXT0_ADDR = 0x08000000
-TEXT1_ADDR = 0x08020000
\ No newline at end of file
+
diff --git a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk
index a01ff7923..ef1b8f0ca 100644
--- a/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk
+++ b/ports/stm32f4/boards/pyboard_v11/mpconfigboard.mk
@@ -12,6 +12,5 @@ MCU_VARIANT = stm32f4
 MCU_SUB_VARIANT = stm32f405xx
 MCU_PACKAGE = 64
 CMSIS_MCU = STM32F405xx
-LD_FILE = boards/STM32F405.ld
-TEXT0_ADDR = 0x08000000
-TEXT1_ADDR = 0x08010000
+LD_FILE = boards/STM32F405_fs.ld
+
diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk
index d4f0f9577..68c6a1eea 100644
--- a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk
+++ b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk
@@ -18,5 +18,4 @@ MCU_SUB_VARIANT = stm32f411xe
 MCU_PACKAGE = 48
 CMSIS_MCU = STM32F411xE
 LD_FILE = boards/STM32F411VETx_FLASH.ld
-TEXT0_ADDR = 0x08000000
-TEXT1_ADDR = 0x08020000
+
diff --git a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk
index d6f369b6e..64e2b4dc5 100644
--- a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk
+++ b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.mk
@@ -13,5 +13,4 @@ MCU_SUB_VARIANT = stm32f411xe
 MCU_PACKAGE = 100
 CMSIS_MCU = STM32F411xE
 LD_FILE = boards/STM32F411VETx_FLASH.ld
-TEXT0_ADDR = 0x08000000
-TEXT1_ADDR = 0x08020000
\ No newline at end of file
+
diff --git a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk
index d642f243e..b0205fc73 100644
--- a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk
+++ b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk
@@ -18,6 +18,5 @@ MCU_SUB_VARIANT = stm32f412zx
 MCU_PACKAGE = 144
 CMSIS_MCU = STM32F412Zx
 LD_FILE = boards/STM32F412ZGTx_FLASH.ld
-TEXT0_ADDR = 0x08000000
-TEXT1_ADDR = 0x08020000
+