mimxrt10xx: Add info on clock config source

2 files changed, 4 insertions, 20 deletions

diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c
index 59f7bcd24..fa86b967a 100644
--- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c
@@ -66,16 +66,6 @@
 #define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL
 #define BOARD_BOOTCLOCKRUN_USBPHY_CLK 0UL
 
-/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
- */
-//extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
-/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
- */
-//extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
-/*! @brief Enet PLL set for BOARD_BootClockRUN configuration.
- */
-//extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN;
-
 const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN = {
     .loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
     .numerator   = 0, /* 30 bit numerator of fractional loop divider */
@@ -90,6 +80,8 @@ const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN = {
     .enableClkOutput500M = true, /* Enable the PLL providing the ENET 500MHz reference clock */
     .src                 = 0,    /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
 };
+
+// Based on the hello_world example in the SDK
 void clocks_init(void) {
     /* Init RTC OSC clock frequency. */
     CLOCK_SetRtcXtalFreq(32768U);
diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c
index 422834529..7f54ced0f 100644
--- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c
+++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c
@@ -33,16 +33,6 @@
 #define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
 #define BOARD_BOOTCLOCKRUN_CORE_CLOCK             600000000U  /*!< Core clock frequency: 600000000Hz */
 
-/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
- */
-//extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
-/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
- */
-//extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
-/*! @brief Enet PLL set for BOARD_BootClockRUN configuration.
- */
-//extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN;
-
 const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
     {
         .loopDivider = 100,                       /* PLL loop divider, Fout = Fin * 50 */
@@ -60,6 +50,8 @@ const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
         .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
         .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
     };
+
+// Based on the hello_world example in the SDK
 void clocks_init(void) {
     /* Init RTC OSC clock frequency. */
     CLOCK_SetRtcXtalFreq(32768U);