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| author | Dan Halbert <halbert@adafruit.com> | 2020-12-07 23:27:24 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-12-07 23:27:24 -0500 |
| commit | 7250925b98a111c1c701424f31ac2f3664f4c9da (patch) | |
| tree | ea0b7e862d7be3d69a88c8ff76ebc39294d6a34e | |
| parent | 054eafd42f711099067eff7600f82ff043cf4b35 (diff) | |
| parent | 44b56f76c4a65617e8b477eb44cb35dab8624cb9 (diff) | |
Merge pull request #3802 from tannewt/fix_s2_safe_mode
Store safe mode state in the RTC.
| -rw-r--r-- | ports/esp32s2/supervisor/port.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c index 0841081de..6222cd290 100644 --- a/ports/esp32s2/supervisor/port.c +++ b/ports/esp32s2/supervisor/port.c @@ -54,8 +54,11 @@ #include "peripherals/rmt.h" #include "peripherals/pcnt.h" #include "peripherals/timer.h" +#include "components/esp_rom/include/esp_rom_uart.h" #include "components/heap/include/esp_heap_caps.h" +#include "components/xtensa/include/esp_debug_helpers.h" #include "components/soc/soc/esp32s2/include/soc/cache_memory.h" +#include "components/soc/soc/esp32s2/include/soc/rtc_cntl_reg.h" #define HEAP_SIZE (48 * 1024) @@ -78,6 +81,11 @@ safe_mode_t port_init(void) { args.name = "CircuitPython Tick"; esp_timer_create(&args, &_tick_timer); + #ifdef DEBUG + // Send the ROM output out of the UART. This includes early logs. + esp_rom_install_channel_putc(1, esp_rom_uart_putc); + #endif + heap = NULL; never_reset_module_internal_pins(); @@ -165,6 +173,7 @@ void reset_to_bootloader(void) { } void reset_cpu(void) { + esp_backtrace_print(100); esp_restart(); } @@ -204,10 +213,11 @@ bool port_has_fixed_stack(void) { // Place the word to save just after our BSS section that gets blanked. void port_set_saved_word(uint32_t value) { + REG_WRITE(RTC_CNTL_STORE0_REG, value); } uint32_t port_get_saved_word(void) { - return 0; + return REG_READ(RTC_CNTL_STORE0_REG); } uint64_t port_get_raw_ticks(uint8_t* subticks) { |
