summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorarturo182 <arturo182@tlen.pl>2018-02-07 23:41:21 +0100
committerarturo182 <arturo182@tlen.pl>2018-02-07 23:41:21 +0100
commita7cde0e49a2342ea1309c01d833a13714b684efe (patch)
tree09ee7cfc3fd8ba988a40ea68072963bfa2873c68
parent381f47bfb08a3a2dc492bfd0d6f2bffc295b6cd9 (diff)
nrf: Fix pca10040 support
Works with no SD, or s132 2.0.1 and 5.0.0.
-rw-r--r--ports/nrf/boards/nrf52832_512k_64k.ld9
-rw-r--r--ports/nrf/boards/nrf52832_512k_64k_s132_2.0.1.ld9
-rw-r--r--ports/nrf/boards/nrf52832_512k_64k_s132_5.0.0.ld28
-rw-r--r--ports/nrf/boards/pca10040/board.c44
-rw-r--r--ports/nrf/boards/pca10040/mpconfigboard.h3
-rw-r--r--ports/nrf/boards/pca10040/pins.c143
-rw-r--r--ports/nrf/boards/pca10040/pins.h35
7 files changed, 263 insertions, 8 deletions
diff --git a/ports/nrf/boards/nrf52832_512k_64k.ld b/ports/nrf/boards/nrf52832_512k_64k.ld
index afd7d359f..699811ce8 100644
--- a/ports/nrf/boards/nrf52832_512k_64k.ld
+++ b/ports/nrf/boards/nrf52832_512k_64k.ld
@@ -7,14 +7,15 @@ MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x080000 /* entire flash, 512 KiB */
FLASH_ISR (rx) : ORIGIN = 0x00000000, LENGTH = 0x001000 /* sector 0, 4 KiB */
- FLASH_TEXT (rx) : ORIGIN = 0x00001000, LENGTH = 0x07F000 /* 508 KiB */
+ FLASH_TEXT (rx) : ORIGIN = 0x00001000, LENGTH = 0x066000 /* 408 KiB */
+ FLASH_FATFS (r) : ORIGIN = 0x00067000, LENGTH = 0x019000 /* File system 100KB */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 0x010000 /* 64 KiB */
}
-
+
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
-_minimum_heap_size = 32K;
-
+_minimum_heap_size = 0;
+
/* top end of the stack */
/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
diff --git a/ports/nrf/boards/nrf52832_512k_64k_s132_2.0.1.ld b/ports/nrf/boards/nrf52832_512k_64k_s132_2.0.1.ld
index 05e1daa89..dbff5f987 100644
--- a/ports/nrf/boards/nrf52832_512k_64k_s132_2.0.1.ld
+++ b/ports/nrf/boards/nrf52832_512k_64k_s132_2.0.1.ld
@@ -7,14 +7,15 @@ MEMORY
{
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x080000 /* entire flash, 512 KiB */
FLASH_ISR (rx) : ORIGIN = 0x0001c000, LENGTH = 0x001000 /* sector 0, 4 KiB */
- FLASH_TEXT (rx) : ORIGIN = 0x0001d000, LENGTH = 0x060000 /* 396 KiB */
+ FLASH_TEXT (rx) : ORIGIN = 0x0001d000, LENGTH = 0x04A000 /* 296 KiB */
+ FLASH_FATFS (r) : ORIGIN = 0x00067000, LENGTH = 0x019000 /* File system 100KB */
RAM (xrw) : ORIGIN = 0x200039c0, LENGTH = 0x0c640 /* 49.5 KiB, give 8KiB headroom for softdevice */
}
-
+
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
-_minimum_heap_size = 16K;
-
+_minimum_heap_size = 0;
+
/* top end of the stack */
/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
diff --git a/ports/nrf/boards/nrf52832_512k_64k_s132_5.0.0.ld b/ports/nrf/boards/nrf52832_512k_64k_s132_5.0.0.ld
new file mode 100644
index 000000000..6d5fe63c9
--- /dev/null
+++ b/ports/nrf/boards/nrf52832_512k_64k_s132_5.0.0.ld
@@ -0,0 +1,28 @@
+/*
+ GNU linker script for NRF52 w/ s132 2.0.1 SoftDevice
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x080000 /* entire flash, 512 KiB */
+ FLASH_ISR (rx) : ORIGIN = 0x00023000, LENGTH = 0x001000 /* sector 0, 4 KiB */
+ FLASH_TEXT (rx) : ORIGIN = 0x00024000, LENGTH = 0x043000 /* 268 KiB */
+ FLASH_FATFS (r) : ORIGIN = 0x00067000, LENGTH = 0x019000 /* File system 100KB */
+ RAM (xrw) : ORIGIN = 0x200039c0, LENGTH = 0x0c640 /* 49.5 KiB, give 8KiB headroom for softdevice */
+}
+
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 0;
+
+/* top end of the stack */
+
+/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_end = 0x20007000; /* tunable */
+
+INCLUDE "boards/common.ld"
diff --git a/ports/nrf/boards/pca10040/board.c b/ports/nrf/boards/pca10040/board.c
new file mode 100644
index 000000000..5ad81c21d
--- /dev/null
+++ b/ports/nrf/boards/pca10040/board.c
@@ -0,0 +1,44 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <string.h>
+#include <stdbool.h>
+
+#include "nrf.h"
+
+#include "boards/board.h"
+
+void board_init(void) {
+
+}
+
+bool board_requests_safe_mode(void) {
+ return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/nrf/boards/pca10040/mpconfigboard.h b/ports/nrf/boards/pca10040/mpconfigboard.h
index 7c46aa381..5852881db 100644
--- a/ports/nrf/boards/pca10040/mpconfigboard.h
+++ b/ports/nrf/boards/pca10040/mpconfigboard.h
@@ -78,3 +78,6 @@
#define MICROPY_HW_PWM2_NAME "PWM2"
#define HELP_TEXT_BOARD_LED "1,2,3,4"
+
+#define PORT_HEAP_SIZE (32*1024)
+#define CIRCUITPY_AUTORELOAD_DELAY_MS 500
diff --git a/ports/nrf/boards/pca10040/pins.c b/ports/nrf/boards/pca10040/pins.c
new file mode 100644
index 000000000..f34f7ec8a
--- /dev/null
+++ b/ports/nrf/boards/pca10040/pins.c
@@ -0,0 +1,143 @@
+// This file was automatically generated by make-pins.py
+//
+// --af nrf52_af.csv
+// --board boards/pca10056/pins.csv
+// --prefix boards/nrf52_prefix.c
+
+// nrf52_prefix.c becomes the initial portion of the generated pins file.
+
+#include <stdio.h>
+
+#include "py/obj.h"
+#include "py/mphal.h"
+#include "pin.h"
+
+#define AF(af_idx, af_fn, af_unit, af_type, af_ptr) \
+{ \
+ { &pin_af_type }, \
+ .name = MP_QSTR_AF ## af_idx ## _ ## af_fn ## af_unit, \
+ .idx = (af_idx), \
+ .fn = AF_FN_ ## af_fn, \
+ .unit = (af_unit), \
+ .type = AF_PIN_TYPE_ ## af_fn ## _ ## af_type, \
+ .af_fn = (af_ptr) \
+}
+
+#define PIN(p_port, p_pin, p_af, p_adc_channel) \
+{ \
+ { &mcu_pin_type }, \
+ .name = MP_QSTR_ ## p_port ## p_pin, \
+ .port = PORT_ ## p_port, \
+ .pin = (p_pin), \
+ .num_af = (sizeof(p_af) / sizeof(pin_af_obj_t)), \
+ /*.pin_mask = (1 << p_pin), */\
+ .af = p_af, \
+ .adc_channel = p_adc_channel,\
+}
+
+#define NO_ADC 0
+
+const pin_obj_t pin_A0 = PIN(A, 0, NULL, 0);
+const pin_obj_t pin_A1 = PIN(A, 1, NULL, 0);
+const pin_obj_t pin_A2 = PIN(A, 2, NULL, SAADC_CH_PSELP_PSELP_AnalogInput0);
+const pin_obj_t pin_A3 = PIN(A, 3, NULL, SAADC_CH_PSELP_PSELP_AnalogInput1);
+const pin_obj_t pin_A4 = PIN(A, 4, NULL, SAADC_CH_PSELP_PSELP_AnalogInput2);
+const pin_obj_t pin_A5 = PIN(A, 5, NULL, SAADC_CH_PSELP_PSELP_AnalogInput3);
+const pin_obj_t pin_A6 = PIN(A, 6, NULL, 0);
+const pin_obj_t pin_A7 = PIN(A, 7, NULL, 0);
+const pin_obj_t pin_A8 = PIN(A, 8, NULL, 0);
+const pin_obj_t pin_A9 = PIN(A, 9, NULL, 0);
+const pin_obj_t pin_A10 = PIN(A, 10, NULL, 0);
+const pin_obj_t pin_A11 = PIN(A, 11, NULL, 0);
+const pin_obj_t pin_A12 = PIN(A, 12, NULL, 0);
+const pin_obj_t pin_A13 = PIN(A, 13, NULL, 0);
+const pin_obj_t pin_A14 = PIN(A, 14, NULL, 0);
+const pin_obj_t pin_A15 = PIN(A, 15, NULL, 0);
+const pin_obj_t pin_A16 = PIN(A, 16, NULL, 0);
+const pin_obj_t pin_A17 = PIN(A, 17, NULL, 0);
+const pin_obj_t pin_A18 = PIN(A, 18, NULL, 0);
+const pin_obj_t pin_A19 = PIN(A, 19, NULL, 0);
+const pin_obj_t pin_A20 = PIN(A, 20, NULL, 0);
+const pin_obj_t pin_A21 = PIN(A, 21, NULL, 0);
+const pin_obj_t pin_A22 = PIN(A, 22, NULL, 0);
+const pin_obj_t pin_A23 = PIN(A, 23, NULL, 0);
+const pin_obj_t pin_A24 = PIN(A, 24, NULL, 0);
+const pin_obj_t pin_A25 = PIN(A, 25, NULL, 0);
+const pin_obj_t pin_A26 = PIN(A, 26, NULL, 0);
+const pin_obj_t pin_A27 = PIN(A, 27, NULL, 0);
+const pin_obj_t pin_A28 = PIN(A, 28, NULL, SAADC_CH_PSELP_PSELP_AnalogInput4);
+const pin_obj_t pin_A29 = PIN(A, 29, NULL, SAADC_CH_PSELP_PSELP_AnalogInput5);
+const pin_obj_t pin_A30 = PIN(A, 30, NULL, SAADC_CH_PSELP_PSELP_AnalogInput6);
+const pin_obj_t pin_A31 = PIN(A, 31, NULL, SAADC_CH_PSELP_PSELP_AnalogInput7);
+
+STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
+ { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_A0) },
+ { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_A1) },
+ { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_A2) },
+ { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_A3) },
+ { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_A4) },
+ { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_A5) },
+ { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_A6) },
+ { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_A7) },
+ { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_A8) },
+ { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_A9) },
+ { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_A10) },
+ { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_A11) },
+ { MP_ROM_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_A12) },
+ { MP_ROM_QSTR(MP_QSTR_A13), MP_ROM_PTR(&pin_A13) },
+ { MP_ROM_QSTR(MP_QSTR_A14), MP_ROM_PTR(&pin_A14) },
+ { MP_ROM_QSTR(MP_QSTR_A15), MP_ROM_PTR(&pin_A15) },
+ { MP_ROM_QSTR(MP_QSTR_A16), MP_ROM_PTR(&pin_A16) },
+ { MP_ROM_QSTR(MP_QSTR_A17), MP_ROM_PTR(&pin_A17) },
+ { MP_ROM_QSTR(MP_QSTR_A18), MP_ROM_PTR(&pin_A18) },
+ { MP_ROM_QSTR(MP_QSTR_A19), MP_ROM_PTR(&pin_A19) },
+ { MP_ROM_QSTR(MP_QSTR_A20), MP_ROM_PTR(&pin_A20) },
+ { MP_ROM_QSTR(MP_QSTR_A21), MP_ROM_PTR(&pin_A21) },
+ { MP_ROM_QSTR(MP_QSTR_A22), MP_ROM_PTR(&pin_A22) },
+ { MP_ROM_QSTR(MP_QSTR_A23), MP_ROM_PTR(&pin_A23) },
+ { MP_ROM_QSTR(MP_QSTR_A24), MP_ROM_PTR(&pin_A24) },
+ { MP_ROM_QSTR(MP_QSTR_A25), MP_ROM_PTR(&pin_A25) },
+ { MP_ROM_QSTR(MP_QSTR_A26), MP_ROM_PTR(&pin_A26) },
+ { MP_ROM_QSTR(MP_QSTR_A27), MP_ROM_PTR(&pin_A27) },
+ { MP_ROM_QSTR(MP_QSTR_A28), MP_ROM_PTR(&pin_A28) },
+ { MP_ROM_QSTR(MP_QSTR_A29), MP_ROM_PTR(&pin_A29) },
+ { MP_ROM_QSTR(MP_QSTR_A30), MP_ROM_PTR(&pin_A30) },
+ { MP_ROM_QSTR(MP_QSTR_A31), MP_ROM_PTR(&pin_A31) },
+};
+MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);
+
+STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
+ { MP_ROM_QSTR(MP_QSTR_PA0), MP_ROM_PTR(&pin_A0) },
+ { MP_ROM_QSTR(MP_QSTR_PA1), MP_ROM_PTR(&pin_A1) },
+ { MP_ROM_QSTR(MP_QSTR_PA2), MP_ROM_PTR(&pin_A2) },
+ { MP_ROM_QSTR(MP_QSTR_PA3), MP_ROM_PTR(&pin_A3) },
+ { MP_ROM_QSTR(MP_QSTR_PA4), MP_ROM_PTR(&pin_A4) },
+ { MP_ROM_QSTR(MP_QSTR_PA5), MP_ROM_PTR(&pin_A5) },
+ { MP_ROM_QSTR(MP_QSTR_PA6), MP_ROM_PTR(&pin_A6) },
+ { MP_ROM_QSTR(MP_QSTR_PA7), MP_ROM_PTR(&pin_A7) },
+ { MP_ROM_QSTR(MP_QSTR_PA8), MP_ROM_PTR(&pin_A8) },
+ { MP_ROM_QSTR(MP_QSTR_PA9), MP_ROM_PTR(&pin_A9) },
+ { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_A10) },
+ { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_A11) },
+ { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_A12) },
+ { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_A13) },
+ { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_A14) },
+ { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_A15) },
+ { MP_ROM_QSTR(MP_QSTR_PA16), MP_ROM_PTR(&pin_A16) },
+ { MP_ROM_QSTR(MP_QSTR_PA17), MP_ROM_PTR(&pin_A17) },
+ { MP_ROM_QSTR(MP_QSTR_PA18), MP_ROM_PTR(&pin_A18) },
+ { MP_ROM_QSTR(MP_QSTR_PA19), MP_ROM_PTR(&pin_A19) },
+ { MP_ROM_QSTR(MP_QSTR_PA20), MP_ROM_PTR(&pin_A20) },
+ { MP_ROM_QSTR(MP_QSTR_PA21), MP_ROM_PTR(&pin_A21) },
+ { MP_ROM_QSTR(MP_QSTR_PA22), MP_ROM_PTR(&pin_A22) },
+ { MP_ROM_QSTR(MP_QSTR_PA23), MP_ROM_PTR(&pin_A23) },
+ { MP_ROM_QSTR(MP_QSTR_PA24), MP_ROM_PTR(&pin_A24) },
+ { MP_ROM_QSTR(MP_QSTR_PA25), MP_ROM_PTR(&pin_A25) },
+ { MP_ROM_QSTR(MP_QSTR_PA26), MP_ROM_PTR(&pin_A26) },
+ { MP_ROM_QSTR(MP_QSTR_PA27), MP_ROM_PTR(&pin_A27) },
+ { MP_ROM_QSTR(MP_QSTR_PA28), MP_ROM_PTR(&pin_A28) },
+ { MP_ROM_QSTR(MP_QSTR_PA29), MP_ROM_PTR(&pin_A29) },
+ { MP_ROM_QSTR(MP_QSTR_PA30), MP_ROM_PTR(&pin_A30) },
+ { MP_ROM_QSTR(MP_QSTR_PA31), MP_ROM_PTR(&pin_A31) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
diff --git a/ports/nrf/boards/pca10040/pins.h b/ports/nrf/boards/pca10040/pins.h
new file mode 100644
index 000000000..4b66c4152
--- /dev/null
+++ b/ports/nrf/boards/pca10040/pins.h
@@ -0,0 +1,35 @@
+extern const pin_obj_t pin_A0;
+extern const pin_obj_t pin_A1;
+extern const pin_obj_t pin_A2;
+extern const pin_obj_t pin_A3;
+extern const pin_obj_t pin_A4;
+extern const pin_obj_t pin_A5;
+extern const pin_obj_t pin_A6;
+extern const pin_obj_t pin_A7;
+extern const pin_obj_t pin_A8;
+extern const pin_obj_t pin_A9;
+extern const pin_obj_t pin_A10;
+extern const pin_obj_t pin_A11;
+extern const pin_obj_t pin_A12;
+extern const pin_obj_t pin_A13;
+extern const pin_obj_t pin_A14;
+extern const pin_obj_t pin_A15;
+extern const pin_obj_t pin_A16;
+extern const pin_obj_t pin_A17;
+extern const pin_obj_t pin_A18;
+extern const pin_obj_t pin_A19;
+extern const pin_obj_t pin_A20;
+extern const pin_obj_t pin_A21;
+extern const pin_obj_t pin_A22;
+extern const pin_obj_t pin_A23;
+extern const pin_obj_t pin_A24;
+extern const pin_obj_t pin_A25;
+extern const pin_obj_t pin_A26;
+extern const pin_obj_t pin_A27;
+extern const pin_obj_t pin_A28;
+extern const pin_obj_t pin_A29;
+extern const pin_obj_t pin_A30;
+extern const pin_obj_t pin_A31;
+extern const pin_obj_t * const pin_adc1[];
+extern const pin_obj_t * const pin_adc2[];
+extern const pin_obj_t * const pin_adc3[];