diff options
| author | Scott Shawcroft <scott@adafruit.com> | 2020-07-13 15:53:44 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-07-13 15:53:44 -0700 |
| commit | d712d1281c6f7bde36629767ce429cc646ed0a29 (patch) | |
| tree | 6cb982ba12020332f2d9cbed3eb515ccdf8f510e | |
| parent | c8752ff93eb62f115e9129f7b2d20d8ed5a8ed88 (diff) | |
| parent | 3fcd999130fcd87ccbabb65dbe6a6a6cadc08d90 (diff) | |
Merge branch 'main' into master
319 files changed, 27233 insertions, 4109 deletions
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index f615cb7ce..9c5368f95 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -16,16 +16,15 @@ jobs: env: GITHUB_CONTEXT: ${{ toJson(github) }} run: echo "$GITHUB_CONTEXT" - - uses: actions/checkout@v2 + - uses: actions/checkout@v2.2.0 with: submodules: true fetch-depth: 0 - run: git fetch --recurse-submodules=no https://github.com/adafruit/circuitpython refs/tags/*:refs/tags/* - - run: git submodule sync - - run: git submodule foreach git remote -v - - run: git submodule foreach git fetch --recurse-submodules=no origin +refs/tags/*:refs/tags/* - name: CircuitPython version - run: git describe --dirty --tags + run: | + git describe --dirty --tags + echo "::set-env name=CP_VERSION::$(git describe --dirty --tags)" - name: Set up Python 3.8 uses: actions/setup-python@v1 with: @@ -66,8 +65,16 @@ jobs: working-directory: tests - name: Stubs run: make stubs -j2 + - uses: actions/upload-artifact@v2 + with: + name: stubs + path: circuitpython-stubs* - name: Docs - run: sphinx-build -E -W -b html . _build/html + run: sphinx-build -E -W -b html -D version=${{ env.CP_VERSION }} -D release=${{ env.CP_VERSION }} . _build/html + - uses: actions/upload-artifact@v2 + with: + name: docs + path: _build/html - name: Translations run: make check-translate - name: New boards check @@ -110,14 +117,11 @@ jobs: gcc --version python3 --version msgfmt --version - - uses: actions/checkout@v2 + - uses: actions/checkout@v2.2.0 with: submodules: true fetch-depth: 0 - run: git fetch --recurse-submodules=no https://github.com/adafruit/circuitpython refs/tags/*:refs/tags/* - - run: git submodule sync - - run: git submodule foreach git remote -v - - run: git submodule foreach git fetch --recurse-submodules=no origin +refs/tags/*:refs/tags/* - name: CircuitPython version run: git describe --dirty --tags - name: Build mpy-cross @@ -145,6 +149,7 @@ jobs: - "arduino_zero" - "bast_pro_mini_m0" - "bdmicro_vina_m0" + - "bless_dev_board_multi_sensor" - "capablerobot_usbhub" - "catwan_usbstick" - "circuitbrains_basic_m0" @@ -193,6 +198,7 @@ jobs: - "itsybitsy_m4_express" - "itsybitsy_nrf52840_express" - "kicksat-sprite" + - "loc_ber_m4_base_board" - "makerdiary_m60_keyboard" - "makerdiary_nrf52840_m2_devkit" - "makerdiary_nrf52840_mdk" @@ -235,8 +241,11 @@ jobs: - "pyportal" - "pyportal_titano" - "pyruler" + - "raytac_mdbt50q-db-40" - "robohatmm1_m4" - "sam32" + - "same54_xplained" + - "seeeduino_wio_terminal" - "seeeduino_xiao" - "serpente" - "shirtty" @@ -288,14 +297,11 @@ jobs: gcc --version arm-none-eabi-gcc --version python3 --version - - uses: actions/checkout@v2 + - uses: actions/checkout@v2.2.0 with: submodules: true fetch-depth: 0 - run: git fetch --recurse-submodules=no https://github.com/adafruit/circuitpython refs/tags/*:refs/tags/* - - run: git submodule sync - - run: git submodule foreach git remote -v - - run: git submodule foreach git fetch --recurse-submodules=no origin +refs/tags/*:refs/tags/* - name: mpy-cross run: make -C mpy-cross -j2 - name: build @@ -339,14 +345,11 @@ jobs: gcc --version riscv64-unknown-elf-gcc --version python3 --version - - uses: actions/checkout@v2 + - uses: actions/checkout@v2.2.0 with: submodules: true fetch-depth: 0 - run: git fetch --recurse-submodules=no https://github.com/adafruit/circuitpython refs/tags/*:refs/tags/* - - run: git submodule sync - - run: git submodule foreach git remote -v - - run: git submodule foreach git fetch --recurse-submodules=no origin +refs/tags/*:refs/tags/* - name: mpy-cross run: make -C mpy-cross -j2 - name: build @@ -373,20 +376,18 @@ jobs: board: - "espressif_saola_1_wroom" - "espressif_saola_1_wrover" + - "unexpectedmaker_feathers2" steps: - name: Set up Python 3.8 uses: actions/setup-python@v1 with: python-version: 3.8 - - uses: actions/checkout@v2 + - uses: actions/checkout@v2.2.0 with: submodules: true fetch-depth: 0 - run: git fetch --recurse-submodules=no https://github.com/adafruit/circuitpython refs/tags/*:refs/tags/* - - run: git submodule sync - - run: git submodule foreach git remote -v - - run: git submodule foreach git fetch --recurse-submodules=no origin +refs/tags/*:refs/tags/* - name: CircuitPython version run: git describe --dirty --tags - uses: actions/cache@v1 diff --git a/.github/workflows/create_website_pr.yml b/.github/workflows/create_website_pr.yml index 79a6c68a7..9907c08ae 100644 --- a/.github/workflows/create_website_pr.yml +++ b/.github/workflows/create_website_pr.yml @@ -23,12 +23,11 @@ jobs: run: | gcc --version python3 --version - - uses: actions/checkout@v2 + - uses: actions/checkout@v2.2.0 with: submodules: true fetch-depth: 0 - run: git fetch --recurse-submodules=no https://github.com/adafruit/circuitpython refs/tags/*:refs/tags/* - - run: git submodule foreach git fetch --recurse-submodules=no origin +refs/tags/*:refs/tags/* - name: CircuitPython version run: git describe --dirty --tags - name: Website diff --git a/.github/workflows/pre-commit.yml b/.github/workflows/pre-commit.yml index 116829296..966310304 100644 --- a/.github/workflows/pre-commit.yml +++ b/.github/workflows/pre-commit.yml @@ -7,7 +7,7 @@ name: pre-commit on: pull_request: push: - branches: [master] + branches: [main] jobs: pre-commit: diff --git a/.gitignore b/.gitignore index f5edb89f0..8a773970d 100644 --- a/.gitignore +++ b/.gitignore @@ -53,6 +53,7 @@ _build ###################### genrst/ /autoapi/ +/shared-bindings/**/*.rst # ctags and similar ################### diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md index 7477df61c..0d8592631 100644 --- a/CONTRIBUTING.md +++ b/CONTRIBUTING.md @@ -1,6 +1,6 @@ # Contributing Please note that this project is released with a -[Contributor Code of Conduct](https://github.com/adafruit/circuitpython/blob/master/CODE_OF_CONDUCT.md). +[Contributor Code of Conduct](https://github.com/adafruit/circuitpython/blob/main/CODE_OF_CONDUCT.md). By participating in this project you agree to abide by its terms. Participation covers any forum used to converse about CircuitPython including unofficial and official spaces. Failure to do so will result in corrective actions such as time out or ban from the project. @@ -243,3 +243,49 @@ stubs: update-frozen-libraries: @echo "Updating all frozen libraries to latest tagged version." cd frozen; for library in *; do cd $$library; ../../tools/git-checkout-latest-tag.sh; cd ..; done + +one-of-each: samd21 samd51 esp32s2 litex mimxrt10xx nrf stm + +samd21: + $(MAKE) -C ports/atmel-samd BOARD=trinket_m0 + +samd51: + $(MAKE) -C ports/atmel-samd BOARD=feather_m4_express + +esp32s2: + $(MAKE) -C ports/esp32s2 BOARD=espressif_saola_1_wroom + +litex: + $(MAKE) -C ports/litex BOARD=fomu + +mimxrt10xx: + $(MAKE) -C ports/mimxrt10xx BOARD=feather_mimxrt1011 + +nrf: + $(MAKE) -C ports/nrf BOARD=feather_nrf52840_express + +stm: + $(MAKE) -C ports/stm BOARD=feather_stm32f405_express + +clean-one-of-each: clean-samd21 clean-samd51 clean-esp32s2 clean-litex clean-mimxrt10xx clean-nrf clean-stm + +clean-samd21: + $(MAKE) -C ports/atmel-samd BOARD=trinket_m0 clean + +clean-samd51: + $(MAKE) -C ports/atmel-samd BOARD=feather_m4_express clean + +clean-esp32s2: + $(MAKE) -C ports/esp32s2 BOARD=espressif_saola_1_wroom clean + +clean-litex: + $(MAKE) -C ports/litex BOARD=fomu clean + +clean-mimxrt10xx: + $(MAKE) -C ports/mimxrt10xx BOARD=feather_mimxrt1011 clean + +clean-nrf: + $(MAKE) -C ports/nrf BOARD=feather_nrf52840_express clean + +clean-stm: + $(MAKE) -C ports/stm BOARD=feather_stm32f405_express clean diff --git a/README.rst b/README.rst index dfddd1337..347b8b8c6 100644 --- a/README.rst +++ b/README.rst @@ -55,12 +55,12 @@ Contributing ------------ See -`CONTRIBUTING.md <https://github.com/adafruit/circuitpython/blob/master/CONTRIBUTING.md>`__ +`CONTRIBUTING.md <https://github.com/adafruit/circuitpython/blob/main/CONTRIBUTING.md>`__ for full guidelines but please be aware that by contributing to this project you are agreeing to the `Code of -Conduct <https://github.com/adafruit/circuitpython/blob/master/CODE_OF_CONDUCT.md>`__. +Conduct <https://github.com/adafruit/circuitpython/blob/main/CODE_OF_CONDUCT.md>`__. Contributors who follow the `Code of -Conduct <https://github.com/adafruit/circuitpython/blob/master/CODE_OF_CONDUCT.md>`__ +Conduct <https://github.com/adafruit/circuitpython/blob/main/CODE_OF_CONDUCT.md>`__ are welcome to submit pull requests and they will be promptly reviewed by project admins. Please join the `Discord <https://adafru.it/discord>`__ too. @@ -96,7 +96,6 @@ CircuitPython: - Supports native USB on all boards, allowing file editing without special tools. - Supports only SAMD21, SAMD51, nRF52840, CXD56, STM32F4 and i.MX RT ports. -- Tracks MicroPython's releases (not master). - Floats (aka decimals) are enabled for all builds. - Error messages are translated into 10+ languages. - Does not support concurrency within Python (including interrupts and threading). Some concurrency @@ -211,8 +210,8 @@ The remaining port directories not listed above are in the repo to maintain comp `back to top <#circuitpython>`__ -.. |Build Status| image:: https://travis-ci.com/adafruit/circuitpython.svg?branch=master - :target: https://travis-ci.org/adafruit/circuitpython +.. |Build Status| image:: https://github.com/adafruit/circuitpython/workflows/Build%20CI/badge.svg + :target: https://github.com/adafruit/circuitpython/actions?query=branch%3Amain .. |Doc Status| image:: https://readthedocs.org/projects/circuitpython/badge/?version=latest :target: http://circuitpython.readthedocs.io/ .. |Discord| image:: https://img.shields.io/discord/327254708534116352.svg @@ -14,11 +14,13 @@ # serve to show the default. import json -import sys +import logging import os +import subprocess +import sys +import urllib.parse import recommonmark -import subprocess # If extensions (or modules to document with autodoc) are in another directory, # add these directories to sys.path here. If the directory is relative to the @@ -79,6 +81,9 @@ autoapi_add_toctree_entry = False autoapi_options = ['members', 'undoc-members', 'private-members', 'show-inheritance', 'special-members', 'show-module-summary'] autoapi_template_dir = 'docs/autoapi/templates' autoapi_python_use_implicit_namespaces = True +autoapi_root = "shared-bindings" + +redirects_file = 'docs/redirects.txt' # The encoding of source files. #source_encoding = 'utf-8-sig' @@ -374,5 +379,47 @@ intersphinx_mapping = {"cpython": ('https://docs.python.org/3/', None), "bus_device": ('https://circuitpython.readthedocs.io/projects/busdevice/en/latest/', None), "register": ('https://circuitpython.readthedocs.io/projects/register/en/latest/', None)} +# Adapted from sphinxcontrib-redirects +from sphinx.builders import html as builders + +TEMPLATE = """<html> + <head><meta http-equiv="refresh" content="0; url=%s"/></head> +</html> +""" + + +def generate_redirects(app): + path = os.path.join(app.srcdir, app.config.redirects_file) + if not os.path.exists(path): + logging.error("Could not find redirects file at '%s'" % path) + return + + if not isinstance(app.builder, builders.StandaloneHTMLBuilder): + logging.warn("The 'sphinxcontib-redirects' plugin is only supported " + "by the 'html' builder and subclasses. Skipping...") + logging.warn(f"Builder is {app.builder.name} ({type(app.builder)})") + return + + with open(path) as redirects: + for line in redirects.readlines(): + from_path, to_path = line.rstrip().split(' ') + + logging.debug("Redirecting '%s' to '%s'" % (from_path, to_path)) + + from_path = os.path.splitext(from_path)[0] + ".html" + to_path_prefix = '..%s' % os.path.sep * ( + len(from_path.split(os.path.sep)) - 1) + to_path = to_path_prefix + to_path + + redirected_filename = os.path.join(app.builder.outdir, from_path) + redirected_directory = os.path.dirname(redirected_filename) + if not os.path.exists(redirected_directory): + os.makedirs(redirected_directory) + + with open(redirected_filename, 'w') as f: + f.write(TEMPLATE % urllib.parse.quote(to_path, '#/')) + def setup(app): app.add_css_file("customstyle.css") + app.add_config_value('redirects_file', 'redirects', 'env') + app.connect('builder-inited', generate_redirects) diff --git a/docs/README.md b/docs/README.md index e98b46f67..19c81a2fa 100644 --- a/docs/README.md +++ b/docs/README.md @@ -5,7 +5,7 @@ The latest documentation can be found at: http://circuitpython.readthedocs.io/en/latest/ The documentation you see there is generated from the files in the whole tree: -https://github.com/adafruit/circuitpython/tree/master +https://github.com/adafruit/circuitpython/tree/main Building the documentation locally ---------------------------------- diff --git a/docs/design_guide.rst b/docs/design_guide.rst index 6f87ecf79..2d52e988b 100644 --- a/docs/design_guide.rst +++ b/docs/design_guide.rst @@ -1,9 +1,11 @@ +.. role:: strike + Design Guide ============ This guide covers a variety of development practices for CircuitPython core and library APIs. These APIs are both `built-into CircuitPython -<https://github.com/adafruit/circuitpython/tree/master/shared-bindings>`_ and those that are +<https://github.com/adafruit/circuitpython/tree/main/shared-bindings>`_ and those that are `distributed on GitHub <https://github.com/search?utf8=%E2%9C%93&q=topic%3Acircuitpython&type=>`_ and in the `Adafruit <https://github.com/adafruit/Adafruit_CircuitPython_Bundle>`_ and `Community <https://github.com/adafruit/CircuitPython_Community_Bundle/>`_ bundles. Consistency with these @@ -46,6 +48,41 @@ not have the ``adafruit_`` module or package prefix. Both should have the CircuitPython repository topic on GitHub. +Terminology +----------- + +As our Code of Conduct states, we strive to use "welcoming and inclusive +language." Whether it is in documentation or in code, the words we use matter. +This means we disfavor language that due to historical and social context can +make community members and potential community members feel unwelcome. + +There are specific terms to avoid except where technical limitations require it. +While specific cases may call for other terms, consider using these suggested +terms first: + ++--------------------+---------------------+ +| Preferred | Deprecated | ++====================+=====================+ +| Main (device) | :strike:`Master` | ++--------------------+---------------------+ +| Peripheral | :strike:`Slave` | ++--------------------+ + +| Sensor | | ++--------------------+ + +| Secondary (device) | | ++--------------------+---------------------+ +| Denylist | :strike:`Blacklist` | ++--------------------+---------------------+ +| Allowlist | :strike:`Whitelist` | ++--------------------+---------------------+ + +Note that "technical limitations" refers e.g., to the situation where an +upstream library or URL has to contain those substrings in order to work. +However, when it comes to documentation and the names of parameters and +properties in CircuitPython, we will use alternate terms even if this breaks +tradition with past practice. + + .. _lifetime-and-contextmanagers: Lifetime and ContextManagers diff --git a/docs/library/index.rst b/docs/library/index.rst index 6c2e576e7..f847ead0a 100644 --- a/docs/library/index.rst +++ b/docs/library/index.rst @@ -70,7 +70,7 @@ CircuitPython/MicroPython-specific libraries Functionality specific to the CircuitPython/MicroPython implementation is available in the following libraries. These libraries may change signficantly or be removed in future -versions of CircuitPtyon. +versions of CircuitPython. .. toctree:: :maxdepth: 1 diff --git a/docs/porting.rst b/docs/porting.rst index d28f56f47..db4ae7626 100644 --- a/docs/porting.rst +++ b/docs/porting.rst @@ -64,7 +64,7 @@ as a natural "TODO" list. An example minimal build list is shown below: CIRCUITPY_ROTARYIO = 0 CIRCUITPY_RTC = 0 CIRCUITPY_FREQUENCYIO = 0 - CIRCUITPY_I2CSLAVE = 0 + CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_DISPLAYIO = 0 # Requires SPI, PulseIO (stub ok) # These modules are implemented in shared-module/ - they can be included in diff --git a/docs/redirects.txt b/docs/redirects.txt new file mode 100644 index 000000000..75965eff9 --- /dev/null +++ b/docs/redirects.txt @@ -0,0 +1,161 @@ +shared-bindings//__init__.rst shared-bindings// +shared-bindings/_bleio/Adapter.rst shared-bindings/_bleio/#_bleio.Adapter +shared-bindings/_bleio/Address.rst shared-bindings/_bleio/#_bleio.Address +shared-bindings/_bleio/Attribute.rst shared-bindings/_bleio/#_bleio.Attribute +shared-bindings/_bleio/BluetoothError.rst shared-bindings/_bleio/#_bleio.BluetoothError +shared-bindings/_bleio/Characteristic.rst shared-bindings/_bleio/#_bleio.Characteristic +shared-bindings/_bleio/CharacteristicBuffer.rst shared-bindings/_bleio/#_bleio.CharacteristicBuffer +shared-bindings/_bleio/Connection.rst shared-bindings/_bleio/#_bleio.Connection +shared-bindings/_bleio/ConnectionError.rst shared-bindings/_bleio/#_bleio.ConnectionError +shared-bindings/_bleio/Descriptor.rst shared-bindings/_bleio/#_bleio.Descriptor +shared-bindings/_bleio/PacketBuffer.rst shared-bindings/_bleio/#_bleio.PacketBuffer +shared-bindings/_bleio/RoleError.rst shared-bindings/_bleio/#_bleio.RoleError +shared-bindings/_bleio/ScanEntry.rst shared-bindings/_bleio/#_bleio.ScanEntry +shared-bindings/_bleio/ScanResults.rst shared-bindings/_bleio/#_bleio.ScanResults +shared-bindings/_bleio/SecurityError.rst shared-bindings/_bleio/#_bleio.SecurityError +shared-bindings/_bleio/Service.rst shared-bindings/_bleio/#_bleio.Service +shared-bindings/_bleio/UUID.rst shared-bindings/_bleio/#_bleio.UUID +shared-bindings/_bleio/__init__.rst shared-bindings/_bleio/ +shared-bindings/_eve/__init__.rst shared-bindings/_eve/ +shared-bindings/_pew/PewPew.rst shared-bindings/_pew/#_pew.PewPew +shared-bindings/_pew/__init__.rst shared-bindings/_pew/ +shared-bindings/_pixelbuf/PixelBuf.rst shared-bindings/_pixelbuf/#_pixelbuf.PixelBuf +shared-bindings/_pixelbuf/__init__.rst shared-bindings/_pixelbuf/ +shared-bindings/_stage/Layer.rst shared-bindings/_stage/#_stage.Layer +shared-bindings/_stage/Text.rst shared-bindings/_stage/#_stage.Text +shared-bindings/_stage/__init__.rst shared-bindings/_stage/ +shared-bindings/aesio/AES.rst shared-bindings/aesio/#aesio.AES +shared-bindings/aesio/__init__.rst shared-bindings/aesio/ +shared-bindings/analogio/AnalogIn.rst shared-bindings/analogio/#analogio.AnalogIn +shared-bindings/analogio/AnalogOut.rst shared-bindings/analogio/#analogio.AnalogOut +shared-bindings/analogio/__init__.rst shared-bindings/analogio/ +shared-bindings/audiobusio/I2SOut.rst shared-bindings/audiobusio/#audiobusio.I2SOut +shared-bindings/audiobusio/PDMIn.rst shared-bindings/audiobusio/#audiobusio.PDMIn +shared-bindings/audiobusio/__init__.rst shared-bindings/audiobusio/ +shared-bindings/audiocore/RawSample.rst shared-bindings/audiocore/#audiocore.RawSample +shared-bindings/audiocore/WaveFile.rst shared-bindings/audiocore/#audiocore.WaveFile +shared-bindings/audiocore/__init__.rst shared-bindings/audiocore/ +shared-bindings/audioio/AudioOut.rst shared-bindings/audioio/#audioio.AudioOut +shared-bindings/audioio/__init__.rst shared-bindings/audioio/ +shared-bindings/audiomixer/Mixer.rst shared-bindings/audiomixer/#audiomixer.Mixer +shared-bindings/audiomixer/MixerVoice.rst shared-bindings/audiomixer/#audiomixer.MixerVoice +shared-bindings/audiomixer/__init__.rst shared-bindings/audiomixer/ +shared-bindings/audiomp3/MP3.rst shared-bindings/audiomp3/#audiomp3.MP3 +shared-bindings/audiomp3/__init__.rst shared-bindings/audiomp3/ +shared-bindings/audiopwmio/PWMAudioOut.rst shared-bindings/audiopwmio/#audiopwmio.PWMAudioOut +shared-bindings/audiopwmio/__init__.rst shared-bindings/audiopwmio/ +shared-bindings/bitbangio/I2C.rst shared-bindings/bitbangio/#bitbangio.I2C +shared-bindings/bitbangio/OneWire.rst shared-bindings/bitbangio/#bitbangio.OneWire +shared-bindings/bitbangio/SPI.rst shared-bindings/bitbangio/#bitbangio.SPI +shared-bindings/bitbangio/__init__.rst shared-bindings/bitbangio/ +shared-bindings/board/__init__.rst shared-bindings/board/ +shared-bindings/busio/I2C.rst shared-bindings/busio/#busio.I2C +shared-bindings/busio/OneWire.rst shared-bindings/busio/#busio.OneWire +shared-bindings/busio/Parity.rst shared-bindings/busio/#busio.Parity +shared-bindings/busio/SPI.rst shared-bindings/busio/#busio.SPI +shared-bindings/busio/UART.rst shared-bindings/busio/#busio.UART +shared-bindings/busio/__init__.rst shared-bindings/busio/ +shared-bindings/countio/Counter.rst shared-bindings/countio/#countio.Counter +shared-bindings/countio/__init__.rst shared-bindings/countio/ +shared-bindings/digitalio/DigitalInOut.rst shared-bindings/digitalio/#digitalio.DigitalInOut +shared-bindings/digitalio/Direction.rst shared-bindings/digitalio/#digitalio.Direction +shared-bindings/digitalio/DriveMode.rst shared-bindings/digitalio/#digitalio.DriveMode +shared-bindings/digitalio/Pull.rst shared-bindings/digitalio/#digitalio.Pull +shared-bindings/digitalio/__init__.rst shared-bindings/digitalio/ +shared-bindings/displayio/Bitmap.rst shared-bindings/displayio/#displayio.Bitmap +shared-bindings/displayio/ColorConverter.rst shared-bindings/displayio/#displayio.ColorConverter +shared-bindings/displayio/Display.rst shared-bindings/displayio/#displayio.Display +shared-bindings/displayio/EPaperDisplay.rst shared-bindings/displayio/#displayio.EPaperDisplay +shared-bindings/displayio/FourWire.rst shared-bindings/displayio/#displayio.FourWire +shared-bindings/displayio/Group.rst shared-bindings/displayio/#displayio.Group +shared-bindings/displayio/I2CDisplay.rst shared-bindings/displayio/#displayio.I2CDisplay +shared-bindings/displayio/OnDiskBitmap.rst shared-bindings/displayio/#displayio.OnDiskBitmap +shared-bindings/displayio/Palette.rst shared-bindings/displayio/#displayio.Palette +shared-bindings/displayio/ParallelBus.rst shared-bindings/displayio/#displayio.ParallelBus +shared-bindings/displayio/Shape.rst shared-bindings/displayio/#displayio.Shape +shared-bindings/displayio/TileGrid.rst shared-bindings/displayio/#displayio.TileGrid +shared-bindings/displayio/__init__.rst shared-bindings/displayio/ +shared-bindings/fontio/BuiltinFont.rst shared-bindings/fontio/#fontio.BuiltinFont +shared-bindings/fontio/Glyph.rst shared-bindings/fontio/#fontio.Glyph +shared-bindings/fontio/__init__.rst shared-bindings/fontio/ +shared-bindings/framebufferio/FramebufferDisplay.rst shared-bindings/framebufferio/#framebufferio.FramebufferDisplay +shared-bindings/framebufferio/__init__.rst shared-bindings/framebufferio/ +shared-bindings/frequencyio/FrequencyIn.rst shared-bindings/frequencyio/#frequencyio.FrequencyIn +shared-bindings/frequencyio/__init__.rst shared-bindings/frequencyio/ +shared-bindings/gamepad/GamePad.rst shared-bindings/gamepad/#gamepad.GamePad +shared-bindings/gamepad/__init__.rst shared-bindings/gamepad/ +shared-bindings/gamepadshift/GamePadShift.rst shared-bindings/gamepadshift/#gamepadshift.GamePadShift +shared-bindings/gamepadshift/__init__.rst shared-bindings/gamepadshift/ +shared-bindings/gnss/__init__.rst shared-bindings/gnss/ +shared-bindings/i2cperipheral/__init__.rst shared-bindings/i2cperipheral/ +shared-bindings/i2csecondary/__init__.rst shared-bindings/i2csecondary/ +shared-bindings/i2cslave/I2CSlave.rst shared-bindings/i2cperipheral/#i2cperipheral.I2CPeripheral +shared-bindings/i2cslave/I2CSlaveRequest.rst shared-bindings/i2cperipheral/#i2cperipheral.I2CPeripheralRequest +shared-bindings/math/__init__.rst shared-bindings/math/ +shared-bindings/microcontroller/Pin.rst shared-bindings/microcontroller/#microcontroller.Pin +shared-bindings/microcontroller/Processor.rst shared-bindings/microcontroller/#microcontroller.Processor +shared-bindings/microcontroller/RunMode.rst shared-bindings/microcontroller/#microcontroller.RunMode +shared-bindings/microcontroller/__init__.rst shared-bindings/microcontroller/ +shared-bindings/multiterminal/__init__.rst shared-bindings/multiterminal/ +shared-bindings/neopixel_write/__init__.rst shared-bindings/neopixel_write/ +shared-bindings/network/__init__.rst shared-bindings/network/ +shared-bindings/nvm/ByteArray.rst shared-bindings/nvm/#nvm.ByteArray +shared-bindings/nvm/__init__.rst shared-bindings/nvm/ +shared-bindings/os/__init__.rst shared-bindings/os/ +shared-bindings/protomatter/__init__.rst shared-bindings/protomatter/ +shared-bindings/ps2io/Ps2.rst shared-bindings/ps2io/#ps2io.Ps2 +shared-bindings/ps2io/__init__.rst shared-bindings/ps2io/ +shared-bindings/pulseio/PWMOut.rst shared-bindings/pulseio/#pulseio.PWMOut +shared-bindings/pulseio/PulseIn.rst shared-bindings/pulseio/#pulseio.PulseIn +shared-bindings/pulseio/PulseOut.rst shared-bindings/pulseio/#pulseio.PulseOut +shared-bindings/pulseio/__init__.rst shared-bindings/pulseio/ +shared-bindings/random/__init__.rst shared-bindings/random/ +shared-bindings/rgbmatrix/RGBMatrix.rst shared-bindings/rgbmatrix/#rgbmatrix.RGBMatrix +shared-bindings/rgbmatrix/__init__.rst shared-bindings/rgbmatrix/ +shared-bindings/rotaryio/IncrementalEncoder.rst shared-bindings/rotaryio/#rotaryio.IncrementalEncoder +shared-bindings/rotaryio/__init__.rst shared-bindings/rotaryio/ +shared-bindings/rtc/RTC.rst shared-bindings/rtc/#rtc.RTC +shared-bindings/rtc/__init__.rst shared-bindings/rtc/ +shared-bindings/samd/Clock.rst shared-bindings/samd/#samd.Clock +shared-bindings/samd/__init__.rst shared-bindings/samd/ +shared-bindings/socket/__init__.rst shared-bindings/socket/ +shared-bindings/socket/socket.rst shared-bindings/socket/#socket.socket +shared-bindings/storage/VfsFat.rst shared-bindings/storage/#storage.VfsFat +shared-bindings/storage/__init__.rst shared-bindings/storage/ +shared-bindings/struct/__init__.rst shared-bindings/struct/ +shared-bindings/supervisor/Runtime.rst shared-bindings/supervisor/#supervisor.Runtime +shared-bindings/supervisor/__init__.rst shared-bindings/supervisor/ +shared-bindings/terminalio/Terminal.rst shared-bindings/terminalio/#terminalio.Terminal +shared-bindings/terminalio/__init__.rst shared-bindings/terminalio/ +shared-bindings/time/__init__.rst shared-bindings/time/ +shared-bindings/time/struct_time.rst shared-bindings/time/#time.struct_time +shared-bindings/touchio/TouchIn.rst shared-bindings/touchio/#touchio.TouchIn +shared-bindings/touchio/__init__.rst shared-bindings/touchio/ +shared-bindings/uheap/__init__.rst shared-bindings/uheap/ +shared-bindings/ulab/__init__.rst shared-bindings/ulab/ +shared-bindings/ulab/approx/__init__.rst shared-bindings/ulab/approx/ +shared-bindings/ulab/array.rst shared-bindings/ulab/#ulab.array +shared-bindings/ulab/compare/__init__.rst shared-bindings/ulab/compare/ +shared-bindings/ulab/extras/__init__.rst shared-bindings/ulab/extras/ +shared-bindings/ulab/fft/__init__.rst shared-bindings/ulab/fft/ +shared-bindings/ulab/filter/__init__.rst shared-bindings/ulab/filter/ +shared-bindings/ulab/linalg/__init__.rst shared-bindings/ulab/linalg/ +shared-bindings/ulab/numerical/__init__.rst shared-bindings/ulab/numerical/ +shared-bindings/ulab/poly/__init__.rst shared-bindings/ulab/poly/ +shared-bindings/ulab/vector/__init__.rst shared-bindings/ulab/vector/ +shared-bindings/usb_hid/Device.rst shared-bindings/usb_hid/#usb_hid.Device +shared-bindings/usb_hid/__init__.rst shared-bindings/usb_hid/ +shared-bindings/usb_midi/PortIn.rst shared-bindings/usb_midi/#usb_midi.PortIn +shared-bindings/usb_midi/PortOut.rst shared-bindings/usb_midi/#usb_midi.PortOut +shared-bindings/usb_midi/__init__.rst shared-bindings/usb_midi/ +shared-bindings/ustack/__init__.rst shared-bindings/ustack/ +shared-bindings/vectorio/Circle.rst shared-bindings/vectorio/#vectorio.Circle +shared-bindings/vectorio/Polygon.rst shared-bindings/vectorio/#vectorio.Polygon +shared-bindings/vectorio/Rectangle.rst shared-bindings/vectorio/#vectorio.Rectangle +shared-bindings/vectorio/VectorShape.rst shared-bindings/vectorio/#vectorio.VectorShape +shared-bindings/vectorio/__init__.rst shared-bindings/vectorio/ +shared-bindings/watchdog/WatchDogMode.rst shared-bindings/watchdog/#watchdog.WatchDogMode +shared-bindings/watchdog/WatchDogTimer.rst shared-bindings/watchdog/#watchdog.WatchDogTimer +shared-bindings/watchdog/__init__.rst shared-bindings/watchdog/ +shared-bindings/wiznet/WIZNET5K.rst shared-bindings/wiznet/#wiznet.WIZNET5K +shared-bindings/wiznet/__init__.rst shared-bindings/wiznet/ diff --git a/docs/shared_bindings_matrix.py b/docs/shared_bindings_matrix.py index 02ef68349..4abf5b885 100644 --- a/docs/shared_bindings_matrix.py +++ b/docs/shared_bindings_matrix.py @@ -23,6 +23,7 @@ import json import os +import pathlib import re import subprocess import sys @@ -30,17 +31,27 @@ import sys SUPPORTED_PORTS = ['atmel-samd', 'esp32s2', 'litex', 'mimxrt10xx', 'nrf', 'stm'] +def get_circuitpython_root_dir(): + """ The path to the root './circuitpython' directory + """ + file_path = pathlib.Path(__file__).resolve() + root_dir = file_path.parent.parent + + return root_dir + def get_shared_bindings(): """ Get a list of modules in shared-bindings based on folder names """ - return [item for item in os.listdir("./shared-bindings")] + shared_bindings_dir = get_circuitpython_root_dir() / "shared-bindings" + return [item.name for item in shared_bindings_dir.iterdir()] def read_mpconfig(): """ Open 'circuitpy_mpconfig.mk' and return the contents. """ configs = [] - with open("py/circuitpy_mpconfig.mk") as mpconfig: + cpy_mpcfg = get_circuitpython_root_dir() / "py" / "circuitpy_mpconfig.mk" + with open(cpy_mpcfg) as mpconfig: configs = mpconfig.read() return configs @@ -120,7 +131,7 @@ def lookup_setting(settings, key, default=''): key = value[2:-1] return value -def support_matrix_by_board(): +def support_matrix_by_board(use_branded_name=True): """ Compiles a list of the available core modules available for each board. """ @@ -129,20 +140,22 @@ def support_matrix_by_board(): boards = dict() for port in SUPPORTED_PORTS: - port_dir = "ports/{}/boards".format(port) - for entry in os.scandir(port_dir): + port_dir = get_circuitpython_root_dir() / "ports" / port + for entry in (port_dir / "boards").iterdir(): if not entry.is_dir(): continue board_modules = [] + board_name = entry.name - settings = get_settings_from_makefile(f'ports/{port}', entry.name) + settings = get_settings_from_makefile(str(port_dir), entry.name) - with open(os.path.join(entry.path, "mpconfigboard.h")) as get_name: - board_contents = get_name.read() - board_name_re = re.search("(?<=MICROPY_HW_BOARD_NAME)\s+(.+)", - board_contents) - if board_name_re: - board_name = board_name_re.group(1).strip('"') + if use_branded_name: + with open(entry / "mpconfigboard.h") as get_name: + board_contents = get_name.read() + board_name_re = re.search(r"(?<=MICROPY_HW_BOARD_NAME)\s+(.+)", + board_contents) + if board_name_re: + board_name = board_name_re.group(1).strip('"') board_modules = [] for module in base: diff --git a/docs/static/customstyle.css b/docs/static/customstyle.css index 6c964b762..ce2140e70 100644 --- a/docs/static/customstyle.css +++ b/docs/static/customstyle.css @@ -9,7 +9,19 @@ margin: 4px; } +/* custom CSS to sticky the ' viewing outdated version' + warning +*/ +.document > .admonition { + position: sticky; + top: 0px; + background-color: salmon; + z-index: 2; +} +body { + overflow-x: unset!important; +} /* override table width restrictions */ @media screen and (min-width: 767px) { @@ -24,3 +36,7 @@ overflow: visible !important; } } + +.strike { + text-decoration: line-through; +} diff --git a/extmod/machine_i2c.c b/extmod/machine_i2c.c deleted file mode 100644 index 4129ace0a..000000000 --- a/extmod/machine_i2c.c +++ /dev/null @@ -1,641 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include <stdio.h> -#include <stdint.h> -#include <string.h> - -#include "py/mperrno.h" -#include "py/mphal.h" -#include "py/runtime.h" -#include "extmod/machine_i2c.h" - -#include "supervisor/shared/translate.h" - -#if MICROPY_PY_MACHINE_I2C - -typedef mp_machine_soft_i2c_obj_t machine_i2c_obj_t; - -STATIC void mp_hal_i2c_delay(machine_i2c_obj_t *self) { - // We need to use an accurate delay to get acceptable I2C - // speeds (eg 1us should be not much more than 1us). - mp_hal_delay_us_fast(self->us_delay); -} - -STATIC void mp_hal_i2c_scl_low(machine_i2c_obj_t *self) { - mp_hal_pin_od_low(self->scl); -} - -STATIC int mp_hal_i2c_scl_release(machine_i2c_obj_t *self) { - uint32_t count = self->us_timeout; - - mp_hal_pin_od_high(self->scl); - mp_hal_i2c_delay(self); - // For clock stretching, wait for the SCL pin to be released, with timeout. - for (; mp_hal_pin_read(self->scl) == 0 && count; --count) { - mp_hal_delay_us_fast(1); - } - if (count == 0) { - return -MP_ETIMEDOUT; - } - return 0; // success -} - -STATIC void mp_hal_i2c_sda_low(machine_i2c_obj_t *self) { - mp_hal_pin_od_low(self->sda); -} - -STATIC void mp_hal_i2c_sda_release(machine_i2c_obj_t *self) { - mp_hal_pin_od_high(self->sda); -} - -STATIC int mp_hal_i2c_sda_read(machine_i2c_obj_t *self) { - return mp_hal_pin_read(self->sda); -} - -STATIC int mp_hal_i2c_start(machine_i2c_obj_t *self) { - mp_hal_i2c_sda_release(self); - mp_hal_i2c_delay(self); - int ret = mp_hal_i2c_scl_release(self); - if (ret != 0) { - return ret; - } - mp_hal_i2c_sda_low(self); - mp_hal_i2c_delay(self); - return 0; // success -} - -STATIC int mp_hal_i2c_stop(machine_i2c_obj_t *self) { - mp_hal_i2c_delay(self); - mp_hal_i2c_sda_low(self); - mp_hal_i2c_delay(self); - int ret = mp_hal_i2c_scl_release(self); - mp_hal_i2c_sda_release(self); - mp_hal_i2c_delay(self); - return ret; -} - -STATIC void mp_hal_i2c_init(machine_i2c_obj_t *self, uint32_t freq) { - self->us_delay = 500000 / freq; - if (self->us_delay == 0) { - self->us_delay = 1; - } - mp_hal_pin_open_drain(self->scl); - mp_hal_pin_open_drain(self->sda); - mp_hal_i2c_stop(self); // ignore error -} - -// return value: -// 0 - byte written and ack received -// 1 - byte written and nack received -// <0 - error, with errno being the negative of the return value -STATIC int mp_hal_i2c_write_byte(machine_i2c_obj_t *self, uint8_t val) { - mp_hal_i2c_delay(self); - mp_hal_i2c_scl_low(self); - - for (int i = 7; i >= 0; i--) { - if ((val >> i) & 1) { - mp_hal_i2c_sda_release(self); - } else { - mp_hal_i2c_sda_low(self); - } - mp_hal_i2c_delay(self); - int ret = mp_hal_i2c_scl_release(self); - if (ret != 0) { - mp_hal_i2c_sda_release(self); - return ret; - } - mp_hal_i2c_scl_low(self); - } - - mp_hal_i2c_sda_release(self); - mp_hal_i2c_delay(self); - int ret = mp_hal_i2c_scl_release(self); - if (ret != 0) { - return ret; - } - - int ack = mp_hal_i2c_sda_read(self); - mp_hal_i2c_delay(self); - mp_hal_i2c_scl_low(self); - - return ack; -} - -// return value: -// 0 - success -// <0 - error, with errno being the negative of the return value -STATIC int mp_hal_i2c_read_byte(machine_i2c_obj_t *self, uint8_t *val, int nack) { - mp_hal_i2c_delay(self); - mp_hal_i2c_scl_low(self); - mp_hal_i2c_delay(self); - - uint8_t data = 0; - for (int i = 7; i >= 0; i--) { - int ret = mp_hal_i2c_scl_release(self); - if (ret != 0) { - return ret; - } - data = (data << 1) | mp_hal_i2c_sda_read(self); - mp_hal_i2c_scl_low(self); - mp_hal_i2c_delay(self); - } - *val = data; - - // send ack/nack bit - if (!nack) { - mp_hal_i2c_sda_low(self); - } - mp_hal_i2c_delay(self); - int ret = mp_hal_i2c_scl_release(self); - if (ret != 0) { - mp_hal_i2c_sda_release(self); - return ret; - } - mp_hal_i2c_scl_low(self); - mp_hal_i2c_sda_release(self); - - return 0; // success -} - -// return value: -// >=0 - number of acks received -// <0 - error, with errno being the negative of the return value -int mp_machine_soft_i2c_writeto(mp_obj_base_t *self_in, uint16_t addr, const uint8_t *src, size_t len, bool stop) { - machine_i2c_obj_t *self = (machine_i2c_obj_t*)self_in; - - // start the I2C transaction - int ret = mp_hal_i2c_start(self); - if (ret != 0) { - return ret; - } - - // write the slave address - ret = mp_hal_i2c_write_byte(self, addr << 1); - if (ret < 0) { - return ret; - } else if (ret != 0) { - // nack received, release the bus cleanly - mp_hal_i2c_stop(self); - return -MP_ENODEV; - } - - // write the buffer to the I2C memory - int num_acks = 0; - while (len--) { - ret = mp_hal_i2c_write_byte(self, *src++); - if (ret < 0) { - return ret; - } else if (ret != 0) { - // nack received, stop sending - break; - } - ++num_acks; - } - - // finish the I2C transaction - if (stop) { - ret = mp_hal_i2c_stop(self); - if (ret != 0) { - return ret; - } - } - - return num_acks; -} - -// return value: -// 0 - success -// <0 - error, with errno being the negative of the return value -int mp_machine_soft_i2c_readfrom(mp_obj_base_t *self_in, uint16_t addr, uint8_t *dest, size_t len, bool stop) { - machine_i2c_obj_t *self = (machine_i2c_obj_t*)self_in; - - // start the I2C transaction - int ret = mp_hal_i2c_start(self); - if (ret != 0) { - return ret; - } - - // write the slave address - ret = mp_hal_i2c_write_byte(self, (addr << 1) | 1); - if (ret < 0) { - return ret; - } else if (ret != 0) { - // nack received, release the bus cleanly - mp_hal_i2c_stop(self); - return -MP_ENODEV; - } - - // read the bytes from the slave - while (len--) { - ret = mp_hal_i2c_read_byte(self, dest++, len == 0); - if (ret != 0) { - return ret; - } - } - - // finish the I2C transaction - if (stop) { - ret = mp_hal_i2c_stop(self); - if (ret != 0) { - return ret; - } - } - - return 0; // success -} - -/******************************************************************************/ -// MicroPython bindings for I2C - -STATIC void machine_i2c_obj_init_helper(machine_i2c_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_scl, ARG_sda, ARG_freq, ARG_timeout }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_scl, MP_ARG_REQUIRED | MP_ARG_OBJ }, - { MP_QSTR_sda, MP_ARG_REQUIRED | MP_ARG_OBJ }, - { MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 400000} }, - { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 255} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - self->scl = mp_hal_get_pin_obj(args[ARG_scl].u_obj); - self->sda = mp_hal_get_pin_obj(args[ARG_sda].u_obj); - self->us_timeout = args[ARG_timeout].u_int; - mp_hal_i2c_init(self, args[ARG_freq].u_int); -} - -STATIC mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // check the id argument, if given - if (n_args > 0) { - if (args[0] != MP_OBJ_NEW_SMALL_INT(-1)) { - #if defined(MICROPY_PY_MACHINE_I2C_MAKE_NEW) - // dispatch to port-specific constructor - extern mp_obj_t MICROPY_PY_MACHINE_I2C_MAKE_NEW(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *all_args, mp_map_t *kw_args); - return MICROPY_PY_MACHINE_I2C_MAKE_NEW(type, n_args, args, kw_args); - #else - mp_raise_ValueError(translate("invalid I2C peripheral")); - #endif - } - --n_args; - ++args; - } - - // create new soft I2C object - machine_i2c_obj_t *self = m_new_obj(machine_i2c_obj_t); - self->base.type = &machine_i2c_type; - machine_i2c_obj_init_helper(self, n_args, args, kw_args); - return (mp_obj_t)self; -} - -STATIC mp_obj_t machine_i2c_obj_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - machine_i2c_obj_init_helper(args[0], n_args - 1, args + 1, kw_args); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2c_init_obj, 1, machine_i2c_obj_init); - -STATIC mp_obj_t machine_i2c_scan(mp_obj_t self_in) { - mp_obj_base_t *self = MP_OBJ_TO_PTR(self_in); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); - mp_obj_t list = mp_obj_new_list(0, NULL); - // 7-bit addresses 0b0000xxx and 0b1111xxx are reserved - for (int addr = 0x08; addr < 0x78; ++addr) { - int ret = i2c_p->writeto(self, addr, NULL, 0, true); - if (ret == 0) { - mp_obj_list_append(list, MP_OBJ_NEW_SMALL_INT(addr)); - } - } - return list; -} -MP_DEFINE_CONST_FUN_OBJ_1(machine_i2c_scan_obj, machine_i2c_scan); - -STATIC mp_obj_t machine_i2c_start(mp_obj_t self_in) { - mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(self_in); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); - if (i2c_p->start == NULL) { - mp_raise_msg(&mp_type_OSError, translate("I2C operation not supported")); - } - int ret = i2c_p->start(self); - if (ret != 0) { - mp_raise_OSError(-ret); - } - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_1(machine_i2c_start_obj, machine_i2c_start); - -STATIC mp_obj_t machine_i2c_stop(mp_obj_t self_in) { - mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(self_in); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); - if (i2c_p->stop == NULL) { - mp_raise_msg(&mp_type_OSError, translate("I2C operation not supported")); - } - int ret = i2c_p->stop(self); - if (ret != 0) { - mp_raise_OSError(-ret); - } - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_1(machine_i2c_stop_obj, machine_i2c_stop); - -STATIC mp_obj_t machine_i2c_readinto(size_t n_args, const mp_obj_t *args) { - mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(args[0]); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); - if (i2c_p->read == NULL) { - mp_raise_msg(&mp_type_OSError, translate("I2C operation not supported")); - } - - // get the buffer to read into - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_WRITE); - - // work out if we want to send a nack at the end - bool nack = (n_args == 2) ? true : mp_obj_is_true(args[2]); - - // do the read - int ret = i2c_p->read(self, bufinfo.buf, bufinfo.len, nack); - if (ret != 0) { - mp_raise_OSError(-ret); - } - - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_i2c_readinto_obj, 2, 3, machine_i2c_readinto); - -STATIC mp_obj_t machine_i2c_write(mp_obj_t self_in, mp_obj_t buf_in) { - mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(self_in); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); - if (i2c_p->write == NULL) { - mp_raise_msg(&mp_type_OSError, translate("I2C operation not supported")); - } - - // get the buffer to write from - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_READ); - - // do the write - int ret = i2c_p->write(self, bufinfo.buf, bufinfo.len); - if (ret < 0) { - mp_raise_OSError(-ret); - } - - // return number of acks received - return MP_OBJ_NEW_SMALL_INT(ret); -} -MP_DEFINE_CONST_FUN_OBJ_2(machine_i2c_write_obj, machine_i2c_write); - -STATIC mp_obj_t machine_i2c_readfrom(size_t n_args, const mp_obj_t *args) { - mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(args[0]); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); - mp_int_t addr = mp_obj_get_int(args[1]); - vstr_t vstr; - vstr_init_len(&vstr, mp_obj_get_int(args[2])); - bool stop = (n_args == 3) ? true : mp_obj_is_true(args[3]); - int ret = i2c_p->readfrom(self, addr, (uint8_t*)vstr.buf, vstr.len, stop); - if (ret < 0) { - mp_raise_OSError(-ret); - } - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_i2c_readfrom_obj, 3, 4, machine_i2c_readfrom); - -STATIC mp_obj_t machine_i2c_readfrom_into(size_t n_args, const mp_obj_t *args) { - mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(args[0]); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); - mp_int_t addr = mp_obj_get_int(args[1]); - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[2], &bufinfo, MP_BUFFER_WRITE); - bool stop = (n_args == 3) ? true : mp_obj_is_true(args[3]); - int ret = i2c_p->readfrom(self, addr, bufinfo.buf, bufinfo.len, stop); - if (ret < 0) { - mp_raise_OSError(-ret); - } - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_i2c_readfrom_into_obj, 3, 4, machine_i2c_readfrom_into); - -STATIC mp_obj_t machine_i2c_writeto(size_t n_args, const mp_obj_t *args) { - mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(args[0]); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); - mp_int_t addr = mp_obj_get_int(args[1]); - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[2], &bufinfo, MP_BUFFER_READ); - bool stop = (n_args == 3) ? true : mp_obj_is_true(args[3]); - int ret = i2c_p->writeto(self, addr, bufinfo.buf, bufinfo.len, stop); - if (ret < 0) { - mp_raise_OSError(-ret); - } - // return number of acks received - return MP_OBJ_NEW_SMALL_INT(ret); -} -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_i2c_writeto_obj, 3, 4, machine_i2c_writeto); - -STATIC int read_mem(mp_obj_t self_in, uint16_t addr, uint32_t memaddr, uint8_t addrsize, uint8_t *buf, size_t len) { - mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(self_in); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); - uint8_t memaddr_buf[4]; - size_t memaddr_len = 0; - for (int16_t i = addrsize - 8; i >= 0; i -= 8) { - memaddr_buf[memaddr_len++] = memaddr >> i; - } - int ret = i2c_p->writeto(self, addr, memaddr_buf, memaddr_len, false); - if (ret != memaddr_len) { - // must generate STOP - i2c_p->writeto(self, addr, NULL, 0, true); - return ret; - } - return i2c_p->readfrom(self, addr, buf, len, true); -} - -#define MAX_MEMADDR_SIZE (4) -#define BUF_STACK_SIZE (12) - -STATIC int write_mem(mp_obj_t self_in, uint16_t addr, uint32_t memaddr, uint8_t addrsize, const uint8_t *buf, size_t len) { - mp_obj_base_t *self = (mp_obj_base_t*)MP_OBJ_TO_PTR(self_in); - mp_machine_i2c_p_t *i2c_p = (mp_machine_i2c_p_t*)mp_proto_get(self, QSTR_protocol_i2c); - - // need some memory to create the buffer to send; try to use stack if possible - uint8_t buf2_stack[MAX_MEMADDR_SIZE + BUF_STACK_SIZE]; - uint8_t *buf2; - size_t buf2_alloc = 0; - if (len <= BUF_STACK_SIZE) { - buf2 = buf2_stack; - } else { - buf2_alloc = MAX_MEMADDR_SIZE + len; - buf2 = m_new(uint8_t, buf2_alloc); - } - - // create the buffer to send - size_t memaddr_len = 0; - for (int16_t i = addrsize - 8; i >= 0; i -= 8) { - buf2[memaddr_len++] = memaddr >> i; - } - memcpy(buf2 + memaddr_len, buf, len); - - int ret = i2c_p->writeto(self, addr, buf2, memaddr_len + len, true); - if (buf2_alloc != 0) { - m_del(uint8_t, buf2, buf2_alloc); - } - return ret; -} - -STATIC const mp_arg_t machine_i2c_mem_allowed_args[] = { - { MP_QSTR_addr, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_memaddr, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_arg, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_addrsize, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, -}; - -STATIC mp_obj_t machine_i2c_readfrom_mem(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_addr, ARG_memaddr, ARG_n, ARG_addrsize }; - mp_arg_val_t args[MP_ARRAY_SIZE(machine_i2c_mem_allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, - MP_ARRAY_SIZE(machine_i2c_mem_allowed_args), machine_i2c_mem_allowed_args, args); - - // create the buffer to store data into - vstr_t vstr; - vstr_init_len(&vstr, mp_obj_get_int(args[ARG_n].u_obj)); - - // do the transfer - int ret = read_mem(pos_args[0], args[ARG_addr].u_int, args[ARG_memaddr].u_int, - args[ARG_addrsize].u_int, (uint8_t*)vstr.buf, vstr.len); - if (ret < 0) { - mp_raise_OSError(-ret); - } - - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2c_readfrom_mem_obj, 1, machine_i2c_readfrom_mem); - - -STATIC mp_obj_t machine_i2c_readfrom_mem_into(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_addr, ARG_memaddr, ARG_buf, ARG_addrsize }; - mp_arg_val_t args[MP_ARRAY_SIZE(machine_i2c_mem_allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, - MP_ARRAY_SIZE(machine_i2c_mem_allowed_args), machine_i2c_mem_allowed_args, args); - - // get the buffer to store data into - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[ARG_buf].u_obj, &bufinfo, MP_BUFFER_WRITE); - - // do the transfer - int ret = read_mem(pos_args[0], args[ARG_addr].u_int, args[ARG_memaddr].u_int, - args[ARG_addrsize].u_int, bufinfo.buf, bufinfo.len); - if (ret < 0) { - mp_raise_OSError(-ret); - } - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2c_readfrom_mem_into_obj, 1, machine_i2c_readfrom_mem_into); - -STATIC mp_obj_t machine_i2c_writeto_mem(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - enum { ARG_addr, ARG_memaddr, ARG_buf, ARG_addrsize }; - mp_arg_val_t args[MP_ARRAY_SIZE(machine_i2c_mem_allowed_args)]; - mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, - MP_ARRAY_SIZE(machine_i2c_mem_allowed_args), machine_i2c_mem_allowed_args, args); - - // get the buffer to write the data from - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[ARG_buf].u_obj, &bufinfo, MP_BUFFER_READ); - - // do the transfer - int ret = write_mem(pos_args[0], args[ARG_addr].u_int, args[ARG_memaddr].u_int, - args[ARG_addrsize].u_int, bufinfo.buf, bufinfo.len); - if (ret < 0) { - mp_raise_OSError(-ret); - } - - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_i2c_writeto_mem_obj, 1, machine_i2c_writeto_mem); - -STATIC const mp_rom_map_elem_t machine_i2c_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_i2c_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_scan), MP_ROM_PTR(&machine_i2c_scan_obj) }, - - // primitive I2C operations - { MP_ROM_QSTR(MP_QSTR_start), MP_ROM_PTR(&machine_i2c_start_obj) }, - { MP_ROM_QSTR(MP_QSTR_stop), MP_ROM_PTR(&machine_i2c_stop_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&machine_i2c_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&machine_i2c_write_obj) }, - - // standard bus operations - { MP_ROM_QSTR(MP_QSTR_readfrom), MP_ROM_PTR(&machine_i2c_readfrom_obj) }, - { MP_ROM_QSTR(MP_QSTR_readfrom_into), MP_ROM_PTR(&machine_i2c_readfrom_into_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeto), MP_ROM_PTR(&machine_i2c_writeto_obj) }, - - // memory operations - { MP_ROM_QSTR(MP_QSTR_readfrom_mem), MP_ROM_PTR(&machine_i2c_readfrom_mem_obj) }, - { MP_ROM_QSTR(MP_QSTR_readfrom_mem_into), MP_ROM_PTR(&machine_i2c_readfrom_mem_into_obj) }, - { MP_ROM_QSTR(MP_QSTR_writeto_mem), MP_ROM_PTR(&machine_i2c_writeto_mem_obj) }, -}; - -MP_DEFINE_CONST_DICT(mp_machine_soft_i2c_locals_dict, machine_i2c_locals_dict_table); - -int mp_machine_soft_i2c_read(mp_obj_base_t *self_in, uint8_t *dest, size_t len, bool nack) { - machine_i2c_obj_t *self = (machine_i2c_obj_t*)self_in; - while (len--) { - int ret = mp_hal_i2c_read_byte(self, dest++, nack && (len == 0)); - if (ret != 0) { - return ret; - } - } - return 0; // success -} - -int mp_machine_soft_i2c_write(mp_obj_base_t *self_in, const uint8_t *src, size_t len) { - machine_i2c_obj_t *self = (machine_i2c_obj_t*)self_in; - int num_acks = 0; - while (len--) { - int ret = mp_hal_i2c_write_byte(self, *src++); - if (ret < 0) { - return ret; - } else if (ret != 0) { - // nack received, stop sending - break; - } - ++num_acks; - } - return num_acks; -} - -STATIC const mp_machine_i2c_p_t mp_machine_soft_i2c_p = { - MP_PROTO_IMPLEMENT(MP_QSTR_protocol_i2c) - .start = (int(*)(mp_obj_base_t*))mp_hal_i2c_start, - .stop = (int(*)(mp_obj_base_t*))mp_hal_i2c_stop, - .read = mp_machine_soft_i2c_read, - .write = mp_machine_soft_i2c_write, - .readfrom = mp_machine_soft_i2c_readfrom, - .writeto = mp_machine_soft_i2c_writeto, -}; - -const mp_obj_type_t machine_i2c_type = { - { &mp_type_type }, - .name = MP_QSTR_I2C, - .make_new = machine_i2c_make_new, - .protocol = &mp_machine_soft_i2c_p, - .locals_dict = (mp_obj_dict_t*)&mp_machine_soft_i2c_locals_dict, -}; - -#endif // MICROPY_PY_MACHINE_I2C diff --git a/extmod/machine_i2c.h b/extmod/machine_i2c.h deleted file mode 100644 index 7f5ee568e..000000000 --- a/extmod/machine_i2c.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_EXTMOD_MACHINE_I2C_H -#define MICROPY_INCLUDED_EXTMOD_MACHINE_I2C_H - -#include "py/obj.h" -#include "py/proto.h" - -// I2C protocol -// the first 4 methods can be NULL, meaning operation is not supported -typedef struct _mp_machine_i2c_p_t { - MP_PROTOCOL_HEAD - int (*start)(mp_obj_base_t *obj); - int (*stop)(mp_obj_base_t *obj); - int (*read)(mp_obj_base_t *obj, uint8_t *dest, size_t len, bool nack); - int (*write)(mp_obj_base_t *obj, const uint8_t *src, size_t len); - int (*readfrom)(mp_obj_base_t *obj, uint16_t addr, uint8_t *dest, size_t len, bool stop); - int (*writeto)(mp_obj_base_t *obj, uint16_t addr, const uint8_t *src, size_t len, bool stop); -} mp_machine_i2c_p_t; - -typedef struct _mp_machine_soft_i2c_obj_t { - mp_obj_base_t base; - uint32_t us_delay; - uint32_t us_timeout; - mp_hal_pin_obj_t scl; - mp_hal_pin_obj_t sda; -} mp_machine_soft_i2c_obj_t; - -extern const mp_obj_type_t machine_i2c_type; -extern const mp_obj_dict_t mp_machine_soft_i2c_locals_dict; - -int mp_machine_soft_i2c_readfrom(mp_obj_base_t *self_in, uint16_t addr, uint8_t *dest, size_t len, bool stop); -int mp_machine_soft_i2c_writeto(mp_obj_base_t *self_in, uint16_t addr, const uint8_t *src, size_t len, bool stop); - -#endif // MICROPY_INCLUDED_EXTMOD_MACHINE_I2C_H diff --git a/extmod/machine_spi.c b/extmod/machine_spi.c deleted file mode 100644 index 4ead321d9..000000000 --- a/extmod/machine_spi.c +++ /dev/null @@ -1,286 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include <stdio.h> -#include <string.h> - -#include "py/runtime.h" -#include "extmod/machine_spi.h" - -#include "supervisor/shared/translate.h" - -#if MICROPY_PY_MACHINE_SPI - -// if a port didn't define MSB/LSB constants then provide them -#ifndef MICROPY_PY_MACHINE_SPI_MSB -#define MICROPY_PY_MACHINE_SPI_MSB (0) -#define MICROPY_PY_MACHINE_SPI_LSB (1) -#endif - -/******************************************************************************/ -// MicroPython bindings for generic machine.SPI - -STATIC mp_obj_t mp_machine_soft_spi_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args); - -mp_obj_t mp_machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - // check the id argument, if given - if (n_args > 0) { - if (args[0] != MP_OBJ_NEW_SMALL_INT(-1)) { - #if defined(MICROPY_PY_MACHINE_SPI_MAKE_NEW) - // dispatch to port-specific constructor - extern mp_obj_t MICROPY_PY_MACHINE_SPI_MAKE_NEW(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args); - return MICROPY_PY_MACHINE_SPI_MAKE_NEW(type, n_args, args, kw_args); - #else - mp_raise_ValueError(translate("invalid SPI peripheral")); - #endif - } - --n_args; - ++args; - } - - // software SPI - return mp_machine_soft_spi_make_new(type, n_args, args, kw_args); -} - -STATIC mp_obj_t machine_spi_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { - mp_obj_base_t *s = (mp_obj_base_t*)MP_OBJ_TO_PTR(args[0]); - mp_machine_spi_p_t *spi_p = (mp_machine_spi_p_t*)mp_proto_get(QSTR_protocol_spi, s); - spi_p->init(s, n_args - 1, args + 1, kw_args); - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_spi_init_obj, 1, machine_spi_init); - -STATIC mp_obj_t machine_spi_deinit(mp_obj_t self) { - mp_obj_base_t *s = (mp_obj_base_t*)MP_OBJ_TO_PTR(self); - mp_machine_spi_p_t *spi_p = (mp_machine_spi_p_t*)mp_proto_get(QSTR_protocol_spi, s); - if (spi_p->deinit != NULL) { - spi_p->deinit(s); - } - return mp_const_none; -} -STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_spi_deinit_obj, machine_spi_deinit); - -STATIC void mp_machine_spi_transfer(mp_obj_t self, size_t len, const void *src, void *dest) { - mp_obj_base_t *s = (mp_obj_base_t*)MP_OBJ_TO_PTR(self); - mp_machine_spi_p_t *spi_p = (mp_machine_spi_p_t*)mp_proto_get(QSTR_protocol_spi, s); - spi_p->transfer(s, len, src, dest); -} - -STATIC mp_obj_t mp_machine_spi_read(size_t n_args, const mp_obj_t *args) { - vstr_t vstr; - vstr_init_len(&vstr, mp_obj_get_int(args[1])); - memset(vstr.buf, n_args == 3 ? mp_obj_get_int(args[2]) : 0, vstr.len); - mp_machine_spi_transfer(args[0], vstr.len, vstr.buf, vstr.buf); - return mp_obj_new_str_from_vstr(&mp_type_bytes, &vstr); -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_read_obj, 2, 3, mp_machine_spi_read); - -STATIC mp_obj_t mp_machine_spi_readinto(size_t n_args, const mp_obj_t *args) { - mp_buffer_info_t bufinfo; - mp_get_buffer_raise(args[1], &bufinfo, MP_BUFFER_WRITE); - memset(bufinfo.buf, n_args == 3 ? mp_obj_get_int(args[2]) : 0, bufinfo.len); - mp_machine_spi_transfer(args[0], bufinfo.len, bufinfo.buf, bufinfo.buf); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_readinto_obj, 2, 3, mp_machine_spi_readinto); - -STATIC mp_obj_t mp_machine_spi_write(mp_obj_t self, mp_obj_t wr_buf) { - mp_buffer_info_t src; - mp_get_buffer_raise(wr_buf, &src, MP_BUFFER_READ); - mp_machine_spi_transfer(self, src.len, (const uint8_t*)src.buf, NULL); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_2(mp_machine_spi_write_obj, mp_machine_spi_write); - -STATIC mp_obj_t mp_machine_spi_write_readinto(mp_obj_t self, mp_obj_t wr_buf, mp_obj_t rd_buf) { - mp_buffer_info_t src; - mp_get_buffer_raise(wr_buf, &src, MP_BUFFER_READ); - mp_buffer_info_t dest; - mp_get_buffer_raise(rd_buf, &dest, MP_BUFFER_WRITE); - if (src.len != dest.len) { - mp_raise_ValueError(translate("buffers must be the same length")); - } - mp_machine_spi_transfer(self, src.len, src.buf, dest.buf); - return mp_const_none; -} -MP_DEFINE_CONST_FUN_OBJ_3(mp_machine_spi_write_readinto_obj, mp_machine_spi_write_readinto); - -STATIC const mp_rom_map_elem_t machine_spi_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_spi_init_obj) }, - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_spi_deinit_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_machine_spi_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_machine_spi_readinto_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_machine_spi_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_write_readinto), MP_ROM_PTR(&mp_machine_spi_write_readinto_obj) }, - - { MP_ROM_QSTR(MP_QSTR_MSB), MP_ROM_INT(MICROPY_PY_MACHINE_SPI_MSB) }, - { MP_ROM_QSTR(MP_QSTR_LSB), MP_ROM_INT(MICROPY_PY_MACHINE_SPI_LSB) }, -}; - -MP_DEFINE_CONST_DICT(mp_machine_spi_locals_dict, machine_spi_locals_dict_table); - -/******************************************************************************/ -// Implementation of soft SPI - -STATIC uint32_t baudrate_from_delay_half(uint32_t delay_half) { - #ifdef MICROPY_HW_SOFTSPI_MIN_DELAY - if (delay_half == MICROPY_HW_SOFTSPI_MIN_DELAY) { - return MICROPY_HW_SOFTSPI_MAX_BAUDRATE; - } else - #endif - { - return 500000 / delay_half; - } -} - -STATIC uint32_t baudrate_to_delay_half(uint32_t baudrate) { - #ifdef MICROPY_HW_SOFTSPI_MIN_DELAY - if (baudrate >= MICROPY_HW_SOFTSPI_MAX_BAUDRATE) { - return MICROPY_HW_SOFTSPI_MIN_DELAY; - } else - #endif - { - uint32_t delay_half = 500000 / baudrate; - // round delay_half up so that: actual_baudrate <= requested_baudrate - if (500000 % baudrate != 0) { - delay_half += 1; - } - return delay_half; - } -} - -STATIC void mp_machine_soft_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - mp_machine_soft_spi_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "SoftSPI(baudrate=%u, polarity=%u, phase=%u," - " sck=" MP_HAL_PIN_FMT ", mosi=" MP_HAL_PIN_FMT ", miso=" MP_HAL_PIN_FMT ")", - baudrate_from_delay_half(self->spi.delay_half), self->spi.polarity, self->spi.phase, - mp_hal_pin_name(self->spi.sck), mp_hal_pin_name(self->spi.mosi), mp_hal_pin_name(self->spi.miso)); -} - -STATIC mp_obj_t mp_machine_soft_spi_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *all_args, mp_map_t *kw_args) { - enum { ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits, ARG_firstbit, ARG_sck, ARG_mosi, ARG_miso }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 500000} }, - { MP_QSTR_polarity, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_phase, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, - { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, - { MP_QSTR_firstbit, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = MICROPY_PY_MACHINE_SPI_MSB} }, - { MP_QSTR_sck, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_mosi, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, all_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - // create new object - mp_machine_soft_spi_obj_t *self = m_new_obj(mp_machine_soft_spi_obj_t); - self->base.type = &mp_machine_soft_spi_type; - - // set parameters - self->spi.delay_half = baudrate_to_delay_half(args[ARG_baudrate].u_int); - self->spi.polarity = args[ARG_polarity].u_int; - self->spi.phase = args[ARG_phase].u_int; - if (args[ARG_bits].u_int != 8) { - mp_raise_ValueError(translate("bits must be 8")); - } - if (args[ARG_firstbit].u_int != MICROPY_PY_MACHINE_SPI_MSB) { - mp_raise_ValueError(translate("firstbit must be MSB")); - } - if (args[ARG_sck].u_obj == MP_OBJ_NULL - || args[ARG_mosi].u_obj == MP_OBJ_NULL - || args[ARG_miso].u_obj == MP_OBJ_NULL) { - mp_raise_ValueError(translate("must specify all of sck/mosi/miso")); - } - self->spi.sck = mp_hal_get_pin_obj(args[ARG_sck].u_obj); - self->spi.mosi = mp_hal_get_pin_obj(args[ARG_mosi].u_obj); - self->spi.miso = mp_hal_get_pin_obj(args[ARG_miso].u_obj); - - // configure bus - mp_soft_spi_ioctl(&self->spi, MP_SPI_IOCTL_INIT); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC void mp_machine_soft_spi_init(mp_obj_base_t *self_in, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_machine_soft_spi_obj_t *self = (mp_machine_soft_spi_obj_t*)self_in; - - enum { ARG_baudrate, ARG_polarity, ARG_phase, ARG_sck, ARG_mosi, ARG_miso }; - static const mp_arg_t allowed_args[] = { - { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_polarity, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_phase, MP_ARG_INT, {.u_int = -1} }, - { MP_QSTR_sck, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_mosi, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - { MP_QSTR_miso, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} }, - }; - mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; - mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - - if (args[ARG_baudrate].u_int != -1) { - self->spi.delay_half = baudrate_to_delay_half(args[ARG_baudrate].u_int); - } - if (args[ARG_polarity].u_int != -1) { - self->spi.polarity = args[ARG_polarity].u_int; - } - if (args[ARG_phase].u_int != -1) { - self->spi.phase = args[ARG_phase].u_int; - } - if (args[ARG_sck].u_obj != MP_OBJ_NULL) { - self->spi.sck = mp_hal_get_pin_obj(args[ARG_sck].u_obj); - } - if (args[ARG_mosi].u_obj != MP_OBJ_NULL) { - self->spi.mosi = mp_hal_get_pin_obj(args[ARG_mosi].u_obj); - } - if (args[ARG_miso].u_obj != MP_OBJ_NULL) { - self->spi.miso = mp_hal_get_pin_obj(args[ARG_miso].u_obj); - } - - // configure bus - mp_soft_spi_ioctl(&self->spi, MP_SPI_IOCTL_INIT); -} - -STATIC void mp_machine_soft_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8_t *src, uint8_t *dest) { - mp_machine_soft_spi_obj_t *self = (mp_machine_soft_spi_obj_t*)self_in; - mp_soft_spi_transfer(&self->spi, len, src, dest); -} - -const mp_machine_spi_p_t mp_machine_soft_spi_p = { - MP_PROTO_IMPLEMENT(MP_QSTR_protocol_spi) - .init = mp_machine_soft_spi_init, - .deinit = NULL, - .transfer = mp_machine_soft_spi_transfer, -}; - -const mp_obj_type_t mp_machine_soft_spi_type = { - { &mp_type_type }, - .name = MP_QSTR_SoftSPI, - .print = mp_machine_soft_spi_print, - .make_new = mp_machine_spi_make_new, // delegate to master constructor - .protocol = &mp_machine_soft_spi_p, - .locals_dict = (mp_obj_dict_t*)&mp_machine_spi_locals_dict, -}; - -#endif // MICROPY_PY_MACHINE_SPI diff --git a/extmod/ulab b/extmod/ulab -Subproject 0394801933f6e68a5bc7cdb0da76c7884e8cf70 +Subproject 48cb939839fcf091fcdcdf742530b1b650066a1 diff --git a/lib/mp3 b/lib/mp3 -Subproject c3c664bf4db6a36d11808dfcbb5dbf7cff1715b +Subproject bc58a654964c799e972719a63ff12694998f354 diff --git a/locale/ID.po b/locale/ID.po index c40ac105c..aab5f8281 100644 --- a/locale/ID.po +++ b/locale/ID.po @@ -3,25 +3,28 @@ # This file is distributed under the same license as the PACKAGE package. # FIRST AUTHOR <EMAIL@ADDRESS>, YEAR. # -#, fuzzy msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" -"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" -"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n" +"POT-Creation-Date: 2020-07-02 15:29+0200\n" +"PO-Revision-Date: 2020-07-06 18:10+0000\n" +"Last-Translator: oon arfiandwi <oon.arfiandwi@gmail.com>\n" "Language-Team: LANGUAGE <LL@li.org>\n" -"Language: \n" +"Language: ID\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" +"Plural-Forms: nplurals=1; plural=0;\n" +"X-Generator: Weblate 4.2-dev\n" #: main.c msgid "" "\n" "Code done running. Waiting for reload.\n" msgstr "" +"\n" +"Kode selesai berjalan. Menunggu memuat ulang.\n" #: supervisor/shared/safe_mode.c msgid "" @@ -29,20 +32,25 @@ msgid "" "Please file an issue with the contents of your CIRCUITPY drive at \n" "https://github.com/adafruit/circuitpython/issues\n" msgstr "" +"\n" +"Harap ajukan masalah dengan konten drive CIRCUITPY Anda di\n" +"https://github.com/adafruit/circuitpython/issues\n" #: supervisor/shared/safe_mode.c msgid "" "\n" "To exit, please reset the board without " msgstr "" +"\n" +"Untuk keluar, harap setel ulang papan tanpa" #: py/obj.c msgid " File \"%q\"" -msgstr "" +msgstr " File \"%q\"" #: py/obj.c msgid " File \"%q\", line %d" -msgstr "" +msgstr " File \"%q\", baris %d" #: main.c msgid " output:\n" @@ -51,44 +59,51 @@ msgstr "output:\n" #: py/objstr.c #, c-format msgid "%%c requires int or char" -msgstr "" +msgstr "%%c harus int atau char" #: shared-bindings/rgbmatrix/RGBMatrix.c #, c-format msgid "%d address pins and %d rgb pins indicate a height of %d, not %d" +msgstr "pin alamat %d dan pin rgb %d menunjukkan tinggi %d, bukan %d" + +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" msgstr "" #: shared-bindings/microcontroller/Pin.c msgid "%q in use" -msgstr "" +msgstr "%q sedang digunakan" #: py/obj.c msgid "%q index out of range" -msgstr "" +msgstr "%q indeks di luar batas" #: py/obj.c msgid "%q indices must be integers, not %s" -msgstr "" +msgstr "indeks %q harus bilangan bulat, bukan %s" #: shared-bindings/vectorio/Polygon.c msgid "%q list must be a list" -msgstr "" +msgstr "daftar %q harus berupa daftar" #: shared-bindings/_bleio/CharacteristicBuffer.c #: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c #: shared-bindings/displayio/Shape.c shared-bindings/vectorio/Circle.c #: shared-bindings/vectorio/Rectangle.c -#, fuzzy msgid "%q must be >= 1" -msgstr "buffers harus mempunyai panjang yang sama" +msgstr "%q harus >= 1" #: shared-module/vectorio/Polygon.c msgid "%q must be a tuple of length 2" -msgstr "" +msgstr "%q harus berupa tuple dengan panjang 2" + +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "pin %q tidak valid" #: shared-bindings/fontio/BuiltinFont.c msgid "%q should be an int" -msgstr "" +msgstr "%q harus berupa int" #: py/bc.c py/objnamedtuple.c msgid "%q() takes %d positional arguments but %d were given" @@ -101,7 +116,7 @@ msgstr "'%q' argumen dibutuhkan" #: py/emitinlinethumb.c py/emitinlinextensa.c #, c-format msgid "'%s' expects a label" -msgstr "" +msgstr "'%s' mengharapkan sebuah label" #: py/emitinlinethumb.c py/emitinlinextensa.c #, c-format @@ -141,7 +156,7 @@ msgstr "'%s' mengharapkan {r0, r1, ...}" #: py/emitinlinextensa.c #, c-format msgid "'%s' integer %d is not within range %d..%d" -msgstr "" +msgstr "'%s' integer %d tidak dalam kisaran %d..%d" #: py/emitinlinethumb.c #, c-format @@ -150,53 +165,53 @@ msgstr "'%s' integer 0x%x tidak cukup didalam mask 0x%x" #: py/runtime.c msgid "'%s' object cannot assign attribute '%q'" -msgstr "" +msgstr "Objek '%s' tidak dapat menetapkan atribut '%q'" #: py/proto.c msgid "'%s' object does not support '%q'" -msgstr "" +msgstr "Objek '%s' tidak mendukung '%q'" #: py/obj.c #, c-format msgid "'%s' object does not support item assignment" -msgstr "" +msgstr "Objek '%s' tidak mendukung penetapan item" #: py/obj.c #, c-format msgid "'%s' object does not support item deletion" -msgstr "" +msgstr "Objek '%s' tidak mendukung penghapusan item" #: py/runtime.c msgid "'%s' object has no attribute '%q'" -msgstr "" +msgstr "Objek '%s' tidak memiliki atribut '%q'" #: py/runtime.c #, c-format msgid "'%s' object is not an iterator" -msgstr "" +msgstr "Objek '%s' bukan iterator" #: py/objtype.c py/runtime.c #, c-format msgid "'%s' object is not callable" -msgstr "" +msgstr "Objek '%s' tidak dapat dipanggil" #: py/runtime.c #, c-format msgid "'%s' object is not iterable" -msgstr "" +msgstr "'%s' objek tidak dapat diulang" #: py/obj.c #, c-format msgid "'%s' object is not subscriptable" -msgstr "" +msgstr "Objek '%s' tidak dapat disubkripsikan" #: py/objstr.c msgid "'=' alignment not allowed in string format specifier" -msgstr "" +msgstr "'=' perataan tidak diizinkan dalam penentu format string" #: shared-module/struct/__init__.c msgid "'S' and 'O' are not supported format types" -msgstr "" +msgstr "'S' dan 'O' bukan tipe format yang didukung" #: py/compile.c msgid "'align' requires 1 argument" @@ -204,7 +219,7 @@ msgstr "'align' membutuhkan 1 argumen" #: py/compile.c msgid "'async for' or 'async with' outside async function" -msgstr "" +msgstr "'async for' atau 'async with' di luar fungsi async" #: py/compile.c msgid "'await' outside function" @@ -244,15 +259,15 @@ msgstr "*x harus menjadi target assignment" #: py/obj.c msgid ", in %q\n" -msgstr "" +msgstr ", dalam %q\n" #: py/objcomplex.c msgid "0.0 to a complex power" -msgstr "" +msgstr "0.0 ke kompleks berpangkat" #: py/modbuiltins.c msgid "3-arg pow() not supported" -msgstr "" +msgstr "pow() 3-arg tidak didukung" #: ports/atmel-samd/common-hal/countio/Counter.c #: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c @@ -260,13 +275,13 @@ msgid "A hardware interrupt channel is already in use" msgstr "Sebuah channel hardware interrupt sedang digunakan" #: shared-bindings/_bleio/Address.c -#, fuzzy, c-format +#, c-format msgid "Address must be %d bytes long" -msgstr "buffers harus mempunyai panjang yang sama" +msgstr "Alamat harus sepanjang %d byte" #: shared-bindings/_bleio/Address.c msgid "Address type out of range" -msgstr "" +msgstr "Jenis alamat di luar batas" #: ports/nrf/common-hal/busio/I2C.c msgid "All I2C peripherals are in use" @@ -277,9 +292,8 @@ msgid "All SPI peripherals are in use" msgstr "Semua perangkat SPI sedang digunakan" #: ports/nrf/common-hal/busio/UART.c -#, fuzzy msgid "All UART peripherals are in use" -msgstr "Semua perangkat I2C sedang digunakan" +msgstr "Semua perangkat UART sedang digunakan" #: ports/atmel-samd/common-hal/audioio/AudioOut.c msgid "All event channels in use" @@ -293,6 +307,7 @@ msgstr "Semua channel event yang disinkronisasi sedang digunakan" msgid "All timers for this pin are in use" msgstr "Semua timer untuk pin ini sedang digunakan" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -300,17 +315,17 @@ msgstr "Semua timer untuk pin ini sedang digunakan" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "Semua timer sedang digunakan" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Already advertising." -msgstr "" +msgstr "Sudah disebarkan." #: ports/cxd56/common-hal/analogio/AnalogIn.c msgid "AnalogIn not supported on given pin" -msgstr "" +msgstr "AnalogIn tidak didukung pada pin yang diberikan" #: ports/cxd56/common-hal/analogio/AnalogOut.c #: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c @@ -320,7 +335,7 @@ msgstr "fungsionalitas AnalogOut tidak didukung" #: shared-bindings/analogio/AnalogOut.c msgid "AnalogOut is only 16 bits. Value must be less than 65536." -msgstr "" +msgstr "AnalogOut hanya 16 bit. Nilai harus kurang dari 65536." #: ports/atmel-samd/common-hal/analogio/AnalogOut.c msgid "AnalogOut not supported on given pin" @@ -333,19 +348,19 @@ msgstr "Send yang lain sudah aktif" #: shared-bindings/pulseio/PulseOut.c msgid "Array must contain halfwords (type 'H')" -msgstr "" +msgstr "Array harus mengandung halfwords (ketik 'H')" #: shared-bindings/nvm/ByteArray.c msgid "Array values should be single bytes." -msgstr "" +msgstr "Nilai array harus berupa byte tunggal." -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" -msgstr "" +msgstr "Paling banyak %d %q dapat ditentukan (bukan %d)" #: supervisor/shared/safe_mode.c msgid "Attempted heap allocation when MicroPython VM not running." -msgstr "" +msgstr "Mencoba alokasi heap ketika MicroPython VM tidak berjalan." #: main.c msgid "Auto-reload is off.\n" @@ -362,7 +377,7 @@ msgstr "" #: shared-module/displayio/Display.c #: shared-module/framebufferio/FramebufferDisplay.c msgid "Below minimum frame rate" -msgstr "" +msgstr "Di bawah frame rate minimum" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c msgid "Bit clock and word select must share a clock unit" @@ -370,7 +385,7 @@ msgstr "Bit clock dan word harus memiliki kesamaan pada clock unit" #: shared-bindings/audiobusio/PDMIn.c msgid "Bit depth must be multiple of 8." -msgstr "" +msgstr "Kedalaman bit harus kelipatan 8." #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "Both RX and TX required for flow control" @@ -384,85 +399,89 @@ msgstr "Kedua pin harus mendukung hardware interrut" #: shared-bindings/framebufferio/FramebufferDisplay.c #: shared-bindings/rgbmatrix/RGBMatrix.c msgid "Brightness must be 0-1.0" -msgstr "" +msgstr "Kecerahan harus di antara 0-1.0" #: shared-bindings/supervisor/__init__.c msgid "Brightness must be between 0 and 255" -msgstr "" +msgstr "Brightness harus di antara 0 dan 255" #: shared-bindings/displayio/Display.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Brightness not adjustable" -msgstr "" +msgstr "Brightness tidak bisa disesuaikan" #: shared-bindings/_bleio/UUID.c #, c-format msgid "Buffer + offset too small %d %d %d" -msgstr "" +msgstr "Buffer + offset terlalu kecil %d %d %d" #: shared-module/usb_hid/Device.c #, c-format msgid "Buffer incorrect size. Should be %d bytes." -msgstr "" +msgstr "Ukuran buffer salah. Seharusnya %d byte." #: shared-bindings/displayio/Display.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Buffer is not a bytearray." -msgstr "" +msgstr "Buffer bukan bytearray." #: shared-bindings/displayio/Display.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Buffer is too small" -msgstr "" +msgstr "Buffer terlalu kecil" #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #, c-format msgid "Buffer length %d too big. It must be less than %d" -msgstr "" +msgstr "Panjang buffer %d terlalu besar. Itu harus kurang dari %d" + +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "Panjang buffer harus kelipatan 512" #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" -msgstr "" +msgstr "Penyangga harus memiliki panjang setidaknya 1" #: ports/nrf/common-hal/_bleio/PacketBuffer.c msgid "Buffer too large and unable to allocate" -msgstr "" +msgstr "Buffer terlalu besar dan tidak dapat dialokasikan" #: shared-bindings/_bleio/PacketBuffer.c #, c-format msgid "Buffer too short by %d bytes" -msgstr "" +msgstr "Buffer terlalu pendek untuk %d byte" #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c -#, fuzzy, c-format +#, c-format msgid "Bus pin %d is already in use" -msgstr "DAC sudah digunakan" +msgstr "Pin bus %d sudah digunakan" #: shared-bindings/_bleio/UUID.c -#, fuzzy msgid "Byte buffer must be 16 bytes." -msgstr "buffers harus mempunyai panjang yang sama" +msgstr "Byte buffer harus 16 byte." #: shared-bindings/nvm/ByteArray.c msgid "Bytes must be between 0 and 255." -msgstr "" +msgstr "Bytes harus di antara 0 dan 255." #: shared-bindings/aesio/aes.c msgid "CBC blocks must be multiples of 16 bytes" -msgstr "" +msgstr "Blok CBC harus merupakan kelipatan 16 byte" #: py/objtype.c msgid "Call super().__init__() before accessing native object." -msgstr "" +msgstr "Panggil super().__init__() sebelum mengakses objek asli." #: ports/nrf/common-hal/_bleio/Characteristic.c msgid "Can't set CCCD on local Characteristic" -msgstr "" +msgstr "Tidak dapat mengatur CCCD pada Karakteristik lokal" #: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c msgid "Cannot delete values" -msgstr "" +msgstr "Tidak dapat menghapus nilai" #: ports/atmel-samd/common-hal/digitalio/DigitalInOut.c #: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c @@ -471,13 +490,14 @@ msgid "Cannot get pull while in output mode" msgstr "Tidak bisa mendapatkan pull pada saat mode output" #: ports/nrf/common-hal/microcontroller/Processor.c -#, fuzzy msgid "Cannot get temperature" -msgstr "Tidak bisa mendapatkan temperatur. status: 0x%02x" +msgstr "Tidak bisa mendapatkan suhu" #: shared-bindings/_bleio/Adapter.c msgid "Cannot have scan responses for extended, connectable advertisements." msgstr "" +"Tidak dapat memiliki respon pindaian untuk penyebaran yang terhubung dan " +"diperluas." #: ports/atmel-samd/common-hal/audioio/AudioOut.c msgid "Cannot output both channels on the same pin" @@ -487,15 +507,15 @@ msgstr "" #: shared-module/bitbangio/SPI.c msgid "Cannot read without MISO pin." -msgstr "" +msgstr "Tidak dapat membaca tanpa pin MISO." #: shared-bindings/audiobusio/PDMIn.c msgid "Cannot record to a file" -msgstr "" +msgstr "Tidak dapat merekam ke file" #: shared-module/storage/__init__.c msgid "Cannot remount '/' when USB is active." -msgstr "" +msgstr "Tidak dapat memasang kembali '/' ketika USB aktif." #: ports/atmel-samd/common-hal/microcontroller/__init__.c #: ports/cxd56/common-hal/microcontroller/__init__.c @@ -507,19 +527,19 @@ msgstr "" #: shared-bindings/digitalio/DigitalInOut.c msgid "Cannot set value when direction is input." -msgstr "" +msgstr "Tidak dapat menetapkan nilai saat arah input." #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "Cannot specify RTS or CTS in RS485 mode" -msgstr "" +msgstr "Tidak dapat menentukan RTS atau CTS dalam mode RS485" #: py/objslice.c msgid "Cannot subclass slice" -msgstr "" +msgstr "Tidak dapat membuat subkelas dari irisan" #: shared-module/bitbangio/SPI.c msgid "Cannot transfer without MOSI and MISO pins." -msgstr "" +msgstr "Tidak dapat transfer tanpa pin MOSI dan MISO." #: extmod/moductypes.c msgid "Cannot unambiguously get sizeof scalar" @@ -528,32 +548,36 @@ msgstr "tidak dapat mendapatkan ukuran scalar secara tidak ambigu" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Cannot vary frequency on a timer that is already in use" msgstr "" +"Tidak dapat membuat variasi frekuensi pada penghitung waktu yang sudah " +"digunakan" #: shared-module/bitbangio/SPI.c msgid "Cannot write without MOSI pin." -msgstr "" +msgstr "Tidak dapat menulis tanpa pin MOSI." #: shared-bindings/_bleio/CharacteristicBuffer.c msgid "CharacteristicBuffer writing not provided" -msgstr "" +msgstr "Menulis CharacteristicBuffer tidak tersedia" #: supervisor/shared/safe_mode.c msgid "CircuitPython core code crashed hard. Whoops!\n" -msgstr "" +msgstr "Kode inti CircuitPython mengalami crash. Aduh!\n" #: supervisor/shared/safe_mode.c msgid "" "CircuitPython is in safe mode because you pressed the reset button during " "boot. Press again to exit safe mode.\n" msgstr "" +"CircuitPython dalam mode aman karena Anda menekan tombol reset saat boot. " +"Tekan lagi untuk keluar dari mode aman.\n" #: shared-module/bitbangio/SPI.c msgid "Clock pin init failed." -msgstr "" +msgstr "Init pin clock gagal." #: shared-module/bitbangio/I2C.c msgid "Clock stretch too long" -msgstr "" +msgstr "Peregangan clock terlalu panjang" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c msgid "Clock unit in use" @@ -561,25 +585,34 @@ msgstr "Clock unit sedang digunakan" #: shared-bindings/_pew/PewPew.c msgid "Column entry must be digitalio.DigitalInOut" -msgstr "" +msgstr "Entri kolom harus digitalio.DigitalInOut" #: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c #: shared-bindings/displayio/ParallelBus.c msgid "Command must be an int between 0 and 255" -msgstr "" +msgstr "Perintah harus berupa int di antara 0 dan 255" #: shared-bindings/_bleio/Connection.c msgid "" "Connection has been disconnected and can no longer be used. Create a new " "connection." msgstr "" +"Koneksi telah terputus dan tidak dapat lagi digunakan. Buat koneksi baru." #: py/persistentcode.c msgid "Corrupt .mpy file" -msgstr "" +msgstr "File .mpy rusak" #: py/emitglue.c msgid "Corrupt raw code" +msgstr "Kode raw rusak" + +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" msgstr "" #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c @@ -588,61 +621,61 @@ msgstr "Tidak dapat menginisialisasi UART" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not initialize channel" -msgstr "" +msgstr "Tidak dapat menginisialisasi kanal" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not initialize timer" -msgstr "" +msgstr "Tidak dapat menginisialisasi timer" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not re-init channel" -msgstr "" +msgstr "Tidak dapat menginisialisasi ulang kanal" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not re-init timer" -msgstr "" +msgstr "Tidak dapat menginisialisasi ulang timer" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not restart PWM" -msgstr "" +msgstr "Tidak dapat memulai ulang PWM" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not start PWM" -msgstr "" +msgstr "Tidak dapat memulai PWM" #: ports/stm/common-hal/busio/UART.c msgid "Could not start interrupt, RX busy" -msgstr "" +msgstr "Tidak dapat memulai interupsi, RX sibuk" #: shared-module/audiomp3/MP3Decoder.c msgid "Couldn't allocate decoder" -msgstr "" +msgstr "Tidak dapat mengalokasikan dekoder" #: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c #: shared-module/audiomp3/MP3Decoder.c msgid "Couldn't allocate first buffer" -msgstr "" +msgstr "Tidak dapat mengalokasikan penyangga pertama" #: shared-module/audiomp3/MP3Decoder.c msgid "Couldn't allocate input buffer" -msgstr "" +msgstr "Tidak dapat mengalokasikan penyangga masukan" #: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c #: shared-module/audiomp3/MP3Decoder.c msgid "Couldn't allocate second buffer" -msgstr "" +msgstr "Tidak dapat mengalokasikan penyangga kedua" #: supervisor/shared/safe_mode.c msgid "Crash into the HardFault_Handler." -msgstr "" +msgstr "Gagal ke HardFault_Handler." #: ports/stm/common-hal/analogio/AnalogOut.c msgid "DAC Channel Init Error" -msgstr "" +msgstr "Terjadi kesalahan saat menginisialisasi kanal DAC" #: ports/stm/common-hal/analogio/AnalogOut.c msgid "DAC Device Init Error" -msgstr "" +msgstr "Terjadi kesalahan saat menginisialisasi perangkat DAC" #: ports/atmel-samd/common-hal/audioio/AudioOut.c msgid "DAC already in use" @@ -651,11 +684,11 @@ msgstr "DAC sudah digunakan" #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c msgid "Data 0 pin must be byte aligned" -msgstr "" +msgstr "Data 0 pin harus byte disejajarkan" #: shared-module/audiocore/WaveFile.c msgid "Data chunk must follow fmt chunk" -msgstr "" +msgstr "Potongan data harus mengikuti fmt chunk" #: ports/nrf/common-hal/_bleio/Adapter.c #, fuzzy @@ -664,34 +697,34 @@ msgstr "Tidak bisa menyesuaikan data ke dalam paket advertisment" #: shared-bindings/audiobusio/PDMIn.c msgid "Destination capacity is smaller than destination_length." -msgstr "" +msgstr "Kapasitas tujuan lebih kecil dari destination_length." #: ports/nrf/common-hal/audiobusio/I2SOut.c msgid "Device in use" -msgstr "" +msgstr "Perangkat sedang digunakan" #: ports/cxd56/common-hal/digitalio/DigitalInOut.c msgid "DigitalInOut not supported on given pin" -msgstr "" +msgstr "DigitalInOut tidak didukung pada pin yang diberikan" #: shared-bindings/displayio/Display.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Display must have a 16 bit colorspace." -msgstr "" +msgstr "Tampilan harus memiliki ruang warna 16 bit." #: shared-bindings/displayio/Display.c #: shared-bindings/displayio/EPaperDisplay.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Display rotation must be in 90 degree increments" -msgstr "" +msgstr "Rotasi tampilan harus dalam kelipatan 90 derajat" #: shared-bindings/digitalio/DigitalInOut.c msgid "Drive mode not used when direction is input." -msgstr "" +msgstr "Mode kendara tidak digunakan saat arah input." #: shared-bindings/aesio/aes.c msgid "ECB only operates on 16 bytes at a time" -msgstr "" +msgstr "ECB hanya beroperasi pada 16 byte di satu waktu" #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/ps2io/Ps2.c @@ -704,46 +737,47 @@ msgstr "Channel EXTINT sedang digunakan" msgid "Error in regex" msgstr "Error pada regex" -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" -msgstr "" +msgstr "Diharapkan %q" #: shared-bindings/_bleio/CharacteristicBuffer.c #: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c msgid "Expected a Characteristic" -msgstr "" +msgstr "Diharapkan sebuah Karakteristik" #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" -msgstr "" +msgstr "Diharapkan sebuah Layanan" #: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c #: shared-bindings/_bleio/Service.c msgid "Expected a UUID" -msgstr "" +msgstr "Diharapkan sebuah UUID" #: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" -msgstr "" +msgstr "Diharapkan sebuah Alamat" #: shared-module/_pixelbuf/PixelBuf.c #, c-format msgid "Expected tuple of length %d, got %d" -msgstr "" +msgstr "Diharapkan tuple dengan panjang %d, didapatkan %d" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Extended advertisements with scan response not supported." -msgstr "" +msgstr "Penyebaran yang diperluas dengan respon pindai tidak didukung." #: extmod/ulab/code/fft.c msgid "FFT is defined for ndarrays only" -msgstr "" +msgstr "FFT didefinisikan hanya untuk ndarrays" #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." -msgstr "" +msgstr "Gagal mengirim perintah." #: ports/nrf/sd_mutex.c #, fuzzy, c-format @@ -765,15 +799,15 @@ msgstr "Gagal untuk megalokasikan buffer RX dari %d byte" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: internal error" -msgstr "" +msgstr "Gagal terhubung: kesalahan internal" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" -msgstr "" +msgstr "Gagal terhubung: habis waktu" #: shared-module/audiomp3/MP3Decoder.c msgid "Failed to parse MP3 file" -msgstr "" +msgstr "Gagal mengurai file MP3" #: ports/nrf/sd_mutex.c #, fuzzy, c-format @@ -782,43 +816,43 @@ msgstr "Gagal untuk melepaskan mutex, status: 0x%08lX" #: supervisor/shared/safe_mode.c msgid "Failed to write internal flash." -msgstr "" +msgstr "Gagal menulis flash internal." #: py/moduerrno.c msgid "File exists" -msgstr "" +msgstr "File sudah ada" #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c msgid "Frequency captured is above capability. Capture Paused." -msgstr "" +msgstr "Frekuensi yang ditangkap berada di atas kemampuan. Penangkapan Ditunda." #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Frequency must match existing PWMOut using this timer" -msgstr "" +msgstr "Frekuensi harus cocok dengan PWMOut yang ada menggunakan timer ini" #: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c #: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c msgid "Function requires lock" -msgstr "" +msgstr "Fungsinya membutuhkan kunci" #: shared-bindings/displayio/Display.c #: shared-bindings/displayio/EPaperDisplay.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Group already used" -msgstr "" +msgstr "Grup sudah digunakan" #: shared-module/displayio/Group.c msgid "Group full" -msgstr "" +msgstr "Grup penuh" #: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/I2C.c #: ports/stm/common-hal/busio/SPI.c msgid "Hardware busy, try alternative pins" -msgstr "" +msgstr "Perangkat keras sibuk, coba pin alternatif" #: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c msgid "Hardware in use, try alternative pins" -msgstr "" +msgstr "Perangkat keras sedang digunakan, coba pin alternatif" #: extmod/vfs_posix_file.c py/objstringio.c msgid "I/O operation on closed file" @@ -826,46 +860,48 @@ msgstr "operasi I/O pada file tertutup" #: ports/stm/common-hal/busio/I2C.c msgid "I2C Init Error" -msgstr "" - -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "operasi I2C tidak didukung" +msgstr "Gagal Inisialisasi I2C" #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" -msgstr "" +msgstr "Panjang IV harus %d byte" #: py/persistentcode.c msgid "" "Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" "mpy-update for more info." msgstr "" +"File .mpy tidak kompatibel. Perbarui semua file .mpy. Lihat http://adafru.it/" +"mpy-update untuk info lebih lanjut." #: shared-bindings/_pew/PewPew.c msgid "Incorrect buffer size" -msgstr "" +msgstr "Ukuran penyangga salah" #: py/moduerrno.c msgid "Input/output error" -msgstr "" +msgstr "Kesalahan input/output" #: ports/nrf/common-hal/_bleio/__init__.c msgid "Insufficient authentication" -msgstr "" +msgstr "Otentikasi tidak cukup" #: ports/nrf/common-hal/_bleio/__init__.c msgid "Insufficient encryption" -msgstr "" +msgstr "Enkripsi tidak cukup" #: ports/stm/common-hal/busio/UART.c msgid "Internal define error" -msgstr "" +msgstr "Kesalahan definisi internal" #: shared-module/rgbmatrix/RGBMatrix.c #, c-format msgid "Internal error #%d" +msgstr "Kesalahan internal #%d" + +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" msgstr "" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c @@ -875,19 +911,19 @@ msgstr "%q pada tidak valid" #: ports/stm/common-hal/analogio/AnalogIn.c msgid "Invalid ADC Unit value" -msgstr "" +msgstr "Nilai Unit ADC tidak valid" #: shared-module/displayio/OnDiskBitmap.c msgid "Invalid BMP file" -msgstr "" +msgstr "File BMP tidak valid" #: ports/stm/common-hal/analogio/AnalogOut.c msgid "Invalid DAC pin supplied" -msgstr "" +msgstr "Pin DAC yang diberikan tidak valid" #: ports/stm/common-hal/busio/I2C.c msgid "Invalid I2C pin selection" -msgstr "" +msgstr "Pilihan pin I2C tidak valid" #: ports/atmel-samd/common-hal/pulseio/PWMOut.c #: ports/cxd56/common-hal/pulseio/PWMOut.c @@ -897,19 +933,19 @@ msgstr "Frekuensi PWM tidak valid" #: ports/stm/common-hal/busio/SPI.c msgid "Invalid SPI pin selection" -msgstr "" +msgstr "Pilihan pin SPI tidak valid" #: ports/stm/common-hal/busio/UART.c msgid "Invalid UART pin selection" -msgstr "" +msgstr "Pilihan pin UART tidak valid" #: py/moduerrno.c shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid argument" -msgstr "" +msgstr "Argumen tidak valid" #: shared-module/displayio/Bitmap.c msgid "Invalid bits per value" -msgstr "" +msgstr "Bit per nilai tidak valid" #: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c msgid "Invalid buffer size" @@ -917,44 +953,44 @@ msgstr "Ukuran buffer tidak valid" #: shared-bindings/_pixelbuf/PixelBuf.c msgid "Invalid byteorder string" -msgstr "" +msgstr "String byteorder tidak valid" #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c msgid "Invalid capture period. Valid range: 1 - 500" -msgstr "" +msgstr "Periode penangkapan tidak valid. Kisaran yang valid: 1 - 500" #: shared-bindings/audiomixer/Mixer.c msgid "Invalid channel count" -msgstr "" +msgstr "Jumlah kanal tidak valid" #: shared-bindings/digitalio/DigitalInOut.c msgid "Invalid direction." -msgstr "" +msgstr "Arah tidak valid." #: shared-module/audiocore/WaveFile.c msgid "Invalid file" -msgstr "" +msgstr "File tidak valid" #: shared-module/audiocore/WaveFile.c msgid "Invalid format chunk size" -msgstr "" +msgstr "Ukuran potongan format tidak valid" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Invalid frequency supplied" -msgstr "" +msgstr "Frekuensi yang diberikan tidak valid" #: supervisor/shared/safe_mode.c msgid "Invalid memory access." -msgstr "" +msgstr "Akses memori tidak valid." #: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c msgid "Invalid number of bits" -msgstr "" +msgstr "Jumlah bit tidak valid" #: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c #: shared-bindings/displayio/FourWire.c msgid "Invalid phase" -msgstr "" +msgstr "Fase tidak valid" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/touchio/TouchIn.c @@ -973,9 +1009,10 @@ msgstr "Pin untuk channel kanan tidak valid" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -983,44 +1020,44 @@ msgstr "Pin-pin tidak valid" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Invalid pins for PWMOut" -msgstr "" +msgstr "Pin untuk PWMOut tidak valid" #: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c #: shared-bindings/displayio/FourWire.c msgid "Invalid polarity" -msgstr "" +msgstr "Polaritas tidak valid" #: shared-bindings/_bleio/Characteristic.c msgid "Invalid properties" -msgstr "" +msgstr "Properti tidak valid" #: shared-bindings/microcontroller/__init__.c msgid "Invalid run mode." -msgstr "" +msgstr "Mode operasi tidak valid." #: shared-module/_bleio/Attribute.c msgid "Invalid security_mode" -msgstr "" +msgstr "security_mode tidak valid" #: shared-bindings/audiomixer/Mixer.c msgid "Invalid voice" -msgstr "" +msgstr "Suara tidak valid" #: shared-bindings/audiomixer/Mixer.c msgid "Invalid voice count" -msgstr "" +msgstr "Hitungan suara tidak valid" #: shared-module/audiocore/WaveFile.c msgid "Invalid wave file" -msgstr "" +msgstr "File wave tidak valid" #: ports/stm/common-hal/busio/UART.c msgid "Invalid word/bit length" -msgstr "" +msgstr "Panjang kata/bit tidak valid" #: shared-bindings/aesio/aes.c msgid "Key must be 16, 24, or 32 bytes long" -msgstr "" +msgstr "Panjang kunci harus 16, 24, atau 32 byte" #: py/compile.c msgid "LHS of keyword arg must be an id" @@ -1028,40 +1065,40 @@ msgstr "LHS dari keyword arg harus menjadi sebuah id" #: shared-module/displayio/Group.c msgid "Layer already in a group." -msgstr "" +msgstr "Layer sudah ada dalam grup." #: shared-module/displayio/Group.c msgid "Layer must be a Group or TileGrid subclass." -msgstr "" +msgstr "Layer harus sebuah Grup atau subklas dari TileGrid." #: py/objslice.c msgid "Length must be an int" -msgstr "" +msgstr "Panjang harus berupa int" #: py/objslice.c msgid "Length must be non-negative" -msgstr "" +msgstr "Panjangnya harus non-negatif" #: shared-module/bitbangio/SPI.c msgid "MISO pin init failed." -msgstr "" +msgstr "Pin MISO gagal inisialisasi." #: shared-module/bitbangio/SPI.c msgid "MOSI pin init failed." -msgstr "" +msgstr "Pin MOSI gagal inisialisasi." #: shared-module/displayio/Shape.c #, c-format msgid "Maximum x value when mirrored is %d" -msgstr "" +msgstr "Nilai x maksimum ketika dicerminkan adalah %d" #: supervisor/shared/safe_mode.c msgid "MicroPython NLR jump failed. Likely memory corruption." -msgstr "" +msgstr "Lompatan NLR MicroPython gagal. Kemungkinan kerusakan memori." #: supervisor/shared/safe_mode.c msgid "MicroPython fatal error." -msgstr "" +msgstr "Kesalahan fatal MicroPython." #: shared-bindings/audiobusio/PDMIn.c msgid "Microphone startup delay must be in range 0.0 to 1.0" @@ -1373,6 +1410,10 @@ msgid "Running in safe mode! Not running saved code.\n" msgstr "" "Berjalan di mode aman(safe mode)! tidak menjalankan kode yang tersimpan.\n" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1441,6 +1482,10 @@ msgstr "" msgid "Supply at least one UART pin" msgstr "" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "" @@ -1627,6 +1672,7 @@ msgid "" msgstr "" #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "Baudrate tidak didukung" @@ -1743,11 +1789,11 @@ msgstr "abort() dipanggil" msgid "address %08x is not aligned to %d bytes" msgstr "alamat %08x tidak selaras dengan %d bytes" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "" @@ -1828,10 +1874,6 @@ msgstr "" msgid "bits must be 7, 8 or 9" msgstr "" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "bits harus memilki nilai 8" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "" @@ -1858,10 +1900,6 @@ msgstr "" msgid "buffer too small" msgstr "" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "buffers harus mempunyai panjang yang sama" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "" @@ -1937,7 +1975,7 @@ msgstr "" msgid "can't convert NaN to int" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "" @@ -2005,6 +2043,10 @@ msgstr "" msgid "can't send non-None value to a just-started generator" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "" + #: py/objnamedtuple.c msgid "can't set attribute" msgstr "" @@ -2131,6 +2173,10 @@ msgstr "" msgid "could not invert Vandermonde matrix" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "" + #: extmod/ulab/code/approx.c msgid "data must be iterable" msgstr "" @@ -2291,10 +2337,6 @@ msgstr "" msgid "first argument to super() must be type" msgstr "" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "bit pertama(firstbit) harus berupa MSB" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "" @@ -2479,14 +2521,6 @@ msgstr "" msgid "interval must be in range %s-%s" msgstr "" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "perangkat I2C tidak valid" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "perangkat SPI tidak valid" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "argumen-argumen tidak valid" @@ -2663,10 +2697,6 @@ msgstr "" msgid "must raise an object" msgstr "" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "harus menentukan semua pin sck/mosi/miso" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "" @@ -2704,6 +2734,10 @@ msgstr "" msgid "negative shift count" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "" + #: py/vm.c msgid "no active exception to reraise" msgstr "" @@ -2725,6 +2759,10 @@ msgstr "tidak ada modul yang bernama '%q'" msgid "no reset pin available" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "" + #: py/runtime.c msgid "no such attribute" msgstr "" @@ -3015,6 +3053,10 @@ msgstr "" msgid "sleep length must be non-negative" msgstr "" +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "" + #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" msgstr "" @@ -3031,6 +3073,18 @@ msgstr "memulai ulang software(soft reboot)\n" msgid "sort argument must be an ndarray" msgstr "" +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "" + #: py/objstr.c msgid "start/end indices" msgstr "" @@ -3117,6 +3171,14 @@ msgstr "" msgid "timeout must be >= 0.0" msgstr "bits harus memilki nilai 8" +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "" + #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" msgstr "" @@ -3314,6 +3376,18 @@ msgstr "" msgid "zero step" msgstr "" +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "" + #~ msgid "AP required" #~ msgstr "AP dibutuhkan" @@ -3455,6 +3529,9 @@ msgstr "" #~ msgid "GPIO16 does not support pull up." #~ msgstr "GPIO16 tidak mendukung pull up" +#~ msgid "I2C operation not supported" +#~ msgstr "operasi I2C tidak didukung" + #~ msgid "Invalid bit clock pin" #~ msgstr "Bit clock pada pin tidak valid" @@ -3546,9 +3623,15 @@ msgstr "" #~ msgid "[addrinfo error %d]" #~ msgstr "[addrinfo error %d]" +#~ msgid "bits must be 8" +#~ msgstr "bits harus memilki nilai 8" + #~ msgid "buffer too long" #~ msgstr "buffer terlalu panjang" +#~ msgid "buffers must be the same length" +#~ msgstr "buffers harus mempunyai panjang yang sama" + #~ msgid "can query only one param" #~ msgstr "hanya bisa melakukan query satu param" @@ -3573,6 +3656,9 @@ msgstr "" #~ msgid "ffi_prep_closure_loc" #~ msgstr "ffi_prep_closure_loc" +#~ msgid "firstbit must be MSB" +#~ msgstr "bit pertama(firstbit) harus berupa MSB" + #~ msgid "flash location must be below 1MByte" #~ msgstr "alokasi flash harus dibawah 1MByte" @@ -3582,6 +3668,12 @@ msgstr "" #~ msgid "impossible baudrate" #~ msgstr "baudrate tidak memungkinkan" +#~ msgid "invalid I2C peripheral" +#~ msgstr "perangkat I2C tidak valid" + +#~ msgid "invalid SPI peripheral" +#~ msgstr "perangkat SPI tidak valid" + #~ msgid "invalid alarm" #~ msgstr "alarm tidak valid" @@ -3603,6 +3695,9 @@ msgstr "" #~ msgid "memory allocation failed, allocating %u bytes for native code" #~ msgstr "alokasi memori gagal, mengalokasikan %u byte untuk kode native" +#~ msgid "must specify all of sck/mosi/miso" +#~ msgstr "harus menentukan semua pin sck/mosi/miso" + #, fuzzy #~ msgid "name must be a string" #~ msgstr "keyword harus berupa string" diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 11ecb99e8..f3c9d0411 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" +"POT-Creation-Date: 2020-07-07 14:38-0500\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n" "Language-Team: LANGUAGE <LL@li.org>\n" @@ -58,6 +58,10 @@ msgstr "" msgid "%d address pins and %d rgb pins indicate a height of %d, not %d" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" +msgstr "" + #: shared-bindings/microcontroller/Pin.c msgid "%q in use" msgstr "" @@ -85,6 +89,10 @@ msgstr "" msgid "%q must be a tuple of length 2" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "" + #: shared-bindings/fontio/BuiltinFont.c msgid "%q should be an int" msgstr "" @@ -291,6 +299,7 @@ msgstr "" msgid "All timers for this pin are in use" msgstr "" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -298,7 +307,7 @@ msgstr "" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "" @@ -337,7 +346,7 @@ msgstr "" msgid "Array values should be single bytes." msgstr "" -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" msgstr "" @@ -416,6 +425,11 @@ msgstr "" msgid "Buffer length %d too big. It must be less than %d" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "" + #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" msgstr "" @@ -572,6 +586,14 @@ msgstr "" msgid "Corrupt raw code" msgstr "" +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" +msgstr "" + #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "" @@ -693,7 +715,8 @@ msgstr "" msgid "Error in regex" msgstr "" -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" @@ -817,10 +840,6 @@ msgstr "" msgid "I2C Init Error" msgstr "" -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "" - #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" @@ -857,6 +876,10 @@ msgstr "" msgid "Internal error #%d" msgstr "" +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Invalid %q pin" @@ -962,9 +985,10 @@ msgstr "" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -1068,6 +1092,10 @@ msgstr "" msgid "Must provide MISO or MOSI pin" msgstr "" +#: ports/stm/common-hal/busio/SPI.c +msgid "Must provide SCK pin" +msgstr "" + #: shared-bindings/rgbmatrix/RGBMatrix.c #, c-format msgid "Must use a multiple of 6 rgb pins, not %d" @@ -1357,6 +1385,10 @@ msgstr "" msgid "Running in safe mode! Not running saved code.\n" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1425,6 +1457,10 @@ msgstr "" msgid "Supply at least one UART pin" msgstr "" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "" @@ -1611,6 +1647,7 @@ msgid "" msgstr "" #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "" @@ -1720,11 +1757,11 @@ msgstr "" msgid "address %08x is not aligned to %d bytes" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "" @@ -1805,10 +1842,6 @@ msgstr "" msgid "bits must be 7, 8 or 9" msgstr "" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "" @@ -1834,10 +1867,6 @@ msgstr "" msgid "buffer too small" msgstr "" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "" @@ -1913,7 +1942,7 @@ msgstr "" msgid "can't convert NaN to int" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "" @@ -1981,6 +2010,10 @@ msgstr "" msgid "can't send non-None value to a just-started generator" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "" + #: py/objnamedtuple.c msgid "can't set attribute" msgstr "" @@ -2107,6 +2140,10 @@ msgstr "" msgid "could not invert Vandermonde matrix" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "" + #: extmod/ulab/code/approx.c msgid "data must be iterable" msgstr "" @@ -2267,10 +2304,6 @@ msgstr "" msgid "first argument to super() must be type" msgstr "" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "" @@ -2455,14 +2488,6 @@ msgstr "" msgid "interval must be in range %s-%s" msgstr "" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "" @@ -2639,10 +2664,6 @@ msgstr "" msgid "must raise an object" msgstr "" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "" @@ -2680,6 +2701,10 @@ msgstr "" msgid "negative shift count" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "" + #: py/vm.c msgid "no active exception to reraise" msgstr "" @@ -2701,6 +2726,10 @@ msgstr "" msgid "no reset pin available" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "" + #: py/runtime.c msgid "no such attribute" msgstr "" @@ -2990,6 +3019,10 @@ msgstr "" msgid "sleep length must be non-negative" msgstr "" +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "" + #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" msgstr "" @@ -3006,6 +3039,18 @@ msgstr "" msgid "sort argument must be an ndarray" msgstr "" +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "" + #: py/objstr.c msgid "start/end indices" msgstr "" @@ -3091,6 +3136,14 @@ msgstr "" msgid "timeout must be >= 0.0" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "" + #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" msgstr "" @@ -3287,3 +3340,15 @@ msgstr "" #: py/objrange.c msgid "zero step" msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "" diff --git a/locale/cs.po b/locale/cs.po index 39bf51af8..dfe1cfa38 100644 --- a/locale/cs.po +++ b/locale/cs.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" +"POT-Creation-Date: 2020-07-02 15:29+0200\n" "PO-Revision-Date: 2020-05-24 03:22+0000\n" "Last-Translator: dronecz <mzuzelka@gmail.com>\n" "Language-Team: LANGUAGE <LL@li.org>\n" @@ -66,6 +66,10 @@ msgstr "%% c vyžaduje int nebo char" msgid "%d address pins and %d rgb pins indicate a height of %d, not %d" msgstr "%d adresní piny a %d rgb piny označují výšku %d, nikoli %d" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" +msgstr "" + #: shared-bindings/microcontroller/Pin.c msgid "%q in use" msgstr "%q se nyní používá" @@ -93,6 +97,10 @@ msgstr "% q musí být > = 1" msgid "%q must be a tuple of length 2" msgstr "% q musí být n-tice délky 2" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "" + #: shared-bindings/fontio/BuiltinFont.c msgid "%q should be an int" msgstr "% q by měl být int" @@ -299,6 +307,7 @@ msgstr "" msgid "All timers for this pin are in use" msgstr "" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -306,7 +315,7 @@ msgstr "" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "" @@ -345,7 +354,7 @@ msgstr "" msgid "Array values should be single bytes." msgstr "" -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" msgstr "" @@ -424,6 +433,11 @@ msgstr "" msgid "Buffer length %d too big. It must be less than %d" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "" + #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" msgstr "" @@ -580,6 +594,14 @@ msgstr "" msgid "Corrupt raw code" msgstr "" +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" +msgstr "" + #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "" @@ -701,7 +723,8 @@ msgstr "" msgid "Error in regex" msgstr "" -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" @@ -825,10 +848,6 @@ msgstr "" msgid "I2C Init Error" msgstr "" -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "" - #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" @@ -865,6 +884,10 @@ msgstr "" msgid "Internal error #%d" msgstr "" +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Invalid %q pin" @@ -970,9 +993,10 @@ msgstr "" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -1365,6 +1389,10 @@ msgstr "" msgid "Running in safe mode! Not running saved code.\n" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1433,6 +1461,10 @@ msgstr "" msgid "Supply at least one UART pin" msgstr "" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "" @@ -1619,6 +1651,7 @@ msgid "" msgstr "" #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "" @@ -1728,11 +1761,11 @@ msgstr "" msgid "address %08x is not aligned to %d bytes" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "" @@ -1813,10 +1846,6 @@ msgstr "" msgid "bits must be 7, 8 or 9" msgstr "" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "" @@ -1842,10 +1871,6 @@ msgstr "" msgid "buffer too small" msgstr "" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "" @@ -1921,7 +1946,7 @@ msgstr "" msgid "can't convert NaN to int" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "" @@ -1989,6 +2014,10 @@ msgstr "" msgid "can't send non-None value to a just-started generator" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "" + #: py/objnamedtuple.c msgid "can't set attribute" msgstr "" @@ -2115,6 +2144,10 @@ msgstr "" msgid "could not invert Vandermonde matrix" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "" + #: extmod/ulab/code/approx.c msgid "data must be iterable" msgstr "" @@ -2275,10 +2308,6 @@ msgstr "" msgid "first argument to super() must be type" msgstr "" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "" @@ -2463,14 +2492,6 @@ msgstr "" msgid "interval must be in range %s-%s" msgstr "" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "" @@ -2647,10 +2668,6 @@ msgstr "" msgid "must raise an object" msgstr "" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "" @@ -2688,6 +2705,10 @@ msgstr "" msgid "negative shift count" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "" + #: py/vm.c msgid "no active exception to reraise" msgstr "" @@ -2709,6 +2730,10 @@ msgstr "" msgid "no reset pin available" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "" + #: py/runtime.c msgid "no such attribute" msgstr "" @@ -2998,6 +3023,10 @@ msgstr "" msgid "sleep length must be non-negative" msgstr "" +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "" + #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" msgstr "" @@ -3014,6 +3043,18 @@ msgstr "" msgid "sort argument must be an ndarray" msgstr "" +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "" + #: py/objstr.c msgid "start/end indices" msgstr "" @@ -3099,6 +3140,14 @@ msgstr "" msgid "timeout must be >= 0.0" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "" + #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" msgstr "" @@ -3295,3 +3344,15 @@ msgstr "" #: py/objrange.c msgid "zero step" msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "" diff --git a/locale/de_DE.po b/locale/de_DE.po index 76a0eec83..f2d925856 100644 --- a/locale/de_DE.po +++ b/locale/de_DE.po @@ -7,17 +7,15 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" -"PO-Revision-Date: 2020-05-29 17:42+0000\n" -"Last-Translator: Thomas Friehoff <thomas.friehoff@googlemail.com>\n" -"Language-Team: German <https://later.unpythonic.net/projects/circuitpython/" -"circuitpython-master/de/>\n" +"POT-Creation-Date: 2020-07-02 15:29+0200\n" +"PO-Revision-Date: 2020-06-16 18:24+0000\n" +"Last-Translator: Andreas Buchen <andreas.buchen@gmail.com>\n" "Language: de_DE\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" "Plural-Forms: nplurals=2; plural=n != 1;\n" -"X-Generator: Weblate 4.1-dev\n" +"X-Generator: Weblate 4.1.1-dev\n" #: main.c msgid "" @@ -67,6 +65,10 @@ msgstr "%%c erwartet int oder char" msgid "%d address pins and %d rgb pins indicate a height of %d, not %d" msgstr "%d Adress-Pins und %d rgb-Pins zeigen eine Höhe von %d, nicht von %d" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" +msgstr "" + #: shared-bindings/microcontroller/Pin.c msgid "%q in use" msgstr "%q in Benutzung" @@ -94,6 +96,10 @@ msgstr "%q muss >= 1 sein" msgid "%q must be a tuple of length 2" msgstr "%q muss ein Tupel der Länge 2 sein" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "" + #: shared-bindings/fontio/BuiltinFont.c msgid "%q should be an int" msgstr "%q sollte ein integer sein" @@ -300,6 +306,7 @@ msgstr "Alle sync event Kanäle werden benutzt" msgid "All timers for this pin are in use" msgstr "Alle timer für diesen Pin werden bereits benutzt" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -307,7 +314,7 @@ msgstr "Alle timer für diesen Pin werden bereits benutzt" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "Alle timer werden benutzt" @@ -346,7 +353,7 @@ msgstr "Array muss Halbwörter enthalten (type 'H')" msgid "Array values should be single bytes." msgstr "Array-Werte sollten aus Einzelbytes bestehen." -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" msgstr "Es darf höchstens %d %q spezifiziert werden (nicht %d)" @@ -429,6 +436,11 @@ msgstr "Der Puffer ist zu klein" msgid "Buffer length %d too big. It must be less than %d" msgstr "Die Pufferlänge %d ist zu groß. Sie muss kleiner als %d sein" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "" + #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" msgstr "Der Puffer muss eine Mindestenslänge von 1 haben" @@ -592,6 +604,14 @@ msgstr "Beschädigte .mpy Datei" msgid "Corrupt raw code" msgstr "Beschädigter raw code" +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" +msgstr "" + #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "Konnte UART nicht initialisieren" @@ -713,7 +733,8 @@ msgstr "EXTINT Kanal ist schon in Benutzung" msgid "Error in regex" msgstr "Fehler in regex" -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" @@ -842,10 +863,6 @@ msgstr "Lese/Schreibe-operation an geschlossener Datei" msgid "I2C Init Error" msgstr "I2C-Init-Fehler" -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "I2C-operation nicht unterstützt" - #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" @@ -884,6 +901,10 @@ msgstr "Interner Definitionsfehler" msgid "Internal error #%d" msgstr "Interner Fehler #%d" +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Invalid %q pin" @@ -989,9 +1010,10 @@ msgstr "Ungültiger Pin für rechten Kanal" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -1397,6 +1419,10 @@ msgstr "Sicherheitsmodus aktiv! Automatisches Neuladen ist deaktiviert.\n" msgid "Running in safe mode! Not running saved code.\n" msgstr "Sicherheitsmodus aktiv! Gespeicherter Code wird nicht ausgeführt\n" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1465,6 +1491,10 @@ msgstr "Stream fehlt readinto() oder write() Methode." msgid "Supply at least one UART pin" msgstr "Geben Sie mindestens einen UART-Pin an" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "Zeitüberschreitung beim Auslesen der Temperatur" @@ -1669,6 +1699,7 @@ msgstr "" "Eingabeaufforderung auf dem anderen Gerät abgelehnt oder ignoriert." #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "Baudrate wird nicht unterstützt" @@ -1717,7 +1748,7 @@ msgstr "" #: shared-bindings/watchdog/WatchDogTimer.c msgid "WatchDogTimer is not currently running" -msgstr "" +msgstr "WatchDogTimer läuft aktuell nicht" #: shared-bindings/watchdog/WatchDogTimer.c msgid "WatchDogTimer.mode cannot be changed once set to WatchDogMode.RESET" @@ -1787,11 +1818,11 @@ msgstr "abort() wurde aufgerufen" msgid "address %08x is not aligned to %d bytes" msgstr "Addresse %08x ist nicht an %d bytes ausgerichtet" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "Adresse außerhalb der Grenzen" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "adresses ist leer" @@ -1872,10 +1903,6 @@ msgstr "Der binäre Operator %q ist nicht implementiert" msgid "bits must be 7, 8 or 9" msgstr "bits muss 7, 8 oder 9 sein" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "bits müssen 8 sein" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "Es müssen 8 oder 16 bits_per_sample sein" @@ -1901,10 +1928,6 @@ msgstr "Puffersegmente müssen gleich lang sein" msgid "buffer too small" msgstr "Der Puffer ist zu klein" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "Buffer müssen gleich lang sein" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "Tasten müssen digitalio.DigitalInOut sein" @@ -1982,7 +2005,7 @@ msgstr "Kann '%q' Objekt nicht implizit nach %q konvertieren" msgid "can't convert NaN to int" msgstr "kann NaN nicht nach int konvertieren" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "kann Adresse nicht in int konvertieren" @@ -2052,6 +2075,10 @@ msgstr "" "Nicht \"None\" Werte können nicht an einen gerade gestarteten Generator " "gesendet werden" +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "" + #: py/objnamedtuple.c msgid "can't set attribute" msgstr "kann Attribut nicht setzen" @@ -2185,6 +2212,10 @@ msgstr "Eingabearray konnte nicht aus der Form übertragen werden" msgid "could not invert Vandermonde matrix" msgstr "Vandermonde-Matrix konnte nicht invertiert werden" +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "" + #: extmod/ulab/code/approx.c msgid "data must be iterable" msgstr "" @@ -2347,10 +2378,6 @@ msgstr "Das erste Argument muss ein Ndarray sein" msgid "first argument to super() must be type" msgstr "Das erste Argument für super() muss type sein" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "Erstes Bit muss das höchstwertigste Bit (MSB) sein" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "Die Abflachungsreihenfolge muss entweder \"C\" oder \"F\" sein" @@ -2536,14 +2563,6 @@ msgstr "" msgid "interval must be in range %s-%s" msgstr "Das Intervall muss im Bereich %s-%s sein" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "ungültige I2C Schnittstelle" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "ungültige SPI Schnittstelle" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "ungültige argumente" @@ -2726,10 +2745,6 @@ msgstr "Mehrfache Vererbung nicht unterstützt" msgid "must raise an object" msgstr "muss ein Objekt verursachen (raise)" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "sck/mosi/miso müssen alle spezifiziert sein" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "muss Schlüsselwortargument für key function verwenden" @@ -2767,6 +2782,10 @@ msgstr "negative Potenz ohne Gleitkomma (float) Unterstützung" msgid "negative shift count" msgstr "Negative shift Anzahl" +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "" + #: py/vm.c msgid "no active exception to reraise" msgstr "Keine aktive Ausnahme zu verusachen (raise)" @@ -2788,6 +2807,10 @@ msgstr "Kein Modul mit dem Namen '%q'" msgid "no reset pin available" msgstr "kein Reset Pin verfügbar" +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "" + #: py/runtime.c msgid "no such attribute" msgstr "kein solches Attribut" @@ -3083,6 +3106,10 @@ msgstr "Größe ist nur für ndarrays definiert" msgid "sleep length must be non-negative" msgstr "Die Schlafdauer darf nicht negativ sein" +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "" + #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" msgstr "Der Slice-Schritt kann nicht Null sein" @@ -3099,6 +3126,18 @@ msgstr "weicher reboot\n" msgid "sort argument must be an ndarray" msgstr "sortierungs Argument muss ein ndarray sein" +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "" + #: py/objstr.c msgid "start/end indices" msgstr "start/end Indizes" @@ -3185,6 +3224,14 @@ msgstr "Das Zeitlimit muss 0,0-100,0 Sekunden betragen" msgid "timeout must be >= 0.0" msgstr "timeout muss >= 0.0 sein" +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "" + #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" msgstr "Zeitstempel außerhalb des Bereichs für Plattform time_t" @@ -3386,6 +3433,18 @@ msgstr "y Wert außerhalb der Grenzen" msgid "zero step" msgstr "Nullschritt" +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "" + #~ msgid "AP required" #~ msgstr "AP erforderlich" @@ -3562,6 +3621,9 @@ msgstr "Nullschritt" #~ msgid "GPIO16 does not support pull up." #~ msgstr "GPIO16 unterstützt pull up nicht" +#~ msgid "I2C operation not supported" +#~ msgstr "I2C-operation nicht unterstützt" + #~ msgid "Invalid bit clock pin" #~ msgstr "Ungültiges bit clock pin" @@ -3711,12 +3773,18 @@ msgstr "Nullschritt" #~ "Sie laufen im abgesicherten Modus, was bedeutet, dass etwas Unerwartetes " #~ "passiert ist.\n" +#~ msgid "bits must be 8" +#~ msgstr "bits müssen 8 sein" + #~ msgid "buf is too small. need %d bytes" #~ msgstr "buf ist zu klein. brauche %d Bytes" #~ msgid "buffer too long" #~ msgstr "Buffer zu lang" +#~ msgid "buffers must be the same length" +#~ msgstr "Buffer müssen gleich lang sein" + #~ msgid "byteorder is not an instance of ByteOrder (got a %s)" #~ msgstr "byteorder ist keine Instanz von ByteOrder (%s erhalten)" @@ -3732,6 +3800,9 @@ msgstr "Nullschritt" #~ msgid "ffi_prep_closure_loc" #~ msgstr "ffi_prep_closure_loc" +#~ msgid "firstbit must be MSB" +#~ msgstr "Erstes Bit muss das höchstwertigste Bit (MSB) sein" + #~ msgid "flash location must be below 1MByte" #~ msgstr "flash location muss unter 1MByte sein" @@ -3744,6 +3815,12 @@ msgstr "Nullschritt" #~ msgid "interval not in range 0.0020 to 10.24" #~ msgstr "Das Interval ist nicht im Bereich 0.0020 bis 10.24" +#~ msgid "invalid I2C peripheral" +#~ msgstr "ungültige I2C Schnittstelle" + +#~ msgid "invalid SPI peripheral" +#~ msgstr "ungültige SPI Schnittstelle" + #~ msgid "invalid alarm" #~ msgstr "ungültiger Alarm" @@ -3766,6 +3843,9 @@ msgstr "Nullschritt" #~ msgstr "" #~ "Speicherallozierung fehlgeschlagen, alloziere %u Bytes für nativen Code" +#~ msgid "must specify all of sck/mosi/miso" +#~ msgstr "sck/mosi/miso müssen alle spezifiziert sein" + #~ msgid "name must be a string" #~ msgstr "name muss ein String sein" diff --git a/locale/en_US.po b/locale/en_US.po index 579fc6501..c89772779 100644 --- a/locale/en_US.po +++ b/locale/en_US.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 08:56-0500\n" +"POT-Creation-Date: 2020-06-25 11:44-0500\n" "PO-Revision-Date: 2018-07-27 11:55-0700\n" "Last-Translator: \n" "Language-Team: \n" @@ -291,6 +291,7 @@ msgstr "" msgid "All timers for this pin are in use" msgstr "" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -298,7 +299,7 @@ msgstr "" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "" @@ -572,6 +573,10 @@ msgstr "" msgid "Corrupt raw code" msgstr "" +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "" + #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "" @@ -817,10 +822,6 @@ msgstr "" msgid "I2C Init Error" msgstr "" -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "" - #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" @@ -962,7 +963,7 @@ msgstr "" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c #: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c @@ -1425,6 +1426,10 @@ msgstr "" msgid "Supply at least one UART pin" msgstr "" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "" @@ -1611,6 +1616,7 @@ msgid "" msgstr "" #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "" @@ -1652,6 +1658,26 @@ msgstr "" msgid "WARNING: Your code filename has two extensions\n" msgstr "" +#: shared-bindings/watchdog/WatchDogTimer.c +msgid "WatchDogTimer cannot be deinitialized once mode is set to RESET" +msgstr "" + +#: shared-bindings/watchdog/WatchDogTimer.c +msgid "WatchDogTimer is not currently running" +msgstr "" + +#: shared-bindings/watchdog/WatchDogTimer.c +msgid "WatchDogTimer.mode cannot be changed once set to WatchDogMode.RESET" +msgstr "" + +#: shared-bindings/watchdog/WatchDogTimer.c +msgid "WatchDogTimer.timeout must be greater than 0" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Watchdog timer expired." +msgstr "" + #: py/builtinhelp.c #, c-format msgid "" @@ -1700,11 +1726,11 @@ msgstr "" msgid "address %08x is not aligned to %d bytes" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "" @@ -1785,10 +1811,6 @@ msgstr "" msgid "bits must be 7, 8 or 9" msgstr "" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "" @@ -1814,10 +1836,6 @@ msgstr "" msgid "buffer too small" msgstr "" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "" @@ -1893,7 +1911,7 @@ msgstr "" msgid "can't convert NaN to int" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "" @@ -2247,10 +2265,6 @@ msgstr "" msgid "first argument to super() must be type" msgstr "" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "" @@ -2435,14 +2449,6 @@ msgstr "" msgid "interval must be in range %s-%s" msgstr "" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "" @@ -2619,10 +2625,6 @@ msgstr "" msgid "must raise an object" msgstr "" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "" @@ -3059,6 +3061,10 @@ msgstr "" msgid "time.struct_time() takes a 9-sequence" msgstr "" +#: ports/nrf/common-hal/watchdog/WatchDogTimer.c +msgid "timeout duration exceeded the maximum supported value" +msgstr "" + #: shared-bindings/busio/UART.c msgid "timeout must be 0.0-100.0 seconds" msgstr "" @@ -3212,6 +3218,10 @@ msgstr "" msgid "value_count must be > 0" msgstr "" +#: shared-bindings/watchdog/WatchDogTimer.c +msgid "watchdog timeout must be greater than 0" +msgstr "" + #: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "" diff --git a/locale/en_x_pirate.po b/locale/en_x_pirate.po index b240ab689..16f2b3669 100644 --- a/locale/en_x_pirate.po +++ b/locale/en_x_pirate.po @@ -7,11 +7,9 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 08:56-0500\n" +"POT-Creation-Date: 2020-06-25 11:44-0500\n" "PO-Revision-Date: 2020-03-30 22:11+0000\n" "Last-Translator: Tannewt <devnull@unpythonic.net>\n" -"Language-Team: English <https://later.unpythonic.net/projects/circuitpython/" -"circuitpython-master/en_X@pirate/>\n" "Language: en_x_pirate\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" @@ -298,6 +296,7 @@ msgstr "" msgid "All timers for this pin are in use" msgstr "" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -305,7 +304,7 @@ msgstr "" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "" @@ -581,6 +580,10 @@ msgstr "" msgid "Corrupt raw code" msgstr "" +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "" + #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "" @@ -826,10 +829,6 @@ msgstr "" msgid "I2C Init Error" msgstr "" -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "" - #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" @@ -971,7 +970,7 @@ msgstr "Belay that! Invalid pin for starboard-side channel" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c #: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c @@ -1434,6 +1433,10 @@ msgstr "" msgid "Supply at least one UART pin" msgstr "" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "" @@ -1620,6 +1623,7 @@ msgid "" msgstr "" #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "" @@ -1661,6 +1665,26 @@ msgstr "" msgid "WARNING: Your code filename has two extensions\n" msgstr "Blimey! Yer code filename has two extensions\n" +#: shared-bindings/watchdog/WatchDogTimer.c +msgid "WatchDogTimer cannot be deinitialized once mode is set to RESET" +msgstr "" + +#: shared-bindings/watchdog/WatchDogTimer.c +msgid "WatchDogTimer is not currently running" +msgstr "" + +#: shared-bindings/watchdog/WatchDogTimer.c +msgid "WatchDogTimer.mode cannot be changed once set to WatchDogMode.RESET" +msgstr "" + +#: shared-bindings/watchdog/WatchDogTimer.c +msgid "WatchDogTimer.timeout must be greater than 0" +msgstr "" + +#: supervisor/shared/safe_mode.c +msgid "Watchdog timer expired." +msgstr "" + #: py/builtinhelp.c #, c-format msgid "" @@ -1709,11 +1733,11 @@ msgstr "" msgid "address %08x is not aligned to %d bytes" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "" @@ -1794,10 +1818,6 @@ msgstr "" msgid "bits must be 7, 8 or 9" msgstr "" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "pieces must be of 8" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "" @@ -1823,10 +1843,6 @@ msgstr "" msgid "buffer too small" msgstr "" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "yer buffers must be of the same length" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "" @@ -1902,7 +1918,7 @@ msgstr "" msgid "can't convert NaN to int" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "" @@ -2256,10 +2272,6 @@ msgstr "" msgid "first argument to super() must be type" msgstr "" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "" @@ -2444,14 +2456,6 @@ msgstr "" msgid "interval must be in range %s-%s" msgstr "" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "Belay that! I2C peripheral be invalid" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "Arr! SPI peripheral be invalid" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "" @@ -2628,10 +2632,6 @@ msgstr "" msgid "must raise an object" msgstr "" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "" @@ -3068,6 +3068,10 @@ msgstr "" msgid "time.struct_time() takes a 9-sequence" msgstr "" +#: ports/nrf/common-hal/watchdog/WatchDogTimer.c +msgid "timeout duration exceeded the maximum supported value" +msgstr "" + #: shared-bindings/busio/UART.c msgid "timeout must be 0.0-100.0 seconds" msgstr "" @@ -3221,6 +3225,10 @@ msgstr "" msgid "value_count must be > 0" msgstr "" +#: shared-bindings/watchdog/WatchDogTimer.c +msgid "watchdog timeout must be greater than 0" +msgstr "" + #: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" msgstr "" @@ -3283,3 +3291,15 @@ msgstr "" #~ msgid "Invalid clock pin" #~ msgstr "Avast! Clock pin be invalid" + +#~ msgid "bits must be 8" +#~ msgstr "pieces must be of 8" + +#~ msgid "buffers must be the same length" +#~ msgstr "yer buffers must be of the same length" + +#~ msgid "invalid I2C peripheral" +#~ msgstr "Belay that! I2C peripheral be invalid" + +#~ msgid "invalid SPI peripheral" +#~ msgstr "Arr! SPI peripheral be invalid" diff --git a/locale/es.po b/locale/es.po index 5fe0f945a..2778c5331 100644 --- a/locale/es.po +++ b/locale/es.po @@ -7,16 +7,16 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" -"PO-Revision-Date: 2020-05-17 20:56+0000\n" -"Last-Translator: Jeff Epler <jepler@gmail.com>\n" +"POT-Creation-Date: 2020-07-02 15:29+0200\n" +"PO-Revision-Date: 2020-07-07 15:59+0000\n" +"Last-Translator: Alvaro Figueroa <alvaro@greencore.co.cr>\n" "Language-Team: \n" "Language: es\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" "Plural-Forms: nplurals=2; plural=n != 1;\n" -"X-Generator: Weblate 4.1-dev\n" +"X-Generator: Weblate 4.2-dev\n" #: main.c msgid "" @@ -32,12 +32,17 @@ msgid "" "Please file an issue with the contents of your CIRCUITPY drive at \n" "https://github.com/adafruit/circuitpython/issues\n" msgstr "" +"\n" +"Reporte un problema con el contenido de su unidad CIRCUITPY en\n" +"https://github.com/adafruit/circuitpython/issues\n" #: supervisor/shared/safe_mode.c msgid "" "\n" "To exit, please reset the board without " msgstr "" +"\n" +"Para salir, favor reinicie la tarjeta sin " #: py/obj.c msgid " File \"%q\"" @@ -60,6 +65,11 @@ msgstr "%%c requiere int o char" #, c-format msgid "%d address pins and %d rgb pins indicate a height of %d, not %d" msgstr "" +"%d pines de dirección y %d pines rgb indican una altura de %d, no de %d" + +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" +msgstr "%q fallo: %d" #: shared-bindings/microcontroller/Pin.c msgid "%q in use" @@ -75,7 +85,7 @@ msgstr "%q indices deben ser enteros, no %s" #: shared-bindings/vectorio/Polygon.c msgid "%q list must be a list" -msgstr "" +msgstr "%q lista debe ser una lista" #: shared-bindings/_bleio/CharacteristicBuffer.c #: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c @@ -86,7 +96,11 @@ msgstr "%q debe ser >= 1" #: shared-module/vectorio/Polygon.c msgid "%q must be a tuple of length 2" -msgstr "" +msgstr "%q debe ser una tupla de longitud 2" + +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "pin inválido %q" #: shared-bindings/fontio/BuiltinFont.c msgid "%q should be an int" @@ -152,11 +166,11 @@ msgstr "'%s' entero 0x%x no cabe en la máscara 0x%x" #: py/runtime.c msgid "'%s' object cannot assign attribute '%q'" -msgstr "" +msgstr "El objeto '%s' no puede asignar al atributo '%q'" #: py/proto.c msgid "'%s' object does not support '%q'" -msgstr "" +msgstr "El objeto '%s' no admite '%q'" #: py/obj.c #, c-format @@ -206,7 +220,7 @@ msgstr "'align' requiere 1 argumento" #: py/compile.c msgid "'async for' or 'async with' outside async function" -msgstr "" +msgstr "'async for' o 'async with' fuera de la función async" #: py/compile.c msgid "'await' outside function" @@ -268,7 +282,7 @@ msgstr "La dirección debe ser %d bytes de largo" #: shared-bindings/_bleio/Address.c msgid "Address type out of range" -msgstr "" +msgstr "Tipo de dirección fuera de rango" #: ports/nrf/common-hal/busio/I2C.c msgid "All I2C peripherals are in use" @@ -296,6 +310,7 @@ msgstr "" msgid "All timers for this pin are in use" msgstr "Todos los timers para este pin están siendo utilizados" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -303,17 +318,17 @@ msgstr "Todos los timers para este pin están siendo utilizados" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "Todos los timers en uso" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Already advertising." -msgstr "" +msgstr "Ya se encuentra publicando." #: ports/cxd56/common-hal/analogio/AnalogIn.c msgid "AnalogIn not supported on given pin" -msgstr "" +msgstr "El pin proporcionado no soporta AnalogIn" #: ports/cxd56/common-hal/analogio/AnalogOut.c #: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c @@ -342,13 +357,15 @@ msgstr "Array debe contener media palabra (type 'H')" msgid "Array values should be single bytes." msgstr "Valores del array deben ser bytes individuales." -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" -msgstr "" +msgstr "Como máximo %d %q se puede especificar (no %d)" #: supervisor/shared/safe_mode.c msgid "Attempted heap allocation when MicroPython VM not running." msgstr "" +"Se intentó asignación del montículo, sin que la VM de MicroPython esté " +"ejecutando." #: main.c msgid "Auto-reload is off.\n" @@ -365,7 +382,7 @@ msgstr "" #: shared-module/displayio/Display.c #: shared-module/framebufferio/FramebufferDisplay.c msgid "Below minimum frame rate" -msgstr "" +msgstr "Por debajo de taza mínima de refrescamiento" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c msgid "Bit clock and word select must share a clock unit" @@ -377,7 +394,7 @@ msgstr "Bits depth debe ser múltiplo de 8." #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "Both RX and TX required for flow control" -msgstr "" +msgstr "Ambos RX y TX requeridos para control de flujo" #: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c msgid "Both pins must support hardware interrupts" @@ -387,7 +404,7 @@ msgstr "Ambos pines deben soportar interrupciones por hardware" #: shared-bindings/framebufferio/FramebufferDisplay.c #: shared-bindings/rgbmatrix/RGBMatrix.c msgid "Brightness must be 0-1.0" -msgstr "" +msgstr "El brillo debe ser 0-1.0" #: shared-bindings/supervisor/__init__.c msgid "Brightness must be between 0 and 255" @@ -401,7 +418,7 @@ msgstr "El brillo no se puede ajustar" #: shared-bindings/_bleio/UUID.c #, c-format msgid "Buffer + offset too small %d %d %d" -msgstr "" +msgstr "Búfer + compensado muy pequeños %d %d %d" #: shared-module/usb_hid/Device.c #, c-format @@ -411,17 +428,22 @@ msgstr "Tamaño de buffer incorrecto. Debe ser de %d bytes." #: shared-bindings/displayio/Display.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Buffer is not a bytearray." -msgstr "" +msgstr "Buffer no es un bytearray." #: shared-bindings/displayio/Display.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Buffer is too small" -msgstr "" +msgstr "El buffer es muy pequeño" #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #, c-format msgid "Buffer length %d too big. It must be less than %d" -msgstr "" +msgstr "La longitud del buffer %d es muy grande. Debe ser menor a %d" + +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "El tamaño del búfer debe ser múltiplo de 512" #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" @@ -429,12 +451,12 @@ msgstr "Buffer debe ser de longitud 1 como minimo" #: ports/nrf/common-hal/_bleio/PacketBuffer.c msgid "Buffer too large and unable to allocate" -msgstr "" +msgstr "Buffer demasiado grande e incapaz de asignar" #: shared-bindings/_bleio/PacketBuffer.c #, c-format msgid "Buffer too short by %d bytes" -msgstr "" +msgstr "Búfer muy corto por %d bytes" #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c @@ -444,7 +466,7 @@ msgstr "Bus pin %d ya está siendo utilizado" #: shared-bindings/_bleio/UUID.c msgid "Byte buffer must be 16 bytes." -msgstr "Byte buffer debe de ser 16 bytes" +msgstr "Búfer Byte debe de ser 16 bytes." #: shared-bindings/nvm/ByteArray.c msgid "Bytes must be between 0 and 255." @@ -452,15 +474,15 @@ msgstr "Bytes debe estar entre 0 y 255." #: shared-bindings/aesio/aes.c msgid "CBC blocks must be multiples of 16 bytes" -msgstr "" +msgstr "Los bloques CBC deben ser múltiplos de 16 bytes" #: py/objtype.c msgid "Call super().__init__() before accessing native object." -msgstr "" +msgstr "Llame a super().__ init __() antes de acceder al objeto nativo." #: ports/nrf/common-hal/_bleio/Characteristic.c msgid "Can't set CCCD on local Characteristic" -msgstr "" +msgstr "No se puede configurar CCCD en la característica local" #: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c msgid "Cannot delete values" @@ -474,11 +496,13 @@ msgstr "No puede ser pull mientras este en modo de salida" #: ports/nrf/common-hal/microcontroller/Processor.c msgid "Cannot get temperature" -msgstr "No se puede obtener la temperatura." +msgstr "No se puede obtener la temperatura" #: shared-bindings/_bleio/Adapter.c msgid "Cannot have scan responses for extended, connectable advertisements." msgstr "" +"No se pueden obtener respuestas de exploración para anuncios extendidos y " +"conectables." #: ports/atmel-samd/common-hal/audioio/AudioOut.c msgid "Cannot output both channels on the same pin" @@ -508,7 +532,7 @@ msgstr "No se puede asignar un valor cuando la dirección es input." #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "Cannot specify RTS or CTS in RS485 mode" -msgstr "" +msgstr "No se puede especificar RTS o CTS en modo RS485" #: py/objslice.c msgid "Cannot subclass slice" @@ -524,7 +548,7 @@ msgstr "No se puede obtener inequívocamente sizeof escalar" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Cannot vary frequency on a timer that is already in use" -msgstr "" +msgstr "No puede variar la frecuencia en un temporizador que ya está en uso" #: shared-module/bitbangio/SPI.c msgid "Cannot write without MOSI pin." @@ -536,17 +560,19 @@ msgstr "CharateristicBuffer escritura no proporcionada" #: supervisor/shared/safe_mode.c msgid "CircuitPython core code crashed hard. Whoops!\n" -msgstr "" +msgstr "El código central de CircuitPython se estrelló con fuerza. ¡Whoops!\n" #: supervisor/shared/safe_mode.c msgid "" "CircuitPython is in safe mode because you pressed the reset button during " "boot. Press again to exit safe mode.\n" msgstr "" +"CircuitPython está en modo seguro porque presionó el botón de reinicio " +"durante el arranque. Presione nuevamente para salir del modo seguro.\n" #: shared-module/bitbangio/SPI.c msgid "Clock pin init failed." -msgstr "Clock pin init fallido" +msgstr "Iniciado de pin de reloj fallido." #: shared-module/bitbangio/I2C.c msgid "Clock stretch too long" @@ -563,21 +589,31 @@ msgstr "Entrada de columna debe ser digitalio.DigitalInOut" #: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c #: shared-bindings/displayio/ParallelBus.c msgid "Command must be an int between 0 and 255" -msgstr "Command debe estar entre 0 y 255." +msgstr "Command debe ser un int entre 0 y 255" #: shared-bindings/_bleio/Connection.c msgid "" "Connection has been disconnected and can no longer be used. Create a new " "connection." msgstr "" +"La conexión se ha desconectado y ya no se puede usar. Crea una nueva " +"conexión." #: py/persistentcode.c msgid "Corrupt .mpy file" -msgstr "" +msgstr "Archivo .mpy corrupto" #: py/emitglue.c msgid "Corrupt raw code" -msgstr "" +msgstr "Código crudo corrupto" + +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "No se pudo inicializar el GNSS" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" +msgstr "No se pudo inicializar SDCard" #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" @@ -585,35 +621,35 @@ msgstr "No se puede inicializar la UART" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not initialize channel" -msgstr "" +msgstr "No se pudo inicializar el canal" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not initialize timer" -msgstr "" +msgstr "No se pudo inicializar el temporizador" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not re-init channel" -msgstr "" +msgstr "No se pudo reiniciar el canal" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not re-init timer" -msgstr "" +msgstr "No se pudo reiniciar el temporizador" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not restart PWM" -msgstr "" +msgstr "No se pudo reiniciar el PWM" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not start PWM" -msgstr "" +msgstr "No se pudo iniciar el PWM" #: ports/stm/common-hal/busio/UART.c msgid "Could not start interrupt, RX busy" -msgstr "" +msgstr "No se pudo iniciar la interrupción, RX ocupado" #: shared-module/audiomp3/MP3Decoder.c msgid "Couldn't allocate decoder" -msgstr "" +msgstr "No se pudo encontrar el decodificador" #: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c #: shared-module/audiomp3/MP3Decoder.c @@ -622,7 +658,7 @@ msgstr "No se pudo asignar el primer buffer" #: shared-module/audiomp3/MP3Decoder.c msgid "Couldn't allocate input buffer" -msgstr "" +msgstr "No se pudo encontrar el búfer de entrada" #: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c #: shared-module/audiomp3/MP3Decoder.c @@ -631,15 +667,15 @@ msgstr "No se pudo asignar el segundo buffer" #: supervisor/shared/safe_mode.c msgid "Crash into the HardFault_Handler." -msgstr "" +msgstr "Choque contra el HardFault_Handler." #: ports/stm/common-hal/analogio/AnalogOut.c msgid "DAC Channel Init Error" -msgstr "" +msgstr "Error de inicio del canal DAC" #: ports/stm/common-hal/analogio/AnalogOut.c msgid "DAC Device Init Error" -msgstr "" +msgstr "Error de inicio del dispositivo DAC" #: ports/atmel-samd/common-hal/audioio/AudioOut.c msgid "DAC already in use" @@ -664,16 +700,16 @@ msgstr "Capacidad de destino es mas pequeña que destination_length." #: ports/nrf/common-hal/audiobusio/I2SOut.c msgid "Device in use" -msgstr "" +msgstr "Dispositivo en uso" #: ports/cxd56/common-hal/digitalio/DigitalInOut.c msgid "DigitalInOut not supported on given pin" -msgstr "" +msgstr "DigitalInOut no es compatible con un pin dado" #: shared-bindings/displayio/Display.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Display must have a 16 bit colorspace." -msgstr "" +msgstr "La pantalla debe tener un espacio de color de 16 bits." #: shared-bindings/displayio/Display.c #: shared-bindings/displayio/EPaperDisplay.c @@ -687,7 +723,7 @@ msgstr "Modo Drive no se usa cuando la dirección es input." #: shared-bindings/aesio/aes.c msgid "ECB only operates on 16 bytes at a time" -msgstr "" +msgstr "ECB solo opera sobre 16 bytes a la vez" #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/ps2io/Ps2.c @@ -700,7 +736,8 @@ msgstr "El canal EXTINT ya está siendo utilizado" msgid "Error in regex" msgstr "Error en regex" -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" @@ -713,7 +750,7 @@ msgstr "Se esperaba una Característica." #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" -msgstr "" +msgstr "Se esperaba un servicio" #: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c #: shared-bindings/_bleio/Service.c @@ -722,7 +759,7 @@ msgstr "Se esperaba un UUID" #: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" -msgstr "" +msgstr "Se esperaba una dirección" #: shared-module/_pixelbuf/PixelBuf.c #, c-format @@ -731,20 +768,20 @@ msgstr "Se esperaba un tuple de %d, se obtuvo %d" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Extended advertisements with scan response not supported." -msgstr "" +msgstr "No se admiten anuncios extendidos con respuesta de escaneo." #: extmod/ulab/code/fft.c msgid "FFT is defined for ndarrays only" -msgstr "" +msgstr "FFT se define solo para ndarrays" #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "Fallo enviando comando" #: ports/nrf/sd_mutex.c -#, fuzzy, c-format +#, c-format msgid "Failed to acquire mutex, err 0x%04x" -msgstr "No se puede adquirir el mutex, status: 0x%08lX" +msgstr "No se puede adquirir el mutex, error 0x%04x" #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" @@ -761,15 +798,15 @@ msgstr "Falló la asignación del buffer RX de %d bytes" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: internal error" -msgstr "" +msgstr "Error al conectar: error interno" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" -msgstr "" +msgstr "Error al conectar: tiempo de espera agotado" #: shared-module/audiomp3/MP3Decoder.c msgid "Failed to parse MP3 file" -msgstr "" +msgstr "Error al analizar el archivo MP3" #: ports/nrf/sd_mutex.c #, c-format @@ -778,7 +815,7 @@ msgstr "No se puede liberar el mutex, err 0x%04x" #: supervisor/shared/safe_mode.c msgid "Failed to write internal flash." -msgstr "" +msgstr "Error al escribir al flash interno." #: py/moduerrno.c msgid "File exists" @@ -791,6 +828,7 @@ msgstr "Frecuencia capturada por encima de la capacidad. Captura en pausa." #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Frequency must match existing PWMOut using this timer" msgstr "" +"La frecuencia debe coincidir con PWMOut existente usando este temporizador" #: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c #: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c @@ -801,7 +839,7 @@ msgstr "La función requiere lock" #: shared-bindings/displayio/EPaperDisplay.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Group already used" -msgstr "" +msgstr "El grupo ya está siendo utilizado" #: shared-module/displayio/Group.c msgid "Group full" @@ -810,11 +848,11 @@ msgstr "Group lleno" #: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/I2C.c #: ports/stm/common-hal/busio/SPI.c msgid "Hardware busy, try alternative pins" -msgstr "" +msgstr "Hardware ocupado, pruebe pines alternativos" #: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c msgid "Hardware in use, try alternative pins" -msgstr "" +msgstr "Hardware en uso, pruebe pines alternativos" #: extmod/vfs_posix_file.c py/objstringio.c msgid "I/O operation on closed file" @@ -822,16 +860,12 @@ msgstr "Operación I/O en archivo cerrado" #: ports/stm/common-hal/busio/I2C.c msgid "I2C Init Error" -msgstr "" - -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "operación I2C no soportada" +msgstr "Error de inicio de I2C" #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" -msgstr "" +msgstr "IV debe tener %d bytes de longitud" #: py/persistentcode.c msgid "" @@ -851,20 +885,24 @@ msgstr "error Input/output" #: ports/nrf/common-hal/_bleio/__init__.c msgid "Insufficient authentication" -msgstr "" +msgstr "Autenticación insuficiente" #: ports/nrf/common-hal/_bleio/__init__.c msgid "Insufficient encryption" -msgstr "" +msgstr "Cifrado insuficiente" #: ports/stm/common-hal/busio/UART.c msgid "Internal define error" -msgstr "" +msgstr "Error interno de definición" #: shared-module/rgbmatrix/RGBMatrix.c #, c-format msgid "Internal error #%d" -msgstr "" +msgstr "Error interno #%d" + +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" +msgstr "%q inválido" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c @@ -873,7 +911,7 @@ msgstr "Pin %q inválido" #: ports/stm/common-hal/analogio/AnalogIn.c msgid "Invalid ADC Unit value" -msgstr "" +msgstr "Valor de unidad de ADC no válido" #: shared-module/displayio/OnDiskBitmap.c msgid "Invalid BMP file" @@ -881,11 +919,11 @@ msgstr "Archivo BMP inválido" #: ports/stm/common-hal/analogio/AnalogOut.c msgid "Invalid DAC pin supplied" -msgstr "" +msgstr "Pin suministrado inválido para DAC" #: ports/stm/common-hal/busio/I2C.c msgid "Invalid I2C pin selection" -msgstr "" +msgstr "Selección de pin I2C no válida" #: ports/atmel-samd/common-hal/pulseio/PWMOut.c #: ports/cxd56/common-hal/pulseio/PWMOut.c @@ -895,11 +933,11 @@ msgstr "Frecuencia PWM inválida" #: ports/stm/common-hal/busio/SPI.c msgid "Invalid SPI pin selection" -msgstr "" +msgstr "Selección de pin SPI no válida" #: ports/stm/common-hal/busio/UART.c msgid "Invalid UART pin selection" -msgstr "" +msgstr "Selección de pin UART no válida" #: py/moduerrno.c shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid argument" @@ -915,7 +953,7 @@ msgstr "Tamaño de buffer inválido" #: shared-bindings/_pixelbuf/PixelBuf.c msgid "Invalid byteorder string" -msgstr "" +msgstr "Cadena de byteorder inválida" #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c msgid "Invalid capture period. Valid range: 1 - 500" @@ -939,11 +977,11 @@ msgstr "Formato de fragmento de formato no válido" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Invalid frequency supplied" -msgstr "" +msgstr "Frecuencia suministrada no válida" #: supervisor/shared/safe_mode.c msgid "Invalid memory access." -msgstr "" +msgstr "Acceso a memoria no válido" #: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c msgid "Invalid number of bits" @@ -971,9 +1009,10 @@ msgstr "Pin inválido para canal derecho" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -981,7 +1020,7 @@ msgstr "pines inválidos" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Invalid pins for PWMOut" -msgstr "" +msgstr "Pines inválidos para PWMOut" #: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c #: shared-bindings/displayio/FourWire.c @@ -990,7 +1029,7 @@ msgstr "Polaridad inválida" #: shared-bindings/_bleio/Characteristic.c msgid "Invalid properties" -msgstr "" +msgstr "Propiedades inválidas" #: shared-bindings/microcontroller/__init__.c msgid "Invalid run mode." @@ -998,11 +1037,11 @@ msgstr "Modo de ejecución inválido." #: shared-module/_bleio/Attribute.c msgid "Invalid security_mode" -msgstr "" +msgstr "Modo de seguridad no válido" #: shared-bindings/audiomixer/Mixer.c msgid "Invalid voice" -msgstr "" +msgstr "Voz inválida" #: shared-bindings/audiomixer/Mixer.c msgid "Invalid voice count" @@ -1014,11 +1053,11 @@ msgstr "Archivo wave inválido" #: ports/stm/common-hal/busio/UART.c msgid "Invalid word/bit length" -msgstr "" +msgstr "Tamaño no válido de palabra/bit" #: shared-bindings/aesio/aes.c msgid "Key must be 16, 24, or 32 bytes long" -msgstr "" +msgstr "La llave debe tener 16, 24 o 32 bytes de longitud" #: py/compile.c msgid "LHS of keyword arg must be an id" @@ -1055,11 +1094,11 @@ msgstr "Valor máximo de x cuando se refleja es %d" #: supervisor/shared/safe_mode.c msgid "MicroPython NLR jump failed. Likely memory corruption." -msgstr "" +msgstr "MicroPython NLR jump falló. Probable corrupción de la memoria." #: supervisor/shared/safe_mode.c msgid "MicroPython fatal error." -msgstr "" +msgstr "Error fatal de MicroPython." #: shared-bindings/audiobusio/PDMIn.c msgid "Microphone startup delay must be in range 0.0 to 1.0" @@ -1067,7 +1106,7 @@ msgstr "Micrófono demora de inicio debe estar en el rango 0.0 a 1.0" #: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c msgid "Missing MISO or MOSI Pin" -msgstr "" +msgstr "Falta el pin MISO o MOSI" #: shared-bindings/displayio/Group.c msgid "Must be a %q subclass." @@ -1075,20 +1114,20 @@ msgstr "Debe de ser una subclase de %q" #: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c msgid "Must provide MISO or MOSI pin" -msgstr "" +msgstr "Debe proporcionar un pin MISO o MOSI" #: shared-bindings/rgbmatrix/RGBMatrix.c #, c-format msgid "Must use a multiple of 6 rgb pins, not %d" -msgstr "" +msgstr "Debe usar un múltiplo de 6 pines rgb, no %d" #: py/parse.c msgid "Name too long" -msgstr "" +msgstr "Nombre muy largo" #: ports/nrf/common-hal/_bleio/Characteristic.c msgid "No CCCD for this Characteristic" -msgstr "" +msgstr "No hay CCCD para esta característica" #: ports/atmel-samd/common-hal/analogio/AnalogOut.c #: ports/stm/common-hal/analogio/AnalogOut.c @@ -1102,11 +1141,11 @@ msgstr "No se encontró el canal DMA" #: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c msgid "No MISO Pin" -msgstr "" +msgstr "Sin pin MISO" #: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c msgid "No MOSI Pin" -msgstr "" +msgstr "Sin pin MOSI" #: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c @@ -1126,7 +1165,7 @@ msgstr "Relojes no disponibles" #: shared-bindings/_bleio/PacketBuffer.c msgid "No connection: length cannot be determined" -msgstr "" +msgstr "Sin conexión: no se puede determinar la longitud" #: shared-bindings/board/__init__.c msgid "No default %q bus" @@ -1151,19 +1190,19 @@ msgstr "Sin soporte de hardware en pin" #: shared-bindings/aesio/aes.c msgid "No key was specified" -msgstr "" +msgstr "No se especificó ninguna llave" #: shared-bindings/time/__init__.c msgid "No long integer support" -msgstr "" +msgstr "No hay soporte de entero largo" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "No more timers available on this pin." -msgstr "" +msgstr "No hay más temporizadores disponibles en este pin." #: shared-module/touchio/TouchIn.c msgid "No pulldown on pin; 1Mohm recommended" -msgstr "" +msgstr "No hay pulldown en el pin; 1Mohm recomendado" #: py/moduerrno.c msgid "No space left on device" @@ -1175,11 +1214,11 @@ msgstr "No existe el archivo/directorio" #: shared-module/rgbmatrix/RGBMatrix.c msgid "No timer available" -msgstr "" +msgstr "No hay temporizador disponible" #: supervisor/shared/safe_mode.c msgid "Nordic Soft Device failure assertion." -msgstr "" +msgstr "fallo de aserción de dispositivo Nordic Soft." #: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c @@ -1220,6 +1259,8 @@ msgid "" "Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " "%d bpp given" msgstr "" +"Solo se admiten BMP monocromáticos, indexados de 4 bpp u 8 bpp y 16 bpp o " +"más: %d bpp proporcionados" #: shared-bindings/audiobusio/PDMIn.c msgid "Oversample must be multiple of 8." @@ -1240,7 +1281,7 @@ msgstr "" #: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c #: ports/stm/common-hal/displayio/ParallelBus.c msgid "ParallelBus not yet supported" -msgstr "" +msgstr "ParallelBus no soportado aún" #: py/moduerrno.c msgid "Permission denied" @@ -1256,15 +1297,15 @@ msgstr "Pin no tiene capacidad ADC" #: shared-bindings/digitalio/DigitalInOut.c msgid "Pin is input only" -msgstr "" +msgstr "El pin es solo de entrada" #: ports/atmel-samd/common-hal/countio/Counter.c msgid "Pin must support hardware interrupts" -msgstr "" +msgstr "El pin debe admitir interrupciones de hardware" #: ports/stm/common-hal/pulseio/PulseIn.c msgid "Pin number already reserved by EXTI" -msgstr "" +msgstr "Número de pin ya reservado por EXTI" #: shared-bindings/rgbmatrix/RGBMatrix.c #, c-format @@ -1273,15 +1314,16 @@ msgid "" "bytes. If this cannot be avoided, pass allow_inefficient=True to the " "constructor" msgstr "" +"El pinout utiliza %d bytes por elemento, lo que consume más del ideal de %d " +"bytes. Si esto no se puede evitar, pase allow_inefficient=True al constructor" #: py/builtinhelp.c -#, fuzzy msgid "Plus any modules on the filesystem\n" -msgstr "Incapaz de montar de nuevo el sistema de archivos" +msgstr "Además de cualquier módulo en el sistema de archivos\n" #: shared-module/vectorio/Polygon.c msgid "Polygon needs at least 3 points" -msgstr "" +msgstr "El polígono necesita al menos 3 puntos" #: shared-bindings/ps2io/Ps2.c msgid "Pop from an empty Ps2 buffer" @@ -1289,7 +1331,7 @@ msgstr "Pop de un buffer Ps2 vacio" #: shared-bindings/_bleio/Adapter.c msgid "Prefix buffer must be on the heap" -msgstr "" +msgstr "El búfer de prefijo debe estar en el montículo" #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." @@ -1302,23 +1344,23 @@ msgstr "Pull no se usa cuando la dirección es output." #: ports/stm/common-hal/pulseio/PulseIn.c msgid "PulseIn not supported on this chip" -msgstr "" +msgstr "PulseIn no es compatible con este chip" #: ports/stm/common-hal/pulseio/PulseOut.c msgid "PulseOut not supported on this chip" -msgstr "" +msgstr "PulseOut no es compatible con este chip" #: ports/stm/common-hal/os/__init__.c msgid "RNG DeInit Error" -msgstr "" +msgstr "Error de desinicializado del RNG" #: ports/stm/common-hal/os/__init__.c msgid "RNG Init Error" -msgstr "" +msgstr "Error de inicialización de RNG" #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "RS485 inversion specified when not in RS485 mode" -msgstr "" +msgstr "Se especifica inversión de RS485 sin estar en modo RS485" #: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c #: ports/nrf/common-hal/rtc/RTC.c @@ -1332,11 +1374,11 @@ msgstr "RTC no soportado en esta placa" #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c #: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c msgid "RTS/CTS/RS485 Not yet supported on this device" -msgstr "" +msgstr "Sin capacidad de RTS/CTS/RS485 para este dispositivo" #: ports/stm/common-hal/os/__init__.c msgid "Random number generation error" -msgstr "" +msgstr "Error de generación de números aleatorios" #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" @@ -1347,17 +1389,16 @@ msgid "Read-only filesystem" msgstr "Sistema de archivos de solo-Lectura" #: shared-module/displayio/Bitmap.c -#, fuzzy msgid "Read-only object" -msgstr "Solo-lectura" +msgstr "Objeto de solo-lectura" #: shared-bindings/displayio/EPaperDisplay.c msgid "Refresh too soon" -msgstr "" +msgstr "Actualizando demasiado pronto" #: shared-bindings/aesio/aes.c msgid "Requested AES mode is unsupported" -msgstr "" +msgstr "El modo AES solicitado no es compatible" #: ports/atmel-samd/common-hal/audioio/AudioOut.c msgid "Right channel unsupported" @@ -1375,6 +1416,10 @@ msgstr "Ejecutando en modo seguro! La auto-recarga esta deshabilitada.\n" msgid "Running in safe mode! Not running saved code.\n" msgstr "Ejecutando en modo seguro! No se esta ejecutando el código guardado.\n" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "Sin capacidad para formato CSD para tarjeta SD" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1382,11 +1427,11 @@ msgstr "SDA o SCL necesitan una pull up" #: ports/stm/common-hal/busio/SPI.c msgid "SPI Init Error" -msgstr "" +msgstr "Error de inicio de SPI" #: ports/stm/common-hal/busio/SPI.c msgid "SPI Re-initialization error" -msgstr "" +msgstr "Error de reinicialización de SPI" #: shared-bindings/audiomixer/Mixer.c msgid "Sample rate must be positive" @@ -1399,15 +1444,15 @@ msgstr "Frecuencia de muestreo demasiado alta. Debe ser menor a %d" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Scan already in progess. Stop with stop_scan." -msgstr "" +msgstr "Escaneo en progreso. Use stop_scan para detener." #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "Selected CTS pin not valid" -msgstr "" +msgstr "Pin CTS seleccionado no válido" #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "Selected RTS pin not valid" -msgstr "" +msgstr "Pin RTS seleccionado no válido" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c @@ -1425,7 +1470,7 @@ msgstr "Rebanadas no soportadas" #: shared-bindings/aesio/aes.c msgid "Source and destination buffers must be the same length" -msgstr "" +msgstr "Los búferes de fuente y destino deben ser del mismo tamaño" #: extmod/modure.c msgid "Splitting with sub-captures" @@ -1441,23 +1486,31 @@ msgstr "A Stream le falta el método readinto() o write()." #: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c msgid "Supply at least one UART pin" -msgstr "" +msgstr "Suministre al menos un pin UART" + +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "La entrada del sistema debe ser gnss.SatelliteSystem" #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" -msgstr "" +msgstr "Lectura de temperatura expirada" #: supervisor/shared/safe_mode.c msgid "" "The CircuitPython heap was corrupted because the stack was too small.\n" "Please increase the stack size if you know how, or if not:" msgstr "" +"El montículo de CircuitPython se dañó porque la pila era demasiado pequeña.\n" +"Aumente el tamaño de la pila si sabe cómo, o si no:" #: supervisor/shared/safe_mode.c msgid "" "The `microcontroller` module was used to boot into safe mode. Press reset to " "exit safe mode.\n" msgstr "" +"El módulo de `microcontroller` fue utilizado para bootear en modo seguro. " +"Presione reset para salir del modo seguro.\n" #: supervisor/shared/safe_mode.c msgid "" @@ -1465,6 +1518,11 @@ msgid "" "enough power for the whole circuit and press reset (after ejecting " "CIRCUITPY).\n" msgstr "" +"La alimentación de la microntroladora bajó. Asegúrate que tu fuente de " +"poder\n" +"pueda suplir suficiente energía para todo el circuito y presione reset " +"(luego de\n" +"expulsar CIRCUITPY)\n" #: shared-module/audiomixer/MixerVoice.c msgid "The sample's bits_per_sample does not match the mixer's" @@ -1488,11 +1546,11 @@ msgstr "La altura del Tile debe dividir exacto la altura del bitmap" #: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c msgid "Tile index out of bounds" -msgstr "" +msgstr "Índice de mosaico fuera de límites" #: shared-bindings/displayio/TileGrid.c msgid "Tile value out of bounds" -msgstr "" +msgstr "Valor de mosaico fuera de límites" #: shared-bindings/displayio/TileGrid.c msgid "Tile width must exactly divide bitmap width" @@ -1502,6 +1560,8 @@ msgstr "Ancho del Tile debe dividir exactamente el ancho de mapa de bits" #, c-format msgid "Timeout is too long: Maximum timeout length is %d seconds" msgstr "" +"Tiempo de espera demasiado largo: El tiempo máximo de espera es de %d " +"segundos" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c msgid "Too many channels in sample." @@ -1518,6 +1578,7 @@ msgstr "Muchos displays" #: ports/nrf/common-hal/_bleio/PacketBuffer.c msgid "Total data to write is larger than outgoing_packet_length" msgstr "" +"Los datos totales a escribir son más grandes que outgoing_packet_length" #: py/obj.c msgid "Traceback (most recent call last):\n" @@ -1529,23 +1590,23 @@ msgstr "Argumento tuple o struct_time requerido" #: ports/stm/common-hal/busio/UART.c msgid "UART Buffer allocation error" -msgstr "" +msgstr "No se pudo encontrar el búfer para UART" #: ports/stm/common-hal/busio/UART.c msgid "UART De-init error" -msgstr "" +msgstr "Error de desinicialización de UARL" #: ports/stm/common-hal/busio/UART.c msgid "UART Init Error" -msgstr "" +msgstr "Error de inicialización de UARL" #: ports/stm/common-hal/busio/UART.c msgid "UART Re-init error" -msgstr "" +msgstr "Error de reinicialización de UARL" #: ports/stm/common-hal/busio/UART.c msgid "UART write error" -msgstr "" +msgstr "Error de escritura UART" #: shared-module/usb_hid/Device.c msgid "USB Busy" @@ -1557,7 +1618,7 @@ msgstr "Error USB" #: shared-bindings/_bleio/UUID.c msgid "UUID integer value must be 0-0xffff" -msgstr "" +msgstr "El valor entero del UUID debe ser 0-0xffff" #: shared-bindings/_bleio/UUID.c msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" @@ -1575,7 +1636,7 @@ msgstr "No se pudieron asignar buffers para la conversión con signo" #: shared-module/displayio/I2CDisplay.c #, c-format msgid "Unable to find I2C Display at %x" -msgstr "" +msgstr "No se puede encontrar la pantalla I2C en %x" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c @@ -1601,21 +1662,21 @@ msgstr "Tipo de uuid nrfx inesperado" #: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Unknown gatt error: 0x%04x" -msgstr "" +msgstr "Error de gatt desconocido: 0x%04x" #: supervisor/shared/safe_mode.c msgid "Unknown reason." -msgstr "" +msgstr "Razón desconocida." #: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Unknown security error: 0x%04x" -msgstr "" +msgstr "Error de seguridad desconocido: 0x%04x" #: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Unknown soft device error: %04x" -msgstr "" +msgstr "Error suave desconocido en dispositivo: %04x" #: shared-bindings/_pixelbuf/PixelBuf.c #, c-format @@ -1627,15 +1688,17 @@ msgid "" "Unspecified issue. Can be that the pairing prompt on the other device was " "declined or ignored." msgstr "" +"Problema no especificado. Puede ser que la señal de emparejamiento del otro " +"dispositivo fue declinada o ignorada." #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "Baudrate no soportado" #: shared-module/displayio/display_core.c -#, fuzzy msgid "Unsupported display bus type" -msgstr "tipo de bitmap no soportado" +msgstr "Sin capacidad de bus tipo display" #: shared-module/audiocore/WaveFile.c msgid "Unsupported format" @@ -1652,12 +1715,12 @@ msgstr "valor pull no soportado." #: ports/nrf/common-hal/_bleio/Characteristic.c #: ports/nrf/common-hal/_bleio/Descriptor.c msgid "Value length != required fixed length" -msgstr "" +msgstr "Tamaño del valor != del tamaño fijo requerido" #: ports/nrf/common-hal/_bleio/Characteristic.c #: ports/nrf/common-hal/_bleio/Descriptor.c msgid "Value length > max_length" -msgstr "" +msgstr "Tamaño de valor > max_length" #: py/emitnative.c msgid "Viper functions don't currently support more than 4 arguments" @@ -1665,7 +1728,7 @@ msgstr "funciones Viper actualmente no soportan más de 4 argumentos." #: ports/stm/common-hal/microcontroller/Processor.c msgid "Voltage read timed out" -msgstr "" +msgstr "Tiempo de espera agotado para lectura de voltaje" #: main.c msgid "WARNING: Your code filename has two extensions\n" @@ -1674,22 +1737,25 @@ msgstr "ADVERTENCIA: El nombre de archivo de tu código tiene dos extensiones\n" #: shared-bindings/watchdog/WatchDogTimer.c msgid "WatchDogTimer cannot be deinitialized once mode is set to RESET" msgstr "" +"WatchDogTimer no se puede desinicializar luego de definirse en modo RESET" #: shared-bindings/watchdog/WatchDogTimer.c msgid "WatchDogTimer is not currently running" -msgstr "" +msgstr "WatchDogTimer no se está ejecutando en este momento" #: shared-bindings/watchdog/WatchDogTimer.c msgid "WatchDogTimer.mode cannot be changed once set to WatchDogMode.RESET" msgstr "" +"WatchDogTimer.mode no se puede modificar luego de configurar WatchDogMode." +"RESET" #: shared-bindings/watchdog/WatchDogTimer.c msgid "WatchDogTimer.timeout must be greater than 0" -msgstr "" +msgstr "WatchDogTimer.timeout debe ser mayor a 0" #: supervisor/shared/safe_mode.c msgid "Watchdog timer expired." -msgstr "" +msgstr "Temporizador de perro guardián expirado." #: py/builtinhelp.c #, c-format @@ -1709,11 +1775,11 @@ msgstr "" #: ports/nrf/common-hal/_bleio/PacketBuffer.c msgid "Writes not supported on Characteristic" -msgstr "" +msgstr "Escrituras no admitidas en la característica" #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" -msgstr "" +msgstr "Estás en modo seguro: algo inesperado ha sucedido.\n" #: supervisor/shared/safe_mode.c msgid "You requested starting safe mode by " @@ -1745,17 +1811,17 @@ msgstr "se llamó abort()" msgid "address %08x is not aligned to %d bytes" msgstr "la dirección %08x no esta alineada a %d bytes" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "address fuera de límites" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "addresses esta vacío" #: extmod/ulab/code/vectorise.c msgid "arctan2 is implemented for scalars and ndarrays only" -msgstr "" +msgstr "arctan2 se encuentra implementado solo para escalares y ndarrays" #: py/modbuiltins.c msgid "arg is an empty sequence" @@ -1763,7 +1829,7 @@ msgstr "argumento es una secuencia vacía" #: extmod/ulab/code/numerical.c msgid "argsort argument must be an ndarray" -msgstr "" +msgstr "El argumento para argsort debe ser un ndarray" #: py/runtime.c msgid "argument has wrong type" @@ -1780,7 +1846,7 @@ msgstr "argumento deberia ser un '%q' no un '%q'" #: extmod/ulab/code/linalg.c msgid "arguments must be ndarrays" -msgstr "" +msgstr "argumentos deben ser ndarrays" #: py/objarray.c shared-bindings/nvm/ByteArray.c msgid "array/bytes required on right side" @@ -1788,7 +1854,7 @@ msgstr "array/bytes requeridos en el lado derecho" #: extmod/ulab/code/numerical.c msgid "attempt to get argmin/argmax of an empty sequence" -msgstr "" +msgstr "se trató de traer argmin/argmax de una secuencia vacía" #: py/objstr.c msgid "attributes not supported yet" @@ -1796,15 +1862,15 @@ msgstr "atributos aún no soportados" #: extmod/ulab/code/numerical.c msgid "axis must be -1, 0, None, or 1" -msgstr "" +msgstr "eje debe ser -1, 0, None o 1" #: extmod/ulab/code/numerical.c msgid "axis must be -1, 0, or 1" -msgstr "" +msgstr "eje debe ser -1, 0, o 1" #: extmod/ulab/code/numerical.c msgid "axis must be None, 0, or 1" -msgstr "" +msgstr "eje debe ser None, 0, o 1" #: py/builtinevex.c msgid "bad compile mode" @@ -1830,18 +1896,13 @@ msgstr "operacion binaria %q no implementada" msgid "bits must be 7, 8 or 9" msgstr "bits deben ser 7, 8 ó 9" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "bits debe ser 8" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "bits_per_sample debe ser 8 ó 16" #: py/emitinlinethumb.c -#, fuzzy msgid "branch not in range" -msgstr "El argumento de chr() no esta en el rango(256)" +msgstr "la rama no está dentro del rango" #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" @@ -1860,10 +1921,6 @@ msgstr "Las secciones del buffer necesitan tener longitud igual" msgid "buffer too small" msgstr "buffer demasiado pequeño" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "los buffers deben de tener la misma longitud" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "los botones necesitan ser digitalio.DigitalInOut" @@ -1874,7 +1931,7 @@ msgstr "codigo byte no implementado" #: shared-bindings/_pixelbuf/PixelBuf.c msgid "byteorder is not a string" -msgstr "" +msgstr "byteorder no es una cadena" #: ports/atmel-samd/common-hal/busio/UART.c msgid "bytes > 8 bits not supported" @@ -1939,7 +1996,7 @@ msgstr "no se puede convertir el objeto '%q' a %q implícitamente" msgid "can't convert NaN to int" msgstr "no se puede convertir Nan a int" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "no se puede convertir address a int" @@ -2008,6 +2065,10 @@ msgid "can't send non-None value to a just-started generator" msgstr "" "no se puede enviar un valor que no sea None a un generador recién iniciado" +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "no se puede definir un tamaño de bloque de 512" + #: py/objnamedtuple.c msgid "can't set attribute" msgstr "no se puede asignar el atributo" @@ -2056,11 +2117,11 @@ msgstr "no se puedo realizar importación relativa" #: extmod/ulab/code/ndarray.c msgid "cannot reshape array (incompatible input/output shape)" -msgstr "" +msgstr "no se puede reformar el arreglo (forma de entrada/salida incompatible)" #: py/emitnative.c msgid "casting" -msgstr "" +msgstr "convirtiendo tipo" #: shared-bindings/_stage/Text.c msgid "chars buffer too small" @@ -2076,7 +2137,7 @@ msgstr "El argumento de chr() no esta en el rango(256)" #: shared-module/vectorio/Circle.c msgid "circle can only be registered in one parent" -msgstr "" +msgstr "circle solo puede ser registrado con un pariente" #: shared-bindings/displayio/Palette.c msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" @@ -2084,7 +2145,7 @@ msgstr "color buffer debe ser 3 bytes (RGB) ó 4 bytes (RGB + pad byte)" #: shared-bindings/displayio/Palette.c msgid "color buffer must be a buffer, tuple, list, or int" -msgstr "" +msgstr "el búfer de color debe ser un búfer, una tupla, una lista o un entero" #: shared-bindings/displayio/Palette.c msgid "color buffer must be a bytearray or array of type 'b' or 'B'" @@ -2120,35 +2181,39 @@ msgstr "conversión a objeto" #: extmod/ulab/code/filter.c msgid "convolve arguments must be linear arrays" -msgstr "" +msgstr "los argumentos para convolve deben ser arreglos lineares" #: extmod/ulab/code/filter.c msgid "convolve arguments must be ndarrays" -msgstr "" +msgstr "los argumentos para convolve deben ser ndarrays" #: extmod/ulab/code/filter.c msgid "convolve arguments must not be empty" -msgstr "" +msgstr "los argumentos para convolve no deben estar vacíos" #: extmod/ulab/code/ndarray.c msgid "could not broadast input array from shape" -msgstr "" +msgstr "no se pudo anunciar la matriz de entrada desde la forma" #: extmod/ulab/code/poly.c msgid "could not invert Vandermonde matrix" -msgstr "" +msgstr "no se pudo invertir la matriz de Vandermonde" + +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "no se pudo determinar la versión de la tarjeta SD" #: extmod/ulab/code/approx.c msgid "data must be iterable" -msgstr "" +msgstr "los datos deben permitir iteración" #: extmod/ulab/code/approx.c msgid "data must be of equal length" -msgstr "" +msgstr "los datos deben ser de igual tamaño" #: extmod/ulab/code/numerical.c msgid "ddof must be smaller than length of data set" -msgstr "" +msgstr "ddof debe ser menor que la longitud del conjunto de datos" #: py/parsenum.c msgid "decimal numbers not supported" @@ -2179,7 +2244,7 @@ msgstr "la secuencia de actualizacion del dict tiene una longitud incorrecta" #: extmod/ulab/code/numerical.c msgid "diff argument must be an ndarray" -msgstr "" +msgstr "El argumento diff debe ser un ndarray" #: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c #: shared-bindings/math/__init__.c @@ -2253,23 +2318,23 @@ msgstr "argumento posicional adicional dado" #: py/parse.c msgid "f-string expression part cannot include a '#'" -msgstr "" +msgstr "La parte de expresión f-string no puede incluir un '#'" #: py/parse.c msgid "f-string expression part cannot include a backslash" -msgstr "" +msgstr "La parte de expresión f-string no puede incluir una barra invertida" #: py/parse.c msgid "f-string: empty expression not allowed" -msgstr "" +msgstr "cadena-f: expresión vacía no permitida" #: py/parse.c msgid "f-string: expecting '}'" -msgstr "" +msgstr "f-string: esperando '}'" #: py/parse.c msgid "f-string: single '}' is not allowed" -msgstr "" +msgstr "cadena-f: solo '}' no está permitido" #: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c #: shared-bindings/displayio/OnDiskBitmap.c @@ -2282,39 +2347,35 @@ msgstr "sistema de archivos debe proporcionar método de montaje" #: extmod/ulab/code/vectorise.c msgid "first argument must be a callable" -msgstr "" +msgstr "se debe poder llamar al primer argumento" #: extmod/ulab/code/approx.c msgid "first argument must be a function" -msgstr "" +msgstr "el primer argumento debe ser una función" #: extmod/ulab/code/ndarray.c msgid "first argument must be an iterable" -msgstr "" +msgstr "el primer argumento debe permitir iteración" #: extmod/ulab/code/vectorise.c msgid "first argument must be an ndarray" -msgstr "" +msgstr "el primer argumento debe ser ndarray" #: py/objtype.c msgid "first argument to super() must be type" msgstr "primer argumento para super() debe ser de tipo" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "firstbit debe ser MSB" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" -msgstr "" +msgstr "el orden de aplanamiento debe ser 'C' o 'F'" #: extmod/ulab/code/numerical.c msgid "flip argument must be an ndarray" -msgstr "" +msgstr "el argumento invertido debe ser un ndarray" #: py/objint.c msgid "float too big" -msgstr "" +msgstr "punto flotante muy grande" #: shared-bindings/_stage/Text.c msgid "font must be 2048 bytes long" @@ -2343,11 +2404,11 @@ msgstr "la función tiene múltiples valores para el argumento '%q'" #: extmod/ulab/code/approx.c msgid "function has the same sign at the ends of interval" -msgstr "" +msgstr "la función tiene el mismo signo a extremos del intervalo" #: extmod/ulab/code/compare.c msgid "function is implemented for scalars and ndarrays only" -msgstr "" +msgstr "la función está implementada solo para escalares y ndarrays" #: py/argcheck.c #, c-format @@ -2406,7 +2467,7 @@ msgstr "formato incompleto" #: py/objstr.c msgid "incomplete format key" -msgstr "" +msgstr "formato de llave incompleto" #: extmod/modubinascii.c msgid "incorrect padding" @@ -2414,7 +2475,7 @@ msgstr "relleno (padding) incorrecto" #: extmod/ulab/code/ndarray.c msgid "index is out of bounds" -msgstr "" +msgstr "el índice está fuera de límites" #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c @@ -2429,11 +2490,11 @@ msgstr "indices deben ser enteros" #: extmod/ulab/code/ndarray.c msgid "indices must be integers, slices, or Boolean lists" -msgstr "" +msgstr "los índices deben ser enteros, particiones o listas de booleanos" #: extmod/ulab/code/approx.c msgid "initial values must be iterable" -msgstr "" +msgstr "los valores iniciales deben permitir iteración" #: py/compile.c msgid "inline assembler must be a function" @@ -2441,35 +2502,35 @@ msgstr "ensamblador en línea debe ser una función" #: extmod/ulab/code/create.c msgid "input argument must be an integer or a 2-tuple" -msgstr "" +msgstr "el argumento de entrada debe ser un entero o una tupla de par" #: extmod/ulab/code/fft.c msgid "input array length must be power of 2" -msgstr "" +msgstr "el tamaño del arreglo de entrada debe ser potencia de 2" #: extmod/ulab/code/poly.c msgid "input data must be an iterable" -msgstr "" +msgstr "los datos de entrada deben permitir iteración" #: extmod/ulab/code/linalg.c msgid "input matrix is asymmetric" -msgstr "" +msgstr "la matriz de entrada es asimétrica" #: extmod/ulab/code/linalg.c msgid "input matrix is singular" -msgstr "" +msgstr "la matriz de entrada es singular" #: extmod/ulab/code/linalg.c msgid "input must be square matrix" -msgstr "" +msgstr "la entrada debe ser una matriz cuadrada" #: extmod/ulab/code/numerical.c msgid "input must be tuple, list, range, or ndarray" -msgstr "" +msgstr "la entrada debe ser una tupla, lista, rango o ndarray" #: extmod/ulab/code/poly.c msgid "input vectors must be of equal length" -msgstr "" +msgstr "los vectores de entrada deben ser de igual tamaño" #: py/parsenum.c msgid "int() arg 2 must be >= 2 and <= 36" @@ -2481,20 +2542,12 @@ msgstr "Entero requerido" #: extmod/ulab/code/approx.c msgid "interp is defined for 1D arrays of equal length" -msgstr "" +msgstr "interp está definido para arreglos de 1D del mismo tamaño" #: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" -msgstr "" - -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "periférico I2C inválido" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "periférico SPI inválido" +msgstr "el intervalo debe ser der rango %s-%s" #: lib/netutils/netutils.c msgid "invalid arguments" @@ -2526,7 +2579,7 @@ msgstr "decorador de micropython inválido" #: shared-bindings/random/__init__.c msgid "invalid step" -msgstr "" +msgstr "paso inválido" #: py/compile.c py/parse.c msgid "invalid syntax" @@ -2555,11 +2608,11 @@ msgstr "issubclass() arg 2 debe ser una clase o tuple de clases" #: extmod/ulab/code/ndarray.c msgid "iterables are not of the same length" -msgstr "" +msgstr "los iterables no son del mismo tamaño" #: extmod/ulab/code/linalg.c msgid "iterations did not converge" -msgstr "" +msgstr "las iteraciones no convergen" #: py/objstr.c msgid "join expects a list of str/bytes objects consistent with self object" @@ -2590,7 +2643,7 @@ msgstr "argumento length no permitido para este tipo" #: shared-bindings/audiomixer/MixerVoice.c msgid "level must be between 0 and 1" -msgstr "" +msgstr "el nivel debe ser entre 0 y 1" #: py/objarray.c msgid "lhs and rhs should be compatible" @@ -2614,7 +2667,7 @@ msgstr "long int no soportado en esta compilación" #: py/parse.c msgid "malformed f-string" -msgstr "" +msgstr "cadena-f mal formada" #: shared-bindings/_stage/Layer.c msgid "map buffer too small" @@ -2626,17 +2679,17 @@ msgstr "error de dominio matemático" #: extmod/ulab/code/linalg.c msgid "matrix dimensions do not match" -msgstr "" +msgstr "las dimensiones de la matriz no coinciden" #: extmod/ulab/code/linalg.c msgid "matrix is not positive definite" -msgstr "" +msgstr "matrix no es definida positiva" #: ports/nrf/common-hal/_bleio/Characteristic.c #: ports/nrf/common-hal/_bleio/Descriptor.c #, c-format msgid "max_length must be 0-%d when fixed_length is %s" -msgstr "" +msgstr "max_length debe ser 0-%d cuando fixed_length es %s" #: py/runtime.c msgid "maximum recursion depth exceeded" @@ -2657,7 +2710,7 @@ msgstr "módulo no encontrado" #: extmod/ulab/code/poly.c msgid "more degrees of freedom than data points" -msgstr "" +msgstr "más grados de libertad que los puntos de datos" #: py/compile.c msgid "multiple *x in assignment" @@ -2675,17 +2728,13 @@ msgstr "herencia multiple no soportada" msgid "must raise an object" msgstr "debe hacer un raise de un objeto" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "se deben de especificar sck/mosi/miso" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "debe utilizar argumento de palabra clave para la función clave" #: extmod/ulab/code/numerical.c msgid "n must be between 0, and 9" -msgstr "" +msgstr "n debe estar entre 0 y 9" #: py/runtime.c msgid "name '%q' is not defined" @@ -2716,6 +2765,10 @@ msgstr "potencia negativa sin float support" msgid "negative shift count" msgstr "cuenta de corrimientos negativo" +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "no hay tarjeta SD" + #: py/vm.c msgid "no active exception to reraise" msgstr "exception no activa para reraise" @@ -2735,7 +2788,11 @@ msgstr "ningún módulo se llama '%q'" #: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c #: shared-bindings/displayio/ParallelBus.c msgid "no reset pin available" -msgstr "" +msgstr "no hay pin de reinicio disponible" + +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "no hay respuesta de la tarjeta SD" #: py/runtime.c msgid "no such attribute" @@ -2743,7 +2800,7 @@ msgstr "no hay tal atributo" #: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" -msgstr "" +msgstr "no UUID encontrado en service_uuids_whitelist" #: py/compile.c msgid "non-default argument follows default argument" @@ -2778,11 +2835,11 @@ msgstr "no suficientes argumentos para format string" #: extmod/ulab/code/poly.c msgid "number of arguments must be 2, or 3" -msgstr "" +msgstr "el número de argumentos debe ser 2 o 3" #: extmod/ulab/code/create.c msgid "number of points must be at least 2" -msgstr "" +msgstr "el número de puntos debe ser al menos 2" #: py/obj.c #, c-format @@ -2835,17 +2892,16 @@ msgid "odd-length string" msgstr "string de longitud impar" #: py/objstr.c py/objstrunicode.c -#, fuzzy msgid "offset out of bounds" -msgstr "address fuera de límites" +msgstr "offset fuera de límites" #: ports/nrf/common-hal/audiobusio/PDMIn.c msgid "only bit_depth=16 is supported" -msgstr "" +msgstr "solo se admite bit_depth=16" #: ports/nrf/common-hal/audiobusio/PDMIn.c msgid "only sample_rate=16000 is supported" -msgstr "" +msgstr "solo se admite sample_rate=16000" #: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c #: shared-bindings/nvm/ByteArray.c @@ -2855,15 +2911,15 @@ msgstr "solo se admiten segmentos con step=1 (alias None)" #: extmod/ulab/code/compare.c extmod/ulab/code/ndarray.c #: extmod/ulab/code/vectorise.c msgid "operands could not be broadcast together" -msgstr "" +msgstr "los operandos no se pueden transmitir juntos" #: extmod/ulab/code/numerical.c msgid "operation is not implemented on ndarrays" -msgstr "" +msgstr "la operación no está implementada para ndarrays" #: extmod/ulab/code/ndarray.c msgid "operation is not supported for given type" -msgstr "" +msgstr "la operación no es compatible para un tipo dado" #: py/modbuiltins.c msgid "ord expects a character" @@ -2912,7 +2968,7 @@ msgstr "pixel_shader debe ser displayio.Palette o displayio.ColorConverter" #: shared-module/vectorio/Polygon.c msgid "polygon can only be registered in one parent" -msgstr "" +msgstr "el polígono solo se puede registrar en uno de los padres" #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c @@ -2947,11 +3003,11 @@ msgstr "desbordamiento de cola(queue)" #: py/parse.c msgid "raw f-strings are not implemented" -msgstr "" +msgstr "no está implementado cadenas-f sin procesar" #: extmod/ulab/code/fft.c msgid "real and imaginary parts must be of equal length" -msgstr "" +msgstr "las partes reales e imaginarias deben ser de igual longitud" #: py/builtinimport.c msgid "relative import" @@ -2973,16 +3029,16 @@ msgstr "retorno esperado '%q' pero se obtuvo '%q'" #: shared-bindings/rgbmatrix/RGBMatrix.c #, c-format msgid "rgb_pins[%d] duplicates another pin assignment" -msgstr "" +msgstr "rgb_pins[%d] duplica otra asignación de pin" #: shared-bindings/rgbmatrix/RGBMatrix.c #, c-format msgid "rgb_pins[%d] is not on the same port as clock" -msgstr "" +msgstr "rgb_pins[%d] no está en el mismo puerto que el reloj" #: extmod/ulab/code/ndarray.c msgid "right hand side must be an ndarray, or a scalar" -msgstr "" +msgstr "el lado derecho debe ser un ndarray o escalar" #: py/objstr.c msgid "rsplit(None,n)" @@ -3002,7 +3058,7 @@ msgstr "frecuencia de muestreo fuera de rango" #: py/modmicropython.c msgid "schedule stack full" -msgstr "" +msgstr "pila de horario llena" #: lib/utils/pyexec.c py/builtinimport.c msgid "script compilation not supported" @@ -3010,7 +3066,7 @@ msgstr "script de compilación no soportado" #: extmod/ulab/code/ndarray.c msgid "shape must be a 2-tuple" -msgstr "" +msgstr "la forma debe ser una tupla de 2" #: py/objstr.c msgid "sign not allowed in string format specifier" @@ -3026,12 +3082,16 @@ msgstr "un solo '}' encontrado en format string" #: extmod/ulab/code/linalg.c msgid "size is defined for ndarrays only" -msgstr "" +msgstr "el tamaño se define solo para ndarrays" #: shared-bindings/time/__init__.c msgid "sleep length must be non-negative" msgstr "la longitud de sleep no puede ser negativa" +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "el tamaño de la división no puede ser cero" + #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" msgstr "slice step no puede ser cero" @@ -3046,16 +3106,27 @@ msgstr "reinicio suave\n" #: extmod/ulab/code/numerical.c msgid "sort argument must be an ndarray" -msgstr "" +msgstr "argumento de ordenado debe ser un ndarray" + +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "el arreglo sos debe de forma (n_section, 6)" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "sos[:, 3] deberían ser todos unos" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "sosfilt requiere argumentos iterables" #: py/objstr.c msgid "start/end indices" msgstr "índices inicio/final" #: shared-bindings/displayio/Shape.c -#, fuzzy msgid "start_x should be an int" -msgstr "y deberia ser un int" +msgstr "start_x deberia ser un int" #: shared-bindings/random/__init__.c msgid "step must be non-zero" @@ -3125,15 +3196,24 @@ msgstr "time.struct_time() toma un sequencio 9" #: ports/nrf/common-hal/watchdog/WatchDogTimer.c msgid "timeout duration exceeded the maximum supported value" msgstr "" +"la duración de tiempo de espera ha excedido la capacidad máxima del valor" #: shared-bindings/busio/UART.c msgid "timeout must be 0.0-100.0 seconds" -msgstr "" +msgstr "el tiempo de espera debe ser 0.0-100.0 segundos" #: shared-bindings/_bleio/CharacteristicBuffer.c msgid "timeout must be >= 0.0" msgstr "tiempo muerto debe ser >= 0.0" +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "tiempo de espera agotado esperando por tarjeta v1" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "tiempo de espera agotado esperando a tarjeta v2" + #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" msgstr "timestamp fuera de rango para plataform time_t" @@ -3144,7 +3224,7 @@ msgstr "demasiados argumentos provistos con el formato dado" #: extmod/ulab/code/ndarray.c msgid "too many indices" -msgstr "" +msgstr "demasiados índices" #: py/runtime.c #, c-format @@ -3273,31 +3353,31 @@ msgstr "tipos no soportados para %q: '%s', '%s'" #: py/objint.c #, c-format msgid "value must fit in %d byte(s)" -msgstr "" +msgstr "el valor debe caber en %d byte(s)" #: shared-bindings/displayio/Bitmap.c msgid "value_count must be > 0" -msgstr "" +msgstr "value_count debe ser > 0" #: shared-bindings/watchdog/WatchDogTimer.c msgid "watchdog timeout must be greater than 0" -msgstr "" +msgstr "el tiempo de espera del perro guardián debe ser mayor a 0" #: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" -msgstr "" +msgstr "la ventana debe ser <= intervalo" #: extmod/ulab/code/linalg.c msgid "wrong argument type" -msgstr "" +msgstr "tipo de argumento incorrecto" #: extmod/ulab/code/ndarray.c msgid "wrong index type" -msgstr "" +msgstr "tipo de índice incorrecto" #: extmod/ulab/code/vectorise.c msgid "wrong input type" -msgstr "" +msgstr "tipo de entrada incorrecta" #: py/objstr.c msgid "wrong number of arguments" @@ -3309,30 +3389,40 @@ msgstr "numero erroneo de valores a descomprimir" #: extmod/ulab/code/ndarray.c msgid "wrong operand type" -msgstr "" +msgstr "tipo de operando incorrecto" #: extmod/ulab/code/vectorise.c msgid "wrong output type" -msgstr "" +msgstr "tipo de salida incorrecta" #: shared-module/displayio/Shape.c -#, fuzzy msgid "x value out of bounds" -msgstr "address fuera de límites" +msgstr "valor x fuera de límites" #: shared-bindings/displayio/Shape.c msgid "y should be an int" msgstr "y deberia ser un int" #: shared-module/displayio/Shape.c -#, fuzzy msgid "y value out of bounds" -msgstr "address fuera de límites" +msgstr "valor y fuera de límites" #: py/objrange.c msgid "zero step" msgstr "paso cero" +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "zi debe ser un ndarray" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "zi debe ser de tipo flotante" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "zi debe ser una forma (n_section,2)" + #~ msgid "AP required" #~ msgstr "AP requerido" @@ -3515,6 +3605,9 @@ msgstr "paso cero" #~ msgid "GPIO16 does not support pull up." #~ msgstr "GPIO16 no soporta pull up." +#~ msgid "I2C operation not supported" +#~ msgstr "operación I2C no soportada" + #~ msgid "Invalid bit clock pin" #~ msgstr "Pin bit clock inválido" @@ -3684,12 +3777,18 @@ msgstr "paso cero" #~ msgid "bad GATT role" #~ msgstr "mal GATT role" +#~ msgid "bits must be 8" +#~ msgstr "bits debe ser 8" + #~ msgid "buf is too small. need %d bytes" #~ msgstr "buf es demasiado pequeño. necesita %d bytes" #~ msgid "buffer too long" #~ msgstr "buffer demasiado largo" +#~ msgid "buffers must be the same length" +#~ msgstr "los buffers deben de tener la misma longitud" + #~ msgid "byteorder is not an instance of ByteOrder (got a %s)" #~ msgstr "byteorder no es instancia de ByteOrder (encontarmos un %s)" @@ -3726,6 +3825,9 @@ msgstr "paso cero" #~ msgid "ffi_prep_closure_loc" #~ msgstr "ffi_prep_closure_loc" +#~ msgid "firstbit must be MSB" +#~ msgstr "firstbit debe ser MSB" + #~ msgid "flash location must be below 1MByte" #~ msgstr "la ubicación de la flash debe estar debajo de 1MByte" @@ -3738,6 +3840,12 @@ msgstr "paso cero" #~ msgid "interval not in range 0.0020 to 10.24" #~ msgstr "El intervalo está fuera del rango de 0.0020 a 10.24" +#~ msgid "invalid I2C peripheral" +#~ msgstr "periférico I2C inválido" + +#~ msgid "invalid SPI peripheral" +#~ msgstr "periférico SPI inválido" + #~ msgid "invalid alarm" #~ msgstr "alarma inválida" @@ -3760,6 +3868,9 @@ msgstr "paso cero" #~ msgstr "" #~ "falló la asignación de memoria, asignando %u bytes para código nativo" +#~ msgid "must specify all of sck/mosi/miso" +#~ msgstr "se deben de especificar sck/mosi/miso" + #~ msgid "name must be a string" #~ msgstr "name debe de ser un string" diff --git a/locale/fil.po b/locale/fil.po index 66ccc711a..348931613 100644 --- a/locale/fil.po +++ b/locale/fil.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" +"POT-Creation-Date: 2020-07-02 15:29+0200\n" "PO-Revision-Date: 2018-12-20 22:15-0800\n" "Last-Translator: Timothy <me@timothygarcia.ca>\n" "Language-Team: fil\n" @@ -58,6 +58,10 @@ msgstr "%%c nangangailangan ng int o char" msgid "%d address pins and %d rgb pins indicate a height of %d, not %d" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" +msgstr "" + #: shared-bindings/microcontroller/Pin.c msgid "%q in use" msgstr "%q ay ginagamit" @@ -86,6 +90,10 @@ msgstr "aarehas na haba dapat ang buffer slices" msgid "%q must be a tuple of length 2" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "" + #: shared-bindings/fontio/BuiltinFont.c #, fuzzy msgid "%q should be an int" @@ -295,6 +303,7 @@ msgstr "Lahat ng sync event channels ay ginagamit" msgid "All timers for this pin are in use" msgstr "Lahat ng timers para sa pin na ito ay ginagamit" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -302,7 +311,7 @@ msgstr "Lahat ng timers para sa pin na ito ay ginagamit" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "Lahat ng timer ginagamit" @@ -341,7 +350,7 @@ msgstr "May halfwords (type 'H') dapat ang array" msgid "Array values should be single bytes." msgstr "Array values ay dapat single bytes." -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" msgstr "" @@ -422,6 +431,11 @@ msgstr "" msgid "Buffer length %d too big. It must be less than %d" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "" + #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" msgstr "Buffer dapat ay hindi baba sa 1 na haba" @@ -581,6 +595,14 @@ msgstr "" msgid "Corrupt raw code" msgstr "" +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" +msgstr "" + #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "Hindi ma-initialize ang UART" @@ -705,7 +727,8 @@ msgstr "Ginagamit na ang EXTINT channel" msgid "Error in regex" msgstr "May pagkakamali sa REGEX" -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" @@ -831,10 +854,6 @@ msgstr "I/O operasyon sa saradong file" msgid "I2C Init Error" msgstr "" -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "Hindi supportado ang operasyong I2C" - #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" @@ -873,6 +892,10 @@ msgstr "" msgid "Internal error #%d" msgstr "" +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Invalid %q pin" @@ -978,9 +1001,10 @@ msgstr "Mali ang pin para sa kanang channel" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -1380,6 +1404,10 @@ msgstr "Tumatakbo sa safe mode! Awtomatikong pag re-reload ay OFF.\n" msgid "Running in safe mode! Not running saved code.\n" msgstr "Tumatakbo sa safe mode! Hindi tumatakbo ang nai-save na code.\n" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1448,6 +1476,10 @@ msgstr "Stream kulang ng readinto() o write() method." msgid "Supply at least one UART pin" msgstr "" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "" @@ -1635,6 +1667,7 @@ msgid "" msgstr "" #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "Hindi supportadong baudrate" @@ -1753,11 +1786,11 @@ msgstr "abort() tinawag" msgid "address %08x is not aligned to %d bytes" msgstr "address %08x ay hindi pantay sa %d bytes" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "wala sa sakop ang address" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "walang laman ang address" @@ -1838,10 +1871,6 @@ msgstr "binary op %q hindi implemented" msgid "bits must be 7, 8 or 9" msgstr "bits ay dapat 7, 8 o 9" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "bits ay dapat walo (8)" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "bits_per_sample ay dapat 8 o 16" @@ -1868,10 +1897,6 @@ msgstr "aarehas na haba dapat ang buffer slices" msgid "buffer too small" msgstr "masyadong maliit ang buffer" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "ang buffers ay dapat parehas sa haba" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "" @@ -1948,7 +1973,7 @@ msgstr "hindi maaaring i-convert ang '%q' na bagay sa %q nang walang pahiwatig" msgid "can't convert NaN to int" msgstr "hindi ma i-convert NaN sa int" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "hindi ma i-convert ang address sa INT" @@ -2017,6 +2042,10 @@ msgstr "hindi mapadala ang send throw sa isang kaka umpisang generator" msgid "can't send non-None value to a just-started generator" msgstr "hindi mapadala ang non-None value sa isang kaka umpisang generator" +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "" + #: py/objnamedtuple.c msgid "can't set attribute" msgstr "hindi ma i-set ang attribute" @@ -2147,6 +2176,10 @@ msgstr "" msgid "could not invert Vandermonde matrix" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "" + #: extmod/ulab/code/approx.c msgid "data must be iterable" msgstr "" @@ -2312,10 +2345,6 @@ msgstr "" msgid "first argument to super() must be type" msgstr "unang argument ng super() ay dapat type" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "firstbit ay dapat MSB" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "" @@ -2501,14 +2530,6 @@ msgstr "" msgid "interval must be in range %s-%s" msgstr "" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "maling I2C peripheral" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "hindi wastong SPI peripheral" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "mali ang mga argumento" @@ -2689,10 +2710,6 @@ msgstr "maraming inhertance hindi sinusuportahan" msgid "must raise an object" msgstr "dapat itaas ang isang object" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "dapat tukuyin lahat ng SCK/MOSI/MISO" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "dapat gumamit ng keyword argument para sa key function" @@ -2730,6 +2747,10 @@ msgstr "negatibong power na walang float support" msgid "negative shift count" msgstr "negative shift count" +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "" + #: py/vm.c msgid "no active exception to reraise" msgstr "walang aktibong exception para i-reraise" @@ -2751,6 +2772,10 @@ msgstr "walang module na '%q'" msgid "no reset pin available" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "" + #: py/runtime.c msgid "no such attribute" msgstr "walang ganoon na attribute" @@ -3044,6 +3069,10 @@ msgstr "" msgid "sleep length must be non-negative" msgstr "sleep length ay dapat hindi negatibo" +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "" + #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" msgstr "slice step ay hindi puedeng 0" @@ -3060,6 +3089,18 @@ msgstr "malambot na reboot\n" msgid "sort argument must be an ndarray" msgstr "" +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "" + #: py/objstr.c msgid "start/end indices" msgstr "start/end indeks" @@ -3147,6 +3188,14 @@ msgstr "" msgid "timeout must be >= 0.0" msgstr "bits ay dapat walo (8)" +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "" + #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" msgstr "wala sa sakop ng timestamp ang platform time_t" @@ -3346,6 +3395,18 @@ msgstr "wala sa sakop ang address" msgid "zero step" msgstr "zero step" +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "" + #~ msgid "AP required" #~ msgstr "AP kailangan" @@ -3506,6 +3567,9 @@ msgstr "zero step" #~ msgid "GPIO16 does not support pull up." #~ msgstr "Walang pull down support ang GPI016." +#~ msgid "I2C operation not supported" +#~ msgstr "Hindi supportado ang operasyong I2C" + #~ msgid "Invalid bit clock pin" #~ msgstr "Mali ang bit clock pin" @@ -3647,9 +3711,15 @@ msgstr "zero step" #~ msgid "[addrinfo error %d]" #~ msgstr "[addrinfo error %d]" +#~ msgid "bits must be 8" +#~ msgstr "bits ay dapat walo (8)" + #~ msgid "buffer too long" #~ msgstr "masyadong mahaba ng buffer" +#~ msgid "buffers must be the same length" +#~ msgstr "ang buffers ay dapat parehas sa haba" + #~ msgid "can query only one param" #~ msgstr "maaaring i-query lamang ang isang param" @@ -3680,6 +3750,9 @@ msgstr "zero step" #~ msgid "ffi_prep_closure_loc" #~ msgstr "ffi_prep_closure_loc" +#~ msgid "firstbit must be MSB" +#~ msgstr "firstbit ay dapat MSB" + #~ msgid "flash location must be below 1MByte" #~ msgstr "dapat na mas mababa sa 1MB ang lokasyon ng flash" @@ -3689,6 +3762,12 @@ msgstr "zero step" #~ msgid "impossible baudrate" #~ msgstr "impossibleng baudrate" +#~ msgid "invalid I2C peripheral" +#~ msgstr "maling I2C peripheral" + +#~ msgid "invalid SPI peripheral" +#~ msgstr "hindi wastong SPI peripheral" + #~ msgid "invalid alarm" #~ msgstr "mali ang alarm" @@ -3711,6 +3790,9 @@ msgstr "zero step" #~ msgstr "" #~ "nabigo ang paglalaan ng memorya, naglalaan ng %u bytes para sa native code" +#~ msgid "must specify all of sck/mosi/miso" +#~ msgstr "dapat tukuyin lahat ng SCK/MOSI/MISO" + #, fuzzy #~ msgid "name must be a string" #~ msgstr "ang keywords dapat strings" diff --git a/locale/fr.po b/locale/fr.po index 587f09877..2db7f4722 100644 --- a/locale/fr.po +++ b/locale/fr.po @@ -8,11 +8,9 @@ msgid "" msgstr "" "Project-Id-Version: 0.1\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" +"POT-Creation-Date: 2020-07-02 15:29+0200\n" "PO-Revision-Date: 2020-06-05 17:29+0000\n" "Last-Translator: aberwag <aberwag@gmail.com>\n" -"Language-Team: French <https://later.unpythonic.net/projects/circuitpython/" -"circuitpython-master/fr/>\n" "Language: fr\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=utf-8\n" @@ -71,6 +69,10 @@ msgstr "" "Les broches d'adresse %d et les broches RVB %d indiquent une hauteur de %d, " "pas %d" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" +msgstr "" + #: shared-bindings/microcontroller/Pin.c msgid "%q in use" msgstr "%q utilisé" @@ -98,6 +100,10 @@ msgstr "%q doit être >=1" msgid "%q must be a tuple of length 2" msgstr "%q doit être un tuple de longueur 2" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "" + #: shared-bindings/fontio/BuiltinFont.c msgid "%q should be an int" msgstr "%q doit être un entier (int)" @@ -304,6 +310,7 @@ msgstr "Tous les canaux d'événements de synchro sont utilisés" msgid "All timers for this pin are in use" msgstr "Tous les timers pour cette broche sont utilisés" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -311,7 +318,7 @@ msgstr "Tous les timers pour cette broche sont utilisés" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "Tous les timers sont utilisés" @@ -351,7 +358,7 @@ msgstr "Le tableau doit contenir des demi-mots (type 'H')" msgid "Array values should be single bytes." msgstr "Les valeurs du tableau doivent être des octets simples 'bytes'." -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" msgstr "Au plus %d %q peut être spécifié (pas %d)" @@ -434,6 +441,11 @@ msgstr "Le tampon est trop petit" msgid "Buffer length %d too big. It must be less than %d" msgstr "La longueur du tampon %d est trop grande. Il doit être inférieur à %d" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "" + #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" msgstr "Le tampon doit être de longueur au moins 1" @@ -599,6 +611,14 @@ msgstr "Fichier .mpy corrompu" msgid "Corrupt raw code" msgstr "Code brut corrompu" +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" +msgstr "" + #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "L'UART n'a pu être initialisé" @@ -720,7 +740,8 @@ msgstr "Canal EXTINT déjà utilisé" msgid "Error in regex" msgstr "Erreur dans l'expression régulière" -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" @@ -846,10 +867,6 @@ msgstr "opération d'E/S sur un fichier fermé" msgid "I2C Init Error" msgstr "Erreur d'initialisation I2C" -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "opération sur I2C non supportée" - #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" @@ -888,6 +905,10 @@ msgstr "Erreur de définition interne" msgid "Internal error #%d" msgstr "Erreur interne #%d" +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Invalid %q pin" @@ -993,9 +1014,10 @@ msgstr "Broche invalide pour le canal droit" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -1401,6 +1423,10 @@ msgstr "Mode sans-échec ! Auto-chargement désactivé.\n" msgid "Running in safe mode! Not running saved code.\n" msgstr "Mode sans-échec ! Le code sauvegardé n'est pas éxecuté.\n" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1469,6 +1495,10 @@ msgstr "Il manque une méthode readinto() ou write() au flux." msgid "Supply at least one UART pin" msgstr "Fournissez au moins une broche UART" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "Temporisation de lecture dépassée" @@ -1671,6 +1701,7 @@ msgstr "" "appareil ait été refusée ou ignorée." #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "Débit non supporté" @@ -1790,11 +1821,11 @@ msgstr "abort() appelé" msgid "address %08x is not aligned to %d bytes" msgstr "l'adresse %08x n'est pas alignée sur %d octets" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "adresse hors limites" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "adresses vides" @@ -1875,10 +1906,6 @@ msgstr "opération binaire '%q' non implémentée" msgid "bits must be 7, 8 or 9" msgstr "bits doivent être 7, 8 ou 9" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "les bits doivent être 8" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "'bits_per_sample' doivent être 8 ou 16" @@ -1904,10 +1931,6 @@ msgstr "les tranches de tampon doivent être de longueurs égales" msgid "buffer too small" msgstr "tampon trop petit" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "les tampons doivent être de la même longueur" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "les boutons doivent être des digitalio.DigitalInOut" @@ -1984,7 +2007,7 @@ msgstr "impossible de convertir l'objet '%q' en '%q' implicitement" msgid "can't convert NaN to int" msgstr "on ne peut convertir NaN en entier 'int'" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "ne peut convertir l'adresse en entier 'int'" @@ -2056,6 +2079,10 @@ msgstr "" "on ne peut envoyer une valeur autre que 'None' à un générateur fraîchement " "démarré" +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "" + #: py/objnamedtuple.c msgid "can't set attribute" msgstr "attribut non modifiable" @@ -2189,6 +2216,10 @@ msgstr "n'a pas pu diffuser le tableau d'entrée à partir de la forme" msgid "could not invert Vandermonde matrix" msgstr "n'a pas pu inverser la matrice Vandermonde" +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "" + #: extmod/ulab/code/approx.c msgid "data must be iterable" msgstr "les données doivent être les objets iterables" @@ -2353,10 +2384,6 @@ msgstr "le premier argument doit être un ndarray" msgid "first argument to super() must be type" msgstr "le premier argument de super() doit être un type" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "le 1er bit doit être le MSB" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "l'ordre d'aplatissement doit être «C» ou «F»" @@ -2543,14 +2570,6 @@ msgstr "interp est défini pour les tableaux 1D de longueur égale" msgid "interval must be in range %s-%s" msgstr "l'intervalle doit être dans la plage %s-%s" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "périphérique I2C invalide" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "périphérique SPI invalide" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "arguments invalides" @@ -2731,10 +2750,6 @@ msgstr "héritages multiples non supportés" msgid "must raise an object" msgstr "doit lever un objet" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "sck, mosi et miso doivent tous être spécifiés" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "doit utiliser un argument nommé pour une fonction key" @@ -2772,6 +2787,10 @@ msgstr "puissance négative sans support des nombres à virgule flottante" msgid "negative shift count" msgstr "compte de décalage négatif" +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "" + #: py/vm.c msgid "no active exception to reraise" msgstr "aucune exception active à relever" @@ -2793,6 +2812,10 @@ msgstr "pas de module '%q'" msgid "no reset pin available" msgstr "pas de broche de réinitialisation disponible" +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "" + #: py/runtime.c msgid "no such attribute" msgstr "pas de tel attribut" @@ -3089,6 +3112,10 @@ msgstr "la taille est définie pour les ndarrays uniquement" msgid "sleep length must be non-negative" msgstr "la longueur de sleep ne doit pas être négative" +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "" + #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" msgstr "le pas 'step' de la tranche ne peut être zéro" @@ -3105,6 +3132,18 @@ msgstr "redémarrage logiciel\n" msgid "sort argument must be an ndarray" msgstr "l'argument de «sort» doit être un ndarray" +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "" + #: py/objstr.c msgid "start/end indices" msgstr "indices de début/fin" @@ -3191,6 +3230,14 @@ msgstr "le délai doit être compris entre 0.0 et 100.0 secondes" msgid "timeout must be >= 0.0" msgstr "'timeout' doit être >= 0.0" +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "" + #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" msgstr "'timestamp' hors bornes pour 'time_t' de la plateforme" @@ -3388,6 +3435,18 @@ msgstr "valeur y hors limites" msgid "zero step" msgstr "'step' nul" +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "" + #~ msgid "AP required" #~ msgstr "'AP' requis" @@ -3581,6 +3640,9 @@ msgstr "'step' nul" #~ msgid "GPIO16 does not support pull up." #~ msgstr "Le GPIO16 ne supporte pas le tirage (pull-up)" +#~ msgid "I2C operation not supported" +#~ msgstr "opération sur I2C non supportée" + #~ msgid "Invalid bit clock pin" #~ msgstr "Broche invalide pour 'bit clock'" @@ -3750,12 +3812,18 @@ msgstr "'step' nul" #~ msgid "bad GATT role" #~ msgstr "mauvais rôle GATT" +#~ msgid "bits must be 8" +#~ msgstr "les bits doivent être 8" + #~ msgid "buf is too small. need %d bytes" #~ msgstr "'buf' est trop petit. Besoin de %d octets" #~ msgid "buffer too long" #~ msgstr "tampon trop long" +#~ msgid "buffers must be the same length" +#~ msgstr "les tampons doivent être de la même longueur" + #~ msgid "byteorder is not an instance of ByteOrder (got a %s)" #~ msgstr "'byteorder' n'est pas une instance de ByteOrder (reçu un %s)" @@ -3794,6 +3862,9 @@ msgstr "'step' nul" #~ msgid "expecting a pin" #~ msgstr "une broche (Pin) est attendue" +#~ msgid "firstbit must be MSB" +#~ msgstr "le 1er bit doit être le MSB" + #~ msgid "flash location must be below 1MByte" #~ msgstr "l'emplacement en mémoire flash doit être inférieur à 1Mo" @@ -3806,6 +3877,12 @@ msgstr "'step' nul" #~ msgid "interval not in range 0.0020 to 10.24" #~ msgstr "intervalle hors bornes 0.0020 à 10.24" +#~ msgid "invalid I2C peripheral" +#~ msgstr "périphérique I2C invalide" + +#~ msgid "invalid SPI peripheral" +#~ msgstr "périphérique SPI invalide" + #~ msgid "invalid alarm" #~ msgstr "alarme invalide" @@ -3828,6 +3905,9 @@ msgstr "'step' nul" #~ msgstr "" #~ "l'allocation de mémoire a échoué en allouant %u octets pour un code natif" +#~ msgid "must specify all of sck/mosi/miso" +#~ msgstr "sck, mosi et miso doivent tous être spécifiés" + #, fuzzy #~ msgid "name must be a string" #~ msgstr "les noms doivent être des chaînes de caractère" diff --git a/locale/it_IT.po b/locale/it_IT.po index 01368e88a..bd49e2388 100644 --- a/locale/it_IT.po +++ b/locale/it_IT.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" +"POT-Creation-Date: 2020-07-02 15:29+0200\n" "PO-Revision-Date: 2018-10-02 16:27+0200\n" "Last-Translator: Enrico Paganin <enrico.paganin@mail.com>\n" "Language-Team: \n" @@ -58,6 +58,10 @@ msgstr "%%c necessita di int o char" msgid "%d address pins and %d rgb pins indicate a height of %d, not %d" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" +msgstr "" + #: shared-bindings/microcontroller/Pin.c msgid "%q in use" msgstr "%q in uso" @@ -86,6 +90,10 @@ msgstr "slice del buffer devono essere della stessa lunghezza" msgid "%q must be a tuple of length 2" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "" + #: shared-bindings/fontio/BuiltinFont.c #, fuzzy msgid "%q should be an int" @@ -294,6 +302,7 @@ msgstr "Tutti i canali di eventi sincronizzati in uso" msgid "All timers for this pin are in use" msgstr "Tutti i timer per questo pin sono in uso" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -301,7 +310,7 @@ msgstr "Tutti i timer per questo pin sono in uso" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "Tutti i timer utilizzati" @@ -340,7 +349,7 @@ msgstr "Array deve avere mezzoparole (typo 'H')" msgid "Array values should be single bytes." msgstr "Valori di Array dovrebbero essere bytes singulari" -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" msgstr "" @@ -422,6 +431,11 @@ msgstr "" msgid "Buffer length %d too big. It must be less than %d" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "" + #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" msgstr "Il buffer deve essere lungo almeno 1" @@ -582,6 +596,14 @@ msgstr "" msgid "Corrupt raw code" msgstr "" +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" +msgstr "" + #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "Impossibile inizializzare l'UART" @@ -705,7 +727,8 @@ msgstr "Canale EXTINT già in uso" msgid "Error in regex" msgstr "Errore nella regex" -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" @@ -831,10 +854,6 @@ msgstr "operazione I/O su file chiuso" msgid "I2C Init Error" msgstr "" -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "operazione I2C non supportata" - #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" @@ -873,6 +892,10 @@ msgstr "" msgid "Internal error #%d" msgstr "" +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Invalid %q pin" @@ -980,9 +1003,10 @@ msgstr "Pin non valido per il canale destro" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -1389,6 +1413,10 @@ msgstr "Modalità sicura in esecuzione! Auto-reload disattivato.\n" msgid "Running in safe mode! Not running saved code.\n" msgstr "Modalità sicura in esecuzione! Codice salvato non in esecuzione.\n" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1459,6 +1487,10 @@ msgstr "Metodi mancanti readinto() o write() allo stream." msgid "Supply at least one UART pin" msgstr "" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "" @@ -1646,6 +1678,7 @@ msgid "" msgstr "" #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "baudrate non supportato" @@ -1756,11 +1789,11 @@ msgstr "abort() chiamato" msgid "address %08x is not aligned to %d bytes" msgstr "l'indirizzo %08x non è allineato a %d bytes" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "indirizzo fuori limite" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "gli indirizzi sono vuoti" @@ -1841,10 +1874,6 @@ msgstr "operazione binaria %q non implementata" msgid "bits must be 7, 8 or 9" msgstr "i bit devono essere 7, 8 o 9" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "i bit devono essere 8" - #: shared-bindings/audiomixer/Mixer.c #, fuzzy msgid "bits_per_sample must be 8 or 16" @@ -1873,10 +1902,6 @@ msgstr "slice del buffer devono essere della stessa lunghezza" msgid "buffer too small" msgstr "buffer troppo piccolo" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "i buffer devono essere della stessa lunghezza" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "" @@ -1953,7 +1978,7 @@ msgstr "impossibile convertire l'oggetto '%q' implicitamente in %q" msgid "can't convert NaN to int" msgstr "impossibile convertire NaN in int" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "impossible convertire indirizzo in int" @@ -2021,6 +2046,10 @@ msgstr "" msgid "can't send non-None value to a just-started generator" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "" + #: py/objnamedtuple.c msgid "can't set attribute" msgstr "impossibile impostare attributo" @@ -2149,6 +2178,10 @@ msgstr "" msgid "could not invert Vandermonde matrix" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "" + #: extmod/ulab/code/approx.c msgid "data must be iterable" msgstr "" @@ -2313,10 +2346,6 @@ msgstr "" msgid "first argument to super() must be type" msgstr "" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "il primo bit deve essere il più significativo (MSB)" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "" @@ -2502,14 +2531,6 @@ msgstr "" msgid "interval must be in range %s-%s" msgstr "" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "periferica I2C invalida" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "periferica SPI invalida" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "argomenti non validi" @@ -2691,10 +2712,6 @@ msgstr "ereditarietà multipla non supportata" msgid "must raise an object" msgstr "deve lanciare un oggetto" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "è necessario specificare tutte le sck/mosi/miso" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "" @@ -2732,6 +2749,10 @@ msgstr "potenza negativa senza supporto per float" msgid "negative shift count" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "" + #: py/vm.c msgid "no active exception to reraise" msgstr "nessuna eccezione attiva da rilanciare" @@ -2754,6 +2775,10 @@ msgstr "nessun modulo chiamato '%q'" msgid "no reset pin available" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "" + #: py/runtime.c msgid "no such attribute" msgstr "attributo inesistente" @@ -3051,6 +3076,10 @@ msgstr "" msgid "sleep length must be non-negative" msgstr "la lunghezza di sleed deve essere non negativa" +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "" + #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" msgstr "la step della slice non può essere zero" @@ -3067,6 +3096,18 @@ msgstr "soft reboot\n" msgid "sort argument must be an ndarray" msgstr "" +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "" + #: py/objstr.c msgid "start/end indices" msgstr "" @@ -3154,6 +3195,14 @@ msgstr "" msgid "timeout must be >= 0.0" msgstr "i bit devono essere 8" +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "" + #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" msgstr "timestamp è fuori intervallo per il time_t della piattaforma" @@ -3353,6 +3402,18 @@ msgstr "indirizzo fuori limite" msgid "zero step" msgstr "zero step" +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "" + #~ msgid "AP required" #~ msgstr "AP richiesto" @@ -3529,6 +3590,9 @@ msgstr "zero step" #~ msgid "GPIO16 does not support pull up." #~ msgstr "GPIO16 non supporta pull-up" +#~ msgid "I2C operation not supported" +#~ msgstr "operazione I2C non supportata" + #~ msgid "Invalid bit clock pin" #~ msgstr "Pin del clock di bit non valido" @@ -3636,9 +3700,15 @@ msgstr "zero step" #~ msgid "[addrinfo error %d]" #~ msgstr "[errore addrinfo %d]" +#~ msgid "bits must be 8" +#~ msgstr "i bit devono essere 8" + #~ msgid "buffer too long" #~ msgstr "buffer troppo lungo" +#~ msgid "buffers must be the same length" +#~ msgstr "i buffer devono essere della stessa lunghezza" + #~ msgid "can query only one param" #~ msgstr "è possibile interrogare solo un parametro" @@ -3669,6 +3739,9 @@ msgstr "zero step" #~ msgid "ffi_prep_closure_loc" #~ msgstr "ffi_prep_closure_loc" +#~ msgid "firstbit must be MSB" +#~ msgstr "il primo bit deve essere il più significativo (MSB)" + #~ msgid "flash location must be below 1MByte" #~ msgstr "Locazione della flash deve essere inferiore a 1mb" @@ -3678,6 +3751,12 @@ msgstr "zero step" #~ msgid "impossible baudrate" #~ msgstr "baudrate impossibile" +#~ msgid "invalid I2C peripheral" +#~ msgstr "periferica I2C invalida" + +#~ msgid "invalid SPI peripheral" +#~ msgstr "periferica SPI invalida" + #~ msgid "invalid alarm" #~ msgstr "alarm non valido" @@ -3700,6 +3779,9 @@ msgstr "zero step" #~ msgstr "" #~ "allocazione di memoria fallita, allocazione di %d byte per codice nativo" +#~ msgid "must specify all of sck/mosi/miso" +#~ msgstr "è necessario specificare tutte le sck/mosi/miso" + #, fuzzy #~ msgid "name must be a string" #~ msgstr "argomenti nominati devono essere stringhe" diff --git a/locale/ko.po b/locale/ko.po index 27f8216f8..4bd56cde1 100644 --- a/locale/ko.po +++ b/locale/ko.po @@ -8,7 +8,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" +"POT-Creation-Date: 2020-07-02 15:29+0200\n" "PO-Revision-Date: 2019-05-06 14:22-0700\n" "Last-Translator: \n" "Language-Team: LANGUAGE <LL@li.org>\n" @@ -60,6 +60,10 @@ msgstr "%%c 전수(int)또는 캐릭터(char)필요합니다" msgid "%d address pins and %d rgb pins indicate a height of %d, not %d" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" +msgstr "" + #: shared-bindings/microcontroller/Pin.c msgid "%q in use" msgstr "%q 사용 중입니다" @@ -87,6 +91,10 @@ msgstr "%q 는 >=1이어야합니다" msgid "%q must be a tuple of length 2" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "" + #: shared-bindings/fontio/BuiltinFont.c msgid "%q should be an int" msgstr "%q 는 정수(int) 여야합니다" @@ -293,6 +301,7 @@ msgstr "" msgid "All timers for this pin are in use" msgstr "핀의 모든 타이머가 사용 중입니다" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -300,7 +309,7 @@ msgstr "핀의 모든 타이머가 사용 중입니다" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "모든 타이머가 사용 중입니다" @@ -339,7 +348,7 @@ msgstr "" msgid "Array values should be single bytes." msgstr "" -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" msgstr "" @@ -420,6 +429,11 @@ msgstr "" msgid "Buffer length %d too big. It must be less than %d" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "" + #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" msgstr "잘못된 크기의 버퍼. >1 여야합니다" @@ -576,6 +590,14 @@ msgstr "" msgid "Corrupt raw code" msgstr "" +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" +msgstr "" + #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "" @@ -697,7 +719,8 @@ msgstr "" msgid "Error in regex" msgstr "Regex에 오류가 있습니다." -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" @@ -821,10 +844,6 @@ msgstr "" msgid "I2C Init Error" msgstr "" -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "" - #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" @@ -861,6 +880,10 @@ msgstr "" msgid "Internal error #%d" msgstr "" +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Invalid %q pin" @@ -966,9 +989,10 @@ msgstr "오른쪽 채널 핀이 잘못되었습니다" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -1361,6 +1385,10 @@ msgstr "" msgid "Running in safe mode! Not running saved code.\n" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1429,6 +1457,10 @@ msgstr "" msgid "Supply at least one UART pin" msgstr "" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "" @@ -1616,6 +1648,7 @@ msgid "" msgstr "" #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "" @@ -1725,11 +1758,11 @@ msgstr "" msgid "address %08x is not aligned to %d bytes" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "" @@ -1810,10 +1843,6 @@ msgstr "" msgid "bits must be 7, 8 or 9" msgstr "비트(bits)는 7, 8 또는 9 여야합니다" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "비트(bits)는 8이어야합니다" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "bits_per_sample은 8 또는 16이어야합니다." @@ -1839,10 +1868,6 @@ msgstr "" msgid "buffer too small" msgstr "" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "" @@ -1918,7 +1943,7 @@ msgstr "" msgid "can't convert NaN to int" msgstr "" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "" @@ -1986,6 +2011,10 @@ msgstr "" msgid "can't send non-None value to a just-started generator" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "" + #: py/objnamedtuple.c msgid "can't set attribute" msgstr "" @@ -2112,6 +2141,10 @@ msgstr "" msgid "could not invert Vandermonde matrix" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "" + #: extmod/ulab/code/approx.c msgid "data must be iterable" msgstr "" @@ -2272,10 +2305,6 @@ msgstr "" msgid "first argument to super() must be type" msgstr "" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "" @@ -2460,14 +2489,6 @@ msgstr "" msgid "interval must be in range %s-%s" msgstr "" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "ICT주변 기기가 유효하지 않습니다" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "SPI주변 기기가 유효하지 않습니다" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "" @@ -2644,10 +2665,6 @@ msgstr "" msgid "must raise an object" msgstr "" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "" @@ -2685,6 +2702,10 @@ msgstr "" msgid "negative shift count" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "" + #: py/vm.c msgid "no active exception to reraise" msgstr "" @@ -2706,6 +2727,10 @@ msgstr "" msgid "no reset pin available" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "" + #: py/runtime.c msgid "no such attribute" msgstr "" @@ -2995,6 +3020,10 @@ msgstr "" msgid "sleep length must be non-negative" msgstr "" +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "" + #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" msgstr "" @@ -3011,6 +3040,18 @@ msgstr "" msgid "sort argument must be an ndarray" msgstr "" +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "" + #: py/objstr.c msgid "start/end indices" msgstr "" @@ -3096,6 +3137,14 @@ msgstr "" msgid "timeout must be >= 0.0" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "" + #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" msgstr "" @@ -3293,6 +3342,18 @@ msgstr "" msgid "zero step" msgstr "" +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "" + #~ msgid "Can't add services in Central mode" #~ msgstr "센트랄(중앙) 모드에서는 서비스를 추가 할 수 없습니다" @@ -3319,3 +3380,12 @@ msgstr "" #~ msgid "Failed to continue scanning, err 0x%04x" #~ msgstr "스캔을 계속할 수 없습니다, 오류 0x%04x" + +#~ msgid "bits must be 8" +#~ msgstr "비트(bits)는 8이어야합니다" + +#~ msgid "invalid I2C peripheral" +#~ msgstr "ICT주변 기기가 유효하지 않습니다" + +#~ msgid "invalid SPI peripheral" +#~ msgstr "SPI주변 기기가 유효하지 않습니다" diff --git a/locale/nl.po b/locale/nl.po index 5be371d83..34e9c835a 100644 --- a/locale/nl.po +++ b/locale/nl.po @@ -7,8 +7,8 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" -"PO-Revision-Date: 2020-06-02 19:50+0000\n" +"POT-Creation-Date: 2020-07-02 15:29+0200\n" +"PO-Revision-Date: 2020-07-02 20:42+0000\n" "Last-Translator: _fonzlate <vooralfred@gmail.com>\n" "Language-Team: none\n" "Language: nl\n" @@ -16,7 +16,7 @@ msgstr "" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" "Plural-Forms: nplurals=2; plural=n != 1;\n" -"X-Generator: Weblate 4.1-dev\n" +"X-Generator: Weblate 4.2-dev\n" #: main.c msgid "" @@ -66,6 +66,10 @@ msgstr "%%c vereist een int of char" msgid "%d address pins and %d rgb pins indicate a height of %d, not %d" msgstr "%d adres pins en %d RGB pins geven een hoogte van %d aan, niet %d" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" +msgstr "%q fout: %d" + #: shared-bindings/microcontroller/Pin.c msgid "%q in use" msgstr "%q in gebruik" @@ -93,6 +97,10 @@ msgstr "%q moet >= 1 zijn" msgid "%q must be a tuple of length 2" msgstr "%q moet een tuple van lengte 2 zijn" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "%q pin onjuist" + #: shared-bindings/fontio/BuiltinFont.c msgid "%q should be an int" msgstr "%q moet een int zijn" @@ -299,6 +307,7 @@ msgstr "Alle sync event kanalen zijn in gebruik" msgid "All timers for this pin are in use" msgstr "Alle timers voor deze pin zijn in gebruik" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -306,7 +315,7 @@ msgstr "Alle timers voor deze pin zijn in gebruik" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "Alle timers zijn in gebruik" @@ -345,7 +354,7 @@ msgstr "Array moet halfwords (type 'H') bevatten" msgid "Array values should be single bytes." msgstr "Array waardes moet enkele bytes zijn." -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" msgstr "Op zijn meest %d %q mogen worden gespecificeerd (niet %d)" @@ -426,6 +435,11 @@ msgstr "Buffer is te klein" msgid "Buffer length %d too big. It must be less than %d" msgstr "Buffer lengte %d te groot. Het moet kleiner zijn dan %d" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "Buffer lengte moet een veelvoud van 512 zijn" + #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" msgstr "Buffer moet op zijn minst lengte 1 zijn" @@ -588,6 +602,14 @@ msgstr "Corrupt .mpy bestand" msgid "Corrupt raw code" msgstr "Corrupt raw code" +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "Kan GNSS niet initialiseren" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" +msgstr "Kan SDCard niet initialiseren" + #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "Kan UART niet initialiseren" @@ -709,7 +731,8 @@ msgstr "EXTINT kanaal al in gebruik" msgid "Error in regex" msgstr "Fout in regex" -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" @@ -835,10 +858,6 @@ msgstr "I/O actie op gesloten bestand" msgid "I2C Init Error" msgstr "I2C Init Fout" -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "I2C actie niet ondersteund" - #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" @@ -877,6 +896,10 @@ msgstr "Interne define fout" msgid "Internal error #%d" msgstr "Interne fout #%d" +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" +msgstr "Ongeldige %q" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Invalid %q pin" @@ -982,9 +1005,10 @@ msgstr "Ongeldige pin voor rechter kanaal" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -1391,6 +1415,10 @@ msgstr "Draaiende in veilige modus! Auto-herlaad is uit.\n" msgid "Running in safe mode! Not running saved code.\n" msgstr "Draaiende in veilige modus! Opgeslagen code wordt niet uitgevoerd.\n" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "SD kaart CSD formaat niet ondersteund" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1459,6 +1487,10 @@ msgstr "Stream mist readinto() of write() methode." msgid "Supply at least one UART pin" msgstr "Geef op zijn minst 1 UART pin op" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "Systeem invoer moet gnss.SatelliteSystem zijn" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "Temperatuur lees time-out" @@ -1655,6 +1687,7 @@ msgstr "" "apparaat geweigerd of genegeerd werd." #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "Niet-ondersteunde baudsnelheid" @@ -1773,11 +1806,11 @@ msgstr "abort() aangeroepen" msgid "address %08x is not aligned to %d bytes" msgstr "adres %08x is niet afgestemd op %d bytes" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "adres buiten bereik" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "adressen zijn leeg" @@ -1858,10 +1891,6 @@ msgstr "binaire op %q niet geïmplementeerd" msgid "bits must be 7, 8 or 9" msgstr "bits moet 7, 8, of 9 zijn" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "bits moet 8 zijn" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "bits_per_sample moet 8 of 16 zijn" @@ -1887,10 +1916,6 @@ msgstr "buffer slices moeten van gelijke grootte zijn" msgid "buffer too small" msgstr "buffer te klein" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "buffers moeten dezelfde lengte hebben" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "buttons moeten digitalio.DigitalInOut zijn" @@ -1967,7 +1992,7 @@ msgstr "kan '%q' object niet omzetten naar %q impliciet" msgid "can't convert NaN to int" msgstr "kan NaN niet omzetten naar int" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "kan adres niet omzetten naar int" @@ -2035,6 +2060,10 @@ msgstr "kan throw niet aan net gestartte generator toevoegen" msgid "can't send non-None value to a just-started generator" msgstr "kan geen niet-'None' waarde naar een net gestartte generator sturen" +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "kan geen 512 blokgrootte instellen" + #: py/objnamedtuple.c msgid "can't set attribute" msgstr "kan attribute niet instellen" @@ -2162,6 +2191,10 @@ msgstr "kon de invoerarray niet vanuit vorm uitzenden" msgid "could not invert Vandermonde matrix" msgstr "kon de Vandermonde matrix niet omkeren" +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "kon SD kaart versie niet bepalen" + #: extmod/ulab/code/approx.c msgid "data must be iterable" msgstr "data moet itereerbaar zijn" @@ -2324,10 +2357,6 @@ msgstr "eerst argument moet een ndarray zijn" msgid "first argument to super() must be type" msgstr "eerste argument voor super() moet een type zijn" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "het eerste bit moet het MSB zijn" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "De afvlakkingsvolgorde moet ofwel \"C\", ofwel \"F\" zijn" @@ -2513,14 +2542,6 @@ msgstr "interp is gedefinieerd for eendimensionale arrays van gelijke lengte" msgid "interval must be in range %s-%s" msgstr "interval moet binnen bereik %s-%s vallen" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "onjuist I2C randapparaat" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "onjuist SPI randapparaat" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "ongeldige argumenten" @@ -2700,10 +2721,6 @@ msgstr "meervoudige overerving niet ondersteund" msgid "must raise an object" msgstr "moet een object oproepen (raise)" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "sck/mosi/miso moeten alle gespecificeerd worden" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "voor sleutelfunctie moet een trefwoordargument gebruikt worden" @@ -2741,6 +2758,10 @@ msgstr "negatieve macht terwijl er geen ondersteuning is voor float" msgid "negative shift count" msgstr "negatieve verschuivingstelling (shift count)" +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "geen SD kaart" + #: py/vm.c msgid "no active exception to reraise" msgstr "geen actieve uitzondering om opnieuw op te werpen (raise)" @@ -2762,6 +2783,10 @@ msgstr "geen module met naam '%q'" msgid "no reset pin available" msgstr "geen reset pin beschikbaar" +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "geen antwoord van SD kaart" + #: py/runtime.c msgid "no such attribute" msgstr "niet zo'n attribuut" @@ -3054,6 +3079,10 @@ msgstr "omvang is alleen voor ndarrays gedefinieerd" msgid "sleep length must be non-negative" msgstr "de slaapduur mag niet negatief zijn" +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "segmentstap mag niet nul zijn" + #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" msgstr "segmentstap mag niet nul zijn" @@ -3070,6 +3099,18 @@ msgstr "zachte herstart\n" msgid "sort argument must be an ndarray" msgstr "sorteerargument moet een ndarray zijn" +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "sos array moet vorm (n_section, 6) hebben" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "sos[:, 3] moeten allemaal 1 zijn" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "sosfilt vereist itereerbare argumenten" + #: py/objstr.c msgid "start/end indices" msgstr "start/stop indices" @@ -3155,6 +3196,14 @@ msgstr "timeout moet tussen 0.0 en 100.0 seconden zijn" msgid "timeout must be >= 0.0" msgstr "timeout moet groter dan 0.0 zijn" +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "timeout bij wachten op v1 kaart" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "timeout bij wachten op v2 kaart" + #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" msgstr "timestamp buiten bereik voor platform time_t" @@ -3352,5 +3401,38 @@ msgstr "y-waarde buiten bereik" msgid "zero step" msgstr "nul-stap" +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "zi moet een ndarray zijn" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "zi moet van type float zijn" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "zi moet vorm (n_section, 2) hebben" + +#~ msgid "I2C operation not supported" +#~ msgstr "I2C actie niet ondersteund" + #~ msgid "Negative step not supported" #~ msgstr "Negatieve stappen niet ondersteund" + +#~ msgid "bits must be 8" +#~ msgstr "bits moet 8 zijn" + +#~ msgid "buffers must be the same length" +#~ msgstr "buffers moeten dezelfde lengte hebben" + +#~ msgid "firstbit must be MSB" +#~ msgstr "het eerste bit moet het MSB zijn" + +#~ msgid "invalid I2C peripheral" +#~ msgstr "onjuist I2C randapparaat" + +#~ msgid "invalid SPI peripheral" +#~ msgstr "onjuist SPI randapparaat" + +#~ msgid "must specify all of sck/mosi/miso" +#~ msgstr "sck/mosi/miso moeten alle gespecificeerd worden" diff --git a/locale/pl.po b/locale/pl.po index 0e82359f9..772448131 100644 --- a/locale/pl.po +++ b/locale/pl.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: \n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" +"POT-Creation-Date: 2020-07-02 15:29+0200\n" "PO-Revision-Date: 2019-03-19 18:37-0700\n" "Last-Translator: Radomir Dopieralski <circuitpython@sheep.art.pl>\n" "Language-Team: pl\n" @@ -59,6 +59,10 @@ msgstr "%%c wymaga int lub char" msgid "%d address pins and %d rgb pins indicate a height of %d, not %d" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" +msgstr "" + #: shared-bindings/microcontroller/Pin.c msgid "%q in use" msgstr "%q w użyciu" @@ -86,6 +90,10 @@ msgstr "%q musi być >= 1" msgid "%q must be a tuple of length 2" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "" + #: shared-bindings/fontio/BuiltinFont.c msgid "%q should be an int" msgstr "%q powinno być typu int" @@ -292,6 +300,7 @@ msgstr "Wszystkie kanały zdarzeń synchronizacji w użyciu" msgid "All timers for this pin are in use" msgstr "Wszystkie timery tej nóżki w użyciu" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -299,7 +308,7 @@ msgstr "Wszystkie timery tej nóżki w użyciu" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "Wszystkie timery w użyciu" @@ -338,7 +347,7 @@ msgstr "Tablica musi zawierać pół-słowa (typ 'H')" msgid "Array values should be single bytes." msgstr "Wartości powinny być bajtami." -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" msgstr "" @@ -419,6 +428,11 @@ msgstr "" msgid "Buffer length %d too big. It must be less than %d" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "" + #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" msgstr "Bufor musi mieć długość 1 lub więcej" @@ -575,6 +589,14 @@ msgstr "" msgid "Corrupt raw code" msgstr "" +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" +msgstr "" + #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "Ustawienie UART nie powiodło się" @@ -696,7 +718,8 @@ msgstr "Kanał EXTINT w użyciu" msgid "Error in regex" msgstr "Błąd w regex" -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" @@ -820,10 +843,6 @@ msgstr "Operacja I/O na zamkniętym pliku" msgid "I2C Init Error" msgstr "" -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "Operacja I2C nieobsługiwana" - #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" @@ -862,6 +881,10 @@ msgstr "" msgid "Internal error #%d" msgstr "" +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Invalid %q pin" @@ -967,9 +990,10 @@ msgstr "Zła nóżka dla prawego kanału" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -1362,6 +1386,10 @@ msgstr "Uruchomiony tryb bezpieczeństwa! Samo-przeładowanie wyłączone.\n" msgid "Running in safe mode! Not running saved code.\n" msgstr "Uruchomiony tryb bezpieczeństwa! Zapisany kod nie jest uruchamiany.\n" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1430,6 +1458,10 @@ msgstr "Strumień nie ma metod readinto() lub write()." msgid "Supply at least one UART pin" msgstr "" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "" @@ -1616,6 +1648,7 @@ msgid "" msgstr "" #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "Zła szybkość transmisji" @@ -1728,11 +1761,11 @@ msgstr "Wywołano abort()" msgid "address %08x is not aligned to %d bytes" msgstr "adres %08x nie jest wyrównany do %d bajtów" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "adres poza zakresem" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "adres jest pusty" @@ -1813,10 +1846,6 @@ msgstr "brak dwu-argumentowego operatora %q" msgid "bits must be 7, 8 or 9" msgstr "bits musi być 7, 8 lub 9" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "bits musi być 8" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "bits_per_sample musi być 8 lub 16" @@ -1842,10 +1871,6 @@ msgstr "fragmenty bufora muszą mieć tę samą długość" msgid "buffer too small" msgstr "zbyt mały bufor" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "bufory muszą mieć tę samą długość" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "buttons musi być digitalio.DigitalInOut" @@ -1921,7 +1946,7 @@ msgstr "nie można automatycznie skonwertować '%q' do '%q'" msgid "can't convert NaN to int" msgstr "nie można skonwertować NaN do int" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "nie można skonwertować adresu do int" @@ -1989,6 +2014,10 @@ msgstr "nie można skoczyć do świeżo stworzonego generatora" msgid "can't send non-None value to a just-started generator" msgstr "świeżo stworzony generator może tylko przyjąć None" +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "" + #: py/objnamedtuple.c msgid "can't set attribute" msgstr "nie można ustawić atrybutu" @@ -2115,6 +2144,10 @@ msgstr "" msgid "could not invert Vandermonde matrix" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "" + #: extmod/ulab/code/approx.c msgid "data must be iterable" msgstr "" @@ -2276,10 +2309,6 @@ msgstr "" msgid "first argument to super() must be type" msgstr "pierwszy argument super() musi być typem" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "firstbit musi być MSB" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "" @@ -2464,14 +2493,6 @@ msgstr "" msgid "interval must be in range %s-%s" msgstr "" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "złe I2C" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "złe SPI" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "złe arguemnty" @@ -2648,10 +2669,6 @@ msgstr "wielokrotne dziedzicznie niewspierane" msgid "must raise an object" msgstr "wyjątek musi być obiektem" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "sck/mosi/miso muszą być podane" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "funkcja key musi być podana jako argument nazwany" @@ -2689,6 +2706,10 @@ msgstr "ujemna potęga, ale brak obsługi liczb zmiennoprzecinkowych" msgid "negative shift count" msgstr "ujemne przesunięcie" +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "" + #: py/vm.c msgid "no active exception to reraise" msgstr "brak wyjątku do ponownego rzucenia" @@ -2710,6 +2731,10 @@ msgstr "brak modułu o nazwie '%q'" msgid "no reset pin available" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "" + #: py/runtime.c msgid "no such attribute" msgstr "nie ma takiego atrybutu" @@ -3001,6 +3026,10 @@ msgstr "" msgid "sleep length must be non-negative" msgstr "okres snu musi być nieujemny" +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "" + #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" msgstr "zerowy krok" @@ -3017,6 +3046,18 @@ msgstr "programowy reset\n" msgid "sort argument must be an ndarray" msgstr "" +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "" + #: py/objstr.c msgid "start/end indices" msgstr "początkowe/końcowe indeksy" @@ -3102,6 +3143,14 @@ msgstr "" msgid "timeout must be >= 0.0" msgstr "timeout musi być >= 0.0" +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "" + #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" msgstr "timestamp poza zakresem dla time_t na tej platformie" @@ -3299,6 +3348,18 @@ msgstr "y poza zakresem" msgid "zero step" msgstr "zerowy krok" +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "" + #~ msgid "Address is not %d bytes long or is in wrong format" #~ msgstr "Adres nie ma długości %d bajtów lub zły format" @@ -3426,6 +3487,9 @@ msgstr "zerowy krok" #~ msgid "Flash write failed to start, err 0x%04x" #~ msgstr "Nie udało się rozpocząć zapisu do flash, błąd 0x%04x" +#~ msgid "I2C operation not supported" +#~ msgstr "Operacja I2C nieobsługiwana" + #~ msgid "Invalid bit clock pin" #~ msgstr "Zła nóżka zegara" @@ -3523,9 +3587,15 @@ msgstr "zerowy krok" #~ msgid "bad GATT role" #~ msgstr "zła rola GATT" +#~ msgid "bits must be 8" +#~ msgstr "bits musi być 8" + #~ msgid "buf is too small. need %d bytes" #~ msgstr "buf zbyt mały. Wymagane %d bajtów" +#~ msgid "buffers must be the same length" +#~ msgstr "bufory muszą mieć tę samą długość" + #~ msgid "byteorder is not an instance of ByteOrder (got a %s)" #~ msgstr "byteorder musi być typu ByteOrder (jest %s)" @@ -3536,9 +3606,21 @@ msgstr "zerowy krok" #~ msgid "color buffer must be a buffer or int" #~ msgstr "bufor kolorów musi być typu buffer lub int" +#~ msgid "firstbit must be MSB" +#~ msgstr "firstbit musi być MSB" + #~ msgid "interval not in range 0.0020 to 10.24" #~ msgstr "przedział poza zakresem 0.0020 do 10.24" +#~ msgid "invalid I2C peripheral" +#~ msgstr "złe I2C" + +#~ msgid "invalid SPI peripheral" +#~ msgstr "złe SPI" + +#~ msgid "must specify all of sck/mosi/miso" +#~ msgstr "sck/mosi/miso muszą być podane" + #~ msgid "name must be a string" #~ msgstr "nazwa musi być łańcuchem" diff --git a/locale/pt_BR.po b/locale/pt_BR.po index 308809a2b..f25d2d86e 100644 --- a/locale/pt_BR.po +++ b/locale/pt_BR.po @@ -3,25 +3,28 @@ # This file is distributed under the same license as the PACKAGE package. # FIRST AUTHOR <EMAIL@ADDRESS>, YEAR. # -#, fuzzy msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" -"PO-Revision-Date: 2018-10-02 21:14-0000\n" -"Last-Translator: \n" +"POT-Creation-Date: 2020-07-02 15:29+0200\n" +"PO-Revision-Date: 2020-07-03 22:53+0000\n" +"Last-Translator: Wellington Terumi Uemura <wellingtonuemura@gmail.com>\n" "Language-Team: \n" "Language: pt_BR\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=UTF-8\n" "Content-Transfer-Encoding: 8bit\n" +"Plural-Forms: nplurals=2; plural=n > 1;\n" +"X-Generator: Weblate 4.2-dev\n" #: main.c msgid "" "\n" "Code done running. Waiting for reload.\n" msgstr "" +"\n" +"O código concluiu a execução. Esperando pela recarga.\n" #: supervisor/shared/safe_mode.c msgid "" @@ -29,12 +32,17 @@ msgid "" "Please file an issue with the contents of your CIRCUITPY drive at \n" "https://github.com/adafruit/circuitpython/issues\n" msgstr "" +"\n" +"Registre um problema com o conteúdo do seu controlador no CIRCUITPY\n" +"https://github.com/adafruit/circuitpython/issues\n" #: supervisor/shared/safe_mode.c msgid "" "\n" "To exit, please reset the board without " msgstr "" +"\n" +"Para encerrar, redefina a placa sem " #: py/obj.c msgid " File \"%q\"" @@ -56,7 +64,11 @@ msgstr "%%c requer int ou char" #: shared-bindings/rgbmatrix/RGBMatrix.c #, c-format msgid "%d address pins and %d rgb pins indicate a height of %d, not %d" -msgstr "" +msgstr "%d endereços dos pinos e %d pinos rgb indicam uma altura do %d, não %d" + +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" +msgstr "%q falha: %d" #: shared-bindings/microcontroller/Pin.c msgid "%q in use" @@ -64,36 +76,38 @@ msgstr "%q em uso" #: py/obj.c msgid "%q index out of range" -msgstr "" +msgstr "O índice %q está fora do intervalo" #: py/obj.c msgid "%q indices must be integers, not %s" -msgstr "" +msgstr "Os índices %q devem ser inteiros, e não %s" #: shared-bindings/vectorio/Polygon.c msgid "%q list must be a list" -msgstr "" +msgstr "A lista %q deve ser uma lista" #: shared-bindings/_bleio/CharacteristicBuffer.c #: shared-bindings/_bleio/PacketBuffer.c shared-bindings/displayio/Group.c #: shared-bindings/displayio/Shape.c shared-bindings/vectorio/Circle.c #: shared-bindings/vectorio/Rectangle.c -#, fuzzy msgid "%q must be >= 1" -msgstr "buffers devem ser o mesmo tamanho" +msgstr "%q deve ser >= 1" #: shared-module/vectorio/Polygon.c msgid "%q must be a tuple of length 2" -msgstr "" +msgstr "%q deve ser uma tupla de comprimento 2" + +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "%q pino inválido" #: shared-bindings/fontio/BuiltinFont.c -#, fuzzy msgid "%q should be an int" -msgstr "y deve ser um int" +msgstr "%q deve ser um int" #: py/bc.c py/objnamedtuple.c msgid "%q() takes %d positional arguments but %d were given" -msgstr "" +msgstr "%q() recebe %d argumentos posicionais, porém %d foram informados" #: py/argcheck.c msgid "'%q' argument required" @@ -102,98 +116,100 @@ msgstr "'%q' argumento(s) requerido(s)" #: py/emitinlinethumb.c py/emitinlinextensa.c #, c-format msgid "'%s' expects a label" -msgstr "" +msgstr "'%s' exige um rótulo" #: py/emitinlinethumb.c py/emitinlinextensa.c #, c-format msgid "'%s' expects a register" -msgstr "" +msgstr "'%s' exige um registro" #: py/emitinlinethumb.c #, c-format msgid "'%s' expects a special register" -msgstr "" +msgstr "'%s' exige um registro especial" #: py/emitinlinethumb.c #, c-format msgid "'%s' expects an FPU register" -msgstr "" +msgstr "'%s' exige um registro FPU" #: py/emitinlinethumb.c #, c-format msgid "'%s' expects an address of the form [a, b]" -msgstr "" +msgstr "'%s' exige um endereço no formato [a, b]" #: py/emitinlinethumb.c py/emitinlinextensa.c #, c-format msgid "'%s' expects an integer" -msgstr "" +msgstr "'%s' exige um número inteiro" #: py/emitinlinethumb.c #, c-format msgid "'%s' expects at most r%d" -msgstr "" +msgstr "'%s' exige no máximo r%d" #: py/emitinlinethumb.c #, c-format msgid "'%s' expects {r0, r1, ...}" -msgstr "" +msgstr "'%s' exige {r0, r1, ...}" #: py/emitinlinextensa.c #, c-format msgid "'%s' integer %d is not within range %d..%d" -msgstr "" +msgstr "O número inteiro '%s' %d não está dentro do intervalo %d..%d" #: py/emitinlinethumb.c #, c-format msgid "'%s' integer 0x%x does not fit in mask 0x%x" -msgstr "" +msgstr "O número inteiro '%s' 0x%x não cabe na máscara 0x%x" #: py/runtime.c msgid "'%s' object cannot assign attribute '%q'" -msgstr "" +msgstr "O objeto '%s' não pode definir o atributo '%q'" #: py/proto.c msgid "'%s' object does not support '%q'" -msgstr "" +msgstr "O objeto '%s' não é compatível com '%q'" #: py/obj.c #, c-format msgid "'%s' object does not support item assignment" -msgstr "" +msgstr "O objeto '%s' não compatível com a atribuição dos itens" #: py/obj.c #, c-format msgid "'%s' object does not support item deletion" -msgstr "" +msgstr "O objeto '%s' não é compatível com exclusão do item" #: py/runtime.c msgid "'%s' object has no attribute '%q'" -msgstr "" +msgstr "O objeto '%s' não possui o atributo '%q'" #: py/runtime.c #, c-format msgid "'%s' object is not an iterator" -msgstr "" +msgstr "O objeto '%s' não é um iterador" #: py/objtype.c py/runtime.c #, c-format msgid "'%s' object is not callable" -msgstr "" +msgstr "O objeto '%s' não é invocável" #: py/runtime.c #, c-format msgid "'%s' object is not iterable" -msgstr "" +msgstr "O objeto '%s' não é iterável" #: py/obj.c #, c-format msgid "'%s' object is not subscriptable" -msgstr "" +msgstr "O objeto '%s' não é subroteirizável" #: py/objstr.c msgid "'=' alignment not allowed in string format specifier" msgstr "" +"'=' alinhamento não permitido no especificador do formato da cadeia de " +"caracteres" #: shared-module/struct/__init__.c msgid "'S' and 'O' are not supported format types" @@ -201,59 +217,59 @@ msgstr "'S' e 'O' não são tipos de formato suportados" #: py/compile.c msgid "'align' requires 1 argument" -msgstr "" +msgstr "O 'align' exige 1 argumento" #: py/compile.c msgid "'async for' or 'async with' outside async function" -msgstr "" +msgstr "'assíncrono para' ou 'assíncrono com' função assíncrona externa" #: py/compile.c msgid "'await' outside function" -msgstr "" +msgstr "'aguardar' fora da função" #: py/compile.c msgid "'break' outside loop" -msgstr "" +msgstr "'break' fora do loop" #: py/compile.c msgid "'continue' outside loop" -msgstr "" +msgstr "'continue' fora do loop" #: py/compile.c msgid "'data' requires at least 2 arguments" -msgstr "" +msgstr "'data' exige pelo menos 2 argumentos" #: py/compile.c msgid "'data' requires integer arguments" -msgstr "" +msgstr "'data' exige argumentos inteiros" #: py/compile.c msgid "'label' requires 1 argument" -msgstr "" +msgstr "'label' exige 1 argumento" #: py/compile.c msgid "'return' outside function" -msgstr "" +msgstr "função externa 'return'" #: py/compile.c msgid "'yield' outside function" -msgstr "" +msgstr "função externa 'yield'" #: py/compile.c msgid "*x must be assignment target" -msgstr "" +msgstr "*x deve ser o destino da atribuição" #: py/obj.c msgid ", in %q\n" -msgstr "" +msgstr ", em %q\n" #: py/objcomplex.c msgid "0.0 to a complex power" -msgstr "" +msgstr "0,0 para uma potência complexa" #: py/modbuiltins.c msgid "3-arg pow() not supported" -msgstr "" +msgstr "3-arg pow() não compatível" #: ports/atmel-samd/common-hal/countio/Counter.c #: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c @@ -261,13 +277,13 @@ msgid "A hardware interrupt channel is already in use" msgstr "Um canal de interrupção de hardware já está em uso" #: shared-bindings/_bleio/Address.c -#, fuzzy, c-format +#, c-format msgid "Address must be %d bytes long" -msgstr "buffers devem ser o mesmo tamanho" +msgstr "O endereço deve ter %d bytes de comprimento" #: shared-bindings/_bleio/Address.c msgid "Address type out of range" -msgstr "" +msgstr "O tipo do endereço está fora do alcance" #: ports/nrf/common-hal/busio/I2C.c msgid "All I2C peripherals are in use" @@ -278,9 +294,8 @@ msgid "All SPI peripherals are in use" msgstr "Todos os periféricos SPI estão em uso" #: ports/nrf/common-hal/busio/UART.c -#, fuzzy msgid "All UART peripherals are in use" -msgstr "Todos os periféricos I2C estão em uso" +msgstr "Todos os periféricos UART estão em uso" #: ports/atmel-samd/common-hal/audioio/AudioOut.c msgid "All event channels in use" @@ -288,12 +303,13 @@ msgstr "Todos os canais de eventos em uso" #: ports/atmel-samd/audio_dma.c ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "All sync event channels in use" -msgstr "" +msgstr "Todos os canais dos eventos de sincronização em uso" #: shared-bindings/pulseio/PWMOut.c msgid "All timers for this pin are in use" msgstr "Todos os temporizadores para este pino estão em uso" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -301,17 +317,17 @@ msgstr "Todos os temporizadores para este pino estão em uso" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "Todos os temporizadores em uso" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Already advertising." -msgstr "" +msgstr "Já está anunciando." #: ports/cxd56/common-hal/analogio/AnalogIn.c msgid "AnalogIn not supported on given pin" -msgstr "" +msgstr "O AnalogIn não é compatível no pino informado" #: ports/cxd56/common-hal/analogio/AnalogOut.c #: ports/mimxrt10xx/common-hal/analogio/AnalogOut.c @@ -321,7 +337,7 @@ msgstr "Funcionalidade AnalogOut não suportada" #: shared-bindings/analogio/AnalogOut.c msgid "AnalogOut is only 16 bits. Value must be less than 65536." -msgstr "" +msgstr "O AnalogOut é de apenas 16 bits. O valor deve ser menor que 65536." #: ports/atmel-samd/common-hal/analogio/AnalogOut.c msgid "AnalogOut not supported on given pin" @@ -338,15 +354,17 @@ msgstr "Array deve conter meias palavras (tipo 'H')" #: shared-bindings/nvm/ByteArray.c msgid "Array values should be single bytes." -msgstr "" +msgstr "Os valores das matrizes devem ser bytes simples." -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" -msgstr "" +msgstr "Pelo menos %d %q pode ser definido (não %d)" #: supervisor/shared/safe_mode.c msgid "Attempted heap allocation when MicroPython VM not running." msgstr "" +"A tentativa da área de alocação dinâmica de variáveis (heap) quando o " +"MicroPython VM não está em execução." #: main.c msgid "Auto-reload is off.\n" @@ -357,23 +375,27 @@ msgid "" "Auto-reload is on. Simply save files over USB to run them or enter REPL to " "disable.\n" msgstr "" +"O recarregamento automático está ativo. Simplesmente salve os arquivos via " +"USB para executá-los ou digite REPL para desativar.\n" #: shared-module/displayio/Display.c #: shared-module/framebufferio/FramebufferDisplay.c msgid "Below minimum frame rate" -msgstr "" +msgstr "Abaixo da taxa mínima de quadros" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c msgid "Bit clock and word select must share a clock unit" msgstr "" +"O clock de bits e a seleção de palavras devem compartilhar uma unidade de " +"clock" #: shared-bindings/audiobusio/PDMIn.c msgid "Bit depth must be multiple of 8." -msgstr "" +msgstr "A profundidade de bits deve ser o múltiplo de 8." #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "Both RX and TX required for flow control" -msgstr "" +msgstr "Ambos os RX e TX são necessários para o controle do fluxo" #: ports/atmel-samd/common-hal/rotaryio/IncrementalEncoder.c msgid "Both pins must support hardware interrupts" @@ -383,7 +405,7 @@ msgstr "Ambos os pinos devem suportar interrupções de hardware" #: shared-bindings/framebufferio/FramebufferDisplay.c #: shared-bindings/rgbmatrix/RGBMatrix.c msgid "Brightness must be 0-1.0" -msgstr "" +msgstr "O brilho deve ser 0-1,0" #: shared-bindings/supervisor/__init__.c msgid "Brightness must be between 0 and 255" @@ -392,12 +414,12 @@ msgstr "O brilho deve estar entre 0 e 255" #: shared-bindings/displayio/Display.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Brightness not adjustable" -msgstr "" +msgstr "Brilho não ajustável" #: shared-bindings/_bleio/UUID.c #, c-format msgid "Buffer + offset too small %d %d %d" -msgstr "" +msgstr "O buffer + desvio é muito pequeno %d %d %d" #: shared-module/usb_hid/Device.c #, c-format @@ -407,41 +429,45 @@ msgstr "Buffer de tamanho incorreto. Deve ser %d bytes." #: shared-bindings/displayio/Display.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Buffer is not a bytearray." -msgstr "" +msgstr "O buffer não é um bytearray." #: shared-bindings/displayio/Display.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Buffer is too small" -msgstr "" +msgstr "O buffer é muito pequeno" #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #, c-format msgid "Buffer length %d too big. It must be less than %d" -msgstr "" +msgstr "O tamanho do buffer %d é muito grande. Deve ser menor que %d" + +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "O comprimento do Buffer deve ser um múltiplo de 512" #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" -msgstr "" +msgstr "O comprimento do buffer deve ter pelo menos 1" #: ports/nrf/common-hal/_bleio/PacketBuffer.c msgid "Buffer too large and unable to allocate" -msgstr "" +msgstr "O buffer é muito grande e incapaz de alocar" #: shared-bindings/_bleio/PacketBuffer.c #, c-format msgid "Buffer too short by %d bytes" -msgstr "" +msgstr "O buffer é muito curto em %d bytes" #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c -#, fuzzy, c-format +#, c-format msgid "Bus pin %d is already in use" -msgstr "DAC em uso" +msgstr "O pino bus %d já está em uso" #: shared-bindings/_bleio/UUID.c -#, fuzzy msgid "Byte buffer must be 16 bytes." -msgstr "buffers devem ser o mesmo tamanho" +msgstr "O buffer deve ter 16 bytes." #: shared-bindings/nvm/ByteArray.c msgid "Bytes must be between 0 and 255." @@ -449,15 +475,15 @@ msgstr "Os bytes devem estar entre 0 e 255." #: shared-bindings/aesio/aes.c msgid "CBC blocks must be multiples of 16 bytes" -msgstr "" +msgstr "Os blocos CBC devem ter múltiplos de 16 bytes" #: py/objtype.c msgid "Call super().__init__() before accessing native object." -msgstr "" +msgstr "Chame super().__init__() antes de acessar o objeto nativo." #: ports/nrf/common-hal/_bleio/Characteristic.c msgid "Can't set CCCD on local Characteristic" -msgstr "" +msgstr "Não é possível definir o CCCD com a característica local" #: shared-bindings/displayio/Bitmap.c shared-bindings/pulseio/PulseIn.c msgid "Cannot delete values" @@ -467,20 +493,21 @@ msgstr "Não é possível excluir valores" #: ports/mimxrt10xx/common-hal/digitalio/DigitalInOut.c #: ports/nrf/common-hal/digitalio/DigitalInOut.c msgid "Cannot get pull while in output mode" -msgstr "" +msgstr "Não é possível obter pull enquanto está modo de saída" #: ports/nrf/common-hal/microcontroller/Processor.c -#, fuzzy msgid "Cannot get temperature" -msgstr "Não pode obter a temperatura. status: 0x%02x" +msgstr "Não é possível obter a temperatura" #: shared-bindings/_bleio/Adapter.c msgid "Cannot have scan responses for extended, connectable advertisements." msgstr "" +"Não é possível ter respostas da verificação para os anúncios estendidos e " +"conectáveis." #: ports/atmel-samd/common-hal/audioio/AudioOut.c msgid "Cannot output both channels on the same pin" -msgstr "" +msgstr "Não é possível emitir os dois canais no mesmo pino" #: shared-module/bitbangio/SPI.c msgid "Cannot read without MISO pin." @@ -499,18 +526,19 @@ msgstr "Não é possível remontar '/' enquanto o USB estiver ativo." #: ports/mimxrt10xx/common-hal/microcontroller/__init__.c msgid "Cannot reset into bootloader because no bootloader is present." msgstr "" +"Não é possível redefinir para o bootloader porque o mesmo não está presente." #: shared-bindings/digitalio/DigitalInOut.c msgid "Cannot set value when direction is input." -msgstr "" +msgstr "Não é possível definir o valor quando a direção é inserida." #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "Cannot specify RTS or CTS in RS485 mode" -msgstr "" +msgstr "Não é possível definir o RTS ou CTS no modo RS485" #: py/objslice.c msgid "Cannot subclass slice" -msgstr "" +msgstr "Não é possível subclassificar a fatia" #: shared-module/bitbangio/SPI.c msgid "Cannot transfer without MOSI and MISO pins." @@ -518,29 +546,32 @@ msgstr "Não é possível transferir sem os pinos MOSI e MISO." #: extmod/moductypes.c msgid "Cannot unambiguously get sizeof scalar" -msgstr "" +msgstr "Não é possível obter inequivocamente o tamanho do escalar" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Cannot vary frequency on a timer that is already in use" -msgstr "" +msgstr "Não é possível variar a frequência em um timer que já esteja em uso" #: shared-module/bitbangio/SPI.c msgid "Cannot write without MOSI pin." -msgstr "Não é possível ler sem um pino MOSI" +msgstr "Não é possível fazer a escrita sem um pino MOSI." #: shared-bindings/_bleio/CharacteristicBuffer.c msgid "CharacteristicBuffer writing not provided" -msgstr "" +msgstr "Escrita CharacteristicBuffer não informada" #: supervisor/shared/safe_mode.c msgid "CircuitPython core code crashed hard. Whoops!\n" -msgstr "" +msgstr "O núcleo principal do CircuitPython falhou feio. Ops!\n" #: supervisor/shared/safe_mode.c msgid "" "CircuitPython is in safe mode because you pressed the reset button during " "boot. Press again to exit safe mode.\n" msgstr "" +"O CircuitPython está no modo de segurança porque você pressionou o botão de " +"redefinição durante a inicialização. Pressione novamente para sair do modo " +"de segurança.\n" #: shared-module/bitbangio/SPI.c msgid "Clock pin init failed." @@ -556,27 +587,35 @@ msgstr "Unidade de Clock em uso" #: shared-bindings/_pew/PewPew.c msgid "Column entry must be digitalio.DigitalInOut" -msgstr "" +msgstr "A entrada da coluna deve ser digitalio.DigitalInOut" #: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c #: shared-bindings/displayio/ParallelBus.c -#, fuzzy msgid "Command must be an int between 0 and 255" -msgstr "Os bytes devem estar entre 0 e 255." +msgstr "O comando deve ser um int entre 0 e 255" #: shared-bindings/_bleio/Connection.c msgid "" "Connection has been disconnected and can no longer be used. Create a new " "connection." msgstr "" +"A conexão foi desconectada e não pode mais ser usada. Crie uma nova conexão." #: py/persistentcode.c msgid "Corrupt .mpy file" -msgstr "" +msgstr "Arquivo .mpy corrompido" #: py/emitglue.c msgid "Corrupt raw code" -msgstr "" +msgstr "Código bruto corrompido" + +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "Não foi possível inicializar o GNSS" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" +msgstr "Não foi possível inicializar o SDCard" #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" @@ -584,35 +623,35 @@ msgstr "Não foi possível inicializar o UART" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not initialize channel" -msgstr "" +msgstr "Não foi possível inicializar o canal" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not initialize timer" -msgstr "" +msgstr "Não foi possível inicializar o temporizador" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not re-init channel" -msgstr "" +msgstr "Não foi possível reiniciar o canal" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not re-init timer" -msgstr "" +msgstr "Não foi possível reiniciar o temporizador" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not restart PWM" -msgstr "" +msgstr "Não foi possível reiniciar o PWM" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Could not start PWM" -msgstr "" +msgstr "Não foi possível iniciar o PWM" #: ports/stm/common-hal/busio/UART.c msgid "Could not start interrupt, RX busy" -msgstr "" +msgstr "Não foi possível iniciar a interrupção, RX ocupado" #: shared-module/audiomp3/MP3Decoder.c msgid "Couldn't allocate decoder" -msgstr "" +msgstr "Não foi possível alocar o decodificador" #: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c #: shared-module/audiomp3/MP3Decoder.c @@ -621,7 +660,7 @@ msgstr "Não pôde alocar primeiro buffer" #: shared-module/audiomp3/MP3Decoder.c msgid "Couldn't allocate input buffer" -msgstr "" +msgstr "Não foi possível alocar o buffer de entrada" #: shared-module/audiocore/WaveFile.c shared-module/audiomixer/Mixer.c #: shared-module/audiomp3/MP3Decoder.c @@ -630,15 +669,15 @@ msgstr "Não pôde alocar segundo buffer" #: supervisor/shared/safe_mode.c msgid "Crash into the HardFault_Handler." -msgstr "" +msgstr "Falha no HardFault_Handler." #: ports/stm/common-hal/analogio/AnalogOut.c msgid "DAC Channel Init Error" -msgstr "" +msgstr "Erro de Inicialização do Canal DAC" #: ports/stm/common-hal/analogio/AnalogOut.c msgid "DAC Device Init Error" -msgstr "" +msgstr "Erro de Inicialização do Dispositivo DAC" #: ports/atmel-samd/common-hal/audioio/AudioOut.c msgid "DAC already in use" @@ -647,47 +686,46 @@ msgstr "DAC em uso" #: ports/atmel-samd/common-hal/displayio/ParallelBus.c #: ports/nrf/common-hal/displayio/ParallelBus.c msgid "Data 0 pin must be byte aligned" -msgstr "" +msgstr "O pino de dados 0 deve ser alinhado por bytes" #: shared-module/audiocore/WaveFile.c msgid "Data chunk must follow fmt chunk" msgstr "Pedaço de dados deve seguir o pedaço de cortes" #: ports/nrf/common-hal/_bleio/Adapter.c -#, fuzzy msgid "Data too large for advertisement packet" -msgstr "Não é possível ajustar dados no pacote de anúncios." +msgstr "Os dados são grandes demais para o pacote de publicidade" #: shared-bindings/audiobusio/PDMIn.c msgid "Destination capacity is smaller than destination_length." -msgstr "" +msgstr "A capacidade do destino é menor que destination_length." #: ports/nrf/common-hal/audiobusio/I2SOut.c msgid "Device in use" -msgstr "" +msgstr "Dispositivo em uso" #: ports/cxd56/common-hal/digitalio/DigitalInOut.c msgid "DigitalInOut not supported on given pin" -msgstr "" +msgstr "O DigitalInOut não é compatível em um determinado pino" #: shared-bindings/displayio/Display.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Display must have a 16 bit colorspace." -msgstr "" +msgstr "O monitor deve ter um espaço de cores com 16 bits." #: shared-bindings/displayio/Display.c #: shared-bindings/displayio/EPaperDisplay.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Display rotation must be in 90 degree increments" -msgstr "" +msgstr "A rotação da tela deve estar em incrementos de 90 graus" #: shared-bindings/digitalio/DigitalInOut.c msgid "Drive mode not used when direction is input." -msgstr "" +msgstr "O modo do controlador não é usado quando a direção for inserida." #: shared-bindings/aesio/aes.c msgid "ECB only operates on 16 bytes at a time" -msgstr "" +msgstr "O BCE opera apenas com 16 bytes por vez" #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/ps2io/Ps2.c @@ -700,7 +738,8 @@ msgstr "Canal EXTINT em uso" msgid "Error in regex" msgstr "Erro no regex" -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" @@ -708,45 +747,43 @@ msgstr "Esperado um" #: shared-bindings/_bleio/CharacteristicBuffer.c #: shared-bindings/_bleio/Descriptor.c shared-bindings/_bleio/PacketBuffer.c -#, fuzzy msgid "Expected a Characteristic" -msgstr "Não é possível adicionar Característica." +msgstr "Uma característica é necessária" #: shared-bindings/_bleio/Characteristic.c msgid "Expected a Service" -msgstr "" +msgstr "Esperava um Serviço" #: shared-bindings/_bleio/Characteristic.c shared-bindings/_bleio/Descriptor.c #: shared-bindings/_bleio/Service.c -#, fuzzy msgid "Expected a UUID" -msgstr "Esperado um" +msgstr "Um UUID é necessário" #: shared-bindings/_bleio/Adapter.c msgid "Expected an Address" -msgstr "" +msgstr "Um endereço esperado" #: shared-module/_pixelbuf/PixelBuf.c #, c-format msgid "Expected tuple of length %d, got %d" -msgstr "" +msgstr "Tupla esperada com comprimento %d, obteve %d" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Extended advertisements with scan response not supported." -msgstr "" +msgstr "Anúncios estendidos não compatíveis com a resposta da varredura." #: extmod/ulab/code/fft.c msgid "FFT is defined for ndarrays only" -msgstr "" +msgstr "O FFT é definido apenas para ndarrays" #: shared-bindings/ps2io/Ps2.c msgid "Failed sending command." msgstr "Falha ao enviar comando." #: ports/nrf/sd_mutex.c -#, fuzzy, c-format +#, c-format msgid "Failed to acquire mutex, err 0x%04x" -msgstr "Não é possível ler o valor do atributo. status: 0x%02x" +msgstr "Houve uma falha na aquisição do mutex, err 0x%04x" #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c msgid "Failed to allocate RX buffer" @@ -763,24 +800,24 @@ msgstr "Falha ao alocar buffer RX de %d bytes" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: internal error" -msgstr "" +msgstr "Falha ao conectar: erro interno" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Failed to connect: timeout" -msgstr "" +msgstr "Falha ao conectar: tempo limite" #: shared-module/audiomp3/MP3Decoder.c msgid "Failed to parse MP3 file" -msgstr "" +msgstr "Falha ao analisar o arquivo MP3" #: ports/nrf/sd_mutex.c -#, fuzzy, c-format +#, c-format msgid "Failed to release mutex, err 0x%04x" -msgstr "Não é possível ler o valor do atributo. status: 0x%02x" +msgstr "Houve uma falha ao liberar o mutex, err 0x%04x" #: supervisor/shared/safe_mode.c msgid "Failed to write internal flash." -msgstr "" +msgstr "Falha ao gravar o flash interno." #: py/moduerrno.c msgid "File exists" @@ -789,21 +826,23 @@ msgstr "Arquivo já existe" #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c msgid "Frequency captured is above capability. Capture Paused." msgstr "" +"A frequência capturada está acima da capacidade. A captura está em pausa." #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Frequency must match existing PWMOut using this timer" msgstr "" +"A frequência deve coincidir com o PWMOut existente usando este temporizador" #: shared-bindings/bitbangio/I2C.c shared-bindings/bitbangio/SPI.c #: shared-bindings/busio/I2C.c shared-bindings/busio/SPI.c msgid "Function requires lock" -msgstr "" +msgstr "A função requer bloqueio" #: shared-bindings/displayio/Display.c #: shared-bindings/displayio/EPaperDisplay.c #: shared-bindings/framebufferio/FramebufferDisplay.c msgid "Group already used" -msgstr "" +msgstr "O grupo já está em uso" #: shared-module/displayio/Group.c msgid "Group full" @@ -812,11 +851,11 @@ msgstr "Grupo cheio" #: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/I2C.c #: ports/stm/common-hal/busio/SPI.c msgid "Hardware busy, try alternative pins" -msgstr "" +msgstr "O hardware está ocupado, tente os pinos alternativos" #: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c msgid "Hardware in use, try alternative pins" -msgstr "" +msgstr "O hardware está em uso, tente os pinos alternativos" #: extmod/vfs_posix_file.c py/objstringio.c msgid "I/O operation on closed file" @@ -824,47 +863,49 @@ msgstr "Operação I/O no arquivo fechado" #: ports/stm/common-hal/busio/I2C.c msgid "I2C Init Error" -msgstr "" - -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "I2C operação não suportada" +msgstr "Erro de inicialização do I2C" #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" -msgstr "" +msgstr "O IV deve ter %d bytes de comprimento" #: py/persistentcode.c msgid "" "Incompatible .mpy file. Please update all .mpy files. See http://adafru.it/" "mpy-update for more info." msgstr "" +"Arquivo .mpy incompatível. Atualize todos os arquivos .mpy. Consulte http://" +"adafru.it/mpy-update para mais informações." #: shared-bindings/_pew/PewPew.c msgid "Incorrect buffer size" -msgstr "" +msgstr "O tamanho do buffer está incorreto" #: py/moduerrno.c msgid "Input/output error" -msgstr "" +msgstr "Erro de entrada/saída" #: ports/nrf/common-hal/_bleio/__init__.c msgid "Insufficient authentication" -msgstr "" +msgstr "Autenticação insuficiente" #: ports/nrf/common-hal/_bleio/__init__.c msgid "Insufficient encryption" -msgstr "" +msgstr "Criptografia insuficiente" #: ports/stm/common-hal/busio/UART.c msgid "Internal define error" -msgstr "" +msgstr "Erro interno de definição" #: shared-module/rgbmatrix/RGBMatrix.c #, c-format msgid "Internal error #%d" -msgstr "" +msgstr "Erro interno #%d" + +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" +msgstr "%q Inválido" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c @@ -873,7 +914,7 @@ msgstr "Pino do %q inválido" #: ports/stm/common-hal/analogio/AnalogIn.c msgid "Invalid ADC Unit value" -msgstr "" +msgstr "Valor inválido da unidade ADC" #: shared-module/displayio/OnDiskBitmap.c msgid "Invalid BMP file" @@ -881,11 +922,11 @@ msgstr "Arquivo BMP inválido" #: ports/stm/common-hal/analogio/AnalogOut.c msgid "Invalid DAC pin supplied" -msgstr "" +msgstr "O pino DAC informado é inválido" #: ports/stm/common-hal/busio/I2C.c msgid "Invalid I2C pin selection" -msgstr "" +msgstr "A seleção dos pinos I2C é inválido" #: ports/atmel-samd/common-hal/pulseio/PWMOut.c #: ports/cxd56/common-hal/pulseio/PWMOut.c @@ -895,11 +936,11 @@ msgstr "Frequência PWM inválida" #: ports/stm/common-hal/busio/SPI.c msgid "Invalid SPI pin selection" -msgstr "" +msgstr "A seleção do pino SPI é inválido" #: ports/stm/common-hal/busio/UART.c msgid "Invalid UART pin selection" -msgstr "" +msgstr "A seleção dos pinos UART é inválido" #: py/moduerrno.c shared-module/rgbmatrix/RGBMatrix.c msgid "Invalid argument" @@ -907,29 +948,27 @@ msgstr "Argumento inválido" #: shared-module/displayio/Bitmap.c msgid "Invalid bits per value" -msgstr "" +msgstr "Os valores por bits são inválidos" #: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c -#, fuzzy msgid "Invalid buffer size" -msgstr "Arquivo inválido" +msgstr "O tamanho do buffer é inválido" #: shared-bindings/_pixelbuf/PixelBuf.c msgid "Invalid byteorder string" -msgstr "" +msgstr "A cadeia de bytes é inválida" #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c msgid "Invalid capture period. Valid range: 1 - 500" -msgstr "" +msgstr "O período de captura é inválido. O intervalo válido é: 1 - 500" #: shared-bindings/audiomixer/Mixer.c -#, fuzzy msgid "Invalid channel count" -msgstr "certificado inválido" +msgstr "A contagem do canal é inválido" #: shared-bindings/digitalio/DigitalInOut.c msgid "Invalid direction." -msgstr "Direção inválida" +msgstr "Direção inválida." #: shared-module/audiocore/WaveFile.c msgid "Invalid file" @@ -941,11 +980,11 @@ msgstr "Tamanho do pedaço de formato inválido" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Invalid frequency supplied" -msgstr "" +msgstr "A frequência informada é inválida" #: supervisor/shared/safe_mode.c msgid "Invalid memory access." -msgstr "" +msgstr "O acesso da memória é inválido." #: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c msgid "Invalid number of bits" @@ -973,9 +1012,10 @@ msgstr "Pino inválido para canal direito" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -983,33 +1023,32 @@ msgstr "Pinos inválidos" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "Invalid pins for PWMOut" -msgstr "" +msgstr "Os pinos para o PWMOut são inválidos" #: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c #: shared-bindings/displayio/FourWire.c msgid "Invalid polarity" -msgstr "" +msgstr "Polaridade inválida" #: shared-bindings/_bleio/Characteristic.c msgid "Invalid properties" -msgstr "" +msgstr "Propriedades inválidas" #: shared-bindings/microcontroller/__init__.c msgid "Invalid run mode." -msgstr "" +msgstr "O modo de execução é inválido." #: shared-module/_bleio/Attribute.c msgid "Invalid security_mode" -msgstr "" +msgstr "O Security_mode é inválido" #: shared-bindings/audiomixer/Mixer.c msgid "Invalid voice" -msgstr "" +msgstr "A voz é inválida" #: shared-bindings/audiomixer/Mixer.c -#, fuzzy msgid "Invalid voice count" -msgstr "certificado inválido" +msgstr "A contagem da voz é inválida" #: shared-module/audiocore/WaveFile.c msgid "Invalid wave file" @@ -1017,23 +1056,23 @@ msgstr "Aqruivo de ondas inválido" #: ports/stm/common-hal/busio/UART.c msgid "Invalid word/bit length" -msgstr "" +msgstr "O comprimento do bit/palavra são inválidos" #: shared-bindings/aesio/aes.c msgid "Key must be 16, 24, or 32 bytes long" -msgstr "" +msgstr "A chave deve ter 16, 24 ou 32 bytes de comprimento" #: py/compile.c msgid "LHS of keyword arg must be an id" -msgstr "" +msgstr "O LHS da palavra-chave arg deve ser um ID" #: shared-module/displayio/Group.c msgid "Layer already in a group." -msgstr "" +msgstr "A camada já existe em um grupo." #: shared-module/displayio/Group.c msgid "Layer must be a Group or TileGrid subclass." -msgstr "" +msgstr "A camada deve ser uma subclasse Group ou TileGrid." #: py/objslice.c msgid "Length must be an int" @@ -1041,11 +1080,11 @@ msgstr "Tamanho deve ser um int" #: py/objslice.c msgid "Length must be non-negative" -msgstr "" +msgstr "O comprimento deve ser positivo" #: shared-module/bitbangio/SPI.c msgid "MISO pin init failed." -msgstr "Inicialização do pino MISO falhou" +msgstr "A inicialização do pino MISO falhou." #: shared-module/bitbangio/SPI.c msgid "MOSI pin init failed." @@ -1054,44 +1093,44 @@ msgstr "Inicialização do pino MOSI falhou." #: shared-module/displayio/Shape.c #, c-format msgid "Maximum x value when mirrored is %d" -msgstr "" +msgstr "O valor máximo de x quando espelhado é %d" #: supervisor/shared/safe_mode.c msgid "MicroPython NLR jump failed. Likely memory corruption." -msgstr "" +msgstr "O salto do MicroPython NLR falhou. Possível corrupção de memória." #: supervisor/shared/safe_mode.c msgid "MicroPython fatal error." -msgstr "" +msgstr "Houve um erro fatal do MicroPython." #: shared-bindings/audiobusio/PDMIn.c msgid "Microphone startup delay must be in range 0.0 to 1.0" -msgstr "" +msgstr "O atraso na inicialização do microfone deve estar entre 0,0 e 1,0" #: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c msgid "Missing MISO or MOSI Pin" -msgstr "" +msgstr "O pino MISO ou MOSI está ausente" #: shared-bindings/displayio/Group.c msgid "Must be a %q subclass." -msgstr "" +msgstr "Deve ser uma subclasse %q." #: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c msgid "Must provide MISO or MOSI pin" -msgstr "" +msgstr "Deve informar os pinos MISO ou MOSI" #: shared-bindings/rgbmatrix/RGBMatrix.c #, c-format msgid "Must use a multiple of 6 rgb pins, not %d" -msgstr "" +msgstr "Deve utilizar um múltiplo de 6 pinos rgb, não %d" #: py/parse.c msgid "Name too long" -msgstr "" +msgstr "Nome muito longo" #: ports/nrf/common-hal/_bleio/Characteristic.c msgid "No CCCD for this Characteristic" -msgstr "" +msgstr "Não há nenhum CCCD para esta característica" #: ports/atmel-samd/common-hal/analogio/AnalogOut.c #: ports/stm/common-hal/analogio/AnalogOut.c @@ -1105,11 +1144,11 @@ msgstr "Nenhum canal DMA encontrado" #: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c msgid "No MISO Pin" -msgstr "" +msgstr "Nenhum pino MISO" #: ports/mimxrt10xx/common-hal/busio/SPI.c ports/stm/common-hal/busio/SPI.c msgid "No MOSI Pin" -msgstr "" +msgstr "Nenhum pino MOSI" #: ports/atmel-samd/common-hal/busio/UART.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c @@ -1125,11 +1164,11 @@ msgstr "Nenhum pino TX" #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c msgid "No available clocks" -msgstr "" +msgstr "Nenhum clock disponível" #: shared-bindings/_bleio/PacketBuffer.c msgid "No connection: length cannot be determined" -msgstr "" +msgstr "Sem conexão: o comprimento não pode ser determinado" #: shared-bindings/board/__init__.c msgid "No default %q bus" @@ -1141,7 +1180,7 @@ msgstr "Não há GCLKs livre" #: shared-bindings/os/__init__.c msgid "No hardware random available" -msgstr "" +msgstr "Nenhum hardware aleatório está disponível" #: ports/atmel-samd/common-hal/ps2io/Ps2.c msgid "No hardware support on clk pin" @@ -1154,46 +1193,45 @@ msgstr "Nenhum suporte de hardware no pino" #: shared-bindings/aesio/aes.c msgid "No key was specified" -msgstr "" +msgstr "Nenhuma chave foi definida" #: shared-bindings/time/__init__.c msgid "No long integer support" -msgstr "" +msgstr "Não há compatibilidade com inteiro longo" #: ports/stm/common-hal/pulseio/PWMOut.c msgid "No more timers available on this pin." -msgstr "" +msgstr "Não há mais temporizadores disponíveis neste pino." #: shared-module/touchio/TouchIn.c msgid "No pulldown on pin; 1Mohm recommended" -msgstr "" +msgstr "Não há pulldown no pino; É recomendável utilizar um resistor de 1M ohm" #: py/moduerrno.c msgid "No space left on device" -msgstr "" +msgstr "Não resta espaço no dispositivo" #: py/moduerrno.c msgid "No such file/directory" -msgstr "" +msgstr "Este arquivo/diretório não existe" #: shared-module/rgbmatrix/RGBMatrix.c msgid "No timer available" -msgstr "" +msgstr "Não há um temporizador disponível" #: supervisor/shared/safe_mode.c msgid "Nordic Soft Device failure assertion." -msgstr "" +msgstr "Declaração de falha do dispositivo Nordic Soft." #: ports/nrf/common-hal/_bleio/__init__.c #: shared-bindings/_bleio/CharacteristicBuffer.c -#, fuzzy msgid "Not connected" -msgstr "Não é possível conectar-se ao AP" +msgstr "Não Conectado" #: shared-bindings/audiobusio/I2SOut.c shared-bindings/audioio/AudioOut.c #: shared-bindings/audiopwmio/PWMAudioOut.c msgid "Not playing" -msgstr "" +msgstr "Não está jogando" #: shared-bindings/util.c msgid "" @@ -1202,19 +1240,20 @@ msgstr "" "Objeto foi desinicializado e não pode ser mais usaado. Crie um novo objeto." #: ports/nrf/common-hal/busio/UART.c -#, fuzzy msgid "Odd parity is not supported" -msgstr "I2C operação não suportada" +msgstr "A paridade ímpar não é compatível" #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Only 8 or 16 bit mono with " -msgstr "" +msgstr "Apenas mono com 8 ou 16 bits com " #: shared-module/displayio/OnDiskBitmap.c #, c-format msgid "" "Only Windows format, uncompressed BMP supported: given header size is %d" msgstr "" +"O BMP descompactado é compatível apenas no formato Windows: o tamanho do " +"cabeçalho é %d" #: shared-module/displayio/OnDiskBitmap.c #, c-format @@ -1222,25 +1261,31 @@ msgid "" "Only monochrome, indexed 4bpp or 8bpp, and 16bpp or greater BMPs supported: " "%d bpp given" msgstr "" +"São compatíveis apenas os BMPs monocromáticos, indexados em 4bpp ou 8bpp e " +"16bpp ou superior: determinado %d bpp" #: shared-bindings/audiobusio/PDMIn.c msgid "Oversample must be multiple of 8." -msgstr "" +msgstr "A superamostragem deve ser um múltiplo de 8." #: shared-bindings/pulseio/PWMOut.c msgid "" "PWM duty_cycle must be between 0 and 65535 inclusive (16 bit resolution)" msgstr "" +"O duty_cycle do PWM deve estar entre 0 e inclusive 65535 (com resolução de " +"16 bits)" #: shared-bindings/pulseio/PWMOut.c msgid "" "PWM frequency not writable when variable_frequency is False on construction." msgstr "" +"A frequência do PWM não pode ser gravada quando variable_frequency for False " +"na construção." #: ports/mimxrt10xx/common-hal/displayio/ParallelBus.c #: ports/stm/common-hal/displayio/ParallelBus.c msgid "ParallelBus not yet supported" -msgstr "" +msgstr "O ParallelBus ainda não é compatível" #: py/moduerrno.c msgid "Permission denied" @@ -1256,15 +1301,15 @@ msgstr "O pino não tem recursos de ADC" #: shared-bindings/digitalio/DigitalInOut.c msgid "Pin is input only" -msgstr "" +msgstr "Apenas o pino de entrada" #: ports/atmel-samd/common-hal/countio/Counter.c msgid "Pin must support hardware interrupts" -msgstr "" +msgstr "O pino deve ser compatível com as interrupções do hardware" #: ports/stm/common-hal/pulseio/PulseIn.c msgid "Pin number already reserved by EXTI" -msgstr "" +msgstr "Número do PIN já está reservado através da EXTI" #: shared-bindings/rgbmatrix/RGBMatrix.c #, c-format @@ -1273,15 +1318,17 @@ msgid "" "bytes. If this cannot be avoided, pass allow_inefficient=True to the " "constructor" msgstr "" +"A pinagem utiliza %d bytes por elemento, que consome mais do que %d bytes do " +"ideal. Caso isso não possa ser evitado, passe allow_inefficient=True ao " +"construtor" #: py/builtinhelp.c -#, fuzzy msgid "Plus any modules on the filesystem\n" -msgstr "Não é possível remontar o sistema de arquivos" +msgstr "Além de quaisquer módulos no sistema de arquivos\n" #: shared-module/vectorio/Polygon.c msgid "Polygon needs at least 3 points" -msgstr "" +msgstr "O Polígono precisa de pelo menos 3 pontos" #: shared-bindings/ps2io/Ps2.c msgid "Pop from an empty Ps2 buffer" @@ -1290,34 +1337,37 @@ msgstr "Buffer Ps2 vazio" #: shared-bindings/_bleio/Adapter.c msgid "Prefix buffer must be on the heap" msgstr "" +"O buffer do prefixo deve estar na área de alocação dinâmica de variáveis " +"(heap)" #: main.c msgid "Press any key to enter the REPL. Use CTRL-D to reload." msgstr "" +"Pressione qualquer tecla para entrar no REPL. Use CTRL-D para recarregar." #: shared-bindings/digitalio/DigitalInOut.c msgid "Pull not used when direction is output." -msgstr "" +msgstr "O Pull não foi usado quando a direção for gerada." #: ports/stm/common-hal/pulseio/PulseIn.c msgid "PulseIn not supported on this chip" -msgstr "" +msgstr "O PulseIn não é compatível neste CI" #: ports/stm/common-hal/pulseio/PulseOut.c msgid "PulseOut not supported on this chip" -msgstr "" +msgstr "O PulseOut não é compatível neste CI" #: ports/stm/common-hal/os/__init__.c msgid "RNG DeInit Error" -msgstr "" +msgstr "Erro DeInit RNG" #: ports/stm/common-hal/os/__init__.c msgid "RNG Init Error" -msgstr "" +msgstr "Houve um erro na inicialização do RNG" #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "RS485 inversion specified when not in RS485 mode" -msgstr "" +msgstr "A definição da inversão do RS485 quando não está no modo RS485" #: ports/cxd56/common-hal/rtc/RTC.c ports/mimxrt10xx/common-hal/rtc/RTC.c #: ports/nrf/common-hal/rtc/RTC.c @@ -1331,11 +1381,11 @@ msgstr "O RTC não é suportado nesta placa" #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c #: ports/nrf/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c msgid "RTS/CTS/RS485 Not yet supported on this device" -msgstr "" +msgstr "RTS/CTS/RS485 Ainda não é compatível neste dispositivo" #: ports/stm/common-hal/os/__init__.c msgid "Random number generation error" -msgstr "" +msgstr "Houve um erro na geração do número aleatório" #: shared-bindings/pulseio/PulseIn.c msgid "Read-only" @@ -1346,17 +1396,16 @@ msgid "Read-only filesystem" msgstr "Sistema de arquivos somente leitura" #: shared-module/displayio/Bitmap.c -#, fuzzy msgid "Read-only object" -msgstr "Somente leitura" +msgstr "Objeto de leitura apenas" #: shared-bindings/displayio/EPaperDisplay.c msgid "Refresh too soon" -msgstr "" +msgstr "A recarga foi cedo demais" #: shared-bindings/aesio/aes.c msgid "Requested AES mode is unsupported" -msgstr "" +msgstr "O modo AES solicitado não é compatível" #: ports/atmel-samd/common-hal/audioio/AudioOut.c msgid "Right channel unsupported" @@ -1364,7 +1413,7 @@ msgstr "Canal direito não suportado" #: shared-bindings/_pew/PewPew.c msgid "Row entry must be digitalio.DigitalInOut" -msgstr "" +msgstr "A entrada da linha deve ser digitalio.DigitalInOut" #: main.c msgid "Running in safe mode! Auto-reload is off.\n" @@ -1374,6 +1423,10 @@ msgstr "Rodando em modo seguro! Atualização automática está desligada.\n" msgid "Running in safe mode! Not running saved code.\n" msgstr "Rodando em modo seguro! Não está executando o código salvo.\n" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "O formato CSD do Cartão SD não é compatível" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1381,15 +1434,15 @@ msgstr "SDA ou SCL precisa de um pull up" #: ports/stm/common-hal/busio/SPI.c msgid "SPI Init Error" -msgstr "" +msgstr "Houve um erro na inicialização SPI" #: ports/stm/common-hal/busio/SPI.c msgid "SPI Re-initialization error" -msgstr "" +msgstr "Houve um erro na reinicialização SPI" #: shared-bindings/audiomixer/Mixer.c msgid "Sample rate must be positive" -msgstr "" +msgstr "A taxa de amostragem deve ser positiva" #: ports/atmel-samd/common-hal/audioio/AudioOut.c #, c-format @@ -1398,15 +1451,15 @@ msgstr "Taxa de amostragem muito alta. Deve ser menor que %d" #: ports/nrf/common-hal/_bleio/Adapter.c msgid "Scan already in progess. Stop with stop_scan." -msgstr "" +msgstr "O escaneamento já está em andamento. Interrompa com stop_scan." #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "Selected CTS pin not valid" -msgstr "" +msgstr "O pino CTS selecionado é inválido" #: ports/mimxrt10xx/common-hal/busio/UART.c msgid "Selected RTS pin not valid" -msgstr "" +msgstr "O pino RTS selecionado é inválido" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c @@ -1415,20 +1468,20 @@ msgstr "Serializer em uso" #: shared-bindings/nvm/ByteArray.c msgid "Slice and value different lengths." -msgstr "" +msgstr "Fatie e avalie os diferentes comprimentos." #: shared-bindings/displayio/Bitmap.c shared-bindings/displayio/Group.c #: shared-bindings/displayio/TileGrid.c shared-bindings/pulseio/PulseIn.c msgid "Slices not supported" -msgstr "" +msgstr "Fatiamento não compatível" #: shared-bindings/aesio/aes.c msgid "Source and destination buffers must be the same length" -msgstr "" +msgstr "Os buffers da origem e do destino devem ter o mesmo comprimento" #: extmod/modure.c msgid "Splitting with sub-captures" -msgstr "" +msgstr "Divisão com sub-capturas" #: shared-bindings/supervisor/__init__.c msgid "Stack size must be at least 256" @@ -1436,27 +1489,36 @@ msgstr "O tamanho da pilha deve ser pelo menos 256" #: shared-bindings/multiterminal/__init__.c msgid "Stream missing readinto() or write() method." -msgstr "" +msgstr "Transmita o método ausente readinto() ou write()." #: ports/mimxrt10xx/common-hal/busio/UART.c ports/stm/common-hal/busio/UART.c msgid "Supply at least one UART pin" -msgstr "" +msgstr "Forneça pelo menos um pino UART" + +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "A entrada no sistema deve ser gnss.SatelliteSystem" #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" -msgstr "" +msgstr "A leitura da temperatura expirou" #: supervisor/shared/safe_mode.c msgid "" "The CircuitPython heap was corrupted because the stack was too small.\n" "Please increase the stack size if you know how, or if not:" msgstr "" +"A área de alocação dinâmica de variáveis (heap) do CircuitPython foi " +"corrompida porque a pilha de funções (stack) era muito pequena.\n" +"Aumente o tamanho da pilha de funções caso saiba como, ou caso não saiba:" #: supervisor/shared/safe_mode.c msgid "" "The `microcontroller` module was used to boot into safe mode. Press reset to " "exit safe mode.\n" msgstr "" +"O módulo `microcontrolador` foi utilizado para inicializar no modo de " +"segurança. Pressione reset para encerrar do modo de segurança.\n" #: supervisor/shared/safe_mode.c msgid "" @@ -1464,43 +1526,49 @@ msgid "" "enough power for the whole circuit and press reset (after ejecting " "CIRCUITPY).\n" msgstr "" +"A força do microcontrolador caiu. Verifique se a fonte de alimentação " +"fornece\n" +"energia suficiente para todo o circuito e pressione reset (após a ejeção " +"CIRCUITPY).\n" #: shared-module/audiomixer/MixerVoice.c msgid "The sample's bits_per_sample does not match the mixer's" -msgstr "" +msgstr "A amostragem bits_per_sample não coincide com a do mixer" #: shared-module/audiomixer/MixerVoice.c msgid "The sample's channel count does not match the mixer's" -msgstr "" +msgstr "A contagem da amostragem dos canais não coincide com o a do mixer" #: shared-module/audiomixer/MixerVoice.c msgid "The sample's sample rate does not match the mixer's" -msgstr "" +msgstr "A taxa de amostragem da amostra não coincide com a do mixer" #: shared-module/audiomixer/MixerVoice.c msgid "The sample's signedness does not match the mixer's" -msgstr "" +msgstr "A amostragem \"signedness\" não coincide com a do mixer" #: shared-bindings/displayio/TileGrid.c msgid "Tile height must exactly divide bitmap height" -msgstr "" +msgstr "A altura do bloco deve dividir exatamente com a altura do bitmap" #: shared-bindings/displayio/TileGrid.c shared-module/displayio/TileGrid.c msgid "Tile index out of bounds" -msgstr "" +msgstr "O índice do bloco está fora dos limites" #: shared-bindings/displayio/TileGrid.c msgid "Tile value out of bounds" -msgstr "" +msgstr "O valor do bloco está fora dos limites" #: shared-bindings/displayio/TileGrid.c msgid "Tile width must exactly divide bitmap width" -msgstr "" +msgstr "A largura do bloco deve dividir exatamente com a largura do bitmap" #: ports/nrf/common-hal/_bleio/Adapter.c #, c-format msgid "Timeout is too long: Maximum timeout length is %d seconds" msgstr "" +"O tempo limite é long demais: O comprimento máximo do tempo limite é de %d " +"segundos" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c msgid "Too many channels in sample." @@ -1508,43 +1576,44 @@ msgstr "Muitos canais na amostra." #: shared-module/displayio/__init__.c msgid "Too many display busses" -msgstr "" +msgstr "Muitos barramentos estão sendo exibidos" #: shared-module/displayio/__init__.c msgid "Too many displays" -msgstr "" +msgstr "Exibições demais" #: ports/nrf/common-hal/_bleio/PacketBuffer.c msgid "Total data to write is larger than outgoing_packet_length" msgstr "" +"O total dos dados que serão gravados é maior que outgoing_packet_length" #: py/obj.c msgid "Traceback (most recent call last):\n" -msgstr "" +msgstr "Traceback (a última chamada mais recente):\n" #: shared-bindings/time/__init__.c msgid "Tuple or struct_time argument required" -msgstr "" +msgstr "O argumento de tupla ou struct_time é necessário" #: ports/stm/common-hal/busio/UART.c msgid "UART Buffer allocation error" -msgstr "" +msgstr "Houve um erro na alocação do Buffer UART" #: ports/stm/common-hal/busio/UART.c msgid "UART De-init error" -msgstr "" +msgstr "Houve um erro da não inicialização do UART" #: ports/stm/common-hal/busio/UART.c msgid "UART Init Error" -msgstr "" +msgstr "Houve um erro na inicialização do UART" #: ports/stm/common-hal/busio/UART.c msgid "UART Re-init error" -msgstr "" +msgstr "Houve um erro na reinicialização do UART" #: ports/stm/common-hal/busio/UART.c msgid "UART write error" -msgstr "" +msgstr "Houve um erro na gravação UART" #: shared-module/usb_hid/Device.c msgid "USB Busy" @@ -1556,15 +1625,15 @@ msgstr "Erro na USB" #: shared-bindings/_bleio/UUID.c msgid "UUID integer value must be 0-0xffff" -msgstr "" +msgstr "O valor inteiro UUID deve ser 0-0xffff" #: shared-bindings/_bleio/UUID.c msgid "UUID string not 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" -msgstr "" +msgstr "A cadeia de caracteres UUID não 'xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx'" #: shared-bindings/_bleio/UUID.c msgid "UUID value is not str, int or byte buffer" -msgstr "" +msgstr "O valor UUID não é um buffer str, int ou byte" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c @@ -1574,7 +1643,7 @@ msgstr "Não é possível alocar buffers para conversão assinada" #: shared-module/displayio/I2CDisplay.c #, c-format msgid "Unable to find I2C Display at %x" -msgstr "" +msgstr "Não foi possível encontrar a tela I2C no %x" #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c @@ -1583,11 +1652,11 @@ msgstr "Não é possível encontrar GCLK livre" #: py/parse.c msgid "Unable to init parser" -msgstr "" +msgstr "Não foi possível iniciar o analisador" #: shared-module/displayio/OnDiskBitmap.c msgid "Unable to read color palette data" -msgstr "" +msgstr "Não foi possível ler os dados da paleta de cores" #: shared-bindings/nvm/ByteArray.c msgid "Unable to write to nvm." @@ -1595,46 +1664,48 @@ msgstr "Não é possível gravar no nvm." #: ports/nrf/common-hal/_bleio/UUID.c msgid "Unexpected nrfx uuid type" -msgstr "" +msgstr "Tipo uuid nrfx inesperado" #: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Unknown gatt error: 0x%04x" -msgstr "" +msgstr "Erro gatt desconhecido: 0x%04x" #: supervisor/shared/safe_mode.c msgid "Unknown reason." -msgstr "" +msgstr "Motivo desconhecido." #: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Unknown security error: 0x%04x" -msgstr "" +msgstr "Erro de segurança desconhecido: 0x%04x" #: ports/nrf/common-hal/_bleio/__init__.c #, c-format msgid "Unknown soft device error: %04x" -msgstr "" +msgstr "Erro desconhecido do dispositivo de soft: %04x" #: shared-bindings/_pixelbuf/PixelBuf.c #, c-format msgid "Unmatched number of items on RHS (expected %d, got %d)." -msgstr "" +msgstr "Quantidade inigualável de itens no RHS (%d esperado, obteve %d)." #: ports/nrf/common-hal/_bleio/__init__.c msgid "" "Unspecified issue. Can be that the pairing prompt on the other device was " "declined or ignored." msgstr "" +"Problema desconhecido. Pode ser que o prompt de emparelhamento no outro " +"dispositivo tenha sido recusado ou ignorado." #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "Taxa de transmissão não suportada" #: shared-module/displayio/display_core.c -#, fuzzy msgid "Unsupported display bus type" -msgstr "Taxa de transmissão não suportada" +msgstr "Não há suporte para o tipo do display bus" #: shared-module/audiocore/WaveFile.c msgid "Unsupported format" @@ -1642,29 +1713,29 @@ msgstr "Formato não suportado" #: py/moduerrno.c msgid "Unsupported operation" -msgstr "" +msgstr "Operação não suportada" #: shared-bindings/digitalio/DigitalInOut.c msgid "Unsupported pull value." -msgstr "" +msgstr "O valor pull não é compatível." #: ports/nrf/common-hal/_bleio/Characteristic.c #: ports/nrf/common-hal/_bleio/Descriptor.c msgid "Value length != required fixed length" -msgstr "" +msgstr "Comprimento do valor != comprimento fixo necessário" #: ports/nrf/common-hal/_bleio/Characteristic.c #: ports/nrf/common-hal/_bleio/Descriptor.c msgid "Value length > max_length" -msgstr "" +msgstr "O comprimento do valor é > max_length" #: py/emitnative.c msgid "Viper functions don't currently support more than 4 arguments" -msgstr "" +msgstr "Atualmente, as funções do Viper não suportam mais de 4 argumentos" #: ports/stm/common-hal/microcontroller/Processor.c msgid "Voltage read timed out" -msgstr "" +msgstr "O tempo limite de leitura da tensão expirou" #: main.c msgid "WARNING: Your code filename has two extensions\n" @@ -1673,22 +1744,26 @@ msgstr "AVISO: Seu arquivo de código tem duas extensões\n" #: shared-bindings/watchdog/WatchDogTimer.c msgid "WatchDogTimer cannot be deinitialized once mode is set to RESET" msgstr "" +"O WatchDogTimer não pode ser não-inicializado uma vez que o modo é definido " +"como RESET" #: shared-bindings/watchdog/WatchDogTimer.c msgid "WatchDogTimer is not currently running" -msgstr "" +msgstr "O WatchDogTimer não está em execução" #: shared-bindings/watchdog/WatchDogTimer.c msgid "WatchDogTimer.mode cannot be changed once set to WatchDogMode.RESET" msgstr "" +"O WatchDogTimer.mode não pode ser alterado uma vez definido para " +"WatchDogMode.RESET" #: shared-bindings/watchdog/WatchDogTimer.c msgid "WatchDogTimer.timeout must be greater than 0" -msgstr "" +msgstr "O WatchDogTimer.timeout deve ser maior que 0" #: supervisor/shared/safe_mode.c msgid "Watchdog timer expired." -msgstr "" +msgstr "O temporizador Watchdog expirou." #: py/builtinhelp.c #, c-format @@ -1699,35 +1774,41 @@ msgid "" "\n" "To list built-in modules please do `help(\"modules\")`.\n" msgstr "" +"Bem-vindo ao Adafruit CircuitPython %s!\n" +"\n" +"Para obter guias de projeto, visite learn.adafruit.com/category/" +"circuitpython.\n" +"\n" +"Para listar os módulos internos, faça `help(\"modules\")`.\n" #: ports/nrf/common-hal/_bleio/PacketBuffer.c msgid "Writes not supported on Characteristic" -msgstr "" +msgstr "A escrita não é compatível na Característica" #: supervisor/shared/safe_mode.c msgid "You are in safe mode: something unanticipated happened.\n" -msgstr "" +msgstr "Você está no modo de segurança: algo inesperado aconteceu.\n" #: supervisor/shared/safe_mode.c msgid "You requested starting safe mode by " -msgstr "Você solicitou o início do modo de segurança" +msgstr "Você solicitou o início do modo de segurança através do " #: py/objtype.c msgid "__init__() should return None" -msgstr "" +msgstr "O __init__() deve retornar Nenhum" #: py/objtype.c #, c-format msgid "__init__() should return None, not '%s'" -msgstr "" +msgstr "O __init__() deve retornar Nenhum, não '%s'" #: py/objobject.c msgid "__new__ arg must be a user-type" -msgstr "" +msgstr "O argumento __new__ deve ser um tipo usuário" #: extmod/modubinascii.c extmod/moduhashlib.c msgid "a bytes-like object is required" -msgstr "" +msgstr "é necessário objetos tipo bytes" #: lib/embed/abort_.c msgid "abort() called" @@ -1738,25 +1819,25 @@ msgstr "abort() chamado" msgid "address %08x is not aligned to %d bytes" msgstr "endereço %08x não está alinhado com %d bytes" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" -msgstr "" +msgstr "endereço fora dos limites" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" -msgstr "" +msgstr "os endereços estão vazios" #: extmod/ulab/code/vectorise.c msgid "arctan2 is implemented for scalars and ndarrays only" -msgstr "" +msgstr "O arctan2 está implementado apenas para escalares e ndarrays" #: py/modbuiltins.c msgid "arg is an empty sequence" -msgstr "" +msgstr "o arg é uma sequência vazia" #: extmod/ulab/code/numerical.c msgid "argsort argument must be an ndarray" -msgstr "" +msgstr "O argumento argsort deve ser um ndarray" #: py/runtime.c msgid "argument has wrong type" @@ -1765,23 +1846,23 @@ msgstr "argumento tem tipo errado" #: py/argcheck.c shared-bindings/_stage/__init__.c #: shared-bindings/digitalio/DigitalInOut.c shared-bindings/gamepad/GamePad.c msgid "argument num/types mismatch" -msgstr "" +msgstr "o argumento num/tipos não combinam" #: py/runtime.c msgid "argument should be a '%q' not a '%q'" -msgstr "" +msgstr "o argumento deve ser um '%q' e não um '%q'" #: extmod/ulab/code/linalg.c msgid "arguments must be ndarrays" -msgstr "" +msgstr "os argumentos devem ser ndarrays" #: py/objarray.c shared-bindings/nvm/ByteArray.c msgid "array/bytes required on right side" -msgstr "" +msgstr "matriz/bytes são necessários no lado direito" #: extmod/ulab/code/numerical.c msgid "attempt to get argmin/argmax of an empty sequence" -msgstr "" +msgstr "tente obter argmin/argmax de uma sequência vazia" #: py/objstr.c msgid "attributes not supported yet" @@ -1789,87 +1870,76 @@ msgstr "atributos ainda não suportados" #: extmod/ulab/code/numerical.c msgid "axis must be -1, 0, None, or 1" -msgstr "" +msgstr "o eixo deve ser -1, 0, Nenhum ou 1" #: extmod/ulab/code/numerical.c msgid "axis must be -1, 0, or 1" -msgstr "" +msgstr "o eixo deve ser -1, 0 ou 1" #: extmod/ulab/code/numerical.c msgid "axis must be None, 0, or 1" -msgstr "" +msgstr "o eixo deve ser Nenhum, 0 ou 1" #: py/builtinevex.c msgid "bad compile mode" -msgstr "" +msgstr "modo de compilação ruim" #: py/objstr.c msgid "bad conversion specifier" -msgstr "" +msgstr "especificador de conversão incorreto" #: py/objstr.c msgid "bad format string" -msgstr "" +msgstr "formato da string incorreta" #: py/binary.c msgid "bad typecode" -msgstr "" +msgstr "typecode incorreto" #: py/emitnative.c msgid "binary op %q not implemented" -msgstr "" +msgstr "a operação binário %q não foi implementada" #: shared-bindings/busio/UART.c msgid "bits must be 7, 8 or 9" -msgstr "" - -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "bits devem ser 8" +msgstr "os bits devem ser 7, 8 ou 9" #: shared-bindings/audiomixer/Mixer.c -#, fuzzy msgid "bits_per_sample must be 8 or 16" -msgstr "bits devem ser 8" +msgstr "bits_per_sample deve ser 8 ou 16" #: py/emitinlinethumb.c -#, fuzzy msgid "branch not in range" -msgstr "Calibração está fora do intervalo" +msgstr "ramo fora do alcance" #: shared-bindings/audiocore/RawSample.c msgid "buffer must be a bytes-like object" -msgstr "" +msgstr "o buffer deve ser um objeto como bytes" #: shared-module/struct/__init__.c -#, fuzzy msgid "buffer size must match format" -msgstr "buffers devem ser o mesmo tamanho" +msgstr "o tamanho do buffer deve coincidir com o formato" #: shared-bindings/bitbangio/SPI.c shared-bindings/busio/SPI.c msgid "buffer slices must be of equal length" -msgstr "" +msgstr "as fatias do buffer devem ter o mesmo comprimento" #: py/modstruct.c shared-bindings/struct/__init__.c #: shared-module/struct/__init__.c msgid "buffer too small" -msgstr "" - -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "buffers devem ser o mesmo tamanho" +msgstr "o buffer é muito pequeno" #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" -msgstr "" +msgstr "os botões devem ser digitalio.DigitalInOut" #: py/vm.c msgid "byte code not implemented" -msgstr "" +msgstr "o código dos bytes ainda não foi implementado" #: shared-bindings/_pixelbuf/PixelBuf.c msgid "byteorder is not a string" -msgstr "" +msgstr "a ordem dos bytes não é uma cadeia de caracteres" #: ports/atmel-samd/common-hal/busio/UART.c msgid "bytes > 8 bits not supported" @@ -1877,7 +1947,7 @@ msgstr "bytes > 8 bits não suportado" #: py/objstr.c msgid "bytes value out of range" -msgstr "" +msgstr "o valor dos bytes estão fora do alcance" #: ports/atmel-samd/bindings/samd/Clock.c msgid "calibration is out of range" @@ -1893,144 +1963,152 @@ msgstr "Valor de calibração fora do intervalo +/- 127" #: py/emitinlinethumb.c msgid "can only have up to 4 parameters to Thumb assembly" -msgstr "" +msgstr "só pode haver até 4 parâmetros para a montagem Thumb" #: py/emitinlinextensa.c msgid "can only have up to 4 parameters to Xtensa assembly" -msgstr "" +msgstr "só pode haver até 4 parâmetros para a montagem Xtensa" #: py/persistentcode.c msgid "can only save bytecode" -msgstr "" +msgstr "apenas o bytecode pode ser salvo" #: py/objtype.c msgid "can't add special method to already-subclassed class" -msgstr "" +msgstr "não é possível adicionar o método especial à classe já subclassificada" #: py/compile.c msgid "can't assign to expression" -msgstr "" +msgstr "a expressão não pode ser atribuída" #: py/obj.c #, c-format msgid "can't convert %s to complex" -msgstr "" +msgstr "Não é possível converter %s para complex" #: py/obj.c #, c-format msgid "can't convert %s to float" -msgstr "" +msgstr "Não é possível converter %s para float" #: py/obj.c #, c-format msgid "can't convert %s to int" -msgstr "" +msgstr "Não é possível converter %s para int" #: py/objstr.c msgid "can't convert '%q' object to %q implicitly" -msgstr "" +msgstr "não é possível converter implicitamente o objeto '%q' para %q" #: py/objint.c msgid "can't convert NaN to int" -msgstr "" +msgstr "Não é possível converter NaN para int" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" -msgstr "" +msgstr "não é possível converter o endereço para int" #: py/objint.c msgid "can't convert inf to int" -msgstr "" +msgstr "não é possível converter inf para int" #: py/obj.c msgid "can't convert to complex" -msgstr "" +msgstr "não é possível converter para complex" #: py/obj.c msgid "can't convert to float" -msgstr "" +msgstr "não é possível converter para float" #: py/obj.c msgid "can't convert to int" -msgstr "" +msgstr "não é possível converter para int" #: py/objstr.c msgid "can't convert to str implicitly" -msgstr "" +msgstr "não é possível converter implicitamente para str" #: py/compile.c msgid "can't declare nonlocal in outer code" -msgstr "" +msgstr "não é possível declarar nonlocal no código externo" #: py/compile.c msgid "can't delete expression" -msgstr "" +msgstr "não é possível excluir a expressão" #: py/emitnative.c msgid "can't do binary op between '%q' and '%q'" -msgstr "" +msgstr "não é possível executar uma operação binária entre '%q' e '%q'" #: py/objcomplex.c msgid "can't do truncated division of a complex number" -msgstr "" +msgstr "não é possível fazer a divisão truncada de um número complexo" #: py/compile.c msgid "can't have multiple **x" -msgstr "" +msgstr "não pode haver vários **x" #: py/compile.c msgid "can't have multiple *x" -msgstr "" +msgstr "não pode haver vários *x" #: py/emitnative.c msgid "can't implicitly convert '%q' to 'bool'" -msgstr "" +msgstr "não é possível converter implicitamente '%q' em 'bool'" #: py/emitnative.c msgid "can't load from '%q'" -msgstr "" +msgstr "não é possível carregar a partir de '%q'" #: py/emitnative.c msgid "can't load with '%q' index" -msgstr "" +msgstr "não é possível carregar com o índice '%q'" #: py/objgenerator.c msgid "can't pend throw to just-started generator" -msgstr "" +msgstr "não pode pendurar o lançamento para o gerador recém-iniciado" #: py/objgenerator.c msgid "can't send non-None value to a just-started generator" msgstr "" +"Não é possível enviar algo que não seja um valor para um gerador recém-" +"iniciado" + +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "não é possível definir o tamanho de 512 blocos" #: py/objnamedtuple.c msgid "can't set attribute" -msgstr "" +msgstr "não é possível definir o atributo" #: py/emitnative.c msgid "can't store '%q'" -msgstr "" +msgstr "não é possível armazenar '%q'" #: py/emitnative.c msgid "can't store to '%q'" -msgstr "" +msgstr "não é possível armazenar em '%q'" #: py/emitnative.c msgid "can't store with '%q' index" -msgstr "" +msgstr "não é possível armazenar com o índice '%q'" #: py/objstr.c msgid "" "can't switch from automatic field numbering to manual field specification" msgstr "" +"não é possível alternar entre a numeração automática dos campos para a manual" #: py/objstr.c msgid "" "can't switch from manual field specification to automatic field numbering" msgstr "" +"não é possível alternar da especificação de campo manual para a automática" #: py/objtype.c msgid "cannot create '%q' instances" -msgstr "" +msgstr "não é possível criar instâncias '%q'" #: py/objtype.c msgid "cannot create instance" @@ -2042,43 +2120,46 @@ msgstr "não pode importar nome %q" #: py/builtinimport.c msgid "cannot perform relative import" -msgstr "" +msgstr "não pode executar a importação relativa" #: extmod/ulab/code/ndarray.c msgid "cannot reshape array (incompatible input/output shape)" msgstr "" +"não é possível remodelar a matriz (formato de entrada/saída incompatível)" #: py/emitnative.c msgid "casting" -msgstr "" +msgstr "fundição" #: shared-bindings/_stage/Text.c msgid "chars buffer too small" -msgstr "" +msgstr "o buffer dos caracteres é muito pequeno" #: py/modbuiltins.c msgid "chr() arg not in range(0x110000)" -msgstr "" +msgstr "o arg chr() está fora do intervalo(0x110000)" #: py/modbuiltins.c msgid "chr() arg not in range(256)" -msgstr "" +msgstr "o arg chr() está fora do intervalo(256)" #: shared-module/vectorio/Circle.c msgid "circle can only be registered in one parent" -msgstr "" +msgstr "o círculo só pode ser registrado em um pai" #: shared-bindings/displayio/Palette.c msgid "color buffer must be 3 bytes (RGB) or 4 bytes (RGB + pad byte)" -msgstr "" +msgstr "o buffer das cores deve ter 3 bytes (RGB) ou 4 bytes (RGB + pad byte)" #: shared-bindings/displayio/Palette.c msgid "color buffer must be a buffer, tuple, list, or int" -msgstr "" +msgstr "O buffer das cores deve ser um buffer, tupla, lista ou int" #: shared-bindings/displayio/Palette.c msgid "color buffer must be a bytearray or array of type 'b' or 'B'" msgstr "" +"O buffer das cores deve ser uma matriz de bytes ou uma matriz do tipo 'b' ou " +"'B'" #: shared-bindings/displayio/Palette.c msgid "color must be between 0x000000 and 0xffffff" @@ -2090,15 +2171,15 @@ msgstr "cor deve ser um int" #: py/objcomplex.c msgid "complex division by zero" -msgstr "" +msgstr "divisão complexa por zero" #: py/objfloat.c py/parsenum.c msgid "complex values not supported" -msgstr "" +msgstr "os valores complexos não compatíveis" #: extmod/moduzlib.c msgid "compression header" -msgstr "" +msgstr "compressão do cabeçalho" #: py/parse.c msgid "constant must be an integer" @@ -2106,56 +2187,63 @@ msgstr "constante deve ser um inteiro" #: py/emitnative.c msgid "conversion to object" -msgstr "" +msgstr "conversão para o objeto" #: extmod/ulab/code/filter.c msgid "convolve arguments must be linear arrays" -msgstr "" +msgstr "os argumentos convolutivos devem ser matrizes lineares" #: extmod/ulab/code/filter.c msgid "convolve arguments must be ndarrays" -msgstr "" +msgstr "os argumentos convolutivos devem ser ndarrays" #: extmod/ulab/code/filter.c msgid "convolve arguments must not be empty" -msgstr "" +msgstr "os argumentos convolutivos não devem estar vazios" #: extmod/ulab/code/ndarray.c msgid "could not broadast input array from shape" -msgstr "" +msgstr "não foi possível transmitir a matriz da entrada a partir da forma" #: extmod/ulab/code/poly.c msgid "could not invert Vandermonde matrix" -msgstr "" +msgstr "não foi possível inverter a matriz Vandermonde" + +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "não foi possível determinar a versão do cartão SD" #: extmod/ulab/code/approx.c msgid "data must be iterable" -msgstr "" +msgstr "os dados devem ser iteráveis" #: extmod/ulab/code/approx.c msgid "data must be of equal length" -msgstr "" +msgstr "os dados devem ser de igual comprimento" #: extmod/ulab/code/numerical.c msgid "ddof must be smaller than length of data set" -msgstr "" +msgstr "O ddof deve ser menor que o comprimento do conjunto dos dados" #: py/parsenum.c msgid "decimal numbers not supported" -msgstr "" +msgstr "os números decimais não são compatíveis" #: py/compile.c msgid "default 'except' must be last" -msgstr "" +msgstr "a predefinição 'exceto' deve ser o último" #: shared-bindings/audiobusio/PDMIn.c msgid "" "destination buffer must be a bytearray or array of type 'B' for bit_depth = 8" msgstr "" +"o buffer do destino deve ser um bytearray ou matriz do tipo 'B' para " +"bit_depth = 8" #: shared-bindings/audiobusio/PDMIn.c msgid "destination buffer must be an array of type 'H' for bit_depth = 16" msgstr "" +"o buffer do destino deve ser uma matriz do tipo 'H' para bit_depth = 16" #: shared-bindings/audiobusio/PDMIn.c msgid "destination_length must be an int >= 0" @@ -2163,11 +2251,11 @@ msgstr "destination_length deve ser um int >= 0" #: py/objdict.c msgid "dict update sequence has wrong length" -msgstr "" +msgstr "sequência da atualização dict tem o comprimento errado" #: extmod/ulab/code/numerical.c msgid "diff argument must be an ndarray" -msgstr "" +msgstr "O argumento diff deve ser um ndarray" #: py/modmath.c py/objfloat.c py/objint_longlong.c py/objint_mpz.c py/runtime.c #: shared-bindings/math/__init__.c @@ -2180,11 +2268,11 @@ msgstr "vazio" #: extmod/moduheapq.c extmod/modutimeq.c msgid "empty heap" -msgstr "heap vazia" +msgstr "a área de alocação dinâmica de variáveis (heap) está vazia" #: py/objstr.c msgid "empty separator" -msgstr "" +msgstr "separador vazio" #: shared-bindings/random/__init__.c msgid "empty sequence" @@ -2192,12 +2280,11 @@ msgstr "seqüência vazia" #: py/objstr.c msgid "end of format while looking for conversion specifier" -msgstr "" +msgstr "final de formato enquanto procura pelo especificador de conversão" #: shared-bindings/displayio/Shape.c -#, fuzzy msgid "end_x should be an int" -msgstr "y deve ser um int" +msgstr "end_x deve ser um int" #: ports/nrf/common-hal/busio/UART.c #, c-format @@ -2206,31 +2293,31 @@ msgstr "erro = 0x%08lX" #: py/runtime.c msgid "exceptions must derive from BaseException" -msgstr "" +msgstr "as exceções devem derivar a partir do BaseException" #: py/objstr.c msgid "expected ':' after format specifier" -msgstr "" +msgstr "é esperado ':' após o especificador do formato" #: py/obj.c msgid "expected tuple/list" -msgstr "" +msgstr "é esperada tupla/lista" #: py/modthread.c msgid "expecting a dict for keyword args" -msgstr "" +msgstr "esperando um dicionário para os args da palavra-chave" #: py/compile.c msgid "expecting an assembler instruction" -msgstr "" +msgstr "esperando uma instrução assembler" #: py/compile.c msgid "expecting just a value for set" -msgstr "" +msgstr "esperando apenas um valor para o conjunto" #: py/compile.c msgid "expecting key:value for dict" -msgstr "" +msgstr "chave esperada: valor para dict" #: py/argcheck.c msgid "extra keyword arguments given" @@ -2242,28 +2329,28 @@ msgstr "argumentos extra posicionais passados" #: py/parse.c msgid "f-string expression part cannot include a '#'" -msgstr "" +msgstr "A parte da expressão f-string não pode incluir um '#'" #: py/parse.c msgid "f-string expression part cannot include a backslash" -msgstr "" +msgstr "A parte da expressão f-string não pode incluir uma barra invertida" #: py/parse.c msgid "f-string: empty expression not allowed" -msgstr "" +msgstr "f-string: expressão vazia não é permitida" #: py/parse.c msgid "f-string: expecting '}'" -msgstr "" +msgstr "f-string: esperando '}'" #: py/parse.c msgid "f-string: single '}' is not allowed" -msgstr "" +msgstr "f-string: um único '}' não é permitido" #: shared-bindings/audiocore/WaveFile.c shared-bindings/audiomp3/MP3Decoder.c #: shared-bindings/displayio/OnDiskBitmap.c msgid "file must be a file opened in byte mode" -msgstr "" +msgstr "o arquivo deve ser um arquivo aberto no modo byte" #: shared-bindings/storage/__init__.c msgid "filesystem must provide mount method" @@ -2271,35 +2358,31 @@ msgstr "sistema de arquivos deve fornecer método de montagem" #: extmod/ulab/code/vectorise.c msgid "first argument must be a callable" -msgstr "" +msgstr "o primeiro argumento deve ser chamável" #: extmod/ulab/code/approx.c msgid "first argument must be a function" -msgstr "" +msgstr "o primeiro argumento deve ser uma função" #: extmod/ulab/code/ndarray.c msgid "first argument must be an iterable" -msgstr "" +msgstr "o primeiro argumento deve ser um iterável" #: extmod/ulab/code/vectorise.c msgid "first argument must be an ndarray" -msgstr "" +msgstr "o primeiro argumento deve ser um ndarray" #: py/objtype.c msgid "first argument to super() must be type" -msgstr "" - -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "firstbit devem ser MSB" +msgstr "o primeiro argumento para super() deve ser um tipo" #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" -msgstr "" +msgstr "a ordem do nivelamento deve ser 'C' ou 'F'" #: extmod/ulab/code/numerical.c msgid "flip argument must be an ndarray" -msgstr "" +msgstr "o argumento flip deve ser um ndarray" #: py/objint.c msgid "float too big" @@ -2307,11 +2390,11 @@ msgstr "float muito grande" #: shared-bindings/_stage/Text.c msgid "font must be 2048 bytes long" -msgstr "" +msgstr "a fonte deve ter 2048 bytes de comprimento" #: py/objstr.c msgid "format requires a dict" -msgstr "" +msgstr "formato requer um dict" #: py/objdeque.c msgid "full" @@ -2328,15 +2411,15 @@ msgstr "função esperada na maioria dos %d argumentos, obteve %d" #: py/bc.c py/objnamedtuple.c msgid "function got multiple values for argument '%q'" -msgstr "" +msgstr "A função obteve vários valores para o argumento '%q'" #: extmod/ulab/code/approx.c msgid "function has the same sign at the ends of interval" -msgstr "" +msgstr "a função tem o mesmo sinal nas extremidades do intervalo" #: extmod/ulab/code/compare.c msgid "function is implemented for scalars and ndarrays only" -msgstr "" +msgstr "A função foi implementada apenas para escalares e ndarrays" #: py/argcheck.c #, c-format @@ -2345,16 +2428,16 @@ msgstr "função ausente %d requer argumentos posicionais" #: py/bc.c msgid "function missing keyword-only argument" -msgstr "" +msgstr "falta apenas a palavra chave do argumento da função" #: py/bc.c msgid "function missing required keyword argument '%q'" -msgstr "" +msgstr "falta apenas a palavra chave do argumento '%q' da função" #: py/bc.c #, c-format msgid "function missing required positional argument #%d" -msgstr "" +msgstr "falta o argumento #%d da posição necessária da função" #: py/argcheck.c py/bc.c py/objnamedtuple.c #, c-format @@ -2367,27 +2450,27 @@ msgstr "função leva exatamente 9 argumentos" #: py/objgenerator.c msgid "generator already executing" -msgstr "" +msgstr "o gerador já está em execução" #: py/objgenerator.c msgid "generator ignored GeneratorExit" -msgstr "" +msgstr "ignorando o gerador GeneratorExit" #: shared-bindings/_stage/Layer.c msgid "graphic must be 2048 bytes long" -msgstr "" +msgstr "o gráfico deve ter 2048 bytes de comprimento" #: extmod/moduheapq.c msgid "heap must be a list" -msgstr "heap deve ser uma lista" +msgstr "a área de alocação dinâmica de variáveis (heap) deve ser uma lista" #: py/compile.c msgid "identifier redefined as global" -msgstr "" +msgstr "o identificador foi redefinido como global" #: py/compile.c msgid "identifier redefined as nonlocal" -msgstr "" +msgstr "o identificador foi redefinido como não-local" #: py/objstr.c msgid "incomplete format" @@ -2395,7 +2478,7 @@ msgstr "formato incompleto" #: py/objstr.c msgid "incomplete format key" -msgstr "" +msgstr "a chave do formato está incompleto" #: extmod/modubinascii.c msgid "incorrect padding" @@ -2403,7 +2486,7 @@ msgstr "preenchimento incorreto" #: extmod/ulab/code/ndarray.c msgid "index is out of bounds" -msgstr "" +msgstr "o índice está fora dos limites" #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c @@ -2414,55 +2497,55 @@ msgstr "Índice fora do intervalo" #: py/obj.c msgid "indices must be integers" -msgstr "" +msgstr "os índices devem ser inteiros" #: extmod/ulab/code/ndarray.c msgid "indices must be integers, slices, or Boolean lists" -msgstr "" +msgstr "os índices devem ser números inteiros, fatias ou listas booleanas" #: extmod/ulab/code/approx.c msgid "initial values must be iterable" -msgstr "" +msgstr "os valores iniciais devem ser iteráveis" #: py/compile.c msgid "inline assembler must be a function" -msgstr "" +msgstr "o assembler em linha deve ser uma função" #: extmod/ulab/code/create.c msgid "input argument must be an integer or a 2-tuple" -msgstr "" +msgstr "o argumento da entrada deve ser um número inteiro ou uma tupla de 2" #: extmod/ulab/code/fft.c msgid "input array length must be power of 2" -msgstr "" +msgstr "comprimento da matriz da entrada deve ter potência de 2" #: extmod/ulab/code/poly.c msgid "input data must be an iterable" -msgstr "" +msgstr "os dados da entrada devem ser iteráveis" #: extmod/ulab/code/linalg.c msgid "input matrix is asymmetric" -msgstr "" +msgstr "a matriz da entrada é assimétrica" #: extmod/ulab/code/linalg.c msgid "input matrix is singular" -msgstr "" +msgstr "a matriz da entrada é singular" #: extmod/ulab/code/linalg.c msgid "input must be square matrix" -msgstr "" +msgstr "a entrada deve ser uma matriz quadrada" #: extmod/ulab/code/numerical.c msgid "input must be tuple, list, range, or ndarray" -msgstr "" +msgstr "A entrada deve ser tupla, lista, intervalo ou matriz" #: extmod/ulab/code/poly.c msgid "input vectors must be of equal length" -msgstr "" +msgstr "os vetores da entrada devem ter o mesmo comprimento" #: py/parsenum.c msgid "int() arg 2 must be >= 2 and <= 36" -msgstr "" +msgstr "int() arg 2 deve ser >= 2 e <= 36" #: py/objstr.c msgid "integer required" @@ -2470,20 +2553,12 @@ msgstr "inteiro requerido" #: extmod/ulab/code/approx.c msgid "interp is defined for 1D arrays of equal length" -msgstr "" +msgstr "o interp é definido para matrizes 1D de igual comprimento" #: shared-bindings/_bleio/Adapter.c #, c-format msgid "interval must be in range %s-%s" -msgstr "" - -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "periférico I2C inválido" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "periférico SPI inválido" +msgstr "o intervalo deve estar entre %s-%s" #: lib/netutils/netutils.c msgid "invalid arguments" @@ -2503,7 +2578,7 @@ msgstr "formato inválido" #: py/objstr.c msgid "invalid format specifier" -msgstr "" +msgstr "o especificador do formato é inválido" #: extmod/modussl_axtls.c msgid "invalid key" @@ -2511,7 +2586,7 @@ msgstr "chave inválida" #: py/compile.c msgid "invalid micropython decorator" -msgstr "" +msgstr "o decorador micropython é inválido" #: shared-bindings/random/__init__.c msgid "invalid step" @@ -2519,163 +2594,164 @@ msgstr "passo inválido" #: py/compile.c py/parse.c msgid "invalid syntax" -msgstr "" +msgstr "sintaxe inválida" #: py/parsenum.c msgid "invalid syntax for integer" -msgstr "" +msgstr "sintaxe inválida para o número inteiro" #: py/parsenum.c #, c-format msgid "invalid syntax for integer with base %d" -msgstr "" +msgstr "sintaxe inválida para o número inteiro com base %d" #: py/parsenum.c msgid "invalid syntax for number" -msgstr "" +msgstr "sintaxe inválida para o número" #: py/objtype.c msgid "issubclass() arg 1 must be a class" -msgstr "" +msgstr "issubclass() arg 1 deve ser uma classe" #: py/objtype.c msgid "issubclass() arg 2 must be a class or a tuple of classes" -msgstr "" +msgstr "issubclass() arg 2 deve ser uma classe ou uma tupla de classes" #: extmod/ulab/code/ndarray.c msgid "iterables are not of the same length" -msgstr "" +msgstr "os iteráveis não têm o mesmo comprimento" #: extmod/ulab/code/linalg.c msgid "iterations did not converge" -msgstr "" +msgstr "as iterações não convergiram" #: py/objstr.c msgid "join expects a list of str/bytes objects consistent with self object" msgstr "" +"join espera uma lista de objetos str/bytes consistentes com o próprio objeto" #: py/argcheck.c msgid "keyword argument(s) not yet implemented - use normal args instead" msgstr "" +"o(s) argumento(s) de palavra-chave ainda não foi implementado - em vez " +"disso, use argumentos normais" #: py/bc.c msgid "keywords must be strings" -msgstr "" +msgstr "as palavras-chave devem ser uma cadeia de caracteres" #: py/emitinlinethumb.c py/emitinlinextensa.c msgid "label '%q' not defined" -msgstr "" +msgstr "o rótulo '%q' não foi definido" #: py/compile.c msgid "label redefined" -msgstr "" +msgstr "o rótulo foi redefinido" #: py/stream.c msgid "length argument not allowed for this type" -msgstr "" +msgstr "o argumento de comprimento não é permitido para este tipo" #: shared-bindings/audiomixer/MixerVoice.c msgid "level must be between 0 and 1" -msgstr "" +msgstr "o nível deve estar entre 0 e 1" #: py/objarray.c msgid "lhs and rhs should be compatible" -msgstr "" +msgstr "o lhs e rhs devem ser compatíveis" #: py/emitnative.c msgid "local '%q' has type '%q' but source is '%q'" -msgstr "" +msgstr "o local '%q' tem o tipo '%q', porém a origem é '%q'" #: py/emitnative.c msgid "local '%q' used before type known" -msgstr "" +msgstr "o local '%q' usado antes do tipo conhecido" #: py/vm.c msgid "local variable referenced before assignment" -msgstr "" +msgstr "a variável local referenciada antes da atribuição" #: py/objint.c msgid "long int not supported in this build" -msgstr "" +msgstr "o long int não é suportado nesta compilação" #: py/parse.c msgid "malformed f-string" -msgstr "" +msgstr "f-string malformado" #: shared-bindings/_stage/Layer.c msgid "map buffer too small" -msgstr "" +msgstr "o mapa do buffer é muito pequeno" #: py/modmath.c shared-bindings/math/__init__.c msgid "math domain error" -msgstr "" +msgstr "erro de domínio matemático" #: extmod/ulab/code/linalg.c msgid "matrix dimensions do not match" -msgstr "" +msgstr "as dimensões da matriz não coincidem" #: extmod/ulab/code/linalg.c msgid "matrix is not positive definite" -msgstr "" +msgstr "a matriz não é definitiva positiva" #: ports/nrf/common-hal/_bleio/Characteristic.c #: ports/nrf/common-hal/_bleio/Descriptor.c #, c-format msgid "max_length must be 0-%d when fixed_length is %s" -msgstr "" +msgstr "o max_length deve ser 0-%d quando Fixed_length for %s" #: py/runtime.c msgid "maximum recursion depth exceeded" -msgstr "" +msgstr "a recursão máxima da profundidade foi excedida" #: py/runtime.c #, c-format msgid "memory allocation failed, allocating %u bytes" -msgstr "" +msgstr "falha na alocação de memória, alocando %u bytes" #: py/runtime.c msgid "memory allocation failed, heap is locked" msgstr "" +"falha na alocação de memória, a área de alocação dinâmica de variáveis " +"(heap) está bloqueada" #: py/builtinimport.c msgid "module not found" -msgstr "" +msgstr "o módulo não foi encontrado" #: extmod/ulab/code/poly.c msgid "more degrees of freedom than data points" -msgstr "" +msgstr "mais graus de liberdade do que pontos de dados" #: py/compile.c msgid "multiple *x in assignment" -msgstr "" +msgstr "múltiplo *x na atribuição" #: py/objtype.c msgid "multiple bases have instance lay-out conflict" -msgstr "" +msgstr "várias bases possuem instâncias de layout com conflitos" #: py/objtype.c msgid "multiple inheritance not supported" -msgstr "" +msgstr "herança múltipla não suportada" #: py/emitnative.c msgid "must raise an object" -msgstr "" - -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "deve especificar todos sck/mosi/miso" +msgstr "deve levantar um objeto" #: py/modbuiltins.c msgid "must use keyword argument for key function" -msgstr "" +msgstr "deve usar o argumento da palavra-chave para a função da chave" #: extmod/ulab/code/numerical.c msgid "n must be between 0, and 9" -msgstr "" +msgstr "n deve estar entre 0 e 9" #: py/runtime.c msgid "name '%q' is not defined" -msgstr "" +msgstr "o nome '%q' não está definido" #: py/runtime.c msgid "name not defined" @@ -2683,11 +2759,11 @@ msgstr "nome não definido" #: py/compile.c msgid "name reused for argument" -msgstr "" +msgstr "o nome foi reutilizado para o argumento" #: py/emitnative.c msgid "native yield" -msgstr "" +msgstr "rendimento nativo" #: py/runtime.c #, c-format @@ -2696,105 +2772,113 @@ msgstr "precisa de mais de %d valores para desempacotar" #: py/objint_longlong.c py/objint_mpz.c py/runtime.c msgid "negative power with no float support" -msgstr "" +msgstr "potência negativa sem suporte de flutuação" #: py/objint_mpz.c py/runtime.c msgid "negative shift count" -msgstr "" +msgstr "contagem de turnos negativos" + +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "nenhum cartão SD" #: py/vm.c msgid "no active exception to reraise" -msgstr "" +msgstr "nenhuma exceção ativa para reraise" #: shared-bindings/socket/__init__.c shared-module/network/__init__.c msgid "no available NIC" -msgstr "" +msgstr "não há uma Placa de Rede disponível" #: py/compile.c msgid "no binding for nonlocal found" -msgstr "" +msgstr "nenhuma ligação para nonlocal foi encontrada" #: py/builtinimport.c msgid "no module named '%q'" -msgstr "" +msgstr "nenhum módulo chamado '%q'" #: shared-bindings/displayio/FourWire.c shared-bindings/displayio/I2CDisplay.c #: shared-bindings/displayio/ParallelBus.c msgid "no reset pin available" -msgstr "" +msgstr "nenhum pino de redefinição está disponível" + +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "não houve resposta do cartão SD" #: py/runtime.c msgid "no such attribute" -msgstr "" +msgstr "não há tal atributo" #: ports/nrf/common-hal/_bleio/Connection.c msgid "non-UUID found in service_uuids_whitelist" -msgstr "" +msgstr "um não UUID foi encontrado na lista service_uuids_whitelist" #: py/compile.c msgid "non-default argument follows default argument" -msgstr "" +msgstr "o argumento não predefinido segue o argumento predefinido" #: extmod/modubinascii.c msgid "non-hex digit found" -msgstr "" +msgstr "um dígito não hexadecimal foi encontrado" #: py/compile.c msgid "non-keyword arg after */**" -msgstr "" +msgstr "um arg sem palavra-chave após */ **" #: py/compile.c msgid "non-keyword arg after keyword arg" -msgstr "" +msgstr "um arg não-palavra-chave após a palavra-chave arg" #: shared-bindings/_bleio/UUID.c msgid "not a 128-bit UUID" -msgstr "" +msgstr "não é um UUID com 128 bits" #: py/objstr.c msgid "not all arguments converted during string formatting" -msgstr "" +msgstr "nem todos os argumentos são convertidos durante a formatação da string" #: py/objstr.c msgid "not enough arguments for format string" -msgstr "" +msgstr "argumentos insuficientes para o formato da string" #: extmod/ulab/code/poly.c msgid "number of arguments must be 2, or 3" -msgstr "" +msgstr "a quantidade dos argumentos deve ser 2 ou 3" #: extmod/ulab/code/create.c msgid "number of points must be at least 2" -msgstr "" +msgstr "a quantidade dos pontos deve ser pelo menos 2" #: py/obj.c #, c-format msgid "object '%s' is not a tuple or list" -msgstr "" +msgstr "o objeto '%s' não é uma tupla ou uma lista" #: py/obj.c msgid "object does not support item assignment" -msgstr "" +msgstr "O objeto não suporta a atribuição dos itens" #: py/obj.c msgid "object does not support item deletion" -msgstr "" +msgstr "objeto não suporta a exclusão do item" #: py/obj.c msgid "object has no len" -msgstr "" +msgstr "o objeto não tem len" #: py/obj.c msgid "object is not subscriptable" -msgstr "" +msgstr "O objeto não é subroteirizável" #: py/runtime.c msgid "object not an iterator" -msgstr "" +msgstr "o objeto não é um iterador" #: py/objtype.c py/runtime.c msgid "object not callable" -msgstr "" +msgstr "o objeto não é resgatável" #: py/sequence.c shared-bindings/displayio/Group.c msgid "object not in sequence" @@ -2807,121 +2891,126 @@ msgstr "objeto não iterável" #: py/obj.c #, c-format msgid "object of type '%s' has no len()" -msgstr "" +msgstr "O objeto do tipo '%s' não possui len()" #: py/obj.c msgid "object with buffer protocol required" -msgstr "" +msgstr "é necessário objeto com protocolo do buffer" #: extmod/modubinascii.c msgid "odd-length string" -msgstr "" +msgstr "sequência com comprimento ímpar" #: py/objstr.c py/objstrunicode.c msgid "offset out of bounds" -msgstr "" +msgstr "desvio fora dos limites" #: ports/nrf/common-hal/audiobusio/PDMIn.c msgid "only bit_depth=16 is supported" -msgstr "" +msgstr "apenas bit_depth = 16 é compatível" #: ports/nrf/common-hal/audiobusio/PDMIn.c msgid "only sample_rate=16000 is supported" -msgstr "" +msgstr "apenas sample_rate = 16000 é compatível" #: py/objarray.c py/objstr.c py/objstrunicode.c py/objtuple.c #: shared-bindings/nvm/ByteArray.c msgid "only slices with step=1 (aka None) are supported" msgstr "" +"apenas fatias com a etapa=1 (também conhecida como Nenhuma) são compatíveis" #: extmod/ulab/code/compare.c extmod/ulab/code/ndarray.c #: extmod/ulab/code/vectorise.c msgid "operands could not be broadcast together" -msgstr "" +msgstr "os operandos não puderam ser transmitidos juntos" #: extmod/ulab/code/numerical.c msgid "operation is not implemented on ndarrays" -msgstr "" +msgstr "a operação não foi implementada nos ndarrays" #: extmod/ulab/code/ndarray.c msgid "operation is not supported for given type" -msgstr "" +msgstr "operação não é compatível com o tipo informado" #: py/modbuiltins.c msgid "ord expects a character" -msgstr "" +msgstr "o ord espera um caractere" #: py/modbuiltins.c #, c-format msgid "ord() expected a character, but string of length %d found" msgstr "" +"o ord() esperava um caractere, porém a sequência do comprimento %d foi " +"encontrada" #: py/objint_mpz.c msgid "overflow converting long int to machine word" msgstr "" +"houve um transbordamento durante a conversão int longo para a palavra de " +"máquina" #: shared-bindings/_stage/Layer.c shared-bindings/_stage/Text.c msgid "palette must be 32 bytes long" -msgstr "" +msgstr "a paleta deve ter 32 bytes de comprimento" #: shared-bindings/displayio/Palette.c msgid "palette_index should be an int" -msgstr "" +msgstr "palette_index deve ser um int" #: py/compile.c msgid "parameter annotation must be an identifier" -msgstr "" +msgstr "a anotação do parâmetro deve ser um identificador" #: py/emitinlinextensa.c msgid "parameters must be registers in sequence a2 to a5" -msgstr "" +msgstr "os parâmetros devem ser registradores na sequência a2 até a5" #: py/emitinlinethumb.c msgid "parameters must be registers in sequence r0 to r3" -msgstr "" +msgstr "os parâmetros devem ser registradores na sequência r0 até r3" #: shared-bindings/displayio/Bitmap.c msgid "pixel coordinates out of bounds" -msgstr "" +msgstr "as coordenadas do pixel estão fora dos limites" #: shared-bindings/displayio/Bitmap.c msgid "pixel value requires too many bits" -msgstr "" +msgstr "o valor do pixel requer bits demais" #: shared-bindings/displayio/TileGrid.c shared-bindings/vectorio/VectorShape.c msgid "pixel_shader must be displayio.Palette or displayio.ColorConverter" -msgstr "" +msgstr "o pixel_shader deve ser displayio.Palette ou displayio.ColorConverter" #: shared-module/vectorio/Polygon.c msgid "polygon can only be registered in one parent" -msgstr "" +msgstr "o polígono só pode ser registrado em um pai" #: ports/atmel-samd/common-hal/pulseio/PulseIn.c #: ports/cxd56/common-hal/pulseio/PulseIn.c #: ports/nrf/common-hal/pulseio/PulseIn.c #: ports/stm/common-hal/pulseio/PulseIn.c msgid "pop from an empty PulseIn" -msgstr "" +msgstr "pop a partir de um PulseIn vazio" #: py/objset.c msgid "pop from an empty set" -msgstr "" +msgstr "pop a partir de um conjunto vazio" #: py/objlist.c msgid "pop from empty list" -msgstr "" +msgstr "pop a partir da lista vazia" #: py/objdict.c msgid "popitem(): dictionary is empty" -msgstr "" +msgstr "popitem(): o dicionário está vazio" #: py/objint_mpz.c msgid "pow() 3rd argument cannot be 0" -msgstr "" +msgstr "O terceiro argumento pow() não pode ser 0" #: py/objint_mpz.c msgid "pow() with 3 arguments requires integers" -msgstr "" +msgstr "o pow() com 3 argumentos requer números inteiros" #: extmod/modutimeq.c msgid "queue overflow" @@ -2929,52 +3018,54 @@ msgstr "estouro de fila" #: py/parse.c msgid "raw f-strings are not implemented" -msgstr "" +msgstr "o f-strings bruto não estão implementados" #: extmod/ulab/code/fft.c msgid "real and imaginary parts must be of equal length" -msgstr "" +msgstr "partes reais e imaginárias devem ter o mesmo comprimento" #: py/builtinimport.c msgid "relative import" -msgstr "" +msgstr "importação relativa" #: py/obj.c #, c-format msgid "requested length %d but object has length %d" -msgstr "" +msgstr "o comprimento solicitado %d, porém o objeto tem comprimento %d" #: py/compile.c msgid "return annotation must be an identifier" -msgstr "" +msgstr "a anotação do retorno deve ser um identificador" #: py/emitnative.c msgid "return expected '%q' but got '%q'" -msgstr "" +msgstr "o retorno esperado era '%q', porém obteve '% q'" #: shared-bindings/rgbmatrix/RGBMatrix.c #, c-format msgid "rgb_pins[%d] duplicates another pin assignment" -msgstr "" +msgstr "rgb_pins[%d] duplica outra atribuição dos pinos" #: shared-bindings/rgbmatrix/RGBMatrix.c #, c-format msgid "rgb_pins[%d] is not on the same port as clock" -msgstr "" +msgstr "rgb_pins[%d] não está na mesma porta que o clock" #: extmod/ulab/code/ndarray.c msgid "right hand side must be an ndarray, or a scalar" -msgstr "" +msgstr "o lado direito deve ser um ndarray ou um escalar" #: py/objstr.c msgid "rsplit(None,n)" -msgstr "" +msgstr "rsplit(Nenhum,n)" #: shared-bindings/audiocore/RawSample.c msgid "" "sample_source buffer must be a bytearray or array of type 'h', 'H', 'b' or " "'B'" msgstr "" +"O buffer sample_source deve ser um bytearray ou matriz do tipo 'h', 'H', 'b' " +"ou 'B'" #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "sampling rate out of range" @@ -2982,7 +3073,7 @@ msgstr "Taxa de amostragem fora do intervalo" #: py/modmicropython.c msgid "schedule stack full" -msgstr "" +msgstr "agende a pilha de função completa" #: lib/utils/pyexec.c py/builtinimport.c msgid "script compilation not supported" @@ -2990,52 +3081,67 @@ msgstr "compilação de script não suportada" #: extmod/ulab/code/ndarray.c msgid "shape must be a 2-tuple" -msgstr "" +msgstr "a forma deve ser uma tupla de 2" #: py/objstr.c msgid "sign not allowed in string format specifier" -msgstr "" +msgstr "sinal não permitido no especificador do formato da sequência" #: py/objstr.c msgid "sign not allowed with integer format specifier 'c'" -msgstr "" +msgstr "sinal não permitido com o especificador no formato inteiro 'c'" #: py/objstr.c msgid "single '}' encountered in format string" -msgstr "" +msgstr "único '}' encontrado na string do formato" #: extmod/ulab/code/linalg.c msgid "size is defined for ndarrays only" -msgstr "" +msgstr "o tamanho é definido apenas para os ndarrays" #: shared-bindings/time/__init__.c msgid "sleep length must be non-negative" -msgstr "" +msgstr "a duração do sleep não deve ser negativo" + +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "a etapa da fatia não pode ser zero" #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" -msgstr "" +msgstr "a etapa da fatia não pode ser zero" #: py/objint.c py/sequence.c msgid "small int overflow" -msgstr "" +msgstr "transbordamento int pequeno" #: main.c msgid "soft reboot\n" -msgstr "" +msgstr "reinicialização soft\n" #: extmod/ulab/code/numerical.c msgid "sort argument must be an ndarray" -msgstr "" +msgstr "o argumento da classificação deve ser um ndarray" + +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "o sos da matriz deve estar na forma (n_section, 6)" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "sos[:, 3] deve ser um em todos" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "o sosfilt requer que os argumentos sejam iteráveis" #: py/objstr.c msgid "start/end indices" -msgstr "" +msgstr "os índices de início/fim" #: shared-bindings/displayio/Shape.c -#, fuzzy msgid "start_x should be an int" -msgstr "y deve ser um int" +msgstr "start_x deve ser um int" #: shared-bindings/random/__init__.c msgid "step must be non-zero" @@ -3043,28 +3149,28 @@ msgstr "o passo deve ser diferente de zero" #: shared-bindings/busio/UART.c msgid "stop must be 1 or 2" -msgstr "" +msgstr "o stop deve ser 1 ou 2" #: shared-bindings/random/__init__.c msgid "stop not reachable from start" -msgstr "" +msgstr "stop não está acessível a partir do início" #: py/stream.c msgid "stream operation not supported" -msgstr "" +msgstr "a operação do fluxo não é compatível" #: py/objstrunicode.c msgid "string index out of range" -msgstr "" +msgstr "o índice da string está fora do intervalo" #: py/objstrunicode.c #, c-format msgid "string indices must be integers, not %s" -msgstr "" +msgstr "o índices das string devem ser números inteiros, não %s" #: py/stream.c msgid "string not supported; use bytes or bytearray" -msgstr "" +msgstr "a string não é compatível; use bytes ou bytearray" #: extmod/moductypes.c msgid "struct: cannot index" @@ -3080,11 +3186,11 @@ msgstr "struct: sem campos" #: py/objstr.c msgid "substring not found" -msgstr "" +msgstr "a substring não foi encontrada" #: py/compile.c msgid "super() can't find self" -msgstr "" +msgstr "o super() não consegue se encontrar" #: extmod/modujson.c msgid "syntax error in JSON" @@ -3092,7 +3198,7 @@ msgstr "erro de sintaxe no JSON" #: extmod/moductypes.c msgid "syntax error in uctypes descriptor" -msgstr "" +msgstr "houve um erro de sintaxe no descritor uctypes" #: shared-bindings/touchio/TouchIn.c msgid "threshold must be in the range 0-65536" @@ -3100,20 +3206,27 @@ msgstr "Limite deve estar no alcance de 0-65536" #: shared-bindings/time/__init__.c msgid "time.struct_time() takes a 9-sequence" -msgstr "" +msgstr "time.struct_time() leva uma sequência com 9" #: ports/nrf/common-hal/watchdog/WatchDogTimer.c msgid "timeout duration exceeded the maximum supported value" -msgstr "" +msgstr "a duração do tempo limite excedeu o valor máximo suportado" #: shared-bindings/busio/UART.c msgid "timeout must be 0.0-100.0 seconds" -msgstr "" +msgstr "o tempo limite deve ser entre 0.0 a 100.0 segundos" #: shared-bindings/_bleio/CharacteristicBuffer.c -#, fuzzy msgid "timeout must be >= 0.0" -msgstr "bits devem ser 8" +msgstr "o tempo limite deve ser >= 0,0" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "o tempo limite na espera pelo cartão v1" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "o tempo limite na espera pelo cartão v2" #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" @@ -3125,24 +3238,24 @@ msgstr "Muitos argumentos fornecidos com o formato dado" #: extmod/ulab/code/ndarray.c msgid "too many indices" -msgstr "" +msgstr "índices demais" #: py/runtime.c #, c-format msgid "too many values to unpack (expected %d)" -msgstr "" +msgstr "valores demais para descompactar (esperado %d)" #: extmod/ulab/code/linalg.c py/objstr.c msgid "tuple index out of range" -msgstr "" +msgstr "o índice da tupla está fora do intervalo" #: py/obj.c msgid "tuple/list has wrong length" -msgstr "" +msgstr "a tupla/lista está com tamanho incorreto" #: shared-bindings/_pixelbuf/PixelBuf.c msgid "tuple/list required on RHS" -msgstr "" +msgstr "a tupla/lista necessária no RHS" #: ports/atmel-samd/common-hal/busio/UART.c ports/nrf/common-hal/busio/UART.c #: shared-bindings/busio/UART.c @@ -3151,69 +3264,69 @@ msgstr "TX e RX não podem ser ambos" #: py/objtype.c msgid "type '%q' is not an acceptable base type" -msgstr "" +msgstr "o tipo '%q' não é um tipo base aceitável" #: py/objtype.c msgid "type is not an acceptable base type" -msgstr "" +msgstr "tipo não é um tipo base aceitável" #: py/runtime.c msgid "type object '%q' has no attribute '%q'" -msgstr "" +msgstr "o objeto tipo '%q' não possuí atributo '%q'" #: py/objtype.c msgid "type takes 1 or 3 arguments" -msgstr "" +msgstr "o tipo usa 1 ou 3 argumentos" #: py/objint_longlong.c msgid "ulonglong too large" -msgstr "" +msgstr "ulonglong é muito grande" #: py/emitnative.c msgid "unary op %q not implemented" -msgstr "" +msgstr "op %q unário não foi implementado" #: py/parse.c msgid "unexpected indent" -msgstr "" +msgstr "recuo inesperado" #: py/bc.c msgid "unexpected keyword argument" -msgstr "" +msgstr "argumento inesperado da palavra-chave" #: py/bc.c py/objnamedtuple.c msgid "unexpected keyword argument '%q'" -msgstr "" +msgstr "argumento inesperado da palavra-chave '%q'" #: py/lexer.c msgid "unicode name escapes" -msgstr "" +msgstr "escapar o nome unicode" #: py/parse.c msgid "unindent does not match any outer indentation level" -msgstr "" +msgstr "o unindent não coincide com nenhum nível de recuo externo" #: py/objstr.c #, c-format msgid "unknown conversion specifier %c" -msgstr "" +msgstr "especificador de conversão desconhecido %c" #: py/objstr.c #, c-format msgid "unknown format code '%c' for object of type '%s'" -msgstr "" +msgstr "código de formato desconhecido '%c' para o objeto do tipo '%s'" #: py/compile.c msgid "unknown type" -msgstr "" +msgstr "tipo desconhecido" #: py/emitnative.c msgid "unknown type '%q'" -msgstr "" +msgstr "tipo desconhecido '%q'" #: py/objstr.c msgid "unmatched '{' in format" -msgstr "" +msgstr "um '{' sem par no formato" #: py/objtype.c py/runtime.c msgid "unreadable attribute" @@ -3222,83 +3335,83 @@ msgstr "atributo ilegível" #: shared-bindings/displayio/TileGrid.c shared-bindings/vectorio/VectorShape.c #: shared-module/vectorio/Polygon.c msgid "unsupported %q type" -msgstr "" +msgstr "tipo %q não suportado" #: py/emitinlinethumb.c #, c-format msgid "unsupported Thumb instruction '%s' with %d arguments" -msgstr "" +msgstr "instrução Thumb '%s' não compatível com argumentos %d" #: py/emitinlinextensa.c #, c-format msgid "unsupported Xtensa instruction '%s' with %d arguments" -msgstr "" +msgstr "instrução Xtensa '%s' não compatível com argumentos %d" #: py/objstr.c #, c-format msgid "unsupported format character '%c' (0x%x) at index %d" -msgstr "" +msgstr "o caractere do formato não é compatível '%c' (0x%x) no índice %d" #: py/runtime.c msgid "unsupported type for %q: '%s'" -msgstr "" +msgstr "tipo não compatível para %q: '%s'" #: py/runtime.c msgid "unsupported type for operator" -msgstr "" +msgstr "tipo não compatível para o operador" #: py/runtime.c msgid "unsupported types for %q: '%s', '%s'" -msgstr "" +msgstr "tipos não compatíveis para %q: '%s', '%s'" #: py/objint.c #, c-format msgid "value must fit in %d byte(s)" -msgstr "" +msgstr "o valor deve caber em %d byte(s)" #: shared-bindings/displayio/Bitmap.c msgid "value_count must be > 0" -msgstr "" +msgstr "o value_count deve ser > 0" #: shared-bindings/watchdog/WatchDogTimer.c msgid "watchdog timeout must be greater than 0" -msgstr "" +msgstr "o tempo limite do watchdog deve ser maior que 0" #: shared-bindings/_bleio/Adapter.c msgid "window must be <= interval" -msgstr "" +msgstr "a janela deve ser <= intervalo" #: extmod/ulab/code/linalg.c msgid "wrong argument type" -msgstr "" +msgstr "tipo do argumento errado" #: extmod/ulab/code/ndarray.c msgid "wrong index type" -msgstr "" +msgstr "tipo do índice errado" #: extmod/ulab/code/vectorise.c msgid "wrong input type" -msgstr "" +msgstr "tipo da entrada incorreta" #: py/objstr.c msgid "wrong number of arguments" -msgstr "" +msgstr "quantidade errada dos argumentos" #: py/runtime.c msgid "wrong number of values to unpack" -msgstr "" +msgstr "quantidade incorreta dos valores para descompressão" #: extmod/ulab/code/ndarray.c msgid "wrong operand type" -msgstr "" +msgstr "tipo do operando errado" #: extmod/ulab/code/vectorise.c msgid "wrong output type" -msgstr "" +msgstr "tipo da saída incorreta" #: shared-module/displayio/Shape.c msgid "x value out of bounds" -msgstr "" +msgstr "o valor x está fora dos limites" #: shared-bindings/displayio/Shape.c msgid "y should be an int" @@ -3306,12 +3419,24 @@ msgstr "y deve ser um int" #: shared-module/displayio/Shape.c msgid "y value out of bounds" -msgstr "" +msgstr "o valor y está fora dos limites" #: py/objrange.c msgid "zero step" msgstr "passo zero" +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "zi deve ser um ndarray" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "zi deve ser de um tipo float" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "zi deve estar na forma (n_section, 2)" + #~ msgid "AP required" #~ msgstr "AP requerido" @@ -3439,6 +3564,9 @@ msgstr "passo zero" #~ msgid "GPIO16 does not support pull up." #~ msgstr "GPIO16 não suporta pull up." +#~ msgid "I2C operation not supported" +#~ msgstr "I2C operação não suportada" + #~ msgid "Invalid bit clock pin" #~ msgstr "Pino de bit clock inválido" @@ -3512,9 +3640,15 @@ msgstr "passo zero" #~ msgid "Use esptool to erase flash and re-upload Python instead" #~ msgstr "Use o esptool para apagar o flash e recarregar o Python" +#~ msgid "bits must be 8" +#~ msgstr "bits devem ser 8" + #~ msgid "buffer too long" #~ msgstr "buffer muito longo" +#~ msgid "buffers must be the same length" +#~ msgstr "buffers devem ser o mesmo tamanho" + #~ msgid "can query only one param" #~ msgstr "pode consultar apenas um parâmetro" @@ -3539,6 +3673,9 @@ msgstr "passo zero" #~ msgid "ffi_prep_closure_loc" #~ msgstr "ffi_prep_closure_loc" +#~ msgid "firstbit must be MSB" +#~ msgstr "firstbit devem ser MSB" + #~ msgid "flash location must be below 1MByte" #~ msgstr "o local do flash deve estar abaixo de 1 MByte" @@ -3548,6 +3685,12 @@ msgstr "passo zero" #~ msgid "impossible baudrate" #~ msgstr "taxa de transmissão impossível" +#~ msgid "invalid I2C peripheral" +#~ msgstr "periférico I2C inválido" + +#~ msgid "invalid SPI peripheral" +#~ msgstr "periférico SPI inválido" + #~ msgid "invalid alarm" #~ msgstr "Alarme inválido" @@ -3569,6 +3712,9 @@ msgstr "passo zero" #~ msgid "memory allocation failed, allocating %u bytes for native code" #~ msgstr "alocação de memória falhou, alocando %u bytes para código nativo" +#~ msgid "must specify all of sck/mosi/miso" +#~ msgstr "deve especificar todos sck/mosi/miso" + #, fuzzy #~ msgid "name must be a string" #~ msgstr "heap deve ser uma lista" diff --git a/locale/sv.po b/locale/sv.po index bf9bb3f5d..3ec91c19e 100644 --- a/locale/sv.po +++ b/locale/sv.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" +"POT-Creation-Date: 2020-07-02 15:29+0200\n" "PO-Revision-Date: 2020-06-03 18:59+0000\n" "Last-Translator: Jonny Bergdahl <jonny@bergdahl.it>\n" "Language-Team: LANGUAGE <LL@li.org>\n" @@ -66,6 +66,10 @@ msgstr "%%c kräver int eller char" msgid "%d address pins and %d rgb pins indicate a height of %d, not %d" msgstr "%d adresspinnar och %d RGB-pinnar indikerar en höjd av %d, inte %d" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" +msgstr "" + #: shared-bindings/microcontroller/Pin.c msgid "%q in use" msgstr "%q används redan" @@ -93,6 +97,10 @@ msgstr "%q måste vara >= 1" msgid "%q must be a tuple of length 2" msgstr "%q måste vara en tuple av längd 2" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "" + #: shared-bindings/fontio/BuiltinFont.c msgid "%q should be an int" msgstr "%q ska vara en int" @@ -299,6 +307,7 @@ msgstr "Alla händelsekanaler används" msgid "All timers for this pin are in use" msgstr "Alla timers för denna pinne är i bruk" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -306,7 +315,7 @@ msgstr "Alla timers för denna pinne är i bruk" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "Alla timers används" @@ -345,7 +354,7 @@ msgstr "Matrisen måste innehålla halfwords (typ \"H\")" msgid "Array values should be single bytes." msgstr "Matrisvärden ska bestå av enstaka bytes." -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" msgstr "Högst %d %q kan anges (inte %d)" @@ -426,6 +435,11 @@ msgstr "Bufferten är för liten" msgid "Buffer length %d too big. It must be less than %d" msgstr "Buffertlängd %d för stor. Den måste vara mindre än %d" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "" + #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" msgstr "Bufferten måste ha minst längd 1" @@ -588,6 +602,14 @@ msgstr "Skadad .mpy-fil" msgid "Corrupt raw code" msgstr "Korrupt rå kod" +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" +msgstr "" + #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "Det gick inte att initiera UART" @@ -709,7 +731,8 @@ msgstr "EXTINT-kanalen används redan" msgid "Error in regex" msgstr "Fel i regex" -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" @@ -833,10 +856,6 @@ msgstr "I/O-operation på stängd fil" msgid "I2C Init Error" msgstr "I2C init-fel" -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "I2C-åtgärd stöds inte" - #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" @@ -875,6 +894,10 @@ msgstr "Internt define-fel" msgid "Internal error #%d" msgstr "Internt fel #%d" +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Invalid %q pin" @@ -980,9 +1003,10 @@ msgstr "Ogiltig pinne för höger kanal" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -1387,6 +1411,10 @@ msgstr "Kör i säkert läge! Autoladdning är avstängd.\n" msgid "Running in safe mode! Not running saved code.\n" msgstr "Kör i säkert läge! Sparad kod körs inte.\n" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1455,6 +1483,10 @@ msgstr "Stream saknar readinto() eller write() metod." msgid "Supply at least one UART pin" msgstr "Ange minst en UART-pinne" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "Temperaturavläsning tog för lång tid" @@ -1651,6 +1683,7 @@ msgstr "" "eller ignorerades." #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "Baudrate stöd inte" @@ -1766,11 +1799,11 @@ msgstr "abort() anropad" msgid "address %08x is not aligned to %d bytes" msgstr "adressen %08x är inte justerad till %d byte" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "adress utanför gränsen" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "adresserna är tomma" @@ -1851,10 +1884,6 @@ msgstr "binär op %q är inte implementerad" msgid "bits must be 7, 8 or 9" msgstr "bits måste vara 7, 8 eller 9" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "bits måste vara 8" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "bits_per_sample måste vara 8 eller 16" @@ -1880,10 +1909,6 @@ msgstr "buffertsegmenten måste vara lika långa" msgid "buffer too small" msgstr "buffert för liten" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "buffertar måste vara samma längd" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "buttons måste vara digitalio.DigitalInOut" @@ -1959,7 +1984,7 @@ msgstr "kan inte konvertera '%q' objekt implicit till %q" msgid "can't convert NaN to int" msgstr "kan inte konvertera NaN till int" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "kan inte konvertera address till int" @@ -2027,6 +2052,10 @@ msgstr "kan inte 'pend throw' för nystartad generator" msgid "can't send non-None value to a just-started generator" msgstr "kan inte skicka icke-None värde till nystartad generator" +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "" + #: py/objnamedtuple.c msgid "can't set attribute" msgstr "kan inte att ange attribut" @@ -2155,6 +2184,10 @@ msgstr "Kan inte sända indatamatris från form" msgid "could not invert Vandermonde matrix" msgstr "kan inte invertera Vandermonde-matris" +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "" + #: extmod/ulab/code/approx.c msgid "data must be iterable" msgstr "data måste vara itererbar" @@ -2318,10 +2351,6 @@ msgstr "första argumentet måste vara en ndarray" msgid "first argument to super() must be type" msgstr "första argumentet till super() måste vara typ" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "firstbit måste vara MSB" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "förenklingsordningen måste vara antingen \"C\" eller \"F\"" @@ -2506,14 +2535,6 @@ msgstr "interp är definierad för 1D-matriser med samma längd" msgid "interval must be in range %s-%s" msgstr "interval måste vara i intervallet %s-%s" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "ogiltig I2C-kringutrustning" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "ogiltig SPI-kringutrustning" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "ogiltiga argument" @@ -2693,10 +2714,6 @@ msgstr "multipelt arv stöds inte" msgid "must raise an object" msgstr "måste ge ett objekt" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "måste ange alla av sck/mosi/miso" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "måste använda nyckelordsargument för nyckelfunktion" @@ -2734,6 +2751,10 @@ msgstr "negativ exponent utan stöd för flyttal" msgid "negative shift count" msgstr "negativt skiftantal" +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "" + #: py/vm.c msgid "no active exception to reraise" msgstr "ingen aktiv exception för reraise" @@ -2755,6 +2776,10 @@ msgstr "ingen modul med namnet '%q'" msgid "no reset pin available" msgstr "ingen reset-pinne tillgänglig" +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "" + #: py/runtime.c msgid "no such attribute" msgstr "inget sådant attribut" @@ -3047,6 +3072,10 @@ msgstr "storlek är enbart definierad ndarrays" msgid "sleep length must be non-negative" msgstr "värdet för sleep måste vara positivt" +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "" + #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" msgstr "segmentsteg får inte vara noll" @@ -3063,6 +3092,18 @@ msgstr "mjuk omstart\n" msgid "sort argument must be an ndarray" msgstr "argumentet sort måste vara en ndarray" +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "" + #: py/objstr.c msgid "start/end indices" msgstr "start-/slutindex" @@ -3148,6 +3189,14 @@ msgstr "timeout måste vara 0.0-100.0 sekunder" msgid "timeout must be >= 0.0" msgstr "timeout måste vara >= 0.0" +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "" + #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" msgstr "timestamp utom räckvidd för plattformens \"time_t\"" @@ -3345,8 +3394,41 @@ msgstr "y-värde utanför intervall" msgid "zero step" msgstr "noll steg" +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "" + +#~ msgid "I2C operation not supported" +#~ msgstr "I2C-åtgärd stöds inte" + #~ msgid "Negative step not supported" #~ msgstr "Negativt step stöds inte" +#~ msgid "bits must be 8" +#~ msgstr "bits måste vara 8" + +#~ msgid "buffers must be the same length" +#~ msgstr "buffertar måste vara samma längd" + #~ msgid "empty %q list" #~ msgstr "tom %q-lista" + +#~ msgid "firstbit must be MSB" +#~ msgstr "firstbit måste vara MSB" + +#~ msgid "invalid I2C peripheral" +#~ msgstr "ogiltig I2C-kringutrustning" + +#~ msgid "invalid SPI peripheral" +#~ msgstr "ogiltig SPI-kringutrustning" + +#~ msgid "must specify all of sck/mosi/miso" +#~ msgstr "måste ange alla av sck/mosi/miso" diff --git a/locale/zh_Latn_pinyin.po b/locale/zh_Latn_pinyin.po index 9f44fbd9e..db41adb53 100644 --- a/locale/zh_Latn_pinyin.po +++ b/locale/zh_Latn_pinyin.po @@ -7,7 +7,7 @@ msgid "" msgstr "" "Project-Id-Version: circuitpython-cn\n" "Report-Msgid-Bugs-To: \n" -"POT-Creation-Date: 2020-06-01 17:10-0700\n" +"POT-Creation-Date: 2020-07-02 15:29+0200\n" "PO-Revision-Date: 2019-04-13 10:10-0700\n" "Last-Translator: hexthat\n" "Language-Team: Chinese Hanyu Pinyin\n" @@ -65,6 +65,10 @@ msgstr "%%c xūyào zhěngshù huò char" msgid "%d address pins and %d rgb pins indicate a height of %d, not %d" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q failure: %d" +msgstr "" + #: shared-bindings/microcontroller/Pin.c msgid "%q in use" msgstr "%q zhèngzài shǐyòng" @@ -92,6 +96,10 @@ msgstr "%q bìxū dàyú huò děngyú 1" msgid "%q must be a tuple of length 2" msgstr "" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +msgid "%q pin invalid" +msgstr "" + #: shared-bindings/fontio/BuiltinFont.c msgid "%q should be an int" msgstr "%q yīnggāi shì yīgè int" @@ -298,6 +306,7 @@ msgstr "Suǒyǒu tóngbù shìjiàn píndào shǐyòng" msgid "All timers for this pin are in use" msgstr "Cǐ yǐn jiǎo de suǒyǒu jìshí qì zhèngzài shǐyòng" +#: ports/atmel-samd/common-hal/_pew/PewPew.c #: ports/atmel-samd/common-hal/audioio/AudioOut.c #: ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c #: ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -305,7 +314,7 @@ msgstr "Cǐ yǐn jiǎo de suǒyǒu jìshí qì zhèngzài shǐyòng" #: ports/cxd56/common-hal/pulseio/PulseOut.c #: ports/nrf/common-hal/audiopwmio/PWMAudioOut.c #: ports/nrf/common-hal/pulseio/PulseIn.c ports/nrf/peripherals/nrf/timers.c -#: shared-bindings/pulseio/PWMOut.c shared-module/_pew/PewPew.c +#: shared-bindings/pulseio/PWMOut.c msgid "All timers in use" msgstr "Suǒyǒu jìshí qì shǐyòng" @@ -344,7 +353,7 @@ msgstr "Shùzǔ bìxū bāohán bàn zìshù (type 'H')" msgid "Array values should be single bytes." msgstr "Shùzǔ zhí yīnggāi shì dāngè zì jié." -#: shared-bindings/rgbmatrix/RGBMatrix.c +#: shared-bindings/microcontroller/Pin.c msgid "At most %d %q may be specified (not %d)" msgstr "" @@ -425,6 +434,11 @@ msgstr "Huǎnchōng qū tài xiǎo" msgid "Buffer length %d too big. It must be less than %d" msgstr "Huǎnchōng qū chángdù%d tài dà. Tā bìxū xiǎoyú%d" +#: ports/atmel-samd/common-hal/sdioio/SDCard.c +#: ports/cxd56/common-hal/sdioio/SDCard.c shared-module/sdcardio/SDCard.c +msgid "Buffer length must be a multiple of 512" +msgstr "" + #: shared-bindings/bitbangio/I2C.c shared-bindings/busio/I2C.c msgid "Buffer must be at least length 1" msgstr "Huǎnchōng qū bìxū zhìshǎo chángdù 1" @@ -583,6 +597,14 @@ msgstr "Fǔbài de .mpy wénjiàn" msgid "Corrupt raw code" msgstr "Sǔnhuài de yuánshǐ dàimǎ" +#: ports/cxd56/common-hal/gnss/GNSS.c +msgid "Could not initialize GNSS" +msgstr "" + +#: ports/cxd56/common-hal/sdioio/SDCard.c +msgid "Could not initialize SDCard" +msgstr "" + #: ports/atmel-samd/common-hal/busio/UART.c ports/cxd56/common-hal/busio/UART.c msgid "Could not initialize UART" msgstr "Wúfǎ chūshǐhuà UART" @@ -704,7 +726,8 @@ msgstr "EXTINT píndào yǐjīng shǐyòng" msgid "Error in regex" msgstr "Zhèngzé biǎodá shì cuòwù" -#: shared-bindings/aesio/aes.c shared-bindings/microcontroller/Pin.c +#: shared-bindings/aesio/aes.c shared-bindings/busio/SPI.c +#: shared-bindings/microcontroller/Pin.c #: shared-bindings/neopixel_write/__init__.c shared-bindings/pulseio/PulseOut.c #: shared-bindings/terminalio/Terminal.c msgid "Expected a %q" @@ -828,10 +851,6 @@ msgstr "Wénjiàn shàng de I/ O cāozuò" msgid "I2C Init Error" msgstr "I2C chūshǐhuà cuòwù" -#: extmod/machine_i2c.c -msgid "I2C operation not supported" -msgstr "I2C cāozuò bù zhīchí" - #: shared-bindings/aesio/aes.c #, c-format msgid "IV must be %d bytes long" @@ -870,6 +889,10 @@ msgstr "Nèibù dìngyì cuòwù" msgid "Internal error #%d" msgstr "" +#: shared-bindings/sdioio/SDCard.c +msgid "Invalid %q" +msgstr "" + #: ports/atmel-samd/common-hal/audiobusio/I2SOut.c #: ports/atmel-samd/common-hal/audiobusio/PDMIn.c msgid "Invalid %q pin" @@ -975,9 +998,10 @@ msgstr "Yòuxián tōngdào yǐn jiǎo wúxiào" #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/atmel-samd/common-hal/busio/SPI.c #: ports/atmel-samd/common-hal/busio/UART.c -#: ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +#: ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c #: ports/cxd56/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/SPI.c -#: ports/cxd56/common-hal/busio/UART.c ports/mimxrt10xx/common-hal/busio/I2C.c +#: ports/cxd56/common-hal/busio/UART.c ports/cxd56/common-hal/sdioio/SDCard.c +#: ports/mimxrt10xx/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/SPI.c #: ports/mimxrt10xx/common-hal/busio/UART.c ports/nrf/common-hal/busio/I2C.c msgid "Invalid pins" @@ -1376,6 +1400,10 @@ msgstr "Zài ānquán móshì xià yùnxíng! Zìdòng chóngxīn jiāzài yǐ g msgid "Running in safe mode! Not running saved code.\n" msgstr "Zài ānquán móshì xià yùnxíng! Bù yùnxíng yǐ bǎocún de dàimǎ.\n" +#: shared-module/sdcardio/SDCard.c +msgid "SD card CSD format not supported" +msgstr "" + #: ports/atmel-samd/common-hal/busio/I2C.c #: ports/mimxrt10xx/common-hal/busio/I2C.c ports/nrf/common-hal/busio/I2C.c msgid "SDA or SCL needs a pull up" @@ -1444,6 +1472,10 @@ msgstr "Liú quēshǎo readinto() huò write() fāngfǎ." msgid "Supply at least one UART pin" msgstr "Dìngyì zhìshǎo yīgè UART yǐn jiǎo" +#: shared-bindings/gnss/GNSS.c +msgid "System entry must be gnss.SatelliteSystem" +msgstr "" + #: ports/stm/common-hal/microcontroller/Processor.c msgid "Temperature read timed out" msgstr "" @@ -1639,6 +1671,7 @@ msgstr "" "huò hūlüè." #: ports/atmel-samd/common-hal/busio/I2C.c ports/cxd56/common-hal/busio/I2C.c +#: ports/stm/common-hal/busio/I2C.c msgid "Unsupported baudrate" msgstr "Bù zhīchí de baudrate" @@ -1753,11 +1786,11 @@ msgstr "zhōngzhǐ () diàoyòng" msgid "address %08x is not aligned to %d bytes" msgstr "wèi zhǐ %08x wèi yǔ %d wèi yuán zǔ duìqí" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "address out of bounds" msgstr "dìzhǐ chāochū biānjiè" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "addresses is empty" msgstr "dìzhǐ wèi kōng" @@ -1838,10 +1871,6 @@ msgstr "èrjìnzhì bǎn qián bǎn %q wèi zhíxíng" msgid "bits must be 7, 8 or 9" msgstr "bǐtè bìxū shì 7,8 huò 9" -#: extmod/machine_spi.c -msgid "bits must be 8" -msgstr "bǐtè bìxū shì 8" - #: shared-bindings/audiomixer/Mixer.c msgid "bits_per_sample must be 8 or 16" msgstr "měi jiàn yàngběn bìxū wèi 8 huò 16" @@ -1867,10 +1896,6 @@ msgstr "huǎnchōng qū qiēpiàn bìxū chángdù xiāngděng" msgid "buffer too small" msgstr "huǎnchōng qū tài xiǎo" -#: extmod/machine_spi.c -msgid "buffers must be the same length" -msgstr "huǎnchōng qū bìxū shì chángdù xiāngtóng" - #: shared-bindings/_pew/PewPew.c msgid "buttons must be digitalio.DigitalInOut" msgstr "ànniǔ bìxū shì digitalio.DigitalInOut" @@ -1946,7 +1971,7 @@ msgstr "wúfǎ jiāng '%q' duìxiàng zhuǎnhuàn wèi %q yǐn hán" msgid "can't convert NaN to int" msgstr "wúfǎ jiāng dǎoháng zhuǎnhuàn wèi int" -#: shared-bindings/i2cslave/I2CSlave.c +#: shared-bindings/i2cperipheral/I2CPeripheral.c msgid "can't convert address to int" msgstr "wúfǎ jiāng dìzhǐ zhuǎnhuàn wèi int" @@ -2014,6 +2039,10 @@ msgstr "bùnéng bǎ tā rēng dào gāng qǐdòng de fā diànjī shàng" msgid "can't send non-None value to a just-started generator" msgstr "wúfǎ xiàng gānggāng qǐdòng de shēngchéng qì fāsòng fēi zhí" +#: shared-module/sdcardio/SDCard.c +msgid "can't set 512 block size" +msgstr "" + #: py/objnamedtuple.c msgid "can't set attribute" msgstr "wúfǎ shèzhì shǔxìng" @@ -2143,6 +2172,10 @@ msgstr "" msgid "could not invert Vandermonde matrix" msgstr "" +#: shared-module/sdcardio/SDCard.c +msgid "couldn't determine SD card version" +msgstr "" + #: extmod/ulab/code/approx.c msgid "data must be iterable" msgstr "" @@ -2304,10 +2337,6 @@ msgstr "" msgid "first argument to super() must be type" msgstr "chāojí () de dì yī gè cānshù bìxū shì lèixíng" -#: extmod/machine_spi.c -msgid "firstbit must be MSB" -msgstr "dì yī wèi bìxū shì MSB" - #: extmod/ulab/code/ndarray.c msgid "flattening order must be either 'C', or 'F'" msgstr "" @@ -2492,14 +2521,6 @@ msgstr "" msgid "interval must be in range %s-%s" msgstr "Jiàngé bìxū zài %s-%s fànwéi nèi" -#: extmod/machine_i2c.c -msgid "invalid I2C peripheral" -msgstr "wúxiào de I2C wàiwéi qì" - -#: extmod/machine_spi.c -msgid "invalid SPI peripheral" -msgstr "wúxiào de SPI wàiwéi qì" - #: lib/netutils/netutils.c msgid "invalid arguments" msgstr "wúxiào de cānshù" @@ -2677,10 +2698,6 @@ msgstr "bù zhīchí duō gè jìchéng" msgid "must raise an object" msgstr "bìxū tíchū duìxiàng" -#: extmod/machine_spi.c -msgid "must specify all of sck/mosi/miso" -msgstr "bìxū zhǐdìng suǒyǒu sck/mosi/misco" - #: py/modbuiltins.c msgid "must use keyword argument for key function" msgstr "bìxū shǐyòng guānjiàn cí cānshù" @@ -2719,6 +2736,10 @@ msgstr "méiyǒu fú diǎn zhīchí de xiāojí gōnglǜ" msgid "negative shift count" msgstr "fù zhuǎnyí jìshù" +#: shared-module/sdcardio/SDCard.c +msgid "no SD card" +msgstr "" + #: py/vm.c msgid "no active exception to reraise" msgstr "méiyǒu jīhuó de yìcháng lái chóngxīn píngjià" @@ -2740,6 +2761,10 @@ msgstr "méiyǒu mókuài '%q'" msgid "no reset pin available" msgstr "Méiyǒu kěyòng de fùwèi yǐn jiǎo" +#: shared-module/sdcardio/SDCard.c +msgid "no response from SD card" +msgstr "" + #: py/runtime.c msgid "no such attribute" msgstr "méiyǒu cǐ shǔxìng" @@ -3031,6 +3056,10 @@ msgstr "" msgid "sleep length must be non-negative" msgstr "shuìmián chángdù bìxū shìfēi fùshù" +#: extmod/ulab/code/ndarray.c +msgid "slice step can't be zero" +msgstr "" + #: py/objslice.c py/sequence.c msgid "slice step cannot be zero" msgstr "qiēpiàn bù bùnéng wéi líng" @@ -3047,6 +3076,18 @@ msgstr "ruǎn chóngqǐ\n" msgid "sort argument must be an ndarray" msgstr "" +#: extmod/ulab/code/filter.c +msgid "sos array must be of shape (n_section, 6)" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sos[:, 3] should be all ones" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "sosfilt requires iterable arguments" +msgstr "" + #: py/objstr.c msgid "start/end indices" msgstr "kāishǐ/jiéshù zhǐshù" @@ -3132,6 +3173,14 @@ msgstr "Chāo shí shíjiān bìxū wèi 0.0 Dào 100.0 Miǎo" msgid "timeout must be >= 0.0" msgstr "chāoshí bìxū shì >= 0.0" +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v1 card" +msgstr "" + +#: shared-module/sdcardio/SDCard.c +msgid "timeout waiting for v2 card" +msgstr "" + #: shared-bindings/time/__init__.c msgid "timestamp out of range for platform time_t" msgstr "time_t shíjiān chuō chāochū píngtái fànwéi" @@ -3329,6 +3378,18 @@ msgstr "y zhí chāochū biānjiè" msgid "zero step" msgstr "líng bù" +#: extmod/ulab/code/filter.c +msgid "zi must be an ndarray" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of float type" +msgstr "" + +#: extmod/ulab/code/filter.c +msgid "zi must be of shape (n_section, 2)" +msgstr "" + #~ msgid "Address is not %d bytes long or is in wrong format" #~ msgstr "Dìzhǐ bùshì %d zì jié zhǎng, huòzhě géshì cuòwù" @@ -3485,6 +3546,9 @@ msgstr "líng bù" #~ msgid "Flash write failed to start, err 0x%04x" #~ msgstr "Flash xiě rù shībài, err 0x%04x" +#~ msgid "I2C operation not supported" +#~ msgstr "I2C cāozuò bù zhīchí" + #~ msgid "Invalid bit clock pin" #~ msgstr "Wúxiào de wèi shízhōng yǐn jiǎo" @@ -3605,9 +3669,15 @@ msgstr "líng bù" #~ msgid "bad GATT role" #~ msgstr "zǒng xiédìng de bùliáng juésè" +#~ msgid "bits must be 8" +#~ msgstr "bǐtè bìxū shì 8" + #~ msgid "buf is too small. need %d bytes" #~ msgstr "huǎnchōng tài xiǎo. Xūyào%d zì jié" +#~ msgid "buffers must be the same length" +#~ msgstr "huǎnchōng qū bìxū shì chángdù xiāngtóng" + #~ msgid "byteorder is not an instance of ByteOrder (got a %s)" #~ msgstr "zì jié bùshì zì jié xù shílì (yǒu %s)" @@ -3620,9 +3690,21 @@ msgstr "líng bù" #~ msgid "expected a DigitalInOut" #~ msgstr "qídài de DigitalInOut" +#~ msgid "firstbit must be MSB" +#~ msgstr "dì yī wèi bìxū shì MSB" + #~ msgid "interval not in range 0.0020 to 10.24" #~ msgstr "jùlí 0.0020 Zhì 10.24 Zhī jiān de jiàngé shíjiān" +#~ msgid "invalid I2C peripheral" +#~ msgstr "wúxiào de I2C wàiwéi qì" + +#~ msgid "invalid SPI peripheral" +#~ msgstr "wúxiào de SPI wàiwéi qì" + +#~ msgid "must specify all of sck/mosi/miso" +#~ msgstr "bìxū zhǐdìng suǒyǒu sck/mosi/misco" + #~ msgid "name must be a string" #~ msgstr "míngchēng bìxū shì yīgè zìfú chuàn" diff --git a/ports/atmel-samd/Makefile b/ports/atmel-samd/Makefile index d0ab65e6b..c308105a3 100644 --- a/ports/atmel-samd/Makefile +++ b/ports/atmel-samd/Makefile @@ -86,17 +86,27 @@ INC += -I. \ # NDEBUG disables assert() statements. This reduces code size pretty dramatically, per tannewt. ifeq ($(CHIP_FAMILY), samd21) +PERIPHERALS_CHIP_FAMILY=samd21 CFLAGS += -Os -DNDEBUG # TinyUSB defines CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_SAMD21 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=128 -DCFG_TUD_MSC_BUFSIZE=512 endif ifeq ($(CHIP_FAMILY), samd51) +PERIPHERALS_CHIP_FAMILY=sam_d5x_e5x CFLAGS += -Os -DNDEBUG # TinyUSB defines CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_SAMD51 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=256 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=256 -DCFG_TUD_MSC_BUFSIZE=1024 endif +ifeq ($(CHIP_FAMILY), same54) +PERIPHERALS_CHIP_FAMILY=sam_d5x_e5x +CFLAGS += -Os -DNDEBUG +# TinyUSB defines +CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_SAMD51 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_CDC_RX_BUFSIZE=256 -DCFG_TUD_MIDI_TX_BUFSIZE=128 -DCFG_TUD_CDC_TX_BUFSIZE=256 -DCFG_TUD_MSC_BUFSIZE=1024 +endif + +$(echo PERIPHERALS_CHIP_FAMILY=$(PERIPHERALS_CHIP_FAMILY)) #Debugging/Optimization ifeq ($(DEBUG), 1) CFLAGS += -ggdb @@ -152,7 +162,16 @@ CFLAGS += \ -mcpu=cortex-m4 \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ - -DSAMD51 + -DSAM_D5X_E5X -DSAMD51 +endif +ifeq ($(CHIP_FAMILY), same54) +CFLAGS += \ + -mthumb \ + -mabi=aapcs-linux \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mfpu=fpv4-sp-d16 \ + -DSAM_D5X_E5X -DSAME54 endif @@ -171,6 +190,9 @@ BOOTLOADER_SIZE := 0x2000 else ifeq ($(CHIP_FAMILY), samd51) LDFLAGS += -mthumb -mcpu=cortex-m4 BOOTLOADER_SIZE := 0x4000 +else ifeq ($(CHIP_FAMILY), same54) +LDFLAGS += -mthumb -mcpu=cortex-m4 +BOOTLOADER_SIZE := 0x4000 endif SRC_ASF := \ @@ -206,6 +228,15 @@ SRC_ASF += \ else ifeq ($(CHIP_FAMILY), samd51) SRC_ASF += \ + hal/src/hal_rand_sync.c \ + hpl/core/hpl_core_m4.c \ + hpl/mclk/hpl_mclk.c \ + hpl/osc32kctrl/hpl_osc32kctrl.c \ + hpl/oscctrl/hpl_oscctrl.c \ + hpl/trng/hpl_trng.c \ + +else ifeq ($(CHIP_FAMILY), same54) +SRC_ASF += \ hal/src/hal_rand_sync.c \ hpl/core/hpl_core_m4.c \ hpl/mclk/hpl_mclk.c \ @@ -215,6 +246,14 @@ SRC_ASF += \ endif +ifeq ($(CIRCUITPY_SDIOIO),1) +SRC_ASF += \ + hal/src/hal_mci_sync.c \ + hpl/sdhc/hpl_sdhc.c \ + +$(BUILD)/asf4/$(CHIP_FAMILY)/hpl/sdhc/hpl_sdhc.o: CFLAGS += -Wno-cast-align +endif + SRC_ASF := $(addprefix asf4/$(CHIP_FAMILY)/, $(SRC_ASF)) SRC_C = \ @@ -240,15 +279,15 @@ SRC_C = \ lib/utils/stdout_helpers.c \ lib/utils/sys_stdio_mphal.c \ mphalport.c \ - peripherals/samd/$(CHIP_FAMILY)/adc.c \ - peripherals/samd/$(CHIP_FAMILY)/cache.c \ - peripherals/samd/$(CHIP_FAMILY)/clocks.c \ - peripherals/samd/$(CHIP_FAMILY)/dma.c \ - peripherals/samd/$(CHIP_FAMILY)/events.c \ - peripherals/samd/$(CHIP_FAMILY)/external_interrupts.c \ - peripherals/samd/$(CHIP_FAMILY)/pins.c \ - peripherals/samd/$(CHIP_FAMILY)/sercom.c \ - peripherals/samd/$(CHIP_FAMILY)/timers.c \ + peripherals/samd/$(PERIPHERALS_CHIP_FAMILY)/adc.c \ + peripherals/samd/$(PERIPHERALS_CHIP_FAMILY)/cache.c \ + peripherals/samd/$(PERIPHERALS_CHIP_FAMILY)/clocks.c \ + peripherals/samd/$(PERIPHERALS_CHIP_FAMILY)/dma.c \ + peripherals/samd/$(PERIPHERALS_CHIP_FAMILY)/events.c \ + peripherals/samd/$(PERIPHERALS_CHIP_FAMILY)/external_interrupts.c \ + peripherals/samd/$(PERIPHERALS_CHIP_FAMILY)/pins.c \ + peripherals/samd/$(PERIPHERALS_CHIP_FAMILY)/sercom.c \ + peripherals/samd/$(PERIPHERALS_CHIP_FAMILY)/timers.c \ peripherals/samd/clocks.c \ peripherals/samd/dma.c \ peripherals/samd/events.c \ @@ -259,6 +298,9 @@ SRC_C = \ supervisor/shared/memory.c \ timer_handler.c \ +ifeq ($(CIRCUITPY_SDIOIO),1) +SRC_C += ports/atmel-samd/sd_mmc/sd_mmc.c +endif ifeq ($(CIRCUITPY_NETWORK),1) CFLAGS += -DMICROPY_PY_NETWORK=1 @@ -288,7 +330,7 @@ endif # The smallest SAMD51 packages don't have I2S. Everything else does. ifeq ($(CIRCUITPY_AUDIOBUSIO),1) -SRC_C += peripherals/samd/i2s.c peripherals/samd/$(CHIP_FAMILY)/i2s.c +SRC_C += peripherals/samd/i2s.c peripherals/samd/$(PERIPHERALS_CHIP_FAMILY)/i2s.c endif SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \ @@ -315,9 +357,13 @@ endif OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_MOD:.c=.o)) +SRC_QSTR += $(HEADER_BUILD)/sdiodata.h +$(HEADER_BUILD)/sdiodata.h: $(TOP)/tools/mksdiodata.py | $(HEADER_BUILD) + $(Q)$(PYTHON3) $< > $@ + SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED) # Sources that only hold QSTRs after pre-processing. -SRC_QSTR_PREPROCESSOR += peripherals/samd/$(CHIP_FAMILY)/clocks.c +SRC_QSTR_PREPROCESSOR += peripherals/samd/$(PERIPHERALS_CHIP_FAMILY)/clocks.c all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 diff --git a/ports/atmel-samd/README.rst b/ports/atmel-samd/README.rst index a6881902e..0746d1de0 100644 --- a/ports/atmel-samd/README.rst +++ b/ports/atmel-samd/README.rst @@ -21,4 +21,4 @@ Port Specific modules --------------------- .. toctree:: - ../../autoapi/samd/index + ../../shared-bindings/samd/index diff --git a/ports/atmel-samd/asf4 b/ports/atmel-samd/asf4 -Subproject 039b5f3bbc3f4ba4421e581db290560d59fef62 +Subproject 35a1525796c7ef8a3893d90befdad2f267fca20 diff --git a/ports/atmel-samd/asf4_conf/samd51/hpl_sdhc_config.h b/ports/atmel-samd/asf4_conf/samd51/hpl_sdhc_config.h new file mode 100644 index 000000000..daa662051 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/samd51/hpl_sdhc_config.h @@ -0,0 +1,24 @@ +/* Auto-generated config file hpl_sdhc_config.h */ +#ifndef HPL_SDHC_CONFIG_H +#define HPL_SDHC_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +#include "peripheral_clk_config.h" + +#ifndef CONF_BASE_FREQUENCY +#define CONF_BASE_FREQUENCY CONF_SDHC0_FREQUENCY +#endif + +// <o> Clock Generator Select +// <0=> Divided Clock mode +// <1=> Programmable Clock mode +// <i> This defines the clock generator mode in the SDCLK Frequency Select field +// <id> sdhc_clk_gsel +#ifndef CONF_SDHC0_CLK_GEN_SEL +#define CONF_SDHC0_CLK_GEN_SEL 0 +#endif + +// <<< end of configuration section >>> + +#endif // HPL_SDHC_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/samd51/peripheral_clk_config.h b/ports/atmel-samd/asf4_conf/samd51/peripheral_clk_config.h index 030a90a7a..59fe8730e 100644 --- a/ports/atmel-samd/asf4_conf/samd51/peripheral_clk_config.h +++ b/ports/atmel-samd/asf4_conf/samd51/peripheral_clk_config.h @@ -1001,6 +1001,170 @@ #define CONF_GCLK_USB_FREQUENCY 48000000 #endif +// <h> SDHC Clock Settings +// <y> SDHC Clock source + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for SDHC. +// <id> sdhc_gclk_selection +#ifndef CONF_GCLK_SDHC0_SRC +#define CONF_GCLK_SDHC0_SRC GCLK_GENCTRL_SRC_DFLL_Val +#endif + +// <y> SDHC clock slow source + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for SDHC. +// <id> sdhc_slow_gclk_selection +#ifndef CONF_GCLK_SDHC0_SLOW_SRC +#define CONF_GCLK_SDHC0_SLOW_SRC GCLK_GENCTRL_SRC_DFLL_Val +#endif +// </h> + +/** + * \def SDHC FREQUENCY + * \brief SDHC's Clock frequency + */ +#ifndef CONF_SDHC0_FREQUENCY +#define CONF_SDHC0_FREQUENCY 12000000 +#endif + +/** + * \def SDHC FREQUENCY + * \brief SDHC's Clock slow frequency + */ +#ifndef CONF_SDHC0_SLOW_FREQUENCY +#define CONF_SDHC0_SLOW_FREQUENCY 12000000 +#endif + +// <h> SDHC Clock Settings +// <y> SDHC Clock source + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for SDHC. +// <id> sdhc_gclk_selection +#ifndef CONF_GCLK_SDHC1_SRC +#define CONF_GCLK_SDHC1_SRC GCLK_GENCTRL_SRC_DFLL_Val +#endif + +// <y> SDHC clock slow source + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for SDHC. +// <id> sdhc_slow_gclk_selection +#ifndef CONF_GCLK_SDHC1_SLOW_SRC +#define CONF_GCLK_SDHC1_SLOW_SRC GCLK_GENCTRL_SRC_DFLL_Val +#endif +// </h> + +/** + * \def SDHC FREQUENCY + * \brief SDHC's Clock frequency + */ +#ifndef CONF_SDHC1_FREQUENCY +#define CONF_SDHC1_FREQUENCY 12000000 +#endif + +/** + * \def SDHC FREQUENCY + * \brief SDHC's Clock slow frequency + */ +#ifndef CONF_SDHC1_SLOW_FREQUENCY +#define CONF_SDHC1_SLOW_FREQUENCY 12000000 +#endif + // <<< end of configuration section >>> #endif // PERIPHERAL_CLK_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_adc_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_adc_config.h new file mode 100644 index 000000000..13d815102 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_adc_config.h @@ -0,0 +1,303 @@ +/* Auto-generated config file hpl_adc_config.h */ +#ifndef HPL_ADC_CONFIG_H +#define HPL_ADC_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +#ifndef CONF_ADC_0_ENABLE +#define CONF_ADC_0_ENABLE 1 +#endif + +// <h> Basic Configuration + +// <o> Conversion Result Resolution +// <0x0=>12-bit +// <0x1=>16-bit (averaging must be enabled) +// <0x2=>10-bit +// <0x3=>8-bit +// <i> Defines the bit resolution for the ADC sample values (RESSEL) +// <id> adc_resolution +#ifndef CONF_ADC_0_RESSEL +#define CONF_ADC_0_RESSEL 0x0 +#endif + +// <o> Reference Selection +// <0x0=>Internal bandgap reference +// <0x2=>1/2 VDDANA (only for VDDANA > 2.0V) +// <0x3=>VDDANA +// <0x4=>External reference A +// <0x5=>External reference B +// <0x6=>External reference C +// <i> Select the reference for the ADC (REFSEL) +// <id> adc_reference +#ifndef CONF_ADC_0_REFSEL +#define CONF_ADC_0_REFSEL 0x0 +#endif + +// <o> Prescaler configuration +// <0x0=>Peripheral clock divided by 2 +// <0x1=>Peripheral clock divided by 4 +// <0x2=>Peripheral clock divided by 8 +// <0x3=>Peripheral clock divided by 16 +// <0x4=>Peripheral clock divided by 32 +// <0x5=>Peripheral clock divided by 64 +// <0x6=>Peripheral clock divided by 128 +// <0x7=>Peripheral clock divided by 256 +// <i> These bits define the ADC clock relative to the peripheral clock (PRESCALER) +// <id> adc_prescaler +#ifndef CONF_ADC_0_PRESCALER +#define CONF_ADC_0_PRESCALER 0x3 +#endif + +// <q> Free Running Mode +// <i> When enabled, the ADC is in free running mode and a new conversion will be initiated when a previous conversion completes. (FREERUN) +// <id> adc_freerunning_mode +#ifndef CONF_ADC_0_FREERUN +#define CONF_ADC_0_FREERUN 0 +#endif + +// <q> Differential Mode +// <i> In differential mode, the voltage difference between the MUXPOS and MUXNEG inputs will be converted by the ADC. (DIFFMODE) +// <id> adc_differential_mode +#ifndef CONF_ADC_0_DIFFMODE +#define CONF_ADC_0_DIFFMODE 0 +#endif + +// <o> Positive Mux Input Selection +// <0x00=>ADC AIN0 pin +// <0x01=>ADC AIN1 pin +// <0x02=>ADC AIN2 pin +// <0x03=>ADC AIN3 pin +// <0x04=>ADC AIN4 pin +// <0x05=>ADC AIN5 pin +// <0x06=>ADC AIN6 pin +// <0x07=>ADC AIN7 pin +// <0x08=>ADC AIN8 pin +// <0x09=>ADC AIN9 pin +// <0x0A=>ADC AIN10 pin +// <0x0B=>ADC AIN11 pin +// <0x0C=>ADC AIN12 pin +// <0x0D=>ADC AIN13 pin +// <0x0E=>ADC AIN14 pin +// <0x0F=>ADC AIN15 pin +// <0x18=>1/4 scaled core supply +// <0x19=>1/4 Scaled VBAT Supply +// <0x1A=>1/4 scaled I/O supply +// <0x1B=>Bandgap voltage +// <0x1C=>Temperature reference (PTAT) +// <0x1D=>Temperature reference (CTAT) +// <0x1E=>DAC Output +// <i> These bits define the Mux selection for the positive ADC input. (MUXPOS) +// <id> adc_pinmux_positive +#ifndef CONF_ADC_0_MUXPOS +#define CONF_ADC_0_MUXPOS 0x0 +#endif + +// <o> Negative Mux Input Selection +// <0x00=>ADC AIN0 pin +// <0x01=>ADC AIN1 pin +// <0x02=>ADC AIN2 pin +// <0x03=>ADC AIN3 pin +// <0x04=>ADC AIN4 pin +// <0x05=>ADC AIN5 pin +// <0x06=>ADC AIN6 pin +// <0x07=>ADC AIN7 pin +// <0x18=>Internal ground +// <0x19=>I/O ground +// <i> These bits define the Mux selection for the negative ADC input. (MUXNEG) +// <id> adc_pinmux_negative +#ifndef CONF_ADC_0_MUXNEG +#define CONF_ADC_0_MUXNEG 0x0 +#endif + +// </h> + +// <e> Advanced Configuration +// <id> adc_advanced_settings +#ifndef CONF_ADC_0_ADVANCED +#define CONF_ADC_0_ADVANCED 0 +#endif + +// <q> Run in standby +// <i> Indicates whether the ADC will continue running in standby sleep mode or not (RUNSTDBY) +// <id> adc_arch_runstdby +#ifndef CONF_ADC_0_RUNSTDBY +#define CONF_ADC_0_RUNSTDBY 0 +#endif + +// <q>Debug Run +// <i> If enabled, the ADC is running if the CPU is halted by an external debugger. (DBGRUN) +// <id> adc_arch_dbgrun +#ifndef CONF_ADC_0_DBGRUN +#define CONF_ADC_0_DBGRUN 0 +#endif + +// <q> On Demand Control +// <i> Will keep the ADC peripheral running if requested by other peripherals (ONDEMAND) +// <id> adc_arch_ondemand +#ifndef CONF_ADC_0_ONDEMAND +#define CONF_ADC_0_ONDEMAND 0 +#endif + +// <q> Left-Adjusted Result +// <i> When enabled, the ADC conversion result is left-adjusted in the RESULT register. The high byte of the 12-bit result will be present in the upper part of the result register. (LEFTADJ) +// <id> adc_arch_leftadj +#ifndef CONF_ADC_0_LEFTADJ +#define CONF_ADC_0_LEFTADJ 0 +#endif + +// <q> Reference Buffer Offset Compensation Enable +// <i> The accuracy of the gain stage can be increased by enabling the reference buffer offset compensation. This will decrease the input impedance and thus increase the start-up time of the reference. (REFCOMP) +// <id> adc_arch_refcomp +#ifndef CONF_ADC_0_REFCOMP +#define CONF_ADC_0_REFCOMP 0 +#endif + +// <q>Comparator Offset Compensation Enable +// <i> This bit indicates whether the Comparator Offset Compensation is enabled or not (OFFCOMP) +// <id> adc_arch_offcomp +#ifndef CONF_ADC_0_OFFCOMP +#define CONF_ADC_0_OFFCOMP 0 +#endif + +// <q> Digital Correction Logic Enabled +// <i> When enabled, the ADC conversion result in the RESULT register is then corrected for gain and offset based on the values in the GAINCAL and OFFSETCAL registers. (CORREN) +// <id> adc_arch_corren +#ifndef CONF_ADC_0_CORREN +#define CONF_ADC_0_CORREN 0 +#endif + +// <o> Offset Correction Value <0-4095> +// <i> If the digital correction logic is enabled (CTRLB.CORREN = 1), these bits define how the ADC conversion result is compensated for offset error before being written to the Result register. (OFFSETCORR) +// <id> adc_arch_offsetcorr +#ifndef CONF_ADC_0_OFFSETCORR +#define CONF_ADC_0_OFFSETCORR 0 +#endif + +// <o> Gain Correction Value <0-4095> +// <i> If the digital correction logic is enabled (CTRLB.CORREN = 1), these bits define how the ADC conversion result is compensated for gain error before being written to the result register. (GAINCORR) +// <id> adc_arch_gaincorr +#ifndef CONF_ADC_0_GAINCORR +#define CONF_ADC_0_GAINCORR 0 +#endif + +// <o> Adjusting Result / Division Coefficient <0-7> +// <i> These bits define the division coefficient in 2n steps. (ADJRES) +// <id> adc_arch_adjres +#ifndef CONF_ADC_0_ADJRES +#define CONF_ADC_0_ADJRES 0x0 +#endif + +// <o.0..10> Number of Samples to be Collected +// <0x0=>1 sample +// <0x1=>2 samples +// <0x2=>4 samples +// <0x3=>8 samples +// <0x4=>16 samples +// <0x5=>32 samples +// <0x6=>64 samples +// <0x7=>128 samples +// <0x8=>256 samples +// <0x9=>512 samples +// <0xA=>1024 samples +// <i> Define how many samples should be added together.The result will be available in the Result register (SAMPLENUM) +// <id> adc_arch_samplenum +#ifndef CONF_ADC_0_SAMPLENUM +#define CONF_ADC_0_SAMPLENUM 0x0 +#endif + +// <o> Sampling Time Length <0-63> +// <i> These bits control the ADC sampling time in number of half CLK_ADC cycles, depending of the prescaler value, thus controlling the ADC input impedance. (SAMPLEN) +// <id> adc_arch_samplen +#ifndef CONF_ADC_0_SAMPLEN +#define CONF_ADC_0_SAMPLEN 0 +#endif + +// <o> Window Monitor Mode +// <0x0=>No window mode +// <0x1=>Mode 1: RESULT above lower threshold +// <0x2=>Mode 2: RESULT beneath upper threshold +// <0x3=>Mode 3: RESULT inside lower and upper threshold +// <0x4=>Mode 4: RESULT outside lower and upper threshold +// <i> These bits enable and define the window monitor mode. (WINMODE) +// <id> adc_arch_winmode +#ifndef CONF_ADC_0_WINMODE +#define CONF_ADC_0_WINMODE 0x0 +#endif + +// <o> Window Monitor Lower Threshold <0-65535> +// <i> If the window monitor is enabled, these bits define the lower threshold value. (WINLT) +// <id> adc_arch_winlt +#ifndef CONF_ADC_0_WINLT +#define CONF_ADC_0_WINLT 0 +#endif + +// <o> Window Monitor Upper Threshold <0-65535> +// <i> If the window monitor is enabled, these bits define the lower threshold value. (WINUT) +// <id> adc_arch_winut +#ifndef CONF_ADC_0_WINUT +#define CONF_ADC_0_WINUT 0 +#endif + +// <o> Bitmask for positive input sequence <0-4294967295> +// <i> Use this parameter to input the bitmask for positive input sequence control (refer to datasheet for the device). +// <id> adc_arch_seqen +#ifndef CONF_ADC_0_SEQEN +#define CONF_ADC_0_SEQEN 0x0 +#endif + +// </e> + +// <e> Event Control +// <id> adc_arch_event_settings +#ifndef CONF_ADC_0_EVENT_CONTROL +#define CONF_ADC_0_EVENT_CONTROL 0 +#endif + +// <q> Window Monitor Event Out +// <i> Enables event output on window event (WINMONEO) +// <id> adc_arch_winmoneo +#ifndef CONF_ADC_0_WINMONEO +#define CONF_ADC_0_WINMONEO 0 +#endif + +// <q> Result Ready Event Out +// <i> Enables event output on result ready event (RESRDEO) +// <id> adc_arch_resrdyeo +#ifndef CONF_ADC_0_RESRDYEO +#define CONF_ADC_0_RESRDYEO 0 +#endif + +// <q> Invert flush Event Signal +// <i> Invert the flush event input signal (FLUSHINV) +// <id> adc_arch_flushinv +#ifndef CONF_ADC_0_FLUSHINV +#define CONF_ADC_0_FLUSHINV 0 +#endif + +// <q> Trigger Flush On Event +// <i> Trigger an ADC pipeline flush on event (FLUSHEI) +// <id> adc_arch_flushei +#ifndef CONF_ADC_0_FLUSHEI +#define CONF_ADC_0_FLUSHEI 0 +#endif + +// <q> Invert Start Conversion Event Signal +// <i> Invert the start conversion event input signal (STARTINV) +// <id> adc_arch_startinv +#ifndef CONF_ADC_0_STARTINV +#define CONF_ADC_0_STARTINV 0 +#endif + +// <q> Trigger Conversion On Event +// <i> Trigger a conversion on event. (STARTEI) +// <id> adc_arch_startei +#ifndef CONF_ADC_0_STARTEI +#define CONF_ADC_0_STARTEI 0 +#endif + +// </e> + +// <<< end of configuration section >>> + +#endif // HPL_ADC_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_dac_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_dac_config.h new file mode 100644 index 000000000..c46f99b7d --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_dac_config.h @@ -0,0 +1,169 @@ +/* Auto-generated config file hpl_dac_config.h */ +#ifndef HPL_DAC_CONFIG_H +#define HPL_DAC_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// <h> Basic configuration +// <o> Reference Selection +// <0x00=> Unbuffered external voltage reference +// <0x01=> Voltage supply +// <0x02=> Buffered external voltage reference +// <0x03=> Internal bandgap reference +// <id> dac_arch_refsel +#ifndef CONF_DAC_REFSEL +#define CONF_DAC_REFSEL 0 +#endif + +// <q> Differential mode +// <i> Indicates whether the differential mode is enabled or not +// <id> dac_arch_diff +#ifndef CONF_DAC_DIFF +#define CONF_DAC_DIFF 0 +#endif +// </h> + +// <e> Advanced Configuration +// <id> dac_advanced_settings +#ifndef CONF_DAC_ADVANCED_CONFIG +#define CONF_DAC_ADVANCED_CONFIG 0 +#endif + +// <q> Debug Run +// <i> Indicate whether running when CPU is halted +// <id> adc_arch_dbgrun +#ifndef CONF_DAC_DBGRUN +#define CONF_DAC_DBGRUN 1 +#endif + +// <h> Channel 0 configuration +// <q> Left Adjusted Data +// <i> Indicate how the data is adjusted in the Data and Data Buffer register +// <id> dac0_arch_leftadj +#ifndef CONF_DAC0_LEFTADJ +#define CONF_DAC0_LEFTADJ 1 +#endif + +// <o> Current control +// <0=> GCLK_DAC <= 1.2MHz (100kSPS) +// <1=> 1.2MHz < GCLK_DAC <= 6MHz (500kSPS) +// <2=> 6MHz < GCLK_DAC <= 12MHz (1MSPS) +// <i> This defines the current in output buffer according to conversion rate +// <id> dac0_arch_cctrl +#ifndef CONF_DAC0_CCTRL +#define CONF_DAC0_CCTRL 0 +#endif + +// <q> Run in standby +// <i> Indicates whether the DAC channel will continue running in standby sleep mode or not +// <id> dac0_arch_runstdby +#ifndef CONF_DAC0_RUNSTDBY +#define CONF_DAC0_RUNSTDBY 0 +#endif + +// <q> Dithering Mode +// <i> Indicate whether dithering mode is enabled +// <id> dac0_arch_ditrher +#ifndef CONF_DAC0_DITHER +#define CONF_DAC0_DITHER 0 +#endif + +// <o> Refresh period <0x00-0xFF> +// <i> This defines the refresh period. If it is 0, the refresh mode is disabled, else the refresh period is: value * 500us +// <id> dac0_arch_refresh +#ifndef CONF_DAC0_REFRESH +#define CONF_DAC0_REFRESH 2 +#endif +// </h> +// <h> Channel 1 configuration +// <q> Left Adjusted Data +// <i> Indicate how the data is adjusted in the Data and Data Buffer register +// <id> dac1_arch_leftadj +#ifndef CONF_DAC1_LEFTADJ +#define CONF_DAC1_LEFTADJ 1 +#endif + +// <o> Current control +// <0=> GCLK_DAC <= 1.2MHz (100kSPS) +// <1=> 1.2MHz < GCLK_DAC <= 6MHz (500kSPS) +// <2=> 6MHz < GCLK_DAC <= 12MHz (1MSPS) +// <i> This defines the current in output buffer according to conversion rate +// <id> dac1_arch_cctrl +#ifndef CONF_DAC1_CCTRL +#define CONF_DAC1_CCTRL 0 +#endif + +// <q> Run in standby +// <i> Indicates whether the DAC channel will continue running in standby sleep mode or not +// <id> dac1_arch_runstdby +#ifndef CONF_DAC1_RUNSTDBY +#define CONF_DAC1_RUNSTDBY 0 +#endif + +// <q> Dithering Mode +// <i> Indicate whether dithering mode is enabled +// <id> dac1_arch_ditrher +#ifndef CONF_DAC1_DITHER +#define CONF_DAC1_DITHER 0 +#endif + +// <o> Refresh period <0x00-0xFF> +// <i> This defines the refresh period. If it is 0, the refresh mode is disabled, else the refresh period is: value * 500us +// <id> dac1_arch_refresh +#ifndef CONF_DAC1_REFRESH +#define CONF_DAC1_REFRESH 2 +#endif +// </h> + +// <h> Event configuration +// <o> Inversion of DAC 0 event +// <0=> Detection on rising edge pf the input event +// <1=> Detection on falling edge pf the input event +// <i> This defines the edge detection of the input event +// <id> dac_arch_invei0 +#ifndef CONF_DAC_INVEI0 +#define CONF_DAC_INVEI0 0 +#endif + +// <q> Data Buffer of DAC 0 Empty Event Output +// <i> Indicate whether Data Buffer Empty Event is enabled and generated when the Data Buffer register is empty or not +// <id> dac_arch_emptyeo_0 +#ifndef CONF_DAC_EMPTYEO0 +#define CONF_DAC_EMPTYEO0 0 +#endif + +// <q> Start Conversion Event Input DAC 0 +// <i> Indicate whether Start input event is enabled +// <id> dac_arch_startei_0 +#ifndef CONF_DAC_STARTEI0 +#define CONF_DAC_STARTEI0 0 +#endif +// <o> Inversion of DAC 1 event +// <0=> Detection on rising edge pf the input event +// <1=> Detection on falling edge pf the input event +// <i> This defines the edge detection of the input event +// <id> dac_arch_invei1 +#ifndef CONF_DAC_INVEI1 +#define CONF_DAC_INVEI1 0 +#endif + +// <q> Data Buffer of DAC 1 Empty Event Output +// <i> Indicate whether Data Buffer Empty Event is enabled and generated when the Data Buffer register is empty or not +// <id> dac_arch_emptyeo_1 +#ifndef CONF_DAC_EMPTYEO1 +#define CONF_DAC_EMPTYEO1 0 +#endif + +// <q> Start Conversion Event Input DAC 1 +// <i> Indicate whether Start input event is enabled +// <id> dac_arch_startei_1 +#ifndef CONF_DAC_STARTEI1 +#define CONF_DAC_STARTEI1 0 +#endif + +// </h> +// </e> + +// <<< end of configuration section >>> + +#endif // HPL_DAC_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_dmac_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_dmac_config.h new file mode 100644 index 000000000..90499fc27 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_dmac_config.h @@ -0,0 +1,7277 @@ +/* Auto-generated config file hpl_dmac_config.h */ +#ifndef HPL_DMAC_CONFIG_H +#define HPL_DMAC_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// <e> DMAC enable +// <i> Indicates whether dmac is enabled or not +// <id> dmac_enable +#ifndef CONF_DMAC_ENABLE +#define CONF_DMAC_ENABLE 0 +#endif + +// <q> Priority Level 0 +// <i> Indicates whether Priority Level 0 is enabled or not +// <id> dmac_lvlen0 +#ifndef CONF_DMAC_LVLEN0 +#define CONF_DMAC_LVLEN0 1 +#endif + +// <o> Level 0 Round-Robin Arbitration +// <0=> Static arbitration scheme for channel with priority 0 +// <1=> Round-robin arbitration scheme for channel with priority 0 +// <i> Defines Level 0 Arbitration for DMA channels +// <id> dmac_rrlvlen0 +#ifndef CONF_DMAC_RRLVLEN0 +#define CONF_DMAC_RRLVLEN0 0 +#endif + +// <o> Level 0 Channel Priority Number <0x00-0xFF> +// <id> dmac_lvlpri0 +#ifndef CONF_DMAC_LVLPRI0 +#define CONF_DMAC_LVLPRI0 0 +#endif +// <q> Priority Level 1 +// <i> Indicates whether Priority Level 1 is enabled or not +// <id> dmac_lvlen1 +#ifndef CONF_DMAC_LVLEN1 +#define CONF_DMAC_LVLEN1 1 +#endif + +// <o> Level 1 Round-Robin Arbitration +// <0=> Static arbitration scheme for channel with priority 1 +// <1=> Round-robin arbitration scheme for channel with priority 1 +// <i> Defines Level 1 Arbitration for DMA channels +// <id> dmac_rrlvlen1 +#ifndef CONF_DMAC_RRLVLEN1 +#define CONF_DMAC_RRLVLEN1 0 +#endif + +// <o> Level 1 Channel Priority Number <0x00-0xFF> +// <id> dmac_lvlpri1 +#ifndef CONF_DMAC_LVLPRI1 +#define CONF_DMAC_LVLPRI1 0 +#endif +// <q> Priority Level 2 +// <i> Indicates whether Priority Level 2 is enabled or not +// <id> dmac_lvlen2 +#ifndef CONF_DMAC_LVLEN2 +#define CONF_DMAC_LVLEN2 1 +#endif + +// <o> Level 2 Round-Robin Arbitration +// <0=> Static arbitration scheme for channel with priority 2 +// <1=> Round-robin arbitration scheme for channel with priority 2 +// <i> Defines Level 2 Arbitration for DMA channels +// <id> dmac_rrlvlen2 +#ifndef CONF_DMAC_RRLVLEN2 +#define CONF_DMAC_RRLVLEN2 0 +#endif + +// <o> Level 2 Channel Priority Number <0x00-0xFF> +// <id> dmac_lvlpri2 +#ifndef CONF_DMAC_LVLPRI2 +#define CONF_DMAC_LVLPRI2 0 +#endif +// <q> Priority Level 3 +// <i> Indicates whether Priority Level 3 is enabled or not +// <id> dmac_lvlen3 +#ifndef CONF_DMAC_LVLEN3 +#define CONF_DMAC_LVLEN3 1 +#endif + +// <o> Level 3 Round-Robin Arbitration +// <0=> Static arbitration scheme for channel with priority 3 +// <1=> Round-robin arbitration scheme for channel with priority 3 +// <i> Defines Level 3 Arbitration for DMA channels +// <id> dmac_rrlvlen3 +#ifndef CONF_DMAC_RRLVLEN3 +#define CONF_DMAC_RRLVLEN3 0 +#endif + +// <o> Level 3 Channel Priority Number <0x00-0xFF> +// <id> dmac_lvlpri3 +#ifndef CONF_DMAC_LVLPRI3 +#define CONF_DMAC_LVLPRI3 0 +#endif +// <q> Debug Run +// <i> Indicates whether Debug Run is enabled or not +// <id> dmac_dbgrun +#ifndef CONF_DMAC_DBGRUN +#define CONF_DMAC_DBGRUN 0 +#endif + +// <e> Channel 0 settings +// <id> dmac_channel_0_settings +#ifndef CONF_DMAC_CHANNEL_0_SETTINGS +#define CONF_DMAC_CHANNEL_0_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 0 is running in standby mode or not +// <id> dmac_runstdby_0 +#ifndef CONF_DMAC_RUNSTDBY_0 +#define CONF_DMAC_RUNSTDBY_0 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_0 +#ifndef CONF_DMAC_TRIGACT_0 +#define CONF_DMAC_TRIGACT_0 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_0 +#ifndef CONF_DMAC_TRIGSRC_0 +#define CONF_DMAC_TRIGSRC_0 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_0 +#ifndef CONF_DMAC_LVL_0 +#define CONF_DMAC_LVL_0 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_0 +#ifndef CONF_DMAC_EVOE_0 +#define CONF_DMAC_EVOE_0 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_0 +#ifndef CONF_DMAC_EVIE_0 +#define CONF_DMAC_EVIE_0 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_0 +#ifndef CONF_DMAC_EVACT_0 +#define CONF_DMAC_EVACT_0 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_0 +#ifndef CONF_DMAC_STEPSIZE_0 +#define CONF_DMAC_STEPSIZE_0 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_0 +#ifndef CONF_DMAC_STEPSEL_0 +#define CONF_DMAC_STEPSEL_0 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_0 +#ifndef CONF_DMAC_SRCINC_0 +#define CONF_DMAC_SRCINC_0 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_0 +#ifndef CONF_DMAC_DSTINC_0 +#define CONF_DMAC_DSTINC_0 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_0 +#ifndef CONF_DMAC_BEATSIZE_0 +#define CONF_DMAC_BEATSIZE_0 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_0 +#ifndef CONF_DMAC_BLOCKACT_0 +#define CONF_DMAC_BLOCKACT_0 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_0 +#ifndef CONF_DMAC_EVOSEL_0 +#define CONF_DMAC_EVOSEL_0 0 +#endif +// </e> + +// <e> Channel 1 settings +// <id> dmac_channel_1_settings +#ifndef CONF_DMAC_CHANNEL_1_SETTINGS +#define CONF_DMAC_CHANNEL_1_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 1 is running in standby mode or not +// <id> dmac_runstdby_1 +#ifndef CONF_DMAC_RUNSTDBY_1 +#define CONF_DMAC_RUNSTDBY_1 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_1 +#ifndef CONF_DMAC_TRIGACT_1 +#define CONF_DMAC_TRIGACT_1 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_1 +#ifndef CONF_DMAC_TRIGSRC_1 +#define CONF_DMAC_TRIGSRC_1 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_1 +#ifndef CONF_DMAC_LVL_1 +#define CONF_DMAC_LVL_1 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_1 +#ifndef CONF_DMAC_EVOE_1 +#define CONF_DMAC_EVOE_1 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_1 +#ifndef CONF_DMAC_EVIE_1 +#define CONF_DMAC_EVIE_1 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_1 +#ifndef CONF_DMAC_EVACT_1 +#define CONF_DMAC_EVACT_1 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_1 +#ifndef CONF_DMAC_STEPSIZE_1 +#define CONF_DMAC_STEPSIZE_1 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_1 +#ifndef CONF_DMAC_STEPSEL_1 +#define CONF_DMAC_STEPSEL_1 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_1 +#ifndef CONF_DMAC_SRCINC_1 +#define CONF_DMAC_SRCINC_1 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_1 +#ifndef CONF_DMAC_DSTINC_1 +#define CONF_DMAC_DSTINC_1 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_1 +#ifndef CONF_DMAC_BEATSIZE_1 +#define CONF_DMAC_BEATSIZE_1 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_1 +#ifndef CONF_DMAC_BLOCKACT_1 +#define CONF_DMAC_BLOCKACT_1 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_1 +#ifndef CONF_DMAC_EVOSEL_1 +#define CONF_DMAC_EVOSEL_1 0 +#endif +// </e> + +// <e> Channel 2 settings +// <id> dmac_channel_2_settings +#ifndef CONF_DMAC_CHANNEL_2_SETTINGS +#define CONF_DMAC_CHANNEL_2_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 2 is running in standby mode or not +// <id> dmac_runstdby_2 +#ifndef CONF_DMAC_RUNSTDBY_2 +#define CONF_DMAC_RUNSTDBY_2 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_2 +#ifndef CONF_DMAC_TRIGACT_2 +#define CONF_DMAC_TRIGACT_2 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_2 +#ifndef CONF_DMAC_TRIGSRC_2 +#define CONF_DMAC_TRIGSRC_2 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_2 +#ifndef CONF_DMAC_LVL_2 +#define CONF_DMAC_LVL_2 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_2 +#ifndef CONF_DMAC_EVOE_2 +#define CONF_DMAC_EVOE_2 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_2 +#ifndef CONF_DMAC_EVIE_2 +#define CONF_DMAC_EVIE_2 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_2 +#ifndef CONF_DMAC_EVACT_2 +#define CONF_DMAC_EVACT_2 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_2 +#ifndef CONF_DMAC_STEPSIZE_2 +#define CONF_DMAC_STEPSIZE_2 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_2 +#ifndef CONF_DMAC_STEPSEL_2 +#define CONF_DMAC_STEPSEL_2 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_2 +#ifndef CONF_DMAC_SRCINC_2 +#define CONF_DMAC_SRCINC_2 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_2 +#ifndef CONF_DMAC_DSTINC_2 +#define CONF_DMAC_DSTINC_2 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_2 +#ifndef CONF_DMAC_BEATSIZE_2 +#define CONF_DMAC_BEATSIZE_2 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_2 +#ifndef CONF_DMAC_BLOCKACT_2 +#define CONF_DMAC_BLOCKACT_2 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_2 +#ifndef CONF_DMAC_EVOSEL_2 +#define CONF_DMAC_EVOSEL_2 0 +#endif +// </e> + +// <e> Channel 3 settings +// <id> dmac_channel_3_settings +#ifndef CONF_DMAC_CHANNEL_3_SETTINGS +#define CONF_DMAC_CHANNEL_3_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 3 is running in standby mode or not +// <id> dmac_runstdby_3 +#ifndef CONF_DMAC_RUNSTDBY_3 +#define CONF_DMAC_RUNSTDBY_3 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_3 +#ifndef CONF_DMAC_TRIGACT_3 +#define CONF_DMAC_TRIGACT_3 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_3 +#ifndef CONF_DMAC_TRIGSRC_3 +#define CONF_DMAC_TRIGSRC_3 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_3 +#ifndef CONF_DMAC_LVL_3 +#define CONF_DMAC_LVL_3 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_3 +#ifndef CONF_DMAC_EVOE_3 +#define CONF_DMAC_EVOE_3 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_3 +#ifndef CONF_DMAC_EVIE_3 +#define CONF_DMAC_EVIE_3 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_3 +#ifndef CONF_DMAC_EVACT_3 +#define CONF_DMAC_EVACT_3 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_3 +#ifndef CONF_DMAC_STEPSIZE_3 +#define CONF_DMAC_STEPSIZE_3 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_3 +#ifndef CONF_DMAC_STEPSEL_3 +#define CONF_DMAC_STEPSEL_3 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_3 +#ifndef CONF_DMAC_SRCINC_3 +#define CONF_DMAC_SRCINC_3 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_3 +#ifndef CONF_DMAC_DSTINC_3 +#define CONF_DMAC_DSTINC_3 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_3 +#ifndef CONF_DMAC_BEATSIZE_3 +#define CONF_DMAC_BEATSIZE_3 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_3 +#ifndef CONF_DMAC_BLOCKACT_3 +#define CONF_DMAC_BLOCKACT_3 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_3 +#ifndef CONF_DMAC_EVOSEL_3 +#define CONF_DMAC_EVOSEL_3 0 +#endif +// </e> + +// <e> Channel 4 settings +// <id> dmac_channel_4_settings +#ifndef CONF_DMAC_CHANNEL_4_SETTINGS +#define CONF_DMAC_CHANNEL_4_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 4 is running in standby mode or not +// <id> dmac_runstdby_4 +#ifndef CONF_DMAC_RUNSTDBY_4 +#define CONF_DMAC_RUNSTDBY_4 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_4 +#ifndef CONF_DMAC_TRIGACT_4 +#define CONF_DMAC_TRIGACT_4 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_4 +#ifndef CONF_DMAC_TRIGSRC_4 +#define CONF_DMAC_TRIGSRC_4 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_4 +#ifndef CONF_DMAC_LVL_4 +#define CONF_DMAC_LVL_4 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_4 +#ifndef CONF_DMAC_EVOE_4 +#define CONF_DMAC_EVOE_4 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_4 +#ifndef CONF_DMAC_EVIE_4 +#define CONF_DMAC_EVIE_4 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_4 +#ifndef CONF_DMAC_EVACT_4 +#define CONF_DMAC_EVACT_4 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_4 +#ifndef CONF_DMAC_STEPSIZE_4 +#define CONF_DMAC_STEPSIZE_4 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_4 +#ifndef CONF_DMAC_STEPSEL_4 +#define CONF_DMAC_STEPSEL_4 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_4 +#ifndef CONF_DMAC_SRCINC_4 +#define CONF_DMAC_SRCINC_4 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_4 +#ifndef CONF_DMAC_DSTINC_4 +#define CONF_DMAC_DSTINC_4 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_4 +#ifndef CONF_DMAC_BEATSIZE_4 +#define CONF_DMAC_BEATSIZE_4 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_4 +#ifndef CONF_DMAC_BLOCKACT_4 +#define CONF_DMAC_BLOCKACT_4 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_4 +#ifndef CONF_DMAC_EVOSEL_4 +#define CONF_DMAC_EVOSEL_4 0 +#endif +// </e> + +// <e> Channel 5 settings +// <id> dmac_channel_5_settings +#ifndef CONF_DMAC_CHANNEL_5_SETTINGS +#define CONF_DMAC_CHANNEL_5_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 5 is running in standby mode or not +// <id> dmac_runstdby_5 +#ifndef CONF_DMAC_RUNSTDBY_5 +#define CONF_DMAC_RUNSTDBY_5 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_5 +#ifndef CONF_DMAC_TRIGACT_5 +#define CONF_DMAC_TRIGACT_5 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_5 +#ifndef CONF_DMAC_TRIGSRC_5 +#define CONF_DMAC_TRIGSRC_5 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_5 +#ifndef CONF_DMAC_LVL_5 +#define CONF_DMAC_LVL_5 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_5 +#ifndef CONF_DMAC_EVOE_5 +#define CONF_DMAC_EVOE_5 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_5 +#ifndef CONF_DMAC_EVIE_5 +#define CONF_DMAC_EVIE_5 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_5 +#ifndef CONF_DMAC_EVACT_5 +#define CONF_DMAC_EVACT_5 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_5 +#ifndef CONF_DMAC_STEPSIZE_5 +#define CONF_DMAC_STEPSIZE_5 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_5 +#ifndef CONF_DMAC_STEPSEL_5 +#define CONF_DMAC_STEPSEL_5 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_5 +#ifndef CONF_DMAC_SRCINC_5 +#define CONF_DMAC_SRCINC_5 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_5 +#ifndef CONF_DMAC_DSTINC_5 +#define CONF_DMAC_DSTINC_5 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_5 +#ifndef CONF_DMAC_BEATSIZE_5 +#define CONF_DMAC_BEATSIZE_5 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_5 +#ifndef CONF_DMAC_BLOCKACT_5 +#define CONF_DMAC_BLOCKACT_5 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_5 +#ifndef CONF_DMAC_EVOSEL_5 +#define CONF_DMAC_EVOSEL_5 0 +#endif +// </e> + +// <e> Channel 6 settings +// <id> dmac_channel_6_settings +#ifndef CONF_DMAC_CHANNEL_6_SETTINGS +#define CONF_DMAC_CHANNEL_6_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 6 is running in standby mode or not +// <id> dmac_runstdby_6 +#ifndef CONF_DMAC_RUNSTDBY_6 +#define CONF_DMAC_RUNSTDBY_6 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_6 +#ifndef CONF_DMAC_TRIGACT_6 +#define CONF_DMAC_TRIGACT_6 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_6 +#ifndef CONF_DMAC_TRIGSRC_6 +#define CONF_DMAC_TRIGSRC_6 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_6 +#ifndef CONF_DMAC_LVL_6 +#define CONF_DMAC_LVL_6 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_6 +#ifndef CONF_DMAC_EVOE_6 +#define CONF_DMAC_EVOE_6 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_6 +#ifndef CONF_DMAC_EVIE_6 +#define CONF_DMAC_EVIE_6 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_6 +#ifndef CONF_DMAC_EVACT_6 +#define CONF_DMAC_EVACT_6 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_6 +#ifndef CONF_DMAC_STEPSIZE_6 +#define CONF_DMAC_STEPSIZE_6 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_6 +#ifndef CONF_DMAC_STEPSEL_6 +#define CONF_DMAC_STEPSEL_6 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_6 +#ifndef CONF_DMAC_SRCINC_6 +#define CONF_DMAC_SRCINC_6 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_6 +#ifndef CONF_DMAC_DSTINC_6 +#define CONF_DMAC_DSTINC_6 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_6 +#ifndef CONF_DMAC_BEATSIZE_6 +#define CONF_DMAC_BEATSIZE_6 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_6 +#ifndef CONF_DMAC_BLOCKACT_6 +#define CONF_DMAC_BLOCKACT_6 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_6 +#ifndef CONF_DMAC_EVOSEL_6 +#define CONF_DMAC_EVOSEL_6 0 +#endif +// </e> + +// <e> Channel 7 settings +// <id> dmac_channel_7_settings +#ifndef CONF_DMAC_CHANNEL_7_SETTINGS +#define CONF_DMAC_CHANNEL_7_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 7 is running in standby mode or not +// <id> dmac_runstdby_7 +#ifndef CONF_DMAC_RUNSTDBY_7 +#define CONF_DMAC_RUNSTDBY_7 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_7 +#ifndef CONF_DMAC_TRIGACT_7 +#define CONF_DMAC_TRIGACT_7 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_7 +#ifndef CONF_DMAC_TRIGSRC_7 +#define CONF_DMAC_TRIGSRC_7 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_7 +#ifndef CONF_DMAC_LVL_7 +#define CONF_DMAC_LVL_7 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_7 +#ifndef CONF_DMAC_EVOE_7 +#define CONF_DMAC_EVOE_7 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_7 +#ifndef CONF_DMAC_EVIE_7 +#define CONF_DMAC_EVIE_7 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_7 +#ifndef CONF_DMAC_EVACT_7 +#define CONF_DMAC_EVACT_7 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_7 +#ifndef CONF_DMAC_STEPSIZE_7 +#define CONF_DMAC_STEPSIZE_7 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_7 +#ifndef CONF_DMAC_STEPSEL_7 +#define CONF_DMAC_STEPSEL_7 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_7 +#ifndef CONF_DMAC_SRCINC_7 +#define CONF_DMAC_SRCINC_7 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_7 +#ifndef CONF_DMAC_DSTINC_7 +#define CONF_DMAC_DSTINC_7 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_7 +#ifndef CONF_DMAC_BEATSIZE_7 +#define CONF_DMAC_BEATSIZE_7 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_7 +#ifndef CONF_DMAC_BLOCKACT_7 +#define CONF_DMAC_BLOCKACT_7 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_7 +#ifndef CONF_DMAC_EVOSEL_7 +#define CONF_DMAC_EVOSEL_7 0 +#endif +// </e> + +// <e> Channel 8 settings +// <id> dmac_channel_8_settings +#ifndef CONF_DMAC_CHANNEL_8_SETTINGS +#define CONF_DMAC_CHANNEL_8_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 8 is running in standby mode or not +// <id> dmac_runstdby_8 +#ifndef CONF_DMAC_RUNSTDBY_8 +#define CONF_DMAC_RUNSTDBY_8 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_8 +#ifndef CONF_DMAC_TRIGACT_8 +#define CONF_DMAC_TRIGACT_8 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_8 +#ifndef CONF_DMAC_TRIGSRC_8 +#define CONF_DMAC_TRIGSRC_8 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_8 +#ifndef CONF_DMAC_LVL_8 +#define CONF_DMAC_LVL_8 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_8 +#ifndef CONF_DMAC_EVOE_8 +#define CONF_DMAC_EVOE_8 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_8 +#ifndef CONF_DMAC_EVIE_8 +#define CONF_DMAC_EVIE_8 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_8 +#ifndef CONF_DMAC_EVACT_8 +#define CONF_DMAC_EVACT_8 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_8 +#ifndef CONF_DMAC_STEPSIZE_8 +#define CONF_DMAC_STEPSIZE_8 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_8 +#ifndef CONF_DMAC_STEPSEL_8 +#define CONF_DMAC_STEPSEL_8 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_8 +#ifndef CONF_DMAC_SRCINC_8 +#define CONF_DMAC_SRCINC_8 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_8 +#ifndef CONF_DMAC_DSTINC_8 +#define CONF_DMAC_DSTINC_8 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_8 +#ifndef CONF_DMAC_BEATSIZE_8 +#define CONF_DMAC_BEATSIZE_8 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_8 +#ifndef CONF_DMAC_BLOCKACT_8 +#define CONF_DMAC_BLOCKACT_8 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_8 +#ifndef CONF_DMAC_EVOSEL_8 +#define CONF_DMAC_EVOSEL_8 0 +#endif +// </e> + +// <e> Channel 9 settings +// <id> dmac_channel_9_settings +#ifndef CONF_DMAC_CHANNEL_9_SETTINGS +#define CONF_DMAC_CHANNEL_9_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 9 is running in standby mode or not +// <id> dmac_runstdby_9 +#ifndef CONF_DMAC_RUNSTDBY_9 +#define CONF_DMAC_RUNSTDBY_9 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_9 +#ifndef CONF_DMAC_TRIGACT_9 +#define CONF_DMAC_TRIGACT_9 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_9 +#ifndef CONF_DMAC_TRIGSRC_9 +#define CONF_DMAC_TRIGSRC_9 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_9 +#ifndef CONF_DMAC_LVL_9 +#define CONF_DMAC_LVL_9 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_9 +#ifndef CONF_DMAC_EVOE_9 +#define CONF_DMAC_EVOE_9 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_9 +#ifndef CONF_DMAC_EVIE_9 +#define CONF_DMAC_EVIE_9 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_9 +#ifndef CONF_DMAC_EVACT_9 +#define CONF_DMAC_EVACT_9 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_9 +#ifndef CONF_DMAC_STEPSIZE_9 +#define CONF_DMAC_STEPSIZE_9 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_9 +#ifndef CONF_DMAC_STEPSEL_9 +#define CONF_DMAC_STEPSEL_9 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_9 +#ifndef CONF_DMAC_SRCINC_9 +#define CONF_DMAC_SRCINC_9 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_9 +#ifndef CONF_DMAC_DSTINC_9 +#define CONF_DMAC_DSTINC_9 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_9 +#ifndef CONF_DMAC_BEATSIZE_9 +#define CONF_DMAC_BEATSIZE_9 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_9 +#ifndef CONF_DMAC_BLOCKACT_9 +#define CONF_DMAC_BLOCKACT_9 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_9 +#ifndef CONF_DMAC_EVOSEL_9 +#define CONF_DMAC_EVOSEL_9 0 +#endif +// </e> + +// <e> Channel 10 settings +// <id> dmac_channel_10_settings +#ifndef CONF_DMAC_CHANNEL_10_SETTINGS +#define CONF_DMAC_CHANNEL_10_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 10 is running in standby mode or not +// <id> dmac_runstdby_10 +#ifndef CONF_DMAC_RUNSTDBY_10 +#define CONF_DMAC_RUNSTDBY_10 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_10 +#ifndef CONF_DMAC_TRIGACT_10 +#define CONF_DMAC_TRIGACT_10 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_10 +#ifndef CONF_DMAC_TRIGSRC_10 +#define CONF_DMAC_TRIGSRC_10 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_10 +#ifndef CONF_DMAC_LVL_10 +#define CONF_DMAC_LVL_10 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_10 +#ifndef CONF_DMAC_EVOE_10 +#define CONF_DMAC_EVOE_10 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_10 +#ifndef CONF_DMAC_EVIE_10 +#define CONF_DMAC_EVIE_10 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_10 +#ifndef CONF_DMAC_EVACT_10 +#define CONF_DMAC_EVACT_10 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_10 +#ifndef CONF_DMAC_STEPSIZE_10 +#define CONF_DMAC_STEPSIZE_10 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_10 +#ifndef CONF_DMAC_STEPSEL_10 +#define CONF_DMAC_STEPSEL_10 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_10 +#ifndef CONF_DMAC_SRCINC_10 +#define CONF_DMAC_SRCINC_10 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_10 +#ifndef CONF_DMAC_DSTINC_10 +#define CONF_DMAC_DSTINC_10 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_10 +#ifndef CONF_DMAC_BEATSIZE_10 +#define CONF_DMAC_BEATSIZE_10 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_10 +#ifndef CONF_DMAC_BLOCKACT_10 +#define CONF_DMAC_BLOCKACT_10 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_10 +#ifndef CONF_DMAC_EVOSEL_10 +#define CONF_DMAC_EVOSEL_10 0 +#endif +// </e> + +// <e> Channel 11 settings +// <id> dmac_channel_11_settings +#ifndef CONF_DMAC_CHANNEL_11_SETTINGS +#define CONF_DMAC_CHANNEL_11_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 11 is running in standby mode or not +// <id> dmac_runstdby_11 +#ifndef CONF_DMAC_RUNSTDBY_11 +#define CONF_DMAC_RUNSTDBY_11 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_11 +#ifndef CONF_DMAC_TRIGACT_11 +#define CONF_DMAC_TRIGACT_11 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_11 +#ifndef CONF_DMAC_TRIGSRC_11 +#define CONF_DMAC_TRIGSRC_11 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_11 +#ifndef CONF_DMAC_LVL_11 +#define CONF_DMAC_LVL_11 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_11 +#ifndef CONF_DMAC_EVOE_11 +#define CONF_DMAC_EVOE_11 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_11 +#ifndef CONF_DMAC_EVIE_11 +#define CONF_DMAC_EVIE_11 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_11 +#ifndef CONF_DMAC_EVACT_11 +#define CONF_DMAC_EVACT_11 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_11 +#ifndef CONF_DMAC_STEPSIZE_11 +#define CONF_DMAC_STEPSIZE_11 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_11 +#ifndef CONF_DMAC_STEPSEL_11 +#define CONF_DMAC_STEPSEL_11 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_11 +#ifndef CONF_DMAC_SRCINC_11 +#define CONF_DMAC_SRCINC_11 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_11 +#ifndef CONF_DMAC_DSTINC_11 +#define CONF_DMAC_DSTINC_11 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_11 +#ifndef CONF_DMAC_BEATSIZE_11 +#define CONF_DMAC_BEATSIZE_11 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_11 +#ifndef CONF_DMAC_BLOCKACT_11 +#define CONF_DMAC_BLOCKACT_11 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_11 +#ifndef CONF_DMAC_EVOSEL_11 +#define CONF_DMAC_EVOSEL_11 0 +#endif +// </e> + +// <e> Channel 12 settings +// <id> dmac_channel_12_settings +#ifndef CONF_DMAC_CHANNEL_12_SETTINGS +#define CONF_DMAC_CHANNEL_12_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 12 is running in standby mode or not +// <id> dmac_runstdby_12 +#ifndef CONF_DMAC_RUNSTDBY_12 +#define CONF_DMAC_RUNSTDBY_12 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_12 +#ifndef CONF_DMAC_TRIGACT_12 +#define CONF_DMAC_TRIGACT_12 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_12 +#ifndef CONF_DMAC_TRIGSRC_12 +#define CONF_DMAC_TRIGSRC_12 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_12 +#ifndef CONF_DMAC_LVL_12 +#define CONF_DMAC_LVL_12 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_12 +#ifndef CONF_DMAC_EVOE_12 +#define CONF_DMAC_EVOE_12 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_12 +#ifndef CONF_DMAC_EVIE_12 +#define CONF_DMAC_EVIE_12 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_12 +#ifndef CONF_DMAC_EVACT_12 +#define CONF_DMAC_EVACT_12 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_12 +#ifndef CONF_DMAC_STEPSIZE_12 +#define CONF_DMAC_STEPSIZE_12 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_12 +#ifndef CONF_DMAC_STEPSEL_12 +#define CONF_DMAC_STEPSEL_12 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_12 +#ifndef CONF_DMAC_SRCINC_12 +#define CONF_DMAC_SRCINC_12 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_12 +#ifndef CONF_DMAC_DSTINC_12 +#define CONF_DMAC_DSTINC_12 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_12 +#ifndef CONF_DMAC_BEATSIZE_12 +#define CONF_DMAC_BEATSIZE_12 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_12 +#ifndef CONF_DMAC_BLOCKACT_12 +#define CONF_DMAC_BLOCKACT_12 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_12 +#ifndef CONF_DMAC_EVOSEL_12 +#define CONF_DMAC_EVOSEL_12 0 +#endif +// </e> + +// <e> Channel 13 settings +// <id> dmac_channel_13_settings +#ifndef CONF_DMAC_CHANNEL_13_SETTINGS +#define CONF_DMAC_CHANNEL_13_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 13 is running in standby mode or not +// <id> dmac_runstdby_13 +#ifndef CONF_DMAC_RUNSTDBY_13 +#define CONF_DMAC_RUNSTDBY_13 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_13 +#ifndef CONF_DMAC_TRIGACT_13 +#define CONF_DMAC_TRIGACT_13 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_13 +#ifndef CONF_DMAC_TRIGSRC_13 +#define CONF_DMAC_TRIGSRC_13 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_13 +#ifndef CONF_DMAC_LVL_13 +#define CONF_DMAC_LVL_13 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_13 +#ifndef CONF_DMAC_EVOE_13 +#define CONF_DMAC_EVOE_13 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_13 +#ifndef CONF_DMAC_EVIE_13 +#define CONF_DMAC_EVIE_13 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_13 +#ifndef CONF_DMAC_EVACT_13 +#define CONF_DMAC_EVACT_13 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_13 +#ifndef CONF_DMAC_STEPSIZE_13 +#define CONF_DMAC_STEPSIZE_13 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_13 +#ifndef CONF_DMAC_STEPSEL_13 +#define CONF_DMAC_STEPSEL_13 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_13 +#ifndef CONF_DMAC_SRCINC_13 +#define CONF_DMAC_SRCINC_13 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_13 +#ifndef CONF_DMAC_DSTINC_13 +#define CONF_DMAC_DSTINC_13 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_13 +#ifndef CONF_DMAC_BEATSIZE_13 +#define CONF_DMAC_BEATSIZE_13 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_13 +#ifndef CONF_DMAC_BLOCKACT_13 +#define CONF_DMAC_BLOCKACT_13 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_13 +#ifndef CONF_DMAC_EVOSEL_13 +#define CONF_DMAC_EVOSEL_13 0 +#endif +// </e> + +// <e> Channel 14 settings +// <id> dmac_channel_14_settings +#ifndef CONF_DMAC_CHANNEL_14_SETTINGS +#define CONF_DMAC_CHANNEL_14_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 14 is running in standby mode or not +// <id> dmac_runstdby_14 +#ifndef CONF_DMAC_RUNSTDBY_14 +#define CONF_DMAC_RUNSTDBY_14 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_14 +#ifndef CONF_DMAC_TRIGACT_14 +#define CONF_DMAC_TRIGACT_14 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_14 +#ifndef CONF_DMAC_TRIGSRC_14 +#define CONF_DMAC_TRIGSRC_14 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_14 +#ifndef CONF_DMAC_LVL_14 +#define CONF_DMAC_LVL_14 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_14 +#ifndef CONF_DMAC_EVOE_14 +#define CONF_DMAC_EVOE_14 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_14 +#ifndef CONF_DMAC_EVIE_14 +#define CONF_DMAC_EVIE_14 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_14 +#ifndef CONF_DMAC_EVACT_14 +#define CONF_DMAC_EVACT_14 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_14 +#ifndef CONF_DMAC_STEPSIZE_14 +#define CONF_DMAC_STEPSIZE_14 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_14 +#ifndef CONF_DMAC_STEPSEL_14 +#define CONF_DMAC_STEPSEL_14 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_14 +#ifndef CONF_DMAC_SRCINC_14 +#define CONF_DMAC_SRCINC_14 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_14 +#ifndef CONF_DMAC_DSTINC_14 +#define CONF_DMAC_DSTINC_14 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_14 +#ifndef CONF_DMAC_BEATSIZE_14 +#define CONF_DMAC_BEATSIZE_14 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_14 +#ifndef CONF_DMAC_BLOCKACT_14 +#define CONF_DMAC_BLOCKACT_14 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_14 +#ifndef CONF_DMAC_EVOSEL_14 +#define CONF_DMAC_EVOSEL_14 0 +#endif +// </e> + +// <e> Channel 15 settings +// <id> dmac_channel_15_settings +#ifndef CONF_DMAC_CHANNEL_15_SETTINGS +#define CONF_DMAC_CHANNEL_15_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 15 is running in standby mode or not +// <id> dmac_runstdby_15 +#ifndef CONF_DMAC_RUNSTDBY_15 +#define CONF_DMAC_RUNSTDBY_15 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_15 +#ifndef CONF_DMAC_TRIGACT_15 +#define CONF_DMAC_TRIGACT_15 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_15 +#ifndef CONF_DMAC_TRIGSRC_15 +#define CONF_DMAC_TRIGSRC_15 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_15 +#ifndef CONF_DMAC_LVL_15 +#define CONF_DMAC_LVL_15 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_15 +#ifndef CONF_DMAC_EVOE_15 +#define CONF_DMAC_EVOE_15 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_15 +#ifndef CONF_DMAC_EVIE_15 +#define CONF_DMAC_EVIE_15 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_15 +#ifndef CONF_DMAC_EVACT_15 +#define CONF_DMAC_EVACT_15 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_15 +#ifndef CONF_DMAC_STEPSIZE_15 +#define CONF_DMAC_STEPSIZE_15 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_15 +#ifndef CONF_DMAC_STEPSEL_15 +#define CONF_DMAC_STEPSEL_15 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_15 +#ifndef CONF_DMAC_SRCINC_15 +#define CONF_DMAC_SRCINC_15 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_15 +#ifndef CONF_DMAC_DSTINC_15 +#define CONF_DMAC_DSTINC_15 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_15 +#ifndef CONF_DMAC_BEATSIZE_15 +#define CONF_DMAC_BEATSIZE_15 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_15 +#ifndef CONF_DMAC_BLOCKACT_15 +#define CONF_DMAC_BLOCKACT_15 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_15 +#ifndef CONF_DMAC_EVOSEL_15 +#define CONF_DMAC_EVOSEL_15 0 +#endif +// </e> + +// <e> Channel 16 settings +// <id> dmac_channel_16_settings +#ifndef CONF_DMAC_CHANNEL_16_SETTINGS +#define CONF_DMAC_CHANNEL_16_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 16 is running in standby mode or not +// <id> dmac_runstdby_16 +#ifndef CONF_DMAC_RUNSTDBY_16 +#define CONF_DMAC_RUNSTDBY_16 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_16 +#ifndef CONF_DMAC_TRIGACT_16 +#define CONF_DMAC_TRIGACT_16 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_16 +#ifndef CONF_DMAC_TRIGSRC_16 +#define CONF_DMAC_TRIGSRC_16 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_16 +#ifndef CONF_DMAC_LVL_16 +#define CONF_DMAC_LVL_16 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_16 +#ifndef CONF_DMAC_EVOE_16 +#define CONF_DMAC_EVOE_16 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_16 +#ifndef CONF_DMAC_EVIE_16 +#define CONF_DMAC_EVIE_16 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_16 +#ifndef CONF_DMAC_EVACT_16 +#define CONF_DMAC_EVACT_16 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_16 +#ifndef CONF_DMAC_STEPSIZE_16 +#define CONF_DMAC_STEPSIZE_16 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_16 +#ifndef CONF_DMAC_STEPSEL_16 +#define CONF_DMAC_STEPSEL_16 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_16 +#ifndef CONF_DMAC_SRCINC_16 +#define CONF_DMAC_SRCINC_16 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_16 +#ifndef CONF_DMAC_DSTINC_16 +#define CONF_DMAC_DSTINC_16 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_16 +#ifndef CONF_DMAC_BEATSIZE_16 +#define CONF_DMAC_BEATSIZE_16 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_16 +#ifndef CONF_DMAC_BLOCKACT_16 +#define CONF_DMAC_BLOCKACT_16 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_16 +#ifndef CONF_DMAC_EVOSEL_16 +#define CONF_DMAC_EVOSEL_16 0 +#endif +// </e> + +// <e> Channel 17 settings +// <id> dmac_channel_17_settings +#ifndef CONF_DMAC_CHANNEL_17_SETTINGS +#define CONF_DMAC_CHANNEL_17_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 17 is running in standby mode or not +// <id> dmac_runstdby_17 +#ifndef CONF_DMAC_RUNSTDBY_17 +#define CONF_DMAC_RUNSTDBY_17 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_17 +#ifndef CONF_DMAC_TRIGACT_17 +#define CONF_DMAC_TRIGACT_17 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_17 +#ifndef CONF_DMAC_TRIGSRC_17 +#define CONF_DMAC_TRIGSRC_17 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_17 +#ifndef CONF_DMAC_LVL_17 +#define CONF_DMAC_LVL_17 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_17 +#ifndef CONF_DMAC_EVOE_17 +#define CONF_DMAC_EVOE_17 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_17 +#ifndef CONF_DMAC_EVIE_17 +#define CONF_DMAC_EVIE_17 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_17 +#ifndef CONF_DMAC_EVACT_17 +#define CONF_DMAC_EVACT_17 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_17 +#ifndef CONF_DMAC_STEPSIZE_17 +#define CONF_DMAC_STEPSIZE_17 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_17 +#ifndef CONF_DMAC_STEPSEL_17 +#define CONF_DMAC_STEPSEL_17 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_17 +#ifndef CONF_DMAC_SRCINC_17 +#define CONF_DMAC_SRCINC_17 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_17 +#ifndef CONF_DMAC_DSTINC_17 +#define CONF_DMAC_DSTINC_17 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_17 +#ifndef CONF_DMAC_BEATSIZE_17 +#define CONF_DMAC_BEATSIZE_17 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_17 +#ifndef CONF_DMAC_BLOCKACT_17 +#define CONF_DMAC_BLOCKACT_17 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_17 +#ifndef CONF_DMAC_EVOSEL_17 +#define CONF_DMAC_EVOSEL_17 0 +#endif +// </e> + +// <e> Channel 18 settings +// <id> dmac_channel_18_settings +#ifndef CONF_DMAC_CHANNEL_18_SETTINGS +#define CONF_DMAC_CHANNEL_18_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 18 is running in standby mode or not +// <id> dmac_runstdby_18 +#ifndef CONF_DMAC_RUNSTDBY_18 +#define CONF_DMAC_RUNSTDBY_18 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_18 +#ifndef CONF_DMAC_TRIGACT_18 +#define CONF_DMAC_TRIGACT_18 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_18 +#ifndef CONF_DMAC_TRIGSRC_18 +#define CONF_DMAC_TRIGSRC_18 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_18 +#ifndef CONF_DMAC_LVL_18 +#define CONF_DMAC_LVL_18 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_18 +#ifndef CONF_DMAC_EVOE_18 +#define CONF_DMAC_EVOE_18 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_18 +#ifndef CONF_DMAC_EVIE_18 +#define CONF_DMAC_EVIE_18 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_18 +#ifndef CONF_DMAC_EVACT_18 +#define CONF_DMAC_EVACT_18 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_18 +#ifndef CONF_DMAC_STEPSIZE_18 +#define CONF_DMAC_STEPSIZE_18 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_18 +#ifndef CONF_DMAC_STEPSEL_18 +#define CONF_DMAC_STEPSEL_18 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_18 +#ifndef CONF_DMAC_SRCINC_18 +#define CONF_DMAC_SRCINC_18 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_18 +#ifndef CONF_DMAC_DSTINC_18 +#define CONF_DMAC_DSTINC_18 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_18 +#ifndef CONF_DMAC_BEATSIZE_18 +#define CONF_DMAC_BEATSIZE_18 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_18 +#ifndef CONF_DMAC_BLOCKACT_18 +#define CONF_DMAC_BLOCKACT_18 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_18 +#ifndef CONF_DMAC_EVOSEL_18 +#define CONF_DMAC_EVOSEL_18 0 +#endif +// </e> + +// <e> Channel 19 settings +// <id> dmac_channel_19_settings +#ifndef CONF_DMAC_CHANNEL_19_SETTINGS +#define CONF_DMAC_CHANNEL_19_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 19 is running in standby mode or not +// <id> dmac_runstdby_19 +#ifndef CONF_DMAC_RUNSTDBY_19 +#define CONF_DMAC_RUNSTDBY_19 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_19 +#ifndef CONF_DMAC_TRIGACT_19 +#define CONF_DMAC_TRIGACT_19 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_19 +#ifndef CONF_DMAC_TRIGSRC_19 +#define CONF_DMAC_TRIGSRC_19 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_19 +#ifndef CONF_DMAC_LVL_19 +#define CONF_DMAC_LVL_19 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_19 +#ifndef CONF_DMAC_EVOE_19 +#define CONF_DMAC_EVOE_19 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_19 +#ifndef CONF_DMAC_EVIE_19 +#define CONF_DMAC_EVIE_19 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_19 +#ifndef CONF_DMAC_EVACT_19 +#define CONF_DMAC_EVACT_19 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_19 +#ifndef CONF_DMAC_STEPSIZE_19 +#define CONF_DMAC_STEPSIZE_19 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_19 +#ifndef CONF_DMAC_STEPSEL_19 +#define CONF_DMAC_STEPSEL_19 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_19 +#ifndef CONF_DMAC_SRCINC_19 +#define CONF_DMAC_SRCINC_19 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_19 +#ifndef CONF_DMAC_DSTINC_19 +#define CONF_DMAC_DSTINC_19 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_19 +#ifndef CONF_DMAC_BEATSIZE_19 +#define CONF_DMAC_BEATSIZE_19 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_19 +#ifndef CONF_DMAC_BLOCKACT_19 +#define CONF_DMAC_BLOCKACT_19 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_19 +#ifndef CONF_DMAC_EVOSEL_19 +#define CONF_DMAC_EVOSEL_19 0 +#endif +// </e> + +// <e> Channel 20 settings +// <id> dmac_channel_20_settings +#ifndef CONF_DMAC_CHANNEL_20_SETTINGS +#define CONF_DMAC_CHANNEL_20_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 20 is running in standby mode or not +// <id> dmac_runstdby_20 +#ifndef CONF_DMAC_RUNSTDBY_20 +#define CONF_DMAC_RUNSTDBY_20 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_20 +#ifndef CONF_DMAC_TRIGACT_20 +#define CONF_DMAC_TRIGACT_20 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_20 +#ifndef CONF_DMAC_TRIGSRC_20 +#define CONF_DMAC_TRIGSRC_20 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_20 +#ifndef CONF_DMAC_LVL_20 +#define CONF_DMAC_LVL_20 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_20 +#ifndef CONF_DMAC_EVOE_20 +#define CONF_DMAC_EVOE_20 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_20 +#ifndef CONF_DMAC_EVIE_20 +#define CONF_DMAC_EVIE_20 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_20 +#ifndef CONF_DMAC_EVACT_20 +#define CONF_DMAC_EVACT_20 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_20 +#ifndef CONF_DMAC_STEPSIZE_20 +#define CONF_DMAC_STEPSIZE_20 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_20 +#ifndef CONF_DMAC_STEPSEL_20 +#define CONF_DMAC_STEPSEL_20 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_20 +#ifndef CONF_DMAC_SRCINC_20 +#define CONF_DMAC_SRCINC_20 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_20 +#ifndef CONF_DMAC_DSTINC_20 +#define CONF_DMAC_DSTINC_20 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_20 +#ifndef CONF_DMAC_BEATSIZE_20 +#define CONF_DMAC_BEATSIZE_20 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_20 +#ifndef CONF_DMAC_BLOCKACT_20 +#define CONF_DMAC_BLOCKACT_20 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_20 +#ifndef CONF_DMAC_EVOSEL_20 +#define CONF_DMAC_EVOSEL_20 0 +#endif +// </e> + +// <e> Channel 21 settings +// <id> dmac_channel_21_settings +#ifndef CONF_DMAC_CHANNEL_21_SETTINGS +#define CONF_DMAC_CHANNEL_21_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 21 is running in standby mode or not +// <id> dmac_runstdby_21 +#ifndef CONF_DMAC_RUNSTDBY_21 +#define CONF_DMAC_RUNSTDBY_21 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_21 +#ifndef CONF_DMAC_TRIGACT_21 +#define CONF_DMAC_TRIGACT_21 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_21 +#ifndef CONF_DMAC_TRIGSRC_21 +#define CONF_DMAC_TRIGSRC_21 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_21 +#ifndef CONF_DMAC_LVL_21 +#define CONF_DMAC_LVL_21 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_21 +#ifndef CONF_DMAC_EVOE_21 +#define CONF_DMAC_EVOE_21 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_21 +#ifndef CONF_DMAC_EVIE_21 +#define CONF_DMAC_EVIE_21 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_21 +#ifndef CONF_DMAC_EVACT_21 +#define CONF_DMAC_EVACT_21 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_21 +#ifndef CONF_DMAC_STEPSIZE_21 +#define CONF_DMAC_STEPSIZE_21 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_21 +#ifndef CONF_DMAC_STEPSEL_21 +#define CONF_DMAC_STEPSEL_21 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_21 +#ifndef CONF_DMAC_SRCINC_21 +#define CONF_DMAC_SRCINC_21 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_21 +#ifndef CONF_DMAC_DSTINC_21 +#define CONF_DMAC_DSTINC_21 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_21 +#ifndef CONF_DMAC_BEATSIZE_21 +#define CONF_DMAC_BEATSIZE_21 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_21 +#ifndef CONF_DMAC_BLOCKACT_21 +#define CONF_DMAC_BLOCKACT_21 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_21 +#ifndef CONF_DMAC_EVOSEL_21 +#define CONF_DMAC_EVOSEL_21 0 +#endif +// </e> + +// <e> Channel 22 settings +// <id> dmac_channel_22_settings +#ifndef CONF_DMAC_CHANNEL_22_SETTINGS +#define CONF_DMAC_CHANNEL_22_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 22 is running in standby mode or not +// <id> dmac_runstdby_22 +#ifndef CONF_DMAC_RUNSTDBY_22 +#define CONF_DMAC_RUNSTDBY_22 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_22 +#ifndef CONF_DMAC_TRIGACT_22 +#define CONF_DMAC_TRIGACT_22 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_22 +#ifndef CONF_DMAC_TRIGSRC_22 +#define CONF_DMAC_TRIGSRC_22 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_22 +#ifndef CONF_DMAC_LVL_22 +#define CONF_DMAC_LVL_22 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_22 +#ifndef CONF_DMAC_EVOE_22 +#define CONF_DMAC_EVOE_22 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_22 +#ifndef CONF_DMAC_EVIE_22 +#define CONF_DMAC_EVIE_22 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_22 +#ifndef CONF_DMAC_EVACT_22 +#define CONF_DMAC_EVACT_22 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_22 +#ifndef CONF_DMAC_STEPSIZE_22 +#define CONF_DMAC_STEPSIZE_22 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_22 +#ifndef CONF_DMAC_STEPSEL_22 +#define CONF_DMAC_STEPSEL_22 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_22 +#ifndef CONF_DMAC_SRCINC_22 +#define CONF_DMAC_SRCINC_22 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_22 +#ifndef CONF_DMAC_DSTINC_22 +#define CONF_DMAC_DSTINC_22 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_22 +#ifndef CONF_DMAC_BEATSIZE_22 +#define CONF_DMAC_BEATSIZE_22 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_22 +#ifndef CONF_DMAC_BLOCKACT_22 +#define CONF_DMAC_BLOCKACT_22 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_22 +#ifndef CONF_DMAC_EVOSEL_22 +#define CONF_DMAC_EVOSEL_22 0 +#endif +// </e> + +// <e> Channel 23 settings +// <id> dmac_channel_23_settings +#ifndef CONF_DMAC_CHANNEL_23_SETTINGS +#define CONF_DMAC_CHANNEL_23_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 23 is running in standby mode or not +// <id> dmac_runstdby_23 +#ifndef CONF_DMAC_RUNSTDBY_23 +#define CONF_DMAC_RUNSTDBY_23 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_23 +#ifndef CONF_DMAC_TRIGACT_23 +#define CONF_DMAC_TRIGACT_23 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_23 +#ifndef CONF_DMAC_TRIGSRC_23 +#define CONF_DMAC_TRIGSRC_23 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_23 +#ifndef CONF_DMAC_LVL_23 +#define CONF_DMAC_LVL_23 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_23 +#ifndef CONF_DMAC_EVOE_23 +#define CONF_DMAC_EVOE_23 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_23 +#ifndef CONF_DMAC_EVIE_23 +#define CONF_DMAC_EVIE_23 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_23 +#ifndef CONF_DMAC_EVACT_23 +#define CONF_DMAC_EVACT_23 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_23 +#ifndef CONF_DMAC_STEPSIZE_23 +#define CONF_DMAC_STEPSIZE_23 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_23 +#ifndef CONF_DMAC_STEPSEL_23 +#define CONF_DMAC_STEPSEL_23 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_23 +#ifndef CONF_DMAC_SRCINC_23 +#define CONF_DMAC_SRCINC_23 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_23 +#ifndef CONF_DMAC_DSTINC_23 +#define CONF_DMAC_DSTINC_23 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_23 +#ifndef CONF_DMAC_BEATSIZE_23 +#define CONF_DMAC_BEATSIZE_23 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_23 +#ifndef CONF_DMAC_BLOCKACT_23 +#define CONF_DMAC_BLOCKACT_23 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_23 +#ifndef CONF_DMAC_EVOSEL_23 +#define CONF_DMAC_EVOSEL_23 0 +#endif +// </e> + +// <e> Channel 24 settings +// <id> dmac_channel_24_settings +#ifndef CONF_DMAC_CHANNEL_24_SETTINGS +#define CONF_DMAC_CHANNEL_24_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 24 is running in standby mode or not +// <id> dmac_runstdby_24 +#ifndef CONF_DMAC_RUNSTDBY_24 +#define CONF_DMAC_RUNSTDBY_24 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_24 +#ifndef CONF_DMAC_TRIGACT_24 +#define CONF_DMAC_TRIGACT_24 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_24 +#ifndef CONF_DMAC_TRIGSRC_24 +#define CONF_DMAC_TRIGSRC_24 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_24 +#ifndef CONF_DMAC_LVL_24 +#define CONF_DMAC_LVL_24 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_24 +#ifndef CONF_DMAC_EVOE_24 +#define CONF_DMAC_EVOE_24 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_24 +#ifndef CONF_DMAC_EVIE_24 +#define CONF_DMAC_EVIE_24 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_24 +#ifndef CONF_DMAC_EVACT_24 +#define CONF_DMAC_EVACT_24 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_24 +#ifndef CONF_DMAC_STEPSIZE_24 +#define CONF_DMAC_STEPSIZE_24 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_24 +#ifndef CONF_DMAC_STEPSEL_24 +#define CONF_DMAC_STEPSEL_24 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_24 +#ifndef CONF_DMAC_SRCINC_24 +#define CONF_DMAC_SRCINC_24 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_24 +#ifndef CONF_DMAC_DSTINC_24 +#define CONF_DMAC_DSTINC_24 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_24 +#ifndef CONF_DMAC_BEATSIZE_24 +#define CONF_DMAC_BEATSIZE_24 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_24 +#ifndef CONF_DMAC_BLOCKACT_24 +#define CONF_DMAC_BLOCKACT_24 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_24 +#ifndef CONF_DMAC_EVOSEL_24 +#define CONF_DMAC_EVOSEL_24 0 +#endif +// </e> + +// <e> Channel 25 settings +// <id> dmac_channel_25_settings +#ifndef CONF_DMAC_CHANNEL_25_SETTINGS +#define CONF_DMAC_CHANNEL_25_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 25 is running in standby mode or not +// <id> dmac_runstdby_25 +#ifndef CONF_DMAC_RUNSTDBY_25 +#define CONF_DMAC_RUNSTDBY_25 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_25 +#ifndef CONF_DMAC_TRIGACT_25 +#define CONF_DMAC_TRIGACT_25 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_25 +#ifndef CONF_DMAC_TRIGSRC_25 +#define CONF_DMAC_TRIGSRC_25 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_25 +#ifndef CONF_DMAC_LVL_25 +#define CONF_DMAC_LVL_25 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_25 +#ifndef CONF_DMAC_EVOE_25 +#define CONF_DMAC_EVOE_25 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_25 +#ifndef CONF_DMAC_EVIE_25 +#define CONF_DMAC_EVIE_25 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_25 +#ifndef CONF_DMAC_EVACT_25 +#define CONF_DMAC_EVACT_25 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_25 +#ifndef CONF_DMAC_STEPSIZE_25 +#define CONF_DMAC_STEPSIZE_25 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_25 +#ifndef CONF_DMAC_STEPSEL_25 +#define CONF_DMAC_STEPSEL_25 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_25 +#ifndef CONF_DMAC_SRCINC_25 +#define CONF_DMAC_SRCINC_25 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_25 +#ifndef CONF_DMAC_DSTINC_25 +#define CONF_DMAC_DSTINC_25 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_25 +#ifndef CONF_DMAC_BEATSIZE_25 +#define CONF_DMAC_BEATSIZE_25 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_25 +#ifndef CONF_DMAC_BLOCKACT_25 +#define CONF_DMAC_BLOCKACT_25 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_25 +#ifndef CONF_DMAC_EVOSEL_25 +#define CONF_DMAC_EVOSEL_25 0 +#endif +// </e> + +// <e> Channel 26 settings +// <id> dmac_channel_26_settings +#ifndef CONF_DMAC_CHANNEL_26_SETTINGS +#define CONF_DMAC_CHANNEL_26_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 26 is running in standby mode or not +// <id> dmac_runstdby_26 +#ifndef CONF_DMAC_RUNSTDBY_26 +#define CONF_DMAC_RUNSTDBY_26 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_26 +#ifndef CONF_DMAC_TRIGACT_26 +#define CONF_DMAC_TRIGACT_26 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_26 +#ifndef CONF_DMAC_TRIGSRC_26 +#define CONF_DMAC_TRIGSRC_26 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_26 +#ifndef CONF_DMAC_LVL_26 +#define CONF_DMAC_LVL_26 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_26 +#ifndef CONF_DMAC_EVOE_26 +#define CONF_DMAC_EVOE_26 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_26 +#ifndef CONF_DMAC_EVIE_26 +#define CONF_DMAC_EVIE_26 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_26 +#ifndef CONF_DMAC_EVACT_26 +#define CONF_DMAC_EVACT_26 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_26 +#ifndef CONF_DMAC_STEPSIZE_26 +#define CONF_DMAC_STEPSIZE_26 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_26 +#ifndef CONF_DMAC_STEPSEL_26 +#define CONF_DMAC_STEPSEL_26 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_26 +#ifndef CONF_DMAC_SRCINC_26 +#define CONF_DMAC_SRCINC_26 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_26 +#ifndef CONF_DMAC_DSTINC_26 +#define CONF_DMAC_DSTINC_26 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_26 +#ifndef CONF_DMAC_BEATSIZE_26 +#define CONF_DMAC_BEATSIZE_26 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_26 +#ifndef CONF_DMAC_BLOCKACT_26 +#define CONF_DMAC_BLOCKACT_26 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_26 +#ifndef CONF_DMAC_EVOSEL_26 +#define CONF_DMAC_EVOSEL_26 0 +#endif +// </e> + +// <e> Channel 27 settings +// <id> dmac_channel_27_settings +#ifndef CONF_DMAC_CHANNEL_27_SETTINGS +#define CONF_DMAC_CHANNEL_27_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 27 is running in standby mode or not +// <id> dmac_runstdby_27 +#ifndef CONF_DMAC_RUNSTDBY_27 +#define CONF_DMAC_RUNSTDBY_27 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_27 +#ifndef CONF_DMAC_TRIGACT_27 +#define CONF_DMAC_TRIGACT_27 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_27 +#ifndef CONF_DMAC_TRIGSRC_27 +#define CONF_DMAC_TRIGSRC_27 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_27 +#ifndef CONF_DMAC_LVL_27 +#define CONF_DMAC_LVL_27 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_27 +#ifndef CONF_DMAC_EVOE_27 +#define CONF_DMAC_EVOE_27 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_27 +#ifndef CONF_DMAC_EVIE_27 +#define CONF_DMAC_EVIE_27 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_27 +#ifndef CONF_DMAC_EVACT_27 +#define CONF_DMAC_EVACT_27 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_27 +#ifndef CONF_DMAC_STEPSIZE_27 +#define CONF_DMAC_STEPSIZE_27 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_27 +#ifndef CONF_DMAC_STEPSEL_27 +#define CONF_DMAC_STEPSEL_27 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_27 +#ifndef CONF_DMAC_SRCINC_27 +#define CONF_DMAC_SRCINC_27 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_27 +#ifndef CONF_DMAC_DSTINC_27 +#define CONF_DMAC_DSTINC_27 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_27 +#ifndef CONF_DMAC_BEATSIZE_27 +#define CONF_DMAC_BEATSIZE_27 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_27 +#ifndef CONF_DMAC_BLOCKACT_27 +#define CONF_DMAC_BLOCKACT_27 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_27 +#ifndef CONF_DMAC_EVOSEL_27 +#define CONF_DMAC_EVOSEL_27 0 +#endif +// </e> + +// <e> Channel 28 settings +// <id> dmac_channel_28_settings +#ifndef CONF_DMAC_CHANNEL_28_SETTINGS +#define CONF_DMAC_CHANNEL_28_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 28 is running in standby mode or not +// <id> dmac_runstdby_28 +#ifndef CONF_DMAC_RUNSTDBY_28 +#define CONF_DMAC_RUNSTDBY_28 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_28 +#ifndef CONF_DMAC_TRIGACT_28 +#define CONF_DMAC_TRIGACT_28 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_28 +#ifndef CONF_DMAC_TRIGSRC_28 +#define CONF_DMAC_TRIGSRC_28 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_28 +#ifndef CONF_DMAC_LVL_28 +#define CONF_DMAC_LVL_28 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_28 +#ifndef CONF_DMAC_EVOE_28 +#define CONF_DMAC_EVOE_28 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_28 +#ifndef CONF_DMAC_EVIE_28 +#define CONF_DMAC_EVIE_28 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_28 +#ifndef CONF_DMAC_EVACT_28 +#define CONF_DMAC_EVACT_28 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_28 +#ifndef CONF_DMAC_STEPSIZE_28 +#define CONF_DMAC_STEPSIZE_28 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_28 +#ifndef CONF_DMAC_STEPSEL_28 +#define CONF_DMAC_STEPSEL_28 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_28 +#ifndef CONF_DMAC_SRCINC_28 +#define CONF_DMAC_SRCINC_28 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_28 +#ifndef CONF_DMAC_DSTINC_28 +#define CONF_DMAC_DSTINC_28 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_28 +#ifndef CONF_DMAC_BEATSIZE_28 +#define CONF_DMAC_BEATSIZE_28 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_28 +#ifndef CONF_DMAC_BLOCKACT_28 +#define CONF_DMAC_BLOCKACT_28 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_28 +#ifndef CONF_DMAC_EVOSEL_28 +#define CONF_DMAC_EVOSEL_28 0 +#endif +// </e> + +// <e> Channel 29 settings +// <id> dmac_channel_29_settings +#ifndef CONF_DMAC_CHANNEL_29_SETTINGS +#define CONF_DMAC_CHANNEL_29_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 29 is running in standby mode or not +// <id> dmac_runstdby_29 +#ifndef CONF_DMAC_RUNSTDBY_29 +#define CONF_DMAC_RUNSTDBY_29 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_29 +#ifndef CONF_DMAC_TRIGACT_29 +#define CONF_DMAC_TRIGACT_29 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_29 +#ifndef CONF_DMAC_TRIGSRC_29 +#define CONF_DMAC_TRIGSRC_29 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_29 +#ifndef CONF_DMAC_LVL_29 +#define CONF_DMAC_LVL_29 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_29 +#ifndef CONF_DMAC_EVOE_29 +#define CONF_DMAC_EVOE_29 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_29 +#ifndef CONF_DMAC_EVIE_29 +#define CONF_DMAC_EVIE_29 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_29 +#ifndef CONF_DMAC_EVACT_29 +#define CONF_DMAC_EVACT_29 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_29 +#ifndef CONF_DMAC_STEPSIZE_29 +#define CONF_DMAC_STEPSIZE_29 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_29 +#ifndef CONF_DMAC_STEPSEL_29 +#define CONF_DMAC_STEPSEL_29 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_29 +#ifndef CONF_DMAC_SRCINC_29 +#define CONF_DMAC_SRCINC_29 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_29 +#ifndef CONF_DMAC_DSTINC_29 +#define CONF_DMAC_DSTINC_29 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_29 +#ifndef CONF_DMAC_BEATSIZE_29 +#define CONF_DMAC_BEATSIZE_29 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_29 +#ifndef CONF_DMAC_BLOCKACT_29 +#define CONF_DMAC_BLOCKACT_29 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_29 +#ifndef CONF_DMAC_EVOSEL_29 +#define CONF_DMAC_EVOSEL_29 0 +#endif +// </e> + +// <e> Channel 30 settings +// <id> dmac_channel_30_settings +#ifndef CONF_DMAC_CHANNEL_30_SETTINGS +#define CONF_DMAC_CHANNEL_30_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 30 is running in standby mode or not +// <id> dmac_runstdby_30 +#ifndef CONF_DMAC_RUNSTDBY_30 +#define CONF_DMAC_RUNSTDBY_30 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_30 +#ifndef CONF_DMAC_TRIGACT_30 +#define CONF_DMAC_TRIGACT_30 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_30 +#ifndef CONF_DMAC_TRIGSRC_30 +#define CONF_DMAC_TRIGSRC_30 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_30 +#ifndef CONF_DMAC_LVL_30 +#define CONF_DMAC_LVL_30 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_30 +#ifndef CONF_DMAC_EVOE_30 +#define CONF_DMAC_EVOE_30 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_30 +#ifndef CONF_DMAC_EVIE_30 +#define CONF_DMAC_EVIE_30 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_30 +#ifndef CONF_DMAC_EVACT_30 +#define CONF_DMAC_EVACT_30 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_30 +#ifndef CONF_DMAC_STEPSIZE_30 +#define CONF_DMAC_STEPSIZE_30 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_30 +#ifndef CONF_DMAC_STEPSEL_30 +#define CONF_DMAC_STEPSEL_30 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_30 +#ifndef CONF_DMAC_SRCINC_30 +#define CONF_DMAC_SRCINC_30 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_30 +#ifndef CONF_DMAC_DSTINC_30 +#define CONF_DMAC_DSTINC_30 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_30 +#ifndef CONF_DMAC_BEATSIZE_30 +#define CONF_DMAC_BEATSIZE_30 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_30 +#ifndef CONF_DMAC_BLOCKACT_30 +#define CONF_DMAC_BLOCKACT_30 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_30 +#ifndef CONF_DMAC_EVOSEL_30 +#define CONF_DMAC_EVOSEL_30 0 +#endif +// </e> + +// <e> Channel 31 settings +// <id> dmac_channel_31_settings +#ifndef CONF_DMAC_CHANNEL_31_SETTINGS +#define CONF_DMAC_CHANNEL_31_SETTINGS 0 +#endif + +// <q> Channel Run in Standby +// <i> Indicates whether channel 31 is running in standby mode or not +// <id> dmac_runstdby_31 +#ifndef CONF_DMAC_RUNSTDBY_31 +#define CONF_DMAC_RUNSTDBY_31 0 +#endif + +// <o> Trigger action +// <0=> One trigger required for each block transfer +// <2=> One trigger required for each beat transfer +// <3=> One trigger required for each transaction +// <i> Defines the trigger action used for a transfer +// <id> dmac_trigact_31 +#ifndef CONF_DMAC_TRIGACT_31 +#define CONF_DMAC_TRIGACT_31 0 +#endif + +// <o> Trigger source +// <0x00=> Only software/event triggers +// <0x01=> RTC Time Stamp Trigger +// <0x02=> DSU Debug Communication Channel 0 Trigger +// <0x03=> DSU Debug Communication Channel 1 Trigger +// <0x04=> SERCOM0 RX Trigger +// <0x05=> SERCOM0 TX Trigger +// <0x06=> SERCOM1 RX Trigger +// <0x07=> SERCOM1 TX Trigger +// <0x08=> SERCOM2 RX Trigger +// <0x09=> SERCOM2 TX Trigger +// <0x0A=> SERCOM3 RX Trigger +// <0x0B=> SERCOM3 TX Trigger +// <0x0C=> SERCOM4 RX Trigger +// <0x0D=> SERCOM4 TX Trigger +// <0x0E=> SERCOM5 RX Trigger +// <0x0F=> SERCOM5 TX Trigger +// <0x10=> SERCOM6 RX Trigger +// <0x11=> SERCOM6 TX Trigger +// <0x12=> SERCOM7 RX Trigger +// <0x13=> SERCOM7 TX Trigger +// <0x14=> CAN0 DEBUG Trigger +// <0x15=> CAN1 DEBUG Trigger +// <0x16=> TCC0 Overflow Trigger Trigger +// <0x17=> TCC0 Match/Compare 0 Trigger Trigger +// <0x18=> TCC0 Match/Compare 1 Trigger Trigger +// <0x19=> TCC0 Match/Compare 2 Trigger Trigger +// <0x1A=> TCC0 Match/Compare 3 Trigger Trigger +// <0x1B=> TCC0 Match/Compare 4 Trigger Trigger +// <0x1C=> TCC0 Match/Compare 5 Trigger Trigger +// <0x1D=> TCC1 Overflow Trigger Trigger +// <0x1E=> TCC1 Match/Compare 0 Trigger Trigger +// <0x1F=> TCC1 Match/Compare 1 Trigger Trigger +// <0x20=> TCC1 Match/Compare 2 Trigger Trigger +// <0x21=> TCC1 Match/Compare 3 Trigger Trigger +// <0x22=> TCC2 Overflow Trigger Trigger +// <0x23=> TCC2 Match/Compare 0 Trigger Trigger +// <0x24=> TCC2 Match/Compare 1 Trigger Trigger +// <0x25=> TCC2 Match/Compare 2 Trigger Trigger +// <0x26=> TCC3 Overflow Trigger Trigger +// <0x27=> TCC3 Match/Compare 0 Trigger Trigger +// <0x28=> TCC3 Match/Compare 1 Trigger Trigger +// <0x29=> TCC4 Overflow Trigger Trigger +// <0x2A=> TCC4 Match/Compare 0 Trigger Trigger +// <0x2B=> TCC4 Match/Compare 1 Trigger Trigger +// <0x2C=> TC0 Overflow Trigger +// <0x2D=> TC0 Match/Compare 0 Trigger +// <0x2E=> TC0 Match/Compare 1 Trigger +// <0x2F=> TC1 Overflow Trigger +// <0x30=> TC1 Match/Compare 0 Trigger +// <0x31=> TC1 Match/Compare 1 Trigger +// <0x32=> TC2 Overflow Trigger +// <0x33=> TC2 Match/Compare 0 Trigger +// <0x34=> TC2 Match/Compare 1 Trigger +// <0x35=> TC3 Overflow Trigger +// <0x36=> TC3 Match/Compare 0 Trigger +// <0x37=> TC3 Match/Compare 1 Trigger +// <0x38=> TC4 Overflow Trigger +// <0x39=> TC4 Match/Compare 0 Trigger +// <0x3A=> TC4 Match/Compare 1 Trigger +// <0x3B=> TC5 Overflow Trigger +// <0x3C=> TC5 Match/Compare 0 Trigger +// <0x3D=> TC5 Match/Compare 1 Trigger +// <0x3E=> TC6 Overflow Trigger +// <0x3F=> TC6 Match/Compare 0 Trigger +// <0x40=> TC6 Match/Compare 1 Trigger +// <0x41=> TC7 Overflow Trigger +// <0x42=> TC7 Match/Compare 0 Trigger +// <0x43=> TC7 Match/Compare 1 Trigger +// <0x44=> ADC0 Result Ready Trigger +// <0x45=> ADC0 Sequencing Trigger +// <0x46=> ADC1 Result Ready Trigger +// <0x47=> ADC1 Sequencing Trigger +// <0x48=> DAC Empty 0 Trigger +// <0x49=> DAC Empty 1 Trigger +// <0x4A=> DAC Result Ready 0 Trigger +// <0x4B=> DAC Result Ready 1 Trigger +// <0x4C=> I2S Rx 0 Trigger +// <0x4D=> I2S Rx 1 Trigger +// <0x4E=> I2S Tx 0 Trigger +// <0x4F=> I2S Tx 1 Trigger +// <0x50=> PCC RX Trigger +// <0x51=> AES Write Trigger +// <0x52=> AES Read Trigger +// <0x53=> QSPI Rx Trigger +// <0x54=> QSPI Tx Trigger +// <i> Defines the peripheral trigger which is source of the transfer +// <id> dmac_trifsrc_31 +#ifndef CONF_DMAC_TRIGSRC_31 +#define CONF_DMAC_TRIGSRC_31 0 +#endif + +// <o> Channel Arbitration Level +// <0=> Channel priority 0 +// <1=> Channel priority 1 +// <2=> Channel priority 2 +// <3=> Channel priority 3 +// <i> Defines the arbitration level for this channel +// <id> dmac_lvl_31 +#ifndef CONF_DMAC_LVL_31 +#define CONF_DMAC_LVL_31 0 +#endif + +// <q> Channel Event Output +// <i> Indicates whether channel event generation is enabled or not +// <id> dmac_evoe_31 +#ifndef CONF_DMAC_EVOE_31 +#define CONF_DMAC_EVOE_31 0 +#endif + +// <q> Channel Event Input +// <i> Indicates whether channel event reception is enabled or not +// <id> dmac_evie_31 +#ifndef CONF_DMAC_EVIE_31 +#define CONF_DMAC_EVIE_31 0 +#endif + +// <o> Event Input Action +// <0=> No action +// <1=> Normal transfer and conditional transfer on strobe trigger +// <2=> Conditional transfer trigger +// <3=> Conditional block transfer +// <4=> Channel suspend operation +// <5=> Channel resume operation +// <6=> Skip next block suspend action +// <i> Defines the event input action +// <id> dmac_evact_31 +#ifndef CONF_DMAC_EVACT_31 +#define CONF_DMAC_EVACT_31 0 +#endif + +// <o> Address Increment Step Size +// <0=> Next ADDR = ADDR + (BEATSIZE + 1) * 1 +// <1=> Next ADDR = ADDR + (BEATSIZE + 1) * 2 +// <2=> Next ADDR = ADDR + (BEATSIZE + 1) * 4 +// <3=> Next ADDR = ADDR + (BEATSIZE + 1) * 8 +// <4=> Next ADDR = ADDR + (BEATSIZE + 1) * 16 +// <5=> Next ADDR = ADDR + (BEATSIZE + 1) * 32 +// <6=> Next ADDR = ADDR + (BEATSIZE + 1) * 64 +// <7=> Next ADDR = ADDR + (BEATSIZE + 1) * 128 +// <i> Defines the address increment step size, applies to source or destination address +// <id> dmac_stepsize_31 +#ifndef CONF_DMAC_STEPSIZE_31 +#define CONF_DMAC_STEPSIZE_31 0 +#endif + +// <o> Step Selection +// <0=> Step size settings apply to the destination address +// <1=> Step size settings apply to the source address +// <i> Defines whether source or destination addresses are using the step size settings +// <id> dmac_stepsel_31 +#ifndef CONF_DMAC_STEPSEL_31 +#define CONF_DMAC_STEPSEL_31 0 +#endif + +// <q> Source Address Increment +// <i> Indicates whether the source address incrementation is enabled or not +// <id> dmac_srcinc_31 +#ifndef CONF_DMAC_SRCINC_31 +#define CONF_DMAC_SRCINC_31 0 +#endif + +// <q> Destination Address Increment +// <i> Indicates whether the destination address incrementation is enabled or not +// <id> dmac_dstinc_31 +#ifndef CONF_DMAC_DSTINC_31 +#define CONF_DMAC_DSTINC_31 0 +#endif + +// <o> Beat Size +// <0=> 8-bit bus transfer +// <1=> 16-bit bus transfer +// <2=> 32-bit bus transfer +// <i> Defines the size of one beat +// <id> dmac_beatsize_31 +#ifndef CONF_DMAC_BEATSIZE_31 +#define CONF_DMAC_BEATSIZE_31 0 +#endif + +// <o> Block Action +// <0=> Channel will be disabled if it is the last block transfer in the transaction +// <1=> Channel will be disabled if it is the last block transfer in the transaction and block interrupt +// <2=> Channel suspend operation is complete +// <3=> Both channel suspend operation and block interrupt +// <i> Defines the the DMAC should take after a block transfer has completed +// <id> dmac_blockact_31 +#ifndef CONF_DMAC_BLOCKACT_31 +#define CONF_DMAC_BLOCKACT_31 0 +#endif + +// <o> Event Output Selection +// <0=> Event generation disabled +// <1=> Event strobe when block transfer complete +// <3=> Event strobe when beat transfer complete +// <i> Defines the event output selection +// <id> dmac_evosel_31 +#ifndef CONF_DMAC_EVOSEL_31 +#define CONF_DMAC_EVOSEL_31 0 +#endif +// </e> + +// </e> + +// <<< end of configuration section >>> + +#endif // HPL_DMAC_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_gclk_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_gclk_config.h new file mode 100644 index 000000000..6f4f01a7e --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_gclk_config.h @@ -0,0 +1,924 @@ +// Circuit Python SAMD51 clock tree: +// DFLL48M (with USBCRM on to sync with external USB ref) -> GCLK1, GCLK5, GCLK6 +// GCLK1 (48MHz) -> 48 MHz peripherals +// GCLK5 (48 MHz divided down to 2 MHz) -> DPLL0 +// DPLL0 (multiplied up to 120 MHz) -> GCLK0, GCLK4 (output for monitoring) +// GCLK6 (48 MHz divided down to 12 MHz) -> DAC + +// We'd like to use XOSC32K as a ref for DFLL48M on boards with a 32kHz crystal, +// but haven't figured that out yet. + +// Used in hpl/core/hpl_init.c to define which clocks should be initialized first. +// Not clear why all these need to be specified, but it doesn't work properly otherwise. + +//#define CIRCUITPY_GCLK_INIT_1ST (1 << 0 | 1 << 1 | 1 << 3 | 1 <<5) +#define CIRCUITPY_GCLK_INIT_1ST 0xffff + +/* Auto-generated config file hpl_gclk_config.h */ +#ifndef HPL_GCLK_CONFIG_H +#define HPL_GCLK_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// <e> Generic clock generator 0 configuration +// <i> Indicates whether generic clock 0 configuration is enabled or not +// <id> enable_gclk_gen_0 +#ifndef CONF_GCLK_GENERATOR_0_CONFIG +#define CONF_GCLK_GENERATOR_0_CONFIG 1 +#endif + +// <h> Generic Clock Generator Control +// <y> Generic clock generator 0 source// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad +// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1 +// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M) +// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0) +// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1) +// <i> This defines the clock source for generic clock generator 0 +// <id> gclk_gen_0_oscillator +#ifndef CONF_GCLK_GEN_0_SOURCE +#define CONF_GCLK_GEN_0_SOURCE GCLK_GENCTRL_SRC_DPLL0 +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> gclk_arch_gen_0_runstdby +#ifndef CONF_GCLK_GEN_0_RUNSTDBY +#define CONF_GCLK_GEN_0_RUNSTDBY 0 +#endif + +// <q> Divide Selection +// <i> Indicates whether Divide Selection is enabled or not +//<id> gclk_gen_0_div_sel +#ifndef CONF_GCLK_GEN_0_DIVSEL +#define CONF_GCLK_GEN_0_DIVSEL 0 +#endif + +// <q> Output Enable +// <i> Indicates whether Output Enable is enabled or not +// <id> gclk_arch_gen_0_oe +#ifndef CONF_GCLK_GEN_0_OE +#define CONF_GCLK_GEN_0_OE 1 +#endif + +// <q> Output Off Value +// <i> Indicates whether Output Off Value is enabled or not +// <id> gclk_arch_gen_0_oov +#ifndef CONF_GCLK_GEN_0_OOV +#define CONF_GCLK_GEN_0_OOV 0 +#endif + +// <q> Improve Duty Cycle +// <i> Indicates whether Improve Duty Cycle is enabled or not +// <id> gclk_arch_gen_0_idc +#ifndef CONF_GCLK_GEN_0_IDC +#define CONF_GCLK_GEN_0_IDC 0 +#endif + +// <q> Generic Clock Generator Enable +// <i> Indicates whether Generic Clock Generator Enable is enabled or not +// <id> gclk_arch_gen_0_enable +#ifndef CONF_GCLK_GEN_0_GENEN +#define CONF_GCLK_GEN_0_GENEN 1 +#endif +// </h> + +//<h> Generic Clock Generator Division +//<o> Generic clock generator 0 division <0x0000-0xFFFF> +// <id> gclk_gen_0_div +#ifndef CONF_GCLK_GEN_0_DIV +#define CONF_GCLK_GEN_0_DIV 1 +#endif +// </h> +// </e> + +// <e> Generic clock generator 1 configuration +// <i> Indicates whether generic clock 1 configuration is enabled or not +// <id> enable_gclk_gen_1 +#ifndef CONF_GCLK_GENERATOR_1_CONFIG +#define CONF_GCLK_GENERATOR_1_CONFIG 1 +#endif + +// <h> Generic Clock Generator Control +// <y> Generic clock generator 1 source// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad +// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M) +// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0) +// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1) +// <i> This defines the clock source for generic clock generator 1 +// <id> gclk_gen_1_oscillator +#ifndef CONF_GCLK_GEN_1_SOURCE +#define CONF_GCLK_GEN_1_SOURCE GCLK_GENCTRL_SRC_DFLL +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> gclk_arch_gen_1_runstdby +#ifndef CONF_GCLK_GEN_1_RUNSTDBY +#define CONF_GCLK_GEN_1_RUNSTDBY 0 +#endif + +// <q> Divide Selection +// <i> Indicates whether Divide Selection is enabled or not +//<id> gclk_gen_1_div_sel +#ifndef CONF_GCLK_GEN_1_DIVSEL +#define CONF_GCLK_GEN_1_DIVSEL 0 +#endif + +// <q> Output Enable +// <i> Indicates whether Output Enable is enabled or not +// <id> gclk_arch_gen_1_oe +#ifndef CONF_GCLK_GEN_1_OE +#define CONF_GCLK_GEN_1_OE 1 +#endif + +// <q> Output Off Value +// <i> Indicates whether Output Off Value is enabled or not +// <id> gclk_arch_gen_1_oov +#ifndef CONF_GCLK_GEN_1_OOV +#define CONF_GCLK_GEN_1_OOV 0 +#endif + +// <q> Improve Duty Cycle +// <i> Indicates whether Improve Duty Cycle is enabled or not +// <id> gclk_arch_gen_1_idc +#ifndef CONF_GCLK_GEN_1_IDC +#define CONF_GCLK_GEN_1_IDC 0 +#endif + +// <q> Generic Clock Generator Enable +// <i> Indicates whether Generic Clock Generator Enable is enabled or not +// <id> gclk_arch_gen_1_enable +#ifndef CONF_GCLK_GEN_1_GENEN +#define CONF_GCLK_GEN_1_GENEN 1 +#endif +// </h> + +//<h> Generic Clock Generator Division +//<o> Generic clock generator 1 division <0x0000-0xFFFF> +// <id> gclk_gen_1_div +#ifndef CONF_GCLK_GEN_1_DIV +#define CONF_GCLK_GEN_1_DIV 1 +#endif +// </h> +// </e> + +// <e> Generic clock generator 2 configuration +// <i> Indicates whether generic clock 2 configuration is enabled or not +// <id> enable_gclk_gen_2 +#ifndef CONF_GCLK_GENERATOR_2_CONFIG +#define CONF_GCLK_GENERATOR_2_CONFIG 1 +#endif + +// <h> Generic Clock Generator Control +// <y> Generic clock generator 2 source// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad +// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1 +// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M) +// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0) +// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1) +// <i> This defines the clock source for generic clock generator 2 +// <id> gclk_gen_2_oscillator +#ifndef CONF_GCLK_GEN_2_SOURCE +#define CONF_GCLK_GEN_2_SOURCE GCLK_GENCTRL_SRC_OSCULP32K +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> gclk_arch_gen_2_runstdby +#ifndef CONF_GCLK_GEN_2_RUNSTDBY +#define CONF_GCLK_GEN_2_RUNSTDBY 0 +#endif + +// <q> Divide Selection +// <i> Indicates whether Divide Selection is enabled or not +//<id> gclk_gen_2_div_sel +#ifndef CONF_GCLK_GEN_2_DIVSEL +#define CONF_GCLK_GEN_2_DIVSEL 1 +#endif + +// <q> Output Enable +// <i> Indicates whether Output Enable is enabled or not +// <id> gclk_arch_gen_2_oe +#ifndef CONF_GCLK_GEN_2_OE +#define CONF_GCLK_GEN_2_OE 0 +#endif + +// <q> Output Off Value +// <i> Indicates whether Output Off Value is enabled or not +// <id> gclk_arch_gen_2_oov +#ifndef CONF_GCLK_GEN_2_OOV +#define CONF_GCLK_GEN_2_OOV 0 +#endif + +// <q> Improve Duty Cycle +// <i> Indicates whether Improve Duty Cycle is enabled or not +// <id> gclk_arch_gen_2_idc +#ifndef CONF_GCLK_GEN_2_IDC +#define CONF_GCLK_GEN_2_IDC 0 +#endif + +// <q> Generic Clock Generator Enable +// <i> Indicates whether Generic Clock Generator Enable is enabled or not +// <id> gclk_arch_gen_2_enable +#ifndef CONF_GCLK_GEN_2_GENEN +#define CONF_GCLK_GEN_2_GENEN 1 +#endif +// </h> + +//<h> Generic Clock Generator Division +//<o> Generic clock generator 2 division <0x0000-0xFFFF> +// <id> gclk_gen_2_div +#ifndef CONF_GCLK_GEN_2_DIV +#define CONF_GCLK_GEN_2_DIV 4 +#endif +// </h> +// </e> + +// <e> Generic clock generator 3 configuration +// <i> Indicates whether generic clock 3 configuration is enabled or not +// <id> enable_gclk_gen_3 +#ifndef CONF_GCLK_GENERATOR_3_CONFIG +#define CONF_GCLK_GENERATOR_3_CONFIG 0 +#endif + +// <h> Generic Clock Generator Control +// <y> Generic clock generator 3 source// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad +// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1 +// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M) +// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0) +// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1) +// <i> This defines the clock source for generic clock generator 3 +// <id> gclk_gen_3_oscillator +#ifndef CONF_GCLK_GEN_3_SOURCE +#define CONF_GCLK_GEN_3_SOURCE GCLK_GENCTRL_SRC_XOSC32K +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> gclk_arch_gen_3_runstdby +#ifndef CONF_GCLK_GEN_3_RUNSTDBY +#define CONF_GCLK_GEN_3_RUNSTDBY 0 +#endif + +// <q> Divide Selection +// <i> Indicates whether Divide Selection is enabled or not +//<id> gclk_gen_3_div_sel +#ifndef CONF_GCLK_GEN_3_DIVSEL +#define CONF_GCLK_GEN_3_DIVSEL 0 +#endif + +// <q> Output Enable +// <i> Indicates whether Output Enable is enabled or not +// <id> gclk_arch_gen_3_oe +#ifndef CONF_GCLK_GEN_3_OE +#define CONF_GCLK_GEN_3_OE 0 +#endif + +// <q> Output Off Value +// <i> Indicates whether Output Off Value is enabled or not +// <id> gclk_arch_gen_3_oov +#ifndef CONF_GCLK_GEN_3_OOV +#define CONF_GCLK_GEN_3_OOV 0 +#endif + +// <q> Improve Duty Cycle +// <i> Indicates whether Improve Duty Cycle is enabled or not +// <id> gclk_arch_gen_3_idc +#ifndef CONF_GCLK_GEN_3_IDC +#define CONF_GCLK_GEN_3_IDC 0 +#endif + +// <q> Generic Clock Generator Enable +// <i> Indicates whether Generic Clock Generator Enable is enabled or not +// <id> gclk_arch_gen_3_enable +#ifndef CONF_GCLK_GEN_3_GENEN +#define CONF_GCLK_GEN_3_GENEN 0 +#endif +// </h> + +//<h> Generic Clock Generator Division +//<o> Generic clock generator 3 division <0x0000-0xFFFF> +// <id> gclk_gen_3_div +#ifndef CONF_GCLK_GEN_3_DIV +#define CONF_GCLK_GEN_3_DIV 1 +#endif +// </h> +// </e> + +// <e> Generic clock generator 4 configuration +// <i> Indicates whether generic clock 4 configuration is enabled or not +// <id> enable_gclk_gen_4 +#ifndef CONF_GCLK_GENERATOR_4_CONFIG +#define CONF_GCLK_GENERATOR_4_CONFIG 1 +#endif + +// <h> Generic Clock Generator Control +// <y> Generic clock generator 4 source// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad +// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1 +// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M) +// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0) +// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1) +// <i> This defines the clock source for generic clock generator 4 +// <id> gclk_gen_4_oscillator +#ifndef CONF_GCLK_GEN_4_SOURCE +#define CONF_GCLK_GEN_4_SOURCE GCLK_GENCTRL_SRC_DPLL0 +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> gclk_arch_gen_4_runstdby +#ifndef CONF_GCLK_GEN_4_RUNSTDBY +#define CONF_GCLK_GEN_4_RUNSTDBY 0 +#endif + +// <q> Divide Selection +// <i> Indicates whether Divide Selection is enabled or not +//<id> gclk_gen_4_div_sel +#ifndef CONF_GCLK_GEN_4_DIVSEL +#define CONF_GCLK_GEN_4_DIVSEL 0 +#endif + +// <q> Output Enable +// <i> Indicates whether Output Enable is enabled or not +// <id> gclk_arch_gen_4_oe +#ifndef CONF_GCLK_GEN_4_OE +#define CONF_GCLK_GEN_4_OE 1 +#endif + +// <q> Output Off Value +// <i> Indicates whether Output Off Value is enabled or not +// <id> gclk_arch_gen_4_oov +#ifndef CONF_GCLK_GEN_4_OOV +#define CONF_GCLK_GEN_4_OOV 0 +#endif + +// <q> Improve Duty Cycle +// <i> Indicates whether Improve Duty Cycle is enabled or not +// <id> gclk_arch_gen_4_idc +#ifndef CONF_GCLK_GEN_4_IDC +#define CONF_GCLK_GEN_4_IDC 0 +#endif + +// <q> Generic Clock Generator Enable +// <i> Indicates whether Generic Clock Generator Enable is enabled or not +// <id> gclk_arch_gen_4_enable +#ifndef CONF_GCLK_GEN_4_GENEN +#define CONF_GCLK_GEN_4_GENEN 1 +#endif +// </h> + +//<h> Generic Clock Generator Division +//<o> Generic clock generator 4 division <0x0000-0xFFFF> +// <id> gclk_gen_4_div +#ifndef CONF_GCLK_GEN_4_DIV +#define CONF_GCLK_GEN_4_DIV 1 +#endif +// </h> +// </e> + +// <e> Generic clock generator 5 configuration +// <i> Indicates whether generic clock 5 configuration is enabled or not +// <id> enable_gclk_gen_5 +#ifndef CONF_GCLK_GENERATOR_5_CONFIG +#define CONF_GCLK_GENERATOR_5_CONFIG 1 +#endif + +// <h> Generic Clock Generator Control +// <y> Generic clock generator 5 source// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad +// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1 +// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M) +// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0) +// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1) +// <i> This defines the clock source for generic clock generator 5 +// <id> gclk_gen_5_oscillator +#ifndef CONF_GCLK_GEN_5_SOURCE +#define CONF_GCLK_GEN_5_SOURCE GCLK_GENCTRL_SRC_DFLL +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> gclk_arch_gen_5_runstdby +#ifndef CONF_GCLK_GEN_5_RUNSTDBY +#define CONF_GCLK_GEN_5_RUNSTDBY 0 +#endif + +// <q> Divide Selection +// <i> Indicates whether Divide Selection is enabled or not +//<id> gclk_gen_5_div_sel +#ifndef CONF_GCLK_GEN_5_DIVSEL +#define CONF_GCLK_GEN_5_DIVSEL 0 +#endif + +// <q> Output Enable +// <i> Indicates whether Output Enable is enabled or not +// <id> gclk_arch_gen_5_oe +#ifndef CONF_GCLK_GEN_5_OE +#define CONF_GCLK_GEN_5_OE 1 +#endif + +// <q> Output Off Value +// <i> Indicates whether Output Off Value is enabled or not +// <id> gclk_arch_gen_5_oov +#ifndef CONF_GCLK_GEN_5_OOV +#define CONF_GCLK_GEN_5_OOV 0 +#endif + +// <q> Improve Duty Cycle +// <i> Indicates whether Improve Duty Cycle is enabled or not +// <id> gclk_arch_gen_5_idc +#ifndef CONF_GCLK_GEN_5_IDC +#define CONF_GCLK_GEN_5_IDC 0 +#endif + +// <q> Generic Clock Generator Enable +// <i> Indicates whether Generic Clock Generator Enable is enabled or not +// <id> gclk_arch_gen_5_enable +#ifndef CONF_GCLK_GEN_5_GENEN +#define CONF_GCLK_GEN_5_GENEN 1 +#endif +// </h> + +//<h> Generic Clock Generator Division +//<o> Generic clock generator 5 division <0x0000-0xFFFF> +// <id> gclk_gen_5_div +#ifndef CONF_GCLK_GEN_5_DIV +#define CONF_GCLK_GEN_5_DIV 24 +#endif +// </h> +// </e> + +// <e> Generic clock generator 6 configuration +// <i> Indicates whether generic clock 6 configuration is enabled or not +// <id> enable_gclk_gen_6 +#ifndef CONF_GCLK_GENERATOR_6_CONFIG +#define CONF_GCLK_GENERATOR_6_CONFIG 1 +#endif + +// <h> Generic Clock Generator Control +// <y> Generic clock generator 6 source// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad +// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1 +// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M) +// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0) +// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1) +// <i> This defines the clock source for generic clock generator 6 +// <id> gclk_gen_6_oscillator +#ifndef CONF_GCLK_GEN_6_SOURCE +#define CONF_GCLK_GEN_6_SOURCE GCLK_GENCTRL_SRC_DFLL +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> gclk_arch_gen_6_runstdby +#ifndef CONF_GCLK_GEN_6_RUNSTDBY +#define CONF_GCLK_GEN_6_RUNSTDBY 0 +#endif + +// <q> Divide Selection +// <i> Indicates whether Divide Selection is enabled or not +//<id> gclk_gen_6_div_sel +#ifndef CONF_GCLK_GEN_6_DIVSEL +#define CONF_GCLK_GEN_6_DIVSEL 0 +#endif + +// <q> Output Enable +// <i> Indicates whether Output Enable is enabled or not +// <id> gclk_arch_gen_6_oe +#ifndef CONF_GCLK_GEN_6_OE +#define CONF_GCLK_GEN_6_OE 0 +#endif + +// <q> Output Off Value +// <i> Indicates whether Output Off Value is enabled or not +// <id> gclk_arch_gen_6_oov +#ifndef CONF_GCLK_GEN_6_OOV +#define CONF_GCLK_GEN_6_OOV 0 +#endif + +// <q> Improve Duty Cycle +// <i> Indicates whether Improve Duty Cycle is enabled or not +// <id> gclk_arch_gen_6_idc +#ifndef CONF_GCLK_GEN_6_IDC +#define CONF_GCLK_GEN_6_IDC 1 +#endif + +// <q> Generic Clock Generator Enable +// <i> Indicates whether Generic Clock Generator Enable is enabled or not +// <id> gclk_arch_gen_6_enable +#ifndef CONF_GCLK_GEN_6_GENEN +#define CONF_GCLK_GEN_6_GENEN 1 +#endif +// </h> + +//<h> Generic Clock Generator Division +//<o> Generic clock generator 6 division <0x0000-0xFFFF> +// <id> gclk_gen_6_div +#ifndef CONF_GCLK_GEN_6_DIV +#define CONF_GCLK_GEN_6_DIV 4 +#endif +// </h> +// </e> + +// <e> Generic clock generator 7 configuration +// <i> Indicates whether generic clock 7 configuration is enabled or not +// <id> enable_gclk_gen_7 +#ifndef CONF_GCLK_GENERATOR_7_CONFIG +#define CONF_GCLK_GENERATOR_7_CONFIG 0 +#endif + +// <h> Generic Clock Generator Control +// <y> Generic clock generator 7 source// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad +// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1 +// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M) +// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0) +// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1) +// <i> This defines the clock source for generic clock generator 7 +// <id> gclk_gen_7_oscillator +#ifndef CONF_GCLK_GEN_7_SOURCE +#define CONF_GCLK_GEN_7_SOURCE GCLK_GENCTRL_SRC_XOSC1 +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> gclk_arch_gen_7_runstdby +#ifndef CONF_GCLK_GEN_7_RUNSTDBY +#define CONF_GCLK_GEN_7_RUNSTDBY 0 +#endif + +// <q> Divide Selection +// <i> Indicates whether Divide Selection is enabled or not +//<id> gclk_gen_7_div_sel +#ifndef CONF_GCLK_GEN_7_DIVSEL +#define CONF_GCLK_GEN_7_DIVSEL 0 +#endif + +// <q> Output Enable +// <i> Indicates whether Output Enable is enabled or not +// <id> gclk_arch_gen_7_oe +#ifndef CONF_GCLK_GEN_7_OE +#define CONF_GCLK_GEN_7_OE 0 +#endif + +// <q> Output Off Value +// <i> Indicates whether Output Off Value is enabled or not +// <id> gclk_arch_gen_7_oov +#ifndef CONF_GCLK_GEN_7_OOV +#define CONF_GCLK_GEN_7_OOV 0 +#endif + +// <q> Improve Duty Cycle +// <i> Indicates whether Improve Duty Cycle is enabled or not +// <id> gclk_arch_gen_7_idc +#ifndef CONF_GCLK_GEN_7_IDC +#define CONF_GCLK_GEN_7_IDC 0 +#endif + +// <q> Generic Clock Generator Enable +// <i> Indicates whether Generic Clock Generator Enable is enabled or not +// <id> gclk_arch_gen_7_enable +#ifndef CONF_GCLK_GEN_7_GENEN +#define CONF_GCLK_GEN_7_GENEN 0 +#endif +// </h> + +//<h> Generic Clock Generator Division +//<o> Generic clock generator 7 division <0x0000-0xFFFF> +// <id> gclk_gen_7_div +#ifndef CONF_GCLK_GEN_7_DIV +#define CONF_GCLK_GEN_7_DIV 1 +#endif +// </h> +// </e> + +// <e> Generic clock generator 8 configuration +// <i> Indicates whether generic clock 8 configuration is enabled or not +// <id> enable_gclk_gen_8 +#ifndef CONF_GCLK_GENERATOR_8_CONFIG +#define CONF_GCLK_GENERATOR_8_CONFIG 0 +#endif + +// <h> Generic Clock Generator Control +// <y> Generic clock generator 8 source// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad +// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1 +// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M) +// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0) +// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1) +// <i> This defines the clock source for generic clock generator 8 +// <id> gclk_gen_8_oscillator +#ifndef CONF_GCLK_GEN_8_SOURCE +#define CONF_GCLK_GEN_8_SOURCE GCLK_GENCTRL_SRC_XOSC1 +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> gclk_arch_gen_8_runstdby +#ifndef CONF_GCLK_GEN_8_RUNSTDBY +#define CONF_GCLK_GEN_8_RUNSTDBY 0 +#endif + +// <q> Divide Selection +// <i> Indicates whether Divide Selection is enabled or not +//<id> gclk_gen_8_div_sel +#ifndef CONF_GCLK_GEN_8_DIVSEL +#define CONF_GCLK_GEN_8_DIVSEL 0 +#endif + +// <q> Output Enable +// <i> Indicates whether Output Enable is enabled or not +// <id> gclk_arch_gen_8_oe +#ifndef CONF_GCLK_GEN_8_OE +#define CONF_GCLK_GEN_8_OE 0 +#endif + +// <q> Output Off Value +// <i> Indicates whether Output Off Value is enabled or not +// <id> gclk_arch_gen_8_oov +#ifndef CONF_GCLK_GEN_8_OOV +#define CONF_GCLK_GEN_8_OOV 0 +#endif + +// <q> Improve Duty Cycle +// <i> Indicates whether Improve Duty Cycle is enabled or not +// <id> gclk_arch_gen_8_idc +#ifndef CONF_GCLK_GEN_8_IDC +#define CONF_GCLK_GEN_8_IDC 0 +#endif + +// <q> Generic Clock Generator Enable +// <i> Indicates whether Generic Clock Generator Enable is enabled or not +// <id> gclk_arch_gen_8_enable +#ifndef CONF_GCLK_GEN_8_GENEN +#define CONF_GCLK_GEN_8_GENEN 0 +#endif +// </h> + +//<h> Generic Clock Generator Division +//<o> Generic clock generator 8 division <0x0000-0xFFFF> +// <id> gclk_gen_8_div +#ifndef CONF_GCLK_GEN_8_DIV +#define CONF_GCLK_GEN_8_DIV 1 +#endif +// </h> +// </e> + +// <e> Generic clock generator 9 configuration +// <i> Indicates whether generic clock 9 configuration is enabled or not +// <id> enable_gclk_gen_9 +#ifndef CONF_GCLK_GENERATOR_9_CONFIG +#define CONF_GCLK_GENERATOR_9_CONFIG 0 +#endif + +// <h> Generic Clock Generator Control +// <y> Generic clock generator 9 source// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad +// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1 +// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M) +// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0) +// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1) +// <i> This defines the clock source for generic clock generator 9 +// <id> gclk_gen_9_oscillator +#ifndef CONF_GCLK_GEN_9_SOURCE +#define CONF_GCLK_GEN_9_SOURCE GCLK_GENCTRL_SRC_XOSC1 +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> gclk_arch_gen_9_runstdby +#ifndef CONF_GCLK_GEN_9_RUNSTDBY +#define CONF_GCLK_GEN_9_RUNSTDBY 0 +#endif + +// <q> Divide Selection +// <i> Indicates whether Divide Selection is enabled or not +//<id> gclk_gen_9_div_sel +#ifndef CONF_GCLK_GEN_9_DIVSEL +#define CONF_GCLK_GEN_9_DIVSEL 0 +#endif + +// <q> Output Enable +// <i> Indicates whether Output Enable is enabled or not +// <id> gclk_arch_gen_9_oe +#ifndef CONF_GCLK_GEN_9_OE +#define CONF_GCLK_GEN_9_OE 0 +#endif + +// <q> Output Off Value +// <i> Indicates whether Output Off Value is enabled or not +// <id> gclk_arch_gen_9_oov +#ifndef CONF_GCLK_GEN_9_OOV +#define CONF_GCLK_GEN_9_OOV 0 +#endif + +// <q> Improve Duty Cycle +// <i> Indicates whether Improve Duty Cycle is enabled or not +// <id> gclk_arch_gen_9_idc +#ifndef CONF_GCLK_GEN_9_IDC +#define CONF_GCLK_GEN_9_IDC 0 +#endif + +// <q> Generic Clock Generator Enable +// <i> Indicates whether Generic Clock Generator Enable is enabled or not +// <id> gclk_arch_gen_9_enable +#ifndef CONF_GCLK_GEN_9_GENEN +#define CONF_GCLK_GEN_9_GENEN 0 +#endif +// </h> + +//<h> Generic Clock Generator Division +//<o> Generic clock generator 9 division <0x0000-0xFFFF> +// <id> gclk_gen_9_div +#ifndef CONF_GCLK_GEN_9_DIV +#define CONF_GCLK_GEN_9_DIV 1 +#endif +// </h> +// </e> + +// <e> Generic clock generator 10 configuration +// <i> Indicates whether generic clock 10 configuration is enabled or not +// <id> enable_gclk_gen_10 +#ifndef CONF_GCLK_GENERATOR_10_CONFIG +#define CONF_GCLK_GENERATOR_10_CONFIG 0 +#endif + +// <h> Generic Clock Generator Control +// <y> Generic clock generator 10 source// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad +// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1 +// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M) +// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0) +// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1) +// <i> This defines the clock source for generic clock generator 10 +// <id> gclk_gen_10_oscillator +#ifndef CONF_GCLK_GEN_10_SOURCE +#define CONF_GCLK_GEN_10_SOURCE GCLK_GENCTRL_SRC_XOSC1 +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> gclk_arch_gen_10_runstdby +#ifndef CONF_GCLK_GEN_10_RUNSTDBY +#define CONF_GCLK_GEN_10_RUNSTDBY 0 +#endif + +// <q> Divide Selection +// <i> Indicates whether Divide Selection is enabled or not +//<id> gclk_gen_10_div_sel +#ifndef CONF_GCLK_GEN_10_DIVSEL +#define CONF_GCLK_GEN_10_DIVSEL 0 +#endif + +// <q> Output Enable +// <i> Indicates whether Output Enable is enabled or not +// <id> gclk_arch_gen_10_oe +#ifndef CONF_GCLK_GEN_10_OE +#define CONF_GCLK_GEN_10_OE 0 +#endif + +// <q> Output Off Value +// <i> Indicates whether Output Off Value is enabled or not +// <id> gclk_arch_gen_10_oov +#ifndef CONF_GCLK_GEN_10_OOV +#define CONF_GCLK_GEN_10_OOV 0 +#endif + +// <q> Improve Duty Cycle +// <i> Indicates whether Improve Duty Cycle is enabled or not +// <id> gclk_arch_gen_10_idc +#ifndef CONF_GCLK_GEN_10_IDC +#define CONF_GCLK_GEN_10_IDC 0 +#endif + +// <q> Generic Clock Generator Enable +// <i> Indicates whether Generic Clock Generator Enable is enabled or not +// <id> gclk_arch_gen_10_enable +#ifndef CONF_GCLK_GEN_10_GENEN +#define CONF_GCLK_GEN_10_GENEN 0 +#endif +// </h> + +//<h> Generic Clock Generator Division +//<o> Generic clock generator 10 division <0x0000-0xFFFF> +// <id> gclk_gen_10_div +#ifndef CONF_GCLK_GEN_10_DIV +#define CONF_GCLK_GEN_10_DIV 1 +#endif +// </h> +// </e> + +// <e> Generic clock generator 11 configuration +// <i> Indicates whether generic clock 11 configuration is enabled or not +// <id> enable_gclk_gen_11 +#ifndef CONF_GCLK_GENERATOR_11_CONFIG +#define CONF_GCLK_GENERATOR_11_CONFIG 0 +#endif + +// <h> Generic Clock Generator Control +// <y> Generic clock generator 11 source// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_GENCTRL_SRC_GCLKIN"> Generic clock generator input pad +// <GCLK_GENCTRL_SRC_GCLKGEN1"> Generic clock generator 1 +// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_DFLL"> Digital Frequency Locked Loop (DFLL48M) +// <GCLK_GENCTRL_SRC_DPLL0"> Digital Phase Locked Loop (DPLL0) +// <GCLK_GENCTRL_SRC_DPLL1"> Digital Phase Locked Loop (DPLL1) +// <i> This defines the clock source for generic clock generator 11 +// <id> gclk_gen_11_oscillator +#ifndef CONF_GCLK_GEN_11_SOURCE +#define CONF_GCLK_GEN_11_SOURCE GCLK_GENCTRL_SRC_XOSC1 +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> gclk_arch_gen_11_runstdby +#ifndef CONF_GCLK_GEN_11_RUNSTDBY +#define CONF_GCLK_GEN_11_RUNSTDBY 0 +#endif + +// <q> Divide Selection +// <i> Indicates whether Divide Selection is enabled or not +//<id> gclk_gen_11_div_sel +#ifndef CONF_GCLK_GEN_11_DIVSEL +#define CONF_GCLK_GEN_11_DIVSEL 0 +#endif + +// <q> Output Enable +// <i> Indicates whether Output Enable is enabled or not +// <id> gclk_arch_gen_11_oe +#ifndef CONF_GCLK_GEN_11_OE +#define CONF_GCLK_GEN_11_OE 0 +#endif + +// <q> Output Off Value +// <i> Indicates whether Output Off Value is enabled or not +// <id> gclk_arch_gen_11_oov +#ifndef CONF_GCLK_GEN_11_OOV +#define CONF_GCLK_GEN_11_OOV 0 +#endif + +// <q> Improve Duty Cycle +// <i> Indicates whether Improve Duty Cycle is enabled or not +// <id> gclk_arch_gen_11_idc +#ifndef CONF_GCLK_GEN_11_IDC +#define CONF_GCLK_GEN_11_IDC 0 +#endif + +// <q> Generic Clock Generator Enable +// <i> Indicates whether Generic Clock Generator Enable is enabled or not +// <id> gclk_arch_gen_11_enable +#ifndef CONF_GCLK_GEN_11_GENEN +#define CONF_GCLK_GEN_11_GENEN 0 +#endif +// </h> + +//<h> Generic Clock Generator Division +//<o> Generic clock generator 11 division <0x0000-0xFFFF> +// <id> gclk_gen_11_div +#ifndef CONF_GCLK_GEN_11_DIV +#define CONF_GCLK_GEN_11_DIV 1 +#endif +// </h> +// </e> + +// <<< end of configuration section >>> + +#endif // HPL_GCLK_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_mclk_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_mclk_config.h new file mode 100644 index 000000000..a5a7de53c --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_mclk_config.h @@ -0,0 +1,104 @@ +/* Auto-generated config file hpl_mclk_config.h */ +#ifndef HPL_MCLK_CONFIG_H +#define HPL_MCLK_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +#include <peripheral_clk_config.h> + +// <e> System Configuration +// <i> Indicates whether configuration for system is enabled or not +// <id> enable_cpu_clock +#ifndef CONF_SYSTEM_CONFIG +#define CONF_SYSTEM_CONFIG 1 +#endif + +// <h> Basic settings +// <y> CPU Clock source +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 +// <i> This defines the clock source for the CPU +// <id> cpu_clock_source +#ifndef CONF_CPU_SRC +#define CONF_CPU_SRC GCLK_PCHCTRL_GEN_GCLK0_Val +#endif + +// <y> CPU Clock Division Factor +// <MCLK_CPUDIV_DIV_DIV1_Val"> 1 +// <MCLK_CPUDIV_DIV_DIV2_Val"> 2 +// <MCLK_CPUDIV_DIV_DIV4_Val"> 4 +// <MCLK_CPUDIV_DIV_DIV8_Val"> 8 +// <MCLK_CPUDIV_DIV_DIV16_Val"> 16 +// <MCLK_CPUDIV_DIV_DIV32_Val"> 32 +// <MCLK_CPUDIV_DIV_DIV64_Val"> 64 +// <MCLK_CPUDIV_DIV_DIV128_Val"> 128 +// <i> Prescalar for CPU clock +// <id> cpu_div +#ifndef CONF_MCLK_CPUDIV +#define CONF_MCLK_CPUDIV MCLK_CPUDIV_DIV_DIV1_Val +#endif +// <y> Low Power Clock Division +// <MCLK_LPDIV_LPDIV_DIV1_Val"> Divide by 1 +// <MCLK_LPDIV_LPDIV_DIV2_Val"> Divide by 2 +// <MCLK_LPDIV_LPDIV_DIV4_Val"> Divide by 4 +// <MCLK_LPDIV_LPDIV_DIV8_Val"> Divide by 8 +// <MCLK_LPDIV_LPDIV_DIV16_Val"> Divide by 16 +// <MCLK_LPDIV_LPDIV_DIV32_Val"> Divide by 32 +// <MCLK_LPDIV_LPDIV_DIV64_Val"> Divide by 64 +// <MCLK_LPDIV_LPDIV_DIV128_Val"> Divide by 128 +// <id> mclk_arch_lpdiv +#ifndef CONF_MCLK_LPDIV +#define CONF_MCLK_LPDIV MCLK_LPDIV_LPDIV_DIV4_Val +#endif + +// <y> Backup Clock Division +// <MCLK_BUPDIV_BUPDIV_DIV1_Val"> Divide by 1 +// <MCLK_BUPDIV_BUPDIV_DIV2_Val"> Divide by 2 +// <MCLK_BUPDIV_BUPDIV_DIV4_Val"> Divide by 4 +// <MCLK_BUPDIV_BUPDIV_DIV8_Val"> Divide by 8 +// <MCLK_BUPDIV_BUPDIV_DIV16_Val"> Divide by 16 +// <MCLK_BUPDIV_BUPDIV_DIV32_Val"> Divide by 32 +// <MCLK_BUPDIV_BUPDIV_DIV64_Val"> Divide by 64 +// <MCLK_BUPDIV_BUPDIV_DIV128_Val"> Divide by 128 +// <id> mclk_arch_bupdiv +#ifndef CONF_MCLK_BUPDIV +#define CONF_MCLK_BUPDIV MCLK_BUPDIV_BUPDIV_DIV8_Val +#endif +// <y> High-Speed Clock Division +// <MCLK_HSDIV_DIV_DIV1_Val"> Divide by 1 +// <id> mclk_arch_hsdiv +#ifndef CONF_MCLK_HSDIV +#define CONF_MCLK_HSDIV MCLK_HSDIV_DIV_DIV1_Val +#endif +// </h> + +// <h> NVM Settings +// <o> NVM Wait States +// <i> These bits select the number of wait states for a read operation. +// <0=> 0 +// <1=> 1 +// <2=> 2 +// <3=> 3 +// <4=> 4 +// <5=> 5 +// <6=> 6 +// <7=> 7 +// <8=> 8 +// <9=> 9 +// <10=> 10 +// <11=> 11 +// <12=> 12 +// <13=> 13 +// <14=> 14 +// <15=> 15 +// <id> nvm_wait_states +#ifndef CONF_NVM_WAIT_STATE +#define CONF_NVM_WAIT_STATE 0 +#endif + +// </h> + +// </e> + +// <<< end of configuration section >>> + +#endif // HPL_MCLK_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_nvmctrl_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_nvmctrl_config.h new file mode 100644 index 000000000..53fcb593a --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_nvmctrl_config.h @@ -0,0 +1,36 @@ +/* Auto-generated config file hpl_nvmctrl_config.h */ +#ifndef HPL_NVMCTRL_CONFIG_H +#define HPL_NVMCTRL_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// <h> Basic Settings + +// <o> Power Reduction Mode During Sleep +// <0x00=> Wake On Access +// <0x01=> Wake Up Instant +// <0x03=> Disabled +// <id> nvm_arch_sleepprm +#ifndef CONF_NVM_SLEEPPRM +#define CONF_NVM_SLEEPPRM 0 +#endif + +// <q> AHB0 Cache Disable +// <i> Indicate whether AHB0 cache is disable or not +// <id> nvm_arch_cache0 +#ifndef CONF_NVM_CACHE0 +#define CONF_NVM_CACHE0 1 +#endif + +// <q> AHB1 Cache Disable +// <i> Indicate whether AHB1 cache is disable or not +// <id> nvm_arch_cache1 +#ifndef CONF_NVM_CACHE1 +#define CONF_NVM_CACHE1 1 +#endif + +// </h> + +// <<< end of configuration section >>> + +#endif // HPL_NVMCTRL_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_osc32kctrl_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_osc32kctrl_config.h new file mode 100644 index 000000000..d93cbf922 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_osc32kctrl_config.h @@ -0,0 +1,163 @@ +/* Auto-generated config file hpl_osc32kctrl_config.h */ +#ifndef HPL_OSC32KCTRL_CONFIG_H +#define HPL_OSC32KCTRL_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// <e> RTC Source configuration +// <id> enable_rtc_source +#ifndef CONF_RTCCTRL_CONFIG +#define CONF_RTCCTRL_CONFIG 0 +#endif + +// <h> RTC source control +// <y> RTC Clock Source Selection +// <GCLK_GENCTRL_SRC_OSCULP32K"> 32kHz Ultra Low Power Internal Oscillator (OSCULP32K) +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <i> This defines the clock source for RTC +// <id> rtc_source_oscillator +#ifndef CONF_RTCCTRL_SRC +#define CONF_RTCCTRL_SRC GCLK_GENCTRL_SRC_OSCULP32K +#endif + +// <q> Use 1 kHz output +// <id> rtc_1khz_selection +#ifndef CONF_RTCCTRL_1KHZ +#define CONF_RTCCTRL_1KHZ 1 +#endif + +#if CONF_RTCCTRL_SRC == GCLK_GENCTRL_SRC_OSCULP32K +#define CONF_RTCCTRL (CONF_RTCCTRL_1KHZ ? OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K_Val : OSC32KCTRL_RTCCTRL_RTCSEL_ULP32K_Val) +#elif CONF_RTCCTRL_SRC == GCLK_GENCTRL_SRC_XOSC32K +#define CONF_RTCCTRL (CONF_RTCCTRL_1KHZ ? OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K_Val : OSC32KCTRL_RTCCTRL_RTCSEL_XOSC32K_Val) +#else +#error unexpected CONF_RTCCTRL_SRC +#endif + +// </h> +// </e> + +// <e> 32kHz External Crystal Oscillator Configuration +// <i> Indicates whether configuration for External 32K Osc is enabled or not +// <id> enable_xosc32k +#ifndef CONF_XOSC32K_CONFIG +#define CONF_XOSC32K_CONFIG 1 +#endif + +// <h> 32kHz External Crystal Oscillator Control +// <q> Oscillator enable +// <i> Indicates whether 32kHz External Crystal Oscillator is enabled or not +// <id> xosc32k_arch_enable +#ifndef CONF_XOSC32K_ENABLE +#define CONF_XOSC32K_ENABLE 1 +#endif + +// <o> Start-Up Time +// <0x0=>62592us +// <0x1=>125092us +// <0x2=>500092us +// <0x3=>1000092us +// <0x4=>2000092us +// <0x5=>4000092us +// <0x6=>8000092us +// <id> xosc32k_arch_startup +#ifndef CONF_XOSC32K_STARTUP +#define CONF_XOSC32K_STARTUP 0x0 +#endif + +// <q> On Demand Control +// <i> Indicates whether On Demand Control is enabled or not +// <id> xosc32k_arch_ondemand +#ifndef CONF_XOSC32K_ONDEMAND +#define CONF_XOSC32K_ONDEMAND 1 +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> xosc32k_arch_runstdby +#ifndef CONF_XOSC32K_RUNSTDBY +#define CONF_XOSC32K_RUNSTDBY 0 +#endif + +// <q> 1kHz Output Enable +// <i> Indicates whether 1kHz Output is enabled or not +// <id> xosc32k_arch_en1k +#ifndef CONF_XOSC32K_EN1K +#define CONF_XOSC32K_EN1K 0 +#endif + +// <q> 32kHz Output Enable +// <i> Indicates whether 32kHz Output is enabled or not +// <id> xosc32k_arch_en32k +#ifndef CONF_XOSC32K_EN32K +#define CONF_XOSC32K_EN32K 0 +#endif + +// <q> Clock Switch Back +// <i> Indicates whether Clock Switch Back is enabled or not +// <id> xosc32k_arch_swben +#ifndef CONF_XOSC32K_SWBEN +#define CONF_XOSC32K_SWBEN 0 +#endif + +// <q> Clock Failure Detector +// <i> Indicates whether Clock Failure Detector is enabled or not +// <id> xosc32k_arch_cfden +#ifndef CONF_XOSC32K_CFDEN +#define CONF_XOSC32K_CFDEN 0 +#endif + +// <q> Clock Failure Detector Event Out +// <i> Indicates whether Clock Failure Detector Event Out is enabled or not +// <id> xosc32k_arch_cfdeo +#ifndef CONF_XOSC32K_CFDEO +#define CONF_XOSC32K_CFDEO 0 +#endif + +// <q> Crystal connected to XIN32/XOUT32 Enable +// <i> Indicates whether the connections between the I/O pads and the external clock or crystal oscillator is enabled or not +// <id> xosc32k_arch_xtalen +#ifndef CONF_XOSC32K_XTALEN +#define CONF_XOSC32K_XTALEN 0 +#endif + +// <o> Control Gain Mode +// <0x0=>Low Power mode +// <0x1=>Standard mode +// <0x2=>High Speed mode +// <id> xosc32k_arch_cgm +#ifndef CONF_XOSC32K_CGM +#define CONF_XOSC32K_CGM 0x1 +#endif + +// </h> +// </e> + +// <e> 32kHz Ultra Low Power Internal Oscillator Configuration +// <i> Indicates whether configuration for OSCULP32K is enabled or not +// <id> enable_osculp32k +#ifndef CONF_OSCULP32K_CONFIG +#define CONF_OSCULP32K_CONFIG 1 +#endif + +// <h> 32kHz Ultra Low Power Internal Oscillator Control + +// <q> Oscillator Calibration Control +// <i> Indicates whether Oscillator Calibration is enabled or not +// <id> osculp32k_calib_enable +#ifndef CONF_OSCULP32K_CALIB_ENABLE +#define CONF_OSCULP32K_CALIB_ENABLE 0 +#endif + +// <o> Oscillator Calibration <0x0-0x3F> +// <id> osculp32k_calib +#ifndef CONF_OSCULP32K_CALIB +#define CONF_OSCULP32K_CALIB 0x0 +#endif + +// </h> +// </e> + +// <<< end of configuration section >>> + +#endif // HPL_OSC32KCTRL_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_oscctrl_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_oscctrl_config.h new file mode 100644 index 000000000..cd1186605 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_oscctrl_config.h @@ -0,0 +1,634 @@ +/* Auto-generated config file hpl_oscctrl_config.h */ +#ifndef HPL_OSCCTRL_CONFIG_H +#define HPL_OSCCTRL_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// <e> External Multipurpose Crystal Oscillator Configuration +// <i> Indicates whether configuration for XOSC0 is enabled or not +// <id> enable_xosc0 +#ifndef CONF_XOSC0_CONFIG +#define CONF_XOSC0_CONFIG 0 +#endif + +// <o> Frequency <8000000-48000000> +// <i> Oscillation frequency of the resonator connected to the External Multipurpose Crystal Oscillator. +// <id> xosc0_frequency +#ifndef CONF_XOSC_FREQUENCY +#define CONF_XOSC0_FREQUENCY 12000000 +#endif + +// <h> External Multipurpose Crystal Oscillator Control +// <q> Oscillator enable +// <i> Indicates whether External Multipurpose Crystal Oscillator is enabled or not +// <id> xosc0_arch_enable +#ifndef CONF_XOSC0_ENABLE +#define CONF_XOSC0_ENABLE 0 +#endif + +// <o> Start-Up Time +// <0x0=>31us +// <0x1=>61us +// <0x2=>122us +// <0x3=>244us +// <0x4=>488us +// <0x5=>977us +// <0x6=>1953us +// <0x7=>3906us +// <0x8=>7813us +// <0x9=>15625us +// <0xA=>31250us +// <0xB=>62500us +// <0xC=>125000us +// <0xD=>250000us +// <0xE=>500000us +// <0xF=>1000000us +// <id> xosc0_arch_startup +#ifndef CONF_XOSC0_STARTUP +#define CONF_XOSC0_STARTUP 0 +#endif + +// <q> Clock Switch Back +// <i> Indicates whether Clock Switch Back is enabled or not +// <id> xosc0_arch_swben +#ifndef CONF_XOSC0_SWBEN +#define CONF_XOSC0_SWBEN 0 +#endif + +// <q> Clock Failure Detector +// <i> Indicates whether Clock Failure Detector is enabled or not +// <id> xosc0_arch_cfden +#ifndef CONF_XOSC0_CFDEN +#define CONF_XOSC0_CFDEN 0 +#endif + +// <q> Automatic Loop Control Enable +// <i> Indicates whether Automatic Loop Control is enabled or not +// <id> xosc0_arch_enalc +#ifndef CONF_XOSC0_ENALC +#define CONF_XOSC0_ENALC 0 +#endif + +// <q> Low Buffer Gain Enable +// <i> Indicates whether Low Buffer Gain is enabled or not +// <id> xosc0_arch_lowbufgain +#ifndef CONF_XOSC0_LOWBUFGAIN +#define CONF_XOSC0_LOWBUFGAIN 0 +#endif + +// <q> On Demand Control +// <i> Indicates whether On Demand Control is enabled or not +// <id> xosc0_arch_ondemand +#ifndef CONF_XOSC0_ONDEMAND +#define CONF_XOSC0_ONDEMAND 0 +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> xosc0_arch_runstdby +#ifndef CONF_XOSC0_RUNSTDBY +#define CONF_XOSC0_RUNSTDBY 0 +#endif + +// <q> Crystal connected to XIN/XOUT Enable +// <i> Indicates whether the connections between the I/O pads and the external clock or crystal oscillator is enabled or not +// <id> xosc0_arch_xtalen +#ifndef CONF_XOSC0_XTALEN +#define CONF_XOSC0_XTALEN 0 +#endif +//</h> +//</e> + +#if CONF_XOSC0_FREQUENCY >= 32000000 +#define CONF_XOSC0_CFDPRESC 0x0 +#define CONF_XOSC0_IMULT 0x7 +#define CONF_XOSC0_IPTAT 0x3 +#elif CONF_XOSC0_FREQUENCY >= 24000000 +#define CONF_XOSC0_CFDPRESC 0x1 +#define CONF_XOSC0_IMULT 0x6 +#define CONF_XOSC0_IPTAT 0x3 +#elif CONF_XOSC0_FREQUENCY >= 16000000 +#define CONF_XOSC0_CFDPRESC 0x2 +#define CONF_XOSC0_IMULT 0x5 +#define CONF_XOSC0_IPTAT 0x3 +#elif CONF_XOSC0_FREQUENCY >= 8000000 +#define CONF_XOSC0_CFDPRESC 0x3 +#define CONF_XOSC0_IMULT 0x4 +#define CONF_XOSC0_IPTAT 0x3 +#endif + +// <e> External Multipurpose Crystal Oscillator Configuration +// <i> Indicates whether configuration for XOSC1 is enabled or not +// <id> enable_xosc1 +#ifndef CONF_XOSC1_CONFIG +#define CONF_XOSC1_CONFIG 0 +#endif + +// <o> Frequency <8000000-48000000> +// <i> Oscillation frequency of the resonator connected to the External Multipurpose Crystal Oscillator. +// <id> xosc1_frequency +#ifndef CONF_XOSC_FREQUENCY +#define CONF_XOSC1_FREQUENCY 12000000 +#endif + +// <h> External Multipurpose Crystal Oscillator Control +// <q> Oscillator enable +// <i> Indicates whether External Multipurpose Crystal Oscillator is enabled or not +// <id> xosc1_arch_enable +#ifndef CONF_XOSC1_ENABLE +#define CONF_XOSC1_ENABLE 0 +#endif + +// <o> Start-Up Time +// <0x0=>31us +// <0x1=>61us +// <0x2=>122us +// <0x3=>244us +// <0x4=>488us +// <0x5=>977us +// <0x6=>1953us +// <0x7=>3906us +// <0x8=>7813us +// <0x9=>15625us +// <0xA=>31250us +// <0xB=>62500us +// <0xC=>125000us +// <0xD=>250000us +// <0xE=>500000us +// <0xF=>1000000us +// <id> xosc1_arch_startup +#ifndef CONF_XOSC1_STARTUP +#define CONF_XOSC1_STARTUP 0 +#endif + +// <q> Clock Switch Back +// <i> Indicates whether Clock Switch Back is enabled or not +// <id> xosc1_arch_swben +#ifndef CONF_XOSC1_SWBEN +#define CONF_XOSC1_SWBEN 0 +#endif + +// <q> Clock Failure Detector +// <i> Indicates whether Clock Failure Detector is enabled or not +// <id> xosc1_arch_cfden +#ifndef CONF_XOSC1_CFDEN +#define CONF_XOSC1_CFDEN 0 +#endif + +// <q> Automatic Loop Control Enable +// <i> Indicates whether Automatic Loop Control is enabled or not +// <id> xosc1_arch_enalc +#ifndef CONF_XOSC1_ENALC +#define CONF_XOSC1_ENALC 0 +#endif + +// <q> Low Buffer Gain Enable +// <i> Indicates whether Low Buffer Gain is enabled or not +// <id> xosc1_arch_lowbufgain +#ifndef CONF_XOSC1_LOWBUFGAIN +#define CONF_XOSC1_LOWBUFGAIN 0 +#endif + +// <q> On Demand Control +// <i> Indicates whether On Demand Control is enabled or not +// <id> xosc1_arch_ondemand +#ifndef CONF_XOSC1_ONDEMAND +#define CONF_XOSC1_ONDEMAND 0 +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> xosc1_arch_runstdby +#ifndef CONF_XOSC1_RUNSTDBY +#define CONF_XOSC1_RUNSTDBY 0 +#endif + +// <q> Crystal connected to XIN/XOUT Enable +// <i> Indicates whether the connections between the I/O pads and the external clock or crystal oscillator is enabled or not +// <id> xosc1_arch_xtalen +#ifndef CONF_XOSC1_XTALEN +#define CONF_XOSC1_XTALEN 0 +#endif +//</h> +//</e> + +#if CONF_XOSC1_FREQUENCY >= 32000000 +#define CONF_XOSC1_CFDPRESC 0x0 +#define CONF_XOSC1_IMULT 0x7 +#define CONF_XOSC1_IPTAT 0x3 +#elif CONF_XOSC1_FREQUENCY >= 24000000 +#define CONF_XOSC1_CFDPRESC 0x1 +#define CONF_XOSC1_IMULT 0x6 +#define CONF_XOSC1_IPTAT 0x3 +#elif CONF_XOSC1_FREQUENCY >= 16000000 +#define CONF_XOSC1_CFDPRESC 0x2 +#define CONF_XOSC1_IMULT 0x5 +#define CONF_XOSC1_IPTAT 0x3 +#elif CONF_XOSC1_FREQUENCY >= 8000000 +#define CONF_XOSC1_CFDPRESC 0x3 +#define CONF_XOSC1_IMULT 0x4 +#define CONF_XOSC1_IPTAT 0x3 +#endif + +// <e> DFLL Configuration +// <i> Indicates whether configuration for DFLL is enabled or not +// <id> enable_dfll +#ifndef CONF_DFLL_CONFIG +#define CONF_DFLL_CONFIG 0 +#endif + +// <y> Reference Clock Source +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 +// <i> Select the clock source +// <id> dfll_ref_clock +#ifndef CONF_DFLL_GCLK +#define CONF_DFLL_GCLK GCLK_PCHCTRL_GEN_GCLK3_Val +#endif + +// <h> Digital Frequency Locked Loop Control +// <q> DFLL Enable +// <i> Indicates whether DFLL is enabled or not +// <id> dfll_arch_enable +#ifndef CONF_DFLL_ENABLE +#define CONF_DFLL_ENABLE 1 +#endif + +// <q> On Demand Control +// <i> Indicates whether On Demand Control is enabled or not +// <id> dfll_arch_ondemand +#ifndef CONF_DFLL_ONDEMAND +#define CONF_DFLL_ONDEMAND 0 +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> dfll_arch_runstdby +#ifndef CONF_DFLL_RUNSTDBY +#define CONF_DFLL_RUNSTDBY 0 +#endif + +// <q> USB Clock Recovery Mode +// <i> Indicates whether USB Clock Recovery Mode is enabled or not +// <id> dfll_arch_usbcrm +#ifndef CONF_DFLL_USBCRM +#define CONF_DFLL_USBCRM 1 +#endif + +// <q> Wait Lock +// <i> Indicates whether Wait Lock is enabled or not +// <id> dfll_arch_waitlock +#ifndef CONF_DFLL_WAITLOCK +#define CONF_DFLL_WAITLOCK 1 +#endif + +// <q> Bypass Coarse Lock +// <i> Indicates whether Bypass Coarse Lock is enabled or not +// <id> dfll_arch_bplckc +#ifndef CONF_DFLL_BPLCKC +#define CONF_DFLL_BPLCKC 0 +#endif + +// <q> Quick Lock Disable +// <i> Indicates whether Quick Lock Disable is enabled or not +// <id> dfll_arch_qldis +#ifndef CONF_DFLL_QLDIS +#define CONF_DFLL_QLDIS 0 +#endif + +// <q> Chill Cycle Disable +// <i> Indicates whether Chill Cycle Disable is enabled or not +// <id> dfll_arch_ccdis +#ifndef CONF_DFLL_CCDIS +#define CONF_DFLL_CCDIS 1 +#endif + +// <q> Lose Lock After Wake +// <i> Indicates whether Lose Lock After Wake is enabled or not +// <id> dfll_arch_llaw +#ifndef CONF_DFLL_LLAW +#define CONF_DFLL_LLAW 0 +#endif + +// <q> Stable DFLL Frequency +// <i> Indicates whether Stable DFLL Frequency is enabled or not +// <id> dfll_arch_stable +#ifndef CONF_DFLL_STABLE +#define CONF_DFLL_STABLE 0 +#endif + +// <o> Operating Mode Selection +// <0=>Open Loop Mode +// <1=>Closed Loop Mode +// <id> dfll_mode +#ifndef CONF_DFLL_MODE +#define CONF_DFLL_MODE 0x0 +#endif + +// <o> Coarse Maximum Step <0x0-0x1F> +// <id> dfll_arch_cstep +#ifndef CONF_DFLL_CSTEP +#define CONF_DFLL_CSTEP 0x1 +#endif + +// <o> Fine Maximum Step <0x0-0xFF> +// <id> dfll_arch_fstep +#ifndef CONF_DFLL_FSTEP +#define CONF_DFLL_FSTEP 0x1 +#endif + +// <o> DFLL Multiply Factor <0x0-0xFFFF> +// <id> dfll_mul +#ifndef CONF_DFLL_MUL +#define CONF_DFLL_MUL 0x0 +#endif + +// <e> DFLL Calibration Overwrite +// <i> Indicates whether Overwrite Calibration value of DFLL +// <id> dfll_arch_calibration +#ifndef CONF_DFLL_OVERWRITE_CALIBRATION +#define CONF_DFLL_OVERWRITE_CALIBRATION 0 +#endif + +// <o> Coarse Value <0x0-0x3F> +// <id> dfll_arch_coarse +#ifndef CONF_DFLL_COARSE +#define CONF_DFLL_COARSE (0x1f / 4) +#endif + +// <o> Fine Value <0x0-0xFF> +// <id> dfll_arch_fine +#ifndef CONF_DFLL_FINE +#define CONF_DFLL_FINE (0x80) +#endif + +//</e> + +//</h> + +//</e> + +// <e> FDPLL0 Configuration +// <i> Indicates whether configuration for FDPLL0 is enabled or not +// <id> enable_fdpll0 +#ifndef CONF_FDPLL0_CONFIG +#define CONF_FDPLL0_CONFIG 1 +#endif + +// <y> Reference Clock Source +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 +// <i> Select the clock source. +// <id> fdpll0_ref_clock +#ifndef CONF_FDPLL0_GCLK +#define CONF_FDPLL0_GCLK GCLK_PCHCTRL_GEN_GCLK5_Val +#endif + +// <h> Digital Phase Locked Loop Control +// <q> Enable +// <i> Indicates whether Digital Phase Locked Loop is enabled or not +// <id> fdpll0_arch_enable +#ifndef CONF_FDPLL0_ENABLE +#define CONF_FDPLL0_ENABLE 1 +#endif + +// <q> On Demand Control +// <i> Indicates whether On Demand Control is enabled or not +// <id> fdpll0_arch_ondemand +#ifndef CONF_FDPLL0_ONDEMAND +#define CONF_FDPLL0_ONDEMAND 0 +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> fdpll0_arch_runstdby +#ifndef CONF_FDPLL0_RUNSTDBY +#define CONF_FDPLL0_RUNSTDBY 0 +#endif + +// <o> Loop Divider Ratio Fractional Part <0x0-0x1F> +// <id> fdpll0_ldrfrac +#ifndef CONF_FDPLL0_LDRFRAC +#define CONF_FDPLL0_LDRFRAC 0x0 +#endif + +// <o> Loop Divider Ratio Integer Part <0x0-0x1FFF> +// <id> fdpll0_ldr +#ifndef CONF_FDPLL0_LDR +#define CONF_FDPLL0_LDR 59 +#endif + +// <o> Clock Divider <0x0-0x7FF> +// <id> fdpll0_clock_div +#ifndef CONF_FDPLL0_DIV +#define CONF_FDPLL0_DIV 0x0 +#endif + +// <q> DCO Filter Enable +// <i> Indicates whether DCO Filter Enable is enabled or not +// <id> fdpll0_arch_dcoen +#ifndef CONF_FDPLL0_DCOEN +#define CONF_FDPLL0_DCOEN 0 +#endif + +// <o> Sigma-Delta DCO Filter Selection <0x0-0x7> +// <id> fdpll0_clock_dcofilter +#ifndef CONF_FDPLL0_DCOFILTER +#define CONF_FDPLL0_DCOFILTER 0x0 +#endif + +// <q> Lock Bypass +// <i> Indicates whether Lock Bypass is enabled or not +// <id> fdpll0_arch_lbypass +#ifndef CONF_FDPLL0_LBYPASS +#define CONF_FDPLL0_LBYPASS 0 +#endif + +// <o> Lock Time +// <0x0=>No time-out, automatic lock +// <0x4=>The Time-out if no lock within 800 us +// <0x5=>The Time-out if no lock within 900 us +// <0x6=>The Time-out if no lock within 1 ms +// <0x7=>The Time-out if no lock within 11 ms +// <id> fdpll0_arch_ltime +#ifndef CONF_FDPLL0_LTIME +#define CONF_FDPLL0_LTIME 0x0 +#endif + +// <o> Reference Clock Selection +// <0x0=>GCLK clock reference +// <0x1=>XOSC32K clock reference +// <0x2=>XOSC0 clock reference +// <0x3=>XOSC1 clock reference +// <id> fdpll0_arch_refclk +#ifndef CONF_FDPLL0_REFCLK +#define CONF_FDPLL0_REFCLK 0x0 +#endif + +// <q> Wake Up Fast +// <i> Indicates whether Wake Up Fast is enabled or not +// <id> fdpll0_arch_wuf +#ifndef CONF_FDPLL0_WUF +#define CONF_FDPLL0_WUF 0 +#endif + +// <o> Proportional Integral Filter Selection <0x0-0xF> +// <id> fdpll0_arch_filter +#ifndef CONF_FDPLL0_FILTER +#define CONF_FDPLL0_FILTER 0x0 +#endif + +//</h> +//</e> +// <e> FDPLL1 Configuration +// <i> Indicates whether configuration for FDPLL1 is enabled or not +// <id> enable_fdpll1 +#ifndef CONF_FDPLL1_CONFIG +#define CONF_FDPLL1_CONFIG 0 +#endif + +// <y> Reference Clock Source +// <GCLK_GENCTRL_SRC_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K) +// <GCLK_GENCTRL_SRC_XOSC0"> External Crystal Oscillator 8-48MHz (XOSC0) +// <GCLK_GENCTRL_SRC_XOSC1"> External Crystal Oscillator 8-48MHz (XOSC1) +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 +// <i> Select the clock source. +// <id> fdpll1_ref_clock +#ifndef CONF_FDPLL1_GCLK +#define CONF_FDPLL1_GCLK GCLK_GENCTRL_SRC_XOSC32K +#endif + +// <h> Digital Phase Locked Loop Control +// <q> Enable +// <i> Indicates whether Digital Phase Locked Loop is enabled or not +// <id> fdpll1_arch_enable +#ifndef CONF_FDPLL1_ENABLE +#define CONF_FDPLL1_ENABLE 0 +#endif + +// <q> On Demand Control +// <i> Indicates whether On Demand Control is enabled or not +// <id> fdpll1_arch_ondemand +#ifndef CONF_FDPLL1_ONDEMAND +#define CONF_FDPLL1_ONDEMAND 0 +#endif + +// <q> Run in Standby +// <i> Indicates whether Run in Standby is enabled or not +// <id> fdpll1_arch_runstdby +#ifndef CONF_FDPLL1_RUNSTDBY +#define CONF_FDPLL1_RUNSTDBY 0 +#endif + +// <o> Loop Divider Ratio Fractional Part <0x0-0x1F> +// <id> fdpll1_ldrfrac +#ifndef CONF_FDPLL1_LDRFRAC +#define CONF_FDPLL1_LDRFRAC 0xd +#endif + +// <o> Loop Divider Ratio Integer Part <0x0-0x1FFF> +// <id> fdpll1_ldr +#ifndef CONF_FDPLL1_LDR +#define CONF_FDPLL1_LDR 0x5b7 +#endif + +// <o> Clock Divider <0x0-0x7FF> +// <id> fdpll1_clock_div +#ifndef CONF_FDPLL1_DIV +#define CONF_FDPLL1_DIV 0x0 +#endif + +// <q> DCO Filter Enable +// <i> Indicates whether DCO Filter Enable is enabled or not +// <id> fdpll1_arch_dcoen +#ifndef CONF_FDPLL1_DCOEN +#define CONF_FDPLL1_DCOEN 0 +#endif + +// <o> Sigma-Delta DCO Filter Selection <0x0-0x7> +// <id> fdpll1_clock_dcofilter +#ifndef CONF_FDPLL1_DCOFILTER +#define CONF_FDPLL1_DCOFILTER 0x0 +#endif + +// <q> Lock Bypass +// <i> Indicates whether Lock Bypass is enabled or not +// <id> fdpll1_arch_lbypass +#ifndef CONF_FDPLL1_LBYPASS +#define CONF_FDPLL1_LBYPASS 0 +#endif + +// <o> Lock Time +// <0x0=>No time-out, automatic lock +// <0x4=>The Time-out if no lock within 800 us +// <0x5=>The Time-out if no lock within 900 us +// <0x6=>The Time-out if no lock within 1 ms +// <0x7=>The Time-out if no lock within 11 ms +// <id> fdpll1_arch_ltime +#ifndef CONF_FDPLL1_LTIME +#define CONF_FDPLL1_LTIME 0x0 +#endif + +// <o> Reference Clock Selection +// <0x0=>GCLK clock reference +// <0x1=>XOSC32K clock reference +// <0x2=>XOSC0 clock reference +// <0x3=>XOSC1 clock reference +// <id> fdpll1_arch_refclk +#ifndef CONF_FDPLL1_REFCLK +#define CONF_FDPLL1_REFCLK 0x1 +#endif + +// <q> Wake Up Fast +// <i> Indicates whether Wake Up Fast is enabled or not +// <id> fdpll1_arch_wuf +#ifndef CONF_FDPLL1_WUF +#define CONF_FDPLL1_WUF 0 +#endif + +// <o> Proportional Integral Filter Selection <0x0-0xF> +// <id> fdpll1_arch_filter +#ifndef CONF_FDPLL1_FILTER +#define CONF_FDPLL1_FILTER 0x0 +#endif + +//</h> +//</e> + +// <<< end of configuration section >>> + +#endif // HPL_OSCCTRL_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_rtc_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_rtc_config.h new file mode 100644 index 000000000..2b0b6712e --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_rtc_config.h @@ -0,0 +1,145 @@ +/* Auto-generated config file hpl_rtc_config.h */ +#ifndef HPL_RTC_CONFIG_H +#define HPL_RTC_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// <h> Basic settings + +#ifndef CONF_RTC_ENABLE +#define CONF_RTC_ENABLE 1 +#endif + +// <q> Force reset RTC on initialization +// <i> Force RTC to reset on initialization. +// <i> Note that the previous power down data in RTC is lost if it's enabled. +// <id> rtc_arch_init_reset +#ifndef CONF_RTC_INIT_RESET +#define CONF_RTC_INIT_RESET 0 +#endif + +// <o> Prescaler configuration +// <0x0=>OFF(Peripheral clock divided by 1) +// <0x1=>Peripheral clock divided by 1 +// <0x2=>Peripheral clock divided by 2 +// <0x3=>Peripheral clock divided by 4 +// <0x4=>Peripheral clock divided by 8 +// <0x5=>Peripheral clock divided by 16 +// <0x6=>Peripheral clock divided by 32 +// <0x7=>Peripheral clock divided by 64 +// <0x8=>Peripheral clock divided by 128 +// <0x9=>Peripheral clock divided by 256 +// <0xA=>Peripheral clock divided by 512 +// <0xB=>Peripheral clock divided by 1024 +// <i> These bits define the RTC clock relative to the peripheral clock +// <id> rtc_arch_prescaler +#ifndef CONF_RTC_PRESCALER +#define CONF_RTC_PRESCALER 0xb + +#endif + +// <o> Compare Value <1-4294967295> +// <i> These bits define the RTC Compare value, the ticks period is equal to reciprocal of (rtc clock/prescaler/compare value), +// <i> by default 1K clock input, 1 prescaler, 1 compare value, the ticks period equals to 1ms. +// <id> rtc_arch_comp_val + +#ifndef CONF_RTC_COMP_VAL +#define CONF_RTC_COMP_VAL 1 + +#endif + +// <e> Event control +// <id> rtc_event_control +#ifndef CONF_RTC_EVENT_CONTROL_ENABLE +#define CONF_RTC_EVENT_CONTROL_ENABLE 0 +#endif + +// <q> Periodic Interval 0 Event Output +// <i> This bit indicates whether Periodic interval 0 event is enabled and will be generated +// <id> rtc_pereo0 +#ifndef CONF_RTC_PEREO0 +#define CONF_RTC_PEREO0 0 +#endif +// <q> Periodic Interval 1 Event Output +// <i> This bit indicates whether Periodic interval 1 event is enabled and will be generated +// <id> rtc_pereo1 +#ifndef CONF_RTC_PEREO1 +#define CONF_RTC_PEREO1 0 +#endif +// <q> Periodic Interval 2 Event Output +// <i> This bit indicates whether Periodic interval 2 event is enabled and will be generated +// <id> rtc_pereo2 +#ifndef CONF_RTC_PEREO2 +#define CONF_RTC_PEREO2 0 +#endif +// <q> Periodic Interval 3 Event Output +// <i> This bit indicates whether Periodic interval 3 event is enabled and will be generated +// <id> rtc_pereo3 +#ifndef CONF_RTC_PEREO3 +#define CONF_RTC_PEREO3 0 +#endif +// <q> Periodic Interval 4 Event Output +// <i> This bit indicates whether Periodic interval 4 event is enabled and will be generated +// <id> rtc_pereo4 +#ifndef CONF_RTC_PEREO4 +#define CONF_RTC_PEREO4 0 +#endif +// <q> Periodic Interval 5 Event Output +// <i> This bit indicates whether Periodic interval 5 event is enabled and will be generated +// <id> rtc_pereo5 +#ifndef CONF_RTC_PEREO5 +#define CONF_RTC_PEREO5 0 +#endif +// <q> Periodic Interval 6 Event Output +// <i> This bit indicates whether Periodic interval 6 event is enabled and will be generated +// <id> rtc_pereo6 +#ifndef CONF_RTC_PEREO6 +#define CONF_RTC_PEREO6 0 +#endif +// <q> Periodic Interval 7 Event Output +// <i> This bit indicates whether Periodic interval 7 event is enabled and will be generated +// <id> rtc_pereo7 +#ifndef CONF_RTC_PEREO7 +#define CONF_RTC_PEREO7 0 +#endif + +// <q> Compare 0 Event Output +// <i> This bit indicates whether Compare O event is enabled and will be generated +// <id> rtc_cmpeo0 +#ifndef CONF_RTC_COMPE0 +#define CONF_RTC_COMPE0 0 +#endif + +// <q> Compare 1 Event Output +// <i> This bit indicates whether Compare 1 event is enabled and will be generated +// <id> rtc_cmpeo1 +#ifndef CONF_RTC_COMPE1 +#define CONF_RTC_COMPE1 0 +#endif +// <q> Overflow Event Output +// <i> This bit indicates whether Overflow event is enabled and will be generated +// <id> rtc_ovfeo +#ifndef CONF_RTC_OVFEO +#define CONF_RTC_OVFEO 0 +#endif + +// <q> Tamper Event Output +// <i> This bit indicates whether Tamper event output is enabled and will be generated +// <id> rtc_tampereo +#ifndef CONF_RTC_TAMPEREO +#define CONF_RTC_TAMPEREO 0 +#endif + +// <q> Tamper Event Input +// <i> This bit indicates whether Tamper event input is enabled and will be generated +// <id> rtc_tampevei +#ifndef CONF_RTC_TAMPEVEI +#define CONF_RTC_TAMPEVEI 0 +#endif +// </e> + +// </h> + +// <<< end of configuration section >>> + +#endif // HPL_RTC_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_sdhc_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_sdhc_config.h new file mode 100644 index 000000000..daa662051 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_sdhc_config.h @@ -0,0 +1,24 @@ +/* Auto-generated config file hpl_sdhc_config.h */ +#ifndef HPL_SDHC_CONFIG_H +#define HPL_SDHC_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +#include "peripheral_clk_config.h" + +#ifndef CONF_BASE_FREQUENCY +#define CONF_BASE_FREQUENCY CONF_SDHC0_FREQUENCY +#endif + +// <o> Clock Generator Select +// <0=> Divided Clock mode +// <1=> Programmable Clock mode +// <i> This defines the clock generator mode in the SDCLK Frequency Select field +// <id> sdhc_clk_gsel +#ifndef CONF_SDHC0_CLK_GEN_SEL +#define CONF_SDHC0_CLK_GEN_SEL 0 +#endif + +// <<< end of configuration section >>> + +#endif // HPL_SDHC_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_sercom_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_sercom_config.h new file mode 100644 index 000000000..cd411154c --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_sercom_config.h @@ -0,0 +1,751 @@ +// For CircuitPython, use SERCOM settings as prototypes to set +// the default settings. This file defines these SERCOMs +// +// SERCOM0: SPI with hal_spi_m_sync.c driver: spi master synchronous +// SERCOM1: I2C with hal_i2c_m_sync.c driver: i2c master synchronous +// SERCOM2: USART with hal_usart_async.c driver: usart asynchronous +// SERCOM3: SPI with hal_spi_m_dma.c: spi master DMA + +#define PROTOTYPE_SERCOM_SPI_M_SYNC SERCOM0 +#define PROTOTYPE_SERCOM_SPI_M_SYNC_CLOCK_FREQUENCY CONF_GCLK_SERCOM0_CORE_FREQUENCY + +#define PROTOTYPE_SERCOM_I2CM_SYNC SERCOM1 + +#define PROTOTYPE_SERCOM_USART_ASYNC SERCOM2 +#define PROTOTYPE_SERCOM_USART_ASYNC_CLOCK_FREQUENCY CONF_GCLK_SERCOM2_CORE_FREQUENCY + +/* Auto-generated config file hpl_sercom_config.h */ +#ifndef HPL_SERCOM_CONFIG_H +#define HPL_SERCOM_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +#include <peripheral_clk_config.h> + +// Enable configuration of module +#ifndef CONF_SERCOM_0_SPI_ENABLE +#define CONF_SERCOM_0_SPI_ENABLE 1 +#endif + +// Set module in SPI Master mode +#ifndef CONF_SERCOM_0_SPI_MODE +#define CONF_SERCOM_0_SPI_MODE 0x03 +#endif + +// <h> Basic Configuration + +// <q> Receive buffer enable +// <i> Enable receive buffer to receive data from slave (RXEN) +// <id> spi_master_rx_enable +#ifndef CONF_SERCOM_0_SPI_RXEN +#define CONF_SERCOM_0_SPI_RXEN 0x1 +#endif + +// <o> Character Size +// <i> Bit size for all characters sent over the SPI bus (CHSIZE) +// <0x0=>8 bits +// <0x1=>9 bits +// <id> spi_master_character_size +#ifndef CONF_SERCOM_0_SPI_CHSIZE +#define CONF_SERCOM_0_SPI_CHSIZE 0x0 +#endif + +// <o> Baud rate <1-12000000> +// <i> The SPI data transfer rate +// <id> spi_master_baud_rate +#ifndef CONF_SERCOM_0_SPI_BAUD +#define CONF_SERCOM_0_SPI_BAUD 50000 +#endif + +// </h> + +// <e> Advanced Configuration +// <id> spi_master_advanced +#ifndef CONF_SERCOM_0_SPI_ADVANCED +#define CONF_SERCOM_0_SPI_ADVANCED 1 +#endif + +// <o> Dummy byte <0x00-0x1ff> +// <id> spi_master_dummybyte +// <i> Dummy byte used when reading data from the slave without sending any data +#ifndef CONF_SERCOM_0_SPI_DUMMYBYTE +#define CONF_SERCOM_0_SPI_DUMMYBYTE 0x1ff +#endif + +// <o> Data Order +// <0=>MSB first +// <1=>LSB first +// <i> I least significant or most significant bit is shifted out first (DORD) +// <id> spi_master_arch_dord +#ifndef CONF_SERCOM_0_SPI_DORD +#define CONF_SERCOM_0_SPI_DORD 0x0 +#endif + +// <o> Clock Polarity +// <0=>SCK is low when idle +// <1=>SCK is high when idle +// <i> Determines if the leading edge is rising or falling with a corresponding opposite edge at the trailing edge. (CPOL) +// <id> spi_master_arch_cpol +#ifndef CONF_SERCOM_0_SPI_CPOL +#define CONF_SERCOM_0_SPI_CPOL 0x0 +#endif + +// <o> Clock Phase +// <0x0=>Sample input on leading edge +// <0x1=>Sample input on trailing edge +// <i> Determines if input data is sampled on leading or trailing SCK edge. (CPHA) +// <id> spi_master_arch_cpha +#ifndef CONF_SERCOM_0_SPI_CPHA +#define CONF_SERCOM_0_SPI_CPHA 0x0 +#endif + +// <o> Immediate Buffer Overflow Notification +// <i> Controls when OVF is asserted (IBON) +// <0x0=>In data stream +// <0x1=>On buffer overflow +// <id> spi_master_arch_ibon +#ifndef CONF_SERCOM_0_SPI_IBON +#define CONF_SERCOM_0_SPI_IBON 0x0 +#endif + +// <q> Run in stand-by +// <i> Module stays active in stand-by sleep mode. (RUNSTDBY) +// <id> spi_master_arch_runstdby +#ifndef CONF_SERCOM_0_SPI_RUNSTDBY +#define CONF_SERCOM_0_SPI_RUNSTDBY 0x0 +#endif + +// <o> Debug Stop Mode +// <i> Behavior of the baud-rate generator when CPU is halted by external debugger. (DBGSTOP) +// <0=>Keep running +// <1=>Halt +// <id> spi_master_arch_dbgstop +#ifndef CONF_SERCOM_0_SPI_DBGSTOP +#define CONF_SERCOM_0_SPI_DBGSTOP 0 +#endif + +// </e> + +// Address mode disabled in master mode +#ifndef CONF_SERCOM_0_SPI_AMODE_EN +#define CONF_SERCOM_0_SPI_AMODE_EN 0 +#endif + +#ifndef CONF_SERCOM_0_SPI_AMODE +#define CONF_SERCOM_0_SPI_AMODE 0 +#endif + +#ifndef CONF_SERCOM_0_SPI_ADDR +#define CONF_SERCOM_0_SPI_ADDR 0 +#endif + +#ifndef CONF_SERCOM_0_SPI_ADDRMASK +#define CONF_SERCOM_0_SPI_ADDRMASK 0 +#endif + +#ifndef CONF_SERCOM_0_SPI_SSDE +#define CONF_SERCOM_0_SPI_SSDE 0 +#endif + +#ifndef CONF_SERCOM_0_SPI_MSSEN +#define CONF_SERCOM_0_SPI_MSSEN 0x0 +#endif + +#ifndef CONF_SERCOM_0_SPI_PLOADEN +#define CONF_SERCOM_0_SPI_PLOADEN 0 +#endif + +// <o> Receive Data Pinout +// <0x0=>PAD[0] +// <0x1=>PAD[1] +// <0x2=>PAD[2] +// <0x3=>PAD[3] +// <id> spi_master_rxpo +#ifndef CONF_SERCOM_0_SPI_RXPO +#define CONF_SERCOM_0_SPI_RXPO 2 +#endif + +// <o> Transmit Data Pinout +// <0x0=>PAD[0,1]_DO_SCK +// <0x1=>PAD[2,3]_DO_SCK +// <0x2=>PAD[3,1]_DO_SCK +// <0x3=>PAD[0,3]_DO_SCK +// <id> spi_master_txpo +#ifndef CONF_SERCOM_0_SPI_TXPO +#define CONF_SERCOM_0_SPI_TXPO 0 +#endif + +// Calculate baud register value from requested baudrate value +#ifndef CONF_SERCOM_0_SPI_BAUD_RATE +#define CONF_SERCOM_0_SPI_BAUD_RATE ((float)CONF_GCLK_SERCOM0_CORE_FREQUENCY / (float)(2 * CONF_SERCOM_0_SPI_BAUD)) - 1 +#endif + +#include <peripheral_clk_config.h> + +#ifndef SERCOM_I2CM_CTRLA_MODE_I2C_MASTER +#define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER (5 << 2) +#endif + +#ifndef CONF_SERCOM_1_I2CM_ENABLE +#define CONF_SERCOM_1_I2CM_ENABLE 1 +#endif + +// <h> Basic + +// <o> I2C Bus clock speed (Hz) <1-400000> +// <i> I2C Bus clock (SCL) speed measured in Hz +// <id> i2c_master_baud_rate +#ifndef CONF_SERCOM_1_I2CM_BAUD +#define CONF_SERCOM_1_I2CM_BAUD 100000 +#endif + +// </h> + +// <e> Advanced +// <id> i2c_master_advanced +#ifndef CONF_SERCOM_1_I2CM_ADVANCED_CONFIG +#define CONF_SERCOM_1_I2CM_ADVANCED_CONFIG 1 +#endif + +// <o> TRise (ns) <0-300> +// <i> Determined by the bus impedance, check electric characteristics in the datasheet +// <i> Standard Fast Mode: typical 215ns, max 300ns +// <i> Fast Mode +: typical 60ns, max 100ns +// <i> High Speed Mode: typical 20ns, max 40ns +// <id> i2c_master_arch_trise + +#ifndef CONF_SERCOM_1_I2CM_TRISE +#define CONF_SERCOM_1_I2CM_TRISE 215 +#endif + +// <q> Master SCL Low Extended Time-Out (MEXTTOEN) +// <i> This enables the master SCL low extend time-out +// <id> i2c_master_arch_mexttoen +#ifndef CONF_SERCOM_1_I2CM_MEXTTOEN +#define CONF_SERCOM_1_I2CM_MEXTTOEN 0 +#endif + +// <q> Slave SCL Low Extend Time-Out (SEXTTOEN) +// <i> Enables the slave SCL low extend time-out. If SCL is cumulatively held low for greater than 25ms from the initial START to a STOP, the slave will release its clock hold if enabled and reset the internal state machine +// <id> i2c_master_arch_sexttoen +#ifndef CONF_SERCOM_1_I2CM_SEXTTOEN +#define CONF_SERCOM_1_I2CM_SEXTTOEN 0 +#endif + +// <q> SCL Low Time-Out (LOWTOUT) +// <i> Enables SCL low time-out. If SCL is held low for 25ms-35ms, the master will release it's clock hold +// <id> i2c_master_arch_lowtout +#ifndef CONF_SERCOM_1_I2CM_LOWTOUT +#define CONF_SERCOM_1_I2CM_LOWTOUT 0 +#endif + +// <o> Inactive Time-Out (INACTOUT) +// <0x0=>Disabled +// <0x1=>5-6 SCL cycle time-out(50-60us) +// <0x2=>10-11 SCL cycle time-out(100-110us) +// <0x3=>20-21 SCL cycle time-out(200-210us) +// <i> Defines if inactivity time-out should be enabled, and how long the time-out should be +// <id> i2c_master_arch_inactout +#ifndef CONF_SERCOM_1_I2CM_INACTOUT +#define CONF_SERCOM_1_I2CM_INACTOUT 0x0 +#endif + +// <o> SDA Hold Time (SDAHOLD) +// <0=>Disabled +// <1=>50-100ns hold time +// <2=>300-600ns hold time +// <3=>400-800ns hold time +// <i> Defines the SDA hold time with respect to the negative edge of SCL +// <id> i2c_master_arch_sdahold +#ifndef CONF_SERCOM_1_I2CM_SDAHOLD +#define CONF_SERCOM_1_I2CM_SDAHOLD 0x2 +#endif + +// <q> Run in stand-by +// <i> Determine if the module shall run in standby sleep mode +// <id> i2c_master_arch_runstdby +#ifndef CONF_SERCOM_1_I2CM_RUNSTDBY +#define CONF_SERCOM_1_I2CM_RUNSTDBY 0 +#endif + +// <o> Debug Stop Mode +// <i> Behavior of the baud-rate generator when CPU is halted by external debugger. +// <0=>Keep running +// <1=>Halt +// <id> i2c_master_arch_dbgstop +#ifndef CONF_SERCOM_1_I2CM_DEBUG_STOP_MODE +#define CONF_SERCOM_1_I2CM_DEBUG_STOP_MODE 0 +#endif + +// </e> + +#ifndef CONF_SERCOM_1_I2CM_SPEED +#define CONF_SERCOM_1_I2CM_SPEED 0x00 // Speed: Standard/Fast mode +#endif +#if CONF_SERCOM_1_I2CM_TRISE < 215 || CONF_SERCOM_1_I2CM_TRISE > 300 +#warning Bad I2C Rise time for Standard/Fast mode, reset to 215ns +#undef CONF_SERCOM_1_I2CM_TRISE +#define CONF_SERCOM_1_I2CM_TRISE 215 +#endif + +// gclk_freq - (i2c_scl_freq * 10) - (gclk_freq * i2c_scl_freq * Trise) +// BAUD + BAUDLOW = -------------------------------------------------------------------- +// i2c_scl_freq +// BAUD: register value low [7:0] +// BAUDLOW: register value high [15:8], only used for odd BAUD + BAUDLOW +#define CONF_SERCOM_1_I2CM_BAUD_BAUDLOW \ + (((CONF_GCLK_SERCOM1_CORE_FREQUENCY - (CONF_SERCOM_1_I2CM_BAUD * 10) \ + - (CONF_SERCOM_1_I2CM_TRISE * (CONF_SERCOM_1_I2CM_BAUD / 100) * (CONF_GCLK_SERCOM1_CORE_FREQUENCY / 10000) \ + / 1000)) \ + * 10 \ + + 5) \ + / (CONF_SERCOM_1_I2CM_BAUD * 10)) +#ifndef CONF_SERCOM_1_I2CM_BAUD_RATE +#if CONF_SERCOM_1_I2CM_BAUD_BAUDLOW > (0xFF * 2) +#warning Requested I2C baudrate too low, please check +#define CONF_SERCOM_1_I2CM_BAUD_RATE 0xFF +#elif CONF_SERCOM_1_I2CM_BAUD_BAUDLOW <= 1 +#warning Requested I2C baudrate too high, please check +#define CONF_SERCOM_1_I2CM_BAUD_RATE 1 +#else +#define CONF_SERCOM_1_I2CM_BAUD_RATE \ + ((CONF_SERCOM_1_I2CM_BAUD_BAUDLOW & 0x1) \ + ? (CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2) + ((CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2 + 1) << 8) \ + : (CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2)) +#endif +#endif + +#include <peripheral_clk_config.h> + +#ifndef CONF_SERCOM_2_USART_ENABLE +#define CONF_SERCOM_2_USART_ENABLE 1 +#endif + +// <h> Basic Configuration + +// <q> Receive buffer enable +// <i> Enable input buffer in SERCOM module +// <id> usart_rx_enable +#ifndef CONF_SERCOM_2_USART_RXEN +#define CONF_SERCOM_2_USART_RXEN 1 +#endif + +// <q> Transmitt buffer enable +// <i> Enable output buffer in SERCOM module +// <id> usart_tx_enable +#ifndef CONF_SERCOM_2_USART_TXEN +#define CONF_SERCOM_2_USART_TXEN 1 +#endif + +// <o> Frame parity +// <0x0=>No parity +// <0x1=>Even parity +// <0x2=>Odd parity +// <i> Parity bit mode for USART frame +// <id> usart_parity +#ifndef CONF_SERCOM_2_USART_PARITY +#define CONF_SERCOM_2_USART_PARITY 0x0 +#endif + +// <o> Character Size +// <0x0=>8 bits +// <0x1=>9 bits +// <0x5=>5 bits +// <0x6=>6 bits +// <0x7=>7 bits +// <i> Data character size in USART frame +// <id> usart_character_size +#ifndef CONF_SERCOM_2_USART_CHSIZE +#define CONF_SERCOM_2_USART_CHSIZE 0x0 +#endif + +// <o> Stop Bit +// <0=>One stop bit +// <1=>Two stop bits +// <i> Number of stop bits in USART frame +// <id> usart_stop_bit +#ifndef CONF_SERCOM_2_USART_SBMODE +#define CONF_SERCOM_2_USART_SBMODE 0 +#endif + +// <o> Baud rate <1-3000000> +// <i> USART baud rate setting +// <id> usart_baud_rate +#ifndef CONF_SERCOM_2_USART_BAUD +#define CONF_SERCOM_2_USART_BAUD 9600 +#endif + +// </h> + +// <e> Advanced configuration +// <id> usart_advanced +#ifndef CONF_SERCOM_2_USART_ADVANCED_CONFIG +#define CONF_SERCOM_2_USART_ADVANCED_CONFIG 1 +#endif + +// <q> Run in stand-by +// <i> Keep the module running in standby sleep mode +// <id> usart_arch_runstdby +#ifndef CONF_SERCOM_2_USART_RUNSTDBY +#define CONF_SERCOM_2_USART_RUNSTDBY 0 +#endif + +// <q> Immediate Buffer Overflow Notification +// <i> Controls when the BUFOVF status bit is asserted +// <id> usart_arch_ibon +#ifndef CONF_SERCOM_2_USART_IBON +#define CONF_SERCOM_2_USART_IBON 0 +#endif + +// <q> Start of Frame Detection Enable +// <i> Will wake the device from any sleep mode if usart_init and usart_enable was run priort to going to sleep. (receive buffer must be enabled) +// <id> usart_arch_sfde +#ifndef CONF_SERCOM_2_USART_SFDE +#define CONF_SERCOM_2_USART_SFDE 0 +#endif + +// <q> Collision Detection Enable +// <i> Collision detection enable +// <id> usart_arch_cloden +#ifndef CONF_SERCOM_2_USART_CLODEN +#define CONF_SERCOM_2_USART_CLODEN 0 +#endif + +// <o> Operating Mode +// <0x0=>USART with external clock +// <0x1=>USART with internal clock +// <i> Drive the shift register by an internal clock generated by the baud rate generator or an external clock supplied on the XCK pin. +// <id> usart_arch_clock_mode +#ifndef CONF_SERCOM_2_USART_MODE +#define CONF_SERCOM_2_USART_MODE 0x1 +#endif + +// <o> Sample Rate +// <0x0=>16x arithmetic +// <0x1=>16x fractional +// <0x2=>8x arithmetic +// <0x3=>8x fractional +// <0x3=>3x +// <i> How many over-sampling bits used when samling data state +// <id> usart_arch_sampr +#ifndef CONF_SERCOM_2_USART_SAMPR +#define CONF_SERCOM_2_USART_SAMPR 0x0 +#endif + +// <o> Sample Adjustment +// <0x0=>7-8-9 (3-4-5 8-bit over-sampling) +// <0x1=>9-10-11 (4-5-6 8-bit over-sampling) +// <0x2=>11-12-13 (5-6-7 8-bit over-sampling) +// <0x3=>13-14-15 (6-7-8 8-bit over-sampling) +// <i> Adjust which samples to use for data sampling in asynchronous mode +// <id> usart_arch_sampa +#ifndef CONF_SERCOM_2_USART_SAMPA +#define CONF_SERCOM_2_USART_SAMPA 0x0 +#endif + +// <o> Fractional Part <0-7> +// <i> Fractional part of the baud rate if baud rate generator is in fractional mode +// <id> usart_arch_fractional +#ifndef CONF_SERCOM_2_USART_FRACTIONAL +#define CONF_SERCOM_2_USART_FRACTIONAL 0x0 +#endif + +// <o> Data Order +// <0=>MSB is transmitted first +// <1=>LSB is transmitted first +// <i> Data order of the data bits in the frame +// <id> usart_arch_dord +#ifndef CONF_SERCOM_2_USART_DORD +#define CONF_SERCOM_2_USART_DORD 1 +#endif + +// Does not do anything in UART mode +#define CONF_SERCOM_2_USART_CPOL 0 + +// <o> Encoding Format +// <0=>No encoding +// <1=>IrDA encoded +// <id> usart_arch_enc +#ifndef CONF_SERCOM_2_USART_ENC +#define CONF_SERCOM_2_USART_ENC 0 +#endif + +// <o> Debug Stop Mode +// <i> Behavior of the baud-rate generator when CPU is halted by external debugger. +// <0=>Keep running +// <1=>Halt +// <id> usart_arch_dbgstop +#ifndef CONF_SERCOM_2_USART_DEBUG_STOP_MODE +#define CONF_SERCOM_2_USART_DEBUG_STOP_MODE 0 +#endif + +// </e> + +#ifndef CONF_SERCOM_2_USART_INACK +#define CONF_SERCOM_2_USART_INACK 0x0 +#endif + +#ifndef CONF_SERCOM_2_USART_DSNACK +#define CONF_SERCOM_2_USART_DSNACK 0x0 +#endif + +#ifndef CONF_SERCOM_2_USART_MAXITER +#define CONF_SERCOM_2_USART_MAXITER 0x7 +#endif + +#ifndef CONF_SERCOM_2_USART_GTIME +#define CONF_SERCOM_2_USART_GTIME 0x2 +#endif + +#define CONF_SERCOM_2_USART_RXINV 0x0 +#define CONF_SERCOM_2_USART_TXINV 0x0 + +#ifndef CONF_SERCOM_2_USART_CMODE +#define CONF_SERCOM_2_USART_CMODE 0 +#endif + +#ifndef CONF_SERCOM_2_USART_RXPO +#define CONF_SERCOM_2_USART_RXPO 1 /* RX is on PIN_PA08 */ +#endif + +#ifndef CONF_SERCOM_2_USART_TXPO +#define CONF_SERCOM_2_USART_TXPO 0 /* TX is on PIN_PA09 */ +#endif + +/* Set correct parity settings in register interface based on PARITY setting */ +#if CONF_SERCOM_2_USART_PARITY == 0 +#define CONF_SERCOM_2_USART_PMODE 0 +#define CONF_SERCOM_2_USART_FORM 0 +#else +#define CONF_SERCOM_2_USART_PMODE CONF_SERCOM_2_USART_PARITY - 1 +#define CONF_SERCOM_2_USART_FORM 1 +#endif + +// Calculate BAUD register value in UART mode +#if CONF_SERCOM_2_USART_SAMPR == 0 +#ifndef CONF_SERCOM_2_USART_BAUD_RATE +#define CONF_SERCOM_2_USART_BAUD_RATE \ + 65536 - ((65536 * 16.0f * CONF_SERCOM_2_USART_BAUD) / CONF_GCLK_SERCOM2_CORE_FREQUENCY) +#endif +#ifndef CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH +#define CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH 0 +#endif +#elif CONF_SERCOM_2_USART_SAMPR == 1 +#ifndef CONF_SERCOM_2_USART_BAUD_RATE +#define CONF_SERCOM_2_USART_BAUD_RATE \ + ((CONF_GCLK_SERCOM2_CORE_FREQUENCY) / (CONF_SERCOM_2_USART_BAUD * 16)) - (CONF_SERCOM_2_USART_FRACTIONAL / 8) +#endif +#ifndef CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH +#define CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH 0 +#endif +#elif CONF_SERCOM_2_USART_SAMPR == 2 +#ifndef CONF_SERCOM_2_USART_BAUD_RATE +#define CONF_SERCOM_2_USART_BAUD_RATE \ + 65536 - ((65536 * 8.0f * CONF_SERCOM_2_USART_BAUD) / CONF_GCLK_SERCOM2_CORE_FREQUENCY) +#endif +#ifndef CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH +#define CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH 0 +#endif +#elif CONF_SERCOM_2_USART_SAMPR == 3 +#ifndef CONF_SERCOM_2_USART_BAUD_RATE +#define CONF_SERCOM_2_USART_BAUD_RATE \ + ((CONF_GCLK_SERCOM2_CORE_FREQUENCY) / (CONF_SERCOM_2_USART_BAUD * 8)) - (CONF_SERCOM_2_USART_FRACTIONAL / 8) +#endif +#ifndef CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH +#define CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH 0 +#endif +#elif CONF_SERCOM_2_USART_SAMPR == 4 +#ifndef CONF_SERCOM_2_USART_BAUD_RATE +#define CONF_SERCOM_2_USART_BAUD_RATE \ + 65536 - ((65536 * 3.0f * CONF_SERCOM_2_USART_BAUD) / CONF_GCLK_SERCOM2_CORE_FREQUENCY) +#endif +#ifndef CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH +#define CONF_SERCOM_2_USART_RECEIVE_PULSE_LENGTH 0 +#endif +#endif + +#include <peripheral_clk_config.h> + +// Enable configuration of module +#ifndef CONF_SERCOM_3_SPI_ENABLE +#define CONF_SERCOM_3_SPI_ENABLE 1 +#endif + +//<o> SPI DMA TX Channel <0-32> +//<i> This defines DMA channel to be used +//<id> spi_master_dma_tx_channel +#ifndef CONF_SERCOM_3_SPI_M_DMA_TX_CHANNEL +#define CONF_SERCOM_3_SPI_M_DMA_TX_CHANNEL 0 +#endif + +// <e> SPI RX Channel Enable +// <id> spi_master_rx_channel +#ifndef CONF_SERCOM_3_SPI_RX_CHANNEL +#define CONF_SERCOM_3_SPI_RX_CHANNEL 1 +#endif + +//<o> DMA Channel <0-32> +//<i> This defines DMA channel to be used +//<id> spi_master_dma_rx_channel +#ifndef CONF_SERCOM_3_SPI_M_DMA_RX_CHANNEL +#define CONF_SERCOM_3_SPI_M_DMA_RX_CHANNEL 1 +#endif + +// </e> + +// Set module in SPI Master mode +#ifndef CONF_SERCOM_3_SPI_MODE +#define CONF_SERCOM_3_SPI_MODE 0x03 +#endif + +// <h> Basic Configuration + +// <q> Receive buffer enable +// <i> Enable receive buffer to receive data from slave (RXEN) +// <id> spi_master_rx_enable +#ifndef CONF_SERCOM_3_SPI_RXEN +#define CONF_SERCOM_3_SPI_RXEN 0x1 +#endif + +// <o> Character Size +// <i> Bit size for all characters sent over the SPI bus (CHSIZE) +// <0x0=>8 bits +// <0x1=>9 bits +// <id> spi_master_character_size +#ifndef CONF_SERCOM_3_SPI_CHSIZE +#define CONF_SERCOM_3_SPI_CHSIZE 0x0 +#endif + +// <o> Baud rate <1-12000000> +// <i> The SPI data transfer rate +// <id> spi_master_baud_rate +#ifndef CONF_SERCOM_3_SPI_BAUD +#define CONF_SERCOM_3_SPI_BAUD 50000 +#endif + +// </h> + +// <e> Advanced Configuration +// <id> spi_master_advanced +#ifndef CONF_SERCOM_3_SPI_ADVANCED +#define CONF_SERCOM_3_SPI_ADVANCED 0 +#endif + +// <o> Dummy byte <0x00-0x1ff> +// <id> spi_master_dummybyte +// <i> Dummy byte used when reading data from the slave without sending any data +#ifndef CONF_SERCOM_3_SPI_DUMMYBYTE +#define CONF_SERCOM_3_SPI_DUMMYBYTE 0x1ff +#endif + +// <o> Data Order +// <0=>MSB first +// <1=>LSB first +// <i> I least significant or most significant bit is shifted out first (DORD) +// <id> spi_master_arch_dord +#ifndef CONF_SERCOM_3_SPI_DORD +#define CONF_SERCOM_3_SPI_DORD 0x0 +#endif + +// <o> Clock Polarity +// <0=>SCK is low when idle +// <1=>SCK is high when idle +// <i> Determines if the leading edge is rising or falling with a corresponding opposite edge at the trailing edge. (CPOL) +// <id> spi_master_arch_cpol +#ifndef CONF_SERCOM_3_SPI_CPOL +#define CONF_SERCOM_3_SPI_CPOL 0x0 +#endif + +// <o> Clock Phase +// <0x0=>Sample input on leading edge +// <0x1=>Sample input on trailing edge +// <i> Determines if input data is sampled on leading or trailing SCK edge. (CPHA) +// <id> spi_master_arch_cpha +#ifndef CONF_SERCOM_3_SPI_CPHA +#define CONF_SERCOM_3_SPI_CPHA 0x0 +#endif + +// <o> Immediate Buffer Overflow Notification +// <i> Controls when OVF is asserted (IBON) +// <0x0=>In data stream +// <0x1=>On buffer overflow +// <id> spi_master_arch_ibon +#ifndef CONF_SERCOM_3_SPI_IBON +#define CONF_SERCOM_3_SPI_IBON 0x0 +#endif + +// <q> Run in stand-by +// <i> Module stays active in stand-by sleep mode. (RUNSTDBY) +// <id> spi_master_arch_runstdby +#ifndef CONF_SERCOM_3_SPI_RUNSTDBY +#define CONF_SERCOM_3_SPI_RUNSTDBY 0x0 +#endif + +// <o> Debug Stop Mode +// <i> Behavior of the baud-rate generator when CPU is halted by external debugger. (DBGSTOP) +// <0=>Keep running +// <1=>Halt +// <id> spi_master_arch_dbgstop +#ifndef CONF_SERCOM_3_SPI_DBGSTOP +#define CONF_SERCOM_3_SPI_DBGSTOP 0 +#endif + +// </e> + +// Address mode disabled in master mode +#ifndef CONF_SERCOM_3_SPI_AMODE_EN +#define CONF_SERCOM_3_SPI_AMODE_EN 0 +#endif + +#ifndef CONF_SERCOM_3_SPI_AMODE +#define CONF_SERCOM_3_SPI_AMODE 0 +#endif + +#ifndef CONF_SERCOM_3_SPI_ADDR +#define CONF_SERCOM_3_SPI_ADDR 0 +#endif + +#ifndef CONF_SERCOM_3_SPI_ADDRMASK +#define CONF_SERCOM_3_SPI_ADDRMASK 0 +#endif + +#ifndef CONF_SERCOM_3_SPI_SSDE +#define CONF_SERCOM_3_SPI_SSDE 0 +#endif + +#ifndef CONF_SERCOM_3_SPI_MSSEN +#define CONF_SERCOM_3_SPI_MSSEN 0x0 +#endif + +#ifndef CONF_SERCOM_3_SPI_PLOADEN +#define CONF_SERCOM_3_SPI_PLOADEN 0 +#endif + +// <o> Receive Data Pinout +// <0x0=>PAD[0] +// <0x1=>PAD[1] +// <0x2=>PAD[2] +// <0x3=>PAD[3] +// <id> spi_master_rxpo +#ifndef CONF_SERCOM_3_SPI_RXPO +#define CONF_SERCOM_3_SPI_RXPO 2 +#endif + +// <o> Transmit Data Pinout +// <0x0=>PAD[0,1]_DO_SCK +// <0x1=>PAD[2,3]_DO_SCK +// <0x2=>PAD[3,1]_DO_SCK +// <0x3=>PAD[0,3]_DO_SCK +// <id> spi_master_txpo +#ifndef CONF_SERCOM_3_SPI_TXPO +#define CONF_SERCOM_3_SPI_TXPO 0 +#endif + +// Calculate baud register value from requested baudrate value +#ifndef CONF_SERCOM_3_SPI_BAUD_RATE +#define CONF_SERCOM_3_SPI_BAUD_RATE ((float)CONF_GCLK_SERCOM3_CORE_FREQUENCY / (float)(2 * CONF_SERCOM_3_SPI_BAUD)) - 1 +#endif + +// <<< end of configuration section >>> + +#endif // HPL_SERCOM_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_systick_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_systick_config.h new file mode 100644 index 000000000..a7f2f3620 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_systick_config.h @@ -0,0 +1,18 @@ +/* Auto-generated config file hpl_systick_config.h */ +#ifndef HPL_SYSTICK_CONFIG_H +#define HPL_SYSTICK_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// <h> Advanced settings +// <q> SysTick exception request +// <i> Indicates whether the generation of SysTick exception is enabled or not +// <id> systick_arch_tickint +#ifndef CONF_SYSTICK_TICKINT +#define CONF_SYSTICK_TICKINT 0 +#endif +// </h> + +// <<< end of configuration section >>> + +#endif // HPL_SYSTICK_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_tc_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_tc_config.h new file mode 100644 index 000000000..38d48e9b6 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_tc_config.h @@ -0,0 +1,209 @@ +/* Auto-generated config file hpl_tc_config.h */ +#ifndef HPL_TC_CONFIG_H +#define HPL_TC_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +#include <peripheral_clk_config.h> + +#ifndef CONF_TC0_ENABLE +#define CONF_TC0_ENABLE 1 +#endif + +// <h> Basic settings +// <o> Prescaler +// <0=> No division +// <1=> Divide by 2 +// <2=> Divide by 4 +// <3=> Divide by 8 +// <4=> Divide by 16 +// <5=> Divide by 64 +// <6=> Divide by 256 +// <7=> Divide by 1024 +// <i> This defines the prescaler value +// <id> tc_prescaler +#ifndef CONF_TC0_PRESCALER +#define CONF_TC0_PRESCALER 0 +#endif +// </h> + +// <h> PWM Waveform Output settings +// <o> Waveform Period Value (uS) <0x00-0xFFFFFFFF> +// <i> The unit of this value is us. +// <id> tc_arch_wave_per_val +#ifndef CONF_TC0_WAVE_PER_VAL +#define CONF_TC0_WAVE_PER_VAL 0x3e8 +#endif + +// <o> Waveform Duty Value (0.1%) <0x00-0x03E8> +// <i> The unit of this value is 1/1000. +// <id> tc_arch_wave_duty_val +#ifndef CONF_TC0_WAVE_DUTY_VAL +#define CONF_TC0_WAVE_DUTY_VAL 0x1f4 +#endif + +/* Caculate pwm ccx register value based on WAVE_PER_VAL and Waveform Duty Value */ +#if CONF_TC0_PRESCALER < TC_CTRLA_PRESCALER_DIV64_Val +#define CONF_TC0_CC0 \ + ((uint32_t)(((double)CONF_TC0_WAVE_PER_VAL * CONF_GCLK_TC0_FREQUENCY) / 1000000 / (1 << CONF_TC0_PRESCALER) - 1)) +#define CONF_TC0_CC1 ((CONF_TC0_CC0 * CONF_TC0_WAVE_DUTY_VAL) / 1000) + +#elif CONF_TC0_PRESCALER == TC_CTRLA_PRESCALER_DIV64_Val +#define CONF_TC0_CC0 ((uint32_t)(((double)CONF_TC0_WAVE_PER_VAL * CONF_GCLK_TC0_FREQUENCY) / 64000000 - 1)) +#define CONF_TC0_CC1 ((CONF_TC0_CC0 * CONF_TC0_WAVE_DUTY_VAL) / 1000) + +#elif CONF_TC0_PRESCALER == TC_CTRLA_PRESCALER_DIV256_Val +#define CONF_TC0_CC0 ((uint32_t)(((double)CONF_TC0_WAVE_PER_VAL * CONF_GCLK_TC0_FREQUENCY) / 256000000 - 1)) +#define CONF_TC0_CC1 ((CONF_TC0_CC0 * CONF_TC0_WAVE_DUTY_VAL) / 1000) + +#elif CONF_TC0_PRESCALER == TC_CTRLA_PRESCALER_DIV1024_Val +#define CONF_TC0_CC0 ((uint32_t)(((double)CONF_TC0_WAVE_PER_VAL * CONF_GCLK_TC0_FREQUENCY) / 1024000000 - 1)) +#define CONF_TC0_CC1 ((CONF_TC0_CC0 * CONF_TC0_WAVE_DUTY_VAL) / 1000) +#endif + +// </h> + +// <h> Advanced settings +// <y> Mode +// <TC_CTRLA_MODE_COUNT16_Val"> Counter in 16-bit mode +// <TC_CTRLA_MODE_COUNT32_Val"> Counter in 32-bit mode +// <i> These bits mode +// <id> tc_mode +#ifndef CONF_TC0_MODE +#define CONF_TC0_MODE TC_CTRLA_MODE_COUNT16_Val +#endif + +// <o> Period Value <0x00000000-0xFFFFFFFF> +// <id> tc_per +#ifndef CONF_TC0_PER +#define CONF_TC0_PER 0x32 +#endif +// </h> + +// <h> Advanced settings +// <y> Prescaler and Counter Synchronization Selection +// <TC_CTRLA_PRESCSYNC_GCLK_Val"> Reload or reset counter on next GCLK +// <TC_CTRLA_PRESCSYNC_PRESC_Val"> Reload or reset counter on next prescaler clock +// <TC_CTRLA_PRESCSYNC_RESYNC_Val"> Reload or reset counter on next GCLK and reset prescaler counter +// <i> These bits select if on retrigger event, the Counter should be cleared or reloaded on the next GCLK_TCx clock or on the next prescaled GCLK_TCx clock. +// <id> tc_arch_presync +#ifndef CONF_TC0_PRESCSYNC +#define CONF_TC0_PRESCSYNC TC_CTRLA_PRESCSYNC_GCLK_Val +#endif + +// <q> Run in standby +// <i> Indicates whether the will continue running in standby sleep mode or not +// <id> tc_arch_runstdby +#ifndef CONF_TC0_RUNSTDBY +#define CONF_TC0_RUNSTDBY 0 +#endif + +// <q> On-Demand +// <i> Indicates whether the TC0's on-demand mode is on or not +// <id> tc_arch_ondemand +#ifndef CONF_TC0_ONDEMAND +#define CONF_TC0_ONDEMAND 0 +#endif + +// <o> Auto Lock +// <0x0=>The Lock Update bit is not affected on overflow/underflow and re-trigger event +// <0x1=>The Lock Update bit is set on each overflow/underflow or re-trigger event +// <id> tc_arch_alock +#ifndef CONF_TC0_ALOCK +#define CONF_TC0_ALOCK 0 +#endif + +/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ +//#define CONF_TC0_CAPTEN0 0 +//#define CONF_TC0_CAPTEN1 0 +//#define CONF_TC0_COPEN0 0 +//#define CONF_TC0_COPEN1 0 + +/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ +//#define CONF_TC0_DIR 0 +//#define CONF_TC0_ONESHOT 0 +//#define CONF_TC0_LUPD 0 + +// <q> Debug Running Mode +// <i> Indicates whether the Debug Running Mode is enabled or not +// <id> tc_arch_dbgrun +#ifndef CONF_TC0_DBGRUN +#define CONF_TC0_DBGRUN 0 +#endif + +// <e> Event control +// <id> timer_event_control +#ifndef CONF_TC0_EVENT_CONTROL_ENABLE +#define CONF_TC0_EVENT_CONTROL_ENABLE 0 +#endif + +// <q> Output Event On Match or Capture on Channel 0 +// <i> Enable output of event on timer tick +// <id> tc_arch_mceo0 +#ifndef CONF_TC0_MCEO0 +#define CONF_TC0_MCEO0 0 +#endif + +// <q> Output Event On Match or Capture on Channel 1 +// <i> Enable output of event on timer tick +// <id> tc_arch_mceo1 +#ifndef CONF_TC0_MCEO1 +#define CONF_TC0_MCEO1 0 +#endif + +// <q> Output Event On Timer Tick +// <i> Enable output of event on timer tick +// <id> tc_arch_ovfeo +#ifndef CONF_TC0_OVFEO +#define CONF_TC0_OVFEO 0 +#endif + +// <q> Event Input +// <i> Enable asynchronous input events +// <id> tc_arch_tcei +#ifndef CONF_TC0_TCEI +#define CONF_TC0_TCEI 0 +#endif + +// <q> Inverted Event Input +// <i> Invert the asynchronous input events +// <id> tc_arch_tcinv +#ifndef CONF_TC0_TCINV +#define CONF_TC0_TCINV 0 +#endif + +// <o> Event action +// <0=> Event action disabled +// <1=> Start, restart or re-trigger TC on event +// <2=> Count on event +// <3=> Start on event +// <4=> Time stamp capture +// <5=> Period captured in CC0, pulse width in CC1 +// <6=> Period captured in CC1, pulse width in CC0 +// <7=> Pulse width capture +// <i> Event which will be performed on an event +//<id> tc_arch_evact +#ifndef CONF_TC0_EVACT +#define CONF_TC0_EVACT 0 +#endif +// </e> + +/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ +//#define CONF_TC0_WAVEGEN TC_CTRLA_WAVEGEN_MFRQ_Val + +/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ +//#define CONF_TC0_INVEN0 0 +//#define CONF_TC0_INVEN1 0 + +/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ +//#define CONF_TC0_PERBUF 0 + +/* Commented intentionally. Timer uses fixed value. May be used by other abstractions based on TC. */ +//#define CONF_TC0_CCBUF0 0 +//#define CONF_TC0_CCBUF1 0 + +// </h> + +// <<< end of configuration section >>> + +#endif // HPL_TC_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_trng_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_trng_config.h new file mode 100644 index 000000000..ba9014989 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_trng_config.h @@ -0,0 +1,27 @@ +/* Auto-generated config file hpl_trng_config.h */ +#ifndef HPL_TRNG_CONFIG_H +#define HPL_TRNG_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// <h> Advanced configurations + +// <q> Run In Standby +// <i> Indicates whether the TRNG works in standby mode +// <id> trng_runstdby +#ifndef CONF_TRNG_RUNSTDBY +#define CONF_TRNG_RUNSTDBY 0 +#endif + +// <q> Data Ready Event Output Enable +// <i> Indicates whether the TRNG generates event on Data Ready +// <id> trng_datardyeo +#ifndef CONF_TRNG_DATARDYEO +#define CONF_TRNG_DATARDYEO 0 +#endif + +// </h> + +// <<< end of configuration section >>> + +#endif // HPL_TRNG_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/hpl_usb_config.h b/ports/atmel-samd/asf4_conf/same54/hpl_usb_config.h new file mode 100644 index 000000000..d1bb42fe4 --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/hpl_usb_config.h @@ -0,0 +1,413 @@ +/* Auto-generated config file hpl_usb_config.h */ +#ifndef HPL_USB_CONFIG_H +#define HPL_USB_CONFIG_H + +// CIRCUITPY: + +// Use 64-byte USB buffers for endpoint directions that are in use. They're set to 0 below otherwise. + +#include "genhdr/autogen_usb_descriptor.h" + +#if defined(USB_ENDPOINT_1_OUT_USED) && USB_ENDPOINT_1_OUT_USED +#define CONF_USB_EP1_CACHE 64 +#endif +#if defined(USB_ENDPOINT_1_IN_USED) && USB_ENDPOINT_1_IN_USED +#define CONF_USB_EP1_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_2_OUT_USED) && USB_ENDPOINT_2_OUT_USED +#define CONF_USB_EP2_CACHE 64 +#endif +#if defined(USB_ENDPOINT_2_IN_USED) && USB_ENDPOINT_2_IN_USED +#define CONF_USB_EP2_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_3_OUT_USED) && USB_ENDPOINT_3_OUT_USED +#define CONF_USB_EP3_CACHE 64 +#endif +#if defined(USB_ENDPOINT_3_IN_USED) && USB_ENDPOINT_3_IN_USED +#define CONF_USB_EP3_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_4_OUT_USED) && USB_ENDPOINT_4_OUT_USED +#define CONF_USB_EP4_CACHE 64 +#endif +#if defined(USB_ENDPOINT_4_IN_USED) && USB_ENDPOINT_4_IN_USED +#define CONF_USB_EP4_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_5_OUT_USED) && USB_ENDPOINT_5_OUT_USED +#define CONF_USB_EP5_CACHE 64 +#endif +#if defined(USB_ENDPOINT_5_IN_USED) && USB_ENDPOINT_5_IN_USED +#define CONF_USB_EP5_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_6_OUT_USED) && USB_ENDPOINT_6_OUT_USED +#define CONF_USB_EP6_CACHE 64 +#endif +#if defined(USB_ENDPOINT_6_IN_USED) && USB_ENDPOINT_6_IN_USED +#define CONF_USB_EP6_I_CACHE 64 +#endif + +#if defined(USB_ENDPOINT_7_OUT_USED) && USB_ENDPOINT_7_OUT_USED +#define CONF_USB_EP7_CACHE 64 +#endif +#if defined(USB_ENDPOINT_7_IN_USED) && USB_ENDPOINT_7_IN_USED +#define CONF_USB_EP7_I_CACHE 64 +#endif + + +// <<< Use Configuration Wizard in Context Menu >>> + +#define CONF_USB_N_0 0 +#define CONF_USB_N_1 1 +#define CONF_USB_N_2 2 +#define CONF_USB_N_3 3 +#define CONF_USB_N_4 4 +#define CONF_USB_N_5 5 +#define CONF_USB_N_6 6 +#define CONF_USB_N_7 7 +#define CONF_USB_N_8 8 +#define CONF_USB_N_9 9 +#define CONF_USB_N_10 10 +#define CONF_USB_N_11 11 +#define CONF_USB_N_12 12 +#define CONF_USB_N_13 13 +#define CONF_USB_N_14 14 +#define CONF_USB_N_15 15 + +#define CONF_USB_D_EP_N_MAX (USB_EPT_NUM - 1) +#define CONF_USB_D_N_EP_MAX (CONF_USB_D_EP_N_MAX * 2 - 1) + +// <h> USB Device HAL Configuration + +// <y> Max number of endpoints supported +// <i> Limits the number of endpoints (described by EP address) can be used in app. +// NOTE(tannewt): This not only limits the number of endpoints but also the +// addresses. In other words, even if you use endpoint 6 you need to set this to 11. +// <CONF_USB_N_1"> 1 (EP0 only) +// <CONF_USB_N_2"> 2 (EP0 + 1 endpoint) +// <CONF_USB_N_3"> 3 (EP0 + 2 endpoints) +// <CONF_USB_N_4"> 4 (EP0 + 3 endpoints) +// <CONF_USB_N_5"> 5 (EP0 + 4 endpoints) +// <CONF_USB_N_6"> 6 (EP0 + 5 endpoints) +// <CONF_USB_N_7"> 7 (EP0 + 6 endpoints) +// <CONF_USB_N_8"> 8 (EP0 + 7 endpoints) +// <CONF_USB_D_N_EP_MAX"> Max possible (by "Max Endpoint Number" config) +// <id> usbd_num_ep_sp +#ifndef CONF_USB_D_NUM_EP_SP +#define CONF_USB_D_NUM_EP_SP CONF_USB_D_N_EP_MAX +#endif + +// </h> + +// <y> Max Endpoint Number supported +// <i> Limits the max endpoint number. +// <i> USB endpoint address is constructed by direction and endpoint number. Bit 8 of address set indicates the direction is IN. E.g., EP0x81 and EP0x01 have the same endpoint number, 1. +// <i> Reduce the value according to specific device design, to cut-off memory usage. +// <CONF_USB_N_0"> 0 (only EP0) +// <CONF_USB_N_1"> 1 (EP 0x81 or 0x01) +// <CONF_USB_N_2"> 2 (EP 0x82 or 0x02) +// <CONF_USB_N_3"> 3 (EP 0x83 or 0x03) +// <CONF_USB_N_4"> 4 (EP 0x84 or 0x04) +// <CONF_USB_N_5"> 5 (EP 0x85 or 0x05) +// <CONF_USB_N_6"> 6 (EP 0x86 or 0x06) +// <CONF_USB_N_7"> 7 (EP 0x87 or 0x07) +// <CONF_USB_EP_N_MAX"> Max possible (by HW) +// <i> The number of physical endpoints - 1 +// <id> usbd_arch_max_ep_n +#ifndef CONF_USB_D_MAX_EP_N +#define CONF_USB_D_MAX_EP_N CONF_USB_D_EP_N_MAX +#endif + +// <y> USB Speed Limit +// <i> Limits the working speed of the device. +// <USB_SPEED_FS"> Full speed +// <USB_SPEED_LS"> Low Speed +// <id> usbd_arch_speed +#ifndef CONF_USB_D_SPEED +#define CONF_USB_D_SPEED USB_SPEED_FS +#endif + +// <o> Cache buffer size for EP0 +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> EP0 is default control endpoint, so cache must be used to be able to receive SETUP packet at any time. +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <id> usb_arch_ep0_cache +#ifndef CONF_USB_EP0_CACHE +#define CONF_USB_EP0_CACHE 64 +#endif + +// <h> Cache configuration EP1 +// <o> Cache buffer size for EP1 OUT +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_arch_ep1_cache +#ifndef CONF_USB_EP1_CACHE +#define CONF_USB_EP1_CACHE 0 +#endif + +// <o> Cache buffer size for EP1 IN +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must not be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_ep1_I_CACHE +#ifndef CONF_USB_EP1_I_CACHE +#define CONF_USB_EP1_I_CACHE 0 +#endif +// </h> + +// <h> Cache configuration EP2 +// <o> Cache buffer size for EP2 OUT +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_arch_ep2_cache +#ifndef CONF_USB_EP2_CACHE +#define CONF_USB_EP2_CACHE 0 +#endif + +// <o> Cache buffer size for EP2 IN +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must not be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_ep2_I_CACHE +#ifndef CONF_USB_EP2_I_CACHE +#define CONF_USB_EP2_I_CACHE 0 +#endif +// </h> + +// <h> Cache configuration EP3 +// <o> Cache buffer size for EP3 OUT +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_arch_ep3_cache +#ifndef CONF_USB_EP3_CACHE +#define CONF_USB_EP3_CACHE 0 +#endif + +// <o> Cache buffer size for EP3 IN +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must not be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_ep3_I_CACHE +#ifndef CONF_USB_EP3_I_CACHE +#define CONF_USB_EP3_I_CACHE 0 +#endif +// </h> + +// <h> Cache configuration EP4 +// <o> Cache buffer size for EP4 OUT +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_arch_ep4_cache +#ifndef CONF_USB_EP4_CACHE +#define CONF_USB_EP4_CACHE 0 +#endif + +// <o> Cache buffer size for EP4 IN +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must not be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_ep4_I_CACHE +#ifndef CONF_USB_EP4_I_CACHE +#define CONF_USB_EP4_I_CACHE 0 +#endif +// </h> + +// <h> Cache configuration EP5 +// <o> Cache buffer size for EP5 OUT +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_arch_ep5_cache +#ifndef CONF_USB_EP5_CACHE +#define CONF_USB_EP5_CACHE 0 +#endif + +// <o> Cache buffer size for EP5 IN +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must not be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_ep5_I_CACHE +#ifndef CONF_USB_EP5_I_CACHE +#define CONF_USB_EP5_I_CACHE 0 +#endif +// </h> + +// <h> Cache configuration EP6 +// <o> Cache buffer size for EP6 OUT +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_arch_ep6_cache +#ifndef CONF_USB_EP6_CACHE +#define CONF_USB_EP6_CACHE 0 +#endif + +// <o> Cache buffer size for EP6 IN +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must not be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_ep6_I_CACHE +#ifndef CONF_USB_EP6_I_CACHE +#define CONF_USB_EP6_I_CACHE 0 +#endif +// </h> + +// <h> Cache configuration EP7 +// <o> Cache buffer size for EP7 OUT +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_arch_ep7_cache +#ifndef CONF_USB_EP7_CACHE +#define CONF_USB_EP7_CACHE 0 +#endif + +// <o> Cache buffer size for EP7 IN +// <i> Cache is used because the USB hardware always uses DMA which requires specific memory feature. +// <i> This cache must not be allocated if you plan to use the endpoint as control endpoint. +// <i> No cache means IN transaction not support data buffer outside of RAM, OUT transaction not support unaligned buffer and buffer size less than endpoint max packet size +// <0=> No cache +// <8=> Cached by 8 bytes buffer +// <16=> Cached by 16 bytes buffer +// <32=> Cached by 32 bytes buffer +// <64=> Cached by 64 bytes buffer +// <128=> Cached by 128 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <256=> Cached by 256 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <512=> Cached by 512 bytes buffer (HS Bulk or interrupt or isochronous EP) +// <1024=> Cached by 1024 bytes buffer (interrupt or isochronous EP) +// <id> usb_ep7_I_CACHE +#ifndef CONF_USB_EP7_I_CACHE +#define CONF_USB_EP7_I_CACHE 0 +#endif +// </h> + +// <<< end of configuration section >>> + +#endif // HPL_USB_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/peripheral_clk_config.h b/ports/atmel-samd/asf4_conf/same54/peripheral_clk_config.h new file mode 100644 index 000000000..59fe8730e --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/peripheral_clk_config.h @@ -0,0 +1,1170 @@ +/* Auto-generated config file peripheral_clk_config.h */ +#ifndef PERIPHERAL_CLK_CONFIG_H +#define PERIPHERAL_CLK_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// <y> ADC Clock Source +// <id> adc_gclk_selection + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for ADC. +#ifndef CONF_GCLK_ADC0_SRC +#define CONF_GCLK_ADC0_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_ADC0_FREQUENCY + * \brief ADC0's Clock frequency + */ +#ifndef CONF_GCLK_ADC0_FREQUENCY +#define CONF_GCLK_ADC0_FREQUENCY 48000000 +#endif + +// <y> DAC Clock Source + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <id> dac_gclk_selection +// <i> Select the clock source for DAC. +#ifndef CONF_GCLK_DAC_SRC +#define CONF_GCLK_DAC_SRC GCLK_PCHCTRL_GEN_GCLK6_Val +#endif + +/** + * \def CONF_GCLK_DAC_FREQUENCY + * \brief DAC's Clock frequency + */ +#ifndef CONF_GCLK_DAC_FREQUENCY +#define CONF_GCLK_DAC_FREQUENCY 2000000 +#endif + +// <y> EVSYS Channel 0 Clock Source +// <id> evsys_clk_selection_0 + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for channel 0. +#ifndef CONF_GCLK_EVSYS_CHANNEL_0_SRC +#define CONF_GCLK_EVSYS_CHANNEL_0_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY 48000000.0 +#endif + +// <y> EVSYS Channel 1 Clock Source +// <id> evsys_clk_selection_1 + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for channel 1. +#ifndef CONF_GCLK_EVSYS_CHANNEL_1_SRC +#define CONF_GCLK_EVSYS_CHANNEL_1_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY 48000000.0 +#endif + +// <y> EVSYS Channel 2 Clock Source +// <id> evsys_clk_selection_2 + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for channel 2. +#ifndef CONF_GCLK_EVSYS_CHANNEL_2_SRC +#define CONF_GCLK_EVSYS_CHANNEL_2_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY 48000000.0 +#endif + +// <y> EVSYS Channel 3 Clock Source +// <id> evsys_clk_selection_3 + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for channel 3. +#ifndef CONF_GCLK_EVSYS_CHANNEL_3_SRC +#define CONF_GCLK_EVSYS_CHANNEL_3_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY 48000000.0 +#endif + +// <y> EVSYS Channel 4 Clock Source +// <id> evsys_clk_selection_4 + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for channel 4. +#ifndef CONF_GCLK_EVSYS_CHANNEL_4_SRC +#define CONF_GCLK_EVSYS_CHANNEL_4_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY 48000000.0 +#endif + +// <y> EVSYS Channel 5 Clock Source +// <id> evsys_clk_selection_5 + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for channel 5. +#ifndef CONF_GCLK_EVSYS_CHANNEL_5_SRC +#define CONF_GCLK_EVSYS_CHANNEL_5_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY 48000000.0 +#endif + +// <y> EVSYS Channel 6 Clock Source +// <id> evsys_clk_selection_6 + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for channel 6. +#ifndef CONF_GCLK_EVSYS_CHANNEL_6_SRC +#define CONF_GCLK_EVSYS_CHANNEL_6_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY 48000000.0 +#endif + +// <y> EVSYS Channel 7 Clock Source +// <id> evsys_clk_selection_7 + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for channel 7. +#ifndef CONF_GCLK_EVSYS_CHANNEL_7_SRC +#define CONF_GCLK_EVSYS_CHANNEL_7_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY 48000000.0 +#endif + +// <y> EVSYS Channel 8 Clock Source +// <id> evsys_clk_selection_8 + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for channel 8. +#ifndef CONF_GCLK_EVSYS_CHANNEL_8_SRC +#define CONF_GCLK_EVSYS_CHANNEL_8_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY 48000000.0 +#endif + +// <y> EVSYS Channel 9 Clock Source +// <id> evsys_clk_selection_9 + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for channel 9. +#ifndef CONF_GCLK_EVSYS_CHANNEL_9_SRC +#define CONF_GCLK_EVSYS_CHANNEL_9_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY 48000000.0 +#endif + +// <y> EVSYS Channel 10 Clock Source +// <id> evsys_clk_selection_10 + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for channel 10. +#ifndef CONF_GCLK_EVSYS_CHANNEL_10_SRC +#define CONF_GCLK_EVSYS_CHANNEL_10_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY 48000000.0 +#endif + +// <y> EVSYS Channel 11 Clock Source +// <id> evsys_clk_selection_11 + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for channel 11. +#ifndef CONF_GCLK_EVSYS_CHANNEL_11_SRC +#define CONF_GCLK_EVSYS_CHANNEL_11_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY + * \brief EVSYS's Clock frequency + */ + +#ifndef CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY +#define CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY 48000000.0 +#endif + +/** + * \def CONF_CPU_FREQUENCY + * \brief CPU's Clock frequency + */ +#ifndef CONF_CPU_FREQUENCY +#define CONF_CPU_FREQUENCY 120000000 +#endif + +// <y> RTC Clock Source +// <id> rtc_clk_selection +// <RTC_CLOCK_SOURCE"> RTC source +// <i> Select the clock source for RTC. +#ifndef CONF_GCLK_RTC_SRC +#define CONF_GCLK_RTC_SRC RTC_CLOCK_SOURCE +#endif + +/** + * \def CONF_GCLK_RTC_FREQUENCY + * \brief RTC's Clock frequency + */ +#ifndef CONF_GCLK_RTC_FREQUENCY +#define CONF_GCLK_RTC_FREQUENCY 1024 +#endif + +// <y> Core Clock Source +// <id> core_gclk_selection + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for CORE. +#ifndef CONF_GCLK_SERCOM0_CORE_SRC +#define CONF_GCLK_SERCOM0_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +// <y> Slow Clock Source +// <id> slow_gclk_selection + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the slow clock source. +#ifndef CONF_GCLK_SERCOM0_SLOW_SRC +#define CONF_GCLK_SERCOM0_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val +#endif + +/** + * \def CONF_GCLK_SERCOM0_CORE_FREQUENCY + * \brief SERCOM0's Core Clock frequency + */ +#ifndef CONF_GCLK_SERCOM0_CORE_FREQUENCY +#define CONF_GCLK_SERCOM0_CORE_FREQUENCY 48000000 +#endif + +/** + * \def CONF_GCLK_SERCOM0_SLOW_FREQUENCY + * \brief SERCOM0's Slow Clock frequency + */ +#ifndef CONF_GCLK_SERCOM0_SLOW_FREQUENCY +#define CONF_GCLK_SERCOM0_SLOW_FREQUENCY 32768 +#endif + +// <y> Core Clock Source +// <id> core_gclk_selection + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for CORE. +#ifndef CONF_GCLK_SERCOM1_CORE_SRC +#define CONF_GCLK_SERCOM1_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +// <y> Slow Clock Source +// <id> slow_gclk_selection + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the slow clock source. +#ifndef CONF_GCLK_SERCOM1_SLOW_SRC +#define CONF_GCLK_SERCOM1_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val +#endif + +/** + * \def CONF_GCLK_SERCOM1_CORE_FREQUENCY + * \brief SERCOM1's Core Clock frequency + */ +#ifndef CONF_GCLK_SERCOM1_CORE_FREQUENCY +#define CONF_GCLK_SERCOM1_CORE_FREQUENCY 48000000 +#endif + +/** + * \def CONF_GCLK_SERCOM1_SLOW_FREQUENCY + * \brief SERCOM1's Slow Clock frequency + */ +#ifndef CONF_GCLK_SERCOM1_SLOW_FREQUENCY +#define CONF_GCLK_SERCOM1_SLOW_FREQUENCY 32768 +#endif + +// <y> Core Clock Source +// <id> core_gclk_selection + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for CORE. +#ifndef CONF_GCLK_SERCOM2_CORE_SRC +#define CONF_GCLK_SERCOM2_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +// <y> Slow Clock Source +// <id> slow_gclk_selection + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the slow clock source. +#ifndef CONF_GCLK_SERCOM2_SLOW_SRC +#define CONF_GCLK_SERCOM2_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val +#endif + +/** + * \def CONF_GCLK_SERCOM2_CORE_FREQUENCY + * \brief SERCOM2's Core Clock frequency + */ +#ifndef CONF_GCLK_SERCOM2_CORE_FREQUENCY +#define CONF_GCLK_SERCOM2_CORE_FREQUENCY 48000000 +#endif + +/** + * \def CONF_GCLK_SERCOM2_SLOW_FREQUENCY + * \brief SERCOM2's Slow Clock frequency + */ +#ifndef CONF_GCLK_SERCOM2_SLOW_FREQUENCY +#define CONF_GCLK_SERCOM2_SLOW_FREQUENCY 32768 +#endif + +// <y> Core Clock Source +// <id> core_gclk_selection + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for CORE. +#ifndef CONF_GCLK_SERCOM3_CORE_SRC +#define CONF_GCLK_SERCOM3_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +// <y> Slow Clock Source +// <id> slow_gclk_selection + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the slow clock source. +#ifndef CONF_GCLK_SERCOM3_SLOW_SRC +#define CONF_GCLK_SERCOM3_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val +#endif + +/** + * \def CONF_GCLK_SERCOM3_CORE_FREQUENCY + * \brief SERCOM3's Core Clock frequency + */ +#ifndef CONF_GCLK_SERCOM3_CORE_FREQUENCY +#define CONF_GCLK_SERCOM3_CORE_FREQUENCY 48000000 +#endif + +/** + * \def CONF_GCLK_SERCOM3_SLOW_FREQUENCY + * \brief SERCOM3's Slow Clock frequency + */ +#ifndef CONF_GCLK_SERCOM3_SLOW_FREQUENCY +#define CONF_GCLK_SERCOM3_SLOW_FREQUENCY 32768 +#endif + +// <y> TC Clock Source +// <id> tc_gclk_selection + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for TC. +#ifndef CONF_GCLK_TC0_SRC +#define CONF_GCLK_TC0_SRC GCLK_PCHCTRL_GEN_GCLK1_Val +#endif + +/** + * \def CONF_GCLK_TC0_FREQUENCY + * \brief TC0's Clock frequency + */ +#ifndef CONF_GCLK_TC0_FREQUENCY +#define CONF_GCLK_TC0_FREQUENCY 48000000 +#endif + +// <y> USB Clock Source +// <id> usb_gclk_selection + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for USB. +#ifndef CONF_GCLK_USB_SRC +#define CONF_GCLK_USB_SRC GCLK_PCHCTRL_GEN_GCLK1_Val + +#endif + +/** + * \def CONF_GCLK_USB_FREQUENCY + * \brief USB's Clock frequency + */ +#ifndef CONF_GCLK_USB_FREQUENCY +#define CONF_GCLK_USB_FREQUENCY 48000000 +#endif + +// <h> SDHC Clock Settings +// <y> SDHC Clock source + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for SDHC. +// <id> sdhc_gclk_selection +#ifndef CONF_GCLK_SDHC0_SRC +#define CONF_GCLK_SDHC0_SRC GCLK_GENCTRL_SRC_DFLL_Val +#endif + +// <y> SDHC clock slow source + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for SDHC. +// <id> sdhc_slow_gclk_selection +#ifndef CONF_GCLK_SDHC0_SLOW_SRC +#define CONF_GCLK_SDHC0_SLOW_SRC GCLK_GENCTRL_SRC_DFLL_Val +#endif +// </h> + +/** + * \def SDHC FREQUENCY + * \brief SDHC's Clock frequency + */ +#ifndef CONF_SDHC0_FREQUENCY +#define CONF_SDHC0_FREQUENCY 12000000 +#endif + +/** + * \def SDHC FREQUENCY + * \brief SDHC's Clock slow frequency + */ +#ifndef CONF_SDHC0_SLOW_FREQUENCY +#define CONF_SDHC0_SLOW_FREQUENCY 12000000 +#endif + +// <h> SDHC Clock Settings +// <y> SDHC Clock source + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for SDHC. +// <id> sdhc_gclk_selection +#ifndef CONF_GCLK_SDHC1_SRC +#define CONF_GCLK_SDHC1_SRC GCLK_GENCTRL_SRC_DFLL_Val +#endif + +// <y> SDHC clock slow source + +// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0 + +// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1 + +// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2 + +// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3 + +// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4 + +// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5 + +// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6 + +// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7 + +// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8 + +// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9 + +// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10 + +// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11 + +// <i> Select the clock source for SDHC. +// <id> sdhc_slow_gclk_selection +#ifndef CONF_GCLK_SDHC1_SLOW_SRC +#define CONF_GCLK_SDHC1_SLOW_SRC GCLK_GENCTRL_SRC_DFLL_Val +#endif +// </h> + +/** + * \def SDHC FREQUENCY + * \brief SDHC's Clock frequency + */ +#ifndef CONF_SDHC1_FREQUENCY +#define CONF_SDHC1_FREQUENCY 12000000 +#endif + +/** + * \def SDHC FREQUENCY + * \brief SDHC's Clock slow frequency + */ +#ifndef CONF_SDHC1_SLOW_FREQUENCY +#define CONF_SDHC1_SLOW_FREQUENCY 12000000 +#endif + +// <<< end of configuration section >>> + +#endif // PERIPHERAL_CLK_CONFIG_H diff --git a/ports/atmel-samd/asf4_conf/same54/usbd_config.h b/ports/atmel-samd/asf4_conf/same54/usbd_config.h new file mode 100644 index 000000000..be1fa3c9e --- /dev/null +++ b/ports/atmel-samd/asf4_conf/same54/usbd_config.h @@ -0,0 +1,850 @@ +/* Auto-generated config file usbd_config.h */ +#ifndef USBD_CONFIG_H +#define USBD_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// ---- USB Device Stack Core Options ---- + +// <q> High Speed Support +// <i> Enable high speed specific descriptors support, e.g., DeviceQualifierDescriptor and OtherSpeedConfiguration Descriptor. +// <i> High speed support require descriptors description array on start, for LS/FS and HS support in first and second place. +// <id> usbd_hs_sp +#ifndef CONF_USBD_HS_SP +#define CONF_USBD_HS_SP 0 +#endif + +// ---- USB Device Stack Composite Options ---- + +// <e> Enable String Descriptors +// <id> usb_composite_str_en +#ifndef CONF_USB_COMPOSITE_STR_EN +#define CONF_USB_COMPOSITE_STR_EN 0 +#endif +// <s> Language IDs +// <i> Language IDs in c format, split by comma (E.g., 0x0409 ...) +// <id> usb_composite_langid +#ifndef CONF_USB_COMPOSITE_LANGID +#define CONF_USB_COMPOSITE_LANGID "0x0409" +#endif + +#ifndef CONF_USB_COMPOSITE_LANGID_DESC +#define CONF_USB_COMPOSITE_LANGID_DESC +#endif +// </e> + +// <h> Composite Device Descriptor + +// <o> bcdUSB +// <0x0200=> USB 2.0 version +// <0x0210=> USB 2.1 version +// <id> usb_composite_bcdusb +#ifndef CONF_USB_COMPOSITE_BCDUSB +#define CONF_USB_COMPOSITE_BCDUSB 0x200 +#endif + +// <o> bMaxPackeSize0 +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes +// <id> usb_composite_bmaxpksz0 +#ifndef CONF_USB_COMPOSITE_BMAXPKSZ0 +#define CONF_USB_COMPOSITE_BMAXPKSZ0 0x40 +#endif + +// <o> idVender <0x0000-0xFFFF> +// <id> usb_composite_idvender +#ifndef CONF_USB_COMPOSITE_IDVENDER +#define CONF_USB_COMPOSITE_IDVENDER 0x3eb +#endif + +// <o> idProduct <0x0000-0xFFFF> +// <id> usb_composite_idproduct +#ifndef CONF_USB_COMPOSITE_IDPRODUCT +#define CONF_USB_COMPOSITE_IDPRODUCT 0x2421 +#endif + +// <o> bcdDevice <0x0000-0xFFFF> +// <id> usb_composite_bcddevice +#ifndef CONF_USB_COMPOSITE_BCDDEVICE +#define CONF_USB_COMPOSITE_BCDDEVICE 0x100 +#endif + +// <e> Enable string descriptor of iManufact +// <id> usb_composite_imanufact_en +#ifndef CONF_USB_COMPOSITE_IMANUFACT_EN +#define CONF_USB_COMPOSITE_IMANUFACT_EN 0 +#endif + +#ifndef CONF_USB_COMPOSITE_IMANUFACT +#define CONF_USB_COMPOSITE_IMANUFACT (CONF_USB_COMPOSITE_IMANUFACT_EN * (CONF_USB_COMPOSITE_IMANUFACT_EN)) +#endif + +// <s> Unicode string of iManufact +// <id> usb_composite_imanufact_str +#ifndef CONF_USB_COMPOSITE_IMANUFACT_STR +#define CONF_USB_COMPOSITE_IMANUFACT_STR "Atmel" +#endif + +#ifndef CONF_USB_COMPOSITE_IMANUFACT_STR_DESC +#define CONF_USB_COMPOSITE_IMANUFACT_STR_DESC +#endif + +// </e> + +// <e> Enable string descriptor of iProduct +// <id> usb_composite_iproduct_en +#ifndef CONF_USB_COMPOSITE_IPRODUCT_EN +#define CONF_USB_COMPOSITE_IPRODUCT_EN 0 +#endif + +#ifndef CONF_USB_COMPOSITE_IPRODUCT +#define CONF_USB_COMPOSITE_IPRODUCT \ + (CONF_USB_COMPOSITE_IPRODUCT_EN * (CONF_USB_COMPOSITE_IMANUFACT_EN + CONF_USB_COMPOSITE_IPRODUCT_EN)) +#endif + +// <s> Unicode string of iProduct +// <id> usb_composite_iproduct_str +#ifndef CONF_USB_COMPOSITE_IPRODUCT_STR +#define CONF_USB_COMPOSITE_IPRODUCT_STR "Composite Demo" +#endif + +#ifndef CONF_USB_COMPOSITE_IPRODUCT_STR_DESC +#define CONF_USB_COMPOSITE_IPRODUCT_STR_DESC +#endif + +// </e> + +// <e> Enable string descriptor of iSerialNum +// <id> usb_composite_iserialnum_en +#ifndef CONF_USB_COMPOSITE_ISERIALNUM_EN +#define CONF_USB_COMPOSITE_ISERIALNUM_EN 0 +#endif + +#ifndef CONF_USB_COMPOSITE_ISERIALNUM +#define CONF_USB_COMPOSITE_ISERIALNUM \ + (CONF_USB_COMPOSITE_ISERIALNUM_EN \ + * (CONF_USB_COMPOSITE_IMANUFACT_EN + CONF_USB_COMPOSITE_IPRODUCT_EN + CONF_USB_COMPOSITE_ISERIALNUM_EN)) +#endif + +// <s> Unicode string of iSerialNum +// <id> usb_composite_iserialnum_str +#ifndef CONF_USB_COMPOSITE_ISERIALNUM_STR +#define CONF_USB_COMPOSITE_ISERIALNUM_STR "123456789ABCDEF" +#endif + +#ifndef CONF_USB_COMPOSITE_ISERIALNUM_STR_DESC +#define CONF_USB_COMPOSITE_ISERIALNUM_STR_DESC +#endif + +// </e> + +// <o> bNumConfigurations <0x01-0xFF> +// <id> usb_composite_bnumconfig +#ifndef CONF_USB_COMPOSITE_BNUMCONFIG +#define CONF_USB_COMPOSITE_BNUMCONFIG 0x1 +#endif + +// </h> + +// <h> Composite Configuration Descriptor +// <o> bConfigurationValue <0x01-0xFF> +// <id> usb_composite_bconfigval +#ifndef CONF_USB_COMPOSITE_BCONFIGVAL +#define CONF_USB_COMPOSITE_BCONFIGVAL 0x1 +#endif +// <e> Enable string descriptor of iConfig +// <id> usb_composite_iconfig_en +#ifndef CONF_USB_COMPOSITE_ICONFIG_EN +#define CONF_USB_COMPOSITE_ICONFIG_EN 0 +#endif + +#ifndef CONF_USB_COMPOSITE_ICONFIG +#define CONF_USB_COMPOSITE_ICONFIG \ + (CONF_USB_COMPOSITE_ICONFIG_EN \ + * (CONF_USB_COMPOSITE_IMANUFACT_EN + CONF_USB_COMPOSITE_IPRODUCT_EN + CONF_USB_COMPOSITE_ISERIALNUM_EN \ + + CONF_USB_COMPOSITE_ICONFIG_EN)) +#endif + +// <s> Unicode string of iConfig +// <id> usb_composite_iconfig_str +#ifndef CONF_USB_COMPOSITE_ICONFIG_STR +#define CONF_USB_COMPOSITE_ICONFIG_STR "" +#endif + +#ifndef CONF_USB_COMPOSITE_ICONFIG_STR_DESC +#define CONF_USB_COMPOSITE_ICONFIG_STR_DESC +#endif + +// </e> + +// <o> bmAttributes +// <0x80=> Bus power supply, not support for remote wakeup +// <0xA0=> Bus power supply, support for remote wakeup +// <0xC0=> Self powered, not support for remote wakeup +// <0xE0=> Self powered, support for remote wakeup +// <id> usb_composite_bmattri +#ifndef CONF_USB_COMPOSITE_BMATTRI +#define CONF_USB_COMPOSITE_BMATTRI 0x80 +#endif + +// <o> bMaxPower <0x00-0xFF> +// <id> usb_composite_bmaxpower +#ifndef CONF_USB_COMPOSITE_BMAXPOWER +#define CONF_USB_COMPOSITE_BMAXPOWER 0x32 +#endif +// </h> + +// <e> CDC ACM Support +// <id> usb_composite_cdc_acm_support +#ifndef CONF_USB_COMPOSITE_CDC_ACM_EN +#define CONF_USB_COMPOSITE_CDC_ACM_EN 0 +#endif + +// <o> CDC ACM Comm Interrupt IN Endpoint Address +// <0x81=> EndpointAddress = 0x81 +// <0x82=> EndpointAddress = 0x82 +// <0x83=> EndpointAddress = 0x83 +// <0x84=> EndpointAddress = 0x84 +// <0x85=> EndpointAddress = 0x85 +// <0x86=> EndpointAddress = 0x86 +// <0x87=> EndpointAddress = 0x87 +// <0x88=> EndpointAddress = 0x88 +// <0x89=> EndpointAddress = 0x89 + +// <id> usb_composite_cdc_acm_epaddr +#ifndef CONF_USB_COMPOSITE_CDC_ACM_COMM_INT_EPADDR +#define CONF_USB_COMPOSITE_CDC_ACM_COMM_INT_EPADDR 0x82 +#endif + +// <o> CDC ACM Comm Interrupt IN Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// <id> usb_composite_cdc_acm_comm_int_maxpksz +#ifndef CONF_USB_COMPOSITE_CDC_ACM_COMM_INT_MAXPKSZ +#define CONF_USB_COMPOSITE_CDC_ACM_COMM_INT_MAXPKSZ 0x40 +#endif + +// <o> CDC ACM Data BULK IN Endpoint Address +// <0x81=> EndpointAddress = 0x81 +// <0x82=> EndpointAddress = 0x82 +// <0x83=> EndpointAddress = 0x83 +// <0x84=> EndpointAddress = 0x84 +// <0x85=> EndpointAddress = 0x85 +// <0x86=> EndpointAddress = 0x86 +// <0x87=> EndpointAddress = 0x87 +// <0x88=> EndpointAddress = 0x88 +// <0x89=> EndpointAddress = 0x89 + +// <id> usb_composite_cdc_acm_data_bulkin_epaddr +#ifndef CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKIN_EPADDR +#define CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKIN_EPADDR 0x81 +#endif + +// <o> CDC ACM Data BULK IN Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// <id> usb_composite_cdc_acm_data_builin_maxpksz +#ifndef CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKIN_MAXPKSZ +#define CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKIN_MAXPKSZ 0x40 +#endif + +// <o> CDC ACM Data BULK IN Endpoint wMaxPacketSize for High Speed +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes +// <0x0080=> 128 bytes +// <0x0100=> 256 bytes +// <0x0200=> 512 bytes + +// <id> usb_composite_cdc_acm_data_builin_maxpksz_hs +#ifndef CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKIN_MAXPKSZ_HS +#define CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKIN_MAXPKSZ_HS 0x200 +#endif + +// <o> CDC ACM Data BULK OUT Endpoint Address +// <0x01=> EndpointAddress = 0x01 +// <0x02=> EndpointAddress = 0x02 +// <0x03=> EndpointAddress = 0x03 +// <0x04=> EndpointAddress = 0x04 +// <0x05=> EndpointAddress = 0x05 +// <0x06=> EndpointAddress = 0x06 +// <0x07=> EndpointAddress = 0x07 +// <0x08=> EndpointAddress = 0x08 +// <0x09=> EndpointAddress = 0x09 + +// <id> usb_composite_cdc_acm_data_bulkout_epaddr +#ifndef CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKOUT_EPADDR +#define CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKOUT_EPADDR 0x1 +#endif + +// <o> CDC ACM Data BULK OUT Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// <id> usb_composite_cdc_acm_data_buckout_maxpksz +#ifndef CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKOUT_MAXPKSZ +#define CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKOUT_MAXPKSZ 0x40 +#endif + +// <o> CDC ACM Data BULK OUT Endpoint wMaxPacketSize for High Speed +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes +// <0x0080=> 128 bytes +// <0x0100=> 256 bytes +// <0x0200=> 512 bytes + +// <id> usb_composite_cdc_acm_data_buckout_maxpksz_hs +#ifndef CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKOUT_MAXPKSZ_HS +#define CONF_USB_COMPOSITE_CDC_ACM_DATA_BULKOUT_MAXPKSZ_HS 0x200 +#endif + +// <q> CDC ACM Echo Demo generation +// <id> conf_usb_composite_cdc_echo_demo +// <i> Invoke cdcdf_acm_demo_init(buf[wMaxPacketSize]) to enable the echo demo. +// <i> Buf is packet buffer for data receive and echo back. +// <i> The buffer is 4 byte aligned to support DMA. +#ifndef CONF_USB_COMPOSITE_CDC_ECHO_DEMO +#define CONF_USB_COMPOSITE_CDC_ECHO_DEMO 0 +#endif + +// </e> + +// <e> HID Mouse Support +// <id> usb_composite_hid_mouse_support +#ifndef CONF_USB_COMPOSITE_HID_MOUSE_EN +#define CONF_USB_COMPOSITE_HID_MOUSE_EN 0 +#endif + +// <o> HID Mouse INTERRUPT IN Endpoint Address +// <0x81=> EndpointAddress = 0x81 +// <0x82=> EndpointAddress = 0x82 +// <0x83=> EndpointAddress = 0x83 +// <0x84=> EndpointAddress = 0x84 +// <0x85=> EndpointAddress = 0x85 +// <0x86=> EndpointAddress = 0x86 +// <0x87=> EndpointAddress = 0x87 +// <0x88=> EndpointAddress = 0x88 +// <0x89=> EndpointAddress = 0x89 + +// <id> usb_composite_hid_mouse_intin_epaddr +// <i> Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_MOUSE_INTIN_EPADDR +#define CONF_USB_COMPOSITE_HID_MOUSE_INTIN_EPADDR 0x83 +#endif + +// <o> HID Mouse INTERRUPT IN Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// <id> usb_composite_hid_mouse_intin_maxpksz +// <i> Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_MOUSE_INTIN_MAXPKSZ +#define CONF_USB_COMPOSITE_HID_MOUSE_INTIN_MAXPKSZ 0x8 +#endif + +// <q> HID Mouse Move Demo generation +// <id> conf_usb_composite_hid_mouse_demo +// <i> Invoke hiddf_demo_init(button1, button2, button3) to enabled the move demo. +// <i> Button1 and button3 are the pins used for mouse moving left and right. +#ifndef CONF_USB_COMPOSITE_HID_MOUSE_DEMO +#define CONF_USB_COMPOSITE_HID_MOUSE_DEMO 0 +#endif + +// </e> + +// <e> HID Keyboard Support +// <id> usb_composite_hid_keyboard_support +#ifndef CONF_USB_COMPOSITE_HID_KEYBOARD_EN +#define CONF_USB_COMPOSITE_HID_KEYBOARD_EN 0 +#endif + +// <o> HID Keyboard INTERRUPT IN Endpoint Address +// <0x81=> EndpointAddress = 0x81 +// <0x82=> EndpointAddress = 0x82 +// <0x83=> EndpointAddress = 0x83 +// <0x84=> EndpointAddress = 0x84 +// <0x85=> EndpointAddress = 0x85 +// <0x86=> EndpointAddress = 0x86 +// <0x87=> EndpointAddress = 0x87 +// <0x88=> EndpointAddress = 0x88 +// <0x89=> EndpointAddress = 0x89 + +// <id> usb_composite_hid_keyboard_intin_epaddr +// <i> Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_KEYBOARD_INTIN_EPADDR +#define CONF_USB_COMPOSITE_HID_KEYBOARD_INTIN_EPADDR 0x84 +#endif + +// <o> HID Keyboard INTERRUPT IN Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// <id> usb_composite_hid_keyboard_intin_maxpksz +// <i> Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_KEYBOARD_INTIN_MAXPKSZ +#define CONF_USB_COMPOSITE_HID_KEYBOARD_INTIN_MAXPKSZ 0x8 +#endif + +// <o> HID Keyboard INTERRUPT OUT Endpoint Address +// <0x01=> EndpointAddress = 0x01 +// <0x02=> EndpointAddress = 0x02 +// <0x03=> EndpointAddress = 0x03 +// <0x04=> EndpointAddress = 0x04 +// <0x05=> EndpointAddress = 0x05 +// <0x06=> EndpointAddress = 0x06 +// <0x07=> EndpointAddress = 0x07 +// <0x08=> EndpointAddress = 0x08 +// <0x09=> EndpointAddress = 0x09 + +// <id> usb_composite_hid_keyboard_intout_epaddr +// <i> Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_KEYBOARD_INTOUT_EPADDR +#define CONF_USB_COMPOSITE_HID_KEYBOARD_INTOUT_EPADDR 0x2 +#endif + +// <o> HID Keyboard INTERRUPT OUT Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// <id> usb_composite_hid_keyboard_intout_maxpksz +// <i> Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_KEYBOARD_INTOUT_MAXPKSZ +#define CONF_USB_COMPOSITE_HID_KEYBOARD_INTOUT_MAXPKSZ 0x8 +#endif + +// <q> HID Keyboard Caps Lock Demo generation +// <id> conf_usb_composite_hid_keyboard_demo +// <i> Invoke hiddf_demo_init(button1, button2, button3) to enabled the move demo. +// <i> Buffon2 is the pin used for keyboard CAPS LOCK simulation. +#ifndef CONF_USB_COMPOSITE_HID_KEYBOARD_DEMO +#define CONF_USB_COMPOSITE_HID_KEYBOARD_DEMO 0 +#endif + +// </e> + +// <e> HID Generic Support +// <id> usb_composite_hid_generic_support +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_EN +#define CONF_USB_COMPOSITE_HID_GENERIC_EN 0 +#endif + +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_REPORT_LEN +#define CONF_USB_COMPOSITE_HID_GENERIC_REPORT_LEN 53 +#endif + +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_REPORT +#define CONF_USB_COMPOSITE_HID_GENERIC_REPORT \ + 0x06, 0xFF, 0xFF, 0x09, 0x01, 0xA1, 0x01, 0x09, 0x02, 0x09, 0x03, 0x15, 0x00, 0x26, 0xFF, 0x00, 0x75, 0x08, 0x95, \ + 0x40, 0x81, 0x02, 0x09, 0x04, 0x09, 0x05, 0x15, 0x00, 0x26, 0xFF, 0x00, 0x75, 0x08, 0x95, 0x40, 0x91, 0x02, \ + 0x09, 0x06, 0x09, 0x07, 0x15, 0x00, 0x26, 0xFF, 0x00, 0x75, 0x08, 0x95, 0x04, 0xB1, 0x02, 0xC0 +#endif + +// <o> HID Generic INTERRUPT IN Endpoint Address +// <0x81=> EndpointAddress = 0x81 +// <0x82=> EndpointAddress = 0x82 +// <0x83=> EndpointAddress = 0x83 +// <0x84=> EndpointAddress = 0x84 +// <0x85=> EndpointAddress = 0x85 +// <0x86=> EndpointAddress = 0x86 +// <0x87=> EndpointAddress = 0x87 +// <0x88=> EndpointAddress = 0x88 +// <0x89=> EndpointAddress = 0x89 + +// <id> usb_composite_hid_generic_intin_epaddr +// <i> Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_INTIN_EPADDR +#define CONF_USB_COMPOSITE_HID_GENERIC_INTIN_EPADDR 0x85 +#endif + +// <o> HID Generic INTERRUPT IN Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// <id> usb_composite_hid_generic_intin_maxpksz +// <i> Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_INTIN_MAXPKSZ +#define CONF_USB_COMPOSITE_HID_GENERIC_INTIN_MAXPKSZ 0x40 +#endif + +// <o> HID Generic INTERRUPT OUT Endpoint Address +// <0x01=> EndpointAddress = 0x01 +// <0x02=> EndpointAddress = 0x02 +// <0x03=> EndpointAddress = 0x03 +// <0x04=> EndpointAddress = 0x04 +// <0x05=> EndpointAddress = 0x05 +// <0x06=> EndpointAddress = 0x06 +// <0x07=> EndpointAddress = 0x07 +// <0x08=> EndpointAddress = 0x08 +// <0x09=> EndpointAddress = 0x09 + +// <id> usb_composite_hid_generic_intout_epaddr +// <i> Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_INTOUT_EPADDR +#define CONF_USB_COMPOSITE_HID_GENERIC_INTOUT_EPADDR 0x3 +#endif + +// <o> HID Generic INTERRUPT OUT Endpoint wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes +// <id> usb_composite_hid_generic_intout_maxpksz +// <i> Please make sure that the setting here is coincide with the endpoint setting in USB device driver. +#ifndef CONF_USB_COMPOSITE_HID_GENERIC_INTOUT_MAXPKSZ +#define CONF_USB_COMPOSITE_HID_GENERIC_INTOUT_MAXPKSZ 0x40 +#endif + +// </e> + +// <e> MSC Support +// <id> usb_composite_msc_support +#ifndef CONF_USB_COMPOSITE_MSC_EN +#define CONF_USB_COMPOSITE_MSC_EN 0 +#endif + +// <o> MSC BULK Endpoints wMaxPacketSize +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes + +// <id> usb_composite_msc_bulk_maxpksz +#ifndef CONF_USB_COMPOSITE_MSC_BULK_MAXPKSZ +#define CONF_USB_COMPOSITE_MSC_BULK_MAXPKSZ 0x40 +#endif + +// <o> MSC BULK Endpoints wMaxPacketSize for High Speed +// <0x0008=> 8 bytes +// <0x0010=> 16 bytes +// <0x0020=> 32 bytes +// <0x0040=> 64 bytes +// <0x0080=> 128 bytes +// <0x0100=> 256 bytes +// <0x0200=> 512 bytes + +// <id> usb_composite_msc_bulk_maxpksz_hs +#ifndef CONF_USB_COMPOSITE_MSC_BULK_MAXPKSZ_HS +#define CONF_USB_COMPOSITE_MSC_BULK_MAXPKSZ_HS 0x200 +#endif + +// <o> MSC BULK IN Endpoint Address +// <0x81=> EndpointAddress = 0x81 +// <0x82=> EndpointAddress = 0x82 +// <0x83=> EndpointAddress = 0x83 +// <0x84=> EndpointAddress = 0x84 +// <0x85=> EndpointAddress = 0x85 +// <0x86=> EndpointAddress = 0x86 +// <0x87=> EndpointAddress = 0x87 +// <0x88=> EndpointAddress = 0x88 +// <0x89=> EndpointAddress = 0x89 + +// <id> usb_composite_msc_bulkin_epaddr +#ifndef CONF_USB_COMPOSITE_MSC_BULKIN_EPADDR +#define CONF_USB_COMPOSITE_MSC_BULKIN_EPADDR 0x86 +#endif + +// <o> MSC BULK OUT Endpoint Address +// <0x01=> EndpointAddress = 0x01 +// <0x02=> EndpointAddress = 0x02 +// <0x03=> EndpointAddress = 0x03 +// <0x04=> EndpointAddress = 0x04 +// <0x05=> EndpointAddress = 0x05 +// <0x06=> EndpointAddress = 0x06 +// <0x07=> EndpointAddress = 0x07 +// <0x08=> EndpointAddress = 0x08 +// <0x09=> EndpointAddress = 0x09 + +// <id> usb_composite_msc_bulkout_epaddr +#ifndef CONF_USB_COMPOSITE_MSC_BULKOUT_EPADDR +#define CONF_USB_COMPOSITE_MSC_BULKOUT_EPADDR 0x4 +#endif + +// <e> Enable Demo code for Disk LUN handling +// <id> usb_composite_msc_demo_en +#ifndef CONF_USB_COMPOSITE_MSC_LUN_DEMO +#define CONF_USB_COMPOSITE_MSC_LUN_DEMO 1 +#endif + +// <o> Disk access cache/buffer of sectors if non-RAM disk (e.g., SD/MMC) enabled <1-64> +// <id> conf_usb_msc_lun_buf_sectors +#ifndef CONF_USB_MSC_LUN_BUF_SECTORS +#define CONF_USB_MSC_LUN_BUF_SECTORS 4 +#endif + +// <e> Enable Demo for RAM Disk +// <id> conf_usb_msc_lun0_enable +#ifndef CONF_USB_MSC_LUN0_ENABLE +#define CONF_USB_MSC_LUN0_ENABLE 1 +#endif + +#ifndef CONF_USB_MSC_LUN0_TYPE +#define CONF_USB_MSC_LUN0_TYPE 0x00 +#endif + +// <q> The disk is removable +// <id> conf_usb_msc_lun0_rmb +#ifndef CONF_USB_MSC_LUN0_RMB +#define CONF_USB_MSC_LUN0_RMB 0x1 +#endif + +#ifndef CONF_USB_MSC_LUN0_ISO +#define CONF_USB_MSC_LUN0_ISO 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN0_ECMA +#define CONF_USB_MSC_LUN0_ECMA 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN0_ANSI +#define CONF_USB_MSC_LUN0_ANSI 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN0_REPO +#define CONF_USB_MSC_LUN0_REPO 0x01 +#endif + +#ifndef CONF_USB_MSC_LUN0_FACTORY +#define CONF_USB_MSC_LUN0_FACTORY 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN0_PRODUCT +#define CONF_USB_MSC_LUN0_PRODUCT 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN0_PRODUCT_VERSION +#define CONF_USB_MSC_LUN0_PRODUCT_VERSION 0x00, 0x00, 0x00, 0x00 +#endif + +// <o> Disk Size (in KB) <0x1-0xFFFFFFFF> +// <i> Windows will not show disk less than 20K, so 22K is used to reserve more RAM for APP +// <id> conf_usb_msc_lun0_capacity + +#ifndef CONF_USB_MSC_LUN0_CAPACITY +#define CONF_USB_MSC_LUN0_CAPACITY 22 +#endif + +#ifndef CONF_USB_MSC_LUN0_BLOCK_SIZE +#define CONF_USB_MSC_LUN0_BLOCK_SIZE 512 +#endif + +#ifndef CONF_USB_MSC_LUN0_LAST_BLOCK_ADDR +#define CONF_USB_MSC_LUN0_LAST_BLOCK_ADDR \ + ((uint32_t)CONF_USB_MSC_LUN0_CAPACITY * 1024 / CONF_USB_MSC_LUN0_BLOCK_SIZE - 1) +#endif + +// </e> + +// <e> Enable Demo for SD/MMC Disk +// <i> SD/MMC stack must be added before enable SD/MMC demo +// <i> SD/MMC insert/eject not supported by this simple demo +// <id> conf_usb_msc_lun1_enable +#ifndef CONF_USB_MSC_LUN1_ENABLE +#define CONF_USB_MSC_LUN1_ENABLE 0 +#endif + +#ifndef CONF_USB_MSC_LUN1_TYPE +#define CONF_USB_MSC_LUN1_TYPE 0x00 +#endif + +// <q> The disk is removable +// <i> SD/MMC stack must be added before enable SD/MMC demo +// <i> SD/MMC insert/eject not supported by this simple demo +// <id> conf_usb_msc_lun1_rmb +#ifndef CONF_USB_MSC_LUN1_RMB +#define CONF_USB_MSC_LUN1_RMB 0x1 +#endif + +#ifndef CONF_USB_MSC_LUN1_ISO +#define CONF_USB_MSC_LUN1_ISO 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN1_ECMA +#define CONF_USB_MSC_LUN1_ECMA 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN1_ANSI +#define CONF_USB_MSC_LUN1_ANSI 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN1_REPO +#define CONF_USB_MSC_LUN1_REPO 0x01 +#endif + +#ifndef CONF_USB_MSC_LUN1_FACTORY +#define CONF_USB_MSC_LUN1_FACTORY 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN1_PRODUCT +#define CONF_USB_MSC_LUN1_PRODUCT 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN1_PRODUCT_VERSION +#define CONF_USB_MSC_LUN1_PRODUCT_VERSION 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN1_CAPACITY +#define CONF_USB_MSC_LUN1_CAPACITY 22 +#endif + +#ifndef CONF_USB_MSC_LUN1_BLOCK_SIZE +#define CONF_USB_MSC_LUN1_BLOCK_SIZE 512 +#endif + +#ifndef CONF_USB_MSC_LUN1_LAST_BLOCK_ADDR +#define CONF_USB_MSC_LUN1_LAST_BLOCK_ADDR \ + ((uint32_t)CONF_USB_MSC_LUN1_CAPACITY * 1024 / CONF_USB_MSC_LUN1_BLOCK_SIZE - 1) +#endif + +// </e> + +// <e> Enable Demo for LUN 2 +// <id> conf_usb_msc_lun2_enable +#ifndef CONF_USB_MSC_LUN2_ENABLE +#define CONF_USB_MSC_LUN2_ENABLE 0 +#endif + +#ifndef CONF_USB_MSC_LUN2_TYPE +#define CONF_USB_MSC_LUN2_TYPE 0x00 +#endif + +// <q> The disk is removable +// <id> conf_usb_msc_lun2_rmb +#ifndef CONF_USB_MSC_LUN2_RMB +#define CONF_USB_MSC_LUN2_RMB 0x1 +#endif + +#ifndef CONF_USB_MSC_LUN2_ISO +#define CONF_USB_MSC_LUN2_ISO 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN2_ECMA +#define CONF_USB_MSC_LUN2_ECMA 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN2_ANSI +#define CONF_USB_MSC_LUN2_ANSI 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN2_REPO +#define CONF_USB_MSC_LUN2_REPO 0x01 +#endif + +#ifndef CONF_USB_MSC_LUN2_FACTORY +#define CONF_USB_MSC_LUN2_FACTORY 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN2_PRODUCT +#define CONF_USB_MSC_LUN2_PRODUCT 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN2_PRODUCT_VERSION +#define CONF_USB_MSC_LUN2_PRODUCT_VERSION 0x00, 0x00, 0x00, 0x00 +#endif + +// <o> Disk Size (in KB) <0x1-0xFFFFFFFF> +// <id> conf_usb_msc_lun2_capacity + +#ifndef CONF_USB_MSC_LUN2_CAPACITY +#define CONF_USB_MSC_LUN2_CAPACITY 22 +#endif + +#ifndef CONF_USB_MSC_LUN2_BLOCK_SIZE +#define CONF_USB_MSC_LUN2_BLOCK_SIZE 512 +#endif + +#ifndef CONF_USB_MSC_LUN2_LAST_BLOCK_ADDR +#define CONF_USB_MSC_LUN2_LAST_BLOCK_ADDR \ + ((uint32_t)CONF_USB_MSC_LUN2_CAPACITY * 1024 / CONF_USB_MSC_LUN2_BLOCK_SIZE - 1) +#endif + +// </e> + +// <e> Enable Demo for LUN 3 +// <id> conf_usb_msc_lun3_enable +#ifndef CONF_USB_MSC_LUN3_ENABLE +#define CONF_USB_MSC_LUN3_ENABLE 0 +#endif + +#ifndef CONF_USB_MSC_LUN3_TYPE +#define CONF_USB_MSC_LUN3_TYPE 0x00 +#endif + +// <q> The disk is removable +// <id> conf_usb_msc_lun3_rmb +#ifndef CONF_USB_MSC_LUN3_RMB +#define CONF_USB_MSC_LUN3_RMB 0x1 +#endif + +#ifndef CONF_USB_MSC_LUN3_ISO +#define CONF_USB_MSC_LUN3_ISO 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN3_ECMA +#define CONF_USB_MSC_LUN3_ECMA 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN3_ANSI +#define CONF_USB_MSC_LUN3_ANSI 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN3_REPO +#define CONF_USB_MSC_LUN3_REPO 0x01 +#endif + +#ifndef CONF_USB_MSC_LUN3_FACTORY +#define CONF_USB_MSC_LUN3_FACTORY 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN3_PRODUCT +#define CONF_USB_MSC_LUN3_PRODUCT 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +#endif + +#ifndef CONF_USB_MSC_LUN3_PRODUCT_VERSION +#define CONF_USB_MSC_LUN3_PRODUCT_VERSION 0x00, 0x00, 0x00, 0x00 +#endif + +// <o> Disk Size (in KB) <0x1-0xFFFFFFFF> +// <id> conf_usb_msc_lun3_capacity + +#ifndef CONF_USB_MSC_LUN3_CAPACITY +#define CONF_USB_MSC_LUN3_CAPACITY 22 +#endif + +#ifndef CONF_USB_MSC_LUN3_BLOCK_SIZE +#define CONF_USB_MSC_LUN3_BLOCK_SIZE 512 +#endif + +#ifndef CONF_USB_MSC_LUN3_LAST_BLOCK_ADDR +#define CONF_USB_MSC_LUN3_LAST_BLOCK_ADDR \ + ((uint32_t)CONF_USB_MSC_LUN3_CAPACITY * 1024 / CONF_USB_MSC_LUN3_BLOCK_SIZE - 1) +#endif + +// </e> + +// </e> +// </e> + +// <<< end of configuration section >>> + +#endif // USBD_CONFIG_H diff --git a/ports/atmel-samd/bindings/samd/Clock.c b/ports/atmel-samd/bindings/samd/Clock.c index 24e425e8c..e1022c52f 100644 --- a/ports/atmel-samd/bindings/samd/Clock.c +++ b/ports/atmel-samd/bindings/samd/Clock.c @@ -272,7 +272,7 @@ MP_DEFINE_CONST_DICT(samd_clock_globals, samd_clock_global_dict_table); #endif // SAMD21 -#ifdef SAMD51 +#ifdef SAM_D5X_E5X diff --git a/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk b/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk index dcc62fc9b..4b0377be2 100644 --- a/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk +++ b/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk @@ -3,8 +3,6 @@ USB_PID = 0x0101 USB_PRODUCT = "Commander" USB_MANUFACTURER = "8086 Consultancy" -USB_DEVICES= "CDC,MSC,HID" - CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 @@ -14,6 +12,7 @@ EXTERNAL_FLASH_DEVICES = "W25Q128JV_SQ" LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 +CIRCUITPY_USB_MIDI = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.mk b/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.mk index 5a47a5890..a36966b87 100644 --- a/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/bdmicro_vina_m0/mpconfigboard.mk @@ -12,7 +12,7 @@ EXTERNAL_FLASH_DEVICES = "MX25L51245G" LONGINT_IMPL = MPZ CIRCUITPY_BITBANGIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_VECTORIO = 0 CFLAGS_INLINE_LIMIT = 60 diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk index a71728e2d..da5f1ffac 100755 --- a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk @@ -13,5 +13,5 @@ LONGINT_IMPL = MPZ CIRCUITPY_BITBANGIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_VECTORIO = 0 diff --git a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk index cdbdf44f8..81391b953 100644 --- a/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitplayground_express/mpconfigboard.mk @@ -14,7 +14,7 @@ LONGINT_IMPL = MPZ # Make room for frozen libs. CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 SUPEROPT_GC = 0 CFLAGS_INLINE_LIMIT = 55 diff --git a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk index 46a245e60..7aa45eb39 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitplayground_express_crickit/mpconfigboard.mk @@ -15,7 +15,7 @@ LONGINT_IMPL = NONE CIRCUITPY_BITBANGIO = 0 CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_PIXELBUF = 1 CIRCUITPY_ROTARYIO = 0 CIRCUITPY_RTC = 0 diff --git a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk index 4220aa77f..863b97d31 100644 --- a/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitplayground_express_displayio/mpconfigboard.mk @@ -14,7 +14,7 @@ EXTERNAL_FLASH_DEVICES = "S25FL216K, GD25Q16C" LONGINT_IMPL = NONE CIRCUITPY_BITBANGIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_PIXELBUF = 0 CIRCUITPY_RTC = 0 # So not all of displayio, sorry! diff --git a/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.mk index 199cef362..cec87f2bf 100644 --- a/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.mk @@ -13,7 +13,7 @@ LONGINT_IMPL = MPZ CIRCUITPY_BITBANGIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_VECTORIO = 0 CFLAGS_INLINE_LIMIT = 60 diff --git a/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk index d5e03b49d..9e27ec7b4 100644 --- a/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_express_crickit/mpconfigboard.mk @@ -15,7 +15,7 @@ LONGINT_IMPL = MPZ CIRCUITPY_BITBANGIO = 0 CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_GAMEPAD = 0 CFLAGS_INLINE_LIMIT = 50 diff --git a/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.mk b/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.mk index a94dd3c4e..8bd4b818d 100644 --- a/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.mk +++ b/ports/atmel-samd/boards/feather_m0_supersized/mpconfigboard.mk @@ -13,7 +13,7 @@ LONGINT_IMPL = MPZ CIRCUITPY_BITBANGIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 # supersized, not ultra-supersized CIRCUITPY_VECTORIO = 0 diff --git a/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.mk index ab81ec5a2..08eb5c98b 100644 --- a/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.mk @@ -10,3 +10,5 @@ QSPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 2 EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, GD25Q64C" LONGINT_IMPL = MPZ + +CIRCUITPY_SDIOIO = 1 diff --git a/ports/atmel-samd/boards/grandcentral_m4_express/pins.c b/ports/atmel-samd/boards/grandcentral_m4_express/pins.c index 6b09c62bf..b125aca08 100644 --- a/ports/atmel-samd/boards/grandcentral_m4_express/pins.c +++ b/ports/atmel-samd/boards/grandcentral_m4_express/pins.c @@ -1,5 +1,18 @@ +#include "py/objtuple.h" #include "shared-bindings/board/__init__.h" +STATIC const mp_rom_obj_tuple_t sdio_data_tuple = { + {&mp_type_tuple}, + 4, + { + MP_ROM_PTR(&pin_PB18), + MP_ROM_PTR(&pin_PB19), + MP_ROM_PTR(&pin_PB20), + MP_ROM_PTR(&pin_PB21), + } +}; + + // This mapping only includes functional names because pins broken // out on connectors are labeled with their MCU name available from // microcontroller.pin. @@ -129,5 +142,9 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_SDIO_CLOCK), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_SDIO_COMMAND), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_SDIO_DATA), MP_ROM_PTR(&sdio_data_tuple) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk index a8390fd97..15c5ad817 100644 --- a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk @@ -16,7 +16,7 @@ CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_BITBANGIO = 0 CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_GAMEPAD = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_ROTARYIO = 0 CIRCUITPY_RTC = 0 CIRCUITPY_COUNTIO = 0 diff --git a/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.mk index 812c208cc..09420ed3d 100644 --- a/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/itsybitsy_m0_express/mpconfigboard.mk @@ -15,7 +15,7 @@ CIRCUITPY_BITBANG_APA102 = 1 CIRCUITPY_BITBANGIO = 0 CIRCUITPY_GAMEPAD = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_RTC = 0 # too itsy bitsy for all of displayio CIRCUITPY_VECTORIO = 0 diff --git a/ports/atmel-samd/boards/loc_ber_m4_base_board/board.c b/ports/atmel-samd/boards/loc_ber_m4_base_board/board.c new file mode 100644 index 000000000..0f60736a2 --- /dev/null +++ b/ports/atmel-samd/boards/loc_ber_m4_base_board/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/loc_ber_m4_base_board/mpconfigboard.h b/ports/atmel-samd/boards/loc_ber_m4_base_board/mpconfigboard.h new file mode 100644 index 000000000..cbc7b25c1 --- /dev/null +++ b/ports/atmel-samd/boards/loc_ber_m4_base_board/mpconfigboard.h @@ -0,0 +1,32 @@ +#define MICROPY_HW_BOARD_NAME "LoC BeR M4 base board" +#define MICROPY_HW_MCU_NAME "samd51g19" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// This is for Rev B +#define MICROPY_HW_LED_STATUS (&pin_PA22) + +#define MICROPY_HW_APA102_MOSI (&pin_PB03) +#define MICROPY_HW_APA102_SCK (&pin_PB02) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// DotStar pins, QSPI CS, and QSPI SCK +#define MICROPY_PORT_B (PORT_PB02 | PORT_PB03 | PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define DEFAULT_I2C_BUS_SCL (&pin_PA13) +#define DEFAULT_I2C_BUS_SDA (&pin_PA12) + +#define DEFAULT_SPI_BUS_SCK (&pin_PA01) +#define DEFAULT_SPI_BUS_MOSI (&pin_PA00) +#define DEFAULT_SPI_BUS_MISO (&pin_PB23) + +#define DEFAULT_UART_BUS_RX (&pin_PA16) +#define DEFAULT_UART_BUS_TX (&pin_PA17) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/loc_ber_m4_base_board/mpconfigboard.mk b/ports/atmel-samd/boards/loc_ber_m4_base_board/mpconfigboard.mk new file mode 100644 index 000000000..55d6fa78e --- /dev/null +++ b/ports/atmel-samd/boards/loc_ber_m4_base_board/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x239A +USB_PID = 0x80B8 +USB_PRODUCT = "LoC BeR M4 base board" +USB_MANUFACTURER = "Zoomax" + +CHIP_VARIANT = SAMD51G19A +CHIP_FAMILY = samd51 + +INTERNAL_FLASH_FILESYSTEM = 1 +CIRCUITPY_FULL_BUILD = 0 + +LONGINT_IMPL = MPZ + +# No I2S on SAMD51G +CIRCUITPY_AUDIOBUSIO = 0 + +CIRCUITPY_BITBANG_APA102 = 1 diff --git a/ports/atmel-samd/boards/loc_ber_m4_base_board/pins.c b/ports/atmel-samd/boards/loc_ber_m4_base_board/pins.c new file mode 100644 index 000000000..6d0f34c7d --- /dev/null +++ b/ports/atmel-samd/boards/loc_ber_m4_base_board/pins.c @@ -0,0 +1,49 @@ +#include "shared-bindings/board/__init__.h" + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA06) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA22) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA13) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PA01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PA00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB23) }, + + { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_SCK_2), MP_ROM_PTR(&pin_PB10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI_2), MP_ROM_PTR(&pin_PA08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MISO_2), MP_ROM_PTR(&pin_PA09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CS_2), MP_ROM_PTR(&pin_PB11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_WP_2), MP_ROM_PTR(&pin_PA10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_HOLD_2), MP_ROM_PTR(&pin_PA11) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.mk index 588e50ee1..e3948565d 100644 --- a/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.mk @@ -12,7 +12,7 @@ EXTERNAL_FLASH_DEVICES = "S25FL216K, GD25Q16C" LONGINT_IMPL = MPZ CIRCUITPY_BITBANGIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_VECTORIO = 0 CFLAGS_INLINE_LIMIT = 60 diff --git a/ports/atmel-samd/boards/pewpew10/mpconfigboard.h b/ports/atmel-samd/boards/pewpew10/mpconfigboard.h index 6b3b4aa15..2cb097e8d 100644 --- a/ports/atmel-samd/boards/pewpew10/mpconfigboard.h +++ b/ports/atmel-samd/boards/pewpew10/mpconfigboard.h @@ -43,3 +43,5 @@ #define DEFAULT_UART_BUS_RX (&pin_PA01) #define DEFAULT_UART_BUS_TX (&pin_PA00) + +#define SAMD21_BOD33_LEVEL (6) diff --git a/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.h b/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.h index 60cd8d754..4b88c89f2 100644 --- a/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.h +++ b/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.h @@ -40,3 +40,5 @@ #define IGNORE_PIN_PB09 1 #define IGNORE_PIN_PB10 1 #define IGNORE_PIN_PB11 1 + +#define SAMD5x_E5x_BOD33_LEVEL (100) diff --git a/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk b/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk index 87f92ae9e..b6490433e 100644 --- a/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pewpew_m4/mpconfigboard.mk @@ -16,7 +16,7 @@ CIRCUITPY_ANALOGIO = 0 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_BITBANGIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_NEOPIXEL_WRITE = 0 CIRCUITPY_NETWORK = 0 CIRCUITPY_PIXELBUF = 0 @@ -46,8 +46,6 @@ CIRCUITPY_MATH = 1 FROZEN_MPY_DIRS += $(TOP)/frozen/circuitpython-stage/pewpew_m4 CIRCUITPY_DISPLAY_FONT = $(TOP)/ports/atmel-samd/boards/ugame10/brutalist-6.bdf -USB_DEVICES = "CDC,MSC" - # Tweak inlining depending on language. ifeq ($(TRANSLATION), zh_Latn_pinyin) CFLAGS_INLINE_LIMIT = 45 diff --git a/ports/atmel-samd/boards/same54_xplained/board.c b/ports/atmel-samd/boards/same54_xplained/board.c new file mode 100644 index 000000000..7599f02b8 --- /dev/null +++ b/ports/atmel-samd/boards/same54_xplained/board.c @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/same54_xplained/mpconfigboard.h b/ports/atmel-samd/boards/same54_xplained/mpconfigboard.h new file mode 100644 index 000000000..934559a2a --- /dev/null +++ b/ports/atmel-samd/boards/same54_xplained/mpconfigboard.h @@ -0,0 +1,33 @@ +#define MICROPY_HW_BOARD_NAME "SAM E54 Xplained Pro" +#define MICROPY_HW_MCU_NAME "same54p20" + +#define CIRCUITPY_MCU_FAMILY samd51 + +// This is for Rev B which is green and has the SD card slot at the edge of the board. + +#define MICROPY_HW_LED_STATUS (&pin_PC18) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 ) +// QSPI CS, and QSPI SCK +#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 ) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PD09) +#define DEFAULT_I2C_BUS_SDA (&pin_PD08) + +#define DEFAULT_SPI_BUS_SCK (&pin_PC05) +#define DEFAULT_SPI_BUS_MOSI (&pin_PC04) +#define DEFAULT_SPI_BUS_MISO (&pin_PC07) + +#define DEFAULT_UART_BUS_RX (&pin_PB17) +#define DEFAULT_UART_BUS_TX (&pin_PB16) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 +#define IGNORE_PIN_PC19 1 diff --git a/ports/atmel-samd/boards/same54_xplained/mpconfigboard.mk b/ports/atmel-samd/boards/same54_xplained/mpconfigboard.mk new file mode 100644 index 000000000..7ac126514 --- /dev/null +++ b/ports/atmel-samd/boards/same54_xplained/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x239A +USB_PID = 0x80B6 +USB_PRODUCT = "SAM E54 Xplained Pro" +USB_MANUFACTURER = "Microchip" + +CHIP_VARIANT = SAME54P20A +CHIP_FAMILY = same54 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 2 +EXTERNAL_FLASH_DEVICES = "N25Q256A" +LONGINT_IMPL = MPZ + +CIRCUITPY_SDIOIO = 1 diff --git a/ports/atmel-samd/boards/same54_xplained/pins.c b/ports/atmel-samd/boards/same54_xplained/pins.c new file mode 100644 index 000000000..8a864ab97 --- /dev/null +++ b/ports/atmel-samd/boards/same54_xplained/pins.c @@ -0,0 +1,116 @@ +#include "py/objtuple.h" +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_obj_tuple_t sdio_data_tuple = { + {&mp_type_tuple}, + 4, + { + MP_ROM_PTR(&pin_PB18), + MP_ROM_PTR(&pin_PB19), + MP_ROM_PTR(&pin_PB20), + MP_ROM_PTR(&pin_PB21), + } +}; + + +// This mapping only includes functional names because pins broken +// out on connectors are labeled with their MCU name available from +// microcontroller.pin. +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PD08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PD09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_VSYNC), MP_ROM_PTR(&pin_PA12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_HSYNC), MP_ROM_PTR(&pin_PA13) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PCLK), MP_ROM_PTR(&pin_PA14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_XCLK), MP_ROM_PTR(&pin_PA15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D07), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D06), MP_ROM_PTR(&pin_PA22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D05), MP_ROM_PTR(&pin_PA21) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D04), MP_ROM_PTR(&pin_PA20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D03), MP_ROM_PTR(&pin_PA19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D02), MP_ROM_PTR(&pin_PA18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D01), MP_ROM_PTR(&pin_PA17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D00), MP_ROM_PTR(&pin_PA16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D09), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_D08), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_RST), MP_ROM_PTR(&pin_PC12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PWDN), MP_ROM_PTR(&pin_PC11) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_PDEC_A), MP_ROM_PTR(&pin_PC16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PDEC_B), MP_ROM_PTR(&pin_PC17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PDEC_C), MP_ROM_PTR(&pin_PC18) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_ADCDAC), MP_ROM_PTR(&pin_PA02) }, + + + { MP_OBJ_NEW_QSTR(MP_QSTR_SW0), MP_ROM_PTR(&pin_PB31) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PC18) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_QT), MP_ROM_PTR(&pin_PA16) }, + + { MP_OBJ_NEW_QSTR(MP_QSTR_CANRX), MP_ROM_PTR(&pin_PB12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_CANTX), MP_ROM_PTR(&pin_PB13) }, + + // EXT1 header + { MP_OBJ_NEW_QSTR(MP_QSTR_PB04), MP_ROM_PTR(&pin_PB04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB05), MP_ROM_PTR(&pin_PB05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA06), MP_ROM_PTR(&pin_PA06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA07), MP_ROM_PTR(&pin_PA07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA27), MP_ROM_PTR(&pin_PA27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC22), MP_ROM_PTR(&pin_PC22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA23), MP_ROM_PTR(&pin_PA23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA05), MP_ROM_PTR(&pin_PA05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA04), MP_ROM_PTR(&pin_PA04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB28), MP_ROM_PTR(&pin_PB28) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB27), MP_ROM_PTR(&pin_PB27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB29), MP_ROM_PTR(&pin_PB29) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB26), MP_ROM_PTR(&pin_PB26) }, + + // EXT2 header + { MP_OBJ_NEW_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PA03), MP_ROM_PTR(&pin_PA03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB06), MP_ROM_PTR(&pin_PB06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_PD00) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB17), MP_ROM_PTR(&pin_PB17) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PB16), MP_ROM_PTR(&pin_PB16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC06), MP_ROM_PTR(&pin_PC06) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, + + // EXT3 header + { MP_OBJ_NEW_QSTR(MP_QSTR_PC02), MP_ROM_PTR(&pin_PC02) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC03), MP_ROM_PTR(&pin_PC03) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC01), MP_ROM_PTR(&pin_PC01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PD11), MP_ROM_PTR(&pin_PD11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PD10), MP_ROM_PTR(&pin_PD10) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC31), MP_ROM_PTR(&pin_PC31) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC30), MP_ROM_PTR(&pin_PC30) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC22), MP_ROM_PTR(&pin_PC22) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC23), MP_ROM_PTR(&pin_PC23) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC04), MP_ROM_PTR(&pin_PC04) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC14), MP_ROM_PTR(&pin_PC14) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC05), MP_ROM_PTR(&pin_PC05) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_PC07), MP_ROM_PTR(&pin_PC07) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + + { MP_ROM_QSTR(MP_QSTR_SDIO_CLOCK), MP_ROM_PTR(&pin_PA21) }, + { MP_ROM_QSTR(MP_QSTR_SDIO_COMMAND), MP_ROM_PTR(&pin_PA20) }, + { MP_ROM_QSTR(MP_QSTR_SDIO_DATA), MP_ROM_PTR(&sdio_data_tuple) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/seeeduino_wio_terminal/board.c b/ports/atmel-samd/boards/seeeduino_wio_terminal/board.c new file mode 100644 index 000000000..b7fc736eb --- /dev/null +++ b/ports/atmel-samd/boards/seeeduino_wio_terminal/board.c @@ -0,0 +1,116 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "hal/include/hal_gpio.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/displayio/FourWire.h" +#include "shared-module/displayio/__init__.h" +#include "shared-module/displayio/mipi_constants.h" + +displayio_fourwire_obj_t board_display_obj; + +uint8_t display_init_sequence[] = { + 0x01, 0x80, 0x80, // Software reset then delay 0x80 (128ms) + 0xEF, 0x03, 0x03, 0x80, 0x02, + 0xCF, 0x03, 0x00, 0xC1, 0x30, + 0xED, 0x04, 0x64, 0x03, 0x12, 0x81, + 0xE8, 0x03, 0x85, 0x00, 0x78, + 0xCB, 0x05, 0x39, 0x2C, 0x00, 0x34, 0x02, + 0xF7, 0x01, 0x20, + 0xEA, 0x02, 0x00, 0x00, + 0xc0, 0x01, 0x23, // Power control VRH[5:0] + 0xc1, 0x01, 0x10, // Power control SAP[2:0];BT[3:0] + 0xc5, 0x02, 0x3e, 0x28, // VCM control + 0xc7, 0x01, 0x86, // VCM control2 + 0x36, 0x01, 0x38, // Memory Access Control + 0x37, 0x01, 0x00, // Vertical scroll zero + 0x3a, 0x01, 0x55, // COLMOD: Pixel Format Set + 0xb1, 0x02, 0x00, 0x18, // Frame Rate Control (In Normal Mode/Full Colors) + 0xb6, 0x03, 0x08, 0x82, 0x27, // Display Function Control + 0xF2, 0x01, 0x00, // 3Gamma Function Disable + 0x26, 0x01, 0x01, // Gamma curve selected + 0xe0, 0x0f, 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, 0x4E, 0xF1, 0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00, // Set Gamma + 0xe1, 0x0f, 0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, 0x31, 0xC1, 0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F, // Set Gamma + 0x11, 0x80, 0x78, // Exit Sleep then delay 0x78 (120ms) + 0x29, 0x80, 0x78, // Display on then delay 0x78 (120ms) +}; + +void board_init(void) { + busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; + common_hal_busio_spi_construct(spi, &pin_PB20, &pin_PB19, NULL); + common_hal_busio_spi_never_reset(spi); + + displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; + bus->base.type = &displayio_fourwire_type; + common_hal_displayio_fourwire_construct(bus, + spi, + &pin_PC06, // TFT_DC Command or data + &pin_PB21, // TFT_CS Chip select + &pin_PC07, // TFT_RST Reset + 60000000, // Baudrate + 0, // Polarity + 0); // Phase + + displayio_display_obj_t* display = &displays[0].display; + display->base.type = &displayio_display_type; + common_hal_displayio_display_construct(display, + bus, + 320, // Width + 240, // Height + 0, // column start + 0, // row start + 180, // rotation + 16, // Color depth + false, // Grayscale + false, // pixels in a byte share a row. Only valid for depths < 8 + 1, // bytes per cell. Only valid for depths < 8 + false, // reverse_pixels_in_byte. Only valid for depths < 8 + true, // reverse_pixels_in_word + MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command + MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command + MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command + 0x37, // set vertical scroll command + display_init_sequence, + sizeof(display_init_sequence), + &pin_PC05, // backlight pin + NO_BRIGHTNESS_COMMAND, + 1.0f, // brightness (ignored) + true, // auto_brightness + false, // single_byte_bounds + false, // data_as_commands + true, // auto_refresh + 60, // native_frames_per_second + true); // backlight_on_high +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { +} diff --git a/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.h b/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.h new file mode 100644 index 000000000..f7d0448df --- /dev/null +++ b/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.h @@ -0,0 +1,32 @@ +#define MICROPY_HW_BOARD_NAME "Seeeduino Wio Terminal" +#define MICROPY_HW_MCU_NAME "samd51p19" + +// Rev E + +#define MICROPY_HW_LED_STATUS (&pin_PA15) + +// These are pins not to reset. +// QSPI Data pins +#define MICROPY_PORT_A (PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11) +// QSPI CS, QSPI SCK and NeoPixel pin +#define MICROPY_PORT_B (PORT_PB03 | PORT_PB10 | PORT_PB11) +#define MICROPY_PORT_C (0) +#define MICROPY_PORT_D (0) + +#define EXTERNAL_FLASH_QSPI_DUAL + +#define BOARD_HAS_CRYSTAL 1 + +#define DEFAULT_I2C_BUS_SCL (&pin_PA16) +#define DEFAULT_I2C_BUS_SDA (&pin_PA17) + +#define DEFAULT_SPI_BUS_SCK (&pin_PB03) +#define DEFAULT_SPI_BUS_MOSI (&pin_PB02) +#define DEFAULT_SPI_BUS_MISO (&pin_PB00) + +#define DEFAULT_UART_BUS_RX (&pin_PB27) +#define DEFAULT_UART_BUS_TX (&pin_PB26) + +// USB is always used internally so skip the pin objects for it. +#define IGNORE_PIN_PA24 1 +#define IGNORE_PIN_PA25 1 diff --git a/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.mk b/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.mk new file mode 100644 index 000000000..f57e016b4 --- /dev/null +++ b/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.mk @@ -0,0 +1,14 @@ +USB_VID = 0x2886 +USB_PID = 0x802d +USB_PRODUCT = "Seeeduino Wio Terminal" +USB_MANUFACTURER = "Seeed" + +CHIP_VARIANT = SAMD51P19A +CHIP_FAMILY = samd51 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q32JV_IQ" +LONGINT_IMPL = MPZ + +CIRCUITPY_VECTORIO = 1 diff --git a/ports/atmel-samd/boards/seeeduino_wio_terminal/pins.c b/ports/atmel-samd/boards/seeeduino_wio_terminal/pins.c new file mode 100644 index 000000000..254d730a8 --- /dev/null +++ b/ports/atmel-samd/boards/seeeduino_wio_terminal/pins.c @@ -0,0 +1,90 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + + // Analog pins + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA06) }, + + // Digital pins + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PB08) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PB09) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PA07) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PB04) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PB05) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PB06) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PA04) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_PB07) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_PA06) }, + + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PA17) }, // MP_QSTR_SDA + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PA16) }, //MP_QSTR_SCL + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PA15) }, // MP_QSTR_LED + + // UART pins + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB26) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB27) }, + + // SPI pins + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB02) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB03) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB00) }, + { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_PB01) }, + + // I2C pins + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PA16) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PA17) }, + + // LED pins + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PA15) }, // status + + // LCD Display + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_MISO), MP_ROM_PTR(&pin_PB18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_MOSI), MP_ROM_PTR(&pin_PB19) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_PB20) }, + { MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PB21) }, + { MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PC06) }, + { MP_ROM_QSTR(MP_QSTR_TFT_BACKLIGHT), MP_ROM_PTR(&pin_PC05) }, + { MP_ROM_QSTR(MP_QSTR_TFT_RESET), MP_ROM_PTR(&pin_PC07) }, + + // SD Card + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_MISO), MP_ROM_PTR(&pin_PC18) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_MOSI), MP_ROM_PTR(&pin_PC16) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SD_SCK), MP_ROM_PTR(&pin_PC17) }, + { MP_ROM_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_PC19) }, + { MP_ROM_QSTR(MP_QSTR_SD_DET), MP_ROM_PTR(&pin_PC21) }, + + // Switch + { MP_OBJ_NEW_QSTR(MP_QSTR_SWITCH_UP), MP_ROM_PTR(&pin_PD20) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SWITCH_LEFT), MP_ROM_PTR(&pin_PD12) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SWITCH_RIGHT), MP_ROM_PTR(&pin_PD09) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SWITCH_DOWN), MP_ROM_PTR(&pin_PD08) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_SWITCH_PRESS), MP_ROM_PTR(&pin_PD10) }, + + // Button + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_1), MP_ROM_PTR(&pin_PC26) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_2), MP_ROM_PTR(&pin_PC27) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUTTON_3), MP_ROM_PTR(&pin_PC28) }, + + // Special named pins + { MP_OBJ_NEW_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PD01) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_BUZZER), MP_ROM_PTR(&pin_PD11) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IR), MP_ROM_PTR(&pin_PB31) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_MIC), MP_ROM_PTR(&pin_PC30) }, + { MP_ROM_QSTR(MP_QSTR_GYROSCOPE_SCL), MP_ROM_PTR(&pin_PA12) }, + { MP_ROM_QSTR(MP_QSTR_GYROSCOPE_SDA), MP_ROM_PTR(&pin_PA13) }, + { MP_ROM_QSTR(MP_QSTR_GYROSCOPE_INT), MP_ROM_PTR(&pin_PC21) }, + + // Comm objects + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/atmel-samd/boards/shirtty/mpconfigboard.mk b/ports/atmel-samd/boards/shirtty/mpconfigboard.mk index 295ba4bce..a04e09769 100644 --- a/ports/atmel-samd/boards/shirtty/mpconfigboard.mk +++ b/ports/atmel-samd/boards/shirtty/mpconfigboard.mk @@ -9,7 +9,7 @@ CHIP_FAMILY = samd21 INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 -CIRCUITPY_I2CSLAVE = 1 +CIRCUITPY_I2CPERIPHERAL = 1 CIRCUITPY_TOUCHIO = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/snekboard/mpconfigboard.mk b/ports/atmel-samd/boards/snekboard/mpconfigboard.mk index 08f8d431e..eae50d70b 100644 --- a/ports/atmel-samd/boards/snekboard/mpconfigboard.mk +++ b/ports/atmel-samd/boards/snekboard/mpconfigboard.mk @@ -13,7 +13,7 @@ LONGINT_IMPL = MPZ CIRCUITPY_BITBANGIO = 0 CIRCUITPY_GAMEPAD = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_VECTORIO = 0 CFLAGS_INLINE_LIMIT = 60 diff --git a/ports/atmel-samd/boards/sparkfun_redboard_turbo/mpconfigboard.mk b/ports/atmel-samd/boards/sparkfun_redboard_turbo/mpconfigboard.mk index 7a9b44e4c..c17600fc7 100755 --- a/ports/atmel-samd/boards/sparkfun_redboard_turbo/mpconfigboard.mk +++ b/ports/atmel-samd/boards/sparkfun_redboard_turbo/mpconfigboard.mk @@ -12,7 +12,7 @@ EXTERNAL_FLASH_DEVICES = "W25Q32FV" LONGINT_IMPL = MPZ CIRCUITPY_BITBANGIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_VECTORIO = 0 CFLAGS_INLINE_LIMIT = 60 diff --git a/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/mpconfigboard.h b/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/mpconfigboard.h index a5dee295b..97a4465a1 100644 --- a/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/mpconfigboard.h +++ b/ports/atmel-samd/boards/sparkfun_samd51_thing_plus/mpconfigboard.h @@ -18,8 +18,8 @@ #define BOARD_HAS_CRYSTAL 1 -#define DEFAULT_I2C_BUS_SCL (&pin_PA22) -#define DEFAULT_I2C_BUS_SDA (&pin_PA23) +#define DEFAULT_I2C_BUS_SCL (&pin_PA23) +#define DEFAULT_I2C_BUS_SDA (&pin_PA22) #define DEFAULT_SPI_BUS_SCK (&pin_PB13) #define DEFAULT_SPI_BUS_MOSI (&pin_PB12) diff --git a/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.mk index c4b1f6d5a..6f3febfe5 100644 --- a/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/stringcar_m0_express/mpconfigboard.mk @@ -16,7 +16,7 @@ CIRCUITPY_BITBANG_APA102 = 1 CIRCUITPY_BITBANGIO = 0 CIRCUITPY_GAMEPAD = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_RTC = 0 CIRCUITPY_VECTORIO = 0 diff --git a/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk b/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk index 46f727131..9e0621810 100644 --- a/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk +++ b/ports/atmel-samd/boards/trinket_m0_haxpress/mpconfigboard.mk @@ -15,6 +15,6 @@ CIRCUITPY_BITBANGIO = 0 CIRCUITPY_COUNTIO = 0 CIRCUITPY_RTC = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 SUPEROPT_GC = 0 diff --git a/ports/atmel-samd/boards/ugame10/mpconfigboard.mk b/ports/atmel-samd/boards/ugame10/mpconfigboard.mk index 1c4336907..d641a89eb 100644 --- a/ports/atmel-samd/boards/ugame10/mpconfigboard.mk +++ b/ports/atmel-samd/boards/ugame10/mpconfigboard.mk @@ -21,7 +21,7 @@ CIRCUITPY_DISPLAYIO = 1 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_BITBANGIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_NEOPIXEL_WRITE = 0 CIRCUITPY_PIXELBUF = 0 CIRCUITPY_RTC = 0 diff --git a/ports/atmel-samd/boards/winterbloom_big_honking_button/mpconfigboard.mk b/ports/atmel-samd/boards/winterbloom_big_honking_button/mpconfigboard.mk index 466e34591..e06a2af7e 100644 --- a/ports/atmel-samd/boards/winterbloom_big_honking_button/mpconfigboard.mk +++ b/ports/atmel-samd/boards/winterbloom_big_honking_button/mpconfigboard.mk @@ -4,7 +4,6 @@ USB_VID = 0x239A USB_PID = 0x6005 USB_PRODUCT = "Big Honking Button" USB_MANUFACTURER = "Winterbloom" -USB_DEVICES = "CDC,MSC" CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 @@ -20,15 +19,15 @@ CIRCUITPY_AUDIOIO = 1 CIRCUITPY_BITBANGIO = 0 CIRCUITPY_FRAMEBUFFERIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_BLEIO = 0 CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_GAMEPAD = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_NETWORK = 0 CIRCUITPY_TOUCHIO = 0 CIRCUITPY_RGBMATRIX = 0 CIRCUITPY_PS2IO = 0 CIRCUITPY_USB_HID = 0 +CIRCUITPY_USB_MIDI = 0 CIRCUITPY_RTC = 0 diff --git a/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk index 6a78a4ff9..11592073f 100644 --- a/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk +++ b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk @@ -6,7 +6,6 @@ USB_PID = 0x8062 USB_PRODUCT = "Sol" USB_MANUFACTURER = "Winterbloom" USB_INTERFACE_NAME = "Sol" -USB_DEVICES = "CDC,MSC,AUDIO" CHIP_VARIANT = SAMD51J20A CHIP_FAMILY = samd51 @@ -23,7 +22,7 @@ CIRCUITPY_BLEIO = 0 CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_FRAMEBUFFERIO = 0 CIRCUITPY_GAMEPAD = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_NETWORK = 0 CIRCUITPY_TOUCHIO = 0 CIRCUITPY_RGBMATRIX = 0 diff --git a/shared-module/_pew/PewPew.c b/ports/atmel-samd/common-hal/_pew/PewPew.c index 568dc6425..cfdfe75d8 100644 --- a/shared-module/_pew/PewPew.c +++ b/ports/atmel-samd/common-hal/_pew/PewPew.c @@ -88,7 +88,7 @@ void pew_init() { #ifdef SAMD21 turn_on_clocks(true, index, 0); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X turn_on_clocks(true, index, 1); #endif @@ -98,7 +98,7 @@ void pew_init() { TC_CTRLA_PRESCALER_DIV64 | TC_CTRLA_WAVEGEN_MFRQ; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X tc_reset(tc); tc_set_enable(tc, false); tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 diff --git a/shared-module/_pew/PewPew.h b/ports/atmel-samd/common-hal/_pew/PewPew.h index da1cae0a2..da1cae0a2 100644 --- a/shared-module/_pew/PewPew.h +++ b/ports/atmel-samd/common-hal/_pew/PewPew.h diff --git a/shared-module/_pew/__init__.c b/ports/atmel-samd/common-hal/_pew/__init__.c index f3b23c606..f3b23c606 100644 --- a/shared-module/_pew/__init__.c +++ b/ports/atmel-samd/common-hal/_pew/__init__.c diff --git a/shared-module/_pew/__init__.h b/ports/atmel-samd/common-hal/_pew/__init__.h index 4f953c610..4f953c610 100644 --- a/shared-module/_pew/__init__.h +++ b/ports/atmel-samd/common-hal/_pew/__init__.h diff --git a/ports/atmel-samd/common-hal/analogio/AnalogOut.c b/ports/atmel-samd/common-hal/analogio/AnalogOut.c index 9ac1f7bd1..e69a24071 100644 --- a/ports/atmel-samd/common-hal/analogio/AnalogOut.c +++ b/ports/atmel-samd/common-hal/analogio/AnalogOut.c @@ -50,7 +50,7 @@ void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, mp_raise_NotImplementedError(translate("No DAC on chip")); #else if (pin->number != PIN_PA02 - #ifdef SAMD51 + #ifdef SAM_D5X_E5X && pin->number != PIN_PA05 #endif ) { @@ -59,13 +59,13 @@ void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, } self->channel = 0; - #ifdef SAMD51 + #ifdef SAM_D5X_E5X if (pin->number == PIN_PA05) { self->channel = 1; } #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X hri_mclk_set_APBDMASK_DAC_bit(MCLK); #endif @@ -80,16 +80,16 @@ void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self, // Don't double init the DAC on the SAMD51 when both outputs are in use. We use the free state // of each output pin to determine DAC state. int32_t result = ERR_NONE; - #ifdef SAMD51 + #ifdef SAM_D5X_E5X if (!common_hal_mcu_pin_is_free(&pin_PA02) || !common_hal_mcu_pin_is_free(&pin_PA05)) { #endif // Fake the descriptor if the DAC is already initialized. self->descriptor.device.hw = DAC; - #ifdef SAMD51 + #ifdef SAM_D5X_E5X } else { #endif result = dac_sync_init(&self->descriptor, DAC); - #ifdef SAMD51 + #ifdef SAM_D5X_E5X } #endif if (result != ERR_NONE) { @@ -109,18 +109,18 @@ bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { } void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { - #if (defined(SAMD21) && defined(PIN_PA02)) || defined(SAMD51) + #if (defined(SAMD21) && defined(PIN_PA02)) || defined(SAM_D5X_E5X) if (common_hal_analogio_analogout_deinited(self)) { return; } dac_sync_disable_channel(&self->descriptor, self->channel); reset_pin_number(PIN_PA02); // Only deinit the DAC on the SAMD51 if both outputs are free. - #ifdef SAMD51 + #ifdef SAM_D5X_E5X if (common_hal_mcu_pin_is_free(&pin_PA02) && common_hal_mcu_pin_is_free(&pin_PA05)) { #endif dac_sync_deinit(&self->descriptor); - #ifdef SAMD51 + #ifdef SAM_D5X_E5X } #endif self->deinited = true; @@ -147,7 +147,7 @@ void analogout_reset(void) { #ifdef SAMD21 while (DAC->STATUS.reg & DAC_STATUS_SYNCBUSY) {} #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X while (DAC->SYNCBUSY.reg & DAC_SYNCBUSY_SWRST) {} #endif DAC->CTRLA.reg |= DAC_CTRLA_SWRST; diff --git a/ports/atmel-samd/common-hal/audiobusio/I2SOut.c b/ports/atmel-samd/common-hal/audiobusio/I2SOut.c index 8f827e7fb..20fa624ed 100644 --- a/ports/atmel-samd/common-hal/audiobusio/I2SOut.c +++ b/ports/atmel-samd/common-hal/audiobusio/I2SOut.c @@ -59,13 +59,13 @@ #define SERCTRL(name) I2S_SERCTRL_ ## name #endif -#ifdef SAMD51 +#ifdef SAM_D5X_E5X #define SERCTRL(name) I2S_TXCTRL_ ## name #endif void i2sout_reset(void) { // Make sure the I2S peripheral is running so we can see if the resources we need are free. - #ifdef SAMD51 + #ifdef SAM_D5X_E5X // Connect the clock units to the 2mhz clock. It can't disable without it. connect_gclk_to_peripheral(5, I2S_GCLK_ID_0); connect_gclk_to_peripheral(5, I2S_GCLK_ID_1); @@ -76,7 +76,7 @@ void i2sout_reset(void) { } // Make sure the I2S peripheral is running so we can see if the resources we need are free. - #ifdef SAMD51 + #ifdef SAM_D5X_E5X // Connect the clock units to the 2mhz clock by default. They can't reset without it. disconnect_gclk_from_peripheral(5, I2S_GCLK_ID_0); disconnect_gclk_from_peripheral(5, I2S_GCLK_ID_1); @@ -132,7 +132,7 @@ void common_hal_audiobusio_i2sout_construct(audiobusio_i2sout_obj_t* self, serializer = 1; } #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X // Only clock unit 0 can be used for transmission. if (bit_clock == &pin_PA10 || bit_clock == &pin_PB16) { // I2S SCK[0] bc_clock_unit = 0; @@ -170,14 +170,14 @@ void common_hal_audiobusio_i2sout_construct(audiobusio_i2sout_obj_t* self, mp_raise_RuntimeError(translate("Serializer in use")); } #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X if (I2S->CTRLA.bit.TXEN == 1) { mp_raise_RuntimeError(translate("Serializer in use")); } #endif } - #ifdef SAMD51 + #ifdef SAM_D5X_E5X #define GPIO_I2S_FUNCTION GPIO_PIN_FUNCTION_J #endif #ifdef SAMD21 @@ -254,7 +254,7 @@ void common_hal_audiobusio_i2sout_play(audiobusio_i2sout_obj_t* self, #ifdef SAMD21 uint32_t serctrl = (self->clock_unit << I2S_SERCTRL_CLKSEL_Pos) | SERCTRL(SERMODE_TX) | I2S_SERCTRL_TXSAME_SAME | I2S_SERCTRL_EXTEND_MSBIT | I2S_SERCTRL_TXDEFAULT_ONE | I2S_SERCTRL_SLOTADJ_LEFT; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X uint32_t serctrl = (self->clock_unit << I2S_RXCTRL_CLKSEL_Pos) | I2S_TXCTRL_TXSAME_SAME; #endif if (audiosample_channel_count(sample) == 1) { @@ -277,7 +277,7 @@ void common_hal_audiobusio_i2sout_play(audiobusio_i2sout_obj_t* self, #ifdef SAMD21 I2S->SERCTRL[self->serializer].reg = serctrl; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X I2S->TXCTRL.reg = serctrl; #endif @@ -291,7 +291,7 @@ void common_hal_audiobusio_i2sout_play(audiobusio_i2sout_obj_t* self, uint32_t tx_register = (uint32_t) &I2S->DATA[self->serializer].reg; uint8_t dmac_id = I2S_DMAC_ID_TX_0 + self->serializer; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X uint32_t tx_register = (uint32_t) &I2S->TXDATA.reg; uint8_t dmac_id = I2S_DMAC_ID_TX_0; #endif @@ -316,7 +316,7 @@ void common_hal_audiobusio_i2sout_play(audiobusio_i2sout_obj_t* self, I2S->CTRLA.vec.SEREN = 1 << self->serializer; while ((I2S->SYNCBUSY.vec.SEREN & (1 << self->serializer)) != 0) {} #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X I2S->CTRLA.bit.TXEN = 1; while (I2S->SYNCBUSY.bit.TXEN == 1) {} #endif @@ -333,7 +333,7 @@ void common_hal_audiobusio_i2sout_resume(audiobusio_i2sout_obj_t* self) { #ifdef SAMD21 I2S->INTFLAG.reg = I2S_INTFLAG_TXUR0 << self->serializer; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X I2S->INTFLAG.reg = I2S_INTFLAG_TXUR0 | I2S_INTFLAG_TXUR1; #endif @@ -351,7 +351,7 @@ void common_hal_audiobusio_i2sout_stop(audiobusio_i2sout_obj_t* self) { I2S->CTRLA.vec.SEREN &= ~(1 << self->serializer); while ((I2S->SYNCBUSY.vec.SEREN & (1 << self->serializer)) != 0) {} #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X I2S->CTRLA.bit.TXEN = 0; while (I2S->SYNCBUSY.bit.TXEN == 1) {} #endif @@ -368,7 +368,7 @@ void common_hal_audiobusio_i2sout_stop(audiobusio_i2sout_obj_t* self) { disconnect_gclk_from_peripheral(self->gclk, I2S_GCLK_ID_0 + self->clock_unit); disable_clock_generator(self->gclk); - #ifdef SAMD51 + #ifdef SAM_D5X_E5X connect_gclk_to_peripheral(5, I2S_GCLK_ID_0 + self->clock_unit); #endif diff --git a/ports/atmel-samd/common-hal/audiobusio/PDMIn.c b/ports/atmel-samd/common-hal/audiobusio/PDMIn.c index a1e35a1dc..474512f5e 100644 --- a/ports/atmel-samd/common-hal/audiobusio/PDMIn.c +++ b/ports/atmel-samd/common-hal/audiobusio/PDMIn.c @@ -60,7 +60,7 @@ #define SERCTRL(name) I2S_SERCTRL_ ## name #endif -#ifdef SAMD51 +#ifdef SAM_D5X_E5X #define SERCTRL(name) I2S_RXCTRL_ ## name #endif @@ -94,7 +94,7 @@ void common_hal_audiobusio_pdmin_construct(audiobusio_pdmin_obj_t* self, self->clock_unit = 1; #endif #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X if (clock_pin == &pin_PA10 || clock_pin == &pin_PB16) { self->clock_unit = 0; } else if (clock_pin == &pin_PB12 @@ -122,7 +122,7 @@ void common_hal_audiobusio_pdmin_construct(audiobusio_pdmin_obj_t* self, #endif self->serializer = 1; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X if (data_pin == &pin_PB10 || data_pin == &pin_PA22) { self->serializer = 1; #endif @@ -145,13 +145,13 @@ void common_hal_audiobusio_pdmin_construct(audiobusio_pdmin_obj_t* self, mp_raise_RuntimeError(translate("Serializer in use")); } #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X if (I2S->CTRLA.bit.RXEN == 1) { mp_raise_RuntimeError(translate("Serializer in use")); } #endif } - #ifdef SAMD51 + #ifdef SAM_D5X_E5X #define GPIO_I2S_FUNCTION GPIO_PIN_FUNCTION_J #endif #ifdef SAMD21 @@ -185,7 +185,7 @@ void common_hal_audiobusio_pdmin_construct(audiobusio_pdmin_obj_t* self, #ifdef SAMD21 uint32_t serctrl = (self->clock_unit << I2S_SERCTRL_CLKSEL_Pos) | SERCTRL(SERMODE_PDM2) | SERCTRL(DATASIZE_32); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X uint32_t serctrl = (self->clock_unit << I2S_RXCTRL_CLKSEL_Pos) | SERCTRL(SERMODE_PDM2) | SERCTRL(DATASIZE_32); #endif @@ -196,7 +196,7 @@ void common_hal_audiobusio_pdmin_construct(audiobusio_pdmin_obj_t* self, #ifdef SAMD21 I2S->SERCTRL[self->serializer].reg = serctrl; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X I2S->RXCTRL.reg = serctrl; #endif @@ -274,7 +274,7 @@ static void setup_dma(audiobusio_pdmin_obj_t* self, uint32_t length, #ifdef SAMD21 descriptor->SRCADDR.reg = (uint32_t)&I2S->DATA[self->serializer]; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X descriptor->SRCADDR.reg = (uint32_t)&I2S->RXDATA; #endif @@ -295,7 +295,7 @@ static void setup_dma(audiobusio_pdmin_obj_t* self, uint32_t length, #ifdef SAMD21 second_descriptor->SRCADDR.reg = (uint32_t)&I2S->DATA[self->serializer]; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X second_descriptor->SRCADDR.reg = (uint32_t)&I2S->RXDATA; #endif second_descriptor->BTCTRL.reg = DMAC_BTCTRL_VALID | @@ -400,7 +400,7 @@ uint32_t common_hal_audiobusio_pdmin_record_to_buffer(audiobusio_pdmin_obj_t* se #ifdef SAMD21 #define MAX_WAIT_COUNTS 1000 #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X #define MAX_WAIT_COUNTS 6000 #endif // If wait_counts exceeds the max count, buffer has probably stopped filling; diff --git a/ports/atmel-samd/common-hal/audioio/AudioOut.c b/ports/atmel-samd/common-hal/audioio/AudioOut.c index 75621b361..5cefba56f 100644 --- a/ports/atmel-samd/common-hal/audioio/AudioOut.c +++ b/ports/atmel-samd/common-hal/audioio/AudioOut.c @@ -74,7 +74,7 @@ static void ramp_value(uint16_t start, uint16_t end) { } #endif -#ifdef SAMD51 +#ifdef SAM_D5X_E5X static void ramp_value(uint16_t start, uint16_t end) { int32_t diff = (int32_t) end - start; int32_t step = 49; @@ -104,7 +104,7 @@ void audioout_reset(void) { #ifdef SAMD21 while (DAC->STATUS.reg & DAC_STATUS_SYNCBUSY) {} #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X while (DAC->SYNCBUSY.reg & DAC_SYNCBUSY_SWRST) {} #endif if (DAC->CTRLA.bit.ENABLE) { @@ -118,7 +118,7 @@ void audioout_reset(void) { // Caller validates that pins are free. void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, const mcu_pin_obj_t* left_channel, const mcu_pin_obj_t* right_channel, uint16_t quiescent_value) { - #ifdef SAMD51 + #ifdef SAM_D5X_E5X bool dac_clock_enabled = hri_mclk_get_APBDMASK_DAC_bit(MCLK); #endif @@ -138,7 +138,7 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, } claim_pin(left_channel); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X self->right_channel = NULL; if (left_channel != &pin_PA02 && left_channel != &pin_PA05) { mp_raise_ValueError(translate("Invalid pin for left channel")); @@ -159,7 +159,7 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, self->left_channel = left_channel; audio_dma_init(&self->left_dma); - #ifdef SAMD51 + #ifdef SAM_D5X_E5X hri_mclk_set_APBDMASK_DAC_bit(MCLK); #endif @@ -176,12 +176,12 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, DAC->CTRLA.bit.SWRST = 1; while (DAC->CTRLA.bit.SWRST == 1) {} // Make sure there are no outstanding access errors. (Reading DATA can cause this.) - #ifdef SAMD51 + #ifdef SAM_D5X_E5X PAC->INTFLAGD.reg = PAC_INTFLAGD_DAC; #endif bool channel0_enabled = true; - #ifdef SAMD51 + #ifdef SAM_D5X_E5X channel0_enabled = self->left_channel == &pin_PA02 || self->right_channel == &pin_PA02; bool channel1_enabled = self->left_channel == &pin_PA05 || self->right_channel == &pin_PA05; #endif @@ -195,7 +195,7 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, DAC_CTRLB_EOEN | DAC_CTRLB_VPD; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X DAC->EVCTRL.reg |= DAC_EVCTRL_STARTEI0; DAC->DACCTRL[0].reg = DAC_DACCTRL_CCTRL_CC100K | DAC_DACCTRL_ENABLE | @@ -203,7 +203,7 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, DAC->CTRLB.reg = DAC_CTRLB_REFSEL_VREFPU; #endif } - #ifdef SAMD51 + #ifdef SAM_D5X_E5X if (channel1_enabled) { DAC->EVCTRL.reg |= DAC_EVCTRL_STARTEI1; DAC->DACCTRL[1].reg = DAC_DACCTRL_CCTRL_CC100K | @@ -218,7 +218,7 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, #ifdef SAMD21 while (DAC->STATUS.bit.SYNCBUSY == 1) {} #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X while (DAC->SYNCBUSY.bit.ENABLE == 1) {} while (channel0_enabled && DAC->STATUS.bit.READY0 == 0) {} while (channel1_enabled && DAC->STATUS.bit.READY1 == 0) {} @@ -243,7 +243,7 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, // Use the 48mhz clocks on both the SAMD21 and 51 because we will be going much slower. uint8_t tc_gclk = 0; - #ifdef SAMD51 + #ifdef SAM_D5X_E5X tc_gclk = 1; #endif @@ -253,7 +253,7 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, // Don't bother setting the period. We set it before you playback anything. tc_set_enable(t, false); tc_reset(t); - #ifdef SAMD51 + #ifdef SAM_D5X_E5X t->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MFRQ; #endif #ifdef SAMD21 @@ -268,7 +268,7 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, #ifdef SAMD21 #define FIRST_TC_GEN_ID EVSYS_ID_GEN_TC3_OVF #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X #define FIRST_TC_GEN_ID EVSYS_ID_GEN_TC0_OVF #endif uint8_t tc_gen_id = FIRST_TC_GEN_ID + 3 * tc_index; @@ -282,7 +282,7 @@ void common_hal_audioio_audioout_construct(audioio_audioout_obj_t* self, mp_raise_RuntimeError(translate("All event channels in use")); } - #ifdef SAMD51 + #ifdef SAM_D5X_E5X connect_event_user_to_channel(EVSYS_ID_USER_DAC_START_1, channel); if (right_channel != NULL) { gpio_set_pin_function(self->right_channel->number, GPIO_PIN_FUNCTION_B); @@ -322,7 +322,7 @@ void common_hal_audioio_audioout_deinit(audioio_audioout_obj_t* self) { #ifdef SAMD21 while (DAC->STATUS.bit.SYNCBUSY == 1) {} #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X while (DAC->SYNCBUSY.bit.ENABLE == 1) {} #endif @@ -332,7 +332,7 @@ void common_hal_audioio_audioout_deinit(audioio_audioout_obj_t* self) { reset_pin_number(self->left_channel->number); self->left_channel = NULL; - #ifdef SAMD51 + #ifdef SAM_D5X_E5X reset_pin_number(self->right_channel->number); self->right_channel = NULL; #endif @@ -369,7 +369,7 @@ void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, #ifdef SAMD21 uint32_t max_sample_rate = 350000; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X uint32_t max_sample_rate = 1000000; #endif if (sample_rate > max_sample_rate) { @@ -382,7 +382,7 @@ void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, DAC_DMAC_ID_EMPTY); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X uint32_t left_channel_reg = (uint32_t) &DAC->DATABUF[0].reg; uint8_t tc_trig_id = TC0_DMAC_ID_OVF + 3 * self->tc_index; uint8_t left_channel_trigger = tc_trig_id; @@ -416,7 +416,7 @@ void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, #endif if (result != AUDIO_DMA_OK) { audio_dma_stop(&self->left_dma); - #ifdef SAMD51 + #ifdef SAM_D5X_E5X audio_dma_stop(&self->right_dma); #endif if (result == AUDIO_DMA_DMA_BUSY) { @@ -434,7 +434,7 @@ void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, void common_hal_audioio_audioout_pause(audioio_audioout_obj_t* self) { audio_dma_pause(&self->left_dma); - #ifdef SAMD51 + #ifdef SAM_D5X_E5X audio_dma_pause(&self->right_dma); #endif } @@ -444,12 +444,12 @@ void common_hal_audioio_audioout_resume(audioio_audioout_obj_t* self) { #ifdef SAMD21 DAC->INTFLAG.reg = DAC_INTFLAG_UNDERRUN; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X DAC->INTFLAG.reg = DAC_INTFLAG_UNDERRUN0 | DAC_INTFLAG_UNDERRUN1; #endif audio_dma_resume(&self->left_dma); - #ifdef SAMD51 + #ifdef SAM_D5X_E5X audio_dma_resume(&self->right_dma); #endif } @@ -462,7 +462,7 @@ void common_hal_audioio_audioout_stop(audioio_audioout_obj_t* self) { Tc* timer = tc_insts[self->tc_index]; timer->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_STOP; audio_dma_stop(&self->left_dma); - #ifdef SAMD51 + #ifdef SAM_D5X_E5X audio_dma_stop(&self->right_dma); #endif // Ramp the DAC to default. The start is ignored when the current value can be readback. diff --git a/ports/atmel-samd/common-hal/audioio/AudioOut.h b/ports/atmel-samd/common-hal/audioio/AudioOut.h index 56b6b75c8..956839969 100644 --- a/ports/atmel-samd/common-hal/audioio/AudioOut.h +++ b/ports/atmel-samd/common-hal/audioio/AudioOut.h @@ -36,7 +36,7 @@ typedef struct { mp_obj_base_t base; const mcu_pin_obj_t *left_channel; audio_dma_t left_dma; - #ifdef SAMD51 + #ifdef SAM_D5X_E5X const mcu_pin_obj_t *right_channel; audio_dma_t right_dma; #endif diff --git a/ports/atmel-samd/common-hal/busio/SPI.c b/ports/atmel-samd/common-hal/busio/SPI.c index 1dc389027..921713d69 100644 --- a/ports/atmel-samd/common-hal/busio/SPI.c +++ b/ports/atmel-samd/common-hal/busio/SPI.c @@ -341,7 +341,7 @@ bool common_hal_busio_spi_read(busio_spi_obj_t *self, return status >= 0; // Status is number of chars read or an error code < 0. } -bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { +bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) { if (len == 0) { return true; } @@ -350,7 +350,7 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uin status = sercom_dma_transfer(self->spi_desc.dev.prvt, data_out, data_in, len); } else { struct spi_xfer xfer; - xfer.txbuf = data_out; + xfer.txbuf = (uint8_t*) data_out; xfer.rxbuf = data_in; xfer.size = len; status = spi_m_sync_transfer(&self->spi_desc, &xfer); diff --git a/ports/atmel-samd/common-hal/busio/UART.c b/ports/atmel-samd/common-hal/busio/UART.c index 9f740dc8a..8aebd4952 100644 --- a/ports/atmel-samd/common-hal/busio/UART.c +++ b/ports/atmel-samd/common-hal/busio/UART.c @@ -58,7 +58,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, const mcu_pin_obj_t * rs485_dir, bool rs485_invert, - uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer, bool sigint_enabled) { @@ -105,7 +105,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, continue; } #endif -#ifdef SAMD51 +#ifdef SAM_D5X_E5X if (potential_sercom->USART.CTRLA.bit.ENABLE != 0 || !(tx->sercom[i].pad == 0)) { continue; @@ -195,7 +195,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, SERCOM_USART_CTRLA_FORM_Msk); sercom->USART.CTRLA.reg |= SERCOM_USART_CTRLA_TXPO(tx_pad / 2) | SERCOM_USART_CTRLA_RXPO(rx_pad) | - (parity == PARITY_NONE ? 0 : SERCOM_USART_CTRLA_FORM(1)); + (parity == BUSIO_UART_PARITY_NONE ? 0 : SERCOM_USART_CTRLA_FORM(1)); // Enable tx and/or rx based on whether the pins were specified. // CHSIZE is 0 for 8 bits, 5, 6, 7 for 5, 6, 7 bits. 1 for 9 bits, but we don't support that. @@ -206,7 +206,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, SERCOM_USART_CTRLB_CHSIZE_Msk); sercom->USART.CTRLB.reg |= (have_tx ? SERCOM_USART_CTRLB_TXEN : 0) | (have_rx ? SERCOM_USART_CTRLB_RXEN : 0) | - (parity == PARITY_ODD ? SERCOM_USART_CTRLB_PMODE : 0) | + (parity == BUSIO_UART_PARITY_ODD ? SERCOM_USART_CTRLB_PMODE : 0) | (stop > 1 ? SERCOM_USART_CTRLB_SBMODE : 0) | SERCOM_USART_CTRLB_CHSIZE(bits % 8); diff --git a/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c b/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c index fcb3c0ce7..1952df563 100644 --- a/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c +++ b/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.c @@ -54,7 +54,7 @@ static frequencyio_frequencyin_obj_t *active_frequencyins[TC_INST_NUM]; volatile uint8_t reference_tc = 0xff; -#ifdef SAMD51 +#ifdef SAM_D5X_E5X static uint8_t dpll_gclk; #endif @@ -67,7 +67,7 @@ void frequencyin_emergency_cancel_capture(uint8_t index) { NVIC_DisableIRQ(EIC_IRQn); NVIC_ClearPendingIRQ(EIC_IRQn); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X NVIC_DisableIRQ(EIC_0_IRQn + self->channel); NVIC_ClearPendingIRQ(EIC_0_IRQn + self->channel); #endif @@ -78,7 +78,7 @@ void frequencyin_emergency_cancel_capture(uint8_t index) { #ifdef SAMD21 NVIC_EnableIRQ(EIC_IRQn); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X NVIC_EnableIRQ(EIC_0_IRQn + self->channel); #endif mp_raise_RuntimeError(translate("Frequency captured is above capability. Capture Paused.")); @@ -107,7 +107,7 @@ void frequencyin_interrupt_handler(uint8_t index) { self->factor = (uint32_t) (current_ns - self->last_ns) / 1000000.0; self->last_ns = current_ns; - #ifdef SAMD51 + #ifdef SAM_D5X_E5X tc->COUNT16.CTRLBSET.bit.CMD = TC_CTRLBSET_CMD_READSYNC_Val; while ((tc->COUNT16.SYNCBUSY.bit.COUNT == 1) || (tc->COUNT16.CTRLBSET.bit.CMD == TC_CTRLBSET_CMD_READSYNC_Val)) { @@ -121,7 +121,7 @@ void frequencyin_interrupt_handler(uint8_t index) { } self->frequency = new_freq; - #ifdef SAMD51 + #ifdef SAM_D5X_E5X tc->COUNT16.CTRLBSET.bit.CMD = TC_CTRLBSET_CMD_RETRIGGER_Val; while ((tc->COUNT16.SYNCBUSY.bit.COUNT == 1) || (tc->COUNT16.CTRLBSET.bit.CMD == TC_CTRLBSET_CMD_RETRIGGER_Val)) { @@ -151,7 +151,7 @@ void frequencyin_reference_tc_init() { #endif // use the DPLL we setup so that the reference_tc and freqin_tc(s) // are using the same clock frequency. - #ifdef SAMD51 + #ifdef SAM_D5X_E5X if (dpll_gclk == 0xff) { frequencyin_samd51_start_dpll(); } @@ -168,7 +168,7 @@ void frequencyin_reference_tc_init() { tc->COUNT16.INTENSET.bit.OVF = 1; NVIC_EnableIRQ(TC3_IRQn + reference_tc); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER_DIV1; tc->COUNT16.INTENSET.bit.OVF = 1; @@ -192,7 +192,7 @@ void frequencyin_reference_tc_enable(bool enable) { tc_set_enable(tc, enable); } -#ifdef SAMD51 +#ifdef SAM_D5X_E5X void frequencyin_samd51_start_dpll() { if (clock_get_enabled(0, GCLK_SOURCE_DPLL1)) { return; @@ -259,7 +259,7 @@ void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t* #ifdef SAMD21 ((EIC->INTENSET.vec.EXTINT & mask) != 0 || (EIC->EVCTRL.vec.EXTINTEO & mask) != 0)) { #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X ((EIC->INTENSET.bit.EXTINT & mask) != 0 || (EIC->EVCTRL.bit.EXTINTEO & mask) != 0)) { #endif mp_raise_RuntimeError(translate("EXTINT channel already in use")); @@ -280,7 +280,7 @@ void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t* #ifdef SAMD21 self->TC_IRQ = TC3_IRQn + timer_index; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X self->TC_IRQ = TC0_IRQn + timer_index; #endif @@ -292,7 +292,7 @@ void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t* set_timer_handler(timer_index, 0, TC_HANDLER_NO_INTERRUPT); turn_on_clocks(true, timer_index, 0); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X frequencyin_samd51_start_dpll(); if (dpll_gclk == 0xff && !clock_get_enabled(0, GCLK_SOURCE_DPLL1)) { common_hal_frequencyio_frequencyin_deinit(self); @@ -318,7 +318,7 @@ void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t* masked_value = EIC->EVCTRL.vec.EXTINTEO; EIC->EVCTRL.vec.EXTINTEO = masked_value | (1 << self->channel); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X masked_value = EIC->EVCTRL.bit.EXTINTEO; EIC->EVCTRL.bit.EXTINTEO = masked_value | (1 << self->channel); EIC->ASYNCH.bit.ASYNCH = 1; @@ -334,7 +334,7 @@ void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t* #ifdef SAMD21 connect_event_user_to_channel((EVSYS_ID_USER_TC3_EVU + timer_index), evsys_channel); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X connect_event_user_to_channel((EVSYS_ID_USER_TC0_EVU + timer_index), evsys_channel); #endif init_async_event_channel(evsys_channel, (EVSYS_ID_GEN_EIC_EXTINT_0 + self->channel)); @@ -349,7 +349,7 @@ void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t* tc->COUNT16.EVCTRL.bit.EVACT = TC_EVCTRL_EVACT_COUNT_Val; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X tc->COUNT16.EVCTRL.reg = TC_EVCTRL_EVACT(TC_EVCTRL_EVACT_COUNT_Val) | TC_EVCTRL_TCEI; tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER_DIV1; @@ -393,7 +393,7 @@ void common_hal_frequencyio_frequencyin_deinit(frequencyio_frequencyin_obj_t* se uint32_t masked_value = EIC->EVCTRL.vec.EXTINTEO; EIC->EVCTRL.vec.EXTINTEO = masked_value ^ (1 << self->channel); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X disable_event_user(EVSYS_ID_USER_TC0_EVU + self->tc_index); uint32_t masked_value = EIC->EVCTRL.bit.EXTINTEO; EIC->EVCTRL.bit.EXTINTEO = masked_value ^ (1 << self->channel); @@ -427,7 +427,7 @@ void common_hal_frequencyio_frequencyin_deinit(frequencyio_frequencyin_obj_t* se if (!check_active) { frequencyin_reference_tc_enable(false); reference_tc = 0xff; - #ifdef SAMD51 + #ifdef SAM_D5X_E5X frequencyin_samd51_stop_dpll(); #endif } @@ -438,7 +438,7 @@ uint32_t common_hal_frequencyio_frequencyin_get_item(frequencyio_frequencyin_obj #ifdef SAMD21 NVIC_DisableIRQ(EIC_IRQn); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X NVIC_DisableIRQ(EIC_0_IRQn + self->channel); #endif @@ -462,7 +462,7 @@ uint32_t common_hal_frequencyio_frequencyin_get_item(frequencyio_frequencyin_obj NVIC_ClearPendingIRQ(EIC_IRQn); NVIC_EnableIRQ(EIC_IRQn); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X NVIC_ClearPendingIRQ(EIC_0_IRQn + self->channel); NVIC_EnableIRQ(EIC_0_IRQn + self->channel); #endif @@ -481,7 +481,7 @@ void common_hal_frequencyio_frequencyin_pause(frequencyio_frequencyin_obj_t* sel uint32_t masked_value = EIC->EVCTRL.vec.EXTINTEO; EIC->EVCTRL.vec.EXTINTEO = masked_value ^ (1 << self->channel); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X uint32_t masked_value = EIC->EVCTRL.bit.EXTINTEO; EIC->EVCTRL.bit.EXTINTEO = masked_value ^ (1 << self->channel); #endif @@ -499,7 +499,7 @@ void common_hal_frequencyio_frequencyin_resume(frequencyio_frequencyin_obj_t* se uint32_t masked_value = EIC->EVCTRL.vec.EXTINTEO; EIC->EVCTRL.vec.EXTINTEO = masked_value | (1 << self->channel); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X uint32_t masked_value = EIC->EVCTRL.bit.EXTINTEO; EIC->EVCTRL.bit.EXTINTEO = masked_value | (1 << self->channel); #endif @@ -512,7 +512,7 @@ void common_hal_frequencyio_frequencyin_clear(frequencyio_frequencyin_obj_t* sel #ifdef SAMD21 NVIC_DisableIRQ(EIC_IRQn); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X NVIC_DisableIRQ(EIC_0_IRQn + self->channel); #endif @@ -524,7 +524,7 @@ void common_hal_frequencyio_frequencyin_clear(frequencyio_frequencyin_obj_t* sel NVIC_ClearPendingIRQ(EIC_IRQn); NVIC_EnableIRQ(EIC_IRQn); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X NVIC_ClearPendingIRQ(EIC_0_IRQn + self->channel); NVIC_EnableIRQ(EIC_0_IRQn + self->channel); #endif diff --git a/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.h b/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.h index 461fb661f..53b9f2d2d 100644 --- a/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.h +++ b/ports/atmel-samd/common-hal/frequencyio/FrequencyIn.h @@ -50,7 +50,7 @@ void frequencyin_emergency_cancel_capture(uint8_t index); void frequencyin_reference_tc_init(void); void frequencyin_reference_tc_enable(bool enable); bool frequencyin_reference_tc_enabled(void); -#ifdef SAMD51 +#ifdef SAM_D5X_E5X void frequencyin_samd51_start_dpll(void); void frequencyin_samd51_stop_dpll(void); #endif diff --git a/ports/atmel-samd/common-hal/i2cslave/I2CSlave.c b/ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c index 79c1449e2..84642d404 100644 --- a/ports/atmel-samd/common-hal/i2cslave/I2CSlave.c +++ b/ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.c @@ -24,7 +24,7 @@ * THE SOFTWARE. */ -#include "shared-bindings/i2cslave/I2CSlave.h" +#include "shared-bindings/i2cperipheral/I2CPeripheral.h" #include "common-hal/busio/I2C.h" #include "lib/utils/interrupt_char.h" @@ -35,7 +35,7 @@ #include "hal/include/hal_gpio.h" #include "peripherals/samd/sercom.h" -void common_hal_i2cslave_i2c_slave_construct(i2cslave_i2c_slave_obj_t *self, +void common_hal_i2cperipheral_i2c_peripheral_construct(i2cperipheral_i2c_peripheral_obj_t *self, const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, uint8_t *addresses, unsigned int num_addresses, bool smbus) { uint8_t sercom_index; @@ -87,19 +87,19 @@ void common_hal_i2cslave_i2c_slave_construct(i2cslave_i2c_slave_obj_t *self, if (smbus) { sercom->I2CS.CTRLA.bit.LOWTOUTEN = 1; // Errata 12003 - sercom->I2CS.CTRLA.bit.SEXTTOEN = 1; // Slave SCL Low Extend/Cumulative Time-Out 25ms + sercom->I2CS.CTRLA.bit.SEXTTOEN = 1; // SCL Low Extend/Cumulative Time-Out 25ms } sercom->I2CS.CTRLA.bit.SCLSM = 0; // Clock stretch before ack - sercom->I2CS.CTRLA.bit.MODE = 0x04; // Slave mode + sercom->I2CS.CTRLA.bit.MODE = 0x04; // Device mode sercom->I2CS.CTRLA.bit.ENABLE = 1; } -bool common_hal_i2cslave_i2c_slave_deinited(i2cslave_i2c_slave_obj_t *self) { +bool common_hal_i2cperipheral_i2c_peripheral_deinited(i2cperipheral_i2c_peripheral_obj_t *self) { return self->sda_pin == NO_PIN; } -void common_hal_i2cslave_i2c_slave_deinit(i2cslave_i2c_slave_obj_t *self) { - if (common_hal_i2cslave_i2c_slave_deinited(self)) { +void common_hal_i2cperipheral_i2c_peripheral_deinit(i2cperipheral_i2c_peripheral_obj_t *self) { + if (common_hal_i2cperipheral_i2c_peripheral_deinited(self)) { return; } @@ -111,7 +111,7 @@ void common_hal_i2cslave_i2c_slave_deinit(i2cslave_i2c_slave_obj_t *self) { self->scl_pin = NO_PIN; } -static int i2c_slave_check_error(i2cslave_i2c_slave_obj_t *self, bool raise) { +static int i2c_peripheral_check_error(i2cperipheral_i2c_peripheral_obj_t *self, bool raise) { if (!self->sercom->I2CS.INTFLAG.bit.ERROR) { return 0; } @@ -130,9 +130,9 @@ static int i2c_slave_check_error(i2cslave_i2c_slave_obj_t *self, bool raise) { return -err; } -int common_hal_i2cslave_i2c_slave_is_addressed(i2cslave_i2c_slave_obj_t *self, uint8_t *address, bool *is_read, bool *is_restart) +int common_hal_i2cperipheral_i2c_peripheral_is_addressed(i2cperipheral_i2c_peripheral_obj_t *self, uint8_t *address, bool *is_read, bool *is_restart) { - int err = i2c_slave_check_error(self, false); + int err = i2c_peripheral_check_error(self, false); if (err) { return err; } @@ -149,22 +149,22 @@ int common_hal_i2cslave_i2c_slave_is_addressed(i2cslave_i2c_slave_obj_t *self, u for (unsigned int i = 0; i < self->num_addresses; i++) { if (*address == self->addresses[i]) { - common_hal_i2cslave_i2c_slave_ack(self, true); + common_hal_i2cperipheral_i2c_peripheral_ack(self, true); return 1; } } // This should clear AMATCH, but it doesn't... - common_hal_i2cslave_i2c_slave_ack(self, false); + common_hal_i2cperipheral_i2c_peripheral_ack(self, false); return 0; } -int common_hal_i2cslave_i2c_slave_read_byte(i2cslave_i2c_slave_obj_t *self, uint8_t *data) { +int common_hal_i2cperipheral_i2c_peripheral_read_byte(i2cperipheral_i2c_peripheral_obj_t *self, uint8_t *data) { for (int t = 0; t < 100 && !self->sercom->I2CS.INTFLAG.reg; t++) { mp_hal_delay_us(10); } - i2c_slave_check_error(self, true); + i2c_peripheral_check_error(self, true); if (!self->sercom->I2CS.INTFLAG.bit.DRDY || self->sercom->I2CS.INTFLAG.bit.PREC || @@ -176,12 +176,12 @@ int common_hal_i2cslave_i2c_slave_read_byte(i2cslave_i2c_slave_obj_t *self, uint return 1; } -int common_hal_i2cslave_i2c_slave_write_byte(i2cslave_i2c_slave_obj_t *self, uint8_t data) { +int common_hal_i2cperipheral_i2c_peripheral_write_byte(i2cperipheral_i2c_peripheral_obj_t *self, uint8_t data) { for (int t = 0; !self->sercom->I2CS.INTFLAG.reg && t < 100; t++) { mp_hal_delay_us(10); } - i2c_slave_check_error(self, true); + i2c_peripheral_check_error(self, true); if (self->sercom->I2CS.INTFLAG.bit.PREC) { return 0; @@ -203,12 +203,12 @@ int common_hal_i2cslave_i2c_slave_write_byte(i2cslave_i2c_slave_obj_t *self, uin return 1; } -void common_hal_i2cslave_i2c_slave_ack(i2cslave_i2c_slave_obj_t *self, bool ack) { +void common_hal_i2cperipheral_i2c_peripheral_ack(i2cperipheral_i2c_peripheral_obj_t *self, bool ack) { self->sercom->I2CS.CTRLB.bit.ACKACT = !ack; self->sercom->I2CS.CTRLB.bit.CMD = 0x03; } -void common_hal_i2cslave_i2c_slave_close(i2cslave_i2c_slave_obj_t *self) { +void common_hal_i2cperipheral_i2c_peripheral_close(i2cperipheral_i2c_peripheral_obj_t *self) { for (int t = 0; !self->sercom->I2CS.INTFLAG.reg && t < 100; t++) { mp_hal_delay_us(10); } @@ -218,7 +218,7 @@ void common_hal_i2cslave_i2c_slave_close(i2cslave_i2c_slave_obj_t *self) { } if (!self->sercom->I2CS.STATUS.bit.DIR) { - common_hal_i2cslave_i2c_slave_ack(self, false); + common_hal_i2cperipheral_i2c_peripheral_ack(self, false); } else { int i = 0; while (self->sercom->I2CS.INTFLAG.reg == SERCOM_I2CS_INTFLAG_DRDY) { @@ -246,7 +246,7 @@ void common_hal_i2cslave_i2c_slave_close(i2cslave_i2c_slave_obj_t *self) { if (self->sercom->I2CS.STATUS.bit.CLKHOLD) { // Unable to release the clock. - // The slave might have to be re-initialized to get unstuck. + // The device might have to be re-initialized to get unstuck. mp_raise_OSError(MP_EIO); } } diff --git a/ports/atmel-samd/common-hal/i2cslave/I2CSlave.h b/ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.h index bf4f877bd..03ae3a288 100644 --- a/ports/atmel-samd/common-hal/i2cslave/I2CSlave.h +++ b/ports/atmel-samd/common-hal/i2cperipheral/I2CPeripheral.h @@ -24,8 +24,8 @@ * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_I2C_SLAVE_H -#define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_I2C_SLAVE_H +#ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_I2C_PERIPHERAL_H +#define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_I2C_PERIPHERAL_H #include "common-hal/microcontroller/Pin.h" #include "py/obj.h" @@ -40,6 +40,6 @@ typedef struct { uint8_t scl_pin; uint8_t sda_pin; bool writing; -} i2cslave_i2c_slave_obj_t; +} i2cperipheral_i2c_peripheral_obj_t; -#endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_I2C_SLAVE_H +#endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_I2C_PERIPHERAL_H diff --git a/ports/atmel-samd/common-hal/i2cperipheral/__init__.c b/ports/atmel-samd/common-hal/i2cperipheral/__init__.c new file mode 100644 index 000000000..c67511c53 --- /dev/null +++ b/ports/atmel-samd/common-hal/i2cperipheral/__init__.c @@ -0,0 +1 @@ +// No i2cperipheral module functions. diff --git a/ports/atmel-samd/common-hal/i2cslave/__init__.c b/ports/atmel-samd/common-hal/i2cslave/__init__.c deleted file mode 100644 index f289bbc0e..000000000 --- a/ports/atmel-samd/common-hal/i2cslave/__init__.c +++ /dev/null @@ -1 +0,0 @@ -// No i2cslave module functions. diff --git a/ports/atmel-samd/common-hal/microcontroller/Pin.c b/ports/atmel-samd/common-hal/microcontroller/Pin.c index cf78673b2..5ce077eb8 100644 --- a/ports/atmel-samd/common-hal/microcontroller/Pin.c +++ b/ports/atmel-samd/common-hal/microcontroller/Pin.c @@ -45,7 +45,7 @@ bool speaker_enable_in_use; #define PORT_COUNT (PORT_BITS / 32 + 1) -#ifdef SAMD51 +#ifdef SAM_D5X_E5X #define SWD_MUX GPIO_PIN_FUNCTION_H #endif #ifdef SAMD21 @@ -80,7 +80,7 @@ void reset_all_pins(void) { // Configure SWD. SWDIO will be automatically switched on PA31 when a signal is input on // SWCLK. - #ifdef SAMD51 + #ifdef SAM_D5X_E5X gpio_set_pin_function(PIN_PA30, MUX_PA30H_CM4_SWCLK); #endif #ifdef SAMD21 @@ -110,12 +110,12 @@ void never_reset_pin_number(uint8_t pin_number) { } void reset_pin_number(uint8_t pin_number) { - never_reset_pins[GPIO_PORT(pin_number)] &= ~(1 << GPIO_PIN(pin_number)); - if (pin_number >= PORT_BITS) { return; } + never_reset_pins[GPIO_PORT(pin_number)] &= ~(1 << GPIO_PIN(pin_number)); + #ifdef MICROPY_HW_NEOPIXEL if (pin_number == MICROPY_HW_NEOPIXEL->number) { neopixel_in_use = false; @@ -136,7 +136,7 @@ void reset_pin_number(uint8_t pin_number) { #endif if (pin_number == PIN_PA30 - #ifdef SAMD51 + #ifdef SAM_D5X_E5X ) { #endif #ifdef SAMD21 @@ -199,7 +199,7 @@ bool pin_number_is_free(uint8_t pin_number) { return false; } if (pin_number == PIN_PA30 - #ifdef SAMD51 + #ifdef SAM_D5X_E5X ) { #endif #ifdef SAMD21 diff --git a/ports/atmel-samd/common-hal/microcontroller/Processor.c b/ports/atmel-samd/common-hal/microcontroller/Processor.c index 1e0b8fa79..199f19354 100644 --- a/ports/atmel-samd/common-hal/microcontroller/Processor.c +++ b/ports/atmel-samd/common-hal/microcontroller/Processor.c @@ -61,6 +61,7 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#include "py/mphal.h" #include "common-hal/microcontroller/Processor.h" #include "samd/adc.h" @@ -162,7 +163,7 @@ STATIC float calculate_temperature(uint16_t raw_value) { } #endif // SAMD21 -#ifdef SAMD51 +#ifdef SAM_D5X_E5X STATIC float calculate_temperature(uint16_t TP, uint16_t TC) { uint32_t TLI = (*(uint32_t *)FUSES_ROOM_TEMP_VAL_INT_ADDR & FUSES_ROOM_TEMP_VAL_INT_Msk) >> FUSES_ROOM_TEMP_VAL_INT_Pos; uint32_t TLD = (*(uint32_t *)FUSES_ROOM_TEMP_VAL_DEC_ADDR & FUSES_ROOM_TEMP_VAL_DEC_Msk) >> FUSES_ROOM_TEMP_VAL_DEC_Pos; @@ -230,7 +231,7 @@ float common_hal_mcu_processor_get_temperature(void) { return calculate_temperature(value); #endif // SAMD21 -#ifdef SAMD51 +#ifdef SAM_D5X_E5X adc_sync_set_resolution(&adc, ADC_CTRLB_RESSEL_12BIT_Val); // Using INTVCC0 as the reference voltage. // INTVCC1 seems to read a little high. @@ -284,13 +285,17 @@ float common_hal_mcu_processor_get_voltage(void) { adc_sync_set_reference(&adc, ADC_REFCTRL_REFSEL_INT1V_Val); #endif -#ifdef SAMD51 +#ifdef SAM_D5X_E5X hri_supc_set_VREF_SEL_bf(SUPC, SUPC_VREF_SEL_1V0_Val); - // ONDEMAND must be clear, and VREFOE must be set, or else the ADC conversion will not complete. - // See https://community.atmel.com/forum/samd51-using-intref-adc-voltage-reference - hri_supc_clear_VREF_ONDEMAND_bit(SUPC); hri_supc_set_VREF_VREFOE_bit(SUPC); + adc_sync_set_reference(&adc, ADC_REFCTRL_REFSEL_INTREF_Val); + + // On some processor samples, the ADC will hang trying to read the voltage. A simple + // delay after setting the SUPC bits seems to fix things. This appears to be due to VREFOE + // startup time. There is no synchronization bit to check. + // See https://community.atmel.com/forum/samd51-using-intref-adc-voltage-reference + mp_hal_delay_ms(1); #endif adc_sync_set_resolution(&adc, ADC_CTRLB_RESSEL_12BIT_Val); @@ -327,7 +332,7 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { uint32_t* id_addresses[4] = {(uint32_t *) 0x0080A00C, (uint32_t *) 0x0080A040, (uint32_t *) 0x0080A044, (uint32_t *) 0x0080A048}; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X uint32_t* id_addresses[4] = {(uint32_t *) 0x008061FC, (uint32_t *) 0x00806010, (uint32_t *) 0x00806014, (uint32_t *) 0x00806018}; #endif diff --git a/ports/atmel-samd/common-hal/neopixel_write/__init__.c b/ports/atmel-samd/common-hal/neopixel_write/__init__.c index 5c79f72a4..43c8575cb 100644 --- a/ports/atmel-samd/common-hal/neopixel_write/__init__.c +++ b/ports/atmel-samd/common-hal/neopixel_write/__init__.c @@ -31,7 +31,10 @@ #include "supervisor/port.h" -#ifdef SAMD51 +#if defined(SAME54) +#include "hri/hri_cmcc_e54.h" +#include "hri/hri_nvmctrl_e54.h" +#elif defined(SAMD51) #include "hri/hri_cmcc_d51.h" #include "hri/hri_nvmctrl_d51.h" #endif @@ -53,7 +56,7 @@ static void neopixel_send_buffer_core(volatile uint32_t *clraddr, uint32_t pinMa #ifdef SAMD21 " movs r6, #3; d2: sub r6, #1; bne d2;" // delay 3 #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X " movs r6, #3; d2: subs r6, #1; bne d2;" // delay 3 #endif " tst r4, r5;" // mask&r5 @@ -63,14 +66,14 @@ static void neopixel_send_buffer_core(volatile uint32_t *clraddr, uint32_t pinMa #ifdef SAMD21 " movs r6, #6; d0: sub r6, #1; bne d0;" // delay 6 #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X " movs r6, #6; d0: subs r6, #1; bne d0;" // delay 6 #endif " str r1, [r0, #0];" // clr (possibly again, doesn't matter) #ifdef SAMD21 " asr r4, r4, #1;" // mask >>= 1 #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X " asrs r4, r4, #1;" // mask >>= 1 #endif " beq nextbyte;" @@ -78,7 +81,7 @@ static void neopixel_send_buffer_core(volatile uint32_t *clraddr, uint32_t pinMa #ifdef SAMD21 " movs r6, #2; d1: sub r6, #1; bne d1;" // delay 2 #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X " movs r6, #2; d1: subs r6, #1; bne d1;" // delay 2 #endif " b loopBit;" @@ -108,7 +111,7 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout, mp_hal_disable_all_interrupts(); - #ifdef SAMD51 + #ifdef SAM_D5X_E5X // When this routine is positioned at certain addresses, the timing logic // below can be too fast by about 2.5x. This is some kind of (un)fortunate code // positioning with respect to a cache line. @@ -135,7 +138,7 @@ void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout, volatile uint32_t *clr = &(port->OUTCLR.reg); neopixel_send_buffer_core(clr, pinMask, pixels, numBytes); - #ifdef SAMD51 + #ifdef SAM_D5X_E5X // Turn instruction, data, and NVM caches back on. hri_cmcc_clear_CFG_reg(CMCC, CMCC_CFG_DCDIS | CMCC_CFG_ICDIS); hri_nvmctrl_clear_CTRLA_CACHEDIS0_bit(NVMCTRL); diff --git a/ports/atmel-samd/common-hal/os/__init__.c b/ports/atmel-samd/common-hal/os/__init__.c index eeba29dfa..c151b105a 100644 --- a/ports/atmel-samd/common-hal/os/__init__.c +++ b/ports/atmel-samd/common-hal/os/__init__.c @@ -30,7 +30,7 @@ #include "py/objtuple.h" #include "py/qstr.h" -#ifdef SAMD51 +#ifdef SAM_D5X_E5X #include "hal/include/hal_rand_sync.h" #endif @@ -42,7 +42,7 @@ STATIC const qstr os_uname_info_fields[] = { STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "samd21"); STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "samd21"); #endif -#ifdef SAMD51 +#ifdef SAM_D5X_E5X STATIC const MP_DEFINE_STR_OBJ(os_uname_info_sysname_obj, "samd51"); STATIC const MP_DEFINE_STR_OBJ(os_uname_info_nodename_obj, "samd51"); #endif @@ -67,7 +67,7 @@ mp_obj_t common_hal_os_uname(void) { } bool common_hal_os_urandom(uint8_t* buffer, uint32_t length) { - #ifdef SAMD51 + #ifdef SAM_D5X_E5X hri_mclk_set_APBCMASK_TRNG_bit(MCLK); struct rand_sync_desc random; rand_sync_init(&random, TRNG); diff --git a/ports/atmel-samd/common-hal/pulseio/PWMOut.c b/ports/atmel-samd/common-hal/pulseio/PWMOut.c index b627dadc5..752f6c214 100644 --- a/ports/atmel-samd/common-hal/pulseio/PWMOut.c +++ b/ports/atmel-samd/common-hal/pulseio/PWMOut.c @@ -55,7 +55,7 @@ uint8_t tcc_refcount[TCC_INST_NUM]; #ifdef SAMD21 uint8_t tcc_channels[3]; // Set by pwmout_reset() to {0xf0, 0xfc, 0xfc} initially. #endif -#ifdef SAMD51 +#ifdef SAM_D5X_E5X uint8_t tcc_channels[5]; // Set by pwmout_reset() to {0xc0, 0xf0, 0xf8, 0xfc, 0xfc} initially. #endif @@ -148,7 +148,7 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, if (pin->timer[0].index >= TC_INST_NUM && pin->timer[1].index >= TCC_INST_NUM -#ifdef SAMD51 +#ifdef SAM_D5X_E5X && pin->timer[2].index >= TCC_INST_NUM #endif ) { @@ -260,7 +260,7 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, TC_CTRLA_WAVEGEN_MPWM; tc->COUNT16.CC[0].reg = top; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X tc->COUNT16.CTRLA.bit.SWRST = 1; while (tc->COUNT16.CTRLA.bit.SWRST == 1) { @@ -345,7 +345,7 @@ extern void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, #ifdef SAMD21 tc_insts[t->index]->COUNT16.CC[t->wave_output].reg = adjusted_duty; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X Tc* tc = tc_insts[t->index]; while (tc->COUNT16.SYNCBUSY.bit.CC1 != 0) {} tc->COUNT16.CCBUF[1].reg = adjusted_duty; @@ -366,7 +366,7 @@ extern void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self, #ifdef SAMD21 tcc->CCB[channel].reg = adjusted_duty; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X tcc->CCBUF[channel].reg = adjusted_duty; #endif tcc->CTRLBCLR.bit.LUPD = 1; @@ -396,7 +396,7 @@ uint16_t common_hal_pulseio_pwmout_get_duty_cycle(pulseio_pwmout_obj_t* self) { cv = tcc->CC[channel].reg; } #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X if ((tcc->STATUS.vec.CCBUFV & (1 << channel)) != 0) { cv = tcc->CCBUF[channel].reg; } else { @@ -444,7 +444,7 @@ void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, #ifdef SAMD21 tc->COUNT16.CC[0].reg = new_top; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X while (tc->COUNT16.SYNCBUSY.reg != 0) {} tc->COUNT16.CCBUF[0].reg = new_top; #endif @@ -461,7 +461,7 @@ void common_hal_pulseio_pwmout_set_frequency(pulseio_pwmout_obj_t* self, #ifdef SAMD21 tcc->PERB.bit.PERB = new_top; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X tcc->PERBUF.bit.PERBUF = new_top; #endif } diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.c b/ports/atmel-samd/common-hal/pulseio/PulseIn.c index 508ee8d38..b825579db 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.c +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.c @@ -79,7 +79,7 @@ void pulsein_interrupt_handler(uint8_t channel) { // Grab the current time first. uint32_t current_overflow = overflow_count; Tc* tc = tc_insts[pulsein_tc_index]; - #ifdef SAMD51 + #ifdef SAM_D5X_E5X tc->COUNT16.CTRLBSET.reg = TC_CTRLBSET_CMD_READSYNC; while (tc->COUNT16.SYNCBUSY.bit.COUNT == 1 || tc->COUNT16.CTRLBSET.bit.CMD == TC_CTRLBSET_CMD_READSYNC_Val) {} @@ -125,6 +125,9 @@ void pulsein_interrupt_handler(uint8_t channel) { } void pulsein_reset() { +#ifdef SAMD21 + rtc_end_pulsein(); +#endif refcount = 0; pulsein_tc_index = 0xff; overflow_count = 0; @@ -173,7 +176,7 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, // We use GCLK0 for SAMD21 which is 48MHz. We prescale it to 3MHz. turn_on_clocks(true, index, 0); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X // We use GCLK5 for SAMD51 because it runs at 2MHz and we can use it for a 1MHz clock, // 1us per tick. turn_on_clocks(true, index, 5); @@ -185,7 +188,7 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, TC_CTRLA_PRESCALER_DIV16 | TC_CTRLA_WAVEGEN_NFRQ; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X tc_reset(tc); tc_set_enable(tc, false); tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER_DIV2; @@ -221,6 +224,10 @@ void common_hal_pulseio_pulsein_construct(pulseio_pulsein_obj_t* self, // Set config will enable the EIC. pulsein_set_config(self, true); +#ifdef SAMD21 + rtc_start_pulsein(); +#endif + } bool common_hal_pulseio_pulsein_deinited(pulseio_pulsein_obj_t* self) { @@ -231,6 +238,9 @@ void common_hal_pulseio_pulsein_deinit(pulseio_pulsein_obj_t* self) { if (common_hal_pulseio_pulsein_deinited(self)) { return; } +#ifdef SAMD21 + rtc_end_pulsein(); +#endif set_eic_handler(self->channel, EIC_HANDLER_NO_INTERRUPT); turn_off_eic_channel(self->channel); reset_pin_number(self->pin); diff --git a/ports/atmel-samd/common-hal/pulseio/PulseIn.h b/ports/atmel-samd/common-hal/pulseio/PulseIn.h index 89b61a83a..99358178f 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseIn.h +++ b/ports/atmel-samd/common-hal/pulseio/PulseIn.h @@ -50,5 +50,11 @@ void pulsein_reset(void); void pulsein_interrupt_handler(uint8_t channel); void pulsein_timer_interrupt_handler(uint8_t index); +#ifdef SAMD21 +void rtc_set_continuous(void); +void rtc_start_pulsein(void); +void rtc_end_pulsein(void); +#endif + #endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_PULSEIO_PULSEIN_H diff --git a/ports/atmel-samd/common-hal/pulseio/PulseOut.c b/ports/atmel-samd/common-hal/pulseio/PulseOut.c index 8b8bc6dc6..5c829f84d 100644 --- a/ports/atmel-samd/common-hal/pulseio/PulseOut.c +++ b/ports/atmel-samd/common-hal/pulseio/PulseOut.c @@ -119,7 +119,7 @@ void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, #ifdef SAMD21 turn_on_clocks(true, index, 0); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X turn_on_clocks(true, index, 1); #endif @@ -129,7 +129,7 @@ void common_hal_pulseio_pulseout_construct(pulseio_pulseout_obj_t* self, TC_CTRLA_PRESCALER_DIV64 | TC_CTRLA_WAVEGEN_NFRQ; #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X tc_reset(tc); tc_set_enable(tc, false); tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER_DIV64; diff --git a/ports/atmel-samd/common-hal/sdioio/SDCard.c b/ports/atmel-samd/common-hal/sdioio/SDCard.c new file mode 100644 index 000000000..8cd077ecd --- /dev/null +++ b/ports/atmel-samd/common-hal/sdioio/SDCard.c @@ -0,0 +1,272 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include <stdbool.h> + +#include "py/mperrno.h" +#include "py/runtime.h" + +#include "boards/board.h" +#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/sdioio/SDCard.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/microcontroller/__init__.h" +#include "supervisor/shared/translate.h" + +#include "genhdr/sdiodata.h" + +#include "sd_mmc/sd_mmc.h" +#include "sd_mmc/conf_sd_mmc.h" +#include "peripheral_clk_config.h" + +#ifndef DEBUG_SDIO +#define DEBUG_SDIO (0) +#endif + +#if DEBUG_SDIO +#define DEBUG_PRINT(...) ((void)mp_printf(&mp_plat_print, __VA_ARGS__)) +#define DEBUG_PRINT_OBJ(o) ((void)mp_obj_print_helper(&mp_plat_print, (mp_obj_t)o, PRINT_REPR)) +#else +#define DEBUG_PRINT(...) ((void)0) +#define DEBUG_PRINT_OBJ(...) ((void)0) +#endif +#define DEBUG_PRINT_OBJ_NL(o) (DEBUG_PRINT_OBJ(o), DEBUG_PRINT("\n")) + +#define GPIO_PIN_FUNCTION_SDIO (GPIO_PIN_FUNCTION_I) + +static Sdhc *sdhc_insts[] = SDHC_INSTS; + +STATIC pin_function_t *find_pin_function(pin_function_t *table, const mcu_pin_obj_t *pin, int instance, uint16_t name) { + DEBUG_PRINT("\n\n[inst=% 2d] %q: ", instance, name); + DEBUG_PRINT_OBJ_NL(pin); + + for(; table->obj; table++) { + DEBUG_PRINT("[inst=% 2d] considering table @%p: "); + DEBUG_PRINT_OBJ(table->obj); + DEBUG_PRINT(" %d %d\n", table->instance, table->pin); + if (instance != -1 && instance != table->instance) { + continue; + } + if (pin == table->obj) { + return table; + } + } + mp_raise_ValueError_varg(translate("%q pin invalid"), name); +} + +void common_hal_sdioio_sdcard_construct(sdioio_sdcard_obj_t *self, + const mcu_pin_obj_t * clock, const mcu_pin_obj_t * command, + uint8_t num_data, mcu_pin_obj_t ** data, uint32_t frequency) { + /* +SD breakout as assembled ("*" = minimum viable set) + +PURPLE 9 DAT2 SDA +BLUE 1 DAT3 SCL +GREEN 2 CMD * D32 +YELLOW 3 VSS1 +RED 4 VDD * 3.3V +BROWN 5 CLK * BROWN +BLACK 6 VSS2 * GND +WHITE 7 DAT0 * D8 +GREY 8 DAT1 D29 + +DAT0..3 PB18..21 (D8 D29 D20 D21) WHITE GREY PURPLE BLUE +CMD PA20 PCC_D? (D33) GREEN +CLK PA21 PCC_D? (D32) BROWN + +*/ + + pin_function_t *functions[6] = {}; + functions[0] = find_pin_function(sdio_cmd, command, -1, MP_QSTR_command); + int instance = functions[0]->instance; + functions[1] = find_pin_function(sdio_ck, clock, instance, MP_QSTR_clock); + functions[2] = find_pin_function(sdio_dat0, data[0], instance, MP_QSTR_data0); + if(num_data == 4) { + functions[3] = find_pin_function(sdio_dat1, data[1], instance, MP_QSTR_data1); + functions[4] = find_pin_function(sdio_dat2, data[2], instance, MP_QSTR_data2); + functions[5] = find_pin_function(sdio_dat3, data[3], instance, MP_QSTR_data3); + } + + // We've verified all pins, now set their special functions + self->command_pin = common_hal_mcu_pin_number(functions[0]->obj); + self->clock_pin = common_hal_mcu_pin_number(functions[1]->obj); + + for(int i=0; i<num_data; i++) { + pin_function_t *function = functions[2+i]; + if (function) { + self->data_pins[i] = common_hal_mcu_pin_number(function->obj); + } else { + self->data_pins[i] = COMMON_HAL_MCU_NO_PIN; + } + } + + for(size_t i=0; i<MP_ARRAY_SIZE(functions); i++) { + if (!functions[i]->obj) { + break; + } + + gpio_set_pin_direction(functions[i]->pin, GPIO_DIRECTION_OUT); + gpio_set_pin_level(functions[i]->pin, false); + // Enable pullups on all pins except CLK and DAT3 + gpio_set_pin_pull_mode(functions[i]->pin, + (i == 1 || i == 5) ? GPIO_PULL_OFF : GPIO_PULL_UP); + gpio_set_pin_function(functions[i]->pin, GPIO_PIN_FUNCTION_SDIO); + + common_hal_never_reset_pin(functions[i]->obj); + } + + self->num_data = num_data; + self->frequency = frequency; + + if(instance == 0) { + hri_mclk_set_AHBMASK_SDHC0_bit(MCLK); + hri_gclk_write_PCHCTRL_reg(GCLK, SDHC0_GCLK_ID, CONF_GCLK_SDHC0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); + hri_gclk_write_PCHCTRL_reg(GCLK, SDHC0_GCLK_ID_SLOW, CONF_GCLK_SDHC0_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); + } else { +#ifdef SDHC1_GCLK_ID + hri_mclk_set_AHBMASK_SDHC1_bit(MCLK); + hri_gclk_write_PCHCTRL_reg(GCLK, SDHC1_GCLK_ID, CONF_GCLK_SDHC1_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); + hri_gclk_write_PCHCTRL_reg(GCLK, SDHC1_GCLK_ID_SLOW, CONF_GCLK_SDHC1_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); +#endif + } + + DEBUG_PRINT("instance %d @%p\n", instance, sdhc_insts[instance]); + mci_sync_init(&self->IO_BUS, sdhc_insts[instance]); + sd_mmc_init(&self->IO_BUS, NULL, NULL); + + sd_mmc_err_t result = SD_MMC_INIT_ONGOING; + + for (int i=0; result == SD_MMC_INIT_ONGOING && i<100; i++) { + result = sd_mmc_check(0); + DEBUG_PRINT("sd_mmc_check(0) -> %d\n", result); + } + + if (result != SD_MMC_OK) { + mp_raise_OSError_msg_varg(translate("%q failure: %d"), MP_QSTR_sd_mmc_check, (int)result); + } + // sd_mmc_get_capacity() is in KiB, but our "capacity" is in 512-byte blocks + self->capacity = sd_mmc_get_capacity(0) * 2; + + DEBUG_PRINT("capacity=%u\n", self->capacity); +} + +uint32_t common_hal_sdioio_sdcard_get_count(sdioio_sdcard_obj_t *self) { + return self->capacity; +} + +uint32_t common_hal_sdioio_sdcard_get_frequency(sdioio_sdcard_obj_t *self) { + return self->frequency; // self->frequency; +} + +uint8_t common_hal_sdioio_sdcard_get_width(sdioio_sdcard_obj_t *self) { + return self->num_data; // self->width; +} + +STATIC void check_for_deinit(sdioio_sdcard_obj_t *self) { +} + +STATIC void check_whole_block(mp_buffer_info_t *bufinfo) { + if (bufinfo->len % 512) { + mp_raise_ValueError(translate("Buffer length must be a multiple of 512")); + } +} + +STATIC void wait_write_complete(sdioio_sdcard_obj_t *self) { + if (self->state_programming) { + sd_mmc_wait_end_of_write_blocks(0); + self->state_programming = 0; + } +} + +STATIC void debug_print_state(sdioio_sdcard_obj_t *self, const char *what, sd_mmc_err_t r) { +#if DEBUG_SDIO + DEBUG_PRINT("%s: %d\n", what, r); +#endif +} + +int common_hal_sdioio_sdcard_writeblocks(sdioio_sdcard_obj_t *self, uint32_t start_block, mp_buffer_info_t *bufinfo) { + check_for_deinit(self); + check_whole_block(bufinfo); + wait_write_complete(self); + self->state_programming = true; + sd_mmc_err_t r = sd_mmc_init_write_blocks(0, start_block, bufinfo->len / 512); + if (r != SD_MMC_OK) { + debug_print_state(self, "sd_mmc_init_write_blocks", r); + return -EIO; + } + r = sd_mmc_start_write_blocks(bufinfo->buf, bufinfo->len / 512); + if (r != SD_MMC_OK) { + debug_print_state(self, "sd_mmc_start_write_blocks", r); + return -EIO; + } + // debug_print_state(self, "after writeblocks OK"); + return 0; +} + +int common_hal_sdioio_sdcard_readblocks(sdioio_sdcard_obj_t *self, uint32_t start_block, mp_buffer_info_t *bufinfo) { + check_for_deinit(self); + check_whole_block(bufinfo); + wait_write_complete(self); + sd_mmc_err_t r = sd_mmc_init_read_blocks(0, start_block, bufinfo->len / 512); + if (r != SD_MMC_OK) { + debug_print_state(self, "sd_mmc_init_read_blocks", r); + return -EIO; + } + r = sd_mmc_start_read_blocks(bufinfo->buf, bufinfo->len / 512); + if (r != SD_MMC_OK) { + debug_print_state(self, "sd_mmc_start_read_blocks", r); + return -EIO; + } + sd_mmc_wait_end_of_write_blocks(0); + return 0; +} + +bool common_hal_sdioio_sdcard_configure(sdioio_sdcard_obj_t *self, uint32_t frequency, uint8_t bits) { + check_for_deinit(self); + return true; +} + +bool common_hal_sdioio_sdcard_deinited(sdioio_sdcard_obj_t *self) { + return self->command_pin == COMMON_HAL_MCU_NO_PIN; +} + +void common_hal_sdioio_sdcard_deinit(sdioio_sdcard_obj_t *self) { + reset_pin_number(self->command_pin); + reset_pin_number(self->clock_pin); + reset_pin_number(self->data_pins[0]); + reset_pin_number(self->data_pins[1]); + reset_pin_number(self->data_pins[2]); + reset_pin_number(self->data_pins[3]); + + self->command_pin = COMMON_HAL_MCU_NO_PIN; + self->clock_pin = COMMON_HAL_MCU_NO_PIN; + self->data_pins[0] = COMMON_HAL_MCU_NO_PIN; + self->data_pins[1] = COMMON_HAL_MCU_NO_PIN; + self->data_pins[2] = COMMON_HAL_MCU_NO_PIN; + self->data_pins[3] = COMMON_HAL_MCU_NO_PIN; +} + +void common_hal_sdioio_sdcard_never_reset(sdioio_sdcard_obj_t *self) { +} diff --git a/ports/atmel-samd/common-hal/sdioio/SDCard.h b/ports/atmel-samd/common-hal/sdioio/SDCard.h new file mode 100644 index 000000000..2baba38f0 --- /dev/null +++ b/ports/atmel-samd/common-hal/sdioio/SDCard.h @@ -0,0 +1,40 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "hal_mci_sync.h" + +typedef struct { + mp_obj_base_t base; + struct mci_sync_desc IO_BUS; + uint32_t frequency; + uint32_t capacity; + uint8_t num_data:3, state_programming:1, has_lock:1; + uint8_t command_pin; + uint8_t clock_pin; + uint8_t data_pins[4]; +} sdioio_sdcard_obj_t; diff --git a/ports/atmel-samd/common-hal/sdioio/__init__.c b/ports/atmel-samd/common-hal/sdioio/__init__.c new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/ports/atmel-samd/common-hal/sdioio/__init__.c diff --git a/ports/atmel-samd/common-hal/sdioio/__init__.h b/ports/atmel-samd/common-hal/sdioio/__init__.h new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/ports/atmel-samd/common-hal/sdioio/__init__.h diff --git a/ports/atmel-samd/mpconfigport.h b/ports/atmel-samd/mpconfigport.h index 1aa305cd3..540a2f77c 100644 --- a/ports/atmel-samd/mpconfigport.h +++ b/ports/atmel-samd/mpconfigport.h @@ -65,13 +65,17 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -#ifdef SAMD51 +#ifdef SAM_D5X_E5X -// HSRAM_SIZE is defined in the ASF4 include files for each SAMD51 chip. +// HSRAM_SIZE is defined in the ASF4 include files for each SAM_D5X_E5X chip. #define RAM_SIZE HSRAM_SIZE #define BOOTLOADER_SIZE (16*1024) #define CIRCUITPY_MCU_FAMILY samd51 +#ifdef SAMD51 #define MICROPY_PY_SYS_PLATFORM "MicroChip SAMD51" +#elif defined(SAME54) +#define MICROPY_PY_SYS_PLATFORM "MicroChip SAME54" +#endif #define SPI_FLASH_MAX_BAUDRATE 24000000 #define MICROPY_PY_BUILTINS_NOTIMPLEMENTED (1) #define MICROPY_PY_COLLECTIONS_ORDEREDDICT (1) @@ -81,7 +85,7 @@ #define MICROPY_PY_UJSON (1) // MICROPY_PY_UERRNO_LIST - Use the default -#endif // SAMD51 +#endif // SAM_D5X_E5X //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -108,6 +112,14 @@ #define CIRCUITPY_DEFAULT_STACK_SIZE 4096 #endif +#ifndef SAMD21_BOD33_LEVEL +// Set brownout detection to ~2.7V. Default from factory is 1.7V, +// which is too low for proper operation of external SPI flash chips +// (they are 2.7-3.6V). +#define SAMD21_BOD33_LEVEL (39) +// 2.77V with hysteresis off. Table 37.20 in datasheet. +#endif + // Smallest unit of flash that can be erased. #define FLASH_ERASE_SIZE NVMCTRL_ROW_SIZE @@ -115,7 +127,7 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -#ifdef SAMD51 +#ifdef SAM_D5X_E5X #ifndef CIRCUITPY_INTERNAL_NVM_SIZE #define CIRCUITPY_INTERNAL_NVM_SIZE (8192) @@ -125,6 +137,14 @@ #define CIRCUITPY_DEFAULT_STACK_SIZE (24*1024) #endif +#ifndef SAMD5x_E5x_BOD33_LEVEL +// Set brownout detection to ~2.7V. Default from factory is 1.7V, +// which is too low for proper operation of external SPI flash chips +// (they are 2.7-3.6V). +#define SAMD5x_E5x_BOD33_LEVEL (200) +// 2.7V: 1.5V + LEVEL * 6mV. +#endif + // Smallest unit of flash that can be erased. #define FLASH_ERASE_SIZE NVMCTRL_BLOCK_SIZE @@ -137,7 +157,7 @@ #define CIRCUITPY_INTERNAL_FLASH_FILESYSTEM_SIZE (0) #endif -#endif // SAMD51 +#endif // SAM_D5X_E5X //////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/ports/atmel-samd/mpconfigport.mk b/ports/atmel-samd/mpconfigport.mk index 92d47b186..face79fad 100644 --- a/ports/atmel-samd/mpconfigport.mk +++ b/ports/atmel-samd/mpconfigport.mk @@ -37,6 +37,8 @@ ifndef CIRCUITPY_TOUCHIO_USE_NATIVE CIRCUITPY_TOUCHIO_USE_NATIVE = 1 endif +CIRCUITPY_SDCARDIO ?= 0 + # SAMD21 needs separate endpoint pairs for MSC BULK IN and BULK OUT, otherwise it's erratic. USB_MSC_EP_NUM_OUT = 1 diff --git a/ports/atmel-samd/mphalport.c b/ports/atmel-samd/mphalport.c index 23a9b4330..b497b89cd 100644 --- a/ports/atmel-samd/mphalport.c +++ b/ports/atmel-samd/mphalport.c @@ -58,7 +58,7 @@ extern uint32_t common_hal_mcu_processor_get_frequency(void); #ifdef SAMD21 #define DELAY_LOOP_ITERATIONS_PER_US ( (10U*48000000U) / common_hal_mcu_processor_get_frequency()) #endif -#ifdef SAMD51 +#ifdef SAM_D5X_E5X #define DELAY_LOOP_ITERATIONS_PER_US ( (30U*120000000U) / common_hal_mcu_processor_get_frequency()) #endif diff --git a/ports/atmel-samd/peripherals b/ports/atmel-samd/peripherals -Subproject 6b531fc923d9f02b14bd731a5f584ddf716e877 +Subproject e4161d7d6d98d78eddcccb82128856af4baf7e5 diff --git a/ports/atmel-samd/sd_mmc/conf_sd_mmc.h b/ports/atmel-samd/sd_mmc/conf_sd_mmc.h new file mode 100644 index 000000000..735dd3783 --- /dev/null +++ b/ports/atmel-samd/sd_mmc/conf_sd_mmc.h @@ -0,0 +1,79 @@ +/* Auto-generated config file conf_sd_mmc.h */ +#ifndef CONF_SD_MMC_H +#define CONF_SD_MMC_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// <q> Enable the SDIO support +// <id> conf_sdio_support +#ifndef CONF_SDIO_SUPPORT +#define CONF_SDIO_SUPPORT 0 +#endif + +// <q> Enable the MMC card support +// <id> conf_mmc_support +#ifndef CONF_MMC_SUPPORT +#define CONF_MMC_SUPPORT 0 +#endif + +// <q> Enable the OS support +// <id> conf_sd_mmc_os_support +#ifndef CONF_OS_SUPPORT +#define CONF_OS_SUPPORT 0 +#endif + +// Detection (card/write protect) timeout (ms/ticks) +// conf_sd_mmc_debounce +#ifndef CONF_SD_MMC_DEBOUNCE +#define CONF_SD_MMC_DEBOUNCE 1000 +#endif + +#ifndef CONF_SD_MMC_MEM_CNT +#define CONF_SD_MMC_MEM_CNT 1 +#endif + +// <e> SD/MMC Slot 0 +// <id> conf_sd_mmc_0_enable +#ifndef CONF_SD_MMC_0_ENABLE +#define CONF_SD_MMC_0_ENABLE 1 +#endif + +// <e> Card Detect (CD) 0 Enable +// <id> conf_sd_mmc_0_cd_detect_en +#ifndef CONF_SD_MMC_0_CD_DETECT_EN +#define CONF_SD_MMC_0_CD_DETECT_EN 0 +#endif + +// <o> Card Detect (CD) detection level +// <1=> High +// <0=> Low +// <id> conf_sd_mmc_0_cd_detect_value +#ifndef CONF_SD_MMC_0_CD_DETECT_VALUE +#define CONF_SD_MMC_0_CD_DETECT_VALUE 0 +#endif +// </e> + +// <e> Write Protect (WP) 0 Enable +// <id> conf_sd_mmc_0_wp_detect_en +#ifndef CONF_SD_MMC_0_WP_DETECT_EN +#define CONF_SD_MMC_0_WP_DETECT_EN 0 +#endif + +// <o> Write Protect (WP) detection level +// <1=> High +// <0=> Low +// <id> conf_sd_mmc_0_wp_detect_value +#ifndef CONF_SD_MMC_0_WP_DETECT_VALUE +#define CONF_SD_MMC_0_WP_DETECT_VALUE 1 +#endif +// </e> + +// </e> + +#ifndef CONF_MCI_OS_SUPPORT +#define CONF_MCI_OS_SUPPORT 0 +#endif + +// <<< end of configuration section >>> + +#endif // CONF_SD_MMC_H diff --git a/ports/atmel-samd/sd_mmc/sd_mmc.c b/ports/atmel-samd/sd_mmc/sd_mmc.c new file mode 100644 index 000000000..5ea9d830e --- /dev/null +++ b/ports/atmel-samd/sd_mmc/sd_mmc.c @@ -0,0 +1,1671 @@ +/** + * \file + * + * \brief Common SD/MMC stack + * + * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. + * + * \asf_license_start + * + * \page License + * + * Subject to your compliance with these terms, you may use Microchip + * software and any derivatives exclusively with Microchip products. + * It is your responsibility to comply with third party license terms applicable + * to your use of third party software (including open source software) that + * may accompany Microchip software. + * + * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, + * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, + * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, + * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE + * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL + * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE + * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE + * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT + * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY + * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, + * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a> + */ + +#include <string.h> + +#include "conf_sd_mmc.h" + +#include "sd_mmc_protocol.h" +#include "sd_mmc.h" + +#if CONF_OS_SUPPORT +#include <hal_rtos.h> +#endif +#include <hal_gpio.h> +#include <utils.h> +#include <utils_assert.h> +#include <utils_repeat_macro.h> + +#define TPASTE2(a, b) a##b +#define ATPASTE2(a, b) TPASTE2(a, b) + +/** + * \ingroup sd_mmc_stack + * \defgroup sd_mmc_stack_internal Implementation of SD/MMC/SDIO Stack + * @{ + */ + +#ifndef CONF_SD_MMC_MEM_CNT +#define CONF_SD_MMC_MEM_CNT 0 +#endif + +/* Macros to switch SD MMC stack to the correct driver (MCI or SPI) */ +#if (CONF_SD_MMC_MEM_CNT != 0) +#if CONF_MCI_OS_SUPPORT +#include "hal_mci_os.h" +#else +#include "hal_mci_sync.h" +#endif +#define driver mci +#else +#error No MCI or HSMCI interfaces are defined for SD MMC stack. \ + CONF_SD_MMC_MEM_CNT must be added in board.h file. +#endif + +#if CONF_MCI_OS_SUPPORT +#define driver_select_device ATPASTE2(driver, _os_select_device) +#define driver_deselect_device ATPASTE2(driver, _os_deselect_device) +#define driver_get_bus_width ATPASTE2(driver, _os_get_bus_width) +#define driver_is_high_speed_capable ATPASTE2(driver, _os_is_high_speed_capable) +#define driver_send_clock ATPASTE2(driver, _os_send_init_sequence) +#define driver_send_cmd ATPASTE2(driver, _os_send_cmd) +#define driver_get_response ATPASTE2(driver, _os_get_response) +#define driver_get_response_128 ATPASTE2(driver, _os_get_response_128) +#define driver_adtc_start ATPASTE2(driver, _os_adtc_start) +#define driver_adtc_stop ATPASTE2(driver, _os_send_cmd) +#define driver_read_word ATPASTE2(driver, _os_read_bytes) +#define driver_write_word ATPASTE2(driver, _os_write_bytes) +#define driver_start_read_blocks ATPASTE2(driver, _os_start_read_blocks) +#define driver_wait_end_of_read_blocks ATPASTE2(driver, _os_wait_end_of_read_blocks) +#define driver_start_write_blocks ATPASTE2(driver, _os_start_write_blocks) +#define driver_wait_end_of_write_blocks ATPASTE2(driver, _os_wait_end_of_write_blocks) +#else +#define driver_select_device ATPASTE2(driver, _sync_select_device) +#define driver_deselect_device ATPASTE2(driver, _sync_deselect_device) +#define driver_get_bus_width ATPASTE2(driver, _sync_get_bus_width) +#define driver_is_high_speed_capable ATPASTE2(driver, _sync_is_high_speed_capable) +#define driver_send_clock ATPASTE2(driver, _sync_send_clock) +#define driver_send_cmd ATPASTE2(driver, _sync_send_cmd) +#define driver_get_response ATPASTE2(driver, _sync_get_response) +#define driver_get_response_128 ATPASTE2(driver, _sync_get_response_128) +#define driver_adtc_start ATPASTE2(driver, _sync_adtc_start) +#define driver_adtc_stop ATPASTE2(driver, _sync_send_cmd) +#define driver_read_word ATPASTE2(driver, _sync_read_word) +#define driver_write_word ATPASTE2(driver, _sync_write_word) +#define driver_start_read_blocks ATPASTE2(driver, _sync_start_read_blocks) +#define driver_wait_end_of_read_blocks ATPASTE2(driver, _sync_wait_end_of_read_blocks) +#define driver_start_write_blocks ATPASTE2(driver, _sync_start_write_blocks) +#define driver_wait_end_of_write_blocks ATPASTE2(driver, _sync_wait_end_of_write_blocks) +#endif + +#if (CONF_SDIO_SUPPORT == 1) +#define IS_SDIO() (sd_mmc_card->type & CARD_TYPE_SDIO) +#else +#define IS_SDIO() false +#endif + +/** This SD MMC stack supports only the high voltage */ +#define SD_MMC_VOLTAGE_SUPPORT \ + (OCR_VDD_27_28 | OCR_VDD_28_29 | OCR_VDD_29_30 | OCR_VDD_30_31 | OCR_VDD_31_32 | OCR_VDD_32_33) + +/** SD/MMC card states */ +enum card_state { + SD_MMC_CARD_STATE_READY = 0, /**< Ready to use */ + SD_MMC_CARD_STATE_DEBOUNCE = 1, /**< Debounce on going */ + SD_MMC_CARD_STATE_INIT = 2, /**< Initialization on going */ + SD_MMC_CARD_STATE_UNUSABLE = 3, /**< Unusable card */ + SD_MMC_CARD_STATE_NO_CARD = 4 /**< No SD/MMC card inserted */ +}; + +/** SD/MMC card information structure */ +struct sd_mmc_card { + uint32_t clock; /**< Card access clock */ + uint32_t capacity; /**< Card capacity in KBytes */ + uint16_t rca; /**< Relative card address */ + enum card_state state; /**< Card state */ + card_type_t type; /**< Card type */ + card_version_t version; /**< Card version */ + uint8_t bus_width; /**< Number of DATA lin on bus (MCI only) */ + uint8_t csd[CSD_REG_BSIZE]; /**< CSD register */ + uint8_t high_speed; /**< High speed card (1) */ +}; + +/** Card detect pin */ +static sd_mmc_detect_t *_cd; +/** Write protect pin */ +static sd_mmc_detect_t *_wp; + +/** SD/MMC card list */ +/** Note: Initialize card detect pin fields if present */ +static struct sd_mmc_card sd_mmc_cards[CONF_SD_MMC_MEM_CNT]; + +/** HAL driver instance */ +static void *sd_mmc_hal; +/** Index of current slot configurated */ +static uint8_t sd_mmc_slot_sel; +/** Pointer on current slot configurated */ +static struct sd_mmc_card *sd_mmc_card; +/** Number of block to read or write on the current transfer */ +static uint16_t sd_mmc_nb_block_to_tranfer = 0; +/** Number of block remaining to read or write on the current transfer */ +static uint16_t sd_mmc_nb_block_remaining = 0; + +/** SD/MMC transfer rate unit codes (10K) list */ +const uint32_t sd_mmc_trans_units[7] = {10, 100, 1000, 10000, 0, 0, 0}; +/** SD transfer multiplier factor codes (1/10) list */ +const uint32_t sd_trans_multipliers[16] = {0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80}; +/** MMC transfer multiplier factor codes (1/10) list */ +const uint32_t mmc_trans_multipliers[16] = {0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80}; + +/** \name MMC, SD and SDIO commands process */ +/** @{ */ +#if CONF_MMC_SUPPORT +static bool mmc_mci_op_cond(void); +static bool mmc_cmd6_set_bus_width(uint8_t bus_width); +static bool mmc_cmd6_set_high_speed(void); +static bool mmc_cmd8(uint8_t *b_authorize_high_speed); +static void mmc_decode_csd(void); +#endif +static bool sd_mci_op_cond(uint8_t v2); +static bool sdio_op_cond(void); +static bool sdio_get_max_speed(void); +static bool sdio_cmd52_set_bus_width(void); +static bool sdio_cmd52_set_high_speed(void); +static bool sd_cm6_set_high_speed(void); +static bool sd_cmd8(uint8_t *v2); +static bool sd_mmc_cmd9_mci(void); +static void sd_decode_csd(void); +static bool sd_mmc_cmd13(void); +#if (CONF_SDIO_SUPPORT == 1) +static bool sdio_cmd52(uint8_t rw_flag, uint8_t func_nb, uint32_t reg_addr, uint8_t rd_after_wr, uint8_t *io_data); +static bool sdio_cmd53(uint8_t rw_flag, uint8_t func_nb, uint32_t reg_addr, uint8_t inc_addr, uint32_t size, + bool access_block); +#endif +static bool sd_acmd6(void); +static bool sd_acmd51(void); +/** @} */ + +/** \name Internal function to process the initialization and install */ +/** @{ */ +static sd_mmc_err_t sd_mmc_select_slot(uint8_t slot); +static void sd_mmc_configure_slot(void); +static void sd_mmc_deselect_slot(void); +static bool sd_mmc_mci_card_init(void); +#if CONF_MMC_SUPPORT +static bool sd_mmc_mci_install_mmc(void); +#endif +/** @} */ + +/** \name Internal functions to manage a large timeout after a card insertion */ +/** @{ */ +#if CONF_OS_SUPPORT +#define SD_MMC_START_TIMEOUT() os_sleep(CONF_SD_MMC_DEBOUNCE) +#else +#define SD_MMC_START_TIMEOUT() +#endif +#define SD_MMC_IS_TIMEOUT() true +#define SD_MMC_STOP_TIMEOUT() +/** @} */ + +#if CONF_MMC_SUPPORT +/** + * \brief Sends operation condition command and read OCR (MCI only) + * - CMD1 sends operation condition command + * - CMD1 reads OCR + * + * \return true if success, otherwise false + */ +static bool mmc_mci_op_cond(void) +{ + uint32_t retry, resp; + + /* + * Timeout 1s = 400KHz / ((6+6)*8) cylces = 4200 retry + * 6 = cmd byte size + * 6 = response byte size + */ + retry = 4200; + do { + if (!driver_send_cmd(sd_mmc_hal, MMC_MCI_CMD1_SEND_OP_COND, SD_MMC_VOLTAGE_SUPPORT | OCR_ACCESS_MODE_SECTOR)) { + return false; + } + /* Check busy flag */ + resp = driver_get_response(sd_mmc_hal); + if (resp & OCR_POWER_UP_BUSY) { + /* Check OCR value */ + if ((resp & OCR_ACCESS_MODE_MASK) == OCR_ACCESS_MODE_SECTOR) { + sd_mmc_card->type |= CARD_TYPE_HC; + } + break; + } + if (retry-- == 0) { + return false; + } + } while (1); + return true; +} +#endif + +/** + * \brief Ask to all cards to send their operations conditions (MCI only). + * - ACMD41 sends operation condition command. + * - ACMD41 reads OCR + * + * \param v2 Shall be 1 if it is a SD card V2 + * + * \return true if success, otherwise false + */ +static bool sd_mci_op_cond(uint8_t v2) +{ + uint32_t arg, retry, resp; + + /* + * Timeout 1s = 400KHz / ((6+6+6+6)*8) cylces = 2100 retry + * 6 = cmd byte size + * 6 = response byte size + * 6 = cmd byte size + * 6 = response byte size + */ + retry = 2100; + do { + /* CMD55 - Indicate to the card that the next command is an + * application specific command rather than a standard command.*/ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD55_APP_CMD, 0)) { + return false; + } + + /* (ACMD41) Sends host OCR register */ + arg = SD_MMC_VOLTAGE_SUPPORT; + if (v2) { + arg |= SD_ACMD41_HCS; + } + /* Check response */ + if (!driver_send_cmd(sd_mmc_hal, SD_MCI_ACMD41_SD_SEND_OP_COND, arg)) { + return false; + } + resp = driver_get_response(sd_mmc_hal); + if (resp & OCR_POWER_UP_BUSY) { + /* Card is ready */ + if ((resp & OCR_CCS) != 0) { + sd_mmc_card->type |= CARD_TYPE_HC; + } + break; + } + if (retry-- == 0) { + return false; + } + } while (1); + return true; +} + +#if (CONF_SDIO_SUPPORT == 1) +/** + * \brief Try to get the SDIO card's operating condition + * - CMD5 to read OCR NF field + * - CMD5 to wait OCR power up busy + * - CMD5 to read OCR MP field + * sd_mmc_card->type is updated + * + * \return true if success, otherwise false + */ +static bool sdio_op_cond(void) +{ + uint32_t resp; + + /* CMD5 - SDIO send operation condition (OCR) command. */ + if (!driver_send_cmd(sd_mmc_hal, SDIO_CMD5_SEND_OP_COND, 0)) { + return true; /* No error but card type not updated */ + } + resp = driver_get_response(sd_mmc_hal); + if ((resp & OCR_SDIO_NF) == 0) { + return true; /* No error but card type not updated */ + } + + /* + * Wait card ready + * Timeout 1s = 400KHz / ((6+4)*8) cylces = 5000 retry + * 6 = cmd byte size + * 4(SPI) 6(MCI) = response byte size + */ + uint32_t cmd5_retry = 5000; + while (1) { + /* CMD5 - SDIO send operation condition (OCR) command.*/ + if (!driver_send_cmd(sd_mmc_hal, SDIO_CMD5_SEND_OP_COND, resp & SD_MMC_VOLTAGE_SUPPORT)) { + return false; + } + resp = driver_get_response(sd_mmc_hal); + if ((resp & OCR_POWER_UP_BUSY) == OCR_POWER_UP_BUSY) { + break; + } + if (cmd5_retry-- == 0) { + return false; + } + } + /* Update card type at the end of busy */ + if ((resp & OCR_SDIO_MP) > 0) { + sd_mmc_card->type = CARD_TYPE_SD_COMBO; + } else { + sd_mmc_card->type = CARD_TYPE_SDIO; + } + return true; /* No error and card type updated with SDIO type */ +} + +/** + * \brief Get SDIO max transfer speed in Hz. + * - CMD53 reads CIS area address in CCCR area. + * - Nx CMD53 search Fun0 tuple in CIS area + * - CMD53 reads TPLFE_MAX_TRAN_SPEED in Fun0 tuple + * - Compute maximum speed of SDIO + * and update sd_mmc_card->clock + * + * \return true if success, otherwise false + */ +static bool sdio_get_max_speed(void) +{ + uint32_t addr_new, addr_old; + uint8_t buf[6]; + uint32_t unit; + uint32_t mul; + uint8_t tplfe_max_tran_speed, i; + uint8_t addr_cis[4]; + + /* Read CIS area address in CCCR area */ + addr_old = SDIO_CCCR_CIS_PTR; + for (i = 0; i < 4; i++) { + sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, addr_old, 0, &addr_cis[i]); + addr_old++; + } + addr_old = addr_cis[0] + (addr_cis[1] << 8) + (addr_cis[2] << 16) + (addr_cis[3] << 24); + addr_new = addr_old; + + while (1) { + /* Read a sample of CIA area */ + for (i = 0; i < 3; i++) { + sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, addr_new, 0, &buf[i]); + addr_new++; + } + if (buf[0] == SDIO_CISTPL_END) { + return false; /* Tuple error */ + } + if (buf[0] == SDIO_CISTPL_FUNCE && buf[2] == 0x00) { + break; /* Fun0 tuple found */ + } + if (buf[1] == 0) { + return false; /* Tuple error */ + } + /* Next address */ + addr_new += buf[1] - 1; + if (addr_new > (addr_old + 256)) { + return false; /* Outoff CIS area */ + } + } + + /* Read all Fun0 tuple fields: fn0_blk_siz & max_tran_speed */ + addr_new -= 3; + for (i = 0; i < 6; i++) { + sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, addr_new, 0, &buf[i]); + addr_new++; + } + + tplfe_max_tran_speed = buf[5]; + if (tplfe_max_tran_speed > 0x32) { + /* Error on SDIO register, the high speed is not activated + * and the clock can not be more than 25MHz. + * This error is present on specific SDIO card + * (H&D wireless card - HDG104 WiFi SIP). + */ + tplfe_max_tran_speed = 0x32; /* 25Mhz */ + } + + /* Decode transfer speed in Hz.*/ + unit = sd_mmc_trans_units[tplfe_max_tran_speed & 0x7]; + mul = sd_trans_multipliers[(tplfe_max_tran_speed >> 3) & 0xF]; + sd_mmc_card->clock = unit * mul * 1000; + /** + * Note: A combo card shall be a Full-Speed SDIO card + * which supports upto 25MHz. + * A SDIO card alone can be: + * - a Low-Speed SDIO card which supports 400Khz minimum + * - a Full-Speed SDIO card which supports upto 25MHz + */ + return true; +} + +/** + * \brief CMD52 for SDIO - Switches the bus width mode to 4 + * + * \note sd_mmc_card->bus_width is updated. + * + * \return true if success, otherwise false + */ +static bool sdio_cmd52_set_bus_width(void) +{ + /** + * A SD memory card always supports bus 4bit + * A SD COMBO card always supports bus 4bit + * A SDIO Full-Speed alone always supports 4bit + * A SDIO Low-Speed alone can supports 4bit (Optional) + */ + uint8_t u8_value; + + /* Check 4bit support in 4BLS of "Card Capability" register */ + if (!sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, SDIO_CCCR_CAP, 0, &u8_value)) { + return false; + } + if ((u8_value & SDIO_CAP_4BLS) != SDIO_CAP_4BLS) { + /* No supported, it is not a protocol error */ + return true; + } + /* HS mode possible, then enable */ + u8_value = SDIO_BUSWIDTH_4B; + if (!sdio_cmd52(SDIO_CMD52_WRITE_FLAG, SDIO_CIA, SDIO_CCCR_BUS_CTRL, 1, &u8_value)) { + return false; + } + sd_mmc_card->bus_width = 4; + return true; +} + +/** + * \brief CMD52 for SDIO - Enable the high speed mode + * + * \note sd_mmc_card->high_speed is updated. + * \note sd_mmc_card->clock is updated. + * + * \return true if success, otherwise false + */ +static bool sdio_cmd52_set_high_speed(void) +{ + uint8_t u8_value; + + /* Check CIA.HS */ + if (!sdio_cmd52(SDIO_CMD52_READ_FLAG, SDIO_CIA, SDIO_CCCR_HS, 0, &u8_value)) { + return false; + } + if ((u8_value & SDIO_SHS) != SDIO_SHS) { + /* No supported, it is not a protocol error */ + return true; + } + /* HS mode possible, then enable */ + u8_value = SDIO_EHS; + if (!sdio_cmd52(SDIO_CMD52_WRITE_FLAG, SDIO_CIA, SDIO_CCCR_HS, 1, &u8_value)) { + return false; + } + sd_mmc_card->high_speed = 1; + sd_mmc_card->clock *= 2; + return true; +} + +#else +static bool sdio_op_cond(void) +{ + return true; /* No error but card type not updated */ +} +static bool sdio_get_max_speed(void) +{ + return false; +} +static bool sdio_cmd52_set_bus_width(void) +{ + return false; +} +static bool sdio_cmd52_set_high_speed(void) +{ + return false; +} +#endif + +/** + * \brief CMD6 for SD - Switch card in high speed mode + * + * \note CMD6 for SD is valid under the "trans" state. + * \note sd_mmc_card->high_speed is updated. + * \note sd_mmc_card->clock is updated. + * + * \return true if success, otherwise false + */ +static bool sd_cm6_set_high_speed(void) +{ + uint8_t switch_status[SD_SW_STATUS_BSIZE] = {0}; + + if (!driver_adtc_start(sd_mmc_hal, + SD_CMD6_SWITCH_FUNC, + SD_CMD6_MODE_SWITCH | SD_CMD6_GRP6_NO_INFLUENCE | SD_CMD6_GRP5_NO_INFLUENCE + | SD_CMD6_GRP4_NO_INFLUENCE | SD_CMD6_GRP3_NO_INFLUENCE | SD_CMD6_GRP2_DEFAULT + | SD_CMD6_GRP1_HIGH_SPEED, + SD_SW_STATUS_BSIZE, + 1, + true)) { + return false; + } + if (!driver_start_read_blocks(sd_mmc_hal, switch_status, 1)) { + return false; + } + if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) { + return false; + } + + if (driver_get_response(sd_mmc_hal) & CARD_STATUS_SWITCH_ERROR) { + return false; + } + if (SD_SW_STATUS_FUN_GRP1_RC(switch_status) == SD_SW_STATUS_FUN_GRP_RC_ERROR) { + /* No supported, it is not a protocol error */ + return true; + } + if (SD_SW_STATUS_FUN_GRP1_BUSY(switch_status)) { + return false; + } + /* CMD6 function switching period is within 8 clocks + * after the end bit of status data.*/ + driver_send_clock(sd_mmc_hal); + sd_mmc_card->high_speed = 1; + sd_mmc_card->clock *= 2; + return true; +} + +#if CONF_MMC_SUPPORT + +/** + * \brief CMD6 for MMC - Switches the bus width mode + * + * \note CMD6 is valid under the "trans" state. + * \note sd_mmc_card->bus_width is updated. + * + * \param bus_width Bus width to set + * + * \return true if success, otherwise false + */ +static bool mmc_cmd6_set_bus_width(uint8_t bus_width) +{ + uint32_t arg; + + switch (bus_width) { + case 8: + arg = MMC_CMD6_ACCESS_SET_BITS | MMC_CMD6_INDEX_BUS_WIDTH | MMC_CMD6_VALUE_BUS_WIDTH_8BIT; + break; + case 4: + arg = MMC_CMD6_ACCESS_SET_BITS | MMC_CMD6_INDEX_BUS_WIDTH | MMC_CMD6_VALUE_BUS_WIDTH_4BIT; + break; + default: + arg = MMC_CMD6_ACCESS_SET_BITS | MMC_CMD6_INDEX_BUS_WIDTH | MMC_CMD6_VALUE_BUS_WIDTH_1BIT; + break; + } + if (!driver_send_cmd(sd_mmc_hal, MMC_CMD6_SWITCH, arg)) { + return false; + } + if (driver_get_response(sd_mmc_hal) & CARD_STATUS_SWITCH_ERROR) { + /* No supported, it is not a protocol error */ + return false; + } + sd_mmc_card->bus_width = bus_width; + return true; +} + +/** + * \brief CMD6 for MMC - Switches in high speed mode + * + * \note CMD6 is valid under the "trans" state. + * \note sd_mmc_card->high_speed is updated. + * \note sd_mmc_card->clock is updated. + * + * \return true if success, otherwise false + */ +static bool mmc_cmd6_set_high_speed(void) +{ + if (!driver_send_cmd(sd_mmc_hal, + MMC_CMD6_SWITCH, + MMC_CMD6_ACCESS_WRITE_BYTE | MMC_CMD6_INDEX_HS_TIMING | MMC_CMD6_VALUE_HS_TIMING_ENABLE)) { + return false; + } + if (driver_get_response(sd_mmc_hal) & CARD_STATUS_SWITCH_ERROR) { + /* No supported, it is not a protocol error */ + return false; + } + sd_mmc_card->high_speed = 1; + sd_mmc_card->clock = 52000000lu; + return true; +} +#endif + +/** + * \brief CMD8 for SD card - Send Interface Condition Command. + * + * \note + * Send SD Memory Card interface condition, which includes host supply + * voltage information and asks the card whether card supports voltage. + * Should be performed at initialization time to detect the card type. + * + * \param v2 Pointer to v2 flag to update + * + * \return true if success, otherwise false + * with a update of \ref sd_mmc_err. + */ +static bool sd_cmd8(uint8_t *v2) +{ + uint32_t resp; + + *v2 = 0; + /* Test for SD version 2 */ + if (!driver_send_cmd(sd_mmc_hal, SD_CMD8_SEND_IF_COND, SD_CMD8_PATTERN | SD_CMD8_HIGH_VOLTAGE)) { + return true; /* It is not a V2 */ + } + /* Check R7 response */ + resp = driver_get_response(sd_mmc_hal); + if (resp == 0xFFFFFFFF) { + /* No compliance R7 value */ + return true; /* It is not a V2 */ + } + if ((resp & (SD_CMD8_MASK_PATTERN | SD_CMD8_MASK_VOLTAGE)) != (SD_CMD8_PATTERN | SD_CMD8_HIGH_VOLTAGE)) { + return false; + } + *v2 = 1; + return true; +} + +#if CONF_MMC_SUPPORT +/** + * \brief CMD8 - The card sends its EXT_CSD register as a block of data. + * + * \param b_authorize_high_speed Pointer to update with the high speed + * support information + * + * \return true if success, otherwise false + */ +static bool mmc_cmd8(uint8_t *b_authorize_high_speed) +{ + uint16_t i; + uint32_t ext_csd; + uint32_t sec_count; + + if (!driver_adtc_start(sd_mmc_hal, MMC_CMD8_SEND_EXT_CSD, 0, EXT_CSD_BSIZE, 1, false)) { + return false; + } + /* Read and decode Extended Extended CSD + * Note: The read access is done in byte to avoid a buffer + * of EXT_CSD_BSIZE Byte in stack.*/ + + /* Read card type */ + for (i = 0; i < (EXT_CSD_CARD_TYPE_INDEX + 4) / 4; i++) { + if (!driver_read_word(sd_mmc_hal, &ext_csd)) { + return false; + } + } + *b_authorize_high_speed = (ext_csd >> ((EXT_CSD_CARD_TYPE_INDEX % 4) * 8)) & MMC_CTYPE_52MHZ; + + if (MMC_CSD_C_SIZE(sd_mmc_card->csd) == 0xFFF) { + /* For high capacity SD/MMC card, + * memory capacity = SEC_COUNT * 512 byte */ + for (; i < (EXT_CSD_SEC_COUNT_INDEX + 4) / 4; i++) { + if (!driver_read_word(sd_mmc_hal, &sec_count)) { + return false; + } + } + sd_mmc_card->capacity = sec_count / 2; + } + for (; i < EXT_CSD_BSIZE / 4; i++) { + if (!driver_read_word(sd_mmc_hal, &sec_count)) { + return false; + } + } + return true; +} + +#endif + +/** + * \brief CMD9: Addressed card sends its card-specific + * data (CSD) on the CMD line mci. + * + * \return true if success, otherwise false + */ +static bool sd_mmc_cmd9_mci(void) +{ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD9_SEND_CSD, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + driver_get_response_128(sd_mmc_hal, sd_mmc_card->csd); + return true; +} + +#if CONF_MMC_SUPPORT +/** + * \brief Decodes MMC CSD register + */ +static void mmc_decode_csd(void) +{ + uint32_t unit; + uint32_t mul; + uint32_t tran_speed; + + /* Get MMC System Specification version supported by the card */ + switch (MMC_CSD_SPEC_VERS(sd_mmc_card->csd)) { + default: + case 0: + sd_mmc_card->version = CARD_VER_MMC_1_2; + break; + + case 1: + sd_mmc_card->version = CARD_VER_MMC_1_4; + break; + + case 2: + sd_mmc_card->version = CARD_VER_MMC_2_2; + break; + + case 3: + sd_mmc_card->version = CARD_VER_MMC_3; + break; + + case 4: + sd_mmc_card->version = CARD_VER_MMC_4; + break; + } + + /* Get MMC memory max transfer speed in Hz.*/ + tran_speed = CSD_TRAN_SPEED(sd_mmc_card->csd); + unit = sd_mmc_trans_units[tran_speed & 0x7]; + mul = mmc_trans_multipliers[(tran_speed >> 3) & 0xF]; + sd_mmc_card->clock = unit * mul * 1000; + + /* + * Get card capacity. + * ---------------------------------------------------- + * For normal SD/MMC card: + * memory capacity = BLOCKNR * BLOCK_LEN + * Where + * BLOCKNR = (C_SIZE+1) * MULT + * MULT = 2 ^ (C_SIZE_MULT+2) (C_SIZE_MULT < 8) + * BLOCK_LEN = 2 ^ READ_BL_LEN (READ_BL_LEN < 12) + * ---------------------------------------------------- + * For high capacity SD/MMC card: + * memory capacity = SEC_COUNT * 512 byte + */ + if (MMC_CSD_C_SIZE(sd_mmc_card->csd) != 0xFFF) { + uint32_t blocknr + = ((MMC_CSD_C_SIZE(sd_mmc_card->csd) + 1) * (1 << (MMC_CSD_C_SIZE_MULT(sd_mmc_card->csd) + 2))); + sd_mmc_card->capacity = blocknr * (1 << MMC_CSD_READ_BL_LEN(sd_mmc_card->csd)) / 1024; + } +} +#endif + +/** + * \brief Decodes SD CSD register + */ +static void sd_decode_csd(void) +{ + uint32_t unit; + uint32_t mul; + uint32_t tran_speed; + + /* Get SD memory maximum transfer speed in Hz. */ + tran_speed = CSD_TRAN_SPEED(sd_mmc_card->csd); + unit = sd_mmc_trans_units[tran_speed & 0x7]; + mul = sd_trans_multipliers[(tran_speed >> 3) & 0xF]; + sd_mmc_card->clock = unit * mul * 1000; + + /* + * Get card capacity. + * ---------------------------------------------------- + * For normal SD/MMC card: + * memory capacity = BLOCKNR * BLOCK_LEN + * Where + * BLOCKNR = (C_SIZE+1) * MULT + * MULT = 2 ^ (C_SIZE_MULT+2) (C_SIZE_MULT < 8) + * BLOCK_LEN = 2 ^ READ_BL_LEN (READ_BL_LEN < 12) + * ---------------------------------------------------- + * For high capacity SD card: + * memory capacity = (C_SIZE+1) * 512K byte + */ + if (CSD_STRUCTURE_VERSION(sd_mmc_card->csd) >= SD_CSD_VER_2_0) { + sd_mmc_card->capacity = (SD_CSD_2_0_C_SIZE(sd_mmc_card->csd) + 1) * 512; + } else { + uint32_t blocknr + = ((SD_CSD_1_0_C_SIZE(sd_mmc_card->csd) + 1) * (1 << (SD_CSD_1_0_C_SIZE_MULT(sd_mmc_card->csd) + 2))); + sd_mmc_card->capacity = blocknr * (1 << SD_CSD_1_0_READ_BL_LEN(sd_mmc_card->csd)) / 1024; + } +} + +/** + * \brief CMD13 - Addressed card sends its status register. + * This function waits the clear of the busy flag + * + * \return true if success, otherwise false + */ +static bool sd_mmc_cmd13(void) +{ + uint32_t nec_timeout; + + /* Wait for data ready status. + * Nec timing: 0 to unlimited + * However a timeout is used. + * 200 000 * 8 cycles + */ + nec_timeout = 200000; + do { + if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD13_SEND_STATUS, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + /* Check busy flag */ + if (driver_get_response(sd_mmc_hal) & CARD_STATUS_READY_FOR_DATA) { + break; + } + if (nec_timeout-- == 0) { + return false; + } + } while (1); + + return true; +} + +#if (CONF_SDIO_SUPPORT == 1) +/** + * \brief CMD52 - SDIO IO_RW_DIRECT command + * + * \param rw_flag Direction, 1:write, 0:read. + * \param func_nb Number of the function. + * \param rd_after_wr Read after Write flag. + * \param reg_addr register address. + * \param io_data Pointer to input argument and response buffer. + * + * \return true if success, otherwise false + */ +static bool sdio_cmd52(uint8_t rw_flag, uint8_t func_nb, uint32_t reg_addr, uint8_t rd_after_wr, uint8_t *io_data) +{ + ASSERT(io_data != NULL); + if (!driver_send_cmd(sd_mmc_hal, + SDIO_CMD52_IO_RW_DIRECT, + ((uint32_t)*io_data << SDIO_CMD52_WR_DATA) | ((uint32_t)rw_flag << SDIO_CMD52_RW_FLAG) + | ((uint32_t)func_nb << SDIO_CMD52_FUNCTION_NUM) + | ((uint32_t)rd_after_wr << SDIO_CMD52_RAW_FLAG) + | ((uint32_t)reg_addr << SDIO_CMD52_REG_ADRR))) { + return false; + } + *io_data = driver_get_response(sd_mmc_hal) & 0xFF; + return true; +} + +/** + * \brief CMD53 - SDIO IO_RW_EXTENDED command + * This implementation support only the SDIO multi-byte transfer mode which is + * similar to the single block transfer on memory. + * Note: The SDIO block transfer mode is optional for SDIO card. + * + * \param rw_flag Direction, 1:write, 0:read. + * \param func_nb Number of the function. + * \param reg_addr Register address. + * \param inc_addr 1:Incrementing address, 0: fixed. + * \param size Transfer data size. + * \param access_block true, if the block access (DMA) is used + * + * \return true if success, otherwise false + */ +static bool sdio_cmd53(uint8_t rw_flag, uint8_t func_nb, uint32_t reg_addr, uint8_t inc_addr, uint32_t size, + bool access_block) +{ + ASSERT(size != 0); + ASSERT(size <= 512); + + return driver_adtc_start( + sd_mmc_hal, + (rw_flag == SDIO_CMD53_READ_FLAG) ? SDIO_CMD53_IO_R_BYTE_EXTENDED : SDIO_CMD53_IO_W_BYTE_EXTENDED, + ((size % 512) << SDIO_CMD53_COUNT) | ((uint32_t)reg_addr << SDIO_CMD53_REG_ADDR) + | ((uint32_t)inc_addr << SDIO_CMD53_OP_CODE) | ((uint32_t)0 << SDIO_CMD53_BLOCK_MODE) + | ((uint32_t)func_nb << SDIO_CMD53_FUNCTION_NUM) | ((uint32_t)rw_flag << SDIO_CMD53_RW_FLAG), + size, + 1, + access_block); +} +#endif + +/** + * \brief ACMD6 - Define the data bus width to 4 bits bus + * + * \return true if success, otherwise false + */ +static bool sd_acmd6(void) +{ + /* CMD55 - Indicate to the card that the next command is an + * application specific command rather than a standard command.*/ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD55_APP_CMD, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + /* 10b = 4 bits bus */ + if (!driver_send_cmd(sd_mmc_hal, SD_ACMD6_SET_BUS_WIDTH, 0x2)) { + return false; + } + sd_mmc_card->bus_width = 4; + return true; +} + +/** + * \brief ACMD51 - Read the SD Configuration Register. + * + * \note + * SD Card Configuration Register (SCR) provides information on the SD Memory + * Card's special features that were configured into the given card. The size + * of SCR register is 64 bits. + * + * + * \return true if success, otherwise false + */ +static bool sd_acmd51(void) +{ + uint8_t scr[SD_SCR_REG_BSIZE]; + + /* CMD55 - Indicate to the card that the next command is an + * application specific command rather than a standard command.*/ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD55_APP_CMD, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + if (!driver_adtc_start(sd_mmc_hal, SD_ACMD51_SEND_SCR, 0, SD_SCR_REG_BSIZE, 1, true)) { + return false; + } + if (!driver_start_read_blocks(sd_mmc_hal, scr, 1)) { + return false; + } + if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) { + return false; + } + + /* Get SD Memory Card - Spec. Version */ + switch (SD_SCR_SD_SPEC(scr)) { + case SD_SCR_SD_SPEC_1_0_01: + sd_mmc_card->version = CARD_VER_SD_1_0; + break; + + case SD_SCR_SD_SPEC_1_10: + sd_mmc_card->version = CARD_VER_SD_1_10; + break; + + case SD_SCR_SD_SPEC_2_00: + if (SD_SCR_SD_SPEC3(scr) == SD_SCR_SD_SPEC_3_00) { + sd_mmc_card->version = CARD_VER_SD_3_0; + } else { + sd_mmc_card->version = CARD_VER_SD_2_0; + } + break; + + default: + sd_mmc_card->version = CARD_VER_SD_1_0; + break; + } + return true; +} + +/** + * \brief Select a card slot and initialize the associated driver + * + * \param slot Card slot number + * + * \retval SD_MMC_ERR_SLOT Wrong slot number + * \retval SD_MMC_ERR_NO_CARD No card present on slot + * \retval SD_MMC_ERR_UNUSABLE Unusable card + * \retval SD_MMC_INIT_ONGOING Card initialization requested + * \retval SD_MMC_OK Card present + */ +static sd_mmc_err_t sd_mmc_select_slot(uint8_t slot) +{ + if (slot >= CONF_SD_MMC_MEM_CNT) { + return SD_MMC_ERR_SLOT; + } + + if (_cd && _cd[slot].pin != -1) { + /** Card Detect pins */ + if (gpio_get_pin_level(_cd[slot].pin) != _cd[slot].val) { + if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) { + SD_MMC_STOP_TIMEOUT(); + } + sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_NO_CARD; + return SD_MMC_ERR_NO_CARD; + } + if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD) { + /* A card plug on going, but this is not initialized */ + sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_DEBOUNCE; + /* Debounce + Power On Setup */ + SD_MMC_START_TIMEOUT(); + return SD_MMC_ERR_NO_CARD; + } + if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_DEBOUNCE) { + if (!SD_MMC_IS_TIMEOUT()) { + /* Debounce on going */ + return SD_MMC_ERR_NO_CARD; + } + /* Card is not initialized */ + sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT; + /* Set 1-bit bus width and low clock for initialization */ + sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT; + sd_mmc_cards[slot].bus_width = 1; + sd_mmc_cards[slot].high_speed = 0; + } + if (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE) { + return SD_MMC_ERR_UNUSABLE; + } + } else { + /* No pin card detection, then always try to install it */ + if ((sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_NO_CARD) + || (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_UNUSABLE)) { + /* Card is not initialized */ + sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_INIT; + /* Set 1-bit bus width and low clock for initialization */ + sd_mmc_cards[slot].clock = SDMMC_CLOCK_INIT; + sd_mmc_cards[slot].bus_width = 1; + sd_mmc_cards[slot].high_speed = 0; + } + } + + ASSERT(!(sd_mmc_slot_sel != slot && sd_mmc_nb_block_remaining != 0)); + + /* Initialize interface */ + sd_mmc_slot_sel = slot; + sd_mmc_card = &sd_mmc_cards[slot]; + sd_mmc_configure_slot(); + return (sd_mmc_cards[slot].state == SD_MMC_CARD_STATE_INIT) ? SD_MMC_INIT_ONGOING : SD_MMC_OK; +} + +/** + * \brief Configures the driver with the selected card configuration + */ +static void sd_mmc_configure_slot(void) +{ + driver_select_device( + sd_mmc_hal, sd_mmc_slot_sel, sd_mmc_card->clock, sd_mmc_card->bus_width, sd_mmc_card->high_speed); +} + +/** + * \brief Deselect the current card slot + */ +static void sd_mmc_deselect_slot(void) +{ + if (sd_mmc_slot_sel < CONF_SD_MMC_MEM_CNT) { + driver_deselect_device(sd_mmc_hal, sd_mmc_slot_sel); + } +} + +/** + * \brief Initialize the SD card in MCI mode. + * + * \note + * This function runs the initialization procedure and the identification + * process, then it sets the SD/MMC card in transfer state. + * At last, it will automaticly enable maximum bus width and transfer speed. + * + * \return true if success, otherwise false + */ +static bool sd_mmc_mci_card_init(void) +{ + uint8_t v2 = 0; +#if (CONF_SDIO_SUPPORT == 1) + uint8_t data = 0x08; +#endif + + /* In first, try to install SD/SDIO card */ + sd_mmc_card->type = CARD_TYPE_SD; + sd_mmc_card->version = CARD_VER_UNKNOWN; + sd_mmc_card->rca = 0; + + /* Card need of 74 cycles clock minimum to start */ + driver_send_clock(sd_mmc_hal); + +#if (CONF_SDIO_SUPPORT == 1) + /* CMD52 Reset SDIO */ + sdio_cmd52(SDIO_CMD52_WRITE_FLAG, SDIO_CIA, SDIO_CCCR_IOA, 0, &data); +#endif + + /* CMD0 - Reset all cards to idle state.*/ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD0_GO_IDLE_STATE, 0)) { + return false; + } + if (!sd_cmd8(&v2)) { + return false; + } + /* Try to get the SDIO card's operating condition */ + if (!sdio_op_cond()) { + return false; + } + + if (sd_mmc_card->type & CARD_TYPE_SD) { + /* Try to get the SD card's operating condition */ + if (!sd_mci_op_cond(v2)) { + /* It is not a SD card */ +#if CONF_MMC_SUPPORT + sd_mmc_card->type = CARD_TYPE_MMC; + return sd_mmc_mci_install_mmc(); +#else + sd_mmc_card->type = CARD_TYPE_UNKNOWN; + return false; +#endif + } + } + + if (sd_mmc_card->type & CARD_TYPE_SD) { + /* SD MEMORY, Put the Card in Identify Mode + * Note: The CID is not used in this stack */ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD2_ALL_SEND_CID, 0)) { + return false; + } + } + /* Ask the card to publish a new relative address (RCA).*/ + if (!driver_send_cmd(sd_mmc_hal, SD_CMD3_SEND_RELATIVE_ADDR, 0)) { + return false; + } + sd_mmc_card->rca = (driver_get_response(sd_mmc_hal) >> 16) & 0xFFFF; + + /* SD MEMORY, Get the Card-Specific Data */ + if (sd_mmc_card->type & CARD_TYPE_SD) { + if (!sd_mmc_cmd9_mci()) { + return false; + } + sd_decode_csd(); + } + /* Select the and put it into Transfer Mode */ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD7_SELECT_CARD_CMD, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + /* SD MEMORY, Read the SCR to get card version */ + if (sd_mmc_card->type & CARD_TYPE_SD) { + if (!sd_acmd51()) { + return false; + } + } + if (IS_SDIO()) { + if (!sdio_get_max_speed()) { + return false; + } + } + if ((4 <= driver_get_bus_width(sd_mmc_hal, sd_mmc_slot_sel))) { + /* TRY to enable 4-bit mode */ + if (IS_SDIO()) { + if (!sdio_cmd52_set_bus_width()) { + return false; + } + } + if (sd_mmc_card->type & CARD_TYPE_SD) { + if (!sd_acmd6()) { + return false; + } + } + /* Switch to selected bus mode */ + sd_mmc_configure_slot(); + } + if (driver_is_high_speed_capable(sd_mmc_hal)) { + /* TRY to enable High-Speed Mode */ + if (IS_SDIO()) { + if (!sdio_cmd52_set_high_speed()) { + return false; + } + } + if (sd_mmc_card->type & CARD_TYPE_SD) { + if (sd_mmc_card->version > CARD_VER_SD_1_0) { + if (!sd_cm6_set_high_speed()) { + return false; + } + } + } + /* Valid new configuration */ + sd_mmc_configure_slot(); + } + /* SD MEMORY, Set default block size */ + if (sd_mmc_card->type & CARD_TYPE_SD) { + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD16_SET_BLOCKLEN, SD_MMC_BLOCK_SIZE)) { + return false; + } + } + return true; +} + +#if CONF_MMC_SUPPORT +/** + * \brief Initialize the MMC card in MCI mode. + * + * \note + * This function runs the initialization procedure and the identification + * process, then it sets the SD/MMC card in transfer state. + * At last, it will automaticly enable maximum bus width and transfer speed. + * + * \return true if success, otherwise false + */ +static bool sd_mmc_mci_install_mmc(void) +{ + uint8_t b_authorize_high_speed; + + /* CMD0 - Reset all cards to idle state. */ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_MCI_CMD0_GO_IDLE_STATE, 0)) { + return false; + } + + if (!mmc_mci_op_cond()) { + return false; + } + + /* Put the Card in Identify Mode + * Note: The CID is not used in this stack*/ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD2_ALL_SEND_CID, 0)) { + return false; + } + /* Assign relative address to the card.*/ + sd_mmc_card->rca = 1; + if (!driver_send_cmd(sd_mmc_hal, MMC_CMD3_SET_RELATIVE_ADDR, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + /* Get the Card-Specific Data */ + if (!sd_mmc_cmd9_mci()) { + return false; + } + mmc_decode_csd(); + /* Select the and put it into Transfer Mode */ + if (!driver_send_cmd(sd_mmc_hal, SDMMC_CMD7_SELECT_CARD_CMD, (uint32_t)sd_mmc_card->rca << 16)) { + return false; + } + if (sd_mmc_card->version >= CARD_VER_MMC_4) { + /* For MMC 4.0 Higher version + * Get EXT_CSD */ + if (!mmc_cmd8(&b_authorize_high_speed)) { + return false; + } + if (4 <= driver_get_bus_width(sd_mmc_hal, sd_mmc_slot_sel)) { + /* Enable more bus width */ + if (!mmc_cmd6_set_bus_width(driver_get_bus_width(sd_mmc_hal, sd_mmc_slot_sel))) { + return false; + } + /* Reinitialize the slot with the bus width */ + sd_mmc_configure_slot(); + } + if (driver_is_high_speed_capable(sd_mmc_hal) && b_authorize_high_speed) { + /* Enable HS */ + if (!mmc_cmd6_set_high_speed()) { + return false; + } + /* Reinitialize the slot with the new speed */ + sd_mmc_configure_slot(); + } + } else { + /* Reinitialize the slot with the new speed */ + sd_mmc_configure_slot(); + } + + uint8_t retry = 10; + while (retry--) { + /* Retry is a WORKAROUND for no compliance card (Atmel Internal ref. MMC19): + * These cards seem not ready immediatly + * after the end of busy of mmc_cmd6_set_high_speed()*/ + + /* Set default block size */ + if (driver_send_cmd(sd_mmc_hal, SDMMC_CMD16_SET_BLOCKLEN, SD_MMC_BLOCK_SIZE)) { + return true; + } + } + return false; +} +#endif + +/*--------------------- PUBLIC FUNCTIONS ----------------------------*/ + +void sd_mmc_init(void *hal, sd_mmc_detect_t *card_detects, sd_mmc_detect_t *wp_detects) +{ + /* GPIO will be used to detect card and write protect. + * The related clocks and pinmux must be configurated in good + * condition. */ + + for (uint8_t slot = 0; slot < CONF_SD_MMC_MEM_CNT; slot++) { + sd_mmc_cards[slot].state = SD_MMC_CARD_STATE_NO_CARD; + } + sd_mmc_slot_sel = 0xFF; /* No slot configurated */ + sd_mmc_hal = hal; + _cd = card_detects; + _wp = wp_detects; +} + +uint8_t sd_mmc_nb_slot(void) +{ + return CONF_SD_MMC_MEM_CNT; +} + +sd_mmc_err_t sd_mmc_check(uint8_t slot) +{ + sd_mmc_err_t sd_mmc_err; + + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_INIT_ONGOING) { + sd_mmc_deselect_slot(); + return sd_mmc_err; + } + + /* Initialization of the card requested */ + if (sd_mmc_mci_card_init()) { + sd_mmc_card->state = SD_MMC_CARD_STATE_READY; + sd_mmc_deselect_slot(); + /* To notify that the card has been just initialized + * It is necessary for USB Device MSC */ + return SD_MMC_INIT_ONGOING; + } + sd_mmc_card->state = SD_MMC_CARD_STATE_UNUSABLE; + sd_mmc_deselect_slot(); + return SD_MMC_ERR_UNUSABLE; +} + +card_type_t sd_mmc_get_type(uint8_t slot) +{ + if (SD_MMC_OK != sd_mmc_select_slot(slot)) { + return CARD_TYPE_UNKNOWN; + } + sd_mmc_deselect_slot(); + return sd_mmc_card->type; +} + +card_version_t sd_mmc_get_version(uint8_t slot) +{ + if (SD_MMC_OK != sd_mmc_select_slot(slot)) { + return CARD_VER_UNKNOWN; + } + sd_mmc_deselect_slot(); + return sd_mmc_card->version; +} + +uint32_t sd_mmc_get_capacity(uint8_t slot) +{ + if (SD_MMC_OK != sd_mmc_select_slot(slot)) { + return 0; + } + sd_mmc_deselect_slot(); + return sd_mmc_card->capacity; +} + +bool sd_mmc_is_write_protected(uint8_t slot) +{ + /* No detection, always writable */ + if (!_wp || _wp[slot].pin == -1) { + return false; + } + /* Write Protect Detect */ + if (gpio_get_pin_level(_wp[slot].pin) == _wp[slot].val) { + return true; + } + return false; +} + +sd_mmc_err_t sd_mmc_init_read_blocks(uint8_t slot, uint32_t start, uint16_t nb_block) +{ + sd_mmc_err_t sd_mmc_err; + uint32_t cmd, arg, resp; + + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_OK) { + return sd_mmc_err; + } + + /* Wait for data ready status */ + if (!sd_mmc_cmd13()) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + + if (nb_block > 1) { + cmd = SDMMC_CMD18_READ_MULTIPLE_BLOCK; + } else { + cmd = SDMMC_CMD17_READ_SINGLE_BLOCK; + } + /* + * SDSC Card (CCS=0) uses byte unit address, + * SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit). + */ + if (sd_mmc_card->type & CARD_TYPE_HC) { + arg = start; + } else { + arg = (start * SD_MMC_BLOCK_SIZE); + } + + if (!driver_adtc_start(sd_mmc_hal, cmd, arg, SD_MMC_BLOCK_SIZE, nb_block, true)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + /* Check response */ + resp = driver_get_response(sd_mmc_hal); + if (resp & CARD_STATUS_ERR_RD_WR) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + + sd_mmc_nb_block_remaining = nb_block; + sd_mmc_nb_block_to_tranfer = nb_block; + return SD_MMC_OK; +} + +sd_mmc_err_t sd_mmc_start_read_blocks(void *dest, uint16_t nb_block) +{ + ASSERT(sd_mmc_nb_block_remaining >= nb_block); + + if (!driver_start_read_blocks(sd_mmc_hal, dest, nb_block)) { + sd_mmc_nb_block_remaining = 0; + return SD_MMC_ERR_COMM; + } + sd_mmc_nb_block_remaining -= nb_block; + return SD_MMC_OK; +} + +sd_mmc_err_t sd_mmc_wait_end_of_read_blocks(bool abort) +{ + if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) { + return SD_MMC_ERR_COMM; + } + if (abort) { + sd_mmc_nb_block_remaining = 0; + } else if (sd_mmc_nb_block_remaining) { + return SD_MMC_OK; + } + + /* All blocks are transfered then stop read operation */ + if (sd_mmc_nb_block_to_tranfer == 1) { + /* Single block transfer, then nothing to do */ + sd_mmc_deselect_slot(); + return SD_MMC_OK; + } + /* WORKAROUND for no compliance card (Atmel Internal ref. !MMC7 !SD19): + * The errors on this command must be ignored + * and one retry can be necessary in SPI mode for no compliance card.*/ + if (!driver_adtc_stop(sd_mmc_hal, SDMMC_CMD12_STOP_TRANSMISSION, 0)) { + driver_adtc_stop(sd_mmc_hal, SDMMC_CMD12_STOP_TRANSMISSION, 0); + } + sd_mmc_deselect_slot(); + return SD_MMC_OK; +} + +sd_mmc_err_t sd_mmc_init_write_blocks(uint8_t slot, uint32_t start, uint16_t nb_block) +{ + sd_mmc_err_t sd_mmc_err; + uint32_t cmd, arg, resp; + + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_OK) { + return sd_mmc_err; + } + if (sd_mmc_is_write_protected(slot)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_WP; + } + + if (nb_block > 1) { + cmd = SDMMC_CMD25_WRITE_MULTIPLE_BLOCK; + } else { + cmd = SDMMC_CMD24_WRITE_BLOCK; + } + /* + * SDSC Card (CCS=0) uses byte unit address, + * SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit). + */ + if (sd_mmc_card->type & CARD_TYPE_HC) { + arg = start; + } else { + arg = (start * SD_MMC_BLOCK_SIZE); + } + if (!driver_adtc_start(sd_mmc_hal, cmd, arg, SD_MMC_BLOCK_SIZE, nb_block, true)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + /* Check response */ + resp = driver_get_response(sd_mmc_hal); + if (resp & CARD_STATUS_ERR_RD_WR) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + + sd_mmc_nb_block_remaining = nb_block; + sd_mmc_nb_block_to_tranfer = nb_block; + return SD_MMC_OK; +} + +sd_mmc_err_t sd_mmc_start_write_blocks(const void *src, uint16_t nb_block) +{ + ASSERT(sd_mmc_nb_block_remaining >= nb_block); + if (!driver_start_write_blocks(sd_mmc_hal, src, nb_block)) { + sd_mmc_nb_block_remaining = 0; + return SD_MMC_ERR_COMM; + } + sd_mmc_nb_block_remaining -= nb_block; + return SD_MMC_OK; +} + +sd_mmc_err_t sd_mmc_wait_end_of_write_blocks(bool abort) +{ + if (!driver_wait_end_of_write_blocks(sd_mmc_hal)) { + return SD_MMC_ERR_COMM; + } + if (abort) { + sd_mmc_nb_block_remaining = 0; + } else if (sd_mmc_nb_block_remaining) { + return SD_MMC_OK; + } + + /* All blocks are transfered then stop write operation */ + if (sd_mmc_nb_block_to_tranfer == 1) { + /* Single block transfer, then nothing to do */ + sd_mmc_deselect_slot(); + return SD_MMC_OK; + } + + /* Note: SPI multiblock writes terminate using a special + * token, not a STOP_TRANSMISSION request.*/ + if (!driver_adtc_stop(sd_mmc_hal, SDMMC_CMD12_STOP_TRANSMISSION, 0)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + + sd_mmc_deselect_slot(); + return SD_MMC_OK; +} + +#if (CONF_SDIO_SUPPORT == 1) +sd_mmc_err_t sdio_read_direct(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t *dest) +{ + sd_mmc_err_t sd_mmc_err; + + if (dest == NULL) { + return SD_MMC_ERR_PARAM; + } + + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_OK) { + return sd_mmc_err; + } + + if (!sdio_cmd52(SDIO_CMD52_READ_FLAG, func_num, addr, 0, dest)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + sd_mmc_deselect_slot(); + return SD_MMC_OK; +} + +sd_mmc_err_t sdio_write_direct(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t data) +{ + sd_mmc_err_t sd_mmc_err; + + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_OK) { + return sd_mmc_err; + } + + if (!sdio_cmd52(SDIO_CMD52_WRITE_FLAG, func_num, addr, 0, &data)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + + sd_mmc_deselect_slot(); + return SD_MMC_OK; +} + +sd_mmc_err_t sdio_read_extended(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t inc_addr, uint8_t *dest, + uint16_t size) +{ + sd_mmc_err_t sd_mmc_err; + + if ((size == 0) || (size > 512)) { + return SD_MMC_ERR_PARAM; + } + + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_OK) { + return sd_mmc_err; + } + + if (!sdio_cmd53(SDIO_CMD53_READ_FLAG, func_num, addr, inc_addr, size, true)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + if (!driver_start_read_blocks(sd_mmc_hal, dest, 1)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + if (!driver_wait_end_of_read_blocks(sd_mmc_hal)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + + sd_mmc_deselect_slot(); + return SD_MMC_OK; +} + +sd_mmc_err_t sdio_write_extended(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t inc_addr, uint8_t *src, + uint16_t size) +{ + sd_mmc_err_t sd_mmc_err; + + if ((size == 0) || (size > 512)) { + return SD_MMC_ERR_PARAM; + } + + sd_mmc_err = sd_mmc_select_slot(slot); + if (sd_mmc_err != SD_MMC_OK) { + return sd_mmc_err; + } + + if (!sdio_cmd53(SDIO_CMD53_WRITE_FLAG, func_num, addr, inc_addr, size, true)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + if (!driver_start_write_blocks(sd_mmc_hal, src, 1)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + if (!driver_wait_end_of_write_blocks(sd_mmc_hal)) { + sd_mmc_deselect_slot(); + return SD_MMC_ERR_COMM; + } + + sd_mmc_deselect_slot(); + return SD_MMC_OK; +} +#endif + +/** @} */ diff --git a/ports/atmel-samd/sd_mmc/sd_mmc.h b/ports/atmel-samd/sd_mmc/sd_mmc.h new file mode 100644 index 000000000..1437e5efd --- /dev/null +++ b/ports/atmel-samd/sd_mmc/sd_mmc.h @@ -0,0 +1,310 @@ +/** + * \file + * + * \brief Common SD/MMC stack header file + * + * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries. + * + * \asf_license_start + * + * \page License + * + * Subject to your compliance with these terms, you may use Microchip + * software and any derivatives exclusively with Microchip products. + * It is your responsibility to comply with third party license terms applicable + * to your use of third party software (including open source software) that + * may accompany Microchip software. + * + * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, + * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, + * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, + * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE + * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL + * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE + * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE + * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT + * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY + * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, + * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a> + */ + +#ifndef SD_MMC_H_INCLUDED +#define SD_MMC_H_INCLUDED + +#include "compiler.h" +#include "conf_sd_mmc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \ingroup common_memory + * \defgroup sd_mmc_stack_group SD/MMC/SDIO common stack + * + * SD/MMC/SDIO basic APIs used by SD/MMC/SDIO memory + * APIs (\ref sd_mmc_stack_mem_group). + * Also, it can be used by application which use the SDIO card + * or specific application which does not need of File System. + * + * For usual application which use the SD/MMC card in + * memory mode with a file system, please refer to + * \ref sd_mmc_stack_mem_group. + * @{ + */ + +typedef uint8_t sd_mmc_err_t; /**< Type of return error code */ + +/** \name Return error codes */ +/** @{ */ +#define SD_MMC_OK 0 /**< No error */ +#define SD_MMC_INIT_ONGOING 1 /**< Card not initialized */ +#define SD_MMC_ERR_NO_CARD 2 /**< No SD/MMC card inserted */ +#define SD_MMC_ERR_UNUSABLE 3 /**< Unusable card */ +#define SD_MMC_ERR_SLOT 4 /**< Slot unknow */ +#define SD_MMC_ERR_COMM 5 /**< General communication error */ +#define SD_MMC_ERR_PARAM 6 /**< Illeage input parameter */ +#define SD_MMC_ERR_WP 7 /**< Card write protected */ +/** @} */ + +typedef uint8_t card_type_t; /**< Type of card type */ + +/** \name Card Types */ +/** @{ */ +#define CARD_TYPE_UNKNOWN (0) /**< Unknown type card */ +#define CARD_TYPE_SD (1 << 0) /**< SD card */ +#define CARD_TYPE_MMC (1 << 1) /**< MMC card */ +#define CARD_TYPE_SDIO (1 << 2) /**< SDIO card */ +#define CARD_TYPE_HC (1 << 3) /**< High capacity card */ +/** SD combo card (io + memory) */ +#define CARD_TYPE_SD_COMBO (CARD_TYPE_SD | CARD_TYPE_SDIO) +/** @} */ + +typedef uint8_t card_version_t; /**< Type of card version */ + +/** \name Card Versions */ +/** @{ */ +#define CARD_VER_UNKNOWN (0) /**< Unknown card version */ +#define CARD_VER_SD_1_0 (0x10) /**< SD version 1.0 and 1.01 */ +#define CARD_VER_SD_1_10 (0x1A) /**< SD version 1.10 */ +#define CARD_VER_SD_2_0 (0X20) /**< SD version 2.00 */ +#define CARD_VER_SD_3_0 (0X30) /**< SD version 3.0X */ +#define CARD_VER_MMC_1_2 (0x12) /**< MMC version 1.2 */ +#define CARD_VER_MMC_1_4 (0x14) /**< MMC version 1.4 */ +#define CARD_VER_MMC_2_2 (0x22) /**< MMC version 2.2 */ +#define CARD_VER_MMC_3 (0x30) /**< MMC version 3 */ +#define CARD_VER_MMC_4 (0x40) /**< MMC version 4 */ +/** @} */ + +/** Card detect setting */ +typedef struct sd_mmc_detect { + int16_t pin; /**< Detection pin, -1 if no such pin */ + uint16_t val; /**< Detection value */ +} sd_mmc_detect_t; + +/** This SD MMC stack uses the maximum block size autorized (512 bytes) */ +#define SD_MMC_BLOCK_SIZE 512 + +/** + * \brief Initialize the SD/MMC stack and low level driver required + * \param[in] hal Pointer to HAL instance + * \param[in] card_detects Pointer to list of card detect settings, + * list size should be \ref CONF_SD_MMC_MEM_CNT + * \param[in] wp_detects Pointer to list of write protect detect settings + * list size should be \ref CONF_SD_MMC_MEM_CNT + */ +void sd_mmc_init(void *hal, sd_mmc_detect_t *card_detects, sd_mmc_detect_t *wp_detects); + +/** \brief Return the number of slot available + * + * \return Number of card slot available + */ +uint8_t sd_mmc_nb_slot(void); + +/** \brief Performs a card checks + * + * \param[in] slot Card slot to use + * + * \retval SD_MMC_OK Card ready + * \retval SD_MMC_INIT_ONGOING Initialization on going + * \retval SD_MMC_ERR_NO_CARD Card not present in slot + * \retval Other value for error cases, see \ref sd_mmc_err_t + */ +sd_mmc_err_t sd_mmc_check(uint8_t slot); + +/** \brief Get the card type + * + * \param[in] slot Card slot + * + * \return Card type (\ref card_type_t) + */ +card_type_t sd_mmc_get_type(uint8_t slot); + +/** \brief Get the card version + * + * \param[in] slot Card slot + * + * \return Card version (\ref card_version_t) + */ +card_version_t sd_mmc_get_version(uint8_t slot); + +/** \brief Get the memory capacity + * + * \param[in] slot Card slot + * + * \return Capacity (unit KB) + */ +uint32_t sd_mmc_get_capacity(uint8_t slot); + +/** \brief Get the card write protection status + * + * \param[in] slot Card slot + * + * \return true, if write portected + */ +bool sd_mmc_is_write_protected(uint8_t slot); + +/** + * \brief Initialize the read blocks of data from the card. + * + * \param[in] slot Card slot to use + * \param[in] start Start block number to to read. + * \param[in] nb_block Total number of blocks to be read. + * + * \return return SD_MMC_OK if success, + * otherwise return an error code (\ref sd_mmc_err_t). + */ +sd_mmc_err_t sd_mmc_init_read_blocks(uint8_t slot, uint32_t start, uint16_t nb_block); + +/** + * \brief Start the read blocks of data from the card. + * + * \param[out] dest Pointer to read buffer. + * \param[in] nb_block Number of blocks to be read. + * + * \return return SD_MMC_OK if started, + * otherwise return an error code (\ref sd_mmc_err_t). + */ +sd_mmc_err_t sd_mmc_start_read_blocks(void *dest, uint16_t nb_block); + +/** + * \brief Wait the end of read blocks of data from the card. + * + * \param[in] abort Abort reading process initialized by + * \ref sd_mmc_init_read_blocks() after the reading issued by + * \ref sd_mmc_start_read_blocks() is done + * + * \return return SD_MMC_OK if success, + * otherwise return an error code (\ref sd_mmc_err_t). + */ +sd_mmc_err_t sd_mmc_wait_end_of_read_blocks(bool abort); + +/** + * \brief Initialize the write blocks of data + * + * \param[in] slot Card slot to use + * \param[in] start Start block number to be written. + * \param[in] nb_block Total number of blocks to be written. + * + * \return return SD_MMC_OK if success, + * otherwise return an error code (\ref sd_mmc_err_t). + */ +sd_mmc_err_t sd_mmc_init_write_blocks(uint8_t slot, uint32_t start, uint16_t nb_block); + +/** + * \brief Start the write blocks of data + * + * \param[in] src Pointer to write buffer. + * \param[in] nb_block Number of blocks to be written. + * + * \return return SD_MMC_OK if started, + * otherwise return an error code (\ref sd_mmc_err_t). + */ +sd_mmc_err_t sd_mmc_start_write_blocks(const void *src, uint16_t nb_block); + +/** + * \brief Wait the end of write blocks of data + * + * \param[in] abort Abort writing process initialized by + * \ref sd_mmc_init_write_blocks() after the writing issued by + * \ref sd_mmc_start_write_blocks() is done + * + * \return return SD_MMC_OK if success, + * otherwise return an error code (\ref sd_mmc_err_t). + */ +sd_mmc_err_t sd_mmc_wait_end_of_write_blocks(bool abort); + +#if (CONF_SDIO_SUPPORT == 1) +/** + * \brief Read one byte from SDIO using RW_DIRECT command. + * + * \param[in] slot Card slot to use + * \param[in] func_num Function number. + * \param[in] addr Register address to read from. + * \param[out] dest Pointer to read buffer. + * + * \return return SD_MMC_OK if success, + * otherwise return an error code (\ref sd_mmc_err_t). + */ +sd_mmc_err_t sdio_read_direct(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t *dest); +/** + * \brief Write one byte to SDIO using RW_DIRECT command. + * + * \param[in] slot Card slot to use + * \param[in] func_num Function number. + * \param[in] addr Register address to read from. + * \param[in] data Data to be written. + * + * \return return SD_MMC_OK if success, + * otherwise return an error code (\ref sd_mmc_err_t). + */ +sd_mmc_err_t sdio_write_direct(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t data); + +/** + * \brief Read bytes from SDIO using RW_EXTENDED command. + * + * \param[in] slot Card slot to use + * \param[in] func_num Function number. + * \param[in] addr First register address to read from. + * \param[in] inc_addr 0 - The data address is fixed. + * 1 - The data address increase automatically. + * \param[out] dest Pointer to read buffer. + * \param[in] size Number of bytes to read (1 ~ 512). + * + * \return return SD_MMC_OK if success, + * otherwise return an error code (\ref sd_mmc_err_t). + */ +sd_mmc_err_t sdio_read_extended(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t inc_addr, uint8_t *dest, + uint16_t size); + +/** + * \brief Write bytes to SDIO using RW_EXTENDED command. + * + * \param[in] slot Card slot to use + * \param[in] func_num Function number. + * \param[in] addr First register address to write to. + * \param[in] inc_addr 0 - The data address is fixed. + * 1 - The data address increase automatically. + * \param[in] src Pointer to write buffer. + * \param[in] size Number of bytes to read (1 ~ 512). + * + * \return return SD_MMC_OK if success, + * otherwise return an error code (\ref sd_mmc_err_t). + */ +sd_mmc_err_t sdio_write_extended(uint8_t slot, uint8_t func_num, uint32_t addr, uint8_t inc_addr, uint8_t *src, + uint16_t size); +#endif /* SDIO_SUPPORT_ENABLE */ + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* SD_MMC_H_INCLUDED */ diff --git a/ports/atmel-samd/sd_mmc/sd_mmc_protocol.h b/ports/atmel-samd/sd_mmc/sd_mmc_protocol.h new file mode 100644 index 000000000..0516e4fd1 --- /dev/null +++ b/ports/atmel-samd/sd_mmc/sd_mmc_protocol.h @@ -0,0 +1,1001 @@ +/** + * \file + * + * \brief SD/MMC protocol definitions. + * + * Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries. + * + * \asf_license_start + * + * \page License + * + * Subject to your compliance with these terms, you may use Microchip + * software and any derivatives exclusively with Microchip products. + * It is your responsibility to comply with third party license terms applicable + * to your use of third party software (including open source software) that + * may accompany Microchip software. + * + * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, + * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, + * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, + * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE + * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL + * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE + * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE + * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT + * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY + * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, + * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. + * + * \asf_license_stop + * + */ +/* + * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a> + */ + +#ifndef SD_MMC_PROTOCOL_H_INCLUDED +#define SD_MMC_PROTOCOL_H_INCLUDED + +#include "compiler.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \addtogroup sd_mmc_protocol SD/MMC Protocol Definition + * \ingroup sd_mmc_stack_group + * @{ + */ + +// SD/MMC/SDIO default clock frequency for initialization (400KHz) +#define SDMMC_CLOCK_INIT 400000 + +/** + * \name Macros for command definition + * + * Commands types: + * - broadcast commands (bc), no response + * - broadcast commands with response (bcr) (Note: No open drain on SD card) + * - addressed (point-to-point) commands (ac), no data transfer on DAT lines + * - addressed (point-to-point) data transfer commands (adtc), data transfer + * on DAT lines + * + * Specific MMC norms: + * CMD1, CMD2 & CMD3 are processed in the open-drain mode. + * The CMD line is driven with push-pull drivers. + * + * Specific SD norms: + * There is no open drain mode in SD memory card. + * + *************************************** + * Responses types: + * + * R1, R3, R4 & R5 use a 48 bits response protected by a 7bit CRC checksum + * - R1 receiv data not specified + * - R3 receiv OCR + * - R4, R5 RCA management (MMC only) + * - R6, R7 RCA management (SD only) + * + * R1b assert the BUSY signal and respond with R1. + * If the busy signal is asserted, it is done two clock cycles (Nsr time) + * after the end bit of the command. The DAT0 line is driven low. + * DAT1-DAT7 lines are driven by the card though their values are not relevant. + * + * R2 use a 136 bits response protected by a 7bit CRC checksum + * The content is CID or CSD + * + * Specific MMC norms: + * - R4 (Fast I/O) return RCA + * - R5 (interrupt request) return RCA null + * + * Specific SD norms: + * - R6 (Published RCA) return RCA + * - R7 (Card interface condition) return RCA null + * + * @{ + */ + +//! Value to define a SD/MMC/SDIO command +typedef uint32_t sdmmc_cmd_def_t; + +//! \name Flags used to define a SD/MMC/SDIO command +//! @{ +#define SDMMC_CMD_GET_INDEX(cmd) (cmd & 0x3F) +//! Have response (MCI only) +#define SDMMC_RESP_PRESENT (1lu << 8) +//! 8 bit response (SPI only) +#define SDMMC_RESP_8 (1lu << 9) +//! 32 bit response (SPI only) +#define SDMMC_RESP_32 (1lu << 10) +//! 136 bit response (MCI only) +#define SDMMC_RESP_136 (1lu << 11) +//! Expect valid crc (MCI only) +#define SDMMC_RESP_CRC (1lu << 12) +//! Card may send busy +#define SDMMC_RESP_BUSY (1lu << 13) +// Open drain for a braodcast command (bc) +// or to enter in inactive state (MCI only) +#define SDMMC_CMD_OPENDRAIN (1lu << 14) +//! To signal a data write operation +#define SDMMC_CMD_WRITE (1lu << 15) +//! To signal a SDIO tranfer in multi byte mode +#define SDMMC_CMD_SDIO_BYTE (1lu << 16) +//! To signal a SDIO tranfer in block mode +#define SDMMC_CMD_SDIO_BLOCK (1lu << 17) +//! To signal a data transfer in stream mode +#define SDMMC_CMD_STREAM (1lu << 18) +//! To signal a data transfer in single block mode +#define SDMMC_CMD_SINGLE_BLOCK (1lu << 19) +//! To signal a data transfer in multi block mode +#define SDMMC_CMD_MULTI_BLOCK (1lu << 20) +//! @} + +//! \name Set of flags to define a reponse type +//! @{ +#define SDMMC_CMD_NO_RESP (0) +#define SDMMC_CMD_R1 (SDMMC_RESP_PRESENT | SDMMC_RESP_CRC) +#define SDMMC_CMD_R1B (SDMMC_RESP_PRESENT | SDMMC_RESP_CRC | SDMMC_RESP_BUSY) +#define SDMMC_CMD_R2 (SDMMC_RESP_PRESENT | SDMMC_RESP_8 | SDMMC_RESP_136 | SDMMC_RESP_CRC) +#define SDMMC_CMD_R3 (SDMMC_RESP_PRESENT | SDMMC_RESP_32) +#define SDMMC_CMD_R4 (SDMMC_RESP_PRESENT | SDMMC_RESP_32) +#define SDMMC_CMD_R5 (SDMMC_RESP_PRESENT | SDMMC_RESP_8 | SDMMC_RESP_CRC) +#define SDMMC_CMD_R6 (SDMMC_RESP_PRESENT | SDMMC_RESP_CRC) +#define SDMMC_CMD_R7 (SDMMC_RESP_PRESENT | SDMMC_RESP_32 | SDMMC_RESP_CRC) +//! @} + +//! \name SD/MMC/SDIO command definitions +//! SDMMC_CMDx are include in SD and MMC norms +//! MMC_CMDx are include in MMC norms only +//! SD_CMDx are include in SD norms only +//! SDIO_CMDx are include in SDIO norms only +//! @{ + +/* + * --- Basic commands and read-stream command (class 0 and class 1) --- + */ + +/** Cmd0(bc): Reset all cards to idle state */ +#define SDMMC_SPI_CMD0_GO_IDLE_STATE (0 | SDMMC_CMD_R1) +#define SDMMC_MCI_CMD0_GO_IDLE_STATE (0 | SDMMC_CMD_NO_RESP | SDMMC_CMD_OPENDRAIN) +/** MMC Cmd1(bcr, R3): Ask the card to send its Operating Conditions */ +#define MMC_SPI_CMD1_SEND_OP_COND (1 | SDMMC_CMD_R1) +#define MMC_MCI_CMD1_SEND_OP_COND (1 | SDMMC_CMD_R3 | SDMMC_CMD_OPENDRAIN) +/** Cmd2(bcr, R2): Ask the card to send its CID number (stuff but arg 0 used) */ +#define SDMMC_CMD2_ALL_SEND_CID (2 | SDMMC_CMD_R2 | SDMMC_CMD_OPENDRAIN) +/** SD Cmd3(bcr, R6): Ask the card to publish a new relative address (RCA) */ +#define SD_CMD3_SEND_RELATIVE_ADDR (3 | SDMMC_CMD_R6 | SDMMC_CMD_OPENDRAIN) +/** MMC Cmd3(ac, R1): Assigns relative address to the card */ +#define MMC_CMD3_SET_RELATIVE_ADDR (3 | SDMMC_CMD_R1) +/** Cmd4(bc): Program the DSR of all cards (MCI only) */ +#define SDMMC_CMD4_SET_DSR (4 | SDMMC_CMD_NO_RESP) +/** MMC Cmd5(ac, R1b): Toggle the card between Sleep state and Standby state. */ +#define MMC_CMD5_SLEEP_AWAKE (5 | SDMMC_CMD_R1B) +/** Cmd7(ac, R1/R1b): Select/Deselect card + * For SD: R1b only from the selected card. + * For MMC: R1 while selecting from Stand-By State to Transfer State; + * R1b while selecting from Disconnected State to Programming State. + */ +#define SDMMC_CMD7_SELECT_CARD_CMD (7 | SDMMC_CMD_R1B) +#define SDMMC_CMD7_DESELECT_CARD_CMD (7 | SDMMC_CMD_R1) +/** MMC Cmd8(adtc, R1): Send EXT_CSD register as a block of data */ +#define MMC_CMD8_SEND_EXT_CSD (8 | SDMMC_CMD_R1 | SDMMC_CMD_SINGLE_BLOCK) +/** SD Cmd8(bcr, R7) : Send SD Memory Card interface condition */ +#define SD_CMD8_SEND_IF_COND (8 | SDMMC_CMD_R7 | SDMMC_CMD_OPENDRAIN) +/** Cmd9 SPI (R1): Addressed card sends its card-specific data (CSD) */ +#define SDMMC_SPI_CMD9_SEND_CSD (9 | SDMMC_CMD_R1 | SDMMC_CMD_SINGLE_BLOCK) +/** Cmd9 MCI (ac, R2): Addressed card sends its card-specific data (CSD) */ +#define SDMMC_MCI_CMD9_SEND_CSD (9 | SDMMC_CMD_R2) +/** Cmd10(ac, R2): Addressed card sends its card identification (CID) */ +#define SDMMC_CMD10_SEND_CID (10 | SDMMC_CMD_R2) +/** + * MMC Cmd11(adtc, R1): Read data stream from the card, starting at the given + * address, until a STOP_TRANSMISSION follows. + */ +#define MMC_CMD11_READ_DAT_UNTIL_STOP (11 | SDMMC_CMD_R1) +/* SD Cmd11 MCI (ac, R1): Voltage switching */ +#define SD_CMD11_READ_DAT_UNTIL_STOP (11 | SDMMC_CMD_R1) +/** Cmd12(ac, R1b): Force the card to stop transmission */ +#define SDMMC_CMD12_STOP_TRANSMISSION (12 | SDMMC_CMD_R1B) +/** Cmd13(R2): Addressed card sends its status register. */ +#define SDMMC_SPI_CMD13_SEND_STATUS (13 | SDMMC_CMD_R2) +/** Cmd13(ac, R1): Addressed card sends its status register. */ +#define SDMMC_MCI_CMD13_SEND_STATUS (13 | SDMMC_CMD_R1) +/** MMC Cmd14(adtc, R1): Read the reversed bus testing data pattern from a card. */ +#define MMC_CMD14_BUSTEST_R (14 | SDMMC_CMD_R1) +/** Cmd15(ac): Send an addressed card into the Inactive State. */ +// Note: It is a ac cmd, but it must be send like bc cmd to open drain +#define SDMMC_CMD15_GO_INACTIVE_STATE (15 | SDMMC_CMD_NO_RESP | SDMMC_CMD_OPENDRAIN) +/** MMC Cmd19(adtc, R1): Send the bus test data pattern */ +#define MMC_CMD19_BUSTEST_W (19 | SDMMC_CMD_R1) +/** Cmd58(R3): Reads the OCR register of a card */ +#define SDMMC_SPI_CMD58_READ_OCR (58 | SDMMC_CMD_R3) +/** Cmd59(R1): Turns the CRC option on or off */ +#define SDMMC_SPI_CMD59_CRC_ON_OFF (59 | SDMMC_CMD_R1) + +/* + * --- Block-oriented read commands (class 2) --- + */ +/** Cmd16(ac, R1): Set the block length (in bytes) */ +#define SDMMC_CMD16_SET_BLOCKLEN (16 | SDMMC_CMD_R1) +/** Cmd17(adtc, R1): Read single block */ +#define SDMMC_CMD17_READ_SINGLE_BLOCK (17 | SDMMC_CMD_R1 | SDMMC_CMD_SINGLE_BLOCK) +/** Cmd18(adtc, R1): Read multiple block */ +#define SDMMC_CMD18_READ_MULTIPLE_BLOCK (18 | SDMMC_CMD_R1 | SDMMC_CMD_MULTI_BLOCK) + +/* + * --- Sequential write commands (class 3) --- + */ + +/** + * MMC Cmd20(adtc, R1): Write a data stream from the host, starting at the + * given address, until a STOP_TRANSMISSION follows. + */ +#define MMC_CMD20_WRITE_DAT_UNTIL_STOP (20 | SDMMC_CMD_R1) + +/* + * --- Block-oriented write commands (class 4) --- + */ +/** MMC Cmd23(ac, R1): Set block count */ +#define MMC_CMD23_SET_BLOCK_COUNT (23 | SDMMC_CMD_R1) +/** Cmd24(adtc, R1): Write block */ +#define SDMMC_CMD24_WRITE_BLOCK (24 | SDMMC_CMD_R1 | SDMMC_CMD_WRITE | SDMMC_CMD_SINGLE_BLOCK) +/** Cmd25(adtc, R1): Write multiple block */ +#define SDMMC_CMD25_WRITE_MULTIPLE_BLOCK (25 | SDMMC_CMD_R1 | SDMMC_CMD_WRITE | SDMMC_CMD_MULTI_BLOCK) +/** MMC Cmd26(adtc, R1): Programming of the card identification register. */ +#define MMC_CMD26_PROGRAM_CID (26 | SDMMC_CMD_R1) +/** Cmd27(adtc, R1): Programming of the programmable bits of the CSD. */ +#define SDMMC_CMD27_PROGRAM_CSD (27 | SDMMC_CMD_R1) + +/* + * --- Erase commands (class 5) --- + */ +/** SD Cmd32(ac, R1): */ +#define SD_CMD32_ERASE_WR_BLK_START (32 | SDMMC_CMD_R1) +/** SD Cmd33(ac, R1): */ +#define SD_CMD33_ERASE_WR_BLK_END (33 | SDMMC_CMD_R1) +/** MMC Cmd35(ac, R1): */ +#define MMC_CMD35_ERASE_GROUP_START (35 | SDMMC_CMD_R1) +/** MMC Cmd36(ac, R1): */ +#define MMC_CMD36_ERASE_GROUP_END (36 | SDMMC_CMD_R1) +/** Cmd38(ac, R1B): */ +#define SDMMC_CMD38_ERASE (38 | SDMMC_CMD_R1B) + +/* + * --- Block Oriented Write Protection Commands (class 6) --- + */ +/** Cmd28(ac, R1b): Set write protection */ +#define SDMMC_CMD28_SET_WRITE_PROT (28 | SDMMC_CMD_R1B) +/** Cmd29(ac, R1b): Clr write protection */ +#define SDMMC_CMD29_CLR_WRITE_PROT (29 | SDMMC_CMD_R1B) +/** Cmd30(adtc, R1b): Send write protection */ +#define SDMMC_CMD30_SEND_WRITE_PROT (30 | SDMMC_CMD_R1) + +/* + * --- Lock Card (class 7) --- + */ +/** Cmd42(adtc, R1): Used to set/reset the password or lock/unlock the card. */ +#define SDMMC_CMD42_LOCK_UNLOCK (42 | SDMMC_CMD_R1) + +/* + * --- Application-specific commands (class 8) --- + */ +/** + * Cmd55(ac, R1): Indicate to the card that the next command is an application + * specific command rather than a standard command. + */ +#define SDMMC_CMD55_APP_CMD (55 | SDMMC_CMD_R1) +/** + * Cmd 56(adtc, R1): Used either to transfer a data block to the card or to get + * a data block from the card for general purpose/application specific commands. + */ +#define SDMMC_CMD56_GEN_CMD (56 | SDMMC_CMD_R1) + +/** + * MMC Cmd6(ac, R1b) : Switche the mode of operation of the selected card + * or modifies the EXT_CSD registers. + */ +#define MMC_CMD6_SWITCH (6 | SDMMC_CMD_R1B) +/** + * SD Cmd6(adtc, R1) : Check switchable function (mode 0) + * and switch card function (mode 1). + */ +#define SD_CMD6_SWITCH_FUNC (6 | SDMMC_CMD_R1 | SDMMC_CMD_SINGLE_BLOCK) +/** ACMD6(ac, R1): Define the data bus width */ +#define SD_ACMD6_SET_BUS_WIDTH (6 | SDMMC_CMD_R1) +/** ACMD13(adtc, R1): Send the SD Status. */ +#define SD_ACMD13_SD_STATUS (13 | SDMMC_CMD_R1) +/** + * ACMD22(adtc, R1): Send the number of the written (with-out errors) write + * blocks. + */ +#define SD_ACMD22_SEND_NUM_WR_BLOCKS (22 | SDMMC_CMD_R1) +/** + * ACMD23(ac, R1): Set the number of write blocks to be pre-erased before + * writing + */ +#define SD_ACMD23_SET_WR_BLK_ERASE_COUNT (23 | SDMMC_CMD_R1) +/** + * ACMD41(bcr, R3): Send host capacity support information (HCS) and asks the + * accessed card to send its operating condition register (OCR) content + * in the response + */ +#define SD_MCI_ACMD41_SD_SEND_OP_COND (41 | SDMMC_CMD_R3 | SDMMC_CMD_OPENDRAIN) +/** + * ACMD41(R1): Send host capacity support information (HCS) and activates the + * card's initilization process + */ +#define SD_SPI_ACMD41_SD_SEND_OP_COND (41 | SDMMC_CMD_R1) +/** + * ACMD42(ac, R1): Connect[1]/Disconnect[0] the 50 KOhm pull-up resistor on + * CD/DAT3 (pin 1) of the card. + */ +#define SD_ACMD42_SET_CLR_CARD_DETECT (42 | SDMMC_CMD_R1) +/** ACMD51(adtc, R1): Read the SD Configuration Register (SCR). */ +#define SD_ACMD51_SEND_SCR (51 | SDMMC_CMD_R1 | SDMMC_CMD_SINGLE_BLOCK) + +/* + * --- I/O mode commands (class 9) --- + */ +/** MMC Cmd39(ac, R4): Used to write and read 8 bit (register) data fields. */ +#define MMC_CMD39_FAST_IO (39 | SDMMC_CMD_R4) +/** MMC Cmd40(bcr, R5): Set the system into interrupt mode */ +#define MMC_CMD40_GO_IRQ_STATE (40 | SDMMC_CMD_R5 | SDMMC_CMD_OPENDRAIN) +/** SDIO Cmd5(R4): Send operation condition */ +#define SDIO_CMD5_SEND_OP_COND (5 | SDMMC_CMD_R4 | SDMMC_CMD_OPENDRAIN) +/** SDIO CMD52(R5): Direct IO read/write */ +#define SDIO_CMD52_IO_RW_DIRECT (52 | SDMMC_CMD_R5) +/** SDIO CMD53(R5): Extended IO read/write */ +#define SDIO_CMD53_IO_R_BYTE_EXTENDED (53 | SDMMC_CMD_R5 | SDMMC_CMD_SDIO_BYTE) +#define SDIO_CMD53_IO_W_BYTE_EXTENDED (53 | SDMMC_CMD_R5 | SDMMC_CMD_SDIO_BYTE | SDMMC_CMD_WRITE) +#define SDIO_CMD53_IO_R_BLOCK_EXTENDED (53 | SDMMC_CMD_R5 | SDMMC_CMD_SDIO_BLOCK) +#define SDIO_CMD53_IO_W_BLOCK_EXTENDED (53 | SDMMC_CMD_R5 | SDMMC_CMD_SDIO_BLOCK | SDMMC_CMD_WRITE) +//! @} +//! @} + +//! \name Macros for command argument definition +//! @{ + +//! \name MMC CMD6 argument structure +//! @{ +//! [31:26] Set to 0 +//! [25:24] Access +#define MMC_CMD6_ACCESS_COMMAND_SET (0lu << 24) +#define MMC_CMD6_ACCESS_SET_BITS (1lu << 24) +#define MMC_CMD6_ACCESS_CLEAR_BITS (2lu << 24) +#define MMC_CMD6_ACCESS_WRITE_BYTE (3lu << 24) +//! [23:16] Index for Mode Segment +#define MMC_CMD6_INDEX_CMD_SET (EXT_CSD_CMD_SET_INDEX << 16) +#define MMC_CMD6_INDEX_CMD_SET_REV (EXT_CSD_CMD_SET_REV_INDEX << 16) +#define MMC_CMD6_INDEX_POWER_CLASS (EXT_CSD_POWER_CLASS_INDEX << 16) +#define MMC_CMD6_INDEX_HS_TIMING (EXT_CSD_HS_TIMING_INDEX << 16) +#define MMC_CMD6_INDEX_BUS_WIDTH (EXT_CSD_BUS_WIDTH_INDEX << 16) +#define MMC_CMD6_INDEX_ERASED_MEM_CONT (EXT_CSD_ERASED_MEM_CONT_INDEX << 16) +#define MMC_CMD6_INDEX_BOOT_CONFIG (EXT_CSD_BOOT_CONFIG_INDEX << 16) +#define MMC_CMD6_INDEX_BOOT_BUS_WIDTH (EXT_CSD_BOOT_BUS_WIDTH_INDEX << 16) +#define MMC_CMD6_INDEX_ERASE_GROUP_DEF (EXT_CSD_ERASE_GROUP_DEF_INDEX << 16) +//! [15:8] Value +#define MMC_CMD6_VALUE_BUS_WIDTH_1BIT (0x0lu << 8) +#define MMC_CMD6_VALUE_BUS_WIDTH_4BIT (0x1lu << 8) +#define MMC_CMD6_VALUE_BUS_WIDTH_8BIT (0x2lu << 8) +#define MMC_CMD6_VALUE_HS_TIMING_ENABLE (0x1lu << 8) +#define MMC_CMD6_VALUE_HS_TIMING_DISABLE (0x0lu << 8) +//! [7:3] Set to 0 +//! [2:0] Cmd Set +//! @} + +//! \name SD CMD6 argument structure +//! @{ +//! CMD6 arg[ 3: 0] function group 1, access mode +#define SD_CMD6_GRP1_HIGH_SPEED (0x1lu << 0) +#define SD_CMD6_GRP1_DEFAULT (0x0lu << 0) +//! CMD6 arg[ 7: 4] function group 2, command system +#define SD_CMD6_GRP2_NO_INFLUENCE (0xFlu << 4) +#define SD_CMD6_GRP2_DEFAULT (0x0lu << 4) +//! CMD6 arg[11: 8] function group 3, 0xF or 0x0 +#define SD_CMD6_GRP3_NO_INFLUENCE (0xFlu << 8) +#define SD_CMD6_GRP3_DEFAULT (0x0lu << 8) +//! CMD6 arg[15:12] function group 4, 0xF or 0x0 +#define SD_CMD6_GRP4_NO_INFLUENCE (0xFlu << 12) +#define SD_CMD6_GRP4_DEFAULT (0x0lu << 12) +//! CMD6 arg[19:16] function group 5, 0xF or 0x0 +#define SD_CMD6_GRP5_NO_INFLUENCE (0xFlu << 16) +#define SD_CMD6_GRP5_DEFAULT (0x0lu << 16) +//! CMD6 arg[23:20] function group 6, 0xF or 0x0 +#define SD_CMD6_GRP6_NO_INFLUENCE (0xFlu << 20) +#define SD_CMD6_GRP6_DEFAULT (0x0lu << 20) +//! CMD6 arg[30:24] reserved 0 +//! CMD6 arg[31 ] Mode, 0: Check, 1: Switch +#define SD_CMD6_MODE_CHECK (0lu << 31) +#define SD_CMD6_MODE_SWITCH (1lu << 31) +//! @} + +//! \name SD CMD8 argument structure +//! @{ +#define SD_CMD8_PATTERN 0xAA +#define SD_CMD8_MASK_PATTERN 0xFF +#define SD_CMD8_HIGH_VOLTAGE 0x100 +#define SD_CMD8_MASK_VOLTAGE 0xF00 +//! @} + +//! \name SD ACMD41 arguments +//! @{ +#define SD_ACMD41_HCS (1lu << 30) //!< (SD) Host Capacity Support + //! @} +//! @} + +//! \name SDIO definitions +//! @{ + +//! \name SDIO state (in R5) +//! @{ +#define SDIO_R5_COM_CRC_ERROR (1lu << 15) /**< CRC check error */ +#define SDIO_R5_ILLEGAL_COMMAND (1lu << 14) /**< Illegal command */ +#define SDIO_R5_STATE (3lu << 12) /**< SDIO R5 state mask */ +#define SDIO_R5_STATE_DIS (0lu << 12) /**< Disabled */ +#define SDIO_R5_STATE_CMD (1lu << 12) /**< DAT lines free */ +#define SDIO_R5_STATE_TRN (2lu << 12) /**< Transfer */ +#define SDIO_R5_STATE_RFU (3lu << 12) /**< Reserved */ +#define SDIO_R5_ERROR (1lu << 11) /**< General error */ +#define SDIO_R5_FUNC_NUM (1lu << 9) /**< Invalid function number */ +#define SDIO_R5_OUT_OF_RANGE (1lu << 8) /**< Argument out of range */ +#define SDIO_R5_STATUS_ERR (SDIO_R5_ERROR | SDIO_R5_FUNC_NUM | SDIO_R5_OUT_OF_RANGE) //!< Errro status bits mask + //! @} + +//! \name SDIO state (in R6) +//! @{ +/** The CRC check of the previous command failed. */ +#define SDIO_R6_COM_CRC_ERROR (1lu << 15) +/** Command not legal for the card state. */ +#define SDIO_R6_ILLEGAL_COMMAND (1lu << 14) +/** A general or an unknown error occurred during the operation. */ +#define SDIO_R6_ERROR (1lu << 13) +/** Status bits mask for SDIO R6 */ +#define SDIO_STATUS_R6 (SDIO_R6_COM_CRC_ERROR | SDIO_R6_ILLEGAL_COMMAND | SDIO_R6_ERROR) +//! @} + +//! \name SDIO CMD52 argument bit offset +//! @{ +//! CMD52 arg[ 7: 0] Write data or stuff bits +#define SDIO_CMD52_WR_DATA 0 +//! CMD52 arg[ 8] Reserved +#define SDIO_CMD52_STUFF0 8 +//! CMD52 arg[25: 9] Register address +#define SDIO_CMD52_REG_ADRR 9 +//! CMD52 arg[ 26] Reserved +#define SDIO_CMD52_STUFF1 26 +//! CMD52 arg[ 27] Read after Write flag +#define SDIO_CMD52_RAW_FLAG 27 +//! CMD52 arg[30:28] Number of the function +#define SDIO_CMD52_FUNCTION_NUM 28 +//! CMD52 arg[ 31] Direction, 1:write, 0:read. +#define SDIO_CMD52_RW_FLAG 31 +#define SDIO_CMD52_READ_FLAG 0 +#define SDIO_CMD52_WRITE_FLAG 1 +//! @} + +//! \name SDIO CMD53 argument structure +//! @{ +/** + * [ 8: 0] Byte mode: number of bytes to transfer, + * 0 cause 512 bytes transfer. + * Block mode: number of blocks to transfer, + * 0 set count to infinite. + */ +#define SDIO_CMD53_COUNT 0 +//! CMD53 arg[25: 9] Start Address I/O register +#define SDIO_CMD53_REG_ADDR 9 +//! CMD53 arg[ 26] 1:Incrementing address, 0: fixed +#define SDIO_CMD53_OP_CODE 26 +//! CMD53 arg[ 27] (Optional) 1:block mode +#define SDIO_CMD53_BLOCK_MODE 27 +//! CMD53 arg[30:28] Number of the function +#define SDIO_CMD53_FUNCTION_NUM 28 +//! CMD53 arg[ 31] Direction, 1:WR, 0:RD +#define SDIO_CMD53_RW_FLAG 31 +#define SDIO_CMD53_READ_FLAG 0 +#define SDIO_CMD53_WRITE_FLAG 1 +//! @} + +//! \name SDIO Functions +//! @{ +#define SDIO_CIA 0 /**< SDIO Function 0 (CIA) */ +#define SDIO_FN0 0 /**< SDIO Function 0 */ +#define SDIO_FN1 1 /**< SDIO Function 1 */ +#define SDIO_FN2 2 /**< SDIO Function 2 */ +#define SDIO_FN3 3 /**< SDIO Function 3 */ +#define SDIO_FN4 4 /**< SDIO Function 4 */ +#define SDIO_FN5 5 /**< SDIO Function 5 */ +#define SDIO_FN6 6 /**< SDIO Function 6 */ +#define SDIO_FN7 7 /**< SDIO Function 7 */ + //! @} + +//! \name SDIO Card Common Control Registers (CCCR) +//! @{ +#define SDIO_CCCR_SDIO_REV 0x00 /**< CCCR/SDIO revision (RO) */ +#define SDIO_CCCR_REV (0xFlu << 0) /**< CCCR/FBR Version */ +#define SDIO_CCCR_REV_1_00 (0x0lu << 0) /**< CCCR/FBR Version 1.00 */ +#define SDIO_CCCR_REV_1_10 (0x1lu << 0) /**< CCCR/FBR Version 1.10 */ +#define SDIO_CCCR_REV_2_00 (0x2lu << 0) /**< CCCR/FBR Version 2.00 */ +#define SDIO_CCCR_REV_3_00 (0x3lu << 0) /**< CCCR/FBR Version 3.00 */ +#define SDIO_SDIO_REV (0xFlu << 4) /**< SDIO Spec */ +#define SDIO_SDIO_REV_1_00 (0x0lu << 4) /**< SDIO Spec 1.00 */ +#define SDIO_SDIO_REV_1_10 (0x1lu << 4) /**< SDIO Spec 1.10 */ +#define SDIO_SDIO_REV_1_20 (0x2lu << 4) /**< SDIO Spec 1.20(unreleased) */ +#define SDIO_SDIO_REV_2_00 (0x3lu << 4) /**< SDIO Spec Version 2.00 */ +#define SDIO_SDIO_REV_3_00 (0x4lu << 4) /**< SDIO Spec Version 3.00 */ +#define SDIO_CCCR_SD_REV 0x01 /**< SD Spec Revision (RO) */ +#define SDIO_SD_REV (0xFlu << 0) /**< SD Physical Spec */ +#define SDIO_SD_REV_1_01 (0x0lu << 0) /**< SD 1.01 (Mar 2000) */ +#define SDIO_SD_REV_1_10 (0x1lu << 0) /**< SD 1.10 (Oct 2004) */ +#define SDIO_SD_REV_2_00 (0x2lu << 0) /**< SD 2.00 (May 2006) */ +#define SDIO_SD_REV_3_00 (0x3lu << 0) /**< SD 3.00 */ +#define SDIO_CCCR_IOE 0x02 /**< I/O Enable (R/W) */ +#define SDIO_IOE (0xFElu << 1) /**< Functions Enable/Disable */ +#define SDIO_IOE_FN1 (0x1lu << 1) /**< Function 1 Enable/Disable */ +#define SDIO_IOE_FN2 (0x1lu << 2) /**< Function 2 Enable/Disable */ +#define SDIO_IOE_FN3 (0x1lu << 3) /**< Function 3 Enable/Disable */ +#define SDIO_IOE_FN4 (0x1lu << 4) /**< Function 4 Enable/Disable */ +#define SDIO_IOE_FN5 (0x1lu << 5) /**< Function 5 Enable/Disable */ +#define SDIO_IOE_FN6 (0x1lu << 6) /**< Function 6 Enable/Disable */ +#define SDIO_IOE_FN7 (0x1lu << 7) /**< Function 7 Enable/Disable */ +#define SDIO_CCCR_IOR 0x03 /**< I/O Ready (RO) */ +#define SDIO_IOR (0xFElu << 1) /**< Functions ready */ +#define SDIO_IOR_FN1 (0x1lu << 1) /**< Function 1 ready */ +#define SDIO_IOR_FN2 (0x1lu << 2) /**< Function 2 ready */ +#define SDIO_IOR_FN3 (0x1lu << 3) /**< Function 3 ready */ +#define SDIO_IOR_FN4 (0x1lu << 4) /**< Function 4 ready */ +#define SDIO_IOR_FN5 (0x1lu << 5) /**< Function 5 ready */ +#define SDIO_IOR_FN6 (0x1lu << 6) /**< Function 6 ready */ +#define SDIO_IOR_FN7 (0x1lu << 7) /**< Function 7 ready */ +#define SDIO_CCCR_IEN 0x04 /**< Int Enable */ +#define SDIO_IENM (0x1lu << 0) /**< Int Enable Master (R/W) */ +#define SDIO_IEN (0xFElu << 1) /**< Functions Int Enable */ +#define SDIO_IEN_FN1 (0x1lu << 1) /**< Function 1 Int Enable */ +#define SDIO_IEN_FN2 (0x1lu << 2) /**< Function 2 Int Enable */ +#define SDIO_IEN_FN3 (0x1lu << 3) /**< Function 3 Int Enable */ +#define SDIO_IEN_FN4 (0x1lu << 4) /**< Function 4 Int Enable */ +#define SDIO_IEN_FN5 (0x1lu << 5) /**< Function 5 Int Enable */ +#define SDIO_IEN_FN6 (0x1lu << 6) /**< Function 6 Int Enable */ +#define SDIO_IEN_FN7 (0x1lu << 7) /**< Function 7 Int Enable */ +#define SDIO_CCCR_INT 0x05 /**< Int Pending */ +#define SDIO_INT (0xFElu << 1) /**< Functions Int pending */ +#define SDIO_INT_FN1 (0x1lu << 1) /**< Function 1 Int pending */ +#define SDIO_INT_FN2 (0x1lu << 2) /**< Function 2 Int pending */ +#define SDIO_INT_FN3 (0x1lu << 3) /**< Function 3 Int pending */ +#define SDIO_INT_FN4 (0x1lu << 4) /**< Function 4 Int pending */ +#define SDIO_INT_FN5 (0x1lu << 5) /**< Function 5 Int pending */ +#define SDIO_INT_FN6 (0x1lu << 6) /**< Function 6 Int pending */ +#define SDIO_INT_FN7 (0x1lu << 7) /**< Function 7 Int pending */ +#define SDIO_CCCR_IOA 0x06 /**< I/O Abort */ +#define SDIO_AS (0x7lu << 0) /**< Abort Select In Order (WO) */ +#define SDIO_AS_FN1 (0x1lu << 0) /**< Abort function 1 IO */ +#define SDIO_AS_FN2 (0x2lu << 0) /**< Abort function 2 IO */ +#define SDIO_AS_FN3 (0x3lu << 0) /**< Abort function 3 IO */ +#define SDIO_AS_FN4 (0x4lu << 0) /**< Abort function 4 IO */ +#define SDIO_AS_FN5 (0x5lu << 0) /**< Abort function 5 IO */ +#define SDIO_AS_FN6 (0x6lu << 0) /**< Abort function 6 IO */ +#define SDIO_AS_FN7 (0x7lu << 0) /**< Abort function 7 IO */ +#define SDIO_RES (0x1lu << 3) /**< IO CARD RESET (WO) */ +#define SDIO_CCCR_BUS_CTRL 0x07 /**< Bus Interface Control */ +#define SDIO_BUSWIDTH (0x3lu << 0) /**< Data bus width (R/W) */ +#define SDIO_BUSWIDTH_1B (0x0lu << 0) /**< 1-bit data bus */ +#define SDIO_BUSWIDTH_4B (0x2lu << 0) /**< 4-bit data bus */ +/** Enable Continuous SPI interrupt (R/W) */ +#define SDIO_BUS_ECSI (0x1lu << 5) +/** Support Continuous SPI interrupt (RO) */ +#define SDIO_BUS_SCSI (0x1lu << 6) +/** Connect(0)/Disconnect(1) pull-up on CD/DAT[3] (R/W) */ +#define SDIO_BUS_CD_DISABLE (0x1lu << 7) +#define SDIO_CCCR_CAP 0x08 /**< Card Capability */ +/** Support Direct Commands during data transfer (RO) */ +#define SDIO_CAP_SDC (0x1lu << 0) +/** Support Multi-Block (RO) */ +#define SDIO_CAP_SMB (0x1lu << 1) +/** Support Read Wait (RO) */ +#define SDIO_CAP_SRW (0x1lu << 2) +/** Support Suspend/Resume (RO) */ +#define SDIO_CAP_SBS (0x1lu << 3) +/** Support interrupt between blocks of data in 4-bit SD mode (RO) */ +#define SDIO_CAP_S4MI (0x1lu << 4) +/** Enable interrupt between blocks of data in 4-bit SD mode (R/W) */ +#define SDIO_CAP_E4MI (0x1lu << 5) +/** Low-Speed Card (RO) */ +#define SDIO_CAP_LSC (0x1lu << 6) +/** 4-bit support for Low-Speed Card (RO) */ +#define SDIO_CAP_4BLS (0x1lu << 7) +/** Pointer to CIS (3B, LSB first) */ +#define SDIO_CCCR_CIS_PTR 0x09 +/** Bus Suspend */ +#define SDIO_CCCR_BUS_SUSPEND 0x0C +/** Bus Status (transfer on DAT[x] lines) (RO) */ +#define SDIO_BS (0x1lu << 0) +/** Bus Release Request/Status (R/W) */ +#define SDIO_BR (0x1lu << 1) +#define SDIO_CCCR_FUN_SEL 0x0D /**< Function select */ +#define SDIO_DF (0x1lu << 7) /**< Resume Data Flag (RO) */ +#define SDIO_FS (0xFlu << 0) /**< Select Function (R/W) */ +#define SDIO_FS_CIA (0x0lu << 0) /**< Select CIA (function 0) */ +#define SDIO_FS_FN1 (0x1lu << 0) /**< Select Function 1 */ +#define SDIO_FS_FN2 (0x2lu << 0) /**< Select Function 2 */ +#define SDIO_FS_FN3 (0x3lu << 0) /**< Select Function 3 */ +#define SDIO_FS_FN4 (0x4lu << 0) /**< Select Function 4 */ +#define SDIO_FS_FN5 (0x5lu << 0) /**< Select Function 5 */ +#define SDIO_FS_FN6 (0x6lu << 0) /**< Select Function 6 */ +#define SDIO_FS_FN7 (0x7lu << 0) /**< Select Function 7 */ +#define SDIO_FS_MEM (0x8lu << 0) /**< Select memory in combo card */ +#define SDIO_CCCR_EXEC 0x0E /**< Exec Flags (RO) */ +#define SDIO_EXM (0x1lu << 0) /**< Executing status of memory */ +#define SDIO_EX (0xFElu << 1) /**< Executing functions status */ +#define SDIO_EX_FN1 (0x1lu << 1) /**< Executing status of func 1 */ +#define SDIO_EX_FN2 (0x1lu << 2) /**< Executing status of func 2 */ +#define SDIO_EX_FN3 (0x1lu << 3) /**< Executing status of func 3 */ +#define SDIO_EX_FN4 (0x1lu << 4) /**< Executing status of func 4 */ +#define SDIO_EX_FN5 (0x1lu << 5) /**< Executing status of func 5 */ +#define SDIO_EX_FN6 (0x1lu << 6) /**< Executing status of func 6 */ +#define SDIO_EX_FN7 (0x1lu << 7) /**< Executing status of func 7 */ +#define SDIO_CCCR_READY 0x0F /**< Ready Flags (RO) */ +#define SDIO_RFM (0x1lu << 0) /**< Ready Flag for memory */ +#define SDIO_RF (0xFElu) /**< Ready Flag for functions */ +#define SDIO_RF_FN1 (0x1lu << 1) /**< Ready Flag for function 1 */ +#define SDIO_RF_FN2 (0x1lu << 2) /**< Ready Flag for function 2 */ +#define SDIO_RF_FN3 (0x1lu << 3) /**< Ready Flag for function 3 */ +#define SDIO_RF_FN4 (0x1lu << 4) /**< Ready Flag for function 4 */ +#define SDIO_RF_FN5 (0x1lu << 5) /**< Ready Flag for function 5 */ +#define SDIO_RF_FN6 (0x1lu << 6) /**< Ready Flag for function 6 */ +#define SDIO_RF_FN7 (0x1lu << 7) /**< Ready Flag for function 7 */ +#define SDIO_CCCR_FN0_BLKSIZ 0x10 /**< FN0 Block Size (2B, LSB first) (R/W) */ +#define SDIO_CCCR_POWER 0x12 /**< Power Control */ +#define SDIO_SMPC (0x1lu << 0) /**< Support Master Power Control*/ +#define SDIO_EMPC (0x1lu << 1) /**< Enable Master Power Control */ +#define SDIO_CCCR_HS 0x13 /**< High-Speed */ +#define SDIO_SHS (0x1lu << 0) /**< Support High-Speed (RO) */ +#define SDIO_EHS (0x1lu << 1) /**< Enable High-Speed (R/W) */ + //! @} + +//! \name SDIO Function Basic Registers (FBR) +//! @{ +#define SDIO_FBR_ADDR(fn, x) (0x100 * (fn) + (x)) +#define SDIO_FBR_CSA_IF 0x0 /**< CSA and function interface code (RO) */ +#define SDIO_IFC (0xFUL << 0) /**< Standard SDIO Fun Interface Code */ +#define SDIO_IFC_NO_IF (0x0UL << 0) /**< No SDIO standard interface */ +#define SDIO_IFC_UART (0x1UL << 0) /**< UART */ +#define SDIO_IFC_TA_BT (0x2UL << 0) /**< Type-A Bluetooth */ +#define SDIO_IFC_TB_BT (0x3UL << 0) /**< Type-B Bluetooth */ +#define SDIO_IFC_GPS (0x4UL << 0) /**< GPS */ +#define SDIO_IFC_CAMERA (0x5UL << 0) /**< Camera */ +#define SDIO_IFC_PHS (0x6UL << 0) /**< PHS */ +#define SDIO_IFC_WLAN (0x7UL << 0) /**< WLAN */ +#define SDIO_IFC_ATA (0x8UL << 0) /**< Embedded SDIO-ATA */ +#define SDIO_IFC_EXT (0xFUL << 0) /**< Check EXT interface code */ +#define SDIO_SCSA (0x1UL << 6) /**< Function supports Code Storage Area (CSA) */ +#define SDIO_FBR_CSA (0x1UL << 7) /**< Function CSA enable */ +#define SDIO_FBR_EXT_IF 0x1 /**< Extended function interface code (RO) */ +#define SDIO_FBR_PWR 0x2 /**< function power control */ +#define SDIO_SPS (0x1UL << 0) /**< function support power selection (RO) */ +#define SDIO_EPS (0x1UL << 1) /**< Low Current Mode/High Current Mode (R/W) */ +#define SDIO_FBR_CIS_PTR 0x9 /**< Address pointer to function CIS (3B, LSB first) (RO) */ +#define SDIO_FBR_CSA_PTR 0xC /**< Address pointer to CSA (3B, LSB first) (R/W) */ +#define SDIO_FBR_CSA_DATA 0xF /**< Read/Write fifo to CSA (R/W) */ +#define SDIO_FBR_BLK_SIZ 0x10 /**< Block size (2B, LSB first) (R/W) */ + //! @} + +//! \name SDIO Card Metaformat +//! @{ +/** Null tuple (PCMCIA 3.1.9) */ +#define SDIO_CISTPL_NULL 0x00 +/** Device tuple (PCMCIA 3.2.2) */ +#define SDIO_CISTPL_DEVICE 0x01 +/** Checksum control (PCMCIA 3.1.1) */ +#define SDIO_CISTPL_CHECKSUM 0x10 +/** Level 1 version (PCMCIA 3.2.10) */ +#define SDIO_CISTPL_VERS_1 0x15 +/** Alternate Language String (PCMCIA 3.2.1) */ +#define SDIO_CISTPL_ALTSTR 0x16 +/** Manufacturer Identification String (PCMCIA 3.2.9) */ +#define SDIO_CISTPL_MANFID 0x20 +/** Function Identification (PCMCIA 3.2.7) */ +#define SDIO_CISTPL_FUNCID 0x21 +/** Function Extensions (PCMCIA 3.2.6) */ +#define SDIO_CISTPL_FUNCE 0x22 +/** Additional information for SDIO (PCMCIA 6.1.2) */ +#define SDIO_CISTPL_SDIO_STD 0x91 +/** Reserved for future SDIO (PCMCIA 6.1.3) */ +#define SDIO_CISTPL_SDIO_EXT 0x92 +/** The End-of-chain Tuple (PCMCIA 3.1.2) */ +#define SDIO_CISTPL_END 0xFF +//! @} + +//! @} + +//! \name CSD, OCR, SCR, Switch status, extend CSD definitions +//! @{ + +/** + * \brief Macro function to extract a bits field from a large SD MMC register + * Used by : CSD, SCR, Switch status + */ +static inline uint32_t SDMMC_UNSTUFF_BITS(uint8_t *reg, uint16_t reg_size, uint16_t pos, uint8_t size) +{ + uint32_t value; + value = reg[((reg_size - pos + 7) / 8) - 1] >> (pos % 8); + if (((pos % 8) + size) > 8) { + value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 2] << (8 - (pos % 8)); + } + if (((pos % 8) + size) > 16) { + value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 3] << (16 - (pos % 8)); + } + if (((pos % 8) + size) > 24) { + value |= (uint32_t)reg[((reg_size - pos + 7) / 8) - 3] << (24 - (pos % 8)); + } + value &= ((uint32_t)1 << size) - 1; + return value; +} + + //! \name CSD Fields + //! @{ +#define CSD_REG_BIT_SIZE 128 //!< 128 bits +#define CSD_REG_BSIZE (CSD_REG_BIT_SIZE / 8) //!< 16 bytes +#define CSD_STRUCTURE(csd, pos, size) SDMMC_UNSTUFF_BITS(csd, CSD_REG_BIT_SIZE, pos, size) +#define CSD_STRUCTURE_VERSION(csd) CSD_STRUCTURE(csd, 126, 2) +#define SD_CSD_VER_1_0 0 +#define SD_CSD_VER_2_0 1 +#define MMC_CSD_VER_1_0 0 +#define MMC_CSD_VER_1_1 1 +#define MMC_CSD_VER_1_2 2 +#define CSD_TRAN_SPEED(csd) CSD_STRUCTURE(csd, 96, 8) +#define SD_CSD_1_0_C_SIZE(csd) CSD_STRUCTURE(csd, 62, 12) +#define SD_CSD_1_0_C_SIZE_MULT(csd) CSD_STRUCTURE(csd, 47, 3) +#define SD_CSD_1_0_READ_BL_LEN(csd) CSD_STRUCTURE(csd, 80, 4) +#define SD_CSD_2_0_C_SIZE(csd) CSD_STRUCTURE(csd, 48, 22) +#define MMC_CSD_C_SIZE(csd) CSD_STRUCTURE(csd, 62, 12) +#define MMC_CSD_C_SIZE_MULT(csd) CSD_STRUCTURE(csd, 47, 3) +#define MMC_CSD_READ_BL_LEN(csd) CSD_STRUCTURE(csd, 80, 4) +#define MMC_CSD_SPEC_VERS(csd) CSD_STRUCTURE(csd, 122, 4) + //! @} + + //! \name OCR Register Fields + //! @{ +#define OCR_REG_BSIZE (32 / 8) /**< 32 bits, 4 bytes */ +#define OCR_VDD_170_195 (1lu << 7) +#define OCR_VDD_20_21 (1lu << 8) +#define OCR_VDD_21_22 (1lu << 9) +#define OCR_VDD_22_23 (1lu << 10) +#define OCR_VDD_23_24 (1lu << 11) +#define OCR_VDD_24_25 (1lu << 12) +#define OCR_VDD_25_26 (1lu << 13) +#define OCR_VDD_26_27 (1lu << 14) +#define OCR_VDD_27_28 (1lu << 15) +#define OCR_VDD_28_29 (1lu << 16) +#define OCR_VDD_29_30 (1lu << 17) +#define OCR_VDD_30_31 (1lu << 18) +#define OCR_VDD_31_32 (1lu << 19) +#define OCR_VDD_32_33 (1lu << 20) +#define OCR_VDD_33_34 (1lu << 21) +#define OCR_VDD_34_35 (1lu << 22) +#define OCR_VDD_35_36 (1lu << 23) +#define OCR_SDIO_S18R (1lu << 24) /**< Switching to 1.8V Accepted */ +#define OCR_SDIO_MP (1lu << 27) /**< Memory Present */ +#define OCR_SDIO_NF (7lu << 28) /**< Number of I/O Functions */ +#define OCR_ACCESS_MODE_MASK (3lu << 29) /**< (MMC) Access mode mask */ +#define OCR_ACCESS_MODE_BYTE (0lu << 29) /**< (MMC) Byte access mode */ +#define OCR_ACCESS_MODE_SECTOR (2lu << 29) /**< (MMC) Sector access mode */ +#define OCR_CCS (1lu << 30) /**< (SD) Card Capacity Status */ +#define OCR_POWER_UP_BUSY (1lu << 31) /**< Card power up status bit */ + //! @} + + //! \name SD SCR Register Fields + //! @{ +#define SD_SCR_REG_BIT_SIZE 64 //!< 64 bits +#define SD_SCR_REG_BSIZE (SD_SCR_REG_BIT_SIZE / 8) //!< 8 bytes +#define SD_SCR_STRUCTURE(scr, pos, size) SDMMC_UNSTUFF_BITS(scr, SD_SCR_REG_BIT_SIZE, pos, size) +#define SD_SCR_SCR_STRUCTURE(scr) SD_SCR_STRUCTURE(scr, 60, 4) +#define SD_SCR_SCR_STRUCTURE_1_0 0 +#define SD_SCR_SD_SPEC(scr) SD_SCR_STRUCTURE(scr, 56, 4) +#define SD_SCR_SD_SPEC_1_0_01 0 +#define SD_SCR_SD_SPEC_1_10 1 +#define SD_SCR_SD_SPEC_2_00 2 +#define SD_SCR_DATA_STATUS_AFTER_ERASE(scr) SD_SCR_STRUCTURE(scr, 55, 1) +#define SD_SCR_SD_SECURITY(scr) SD_SCR_STRUCTURE(scr, 52, 3) +#define SD_SCR_SD_SECURITY_NO 0 +#define SD_SCR_SD_SECURITY_NOTUSED 1 +#define SD_SCR_SD_SECURITY_1_01 2 +#define SD_SCR_SD_SECURITY_2_00 3 +#define SD_SCR_SD_SECURITY_3_00 4 +#define SD_SCR_SD_BUS_WIDTHS(scr) SD_SCR_STRUCTURE(scr, 48, 4) +#define SD_SCR_SD_BUS_WIDTH_1BITS (1lu << 0) +#define SD_SCR_SD_BUS_WIDTH_4BITS (1lu << 2) +#define SD_SCR_SD_SPEC3(scr) SD_SCR_STRUCTURE(scr, 47, 1) +#define SD_SCR_SD_SPEC_3_00 1 +#define SD_SCR_SD_EX_SECURITY(scr) SD_SCR_STRUCTURE(scr, 43, 4) +#define SD_SCR_SD_CMD_SUPPORT(scr) SD_SCR_STRUCTURE(scr, 32, 2) + //! @} + + //! \name SD Switch Status Fields + //! @{ +#define SD_SW_STATUS_BIT_SIZE 512 //!< 512 bits +#define SD_SW_STATUS_BSIZE (SD_SW_STATUS_BIT_SIZE / 8) //!< 64 bytes +#define SD_SW_STATUS_STRUCTURE(sd_sw_status, pos, size) \ + SDMMC_UNSTUFF_BITS(sd_sw_status, SD_SW_STATUS_BIT_SIZE, pos, size) +#define SD_SW_STATUS_MAX_CURRENT_CONSUMPTION(status) SD_SW_STATUS_STRUCTURE(status, 496, 16) +#define SD_SW_STATUS_FUN_GRP6_INFO(status) SD_SW_STATUS_STRUCTURE(status, 480, 16) +#define SD_SW_STATUS_FUN_GRP5_INFO(status) SD_SW_STATUS_STRUCTURE(status, 464, 16) +#define SD_SW_STATUS_FUN_GRP4_INFO(status) SD_SW_STATUS_STRUCTURE(status, 448, 16) +#define SD_SW_STATUS_FUN_GRP3_INFO(status) SD_SW_STATUS_STRUCTURE(status, 432, 16) +#define SD_SW_STATUS_FUN_GRP2_INFO(status) SD_SW_STATUS_STRUCTURE(status, 416, 16) +#define SD_SW_STATUS_FUN_GRP1_INFO(status) SD_SW_STATUS_STRUCTURE(status, 400, 16) +#define SD_SW_STATUS_FUN_GRP6_RC(status) SD_SW_STATUS_STRUCTURE(status, 396, 4) +#define SD_SW_STATUS_FUN_GRP5_RC(status) SD_SW_STATUS_STRUCTURE(status, 392, 4) +#define SD_SW_STATUS_FUN_GRP4_RC(status) SD_SW_STATUS_STRUCTURE(status, 388, 4) +#define SD_SW_STATUS_FUN_GRP3_RC(status) SD_SW_STATUS_STRUCTURE(status, 384, 4) +#define SD_SW_STATUS_FUN_GRP2_RC(status) SD_SW_STATUS_STRUCTURE(status, 380, 4) +#define SD_SW_STATUS_FUN_GRP1_RC(status) SD_SW_STATUS_STRUCTURE(status, 376, 4) +#define SD_SW_STATUS_FUN_GRP_RC_ERROR 0xFU +#define SD_SW_STATUS_DATA_STRUCT_VER(status) SD_SW_STATUS_STRUCTURE(status, 368, 8) +#define SD_SW_STATUS_FUN_GRP6_BUSY(status) SD_SW_STATUS_STRUCTURE(status, 352, 16) +#define SD_SW_STATUS_FUN_GRP5_BUSY(status) SD_SW_STATUS_STRUCTURE(status, 336, 16) +#define SD_SW_STATUS_FUN_GRP4_BUSY(status) SD_SW_STATUS_STRUCTURE(status, 320, 16) +#define SD_SW_STATUS_FUN_GRP3_BUSY(status) SD_SW_STATUS_STRUCTURE(status, 304, 16) +#define SD_SW_STATUS_FUN_GRP2_BUSY(status) SD_SW_STATUS_STRUCTURE(status, 288, 16) +#define SD_SW_STATUS_FUN_GRP1_BUSY(status) SD_SW_STATUS_STRUCTURE(status, 272, 16) + //! @} + + //! \name Card Status Fields + //! @{ +#define CARD_STATUS_APP_CMD (1lu << 5) +#define CARD_STATUS_SWITCH_ERROR (1lu << 7) +#define CARD_STATUS_READY_FOR_DATA (1lu << 8) +#define CARD_STATUS_STATE_IDLE (0lu << 9) +#define CARD_STATUS_STATE_READY (1lu << 9) +#define CARD_STATUS_STATE_IDENT (2lu << 9) +#define CARD_STATUS_STATE_STBY (3lu << 9) +#define CARD_STATUS_STATE_TRAN (4lu << 9) +#define CARD_STATUS_STATE_DATA (5lu << 9) +#define CARD_STATUS_STATE_RCV (6lu << 9) +#define CARD_STATUS_STATE_PRG (7lu << 9) +#define CARD_STATUS_STATE_DIS (8lu << 9) +#define CARD_STATUS_STATE (0xFlu << 9) +#define CARD_STATUS_ERASE_RESET (1lu << 13) +#define CARD_STATUS_WP_ERASE_SKIP (1lu << 15) +#define CARD_STATUS_CIDCSD_OVERWRITE (1lu << 16) +#define CARD_STATUS_OVERRUN (1lu << 17) +#define CARD_STATUS_UNERRUN (1lu << 18) +#define CARD_STATUS_ERROR (1lu << 19) +#define CARD_STATUS_CC_ERROR (1lu << 20) +#define CARD_STATUS_CARD_ECC_FAILED (1lu << 21) +#define CARD_STATUS_ILLEGAL_COMMAND (1lu << 22) +#define CARD_STATUS_COM_CRC_ERROR (1lu << 23) +#define CARD_STATUS_UNLOCK_FAILED (1lu << 24) +#define CARD_STATUS_CARD_IS_LOCKED (1lu << 25) +#define CARD_STATUS_WP_VIOLATION (1lu << 26) +#define CARD_STATUS_ERASE_PARAM (1lu << 27) +#define CARD_STATUS_ERASE_SEQ_ERROR (1lu << 28) +#define CARD_STATUS_BLOCK_LEN_ERROR (1lu << 29) +#define CARD_STATUS_ADDRESS_MISALIGN (1lu << 30) +#define CARD_STATUS_ADDR_OUT_OF_RANGE (1lu << 31) + +#define CARD_STATUS_ERR_RD_WR \ + (CARD_STATUS_ADDR_OUT_OF_RANGE | CARD_STATUS_ADDRESS_MISALIGN | CARD_STATUS_BLOCK_LEN_ERROR \ + | CARD_STATUS_WP_VIOLATION | CARD_STATUS_ILLEGAL_COMMAND | CARD_STATUS_CC_ERROR | CARD_STATUS_ERROR) + //! @} + + //! \name SD Status Field + //! @{ +#define SD_STATUS_BSIZE (512 / 8) /**< 512 bits, 64bytes */ + //! @} + + //! \name MMC Extended CSD Register Field + //! @{ +#define EXT_CSD_BSIZE 512 /**< 512 bytes. */ +/* Below belongs to Properties Segment */ +#define EXT_CSD_S_CMD_SET_INDEX 504lu +#define EXT_CSD_BOOT_INFO_INDEX 228lu +#define EXT_CSD_BOOT_SIZE_MULTI_INDEX 226lu +#define EXT_CSD_ACC_SIZE_INDEX 225lu +#define EXT_CSD_HC_ERASE_GRP_SIZE_INDEX 224lu +#define EXT_CSD_ERASE_TIMEOUT_MULT_INDEX 223lu +#define EXT_CSD_REL_WR_SEC_C_INDEX 222lu +#define EXT_CSD_HC_WP_GRP_SIZE_INDEX 221lu +#define EXT_CSD_S_C_VCC_INDEX 220lu +#define EXT_CSD_S_C_VCCQ_INDEX 219lu +#define EXT_CSD_S_A_TIMEOUT_INDEX 217lu +#define EXT_CSD_SEC_COUNT_INDEX 212lu +#define EXT_CSD_MIN_PERF_W_8_52_INDEX 210lu +#define EXT_CSD_MIN_PERF_R_8_52_INDEX 209lu +#define EXT_CSD_MIN_PERF_W_8_26_4_52_INDEX 208lu +#define EXT_CSD_MIN_PERF_R_8_26_4_52_INDEX 207lu +#define EXT_CSD_MIN_PERF_W_4_26_INDEX 206lu +#define EXT_CSD_MIN_PERF_R_4_26_INDEX 205lu +#define EXT_CSD_PWR_CL_26_360_INDEX 203lu +#define EXT_CSD_PWR_CL_52_360_INDEX 202lu +#define EXT_CSD_PWR_CL_26_195_INDEX 201lu +#define EXT_CSD_PWR_CL_52_195_INDEX 200lu +#define EXT_CSD_CARD_TYPE_INDEX 196lu +/* MMC card type */ +#define MMC_CTYPE_26MHZ 0x1 +#define MMC_CTYPE_52MHZ 0x2 +#define EXT_CSD_CSD_STRUCTURE_INDEX 194lu +#define EXT_CSD_EXT_CSD_REV_INDEX 192lu + +/* Below belongs to Mode Segment */ +#define EXT_CSD_CMD_SET_INDEX 191lu +#define EXT_CSD_CMD_SET_REV_INDEX 189lu +#define EXT_CSD_POWER_CLASS_INDEX 187lu +#define EXT_CSD_HS_TIMING_INDEX 185lu +#define EXT_CSD_BUS_WIDTH_INDEX 183lu +#define EXT_CSD_ERASED_MEM_CONT_INDEX 181lu +#define EXT_CSD_BOOT_CONFIG_INDEX 179lu +#define EXT_CSD_BOOT_BUS_WIDTH_INDEX 177lu +#define EXT_CSD_ERASE_GROUP_DEF_INDEX 175lu + //! @} +//! @} + +//! \name Definition for SPI mode only +//! @{ + +//! SPI commands start with a start bit "0" and a transmit bit "1" +#define SPI_CMD_ENCODE(x) (0x40 | (x & 0x3F)) + +//! \name Register R1 definition for SPI mode +//! The R1 register is always send after a command. +//! @{ +#define R1_SPI_IDLE (1lu << 0) +#define R1_SPI_ERASE_RESET (1lu << 1) +#define R1_SPI_ILLEGAL_COMMAND (1lu << 2) +#define R1_SPI_COM_CRC (1lu << 3) +#define R1_SPI_ERASE_SEQ (1lu << 4) +#define R1_SPI_ADDRESS (1lu << 5) +#define R1_SPI_PARAMETER (1lu << 6) +// R1 bit 7 is always zero, reuse this bit for error +#define R1_SPI_ERROR (1lu << 7) +//! @} + +//! \name Register R2 definition for SPI mode +//! The R2 register can be send after R1 register. +//! @{ +#define R2_SPI_CARD_LOCKED (1lu << 0) +#define R2_SPI_WP_ERASE_SKIP (1lu << 1) +#define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP +#define R2_SPI_ERROR (1lu << 2) +#define R2_SPI_CC_ERROR (1lu << 3) +#define R2_SPI_CARD_ECC_ERROR (1lu << 4) +#define R2_SPI_WP_VIOLATION (1lu << 5) +#define R2_SPI_ERASE_PARAM (1lu << 6) +#define R2_SPI_OUT_OF_RANGE (1lu << 7) +#define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE +//! @} + +//! \name Control Tokens in SPI Mode +//! @{ +//! \name Tokens used for a read operation +//! @{ +#define SPI_TOKEN_SINGLE_MULTI_READ 0xFE +#define SPI_TOKEN_DATA_ERROR_VALID(token) (((token)&0xF0) == 0) +#define SPI_TOKEN_DATA_ERROR_ERRORS (0x0F) +#define SPI_TOKEN_DATA_ERROR_ERROR (1lu << 0) +#define SPI_TOKEN_DATA_ERROR_CC_ERROR (1lu << 1) +#define SPI_TOKEN_DATA_ERROR_ECC_ERROR (1lu << 2) +#define SPI_TOKEN_DATA_ERROR_OUT_RANGE (1lu << 3) + //! @} + //! \name Tokens used for a write operation + //! @{ +#define SPI_TOKEN_SINGLE_WRITE 0xFE +#define SPI_TOKEN_MULTI_WRITE 0xFC +#define SPI_TOKEN_STOP_TRAN 0xFD +#define SPI_TOKEN_DATA_RESP_VALID(token) ((((token) & (1 << 4)) == 0) && (((token) & (1 << 0)) == 1)) +#define SPI_TOKEN_DATA_RESP_CODE(token) ((token)&0x1E) +#define SPI_TOKEN_DATA_RESP_ACCEPTED (2lu << 1) +#define SPI_TOKEN_DATA_RESP_CRC_ERR (5lu << 1) +#define SPI_TOKEN_DATA_RESP_WRITE_ERR (6lu << 1) + //! @} + //! @} + //! @} + + //! @} end of sd_mmc_protocol + +#ifdef __cplusplus +} +#endif + +#endif /* SD_MMC_PROTOCOL_H_INCLUDED */ diff --git a/ports/atmel-samd/supervisor/internal_flash.c b/ports/atmel-samd/supervisor/internal_flash.c index 9c8ff990e..091959c4e 100644 --- a/ports/atmel-samd/supervisor/internal_flash.c +++ b/ports/atmel-samd/supervisor/internal_flash.c @@ -39,6 +39,12 @@ #ifdef SAMD21 #include "hpl/pm/hpl_pm_base.h" #endif +#ifdef SAME54 +#include "hri/hri_mclk_e54.h" +#endif +#ifdef SAMD51 +#include "hri/hri_mclk_d51.h" +#endif #include "hal/include/hal_flash.h" #include "supervisor/flash.h" @@ -57,7 +63,7 @@ void supervisor_flash_init(void) { port_pin_set_output_level(MICROPY_HW_LED_MSC, false); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X hri_mclk_set_AHBMASK_NVMCTRL_bit(MCLK); #endif #ifdef SAMD21 diff --git a/ports/atmel-samd/supervisor/port.c b/ports/atmel-samd/supervisor/port.c index 2b3e9826f..65501861e 100644 --- a/ports/atmel-samd/supervisor/port.c +++ b/ports/atmel-samd/supervisor/port.c @@ -40,11 +40,14 @@ #include "hpl/gclk/hpl_gclk_base.h" #include "hpl/pm/hpl_pm_base.h" -#ifdef SAMD21 +#if defined(SAMD21) #include "hri/hri_pm_d21.h" -#endif -#ifdef SAMD51 +#elif defined(SAME54) +#include "hri/hri_rstc_e54.h" +#elif defined(SAMD51) #include "hri/hri_rstc_d51.h" +#else +#error Unknown chip family #endif #include "common-hal/analogio/AnalogIn.h" @@ -85,7 +88,26 @@ #if CIRCUITPY_GAMEPADSHIFT #include "shared-module/gamepadshift/__init__.h" #endif -#include "shared-module/_pew/PewPew.h" +#if CIRCUITPY_PEW +#include "common-hal/_pew/PewPew.h" +#endif +volatile bool hold_interrupt = false; +#ifdef SAMD21 +void rtc_start_pulsein(void) { + rtc_set_continuous(); + hold_interrupt = true; +} + +void rtc_end_pulsein(void) { + hold_interrupt = false; +} + +void rtc_set_continuous(void) { + while (RTC->MODE0.STATUS.bit.SYNCBUSY); + RTC->MODE0.READREQ.reg = RTC_READREQ_RREQ | RTC_READREQ_RCONT | 0x0010; + while (RTC->MODE0.STATUS.bit.SYNCBUSY); +} +#endif extern volatile bool mp_msc_enabled; @@ -144,7 +166,7 @@ static void rtc_init(void) { RTC_MODE0_CTRL_MODE_COUNT32 | RTC_MODE0_CTRL_PRESCALER_DIV2; #endif -#ifdef SAMD51 +#ifdef SAM_D5X_E5X hri_mclk_set_APBAMASK_RTC_bit(MCLK); RTC->MODE0.CTRLA.bit.SWRST = true; while (RTC->MODE0.SYNCBUSY.bit.SWRST != 0) {} @@ -167,7 +189,7 @@ static void rtc_init(void) { NVIC_SetPriority(USB_IRQn, 1); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X NVIC_SetPriority(USB_0_IRQn, 1); NVIC_SetPriority(USB_1_IRQn, 1); NVIC_SetPriority(USB_2_IRQn, 1); @@ -184,11 +206,10 @@ static void rtc_init(void) { safe_mode_t port_init(void) { #if defined(SAMD21) - // Set brownout detection to ~2.7V. Default from factory is 1.7V, - // which is too low for proper operation of external SPI flash chips (they are 2.7-3.6V). + // Set brownout detection. // Disable while changing level. SYSCTRL->BOD33.bit.ENABLE = 0; - SYSCTRL->BOD33.bit.LEVEL = 39; // 2.77V with hysteresis off. Table 37.20 in datasheet. + SYSCTRL->BOD33.bit.LEVEL = SAMD21_BOD33_LEVEL; SYSCTRL->BOD33.bit.ENABLE = 1; #ifdef ENABLE_MICRO_TRACE_BUFFER @@ -202,12 +223,11 @@ safe_mode_t port_init(void) { #endif #endif -#if defined(SAMD51) - // Set brownout detection to ~2.7V. Default from factory is 1.7V, - // which is too low for proper operation of external SPI flash chips (they are 2.7-3.6V). +#if defined(SAM_D5X_E5X) + // Set brownout detection. // Disable while changing level. SUPC->BOD33.bit.ENABLE = 0; - SUPC->BOD33.bit.LEVEL = 200; // 2.7V: 1.5V + LEVEL * 6mV. + SUPC->BOD33.bit.LEVEL = SAMD5x_E5x_BOD33_LEVEL; SUPC->BOD33.bit.ENABLE = 1; // MPU (Memory Protection Unit) setup. @@ -281,7 +301,7 @@ safe_mode_t port_init(void) { return BROWNOUT; } #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X if (RSTC->RCAUSE.bit.BODVDD == 1 || RSTC->RCAUSE.bit.BODCORE == 1) { return BROWNOUT; } @@ -339,7 +359,7 @@ void reset_port(void) { // Output clocks for debugging. // not supported by SAMD51G; uncomment for SAMD51J or update for 51G - // #ifdef SAMD51 + // #ifdef SAM_D5X_E5X // gpio_set_pin_function(PIN_PA10, GPIO_PIN_FUNCTION_M); // GCLK4, D3 // gpio_set_pin_function(PIN_PA11, GPIO_PIN_FUNCTION_M); // GCLK5, A4 // gpio_set_pin_function(PIN_PB14, GPIO_PIN_FUNCTION_M); // GCLK0, D5 @@ -386,7 +406,7 @@ uint32_t *port_heap_get_top(void) { #ifdef SAMD21 uint32_t* safe_word = (uint32_t*) (HMCRAMC0_ADDR + HMCRAMC0_SIZE - 0x2000); #endif -#ifdef SAMD51 +#ifdef SAM_D5X_E5X uint32_t* safe_word = (uint32_t*) (HSRAM_ADDR + HSRAM_SIZE - 0x2000); #endif @@ -410,7 +430,7 @@ void RTC_Handler(void) { // Our RTC is 32 bits and we're clocking it at 16.384khz which is 16 (2 ** 4) subticks per // tick. overflowed_ticks += (1L<< (32 - 4)); - #ifdef SAMD51 + #ifdef SAM_D5X_E5X } else if (intflag & RTC_MODE0_INTFLAG_PER2) { RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_PER2; // Do things common to all ports when the tick occurs @@ -429,14 +449,14 @@ void RTC_Handler(void) { } } #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X RTC->MODE0.INTENCLR.reg = RTC_MODE0_INTENCLR_CMP0; #endif } } static uint32_t _get_count(void) { - #ifdef SAMD51 + #ifdef SAM_D5X_E5X while ((RTC->MODE0.SYNCBUSY.reg & (RTC_MODE0_SYNCBUSY_COUNTSYNC | RTC_MODE0_SYNCBUSY_COUNT)) != 0) {} #endif #ifdef SAMD21 @@ -457,7 +477,7 @@ uint64_t port_get_raw_ticks(uint8_t* subticks) { // Enable 1/1024 second tick. void port_enable_tick(void) { - #ifdef SAMD51 + #ifdef SAM_D5X_E5X // PER2 will generate an interrupt every 32 ticks of the source 32.768 clock. RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_PER2; #endif @@ -469,7 +489,7 @@ void port_enable_tick(void) { // Disable 1/1024 second tick. void port_disable_tick(void) { - #ifdef SAMD51 + #ifdef SAM_D5X_E5X RTC->MODE0.INTENCLR.reg = RTC_MODE0_INTENCLR_PER2; #endif #ifdef SAMD21 @@ -484,13 +504,18 @@ void port_interrupt_after_ticks(uint32_t ticks) { // We'll interrupt sooner with an overflow. return; } +#ifdef SAMD21 + if (hold_interrupt) { + return; + } +#endif RTC->MODE0.COMP[0].reg = current_ticks + (ticks << 4); RTC->MODE0.INTFLAG.reg = RTC_MODE0_INTFLAG_CMP0; RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_CMP0; } void port_sleep_until_interrupt(void) { - #ifdef SAMD51 + #ifdef SAM_D5X_E5X // Clear the FPU interrupt because it can prevent us from sleeping. if (__get_FPSCR() & ~(0x9f)) { __set_FPSCR(__get_FPSCR() & ~(0x9f)); @@ -498,7 +523,7 @@ void port_sleep_until_interrupt(void) { } #endif common_hal_mcu_disable_interrupts(); - if (!tud_task_event_ready()) { + if (!tud_task_event_ready() && !hold_interrupt) { __DSB(); __WFI(); } diff --git a/ports/atmel-samd/supervisor/same54_cpu.s b/ports/atmel-samd/supervisor/same54_cpu.s new file mode 100755 index 000000000..9e6807a5e --- /dev/null +++ b/ports/atmel-samd/supervisor/same54_cpu.s @@ -0,0 +1,27 @@ +.syntax unified +.cpu cortex-m4 +.thumb +.text +.align 2 + +@ uint cpu_get_regs_and_sp(r0=uint regs[10]) +.global cpu_get_regs_and_sp +.thumb +.thumb_func +.type cpu_get_regs_and_sp, %function +cpu_get_regs_and_sp: +@ store registers into given array +str r4, [r0], #4 +str r5, [r0], #4 +str r6, [r0], #4 +str r7, [r0], #4 +str r8, [r0], #4 +str r9, [r0], #4 +str r10, [r0], #4 +str r11, [r0], #4 +str r12, [r0], #4 +str r13, [r0], #4 + +@ return the sp +mov r0, sp +bx lr diff --git a/ports/atmel-samd/supervisor/usb.c b/ports/atmel-samd/supervisor/usb.c index b8a94790d..650ed6a39 100644 --- a/ports/atmel-samd/supervisor/usb.c +++ b/ports/atmel-samd/supervisor/usb.c @@ -37,7 +37,7 @@ void init_usb_hardware(void) { _gclk_enable_channel(USB_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN); hri_mclk_set_AHBMASK_USB_bit(MCLK); hri_mclk_set_APBBMASK_USB_bit(MCLK); @@ -53,7 +53,7 @@ void init_usb_hardware(void) { gpio_set_pin_function(PIN_PA24, PINMUX_PA24G_USB_DM); gpio_set_pin_function(PIN_PA25, PINMUX_PA25G_USB_DP); #endif - #ifdef SAMD51 + #ifdef SAM_D5X_E5X gpio_set_pin_function(PIN_PA24, PINMUX_PA24H_USB_DM); gpio_set_pin_function(PIN_PA25, PINMUX_PA25H_USB_DP); #endif @@ -65,7 +65,7 @@ void USB_Handler(void) { } #endif -#ifdef SAMD51 +#ifdef SAM_D5X_E5X void USB_0_Handler (void) { tud_int_handler(0); } diff --git a/ports/atmel-samd/timer_handler.c b/ports/atmel-samd/timer_handler.c index 34d819e16..16d65334e 100644 --- a/ports/atmel-samd/timer_handler.c +++ b/ports/atmel-samd/timer_handler.c @@ -31,7 +31,7 @@ #include "common-hal/pulseio/PulseIn.h" #include "common-hal/pulseio/PulseOut.h" -#include "shared-module/_pew/PewPew.h" +#include "common-hal/_pew/PewPew.h" #include "common-hal/frequencyio/FrequencyIn.h" extern void _PM_IRQ_HANDLER(void); diff --git a/ports/cxd56/Makefile b/ports/cxd56/Makefile index 507d76331..3766d4222 100644 --- a/ports/cxd56/Makefile +++ b/ports/cxd56/Makefile @@ -62,6 +62,13 @@ SPRESENSE_SDK = spresense-exported-sdk FIRMWARE = $(SPRESENSE_SDK)/firmware +BOOTLOADER_FILES += \ + $(FIRMWARE)/AESM.espk \ + $(FIRMWARE)/dnnrt-mp.espk \ + $(FIRMWARE)/gnssfw.espk \ + $(FIRMWARE)/loader.espk \ + $(FIRMWARE)/sysutil.spk \ + # Platforms are: Linux, Darwin, MSYS, CYGWIN PLATFORM := $(firstword $(subst _, ,$(shell uname -s 2>/dev/null))) @@ -91,8 +98,7 @@ INC += \ -I$(SPRESENSE_SDK)/nuttx/arch \ -I$(SPRESENSE_SDK)/nuttx/arch/chip \ -I$(SPRESENSE_SDK)/nuttx/arch/os \ - -I$(SPRESENSE_SDK)/sdk/bsp/include \ - -I$(SPRESENSE_SDK)/sdk/bsp/include/sdk \ + -I$(SPRESENSE_SDK)/sdk/include \ CFLAGS += \ $(INC) \ @@ -125,7 +131,7 @@ LDFLAGS = \ --entry=__start \ -nostartfiles \ -nodefaultlibs \ - -T$(SPRESENSE_SDK)/nuttx/build/ramconfig.ld \ + -T$(SPRESENSE_SDK)/nuttx/scripts/ramconfig.ld \ --gc-sections \ -Map=$(BUILD)/output.map \ -o $(BUILD)/firmware.elf \ @@ -133,8 +139,8 @@ LDFLAGS = \ -u spresense_main \ -u board_timerhook \ $(BUILD)/libmpy.a \ - $(SPRESENSE_SDK)/sdk/libs/libapps.a \ - $(SPRESENSE_SDK)/sdk/libs/libsdk.a \ + $(SPRESENSE_SDK)/nuttx/libs/libapps.a \ + $(SPRESENSE_SDK)/nuttx/libs/libnuttx.a \ $(LIBM) \ $(LIBGCC) \ --end-group \ @@ -213,11 +219,11 @@ $(BUILD)/firmware.spk: $(BUILD)/firmware.elf $(MKSPK) flash: $(BUILD)/firmware.spk $(ECHO) "Writing $< to the board" - $(SPRESENSE_SDK)/sdk/tools/flash.sh -c $(SERIAL) $(BUILD)/firmware.spk + tools/flash_writer.py -s -c $(SERIAL) -d -b 115200 -n $(BUILD)/firmware.spk flash-bootloader: $(SPRESENSE_SDK) $(FIRMWARE) $(ECHO) "Writing loader to the board" - $(SPRESENSE_SDK)/sdk/tools/flash.sh -l $(FIRMWARE) -c $(SERIAL) + tools/flash_writer.py -s -c $(SERIAL) -d -b 115200 -n $(BOOTLOADER_FILES) include $(TOP)/py/mkrules.mk diff --git a/ports/cxd56/README.md b/ports/cxd56/README.md index ec284e742..7fa439aac 100644 --- a/ports/cxd56/README.md +++ b/ports/cxd56/README.md @@ -16,7 +16,7 @@ Board features: * Spresense is powered by Sony's CXD5602 microcontroller (ARM® Cortex®-M4F × 6 cores), with a clock speed of 156 MHz. -Currently, Spresense port does not support GNSS, Audio and Multicore. +Currently, Spresense port does not support Audio and Multicore. Refer to [developer.sony.com/develop/spresense/](https://developer.sony.com/develop/spresense/) for further information about this board. @@ -75,7 +75,7 @@ Bootloader information: * You have to accept the End User License Agreement to be able to download and use the Spresense bootloader binary. -Download the spresense binaries zip archive from: [Spresense firmware v1-4-000](https://developer.sony.com/file/download/download-spresense-firmware-v1-4-000) +Download the spresense binaries zip archive from: [Spresense firmware v2-0-000](https://developer.sony.com/file/download/download-spresense-firmware-v2-0-000) Extract spresense binaries in your PC to ports/spresense/spresense-exported-sdk/firmware/ diff --git a/ports/cxd56/boards/spresense/pins.c b/ports/cxd56/boards/spresense/pins.c index fcc854590..5028d9155 100644 --- a/ports/cxd56/boards/spresense/pins.c +++ b/ports/cxd56/boards/spresense/pins.c @@ -24,8 +24,21 @@ * THE SOFTWARE. */ +#include "py/objtuple.h" + #include "shared-bindings/board/__init__.h" +STATIC const mp_rom_obj_tuple_t sdio_data_tuple = { + {&mp_type_tuple}, + 4, + { + MP_ROM_PTR(&pin_SDIO_DATA0), + MP_ROM_PTR(&pin_SDIO_DATA1), + MP_ROM_PTR(&pin_SDIO_DATA2), + MP_ROM_PTR(&pin_SDIO_DATA3), + } +}; + STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_UART2_RXD) }, { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_UART2_TXD) }, @@ -76,5 +89,8 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SDIO_CLOCK), MP_ROM_PTR(&pin_SDIO_CLK) }, + { MP_ROM_QSTR(MP_QSTR_SDIO_COMMAND), MP_ROM_PTR(&pin_SDIO_CMD) }, + { MP_ROM_QSTR(MP_QSTR_SDIO_DATA), MP_ROM_PTR(&sdio_data_tuple) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/cxd56/common-hal/busio/SPI.c b/ports/cxd56/common-hal/busio/SPI.c index 718a8ff16..2d365d482 100644 --- a/ports/cxd56/common-hal/busio/SPI.c +++ b/ports/cxd56/common-hal/busio/SPI.c @@ -130,7 +130,7 @@ bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, return true; } -bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { +bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) { SPI_EXCHANGE(self->spi_dev, data_out, data_in, len); return true; diff --git a/ports/cxd56/common-hal/busio/UART.c b/ports/cxd56/common-hal/busio/UART.c index e455b0568..52d2afc0c 100644 --- a/ports/cxd56/common-hal/busio/UART.c +++ b/ports/cxd56/common-hal/busio/UART.c @@ -56,7 +56,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, const mcu_pin_obj_t * rs485_dir, bool rs485_invert, - uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer, bool sigint_enabled) { struct termios tio; @@ -69,7 +69,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, mp_raise_ValueError(translate("Could not initialize UART")); } - if (parity != PARITY_NONE) { + if (parity != BUSIO_UART_PARITY_NONE) { mp_raise_ValueError(translate("Could not initialize UART")); } diff --git a/ports/cxd56/common-hal/gnss/GNSS.c b/ports/cxd56/common-hal/gnss/GNSS.c new file mode 100644 index 000000000..c0aaa3cfb --- /dev/null +++ b/ports/cxd56/common-hal/gnss/GNSS.c @@ -0,0 +1,135 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include <unistd.h> +#include <fcntl.h> +#include <string.h> +#include <sys/ioctl.h> + +#include "py/runtime.h" + +#include "shared-bindings/gnss/GNSS.h" + +typedef struct { + const char* devpath; + int fd; +} gnss_dev_t; + +STATIC gnss_dev_t gnss_dev = {"/dev/gps", -1}; + +static gnss_positionfix_t fix_to_positionfix_type(uint8_t fix) { + switch (fix) { + case CXD56_GNSS_PVT_POSFIX_2D: + return POSITIONFIX_2D; + case CXD56_GNSS_PVT_POSFIX_3D: + return POSITIONFIX_3D; + case CXD56_GNSS_PVT_POSFIX_INVALID: + default: + return POSITIONFIX_INVALID; + } +} + +void common_hal_gnss_construct(gnss_obj_t *self, unsigned long selection) { + if (gnss_dev.fd < 0) { + gnss_dev.fd = open(gnss_dev.devpath, O_RDONLY); + if (gnss_dev.fd < 0) { + mp_raise_ValueError(translate("Could not initialize GNSS")); + } + } + + self->satellite_system = 0; + self->fix = POSITIONFIX_INVALID; + + unsigned long sel = 0; + + if (selection & SATELLITESYSTEM_GPS) { + sel |= CXD56_GNSS_SAT_GPS; + } else if (selection & SATELLITESYSTEM_GLONASS) { + sel |= CXD56_GNSS_SAT_GLONASS; + } else if (selection & SATELLITESYSTEM_SBAS) { + sel |= CXD56_GNSS_SAT_SBAS; + } else if (selection & SATELLITESYSTEM_QZSS_L1CA) { + sel |= CXD56_GNSS_SAT_QZ_L1CA; + } else if (selection & SATELLITESYSTEM_QZSS_L1S) { + sel |= CXD56_GNSS_SAT_QZ_L1S; + } + + ioctl(gnss_dev.fd, CXD56_GNSS_IOCTL_SELECT_SATELLITE_SYSTEM, sel); + ioctl(gnss_dev.fd, CXD56_GNSS_IOCTL_START, CXD56_GNSS_STMOD_COLD); +} + +void common_hal_gnss_deinit(gnss_obj_t *self) { + if (common_hal_gnss_deinited(self)) { + return; + } + + close(gnss_dev.fd); + gnss_dev.fd = -1; +} + +bool common_hal_gnss_deinited(gnss_obj_t *self) { + return gnss_dev.fd < 0; +} + +void common_hal_gnss_update(gnss_obj_t *self) { + struct cxd56_gnss_positiondata_s positiondata; + + read(gnss_dev.fd, &positiondata, sizeof(struct cxd56_gnss_positiondata_s)); + + if (positiondata.receiver.pos_dataexist) { + self->fix = positiondata.receiver.pos_fixmode; + self->latitude = positiondata.receiver.latitude; + self->longitude = positiondata.receiver.longitude; + self->altitude = positiondata.receiver.altitude; + memcpy(&self->date, &positiondata.receiver.date, sizeof(struct cxd56_gnss_date_s)); + memcpy(&self->time, &positiondata.receiver.time, sizeof(struct cxd56_gnss_time_s)); + } +} + +mp_float_t common_hal_gnss_get_latitude(gnss_obj_t *self) { + return (mp_float_t) self->latitude; +} + +mp_float_t common_hal_gnss_get_longitude(gnss_obj_t *self) { + return (mp_float_t) self->longitude; +} + +mp_float_t common_hal_gnss_get_altitude(gnss_obj_t *self) { + return (mp_float_t) self->altitude; +} + +void common_hal_gnss_get_timestamp(gnss_obj_t *self, timeutils_struct_time_t *tm) { + tm->tm_year = self->date.year; + tm->tm_mon = self->date.month; + tm->tm_mday = self->date.day; + tm->tm_hour = self->time.hour; + tm->tm_min = self->time.minute; + tm->tm_sec = self->time.sec; +} + +gnss_positionfix_t common_hal_gnss_get_fix(gnss_obj_t *self) { + return fix_to_positionfix_type(self->fix); +} diff --git a/ports/cxd56/common-hal/gnss/GNSS.h b/ports/cxd56/common-hal/gnss/GNSS.h new file mode 100644 index 000000000..e22610449 --- /dev/null +++ b/ports/cxd56/common-hal/gnss/GNSS.h @@ -0,0 +1,45 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_GNSS_GNSS_H +#define MICROPY_INCLUDED_CXD56_COMMON_HAL_GNSS_GNSS_H + +#include <arch/chip/gnss.h> + +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + unsigned long satellite_system; + uint8_t fix; + double latitude; + double longitude; + double altitude; + struct cxd56_gnss_date_s date; + struct cxd56_gnss_time_s time; +} gnss_obj_t; + +#endif // MICROPY_INCLUDED_CXD56_COMMON_HAL_GNSS_GNSS_H diff --git a/ports/cxd56/common-hal/gnss/PositionFix.c b/ports/cxd56/common-hal/gnss/PositionFix.c new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/ports/cxd56/common-hal/gnss/PositionFix.c diff --git a/ports/cxd56/common-hal/gnss/SatelliteSystem.c b/ports/cxd56/common-hal/gnss/SatelliteSystem.c new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/ports/cxd56/common-hal/gnss/SatelliteSystem.c diff --git a/ports/cxd56/common-hal/gnss/__init__.c b/ports/cxd56/common-hal/gnss/__init__.c new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/ports/cxd56/common-hal/gnss/__init__.c diff --git a/ports/cxd56/common-hal/microcontroller/Pin.c b/ports/cxd56/common-hal/microcontroller/Pin.c index 23377197c..7aba1ad54 100644 --- a/ports/cxd56/common-hal/microcontroller/Pin.c +++ b/ports/cxd56/common-hal/microcontroller/Pin.c @@ -72,6 +72,12 @@ const mcu_pin_obj_t pin_I2S1_BCK = PIN(PIN_I2S1_BCK, false); const mcu_pin_obj_t pin_I2S1_LRCK = PIN(PIN_I2S1_LRCK, false); const mcu_pin_obj_t pin_I2S1_DATA_IN = PIN(PIN_I2S1_DATA_IN, false); const mcu_pin_obj_t pin_I2S1_DATA_OUT = PIN(PIN_I2S1_DATA_OUT, false); +const mcu_pin_obj_t pin_SDIO_CLK = PIN(PIN_SDIO_CLK, false); +const mcu_pin_obj_t pin_SDIO_CMD = PIN(PIN_SDIO_CMD, false); +const mcu_pin_obj_t pin_SDIO_DATA0 = PIN(PIN_SDIO_DATA0, false); +const mcu_pin_obj_t pin_SDIO_DATA1 = PIN(PIN_SDIO_DATA1, false); +const mcu_pin_obj_t pin_SDIO_DATA2 = PIN(PIN_SDIO_DATA2, false); +const mcu_pin_obj_t pin_SDIO_DATA3 = PIN(PIN_SDIO_DATA3, false); const mcu_pin_obj_t pin_LPADC0 = PIN(0, true); const mcu_pin_obj_t pin_LPADC1 = PIN(1, true); const mcu_pin_obj_t pin_LPADC2 = PIN(2, true); diff --git a/ports/cxd56/common-hal/microcontroller/Pin.h b/ports/cxd56/common-hal/microcontroller/Pin.h index fe6524edb..6759a2dca 100644 --- a/ports/cxd56/common-hal/microcontroller/Pin.h +++ b/ports/cxd56/common-hal/microcontroller/Pin.h @@ -77,6 +77,12 @@ extern const mcu_pin_obj_t pin_I2S1_BCK; extern const mcu_pin_obj_t pin_I2S1_LRCK; extern const mcu_pin_obj_t pin_I2S1_DATA_IN; extern const mcu_pin_obj_t pin_I2S1_DATA_OUT; +extern const mcu_pin_obj_t pin_SDIO_CLK; +extern const mcu_pin_obj_t pin_SDIO_CMD; +extern const mcu_pin_obj_t pin_SDIO_DATA0; +extern const mcu_pin_obj_t pin_SDIO_DATA1; +extern const mcu_pin_obj_t pin_SDIO_DATA2; +extern const mcu_pin_obj_t pin_SDIO_DATA3; extern const mcu_pin_obj_t pin_LPADC0; extern const mcu_pin_obj_t pin_LPADC1; extern const mcu_pin_obj_t pin_LPADC2; diff --git a/ports/cxd56/common-hal/pulseio/PWMOut.h b/ports/cxd56/common-hal/pulseio/PWMOut.h index 57fc4181f..694acc4e0 100644 --- a/ports/cxd56/common-hal/pulseio/PWMOut.h +++ b/ports/cxd56/common-hal/pulseio/PWMOut.h @@ -27,7 +27,7 @@ #ifndef MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PWMOUT_H #define MICROPY_INCLUDED_CXD56_COMMON_HAL_PULSEIO_PWMOUT_H -#include <nuttx/drivers/pwm.h> +#include <nuttx/timers/pwm.h> #include "common-hal/microcontroller/Pin.h" diff --git a/ports/cxd56/common-hal/sdioio/SDCard.c b/ports/cxd56/common-hal/sdioio/SDCard.c new file mode 100644 index 000000000..cf7de422c --- /dev/null +++ b/ports/cxd56/common-hal/sdioio/SDCard.c @@ -0,0 +1,141 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include <fcntl.h> +#include <unistd.h> +#include <arch/chip/pin.h> + +#include "py/mperrno.h" +#include "py/runtime.h" + +#include "shared-bindings/sdioio/SDCard.h" +#include "shared-bindings/util.h" + +#define DATA_PINS_NUM 4 + +void common_hal_sdioio_sdcard_construct(sdioio_sdcard_obj_t *self, + const mcu_pin_obj_t *clock, const mcu_pin_obj_t *command, + uint8_t num_data, mcu_pin_obj_t **data, uint32_t frequency) { + struct geometry geo; + + if (clock->number != PIN_SDIO_CLK || command->number != PIN_SDIO_CMD) { + mp_raise_ValueError(translate("Invalid pins")); + } + + uint8_t data_pins_num = 0; + for (uint8_t i = 0; i < DATA_PINS_NUM; i++) { + if (data[i]->number != PIN_SDIO_DATA0 || data[i]->number != PIN_SDIO_DATA1 || + data[i]->number != PIN_SDIO_DATA2 || data[i]->number != PIN_SDIO_DATA3) { + data_pins_num++; + } + } + + if (data_pins_num != DATA_PINS_NUM) { + mp_raise_ValueError(translate("Invalid pins")); + } + + if (open_blockdriver("/dev/mmcsd0", 0, &self->inode) < 0) { + mp_raise_ValueError(translate("Could not initialize SDCard")); + } + + self->inode->u.i_bops->geometry(self->inode, &geo); + + claim_pin(clock); + claim_pin(command); + self->clock_pin = clock; + self->command_pin = command; + for (uint8_t i = 0; i < DATA_PINS_NUM; i++) { + claim_pin(data[i]); + self->data_pins[i] = data[i]; + } + + self->count = geo.geo_nsectors; + self->frequency = frequency; + self->width = num_data; +} + +void common_hal_sdioio_sdcard_deinit(sdioio_sdcard_obj_t *self) { + close_blockdriver(self->inode); + self->inode = NULL; + + reset_pin_number(self->clock_pin->number); + reset_pin_number(self->command_pin->number); + for (uint8_t i = 0; i < DATA_PINS_NUM; i++) { + reset_pin_number(self->data_pins[i]->number); + } +} + +bool common_hal_sdioio_sdcard_deinited(sdioio_sdcard_obj_t *self) { + return self->inode == NULL; +} + +bool common_hal_sdioio_sdcard_configure(sdioio_sdcard_obj_t *self, uint32_t baudrate, uint8_t width) { + return true; +} + +uint32_t common_hal_sdioio_sdcard_get_frequency(sdioio_sdcard_obj_t* self) { + return self->frequency; +} + +uint8_t common_hal_sdioio_sdcard_get_width(sdioio_sdcard_obj_t* self) { + return self->width; +} + +uint32_t common_hal_sdioio_sdcard_get_count(sdioio_sdcard_obj_t* self) { + return self->count; +} + +STATIC void check_whole_block(mp_buffer_info_t *bufinfo) { + if (bufinfo->len % 512) { + mp_raise_ValueError(translate("Buffer length must be a multiple of 512")); + } +} + +int common_hal_sdioio_sdcard_readblocks(sdioio_sdcard_obj_t* self, uint32_t start_block, mp_buffer_info_t *bufinfo) { + if (common_hal_sdioio_sdcard_deinited(self)) { + raise_deinited_error(); + } + check_whole_block(bufinfo); + + return self->inode->u.i_bops->read(self->inode, bufinfo->buf, start_block, bufinfo->len / 512); +} + +int common_hal_sdioio_sdcard_writeblocks(sdioio_sdcard_obj_t* self, uint32_t start_block, mp_buffer_info_t *bufinfo) { + if (common_hal_sdioio_sdcard_deinited(self)) { + raise_deinited_error(); + } + check_whole_block(bufinfo); + + return self->inode->u.i_bops->write(self->inode, bufinfo->buf, start_block, bufinfo->len / 512);; +} + +void common_hal_sdioio_sdcard_never_reset(sdioio_sdcard_obj_t *self) { + never_reset_pin_number(self->clock_pin->number); + never_reset_pin_number(self->command_pin->number); + for (uint8_t i = 0; i < DATA_PINS_NUM; i++) { + never_reset_pin_number(self->data_pins[i]->number); + } +} diff --git a/ports/cxd56/common-hal/sdioio/SDCard.h b/ports/cxd56/common-hal/sdioio/SDCard.h new file mode 100644 index 000000000..cbdcd4706 --- /dev/null +++ b/ports/cxd56/common-hal/sdioio/SDCard.h @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_CXD56_SDIOIO_SDCARD_H +#define MICROPY_INCLUDED_CXD56_SDIOIO_SDCARD_H + +#include <nuttx/fs/fs.h> + +#include "py/obj.h" + +#include "common-hal/microcontroller/Pin.h" + +typedef struct { + mp_obj_base_t base; + struct inode* inode; + uint32_t frequency; + uint32_t count; + uint8_t width; + const mcu_pin_obj_t *command_pin; + const mcu_pin_obj_t *clock_pin; + const mcu_pin_obj_t *data_pins[4]; +} sdioio_sdcard_obj_t; + +#endif // MICROPY_INCLUDED_CXD56_SDIOIO_SDCARD_H diff --git a/ports/cxd56/common-hal/sdioio/__init__.c b/ports/cxd56/common-hal/sdioio/__init__.c new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/ports/cxd56/common-hal/sdioio/__init__.c diff --git a/ports/cxd56/configs/circuitpython/defconfig b/ports/cxd56/configs/circuitpython/defconfig new file mode 100644 index 000000000..268f7a68e --- /dev/null +++ b/ports/cxd56/configs/circuitpython/defconfig @@ -0,0 +1,171 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_LEDS is not set +# CONFIG_CXD56_I2C0_SCUSEQ is not set +# CONFIG_CXD56_SFC is not set +# CONFIG_CXD56_SPI3_SCUSEQ is not set +# CONFIG_MMCSD_MMCSUPPORT is not set +# CONFIG_MMCSD_SPI is not set +# CONFIG_MTD_SMART_WEAR_LEVEL is not set +# CONFIG_NET_IPv4 is not set +# CONFIG_NXFONTS_PACKEDMSFIRST is not set +# CONFIG_STANDARD_SERIAL is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="spresense" +CONFIG_ARCH_BOARD_SPRESENSE=y +CONFIG_ARCH_CHIP="cxd56xx" +CONFIG_ARCH_CHIP_CXD56XX=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_MATH_H=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_ASMP=y +CONFIG_AUDIO=y +CONFIG_AUDIOUTILS_DSP_MOUNTPT="/mnt/sd0/BIN" +CONFIG_AUDIOUTILS_MANAGER=y +CONFIG_AUDIOUTILS_PLAYER=y +CONFIG_AUDIOUTILS_PLAYLIST=y +CONFIG_AUDIOUTILS_RECORDER=y +CONFIG_BOARDCTL_IOCTL=y +CONFIG_BOARDCTL_POWEROFF=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARDCTL_UNIQUEID=y +CONFIG_BOARDCTL_UNIQUEID_SIZE=5 +CONFIG_BOARDCTL_USBDEVCTRL=y +CONFIG_BOARD_CRASHDUMP=y +CONFIG_BOARD_LATE_INITIALIZE=y +CONFIG_BOARD_LOOPSPERMSEC=5434 +CONFIG_BOOT_RUNFROMISRAM=y +CONFIG_BUILTIN=y +CONFIG_CLOCK_MONOTONIC=y +CONFIG_CXD56_ADC=y +CONFIG_CXD56_AUDIO=y +CONFIG_CXD56_BINARY=y +CONFIG_CXD56_CHARGER=y +CONFIG_CXD56_CISIF=y +CONFIG_CXD56_GAUGE=y +CONFIG_CXD56_GNSS=y +CONFIG_CXD56_HPADC0=y +CONFIG_CXD56_HPADC1=y +CONFIG_CXD56_I2C0=y +CONFIG_CXD56_I2C2=y +CONFIG_CXD56_I2C=y +CONFIG_CXD56_I2C_DRIVER=y +CONFIG_CXD56_IMAGEPROC=y +CONFIG_CXD56_LPADC=y +CONFIG_CXD56_PWM0=y +CONFIG_CXD56_PWM1=y +CONFIG_CXD56_PWM2=y +CONFIG_CXD56_PWM3=y +CONFIG_CXD56_PWM=y +CONFIG_CXD56_SDIO=y +CONFIG_CXD56_SPI3=y +CONFIG_CXD56_SPI5=y +CONFIG_CXD56_SPI=y +CONFIG_CXD56_UART2=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DNN_RT=y +CONFIG_DNN_RT_MP=y +CONFIG_DRIVERS_VIDEO=y +CONFIG_EXTERNALS_CMSIS=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FAT_MAXFNAME=64 +CONFIG_FS_FAT=y +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y +CONFIG_FS_ROMFS=y +CONFIG_FS_SMARTFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_LCD=y +CONFIG_LCD_NOGETRUN=y +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_IPv4_ADDRCONV=y +CONFIG_LIBC_IPv6_ADDRCONV=y +CONFIG_LIB_KBDCODEC=y +CONFIG_MAX_WDOGPARMS=2 +CONFIG_MEMUTILS=y +CONFIG_MMCSD=y +CONFIG_MMCSD_SDIO=y +CONFIG_MTD=y +CONFIG_MTD_BYTE_WRITE=y +CONFIG_MTD_SMART=y +CONFIG_MTD_SMART_ENABLE_CRC=y +CONFIG_MTD_SMART_FSCK=y +CONFIG_MTD_SMART_SECTOR_SIZE=4096 +CONFIG_NAME_MAX=64 +CONFIG_NET=y +CONFIG_NETDEVICES=y +CONFIG_NETDEV_LATEINIT=y +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_TCP_NO_STACK=y +CONFIG_NET_UDP_NO_STACK=y +CONFIG_NET_USRSOCK=y +CONFIG_NET_USRSOCK_TCP=y +CONFIG_NET_USRSOCK_UDP=y +CONFIG_NFILE_STREAMS=8 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_LOSMART=y +CONFIG_NSH_LINELEN=160 +CONFIG_NSH_MAXARGUMENTS=14 +CONFIG_NSH_READLINE=y +CONFIG_PIPES=y +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_PREALLOC_TIMERS=4 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_PWM=y +CONFIG_RAM_SIZE=1572864 +CONFIG_RAM_START=0x0d000000 +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_READLINE_CMD_HISTORY_LINELEN=160 +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_RR_INTERVAL=200 +CONFIG_RTC=y +CONFIG_RTC_ALARM=y +CONFIG_RTC_DRIVER=y +CONFIG_RTC_FREQUENCY=32768 +CONFIG_RTC_HIRES=y +CONFIG_SCHED_CHILD_STATUS=y +CONFIG_SCHED_HAVE_PARENT=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_LPNTHREADS=3 +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SDIO_MUXBUS=y +CONFIG_SDK_AUDIO=y +CONFIG_SERIAL_TERMIOS=y +CONFIG_SMARTFS_ALIGNED_ACCESS=y +CONFIG_SMARTFS_MAXNAMLEN=30 +CONFIG_SMARTFS_MULTI_ROOT_DIRS=y +CONFIG_SPECIFIC_DRIVERS=y +CONFIG_SPI=y +CONFIG_SPRESENSE_EXTENSION=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_SYSTEMTICK_HOOK=y +CONFIG_SYSTEM_CLE=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_NSH_CXXINITIALIZE=y +CONFIG_UART1_RXBUFSIZE=1024 +CONFIG_UART1_SERIAL_CONSOLE=y +CONFIG_UART1_TXBUFSIZE=1024 +CONFIG_UART2_IFLOWCONTROL=y +CONFIG_UART2_OFLOWCONTROL=y +CONFIG_USBDEV=y +CONFIG_USBDEV_DMA=y +CONFIG_USBDEV_DUALSPEED=y +CONFIG_USEC_PER_TICK=1000 +CONFIG_USERMAIN_STACKSIZE=1064960 +CONFIG_USER_ENTRYPOINT="spresense_main" +CONFIG_VIDEO_ISX012=y +CONFIG_VIDEO_STREAM=y diff --git a/ports/cxd56/mkspk/elf32.h b/ports/cxd56/mkspk/elf32.h new file mode 100644 index 000000000..94a9c81ba --- /dev/null +++ b/ports/cxd56/mkspk/elf32.h @@ -0,0 +1,175 @@ +/**************************************************************************** + * include/elf32.h + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Reference: System V Application Binary Interface, Edition 4.1, March 18, + * 1997, The Santa Cruz Operation, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_ELF32_H +#define __INCLUDE_ELF32_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <stdint.h> + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define EI_NIDENT 16 /* Size of e_ident[] */ + +#define ELF32_ST_BIND(i) ((i) >> 4) +#define ELF32_ST_TYPE(i) ((i) & 0xf) +#define ELF32_ST_INFO(b,t) (((b) << 4) | ((t) & 0xf)) + +/* Definitions for Elf32_Rel*::r_info */ + +#define ELF32_R_SYM(i) ((i) >> 8) +#define ELF32_R_TYPE(i) ((i) & 0xff) +#define ELF32_R_INFO(s,t) (((s)<< 8) | ((t) & 0xff)) + +#define ELF_R_SYM(i) ELF32_R_SYM(i) + +/**************************************************************************** + * Public Type Definitions + ****************************************************************************/ + +/* Figure 4.2: 32-Bit Data Types */ + +typedef uint32_t Elf32_Addr; /* Unsigned program address */ +typedef uint16_t Elf32_Half; /* Unsigned medium integer */ +typedef uint32_t Elf32_Off; /* Unsigned file offset */ +typedef int32_t Elf32_Sword; /* Signed large integer */ +typedef uint32_t Elf32_Word; /* Unsigned large integer */ + +/* Figure 4-3: ELF Header */ + +typedef struct +{ + unsigned char e_ident[EI_NIDENT]; + Elf32_Half e_type; + Elf32_Half e_machine; + Elf32_Word e_version; + Elf32_Addr e_entry; + Elf32_Off e_phoff; + Elf32_Off e_shoff; + Elf32_Word e_flags; + Elf32_Half e_ehsize; + Elf32_Half e_phentsize; + Elf32_Half e_phnum; + Elf32_Half e_shentsize; + Elf32_Half e_shnum; + Elf32_Half e_shstrndx; +} Elf32_Ehdr; + +/* Figure 4-8: Section Header */ + +typedef struct +{ + Elf32_Word sh_name; + Elf32_Word sh_type; + Elf32_Word sh_flags; + Elf32_Addr sh_addr; + Elf32_Off sh_offset; + Elf32_Word sh_size; + Elf32_Word sh_link; + Elf32_Word sh_info; + Elf32_Word sh_addralign; + Elf32_Word sh_entsize; +} Elf32_Shdr; + +/* Figure 4-15: Symbol Table Entry */ + +typedef struct +{ + Elf32_Word st_name; + Elf32_Addr st_value; + Elf32_Word st_size; + unsigned char st_info; + unsigned char st_other; + Elf32_Half st_shndx; +} Elf32_Sym; + +/* Figure 4-19: Relocation Entries */ + +typedef struct +{ + Elf32_Addr r_offset; + Elf32_Word r_info; +} Elf32_Rel; + +typedef struct +{ + Elf32_Addr r_offset; + Elf32_Word r_info; + Elf32_Sword r_addend; +} Elf32_Rela; + +/* Figure 5-1: Program Header */ + +typedef struct +{ + Elf32_Word p_type; + Elf32_Off p_offset; + Elf32_Addr p_vaddr; + Elf32_Addr p_paddr; + Elf32_Word p_filesz; + Elf32_Word p_memsz; + Elf32_Word p_flags; + Elf32_Word p_align; +} Elf32_Phdr; + +/* Figure 5-9: Dynamic Structure */ + +typedef struct +{ + Elf32_Sword d_tag; + union + { + Elf32_Word d_val; + Elf32_Addr d_ptr; + } d_un; +} Elf32_Dyn; + +typedef Elf32_Addr Elf_Addr; +typedef Elf32_Ehdr Elf_Ehdr; +typedef Elf32_Rel Elf_Rel; +typedef Elf32_Rela Elf_Rela; +typedef Elf32_Sym Elf_Sym; +typedef Elf32_Shdr Elf_Shdr; +typedef Elf32_Word Elf_Word; + +#endif /* __INCLUDE_ELF32_H */ diff --git a/ports/cxd56/mkspk/mkspk.h b/ports/cxd56/mkspk/mkspk.h index 5a67bb3dd..5c1b979c0 100644 --- a/ports/cxd56/mkspk/mkspk.h +++ b/ports/cxd56/mkspk/mkspk.h @@ -36,12 +36,22 @@ ****************************************************************************/ #include "clefia.h" -#include "elf.h" +#include "elf32.h" /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ +#define EI_MAG0 0 /* File identification */ +#define EI_MAG1 1 +#define EI_MAG2 2 +#define EI_MAG3 3 + +#define SHT_SYMTAB 2 +#define SHT_STRTAB 3 + +#define PT_LOAD 1 + #define alignup(x, a) (((x) + ((a) - 1)) & ~((a) - 1)) #define swap(a, b) { (a) ^= (b); (b) ^= (a); (a) ^= (b); } diff --git a/ports/cxd56/mpconfigport.mk b/ports/cxd56/mpconfigport.mk index 8aeae1de5..eb077c07b 100644 --- a/ports/cxd56/mpconfigport.mk +++ b/ports/cxd56/mpconfigport.mk @@ -1,5 +1,4 @@ USB_SERIAL_NUMBER_LENGTH = 10 -USB_DEVICES = "CDC,MSC" USB_MSC_MAX_PACKET_SIZE = 512 USB_RENUMBER_ENDPOINTS = 0 USB_CDC_EP_NUM_NOTIFICATION = 3 @@ -8,15 +7,21 @@ USB_CDC_EP_NUM_DATA_IN = 1 USB_MSC_EP_NUM_OUT = 5 USB_MSC_EP_NUM_IN = 4 -CIRCUITPY_AUDIOIO = 0 +MPY_TOOL_LONGINT_IMPL = -mlongint-impl=mpz + CIRCUITPY_AUDIOBUSIO = 0 -CIRCUITPY_I2CSLAVE = 0 -CIRCUITPY_ROTARYIO = 0 -CIRCUITPY_TOUCHIO = 0 +CIRCUITPY_AUDIOIO = 0 +CIRCUITPY_COUNTIO = 0 +CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_FREQUENCYIO = 0 CIRCUITPY_GAMEPAD = 0 +CIRCUITPY_GNSS = 1 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_NEOPIXEL_WRITE = 0 CIRCUITPY_NVM = 0 -CIRCUITPY_DISPLAYIO = 0 -CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_COUNTIO = 0 +CIRCUITPY_ROTARYIO = 0 +CIRCUITPY_SDIOIO = 1 +CIRCUITPY_TOUCHIO = 0 +CIRCUITPY_USB_HID = 0 +CIRCUITPY_USB_MIDI = 0 INTERNAL_LIBM = 1 diff --git a/ports/cxd56/spresense-exported-sdk b/ports/cxd56/spresense-exported-sdk -Subproject 7f6568c7f4898cdb24a2f06040784a836050686 +Subproject c991d439fac9c23cfcac0da16fe8055f818d40a diff --git a/ports/cxd56/tools/flash_writer.py b/ports/cxd56/tools/flash_writer.py new file mode 100755 index 000000000..840f10c32 --- /dev/null +++ b/ports/cxd56/tools/flash_writer.py @@ -0,0 +1,580 @@ +#! /usr/bin/env python3 + +# Copyright (C) 2018 Sony Semiconductor Solutions Corp. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +import time +import sys +import os +import struct +import glob +import fnmatch +import errno +import telnetlib +import argparse +import shutil +import subprocess +import re +import xmodem + +import_serial_module = True + +# When SDK release, plase set SDK_RELEASE as True. +SDK_RELEASE = False + +if SDK_RELEASE : + PRINT_RAW_COMMAND = False + REBOOT_AT_END = True +else : + PRINT_RAW_COMMAND = True + REBOOT_AT_END = True + +try: + import serial +except: + import_serial_module = False + +# supported environment various +# CXD56_PORT +# CXD56_TELNETSRV_PORT +# CXD56_TELNETSRV_IP + +PROTOCOL_SERIAL = 0 +PROTOCOL_TELNET = 1 + +MAX_DOT_COUNT = 70 + +# configure parameters and default value +class ConfigArgs: + PROTOCOL_TYPE = None + SERIAL_PORT = "COM1" + SERVER_PORT = 4569 + SERVER_IP = "localhost" + EOL = bytes([10]) + WAIT_RESET = True + AUTO_RESET = False + DTR_RESET = False + XMODEM_BAUD = 0 + NO_SET_BOOTABLE = False + PACKAGE_NAME = [] + FILE_NAME = [] + ERASE_NAME = [] + PKGSYS_NAME = [] + PKGAPP_NAME = [] + PKGUPD_NAME = [] + +ROM_MSG = [b"Welcome to nash"] +XMDM_MSG = "Waiting for XMODEM (CRC or 1K) transfer. Ctrl-X to cancel." + +class ConfigArgsLoader(): + def __init__(self): + self.parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter) + self.parser.add_argument("package_name", help="the name of the package to install", nargs='*') + self.parser.add_argument("-f", "--file", dest="file_name", help="save file", action='append') + self.parser.add_argument("-e", "--erase", dest="erase_name", help="erase file", action='append') + + self.parser.add_argument("-S", "--sys", dest="pkgsys_name", help="the name of the system package to install", action='append') + self.parser.add_argument("-A", "--app", dest="pkgapp_name", help="the name of the application package to install", action='append') + self.parser.add_argument("-U", "--upd", dest="pkgupd_name", help="the name of the updater package to install", action='append') + + self.parser.add_argument("-a", "--auto-reset", dest="auto_reset", + action="store_true", default=None, + help="try to auto reset develop board if possible") + self.parser.add_argument("-d", "--dtr-reset", dest="dtr_reset", + action="store_true", default=None, + help="try to auto reset develop board if possible") + self.parser.add_argument("-n", "--no-set-bootable", dest="no_set_bootable", + action="store_true", default=None, + help="not to set bootable") + + group = self.parser.add_argument_group() + group.add_argument("-i", "--server-ip", dest="server_ip", + help="the ip address connected to the telnet server") + group.add_argument("-p", "--server-port", dest="server_port", type=int, + help="the port connected to the telnet server") + + group = self.parser.add_argument_group() + group.add_argument("-c", "--serial-port", dest="serial_port", help="the serial port") + group.add_argument("-b", "--xmodem-baudrate", dest="xmodem_baud", help="Use the faster baudrate in xmodem") + + mutually_group = self.parser.add_mutually_exclusive_group() + mutually_group.add_argument("-t", "--telnet-protocol", dest="telnet_protocol", + action="store_true", default=None, + help="use the telnet protocol for binary transmission") + mutually_group.add_argument("-s", "--serial-protocol", dest="serial_protocol", + action="store_true", default=None, + help="use the serial port for binary transmission, default options") + + mutually_group2 = self.parser.add_mutually_exclusive_group() + mutually_group2.add_argument("-F", "--force-wait-reset", dest="wait_reset", + action="store_true", default=None, + help="force wait for pressing RESET button") + mutually_group2.add_argument("-N", "--no-wait-reset", dest="wait_reset", + action="store_false", default=None, + help="if possible, skip to wait for pressing RESET button") + + def update_config(self): + args = self.parser.parse_args() + + ConfigArgs.PACKAGE_NAME = args.package_name + ConfigArgs.FILE_NAME = args.file_name + ConfigArgs.ERASE_NAME = args.erase_name + ConfigArgs.PKGSYS_NAME = args.pkgsys_name + ConfigArgs.PKGAPP_NAME = args.pkgapp_name + ConfigArgs.PKGUPD_NAME = args.pkgupd_name + + # Get serial port or telnet server ip etc + if args.serial_protocol == True: + ConfigArgs.PROTOCOL_TYPE = PROTOCOL_SERIAL + elif args.telnet_protocol == True: + ConfigArgs.PROTOCOL_TYPE = PROTOCOL_TELNET + + if ConfigArgs.PROTOCOL_TYPE == None: + proto = os.environ.get("CXD56_PROTOCOL") + if proto is not None: + if 's' in proto: + ConfigArgs.PROTOCOL_TYPE = PROTOCOL_SERIAL + elif 't' in proto: + ConfigArgs.PROTOCOL_TYPE = PROTOCOL_TELNET + + if ConfigArgs.PROTOCOL_TYPE == None: + ConfigArgs.PROTOCOL_TYPE = PROTOCOL_SERIAL + + if ConfigArgs.PROTOCOL_TYPE == PROTOCOL_SERIAL: + if args.serial_port is not None: + ConfigArgs.SERIAL_PORT = args.serial_port + else: + # Get serial port from the environment + port = os.environ.get("CXD56_PORT") + if port is not None: + ConfigArgs.SERIAL_PORT = port + else: + print("CXD56_PORT is not set, Use " + ConfigArgs.SERIAL_PORT + ".") + else: + ConfigArgs.PROTOCOL_TYPE = PROTOCOL_TELNET + if args.server_port is not None: + ConfigArgs.SERVER_PORT = args.server_port + else: + port = os.environ.get("CXD56_TELNETSRV_PORT") + if port is not None: + ConfigArgs.SERVER_PORT = port + else: + print("CXD56_TELNETSRV_PORT is not set, Use " + str(ConfigArgs.SERVER_PORT) + ".") + if args.server_ip is not None: + ConfigArgs.SERVER_IP = args.server_ip + else: + ip = os.environ.get("CXD56_TELNETSRV_IP") + if ip is not None: + ConfigArgs.SERVER_IP = ip + else: + print("CXD56_TELNETSRV_IP is not set, Use " + ConfigArgs.SERVER_IP + ".") + + if args.xmodem_baud is not None: + ConfigArgs.XMODEM_BAUD = args.xmodem_baud + + if args.auto_reset is not None: + ConfigArgs.AUTO_RESET = args.auto_reset + + if args.dtr_reset is not None: + ConfigArgs.DTR_RESET = args.dtr_reset + + if args.no_set_bootable is not None: + ConfigArgs.NO_SET_BOOTABLE = args.no_set_bootable + + if args.wait_reset is not None: + ConfigArgs.WAIT_RESET = args.wait_reset + +class TelnetDev: + def __init__(self): + srv_ipaddr = ConfigArgs.SERVER_IP + srv_port = ConfigArgs.SERVER_PORT + self.recvbuf = b''; + try: + self.telnet = telnetlib.Telnet(host=srv_ipaddr, port=srv_port, timeout=10) + # There is a ack to be sent after connecting to the telnet server. + self.telnet.write(b"\xff") + except Exception as e: + print("Cannot connect to the server %s:%d" % (srv_ipaddr, srv_port)) + sys.exit(e.args[0]) + + def readline(self, size=None): + res = b'' + ch = b'' + while ch != ConfigArgs.EOL: + ch = self.getc_raw(1, timeout=0.1) + if ch == b'': + return res + res += ch + return res + + def getc_raw(self, size, timeout=1): + res = b'' + tm = time.monotonic() + while size > 0: + while self.recvbuf == b'': + self.recvbuf = self.telnet.read_eager() + if self.recvbuf == b'': + if (time.monotonic() - tm) > timeout: + return res + time.sleep(0.1) + res += self.recvbuf[0:1] + self.recvbuf = self.recvbuf[1:] + size -= 1 + return res + + def write(self, buffer): + self.telnet.write(buffer) + + def discard_inputs(self, timeout=1.0): + while True: + ch = self.getc_raw(1, timeout=timeout) + if ch == b'': + break + + def getc(self, size, timeout=1): + c = self.getc_raw(size, timeout) + return c + + def putc(self, buffer, timeout=1): + self.telnet.write(buffer) + self.show_progress(len(buffer)) + + def reboot(self): + # no-op + pass + + def set_file_size(self, filesize): + self.bytes_transfered = 0 + self.filesize = filesize + self.count = 0 + + def show_progress(self, sendsize): + if PRINT_RAW_COMMAND: + if self.count < MAX_DOT_COUNT: + self.bytes_transfered = self.bytes_transfered + sendsize + cur_count = int(self.bytes_transfered * MAX_DOT_COUNT / self.filesize) + if MAX_DOT_COUNT < cur_count: + cur_count = MAX_DOT_COUNT + for idx in range(cur_count - self.count): + print('#',end='') + sys.stdout.flush() + self.count = cur_count + if self.count == MAX_DOT_COUNT: + print("\n") + +class SerialDev: + def __init__(self): + if import_serial_module is False: + print("Cannot import serial module, maybe it's not install yet.") + print("\n", end="") + print("Please install python-setuptool by Cygwin installer.") + print("After that use easy_intall command to install serial module") + print(" $ cd tool/") + print(" $ python3 -m easy_install pyserial-2.7.tar.gz") + quit() + else: + port = ConfigArgs.SERIAL_PORT + try: + self.serial = serial.Serial(port, baudrate=115200, + parity=serial.PARITY_NONE, stopbits=serial.STOPBITS_ONE, + bytesize=serial.EIGHTBITS, timeout=0.1) + except Exception as e: + print("Cannot open port : " + port) + sys.exit(e.args[0]) + + def readline(self, size=None): + return self.serial.readline(size) + + def write(self, buffer): + self.serial.write(buffer) + self.serial.flush() + + def discard_inputs(self, timeout=1.0): + time.sleep(timeout) + self.serial.flushInput() + + def getc(self, size, timeout=1): + self.serial.timeout = timeout + c = self.serial.read(size) + self.serial.timeout = 0.1 + return c + + def putc(self, buffer, timeout=1): + self.serial.timeout = timeout + self.serial.write(buffer) + self.serial.flush() + self.serial.timeout = 0.1 + self.show_progress(len(buffer)) + + # Note: windows platform dependent code + def putc_win(self, buffer, timeout=1): + self.serial.write(buffer) + self.show_progress(len(buffer)) + while True: + if self.serial.out_waiting == 0: + break + + def setBaudrate(self, baudrate): +# self.serial.setBaudrate(baudrate) + self.serial.baudrate = baudrate + + def reboot(self): + # Target Reset by DTR + self.serial.setDTR(False) + self.serial.setDTR(True) + self.serial.setDTR(False) + + def set_file_size(self, filesize): + self.bytes_transfered = 0 + self.filesize = filesize + self.count = 0 + + def show_progress(self, sendsize): + if PRINT_RAW_COMMAND: + if self.count < MAX_DOT_COUNT: + self.bytes_transfered = self.bytes_transfered + sendsize + cur_count = int(self.bytes_transfered * MAX_DOT_COUNT / self.filesize) + if MAX_DOT_COUNT < cur_count: + cur_count = MAX_DOT_COUNT + for idx in range(cur_count - self.count): + print('#',end='') + sys.stdout.flush() + self.count = cur_count + if self.count == MAX_DOT_COUNT: + print("\n") + +class FlashWriter: + def __init__(self, protocol_sel=PROTOCOL_SERIAL): + if protocol_sel == PROTOCOL_TELNET: + self.serial = TelnetDev() + else: + self.serial = SerialDev() + + def cancel_autoboot(self) : + boot_msg = '' + self.serial.reboot() # Target reboot before send 'r' + while boot_msg == '' : + rx = self.serial.readline().strip() + self.serial.write(b"r") # Send "r" key to avoid auto boot + for msg in ROM_MSG : + if msg in rx : + boot_msg = msg + break + while True : + rx = self.serial.readline().decode(errors="replace").strip() + if "updater" in rx : + # Workaround : Sometime first character is dropped. + # Send line feed as air shot before actual command. + self.serial.write(b"\n") # Send line feed + self.serial.discard_inputs()# Clear input buffer to sync + return boot_msg.decode(errors="ignore") + + def recv(self): + rx = self.serial.readline() + if PRINT_RAW_COMMAND : + serial_line = rx.decode(errors="replace") + if serial_line.strip() != "" and not serial_line.startswith(XMDM_MSG): + print(serial_line, end="") + return rx + + def wait(self, string): + while True: + rx = self.recv() + if string.encode() in rx: + time.sleep(0.1) + break + + def wait_for_prompt(self): + prompt_pat = re.compile(b"updater") + while True: + rx = self.recv() + if prompt_pat.search(rx): + time.sleep(0.1) + break + + def send(self, string): + self.serial.write(str(string).encode() + b"\n") + rx = self.serial.readline() + if PRINT_RAW_COMMAND : + print(rx.decode(errors="replace"), end="") + + def read_output(self, prompt_text) : + output = [] + while True : + rx = self.serial.readline() + if prompt_text.encode() in rx : + time.sleep(0.1) + break + if rx != "" : + output.append(rx.decode(errors="ignore").rstrip()) + return output + + def install_files(self, files, command) : + if ConfigArgs.XMODEM_BAUD: + command += " -b " + ConfigArgs.XMODEM_BAUD + if os.name == 'nt': + modem = xmodem.XMODEM(self.serial.getc, self.serial.putc_win, 'xmodem1k') + else: + modem = xmodem.XMODEM(self.serial.getc, self.serial.putc, 'xmodem1k') + for file in files: + with open(file, "rb") as bin : + self.send(command) + print("Install " + file) + self.wait(XMDM_MSG) + print("|0%" + + "-" * (int(MAX_DOT_COUNT / 2) - 6) + + "50%" + + "-" * (MAX_DOT_COUNT - int(MAX_DOT_COUNT / 2) - 5) + + "100%|") + if ConfigArgs.XMODEM_BAUD: + self.serial.setBaudrate(ConfigArgs.XMODEM_BAUD) + self.serial.discard_inputs() # Clear input buffer to sync + self.serial.set_file_size(os.path.getsize(file)) + modem.send(bin) + if ConfigArgs.XMODEM_BAUD: + self.serial.setBaudrate(115200) + self.wait_for_prompt() + + def save_files(self, files) : + if ConfigArgs.XMODEM_BAUD: + command = "save_file -b " + ConfigArgs.XMODEM_BAUD + " -x " + else: + command = "save_file -x " + if os.name == 'nt': + modem = xmodem.XMODEM(self.serial.getc, self.serial.putc_win, 'xmodem1k') + else: + modem = xmodem.XMODEM(self.serial.getc, self.serial.putc, 'xmodem1k') + for file in files: + with open(file, "rb") as bin : + self.send(command + os.path.basename(file)) + print("Save " + file) + self.wait(XMDM_MSG) + if ConfigArgs.XMODEM_BAUD: + self.serial.setBaudrate(ConfigArgs.XMODEM_BAUD) + self.serial.discard_inputs() # Clear input buffer to sync + self.serial.set_file_size(os.path.getsize(file)) + modem.send(bin) + if ConfigArgs.XMODEM_BAUD: + self.serial.setBaudrate(115200) + self.wait_for_prompt() + self.send("chmod d+rw " + os.path.basename(file)) + self.wait_for_prompt() + + def delete_files(self, files) : + for file in files : + self.delete_binary(file) + + def delete_binary(self, bin_name) : + self.send("rm " + bin_name) + self.wait_for_prompt() + +def main(): + try: + config_loader = ConfigArgsLoader() + config_loader.update_config() + except: + return errno.EINVAL + + # Wait to reset the board + writer = FlashWriter(ConfigArgs.PROTOCOL_TYPE) + + do_wait_reset = True + if ConfigArgs.AUTO_RESET: + if subprocess.call("cd " + sys.path[0] + "; ./reset_board.sh", shell=True) == 0: + print("auto reset board sucess!!") + do_wait_reset = False + bootrom_msg = writer.cancel_autoboot() + + if ConfigArgs.DTR_RESET: + do_wait_reset = False + bootrom_msg = writer.cancel_autoboot() + + if ConfigArgs.WAIT_RESET == False and do_wait_reset == True: + rx = writer.recv() + time.sleep(1) + for i in range(3): + writer.send("") + rx = writer.recv() + if "updater".encode() in rx: + # No need to wait for reset + do_wait_reset = False + break + time.sleep(1) + + if do_wait_reset: + # Wait to reset the board + print('Please press RESET button on target board') + sys.stdout.flush() + bootrom_msg = writer.cancel_autoboot() + + # Remove files + if ConfigArgs.ERASE_NAME : + print(">>> Remove exisiting files ...") + writer.delete_files(ConfigArgs.ERASE_NAME) + + # Install files + if ConfigArgs.PACKAGE_NAME or ConfigArgs.PKGSYS_NAME or ConfigArgs.PKGAPP_NAME or ConfigArgs.PKGUPD_NAME: + print(">>> Install files ...") + if ConfigArgs.PACKAGE_NAME : + writer.install_files(ConfigArgs.PACKAGE_NAME, "install") + if ConfigArgs.PKGSYS_NAME : + writer.install_files(ConfigArgs.PKGSYS_NAME, "install") + if ConfigArgs.PKGAPP_NAME : + writer.install_files(ConfigArgs.PKGAPP_NAME, "install") + if ConfigArgs.PKGUPD_NAME : + writer.install_files(ConfigArgs.PKGUPD_NAME, "install -k updater.key") + + # Save files + if ConfigArgs.FILE_NAME : + print(">>> Save files ...") + writer.save_files(ConfigArgs.FILE_NAME) + + # Set auto boot + if not ConfigArgs.NO_SET_BOOTABLE: + print(">>> Save Configuration to FlashROM ...") + writer.send("set bootable M0P") + writer.wait_for_prompt() + + # Sync all cached data to flash + writer.send("sync") + writer.wait_for_prompt() + + if REBOOT_AT_END : + print("Restarting the board ...") + writer.send("reboot") + + return 0 + +if __name__ == "__main__": + try: + sys.exit(main()) + except KeyboardInterrupt: + print("Canceled by keyboard interrupt.") + pass diff --git a/ports/cxd56/tools/xmodem.py b/ports/cxd56/tools/xmodem.py new file mode 100644 index 000000000..c93430056 --- /dev/null +++ b/ports/cxd56/tools/xmodem.py @@ -0,0 +1,590 @@ +''' +=============================== + XMODEM file transfer protocol +=============================== + +.. $Id$ + +This is a literal implementation of XMODEM.TXT_, XMODEM1K.TXT_ and +XMODMCRC.TXT_, support for YMODEM and ZMODEM is pending. YMODEM should +be fairly easy to implement as it is a hack on top of the XMODEM +protocol using sequence bytes ``0x00`` for sending file names (and some +meta data). + +.. _XMODEM.TXT: doc/XMODEM.TXT +.. _XMODEM1K.TXT: doc/XMODEM1K.TXT +.. _XMODMCRC.TXT: doc/XMODMCRC.TXT + +Data flow example including error recovery +========================================== + +Here is a sample of the data flow, sending a 3-block message. +It includes the two most common line hits - a garbaged block, +and an ``ACK`` reply getting garbaged. ``CRC`` or ``CSUM`` represents +the checksum bytes. + +XMODEM 128 byte blocks +---------------------- + +:: + + SENDER RECEIVER + + <-- NAK + SOH 01 FE Data[128] CSUM --> + <-- ACK + SOH 02 FD Data[128] CSUM --> + <-- ACK + SOH 03 FC Data[128] CSUM --> + <-- ACK + SOH 04 FB Data[128] CSUM --> + <-- ACK + SOH 05 FA Data[100] CPMEOF[28] CSUM --> + <-- ACK + EOT --> + <-- ACK + +XMODEM-1k blocks, CRC mode +-------------------------- + +:: + + SENDER RECEIVER + + <-- C + STX 01 FE Data[1024] CRC CRC --> + <-- ACK + STX 02 FD Data[1024] CRC CRC --> + <-- ACK + STX 03 FC Data[1000] CPMEOF[24] CRC CRC --> + <-- ACK + EOT --> + <-- ACK + +Mixed 1024 and 128 byte Blocks +------------------------------ + +:: + + SENDER RECEIVER + + <-- C + STX 01 FE Data[1024] CRC CRC --> + <-- ACK + STX 02 FD Data[1024] CRC CRC --> + <-- ACK + SOH 03 FC Data[128] CRC CRC --> + <-- ACK + SOH 04 FB Data[100] CPMEOF[28] CRC CRC --> + <-- ACK + EOT --> + <-- ACK + +YMODEM Batch Transmission Session (1 file) +------------------------------------------ + +:: + + SENDER RECEIVER + <-- C (command:rb) + SOH 00 FF foo.c NUL[123] CRC CRC --> + <-- ACK + <-- C + SOH 01 FE Data[128] CRC CRC --> + <-- ACK + SOH 02 FC Data[128] CRC CRC --> + <-- ACK + SOH 03 FB Data[100] CPMEOF[28] CRC CRC --> + <-- ACK + EOT --> + <-- NAK + EOT --> + <-- ACK + <-- C + SOH 00 FF NUL[128] CRC CRC --> + <-- ACK + + +''' + +__author__ = 'Wijnand Modderman <maze@pyth0n.org>' +__copyright__ = ['Copyright (c) 2010 Wijnand Modderman', + 'Copyright (c) 1981 Chuck Forsberg'] +__license__ = 'MIT' +__version__ = '0.3.2' + +import logging +import time +import sys +from functools import partial +import collections + +# Loggerr +log = logging.getLogger('xmodem') + +# Protocol bytes +SOH = bytes([0x01]) +STX = bytes([0x02]) +EOT = bytes([0x04]) +ACK = bytes([0x06]) +DLE = bytes([0x10]) +NAK = bytes([0x15]) +CAN = bytes([0x18]) +CRC = bytes([0x43]) # C + + +class XMODEM(object): + ''' + XMODEM Protocol handler, expects an object to read from and an object to + write to. + + >>> def getc(size, timeout=1): + ... return data or None + ... + >>> def putc(data, timeout=1): + ... return size or None + ... + >>> modem = XMODEM(getc, putc) + + + :param getc: Function to retreive bytes from a stream + :type getc: callable + :param putc: Function to transmit bytes to a stream + :type putc: callable + :param mode: XMODEM protocol mode + :type mode: string + :param pad: Padding character to make the packets match the packet size + :type pad: char + + ''' + + # crctab calculated by Mark G. Mendel, Network Systems Corporation + crctable = [ + 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, + 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, + 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, + 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, + 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, + 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, + 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, + 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, + 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, + 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, + 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, + 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, + 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, + 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, + 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, + 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, + 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, + 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, + 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, + 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, + 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, + 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, + 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, + 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, + 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, + 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, + 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, + 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, + 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, + 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, + 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, + 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0, + ] + + def __init__(self, getc, putc, mode='xmodem', pad=b'\x1a'): + self.getc = getc + self.putc = putc + self.mode = mode + self.pad = pad + + def abort(self, count=2, timeout=60): + ''' + Send an abort sequence using CAN bytes. + ''' + for counter in range(0, count): + self.putc(CAN, timeout) + + def send(self, stream, retry=32, timeout=360, quiet=0, callback=None): + ''' + Send a stream via the XMODEM protocol. + + >>> stream = file('/etc/issue', 'rb') + >>> print modem.send(stream) + True + + Returns ``True`` upon succesful transmission or ``False`` in case of + failure. + + :param stream: The stream object to send data from. + :type stream: stream (file, etc.) + :param retry: The maximum number of times to try to resend a failed + packet before failing. + :type retry: int + :param timeout: The number of seconds to wait for a response before + timing out. + :type timeout: int + :param quiet: If 0, it prints info to stderr. If 1, it does not print any info. + :type quiet: int + :param callback: Reference to a callback function that has the + following signature. This is useful for + getting status updates while a xmodem + transfer is underway. + Expected callback signature: + def callback(total_packets, success_count, error_count) + :type callback: callable + ''' + + # initialize protocol + try: + packet_size = dict( + xmodem = 128, + xmodem1k = 1024, + )[self.mode] + except AttributeError: + raise ValueError("An invalid mode was supplied") + + error_count = 0 + crc_mode = 0 + cancel = 0 + while True: + char = self.getc(1) + if char: + if char == NAK: + crc_mode = 0 + break + elif char == CRC: + crc_mode = 1 + break + elif char == CAN: + if not quiet: + print('received CAN', file=sys.stderr) + if cancel: + return False + else: + cancel = 1 + else: + log.error('send ERROR expected NAK/CRC, got %s' % \ + (ord(char),)) + + error_count += 1 + if error_count >= retry: + self.abort(timeout=timeout) + return False + + # send data + error_count = 0 + success_count = 0 + total_packets = 0 + sequence = 1 + while True: + data = stream.read(packet_size) + if not data: + log.info('sending EOT') + # end of stream + break + total_packets += 1 + data = data.ljust(packet_size, self.pad) + if crc_mode: + crc = self.calc_crc(data) + else: + crc = self.calc_checksum(data) + + # emit packet + while True: + if packet_size == 128: + self.putc(SOH) + else: # packet_size == 1024 + self.putc(STX) + self.putc(bytes([sequence])) + self.putc(bytes([0xff - sequence])) + self.putc(data) + if crc_mode: + self.putc(bytes([crc >> 8])) + self.putc(bytes([crc & 0xff])) + else: + self.putc(bytes([crc])) + + char = self.getc(1, timeout) + if char == ACK: + success_count += 1 + if isinstance(callback, collections.Callable): + callback(total_packets, success_count, error_count) + break + if char == NAK: + error_count += 1 + if isinstance(callback, collections.Callable): + callback(total_packets, success_count, error_count) + if error_count >= retry: + # excessive amounts of retransmissions requested, + # abort transfer + self.abort(timeout=timeout) + log.warning('excessive NAKs, transfer aborted') + return False + + # return to loop and resend + continue + else: + log.error('Not ACK, Not NAK') + error_count += 1 + if isinstance(callback, collections.Callable): + callback(total_packets, success_count, error_count) + if error_count >= retry: + # excessive amounts of retransmissions requested, + # abort transfer + self.abort(timeout=timeout) + log.warning('excessive protocol errors, transfer aborted') + return False + + # return to loop and resend + continue + + # protocol error + self.abort(timeout=timeout) + log.error('protocol error') + return False + + # keep track of sequence + sequence = (sequence + 1) % 0x100 + + while True: + # end of transmission + self.putc(EOT) + + #An ACK should be returned + char = self.getc(1, timeout) + if char == ACK: + break + else: + error_count += 1 + if error_count >= retry: + self.abort(timeout=timeout) + log.warning('EOT was not ACKd, transfer aborted') + return False + + return True + + def recv(self, stream, crc_mode=1, retry=16, timeout=60, delay=1, quiet=0): + ''' + Receive a stream via the XMODEM protocol. + + >>> stream = file('/etc/issue', 'wb') + >>> print modem.recv(stream) + 2342 + + Returns the number of bytes received on success or ``None`` in case of + failure. + ''' + + # initiate protocol + error_count = 0 + char = 0 + cancel = 0 + while True: + # first try CRC mode, if this fails, + # fall back to checksum mode + if error_count >= retry: + self.abort(timeout=timeout) + return None + elif crc_mode and error_count < (retry / 2): + if not self.putc(CRC): + time.sleep(delay) + error_count += 1 + else: + crc_mode = 0 + if not self.putc(NAK): + time.sleep(delay) + error_count += 1 + + char = self.getc(1, timeout) + if not char: + error_count += 1 + continue + elif char == SOH: + #crc_mode = 0 + break + elif char == STX: + break + elif char == CAN: + if cancel: + return None + else: + cancel = 1 + else: + error_count += 1 + + # read data + error_count = 0 + income_size = 0 + packet_size = 128 + sequence = 1 + cancel = 0 + while True: + while True: + if char == SOH: + packet_size = 128 + break + elif char == STX: + packet_size = 1024 + break + elif char == EOT: + # We received an EOT, so send an ACK and return the received + # data length + self.putc(ACK) + return income_size + elif char == CAN: + # cancel at two consecutive cancels + if cancel: + return None + else: + cancel = 1 + else: + if not quiet: + print('recv ERROR expected SOH/EOT, got', ord(char), file=sys.stderr) + error_count += 1 + if error_count >= retry: + self.abort() + return None + # read sequence + error_count = 0 + cancel = 0 + seq1 = ord(self.getc(1)) + seq2 = 0xff - ord(self.getc(1)) + if seq1 == sequence and seq2 == sequence: + # sequence is ok, read packet + # packet_size + checksum + data = self.getc(packet_size + 1 + crc_mode, timeout) + if crc_mode: + csum = (ord(data[-2]) << 8) + ord(data[-1]) + data = data[:-2] + log.debug('CRC (%04x <> %04x)' % \ + (csum, self.calc_crc(data))) + valid = csum == self.calc_crc(data) + else: + csum = data[-1] + data = data[:-1] + log.debug('checksum (checksum(%02x <> %02x)' % \ + (ord(csum), self.calc_checksum(data))) + valid = ord(csum) == self.calc_checksum(data) + + # valid data, append chunk + if valid: + income_size += len(data) + stream.write(data) + self.putc(ACK) + sequence = (sequence + 1) % 0x100 + char = self.getc(1, timeout) + continue + else: + # consume data + self.getc(packet_size + 1 + crc_mode) + self.debug('expecting sequence %d, got %d/%d' % \ + (sequence, seq1, seq2)) + + # something went wrong, request retransmission + self.putc(NAK) + + def calc_checksum(self, data, checksum=0): + ''' + Calculate the checksum for a given block of data, can also be used to + update a checksum. + + >>> csum = modem.calc_checksum('hello') + >>> csum = modem.calc_checksum('world', csum) + >>> hex(csum) + '0x3c' + + ''' + return (sum(map(ord, data)) + checksum) % 256 + + def calc_crc(self, data, crc=0): + ''' + Calculate the Cyclic Redundancy Check for a given block of data, can + also be used to update a CRC. + + >>> crc = modem.calc_crc('hello') + >>> crc = modem.calc_crc('world', crc) + >>> hex(crc) + '0xd5e3' + + ''' + for char in data: + crc = (crc << 8) ^ self.crctable[((crc >> 8) ^ int(char)) & 0xff] + return crc & 0xffff + + +XMODEM1k = partial(XMODEM, mode='xmodem1k') + + +def run(): + import optparse + import subprocess + + parser = optparse.OptionParser(usage='%prog [<options>] <send|recv> filename filename') + parser.add_option('-m', '--mode', default='xmodem', + help='XMODEM mode (xmodem, xmodem1k)') + + options, args = parser.parse_args() + if len(args) != 3: + parser.error('invalid arguments') + return 1 + + elif args[0] not in ('send', 'recv'): + parser.error('invalid mode') + return 1 + + def _func(so, si): + import select + import subprocess + + print('si', si) + print('so', so) + + def getc(size, timeout=3): + w,t,f = select.select([so], [], [], timeout) + if w: + data = so.read(size) + else: + data = None + + print('getc(', repr(data), ')') + return data + + def putc(data, timeout=3): + w,t,f = select.select([], [si], [], timeout) + if t: + si.write(data) + si.flush() + size = len(data) + else: + size = None + + print('putc(', repr(data), repr(size), ')') + return size + + return getc, putc + + def _pipe(*command): + pipe = subprocess.Popen(command, + stdout=subprocess.PIPE, stdin=subprocess.PIPE) + return pipe.stdout, pipe.stdin + + if args[0] == 'recv': + import io + getc, putc = _func(*_pipe('sz', '--xmodem', args[2])) + stream = open(args[1], 'wb') + xmodem = XMODEM(getc, putc, mode=options.mode) + status = xmodem.recv(stream, retry=8) + stream.close() + + elif args[0] == 'send': + getc, putc = _func(*_pipe('rz', '--xmodem', args[2])) + stream = open(args[1], 'rb') + xmodem = XMODEM(getc, putc, mode=options.mode) + status = xmodem.send(stream, retry=8) + stream.close() + +if __name__ == '__main__': + sys.exit(run()) diff --git a/ports/esp32s2/CMakeLists.txt b/ports/esp32s2/CMakeLists.txt index c831e4846..716588cf2 100644 --- a/ports/esp32s2/CMakeLists.txt +++ b/ports/esp32s2/CMakeLists.txt @@ -1,6 +1,6 @@ # The following five lines of boilerplate have to be in your project's # CMakeLists in this exact order for cmake to work correctly -cmake_minimum_required(VERSION 3.5) +cmake_minimum_required(VERSION 3.13) set(ENV{IDF_PATH} ${CMAKE_SOURCE_DIR}/esp-idf) set(COMPONENTS esptool_py soc driver log main) diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile index 5ad5c2f1d..3e69e6639 100644 --- a/ports/esp32s2/Makefile +++ b/ports/esp32s2/Makefile @@ -78,6 +78,7 @@ INC += -Iesp-idf/components/freertos/xtensa/include INC += -Iesp-idf/components/esp32s2/include INC += -Iesp-idf/components/xtensa/esp32s2/include INC += -Iesp-idf/components/esp_common/include +INC += -Iesp-idf/components/esp_ringbuf/include INC += -Iesp-idf/components/esp_rom/include INC += -Iesp-idf/components/xtensa/include INC += -Iesp-idf/components/esp_timer/include @@ -212,7 +213,7 @@ $(BUILD)/esp-idf: # create the config headers $(BUILD)/esp-idf/config/sdkconfig.h: boards/$(BOARD)/sdkconfig | $(BUILD)/esp-idf - IDF_PATH=$(IDF_PATH) cmake -S . -B $(BUILD)/esp-idf -DSDKCONFIG=$(BUILD)/esp-idf/sdkconfig -DSDKCONFIG_DEFAULTS="sdkconfig.defaults;boards/$(BOARD)/sdkconfig" -DCMAKE_TOOLCHAIN_FILE=$IDF_PATH/tools/cmake/toolchain-esp32s2.cmake -DIDF_TARGET=esp32s2 -GNinja + IDF_PATH=$(IDF_PATH) cmake -S . -B $(BUILD)/esp-idf -DSDKCONFIG=$(BUILD)/esp-idf/sdkconfig -DSDKCONFIG_DEFAULTS="sdkconfig.defaults;boards/$(BOARD)/sdkconfig" -DCMAKE_TOOLCHAIN_FILE=$(IDF_PATH)/tools/cmake/toolchain-esp32s2.cmake -DIDF_TARGET=esp32s2 -GNinja # build a lib # Adding -d explain -j 1 -v to the ninja line will output debug info @@ -257,7 +258,7 @@ ESP_AUTOGEN_LD = $(BUILD)/esp-idf/esp-idf/esp32s2/esp32s2_out.ld $(BUILD)/esp-id FLASH_FLAGS = --flash_mode $(CIRCUITPY_ESP_FLASH_MODE) --flash_freq $(CIRCUITPY_ESP_FLASH_FREQ) --flash_size $(CIRCUITPY_ESP_FLASH_SIZE) -all: $(BUILD)/firmware.bin +all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2 $(BUILD)/firmware.elf: $(OBJ) | $(ESP_IDF_COMPONENTS_EXPANDED) $(ESP_AUTOGEN_LD) $(STEPECHO) "LINK $@" @@ -273,8 +274,15 @@ $(BUILD)/circuitpython-firmware.bin: $(BUILD)/firmware.elf $(BUILD)/firmware.bin: $(BUILD)/esp-idf/partition_table/partition-table.bin $(BUILD)/esp-idf/bootloader/bootloader.bin $(BUILD)/circuitpython-firmware.bin $(Q)$(PYTHON) ../../tools/join_bins.py $@ 0x1000 $(BUILD)/esp-idf/bootloader/bootloader.bin 0x8000 $(BUILD)/esp-idf/partition_table/partition-table.bin 0x10000 $(BUILD)/circuitpython-firmware.bin +$(BUILD)/firmware.uf2: $(BUILD)/circuitpython-firmware.bin + $(STEPECHO) "Create $@" + $(Q)$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0xbfdd4eee -b 0x0000 -c -o $@ $^ + flash: $(BUILD)/firmware.bin - esptool.py --chip esp32s2 -p $(PORT) -b 460800 --before=default_reset --after=hard_reset write_flash $(FLASH_FLAGS) 0x0000 $^ + esptool.py --chip esp32s2 -p $(PORT) --no-stub -b 460800 --before=default_reset --after=hard_reset write_flash $(FLASH_FLAGS) 0x0000 $^ + +flash-circuitpython-only: $(BUILD)/circuitpython-firmware.bin + esptool.py --chip esp32s2 -p $(PORT) --no-stub -b 460800 --before=default_reset --after=hard_reset write_flash $(FLASH_FLAGS) 0x10000 $^ include $(TOP)/py/mkrules.mk diff --git a/ports/esp32s2/background.c b/ports/esp32s2/background.c index e22cf4aac..a90fa7d0a 100644 --- a/ports/esp32s2/background.c +++ b/ports/esp32s2/background.c @@ -47,16 +47,14 @@ void run_background_tasks(void) { return; } - // Delay for 1 tick so that we don't starve the idle task. - // TODO: 1 tick is 10ms which is a long time! Can we delegate to idle for a minimal amount of - // time? - vTaskDelay(1); + // Zero delay in case FreeRTOS wants to switch to something else. + vTaskDelay(0); running_background_tasks = true; filesystem_background(); - // #if CIRCUITPY_DISPLAYIO - // displayio_background(); - // #endif + #if CIRCUITPY_DISPLAYIO + displayio_background(); + #endif running_background_tasks = false; assert_heap_ok(); diff --git a/ports/esp32s2/boards/espressif_saola_1_wroom/board.c b/ports/esp32s2/boards/espressif_saola_1_wroom/board.c index b7b2c4ef5..9f708874b 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wroom/board.c +++ b/ports/esp32s2/boards/espressif_saola_1_wroom/board.c @@ -30,12 +30,12 @@ void board_init(void) { // USB - never_reset_pin(&pin_GPIO19); - never_reset_pin(&pin_GPIO20); + common_hal_never_reset_pin(&pin_GPIO19); + common_hal_never_reset_pin(&pin_GPIO20); // Debug UART - never_reset_pin(&pin_GPIO43); - never_reset_pin(&pin_GPIO44); + common_hal_never_reset_pin(&pin_GPIO43); + common_hal_never_reset_pin(&pin_GPIO44); } bool board_requests_safe_mode(void) { diff --git a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk index cd2735615..6e7627265 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk +++ b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x80A8 USB_PRODUCT = "Saola 1 w/WROOM" USB_MANUFACTURER = "Espressif" -USB_DEVICES = "CDC,MSC,HID" INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = MPZ @@ -12,8 +11,6 @@ LONGINT_IMPL = MPZ CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 CIRCUITPY_NEOPIXEL_WRITE = 0 -CIRCUITPY_DIGITALIO = 0 -CIRCUITPY_MICROCONTROLLER = 0 CIRCUITPY_ESP_FLASH_MODE=dio CIRCUITPY_ESP_FLASH_FREQ=40m diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/board.c b/ports/esp32s2/boards/espressif_saola_1_wrover/board.c index b7b2c4ef5..9f708874b 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wrover/board.c +++ b/ports/esp32s2/boards/espressif_saola_1_wrover/board.c @@ -30,12 +30,12 @@ void board_init(void) { // USB - never_reset_pin(&pin_GPIO19); - never_reset_pin(&pin_GPIO20); + common_hal_never_reset_pin(&pin_GPIO19); + common_hal_never_reset_pin(&pin_GPIO20); // Debug UART - never_reset_pin(&pin_GPIO43); - never_reset_pin(&pin_GPIO44); + common_hal_never_reset_pin(&pin_GPIO43); + common_hal_never_reset_pin(&pin_GPIO44); } bool board_requests_safe_mode(void) { diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk index 0b847de94..1437df7f4 100644 --- a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk +++ b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x80A6 USB_PRODUCT = "Saola 1 w/WROVER" USB_MANUFACTURER = "Espressif" -USB_DEVICES = "CDC,MSC,HID" INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = MPZ @@ -12,8 +11,6 @@ LONGINT_IMPL = MPZ CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 CIRCUITPY_NEOPIXEL_WRITE = 0 -CIRCUITPY_DIGITALIO = 0 -CIRCUITPY_MICROCONTROLLER = 0 CIRCUITPY_ESP_FLASH_MODE=dio CIRCUITPY_ESP_FLASH_FREQ=40m diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/board.c b/ports/esp32s2/boards/unexpectedmaker_feathers2/board.c new file mode 100644 index 000000000..1dc30b5af --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/board.c @@ -0,0 +1,56 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" +#include "mpconfigboard.h" +#include "shared-bindings/microcontroller/Pin.h" + +void board_init(void) { + // USB + common_hal_never_reset_pin(&pin_GPIO19); + common_hal_never_reset_pin(&pin_GPIO20); + + // Debug UART + common_hal_never_reset_pin(&pin_GPIO43); + common_hal_never_reset_pin(&pin_GPIO44); + + // SPI Flash and RAM + common_hal_never_reset_pin(&pin_GPIO26); + common_hal_never_reset_pin(&pin_GPIO27); + common_hal_never_reset_pin(&pin_GPIO28); + common_hal_never_reset_pin(&pin_GPIO29); + common_hal_never_reset_pin(&pin_GPIO30); + common_hal_never_reset_pin(&pin_GPIO31); + common_hal_never_reset_pin(&pin_GPIO32); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h new file mode 100644 index 000000000..93fb0c573 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +//Micropython setup + +#define MICROPY_HW_BOARD_NAME "FeatherS2" +#define MICROPY_HW_MCU_NAME "ESP32S2" + +#define AUTORESET_DELAY_MS 500 + +// Doesn't work with this on. +// #define MICROPY_HW_APA102_MOSI (&pin_GPIO44) +// #define MICROPY_HW_APA102_SCK (&pin_GPIO45) diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk new file mode 100644 index 000000000..ea3484d2f --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk @@ -0,0 +1,21 @@ +USB_VID = 0x239A +USB_PID = 0x80AC +USB_PRODUCT = "FeatherS2" +USB_MANUFACTURER = "UnexpectedMaker" +USB_DEVICES = "CDC,MSC,HID" + + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ + +# The default queue depth of 16 overflows on release builds, +# so increase it to 32. +CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 + +CIRCUITPY_NEOPIXEL_WRITE = 0 + +CIRCUITPY_ESP_FLASH_MODE=qio +CIRCUITPY_ESP_FLASH_FREQ=40m +CIRCUITPY_ESP_FLASH_SIZE=16MB + +CIRCUITPY_BITBANG_APA102 = 1 diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c b/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c new file mode 100644 index 000000000..e8dd2edf6 --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c @@ -0,0 +1,57 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_global_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO17) }, + + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO18) }, + + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO14) }, + + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO12) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO6) }, + + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO5) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO36) }, + + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO35) }, + + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) }, + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO37) }, + + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, + + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO43) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, + + // Moving to 9 and 8 + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO11) }, + + { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_GPIO44) }, // MTDO + { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_GPIO45) }, + + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO13) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig b/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig diff --git a/ports/esp32s2/common-hal/busio/I2C.c b/ports/esp32s2/common-hal/busio/I2C.c new file mode 100644 index 000000000..57270372f --- /dev/null +++ b/ports/esp32s2/common-hal/busio/I2C.c @@ -0,0 +1,228 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/busio/I2C.h" +#include "py/mperrno.h" +#include "py/runtime.h" + +#include "driver/i2c.h" + +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/translate.h" + +typedef enum { + STATUS_FREE = 0, + STATUS_IN_USE, + STATUS_NEVER_RESET +} i2c_status_t; + +static i2c_status_t i2c_status[I2C_NUM_MAX]; + +void never_reset_i2c(i2c_port_t num) { + i2c_status[num] = STATUS_NEVER_RESET; +} + +void i2c_reset(void) { + for (i2c_port_t num = 0; num < I2C_NUM_MAX; num++) { + if (i2c_status[num] == STATUS_IN_USE) { + i2c_driver_delete(num); + i2c_status[num] = STATUS_FREE; + } + } +} + +void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, + const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, uint32_t frequency, uint32_t timeout) { + // Pins 45 and 46 are "strapping" pins that impact start up behavior. They usually need to + // be pulled-down so pulling them up for I2C is a bad idea. To make this hard, we don't + // support I2C on these pins. + // + // 46 is also input-only so it'll never work. + if (scl->number == 45 || scl->number == 46 || sda->number == 45 || sda->number == 46) { + mp_raise_ValueError(translate("Invalid pins")); + } + +#if CIRCUITPY_REQUIRE_I2C_PULLUPS + // Test that the pins are in a high state. (Hopefully indicating they are pulled up.) + gpio_set_direction(sda->number, GPIO_MODE_DEF_INPUT); + gpio_set_direction(scl->number, GPIO_MODE_DEF_INPUT); + + gpio_pulldown_en(sda->number); + gpio_pulldown_en(scl->number); + + common_hal_mcu_delay_us(10); + + gpio_pulldown_dis(sda->number); + gpio_pulldown_dis(scl->number); + + // We must pull up within 3us to achieve 400khz. + common_hal_mcu_delay_us(3); + + if (gpio_get_level(sda->number) == 0 || gpio_get_level(scl->number) == 0) { + reset_pin_number(sda->number); + reset_pin_number(scl->number); + mp_raise_RuntimeError(translate("SDA or SCL needs a pull up")); + } +#endif + + + if (xSemaphoreCreateBinaryStatic(&self->semaphore) != &self->semaphore) { + mp_raise_RuntimeError(translate("Unable to create lock")); + } + xSemaphoreGive(&self->semaphore); + self->sda_pin = sda; + self->scl_pin = scl; + self->i2c_num = I2C_NUM_MAX; + for (i2c_port_t num = 0; num < I2C_NUM_MAX; num++) { + if (i2c_status[num] == STATUS_FREE) { + self->i2c_num = num; + } + } + if (self->i2c_num == I2C_NUM_MAX) { + mp_raise_ValueError(translate("All I2C peripherals are in use")); + } + i2c_status[self->i2c_num] = STATUS_IN_USE; + i2c_config_t i2c_conf = { + .mode = I2C_MODE_MASTER, + .sda_io_num = self->sda_pin->number, + .scl_io_num = self->scl_pin->number, + .sda_pullup_en = GPIO_PULLUP_DISABLE, /*!< Internal GPIO pull mode for I2C sda signal*/ + .scl_pullup_en = GPIO_PULLUP_DISABLE, /*!< Internal GPIO pull mode for I2C scl signal*/ + + .master = { + .clk_speed = frequency, + } + }; + esp_err_t result = i2c_param_config(self->i2c_num, &i2c_conf); + if (result != ESP_OK) { + mp_raise_ValueError(translate("Invalid pins")); + } + result = i2c_driver_install(self->i2c_num, + I2C_MODE_MASTER, + 0, + 0, + 0); + if (result != ESP_OK) { + mp_raise_OSError(MP_EIO); + } + + claim_pin(sda); + claim_pin(scl); +} + +bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) { + return self->sda_pin == NULL; +} + +void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) { + if (common_hal_busio_i2c_deinited(self)) { + return; + } + + i2c_driver_delete(self->i2c_num); + i2c_status[self->i2c_num] = STATUS_FREE; + + common_hal_reset_pin(self->sda_pin); + common_hal_reset_pin(self->scl_pin); + self->sda_pin = NULL; + self->scl_pin = NULL; +} + +bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) { + i2c_cmd_handle_t cmd = i2c_cmd_link_create(); + i2c_master_start(cmd); + i2c_master_write_byte(cmd, addr << 1, true); + i2c_master_stop(cmd); + esp_err_t result = i2c_master_cmd_begin(self->i2c_num, cmd, 10); + i2c_cmd_link_delete(cmd); + return result == ESP_OK; +} + +bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) { + if (self->has_lock) { + return false; + } + self->has_lock = xSemaphoreTake(&self->semaphore, 0) == pdTRUE; + return self->has_lock; +} + +bool common_hal_busio_i2c_has_lock(busio_i2c_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) { + xSemaphoreGive(&self->semaphore); + self->has_lock = false; +} + +uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, + const uint8_t *data, size_t len, bool transmit_stop_bit) { + i2c_cmd_handle_t cmd = i2c_cmd_link_create(); + i2c_master_start(cmd); + i2c_master_write_byte(cmd, addr << 1, true); + i2c_master_write(cmd, (uint8_t*) data, len, true); + if (transmit_stop_bit) { + i2c_master_stop(cmd); + } + esp_err_t result = i2c_master_cmd_begin(self->i2c_num, cmd, 100 /* wait in ticks */); + i2c_cmd_link_delete(cmd); + + if (result == ESP_OK) { + return 0; + } else if (result == ESP_FAIL) { + return MP_ENODEV; + } + return MP_EIO; +} + +uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, + uint8_t *data, size_t len) { + i2c_cmd_handle_t cmd = i2c_cmd_link_create(); + i2c_master_start(cmd); + i2c_master_write_byte(cmd, addr << 1 | 1, true); // | 1 to indicate read + if (len > 1) { + i2c_master_read(cmd, data, len - 1, 0); + } + i2c_master_read_byte(cmd, data + len - 1, 1); + i2c_master_stop(cmd); + esp_err_t result = i2c_master_cmd_begin(self->i2c_num, cmd, 100 /* wait in ticks */); + i2c_cmd_link_delete(cmd); + + if (result == ESP_OK) { + return 0; + } else if (result == ESP_FAIL) { + return MP_ENODEV; + } + return MP_EIO; +} + +void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) { + never_reset_i2c(self->i2c_num); + + common_hal_never_reset_pin(self->scl_pin); + common_hal_never_reset_pin(self->sda_pin); +} diff --git a/ports/esp32s2/common-hal/busio/I2C.h b/ports/esp32s2/common-hal/busio/I2C.h new file mode 100644 index 000000000..24a3fd495 --- /dev/null +++ b/ports/esp32s2/common-hal/busio/I2C.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_BUSIO_I2C_H +#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_BUSIO_I2C_H + +#include "common-hal/microcontroller/Pin.h" + +#include "esp-idf/components/soc/include/hal/i2c_types.h" +#include "FreeRTOS.h" +#include "freertos/semphr.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t* scl_pin; + const mcu_pin_obj_t* sda_pin; + i2c_port_t i2c_num; + StaticSemaphore_t semaphore; + bool has_lock; +} busio_i2c_obj_t; + +void i2c_reset(void); + +#endif // MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_BUSIO_I2C_H diff --git a/ports/esp32s2/common-hal/busio/OneWire.h b/ports/esp32s2/common-hal/busio/OneWire.h new file mode 100644 index 000000000..bb6a01419 --- /dev/null +++ b/ports/esp32s2/common-hal/busio/OneWire.h @@ -0,0 +1,33 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_BUSIO_ONEWIRE_H +#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_BUSIO_ONEWIRE_H + +// Use bitbangio. +#include "shared-module/busio/OneWire.h" + +#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_BUSIO_ONEWIRE_H diff --git a/ports/esp32s2/common-hal/busio/SPI.c b/ports/esp32s2/common-hal/busio/SPI.c new file mode 100644 index 000000000..a22075cd5 --- /dev/null +++ b/ports/esp32s2/common-hal/busio/SPI.c @@ -0,0 +1,358 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/busio/SPI.h" +#include "py/mperrno.h" +#include "py/runtime.h" + +#include "boards/board.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/rgb_led_status.h" + +static bool spi_never_reset[SOC_SPI_PERIPH_NUM]; + +// Store one lock handle per device so that we can free it. +static spi_bus_lock_dev_handle_t lock_dev_handle[SOC_SPI_PERIPH_NUM]; +static intr_handle_t intr_handle[SOC_SPI_PERIPH_NUM]; + +void spi_reset(void) { + for (spi_host_device_t host_id = SPI2_HOST; host_id < SOC_SPI_PERIPH_NUM; host_id++) { + if (spi_never_reset[host_id]) { + continue; + } + bool in_use = false; + if (lock_dev_handle[host_id] != NULL) { + spi_bus_lock_unregister_dev(lock_dev_handle[host_id]); + lock_dev_handle[host_id] = NULL; + in_use = true; + } + if (intr_handle[host_id] != NULL) { + esp_intr_free(intr_handle[host_id]); + intr_handle[host_id] = NULL; + in_use = true; + } + if (in_use) { + spi_bus_free(host_id); + } + } +} + +// This is copied in from the ESP-IDF because it is static. +// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +static bool bus_uses_iomux_pins(spi_host_device_t host, const spi_bus_config_t* bus_config) +{ + if (bus_config->sclk_io_num>=0 && + bus_config->sclk_io_num != spi_periph_signal[host].spiclk_iomux_pin) return false; + if (bus_config->quadwp_io_num>=0 && + bus_config->quadwp_io_num != spi_periph_signal[host].spiwp_iomux_pin) return false; + if (bus_config->quadhd_io_num>=0 && + bus_config->quadhd_io_num != spi_periph_signal[host].spihd_iomux_pin) return false; + if (bus_config->mosi_io_num >= 0 && + bus_config->mosi_io_num != spi_periph_signal[host].spid_iomux_pin) return false; + if (bus_config->miso_io_num>=0 && + bus_config->miso_io_num != spi_periph_signal[host].spiq_iomux_pin) return false; + + return true; +} + +// End copied code. + +static bool spi_bus_is_free(spi_host_device_t host_id) { + return spi_bus_get_attr(host_id) == NULL; +} + +static void spi_interrupt_handler(void *arg) { + // busio_spi_obj_t *self = arg; +} + +// The interrupt may get invoked by the bus lock. +static void spi_bus_intr_enable(void *self) +{ + esp_intr_enable(((busio_spi_obj_t *)self)->interrupt); +} + +// The interrupt is always disabled by the ISR itself, not exposed +static void spi_bus_intr_disable(void *self) +{ + esp_intr_disable(((busio_spi_obj_t *)self)->interrupt); +} + +void common_hal_busio_spi_construct(busio_spi_obj_t *self, + const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, + const mcu_pin_obj_t * miso) { + spi_bus_config_t bus_config; + bus_config.mosi_io_num = mosi != NULL ? mosi->number : -1; + bus_config.miso_io_num = miso != NULL ? miso->number : -1; + bus_config.sclk_io_num = clock != NULL ? clock->number : -1; + bus_config.quadwp_io_num = -1; + bus_config.quadhd_io_num = -1; + bus_config.max_transfer_sz = 0; // Uses the default + bus_config.flags = SPICOMMON_BUSFLAG_MASTER | SPICOMMON_BUSFLAG_SCLK | + (mosi != NULL ? SPICOMMON_BUSFLAG_MOSI : 0) | + (miso != NULL ? SPICOMMON_BUSFLAG_MISO : 0); + bus_config.intr_flags = 0; + + // RAM and Flash is often on SPI1 and is unsupported by the IDF so use it as + // a flag value. + spi_host_device_t host_id = SPI1_HOST; + self->connected_through_gpio = true; + // Try and save SPI2 for pins that are on the IOMUX + if (bus_uses_iomux_pins(SPI2_HOST, &bus_config) && spi_bus_is_free(SPI2_HOST)) { + host_id = SPI2_HOST; + self->connected_through_gpio = false; + } else if (spi_bus_is_free(SPI3_HOST)) { + host_id = SPI3_HOST; + } else if (spi_bus_is_free(SPI2_HOST)) { + host_id = SPI2_HOST; + } + if (host_id == SPI1_HOST) { + mp_raise_ValueError(translate("All SPI peripherals are in use")); + } + + esp_err_t result = spi_bus_initialize(host_id, &bus_config, host_id /* dma channel */); + if (result == ESP_ERR_NO_MEM) { + mp_raise_msg(&mp_type_MemoryError, translate("ESP-IDF memory allocation failed")); + } else if (result == ESP_ERR_INVALID_ARG) { + mp_raise_ValueError(translate("Invalid pins")); + } + + // After this point, we need to deinit to free IDF memory so fill out self's pins. + self->clock_pin = clock; + self->MOSI_pin = mosi; + self->MISO_pin = miso; + self->host_id = host_id; + + spi_bus_lock_dev_config_t config = { .flags = 0 }; + // The returned lock is stored in the bus lock but must be freed separately with + // spi_bus_lock_unregister_dev. + result = spi_bus_lock_register_dev(spi_bus_get_attr(host_id)->lock, + &config, + &self->lock); + if (result == ESP_ERR_NO_MEM) { + common_hal_busio_spi_deinit(self); + mp_raise_msg(&mp_type_MemoryError, translate("ESP-IDF memory allocation failed")); + } + lock_dev_handle[host_id] = self->lock; + + result = esp_intr_alloc(spicommon_irqsource_for_host(host_id), + bus_config.intr_flags | ESP_INTR_FLAG_INTRDISABLED, + spi_interrupt_handler, self, &self->interrupt); + if (result == ESP_ERR_NO_MEM) { + common_hal_busio_spi_deinit(self); + mp_raise_msg(&mp_type_MemoryError, translate("ESP-IDF memory allocation failed")); + } + intr_handle[host_id] = self->interrupt; + spi_bus_lock_set_bg_control(spi_bus_get_attr(host_id)->lock, spi_bus_intr_enable, spi_bus_intr_disable, self); + + spi_hal_context_t* hal = &self->hal_context; + + // spi_hal_init clears the given hal context so set everything after. + spi_hal_init(hal, host_id); + hal->dmadesc_tx = &self->tx_dma; + hal->dmadesc_rx = &self->rx_dma; + hal->dmadesc_n = 1; + + // We don't use native CS. + // hal->cs_setup = 0; + // hal->cs_hold = 0; + // hal->cs_pin_id = 0; + + hal->sio = 0; + hal->half_duplex = 0; + // hal->tx_lsbfirst = 0; + // hal->rx_lsbfirst = 0; + hal->dma_enabled = 1; + hal->no_compensate = 1; + // Ignore CS bits + + // We don't use cmd, addr or dummy bits. + // hal->cmd = 0; + // hal->cmd_bits = 0; + // hal->addr_bits = 0; + // hal->dummy_bits = 0; + // hal->addr = 0; + + hal->io_mode = SPI_LL_IO_MODE_NORMAL; + + common_hal_busio_spi_configure(self, 250000, 0, 0, 8); +} + +void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) { + spi_never_reset[self->host_id] = true; + + common_hal_never_reset_pin(self->clock_pin); + common_hal_never_reset_pin(self->MOSI_pin); + common_hal_never_reset_pin(self->MISO_pin); +} + +bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { + return self->clock_pin == NULL; +} + +void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { + if (common_hal_busio_spi_deinited(self)) { + return; + } + spi_never_reset[self->host_id] = false; + if (self->lock != NULL) { + spi_bus_lock_unregister_dev(self->lock); + lock_dev_handle[self->host_id] = NULL; + } + if (self->interrupt != NULL) { + esp_intr_free(self->interrupt); + intr_handle[self->host_id] = NULL; + } + spi_bus_free(self->host_id); + + common_hal_reset_pin(self->clock_pin); + common_hal_reset_pin(self->MOSI_pin); + common_hal_reset_pin(self->MISO_pin); + self->clock_pin = NULL; +} + +bool common_hal_busio_spi_configure(busio_spi_obj_t *self, + uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) { + if (baudrate == self->target_frequency && + polarity == self->polarity && + phase == self->phase && + bits == self->bits) { + return true; + } + self->hal_context.mode = polarity << 1 | phase; + self->polarity = polarity; + self->phase = phase; + self->bits = bits; + self->target_frequency = baudrate; + self->hal_context.timing_conf = &self->timing_conf; + esp_err_t result = spi_hal_get_clock_conf(&self->hal_context, + self->target_frequency, + 128 /* duty_cycle */, + self->connected_through_gpio, + 0 /* input_delay_ns */, + &self->real_frequency, + &self->timing_conf); + if (result != ESP_OK) { + return false; + } + + spi_hal_setup_device(&self->hal_context); + return true; +} + +bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { + // If our lock has already been taken then return false because someone else + // may already grabbed it in our call stack. + if (self->has_lock) { + return false; + } + // Wait to grab the lock from another task. + esp_err_t result = spi_bus_lock_acquire_start(self->lock, portMAX_DELAY); + self->has_lock = result == ESP_OK; + return self->has_lock; +} + +bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) { + return self->has_lock; +} + +void common_hal_busio_spi_unlock(busio_spi_obj_t *self) { + spi_bus_lock_acquire_end(self->lock); + self->has_lock = false; +} + +bool common_hal_busio_spi_write(busio_spi_obj_t *self, + const uint8_t *data, size_t len) { + return common_hal_busio_spi_transfer(self, data, NULL, len); +} + +bool common_hal_busio_spi_read(busio_spi_obj_t *self, + uint8_t *data, size_t len, uint8_t write_value) { + return common_hal_busio_spi_transfer(self, NULL, data, len); +} + +bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) { + if (len == 0) { + return true; + } + + spi_hal_context_t* hal = &self->hal_context; + hal->send_buffer = NULL; + hal->rcv_buffer = NULL; + // Reset timing_conf in case we've moved since the last time we used it. + hal->timing_conf = &self->timing_conf; + // This rounds up. + size_t dma_count = (len + LLDESC_MAX_NUM_PER_DESC - 1) / LLDESC_MAX_NUM_PER_DESC; + for (size_t i = 0; i < dma_count; i++) { + size_t offset = LLDESC_MAX_NUM_PER_DESC * i; + size_t dma_len = len - offset; + if (dma_len > LLDESC_MAX_NUM_PER_DESC) { + dma_len = LLDESC_MAX_NUM_PER_DESC; + } + hal->tx_bitlen = dma_len * self->bits; + hal->rx_bitlen = dma_len * self->bits; + if (data_out != NULL) { + hal->send_buffer = (uint8_t*) data_out + offset; + } + if (data_in != NULL) { + hal->rcv_buffer = data_in + offset; + } + + spi_hal_setup_trans(hal); + spi_hal_prepare_data(hal); + spi_hal_user_start(hal); + // TODO: Switch to waiting on a lock that is given by an interrupt. + while (!spi_hal_usr_is_done(hal)) { + RUN_BACKGROUND_TASKS; + } + spi_hal_fetch_result(hal); + } + + return true; +} + +uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self) { + return self->real_frequency; +} + +uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { + return self->phase; +} + +uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { + return self->polarity; +} diff --git a/ports/esp32s2/common-hal/busio/SPI.h b/ports/esp32s2/common-hal/busio/SPI.h new file mode 100644 index 000000000..6d8203831 --- /dev/null +++ b/ports/esp32s2/common-hal/busio/SPI.h @@ -0,0 +1,62 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_BUSIO_SPI_H +#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_BUSIO_SPI_H + +#include "common-hal/microcontroller/Pin.h" + +#include "esp-idf/components/driver/include/driver/spi_common_internal.h" +#include "esp-idf/components/soc/include/hal/spi_hal.h" +#include "esp-idf/components/soc/include/hal/spi_types.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t* clock_pin; + const mcu_pin_obj_t* MOSI_pin; + const mcu_pin_obj_t* MISO_pin; + spi_host_device_t host_id; + spi_bus_lock_dev_handle_t lock; + spi_hal_context_t hal_context; + spi_hal_timing_conf_t timing_conf; + intr_handle_t interrupt; + // IDF allocates these in DMA accessible memory so they may need to move when + // we use external RAM for CircuitPython. + lldesc_t tx_dma; + lldesc_t rx_dma; + uint32_t target_frequency; + int32_t real_frequency; + uint8_t polarity; + uint8_t phase; + uint8_t bits; + bool has_lock; + bool connected_through_gpio; +} busio_spi_obj_t; + +void spi_reset(void); + +#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_BUSIO_SPI_H diff --git a/ports/esp32s2/common-hal/busio/UART.c b/ports/esp32s2/common-hal/busio/UART.c new file mode 100644 index 000000000..b0162adba --- /dev/null +++ b/ports/esp32s2/common-hal/busio/UART.c @@ -0,0 +1,348 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/microcontroller/__init__.h" +#include "shared-bindings/busio/UART.h" + +#include "driver/uart.h" + +#include "mpconfigport.h" +#include "lib/utils/interrupt_char.h" +#include "py/gc.h" +#include "py/mperrno.h" +#include "py/runtime.h" +#include "py/stream.h" +#include "supervisor/shared/translate.h" +#include "supervisor/shared/tick.h" + +void uart_reset(void) { + for (uart_port_t num = 0; num < UART_NUM_MAX; num++) { + // Ignore the UART used by the IDF. + #ifdef CONFIG_CONSOLE_UART_NUM + if (num == CONFIG_CONSOLE_UART_NUM) { + continue; + } + #endif + if (uart_is_driver_installed(num)) { + uart_driver_delete(num); + } + } +} + +void common_hal_busio_uart_construct(busio_uart_obj_t *self, + const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, + const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, + const mcu_pin_obj_t * rs485_dir, bool rs485_invert, + uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop, + mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer, + bool sigint_enabled) { + + if (bits > 8) { + mp_raise_NotImplementedError(translate("bytes > 8 bits not supported")); + } + + bool have_tx = tx != NULL; + bool have_rx = rx != NULL; + bool have_rts = rts != NULL; + bool have_cts = cts != NULL; + bool have_rs485_dir = rs485_dir != NULL; + if (!have_tx && !have_rx) { + mp_raise_ValueError(translate("tx and rx cannot both be None")); + } + + // Filter for sane settings for RS485 + if (have_rs485_dir) { + if (have_rts || have_cts) { + mp_raise_ValueError(translate("Cannot specify RTS or CTS in RS485 mode")); + } + } else if (rs485_invert) { + mp_raise_ValueError(translate("RS485 inversion specified when not in RS485 mode")); + } + + self->timeout_ms = timeout * 1000; + + self->uart_num = UART_NUM_MAX; + for (uart_port_t num = 0; num < UART_NUM_MAX; num++) { + if (!uart_is_driver_installed(num)) { + self->uart_num = num; + } + } + if (self->uart_num == UART_NUM_MAX) { + mp_raise_ValueError(translate("All UART peripherals are in use")); + } + + uart_mode_t mode = UART_MODE_UART; + uart_hw_flowcontrol_t flow_control = UART_HW_FLOWCTRL_DISABLE; + if (have_rs485_dir) { + mode = UART_MODE_RS485_HALF_DUPLEX; + if (!rs485_invert) { + uart_set_line_inverse(self->uart_num, UART_SIGNAL_DTR_INV); + } + } else if (have_rts && have_cts) { + flow_control = UART_HW_FLOWCTRL_CTS_RTS; + } else if (have_rts) { + flow_control = UART_HW_FLOWCTRL_RTS; + } else if (have_rts) { + flow_control = UART_HW_FLOWCTRL_CTS; + } + + if (receiver_buffer_size <= UART_FIFO_LEN) { + receiver_buffer_size = UART_FIFO_LEN + 8; + } + + uint8_t rx_threshold = UART_FIFO_LEN - 8; + // Install the driver before we change the settings. + if (uart_driver_install(self->uart_num, receiver_buffer_size, 0, 0, NULL, 0) != ESP_OK || + uart_set_mode(self->uart_num, mode) != ESP_OK) { + mp_raise_ValueError(translate("Could not initialize UART")); + } + uart_set_hw_flow_ctrl(self->uart_num, flow_control, rx_threshold); + + // Set baud rate + common_hal_busio_uart_set_baudrate(self, baudrate); + + uart_word_length_t word_length = UART_DATA_8_BITS; + switch (bits) { + // Shared bindings prevents data < 7 bits. + // case 5: + // word_length = UART_DATA_5_BITS; + // break; + // case 6: + // word_length = UART_DATA_6_BITS; + // break; + case 7: + word_length = UART_DATA_7_BITS; + break; + case 8: + word_length = UART_DATA_8_BITS; + break; + default: + // Won't hit this because shared-bindings limits to 7-9 bits. We error on 9 above. + break; + } + uart_set_word_length(self->uart_num, word_length); + + uart_parity_t parity_mode = UART_PARITY_DISABLE; + switch (parity) { + case BUSIO_UART_PARITY_NONE: + parity_mode = UART_PARITY_DISABLE; + break; + case BUSIO_UART_PARITY_EVEN: + parity_mode = UART_PARITY_EVEN; + break; + case BUSIO_UART_PARITY_ODD: + parity_mode = UART_PARITY_ODD; + break; + default: + // Won't reach here because the input is an enum that is completely handled. + break; + } + uart_set_parity(self->uart_num, parity_mode); + + // Stop is 1 or 2 always. + uart_stop_bits_t stop_bits= UART_STOP_BITS_1; + if (stop == 2) { + stop_bits = UART_STOP_BITS_2; + } + uart_set_stop_bits(self->uart_num, stop_bits); + + self->tx_pin = NULL; + self->rx_pin = NULL; + self->rts_pin = NULL; + self->cts_pin = NULL; + int tx_num = -1; + int rx_num = -1; + int rts_num = -1; + int cts_num = -1; + if (have_tx) { + claim_pin(tx); + self->tx_pin = tx; + tx_num = tx->number; + } + + if (have_rx) { + claim_pin(rx); + self->rx_pin = rx; + rx_num = rx->number; + } + + if (have_rts) { + claim_pin(rts); + self->rts_pin = rts; + rts_num = rts->number; + } + + if (have_cts) { + claim_pin(cts); + self->cts_pin = cts; + cts_num = cts->number; + } + + if (have_rs485_dir) { + claim_pin(rs485_dir); + // RTS is used for RS485 direction. + self->rts_pin = rs485_dir; + rts_num = rs485_dir->number; + } + if (uart_set_pin(self->uart_num, tx_num, rx_num, rts_num, cts_num) != ESP_OK) { + mp_raise_ValueError(translate("Invalid pins")); + } +} + +bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { + return self->rx_pin == NULL && self->tx_pin == NULL; +} + +void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { + if (common_hal_busio_uart_deinited(self)) { + return; + } + uart_driver_delete(self->uart_num); + + common_hal_reset_pin(self->rx_pin); + common_hal_reset_pin(self->tx_pin); + common_hal_reset_pin(self->rts_pin); + common_hal_reset_pin(self->cts_pin); + self->rx_pin = NULL; + self->tx_pin = NULL; + self->cts_pin = NULL; + self->rts_pin = NULL; +} + +// Read characters. +size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { + if (self->rx_pin == NULL) { + mp_raise_ValueError(translate("No RX pin")); + } + if (len == 0) { + // Nothing to read. + return 0; + } + + size_t total_read = 0; + uint64_t start_ticks = supervisor_ticks_ms64(); + + // Busy-wait until timeout or until we've read enough chars. + while (supervisor_ticks_ms64() - start_ticks <= self->timeout_ms) { + // Read as many chars as we can right now, up to len. + size_t num_read = uart_read_bytes(self->uart_num, data, len, 0); + if (num_read < 0) { + break; + } + + // Advance pointer in data buffer, and decrease how many chars left to read. + data += num_read; + len -= num_read; + total_read += num_read; + if (len == 0) { + // Don't need to read any more: data buf is full. + break; + } + if (num_read > 0) { + // Reset the timeout on every character read. + start_ticks = supervisor_ticks_ms64(); + } + RUN_BACKGROUND_TASKS; + // Allow user to break out of a timeout with a KeyboardInterrupt. + if (mp_hal_is_interrupted()) { + break; + } + // If we are zero timeout, make sure we don't loop again (in the event + // we read in under 1ms) + if (self->timeout_ms == 0) { + break; + } + } + + if (total_read == 0) { + *errcode = EAGAIN; + return MP_STREAM_ERROR; + } + + return total_read; +} + +// Write characters. +size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { + if (self->tx_pin == NULL) { + mp_raise_ValueError(translate("No TX pin")); + } + + while (len > 0) { + int count = uart_tx_chars(self->uart_num, (const char*) data, len); + if (count < 0) { + *errcode = MP_EAGAIN; + return MP_STREAM_ERROR; + } + len -= count; + data += count; + RUN_BACKGROUND_TASKS; + } + while (uart_wait_tx_done(self->uart_num, 0) == ESP_ERR_TIMEOUT) { + RUN_BACKGROUND_TASKS; + } + + return len; +} + +uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { + uint32_t baudrate; + uart_get_baudrate(self->uart_num, &baudrate); + return baudrate; +} + +void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) { + if (baudrate > UART_BITRATE_MAX || + uart_set_baudrate(self->uart_num, baudrate) != ESP_OK) { + mp_raise_ValueError(translate("Unsupported baudrate")); + } +} + +mp_float_t common_hal_busio_uart_get_timeout(busio_uart_obj_t *self) { + return (mp_float_t) (self->timeout_ms / 1000.0f); +} + +void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeout) { + self->timeout_ms = timeout * 1000; +} + +uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { + size_t count; + uart_get_buffered_data_len(self->uart_num, &count); + return count; +} + +void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { + uart_flush(self->uart_num); +} + +// True if there are no characters still to be written. +bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { + if (self->tx_pin == NULL) { + return false; + } + return uart_wait_tx_done(self->uart_num, 0) != ESP_ERR_TIMEOUT; +} diff --git a/ports/esp32s2/common-hal/busio/UART.h b/ports/esp32s2/common-hal/busio/UART.h new file mode 100644 index 000000000..b3cc92966 --- /dev/null +++ b/ports/esp32s2/common-hal/busio/UART.h @@ -0,0 +1,49 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_BUSIO_UART_H +#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_BUSIO_UART_H + +#include "common-hal/microcontroller/Pin.h" + +#include "esp-idf/components/soc/include/hal/uart_types.h" +#include "py/obj.h" + +typedef struct { + mp_obj_base_t base; + const mcu_pin_obj_t* rx_pin; + const mcu_pin_obj_t* tx_pin; + const mcu_pin_obj_t* rts_pin; + const mcu_pin_obj_t* cts_pin; + uart_port_t uart_num; + uint8_t character_bits; + bool rx_error; + uint32_t timeout_ms; +} busio_uart_obj_t; + +void uart_reset(void); + +#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_BUSIO_UART_H diff --git a/ports/esp32s2/common-hal/busio/__init__.c b/ports/esp32s2/common-hal/busio/__init__.c new file mode 100644 index 000000000..41761b674 --- /dev/null +++ b/ports/esp32s2/common-hal/busio/__init__.c @@ -0,0 +1 @@ +// No busio module functions. diff --git a/ports/esp32s2/common-hal/digitalio/DigitalInOut.c b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c index 7745a9c0a..fb3ee10ad 100644 --- a/ports/esp32s2/common-hal/digitalio/DigitalInOut.c +++ b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c @@ -46,7 +46,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_construct( } bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t *self) { - return self->pin == mp_const_none; + return self->pin == NULL; } void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self) { @@ -55,7 +55,7 @@ void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self } reset_pin_number(self->pin->number); - self->pin = mp_const_none; + self->pin = NULL; } void common_hal_digitalio_digitalinout_switch_to_input( diff --git a/ports/esp32s2/common-hal/displayio/ParallelBus.c b/ports/esp32s2/common-hal/displayio/ParallelBus.c new file mode 100644 index 000000000..314b72ff7 --- /dev/null +++ b/ports/esp32s2/common-hal/displayio/ParallelBus.c @@ -0,0 +1,66 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/displayio/ParallelBus.h" + +#include <stdint.h> + +#include "common-hal/microcontroller/Pin.h" +#include "py/runtime.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/microcontroller/__init__.h" + +void common_hal_displayio_parallelbus_construct(displayio_parallelbus_obj_t* self, + const mcu_pin_obj_t* data0, const mcu_pin_obj_t* command, const mcu_pin_obj_t* chip_select, + const mcu_pin_obj_t* write, const mcu_pin_obj_t* read, const mcu_pin_obj_t* reset) { + + mp_raise_NotImplementedError(translate("ParallelBus not yet supported")); +} + +void common_hal_displayio_parallelbus_deinit(displayio_parallelbus_obj_t* self) { + +} + +bool common_hal_displayio_parallelbus_reset(mp_obj_t obj) { + return false; +} + +bool common_hal_displayio_parallelbus_bus_free(mp_obj_t obj) { + return false; +} + +bool common_hal_displayio_parallelbus_begin_transaction(mp_obj_t obj) { + + return false; +} + +void common_hal_displayio_parallelbus_send(mp_obj_t obj, display_byte_type_t byte_type, display_chip_select_behavior_t chip_select, uint8_t *data, uint32_t data_length) { + +} + +void common_hal_displayio_parallelbus_end_transaction(mp_obj_t obj) { + +} diff --git a/ports/esp32s2/common-hal/displayio/ParallelBus.h b/ports/esp32s2/common-hal/displayio/ParallelBus.h new file mode 100644 index 000000000..cd636921d --- /dev/null +++ b/ports/esp32s2/common-hal/displayio/ParallelBus.h @@ -0,0 +1,36 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_DISPLAYIO_PARALLELBUS_H +#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_DISPLAYIO_PARALLELBUS_H + +#include "common-hal/digitalio/DigitalInOut.h" + +typedef struct { + mp_obj_base_t base; +} displayio_parallelbus_obj_t; + +#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_DISPLAYIO_PARALLELBUS_H diff --git a/ports/esp32s2/common-hal/microcontroller/Pin.c b/ports/esp32s2/common-hal/microcontroller/Pin.c index 4c39eea16..5a059f0bb 100644 --- a/ports/esp32s2/common-hal/microcontroller/Pin.c +++ b/ports/esp32s2/common-hal/microcontroller/Pin.c @@ -35,11 +35,14 @@ STATIC uint32_t never_reset_pins[2]; STATIC uint32_t in_use[2]; +bool apa102_mosi_in_use; +bool apa102_sck_in_use; + void never_reset_pin_number(gpio_num_t pin_number) { never_reset_pins[pin_number / 32] |= 1 << pin_number % 32; } -void never_reset_pin(const mcu_pin_obj_t* pin) { +void common_hal_never_reset_pin(const mcu_pin_obj_t* pin) { never_reset_pin_number(pin->number); } @@ -49,6 +52,10 @@ void reset_pin_number(gpio_num_t pin_number) { in_use[pin_number / 32] &= ~(1 << pin_number % 32); } +void common_hal_reset_pin(const mcu_pin_obj_t* pin) { + reset_pin_number(pin->number); +} + void reset_all_pins(void) { for (uint8_t i = 0; i < GPIO_PIN_COUNT; i++) { uint32_t iomux_address = GPIO_PIN_MUX_REG[i]; diff --git a/ports/esp32s2/common-hal/microcontroller/Pin.h b/ports/esp32s2/common-hal/microcontroller/Pin.h index 6f47b1ed3..19985bda6 100644 --- a/ports/esp32s2/common-hal/microcontroller/Pin.h +++ b/ports/esp32s2/common-hal/microcontroller/Pin.h @@ -31,13 +31,16 @@ #include "peripherals/pins.h" +extern bool apa102_mosi_in_use; +extern bool apa102_sck_in_use; + void reset_all_pins(void); // reset_pin_number takes the pin number instead of the pointer so that objects don't // need to store a full pointer. void reset_pin_number(gpio_num_t pin_number); +void common_hal_reset_pin(const mcu_pin_obj_t* pin); void claim_pin(const mcu_pin_obj_t* pin); bool pin_number_is_free(gpio_num_t pin_number); void never_reset_pin_number(gpio_num_t pin_number); -void never_reset_pin(const mcu_pin_obj_t* pin); #endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/esp32s2/esp-idf b/ports/esp32s2/esp-idf -Subproject 7aae7f034bab68d2dd6aaa763924c91eb697d87 +Subproject 160ba4924d8b588e718f76e3a0d0e92c11052fa diff --git a/ports/esp32s2/modules/wroom.c b/ports/esp32s2/modules/wroom.c index 16c586118..5e530701b 100644 --- a/ports/esp32s2/modules/wroom.c +++ b/ports/esp32s2/modules/wroom.c @@ -28,10 +28,10 @@ void never_reset_module_internal_pins(void) { // SPI Flash - never_reset_pin(&pin_GPIO27); - never_reset_pin(&pin_GPIO28); - never_reset_pin(&pin_GPIO29); - never_reset_pin(&pin_GPIO30); - never_reset_pin(&pin_GPIO31); - never_reset_pin(&pin_GPIO32); + common_hal_never_reset_pin(&pin_GPIO27); + common_hal_never_reset_pin(&pin_GPIO28); + common_hal_never_reset_pin(&pin_GPIO29); + common_hal_never_reset_pin(&pin_GPIO30); + common_hal_never_reset_pin(&pin_GPIO31); + common_hal_never_reset_pin(&pin_GPIO32); } diff --git a/ports/esp32s2/modules/wrover.c b/ports/esp32s2/modules/wrover.c index d589a8fd4..23fa7ee5c 100644 --- a/ports/esp32s2/modules/wrover.c +++ b/ports/esp32s2/modules/wrover.c @@ -28,11 +28,11 @@ void never_reset_module_internal_pins(void) { // SPI Flash and RAM - never_reset_pin(&pin_GPIO26); - never_reset_pin(&pin_GPIO27); - never_reset_pin(&pin_GPIO28); - never_reset_pin(&pin_GPIO29); - never_reset_pin(&pin_GPIO30); - never_reset_pin(&pin_GPIO31); - never_reset_pin(&pin_GPIO32); + common_hal_never_reset_pin(&pin_GPIO26); + common_hal_never_reset_pin(&pin_GPIO27); + common_hal_never_reset_pin(&pin_GPIO28); + common_hal_never_reset_pin(&pin_GPIO29); + common_hal_never_reset_pin(&pin_GPIO30); + common_hal_never_reset_pin(&pin_GPIO31); + common_hal_never_reset_pin(&pin_GPIO32); } diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk index c9df81db0..5686579b4 100644 --- a/ports/esp32s2/mpconfigport.mk +++ b/ports/esp32s2/mpconfigport.mk @@ -16,13 +16,13 @@ CIRCUITPY_FULL_BUILD = 0 CIRCUITPY_ANALOGIO = 0 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_AUDIOIO = 0 -CIRCUITPY_BITBANGIO = 0 +CIRCUITPY_BITBANGIO = 1 CIRCUITPY_BOARD = 1 CIRCUITPY_DIGITALIO = 1 -CIRCUITPY_BUSIO = 0 -CIRCUITPY_DISPLAYIO = 0 +CIRCUITPY_BUSIO = 1 +CIRCUITPY_DISPLAYIO = 1 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_MICROCONTROLLER = 1 CIRCUITPY_NVM = 0 CIRCUITPY_PULSEIO = 0 @@ -30,8 +30,8 @@ CIRCUITPY_ROTARYIO = 0 CIRCUITPY_RTC = 0 CIRCUITPY_TOUCHIO = 0 -# Enable USB support +# Enable USB HID support CIRCUITPY_USB_HID = 1 -CIRCUITPY_USB_MIDI = 1 +CIRCUITPY_USB_MIDI = 0 CIRCUITPY_MODULE ?= none diff --git a/ports/esp32s2/mphalport.c b/ports/esp32s2/mphalport.c index da5258b0e..e1662a6ce 100644 --- a/ports/esp32s2/mphalport.c +++ b/ports/esp32s2/mphalport.c @@ -32,9 +32,10 @@ #include "py/gc.h" #include "esp-idf/components/xtensa/include/esp_debug_helpers.h" +#include "esp-idf/components/esp_rom/include/esp32s2/rom/ets_sys.h" void mp_hal_delay_us(mp_uint_t delay) { - mp_hal_delay_ms(delay / 1000); + ets_delay_us(delay); } // This is provided by the esp-idf/components/xtensa/esp32s2/libhal.a binary diff --git a/ports/esp32s2/sdkconfig.defaults b/ports/esp32s2/sdkconfig.defaults index 958e1852e..729ebac88 100644 --- a/ports/esp32s2/sdkconfig.defaults +++ b/ports/esp32s2/sdkconfig.defaults @@ -190,9 +190,9 @@ CONFIG_EFUSE_MAX_BLK_LEN=256 # ESP32S2-specific # # CONFIG_ESP32S2_DEFAULT_CPU_FREQ_80 is not set -CONFIG_ESP32S2_DEFAULT_CPU_FREQ_160=y -# CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240 is not set -CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ=160 +# CONFIG_ESP32S2_DEFAULT_CPU_FREQ_160 is not set +CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240=y +CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ=240 # # Memory protection @@ -271,10 +271,7 @@ CONFIG_ESP_CONSOLE_UART_RX_GPIO=3 CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 CONFIG_ESP_INT_WDT=y CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 -CONFIG_ESP_TASK_WDT=y -# CONFIG_ESP_TASK_WDT_PANIC is not set -CONFIG_ESP_TASK_WDT_TIMEOUT_S=5 -CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y +# CONFIG_ESP_TASK_WDT is not set CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y # end of Common ESP-related @@ -528,6 +525,7 @@ CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096 +# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set # CONFIG_MBEDTLS_DEBUG is not set # @@ -547,8 +545,12 @@ CONFIG_MBEDTLS_AES_USE_INTERRUPT=y CONFIG_MBEDTLS_HARDWARE_GCM=y CONFIG_MBEDTLS_HARDWARE_MPI=y CONFIG_MBEDTLS_HARDWARE_SHA=y +# CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set +# CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set CONFIG_MBEDTLS_HAVE_TIME=y # CONFIG_MBEDTLS_HAVE_TIME_DATE is not set +CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y +CONFIG_MBEDTLS_SHA512_C=y CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y # CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set # CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set @@ -627,6 +629,10 @@ CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y CONFIG_MBEDTLS_ECP_NIST_OPTIM=y +# CONFIG_MBEDTLS_POLY1305_C is not set +# CONFIG_MBEDTLS_CHACHA20_C is not set +# CONFIG_MBEDTLS_HKDF_C is not set +# CONFIG_MBEDTLS_THREADING_C is not set # CONFIG_MBEDTLS_SECURITY_RISKS is not set # end of mbedTLS @@ -705,6 +711,7 @@ CONFIG_WPA_MBEDTLS_CRYPTO=y # CONFIG_WPA_DEBUG_PRINT is not set # CONFIG_WPA_TESTING_OPTIONS is not set # CONFIG_WPA_TLS_V12 is not set +# CONFIG_WPA_WPS_WARS is not set # end of Supplicant # end of Component config @@ -756,7 +763,7 @@ CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y CONFIG_ADC2_DISABLE_DAC=y CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 -CONFIG_MAIN_TASK_STACK_SIZE=3584 +CONFIG_MAIN_TASK_STACK_SIZE=8192 CONFIG_IPC_TASK_STACK_SIZE=1024 CONFIG_CONSOLE_UART_DEFAULT=y # CONFIG_CONSOLE_UART_CUSTOM is not set @@ -767,10 +774,7 @@ CONFIG_CONSOLE_UART_RX_GPIO=3 CONFIG_CONSOLE_UART_BAUDRATE=115200 CONFIG_INT_WDT=y CONFIG_INT_WDT_TIMEOUT_MS=300 -CONFIG_TASK_WDT=y -# CONFIG_TASK_WDT_PANIC is not set -CONFIG_TASK_WDT_TIMEOUT_S=5 -CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y +# CONFIG_TASK_WDT is not set # CONFIG_EVENT_LOOP_PROFILING is not set CONFIG_POST_EVENTS_FROM_ISR=y CONFIG_POST_EVENTS_FROM_IRAM_ISR=y diff --git a/ports/esp32s2/supervisor/internal_flash.c b/ports/esp32s2/supervisor/internal_flash.c index a8d3fa485..5cf77c801 100644 --- a/ports/esp32s2/supervisor/internal_flash.c +++ b/ports/esp32s2/supervisor/internal_flash.c @@ -39,11 +39,6 @@ #include "esp-idf/components/spi_flash/include/esp_partition.h" -#include "esp_log.h" - - -static const char* TAG = "CircuitPython Internal Flash"; - #include "supervisor/usb.h" STATIC const esp_partition_t * _partition; @@ -52,8 +47,6 @@ void supervisor_flash_init(void) { _partition = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_FAT, NULL); - - ESP_EARLY_LOGW(TAG, "fatfs partition %p", _partition); } uint32_t supervisor_flash_get_block_size(void) { @@ -74,11 +67,10 @@ STATIC uint8_t _cache[SECTOR_SIZE]; STATIC uint32_t _cache_lba; mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { - esp_err_t ok = esp_partition_read(_partition, - block * FILESYSTEM_BLOCK_SIZE, - dest, - num_blocks * FILESYSTEM_BLOCK_SIZE); - ESP_EARLY_LOGW(TAG, "read %d", ok); + esp_partition_read(_partition, + block * FILESYSTEM_BLOCK_SIZE, + dest, + num_blocks * FILESYSTEM_BLOCK_SIZE); return 0; } @@ -90,13 +82,11 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32 uint32_t sector_offset = block_address / blocks_per_sector * SECTOR_SIZE; uint8_t block_offset = block_address % blocks_per_sector; - esp_err_t result; if (_cache_lba != block_address) { - result = esp_partition_read(_partition, - sector_offset, - _cache, - SECTOR_SIZE); - ESP_EARLY_LOGW(TAG, "flash read before write %d", result); + esp_partition_read(_partition, + sector_offset, + _cache, + SECTOR_SIZE); _cache_lba = sector_offset; } for (uint8_t b = block_offset; b < blocks_per_sector; b++) { @@ -109,11 +99,11 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32 FILESYSTEM_BLOCK_SIZE); block++; } - result = esp_partition_erase_range(_partition, sector_offset, SECTOR_SIZE); - result = esp_partition_write(_partition, - sector_offset, - _cache, - SECTOR_SIZE); + esp_partition_erase_range(_partition, sector_offset, SECTOR_SIZE); + esp_partition_write(_partition, + sector_offset, + _cache, + SECTOR_SIZE); } return 0; // success diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c index 2437b4f34..a80550b30 100644 --- a/ports/esp32s2/supervisor/port.c +++ b/ports/esp32s2/supervisor/port.c @@ -35,13 +35,12 @@ #include "freertos/task.h" #include "common-hal/microcontroller/Pin.h" +#include "common-hal/busio/I2C.h" +#include "common-hal/busio/SPI.h" +#include "common-hal/busio/UART.h" #include "supervisor/memory.h" #include "supervisor/shared/tick.h" -#include "esp_log.h" - -static const char* TAG = "CircuitPython"; - STATIC esp_timer_handle_t _tick_timer; void tick_timer_cb(void* arg) { @@ -54,18 +53,22 @@ safe_mode_t port_init(void) { args.arg = NULL; args.dispatch_method = ESP_TIMER_TASK; args.name = "CircuitPython Tick"; - esp_err_t result = esp_timer_create(&args, &_tick_timer); - if (result != ESP_OK) { - ESP_EARLY_LOGE(TAG, "Unable to create tick timer."); - } + esp_timer_create(&args, &_tick_timer); never_reset_module_internal_pins(); - ESP_EARLY_LOGW(TAG, "port init done"); return NO_SAFE_MODE; } void reset_port(void) { - reset_all_pins(); + + // A larger delay so the idle task can run and do any IDF cleanup needed. + vTaskDelay(4); + +#if CIRCUITPY_BUSIO + i2c_reset(); + spi_reset(); + uart_reset(); +#endif } void reset_to_bootloader(void) { @@ -98,12 +101,8 @@ uint32_t *port_stack_get_top(void) { supervisor_allocation _fixed_stack; supervisor_allocation* port_fixed_stack(void) { - - ESP_EARLY_LOGW(TAG, "port fixed stack"); _fixed_stack.ptr = port_stack_get_limit(); - ESP_EARLY_LOGW(TAG, "got limit %p", _fixed_stack.ptr); _fixed_stack.length = (port_stack_get_top() - port_stack_get_limit()) * sizeof(uint32_t); - ESP_EARLY_LOGW(TAG, "got length %d", _fixed_stack.length); return &_fixed_stack; } @@ -128,10 +127,7 @@ uint64_t port_get_raw_ticks(uint8_t* subticks) { // Enable 1/1024 second tick. void port_enable_tick(void) { - esp_err_t result = esp_timer_start_periodic(_tick_timer, 1000000 / 1024); - if (result != ESP_OK) { - ESP_EARLY_LOGE(TAG, "Unable to start tick timer."); - } + esp_timer_start_periodic(_tick_timer, 1000000 / 1024); } // Disable 1/1024 second tick. @@ -142,14 +138,12 @@ void port_disable_tick(void) { TickType_t sleep_time_set; TickType_t sleep_time_duration; void port_interrupt_after_ticks(uint32_t ticks) { - // ESP_EARLY_LOGW(TAG, "after ticks"); sleep_time_set = xTaskGetTickCount(); sleep_time_duration = ticks / portTICK_PERIOD_MS; // esp_sleep_enable_timer_wakeup(uint64_t time_in_us) } void port_sleep_until_interrupt(void) { - // ESP_EARLY_LOGW(TAG, "sleep until"); // FreeRTOS delay here maybe. // Light sleep shuts down BLE and wifi. // esp_light_sleep_start() @@ -163,8 +157,5 @@ void port_sleep_until_interrupt(void) { // Wrap main in app_main that the IDF expects. extern void main(void); void app_main(void) { - ESP_EARLY_LOGW(TAG, "Hello from CircuitPython"); - // ESP_LOGW(TAG, "Hello from CircuitPython"); - main(); } diff --git a/ports/litex/boards/fomu/mpconfigboard.mk b/ports/litex/boards/fomu/mpconfigboard.mk index 4787803cc..c8de94e9c 100644 --- a/ports/litex/boards/fomu/mpconfigboard.mk +++ b/ports/litex/boards/fomu/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x1209 USB_PID = 0x5BF0 USB_PRODUCT = "Fomu" USB_MANUFACTURER = "Foosn" -USB_DEVICES = "CDC,MSC,AUDIO,HID" INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = MPZ diff --git a/ports/litex/common-hal/digitalio/DigitalInOut.c b/ports/litex/common-hal/digitalio/DigitalInOut.c index 26f79f16d..53df637c4 100644 --- a/ports/litex/common-hal/digitalio/DigitalInOut.c +++ b/ports/litex/common-hal/digitalio/DigitalInOut.c @@ -46,7 +46,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_construct( } bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t *self) { - return self->pin == mp_const_none; + return self->pin == NULL; } void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self) { @@ -55,7 +55,7 @@ void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self } // reset_pin_number(0, self->pin->number); - self->pin = mp_const_none; + self->pin = NULL; } void common_hal_digitalio_digitalinout_switch_to_input( diff --git a/ports/litex/mpconfigport.mk b/ports/litex/mpconfigport.mk index 004930ba7..427e9ea84 100644 --- a/ports/litex/mpconfigport.mk +++ b/ports/litex/mpconfigport.mk @@ -18,14 +18,15 @@ CIRCUITPY_AUDIOIO = 0 CIRCUITPY_BITBANGIO = 0 CIRCUITPY_BOARD = 0 CIRCUITPY_BUSIO = 0 +CIRCUITPY_COUNTIO = 0 CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_NVM = 0 CIRCUITPY_PULSEIO = 0 CIRCUITPY_ROTARYIO = 0 CIRCUITPY_RTC = 0 -CIRCUITPY_COUNTIO = 0 +CIRCUITPY_SDCARDIO = 0 # Enable USB support CIRCUITPY_USB_HID = 1 CIRCUITPY_USB_MIDI = 1 diff --git a/ports/mimxrt10xx/common-hal/busio/SPI.c b/ports/mimxrt10xx/common-hal/busio/SPI.c index c51aef4da..8fe1b799d 100644 --- a/ports/mimxrt10xx/common-hal/busio/SPI.c +++ b/ports/mimxrt10xx/common-hal/busio/SPI.c @@ -321,7 +321,7 @@ bool common_hal_busio_spi_read(busio_spi_obj_t *self, return (status == kStatus_Success); } -bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { +bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) { if (len == 0) { return true; } @@ -332,7 +332,7 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uin LPSPI_SetDummyData(self->spi, 0xFF); lpspi_transfer_t xfer = { 0 }; - xfer.txData = data_out; + xfer.txData = (uint8_t *)data_out; xfer.rxData = data_in; xfer.dataSize = len; diff --git a/ports/mimxrt10xx/common-hal/busio/UART.c b/ports/mimxrt10xx/common-hal/busio/UART.c index 5ef347e59..4ca2f8e49 100644 --- a/ports/mimxrt10xx/common-hal/busio/UART.c +++ b/ports/mimxrt10xx/common-hal/busio/UART.c @@ -85,7 +85,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, const mcu_pin_obj_t * rs485_dir, bool rs485_invert, - uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer, bool sigint_enabled) { @@ -94,7 +94,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, self->timeout_ms = timeout * 1000; // We are transmitting one direction if one pin is NULL and the other isn't. - bool is_onedirection = (rx != NULL) != (tx != NULL); + bool is_onedirection = (rx == NULL) != (tx == NULL); bool uart_taken = false; const uint32_t rx_count = MP_ARRAY_SIZE(mcu_uart_rx_list); diff --git a/ports/mimxrt10xx/mpconfigport.mk b/ports/mimxrt10xx/mpconfigport.mk index e9e554142..12f34343b 100644 --- a/ports/mimxrt10xx/mpconfigport.mk +++ b/ports/mimxrt10xx/mpconfigport.mk @@ -14,7 +14,6 @@ endif INTERNAL_LIBM = 1 -USB_DEVICES = "CDC,MSC,HID" USB_SERIAL_NUMBER_LENGTH = 32 USB_MSC_MAX_PACKET_SIZE = 512 @@ -23,8 +22,9 @@ INTERNAL_FLASH_FILESYSTEM = 1 CIRCUITPY_AUDIOIO = 0 CIRCUITPY_AUDIOBUSIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_NVM = 0 CIRCUITPY_ROTARYIO = 0 CIRCUITPY_COUNTIO = 0 +CIRCUITPY_USB_MIDI = 0 LONGINT_IMPL = MPZ diff --git a/ports/mimxrt10xx/supervisor/port.c b/ports/mimxrt10xx/supervisor/port.c index ed5824732..0b53a79f0 100644 --- a/ports/mimxrt10xx/supervisor/port.c +++ b/ports/mimxrt10xx/supervisor/port.c @@ -53,7 +53,9 @@ #if CIRCUITPY_GAMEPADSHIFT #include "shared-module/gamepadshift/__init__.h" #endif +#if CIRCUITPY_PEW #include "shared-module/_pew/PewPew.h" +#endif #include "supervisor/shared/tick.h" #include "clocks.h" diff --git a/ports/nrf/boards/bless_dev_board_multi_sensor/board.c b/ports/nrf/boards/bless_dev_board_multi_sensor/board.c new file mode 100644 index 000000000..71b9a0657 --- /dev/null +++ b/ports/nrf/boards/bless_dev_board_multi_sensor/board.c @@ -0,0 +1,12 @@ +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/bless_dev_board_multi_sensor/mpconfigboard.h b/ports/nrf/boards/bless_dev_board_multi_sensor/mpconfigboard.h new file mode 100644 index 000000000..7fffd86cc --- /dev/null +++ b/ports/nrf/boards/bless_dev_board_multi_sensor/mpconfigboard.h @@ -0,0 +1,17 @@ +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "BLE-SS dev board Multi Sensor" +#define MICROPY_HW_MCU_NAME "nRF52840" +#define MICROPY_HW_LED_STATUS (&pin_P0_07) + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_26) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_24) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_13) /* n.c */ +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_14) /* n.c */ +#define DEFAULT_SPI_BUS_MISO (&pin_P0_15) /* n.c */ + +#define DEFAULT_UART_BUS_RX (&pin_P0_02) /* TP7 */ +#define DEFAULT_UART_BUS_TX (&pin_P0_03) /* TP6 */ + +/* Note: Flash chip is not provided. */ diff --git a/ports/nrf/boards/bless_dev_board_multi_sensor/mpconfigboard.mk b/ports/nrf/boards/bless_dev_board_multi_sensor/mpconfigboard.mk new file mode 100644 index 000000000..90b090850 --- /dev/null +++ b/ports/nrf/boards/bless_dev_board_multi_sensor/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x2786 +USB_PID = 0x9207 +USB_PRODUCT = "BLE-SS dev board Multi Sensor" +USB_MANUFACTURER = "Switch Science, Inc." + +MCU_CHIP = nrf52840 + +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/boards/bless_dev_board_multi_sensor/pins.c b/ports/nrf/boards/bless_dev_board_multi_sensor/pins.c new file mode 100644 index 000000000..c6010a8c3 --- /dev/null +++ b/ports/nrf/boards/bless_dev_board_multi_sensor/pins.c @@ -0,0 +1,45 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P0_02) }, // TP7 + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P0_03) }, // TP6 + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P0_04) }, // LED1 + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P0_05) }, // U2-BMX055-INT1 + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P0_06) }, // U2-BMX055-DRDYM + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P0_07) }, // LED2 + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P0_08) }, // U4-HDC2010-DRDY/INT + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_09) }, // TP1 + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_10) }, // U3-LPS22HB-INT_DRDY + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_12) }, // S2 + { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_P0_23) }, // BZ1 + { MP_ROM_QSTR(MP_QSTR_D28), MP_ROM_PTR(&pin_P0_28) }, // U2-BMX055-INT4 + { MP_ROM_QSTR(MP_QSTR_D29), MP_ROM_PTR(&pin_P0_29) }, // U2-BMX055-INT3 + { MP_ROM_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_P0_30) }, // U2-BMX055-INT5 + { MP_ROM_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_P0_31) }, // S1 + + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_02) }, // A0/TP7 + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_03) }, // A1/TP6 + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_24) }, // 24 - SDA + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_26) }, // 26 - SCL + + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_13) }, // 13 - MISO (n.c) + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_14) }, // 14 - MOSI (n.c) + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_15) }, // 15 - SCK (n.c) + + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_07) }, // 4 - LED1 + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_P0_04) }, // 7 - LED2 + + { MP_ROM_QSTR(MP_QSTR_BUTTON1), MP_ROM_PTR(&pin_P0_31) }, // 31 - S1 + { MP_ROM_QSTR(MP_QSTR_BUTTON2), MP_ROM_PTR(&pin_P0_12) }, // 12 - S2 + + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_02) }, // 2 - UART RX + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_03) }, // 3 - UART TX + + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_QWIIC), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/pca10100/mpconfigboard.mk b/ports/nrf/boards/pca10100/mpconfigboard.mk index 715b65e63..318bc0206 100644 --- a/ports/nrf/boards/pca10100/mpconfigboard.mk +++ b/ports/nrf/boards/pca10100/mpconfigboard.mk @@ -14,13 +14,14 @@ CIRCUITPY_COUNTIO = 0 CIRCUITPY_DISPLAYIO = 0 CIRCUITPY_FRAMEBUFFERIO = 0 CIRCUITPY_FREQUENCYIO = 0 -CIRCUITPY_I2CSLAVE = 0 +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_NEOPIXEL_WRITE = 0 CIRCUITPY_NVM = 0 CIRCUITPY_PIXELBUF = 0 CIRCUITPY_RGBMATRIX = 0 CIRCUITPY_ROTARYIO = 0 CIRCUITPY_RTC = 1 +CIRCUITPY_SDCARDIO = 0 CIRCUITPY_TOUCHIO = 0 CIRCUITPY_ULAB = 0 diff --git a/ports/nrf/boards/raytac_mdbt50q-db-40/board.c b/ports/nrf/boards/raytac_mdbt50q-db-40/board.c new file mode 100644 index 000000000..4421970ee --- /dev/null +++ b/ports/nrf/boards/raytac_mdbt50q-db-40/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "boards/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/raytac_mdbt50q-db-40/bootloader/6.0.0/pca10056_bootloader_6.0.0_s140.zip b/ports/nrf/boards/raytac_mdbt50q-db-40/bootloader/6.0.0/pca10056_bootloader_6.0.0_s140.zip Binary files differnew file mode 100644 index 000000000..691f4a1ab --- /dev/null +++ b/ports/nrf/boards/raytac_mdbt50q-db-40/bootloader/6.0.0/pca10056_bootloader_6.0.0_s140.zip diff --git a/ports/nrf/boards/raytac_mdbt50q-db-40/mpconfigboard.h b/ports/nrf/boards/raytac_mdbt50q-db-40/mpconfigboard.h new file mode 100644 index 000000000..93fdce3a0 --- /dev/null +++ b/ports/nrf/boards/raytac_mdbt50q-db-40/mpconfigboard.h @@ -0,0 +1,30 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#define MICROPY_HW_BOARD_NAME "MDBT50Q-DB-40" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define MICROPY_HW_LED_STATUS (&pin_P0_13) diff --git a/ports/nrf/boards/raytac_mdbt50q-db-40/mpconfigboard.mk b/ports/nrf/boards/raytac_mdbt50q-db-40/mpconfigboard.mk new file mode 100644 index 000000000..f49618e77 --- /dev/null +++ b/ports/nrf/boards/raytac_mdbt50q-db-40/mpconfigboard.mk @@ -0,0 +1,8 @@ +USB_VID = 0x239A +USB_PID = 0x80BC +USB_PRODUCT = "MDBT50Q-DB-40" +USB_MANUFACTURER = "Raytac Corporation" + +MCU_CHIP = nrf52840 + +INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/nrf/boards/raytac_mdbt50q-db-40/pins.c b/ports/nrf/boards/raytac_mdbt50q-db-40/pins.c new file mode 100644 index 000000000..426498cc2 --- /dev/null +++ b/ports/nrf/boards/raytac_mdbt50q-db-40/pins.c @@ -0,0 +1,80 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) }, + { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) }, + + { MP_ROM_QSTR(MP_QSTR_AIN_0), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_AIN_1), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_AIN_2), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_AIN_3), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_AIN_4), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_AIN_5), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_AIN_6), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_AIN_7), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_NFC_1), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_NFC_2), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_PTR(&pin_P0_05) }, + + { MP_ROM_QSTR(MP_QSTR_LED_R), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_LED_G), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_LED_B), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_LED_4), MP_ROM_PTR(&pin_P0_16) }, + + { MP_ROM_QSTR(MP_QSTR_SW1), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_SW2), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_SW3), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_SW4), MP_ROM_PTR(&pin_P0_25) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/common-hal/busio/SPI.c b/ports/nrf/common-hal/busio/SPI.c index 3f205e778..f27f0e267 100644 --- a/ports/nrf/common-hal/busio/SPI.c +++ b/ports/nrf/common-hal/busio/SPI.c @@ -271,13 +271,13 @@ bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, return true; } -bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len) { +bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) { const bool is_spim3 = self->spim_peripheral->spim.p_reg == NRF_SPIM3; - uint8_t *next_chunk_out = data_out; + const uint8_t *next_chunk_out = data_out; uint8_t *next_chunk_in = data_in; while (len > 0) { - uint8_t *chunk_out = next_chunk_out; + const uint8_t *chunk_out = next_chunk_out; size_t chunk_size = MIN(len, self->spim_peripheral->max_xfer_size); if (is_spim3) { // If SPIM3, copy into unused RAM block, and do DMA from there. diff --git a/ports/nrf/common-hal/busio/UART.c b/ports/nrf/common-hal/busio/UART.c index 89f3c9f32..012ebc3b5 100644 --- a/ports/nrf/common-hal/busio/UART.c +++ b/ports/nrf/common-hal/busio/UART.c @@ -133,7 +133,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, const mcu_pin_obj_t * rs485_dir, bool rs485_invert, - uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer, bool sigint_enabled) { @@ -162,7 +162,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, mp_raise_ValueError(translate("Invalid buffer size")); } - if ( parity == PARITY_ODD ) { + if ( parity == BUSIO_UART_PARITY_ODD ) { mp_raise_ValueError(translate("Odd parity is not supported")); } @@ -176,7 +176,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, .interrupt_priority = 7, .hal_cfg = { .hwfc = NRF_UARTE_HWFC_DISABLED, - .parity = (parity == PARITY_NONE) ? NRF_UARTE_PARITY_EXCLUDED : NRF_UARTE_PARITY_INCLUDED + .parity = (parity == BUSIO_UART_PARITY_NONE) ? NRF_UARTE_PARITY_EXCLUDED : NRF_UARTE_PARITY_INCLUDED } }; diff --git a/ports/nrf/mpconfigport.mk b/ports/nrf/mpconfigport.mk index dda9b2436..ed689545d 100644 --- a/ports/nrf/mpconfigport.mk +++ b/ports/nrf/mpconfigport.mk @@ -25,8 +25,8 @@ CIRCUITPY_AUDIOPWMIO ?= 1 CIRCUITPY_BLEIO ?= 1 -# No I2CSlave implementation -CIRCUITPY_I2CSLAVE = 0 +# No I2CPeripheral implementation +CIRCUITPY_I2CPERIPHERAL = 0 CIRCUITPY_RTC ?= 1 diff --git a/ports/stm/Makefile b/ports/stm/Makefile index a7b519ffc..a982de765 100755 --- a/ports/stm/Makefile +++ b/ports/stm/Makefile @@ -81,12 +81,12 @@ INC += -I../../supervisor/shared/usb #Debugging/Optimization ifeq ($(DEBUG), 1) - CFLAGS += -ggdb + CFLAGS += -ggdb3 # You may want to enable these flags to make setting breakpoints easier. CFLAGS += -fno-inline -fno-ipa-sra else CFLAGS += -Os -DNDEBUG - CFLAGS += -ggdb + CFLAGS += -ggdb3 # TODO: Test with -flto # CFLAGS += -flto endif @@ -154,43 +154,43 @@ CFLAGS += \ -DCFG_TUD_MIDI_TX_BUFSIZE=128 SRC_STM32 = $(addprefix $(HAL_DIR)/Src/stm32$(MCU_SERIES_LOWER)xx_,\ + hal.c \ hal_adc.c \ hal_adc_ex.c \ + hal_cortex.c \ hal_dac.c \ hal_dac_ex.c \ + hal_dma.c \ + hal_dma_ex.c \ + hal_exti.c \ + hal_flash.c \ + hal_flash_ex.c \ + hal_gpio.c \ hal_i2c.c \ hal_i2c_ex.c \ + hal_pwr.c \ + hal_pwr_ex.c \ hal_qspi.c \ + hal_rcc.c \ + hal_rcc_ex.c \ hal_rng.c \ hal_rtc.c \ hal_rtc_ex.c \ + hal_sd.c \ hal_spi.c \ hal_tim.c \ hal_tim_ex.c \ hal_uart.c \ hal_usart.c \ - hal_rcc.c \ - hal_rcc_ex.c \ - hal_flash.c \ - hal_flash_ex.c \ - hal_gpio.c \ - hal_dma_ex.c \ - hal_dma.c \ - hal_pwr.c \ - hal_pwr_ex.c \ - hal_cortex.c \ - hal.c \ - hal_exti.c \ - hal_sd.c \ - ll_gpio.c \ ll_adc.c \ - ll_i2c.c \ ll_dma.c \ + ll_exti.c \ + ll_gpio.c \ + ll_i2c.c \ + ll_rcc.c \ ll_sdmmc.c \ ll_usart.c \ - ll_rcc.c \ ll_utils.c \ - ll_exti.c \ ) # Need this to avoid UART linker problems. TODO: rewrite to use registered callbacks. diff --git a/ports/stm/boards/STM32F411_nvm.ld b/ports/stm/boards/STM32F411_nvm.ld index 5ac3e52a6..b2134b259 100644 --- a/ports/stm/boards/STM32F411_nvm.ld +++ b/ports/stm/boards/STM32F411_nvm.ld @@ -6,10 +6,10 @@ MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */ - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ - FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 32K /* sectors 1,2 are 16K */ - FLASH_NVM (rwx) : ORIGIN = 0x0800C000, LENGTH = 16K /* sector 3 is 16K */ - FLASH_FIRMWARE (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */ + FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */ + FLASH_NVM (rwx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4 is 64K */ + FLASH_FIRMWARE (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5,6,7 are 128K */ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K } diff --git a/ports/stm/boards/STM32F746xG_fs.ld b/ports/stm/boards/STM32F746xG_fs.ld index 6c9ea4de3..7419c43d2 100644 --- a/ports/stm/boards/STM32F746xG_fs.ld +++ b/ports/stm/boards/STM32F746xG_fs.ld @@ -26,6 +26,11 @@ * THE SOFTWARE. */ + /* Entry Point */ +ENTRY(Reset_Handler) + +_ld_default_stack_size = 24K; + /* Specify the memory areas */ MEMORY { @@ -33,7 +38,8 @@ MEMORY FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0 */ FLASH_FS (rx) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1,2,3 are 32K */ FLASH_FIRMWARE (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sector 4 is 128K, sectors 5,6,7 are 256K */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 320K + DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K + RAM (xrw) : ORIGIN = 0x20010000, LENGTH = 256K /* AXI SRAM */ ITCM (xrw) : ORIGIN = 0x00000000, LENGTH = 16K } @@ -44,7 +50,7 @@ _minimum_heap_size = 16K; /* Define tho top end of the stack. The stack is full descending so begins just above last byte of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); +_estack = ORIGIN(DTCM) + LENGTH(DTCM); /* RAM extents for the garbage collector */ _ram_start = ORIGIN(RAM); diff --git a/ports/stm/boards/STM32F767_fs.ld b/ports/stm/boards/STM32F767_fs.ld index 2feb42225..2ab73e907 100644 --- a/ports/stm/boards/STM32F767_fs.ld +++ b/ports/stm/boards/STM32F767_fs.ld @@ -2,6 +2,11 @@ GNU linker script for STM32F767 with filesystem */ +/* Entry Point */ +ENTRY(Reset_Handler) + +_ld_default_stack_size = 24K; + /* Specify the memory areas */ MEMORY { @@ -9,7 +14,9 @@ MEMORY FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0 */ FLASH_FS (rx) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1,2,3 are 32K */ FLASH_FIRMWARE (rx) : ORIGIN = 0x08020000, LENGTH = 1920K /* sector 4 is 128K, sectors 5,6,7 are 256K */ - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K + DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + RAM (xrw) : ORIGIN = 0x20020000, LENGTH = 384K /* AXI SRAM */ + ITCM (xrw) : ORIGIN = 0x00000000, LENGTH = 16K } /* produce a link error if there is not this amount of RAM for these sections */ @@ -19,7 +26,7 @@ _minimum_heap_size = 16K; /* Define tho top end of the stack. The stack is full descending so begins just above last byte of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */ -_estack = ORIGIN(RAM) + LENGTH(RAM); +_estack = ORIGIN(DTCM) + LENGTH(DTCM); /* RAM extents for the garbage collector */ _ram_start = ORIGIN(RAM); diff --git a/ports/stm/boards/espruino_pico/mpconfigboard.mk b/ports/stm/boards/espruino_pico/mpconfigboard.mk index 054937c33..201237c9d 100644 --- a/ports/stm/boards/espruino_pico/mpconfigboard.mk +++ b/ports/stm/boards/espruino_pico/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x808E USB_PRODUCT = "Espruino Pico" USB_MANUFACTURER = "Espruino" -USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/stm/boards/espruino_wifi/mpconfigboard.mk b/ports/stm/boards/espruino_wifi/mpconfigboard.mk index ee82095ff..9500a5f18 100644 --- a/ports/stm/boards/espruino_wifi/mpconfigboard.mk +++ b/ports/stm/boards/espruino_wifi/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x8090 USB_PRODUCT = "Espruino Wifi" USB_MANUFACTURER = "Espruino" -USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk index d98bd29ec..2b2c0d6db 100644 --- a/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk +++ b/ports/stm/boards/feather_stm32f405_express/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x805A USB_PRODUCT = "Feather STM32F405 Express" USB_MANUFACTURER = "Adafruit Industries LLC" -USB_DEVICES = "CDC,MSC" SPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 diff --git a/ports/stm/boards/meowbit_v121/mpconfigboard.mk b/ports/stm/boards/meowbit_v121/mpconfigboard.mk index cf60c89c2..127cdb60e 100644 --- a/ports/stm/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm/boards/meowbit_v121/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x805A USB_PRODUCT = "Meowbit" USB_MANUFACTURER = "Kittenbot" -USB_DEVICES = "CDC,MSC" SPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 diff --git a/ports/stm/boards/nucleo_f746zg/mpconfigboard.h b/ports/stm/boards/nucleo_f746zg/mpconfigboard.h index c1f0d59b2..e2b54335a 100644 --- a/ports/stm/boards/nucleo_f746zg/mpconfigboard.h +++ b/ports/stm/boards/nucleo_f746zg/mpconfigboard.h @@ -33,6 +33,14 @@ #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (0x4000) +// H7 and F7 MPU definitions +#define CPY_FLASH_REGION_SIZE ARM_MPU_REGION_SIZE_1MB +#define CPY_ITCM_REGION_SIZE ARM_MPU_REGION_SIZE_16KB +#define CPY_DTCM_REGION_SIZE ARM_MPU_REGION_SIZE_128KB +#define CPY_SRAM_REGION_SIZE ARM_MPU_REGION_SIZE_256KB +#define CPY_SRAM_SUBMASK 0x00 +#define CPY_SRAM_START_ADDR 0x20010000 + #define HSE_VALUE ((uint32_t)8000000) #define LSE_VALUE ((uint32_t)32768) #define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal diff --git a/ports/stm/boards/nucleo_f746zg/mpconfigboard.mk b/ports/stm/boards/nucleo_f746zg/mpconfigboard.mk index f23f642e7..1c8edecc3 100644 --- a/ports/stm/boards/nucleo_f746zg/mpconfigboard.mk +++ b/ports/stm/boards/nucleo_f746zg/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x809E USB_PRODUCT = "Nucleo F746zg - CPy" USB_MANUFACTURER = "STMicroelectronics" -USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 @@ -10,5 +9,5 @@ MCU_SERIES = F7 MCU_VARIANT = STM32F746xx MCU_PACKAGE = LQFP144 -LD_COMMON = boards/common_default.ld +LD_COMMON = boards/common_tcm.ld LD_FILE = boards/STM32F746xG_fs.ld diff --git a/ports/stm/boards/nucleo_f767zi/mpconfigboard.h b/ports/stm/boards/nucleo_f767zi/mpconfigboard.h index 21e0ef0ba..327651923 100644 --- a/ports/stm/boards/nucleo_f767zi/mpconfigboard.h +++ b/ports/stm/boards/nucleo_f767zi/mpconfigboard.h @@ -32,6 +32,14 @@ #define FLASH_SIZE (0x200000) #define FLASH_PAGE_SIZE (0x4000) +// H7 and F7 MPU definitions +#define CPY_FLASH_REGION_SIZE ARM_MPU_REGION_SIZE_2MB +#define CPY_ITCM_REGION_SIZE ARM_MPU_REGION_SIZE_16KB +#define CPY_DTCM_REGION_SIZE ARM_MPU_REGION_SIZE_128KB +#define CPY_SRAM_REGION_SIZE ARM_MPU_REGION_SIZE_512KB +#define CPY_SRAM_SUBMASK 0xFC // Mask 512 to 384 +#define CPY_SRAM_START_ADDR 0x20020000 + #define HSE_VALUE ((uint32_t)8000000) #define LSE_VALUE ((uint32_t)32768) #define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal diff --git a/ports/stm/boards/nucleo_f767zi/mpconfigboard.mk b/ports/stm/boards/nucleo_f767zi/mpconfigboard.mk index 4e5e1bc7c..0c712a0f4 100644 --- a/ports/stm/boards/nucleo_f767zi/mpconfigboard.mk +++ b/ports/stm/boards/nucleo_f767zi/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x809A USB_PRODUCT = "Nucleo F767ZI - CPy" USB_MANUFACTURER = "STMicroelectronics" -USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 @@ -10,5 +9,5 @@ MCU_SERIES = F7 MCU_VARIANT = STM32F767xx MCU_PACKAGE = LQFP144 -LD_COMMON = boards/common_default.ld +LD_COMMON = boards/common_tcm.ld LD_FILE = boards/STM32F767_fs.ld diff --git a/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.h b/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.h index 1ae7f81a4..2ac986701 100644 --- a/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.h +++ b/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.h @@ -31,6 +31,14 @@ #define FLASH_PAGE_SIZE (0x4000) +// H7 and F7 MPU definitions +#define CPY_FLASH_REGION_SIZE ARM_MPU_REGION_SIZE_2MB +#define CPY_ITCM_REGION_SIZE ARM_MPU_REGION_SIZE_64KB +#define CPY_DTCM_REGION_SIZE ARM_MPU_REGION_SIZE_128KB +#define CPY_SRAM_REGION_SIZE ARM_MPU_REGION_SIZE_512KB +#define CPY_SRAM_SUBMASK 0x00 +#define CPY_SRAM_START_ADDR 0x24000000 + #define HSE_VALUE ((uint32_t)8000000) #define LSE_VALUE ((uint32_t)32768) #define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal diff --git a/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk b/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk index ea99a1e10..35f47e193 100644 --- a/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk +++ b/ports/stm/boards/nucleo_h743zi_2/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x8098 USB_PRODUCT = "Nucleo H743ZI - CPy" USB_MANUFACTURER = "STMicroelectronics" -USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/stm/boards/openmv_h7/mpconfigboard.h b/ports/stm/boards/openmv_h7/mpconfigboard.h index cf9d6e7d1..77ae235ec 100644 --- a/ports/stm/boards/openmv_h7/mpconfigboard.h +++ b/ports/stm/boards/openmv_h7/mpconfigboard.h @@ -31,5 +31,13 @@ #define FLASH_PAGE_SIZE (0x4000) +// H7 and F7 MPU definitions +#define CPY_FLASH_REGION_SIZE ARM_MPU_REGION_SIZE_2MB +#define CPY_ITCM_REGION_SIZE ARM_MPU_REGION_SIZE_64KB +#define CPY_DTCM_REGION_SIZE ARM_MPU_REGION_SIZE_128KB +#define CPY_SRAM_REGION_SIZE ARM_MPU_REGION_SIZE_512KB +#define CPY_SRAM_SUBMASK 0x00 +#define CPY_SRAM_START_ADDR 0x24000000 + #define HSE_VALUE ((uint32_t)12000000) #define BOARD_HAS_LOW_SPEED_CRYSTAL (0) diff --git a/ports/stm/boards/openmv_h7/mpconfigboard.mk b/ports/stm/boards/openmv_h7/mpconfigboard.mk index 4ff0f18d5..a837dc9ec 100644 --- a/ports/stm/boards/openmv_h7/mpconfigboard.mk +++ b/ports/stm/boards/openmv_h7/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x80A4 USB_PRODUCT = "OpenMV-H7 R1" USB_MANUFACTURER = "OpenMV, LLC" -USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk b/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk index 08a266816..237dba921 100644 --- a/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk +++ b/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x8068 USB_PRODUCT = "PYB LR Nano V2" USB_MANUFACTURER = "MicroPython Chinese Community" -USB_DEVICES = "CDC,MSC" SPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 diff --git a/ports/stm/boards/pyboard_v11/mpconfigboard.mk b/ports/stm/boards/pyboard_v11/mpconfigboard.mk index c0c0f5f6c..78b96e55f 100644 --- a/ports/stm/boards/pyboard_v11/mpconfigboard.mk +++ b/ports/stm/boards/pyboard_v11/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x805C USB_PRODUCT = "Pyboard Version 1.1" USB_MANUFACTURER = "George Robotic" -USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk b/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk index 0054232e1..9b45a0fac 100644 --- a/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk +++ b/ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x806A USB_PRODUCT = "stm32f411ce blackpill" USB_MANUFACTURER = "Unknown" -USB_DEVICES = "CDC,MSC" # SPI_FLASH_FILESYSTEM = 1 # EXTERNAL_FLASH_DEVICE_COUNT = 1 diff --git a/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk index ca2f10ba3..3cb7162a4 100644 --- a/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk +++ b/ports/stm/boards/stm32f411ve_discovery/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x805E USB_PRODUCT = "STM32F411VE Discovery Board - CPy" USB_MANUFACTURER = "STMicroelectronics" -USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk index 04d2a9b0d..c99eb1a00 100644 --- a/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk +++ b/ports/stm/boards/stm32f412zg_discovery/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x8056 USB_PRODUCT = "STM32F412ZG Discovery Board - CPy" USB_MANUFACTURER = "STMicroelectronics" -USB_DEVICES = "CDC,MSC,HID" INTERNAL_FLASH_FILESYSTEM = 1 @@ -17,3 +16,5 @@ MCU_PACKAGE = LQFP144 LD_COMMON = boards/common_default.ld LD_FILE = boards/STM32F412_fs.ld + +CIRCUITPY_USB_HID = 1 diff --git a/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk index 09652d9ad..7eece5896 100644 --- a/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk +++ b/ports/stm/boards/stm32f4_discovery/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x808A USB_PRODUCT = "STM32F407VG Discovery Board - CPy" USB_MANUFACTURER = "STMicroelectronics" -USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 diff --git a/ports/stm/boards/stm32f746g_discovery/mpconfigboard.h b/ports/stm/boards/stm32f746g_discovery/mpconfigboard.h index 1fa69182a..769990a98 100644 --- a/ports/stm/boards/stm32f746g_discovery/mpconfigboard.h +++ b/ports/stm/boards/stm32f746g_discovery/mpconfigboard.h @@ -34,6 +34,14 @@ #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (0x4000) +// H7 and F7 MPU definitions +#define CPY_FLASH_REGION_SIZE ARM_MPU_REGION_SIZE_1MB +#define CPY_ITCM_REGION_SIZE ARM_MPU_REGION_SIZE_16KB +#define CPY_DTCM_REGION_SIZE ARM_MPU_REGION_SIZE_128KB +#define CPY_SRAM_REGION_SIZE ARM_MPU_REGION_SIZE_256KB +#define CPY_SRAM_SUBMASK 0x00 +#define CPY_SRAM_START_ADDR 0x20010000 + // Lower frequency to allow external RAM use #define HSE_VALUE ((uint32_t)25000000) #define LSE_VALUE ((uint32_t)32768) diff --git a/ports/stm/boards/stm32f746g_discovery/mpconfigboard.mk b/ports/stm/boards/stm32f746g_discovery/mpconfigboard.mk index ff8456df6..c1c754ab5 100644 --- a/ports/stm/boards/stm32f746g_discovery/mpconfigboard.mk +++ b/ports/stm/boards/stm32f746g_discovery/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x809C USB_PRODUCT = "ST STM32F746G Discovery - CPy" USB_MANUFACTURER = "STMicroelectronics" -USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 @@ -10,5 +9,5 @@ MCU_SERIES = F7 MCU_VARIANT = STM32F746xx MCU_PACKAGE = TFBGA216 -LD_COMMON = boards/common_default.ld +LD_COMMON = boards/common_tcm.ld LD_FILE = boards/STM32F746xG_fs.ld diff --git a/ports/stm/boards/thunderpack/mpconfigboard.h b/ports/stm/boards/thunderpack/mpconfigboard.h index 394fbfd84..c2649e255 100644 --- a/ports/stm/boards/thunderpack/mpconfigboard.h +++ b/ports/stm/boards/thunderpack/mpconfigboard.h @@ -28,16 +28,16 @@ // Non-volatile memory config #define CIRCUITPY_INTERNAL_NVM_SIZE (0x4000) -#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x0800C000) -#define CIRCUITPY_INTERNAL_NVM_SECTOR FLASH_SECTOR_3 +#define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x08010000) +#define CIRCUITPY_INTERNAL_NVM_SECTOR FLASH_SECTOR_4 // Putting the entire flash sector in the NVM byte array buffer // would take up too much RAM. This limits how much of the sector we use. -#define NVM_BYTEARRAY_BUFFER_SIZE 512 +#define NVM_BYTEARRAY_BUFFER_SIZE 512 // Flash config -#define FLASH_SIZE (0x80000) -#define FLASH_PAGE_SIZE (0x4000) +#define FLASH_SIZE (0x80000) +#define FLASH_PAGE_SIZE (0x4000) #define BOARD_FLASH_SIZE (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE- 0x2000 - 0xC000) #define HSE_VALUE ((uint32_t)24000000U) @@ -47,7 +47,7 @@ #define BOARD_HAS_LOW_SPEED_CRYSTAL (0) // Status LEDs -#define MICROPY_HW_LED_STATUS (&pin_PA02) +#define MICROPY_HW_LED_STATUS (&pin_PA02) -#define DEFAULT_I2C_BUS_SCL (&pin_PB06) -#define DEFAULT_I2C_BUS_SDA (&pin_PB07) +#define DEFAULT_I2C_BUS_SCL (&pin_PB06) +#define DEFAULT_I2C_BUS_SDA (&pin_PB07) diff --git a/ports/stm/boards/thunderpack/mpconfigboard.mk b/ports/stm/boards/thunderpack/mpconfigboard.mk index 007b00cdd..afd0ffd75 100644 --- a/ports/stm/boards/thunderpack/mpconfigboard.mk +++ b/ports/stm/boards/thunderpack/mpconfigboard.mk @@ -2,7 +2,6 @@ USB_VID = 0x239A USB_PID = 0x806A USB_PRODUCT = "Thunderpack STM32F411" USB_MANUFACTURER = "Jeremy Gillick" -USB_DEVICES = "CDC,MSC" INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE diff --git a/ports/stm/common-hal/busio/I2C.c b/ports/stm/common-hal/busio/I2C.c index 48c4c1933..6adcf5575 100644 --- a/ports/stm/common-hal/busio/I2C.c +++ b/ports/stm/common-hal/busio/I2C.c @@ -34,6 +34,24 @@ #include "supervisor/shared/translate.h" #include "common-hal/microcontroller/Pin.h" +// I2C timing specs for the H7 and F7 +// Configured for maximum possible clock settings for the family +#if (CPY_STM32F7) +#ifndef CPY_I2CFAST_TIMINGR +#define CPY_I2CFAST_TIMINGR 0x6000030D +#endif +#ifndef CPY_I2CSTANDARD_TIMINGR +#define CPY_I2CSTANDARD_TIMINGR 0x20404768 +#endif +#elif (CPY_STM32H7) +#ifndef CPY_I2CFAST_TIMINGR +#define CPY_I2CFAST_TIMINGR 0x00B03FDB +#endif +#ifndef CPY_I2CSTANDARD_TIMINGR +#define CPY_I2CSTANDARD_TIMINGR 0x307075B1 +#endif +#endif + // Arrays use 0 based numbering: I2C1 is stored at index 0 #define MAX_I2C 4 @@ -120,7 +138,13 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, // Handle the HAL handle differences #if (CPY_STM32H7 || CPY_STM32F7) - self->handle.Init.Timing = 0x40604E73; //Taken from STCube examples + if (frequency == 400000) { + self->handle.Init.Timing = CPY_I2CFAST_TIMINGR; + } else if (frequency == 100000) { + self->handle.Init.Timing = CPY_I2CSTANDARD_TIMINGR; + } else { + mp_raise_ValueError(translate("Unsupported baudrate")); + } #else self->handle.Init.ClockSpeed = frequency; self->handle.Init.DutyCycle = I2C_DUTYCYCLE_2; diff --git a/ports/stm/common-hal/busio/SPI.c b/ports/stm/common-hal/busio/SPI.c index 65eeb8ebc..d4dd6cb3f 100644 --- a/ports/stm/common-hal/busio/SPI.c +++ b/ports/stm/common-hal/busio/SPI.c @@ -107,104 +107,78 @@ void spi_reset(void) { spi_clock_disable(ALL_CLOCKS & ~(never_reset_mask)); } -void common_hal_busio_spi_construct(busio_spi_obj_t *self, +STATIC const mcu_periph_obj_t *find_pin_function(const mcu_periph_obj_t *table, size_t sz, const mcu_pin_obj_t *pin, int periph_index) { + for(size_t i = 0; i<sz; i++, table++) { + if(periph_index == table->periph_index && pin == table->pin ) { + return table; + } + } + return NULL; +} + +//match pins to SPI objects +STATIC int check_pins(busio_spi_obj_t *self, const mcu_pin_obj_t * sck, const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) { - - //match pins to SPI objects - SPI_TypeDef * SPIx; + bool spi_taken = false; uint8_t sck_len = MP_ARRAY_SIZE(mcu_spi_sck_list); uint8_t mosi_len = MP_ARRAY_SIZE(mcu_spi_mosi_list); uint8_t miso_len = MP_ARRAY_SIZE(mcu_spi_miso_list); - bool spi_taken = false; //SCK is not optional. MOSI and MISO are + if (!sck) { + mp_raise_ValueError(translate("Must provide SCK pin")); + } + + if (!miso && !mosi) { + mp_raise_ValueError(translate("Must provide MISO or MOSI pin")); + } + + // Loop over each possibility for SCK. Check whether MISO and/or MOSI can be used on the same peripheral for (uint i = 0; i < sck_len; i++) { - if (mcu_spi_sck_list[i].pin == sck) { - //if both MOSI and MISO exist, loop search normally - if ((mosi != NULL) && (miso != NULL)) { - //MOSI - for (uint j = 0; j < mosi_len; j++) { - if (mcu_spi_mosi_list[j].pin == mosi) { - //MISO - for (uint k = 0; k < miso_len; k++) { - if ((mcu_spi_miso_list[k].pin == miso) //everything needs the same index - && (mcu_spi_sck_list[i].periph_index == mcu_spi_mosi_list[j].periph_index) - && (mcu_spi_sck_list[i].periph_index == mcu_spi_miso_list[k].periph_index)) { - //keep looking if the SPI is taken, edge case - if (reserved_spi[mcu_spi_sck_list[i].periph_index - 1]) { - spi_taken = true; - continue; - } - //store pins if not - self->sck = &mcu_spi_sck_list[i]; - self->mosi = &mcu_spi_mosi_list[j]; - self->miso = &mcu_spi_miso_list[k]; - break; - } - } - if (self->sck != NULL) { - break; // Multi-level break to pick lowest peripheral - } - } - } - if (self->sck != NULL) { - break; - } - // if just MISO, reduce search - } else if (miso != NULL) { - for (uint j = 0; j < miso_len; j++) { - if ((mcu_spi_miso_list[j].pin == miso) //only SCK and MISO need the same index - && (mcu_spi_sck_list[i].periph_index == mcu_spi_miso_list[j].periph_index)) { - if (reserved_spi[mcu_spi_sck_list[i].periph_index - 1]) { - spi_taken = true; - continue; - } - self->sck = &mcu_spi_sck_list[i]; - self->mosi = NULL; - self->miso = &mcu_spi_miso_list[j]; - break; - } - } - if (self->sck != NULL) { - break; - } - // if just MOSI, reduce search - } else if (mosi != NULL) { - for (uint j = 0; j < mosi_len; j++) { - if ((mcu_spi_mosi_list[j].pin == mosi) //only SCK and MOSI need the same index - && (mcu_spi_sck_list[i].periph_index == mcu_spi_mosi_list[j].periph_index)) { - if (reserved_spi[mcu_spi_sck_list[i].periph_index - 1]) { - spi_taken = true; - continue; - } - self->sck = &mcu_spi_sck_list[i]; - self->mosi = &mcu_spi_mosi_list[j]; - self->miso = NULL; - break; - } - } - if (self->sck != NULL) { - break; - } - } else { - //throw an error immediately - mp_raise_ValueError(translate("Must provide MISO or MOSI pin")); - } + const mcu_periph_obj_t *mcu_spi_sck = &mcu_spi_sck_list[i]; + if (mcu_spi_sck->pin != sck) { + continue; + } + + int periph_index = mcu_spi_sck->periph_index; + + const mcu_periph_obj_t *mcu_spi_miso = NULL; + if (miso && !(mcu_spi_miso = find_pin_function(mcu_spi_miso_list, miso_len, miso, periph_index))) { + continue; } + + const mcu_periph_obj_t *mcu_spi_mosi = NULL; + if (mosi && !(mcu_spi_mosi = find_pin_function(mcu_spi_mosi_list, mosi_len, mosi, periph_index))) { + continue; + } + + if (reserved_spi[periph_index-1]) { + spi_taken = true; + continue; + } + + self->sck = mcu_spi_sck; + self->mosi = mcu_spi_mosi; + self->miso = mcu_spi_miso; + + return periph_index; } - //handle typedef selection, errors - if (self->sck != NULL && (self->mosi != NULL || self->miso != NULL)) { - SPIx = mcu_spi_banks[self->sck->periph_index - 1]; + if (spi_taken) { + mp_raise_ValueError(translate("Hardware busy, try alternative pins")); } else { - if (spi_taken) { - mp_raise_ValueError(translate("Hardware busy, try alternative pins")); - } else { - mp_raise_ValueError(translate("Invalid SPI pin selection")); - } + mp_raise_ValueError(translate("Invalid SPI pin selection")); } +} + +void common_hal_busio_spi_construct(busio_spi_obj_t *self, + const mcu_pin_obj_t * sck, const mcu_pin_obj_t * mosi, + const mcu_pin_obj_t * miso) { + + int periph_index = check_pins(self, sck, mosi, miso); + SPI_TypeDef * SPIx = mcu_spi_banks[periph_index - 1]; //Start GPIO for each pin GPIO_InitTypeDef GPIO_InitStruct = {0}; @@ -380,12 +354,12 @@ bool common_hal_busio_spi_read(busio_spi_obj_t *self, } bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, - uint8_t *data_out, uint8_t *data_in, size_t len) { + const uint8_t *data_out, uint8_t *data_in, size_t len) { if (self->miso == NULL || self->mosi == NULL) { mp_raise_ValueError(translate("Missing MISO or MOSI Pin")); } HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle, - data_out, data_in, (uint16_t)len,HAL_MAX_DELAY); + (uint8_t *) data_out, data_in, (uint16_t)len,HAL_MAX_DELAY); return result == HAL_OK; } diff --git a/ports/stm/common-hal/busio/UART.c b/ports/stm/common-hal/busio/UART.c index 86a932290..7450f9897 100644 --- a/ports/stm/common-hal/busio/UART.c +++ b/ports/stm/common-hal/busio/UART.c @@ -79,7 +79,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, const mcu_pin_obj_t * rs485_dir, bool rs485_invert, - uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer, bool sigint_enabled) { @@ -201,8 +201,8 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, self->handle.Init.BaudRate = baudrate; self->handle.Init.WordLength = (bits == 9) ? UART_WORDLENGTH_9B : UART_WORDLENGTH_8B; self->handle.Init.StopBits = (stop > 1) ? UART_STOPBITS_2 : UART_STOPBITS_1; - self->handle.Init.Parity = (parity == PARITY_ODD) ? UART_PARITY_ODD : - (parity == PARITY_EVEN) ? UART_PARITY_EVEN : + self->handle.Init.Parity = (parity == BUSIO_UART_PARITY_ODD) ? UART_PARITY_ODD : + (parity == BUSIO_UART_PARITY_EVEN) ? UART_PARITY_EVEN : UART_PARITY_NONE; self->handle.Init.Mode = (self->tx != NULL && self->rx != NULL) ? UART_MODE_TX_RX : (self->tx != NULL) ? UART_MODE_TX : diff --git a/ports/stm/common-hal/microcontroller/Pin.c b/ports/stm/common-hal/microcontroller/Pin.c index 610213497..3e3fc0522 100644 --- a/ports/stm/common-hal/microcontroller/Pin.c +++ b/ports/stm/common-hal/microcontroller/Pin.c @@ -37,25 +37,22 @@ bool neopixel_in_use; #endif #if defined(TFBGA216) - #define GPIO_PORT_COUNT 11 - GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, GPIOI, GPIOJ, GPIOK}; + GPIO_TypeDef * ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, GPIOI, GPIOJ, GPIOK}; #elif defined(LQFP144) - #define GPIO_PORT_COUNT 7 - GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG}; + GPIO_TypeDef * ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG}; #elif defined(LQFP100_f4) || (LQFP100_x7) - #define GPIO_PORT_COUNT 5 - GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE}; + GPIO_TypeDef * ports[] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE}; #elif defined(LQFP64) - #define GPIO_PORT_COUNT 3 - GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC}; + GPIO_TypeDef * ports[] = {GPIOA, GPIOB, GPIOC, GPIOD}; #elif defined(UFQFPN48) - #define GPIO_PORT_COUNT 3 - GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC}; + GPIO_TypeDef * ports[] = {GPIOA, GPIOB, GPIOC}; #endif +#define GPIO_PORT_COUNT (MP_ARRAY_SIZE(ports)) + STATIC uint16_t claimed_pins[GPIO_PORT_COUNT]; -STATIC uint16_t never_reset_pins[GPIO_PORT_COUNT]; +STATIC uint16_t __ALIGNED(4) never_reset_pins[GPIO_PORT_COUNT]; void reset_all_pins(void) { // Reset claimed pins diff --git a/ports/stm/mpconfigport.mk b/ports/stm/mpconfigport.mk index 0c5247d95..896d78bba 100644 --- a/ports/stm/mpconfigport.mk +++ b/ports/stm/mpconfigport.mk @@ -1,53 +1,56 @@ -MPY_TOOL_LONGINT_IMPL = -mlongint-impl=mpz -LONGINT_IMPL = MPZ -INTERNAL_LIBM = 1 -USB_SERIAL_NUMBER_LENGTH = 24 +MPY_TOOL_LONGINT_IMPL ?= -mlongint-impl=mpz +LONGINT_IMPL ?= MPZ +INTERNAL_LIBM ?= 1 +USB_SERIAL_NUMBER_LENGTH ?= 24 ifeq ($(MCU_VARIANT),STM32F405xx) - CIRCUITPY_FRAMEBUFFERIO = 1 - CIRCUITPY_RGBMATRIX = 1 + CIRCUITPY_FRAMEBUFFERIO ?= 1 + CIRCUITPY_RGBMATRIX ?= 1 endif ifeq ($(MCU_SERIES),F4) # Not yet implemented common-hal modules: - CIRCUITPY_AUDIOBUSIO = 0 - CIRCUITPY_AUDIOIO = 0 - CIRCUITPY_ROTARYIO = 0 - CIRCUITPY_COUNTIO = 0 - CIRCUITPY_RTC = 0 - CIRCUITPY_FREQUENCYIO = 0 - CIRCUITPY_I2CSLAVE = 0 - # Can be overridden on board level - ifndef CIRCUITPY_NVM - CIRCUITPY_NVM = 0 - endif + CIRCUITPY_AUDIOBUSIO ?= 0 + CIRCUITPY_AUDIOIO ?= 0 + CIRCUITPY_COUNTIO ?= 0 + CIRCUITPY_FREQUENCYIO ?= 0 + CIRCUITPY_I2CPERIPHERAL ?= 0 + CIRCUITPY_NVM ?= 0 + CIRCUITPY_ROTARYIO ?= 0 + CIRCUITPY_RTC ?= 0 + CIRCUITPY_USB_MIDI ?= 0 + CIRCUITPY_USB_HID ?= 0 endif ifeq ($(MCU_SERIES),H7) # Not yet implemented common-hal modules: - CIRCUITPY_ANALOGIO = 0 - CIRCUITPY_NEOPIXEL_WRITE = 0 - CIRCUITPY_PULSEIO = 0 - CIRCUITPY_NVM = 0 - CIRCUITPY_AUDIOBUSIO = 0 - CIRCUITPY_AUDIOIO = 0 - CIRCUITPY_COUNTIO = 0 - CIRCUITPY_ROTARYIO = 0 - CIRCUITPY_RTC = 0 - CIRCUITPY_FREQUENCYIO = 0 - CIRCUITPY_I2CSLAVE = 0 + CIRCUITPY_ANALOGIO ?= 0 + CIRCUITPY_AUDIOBUSIO ?= 0 + CIRCUITPY_AUDIOIO ?= 0 + CIRCUITPY_COUNTIO ?= 0 + CIRCUITPY_FREQUENCYIO ?= 0 + CIRCUITPY_I2CPERIPHERAL ?= 0 + CIRCUITPY_NEOPIXEL_WRITE ?= 0 + CIRCUITPY_NVM ?= 0 + CIRCUITPY_PULSEIO ?= 0 + CIRCUITPY_ROTARYIO ?= 0 + CIRCUITPY_RTC ?= 0 + CIRCUITPY_USB_HID ?= 0 + CIRCUITPY_USB_MIDI ?= 0 endif ifeq ($(MCU_SERIES),F7) # Not yet implemented common-hal modules: - CIRCUITPY_ANALOGIO = 0 - CIRCUITPY_NEOPIXEL_WRITE = 0 - CIRCUITPY_NVM = 0 - CIRCUITPY_AUDIOBUSIO = 0 - CIRCUITPY_AUDIOIO = 0 - CIRCUITPY_ROTARYIO = 0 - CIRCUITPY_COUNTIO = 0 - CIRCUITPY_RTC = 0 - CIRCUITPY_FREQUENCYIO = 0 - CIRCUITPY_I2CSLAVE = 0 + CIRCUITPY_ANALOGIO ?= 0 + CIRCUITPY_AUDIOBUSIO ?= 0 + CIRCUITPY_AUDIOIO ?= 0 + CIRCUITPY_COUNTIO ?= 0 + CIRCUITPY_FREQUENCYIO ?= 0 + CIRCUITPY_I2CPERIPHERAL ?= 0 + CIRCUITPY_NEOPIXEL_WRITE ?= 0 + CIRCUITPY_NVM ?= 0 + CIRCUITPY_ROTARYIO ?= 0 + CIRCUITPY_RTC ?= 0 + CIRCUITPY_USB_HID ?= 0 + CIRCUITPY_USB_MIDI ?= 0 endif diff --git a/ports/stm/st_driver b/ports/stm/st_driver -Subproject 3fc2e0f3db155b33177bb0705e0dd65cadb5841 +Subproject 1900834751fd6754457874b8c971690bab33e0a diff --git a/ports/stm/supervisor/internal_flash.h b/ports/stm/supervisor/internal_flash.h index b4d07ff48..13ade4e6e 100644 --- a/ports/stm/supervisor/internal_flash.h +++ b/ports/stm/supervisor/internal_flash.h @@ -41,14 +41,9 @@ #ifdef STM32F411xE #define STM32_FLASH_SIZE 0x80000 //512KiB -#if CIRCUITPY_NVM -#define INTERNAL_FLASH_FILESYSTEM_SIZE 0x8000 //32KiB -#define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000 -#else #define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB #define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08004000 #endif -#endif #ifdef STM32F412Zx #define STM32_FLASH_SIZE 0x100000 //1MB diff --git a/ports/stm/supervisor/port.c b/ports/stm/supervisor/port.c index 25504ddec..07a93c025 100644 --- a/ports/stm/supervisor/port.c +++ b/ports/stm/supervisor/port.c @@ -48,8 +48,7 @@ #include STM32_HAL_H -//only enable the Reset Handler overwrite for the H7 for now -#if (CPY_STM32H7) +#if (CPY_STM32H7) || (CPY_STM32F7) // Device memories must be accessed in order. #define DEVICE 2 @@ -86,7 +85,7 @@ extern uint32_t _ld_itcm_flash_copy; extern void main(void); extern void SystemInit(void); -// This replaces the Reset_Handler in startup_*.S and SystemInit in system_*.c. +// This replaces the Reset_Handler in gcc/startup_*.s, calls SystemInit from system_*.c __attribute__((used, naked)) void Reset_Handler(void) { __disable_irq(); __set_MSP((uint32_t) &_ld_stack_top); @@ -105,20 +104,20 @@ __attribute__((used, naked)) void Reset_Handler(void) { // Mark all the flash the same until instructed otherwise. MPU->RBAR = ARM_MPU_RBAR(11, 0x08000000U); - MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_2MB); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, CPY_FLASH_REGION_SIZE); // This the ITCM. Set it to read-only because we've loaded everything already and it's easy to // accidentally write the wrong value to 0x00000000 (aka NULL). MPU->RBAR = ARM_MPU_RBAR(12, 0x00000000U); - MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_RO, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_64KB); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_RO, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, CPY_ITCM_REGION_SIZE); // This the DTCM. MPU->RBAR = ARM_MPU_RBAR(14, 0x20000000U); - MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_128KB); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, CPY_DTCM_REGION_SIZE); // This is AXI SRAM (D1). - MPU->RBAR = ARM_MPU_RBAR(15, 0x24000000U); - MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, NO_SUBREGIONS, ARM_MPU_REGION_SIZE_512KB); + MPU->RBAR = ARM_MPU_RBAR(15, CPY_SRAM_START_ADDR); + MPU->RASR = ARM_MPU_RASR(EXECUTION, ARM_MPU_AP_FULL, NORMAL, NOT_SHAREABLE, CACHEABLE, BUFFERABLE, CPY_SRAM_SUBMASK, CPY_SRAM_REGION_SIZE); /* Enable MPU */ ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk); diff --git a/ports/unix/Makefile b/ports/unix/Makefile index 63c4980c3..5d4b168fe 100644 --- a/ports/unix/Makefile +++ b/ports/unix/Makefile @@ -161,8 +161,6 @@ PY_EXTMOD_O_BASENAME += \ extmod/machine_pinbase.o \ extmod/machine_signal.o \ extmod/machine_pulse.o \ - extmod/machine_i2c.o \ - extmod/machine_spi.o LIB_SRC_C = $(addprefix lib/,\ $(LIB_SRC_C_EXTRA) \ diff --git a/py/circuitpy_defns.mk b/py/circuitpy_defns.mk index 67fbde6e4..32d364006 100644 --- a/py/circuitpy_defns.mk +++ b/py/circuitpy_defns.mk @@ -162,8 +162,11 @@ endif ifeq ($(CIRCUITPY_GAMEPADSHIFT),1) SRC_PATTERNS += gamepadshift/% endif -ifeq ($(CIRCUITPY_I2CSLAVE),1) -SRC_PATTERNS += i2cslave/% +ifeq ($(CIRCUITPY_GNSS),1) +SRC_PATTERNS += gnss/% +endif +ifeq ($(CIRCUITPY_I2CPERIPHERAL),1) +SRC_PATTERNS += i2cperipheral/% endif ifeq ($(CIRCUITPY_MATH),1) SRC_PATTERNS += math/% @@ -210,6 +213,12 @@ endif ifeq ($(CIRCUITPY_SAMD),1) SRC_PATTERNS += samd/% endif +ifeq ($(CIRCUITPY_SDCARDIO),1) +SRC_PATTERNS += sdcardio/% +endif +ifeq ($(CIRCUITPY_SDIOIO),1) +SRC_PATTERNS += sdioio/% +endif ifeq ($(CIRCUITPY_STAGE),1) SRC_PATTERNS += _stage/% endif @@ -249,7 +258,6 @@ endif # All possible sources are listed here, and are filtered by SRC_PATTERNS in SRC_COMMON_HAL SRC_COMMON_HAL_ALL = \ - _bleio/__init__.c \ _bleio/Adapter.c \ _bleio/Attribute.c \ _bleio/Characteristic.c \ @@ -259,16 +267,19 @@ SRC_COMMON_HAL_ALL = \ _bleio/PacketBuffer.c \ _bleio/Service.c \ _bleio/UUID.c \ + _bleio/__init__.c \ + _pew/PewPew.c \ + _pew/__init__.c \ analogio/AnalogIn.c \ analogio/AnalogOut.c \ analogio/__init__.c \ - audiobusio/__init__.c \ audiobusio/I2SOut.c \ audiobusio/PDMIn.c \ - audiopwmio/__init__.c \ - audiopwmio/PWMAudioOut.c \ - audioio/__init__.c \ + audiobusio/__init__.c \ audioio/AudioOut.c \ + audioio/__init__.c \ + audiopwmio/PWMAudioOut.c \ + audiopwmio/__init__.c \ board/__init__.c \ busio/I2C.c \ busio/SPI.c \ @@ -279,10 +290,14 @@ SRC_COMMON_HAL_ALL = \ digitalio/DigitalInOut.c \ digitalio/__init__.c \ displayio/ParallelBus.c \ - frequencyio/__init__.c \ frequencyio/FrequencyIn.c \ - i2cslave/I2CSlave.c \ - i2cslave/__init__.c \ + frequencyio/__init__.c \ + gnss/__init__.c \ + gnss/GNSS.c \ + gnss/PositionFix.c \ + gnss/SatelliteSystem.c \ + i2cperipheral/I2CPeripheral.c \ + i2cperipheral/__init__.c \ microcontroller/Pin.c \ microcontroller/Processor.c \ microcontroller/__init__.c \ @@ -290,23 +305,25 @@ SRC_COMMON_HAL_ALL = \ nvm/ByteArray.c \ nvm/__init__.c \ os/__init__.c \ - rgbmatrix/RGBMatrix.c \ - rgbmatrix/__init__.c \ + ps2io/Ps2.c \ + ps2io/__init__.c \ pulseio/PWMOut.c \ pulseio/PulseIn.c \ pulseio/PulseOut.c \ pulseio/__init__.c \ - ps2io/Ps2.c \ - ps2io/__init__.c \ + rgbmatrix/RGBMatrix.c \ + rgbmatrix/__init__.c \ rotaryio/IncrementalEncoder.c \ rotaryio/__init__.c \ rtc/RTC.c \ rtc/__init__.c \ + sdioio/SDCard.c \ + sdioio/__init__.c \ supervisor/Runtime.c \ supervisor/__init__.c \ - watchdog/__init__.c \ watchdog/WatchDogMode.c \ watchdog/WatchDogTimer.c \ + watchdog/__init__.c \ SRC_COMMON_HAL = $(filter $(SRC_PATTERNS), $(SRC_COMMON_HAL_ALL)) @@ -318,13 +335,13 @@ $(filter $(SRC_PATTERNS), \ _bleio/Address.c \ _bleio/Attribute.c \ _bleio/ScanEntry.c \ + _eve/__init__.c \ digitalio/Direction.c \ digitalio/DriveMode.c \ digitalio/Pull.c \ fontio/Glyph.c \ - microcontroller/RunMode.c \ math/__init__.c \ - _eve/__init__.c \ + microcontroller/RunMode.c \ ) SRC_BINDINGS_ENUMS += \ @@ -335,29 +352,30 @@ SRC_SHARED_MODULE_ALL = \ _bleio/Attribute.c \ _bleio/ScanEntry.c \ _bleio/ScanResults.c \ + _eve/__init__.c \ _pixelbuf/PixelBuf.c \ _pixelbuf/__init__.c \ _stage/Layer.c \ _stage/Text.c \ _stage/__init__.c \ - audiopwmio/__init__.c \ - audioio/__init__.c \ - audiocore/__init__.c \ + aesio/__init__.c \ + aesio/aes.c \ audiocore/RawSample.c \ audiocore/WaveFile.c \ - audiomixer/__init__.c \ + audiocore/__init__.c \ + audioio/__init__.c \ audiomixer/Mixer.c \ audiomixer/MixerVoice.c \ - audiomp3/__init__.c \ + audiomixer/__init__.c \ audiomp3/MP3Decoder.c \ + audiomp3/__init__.c \ + audiopwmio/__init__.c \ bitbangio/I2C.c \ bitbangio/OneWire.c \ bitbangio/SPI.c \ bitbangio/__init__.c \ board/__init__.c \ busio/OneWire.c \ - aesio/__init__.c \ - aesio/aes.c \ displayio/Bitmap.c \ displayio/ColorConverter.c \ displayio/Display.c \ @@ -370,35 +388,34 @@ SRC_SHARED_MODULE_ALL = \ displayio/Shape.c \ displayio/TileGrid.c \ displayio/__init__.c \ - vectorio/Circle.c \ - vectorio/Rectangle.c \ - vectorio/Polygon.c \ - vectorio/VectorShape.c \ - vectorio/__init__.c \ fontio/BuiltinFont.c \ fontio/__init__.c \ framebufferio/FramebufferDisplay.c \ framebufferio/__init__.c \ + sdcardio/SDCard.c \ + sdcardio/__init__.c \ gamepad/GamePad.c \ gamepad/__init__.c \ gamepadshift/GamePadShift.c \ gamepadshift/__init__.c \ + network/__init__.c \ os/__init__.c \ random/__init__.c \ - socket/__init__.c \ - network/__init__.c \ rgbmatrix/RGBMatrix.c \ rgbmatrix/__init__.c \ + socket/__init__.c \ storage/__init__.c \ struct/__init__.c \ - time/__init__.c \ terminalio/Terminal.c \ terminalio/__init__.c \ + time/__init__.c \ uheap/__init__.c \ ustack/__init__.c \ - _pew/__init__.c \ - _pew/PewPew.c \ - _eve/__init__.c + vectorio/Circle.c \ + vectorio/Polygon.c \ + vectorio/Rectangle.c \ + vectorio/VectorShape.c \ + vectorio/__init__.c \ # All possible sources are listed here, and are filtered by SRC_PATTERNS. SRC_SHARED_MODULE = $(filter $(SRC_PATTERNS), $(SRC_SHARED_MODULE_ALL)) diff --git a/py/circuitpy_mpconfig.h b/py/circuitpy_mpconfig.h index 3fbb46900..d05a246fc 100644 --- a/py/circuitpy_mpconfig.h +++ b/py/circuitpy_mpconfig.h @@ -401,11 +401,18 @@ extern const struct _mp_obj_module_t gamepadshift_module; #define GAMEPAD_ROOT_POINTERS #endif -#if CIRCUITPY_I2CSLAVE -extern const struct _mp_obj_module_t i2cslave_module; -#define I2CSLAVE_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_i2cslave), (mp_obj_t)&i2cslave_module }, +#if CIRCUITPY_GNSS +extern const struct _mp_obj_module_t gnss_module; +#define GNSS_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_gnss), (mp_obj_t)&gnss_module }, #else -#define I2CSLAVE_MODULE +#define GNSS_MODULE +#endif + +#if CIRCUITPY_I2CPERIPHERAL +extern const struct _mp_obj_module_t i2cperipheral_module; +#define I2CPERIPHERAL_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_i2cperipheral), (mp_obj_t)&i2cperipheral_module }, +#else +#define I2CPERIPHERAL_MODULE #endif #if CIRCUITPY_MATH @@ -530,6 +537,20 @@ extern const struct _mp_obj_module_t samd_module; #define SAMD_MODULE #endif +#if CIRCUITPY_SDCARDIO +extern const struct _mp_obj_module_t sdcardio_module; +#define SDCARDIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_sdcardio), (mp_obj_t)&sdcardio_module }, +#else +#define SDCARDIO_MODULE +#endif + +#if CIRCUITPY_SDIOIO +extern const struct _mp_obj_module_t sdioio_module; +#define SDIOIO_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR_sdioio), (mp_obj_t)&sdioio_module }, +#else +#define SDIOIO_MODULE +#endif + #if CIRCUITPY_STAGE extern const struct _mp_obj_module_t stage_module; #define STAGE_MODULE { MP_OBJ_NEW_QSTR(MP_QSTR__stage), (mp_obj_t)&stage_module }, @@ -682,7 +703,8 @@ extern const struct _mp_obj_module_t watchdog_module; FREQUENCYIO_MODULE \ GAMEPAD_MODULE \ GAMEPADSHIFT_MODULE \ - I2CSLAVE_MODULE \ + GNSS_MODULE \ + I2CPERIPHERAL_MODULE \ JSON_MODULE \ MATH_MODULE \ _EVE_MODULE \ @@ -701,6 +723,8 @@ extern const struct _mp_obj_module_t watchdog_module; ROTARYIO_MODULE \ RTC_MODULE \ SAMD_MODULE \ + SDCARDIO_MODULE \ + SDIOIO_MODULE \ STAGE_MODULE \ STORAGE_MODULE \ STRUCT_MODULE \ diff --git a/py/circuitpy_mpconfig.mk b/py/circuitpy_mpconfig.mk index 865654a0d..84fb926b5 100644 --- a/py/circuitpy_mpconfig.mk +++ b/py/circuitpy_mpconfig.mk @@ -45,9 +45,6 @@ CFLAGS += -DCIRCUITPY_AUDIOBUSIO=$(CIRCUITPY_AUDIOBUSIO) CIRCUITPY_AUDIOIO ?= $(CIRCUITPY_FULL_BUILD) CFLAGS += -DCIRCUITPY_AUDIOIO=$(CIRCUITPY_AUDIOIO) -CIRCUITPY_AUDIOIO_COMPAT ?= $(CIRCUITPY_AUDIOIO) -CFLAGS += -DCIRCUITPY_AUDIOIO_COMPAT=$(CIRCUITPY_AUDIOIO_COMPAT) - CIRCUITPY_AUDIOPWMIO ?= 0 CFLAGS += -DCIRCUITPY_AUDIOPWMIO=$(CIRCUITPY_AUDIOPWMIO) @@ -109,8 +106,11 @@ CFLAGS += -DCIRCUITPY_GAMEPAD=$(CIRCUITPY_GAMEPAD) CIRCUITPY_GAMEPADSHIFT ?= 0 CFLAGS += -DCIRCUITPY_GAMEPADSHIFT=$(CIRCUITPY_GAMEPADSHIFT) -CIRCUITPY_I2CSLAVE ?= $(CIRCUITPY_FULL_BUILD) -CFLAGS += -DCIRCUITPY_I2CSLAVE=$(CIRCUITPY_I2CSLAVE) +CIRCUITPY_GNSS ?= 0 +CFLAGS += -DCIRCUITPY_GNSS=$(CIRCUITPY_GNSS) + +CIRCUITPY_I2CPERIPHERAL ?= $(CIRCUITPY_FULL_BUILD) +CFLAGS += -DCIRCUITPY_I2CPERIPHERAL=$(CIRCUITPY_I2CPERIPHERAL) CIRCUITPY_MATH ?= 1 CFLAGS += -DCIRCUITPY_MATH=$(CIRCUITPY_MATH) @@ -163,6 +163,12 @@ CFLAGS += -DCIRCUITPY_RTC=$(CIRCUITPY_RTC) CIRCUITPY_SAMD ?= 0 CFLAGS += -DCIRCUITPY_SAMD=$(CIRCUITPY_SAMD) +CIRCUITPY_SDCARDIO ?= $(CIRCUITPY_FULL_BUILD) +CFLAGS += -DCIRCUITPY_SDCARDIO=$(CIRCUITPY_SDCARDIO) + +CIRCUITPY_SDIOIO ?= 0 +CFLAGS += -DCIRCUITPY_SDIOIO=$(CIRCUITPY_SDIOIO) + # Currently always off. CIRCUITPY_STAGE ?= 0 CFLAGS += -DCIRCUITPY_STAGE=$(CIRCUITPY_STAGE) diff --git a/shared-bindings/_bleio/Address.c b/shared-bindings/_bleio/Address.c index ccbab1b9d..9beaff2ab 100644 --- a/shared-bindings/_bleio/Address.c +++ b/shared-bindings/_bleio/Address.c @@ -78,7 +78,7 @@ STATIC mp_obj_t bleio_address_make_new(const mp_obj_type_t *type, size_t n_args, } //| address_bytes: Any = ... -//| """The bytes that make up the device address (read-only). +//| r"""The bytes that make up the device address (read-only). //| //| Note that the ``bytes`` object returned is in little-endian order: //| The least significant byte is ``address_bytes[0]``. So the address will diff --git a/shared-bindings/_pew/PewPew.c b/shared-bindings/_pew/PewPew.c index 82bf04a61..352ef38f2 100644 --- a/shared-bindings/_pew/PewPew.c +++ b/shared-bindings/_pew/PewPew.c @@ -31,7 +31,7 @@ #include "shared-bindings/digitalio/DigitalInOut.h" #include "shared-bindings/util.h" #include "PewPew.h" -#include "shared-module/_pew/PewPew.h" +#include "common-hal/_pew/PewPew.h" #include "supervisor/shared/translate.h" //| class PewPew: diff --git a/shared-bindings/_pew/__init__.c b/shared-bindings/_pew/__init__.c index 6e0070d8e..498beaf1c 100644 --- a/shared-bindings/_pew/__init__.c +++ b/shared-bindings/_pew/__init__.c @@ -27,7 +27,7 @@ #include "py/runtime.h" #include "py/mphal.h" #include "PewPew.h" -#include "shared-module/_pew/PewPew.h" +#include "common-hal/_pew/PewPew.h" STATIC mp_obj_t get_pressed(void) { pew_obj_t *pew = MP_STATE_VM(pew_singleton); diff --git a/shared-bindings/audioio/__init__.c b/shared-bindings/audioio/__init__.c index 7ec927834..a9c58e864 100644 --- a/shared-bindings/audioio/__init__.c +++ b/shared-bindings/audioio/__init__.c @@ -33,15 +33,6 @@ #include "shared-bindings/audioio/__init__.h" #include "shared-bindings/audioio/AudioOut.h" -#if CIRCUITPY_AUDIOIO_COMPAT -#include "shared-bindings/audiomixer/Mixer.h" -#include "shared-bindings/audiocore/RawSample.h" -#include "shared-bindings/audiocore/WaveFile.h" -#endif -#if CIRCUITPY_AUDIOMIXER -#include "shared-bindings/audiomixer/Mixer.h" -#endif - //| """Support for audio output //| //| The `audioio` module contains classes to provide access to audio IO. @@ -62,13 +53,6 @@ STATIC const mp_rom_map_elem_t audioio_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_audioio) }, { MP_ROM_QSTR(MP_QSTR_AudioOut), MP_ROM_PTR(&audioio_audioout_type) }, -#if CIRCUITPY_AUDIOIO_COMPAT - #if CIRCUITPY_AUDIOMIXER - { MP_ROM_QSTR(MP_QSTR_Mixer), MP_ROM_PTR(&audiomixer_mixer_type) }, - #endif - { MP_ROM_QSTR(MP_QSTR_RawSample), MP_ROM_PTR(&audioio_rawsample_type) }, - { MP_ROM_QSTR(MP_QSTR_WaveFile), MP_ROM_PTR(&audioio_wavefile_type) }, -#endif }; STATIC MP_DEFINE_CONST_DICT(audioio_module_globals, audioio_module_globals_table); diff --git a/shared-bindings/bitbangio/I2C.c b/shared-bindings/bitbangio/I2C.c index 2043fc903..43fe11e62 100644 --- a/shared-bindings/bitbangio/I2C.c +++ b/shared-bindings/bitbangio/I2C.c @@ -45,6 +45,14 @@ //| physical level it consists of 2 wires: SCL and SDA, the clock and data //| lines respectively. //| +//| .. seealso:: Using this class directly requires careful lock management. +//| Instead, use :class:`~adafruit_bus_device.i2c_device.I2CDevice` to +//| manage locks. +//| +//| .. seealso:: Using this class to directly read registers requires manual +//| bit unpacking. Instead, use an existing driver or make one with +//| :ref:`Register <register-module-reference>` data descriptors. +//| //| :param ~microcontroller.Pin scl: The clock pin //| :param ~microcontroller.Pin sda: The data pin //| :param int frequency: The clock frequency of the bus @@ -158,7 +166,7 @@ STATIC mp_obj_t bitbangio_i2c_obj_unlock(mp_obj_t self_in) { MP_DEFINE_CONST_FUN_OBJ_1(bitbangio_i2c_unlock_obj, bitbangio_i2c_obj_unlock); //| def readfrom_into(self, address: int, buffer: bytearray, *, start: int = 0, end: int = None) -> Any: -//| """Read into ``buffer`` from the slave specified by ``address``. +//| """Read into ``buffer`` from the device selected by ``address``. //| The number of bytes read will be the length of ``buffer``. //| At least one byte must be read. //| @@ -210,7 +218,7 @@ STATIC mp_obj_t bitbangio_i2c_readfrom_into(size_t n_args, const mp_obj_t *pos_a MP_DEFINE_CONST_FUN_OBJ_KW(bitbangio_i2c_readfrom_into_obj, 3, bitbangio_i2c_readfrom_into); //| def writeto(self, address: int, buffer: bytearray, *, start: int = 0, end: int = None, stop: bool = True) -> Any: -//| """Write the bytes from ``buffer`` to the slave specified by ``address`` and then transmits a +//| """Write the bytes from ``buffer`` to the device selected by ``address`` and then transmits a //| stop bit. Use `writeto_then_readfrom` when needing a write, no stop and repeated start //| before a read. //| @@ -270,7 +278,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_KW(bitbangio_i2c_writeto_obj, 1, bitbangio_i2c_wr //| def writeto_then_readfrom(self, address: int, out_buffer: bytearray, in_buffer: bytearray, *, out_start: int = 0, out_end: int = None, in_start: int = 0, in_end: int = None) -> Any: -//| """Write the bytes from ``out_buffer`` to the slave specified by ``address``, generate no stop +//| """Write the bytes from ``out_buffer`` to the device selected by ``address``, generate no stop //| bit, generate a repeated start and read into ``in_buffer``. ``out_buffer`` and //| ``in_buffer`` can be the same buffer because they are used sequentially. //| diff --git a/shared-bindings/bitbangio/SPI.c b/shared-bindings/bitbangio/SPI.c index 08bbf1257..6d31037c7 100644 --- a/shared-bindings/bitbangio/SPI.c +++ b/shared-bindings/bitbangio/SPI.c @@ -43,19 +43,29 @@ //| """A 3-4 wire serial protocol //| //| SPI is a serial protocol that has exclusive pins for data in and out of the -//| master. It is typically faster than :py:class:`~bitbangio.I2C` because a -//| separate pin is used to control the active slave rather than a transmitted +//| main device. It is typically faster than :py:class:`~bitbangio.I2C` because a +//| separate pin is used to select a device rather than a transmitted //| address. This class only manages three of the four SPI lines: `!clock`, -//| `!MOSI`, `!MISO`. Its up to the client to manage the appropriate slave -//| select line. (This is common because multiple slaves can share the `!clock`, -//| `!MOSI` and `!MISO` lines and therefore the hardware.)""" +//| `!MOSI`, `!MISO`. Its up to the client to manage the appropriate +//| select line, often abbreviated `!CS` or `!SS`. (This is common because +//| multiple secondaries can share the `!clock`, `!MOSI` and `!MISO` lines +//| and therefore the hardware.)""" //| //| def __init__(self, clock: microcontroller.Pin, MOSI: microcontroller.Pin = None, MISO: microcontroller.Pin = None): //| """Construct an SPI object on the given pins. //| +//| .. seealso:: Using this class directly requires careful lock management. +//| Instead, use :class:`~adafruit_bus_device.spi_device.SPIDevice` to +//| manage locks. +//| +//| .. seealso:: Using this class to directly read registers requires manual +//| bit unpacking. Instead, use an existing driver or make one with +//| :ref:`Register <register-module-reference>` data descriptors. +//| +//| //| :param ~microcontroller.Pin clock: the pin to use for the clock. -//| :param ~microcontroller.Pin MOSI: the Master Out Slave In pin. -//| :param ~microcontroller.Pin MISO: the Master In Slave Out pin.""" +//| :param ~microcontroller.Pin MOSI: the Main Out Selected In pin. +//| :param ~microcontroller.Pin MISO: the Main In Selected Out pin.""" //| ... //| diff --git a/shared-bindings/busio/I2C.c b/shared-bindings/busio/I2C.c index 7e8af765f..b61dd93f3 100644 --- a/shared-bindings/busio/I2C.c +++ b/shared-bindings/busio/I2C.c @@ -177,7 +177,7 @@ STATIC mp_obj_t busio_i2c_obj_unlock(mp_obj_t self_in) { MP_DEFINE_CONST_FUN_OBJ_1(busio_i2c_unlock_obj, busio_i2c_obj_unlock); //| def readfrom_into(self, address: int, buffer: bytearray, *, start: int = 0, end: int = None) -> Any: -//| """Read into ``buffer`` from the slave specified by ``address``. +//| """Read into ``buffer`` from the device selected by ``address``. //| The number of bytes read will be the length of ``buffer``. //| At least one byte must be read. //| @@ -229,7 +229,7 @@ STATIC mp_obj_t busio_i2c_readfrom_into(size_t n_args, const mp_obj_t *pos_args, MP_DEFINE_CONST_FUN_OBJ_KW(busio_i2c_readfrom_into_obj, 3, busio_i2c_readfrom_into); //| def writeto(self, address: int, buffer: bytearray, *, start: int = 0, end: int = None, stop: bool = True) -> Any: -//| """Write the bytes from ``buffer`` to the slave specified by ``address``. +//| """Write the bytes from ``buffer`` to the device selected by ``address``. //| Transmits a stop bit when stop is True. Setting stop=False is deprecated and stop will be //| removed in CircuitPython 6.x. Use `writeto_then_readfrom` when needing a write, no stop and //| repeated start before a read. @@ -288,7 +288,7 @@ STATIC mp_obj_t busio_i2c_writeto(size_t n_args, const mp_obj_t *pos_args, mp_ma STATIC MP_DEFINE_CONST_FUN_OBJ_KW(busio_i2c_writeto_obj, 1, busio_i2c_writeto); //| def writeto_then_readfrom(self, address: int, out_buffer: bytearray, in_buffer: bytearray, *, out_start: int = 0, out_end: int = None, in_start: int = 0, in_end: int = None) -> Any: -//| """Write the bytes from ``out_buffer`` to the slave specified by ``address``, generate no stop +//| """Write the bytes from ``out_buffer`` to the device selected by ``address``, generate no stop //| bit, generate a repeated start and read into ``in_buffer``. ``out_buffer`` and //| ``in_buffer`` can be the same buffer because they are used sequentially. //| diff --git a/shared-bindings/busio/SPI.c b/shared-bindings/busio/SPI.c index 2ba9a4c22..793ab4f67 100644 --- a/shared-bindings/busio/SPI.c +++ b/shared-bindings/busio/SPI.c @@ -45,12 +45,13 @@ //| """A 3-4 wire serial protocol //| //| SPI is a serial protocol that has exclusive pins for data in and out of the -//| master. It is typically faster than :py:class:`~busio.I2C` because a -//| separate pin is used to control the active slave rather than a transitted +//| main device. It is typically faster than :py:class:`~bitbangio.I2C` because a +//| separate pin is used to select a device rather than a transmitted //| address. This class only manages three of the four SPI lines: `!clock`, -//| `!MOSI`, `!MISO`. Its up to the client to manage the appropriate slave -//| select line. (This is common because multiple slaves can share the `!clock`, -//| `!MOSI` and `!MISO` lines and therefore the hardware.)""" +//| `!MOSI`, `!MISO`. Its up to the client to manage the appropriate +//| select line, often abbreviated `!CS` or `!SS`. (This is common because +//| multiple secondaries can share the `!clock`, `!MOSI` and `!MISO` lines +//| and therefore the hardware.)""" //| //| def __init__(self, clock: microcontroller.Pin, MOSI: microcontroller.Pin = None, MISO: microcontroller.Pin = None): //| @@ -72,8 +73,8 @@ //| :ref:`Register <register-module-reference>` data descriptors. //| //| :param ~microcontroller.Pin clock: the pin to use for the clock. -//| :param ~microcontroller.Pin MOSI: the Master Out Slave In pin. -//| :param ~microcontroller.Pin MISO: the Master In Slave Out pin.""" +//| :param ~microcontroller.Pin MOSI: the Main Out Selected In pin. +//| :param ~microcontroller.Pin MISO: the Main In Selected Out pin.""" //| ... //| @@ -417,3 +418,10 @@ const mp_obj_type_t busio_spi_type = { .make_new = busio_spi_make_new, .locals_dict = (mp_obj_dict_t*)&busio_spi_locals_dict, }; + +busio_spi_obj_t *validate_obj_is_spi_bus(mp_obj_t obj) { + if (!MP_OBJ_IS_TYPE(obj, &busio_spi_type)) { + mp_raise_TypeError_varg(translate("Expected a %q"), busio_spi_type.name); + } + return MP_OBJ_TO_PTR(obj); +} diff --git a/shared-bindings/busio/SPI.h b/shared-bindings/busio/SPI.h index b7b0715d1..3a8b6dbc1 100644 --- a/shared-bindings/busio/SPI.h +++ b/shared-bindings/busio/SPI.h @@ -56,7 +56,7 @@ extern bool common_hal_busio_spi_write(busio_spi_obj_t *self, const uint8_t *dat extern bool common_hal_busio_spi_read(busio_spi_obj_t *self, uint8_t *data, size_t len, uint8_t write_value); // Reads and write len bytes simultaneously. -extern bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, uint8_t *data_out, uint8_t *data_in, size_t len); +extern bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len); // Return actual SPI bus frequency. uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t* self); @@ -70,4 +70,6 @@ uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self); // This is used by the supervisor to claim SPI devices indefinitely. extern void common_hal_busio_spi_never_reset(busio_spi_obj_t *self); +extern busio_spi_obj_t *validate_obj_is_spi_bus(mp_obj_t obj_in); + #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BUSIO_SPI_H diff --git a/shared-bindings/busio/UART.c b/shared-bindings/busio/UART.c index 8c0811266..018ded182 100644 --- a/shared-bindings/busio/UART.c +++ b/shared-bindings/busio/UART.c @@ -52,8 +52,8 @@ //| :param ~microcontroller.Pin rx: the pin to receive on, or ``None`` if this ``UART`` is transmit-only. //| :param ~microcontroller.Pin rts: the pin for rts, or ``None`` if rts not in use. //| :param ~microcontroller.Pin cts: the pin for cts, or ``None`` if cts not in use. -//| :param ~microcontroller.Pin rs485_dir: the pin for rs485 direction setting, or ``None`` if rs485 not in use. -//| :param bool rs485_invert: set to invert the sense of the rs485_dir pin. +//| :param ~microcontroller.Pin rs485_dir: the output pin for rs485 direction setting, or ``None`` if rs485 not in use. +//| :param bool rs485_invert: rs485_dir pin active high when set. Active low otherwise. //| :param int baudrate: the transmit and receive speed. //| :param int bits: the number of bits per byte, 7, 8 or 9. //| :param Parity parity: the parity used for error checking. @@ -87,8 +87,8 @@ STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, co enum { ARG_tx, ARG_rx, ARG_baudrate, ARG_bits, ARG_parity, ARG_stop, ARG_timeout, ARG_receiver_buffer_size, ARG_rts, ARG_cts, ARG_rs485_dir,ARG_rs485_invert}; static const mp_arg_t allowed_args[] = { - { MP_QSTR_tx, MP_ARG_REQUIRED | MP_ARG_OBJ }, - { MP_QSTR_rx, MP_ARG_REQUIRED | MP_ARG_OBJ }, + { MP_QSTR_tx, MP_ARG_OBJ, {.u_obj = mp_const_none} }, + { MP_QSTR_rx, MP_ARG_OBJ, {.u_obj = mp_const_none} }, { MP_QSTR_baudrate, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 9600} }, { MP_QSTR_bits, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 8} }, { MP_QSTR_parity, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} }, @@ -115,11 +115,11 @@ STATIC mp_obj_t busio_uart_make_new(const mp_obj_type_t *type, size_t n_args, co mp_raise_ValueError(translate("bits must be 7, 8 or 9")); } - uart_parity_t parity = PARITY_NONE; + busio_uart_parity_t parity = BUSIO_UART_PARITY_NONE; if (args[ARG_parity].u_obj == &busio_uart_parity_even_obj) { - parity = PARITY_EVEN; + parity = BUSIO_UART_PARITY_EVEN; } else if (args[ARG_parity].u_obj == &busio_uart_parity_odd_obj) { - parity = PARITY_ODD; + parity = BUSIO_UART_PARITY_ODD; } uint8_t stop = args[ARG_stop].u_int; diff --git a/shared-bindings/busio/UART.h b/shared-bindings/busio/UART.h index 3aed4e534..ce8da1445 100644 --- a/shared-bindings/busio/UART.h +++ b/shared-bindings/busio/UART.h @@ -34,17 +34,17 @@ extern const mp_obj_type_t busio_uart_type; typedef enum { - PARITY_NONE, - PARITY_EVEN, - PARITY_ODD -} uart_parity_t; + BUSIO_UART_PARITY_NONE, + BUSIO_UART_PARITY_EVEN, + BUSIO_UART_PARITY_ODD +} busio_uart_parity_t; // Construct an underlying UART object. extern void common_hal_busio_uart_construct(busio_uart_obj_t *self, const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts, const mcu_pin_obj_t * rs485_dir, bool rs485_invert, - uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, + uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer, bool sigint_enabled); diff --git a/shared-bindings/displayio/Display.c b/shared-bindings/displayio/Display.c index 62ef0f5d0..6e454f34b 100644 --- a/shared-bindings/displayio/Display.c +++ b/shared-bindings/displayio/Display.c @@ -50,7 +50,7 @@ //| contain the initialization sequence at minimum.""" //| //| def __init__(self, display_bus: Any, init_sequence: buffer, *, width: int, height: int, colstart: int = 0, rowstart: int = 0, rotation: int = 0, color_depth: int = 16, grayscale: bool = False, pixels_in_byte_share_row: bool = True, bytes_per_cell: int = 1, reverse_pixels_in_byte: bool = False, set_column_command: int = 0x2a, set_row_command: int = 0x2b, write_ram_command: int = 0x2c, set_vertical_scroll: int = 0, backlight_pin: microcontroller.Pin = None, brightness_command: int = None, brightness: bool = 1.0, auto_brightness: bool = False, single_byte_bounds: bool = False, data_as_commands: bool = False, auto_refresh: bool = True, native_frames_per_second: int = 60): -//| """Create a Display object on the given display bus (`displayio.FourWire` or `displayio.ParallelBus`). +//| r"""Create a Display object on the given display bus (`displayio.FourWire` or `displayio.ParallelBus`). //| //| The ``init_sequence`` is bitpacked to minimize the ram impact. Every command begins with a //| command byte followed by a byte to determine the parameter count and if a delay is need after. diff --git a/shared-bindings/displayio/Palette.c b/shared-bindings/displayio/Palette.c index 871b2b06a..37cfbd82e 100644 --- a/shared-bindings/displayio/Palette.c +++ b/shared-bindings/displayio/Palette.c @@ -85,7 +85,7 @@ STATIC mp_obj_t group_unary_op(mp_unary_op_t op, mp_obj_t self_in) { } //| def __setitem__(self, index: Any, value: Any) -> Any: -//| """Sets the pixel color at the given index. The index should be an integer in the range 0 to color_count-1. +//| r"""Sets the pixel color at the given index. The index should be an integer in the range 0 to color_count-1. //| //| The value argument represents a color, and can be from 0x000000 to 0xFFFFFF (to represent an RGB value). //| Value can be an int, bytes (3 bytes (RGB) or 4 bytes (RGB + pad byte)), bytearray, diff --git a/shared-bindings/gnss/GNSS.c b/shared-bindings/gnss/GNSS.c new file mode 100644 index 000000000..929e02ab8 --- /dev/null +++ b/shared-bindings/gnss/GNSS.c @@ -0,0 +1,227 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/gnss/GNSS.h" +#include "shared-bindings/time/__init__.h" +#include "shared-bindings/util.h" + +#include "py/objproperty.h" +#include "py/runtime.h" + +//| class GNSS: +//| """Get updated positioning information from Global Navigation Satellite System (GNSS) +//| +//| Usage:: +//| +//| import gnss +//| import time +//| +//| nav = gnss.GNSS([gnss.SatelliteSystem.GPS, gnss.SatelliteSystem.GLONASS]) +//| last_print = time.monotonic() +//| while True: +//| nav.update() +//| current = time.monotonic() +//| if current - last_print >= 1.0: +//| last_print = current +//| if nav.fix is gnss.PositionFix.INVALID: +//| print("Waiting for fix...") +//| continue +//| print("Latitude: {0:.6f} degrees".format(nav.latitude)) +//| print("Longitude: {0:.6f} degrees".format(nav.longitude))""" +//| + +//| def __init__(self, ): +//| """Turn on the GNSS. +//| +//| :param gnss.SatelliteSystem system: satellite system to use""" +//| ... +//| +STATIC mp_obj_t gnss_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + gnss_obj_t *self = m_new_obj(gnss_obj_t); + self->base.type = &gnss_type; + enum { ARG_system }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_system, MP_ARG_REQUIRED | MP_ARG_OBJ }, + }; + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + unsigned long selection = 0; + if (MP_OBJ_IS_TYPE(args[ARG_system].u_obj, &gnss_satellitesystem_type)) { + selection |= gnss_satellitesystem_obj_to_type(args[ARG_system].u_obj); + } else if (MP_OBJ_IS_TYPE(args[ARG_system].u_obj, &mp_type_list)) { + size_t systems_size = 0; + mp_obj_t *systems; + mp_obj_list_get(args[ARG_system].u_obj, &systems_size, &systems); + for (size_t i = 0; i < systems_size; ++i) { + if (!MP_OBJ_IS_TYPE(systems[i], &gnss_satellitesystem_type)) { + mp_raise_TypeError(translate("System entry must be gnss.SatelliteSystem")); + } + selection |= gnss_satellitesystem_obj_to_type(systems[i]); + } + } else { + mp_raise_TypeError(translate("System entry must be gnss.SatelliteSystem")); + } + + common_hal_gnss_construct(self, selection); + return MP_OBJ_FROM_PTR(self); +} + +//| def deinit(self, ) -> Any: +//| """Turn off the GNSS.""" +//| ... +//| +STATIC mp_obj_t gnss_obj_deinit(mp_obj_t self_in) { + gnss_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_gnss_deinit(self); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(gnss_deinit_obj, gnss_obj_deinit); + +STATIC void check_for_deinit(gnss_obj_t *self) { + if (common_hal_gnss_deinited(self)) { + raise_deinited_error(); + } +} + +//| def update(self, ) -> Any: +//| """Update GNSS positioning information.""" +//| ... +//| +STATIC mp_obj_t gnss_obj_update(mp_obj_t self_in) { + gnss_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + + common_hal_gnss_update(self); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(gnss_update_obj, gnss_obj_update); + +//| latitude: Any = ... +//| """Latitude of current position in degrees (float).""" +//| +STATIC mp_obj_t gnss_obj_get_latitude(mp_obj_t self_in) { + gnss_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return mp_obj_new_float(common_hal_gnss_get_latitude(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(gnss_get_latitude_obj, gnss_obj_get_latitude); + +const mp_obj_property_t gnss_latitude_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&gnss_get_latitude_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| longitude: Any = ... +//| """Longitude of current position in degrees (float).""" +//| +STATIC mp_obj_t gnss_obj_get_longitude(mp_obj_t self_in) { + gnss_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return mp_obj_new_float(common_hal_gnss_get_longitude(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(gnss_get_longitude_obj, gnss_obj_get_longitude); + +const mp_obj_property_t gnss_longitude_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&gnss_get_longitude_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| altitude: Any = ... +//| """Altitude of current position in meters (float).""" +//| +STATIC mp_obj_t gnss_obj_get_altitude(mp_obj_t self_in) { + gnss_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return mp_obj_new_float(common_hal_gnss_get_altitude(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(gnss_get_altitude_obj, gnss_obj_get_altitude); + +const mp_obj_property_t gnss_altitude_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&gnss_get_altitude_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| timestamp: Any = ... +//| """Time when the position data was updated.""" +//| +STATIC mp_obj_t gnss_obj_get_timestamp(mp_obj_t self_in) { + gnss_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + timeutils_struct_time_t tm; + common_hal_gnss_get_timestamp(self, &tm); + return struct_time_from_tm(&tm); +} +MP_DEFINE_CONST_FUN_OBJ_1(gnss_get_timestamp_obj, gnss_obj_get_timestamp); + +const mp_obj_property_t gnss_timestamp_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&gnss_get_timestamp_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| fix: Any = ... +//| """Fix mode.""" +//| +STATIC mp_obj_t gnss_obj_get_fix(mp_obj_t self_in) { + gnss_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return gnss_positionfix_type_to_obj(common_hal_gnss_get_fix(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(gnss_get_fix_obj, gnss_obj_get_fix); + +const mp_obj_property_t gnss_fix_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&gnss_get_fix_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +STATIC const mp_rom_map_elem_t gnss_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&gnss_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR_update), MP_ROM_PTR(&gnss_update_obj) }, + + { MP_ROM_QSTR(MP_QSTR_latitude), MP_ROM_PTR(&gnss_latitude_obj) }, + { MP_ROM_QSTR(MP_QSTR_longitude), MP_ROM_PTR(&gnss_longitude_obj) }, + { MP_ROM_QSTR(MP_QSTR_altitude), MP_ROM_PTR(&gnss_altitude_obj) }, + { MP_ROM_QSTR(MP_QSTR_timestamp), MP_ROM_PTR(&gnss_timestamp_obj) }, + { MP_ROM_QSTR(MP_QSTR_fix), MP_ROM_PTR(&gnss_fix_obj) } +}; +STATIC MP_DEFINE_CONST_DICT(gnss_locals_dict, gnss_locals_dict_table); + +const mp_obj_type_t gnss_type = { + { &mp_type_type }, + .name = MP_QSTR_GNSS, + .make_new = gnss_make_new, + .locals_dict = (mp_obj_dict_t*)&gnss_locals_dict, +}; diff --git a/shared-bindings/gnss/GNSS.h b/shared-bindings/gnss/GNSS.h new file mode 100644 index 000000000..61ae35b12 --- /dev/null +++ b/shared-bindings/gnss/GNSS.h @@ -0,0 +1,49 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_GNSS_GNSS_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_GNSS_GNSS_H + +#include "common-hal/gnss/GNSS.h" +#include "shared-bindings/gnss/SatelliteSystem.h" +#include "shared-bindings/gnss/PositionFix.h" + +#include "lib/timeutils/timeutils.h" + +extern const mp_obj_type_t gnss_type; + +void common_hal_gnss_construct(gnss_obj_t *self, unsigned long selection); +void common_hal_gnss_deinit(gnss_obj_t *self); +bool common_hal_gnss_deinited(gnss_obj_t *self); +void common_hal_gnss_update(gnss_obj_t *self); + +mp_float_t common_hal_gnss_get_latitude(gnss_obj_t *self); +mp_float_t common_hal_gnss_get_longitude(gnss_obj_t *self); +mp_float_t common_hal_gnss_get_altitude(gnss_obj_t *self); +void common_hal_gnss_get_timestamp(gnss_obj_t *self, timeutils_struct_time_t *tm); +gnss_positionfix_t common_hal_gnss_get_fix(gnss_obj_t *self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_GNSS_GNSS_H diff --git a/shared-bindings/gnss/PositionFix.c b/shared-bindings/gnss/PositionFix.c new file mode 100644 index 000000000..106a28c34 --- /dev/null +++ b/shared-bindings/gnss/PositionFix.c @@ -0,0 +1,108 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/gnss/PositionFix.h" + +//| class PositionFix: +//| """Position fix mode""" +//| +//| def __init__(self, ): +//| """Enum-like class to define the position fix mode.""" +//| +//| INVALID: Any = ... +//| """No measurement. +//| +//| :type gnss.PositionFix:""" +//| +//| FIX_2D: Any = ... +//| """2D fix. +//| +//| :type gnss.PositionFix:""" +//| +//| FIX_3D: Any = ... +//| """3D fix. +//| +//| :type gnss.PositionFix:""" +//| +const mp_obj_type_t gnss_positionfix_type; + +const gnss_positionfix_obj_t gnss_positionfix_invalid_obj = { + { &gnss_positionfix_type }, +}; + +const gnss_positionfix_obj_t gnss_positionfix_fix2d_obj = { + { &gnss_positionfix_type }, +}; + +const gnss_positionfix_obj_t gnss_positionfix_fix3d_obj = { + { &gnss_positionfix_type }, +}; + +gnss_positionfix_t gnss_positionfix_obj_to_type(mp_obj_t obj) { + gnss_positionfix_t posfix = POSITIONFIX_INVALID; + if (obj == MP_ROM_PTR(&gnss_positionfix_fix2d_obj)) { + posfix = POSITIONFIX_2D; + } else if (obj == MP_ROM_PTR(&gnss_positionfix_fix3d_obj)) { + posfix = POSITIONFIX_3D; + } + return posfix; +} + +mp_obj_t gnss_positionfix_type_to_obj(gnss_positionfix_t posfix) { + switch (posfix) { + case POSITIONFIX_2D: + return (mp_obj_t)MP_ROM_PTR(&gnss_positionfix_fix2d_obj); + case POSITIONFIX_3D: + return (mp_obj_t)MP_ROM_PTR(&gnss_positionfix_fix3d_obj); + case POSITIONFIX_INVALID: + default: + return (mp_obj_t)MP_ROM_PTR(&gnss_positionfix_invalid_obj); + } +} + +STATIC const mp_rom_map_elem_t gnss_positionfix_locals_dict_table[] = { + {MP_ROM_QSTR(MP_QSTR_INVALID), MP_ROM_PTR(&gnss_positionfix_invalid_obj)}, + {MP_ROM_QSTR(MP_QSTR_FIX_2D), MP_ROM_PTR(&gnss_positionfix_fix2d_obj)}, + {MP_ROM_QSTR(MP_QSTR_FIX_3D), MP_ROM_PTR(&gnss_positionfix_fix3d_obj)}, +}; +STATIC MP_DEFINE_CONST_DICT(gnss_positionfix_locals_dict, gnss_positionfix_locals_dict_table); + +STATIC void gnss_positionfix_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { + qstr posfix = MP_QSTR_INVALID; + if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&gnss_positionfix_fix2d_obj)) { + posfix = MP_QSTR_FIX_2D; + } else if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&gnss_positionfix_fix3d_obj)) { + posfix = MP_QSTR_FIX_3D; + } + mp_printf(print, "%q.%q.%q", MP_QSTR_gnss, MP_QSTR_PositionFix, posfix); +} + +const mp_obj_type_t gnss_positionfix_type = { + { &mp_type_type }, + .name = MP_QSTR_PositionFix, + .print = gnss_positionfix_print, + .locals_dict = (mp_obj_t)&gnss_positionfix_locals_dict, +}; diff --git a/extmod/machine_spi.h b/shared-bindings/gnss/PositionFix.h index 365b44d6e..64497cb59 100644 --- a/extmod/machine_spi.h +++ b/shared-bindings/gnss/PositionFix.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Damien P. George + * Copyright 2020 Sony Semiconductor Solutions Corporation * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,36 +23,28 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. */ -#ifndef MICROPY_INCLUDED_EXTMOD_MACHINE_SPI_H -#define MICROPY_INCLUDED_EXTMOD_MACHINE_SPI_H -#include "py/obj.h" -#include "py/proto.h" -#include "py/mphal.h" -#include "drivers/bus/spi.h" +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_GNSS_POSITIONFIX_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_GNSS_POSITIONFIX_H -// SPI protocol -typedef struct _mp_machine_spi_p_t { - MP_PROTOCOL_HEAD - void (*init)(mp_obj_base_t *obj, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args); - void (*deinit)(mp_obj_base_t *obj); // can be NULL - void (*transfer)(mp_obj_base_t *obj, size_t len, const uint8_t *src, uint8_t *dest); -} mp_machine_spi_p_t; +#include "py/obj.h" -typedef struct _mp_machine_soft_spi_obj_t { - mp_obj_base_t base; - mp_soft_spi_obj_t spi; -} mp_machine_soft_spi_obj_t; +typedef enum { + POSITIONFIX_INVALID, + POSITIONFIX_2D, + POSITIONFIX_3D, +} gnss_positionfix_t; -extern const mp_machine_spi_p_t mp_machine_soft_spi_p; -extern const mp_obj_type_t mp_machine_soft_spi_type; -extern const mp_obj_dict_t mp_machine_spi_locals_dict; +const mp_obj_type_t gnss_positionfix_type; -mp_obj_t mp_machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args); +gnss_positionfix_t gnss_positionfix_obj_to_type(mp_obj_t obj); +mp_obj_t gnss_positionfix_type_to_obj(gnss_positionfix_t mode); -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_read_obj); -MP_DECLARE_CONST_FUN_OBJ_VAR_BETWEEN(mp_machine_spi_readinto_obj); -MP_DECLARE_CONST_FUN_OBJ_2(mp_machine_spi_write_obj); -MP_DECLARE_CONST_FUN_OBJ_3(mp_machine_spi_write_readinto_obj); +typedef struct { + mp_obj_base_t base; +} gnss_positionfix_obj_t; +extern const gnss_positionfix_obj_t gnss_positionfix_invalid_obj; +extern const gnss_positionfix_obj_t gnss_positionfix_fix2d_obj; +extern const gnss_positionfix_obj_t gnss_positionfix_fix3d_obj; -#endif // MICROPY_INCLUDED_EXTMOD_MACHINE_SPI_H +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_GNSS_POSITIONFIX_H diff --git a/shared-bindings/gnss/SatelliteSystem.c b/shared-bindings/gnss/SatelliteSystem.c new file mode 100644 index 000000000..badc02b96 --- /dev/null +++ b/shared-bindings/gnss/SatelliteSystem.c @@ -0,0 +1,145 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/gnss/SatelliteSystem.h" + +//| class SatelliteSystem: +//| """Satellite system type""" +//| +//| def __init__(self, ): +//| """Enum-like class to define the satellite system type.""" +//| +//| GPS: Any = ... +//| """Global Positioning System. +//| +//| :type gnss.SatelliteSystem:""" +//| +//| GLONASS: Any = ... +//| """GLObal NAvigation Satellite System. +//| +//| :type gnss.SatelliteSystem:""" +//| +//| SBAS: Any = ... +//| """Satellite Based Augmentation System. +//| +//| :type gnss.SatelliteSystem:""" +//| +//| QZSS_L1CA: Any = ... +//| """Quasi-Zenith Satellite System L1C/A. +//| +//| :type gnss.SatelliteSystem:""" +//| +//| QZSS_L1S: Any = ... +//| """Quasi-Zenith Satellite System L1S. +//| +//| :type gnss.SatelliteSystem:""" +//| +const mp_obj_type_t gnss_satellitesystem_type; + +const gnss_satellitesystem_obj_t gnss_satellitesystem_gps_obj = { + { &gnss_satellitesystem_type }, +}; + +const gnss_satellitesystem_obj_t gnss_satellitesystem_glonass_obj = { + { &gnss_satellitesystem_type }, +}; + +const gnss_satellitesystem_obj_t gnss_satellitesystem_sbas_obj = { + { &gnss_satellitesystem_type }, +}; + +const gnss_satellitesystem_obj_t gnss_satellitesystem_qzss_l1ca_obj = { + { &gnss_satellitesystem_type }, +}; + +const gnss_satellitesystem_obj_t gnss_satellitesystem_qzss_l1s_obj = { + { &gnss_satellitesystem_type }, +}; + +gnss_satellitesystem_t gnss_satellitesystem_obj_to_type(mp_obj_t obj) { + if (obj == MP_ROM_PTR(&gnss_satellitesystem_gps_obj)) { + return SATELLITESYSTEM_GPS; + } else if (obj == MP_ROM_PTR(&gnss_satellitesystem_glonass_obj)) { + return SATELLITESYSTEM_GLONASS; + } else if (obj == MP_ROM_PTR(&gnss_satellitesystem_sbas_obj)) { + return SATELLITESYSTEM_SBAS; + } else if (obj == MP_ROM_PTR(&gnss_satellitesystem_qzss_l1ca_obj)) { + return SATELLITESYSTEM_QZSS_L1CA; + } else if (obj == MP_ROM_PTR(&gnss_satellitesystem_qzss_l1s_obj)) { + return SATELLITESYSTEM_QZSS_L1S; + } + return SATELLITESYSTEM_NONE; +} + +mp_obj_t gnss_satellitesystem_type_to_obj(gnss_satellitesystem_t system) { + switch (system) { + case SATELLITESYSTEM_GPS: + return (mp_obj_t)MP_ROM_PTR(&gnss_satellitesystem_gps_obj); + case SATELLITESYSTEM_GLONASS: + return (mp_obj_t)MP_ROM_PTR(&gnss_satellitesystem_glonass_obj); + case SATELLITESYSTEM_SBAS: + return (mp_obj_t)MP_ROM_PTR(&gnss_satellitesystem_sbas_obj); + case SATELLITESYSTEM_QZSS_L1CA: + return (mp_obj_t)MP_ROM_PTR(&gnss_satellitesystem_qzss_l1ca_obj); + case SATELLITESYSTEM_QZSS_L1S: + return (mp_obj_t)MP_ROM_PTR(&gnss_satellitesystem_qzss_l1s_obj); + case SATELLITESYSTEM_NONE: + default: + return (mp_obj_t)MP_ROM_PTR(&mp_const_none_obj); + } +} + +STATIC const mp_rom_map_elem_t gnss_satellitesystem_locals_dict_table[] = { + {MP_ROM_QSTR(MP_QSTR_GPS), MP_ROM_PTR(&gnss_satellitesystem_gps_obj)}, + {MP_ROM_QSTR(MP_QSTR_GLONASS), MP_ROM_PTR(&gnss_satellitesystem_glonass_obj)}, + {MP_ROM_QSTR(MP_QSTR_SBAS), MP_ROM_PTR(&gnss_satellitesystem_sbas_obj)}, + {MP_ROM_QSTR(MP_QSTR_QZSS_L1CA), MP_ROM_PTR(&gnss_satellitesystem_qzss_l1ca_obj)}, + {MP_ROM_QSTR(MP_QSTR_QZSS_L1S), MP_ROM_PTR(&gnss_satellitesystem_qzss_l1s_obj)}, +}; +STATIC MP_DEFINE_CONST_DICT(gnss_satellitesystem_locals_dict, gnss_satellitesystem_locals_dict_table); + +STATIC void gnss_satellitesystem_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { + qstr system = MP_QSTR_None; + if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&gnss_satellitesystem_gps_obj)) { + system = MP_QSTR_GPS; + } else if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&gnss_satellitesystem_glonass_obj)) { + system = MP_QSTR_GLONASS; + } else if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&gnss_satellitesystem_sbas_obj)) { + system = MP_QSTR_SBAS; + } else if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&gnss_satellitesystem_qzss_l1ca_obj)) { + system = MP_QSTR_QZSS_L1CA; + } else if (MP_OBJ_TO_PTR(self_in) == MP_ROM_PTR(&gnss_satellitesystem_qzss_l1s_obj)) { + system = MP_QSTR_QZSS_L1S; + } + mp_printf(print, "%q.%q.%q", MP_QSTR_gnss, MP_QSTR_SatelliteSystem, system); +} + +const mp_obj_type_t gnss_satellitesystem_type = { + { &mp_type_type }, + .name = MP_QSTR_SatelliteSystem, + .print = gnss_satellitesystem_print, + .locals_dict = (mp_obj_t)&gnss_satellitesystem_locals_dict, +}; diff --git a/shared-bindings/gnss/SatelliteSystem.h b/shared-bindings/gnss/SatelliteSystem.h new file mode 100644 index 000000000..484e861ab --- /dev/null +++ b/shared-bindings/gnss/SatelliteSystem.h @@ -0,0 +1,55 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_GNSS_SATELLITESYSTEM_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_GNSS_SATELLITESYSTEM_H + +#include "py/obj.h" + +typedef enum { + SATELLITESYSTEM_NONE = 0, + SATELLITESYSTEM_GPS = (1U << 0), + SATELLITESYSTEM_GLONASS = (1U << 1), + SATELLITESYSTEM_SBAS = (1U << 2), + SATELLITESYSTEM_QZSS_L1CA = (1U << 3), + SATELLITESYSTEM_QZSS_L1S = (1U << 4), +} gnss_satellitesystem_t; + +const mp_obj_type_t gnss_satellitesystem_type; + +gnss_satellitesystem_t gnss_satellitesystem_obj_to_type(mp_obj_t obj); +mp_obj_t gnss_satellitesystem_type_to_obj(gnss_satellitesystem_t mode); + +typedef struct { + mp_obj_base_t base; +} gnss_satellitesystem_obj_t; +extern const gnss_satellitesystem_obj_t gnss_satellitesystem_gps_obj; +extern const gnss_satellitesystem_obj_t gnss_satellitesystem_glonass_obj; +extern const gnss_satellitesystem_obj_t gnss_satellitesystem_sbas_obj; +extern const gnss_satellitesystem_obj_t gnss_satellitesystem_qzss_l1ca_obj; +extern const gnss_satellitesystem_obj_t gnss_satellitesystem_qzss_l1s_obj; + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_GNSS_SATELLITESYSTEM_H diff --git a/shared-bindings/gnss/__init__.c b/shared-bindings/gnss/__init__.c new file mode 100644 index 000000000..b3cf722f1 --- /dev/null +++ b/shared-bindings/gnss/__init__.c @@ -0,0 +1,53 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright 2020 Sony Semiconductor Solutions Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/runtime.h" +#include "py/mphal.h" +#include "shared-bindings/gnss/GNSS.h" +#include "shared-bindings/gnss/SatelliteSystem.h" +#include "shared-bindings/gnss/PositionFix.h" +#include "shared-bindings/util.h" + +//| """Global Navigation Satellite System +//| +//| The `gnss` module contains classes to control the GNSS and acquire positioning information.""" +//| +STATIC const mp_rom_map_elem_t gnss_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_gnss) }, + { MP_ROM_QSTR(MP_QSTR_GNSS), MP_ROM_PTR(&gnss_type) }, + + // Enum-like Classes. + { MP_ROM_QSTR(MP_QSTR_SatelliteSystem), MP_ROM_PTR(&gnss_satellitesystem_type) }, + { MP_ROM_QSTR(MP_QSTR_PositionFix), MP_ROM_PTR(&gnss_positionfix_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(gnss_module_globals, gnss_module_globals_table); + +const mp_obj_module_t gnss_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&gnss_module_globals, +}; diff --git a/shared-bindings/i2cslave/I2CSlave.c b/shared-bindings/i2cperipheral/I2CPeripheral.c index 80875ce75..4a3900174 100644 --- a/shared-bindings/i2cslave/I2CSlave.c +++ b/shared-bindings/i2cperipheral/I2CPeripheral.c @@ -25,7 +25,7 @@ */ #include "shared-bindings/microcontroller/Pin.h" -#include "shared-bindings/i2cslave/I2CSlave.h" +#include "shared-bindings/i2cperipheral/I2CPeripheral.h" #include "shared-bindings/time/__init__.h" #include "shared-bindings/util.h" @@ -39,22 +39,22 @@ #include "py/objproperty.h" #include "py/runtime.h" -STATIC mp_obj_t mp_obj_new_i2cslave_i2c_slave_request(i2cslave_i2c_slave_obj_t *slave, uint8_t address, bool is_read, bool is_restart) { - i2cslave_i2c_slave_request_obj_t *self = m_new_obj(i2cslave_i2c_slave_request_obj_t); - self->base.type = &i2cslave_i2c_slave_request_type; - self->slave = slave; +STATIC mp_obj_t mp_obj_new_i2cperipheral_i2c_peripheral_request(i2cperipheral_i2c_peripheral_obj_t *peripheral, uint8_t address, bool is_read, bool is_restart) { + i2cperipheral_i2c_peripheral_request_obj_t *self = m_new_obj(i2cperipheral_i2c_peripheral_request_obj_t); + self->base.type = &i2cperipheral_i2c_peripheral_request_type; + self->peripheral = peripheral; self->address = address; self->is_read = is_read; self->is_restart = is_restart; return (mp_obj_t)self; } -//| class I2CSlave: -//| """Two wire serial protocol slave""" +//| class I2CPeripheral: +//| """Two wire serial protocol peripheral""" //| //| def __init__(self, scl: microcontroller.Pin, sda: microcontroller.Pin, addresses: tuple, smbus: bool = False): //| """I2C is a two-wire protocol for communicating between devices. -//| This implements the slave side. +//| This implements the peripheral (sensor, secondary) side. //| //| :param ~microcontroller.Pin scl: The clock pin //| :param ~microcontroller.Pin sda: The data pin @@ -62,9 +62,9 @@ STATIC mp_obj_t mp_obj_new_i2cslave_i2c_slave_request(i2cslave_i2c_slave_obj_t * //| :param bool smbus: Use SMBUS timings if the hardware supports it""" //| ... //| -STATIC mp_obj_t i2cslave_i2c_slave_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - i2cslave_i2c_slave_obj_t *self = m_new_obj(i2cslave_i2c_slave_obj_t); - self->base.type = &i2cslave_i2c_slave_type; +STATIC mp_obj_t i2cperipheral_i2c_peripheral_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + i2cperipheral_i2c_peripheral_obj_t *self = m_new_obj(i2cperipheral_i2c_peripheral_obj_t); + self->base.type = &i2cperipheral_i2c_peripheral_type; enum { ARG_scl, ARG_sda, ARG_addresses, ARG_smbus }; static const mp_arg_t allowed_args[] = { { MP_QSTR_scl, MP_ARG_REQUIRED | MP_ARG_OBJ }, @@ -98,7 +98,7 @@ STATIC mp_obj_t i2cslave_i2c_slave_make_new(const mp_obj_type_t *type, size_t n_ mp_raise_ValueError(translate("addresses is empty")); } - common_hal_i2cslave_i2c_slave_construct(self, scl, sda, addresses, i, args[ARG_smbus].u_bool); + common_hal_i2cperipheral_i2c_peripheral_construct(self, scl, sda, addresses, i, args[ARG_smbus].u_bool); return (mp_obj_t)self; } @@ -106,13 +106,13 @@ STATIC mp_obj_t i2cslave_i2c_slave_make_new(const mp_obj_type_t *type, size_t n_ //| """Releases control of the underlying hardware so other classes can use it.""" //| ... //| -STATIC mp_obj_t i2cslave_i2c_slave_obj_deinit(mp_obj_t self_in) { - mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cslave_i2c_slave_type)); - i2cslave_i2c_slave_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_i2cslave_i2c_slave_deinit(self); +STATIC mp_obj_t i2cperipheral_i2c_peripheral_obj_deinit(mp_obj_t self_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cperipheral_i2c_peripheral_type)); + i2cperipheral_i2c_peripheral_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_i2cperipheral_i2c_peripheral_deinit(self); return mp_const_none; } -MP_DEFINE_CONST_FUN_OBJ_1(i2cslave_i2c_slave_deinit_obj, i2cslave_i2c_slave_obj_deinit); +MP_DEFINE_CONST_FUN_OBJ_1(i2cperipheral_i2c_peripheral_deinit_obj, i2cperipheral_i2c_peripheral_obj_deinit); //| def __enter__(self, ) -> Any: //| """No-op used in Context Managers.""" @@ -125,25 +125,25 @@ MP_DEFINE_CONST_FUN_OBJ_1(i2cslave_i2c_slave_deinit_obj, i2cslave_i2c_slave_obj_ //| :ref:`lifetime-and-contextmanagers` for more info.""" //| ... //| -STATIC mp_obj_t i2cslave_i2c_slave_obj___exit__(size_t n_args, const mp_obj_t *args) { - mp_check_self(MP_OBJ_IS_TYPE(args[0], &i2cslave_i2c_slave_type)); - i2cslave_i2c_slave_obj_t *self = MP_OBJ_TO_PTR(args[0]); - common_hal_i2cslave_i2c_slave_deinit(self); +STATIC mp_obj_t i2cperipheral_i2c_peripheral_obj___exit__(size_t n_args, const mp_obj_t *args) { + mp_check_self(MP_OBJ_IS_TYPE(args[0], &i2cperipheral_i2c_peripheral_type)); + i2cperipheral_i2c_peripheral_obj_t *self = MP_OBJ_TO_PTR(args[0]); + common_hal_i2cperipheral_i2c_peripheral_deinit(self); return mp_const_none; } -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(i2cslave_i2c_slave___exit___obj, 4, 4, i2cslave_i2c_slave_obj___exit__); +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(i2cperipheral_i2c_peripheral___exit___obj, 4, 4, i2cperipheral_i2c_peripheral_obj___exit__); //| def request(self, timeout: float = -1) -> Any: -//| """Wait for an I2C request from a master. +//| """Wait for an I2C request. //| //| :param float timeout: Timeout in seconds. Zero means wait forever, a negative value means check once //| :return: I2C Slave Request or None if timeout=-1 and there's no request -//| :rtype: ~i2cslave.I2CSlaveRequest""" +//| :rtype: ~i2cperipheral.I2CPeripheralRequest""" //| -STATIC mp_obj_t i2cslave_i2c_slave_request(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_check_self(MP_OBJ_IS_TYPE(pos_args[0], &i2cslave_i2c_slave_type)); - i2cslave_i2c_slave_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); - if(common_hal_i2cslave_i2c_slave_deinited(self)) { +STATIC mp_obj_t i2cperipheral_i2c_peripheral_request(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + mp_check_self(MP_OBJ_IS_TYPE(pos_args[0], &i2cperipheral_i2c_peripheral_type)); + i2cperipheral_i2c_peripheral_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + if(common_hal_i2cperipheral_i2c_peripheral_deinited(self)) { raise_deinited_error(); } enum { ARG_timeout }; @@ -180,7 +180,7 @@ STATIC mp_obj_t i2cslave_i2c_slave_request(size_t n_args, const mp_obj_t *pos_ar return mp_const_none; } - int status = common_hal_i2cslave_i2c_slave_is_addressed(self, &address, &is_read, &is_restart); + int status = common_hal_i2cperipheral_i2c_peripheral_is_addressed(self, &address, &is_read, &is_restart); if (status < 0) { // On error try one more time before bailing out if (last_error) { @@ -198,7 +198,7 @@ STATIC mp_obj_t i2cslave_i2c_slave_request(size_t n_args, const mp_obj_t *pos_ar continue; } - return mp_obj_new_i2cslave_i2c_slave_request(self, address, is_read, is_restart); + return mp_obj_new_i2cperipheral_i2c_peripheral_request(self, address, is_read, is_restart); } while (forever || common_hal_time_monotonic() < timeout_end); if (timeout_ms > 0) { @@ -206,39 +206,39 @@ STATIC mp_obj_t i2cslave_i2c_slave_request(size_t n_args, const mp_obj_t *pos_ar } return mp_const_none; } -STATIC MP_DEFINE_CONST_FUN_OBJ_KW(i2cslave_i2c_slave_request_obj, 1, i2cslave_i2c_slave_request); +STATIC MP_DEFINE_CONST_FUN_OBJ_KW(i2cperipheral_i2c_peripheral_request_obj, 1, i2cperipheral_i2c_peripheral_request); -STATIC const mp_rom_map_elem_t i2cslave_i2c_slave_locals_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&i2cslave_i2c_slave_deinit_obj) }, +STATIC const mp_rom_map_elem_t i2cperipheral_i2c_peripheral_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&i2cperipheral_i2c_peripheral_deinit_obj) }, { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, - { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&i2cslave_i2c_slave___exit___obj) }, - { MP_ROM_QSTR(MP_QSTR_request), MP_ROM_PTR(&i2cslave_i2c_slave_request_obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&i2cperipheral_i2c_peripheral___exit___obj) }, + { MP_ROM_QSTR(MP_QSTR_request), MP_ROM_PTR(&i2cperipheral_i2c_peripheral_request_obj) }, }; -STATIC MP_DEFINE_CONST_DICT(i2cslave_i2c_slave_locals_dict, i2cslave_i2c_slave_locals_dict_table); +STATIC MP_DEFINE_CONST_DICT(i2cperipheral_i2c_peripheral_locals_dict, i2cperipheral_i2c_peripheral_locals_dict_table); -const mp_obj_type_t i2cslave_i2c_slave_type = { +const mp_obj_type_t i2cperipheral_i2c_peripheral_type = { { &mp_type_type }, - .name = MP_QSTR_I2CSlave, - .make_new = i2cslave_i2c_slave_make_new, - .locals_dict = (mp_obj_dict_t*)&i2cslave_i2c_slave_locals_dict, + .name = MP_QSTR_I2CPeripheral, + .make_new = i2cperipheral_i2c_peripheral_make_new, + .locals_dict = (mp_obj_dict_t*)&i2cperipheral_i2c_peripheral_locals_dict, }; -//| class I2CSlaveRequest: +//| class I2CPeripheralRequest: //| -//| def __init__(self, slave: i2cslave.I2CSlave, address: int, is_read: bool, is_restart: bool): -//| """I2C transfer request from a master. -//| This cannot be instantiated directly, but is returned by :py:meth:`I2CSlave.request`. +//| def __init__(self, peripheral: i2cperipheral.I2CPeripheral, address: int, is_read: bool, is_restart: bool): +//| """Information about an I2C transfer request +//| This cannot be instantiated directly, but is returned by :py:meth:`I2CPeripheral.request`. //| -//| :param slave: The I2C Slave receiving this request +//| :param peripheral: The I2CPeripheral object receiving this request //| :param address: I2C address -//| :param is_read: I2C Master read request +//| :param is_read: True if the main peripheral is requesting data //| :param is_restart: Repeated Start Condition""" //| -STATIC mp_obj_t i2cslave_i2c_slave_request_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { +STATIC mp_obj_t i2cperipheral_i2c_peripheral_request_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) { mp_arg_check_num(n_args, kw_args, 4, 4, false); - return mp_obj_new_i2cslave_i2c_slave_request(args[0], mp_obj_get_int(args[1]), mp_obj_is_true(args[2]), mp_obj_is_true(args[3])); + return mp_obj_new_i2cperipheral_i2c_peripheral_request(args[0], mp_obj_get_int(args[1]), mp_obj_is_true(args[2]), mp_obj_is_true(args[3])); } //| def __enter__(self, ) -> Any: @@ -251,56 +251,56 @@ STATIC mp_obj_t i2cslave_i2c_slave_request_make_new(const mp_obj_type_t *type, s //| """Close the request.""" //| ... //| -STATIC mp_obj_t i2cslave_i2c_slave_request_obj___exit__(size_t n_args, const mp_obj_t *args) { - mp_check_self(MP_OBJ_IS_TYPE(args[0], &i2cslave_i2c_slave_request_type)); - i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(args[0]); - common_hal_i2cslave_i2c_slave_close(self->slave); +STATIC mp_obj_t i2cperipheral_i2c_peripheral_request_obj___exit__(size_t n_args, const mp_obj_t *args) { + mp_check_self(MP_OBJ_IS_TYPE(args[0], &i2cperipheral_i2c_peripheral_request_type)); + i2cperipheral_i2c_peripheral_request_obj_t *self = MP_OBJ_TO_PTR(args[0]); + common_hal_i2cperipheral_i2c_peripheral_close(self->peripheral); return mp_const_none; } -STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(i2cslave_i2c_slave_request___exit___obj, 4, 4, i2cslave_i2c_slave_request_obj___exit__); +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(i2cperipheral_i2c_peripheral_request___exit___obj, 4, 4, i2cperipheral_i2c_peripheral_request_obj___exit__); //| address: int = ... //| """The I2C address of the request.""" //| -STATIC mp_obj_t i2cslave_i2c_slave_request_get_address(mp_obj_t self_in) { - mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cslave_i2c_slave_request_type)); - i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(self_in); +STATIC mp_obj_t i2cperipheral_i2c_peripheral_request_get_address(mp_obj_t self_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cperipheral_i2c_peripheral_request_type)); + i2cperipheral_i2c_peripheral_request_obj_t *self = MP_OBJ_TO_PTR(self_in); return mp_obj_new_int(self->address); } -MP_DEFINE_CONST_PROP_GET(i2cslave_i2c_slave_request_address_obj, i2cslave_i2c_slave_request_get_address); +MP_DEFINE_CONST_PROP_GET(i2cperipheral_i2c_peripheral_request_address_obj, i2cperipheral_i2c_peripheral_request_get_address); //| is_read: bool = ... -//| """The I2C master is reading from the device.""" +//| """The I2C main controller is reading from this peripheral.""" //| -STATIC mp_obj_t i2cslave_i2c_slave_request_get_is_read(mp_obj_t self_in) { - mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cslave_i2c_slave_request_type)); - i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(self_in); +STATIC mp_obj_t i2cperipheral_i2c_peripheral_request_get_is_read(mp_obj_t self_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cperipheral_i2c_peripheral_request_type)); + i2cperipheral_i2c_peripheral_request_obj_t *self = MP_OBJ_TO_PTR(self_in); return mp_obj_new_bool(self->is_read); } -MP_DEFINE_CONST_PROP_GET(i2cslave_i2c_slave_request_is_read_obj, i2cslave_i2c_slave_request_get_is_read); +MP_DEFINE_CONST_PROP_GET(i2cperipheral_i2c_peripheral_request_is_read_obj, i2cperipheral_i2c_peripheral_request_get_is_read); //| is_restart: bool = ... //| """Is Repeated Start Condition.""" //| -STATIC mp_obj_t i2cslave_i2c_slave_request_get_is_restart(mp_obj_t self_in) { - mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cslave_i2c_slave_request_type)); - i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(self_in); +STATIC mp_obj_t i2cperipheral_i2c_peripheral_request_get_is_restart(mp_obj_t self_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cperipheral_i2c_peripheral_request_type)); + i2cperipheral_i2c_peripheral_request_obj_t *self = MP_OBJ_TO_PTR(self_in); return mp_obj_new_bool(self->is_restart); } -MP_DEFINE_CONST_PROP_GET(i2cslave_i2c_slave_request_is_restart_obj, i2cslave_i2c_slave_request_get_is_restart); +MP_DEFINE_CONST_PROP_GET(i2cperipheral_i2c_peripheral_request_is_restart_obj, i2cperipheral_i2c_peripheral_request_get_is_restart); //| def read(self, n: int = -1, ack: bool = True) -> bytearray: //| """Read data. -//| If ack=False, the caller is responsible for calling :py:meth:`I2CSlaveRequest.ack`. +//| If ack=False, the caller is responsible for calling :py:meth:`I2CPeripheralRequest.ack`. //| //| :param n: Number of bytes to read (negative means all) //| :param ack: Whether or not to send an ACK after the n'th byte //| :return: Bytes read""" //| ... //| -STATIC mp_obj_t i2cslave_i2c_slave_request_read(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { - mp_check_self(MP_OBJ_IS_TYPE(pos_args[0], &i2cslave_i2c_slave_request_type)); - i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); +STATIC mp_obj_t i2cperipheral_i2c_peripheral_request_read(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + mp_check_self(MP_OBJ_IS_TYPE(pos_args[0], &i2cperipheral_i2c_peripheral_request_type)); + i2cperipheral_i2c_peripheral_request_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); enum { ARG_n, ARG_ack }; static const mp_arg_t allowed_args[] = { { MP_QSTR_n, MP_ARG_INT, {.u_int = -1} }, @@ -329,7 +329,7 @@ STATIC mp_obj_t i2cslave_i2c_slave_request_read(size_t n_args, const mp_obj_t *p } uint8_t data; - int num = common_hal_i2cslave_i2c_slave_read_byte(self->slave, &data); + int num = common_hal_i2cperipheral_i2c_peripheral_read_byte(self->peripheral, &data); if (num == 0) { break; } @@ -338,16 +338,16 @@ STATIC mp_obj_t i2cslave_i2c_slave_request_read(size_t n_args, const mp_obj_t *p buffer[i++] = data; if (i == n) { if (ack) { - common_hal_i2cslave_i2c_slave_ack(self->slave, true); + common_hal_i2cperipheral_i2c_peripheral_ack(self->peripheral, true); } break; } - common_hal_i2cslave_i2c_slave_ack(self->slave, true); + common_hal_i2cperipheral_i2c_peripheral_ack(self->peripheral, true); } return mp_obj_new_bytearray(i, buffer); } -MP_DEFINE_CONST_FUN_OBJ_KW(i2cslave_i2c_slave_request_read_obj, 1, i2cslave_i2c_slave_request_read); +MP_DEFINE_CONST_FUN_OBJ_KW(i2cperipheral_i2c_peripheral_request_read_obj, 1, i2cperipheral_i2c_peripheral_request_read); //| def write(self, buffer: bytearray) -> int: //| """Write the data contained in buffer. @@ -356,9 +356,9 @@ MP_DEFINE_CONST_FUN_OBJ_KW(i2cslave_i2c_slave_request_read_obj, 1, i2cslave_i2c_ //| :return: Number of bytes written""" //| ... //| -STATIC mp_obj_t i2cslave_i2c_slave_request_write(mp_obj_t self_in, mp_obj_t buf_in) { - mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cslave_i2c_slave_request_type)); - i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(self_in); +STATIC mp_obj_t i2cperipheral_i2c_peripheral_request_write(mp_obj_t self_in, mp_obj_t buf_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cperipheral_i2c_peripheral_request_type)); + i2cperipheral_i2c_peripheral_request_obj_t *self = MP_OBJ_TO_PTR(self_in); if (!self->is_read) { mp_raise_OSError(MP_EACCES); @@ -373,7 +373,7 @@ STATIC mp_obj_t i2cslave_i2c_slave_request_write(mp_obj_t self_in, mp_obj_t buf_ break; } - int num = common_hal_i2cslave_i2c_slave_write_byte(self->slave, ((uint8_t *)(bufinfo.buf))[i]); + int num = common_hal_i2cperipheral_i2c_peripheral_write_byte(self->peripheral, ((uint8_t *)(bufinfo.buf))[i]); if (num == 0) { return mp_obj_new_int(i); } @@ -381,55 +381,55 @@ STATIC mp_obj_t i2cslave_i2c_slave_request_write(mp_obj_t self_in, mp_obj_t buf_ return mp_obj_new_int(bufinfo.len); } -STATIC MP_DEFINE_CONST_FUN_OBJ_2(i2cslave_i2c_slave_request_write_obj, i2cslave_i2c_slave_request_write); +STATIC MP_DEFINE_CONST_FUN_OBJ_2(i2cperipheral_i2c_peripheral_request_write_obj, i2cperipheral_i2c_peripheral_request_write); //| def ack(self, ack: bool = True) -> Any: //| """Acknowledge or Not Acknowledge last byte received. -//| Use together with :py:meth:`I2CSlaveRequest.read` ack=False. +//| Use together with :py:meth:`I2CPeripheralRequest.read` ack=False. //| //| :param ack: Whether to send an ACK or NACK""" //| ... //| -STATIC mp_obj_t i2cslave_i2c_slave_request_ack(uint n_args, const mp_obj_t *args) { - mp_check_self(MP_OBJ_IS_TYPE(args[0], &i2cslave_i2c_slave_request_type)); - i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(args[0]); +STATIC mp_obj_t i2cperipheral_i2c_peripheral_request_ack(uint n_args, const mp_obj_t *args) { + mp_check_self(MP_OBJ_IS_TYPE(args[0], &i2cperipheral_i2c_peripheral_request_type)); + i2cperipheral_i2c_peripheral_request_obj_t *self = MP_OBJ_TO_PTR(args[0]); bool ack = (n_args == 1) ? true : mp_obj_is_true(args[1]); if (self->is_read) { mp_raise_OSError(MP_EACCES); } - common_hal_i2cslave_i2c_slave_ack(self->slave, ack); + common_hal_i2cperipheral_i2c_peripheral_ack(self->peripheral, ack); return mp_const_none; } -MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(i2cslave_i2c_slave_request_ack_obj, 1, 2, i2cslave_i2c_slave_request_ack); +MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(i2cperipheral_i2c_peripheral_request_ack_obj, 1, 2, i2cperipheral_i2c_peripheral_request_ack); -STATIC mp_obj_t i2cslave_i2c_slave_request_close(mp_obj_t self_in) { - mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cslave_i2c_slave_request_type)); - i2cslave_i2c_slave_request_obj_t *self = MP_OBJ_TO_PTR(self_in); +STATIC mp_obj_t i2cperipheral_i2c_peripheral_request_close(mp_obj_t self_in) { + mp_check_self(MP_OBJ_IS_TYPE(self_in, &i2cperipheral_i2c_peripheral_request_type)); + i2cperipheral_i2c_peripheral_request_obj_t *self = MP_OBJ_TO_PTR(self_in); - common_hal_i2cslave_i2c_slave_close(self->slave); + common_hal_i2cperipheral_i2c_peripheral_close(self->peripheral); return mp_const_none; } -STATIC MP_DEFINE_CONST_FUN_OBJ_1(i2cslave_i2c_slave_request_close_obj, i2cslave_i2c_slave_request_close); +STATIC MP_DEFINE_CONST_FUN_OBJ_1(i2cperipheral_i2c_peripheral_request_close_obj, i2cperipheral_i2c_peripheral_request_close); -STATIC const mp_rom_map_elem_t i2cslave_i2c_slave_request_locals_dict_table[] = { +STATIC const mp_rom_map_elem_t i2cperipheral_i2c_peripheral_request_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, - { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&i2cslave_i2c_slave_request___exit___obj) }, - { MP_ROM_QSTR(MP_QSTR_address), MP_ROM_PTR(&i2cslave_i2c_slave_request_address_obj) }, - { MP_ROM_QSTR(MP_QSTR_is_read), MP_ROM_PTR(&i2cslave_i2c_slave_request_is_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_is_restart), MP_ROM_PTR(&i2cslave_i2c_slave_request_is_restart_obj) }, - { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&i2cslave_i2c_slave_request_read_obj) }, - { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&i2cslave_i2c_slave_request_write_obj) }, - { MP_ROM_QSTR(MP_QSTR_ack), MP_ROM_PTR(&i2cslave_i2c_slave_request_ack_obj) }, - { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&i2cslave_i2c_slave_request_close_obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&i2cperipheral_i2c_peripheral_request___exit___obj) }, + { MP_ROM_QSTR(MP_QSTR_address), MP_ROM_PTR(&i2cperipheral_i2c_peripheral_request_address_obj) }, + { MP_ROM_QSTR(MP_QSTR_is_read), MP_ROM_PTR(&i2cperipheral_i2c_peripheral_request_is_read_obj) }, + { MP_ROM_QSTR(MP_QSTR_is_restart), MP_ROM_PTR(&i2cperipheral_i2c_peripheral_request_is_restart_obj) }, + { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&i2cperipheral_i2c_peripheral_request_read_obj) }, + { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&i2cperipheral_i2c_peripheral_request_write_obj) }, + { MP_ROM_QSTR(MP_QSTR_ack), MP_ROM_PTR(&i2cperipheral_i2c_peripheral_request_ack_obj) }, + { MP_ROM_QSTR(MP_QSTR_close), MP_ROM_PTR(&i2cperipheral_i2c_peripheral_request_close_obj) }, }; -STATIC MP_DEFINE_CONST_DICT(i2cslave_i2c_slave_request_locals_dict, i2cslave_i2c_slave_request_locals_dict_table); +STATIC MP_DEFINE_CONST_DICT(i2cperipheral_i2c_peripheral_request_locals_dict, i2cperipheral_i2c_peripheral_request_locals_dict_table); -const mp_obj_type_t i2cslave_i2c_slave_request_type = { +const mp_obj_type_t i2cperipheral_i2c_peripheral_request_type = { { &mp_type_type }, - .name = MP_QSTR_I2CSlaveRequest, - .make_new = i2cslave_i2c_slave_request_make_new, - .locals_dict = (mp_obj_dict_t*)&i2cslave_i2c_slave_request_locals_dict, + .name = MP_QSTR_I2CPeripheralRequest, + .make_new = i2cperipheral_i2c_peripheral_request_make_new, + .locals_dict = (mp_obj_dict_t*)&i2cperipheral_i2c_peripheral_request_locals_dict, }; diff --git a/shared-bindings/i2cslave/I2CSlave.h b/shared-bindings/i2cperipheral/I2CPeripheral.h index abb761416..3035cfbfe 100644 --- a/shared-bindings/i2cslave/I2CSlave.h +++ b/shared-bindings/i2cperipheral/I2CPeripheral.h @@ -30,31 +30,31 @@ #include "py/obj.h" #include "common-hal/microcontroller/Pin.h" -#include "common-hal/i2cslave/I2CSlave.h" +#include "common-hal/i2cperipheral/I2CPeripheral.h" typedef struct { mp_obj_base_t base; - i2cslave_i2c_slave_obj_t *slave; + i2cperipheral_i2c_peripheral_obj_t *peripheral; uint16_t address; bool is_read; bool is_restart; -} i2cslave_i2c_slave_request_obj_t; +} i2cperipheral_i2c_peripheral_request_obj_t; -extern const mp_obj_type_t i2cslave_i2c_slave_request_type; +extern const mp_obj_type_t i2cperipheral_i2c_peripheral_request_type; -extern const mp_obj_type_t i2cslave_i2c_slave_type; +extern const mp_obj_type_t i2cperipheral_i2c_peripheral_type; -extern void common_hal_i2cslave_i2c_slave_construct(i2cslave_i2c_slave_obj_t *self, +extern void common_hal_i2cperipheral_i2c_peripheral_construct(i2cperipheral_i2c_peripheral_obj_t *self, const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, uint8_t *addresses, unsigned int num_addresses, bool smbus); -extern void common_hal_i2cslave_i2c_slave_deinit(i2cslave_i2c_slave_obj_t *self); -extern bool common_hal_i2cslave_i2c_slave_deinited(i2cslave_i2c_slave_obj_t *self); +extern void common_hal_i2cperipheral_i2c_peripheral_deinit(i2cperipheral_i2c_peripheral_obj_t *self); +extern bool common_hal_i2cperipheral_i2c_peripheral_deinited(i2cperipheral_i2c_peripheral_obj_t *self); -extern int common_hal_i2cslave_i2c_slave_is_addressed(i2cslave_i2c_slave_obj_t *self, +extern int common_hal_i2cperipheral_i2c_peripheral_is_addressed(i2cperipheral_i2c_peripheral_obj_t *self, uint8_t *address, bool *is_read, bool *is_restart); -extern int common_hal_i2cslave_i2c_slave_read_byte(i2cslave_i2c_slave_obj_t *self, uint8_t *data); -extern int common_hal_i2cslave_i2c_slave_write_byte(i2cslave_i2c_slave_obj_t *self, uint8_t data); -extern void common_hal_i2cslave_i2c_slave_ack(i2cslave_i2c_slave_obj_t *self, bool ack); -extern void common_hal_i2cslave_i2c_slave_close(i2cslave_i2c_slave_obj_t *self); +extern int common_hal_i2cperipheral_i2c_peripheral_read_byte(i2cperipheral_i2c_peripheral_obj_t *self, uint8_t *data); +extern int common_hal_i2cperipheral_i2c_peripheral_write_byte(i2cperipheral_i2c_peripheral_obj_t *self, uint8_t data); +extern void common_hal_i2cperipheral_i2c_peripheral_ack(i2cperipheral_i2c_peripheral_obj_t *self, bool ack); +extern void common_hal_i2cperipheral_i2c_peripheral_close(i2cperipheral_i2c_peripheral_obj_t *self); #endif // MICROPY_INCLUDED_SHARED_BINDINGS_BUSIO_I2C_SLAVE_H diff --git a/shared-bindings/i2cslave/__init__.c b/shared-bindings/i2cperipheral/__init__.c index 41b42fef8..e2cb8509d 100644 --- a/shared-bindings/i2cslave/__init__.c +++ b/shared-bindings/i2cperipheral/__init__.c @@ -30,32 +30,32 @@ #include "py/runtime.h" #include "shared-bindings/microcontroller/Pin.h" -//#include "shared-bindings/i2cslave/__init__.h" -#include "shared-bindings/i2cslave/I2CSlave.h" +//#include "shared-bindings/i2cperipheral/__init__.h" +#include "shared-bindings/i2cperipheral/I2CPeripheral.h" #include "py/runtime.h" -//| """Two wire serial protocol slave +//| """Two wire serial protocol peripheral //| -//| The `i2cslave` module contains classes to support a I2C slave. +//| The `i2cperipheral` module contains classes to support an I2C peripheral. //| -//| Example emulating 2 devices:: +//| Example emulating a peripheral with 2 addresses (read and write):: //| //| import board -//| from i2cslave import I2CSlave +//| from i2cperipheral import I2CPeripheral //| //| regs = [0] * 16 //| index = 0 //| -//| with I2CSlave(board.SCL, board.SDA, (0x40, 0x41)) as slave: +//| with I2CPeripheral(board.SCL, board.SDA, (0x40, 0x41)) as device: //| while True: -//| r = slave.request() +//| r = device.request() //| if not r: //| # Maybe do some housekeeping //| continue -//| with r: # Closes the transfer if necessary by sending a NACK or feeding the master dummy bytes +//| with r: # Closes the transfer if necessary by sending a NACK or feeding dummy bytes //| if r.address == 0x40: -//| if not r.is_read: # Master write which is Slave read +//| if not r.is_read: # Main write which is Selected read //| b = r.read(1) //| if not b or b[0] > 15: //| break @@ -63,11 +63,11 @@ //| b = r.read(1) //| if b: //| regs[index] = b[0] -//| elif r.is_restart: # Combined transfer: This is the Master read message +//| elif r.is_restart: # Combined transfer: This is the Main read message //| n = r.write(bytes([regs[index]])) //| #else: //| # A read transfer is not supported in this example -//| # If the Master tries, it will get 0xff byte(s) by the ctx manager (r.close()) +//| # If the microcontroller tries, it will get 0xff byte(s) by the ctx manager (r.close()) //| elif r.address == 0x41: //| if not r.is_read: //| b = r.read(1) @@ -75,7 +75,7 @@ //| # do something //| pass //| -//| This example sets up an I2C slave that can be accessed from Linux like this:: +//| This example sets up an I2C device that can be accessed from Linux like this:: //| //| $ i2cget -y 1 0x40 0x01 //| 0x00 @@ -84,22 +84,23 @@ //| 0xaa //| //| .. warning:: -//| I2CSlave makes use of clock stretching in order to slow down the master. -//| Make sure the I2C master supports this. +//| I2CPeripheral makes use of clock stretching in order to slow down +//| the host. +//| Make sure the I2C host supports this. //| //| Raspberry Pi in particular does not support this with its I2C hw block. //| This can be worked around by using the ``i2c-gpio`` bit banging driver. //| Since the RPi firmware uses the hw i2c, it's not possible to emulate a HAT eeprom.""" //| -STATIC const mp_rom_map_elem_t i2cslave_module_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_i2cslave) }, - { MP_ROM_QSTR(MP_QSTR_I2CSlave), MP_ROM_PTR(&i2cslave_i2c_slave_type) }, +STATIC const mp_rom_map_elem_t i2cperipheral_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_i2cperipheral) }, + { MP_ROM_QSTR(MP_QSTR_I2CPeripheral), MP_ROM_PTR(&i2cperipheral_i2c_peripheral_type) }, }; -STATIC MP_DEFINE_CONST_DICT(i2cslave_module_globals, i2cslave_module_globals_table); +STATIC MP_DEFINE_CONST_DICT(i2cperipheral_module_globals, i2cperipheral_module_globals_table); -const mp_obj_module_t i2cslave_module = { +const mp_obj_module_t i2cperipheral_module = { .base = { &mp_type_module }, - .globals = (mp_obj_dict_t*)&i2cslave_module_globals, + .globals = (mp_obj_dict_t*)&i2cperipheral_module_globals, }; diff --git a/shared-bindings/index.rst b/shared-bindings/index.rst index d94177394..bf04ae18b 100644 --- a/shared-bindings/index.rst +++ b/shared-bindings/index.rst @@ -19,5 +19,5 @@ Modules :glob: :maxdepth: 2 - ../autoapi/*/index + ../shared-bindings/*/index help diff --git a/shared-bindings/microcontroller/Pin.c b/shared-bindings/microcontroller/Pin.c index 765e602e5..d5b971ae5 100644 --- a/shared-bindings/microcontroller/Pin.c +++ b/shared-bindings/microcontroller/Pin.c @@ -101,6 +101,18 @@ mcu_pin_obj_t *validate_obj_is_free_pin(mp_obj_t obj) { return pin; } +// Validate every element in the list to be a free pin. +void validate_list_is_free_pins(qstr what, mcu_pin_obj_t **pins_out, mp_int_t max_pins, mp_obj_t seq, uint8_t *count_out) { + mp_int_t len = MP_OBJ_SMALL_INT_VALUE(mp_obj_len(seq)); + if (len > max_pins) { + mp_raise_ValueError_varg(translate("At most %d %q may be specified (not %d)"), max_pins, what, len); + } + *count_out = len; + for (mp_int_t i=0; i<len; i++) { + pins_out[i] = validate_obj_is_free_pin(mp_obj_subscr(seq, MP_OBJ_NEW_SMALL_INT(i), MP_OBJ_SENTINEL)); + } +} + // Validate that the obj is a free pin or None. Return an mcu_pin_obj_t* or NULL, correspondingly. mcu_pin_obj_t *validate_obj_is_free_pin_or_none(mp_obj_t obj) { if (obj == mp_const_none) { diff --git a/shared-bindings/microcontroller/Pin.h b/shared-bindings/microcontroller/Pin.h index bb5256b55..f6659db7d 100644 --- a/shared-bindings/microcontroller/Pin.h +++ b/shared-bindings/microcontroller/Pin.h @@ -37,6 +37,7 @@ mcu_pin_obj_t *validate_obj_is_pin(mp_obj_t obj); mcu_pin_obj_t *validate_obj_is_pin_or_none(mp_obj_t obj); mcu_pin_obj_t *validate_obj_is_free_pin(mp_obj_t obj); mcu_pin_obj_t *validate_obj_is_free_pin_or_none(mp_obj_t obj); +void validate_list_is_free_pins(qstr what, mcu_pin_obj_t **pins_out, mp_int_t max_pins, mp_obj_t seq, uint8_t *count_out); void assert_pin_free(const mcu_pin_obj_t* pin); diff --git a/shared-bindings/nvm/ByteArray.c b/shared-bindings/nvm/ByteArray.c index 326f719a8..06d7d4c95 100644 --- a/shared-bindings/nvm/ByteArray.c +++ b/shared-bindings/nvm/ByteArray.c @@ -32,7 +32,7 @@ #include "supervisor/shared/translate.h" //| class ByteArray: -//| """Presents a stretch of non-volatile memory as a bytearray. +//| r"""Presents a stretch of non-volatile memory as a bytearray. //| //| Non-volatile memory is available as a byte array that persists over reloads //| and power cycles. Each assignment causes an erase and write cycle so its recommended to assign diff --git a/shared-bindings/rgbmatrix/RGBMatrix.c b/shared-bindings/rgbmatrix/RGBMatrix.c index cbf570958..c833faa6e 100644 --- a/shared-bindings/rgbmatrix/RGBMatrix.c +++ b/shared-bindings/rgbmatrix/RGBMatrix.c @@ -50,13 +50,10 @@ STATIC uint8_t validate_pin(mp_obj_t obj) { } STATIC void validate_pins(qstr what, uint8_t* pin_nos, mp_int_t max_pins, mp_obj_t seq, uint8_t *count_out) { - mp_int_t len = MP_OBJ_SMALL_INT_VALUE(mp_obj_len(seq)); - if (len > max_pins) { - mp_raise_ValueError_varg(translate("At most %d %q may be specified (not %d)"), max_pins, what, len); - } - *count_out = len; - for (mp_int_t i=0; i<len; i++) { - pin_nos[i] = validate_pin(mp_obj_subscr(seq, MP_OBJ_NEW_SMALL_INT(i), MP_OBJ_SENTINEL)); + mcu_pin_obj_t *pins[max_pins]; + validate_list_is_free_pins(what, pins, max_pins, seq, count_out); + for (mp_int_t i=0; i<*count_out; i++) { + pin_nos[i] = common_hal_mcu_pin_number(pins[i]); } } diff --git a/shared-bindings/sdcardio/SDCard.c b/shared-bindings/sdcardio/SDCard.c new file mode 100644 index 000000000..1d8c4bafb --- /dev/null +++ b/shared-bindings/sdcardio/SDCard.c @@ -0,0 +1,183 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/objarray.h" + +#include "shared-bindings/sdcardio/SDCard.h" +#include "shared-module/sdcardio/SDCard.h" +#include "common-hal/busio/SPI.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/flash.h" + +//| class SDCard: +//| """SD Card Block Interface +//| +//| Controls an SD card over SPI. This built-in module has higher read +//| performance than the library adafruit_sdcard, but it is only compatible with +//| `busio.SPI`, not `bitbangio.SPI`. Usually an SDCard object is used +//| with ``storage.VfsFat`` to allow file I/O to an SD card.""" +//| +//| def __init__(bus:busio.SPI, cs=digitalio.DigitalInOut, baudrate=8000000): +//| """Construct an SPI SD Card object with the given properties +//| +//| :param busio.SPI spi: The SPI bus +//| :param microcontroller.Pin cs: The chip select connected to the card +//| :param int baudrate: The SPI data rate to use after card setup +//| +//| Note that during detection and configuration, a hard-coded low baudrate is used. +//| Data transfers use the specified baurate (rounded down to one that is supported by +//| the microcontroller) +//| +//| Example usage: +//| +//| .. code-block:: python +//| +//| import os +//| +//| import board +//| import sdcardio +//| import storage +//| +//| sd = sdcardio.SDCard(board.SPI(), board.SD_CS) +//| vfs = storage.VfsFat(sd) +//| storage.mount(vfs, '/sd') +//| os.listdir('/sd')""" + +STATIC mp_obj_t sdcardio_sdcard_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_spi, ARG_cs, ARG_baudrate, ARG_sdio, NUM_ARGS }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_spi, MP_ARG_OBJ, {.u_obj = mp_const_none } }, + { MP_QSTR_cs, MP_ARG_OBJ, {.u_obj = mp_const_none } }, + { MP_QSTR_baudrate, MP_ARG_INT, {.u_int = 8000000} }, + { MP_QSTR_sdio, MP_ARG_OBJ | MP_ARG_KW_ONLY, {.u_int = 8000000} }, + }; + MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + busio_spi_obj_t *spi = validate_obj_is_spi_bus(args[ARG_spi].u_obj); + mcu_pin_obj_t *cs = validate_obj_is_free_pin(args[ARG_cs].u_obj); + + sdcardio_sdcard_obj_t *self = m_new_obj(sdcardio_sdcard_obj_t); + self->base.type = &sdcardio_SDCard_type; + + common_hal_sdcardio_sdcard_construct(self, spi, cs, args[ARG_baudrate].u_int); + + return self; +} + + +//| def count() -> int: +//| """Returns the total number of sectors +//| +//| Due to technical limitations, this is a function and not a property. +//| +//| :return: The number of 512-byte blocks, as a number""" +//| +mp_obj_t sdcardio_sdcard_count(mp_obj_t self_in) { + sdcardio_sdcard_obj_t *self = (sdcardio_sdcard_obj_t*)self_in; + return mp_obj_new_int_from_ull(common_hal_sdcardio_sdcard_get_blockcount(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(sdcardio_sdcard_count_obj, sdcardio_sdcard_count); + +//| def deinit() -> None: +//| """Disable permanently. +//| +//| :return: None""" +//| +mp_obj_t sdcardio_sdcard_deinit(mp_obj_t self_in) { + sdcardio_sdcard_obj_t *self = (sdcardio_sdcard_obj_t*)self_in; + common_hal_sdcardio_sdcard_deinit(self); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(sdcardio_sdcard_deinit_obj, sdcardio_sdcard_deinit); + + +//| def readblocks(start_block: int, buf: bytearray) -> None: +//| +//| """Read one or more blocks from the card +//| +//| :param int start_block: The block to start reading from +//| :param bytearray buf: The buffer to write into. Length must be multiple of 512. +//| +//| :return: None""" +//| + +mp_obj_t sdcardio_sdcard_readblocks(mp_obj_t self_in, mp_obj_t start_block_in, mp_obj_t buf_in) { + uint32_t start_block = mp_obj_get_int(start_block_in); + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_WRITE); + sdcardio_sdcard_obj_t *self = (sdcardio_sdcard_obj_t*)self_in; + int result = common_hal_sdcardio_sdcard_readblocks(self, start_block, &bufinfo); + if (result < 0) { + mp_raise_OSError(-result); + } + return mp_const_none; +} + +MP_DEFINE_CONST_FUN_OBJ_3(sdcardio_sdcard_readblocks_obj, sdcardio_sdcard_readblocks); + +//| def writeblocks(start_block: int, buf: bytearray) -> None: +//| +//| """Write one or more blocks to the card +//| +//| :param int start_block: The block to start writing from +//| :param bytearray buf: The buffer to read from. Length must be multiple of 512. +//| +//| :return: None""" +//| + +mp_obj_t sdcardio_sdcard_writeblocks(mp_obj_t self_in, mp_obj_t start_block_in, mp_obj_t buf_in) { + uint32_t start_block = mp_obj_get_int(start_block_in); + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_READ); + sdcardio_sdcard_obj_t *self = (sdcardio_sdcard_obj_t*)self_in; + int result = common_hal_sdcardio_sdcard_writeblocks(self, start_block, &bufinfo); + if (result < 0) { + mp_raise_OSError(-result); + } + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_3(sdcardio_sdcard_writeblocks_obj, sdcardio_sdcard_writeblocks); + +STATIC const mp_rom_map_elem_t sdcardio_sdcard_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_count), MP_ROM_PTR(&sdcardio_sdcard_count_obj) }, + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&sdcardio_sdcard_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&sdcardio_sdcard_readblocks_obj) }, + { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&sdcardio_sdcard_writeblocks_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(sdcardio_sdcard_locals_dict, sdcardio_sdcard_locals_dict_table); + +const mp_obj_type_t sdcardio_SDCard_type = { + { &mp_type_type }, + .name = MP_QSTR_SDCard, + .make_new = sdcardio_sdcard_make_new, + .locals_dict = (mp_obj_dict_t*)&sdcardio_sdcard_locals_dict, +}; diff --git a/shared-bindings/sdcardio/SDCard.h b/shared-bindings/sdcardio/SDCard.h new file mode 100644 index 000000000..5986d5b81 --- /dev/null +++ b/shared-bindings/sdcardio/SDCard.h @@ -0,0 +1,30 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017, 2018 Scott Shawcroft for Adafruit Industries + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +extern const mp_obj_type_t sdcardio_SDCard_type; diff --git a/shared-bindings/sdcardio/__init__.c b/shared-bindings/sdcardio/__init__.c new file mode 100644 index 000000000..746aa5588 --- /dev/null +++ b/shared-bindings/sdcardio/__init__.c @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include <stdint.h> + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/sdcardio/SDCard.h" + +//| """Interface to an SD card via the SPI bus""" + +STATIC const mp_rom_map_elem_t sdcardio_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_sdcardio) }, + { MP_ROM_QSTR(MP_QSTR_SDCard), MP_ROM_PTR(&sdcardio_SDCard_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(sdcardio_module_globals, sdcardio_module_globals_table); + +const mp_obj_module_t sdcardio_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&sdcardio_module_globals, +}; diff --git a/shared-bindings/sdcardio/__init__.h b/shared-bindings/sdcardio/__init__.h new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/shared-bindings/sdcardio/__init__.h diff --git a/shared-bindings/sdioio/SDCard.c b/shared-bindings/sdioio/SDCard.c new file mode 100644 index 000000000..77b41ce12 --- /dev/null +++ b/shared-bindings/sdioio/SDCard.c @@ -0,0 +1,296 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// This file contains all of the Python API definitions for the +// sdioio.SDCard class. + +#include <string.h> + +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/sdioio/SDCard.h" +#include "shared-bindings/util.h" + +#include "lib/utils/buffer_helper.h" +#include "lib/utils/context_manager_helpers.h" +#include "py/mperrno.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "supervisor/shared/translate.h" + +//| class SDCard: +//| """SD Card Block Interface with SDIO +//| +//| Controls an SD card over SDIO. SDIO is a parallel protocol designed +//| for SD cards. It uses a clock pin, a command pin, and 1 or 4 +//| data pins. It can be operated at a high frequency such as +//| 25MHz. Usually an SDCard object is used with ``storage.VfsFat`` +//| to allow file I/O to an SD card.""" +//| +//| def __init__(*, clock: digitalio.DigitalInOut, command: digitalio.DigitalInOut, data: List[digitalio.DigitalInOut], frequency: int): +//| """Construct an SDIO SD Card object with the given properties +//| +//| :param ~microcontroller.Pin clock: the pin to use for the clock. +//| :param ~microcontroller.Pin command: the pin to use for the command. +//| :param data: A sequence of pins to use for data. +//| :param frequency: The frequency of the bus in Hz +//| +//| Example usage: +//| +//| .. code-block:: python +//| +//| import os +//| +//| import board +//| import sdioio +//| import storage +//| +//| sd = sdioio.SDCard( +//| clock=board.SDIO_CLOCK, +//| command=board.SDIO_COMMAND, +//| data=board.SDIO_DATA, +//| frequency=25000000) +//| vfs = storage.VfsFat(sd) +//| storage.mount(vfs, '/sd') +//| os.listdir('/sd')""" +//| ... +//| + +STATIC mp_obj_t sdioio_sdcard_make_new(const mp_obj_type_t *type, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + sdioio_sdcard_obj_t *self = m_new_obj(sdioio_sdcard_obj_t); + self->base.type = &sdioio_SDCard_type; + enum { ARG_clock, ARG_command, ARG_data, ARG_frequency, NUM_ARGS }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_clock, MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_OBJ }, + { MP_QSTR_command, MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_OBJ }, + { MP_QSTR_data, MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_OBJ }, + { MP_QSTR_frequency, MP_ARG_REQUIRED | MP_ARG_KW_ONLY | MP_ARG_INT }, + }; + MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + + mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + const mcu_pin_obj_t* clock = validate_obj_is_free_pin(args[ARG_clock].u_obj); + const mcu_pin_obj_t* command = validate_obj_is_free_pin(args[ARG_command].u_obj); + mcu_pin_obj_t *data_pins[4]; + uint8_t num_data; + validate_list_is_free_pins(MP_QSTR_data, data_pins, MP_ARRAY_SIZE(data_pins), args[ARG_data].u_obj, &num_data); + + common_hal_sdioio_sdcard_construct(self, clock, command, num_data, data_pins, args[ARG_frequency].u_int); + return MP_OBJ_FROM_PTR(self); +} + +STATIC void check_for_deinit(sdioio_sdcard_obj_t *self) { + if (common_hal_sdioio_sdcard_deinited(self)) { + raise_deinited_error(); + } +} + +//| def configure(*, frequency=0, width=0) -> None: +//| """Configures the SDIO bus. +//| +//| :param int frequency: the desired clock rate in Hertz. The actual clock rate may be higher or lower due to the granularity of available clock settings. Check the `frequency` attribute for the actual clock rate. +//| :param int width: the number of data lines to use. Must be 1 or 4 and must also not exceed the number of data lines at construction +//| +//| .. note:: Leaving a value unspecified or 0 means the current setting is kept""" +//| +STATIC mp_obj_t sdioio_sdcard_configure(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { + enum { ARG_frequency, ARG_width, NUM_ARGS }; + static const mp_arg_t allowed_args[] = { + { MP_QSTR_frequency, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + { MP_QSTR_width, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} }, + }; + sdioio_sdcard_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]); + check_for_deinit(self); + mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; + MP_STATIC_ASSERT( MP_ARRAY_SIZE(allowed_args) == NUM_ARGS ); + mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + + mp_int_t frequency = args[ARG_frequency].u_int; + if (frequency < 0) { + mp_raise_ValueError_varg(translate("Invalid %q"), MP_QSTR_baudrate); + } + + uint8_t width = args[ARG_width].u_int; + if (width != 0 && width != 1 && width != 4) { + mp_raise_ValueError_varg(translate("Invalid %q"), MP_QSTR_width); + } + + if (!common_hal_sdioio_sdcard_configure(self, frequency, width)) { + mp_raise_OSError(MP_EIO); + } + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_KW(sdioio_sdcard_configure_obj, 1, sdioio_sdcard_configure); + +//| def count() -> int: +//| """Returns the total number of sectors +//| +//| Due to technical limitations, this is a function and not a property. +//| +//| :return: The number of 512-byte blocks, as a number""" +//| +STATIC mp_obj_t sdioio_sdcard_count(mp_obj_t self_in) { + sdioio_sdcard_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_sdioio_sdcard_get_count(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(sdioio_sdcard_count_obj, sdioio_sdcard_count); + +//| def readblocks(start_block: int, buf: bytearray) -> None: +//| +//| """Read one or more blocks from the card +//| +//| :param int start_block: The block to start reading from +//| :param bytearray buf: The buffer to write into. Length must be multiple of 512. +//| +//| :return: None""" +mp_obj_t sdioio_sdcard_readblocks(mp_obj_t self_in, mp_obj_t start_block_in, mp_obj_t buf_in) { + uint32_t start_block = mp_obj_get_int(start_block_in); + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_WRITE); + sdioio_sdcard_obj_t *self = (sdioio_sdcard_obj_t*)self_in; + int result = common_hal_sdioio_sdcard_readblocks(self, start_block, &bufinfo); + if (result < 0) { + mp_raise_OSError(-result); + } + return mp_const_none; +} + +MP_DEFINE_CONST_FUN_OBJ_3(sdioio_sdcard_readblocks_obj, sdioio_sdcard_readblocks); + +//| def writeblocks(start_block: int, buf: bytearray) -> None: +//| +//| """Write one or more blocks to the card +//| +//| :param int start_block: The block to start writing from +//| :param bytearray buf: The buffer to read from. Length must be multiple of 512. +//| +//| :return: None""" +//| +mp_obj_t sdioio_sdcard_writeblocks(mp_obj_t self_in, mp_obj_t start_block_in, mp_obj_t buf_in) { + uint32_t start_block = mp_obj_get_int(start_block_in); + mp_buffer_info_t bufinfo; + mp_get_buffer_raise(buf_in, &bufinfo, MP_BUFFER_WRITE); + sdioio_sdcard_obj_t *self = (sdioio_sdcard_obj_t*)self_in; + int result = common_hal_sdioio_sdcard_writeblocks(self, start_block, &bufinfo); + if (result < 0) { + mp_raise_OSError(-result); + } + return mp_const_none; +} + +MP_DEFINE_CONST_FUN_OBJ_3(sdioio_sdcard_writeblocks_obj, sdioio_sdcard_writeblocks); + +//| @property +//| def frequency(self) -> int: +//| """The actual SDIO bus frequency. This may not match the frequency +//| requested due to internal limitations.""" +//| ... +//| +STATIC mp_obj_t sdioio_sdcard_obj_get_frequency(mp_obj_t self_in) { + sdioio_sdcard_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_sdioio_sdcard_get_frequency(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(sdioio_sdcard_get_frequency_obj, sdioio_sdcard_obj_get_frequency); + +const mp_obj_property_t sdioio_sdcard_frequency_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&sdioio_sdcard_get_frequency_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| @property +//| def width(self) -> int: +//| """The actual SDIO bus width, in bits""" +//| ... +//| +STATIC mp_obj_t sdioio_sdcard_obj_get_width(mp_obj_t self_in) { + sdioio_sdcard_obj_t *self = MP_OBJ_TO_PTR(self_in); + check_for_deinit(self); + return MP_OBJ_NEW_SMALL_INT(common_hal_sdioio_sdcard_get_width(self)); +} +MP_DEFINE_CONST_FUN_OBJ_1(sdioio_sdcard_get_width_obj, sdioio_sdcard_obj_get_width); + +const mp_obj_property_t sdioio_sdcard_width_obj = { + .base.type = &mp_type_property, + .proxy = {(mp_obj_t)&sdioio_sdcard_get_width_obj, + (mp_obj_t)&mp_const_none_obj, + (mp_obj_t)&mp_const_none_obj}, +}; + +//| def deinit() -> None: +//| """Disable permanently. +//| +//| :return: None""" +STATIC mp_obj_t sdioio_sdcard_obj_deinit(mp_obj_t self_in) { + sdioio_sdcard_obj_t *self = MP_OBJ_TO_PTR(self_in); + common_hal_sdioio_sdcard_deinit(self); + return mp_const_none; +} +MP_DEFINE_CONST_FUN_OBJ_1(sdioio_sdcard_deinit_obj, sdioio_sdcard_obj_deinit); + +//| def __enter__(self, ) -> Any: +//| """No-op used by Context Managers. +//| Provided by context manager helper.""" +//| ... +//| + +//| def __exit__(self, ) -> Any: +//| """Automatically deinitializes the hardware when exiting a context. See +//| :ref:`lifetime-and-contextmanagers` for more info.""" +//| ... +//| +STATIC mp_obj_t sdioio_sdcard_obj___exit__(size_t n_args, const mp_obj_t *args) { + (void)n_args; + common_hal_sdioio_sdcard_deinit(args[0]); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(sdioio_sdcard_obj___exit___obj, 4, 4, sdioio_sdcard_obj___exit__); + +STATIC const mp_rom_map_elem_t sdioio_sdcard_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&sdioio_sdcard_deinit_obj) }, + { MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) }, + { MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&sdioio_sdcard_obj___exit___obj) }, + + { MP_ROM_QSTR(MP_QSTR_configure), MP_ROM_PTR(&sdioio_sdcard_configure_obj) }, + { MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_PTR(&sdioio_sdcard_frequency_obj) }, + { MP_ROM_QSTR(MP_QSTR_width), MP_ROM_PTR(&sdioio_sdcard_width_obj) }, + + { MP_ROM_QSTR(MP_QSTR_count), MP_ROM_PTR(&sdioio_sdcard_count_obj) }, + { MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&sdioio_sdcard_readblocks_obj) }, + { MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&sdioio_sdcard_writeblocks_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(sdioio_sdcard_locals_dict, sdioio_sdcard_locals_dict_table); + +const mp_obj_type_t sdioio_SDCard_type = { + { &mp_type_type }, + .name = MP_QSTR_SDCard, + .make_new = sdioio_sdcard_make_new, + .locals_dict = (mp_obj_dict_t*)&sdioio_sdcard_locals_dict, +}; diff --git a/shared-bindings/sdioio/SDCard.h b/shared-bindings/sdioio/SDCard.h new file mode 100644 index 000000000..7f62ee7a6 --- /dev/null +++ b/shared-bindings/sdioio/SDCard.h @@ -0,0 +1,66 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_SHARED_BINDINGS_BUSIO_SDIO_H +#define MICROPY_INCLUDED_SHARED_BINDINGS_BUSIO_SDIO_H + +#include "py/obj.h" + +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/sdioio/SDCard.h" + +// Type object used in Python. Should be shared between ports. +extern const mp_obj_type_t sdioio_SDCard_type; + +// Construct an underlying SDIO object. +extern void common_hal_sdioio_sdcard_construct(sdioio_sdcard_obj_t *self, + const mcu_pin_obj_t * clock, const mcu_pin_obj_t * command, + uint8_t num_data, mcu_pin_obj_t ** data, uint32_t frequency); + +extern void common_hal_sdioio_sdcard_deinit(sdioio_sdcard_obj_t *self); +extern bool common_hal_sdioio_sdcard_deinited(sdioio_sdcard_obj_t *self); + +extern bool common_hal_sdioio_sdcard_configure(sdioio_sdcard_obj_t *self, uint32_t baudrate, uint8_t width); + +extern void common_hal_sdioio_sdcard_unlock(sdioio_sdcard_obj_t *self); + +// Return actual SDIO bus frequency. +uint32_t common_hal_sdioio_sdcard_get_frequency(sdioio_sdcard_obj_t* self); + +// Return SDIO bus width. +uint8_t common_hal_sdioio_sdcard_get_width(sdioio_sdcard_obj_t* self); + +// Return number of device blocks +uint32_t common_hal_sdioio_sdcard_get_count(sdioio_sdcard_obj_t* self); + +// Read or write blocks +int common_hal_sdioio_sdcard_readblocks(sdioio_sdcard_obj_t* self, uint32_t start_block, mp_buffer_info_t *bufinfo); +int common_hal_sdioio_sdcard_writeblocks(sdioio_sdcard_obj_t* self, uint32_t start_block, mp_buffer_info_t *bufinfo); + +// This is used by the supervisor to claim SDIO devices indefinitely. +extern void common_hal_sdioio_sdcard_never_reset(sdioio_sdcard_obj_t *self); + +#endif // MICROPY_INCLUDED_SHARED_BINDINGS_BUSIO_SDIO_H diff --git a/shared-bindings/sdioio/__init__.c b/shared-bindings/sdioio/__init__.c new file mode 100644 index 000000000..b88e5c3a9 --- /dev/null +++ b/shared-bindings/sdioio/__init__.c @@ -0,0 +1,47 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + + +#include <stdint.h> + +#include "py/obj.h" +#include "py/runtime.h" + +#include "shared-bindings/sdioio/SDCard.h" + +//| """Interface to an SD card via the SDIO bus""" + +STATIC const mp_rom_map_elem_t sdioio_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_sdio) }, + { MP_ROM_QSTR(MP_QSTR_SDCard), MP_ROM_PTR(&sdioio_SDCard_type) }, +}; + +STATIC MP_DEFINE_CONST_DICT(sdioio_module_globals, sdioio_module_globals_table); + +const mp_obj_module_t sdioio_module = { + .base = { &mp_type_module }, + .globals = (mp_obj_dict_t*)&sdioio_module_globals, +}; diff --git a/shared-bindings/sdioio/__init__.h b/shared-bindings/sdioio/__init__.h new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/shared-bindings/sdioio/__init__.h diff --git a/shared-bindings/ulab/filter/__init__.pyi b/shared-bindings/ulab/filter/__init__.pyi index fff404300..5e7202e06 100644 --- a/shared-bindings/ulab/filter/__init__.pyi +++ b/shared-bindings/ulab/filter/__init__.pyi @@ -17,3 +17,20 @@ def convolve(r, c=None): Convolution is most time-efficient when both inputs are of float type.""" ... + +def sosfilt(sos : ulab.array, x : ulab.array, *, xi : Optional[ulab.array] = None) -> Union[ulab.array, Tuple[ulab.array, ulab.array]]: + """ + :param ulab.array sos: Array of second-order filter coefficients, must have shape (n_sections, 6). Each row corresponds to a second-order section, with the first three columns providing the numerator coefficients and the last three providing the denominator coefficients. + :param ulab.array x: The data to be filtered + :param ulab.array zi: Optional initial conditions for the filter + + :return: If ``xi`` is not specified, the filter result alone is returned. If ``xi`` is specified, the return value is a 2-tuple of the filter result and the final filter conditions. + + Filter data along one dimension using cascaded second-order sections. + + Filter a data sequence, x, using a digital IIR filter defined by sos. + + The filter function is implemented as a series of second-order filters with direct-form II transposed structure. It is designed to minimize numerical precision errors for high-order filters. + + Filter coefficients can be generated by using scipy's filter generators such as ``signal.ellip(..., output='sos')``.""" + ... diff --git a/shared-module/_bleio/ScanEntry.c b/shared-module/_bleio/ScanEntry.c index 785209c4a..af9e4b347 100644 --- a/shared-module/_bleio/ScanEntry.c +++ b/shared-module/_bleio/ScanEntry.c @@ -56,11 +56,16 @@ bool bleio_scanentry_data_matches(const uint8_t* data, size_t len, const uint8_t if (prefixes_length == 0) { return true; } + if (len == 0) { + // Prefixes exist, but no data. + return false; + } size_t i = 0; while(i < prefixes_length) { uint8_t prefix_length = prefixes[i]; i += 1; size_t j = 0; + bool prefix_matched = false; while (j < len) { uint8_t structure_length = data[j]; j += 1; @@ -71,13 +76,18 @@ bool bleio_scanentry_data_matches(const uint8_t* data, size_t len, const uint8_t if (any) { return true; } - } else if (!any) { - return false; + prefix_matched = true; + break; } j += structure_length; } + // If all (!any), the current prefix must have matched at least one field. + if (!prefix_matched && !any) { + return false; + } i += prefix_length; } + // All prefixes matched some field (if !any), or none did (if any). return !any; } diff --git a/shared-module/board/__init__.c b/shared-module/board/__init__.c index 0fbf916cd..2c9139d8a 100644 --- a/shared-module/board/__init__.c +++ b/shared-module/board/__init__.c @@ -123,7 +123,7 @@ mp_obj_t common_hal_board_create_uart(void) { #endif common_hal_busio_uart_construct(self, tx, rx, rts, cts, rs485_dir, rs485_invert, - 9600, 8, PARITY_NONE, 1, 1.0f, 64, NULL, false); + 9600, 8, BUSIO_UART_PARITY_NONE, 1, 1.0f, 64, NULL, false); MP_STATE_VM(shared_uart_bus) = MP_OBJ_FROM_PTR(self); return MP_STATE_VM(shared_uart_bus); } diff --git a/shared-module/displayio/Display.h b/shared-module/displayio/Display.h index 8adaf597f..861a38fd7 100644 --- a/shared-module/displayio/Display.h +++ b/shared-module/displayio/Display.h @@ -29,7 +29,9 @@ #include "shared-bindings/digitalio/DigitalInOut.h" #include "shared-bindings/displayio/Group.h" +#if CIRCUITPY_PULSEIO #include "shared-bindings/pulseio/PWMOut.h" +#endif #include "shared-module/displayio/area.h" #include "shared-module/displayio/display_core.h" @@ -39,7 +41,9 @@ typedef struct { displayio_display_core_t core; union { digitalio_digitalinout_obj_t backlight_inout; + #if CIRCUITPY_PULSEIO pulseio_pwmout_obj_t backlight_pwm; + #endif }; uint64_t last_backlight_refresh; uint64_t last_refresh_call; diff --git a/shared-module/displayio/EPaperDisplay.h b/shared-module/displayio/EPaperDisplay.h index d08bed546..3b9f6e368 100644 --- a/shared-module/displayio/EPaperDisplay.h +++ b/shared-module/displayio/EPaperDisplay.h @@ -29,7 +29,6 @@ #include "shared-bindings/digitalio/DigitalInOut.h" #include "shared-bindings/displayio/Group.h" -#include "shared-bindings/pulseio/PWMOut.h" #include "shared-module/displayio/area.h" #include "shared-module/displayio/display_core.h" diff --git a/shared-module/displayio/Palette.c b/shared-module/displayio/Palette.c index 1ef03aab4..facb1fa73 100644 --- a/shared-module/displayio/Palette.c +++ b/shared-module/displayio/Palette.c @@ -35,10 +35,12 @@ void common_hal_displayio_palette_construct(displayio_palette_t* self, uint16_t void common_hal_displayio_palette_make_opaque(displayio_palette_t* self, uint32_t palette_index) { self->colors[palette_index].transparent = false; + self->needs_refresh = true; } void common_hal_displayio_palette_make_transparent(displayio_palette_t* self, uint32_t palette_index) { self->colors[palette_index].transparent = true; + self->needs_refresh = true; } uint32_t common_hal_displayio_palette_get_len(displayio_palette_t* self) { diff --git a/shared-module/sdcardio/SDCard.c b/shared-module/sdcardio/SDCard.c new file mode 100644 index 000000000..9e861279d --- /dev/null +++ b/shared-module/sdcardio/SDCard.c @@ -0,0 +1,466 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// This implementation largely follows the structure of adafruit_sdcard.py + +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/digitalio/DigitalInOut.h" +#include "shared-bindings/time/__init__.h" +#include "shared-bindings/util.h" +#include "shared-module/sdcardio/SDCard.h" + +#include "py/mperrno.h" + +#if 0 +#define DEBUG_PRINT(...) ((void)mp_printf(&mp_plat_print, ## __VA_ARGS__)) +#else +#define DEBUG_PRINT(...) ((void)0) +#endif + +#define CMD_TIMEOUT (200) + +#define R1_IDLE_STATE (1<<0) +#define R1_ILLEGAL_COMMAND (1<<2) + +#define TOKEN_CMD25 (0xFC) +#define TOKEN_STOP_TRAN (0xFD) +#define TOKEN_DATA (0xFE) + +STATIC bool lock_and_configure_bus(sdcardio_sdcard_obj_t *self) { + if (!common_hal_busio_spi_try_lock(self->bus)) { + return false; + } + common_hal_busio_spi_configure(self->bus, self->baudrate, 0, 0, 8); + common_hal_digitalio_digitalinout_set_value(&self->cs, false); + return true; +} + +STATIC void lock_bus_or_throw(sdcardio_sdcard_obj_t *self) { + if (!lock_and_configure_bus(self)) { + mp_raise_OSError(EAGAIN); + } +} + +STATIC void clock_card(sdcardio_sdcard_obj_t *self, int bytes) { + uint8_t buf[] = {0xff}; + common_hal_digitalio_digitalinout_set_value(&self->cs, true); + for (int i=0; i<bytes; i++) { + common_hal_busio_spi_write(self->bus, buf, 1); + } +} + +STATIC void extraclock_and_unlock_bus(sdcardio_sdcard_obj_t *self) { + clock_card(self, 1); + common_hal_busio_spi_unlock(self->bus); +} + +static uint8_t CRC7(const uint8_t* data, uint8_t n) { + uint8_t crc = 0; + for (uint8_t i = 0; i < n; i++) { + uint8_t d = data[i]; + for (uint8_t j = 0; j < 8; j++) { + crc <<= 1; + if ((d & 0x80) ^ (crc & 0x80)) { + crc ^= 0x09; + } + d <<= 1; + } + } + return (crc << 1) | 1; +} + +#define READY_TIMEOUT_NS (300 * 1000 * 1000) // 300ms +STATIC void wait_for_ready(sdcardio_sdcard_obj_t *self) { + uint64_t deadline = common_hal_time_monotonic_ns() + READY_TIMEOUT_NS; + while (common_hal_time_monotonic_ns() < deadline) { + uint8_t b; + common_hal_busio_spi_read(self->bus, &b, 1, 0xff); + if (b == 0xff) { + break; + } + } +} + +// In Python API, defaults are response=None, data_block=True, wait=True +STATIC int cmd(sdcardio_sdcard_obj_t *self, int cmd, int arg, void *response_buf, size_t response_len, bool data_block, bool wait) { + DEBUG_PRINT("cmd % 3d [%02x] arg=% 11d [%08x] len=%d%s%s\n", cmd, cmd, arg, arg, response_len, data_block ? " data" : "", wait ? " wait" : ""); + uint8_t cmdbuf[6]; + cmdbuf[0] = cmd | 0x40; + cmdbuf[1] = (arg >> 24) & 0xff; + cmdbuf[2] = (arg >> 16) & 0xff; + cmdbuf[3] = (arg >> 8) & 0xff; + cmdbuf[4] = arg & 0xff; + cmdbuf[5] = CRC7(cmdbuf, 5); + + if (wait) { + wait_for_ready(self); + } + + common_hal_busio_spi_write(self->bus, cmdbuf, sizeof(cmdbuf)); + + // Wait for the response (response[7] == 0) + bool response_received = false; + for (int i=0; i<CMD_TIMEOUT; i++) { + common_hal_busio_spi_read(self->bus, cmdbuf, 1, 0xff); + if ((cmdbuf[0] & 0x80) == 0) { + response_received = true; + break; + } + } + + if (!response_received) { + return -EIO; + } + + if (response_buf) { + + if (data_block) { + cmdbuf[1] = 0xff; + do { + // Wait for the start block byte + common_hal_busio_spi_read(self->bus, cmdbuf+1, 1, 0xff); + } while (cmdbuf[1] != 0xfe); + } + + common_hal_busio_spi_read(self->bus, response_buf, response_len, 0xff); + + if (data_block) { + // Read and discard the CRC-CCITT checksum + common_hal_busio_spi_read(self->bus, cmdbuf+1, 2, 0xff); + } + + } + + return cmdbuf[0]; +} + +STATIC int block_cmd(sdcardio_sdcard_obj_t *self, int cmd_, int block, void *response_buf, size_t response_len, bool data_block, bool wait) { + return cmd(self, cmd_, block * self->cdv, response_buf, response_len, true, true); +} + +STATIC bool cmd_nodata(sdcardio_sdcard_obj_t* self, int cmd, int response) { + uint8_t cmdbuf[2] = {cmd, 0xff}; + + common_hal_busio_spi_write(self->bus, cmdbuf, sizeof(cmdbuf)); + + // Wait for the response (response[7] == response) + for (int i=0; i<CMD_TIMEOUT; i++) { + common_hal_busio_spi_read(self->bus, cmdbuf, 1, 0xff); + if (cmdbuf[0] == response) { + return 0; + } + } + return -EIO; +} + +STATIC const compressed_string_t *init_card_v1(sdcardio_sdcard_obj_t *self) { + for (int i=0; i<CMD_TIMEOUT; i++) { + if (cmd(self, 41, 0, NULL, 0, true, true) == 0) { + return NULL; + } + } + return translate("timeout waiting for v1 card"); +} + +STATIC const compressed_string_t *init_card_v2(sdcardio_sdcard_obj_t *self) { + for (int i=0; i<CMD_TIMEOUT; i++) { + uint8_t ocr[4]; + common_hal_time_delay_ms(50); + cmd(self, 58, 0, ocr, sizeof(ocr), false, true); + cmd(self, 55, 0, NULL, 0, true, true); + if (cmd(self, 41, 0x40000000, NULL, 0, true, true) == 0) { + cmd(self, 58, 0, ocr, sizeof(ocr), false, true); + if ((ocr[0] & 0x40) != 0) { + self->cdv = 1; + } + return NULL; + } + } + return translate("timeout waiting for v2 card"); +} + +STATIC const compressed_string_t *init_card(sdcardio_sdcard_obj_t *self) { + clock_card(self, 10); + + common_hal_digitalio_digitalinout_set_value(&self->cs, false); + + // CMD0: init card: should return _R1_IDLE_STATE (allow 5 attempts) + { + bool reached_idle_state = false; + for (int i=0; i<5; i++) { + if (cmd(self, 0, 0, NULL, 0, true, true) == R1_IDLE_STATE) { + reached_idle_state = true; + break; + } + } + if (!reached_idle_state) { + return translate("no SD card"); + } + } + + // CMD8: determine card version + { + uint8_t rb7[4]; + int response = cmd(self, 8, 0x1AA, rb7, sizeof(rb7), false, true); + if (response == R1_IDLE_STATE) { + const compressed_string_t *result =init_card_v2(self); + if (result != NULL) { + return result; + } + } else if (response == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) { + const compressed_string_t *result =init_card_v1(self); + if (result != NULL) { + return result; + } + } else { + return translate("couldn't determine SD card version"); + } + } + + // CMD9: get number of sectors + { + uint8_t csd[16]; + int response = cmd(self, 9, 0, csd, sizeof(csd), true, true); + if (response != 0) { + return translate("no response from SD card"); + } + int csd_version = (csd[0] & 0xC0) >> 6; + if (csd_version >= 2) { + return translate("SD card CSD format not supported"); + } + + if (csd_version == 1) { + self->sectors = ((csd[8] << 8 | csd[9]) + 1) * 1024; + } else { + uint32_t block_length = 1 << (csd[5] & 0xF); + uint32_t c_size = ((csd[6] & 0x3) << 10) | (csd[7] << 2) | ((csd[8] & 0xC) >> 6); + uint32_t mult = 1 << (((csd[9] & 0x3) << 1 | (csd[10] & 0x80) >> 7) + 2); + self->sectors = block_length / 512 * mult * (c_size + 1); + } + } + + // CMD16: set block length to 512 bytes + { + int response = cmd(self, 16, 512, NULL, 0, true, true); + if (response != 0) { + return translate("can't set 512 block size"); + } + } + + return NULL; +} + +void common_hal_sdcardio_sdcard_construct(sdcardio_sdcard_obj_t *self, busio_spi_obj_t *bus, mcu_pin_obj_t *cs, int baudrate) { + self->bus = bus; + common_hal_digitalio_digitalinout_construct(&self->cs, cs); + common_hal_digitalio_digitalinout_switch_to_output(&self->cs, true, DRIVE_MODE_PUSH_PULL); + + self->cdv = 512; + self->sectors = 0; + self->baudrate = 250000; + + lock_bus_or_throw(self); + const compressed_string_t *result = init_card(self); + extraclock_and_unlock_bus(self); + + if (result != NULL) { + common_hal_digitalio_digitalinout_deinit(&self->cs); + mp_raise_OSError_msg(result); + } + + self->baudrate = baudrate; +} + +void common_hal_sdcardio_sdcard_deinit(sdcardio_sdcard_obj_t *self) { + if (!self->bus) { + return; + } + self->bus = 0; + common_hal_digitalio_digitalinout_deinit(&self->cs); +} + +void common_hal_sdcardio_check_for_deinit(sdcardio_sdcard_obj_t *self) { + if (!self->bus) { + raise_deinited_error(); + } +} + +int common_hal_sdcardio_sdcard_get_blockcount(sdcardio_sdcard_obj_t *self) { + common_hal_sdcardio_check_for_deinit(self); + return self->sectors; +} + +int readinto(sdcardio_sdcard_obj_t *self, void *buf, size_t size) { + uint8_t aux[2] = {0, 0}; + while (aux[0] != 0xfe) { + common_hal_busio_spi_read(self->bus, aux, 1, 0xff); + } + + common_hal_busio_spi_read(self->bus, buf, size, 0xff); + + // Read checksum and throw it away + common_hal_busio_spi_read(self->bus, aux, sizeof(aux), 0xff); + return 0; +} + +int readblocks(sdcardio_sdcard_obj_t *self, uint32_t start_block, mp_buffer_info_t *buf) { + uint32_t nblocks = buf->len / 512; + if (nblocks == 1) { + // Use CMD17 to read a single block + return block_cmd(self, 17, start_block, buf->buf, buf->len, true, true); + } else { + // Use CMD18 to read multiple blocks + int r = block_cmd(self, 18, start_block, NULL, 0, true, true); + if (r < 0) { + return r; + } + + uint8_t *ptr = buf->buf; + while (nblocks--) { + r = readinto(self, ptr, 512); + if (r < 0) { + return r; + } + ptr += 512; + } + + // End the multi-block read + r = cmd(self, 12, 0, NULL, 0, true, false); + + // Return first status 0 or last before card ready (0xff) + while (r != 0) { + uint8_t single_byte; + common_hal_busio_spi_read(self->bus, &single_byte, 1, 0xff); + if (single_byte & 0x80) { + return r; + } + r = single_byte; + } + } + return 0; +} + +int common_hal_sdcardio_sdcard_readblocks(sdcardio_sdcard_obj_t *self, uint32_t start_block, mp_buffer_info_t *buf) { + common_hal_sdcardio_check_for_deinit(self); + if (buf->len % 512 != 0) { + mp_raise_ValueError(translate("Buffer length must be a multiple of 512")); + } + + lock_and_configure_bus(self); + int r = readblocks(self, start_block, buf); + extraclock_and_unlock_bus(self); + return r; +} + +int _write(sdcardio_sdcard_obj_t *self, uint8_t token, void *buf, size_t size) { + wait_for_ready(self); + + uint8_t cmd[2]; + cmd[0] = token; + + common_hal_busio_spi_write(self->bus, cmd, 1); + common_hal_busio_spi_write(self->bus, buf, size); + + cmd[0] = cmd[1] = 0xff; + common_hal_busio_spi_write(self->bus, cmd, 2); + + // Check the response + // This differs from the traditional adafruit_sdcard handling, + // but adafruit_sdcard also ignored the return value of SDCard._write(!) + // so nobody noticed + // + // + // Response is as follows: + // x x x 0 STAT 1 + // 7 6 5 4 3..1 0 + // with STATUS 010 indicating "data accepted", and other status bit + // combinations indicating failure. + // In practice, I was seeing cmd[0] as 0xe5, indicating success + for (int i=0; i<CMD_TIMEOUT; i++) { + common_hal_busio_spi_read(self->bus, cmd, 1, 0xff); + DEBUG_PRINT("i=%02d cmd[0] = 0x%02x\n", i, cmd[0]); + if ((cmd[0] & 0b00010001) == 0b00000001) { + if ((cmd[0] & 0x1f) != 0x5) { + return -EIO; + } else { + break; + } + } + } + + // Wait for the write to finish + do { + common_hal_busio_spi_read(self->bus, cmd, 1, 0xff); + } while (cmd[0] == 0); + + // Success + return 0; +} + +int writeblocks(sdcardio_sdcard_obj_t *self, uint32_t start_block, mp_buffer_info_t *buf) { + common_hal_sdcardio_check_for_deinit(self); + uint32_t nblocks = buf->len / 512; + if (nblocks == 1) { + // Use CMD24 to write a single block + int r = block_cmd(self, 24, start_block, NULL, 0, true, true); + if (r < 0) { + return r; + } + r = _write(self, TOKEN_DATA, buf->buf, buf->len); + if (r < 0) { + return r; + } + } else { + // Use CMD25 to write multiple block + int r = block_cmd(self, 25, start_block, NULL, 0, true, true); + if (r < 0) { + return r; + } + + uint8_t *ptr = buf->buf; + while (nblocks--) { + r = _write(self, TOKEN_CMD25, ptr, 512); + if (r < 0) { + return r; + } + ptr += 512; + } + + cmd_nodata(self, TOKEN_STOP_TRAN, 0); + } + return 0; +} + +int common_hal_sdcardio_sdcard_writeblocks(sdcardio_sdcard_obj_t *self, uint32_t start_block, mp_buffer_info_t *buf) { + common_hal_sdcardio_check_for_deinit(self); + if (buf->len % 512 != 0) { + mp_raise_ValueError(translate("Buffer length must be a multiple of 512")); + } + lock_and_configure_bus(self); + int r = writeblocks(self, start_block, buf); + extraclock_and_unlock_bus(self); + return r; +} diff --git a/shared-module/sdcardio/SDCard.h b/shared-module/sdcardio/SDCard.h new file mode 100644 index 000000000..76c906029 --- /dev/null +++ b/shared-module/sdcardio/SDCard.h @@ -0,0 +1,51 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Jeff Epler for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#pragma once + +#include "py/obj.h" +#include "py/objproperty.h" +#include "py/runtime.h" +#include "py/objarray.h" + +#include "common-hal/busio/SPI.h" +#include "common-hal/digitalio/DigitalInOut.h" + +typedef struct { + mp_obj_base_t base; + busio_spi_obj_t *bus; + digitalio_digitalinout_obj_t cs; + int cdv; + int baudrate; + uint32_t sectors; +} sdcardio_sdcard_obj_t; + +void common_hal_sdcardio_sdcard_construct(sdcardio_sdcard_obj_t *self, busio_spi_obj_t *spi, mcu_pin_obj_t *cs, int baudrate); +void common_hal_sdcardio_sdcard_deinit(sdcardio_sdcard_obj_t *self); +void common_hal_sdcardio_sdcard_check_for_deinit(sdcardio_sdcard_obj_t *self); +int common_hal_sdcardio_sdcard_get_blockcount(sdcardio_sdcard_obj_t *self); +int common_hal_sdcardio_sdcard_readblocks(sdcardio_sdcard_obj_t *self, uint32_t start_block, mp_buffer_info_t *buf); +int common_hal_sdcardio_sdcard_writeblocks(sdcardio_sdcard_obj_t *self, uint32_t start_block, mp_buffer_info_t *buf); diff --git a/shared-module/sdcardio/__init__.c b/shared-module/sdcardio/__init__.c new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/shared-module/sdcardio/__init__.c diff --git a/shared-module/sdcardio/__init__.h b/shared-module/sdcardio/__init__.h new file mode 100644 index 000000000..e69de29bb --- /dev/null +++ b/shared-module/sdcardio/__init__.h diff --git a/supervisor/shared/external_flash/devices.h b/supervisor/shared/external_flash/devices.h index 466ab49eb..a874dbd4f 100644 --- a/supervisor/shared/external_flash/devices.h +++ b/supervisor/shared/external_flash/devices.h @@ -618,4 +618,23 @@ typedef struct { .write_status_register_split = false, \ .single_status_byte = true, \ } + +// Settings for the Micron N25Q256A 256Mb (32MiB) QSPI flash. +// Datasheet: https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_256mb_3v.pdf +#define N25Q256A {\ + /* .total_size = (1 << 25), 32 MiB does not work at this time, as assumptions about 3-byte addresses abound */ \ + .total_size = (1 << 24), /* 16 MiB */ \ + .start_up_time_us = 10000, \ + .manufacturer_id = 0x20, \ + .memory_type = 0xBA, \ + .capacity = 0x19, \ + .max_clock_speed_mhz = 108, \ + .quad_enable_bit_mask = 0x02, \ + .has_sector_protection = false, \ + .supports_fast_read = true, \ + .supports_qspi = true, \ + .supports_qspi_writes = true, \ + .write_status_register_split = false, \ + .single_status_byte = true, \ +} #endif // MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H diff --git a/supervisor/shared/flash.c b/supervisor/shared/flash.c index 298e7d83e..9f52ddbc4 100644 --- a/supervisor/shared/flash.c +++ b/supervisor/shared/flash.c @@ -88,7 +88,7 @@ static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_blo mp_uint_t flash_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) { if (block_num == 0) { - if (block_num > 1) { + if (num_blocks > 1) { return 1; // error } // fake the MBR so we can decide on our own partition table diff --git a/supervisor/shared/serial.c b/supervisor/shared/serial.c index 513022667..8eb78a90e 100644 --- a/supervisor/shared/serial.c +++ b/supervisor/shared/serial.c @@ -55,7 +55,7 @@ void serial_early_init(void) { const mcu_pin_obj_t* tx = MP_OBJ_TO_PTR(DEBUG_UART_TX); common_hal_busio_uart_construct(&debug_uart, tx, rx, NULL, NULL, NULL, - false, 115200, 8, PARITY_NONE, 1, 1.0f, 64, + false, 115200, 8, UART_PARITY_NONE, 1, 1.0f, 64, buf_array, true); common_hal_busio_uart_never_reset(&debug_uart); #endif diff --git a/supervisor/shared/tick.c b/supervisor/shared/tick.c index 47395bd60..dd7dba8f3 100644 --- a/supervisor/shared/tick.c +++ b/supervisor/shared/tick.c @@ -102,9 +102,15 @@ void mp_hal_delay_ms(mp_uint_t delay) { while (remaining > 0) { RUN_BACKGROUND_TASKS; // Check to see if we've been CTRL-Ced by autoreload or the user. - if(MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception)) || - MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception)) || + if(MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_kbd_exception))) + { + // clear exception and generate stacktrace + MP_STATE_VM(mp_pending_exception) = MP_OBJ_NULL; + nlr_raise(&MP_STATE_VM(mp_kbd_exception)); + } + if( MP_STATE_VM(mp_pending_exception) == MP_OBJ_FROM_PTR(&MP_STATE_VM(mp_reload_exception)) || WATCHDOG_EXCEPTION_CHECK()) { + // stop sleeping immediately break; } remaining = end_tick - port_get_raw_ticks(NULL); diff --git a/supervisor/supervisor.mk b/supervisor/supervisor.mk index 195e4a9b2..21803ae0a 100644 --- a/supervisor/supervisor.mk +++ b/supervisor/supervisor.mk @@ -115,9 +115,14 @@ ifndef USB_INTERFACE_NAME USB_INTERFACE_NAME = "CircuitPython" endif -ifndef USB_DEVICES -USB_DEVICES = "CDC,MSC,AUDIO,HID" +USB_DEVICES_COMPUTED := CDC,MSC +ifeq ($(CIRCUITPY_USB_MIDI),1) +USB_DEVICES_COMPUTED := $(USB_DEVICES_COMPUTED),AUDIO endif +ifeq ($(CIRCUITPY_USB_HID),1) +USB_DEVICES_COMPUTED := $(USB_DEVICES_COMPUTED),HID +endif +USB_DEVICES ?= "$(USB_DEVICES_COMPUTED)" ifndef USB_HID_DEVICES USB_HID_DEVICES = "KEYBOARD,MOUSE,CONSUMER,GAMEPAD" diff --git a/tests/pyb/halerror.py b/tests/pyb/halerror.py deleted file mode 100644 index 1a6bce1a7..000000000 --- a/tests/pyb/halerror.py +++ /dev/null @@ -1,15 +0,0 @@ -# test hal errors - -import pyb - -i2c = pyb.I2C(2, pyb.I2C.MASTER) -try: - i2c.recv(1, 1) -except OSError as e: - print(repr(e)) - -can = pyb.CAN(1, pyb.CAN.NORMAL) -try: - can.send('1', 1, timeout=50) -except OSError as e: - print(repr(e)) diff --git a/tests/pyb/i2c.py b/tests/pyb/i2c.py deleted file mode 100644 index 6875e5a5a..000000000 --- a/tests/pyb/i2c.py +++ /dev/null @@ -1,32 +0,0 @@ -import pyb -from pyb import I2C - -# test we can correctly create by id or name -for bus in (-1, 0, 1, 2, 3, "X", "Y", "Z"): - try: - I2C(bus) - print("I2C", bus) - except ValueError: - print("ValueError", bus) - -i2c = I2C(1) - -i2c.init(I2C.MASTER, baudrate=400000) -print(i2c.scan()) -i2c.deinit() - -# use accelerometer to test i2c bus - -accel_addr = 76 - -pyb.Accel() # this will init the MMA for us -i2c.init(I2C.MASTER, baudrate=400000) - -print(i2c.scan()) -print(i2c.is_ready(accel_addr)) - -print(i2c.mem_read(1, accel_addr, 7, timeout=500)) -i2c.mem_write(0, accel_addr, 0, timeout=500) - -i2c.send(7, addr=accel_addr) -i2c.recv(1, addr=accel_addr) diff --git a/tests/pyb/i2c.py.exp b/tests/pyb/i2c.py.exp deleted file mode 100644 index 709fb412d..000000000 --- a/tests/pyb/i2c.py.exp +++ /dev/null @@ -1,12 +0,0 @@ -ValueError -1 -ValueError 0 -I2C 1 -I2C 2 -ValueError 3 -I2C X -I2C Y -ValueError Z -[] -[76] -True -b'\x01' diff --git a/tests/pyb/i2c_error.py b/tests/pyb/i2c_error.py deleted file mode 100644 index 3201d6367..000000000 --- a/tests/pyb/i2c_error.py +++ /dev/null @@ -1,50 +0,0 @@ -# test I2C errors, with polling (disabled irqs) and DMA - -import pyb -from pyb import I2C - -# init accelerometer -pyb.Accel() - -# get I2C bus -i2c = I2C(1, I2C.MASTER, dma=True) - -# test polling mem_read -pyb.disable_irq() -i2c.mem_read(1, 76, 0x0a) # should succeed -pyb.enable_irq() -try: - pyb.disable_irq() - i2c.mem_read(1, 77, 0x0a) # should fail -except OSError as e: - pyb.enable_irq() - print(repr(e)) -i2c.mem_read(1, 76, 0x0a) # should succeed - -# test polling mem_write -pyb.disable_irq() -i2c.mem_write(1, 76, 0x0a) # should succeed -pyb.enable_irq() -try: - pyb.disable_irq() - i2c.mem_write(1, 77, 0x0a) # should fail -except OSError as e: - pyb.enable_irq() - print(repr(e)) -i2c.mem_write(1, 76, 0x0a) # should succeed - -# test DMA mem_read -i2c.mem_read(1, 76, 0x0a) # should succeed -try: - i2c.mem_read(1, 77, 0x0a) # should fail -except OSError as e: - print(repr(e)) -i2c.mem_read(1, 76, 0x0a) # should succeed - -# test DMA mem_write -i2c.mem_write(1, 76, 0x0a) # should succeed -try: - i2c.mem_write(1, 77, 0x0a) # should fail -except OSError as e: - print(repr(e)) -i2c.mem_write(1, 76, 0x0a) # should succeed diff --git a/tests/pyb/spi.py b/tests/pyb/spi.py deleted file mode 100644 index 88cc975bb..000000000 --- a/tests/pyb/spi.py +++ /dev/null @@ -1,33 +0,0 @@ -from pyb import SPI - -# test we can correctly create by id or name -for bus in (-1, 0, 1, 2, 3, "X", "Y", "Z"): - try: - SPI(bus) - print("SPI", bus) - except ValueError: - print("ValueError", bus) - -spi = SPI(1) -print(spi) - -spi = SPI(1, SPI.MASTER) -spi = SPI(1, SPI.MASTER, baudrate=500000) -spi = SPI(1, SPI.MASTER, 500000, polarity=1, phase=0, bits=8, firstbit=SPI.MSB, ti=False, crc=None) -print(spi) - -spi.init(SPI.SLAVE, phase=1) -print(spi) -try: - # need to flush input before we get an error (error is what we want to test) - for i in range(10): - spi.recv(1, timeout=100) -except OSError: - print("OSError") - -spi.init(SPI.MASTER) -spi.send(1, timeout=100) -print(spi.recv(1, timeout=100)) -print(spi.send_recv(1, timeout=100)) - -spi.deinit() diff --git a/tests/pyb/spi.py.exp b/tests/pyb/spi.py.exp deleted file mode 100644 index a0d835700..000000000 --- a/tests/pyb/spi.py.exp +++ /dev/null @@ -1,14 +0,0 @@ -ValueError -1 -ValueError 0 -SPI 1 -SPI 2 -ValueError 3 -SPI X -SPI Y -ValueError Z -SPI(1) -SPI(1, SPI.MASTER, baudrate=328125, prescaler=256, polarity=1, phase=0, bits=8) -SPI(1, SPI.SLAVE, polarity=1, phase=1, bits=8) -OSError -b'\xff' -b'\xff' diff --git a/tests/run-tests b/tests/run-tests index 6e980f03c..151d48095 100755 --- a/tests/run-tests +++ b/tests/run-tests @@ -87,28 +87,32 @@ def run_micropython(pyb, args, test_file, is_special=False): def get(required=False): rv = b'' while True: - ready = select.select([master], [], [], 0.02) - if ready[0] == [master]: - rv += os.read(master, 1024) + ready = select.select([emulator], [], [], 0.02) + if ready[0] == [emulator]: + rv += os.read(emulator, 1024) else: if not required or rv: return rv def send_get(what): - os.write(master, what) + os.write(emulator, what) return get() with open(test_file, 'rb') as f: # instead of: output_mupy = subprocess.check_output(args, stdin=f) - master, slave = pty.openpty() - p = subprocess.Popen(args, stdin=slave, stdout=slave, + # openpty returns two read/write file descriptors. The first one is + # used by the program which provides the virtual + # terminal service, and the second one is used by the + # subprogram which requires a tty to work. + emulator, subterminal = pty.openpty() + p = subprocess.Popen(args, stdin=subterminal, stdout=subterminal, stderr=subprocess.STDOUT, bufsize=0) banner = get(True) output_mupy = banner + b''.join(send_get(line) for line in f) send_get(b'\x04') # exit the REPL, so coverage info is saved p.kill() - os.close(master) - os.close(slave) + os.close(emulator) + os.close(subterminal) else: output_mupy = subprocess.check_output(args + [test_file], stderr=subprocess.STDOUT) except subprocess.CalledProcessError: diff --git a/tests/wipy/i2c.py b/tests/wipy/i2c.py deleted file mode 100644 index 39dcdc722..000000000 --- a/tests/wipy/i2c.py +++ /dev/null @@ -1,175 +0,0 @@ -''' -I2C test for the CC3200 based boards. -A MPU-9150 sensor must be connected to the I2C bus. -''' - -from machine import I2C -import os -import time - -mch = os.uname().machine -if 'LaunchPad' in mch: - i2c_pins = ('GP11', 'GP10') -elif 'WiPy' in mch: - i2c_pins = ('GP15', 'GP10') -else: - raise Exception('Board not supported!') - -i2c = I2C(0, I2C.MASTER, baudrate=400000) -# try initing without the peripheral id -i2c = I2C() -print(i2c) -i2c = I2C(mode=I2C.MASTER, baudrate=50000, pins=i2c_pins) -print(i2c) - -i2c = I2C(0, I2C.MASTER, baudrate=100000) -print(i2c) -i2c = I2C(0, mode=I2C.MASTER, baudrate=400000) -print(i2c) -i2c = I2C(0, mode=I2C.MASTER, baudrate=400000, pins=i2c_pins) -print(i2c) - -addr = i2c.scan()[0] -print(addr) - -reg = bytearray(1) -reg2 = bytearray(2) -reg2_r = bytearray(2) - -# reset the sensor -reg[0] |= 0x80 -print(1 == i2c.writeto_mem(addr, 107, reg)) -time.sleep_ms(100) # wait for the sensor to reset... - -print(1 == i2c.readfrom_mem_into(addr, 107, reg)) # read the power management register 1 -print(0x40 == reg[0]) - -# now just read one byte -data = i2c.readfrom_mem(addr, 117, 1) # read the "who am I?" register -print(0x68 == data[0]) -print(len(data) == 1) -print(1 == i2c.readfrom_mem_into(addr, 117, reg)) # read the "who am I?" register again -print(0x68 == reg[0]) - -# now try reading two bytes -data = i2c.readfrom_mem(addr, 116, 2) # read the "who am I?" register -print(0x68 == data[1]) -print(data == b'\x00\x68') -print(len(data) == 2) -print(2 == i2c.readfrom_mem_into(addr, 116, reg2)) # read the "who am I?" register again -print(0x68 == reg2[1]) -print(reg2 == b'\x00\x68') - -print(1 == i2c.readfrom_mem_into(addr, 107, reg)) # read the power management register 1 -print(0x40 == reg[0]) -# clear the sleep bit -reg[0] = 0 -print(1 == i2c.writeto_mem(addr, 107, reg)) -# read it back -i2c.readfrom_mem_into(addr, 107, reg) -print(0 == reg[0]) - -# set the sleep bit -reg[0] = 0x40 -print(1 == i2c.writeto_mem(addr, 107, reg)) -# read it back -i2c.readfrom_mem_into(addr, 107, reg) -print(0x40 == reg[0]) - -# reset the sensor -reg[0] |= 0x80 -print(1 == i2c.writeto_mem(addr, 107, reg)) -time.sleep_ms(100) # wait for the sensor to reset... - -# now read and write two register at a time -print(2 == i2c.readfrom_mem_into(addr, 107, reg2)) -print(0x40 == reg2[0]) -print(0x00 == reg2[1]) -# clear the sleep bit -reg2[0] = 0 -# set some other bits -reg2[1] |= 0x03 -print(2 == i2c.writeto_mem(addr, 107, reg2)) -# read it back -i2c.readfrom_mem_into(addr, 107, reg2_r) -print(reg2 == reg2_r) - -# reset the sensor -reg[0] = 0x80 -print(1 == i2c.writeto_mem(addr, 107, reg)) -time.sleep_ms(100) # wait for the sensor to reset... - -# try some raw read and writes -reg[0] = 117 # register address -print(1 == i2c.writeto(addr, reg, stop=False)) # just write the register address -# now read -print(1 == i2c.readfrom_into(addr, reg)) -print(reg[0] == 0x68) -reg[0] = 117 # register address -print(1 == i2c.writeto(addr, reg, stop=False)) # just write the register address -# now read -print(0x68 == i2c.readfrom(addr, 1)[0]) - -i2c.readfrom_mem_into(addr, 107, reg2) -print(0x40 == reg2[0]) -print(0x00 == reg2[1]) - -reg2[0] = 107 # register address -reg2[1] = 0 -print(2 == i2c.writeto(addr, reg2, stop=True)) # write the register address and the data -i2c.readfrom_mem_into(addr, 107, reg) # check it back -print(reg[0] == 0) - -# check for memory leaks... -for i in range (0, 1000): - i2c = I2C(0, I2C.MASTER, baudrate=100000) - -# test deinit -i2c = I2C(0, I2C.MASTER, baudrate=100000) -i2c.deinit() -print(i2c) - -# next ones should raise -try: - i2c.scan() -except Exception: - print("Exception") - -try: - i2c.readfrom(addr, 1) -except Exception: - print("Exception") - -try: - i2c.readfrom_into(addr, reg) -except Exception: - print("Exception") - -try: - i2c.readfrom_mem_into(addr, 107, reg) -except Exception: - print("Exception") - -try: - i2c.writeto(addr, reg, stop=False) -except Exception: - print("Exception") - -try: - i2c.writeto_mem(addr, 107, reg) -except Exception: - print("Exception") - -try: - i2c.readfrom_mem(addr, 116, 2) -except Exception: - print("Exception") - -try: - I2C(1, I2C.MASTER, baudrate=100000) -except Exception: - print("Exception") - -# reinitialization must work -i2c.init(baudrate=400000) -print(i2c) diff --git a/tests/wipy/i2c.py.exp b/tests/wipy/i2c.py.exp deleted file mode 100644 index 083da9be7..000000000 --- a/tests/wipy/i2c.py.exp +++ /dev/null @@ -1,51 +0,0 @@ -I2C(0, I2C.MASTER, baudrate=100000) -I2C(0, I2C.MASTER, baudrate=50000) -I2C(0, I2C.MASTER, baudrate=100000) -I2C(0, I2C.MASTER, baudrate=400000) -I2C(0, I2C.MASTER, baudrate=400000) -104 -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -True -I2C(0) -Exception -Exception -Exception -Exception -Exception -Exception -Exception -Exception -I2C(0, I2C.MASTER, baudrate=400000) diff --git a/tests/wipy/spi.py b/tests/wipy/spi.py deleted file mode 100644 index 6bd7aabce..000000000 --- a/tests/wipy/spi.py +++ /dev/null @@ -1,147 +0,0 @@ -''' -SPI test for the CC3200 based boards. -''' - -from machine import SPI -import os - -mch = os.uname().machine -if 'LaunchPad' in mch: - spi_pins = ('GP14', 'GP16', 'GP30') -elif 'WiPy' in mch: - spi_pins = ('GP14', 'GP16', 'GP30') -else: - raise Exception('Board not supported!') - -spi = SPI(0, SPI.MASTER, baudrate=2000000, polarity=0, phase=0, firstbit=SPI.MSB, pins=spi_pins) -print(spi) -spi = SPI(baudrate=5000000) -print(spi) -spi = SPI(0, SPI.MASTER, baudrate=200000, bits=16, polarity=0, phase=0) -print(spi) -spi = SPI(0, SPI.MASTER, baudrate=10000000, polarity=0, phase=1) -print(spi) -spi = SPI(0, SPI.MASTER, baudrate=5000000, bits=32, polarity=1, phase=0) -print(spi) -spi = SPI(0, SPI.MASTER, baudrate=10000000, polarity=1, phase=1) -print(spi) -spi.init(baudrate=20000000, polarity=0, phase=0) -print(spi) -spi=SPI() -print(spi) -SPI(mode=SPI.MASTER) -SPI(mode=SPI.MASTER, pins=spi_pins) -SPI(id=0, mode=SPI.MASTER, polarity=0, phase=0, pins=('GP14', 'GP16', 'GP15')) -SPI(0, SPI.MASTER, polarity=0, phase=0, pins=('GP31', 'GP16', 'GP15')) - -spi = SPI(0, SPI.MASTER, baudrate=10000000, polarity=0, phase=0, pins=spi_pins) -print(spi.write('123456') == 6) -buffer_r = bytearray(10) -print(spi.readinto(buffer_r) == 10) -print(spi.readinto(buffer_r, write=0x55) == 10) -read = spi.read(10) -print(len(read) == 10) -read = spi.read(10, write=0xFF) -print(len(read) == 10) -buffer_w = bytearray([1, 2, 3, 4, 5, 6, 7, 8, 9, 0]) -print(spi.write_readinto(buffer_w, buffer_r) == 10) -print(buffer_w == buffer_r) - -# test all polaritiy and phase combinations -spi.init(polarity=1, phase=0, pins=None) -buffer_r = bytearray(10) -spi.write_readinto(buffer_w, buffer_r) -print(buffer_w == buffer_r) - -spi.init(polarity=1, phase=1, pins=None) -buffer_r = bytearray(10) -spi.write_readinto(buffer_w, buffer_r) -print(buffer_w == buffer_r) - -spi.init(polarity=0, phase=1, pins=None) -buffer_r = bytearray(10) -spi.write_readinto(buffer_w, buffer_r) -print(buffer_w == buffer_r) - -# test 16 and 32 bit transfers -buffer_w = bytearray([1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 1, 2]) -buffer_r = bytearray(12) -spi.init(SPI.MASTER, baudrate=10000000, bits=16, polarity=0, phase=0, pins=None) -print(spi.write_readinto(buffer_w, buffer_r) == 12) -print(buffer_w == buffer_r) - -buffer_r = bytearray(12) -spi.init(SPI.MASTER, baudrate=10000000, bits=32, polarity=0, phase=0, pins=None) -print(spi.write_readinto(buffer_w, buffer_r) == 12) -print(buffer_w == buffer_r) - -# check for memory leaks... -for i in range (0, 1000): - spi = SPI(0, SPI.MASTER, baudrate=1000000) - -# test deinit -spi = SPI(0, SPI.MASTER, baudrate=1000000) -spi.deinit() -print(spi) - -spi = SPI(0, SPI.MASTER, baudrate=1000000) -# next ones must fail -try: - spi = SPI(0, 10, baudrate=10000000, polarity=0, phase=0) -except: - print("Exception") - -try: - spi = SPI(0, mode=SPI.MASTER, baudrate=10000000, polarity=1, phase=2) -except: - print("Exception") - -try: - spi = SPI(1, mode=SPI.MASTER, baudrate=10000000, polarity=1, phase=1) -except: - print("Exception") - -try: - spi = SPI(0, mode=SPI.MASTER, baudrate=2000000, polarity=2, phase=0) -except: - print("Exception") - -try: - spi = SPI(0, mode=SPI.MASTER, baudrate=2000000, polarity=2, phase=0, firstbit=2) -except: - print("Exception") - -try: - spi = SPI(0, mode=SPI.MASTER, baudrate=2000000, polarity=2, phase=0, pins=('GP1', 'GP2')) -except: - print("Exception") - -try: - spi = SPI(0, mode=SPI.MASTER, baudrate=2000000, polarity=0, phase=0, bits=9) -except: - print("Exception") - -spi.deinit() -try: - spi.read(15) -except Exception: - print("Exception") - -try: - spi.spi.readinto(buffer_r) -except Exception: - print("Exception") - -try: - spi.spi.write('abc') -except Exception: - print("Exception") - -try: - spi.write_readinto(buffer_w, buffer_r) -except Exception: - print("Exception") - -# reinitialization must work -spi.init(baudrate=500000) -print(spi) diff --git a/tests/wipy/spi.py.exp b/tests/wipy/spi.py.exp deleted file mode 100644 index cc4ff4022..000000000 --- a/tests/wipy/spi.py.exp +++ /dev/null @@ -1,35 +0,0 @@ -SPI(0, SPI.MASTER, baudrate=2000000, bits=8, polarity=0, phase=0, firstbit=SPI.MSB) -SPI(0, SPI.MASTER, baudrate=5000000, bits=8, polarity=0, phase=0, firstbit=SPI.MSB) -SPI(0, SPI.MASTER, baudrate=200000, bits=16, polarity=0, phase=0, firstbit=SPI.MSB) -SPI(0, SPI.MASTER, baudrate=10000000, bits=8, polarity=0, phase=1, firstbit=SPI.MSB) -SPI(0, SPI.MASTER, baudrate=5000000, bits=32, polarity=1, phase=0, firstbit=SPI.MSB) -SPI(0, SPI.MASTER, baudrate=10000000, bits=8, polarity=1, phase=1, firstbit=SPI.MSB) -SPI(0, SPI.MASTER, baudrate=20000000, bits=8, polarity=0, phase=0, firstbit=SPI.MSB) -SPI(0, SPI.MASTER, baudrate=1000000, bits=8, polarity=0, phase=0, firstbit=SPI.MSB) -True -True -True -True -True -True -True -True -True -True -True -True -True -True -SPI(0) -Exception -Exception -Exception -Exception -Exception -Exception -Exception -Exception -Exception -Exception -Exception -SPI(0, SPI.MASTER, baudrate=500000, bits=8, polarity=0, phase=0, firstbit=SPI.MSB) diff --git a/tools/build_board_info.py b/tools/build_board_info.py index 443302330..bbafe19f6 100644 --- a/tools/build_board_info.py +++ b/tools/build_board_info.py @@ -9,6 +9,9 @@ import base64 from datetime import date from sh.contrib import git +sys.path.append("../docs") +import shared_bindings_matrix + sys.path.append("adabot") import adabot.github_requests as github @@ -56,7 +59,10 @@ extension_by_board = { "makerdiary_nrf52840_mdk_usb_dongle": HEX_UF2, "pca10056": BIN_UF2, "pca10059": BIN_UF2, - "electronut_labs_blip": HEX + "electronut_labs_blip": HEX, + + # stm32 + "meowbit_v121": UF2 } aliases_by_board = { @@ -147,7 +153,7 @@ def create_pr(changes, updated, git_info, user): info["id"] = id updated_list.append(info) - updated = json.dumps(updated_list, sort_keys=True, indent=4).encode("utf-8") + b"\n" + updated = json.dumps(updated_list, sort_keys=True, indent=1).encode("utf-8") + b"\n" #print(updated.decode("utf-8")) pr_title = "Automated website update for release {}".format(changes["new_release"]) boards = "" @@ -199,19 +205,6 @@ def create_pr(changes, updated, git_info, user): print(changes) print(pr_info) -def update_downloads(boards, release): - response = github.get("/repos/adafruit/circuitpython/releases/tags/{}".format(release)) - if not response.ok: - print(response.text) - raise RuntimeError("cannot get previous release info") - - assets = response.json()["assets"] - for asset in assets: - board_name = asset["name"].split("-")[2] - if board_name not in boards: - continue - boards[board_name]["download_count"] += asset["download_count"] - def print_active_user(): response = github.get("/user") @@ -243,6 +236,10 @@ def generate_download_info(): languages = get_languages() + support_matrix = shared_bindings_matrix.support_matrix_by_board( + use_branded_name=False + ) + new_stable = "-" not in new_tag previous_releases = set() @@ -259,9 +256,6 @@ def generate_download_info(): board_mapping = get_board_mapping() - for release in previous_releases: - update_downloads(board_mapping, release) - for port in SUPPORTED_PORTS: board_path = os.path.join("../ports", port, "boards") for board_path in os.scandir(board_path): @@ -280,7 +274,10 @@ def generate_download_info(): new_version = { "stable": new_stable, "version": new_tag, - "files": {} + "modules": support_matrix.get(alias, "[]"), + "files": {}, + "languages": languages, + "extensions": board_info["extensions"] } for language in languages: files = [] diff --git a/tools/codestats.sh b/tools/codestats.sh index d33db973b..5f7625c45 100755 --- a/tools/codestats.sh +++ b/tools/codestats.sh @@ -90,9 +90,9 @@ else last_rev="v1.0" fi -# get a list of hashes between last revision (exclusive) and master -hashes=$(git log --format=format:"%H" --reverse ${last_rev}..master) -#hashes=$(git log --format=format:"%H" --reverse ${last_rev}..master | $AWK '{if (NR % 10 == 0) print $0}') # do every 10th one +# get a list of hashes between last revision (exclusive) and main +hashes=$(git log --format=format:"%H" --reverse ${last_rev}..main) +#hashes=$(git log --format=format:"%H" --reverse ${last_rev}..main | $AWK '{if (NR % 10 == 0) print $0}') # do every 10th one for hash in $hashes; do @@ -182,6 +182,6 @@ EOF done -# checkout master and cleanup -git checkout master +# checkout main and cleanup +git checkout main $RM $pystoneavg diff --git a/tools/mksdiodata.py b/tools/mksdiodata.py new file mode 100755 index 000000000..0cce3819f --- /dev/null +++ b/tools/mksdiodata.py @@ -0,0 +1,40 @@ +#!/usr/bin/python3 + +def defines(name, function): + print(f'pin_function_t {name} [] = {{') + for instance in (0, 1): + for port in 'ABCD': + for idx in range(32): + pin = f'P{port}{idx:02d}' + pinmux = f'PINMUX_{pin}I_SDHC{instance}_{function}' + print(f'''\ +#if defined({pinmux}) && ! defined(IGNORE_PIN_{pin}) + {{&pin_{pin}, {instance}, PIN_{pin}, {pinmux} & 0xffff}}, +#endif''') + print(f'{{NULL, 0, 0}}') + print(f'}};') + print() + +print('''\ +#include <stdint.h> +#include "py/obj.h" +#include "sam.h" +#include "samd/pins.h" +#include "mpconfigport.h" +#include "atmel_start_pins.h" +#include "hal/include/hal_gpio.h" + +typedef struct { + const mcu_pin_obj_t *obj; + uint8_t instance; + uint8_t pin; + uint16_t function; +} pin_function_t; +''') + +defines('sdio_ck', 'SDCK') +defines('sdio_cmd', 'SDCMD') +defines('sdio_dat0', 'SDDAT0') +defines('sdio_dat1', 'SDDAT1') +defines('sdio_dat2', 'SDDAT2') +defines('sdio_dat3', 'SDDAT3') diff --git a/tools/pyboard.py b/tools/pyboard.py index 16ee41f70..bb5642bd7 100755 --- a/tools/pyboard.py +++ b/tools/pyboard.py @@ -191,7 +191,7 @@ class ProcessToSerial: class ProcessPtyToTerminal: - """Execute a process which creates a PTY and prints slave PTY as + """Execute a process which creates a PTY and prints secondary PTY as first line of its output, and emulate serial connection using this PTY.""" |