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authorDan Halbert <halbert@adafruit.com>2019-09-03 09:33:14 -0400
committerGitHub <noreply@github.com>2019-09-03 09:33:14 -0400
commitde7a603c065892ac1f72c167437ea7874472c7cd (patch)
treef4f4af989066e2f9f0d685c44ac38f54c725a11e
parenta480b70488d7f1968b0169e857e383bf94b002f1 (diff)
parent35c7646ee4112d6654f982818bc40304e34ea9d4 (diff)
Merge pull request #2105 from arturo182/GD25Q32C
Add GD25Q32C flash device definition
-rw-r--r--supervisor/shared/external_flash/devices.h20
1 files changed, 19 insertions, 1 deletions
diff --git a/supervisor/shared/external_flash/devices.h b/supervisor/shared/external_flash/devices.h
index 5b8f9b298..e787ba739 100644
--- a/supervisor/shared/external_flash/devices.h
+++ b/supervisor/shared/external_flash/devices.h
@@ -66,7 +66,7 @@ typedef struct {
bool single_status_byte: 1;
} external_flash_device;
-// Settings for the Adesto Tech AT25DF081A 1MiB SPI flash. Its on the SAMD21
+// Settings for the Adesto Tech AT25DF081A 1MiB SPI flash. It's on the SAMD21
// Xplained board.
// Datasheet: https://www.adestotech.com/wp-content/uploads/doc8715.pdf
#define AT25DF081A {\
@@ -103,6 +103,24 @@ typedef struct {
.single_status_byte = false, \
}
+// Settings for the Gigadevice GD25Q32C 4MiB SPI flash.
+// Datasheet: http://www.elm-tech.com/en/products/spi-flash-memory/gd25q32/gd25q32.pdf
+#define GD25Q32C {\
+ .total_size = (1 << 22), /* 4 MiB */ \
+ .start_up_time_us = 5000, \
+ .manufacturer_id = 0xc8, \
+ .memory_type = 0x40, \
+ .capacity = 0x16, \
+ .max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \
+ .quad_enable_bit_mask = 0x02, \
+ .has_sector_protection = false, \
+ .supports_fast_read = true, \
+ .supports_qspi = true, \
+ .supports_qspi_writes = true, \
+ .write_status_register_split = true, \
+ .single_status_byte = false, \
+}
+
// Settings for the Gigadevice GD25Q64C 8MiB SPI flash.
// Datasheet: http://www.elm-tech.com/en/products/spi-flash-memory/gd25q64/gd25q64.pdf
#define GD25Q64C {\