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| author | Glenn Ruben Bakke <glennbakke@gmail.com> | 2017-01-22 19:15:24 +0100 |
|---|---|---|
| committer | Glenn Ruben Bakke <glennbakke@gmail.com> | 2017-01-22 19:15:24 +0100 |
| commit | e02c90dca52ce5d8b46368e2131f05f377546c75 (patch) | |
| tree | 9ce1d609f926cb2d742de935e66c45b32121533b | |
| parent | a7f3217c957bac5d45eea8653bc46a09e3a6b0ca (diff) | |
nrf5/hal: Updating clock frequency enums and lookup table for quad spi.
| -rw-r--r-- | nrf5/hal/hal_qspie.c | 9 | ||||
| -rw-r--r-- | nrf5/hal/hal_qspie.h | 20 |
2 files changed, 29 insertions, 0 deletions
diff --git a/nrf5/hal/hal_qspie.c b/nrf5/hal/hal_qspie.c index e29bf0be7..f9e935291 100644 --- a/nrf5/hal/hal_qspie.c +++ b/nrf5/hal/hal_qspie.c @@ -32,4 +32,13 @@ #define QSPI_IRQ_NUM QSPI_IRQn #define QSPI_BASE ((NRF_QSPI_Type *)NRF_QSPI_BASE) +// frequency, 32 MHz / (SCKFREQ + 1) +static const uint32_t hal_qspi_frequency_lookup[] = { + QSPI_FREQUENCY_FREQUENCY_M2 = (15 << QSPI_IFCONFIG1_SCKFREQ_Pos), // 2 Mbps + QSPI_FREQUENCY_FREQUENCY_M4 = (7 << QSPI_IFCONFIG1_SCKFREQ_Pos), // 4 Mbps + QSPI_FREQUENCY_FREQUENCY_M8 = (3 << QSPI_IFCONFIG1_SCKFREQ_Pos), // 8 Mbps + QSPI_FREQUENCY_FREQUENCY_M16 = (1 << QSPI_IFCONFIG1_SCKFREQ_Pos), // 16 Mbps + QSPI_FREQUENCY_FREQUENCY_M32 = (0 << QSPI_IFCONFIG1_SCKFREQ_Pos), // 32 Mbps +}; + #endif // HAL_QSPIE_MODULE_ENABLED diff --git a/nrf5/hal/hal_qspie.h b/nrf5/hal/hal_qspie.h index 23e6dc27f..091667882 100644 --- a/nrf5/hal/hal_qspie.h +++ b/nrf5/hal/hal_qspie.h @@ -35,4 +35,24 @@ #error "Device not supported." #endif +/** + * @brief Quad SPI clock frequency type definition + */ +typedef enum { + HAL_FREQ_2_Mbps, + HAL_FREQ_4_Mbps, + HAL_FREQ_8_Mbps, + HAL_FREQ_16_Mbps, + HAL_FREQ_32_Mbps +} hal_qspi_clk_freq_t; + +/** + * @brief Quad SPI mode configuration type definition + */ +typedef enum { + HAL_QSPI_MODE_SINGLE_LINE, + HAL_QSPI_MODE_DUAL_LINE, + HAL_QSPI_MODE_QUAL_LINE +} hal_qspi_mode_t; + #endif // HAL_QSPIE_H__ |