Move to ASF4 and introduce SAMD51 support. (#258)3.0.0-alpha.0

* atmel-samd: Remove ASF3. This will break builds.

* atmel-samd: Add ASF4 for the SAMD21 and SAMD51.

* Introduce the supervisor concept to facilitate porting.

The supervisor is the code which runs individual MicroPython VMs. By
splitting it out we make it more consistent and easier to find.

This also adds very basic SAMD21 and SAMD51 support using the
supervisor. Only the REPL currently works.

This begins the work for #178.

17 files changed, 0 insertions, 8079 deletions

diff --git a/atmel-samd/asf/sam0/drivers/system/clock/clock.h b/atmel-samd/asf/sam0/drivers/system/clock/clock.h
deleted file mode 100644
index 0d350428d..000000000
--- a/atmel-samd/asf/sam0/drivers/system/clock/clock.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/**
- * \file
- *
- * \brief SAM Clock Driver
- *
- * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-#ifndef SYSTEM_CLOCK_H_INCLUDED
-#define SYSTEM_CLOCK_H_INCLUDED
-
-#include <compiler.h>
-#include <gclk.h>
-#include <clock_feature.h>
-
-#endif /* SYSTEM_CLOCK_H_INCLUDED */
diff --git a/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/clock.c b/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/clock.c
deleted file mode 100644
index 777ac5b9b..000000000
--- a/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/clock.c
+++ /dev/null
@@ -1,1041 +0,0 @@
-/**
- * \file
- *
- * \brief SAM D21/R21/DA0/DA1 Clock Driver
- *
- * Copyright (C) 2013-2016 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-#include <clock.h>
-#include <conf_clocks.h>
-#include <system.h>
-
-#ifndef SYSCTRL_FUSES_OSC32K_ADDR
-#if (SAMR21) || (SAMD)
-#  define SYSCTRL_FUSES_OSC32K_ADDR FUSES_OSC32K_CAL_ADDR
-#  define SYSCTRL_FUSES_OSC32K_Pos  FUSES_OSC32K_CAL_Pos
-#elif (SAML21)
-#  define SYSCTRL_FUSES_OSC32K_ADDR NVMCTRL_OTP4
-#  define SYSCTRL_FUSES_OSC32K_Pos  6
-
-#else
-#  define SYSCTRL_FUSES_OSC32K_ADDR SYSCTRL_FUSES_OSC32K_CAL_ADDR
-#  define SYSCTRL_FUSES_OSC32K_Pos  SYSCTRL_FUSES_OSC32K_CAL_Pos
-#endif
-#endif
-
-/**
- * \internal
- * \brief DFLL-specific data container.
- */
-struct _system_clock_dfll_config {
-	uint32_t control;
-	uint32_t val;
-	uint32_t mul;
-};
-
-/**
- * \internal
- * \brief DPLL-specific data container.
- */
-struct _system_clock_dpll_config {
-	uint32_t frequency;
-};
-
-
-/**
- * \internal
- * \brief XOSC-specific data container.
- */
-struct _system_clock_xosc_config {
-	uint32_t frequency;
-};
-
-/**
- * \internal
- * \brief System clock module data container.
- */
-struct _system_clock_module {
-	volatile struct _system_clock_dfll_config dfll;
-
-#ifdef FEATURE_SYSTEM_CLOCK_DPLL
-	volatile struct _system_clock_dpll_config dpll;
-#endif
-
-	volatile struct _system_clock_xosc_config xosc;
-	volatile struct _system_clock_xosc_config xosc32k;
-};
-
-/**
- * \internal
- * \brief Internal module instance to cache configuration values.
- */
-static struct _system_clock_module _system_clock_inst = {
-		.dfll = {
-			.control     = 0,
-			.val     = 0,
-			.mul     = 0,
-		},
-
-#ifdef FEATURE_SYSTEM_CLOCK_DPLL
-		.dpll = {
-			.frequency   = 0,
-		},
-#endif
-		.xosc = {
-			.frequency   = 0,
-		},
-		.xosc32k = {
-			.frequency   = 0,
-		},
-	};
-
-/**
- * \internal
- * \brief Wait for sync to the DFLL control registers.
- */
-static inline void _system_dfll_wait_for_sync(void)
-{
-	while (!(SYSCTRL->PCLKSR.reg & SYSCTRL_PCLKSR_DFLLRDY)) {
-		/* Wait for DFLL sync */
-	}
-}
-
-/**
- * \internal
- * \brief Wait for sync to the OSC32K control registers.
- */
-static inline void _system_osc32k_wait_for_sync(void)
-{
-	while (!(SYSCTRL->PCLKSR.reg & SYSCTRL_PCLKSR_OSC32KRDY)) {
-		/* Wait for OSC32K sync */
-	}
-}
-
-static inline void _system_clock_source_dfll_set_config_errata_9905(void)
-{
-
-	/* Disable ONDEMAND mode while writing configurations */
-	SYSCTRL->DFLLCTRL.reg = SYSCTRL_DFLLCTRL_ENABLE;
-	_system_dfll_wait_for_sync();
-
-	SYSCTRL->DFLLMUL.reg = _system_clock_inst.dfll.mul;
-	SYSCTRL->DFLLVAL.reg = _system_clock_inst.dfll.val;
-
-	/* Write full configuration to DFLL control register */
-	SYSCTRL->DFLLCTRL.reg = 0;
-	_system_dfll_wait_for_sync();
-	SYSCTRL->DFLLCTRL.reg = _system_clock_inst.dfll.control;
-}
-
-/**
- * \brief Retrieve the frequency of a clock source.
- *
- * Determines the current operating frequency of a given clock source.
- *
- * \param[in] clock_source  Clock source to get the frequency
- *
- * \returns Frequency of the given clock source, in Hz.
- */
-uint32_t system_clock_source_get_hz(
-		const enum system_clock_source clock_source)
-{
-	switch (clock_source) {
-	case SYSTEM_CLOCK_SOURCE_XOSC:
-		return _system_clock_inst.xosc.frequency;
-
-	case SYSTEM_CLOCK_SOURCE_OSC8M:
-		return 8000000UL >> SYSCTRL->OSC8M.bit.PRESC;
-
-	case SYSTEM_CLOCK_SOURCE_OSC32K:
-		return 32768UL;
-
-	case SYSTEM_CLOCK_SOURCE_ULP32K:
-		return 32768UL;
-
-	case SYSTEM_CLOCK_SOURCE_XOSC32K:
-		return _system_clock_inst.xosc32k.frequency;
-
-	case SYSTEM_CLOCK_SOURCE_DFLL:
-
-		/* Check if the DFLL has been configured */
-		if (!(_system_clock_inst.dfll.control & SYSCTRL_DFLLCTRL_ENABLE))
-			return 0;
-
-		/* Make sure that the DFLL module is ready */
-		_system_dfll_wait_for_sync();
-
-		/* Check if operating in closed loop mode */
-		if ((_system_clock_inst.dfll.control & SYSCTRL_DFLLCTRL_MODE) &&
-			!( _system_clock_inst.dfll.control & SYSCTRL_DFLLCTRL_USBCRM )) {
-			return system_gclk_chan_get_hz(SYSCTRL_GCLK_ID_DFLL48) *
-					(_system_clock_inst.dfll.mul & 0xffff);
-		}
-
-		return 48000000UL;
-
-#ifdef FEATURE_SYSTEM_CLOCK_DPLL
-	case SYSTEM_CLOCK_SOURCE_DPLL:
-		if (!(SYSCTRL->DPLLSTATUS.reg & SYSCTRL_DPLLSTATUS_ENABLE)) {
-			return 0;
-		}
-
-		return _system_clock_inst.dpll.frequency;
-#endif
-
-	default:
-		return 0;
-	}
-}
-
-/**
- * \brief Configure the internal OSC8M oscillator clock source.
- *
- * Configures the 8MHz (nominal) internal RC oscillator with the given
- * configuration settings.
- *
- * \param[in] config  OSC8M configuration structure containing the new config
- */
-void system_clock_source_osc8m_set_config(
-		struct system_clock_source_osc8m_config *const config)
-{
-	SYSCTRL_OSC8M_Type temp = SYSCTRL->OSC8M;
-
-	/* Use temporary struct to reduce register access */
-	temp.bit.PRESC    = config->prescaler;
-	temp.bit.ONDEMAND = config->on_demand;
-	temp.bit.RUNSTDBY = config->run_in_standby;
-
-	SYSCTRL->OSC8M = temp;
-}
-
-/**
- * \brief Configure the internal OSC32K oscillator clock source.
- *
- * Configures the 32KHz (nominal) internal RC oscillator with the given
- * configuration settings.
- *
- * \param[in] config  OSC32K configuration structure containing the new config
- */
-void system_clock_source_osc32k_set_config(
-		struct system_clock_source_osc32k_config *const config)
-{
-	SYSCTRL_OSC32K_Type temp = SYSCTRL->OSC32K;
-
-	/* Update settings via a temporary struct to reduce register access */
-	temp.bit.EN1K     = config->enable_1khz_output;
-	temp.bit.EN32K    = config->enable_32khz_output;
-	temp.bit.STARTUP  = config->startup_time;
-	temp.bit.ONDEMAND = config->on_demand;
-	temp.bit.RUNSTDBY = config->run_in_standby;
-	temp.bit.WRTLOCK  = config->write_once;
-
-	SYSCTRL->OSC32K  = temp;
-}
-
-/**
- * \brief Configure the external oscillator clock source.
- *
- * Configures the external oscillator clock source with the given configuration
- * settings.
- *
- * \param[in] config  External oscillator configuration structure containing
- *                    the new config
- */
-void system_clock_source_xosc_set_config(
-		struct system_clock_source_xosc_config *const config)
-{
-	SYSCTRL_XOSC_Type temp = SYSCTRL->XOSC;
-
-	temp.bit.STARTUP = config->startup_time;
-
-	if (config->external_clock == SYSTEM_CLOCK_EXTERNAL_CRYSTAL) {
-		temp.bit.XTALEN = 1;
-	} else {
-		temp.bit.XTALEN = 0;
-	}
-
-	temp.bit.AMPGC = config->auto_gain_control;
-
-	/* Set gain if automatic gain control is not selected */
-	if (!config->auto_gain_control) {
-		if (config->frequency <= 2000000) {
-			temp.bit.GAIN = 0;
-		} else if (config->frequency <= 4000000) {
-			temp.bit.GAIN = 1;
-		} else if (config->frequency <= 8000000) {
-			temp.bit.GAIN = 2;
-		} else if (config->frequency <= 16000000) {
-			temp.bit.GAIN = 3;
-		} else if (config->frequency <= 32000000) {
-			temp.bit.GAIN = 4;
-		}
-
-	}
-
-	temp.bit.ONDEMAND = config->on_demand;
-	temp.bit.RUNSTDBY = config->run_in_standby;
-
-	/* Store XOSC frequency for internal use */
-	_system_clock_inst.xosc.frequency = config->frequency;
-
-	SYSCTRL->XOSC = temp;
-}
-
-/**
- * \brief Configure the XOSC32K external 32KHz oscillator clock source.
- *
- * Configures the external 32KHz oscillator clock source with the given
- * configuration settings.
- *
- * \param[in] config  XOSC32K configuration structure containing the new config
- */
-void system_clock_source_xosc32k_set_config(
-		struct system_clock_source_xosc32k_config *const config)
-{
-	SYSCTRL_XOSC32K_Type temp = SYSCTRL->XOSC32K;
-
-	temp.bit.STARTUP = config->startup_time;
-
-	if (config->external_clock == SYSTEM_CLOCK_EXTERNAL_CRYSTAL) {
-		temp.bit.XTALEN = 1;
-	} else {
-		temp.bit.XTALEN = 0;
-	}
-
-	temp.bit.AAMPEN = config->auto_gain_control;
-	temp.bit.EN1K = config->enable_1khz_output;
-	temp.bit.EN32K = config->enable_32khz_output;
-
-	temp.bit.ONDEMAND = config->on_demand;
-	temp.bit.RUNSTDBY = config->run_in_standby;
-	temp.bit.WRTLOCK  = config->write_once;
-
-	/* Cache the new frequency in case the user needs to check the current
-	 * operating frequency later */
-	_system_clock_inst.xosc32k.frequency = config->frequency;
-
-	SYSCTRL->XOSC32K = temp;
-}
-
-/**
- * \brief Configure the DFLL clock source.
- *
- * Configures the Digital Frequency Locked Loop clock source with the given
- * configuration settings.
- *
- * \note The DFLL will be running when this function returns, as the DFLL module
- *       needs to be enabled in order to perform the module configuration.
- *
- * \param[in] config  DFLL configuration structure containing the new config
- */
-void system_clock_source_dfll_set_config(
-		struct system_clock_source_dfll_config *const config)
-{
-	_system_clock_inst.dfll.val =
-			SYSCTRL_DFLLVAL_COARSE(config->coarse_value) |
-			SYSCTRL_DFLLVAL_FINE(config->fine_value);
-
-	_system_clock_inst.dfll.control =
-			(uint32_t)config->wakeup_lock     |
-			(uint32_t)config->stable_tracking |
-			(uint32_t)config->quick_lock      |
-			(uint32_t)config->chill_cycle     |
-			((uint32_t)config->on_demand << SYSCTRL_DFLLCTRL_ONDEMAND_Pos);
-
-	if (config->loop_mode == SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED) {
-
-		_system_clock_inst.dfll.mul =
-				SYSCTRL_DFLLMUL_CSTEP(config->coarse_max_step) |
-				SYSCTRL_DFLLMUL_FSTEP(config->fine_max_step)   |
-				SYSCTRL_DFLLMUL_MUL(config->multiply_factor);
-
-		/* Enable the closed loop mode */
-		_system_clock_inst.dfll.control |= config->loop_mode;
-	}
-	if (config->loop_mode == SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY) {
-
-		_system_clock_inst.dfll.mul =
-				SYSCTRL_DFLLMUL_CSTEP(config->coarse_max_step) |
-				SYSCTRL_DFLLMUL_FSTEP(config->fine_max_step)   |
-				SYSCTRL_DFLLMUL_MUL(config->multiply_factor);
-
-		/* Enable the USB recovery mode */
-		_system_clock_inst.dfll.control |= config->loop_mode |
-				SYSCTRL_DFLLCTRL_MODE | SYSCTRL_DFLLCTRL_BPLCKC;
-	}
-}
-
-#ifdef FEATURE_SYSTEM_CLOCK_DPLL
-/**
- * \brief Configure the DPLL clock source.
- *
- * Configures the Digital Phase-Locked Loop clock source with the given
- * configuration settings.
- *
- * \note The DPLL will be running when this function returns, as the DPLL module
- *       needs to be enabled in order to perform the module configuration.
- *
- * \param[in] config  DPLL configuration structure containing the new config
- */
-void system_clock_source_dpll_set_config(
-		struct system_clock_source_dpll_config *const config)
-{
-
-	uint32_t tmpldr;
-	uint8_t  tmpldrfrac;
-	uint32_t refclk;
-
-	refclk = config->reference_frequency;
-
-	/* Only reference clock REF1 can be divided */
-	if (config->reference_clock == SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC) {
-		refclk = refclk / (2 * (config->reference_divider + 1));
-	}
-
-	/* Calculate LDRFRAC and LDR */
-	tmpldr = (config->output_frequency << 4) / refclk;
-	tmpldrfrac = tmpldr & 0x0f;
-	tmpldr = (tmpldr >> 4) - 1;
-
-	SYSCTRL->DPLLCTRLA.reg =
-			((uint32_t)config->on_demand << SYSCTRL_DPLLCTRLA_ONDEMAND_Pos) |
-			((uint32_t)config->run_in_standby << SYSCTRL_DPLLCTRLA_RUNSTDBY_Pos);
-
-	SYSCTRL->DPLLRATIO.reg =
-			SYSCTRL_DPLLRATIO_LDRFRAC(tmpldrfrac) |
-			SYSCTRL_DPLLRATIO_LDR(tmpldr);
-
-	SYSCTRL->DPLLCTRLB.reg =
-			SYSCTRL_DPLLCTRLB_DIV(config->reference_divider) |
-			((uint32_t)config->lock_bypass << SYSCTRL_DPLLCTRLB_LBYPASS_Pos) |
-			SYSCTRL_DPLLCTRLB_LTIME(config->lock_time) |
-			SYSCTRL_DPLLCTRLB_REFCLK(config->reference_clock) |
-			((uint32_t)config->wake_up_fast << SYSCTRL_DPLLCTRLB_WUF_Pos) |
-			((uint32_t)config->low_power_enable << SYSCTRL_DPLLCTRLB_LPEN_Pos) |
-			SYSCTRL_DPLLCTRLB_FILTER(config->filter);
-
-	/*
-	 * Fck = Fckrx * (LDR + 1 + LDRFRAC / 16)
-	 */
-	_system_clock_inst.dpll.frequency =
-			(refclk * (((tmpldr + 1) << 4) + tmpldrfrac)) >> 4;
-}
-#endif
-
-/**
- * \brief Writes the calibration values for a given oscillator clock source.
- *
- * Writes an oscillator calibration value to the given oscillator control
- * registers. The acceptable ranges are:
- *
- * For OSC32K:
- *  - 7 bits (max value 128)
- * For OSC8MHZ:
- *  - 8 bits (Max value 255)
- * For OSCULP:
- *  - 5 bits (Max value 32)
- *
- * \note The frequency range parameter applies only when configuring the 8MHz
- *       oscillator and will be ignored for the other oscillators.
- *
- * \param[in] clock_source       Clock source to calibrate
- * \param[in] calibration_value  Calibration value to write
- * \param[in] freq_range         Frequency range (8MHz oscillator only)
- *
- * \retval STATUS_OK               The calibration value was written
- *                                 successfully.
- * \retval STATUS_ERR_INVALID_ARG  The setting is not valid for selected clock
- *                                 source.
- */
-enum status_code system_clock_source_write_calibration(
-		const enum system_clock_source clock_source,
-		const uint16_t calibration_value,
-		const uint8_t freq_range)
-{
-	switch (clock_source) {
-	case SYSTEM_CLOCK_SOURCE_OSC8M:
-
-		if (calibration_value > 0xfff || freq_range > 4) {
-			return STATUS_ERR_INVALID_ARG;
-		}
-
-		SYSCTRL->OSC8M.bit.CALIB  = calibration_value;
-		SYSCTRL->OSC8M.bit.FRANGE = freq_range;
-		break;
-
-	case SYSTEM_CLOCK_SOURCE_OSC32K:
-
-		if (calibration_value > 128) {
-			return STATUS_ERR_INVALID_ARG;
-		}
-
-		_system_osc32k_wait_for_sync();
-		SYSCTRL->OSC32K.bit.CALIB = calibration_value;
-		break;
-
-	case SYSTEM_CLOCK_SOURCE_ULP32K:
-
-		if (calibration_value > 32) {
-			return STATUS_ERR_INVALID_ARG;
-		}
-
-		SYSCTRL->OSCULP32K.bit.CALIB = calibration_value;
-		break;
-
-	default:
-		Assert(false);
-		return STATUS_ERR_INVALID_ARG;
-		break;
-	}
-
-	return STATUS_OK;
-}
-
-/**
- * \brief Enables a clock source.
- *
- * Enables a clock source which has been previously configured.
- *
- * \param[in] clock_source       Clock source to enable
- *
- * \retval STATUS_OK               Clock source was enabled successfully and
- *                                 is ready
- * \retval STATUS_ERR_INVALID_ARG  The clock source is not available on this
- *                                 device
- */
-enum status_code system_clock_source_enable(
-		const enum system_clock_source clock_source)
-{
-	switch (clock_source) {
-	case SYSTEM_CLOCK_SOURCE_OSC8M:
-		SYSCTRL->OSC8M.reg |= SYSCTRL_OSC8M_ENABLE;
-		return STATUS_OK;
-
-	case SYSTEM_CLOCK_SOURCE_OSC32K:
-		SYSCTRL->OSC32K.reg |= SYSCTRL_OSC32K_ENABLE;
-		break;
-
-	case SYSTEM_CLOCK_SOURCE_XOSC:
-		SYSCTRL->XOSC.reg |= SYSCTRL_XOSC_ENABLE;
-		break;
-
-	case SYSTEM_CLOCK_SOURCE_XOSC32K:
-		SYSCTRL->XOSC32K.reg |= SYSCTRL_XOSC32K_ENABLE;
-		break;
-
-	case SYSTEM_CLOCK_SOURCE_DFLL:
-		_system_clock_inst.dfll.control |= SYSCTRL_DFLLCTRL_ENABLE;
-		_system_clock_source_dfll_set_config_errata_9905();
-		break;
-
-#ifdef FEATURE_SYSTEM_CLOCK_DPLL
-	case SYSTEM_CLOCK_SOURCE_DPLL:
-		SYSCTRL->DPLLCTRLA.reg |= SYSCTRL_DPLLCTRLA_ENABLE;
-		break;
-#endif
-
-	case SYSTEM_CLOCK_SOURCE_ULP32K:
-		/* Always enabled */
-		return STATUS_OK;
-
-	default:
-		Assert(false);
-		return STATUS_ERR_INVALID_ARG;
-	}
-
-	return STATUS_OK;
-}
-
-/**
- * \brief Disables a clock source.
- *
- * Disables a clock source that was previously enabled.
- *
- * \param[in] clock_source  Clock source to disable
- *
- * \retval STATUS_OK               Clock source was disabled successfully
- * \retval STATUS_ERR_INVALID_ARG  An invalid or unavailable clock source was
- *                                 given
- */
-enum status_code system_clock_source_disable(
-		const enum system_clock_source clock_source)
-{
-	switch (clock_source) {
-	case SYSTEM_CLOCK_SOURCE_OSC8M:
-		SYSCTRL->OSC8M.reg &= ~SYSCTRL_OSC8M_ENABLE;
-		break;
-
-	case SYSTEM_CLOCK_SOURCE_OSC32K:
-		SYSCTRL->OSC32K.reg &= ~SYSCTRL_OSC32K_ENABLE;
-		break;
-
-	case SYSTEM_CLOCK_SOURCE_XOSC:
-		SYSCTRL->XOSC.reg &= ~SYSCTRL_XOSC_ENABLE;
-		break;
-
-	case SYSTEM_CLOCK_SOURCE_XOSC32K:
-		SYSCTRL->XOSC32K.reg &= ~SYSCTRL_XOSC32K_ENABLE;
-		break;
-
-	case SYSTEM_CLOCK_SOURCE_DFLL:
-		_system_clock_inst.dfll.control &= ~SYSCTRL_DFLLCTRL_ENABLE;
-		SYSCTRL->DFLLCTRL.reg = _system_clock_inst.dfll.control;
-		break;
-
-#ifdef FEATURE_SYSTEM_CLOCK_DPLL
-	case SYSTEM_CLOCK_SOURCE_DPLL:
-		SYSCTRL->DPLLCTRLA.reg &= ~SYSCTRL_DPLLCTRLA_ENABLE;
-		break;
-#endif
-
-	case SYSTEM_CLOCK_SOURCE_ULP32K:
-		/* Not possible to disable */
-
-	default:
-		Assert(false);
-		return STATUS_ERR_INVALID_ARG;
-
-	}
-
-	return STATUS_OK;
-}
-
-/**
- * \brief Checks if a clock source is ready.
- *
- * Checks if a given clock source is ready to be used.
- *
- * \param[in] clock_source  Clock source to check if ready
- *
- * \returns Ready state of the given clock source.
- *
- * \retval true   Clock source is enabled and ready
- * \retval false  Clock source is disabled or not yet ready
- */
-bool system_clock_source_is_ready(
-		const enum system_clock_source clock_source)
-{
-	uint32_t mask = 0;
-
-	switch (clock_source) {
-	case SYSTEM_CLOCK_SOURCE_OSC8M:
-		mask = SYSCTRL_PCLKSR_OSC8MRDY;
-		break;
-
-	case SYSTEM_CLOCK_SOURCE_OSC32K:
-		mask = SYSCTRL_PCLKSR_OSC32KRDY;
-		break;
-
-	case SYSTEM_CLOCK_SOURCE_XOSC:
-		mask = SYSCTRL_PCLKSR_XOSCRDY;
-		break;
-
-	case SYSTEM_CLOCK_SOURCE_XOSC32K:
-		mask = SYSCTRL_PCLKSR_XOSC32KRDY;
-		break;
-
-	case SYSTEM_CLOCK_SOURCE_DFLL:
-		if (CONF_CLOCK_DFLL_LOOP_MODE == SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED) {
-			mask = (SYSCTRL_PCLKSR_DFLLRDY |
-			        SYSCTRL_PCLKSR_DFLLLCKF | SYSCTRL_PCLKSR_DFLLLCKC);
-		} else {
-			mask = SYSCTRL_PCLKSR_DFLLRDY;
-		}
-		break;
-
-#ifdef FEATURE_SYSTEM_CLOCK_DPLL
-	case SYSTEM_CLOCK_SOURCE_DPLL:
-		return ((SYSCTRL->DPLLSTATUS.reg &
-				(SYSCTRL_DPLLSTATUS_CLKRDY | SYSCTRL_DPLLSTATUS_LOCK)) ==
-				(SYSCTRL_DPLLSTATUS_CLKRDY | SYSCTRL_DPLLSTATUS_LOCK));
-#endif
-
-	case SYSTEM_CLOCK_SOURCE_ULP32K:
-		/* Not possible to disable */
-		return true;
-
-	default:
-		return false;
-	}
-
-	return ((SYSCTRL->PCLKSR.reg & mask) == mask);
-}
-
-/* Include some checks for conf_clocks.h validation */
-#include "clock_config_check.h"
-
-#if !defined(__DOXYGEN__)
-/** \internal
- *
- * Configures a Generic Clock Generator with the configuration from \c conf_clocks.h.
- */
-#  define _CONF_CLOCK_GCLK_CONFIG(n, unused) \
-	if (CONF_CLOCK_GCLK_##n##_ENABLE == true) { \
-		struct system_gclk_gen_config gclk_conf;                          \
-		system_gclk_gen_get_config_defaults(&gclk_conf);                  \
-		gclk_conf.source_clock    = CONF_CLOCK_GCLK_##n##_CLOCK_SOURCE;   \
-		gclk_conf.division_factor = CONF_CLOCK_GCLK_##n##_PRESCALER;      \
-		gclk_conf.run_in_standby  = CONF_CLOCK_GCLK_##n##_RUN_IN_STANDBY; \
-		gclk_conf.output_enable   = CONF_CLOCK_GCLK_##n##_OUTPUT_ENABLE;  \
-		system_gclk_gen_set_config(GCLK_GENERATOR_##n, &gclk_conf);       \
-		system_gclk_gen_enable(GCLK_GENERATOR_##n);                       \
-	}
-
-/** \internal
- *
- * Configures a Generic Clock Generator with the configuration from \c conf_clocks.h,
- * provided that it is not the main Generic Clock Generator channel.
- */
-#  define _CONF_CLOCK_GCLK_CONFIG_NONMAIN(n, unused) \
-		if (n > 0) { _CONF_CLOCK_GCLK_CONFIG(n, unused); }
-#endif
-
-/** \internal
- *
- * Switch all peripheral clock to a not enabled general clock
- * to save power.
- */
-static void _switch_peripheral_gclk(void)
-{
-	uint32_t gclk_id;
-	struct system_gclk_chan_config gclk_conf;
-
-#if CONF_CLOCK_GCLK_1_ENABLE == false
-	gclk_conf.source_generator = GCLK_GENERATOR_1;
-#elif CONF_CLOCK_GCLK_2_ENABLE == false
-	gclk_conf.source_generator = GCLK_GENERATOR_2;
-#elif CONF_CLOCK_GCLK_3_ENABLE == false
-	gclk_conf.source_generator = GCLK_GENERATOR_3;
-#elif CONF_CLOCK_GCLK_4_ENABLE == false
-	gclk_conf.source_generator = GCLK_GENERATOR_4;
-#elif CONF_CLOCK_GCLK_5_ENABLE == false
-	gclk_conf.source_generator = GCLK_GENERATOR_5;
-#elif CONF_CLOCK_GCLK_6_ENABLE == false
-	gclk_conf.source_generator = GCLK_GENERATOR_6;
-#elif CONF_CLOCK_GCLK_7_ENABLE == false
-	gclk_conf.source_generator = GCLK_GENERATOR_7;
-#else
-	gclk_conf.source_generator = GCLK_GENERATOR_7;
-#endif
-
-	for (gclk_id = 0; gclk_id < GCLK_NUM; gclk_id++) {
-		system_gclk_chan_set_config(gclk_id, &gclk_conf);
-	}
-}
-
-/**
- * \brief Initialize clock system based on the configuration in conf_clocks.h.
- *
- * This function will apply the settings in conf_clocks.h when run from the user
- * application. All clock sources and GCLK generators are running when this function
- * returns.
- *
- * \note OSC8M is always enabled and if user selects other clocks for GCLK generators,
- * the OSC8M default enable can be disabled after system_clock_init. Make sure the
- * clock switch successfully before disabling OSC8M.
- */
-// Added dfll_fine_calibration as a parameter so that the user program can save
-// and restore it.
-void system_clock_init(uint16_t dfll_fine_calibration)
-{
-	/* Various bits in the INTFLAG register can be set to one at startup.
-	   This will ensure that these bits are cleared */
-	SYSCTRL->INTFLAG.reg = SYSCTRL_INTFLAG_BOD33RDY | SYSCTRL_INTFLAG_BOD33DET |
-			SYSCTRL_INTFLAG_DFLLRDY;
-
-	system_flash_set_waitstates(CONF_CLOCK_FLASH_WAIT_STATES);
-
-	/* Switch all peripheral clock to a not enabled general clock to save power. */
-	_switch_peripheral_gclk();
-
-	/* XOSC */
-#if CONF_CLOCK_XOSC_ENABLE == true
-	struct system_clock_source_xosc_config xosc_conf;
-	system_clock_source_xosc_get_config_defaults(&xosc_conf);
-
-	xosc_conf.external_clock    = CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL;
-	xosc_conf.startup_time      = CONF_CLOCK_XOSC_STARTUP_TIME;
-	xosc_conf.auto_gain_control = CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL;
-	xosc_conf.frequency         = CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY;
-	xosc_conf.on_demand         = CONF_CLOCK_XOSC_ON_DEMAND;
-	xosc_conf.run_in_standby    = CONF_CLOCK_XOSC_RUN_IN_STANDBY;
-
-	system_clock_source_xosc_set_config(&xosc_conf);
-	system_clock_source_enable(SYSTEM_CLOCK_SOURCE_XOSC);
-#endif
-
-
-	/* XOSC32K */
-#if CONF_CLOCK_XOSC32K_ENABLE == true
-	struct system_clock_source_xosc32k_config xosc32k_conf;
-	system_clock_source_xosc32k_get_config_defaults(&xosc32k_conf);
-
-	xosc32k_conf.frequency           = 32768UL;
-	xosc32k_conf.external_clock      = CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL;
-	xosc32k_conf.startup_time        = CONF_CLOCK_XOSC32K_STARTUP_TIME;
-	xosc32k_conf.auto_gain_control   = CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL;
-	xosc32k_conf.enable_1khz_output  = CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT;
-	xosc32k_conf.enable_32khz_output = CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT;
-	xosc32k_conf.on_demand           = false;
-	xosc32k_conf.run_in_standby      = CONF_CLOCK_XOSC32K_RUN_IN_STANDBY;
-
-	system_clock_source_xosc32k_set_config(&xosc32k_conf);
-	system_clock_source_enable(SYSTEM_CLOCK_SOURCE_XOSC32K);
-	while(!system_clock_source_is_ready(SYSTEM_CLOCK_SOURCE_XOSC32K));
-	if (CONF_CLOCK_XOSC32K_ON_DEMAND) {
-		SYSCTRL->XOSC32K.bit.ONDEMAND = 1;
-	}
-#endif
-
-
-	/* OSCK32K */
-#if CONF_CLOCK_OSC32K_ENABLE == true
-	SYSCTRL->OSC32K.bit.CALIB =
-			((*(uint32_t *)SYSCTRL_FUSES_OSC32K_ADDR >>
-			SYSCTRL_FUSES_OSC32K_Pos) & 0x7Ful);
-
-	struct system_clock_source_osc32k_config osc32k_conf;
-	system_clock_source_osc32k_get_config_defaults(&osc32k_conf);
-
-	osc32k_conf.startup_time        = CONF_CLOCK_OSC32K_STARTUP_TIME;
-	osc32k_conf.enable_1khz_output  = CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT;
-	osc32k_conf.enable_32khz_output = CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT;
-	osc32k_conf.on_demand           = CONF_CLOCK_OSC32K_ON_DEMAND;
-	osc32k_conf.run_in_standby      = CONF_CLOCK_OSC32K_RUN_IN_STANDBY;
-
-	system_clock_source_osc32k_set_config(&osc32k_conf);
-	system_clock_source_enable(SYSTEM_CLOCK_SOURCE_OSC32K);
-#endif
-
-
-	/* DFLL Config (Open and Closed Loop) */
-#if CONF_CLOCK_DFLL_ENABLE == true
-	struct system_clock_source_dfll_config dfll_conf;
-	system_clock_source_dfll_get_config_defaults(&dfll_conf);
-
-	dfll_conf.loop_mode      = CONF_CLOCK_DFLL_LOOP_MODE;
-	dfll_conf.on_demand      = false;
-
-	/* Using DFLL48M COARSE CAL value from NVM Software Calibration Area Mapping
-	   in DFLL.COARSE helps to output a frequency close to 48 MHz.*/
-#define NVM_DFLL_COARSE_POS    58 /* DFLL48M Coarse calibration value bit position.*/
-#define NVM_DFLL_COARSE_SIZE   6  /* DFLL48M Coarse calibration value bit size.*/
-
-	uint32_t coarse =( *((uint32_t *)(NVMCTRL_OTP4)
-			+ (NVM_DFLL_COARSE_POS / 32))
-		>> (NVM_DFLL_COARSE_POS % 32))
-		& ((1 << NVM_DFLL_COARSE_SIZE) - 1);
-	/* In some revision chip, the coarse calibration value is not correct. */
-	if (coarse == 0x3f) {
-		coarse = 0x1f;
-	}
-	dfll_conf.coarse_value = coarse;
-
-	if (CONF_CLOCK_DFLL_LOOP_MODE == SYSTEM_CLOCK_DFLL_LOOP_MODE_OPEN) {
-		dfll_conf.fine_value   = CONF_CLOCK_DFLL_FINE_VALUE;
-	}
-
-#  if CONF_CLOCK_DFLL_QUICK_LOCK == true
-	dfll_conf.quick_lock = SYSTEM_CLOCK_DFLL_QUICK_LOCK_ENABLE;
-#  else
-	dfll_conf.quick_lock = SYSTEM_CLOCK_DFLL_QUICK_LOCK_DISABLE;
-#  endif
-
-#  if CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK == true
-	dfll_conf.stable_tracking = SYSTEM_CLOCK_DFLL_STABLE_TRACKING_TRACK_AFTER_LOCK;
-#  else
-	dfll_conf.stable_tracking = SYSTEM_CLOCK_DFLL_STABLE_TRACKING_FIX_AFTER_LOCK;
-#  endif
-
-#  if CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP == true
-	dfll_conf.wakeup_lock = SYSTEM_CLOCK_DFLL_WAKEUP_LOCK_KEEP;
-#  else
-	dfll_conf.wakeup_lock = SYSTEM_CLOCK_DFLL_WAKEUP_LOCK_LOSE;
-#  endif
-
-#  if CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE == true
-	dfll_conf.chill_cycle = SYSTEM_CLOCK_DFLL_CHILL_CYCLE_ENABLE;
-#  else
-	dfll_conf.chill_cycle = SYSTEM_CLOCK_DFLL_CHILL_CYCLE_DISABLE;
-#  endif
-
-	if (CONF_CLOCK_DFLL_LOOP_MODE == SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED) {
-		dfll_conf.multiply_factor = CONF_CLOCK_DFLL_MULTIPLY_FACTOR;
-	}
-
-	dfll_conf.coarse_max_step = CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE;
-	dfll_conf.fine_max_step   = CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE;
-
-	if (CONF_CLOCK_DFLL_LOOP_MODE == SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY) {
-		dfll_conf.fine_max_step   = 10;
-		dfll_conf.fine_value   = dfll_fine_calibration;
-		dfll_conf.quick_lock = SYSTEM_CLOCK_DFLL_QUICK_LOCK_ENABLE;
-		dfll_conf.stable_tracking = SYSTEM_CLOCK_DFLL_STABLE_TRACKING_TRACK_AFTER_LOCK;
-		dfll_conf.wakeup_lock = SYSTEM_CLOCK_DFLL_WAKEUP_LOCK_KEEP;
-		dfll_conf.chill_cycle = SYSTEM_CLOCK_DFLL_CHILL_CYCLE_DISABLE;
-
-		dfll_conf.multiply_factor = 48000;
-	}
-
-	system_clock_source_dfll_set_config(&dfll_conf);
-#endif
-
-
-	/* OSC8M */
-	struct system_clock_source_osc8m_config osc8m_conf;
-	system_clock_source_osc8m_get_config_defaults(&osc8m_conf);
-
-	osc8m_conf.prescaler       = CONF_CLOCK_OSC8M_PRESCALER;
-	osc8m_conf.on_demand       = CONF_CLOCK_OSC8M_ON_DEMAND;
-	osc8m_conf.run_in_standby  = CONF_CLOCK_OSC8M_RUN_IN_STANDBY;
-
-	system_clock_source_osc8m_set_config(&osc8m_conf);
-	system_clock_source_enable(SYSTEM_CLOCK_SOURCE_OSC8M);
-
-
-	/* GCLK */
-#if CONF_CLOCK_CONFIGURE_GCLK == true
-	system_gclk_init();
-
-	/* Configure all GCLK generators except for the main generator, which
-	 * is configured later after all other clock systems are set up */
-	MREPEAT(GCLK_GEN_NUM, _CONF_CLOCK_GCLK_CONFIG_NONMAIN, ~);
-
-#  if CONF_CLOCK_DFLL_ENABLE == true
-	/* Enable DFLL reference clock if in closed loop mode */
-	if (CONF_CLOCK_DFLL_LOOP_MODE == SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED) {
-		struct system_gclk_chan_config dfll_gclk_chan_conf;
-
-		system_gclk_chan_get_config_defaults(&dfll_gclk_chan_conf);
-		dfll_gclk_chan_conf.source_generator = CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR;
-		system_gclk_chan_set_config(SYSCTRL_GCLK_ID_DFLL48, &dfll_gclk_chan_conf);
-		system_gclk_chan_enable(SYSCTRL_GCLK_ID_DFLL48);
-	}
-#  endif
-
-#  if CONF_CLOCK_DPLL_ENABLE == true
-	/* Enable DPLL internal lock timer and reference clock */
-	struct system_gclk_chan_config dpll_gclk_chan_conf;
-	system_gclk_chan_get_config_defaults(&dpll_gclk_chan_conf);
-	if (CONF_CLOCK_DPLL_LOCK_TIME != SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_DEFAULT) {
-		dpll_gclk_chan_conf.source_generator = CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR;
-		system_gclk_chan_set_config(SYSCTRL_GCLK_ID_FDPLL32K, &dpll_gclk_chan_conf);
-		system_gclk_chan_enable(SYSCTRL_GCLK_ID_FDPLL32K);
-	}
-
-	if (CONF_CLOCK_DPLL_REFERENCE_CLOCK == SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_GCLK) {
-		dpll_gclk_chan_conf.source_generator = CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR;
-		system_gclk_chan_set_config(SYSCTRL_GCLK_ID_FDPLL, &dpll_gclk_chan_conf);
-		system_gclk_chan_enable(SYSCTRL_GCLK_ID_FDPLL);
-	}
-#  endif
-#endif
-
-
-	/* DFLL Enable (Open and Closed Loop) */
-#if CONF_CLOCK_DFLL_ENABLE == true
-	system_clock_source_enable(SYSTEM_CLOCK_SOURCE_DFLL);
-	while(!system_clock_source_is_ready(SYSTEM_CLOCK_SOURCE_DFLL));
-	if (CONF_CLOCK_DFLL_ON_DEMAND) {
-		SYSCTRL->DFLLCTRL.bit.ONDEMAND = 1;
-	}
-#endif
-
-	/* DPLL */
-#ifdef FEATURE_SYSTEM_CLOCK_DPLL
-#  if (CONF_CLOCK_DPLL_ENABLE == true)
-
-	/* Enable DPLL reference clock */
-	if (CONF_CLOCK_DPLL_REFERENCE_CLOCK == SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC32K) {
-		/* XOSC32K should have been enabled for DPLL_REF0 */
-		Assert(CONF_CLOCK_XOSC32K_ENABLE);
-	} else if (CONF_CLOCK_DPLL_REFERENCE_CLOCK == SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC) {
-		/* XOSC should have been enabled for DPLL_REF1 */
-		Assert(CONF_CLOCK_XOSC_ENABLE);
-	}
-	else if (CONF_CLOCK_DPLL_REFERENCE_CLOCK == SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_GCLK) {
-		/* GCLK should have been enabled */
-		Assert(CONF_CLOCK_CONFIGURE_GCLK);
-	}
-	else {
-		Assert(false);
-	}
-
-	struct system_clock_source_dpll_config dpll_config;
-	system_clock_source_dpll_get_config_defaults(&dpll_config);
-
-	dpll_config.on_demand        = false;
-	dpll_config.run_in_standby   = CONF_CLOCK_DPLL_RUN_IN_STANDBY;
-	dpll_config.lock_bypass      = CONF_CLOCK_DPLL_LOCK_BYPASS;
-	dpll_config.wake_up_fast     = CONF_CLOCK_DPLL_WAKE_UP_FAST;
-	dpll_config.low_power_enable = CONF_CLOCK_DPLL_LOW_POWER_ENABLE;
-
-	dpll_config.filter           = CONF_CLOCK_DPLL_FILTER;
-	dpll_config.lock_time        = CONF_CLOCK_DPLL_LOCK_TIME;
-
-	dpll_config.reference_clock     = CONF_CLOCK_DPLL_REFERENCE_CLOCK;
-	dpll_config.reference_frequency = CONF_CLOCK_DPLL_REFERENCE_FREQUENCY;
-	dpll_config.reference_divider   = CONF_CLOCK_DPLL_REFERENCE_DIVIDER;
-	dpll_config.output_frequency    = CONF_CLOCK_DPLL_OUTPUT_FREQUENCY;
-
-	system_clock_source_dpll_set_config(&dpll_config);
-	system_clock_source_enable(SYSTEM_CLOCK_SOURCE_DPLL);
-	while(!system_clock_source_is_ready(SYSTEM_CLOCK_SOURCE_DPLL));
-	if (CONF_CLOCK_DPLL_ON_DEMAND) {
-		SYSCTRL->DPLLCTRLA.bit.ONDEMAND = 1;
-	}
-
-#  endif
-#endif
-
-	/* CPU and BUS clocks */
-	system_cpu_clock_set_divider(CONF_CLOCK_CPU_DIVIDER);
-
-	system_apb_clock_set_divider(SYSTEM_CLOCK_APB_APBA, CONF_CLOCK_APBA_DIVIDER);
-	system_apb_clock_set_divider(SYSTEM_CLOCK_APB_APBB, CONF_CLOCK_APBB_DIVIDER);
-	system_apb_clock_set_divider(SYSTEM_CLOCK_APB_APBC, CONF_CLOCK_APBC_DIVIDER);
-
-	/* GCLK 0 */
-#if CONF_CLOCK_CONFIGURE_GCLK == true
-	/* Configure the main GCLK last as it might depend on other generators */
-	_CONF_CLOCK_GCLK_CONFIG(0, ~);
-#endif
-}
diff --git a/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/clock_config_check.h b/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/clock_config_check.h
deleted file mode 100644
index fd4757e28..000000000
--- a/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/clock_config_check.h
+++ /dev/null
@@ -1,454 +0,0 @@
-/**
- * \file
- *
- * \brief SAM D21/R21/DA0/DA1 Clock Driver
- *
- * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-
-#ifndef CLOCK_CONFIG_CHECK_H
-#  define CLOCK_CONFIG_CHECK_H
-
-#if !defined(CONF_CLOCK_FLASH_WAIT_STATES)
-#  error CONF_CLOCK_FLASH_WAIT_STATES not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_CPU_DIVIDER)
-#  error CONF_CLOCK_CPU_DIVIDER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_APBA_DIVIDER)
-#  error CONF_CLOCK_APBA_DIVIDER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_APBB_DIVIDER)
-#  error CONF_CLOCK_APBB_DIVIDER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_APBC_DIVIDER)
-#  error CONF_CLOCK_APBC_DIVIDER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_OSC8M_PRESCALER)
-#  error CONF_CLOCK_OSC8M_PRESCALER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_OSC8M_ON_DEMAND)
-#  error CONF_CLOCK_OSC8M_ON_DEMAND not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_OSC8M_RUN_IN_STANDBY)
-#  error CONF_CLOCK_OSC8M_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC_ENABLE)
-#  error CONF_CLOCK_XOSC_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL)
-#  error CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY)
-#  error CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC_STARTUP_TIME)
-#  error CONF_CLOCK_XOSC_STARTUP_TIME not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL)
-#  error CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC_ON_DEMAND)
-#  error CONF_CLOCK_XOSC_ON_DEMAND not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC_RUN_IN_STANDBY)
-#  error CONF_CLOCK_XOSC_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC32K_ENABLE)
-#  error CONF_CLOCK_XOSC32K_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL)
-#  error CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC32K_STARTUP_TIME)
-#  error CONF_CLOCK_XOSC32K_STARTUP_TIME not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL)
-#  error CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT)
-#  error CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT)
-#  error CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC32K_ON_DEMAND)
-#  error CONF_CLOCK_XOSC32K_ON_DEMAND not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_XOSC32K_RUN_IN_STANDBY)
-#  error CONF_CLOCK_XOSC32K_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_OSC32K_ENABLE)
-#  error CONF_CLOCK_OSC32K_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_OSC32K_STARTUP_TIME)
-#  error CONF_CLOCK_OSC32K_STARTUP_TIME not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT)
-#  error CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT)
-#  error CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_OSC32K_ON_DEMAND)
-#  error CONF_CLOCK_OSC32K_ON_DEMAND not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_OSC32K_RUN_IN_STANDBY)
-#  error CONF_CLOCK_OSC32K_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DFLL_ENABLE)
-#  error CONF_CLOCK_DFLL_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DFLL_LOOP_MODE)
-#  error CONF_CLOCK_DFLL_LOOP_MODE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DFLL_ON_DEMAND)
-#  error CONF_CLOCK_DFLL_ON_DEMAND not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DFLL_FINE_VALUE)
-#  error CONF_CLOCK_DFLL_FINE_VALUE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR)
-#  error CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DFLL_MULTIPLY_FACTOR)
-#  error CONF_CLOCK_DFLL_MULTIPLY_FACTOR not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DFLL_QUICK_LOCK)
-#  error CONF_CLOCK_DFLL_QUICK_LOCK not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK)
-#  error CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP)
-#  error CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE)
-#  error CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE)
-#  error CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE)
-#  error CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_ENABLE)
-#  error CONF_CLOCK_DPLL_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_ON_DEMAND)
-#  error CONF_CLOCK_DPLL_ON_DEMAND not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_RUN_IN_STANDBY)
-#  error CONF_CLOCK_DPLL_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_LOCK_BYPASS)
-#  error CONF_CLOCK_DPLL_LOCK_BYPASS not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_WAKE_UP_FAST)
-#  error CONF_CLOCK_DPLL_WAKE_UP_FAST not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_LOW_POWER_ENABLE)
-#  error CONF_CLOCK_DPLL_LOW_POWER_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_LOCK_TIME)
-#  error CONF_CLOCK_DPLL_LOCK_TIME not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_REFERENCE_CLOCK)
-#  error CONF_CLOCK_DPLL_REFERENCE_CLOCK not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_FILTER)
-#  error CONF_CLOCK_DPLL_FILTER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_REFERENCE_FREQUENCY)
-#  error CONF_CLOCK_DPLL_REFERENCE_FREQUENCY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_REFERENCE_DIVIDER)
-#  error CONF_CLOCK_DPLL_REFERENCE_DIVIDER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_OUTPUT_FREQUENCY)
-#  error CONF_CLOCK_DPLL_OUTPUT_FREQUENCY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR)
-#  error CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR)
-#  error CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_CONFIGURE_GCLK)
-#  error CONF_CLOCK_CONFIGURE_GCLK not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_0_ENABLE)
-#  error CONF_CLOCK_GCLK_0_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_0_RUN_IN_STANDBY)
-#  error CONF_CLOCK_GCLK_0_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_0_CLOCK_SOURCE)
-#  error CONF_CLOCK_GCLK_0_CLOCK_SOURCE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_0_PRESCALER)
-#  error CONF_CLOCK_GCLK_0_PRESCALER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_0_OUTPUT_ENABLE)
-#  error CONF_CLOCK_GCLK_0_OUTPUT_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_1_ENABLE)
-#  error CONF_CLOCK_GCLK_1_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_1_RUN_IN_STANDBY)
-#  error CONF_CLOCK_GCLK_1_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_1_CLOCK_SOURCE)
-#  error CONF_CLOCK_GCLK_1_CLOCK_SOURCE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_1_PRESCALER)
-#  error CONF_CLOCK_GCLK_1_PRESCALER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_1_OUTPUT_ENABLE)
-#  error CONF_CLOCK_GCLK_1_OUTPUT_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_2_ENABLE)
-#  error CONF_CLOCK_GCLK_2_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_2_RUN_IN_STANDBY)
-#  error CONF_CLOCK_GCLK_2_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_2_CLOCK_SOURCE)
-#  error CONF_CLOCK_GCLK_2_CLOCK_SOURCE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_2_PRESCALER)
-#  error CONF_CLOCK_GCLK_2_PRESCALER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_2_OUTPUT_ENABLE)
-#  error CONF_CLOCK_GCLK_2_OUTPUT_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_3_ENABLE)
-#  error CONF_CLOCK_GCLK_3_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_3_RUN_IN_STANDBY)
-#  error CONF_CLOCK_GCLK_3_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_3_CLOCK_SOURCE)
-#  error CONF_CLOCK_GCLK_3_CLOCK_SOURCE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_3_PRESCALER)
-#  error CONF_CLOCK_GCLK_3_PRESCALER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_3_OUTPUT_ENABLE)
-#  error CONF_CLOCK_GCLK_3_OUTPUT_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_4_ENABLE)
-#  error CONF_CLOCK_GCLK_4_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_4_RUN_IN_STANDBY)
-#  error CONF_CLOCK_GCLK_4_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_4_CLOCK_SOURCE)
-#  error CONF_CLOCK_GCLK_4_CLOCK_SOURCE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_4_PRESCALER)
-#  error CONF_CLOCK_GCLK_4_PRESCALER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_4_OUTPUT_ENABLE)
-#  error CONF_CLOCK_GCLK_4_OUTPUT_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_5_ENABLE)
-#  error CONF_CLOCK_GCLK_5_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_5_RUN_IN_STANDBY)
-#  error CONF_CLOCK_GCLK_5_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_5_CLOCK_SOURCE)
-#  error CONF_CLOCK_GCLK_5_CLOCK_SOURCE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_5_PRESCALER)
-#  error CONF_CLOCK_GCLK_5_PRESCALER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_5_OUTPUT_ENABLE)
-#  error CONF_CLOCK_GCLK_5_OUTPUT_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_6_ENABLE)
-#  error CONF_CLOCK_GCLK_6_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_6_RUN_IN_STANDBY)
-#  error CONF_CLOCK_GCLK_6_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_6_CLOCK_SOURCE)
-#  error CONF_CLOCK_GCLK_6_CLOCK_SOURCE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_6_PRESCALER)
-#  error CONF_CLOCK_GCLK_6_PRESCALER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_6_OUTPUT_ENABLE)
-#  error CONF_CLOCK_GCLK_6_OUTPUT_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_7_ENABLE)
-#  error CONF_CLOCK_GCLK_7_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_7_RUN_IN_STANDBY)
-#  error CONF_CLOCK_GCLK_7_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_7_CLOCK_SOURCE)
-#  error CONF_CLOCK_GCLK_7_CLOCK_SOURCE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_7_PRESCALER)
-#  error CONF_CLOCK_GCLK_7_PRESCALER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_7_OUTPUT_ENABLE)
-#  error CONF_CLOCK_GCLK_7_OUTPUT_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_8_ENABLE)
-#  error CONF_CLOCK_GCLK_8_ENABLE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_8_RUN_IN_STANDBY)
-#  error CONF_CLOCK_GCLK_8_RUN_IN_STANDBY not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_8_CLOCK_SOURCE)
-#  error CONF_CLOCK_GCLK_8_CLOCK_SOURCE not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_8_PRESCALER)
-#  error CONF_CLOCK_GCLK_8_PRESCALER not defined in conf_clocks.h
-#endif
-
-#if !defined(CONF_CLOCK_GCLK_8_OUTPUT_ENABLE)
-#  error CONF_CLOCK_GCLK_8_OUTPUT_ENABLE not defined in conf_clocks.h
-#endif
-
-#endif /* CLOCK_CONFIG_CHECK_H */
diff --git a/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/clock_feature.h b/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/clock_feature.h
deleted file mode 100644
index ee8890a31..000000000
--- a/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/clock_feature.h
+++ /dev/null
@@ -1,1492 +0,0 @@
-/**
- * \file
- *
- * \brief SAM Clock Driver
- *
- * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-#ifndef SYSTEM_CLOCK_FEATURE_H_INCLUDED
-#define SYSTEM_CLOCK_FEATURE_H_INCLUDED
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * \defgroup asfdoc_sam0_system_clock_group SAM System Clock Management (SYSTEM CLOCK) Driver
- *
- * This driver for Atmel&reg; | SMART ARM&reg;-based microcontrollers provides an interface for the configuration
- * and management of the device's clocking related functions. This includes
- * the various clock sources, bus clocks, and generic clocks within the device,
- * with functions to manage the enabling, disabling, source selection, and
- * prescaling of clocks to various internal peripherals.
- *
- * The following peripherals are used by this module:
- *
- * - GCLK (Generic Clock Management)
- * - PM (Power Management)
- * - SYSCTRL (Clock Source Control)
- *
- * The following devices can use this module:
- *  - Atmel | SMART SAM D20/D21
- *  - Atmel | SMART SAM R21
- *  - Atmel | SMART SAM D09/D10/D11
- *  - Atmel | SMART SAM DA1
- *
- * The outline of this documentation is as follows:
- *  - \ref asfdoc_sam0_system_clock_prerequisites
- *  - \ref asfdoc_sam0_system_clock_module_overview
- *  - \ref asfdoc_sam0_system_clock_special_considerations
- *  - \ref asfdoc_sam0_system_clock_extra_info
- *  - \ref asfdoc_sam0_system_clock_examples
- *  - \ref asfdoc_sam0_system_clock_api_overview
- *
- *
- * \section asfdoc_sam0_system_clock_prerequisites Prerequisites
- *
- * There are no prerequisites for this module.
- *
- *
- * \section asfdoc_sam0_system_clock_module_overview Module Overview
- * The SAM devices contain a sophisticated clocking system, which is designed
- * to give the maximum flexibility to the user application. This system allows
- * a system designer to tune the performance and power consumption of the device
- * in a dynamic manner, to achieve the best trade-off between the two for a
- * particular application.
- *
- * This driver provides a set of functions for the configuration and management
- * of the various clock related functionality within the device.
- *
- * \subsection asfdoc_sam0_system_clock_module_features Driver Feature Macro Definition
- * <table>
- *	<tr>
- *		<th>Driver Feature Macro</th>
- *		<th>Supported devices</th>
- *	</tr>
- *	<tr>
- *		<td>FEATURE_SYSTEM_CLOCK_DPLL</td>
- *		<td>SAM D21, SAM R21, SAM D10, SAM D11, SAM DA1</td>
- *	</tr>
- * </table>
- * \note The specific features are only available in the driver when the
- * selected device supports those features.
- *
- * \subsection asfdoc_sam0_system_clock_module_overview_clock_sources Clock Sources
- * The SAM devices have a number of master clock source modules, each of
- * which being capable of producing a stabilized output frequency, which can then
- * be fed into the various peripherals and modules within the device.
- *
- * Possible clock source modules include internal R/C oscillators, internal
- * DFLL modules, as well as external crystal oscillators and/or clock inputs.
- *
- * \subsection asfdoc_sam0_system_clock_module_overview_cpu_clock CPU / Bus Clocks
- * The CPU and AHB/APBx buses are clocked by the same physical clock source
- * (referred in this module as the Main Clock), however the APBx buses may
- * have additional prescaler division ratios set to give each peripheral bus a
- * different clock speed.
- *
- * The general main clock tree for the CPU and associated buses is shown in
- * \ref asfdoc_sam0_system_clock_module_clock_tree "the figure below".
- *
- * \anchor asfdoc_sam0_system_clock_module_clock_tree
- * \dot
- * digraph overview {
- *   rankdir=LR;
- *   clk_src [label="Clock Sources", shape=none, height=0];
- *   node [label="CPU Bus" shape=ellipse] cpu_bus;
- *   node [label="AHB Bus" shape=ellipse] ahb_bus;
- *   node [label="APBA Bus" shape=ellipse] apb_a_bus;
- *   node [label="APBB Bus" shape=ellipse] apb_b_bus;
- *   node [label="APBC Bus" shape=ellipse] apb_c_bus;
- *   node [label="Main Bus\nPrescaler" shape=square] main_prescaler;
- *   node [label="APBA Bus\nPrescaler" shape=square] apb_a_prescaler;
- *   node [label="APBB Bus\nPrescaler" shape=square] apb_b_prescaler;
- *   node [label="APBC Bus\nPrescaler" shape=square] apb_c_prescaler;
- *   node [label="", shape=polygon, sides=4, distortion=0.6, orientation=90, style=filled, fillcolor=black, height=0.9, width=0.2] main_clock_mux;
- *
- *   clk_src         -> main_clock_mux;
- *   main_clock_mux  -> main_prescaler;
- *   main_prescaler  -> cpu_bus;
- *   main_prescaler  -> ahb_bus;
- *   main_prescaler  -> apb_a_prescaler;
- *   main_prescaler  -> apb_b_prescaler;
- *   main_prescaler  -> apb_c_prescaler;
- *   apb_a_prescaler -> apb_a_bus;
- *   apb_b_prescaler -> apb_b_bus;
- *   apb_c_prescaler -> apb_c_bus;
- * }
- * \enddot
- *
- * \subsection asfdoc_sam0_system_clock_module_overview_clock_masking Clock Masking
- * To save power, the input clock to one or more peripherals on the AHB and APBx
- * buses can be masked away - when masked, no clock is passed into the module.
- * Disabling of clocks of unused modules will prevent all access to the masked
- * module, but will reduce the overall device power consumption.
- *
- * \subsection asfdoc_sam0_system_clock_module_overview_gclk Generic Clocks
- * Within the SAM devices there are a number of Generic Clocks; these are used to
- * provide clocks to the various peripheral clock domains in the device in a
- * standardized manner. One or more master source clocks can be selected as the
- * input clock to a Generic Clock Generator, which can prescale down the input
- * frequency to a slower rate for use in a peripheral.
- *
- * Additionally, a number of individually selectable Generic Clock Channels are
- * provided, which multiplex and gate the various generator outputs for one or
- * more peripherals within the device. This setup allows for a single common
- * generator to feed one or more channels, which can then be enabled or disabled
- * individually as required.
- *
- * \anchor asfdoc_sam0_system_clock_module_chain_overview
- * \dot
- * digraph overview {
- *   rankdir=LR;
- *   node [label="Clock\nSource a" shape=square] system_clock_source;
- *   node [label="Generator 1" shape=square] clock_gen;
- *   node [label="Channel x" shape=square] clock_chan0;
- *   node [label="Channel y" shape=square] clock_chan1;
- *   node [label="Peripheral x" shape=ellipse style=filled fillcolor=lightgray] peripheral0;
- *   node [label="Peripheral y" shape=ellipse style=filled fillcolor=lightgray] peripheral1;
- *
- *   system_clock_source -> clock_gen;
- *   clock_gen   -> clock_chan0;
- *   clock_chan0 -> peripheral0;
- *   clock_gen   -> clock_chan1;
- *   clock_chan1 -> peripheral1;
- * }
- * \enddot
- *
- * \subsubsection asfdoc_sam0_system_clock_module_chain_example Clock Chain Example
- * An example setup of a complete clock chain within the device is shown in
- * \ref asfdoc_sam0_system_clock_module_chain_example_fig "the figure below".
- *
- * \anchor asfdoc_sam0_system_clock_module_chain_example_fig
- * \dot
- * digraph overview {
- *   rankdir=LR;
- *   node [label="External\nOscillator" shape=square] system_clock_source0;
- *   node [label="Generator 0" shape=square] clock_gen0;
- *   node [label="Channel x" shape=square] clock_chan0;
- *   node [label="Core CPU" shape=ellipse  style=filled fillcolor=lightgray] peripheral0;
- *
- *   system_clock_source0 -> clock_gen0;
- *   clock_gen0    -> clock_chan0;
- *   clock_chan0   -> peripheral0;
- *   node [label="8MHz R/C\nOscillator (OSC8M)" shape=square fillcolor=white] system_clock_source1;
- *   node [label="Generator 1" shape=square] clock_gen1;
- *   node [label="Channel y" shape=square] clock_chan1;
- *   node [label="Channel z" shape=square] clock_chan2;
- *   node [label="SERCOM\nModule" shape=ellipse  style=filled fillcolor=lightgray] peripheral1;
- *   node [label="Timer\nModule" shape=ellipse  style=filled fillcolor=lightgray] peripheral2;
- *
- *   system_clock_source1 -> clock_gen1;
- *   clock_gen1    -> clock_chan1;
- *   clock_gen1    -> clock_chan2;
- *   clock_chan1   -> peripheral1;
- *   clock_chan2   -> peripheral2;
- * }
- * \enddot
- *
- * \subsubsection asfdoc_sam0_system_clock_module_overview_gclk_generators Generic Clock Generators
- * Each Generic Clock generator within the device can source its input clock
- * from one of the provided Source Clocks, and prescale the output for one or
- * more Generic Clock Channels in a one-to-many relationship. The generators
- * thus allow for several clocks to be generated of different frequencies,
- * power usages, and accuracies, which can be turned on and off individually to
- * disable the clocks to multiple peripherals as a group.
- *
- * \subsubsection asfdoc_sam0_system_clock_module_overview_gclk_channels Generic Clock Channels
- * To connect a Generic Clock Generator to a peripheral within the
- * device, a Generic Clock Channel is used. Each peripheral or
- * peripheral group has an associated Generic Clock Channel, which serves as the
- * clock input for the peripheral(s). To supply a clock to the peripheral
- * module(s), the associated channel must be connected to a running Generic
- * Clock Generator and the channel enabled.
- *
- * \section asfdoc_sam0_system_clock_special_considerations Special Considerations
- *
- * There are no special considerations for this module.
- *
- *
- * \section asfdoc_sam0_system_clock_extra_info Extra Information
- *
- * For extra information, see \ref asfdoc_sam0_system_clock_extra. This includes:
- *  - \ref asfdoc_sam0_system_clock_extra_acronyms
- *  - \ref asfdoc_sam0_system_clock_extra_dependencies
- *  - \ref asfdoc_sam0_system_clock_extra_errata
- *  - \ref asfdoc_sam0_system_clock_extra_history
- *
- *
- * \section asfdoc_sam0_system_clock_examples Examples
- *
- * For a list of examples related to this driver, see
- * \ref asfdoc_sam0_system_clock_exqsg.
- *
- *
- * \section asfdoc_sam0_system_clock_api_overview API Overview
- * @{
- */
-
-#include <compiler.h>
-#include <gclk.h>
-
-/**
- * \name Driver Feature Definition
- * Define system clock features set according to different device family.
- * @{
- */
-#if (SAMD21) || (SAMR21) || (SAMD11) || (SAMD10) || (SAMDA1) || defined(__DOXYGEN__)
-/** Digital Phase Locked Loop (DPLL) feature support. */
-#  define FEATURE_SYSTEM_CLOCK_DPLL
-#endif
-/*@}*/
-
-/**
- * \brief Available start-up times for the XOSC32K.
- *
- * Available external 32KHz oscillator start-up times, as a number of external
- * clock cycles.
- */
-enum system_xosc32k_startup {
-	/** Wait zero clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC32K_STARTUP_0,
-	/** Wait 32 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC32K_STARTUP_32,
-	/** Wait 2048 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC32K_STARTUP_2048,
-	/** Wait 4096 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC32K_STARTUP_4096,
-	/** Wait 16384 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC32K_STARTUP_16384,
-	/** Wait 32768 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC32K_STARTUP_32768,
-	/** Wait 65536 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC32K_STARTUP_65536,
-	/** Wait 131072 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC32K_STARTUP_131072,
-};
-
-/**
- * \brief Available start-up times for the XOSC.
- *
- * Available external oscillator start-up times, as a number of external clock
- * cycles.
- */
-enum system_xosc_startup {
-	/** Wait one clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_1,
-	/** Wait two clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_2,
-	/** Wait four clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_4,
-	/** Wait eight clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_8,
-	/** Wait 16 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_16,
-	/** Wait 32 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_32,
-	/** Wait 64 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_64,
-	/** Wait 128 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_128,
-	/** Wait 256 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_256,
-	/** Wait 512 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_512,
-	/** Wait 1024 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_1024,
-	/** Wait 2048 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_2048,
-	/** Wait 4096 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_4096,
-	/** Wait 8192 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_8192,
-	/** Wait 16384 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_16384,
-	/** Wait 32768 clock cycles until the clock source is considered stable */
-	SYSTEM_XOSC_STARTUP_32768,
-};
-
-/**
- * \brief Available start-up times for the OSC32K.
- *
- * Available internal 32KHz oscillator start-up times, as a number of internal
- * OSC32K clock cycles.
- */
-enum system_osc32k_startup {
-	/** Wait three clock cycles until the clock source is considered stable */
-	SYSTEM_OSC32K_STARTUP_3,
-	/** Wait four clock cycles until the clock source is considered stable */
-	SYSTEM_OSC32K_STARTUP_4,
-	/** Wait six clock cycles until the clock source is considered stable */
-	SYSTEM_OSC32K_STARTUP_6,
-	/** Wait ten clock cycles until the clock source is considered stable */
-	SYSTEM_OSC32K_STARTUP_10,
-	/** Wait 18 clock cycles until the clock source is considered stable */
-	SYSTEM_OSC32K_STARTUP_18,
-	/** Wait 34 clock cycles until the clock source is considered stable */
-	SYSTEM_OSC32K_STARTUP_34,
-	/** Wait 66 clock cycles until the clock source is considered stable */
-	SYSTEM_OSC32K_STARTUP_66,
-	/** Wait 130 clock cycles until the clock source is considered stable */
-	SYSTEM_OSC32K_STARTUP_130,
-};
-
-/**
- * \brief Division prescalers for the internal 8MHz system clock.
- *
- * Available prescalers for the internal 8MHz (nominal) system clock.
- */
-enum system_osc8m_div {
-	/** Do not divide the 8MHz RC oscillator output */
-	SYSTEM_OSC8M_DIV_1,
-	/** Divide the 8MHz RC oscillator output by two */
-	SYSTEM_OSC8M_DIV_2,
-	/** Divide the 8MHz RC oscillator output by four */
-	SYSTEM_OSC8M_DIV_4,
-	/** Divide the 8MHz RC oscillator output by eight */
-	SYSTEM_OSC8M_DIV_8,
-};
-
-/**
- * \brief Frequency range for the internal 8MHz RC oscillator.
- *
- * Internal 8MHz RC oscillator frequency range setting.
- */
-enum system_osc8m_frequency_range {
-	/** Frequency range 4MHz to 6MHz */
-	SYSTEM_OSC8M_FREQUENCY_RANGE_4_TO_6,
-	/** Frequency range 6MHz to 8MHz */
-	SYSTEM_OSC8M_FREQUENCY_RANGE_6_TO_8,
-	/** Frequency range 8MHz to 11MHz */
-	SYSTEM_OSC8M_FREQUENCY_RANGE_8_TO_11,
-	/** Frequency range 11MHz to 15MHz */
-	SYSTEM_OSC8M_FREQUENCY_RANGE_11_TO_15,
-};
-
-/**
- * \brief Main CPU and APB/AHB bus clock source prescaler values.
- *
- * Available division ratios for the CPU and APB/AHB bus clocks.
- */
-enum system_main_clock_div {
-	/** Divide Main clock by one */
-	SYSTEM_MAIN_CLOCK_DIV_1,
-	/** Divide Main clock by two */
-	SYSTEM_MAIN_CLOCK_DIV_2,
-	/** Divide Main clock by four */
-	SYSTEM_MAIN_CLOCK_DIV_4,
-	/** Divide Main clock by eight */
-	SYSTEM_MAIN_CLOCK_DIV_8,
-	/** Divide Main clock by 16 */
-	SYSTEM_MAIN_CLOCK_DIV_16,
-	/** Divide Main clock by 32 */
-	SYSTEM_MAIN_CLOCK_DIV_32,
-	/** Divide Main clock by 64 */
-	SYSTEM_MAIN_CLOCK_DIV_64,
-	/** Divide Main clock by 128 */
-	SYSTEM_MAIN_CLOCK_DIV_128,
-};
-
-/**
- * \brief External clock source types.
- *
- * Available external clock source types.
- */
-enum system_clock_external {
-	/** The external clock source is a crystal oscillator */
-	SYSTEM_CLOCK_EXTERNAL_CRYSTAL,
-	/** The connected clock source is an external logic level clock signal */
-	SYSTEM_CLOCK_EXTERNAL_CLOCK,
-};
-
-/**
- * \brief Operating modes of the DFLL clock source.
- *
- * Available operating modes of the DFLL clock source module.
- */
-enum system_clock_dfll_loop_mode {
-	/** The DFLL is operating in open loop mode with no feedback */
-	SYSTEM_CLOCK_DFLL_LOOP_MODE_OPEN,
-	/** The DFLL is operating in closed loop mode with frequency feedback from
-	 *  a low frequency reference clock
-	 */
-	SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED = SYSCTRL_DFLLCTRL_MODE,
-
-#ifdef SYSCTRL_DFLLCTRL_USBCRM
-	/** The DFLL is operating in USB recovery mode with frequency feedback
-	 *  from USB SOF.
-	 */
-	SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY = SYSCTRL_DFLLCTRL_USBCRM,
-#endif
-};
-
-/**
- * \brief Locking behavior for the DFLL during device wake-up.
- *
- * DFLL lock behavior modes on device wake-up from sleep.
- */
-enum system_clock_dfll_wakeup_lock {
-	/** Keep DFLL lock when the device wakes from sleep */
-	SYSTEM_CLOCK_DFLL_WAKEUP_LOCK_KEEP,
-	/** Lose DFLL lock when the devices wakes from sleep */
-	SYSTEM_CLOCK_DFLL_WAKEUP_LOCK_LOSE = SYSCTRL_DFLLCTRL_LLAW,
-};
-
-/**
- * \brief Fine tracking behavior for the DFLL once a lock has been acquired.
- *
- * DFLL fine tracking behavior modes after a lock has been acquired.
- */
-enum system_clock_dfll_stable_tracking {
-	/** Keep tracking after the DFLL has gotten a fine lock */
-	SYSTEM_CLOCK_DFLL_STABLE_TRACKING_TRACK_AFTER_LOCK,
-	/** Stop tracking after the DFLL has gotten a fine lock */
-	SYSTEM_CLOCK_DFLL_STABLE_TRACKING_FIX_AFTER_LOCK = SYSCTRL_DFLLCTRL_STABLE,
-};
-
-/**
- * \brief Chill-cycle behavior of the DFLL module.
- *
- * DFLL chill-cycle behavior modes of the DFLL module. A chill cycle is a period
- * of time when the DFLL output frequency is not measured by the unit, to allow
- * the output to stabilize after a change in the input clock source.
- */
-enum system_clock_dfll_chill_cycle {
-	/** Enable a chill cycle, where the DFLL output frequency is not measured */
-	SYSTEM_CLOCK_DFLL_CHILL_CYCLE_ENABLE,
-	/** Disable a chill cycle, where the DFLL output frequency is not measured */
-	SYSTEM_CLOCK_DFLL_CHILL_CYCLE_DISABLE = SYSCTRL_DFLLCTRL_CCDIS,
-};
-
-/**
- * \brief QuickLock settings for the DFLL module.
- *
- * DFLL QuickLock settings for the DFLL module, to allow for a faster lock of
- * the DFLL output frequency at the expense of accuracy.
- */
-enum system_clock_dfll_quick_lock {
-	/** Enable the QuickLock feature for looser lock requirements on the DFLL */
-	SYSTEM_CLOCK_DFLL_QUICK_LOCK_ENABLE,
-	/** Disable the QuickLock feature for strict lock requirements on the DFLL */
-	SYSTEM_CLOCK_DFLL_QUICK_LOCK_DISABLE = SYSCTRL_DFLLCTRL_QLDIS,
-};
-
-/**
- * \brief Available clock sources in the system.
- *
- * Clock sources available to the GCLK generators.
- */
-enum system_clock_source {
-	/** Internal 8MHz RC oscillator */
-	SYSTEM_CLOCK_SOURCE_OSC8M    = GCLK_SOURCE_OSC8M,
-	/** Internal 32KHz RC oscillator */
-	SYSTEM_CLOCK_SOURCE_OSC32K   = GCLK_SOURCE_OSC32K,
-	/** External oscillator */
-	SYSTEM_CLOCK_SOURCE_XOSC     = GCLK_SOURCE_XOSC ,
-	/** External 32KHz oscillator */
-	SYSTEM_CLOCK_SOURCE_XOSC32K  = GCLK_SOURCE_XOSC32K,
-	/** Digital Frequency Locked Loop (DFLL) */
-	SYSTEM_CLOCK_SOURCE_DFLL     = GCLK_SOURCE_DFLL48M,
-	/** Internal Ultra Low Power 32KHz oscillator */
-	SYSTEM_CLOCK_SOURCE_ULP32K   = GCLK_SOURCE_OSCULP32K,
-	/** Generator input pad */
-	SYSTEM_CLOCK_SOURCE_GCLKIN     = GCLK_SOURCE_GCLKIN,
-	/** Generic clock generator one output */
-	SYSTEM_CLOCK_SOURCE_GCLKGEN1   = GCLK_SOURCE_GCLKGEN1,
-#ifdef FEATURE_SYSTEM_CLOCK_DPLL
-	/** Digital Phase Locked Loop (DPLL).
-	 * Check \c FEATURE_SYSTEM_CLOCK_DPLL for which device support it.
-	 */
-	SYSTEM_CLOCK_SOURCE_DPLL     = GCLK_SOURCE_FDPLL,
-#endif
-};
-
-/**
- * \brief List of APB peripheral buses.
- *
- * Available bus clock domains on the APB bus.
- */
-enum system_clock_apb_bus {
-	/** Peripheral bus A on the APB bus */
-	SYSTEM_CLOCK_APB_APBA,
-	/** Peripheral bus B on the APB bus */
-	SYSTEM_CLOCK_APB_APBB,
-	/** Peripheral bus C on the APB bus */
-	SYSTEM_CLOCK_APB_APBC,
-};
-
-/**
- * \brief Configuration structure for XOSC.
- *
- * External oscillator clock configuration structure.
- */
-struct system_clock_source_xosc_config {
-	/** External clock type */
-	enum system_clock_external external_clock;
-	/** Crystal oscillator start-up time */
-	enum system_xosc_startup startup_time;
-	/** Enable automatic amplitude gain control */
-	bool auto_gain_control;
-	/** External clock/crystal frequency */
-	uint32_t frequency;
-	/** Keep the XOSC enabled in standby sleep mode */
-	bool run_in_standby;
-	/** Run On Demand. If this is set the XOSC won't run
-	 * until requested by a peripheral. */
-	bool on_demand;
-};
-
-/**
- * \brief Configuration structure for XOSC32K.
- *
- * External 32KHz oscillator clock configuration structure.
- */
-struct system_clock_source_xosc32k_config {
-	/** External clock type */
-	enum system_clock_external external_clock;
-	/** Crystal oscillator start-up time */
-	enum system_xosc32k_startup startup_time;
-	/** Enable automatic amplitude control */
-	bool auto_gain_control;
-	/** Enable 1KHz output */
-	bool enable_1khz_output;
-	/** Enable 32KHz output */
-	bool enable_32khz_output;
-	/** External clock/crystal frequency */
-	uint32_t frequency;
-	/** Keep the XOSC32K enabled in standby sleep mode */
-	bool run_in_standby;
-	/** Run On Demand. If this is set the XOSC32K won't run
-	 * until requested by a peripheral. */
-	bool on_demand;
-	/** Lock configuration after it has been written,
-	 *  a device reset will release the lock */
-	bool write_once;
-};
-
-/**
- * \brief Configuration structure for OSC8M.
- *
- * Internal 8MHz (nominal) oscillator configuration structure.
- */
-struct system_clock_source_osc8m_config {
-	/** Internal 8MHz RC oscillator prescaler */
-	enum system_osc8m_div prescaler;
-	/** Keep the OSC8M enabled in standby sleep mode */
-	bool run_in_standby;
-	/** Run On Demand. If this is set the OSC8M won't run
-	 * until requested by a peripheral. */
-	bool on_demand;
-};
-
-/**
- * \brief Configuration structure for OSC32K.
- *
- * Internal 32KHz (nominal) oscillator configuration structure.
- */
-struct system_clock_source_osc32k_config {
-	/** Startup time */
-	enum system_osc32k_startup startup_time;
-	/** Enable 1KHz output */
-	bool enable_1khz_output;
-	/** Enable 32KHz output */
-	bool enable_32khz_output;
-	/** Keep the OSC32K enabled in standby sleep mode */
-	bool run_in_standby;
-	/** Run On Demand. If this is set the OSC32K won't run
-	 * until requested by a peripheral */
-	bool on_demand;
-	/** Lock configuration after it has been written,
-	 *  a device reset will release the lock */
-	bool write_once;
-};
-
-/**
- * \brief Configuration structure for DFLL.
- *
- * DFLL oscillator configuration structure.
- */
-struct system_clock_source_dfll_config {
-	/** Loop mode */
-	enum system_clock_dfll_loop_mode loop_mode;
-	/** Run On Demand. If this is set the DFLL won't run
-	 * until requested by a peripheral. */
-	bool on_demand;
-	/** Enable Quick Lock */
-	enum system_clock_dfll_quick_lock quick_lock;
-	/** Enable Chill Cycle */
-	enum system_clock_dfll_chill_cycle chill_cycle;
-	/** DFLL lock state on wakeup */
-	enum system_clock_dfll_wakeup_lock wakeup_lock;
-	/** DFLL tracking after fine lock */
-	enum system_clock_dfll_stable_tracking stable_tracking;
-	/** Coarse calibration value (Open loop mode) */
-	uint8_t coarse_value;
-	/** Fine calibration value (Open loop mode) */
-	uint16_t fine_value;
-	/** Coarse adjustment maximum step size (Closed loop mode) */
-	uint8_t coarse_max_step;
-	/** Fine adjustment maximum step size (Closed loop mode) */
-	uint16_t fine_max_step;
-	/** DFLL multiply factor (Closed loop mode */
-	uint16_t multiply_factor;
-};
-
-/**
- * \name External Oscillator Management
- * @{
- */
-
-/**
- * \brief Retrieve the default configuration for XOSC.
- *
- * Fills a configuration structure with the default configuration for an
- * external oscillator module:
- *   - External Crystal
- *   - Start-up time of 16384 external clock cycles
- *   - Automatic crystal gain control mode enabled
- *   - Frequency of 12MHz
- *   - Don't run in STANDBY sleep mode
- *   - Run only when requested by peripheral (on demand)
- *
- * \param[out] config  Configuration structure to fill with default values
- */
-static inline void system_clock_source_xosc_get_config_defaults(
-		struct system_clock_source_xosc_config *const config)
-{
-	Assert(config);
-
-	config->external_clock    = SYSTEM_CLOCK_EXTERNAL_CRYSTAL;
-	config->startup_time      = SYSTEM_XOSC_STARTUP_16384;
-	config->auto_gain_control = true;
-	config->frequency         = 12000000UL;
-	config->run_in_standby    = false;
-	config->on_demand         = true;
-}
-
-void system_clock_source_xosc_set_config(
-		struct system_clock_source_xosc_config *const config);
-
-/**
- * @}
- */
-
-
-/**
- * \name External 32KHz Oscillator Management
- * @{
- */
-
-/**
- * \brief Retrieve the default configuration for XOSC32K.
- *
- * Fills a configuration structure with the default configuration for an
- * external 32KHz oscillator module:
- *   - External Crystal
- *   - Start-up time of 16384 external clock cycles
- *   - Automatic crystal gain control mode disabled
- *   - Frequency of 32.768KHz
- *   - 1KHz clock output disabled
- *   - 32KHz clock output enabled
- *   - Don't run in STANDBY sleep mode
- *   - Run only when requested by peripheral (on demand)
- *   - Don't lock registers after configuration has been written
- *
- * \param[out] config  Configuration structure to fill with default values
- */
-static inline void system_clock_source_xosc32k_get_config_defaults(
-		struct system_clock_source_xosc32k_config *const config)
-{
-	Assert(config);
-
-	config->external_clock      = SYSTEM_CLOCK_EXTERNAL_CRYSTAL;
-	config->startup_time        = SYSTEM_XOSC32K_STARTUP_16384;
-	config->auto_gain_control   = false;
-	config->frequency           = 32768UL;
-	config->enable_1khz_output  = false;
-	config->enable_32khz_output = true;
-	config->run_in_standby      = false;
-	config->on_demand           = true;
-	config->write_once          = false;
-}
-
-void system_clock_source_xosc32k_set_config(
-		struct system_clock_source_xosc32k_config *const config);
-/**
- * @}
- */
-
-
-/**
- * \name Internal 32KHz Oscillator Management
- * @{
- */
-
-/**
- * \brief Retrieve the default configuration for OSC32K.
- *
- * Fills a configuration structure with the default configuration for an
- * internal 32KHz oscillator module:
- *   - 1KHz clock output enabled
- *   - 32KHz clock output enabled
- *   - Don't run in STANDBY sleep mode
- *   - Run only when requested by peripheral (on demand)
- *   - Set startup time to 130 cycles
- *   - Don't lock registers after configuration has been written
- *
- * \param[out] config  Configuration structure to fill with default values
- */
-static inline void system_clock_source_osc32k_get_config_defaults(
-		struct system_clock_source_osc32k_config *const config)
-{
-	Assert(config);
-
-	config->enable_1khz_output  = true;
-	config->enable_32khz_output = true;
-	config->run_in_standby      = false;
-	config->on_demand           = true;
-	config->startup_time        = SYSTEM_OSC32K_STARTUP_130;
-	config->write_once          = false;
-}
-
-void system_clock_source_osc32k_set_config(
-		struct system_clock_source_osc32k_config *const config);
-
-/**
- * @}
- */
-
-
-/**
- * \name Internal 8MHz Oscillator Management
- * @{
- */
-
-/**
- * \brief Retrieve the default configuration for OSC8M.
- *
- * Fills a configuration structure with the default configuration for an
- * internal 8MHz (nominal) oscillator module:
- *   - Clock output frequency divided by a factor of eight
- *   - Don't run in STANDBY sleep mode
- *   - Run only when requested by peripheral (on demand)
- *
- * \param[out] config  Configuration structure to fill with default values
- */
-static inline void system_clock_source_osc8m_get_config_defaults(
-		struct system_clock_source_osc8m_config *const config)
-{
-	Assert(config);
-
-	config->prescaler       = SYSTEM_OSC8M_DIV_8;
-	config->run_in_standby  = false;
-	config->on_demand       = true;
-}
-
-void system_clock_source_osc8m_set_config(
-		struct system_clock_source_osc8m_config *const config);
-
-/**
- * @}
- */
-
-
-/**
- * \name Internal DFLL Management
- * @{
- */
-
-/**
- * \brief Retrieve the default configuration for DFLL.
- *
- * Fills a configuration structure with the default configuration for a
- * DFLL oscillator module:
- *   - Open loop mode
- *   - QuickLock mode enabled
- *   - Chill cycle enabled
- *   - Output frequency lock maintained during device wake-up
- *   - Continuous tracking of the output frequency
- *   - Default tracking values at the mid-points for both coarse and fine
- *     tracking parameters
- *   - Don't run in STANDBY sleep mode
- *   - Run only when requested by peripheral (on demand)
- *
- * \param[out] config  Configuration structure to fill with default values
- */
-static inline void system_clock_source_dfll_get_config_defaults(
-		struct system_clock_source_dfll_config *const config)
-{
-	Assert(config);
-
-	config->loop_mode       = SYSTEM_CLOCK_DFLL_LOOP_MODE_OPEN;
-	config->quick_lock      = SYSTEM_CLOCK_DFLL_QUICK_LOCK_ENABLE;
-	config->chill_cycle     = SYSTEM_CLOCK_DFLL_CHILL_CYCLE_ENABLE;
-	config->wakeup_lock     = SYSTEM_CLOCK_DFLL_WAKEUP_LOCK_KEEP;
-	config->stable_tracking = SYSTEM_CLOCK_DFLL_STABLE_TRACKING_TRACK_AFTER_LOCK;
-	config->on_demand       = true;
-
-	/* Open loop mode calibration value */
-	config->coarse_value    = 0x1f / 4; /* Midpoint */
-	config->fine_value      = 0xff / 4; /* Midpoint */
-
-	/* Closed loop mode */
-	config->coarse_max_step = 1;
-	config->fine_max_step   = 1;
-	config->multiply_factor = 6; /* Multiply 8MHz by 6 to get 48MHz */
-}
-
-void system_clock_source_dfll_set_config(
-		struct system_clock_source_dfll_config *const config);
-
-/**
- * @}
- */
-
-/**
- * \name Clock Source Management
- * @{
- */
-enum status_code system_clock_source_write_calibration(
-		const enum system_clock_source system_clock_source,
-		const uint16_t calibration_value,
-		const uint8_t freq_range);
-
-enum status_code system_clock_source_enable(
-		const enum system_clock_source system_clock_source);
-
-enum status_code system_clock_source_disable(
-		const enum system_clock_source clk_source);
-
-bool system_clock_source_is_ready(
-		const enum system_clock_source clk_source);
-
-uint32_t system_clock_source_get_hz(
-		const enum system_clock_source clk_source);
-
-/**
- * @}
- */
-
-/**
- * \name Main Clock Management
- * @{
- */
-
-/**
- * \brief Set main CPU clock divider.
- *
- * Sets the clock divider used on the main clock to provide the CPU clock.
- *
- * \param[in] divider  CPU clock divider to set
- */
-static inline void system_cpu_clock_set_divider(
-		const enum system_main_clock_div divider)
-{
-	Assert(((uint32_t)divider & PM_CPUSEL_CPUDIV_Msk) == divider);
-	PM->CPUSEL.reg = (uint32_t)divider;
-}
-
-/**
- * \brief Retrieves the current frequency of the CPU core.
- *
- * Retrieves the operating frequency of the CPU core, obtained from the main
- * generic clock and the set CPU bus divider.
- *
- * \return Current CPU frequency in Hz.
- */
-static inline uint32_t system_cpu_clock_get_hz(void)
-{
-	return (system_gclk_gen_get_hz(GCLK_GENERATOR_0) >> PM->CPUSEL.reg);
-}
-
-/**
- * \brief Set APBx clock divider.
- *
- * Set the clock divider used on the main clock to provide the clock for the
- * given APBx bus.
- *
- * \param[in] divider  APBx bus divider to set
- * \param[in] bus      APBx bus to set divider
- *
- * \returns Status of the clock division change operation.
- *
- * \retval STATUS_ERR_INVALID_ARG  Invalid bus ID was given
- * \retval STATUS_OK               The APBx clock was set successfully
- */
-static inline enum status_code system_apb_clock_set_divider(
-		const enum system_clock_apb_bus bus,
-		const enum system_main_clock_div divider)
-{
-	switch (bus) {
-		case SYSTEM_CLOCK_APB_APBA:
-			PM->APBASEL.reg = (uint32_t)divider;
-			break;
-		case SYSTEM_CLOCK_APB_APBB:
-			PM->APBBSEL.reg = (uint32_t)divider;
-			break;
-		case SYSTEM_CLOCK_APB_APBC:
-			PM->APBCSEL.reg = (uint32_t)divider;
-			break;
-		default:
-			Assert(false);
-			return STATUS_ERR_INVALID_ARG;
-	}
-
-	return STATUS_OK;
-}
-
-/**
- * \brief Retrieves the current frequency of a ABPx.
- *
- * Retrieves the operating frequency of an APBx bus, obtained from the main
- * generic clock and the set APBx bus divider.
- *
- * \return Current APBx bus frequency in Hz.
- */
-static inline uint32_t system_apb_clock_get_hz(
-		const enum system_clock_apb_bus bus)
-{
-	uint16_t bus_divider = 0;
-
-	switch (bus) {
-		case SYSTEM_CLOCK_APB_APBA:
-			bus_divider = PM->APBASEL.reg;
-			break;
-		case SYSTEM_CLOCK_APB_APBB:
-			bus_divider = PM->APBBSEL.reg;
-			break;
-		case SYSTEM_CLOCK_APB_APBC:
-			bus_divider = PM->APBCSEL.reg;
-			break;
-		default:
-			Assert(false);
-			return 0;
-	}
-
-	return (system_gclk_gen_get_hz(GCLK_GENERATOR_0) >> bus_divider);
-}
-
-
-/**
- * @}
- */
-
-/**
- * \name Bus Clock Masking
- * @{
- */
-
-/**
- * \brief Set bits in the clock mask for the AHB bus.
- *
- * This function will set bits in the clock mask for the AHB bus.
- * Any bits set to 1 will enable that clock, 0 bits in the mask
- * will be ignored.
- *
- * \param[in] ahb_mask  AHB clock mask to enable
- */
-static inline void system_ahb_clock_set_mask(
-		const uint32_t ahb_mask)
-{
-	PM->AHBMASK.reg |= ahb_mask;
-}
-
-/**
- * \brief Clear bits in the clock mask for the AHB bus.
- *
- * This function will clear bits in the clock mask for the AHB bus.
- * Any bits set to 1 will disable that clock, 0 bits in the mask
- * will be ignored.
- *
- * \param[in] ahb_mask  AHB clock mask to disable
- */
-static inline void system_ahb_clock_clear_mask(
-		const uint32_t ahb_mask)
-{
-	PM->AHBMASK.reg &= ~ahb_mask;
-}
-
-/**
- * \brief Set bits in the clock mask for an APBx bus.
- *
- * This function will set bits in the clock mask for an APBx bus.
- * Any bits set to 1 will enable the corresponding module clock, zero bits in
- * the mask will be ignored.
- *
- * \param[in] mask  APBx clock mask, a \c SYSTEM_CLOCK_APB_APBx constant from
- *                  the device header files
- * \param[in] bus   Bus to set clock mask bits for, a mask of \c PM_APBxMASK_*
- *                  constants from the device header files
- *
- * \returns Status indicating the result of the clock mask change operation.
- *
- * \retval STATUS_ERR_INVALID_ARG  Invalid bus given
- * \retval STATUS_OK               The clock mask was set successfully
- */
-static inline enum status_code system_apb_clock_set_mask(
-		const enum system_clock_apb_bus bus,
-		const uint32_t mask)
-{
-	switch (bus) {
-		case SYSTEM_CLOCK_APB_APBA:
-			PM->APBAMASK.reg |= mask;
-			break;
-
-		case SYSTEM_CLOCK_APB_APBB:
-			PM->APBBMASK.reg |= mask;
-			break;
-
-		case SYSTEM_CLOCK_APB_APBC:
-			PM->APBCMASK.reg |= mask;
-			break;
-
-		default:
-			Assert(false);
-			return STATUS_ERR_INVALID_ARG;
-
-	}
-
-	return STATUS_OK;
-}
-
-/**
- * \brief Clear bits in the clock mask for an APBx bus.
- *
- * This function will clear bits in the clock mask for an APBx bus.
- * Any bits set to 1 will disable the corresponding module clock, zero bits in
- * the mask will be ignored.
- *
- * \param[in] mask  APBx clock mask, a \c SYSTEM_CLOCK_APB_APBx constant from
- *                  the device header files
- * \param[in] bus   Bus to clear clock mask bits
- *
- * \returns Status indicating the result of the clock mask change operation.
- *
- * \retval STATUS_ERR_INVALID_ARG  Invalid bus ID was given
- * \retval STATUS_OK               The clock mask was changed successfully
- */
-static inline enum status_code system_apb_clock_clear_mask(
-		const enum system_clock_apb_bus bus,
-		const uint32_t mask)
-{
-	switch (bus) {
-		case SYSTEM_CLOCK_APB_APBA:
-			PM->APBAMASK.reg &= ~mask;
-			break;
-
-		case SYSTEM_CLOCK_APB_APBB:
-			PM->APBBMASK.reg &= ~mask;
-			break;
-
-		case SYSTEM_CLOCK_APB_APBC:
-			PM->APBCMASK.reg &= ~mask;
-			break;
-
-		default:
-			Assert(false);
-			return STATUS_ERR_INVALID_ARG;
-	}
-
-	return STATUS_OK;
-}
-
-/**
- * @}
- */
-
-#ifdef FEATURE_SYSTEM_CLOCK_DPLL
-/**
- * \brief Reference clock source of the DPLL module.
- */
-enum system_clock_source_dpll_reference_clock {
-	/** Select XOSC32K as clock reference. */
-	SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC32K,
-	/** Select XOSC as clock reference. */
-	SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC,
-	/** Select GCLK as clock reference. */
-	SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_GCLK,
-};
-
-/**
- * \brief Lock time-out value of the DPLL module.
- */
-enum system_clock_source_dpll_lock_time {
-	/** Set no time-out as default. */
-	SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_DEFAULT,
-	/** Set time-out if no lock within 8ms. */
-	SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_8MS = 0x04,
-	/** Set time-out if no lock within 9ms. */
-	SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_9MS,
-	/** Set time-out if no lock within 10ms. */
-	SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_10MS,
-	/** Set time-out if no lock within 11ms. */
-	SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_11MS,
-};
-
-/**
- * \brief Filter type of the DPLL module.
- */
-enum system_clock_source_dpll_filter {
-	/** Default filter mode. */
-	SYSTEM_CLOCK_SOURCE_DPLL_FILTER_DEFAULT,
-	/** Low bandwidth filter. */
-	SYSTEM_CLOCK_SOURCE_DPLL_FILTER_LOW_BANDWIDTH_FILTER,
-	/** High bandwidth filter. */
-	SYSTEM_CLOCK_SOURCE_DPLL_FILTER_HIGH_BANDWIDTH_FILTER,
-	/** High damping filter. */
-	SYSTEM_CLOCK_SOURCE_DPLL_FILTER_HIGH_DAMPING_FILTER,
-};
-
-/**
- * \brief Configuration structure for DPLL.
- *
- * DPLL oscillator configuration structure.
- */
-struct system_clock_source_dpll_config {
-	/** Run On Demand. If this is set the DPLL won't run
-	 * until requested by a peripheral. */
-	bool on_demand;
-	/** Keep the DPLL enabled in standby sleep mode. */
-	bool run_in_standby;
-	/** Bypass lock signal. */
-	bool lock_bypass;
-	/** Wake up fast. If this is set DPLL output clock is enabled after
-	 * the startup time. */
-	bool wake_up_fast;
-	/** Enable low power mode.  */
-	bool low_power_enable;
-
-	/** Output frequency of the clock. */
-	uint32_t output_frequency;
-	/** Reference frequency of the clock. */
-	uint32_t reference_frequency;
-	/** Devider of reference clock. */
-	uint16_t reference_divider;
-
-	/** Filter type of the DPLL module. */
-	enum system_clock_source_dpll_filter          filter;
-	/** Lock time-out value of the DPLL module. */
-	enum system_clock_source_dpll_lock_time       lock_time;
-	/** Reference clock source of the DPLL module. */
-	enum system_clock_source_dpll_reference_clock reference_clock;
-};
-
-/**
- * \name Internal DPLL Management
- * @{
- */
-
-/**
- * \brief Retrieve the default configuration for DPLL.
- *
- * Fills a configuration structure with the default configuration for a
- * DPLL oscillator module:
- *   - Run only when requested by peripheral (on demand)
- *   - Don't run in STANDBY sleep mode
- *   - Lock bypass disabled
- *   - Fast wake up disabled
- *   - Low power mode disabled
- *   - Output frequency is 48MHz
- *   - Reference clock frequency is 32768Hz
- *   - Not divide reference clock
- *   - Select REF0 as reference clock
- *   - Set lock time to default mode
- *   - Use default filter
- *
- * \param[out] config  Configuration structure to fill with default values
- */
-static inline void system_clock_source_dpll_get_config_defaults(
-		struct system_clock_source_dpll_config *const config)
-{
-	config->on_demand           = true;
-	config->run_in_standby      = false;
-	config->lock_bypass         = false;
-	config->wake_up_fast        = false;
-	config->low_power_enable    = false;
-
-	config->output_frequency    = 48000000;
-	config->reference_frequency = 32768;
-	config->reference_divider   = 1;
-	config->reference_clock     = SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC32K;
-
-	config->lock_time           = SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_DEFAULT;
-	config->filter              = SYSTEM_CLOCK_SOURCE_DPLL_FILTER_DEFAULT;
-};
-
-void system_clock_source_dpll_set_config(
-		struct system_clock_source_dpll_config *const config);
-
-/* @} */
-#endif
-
-/**
- * \name System Clock Initialization
- * @{
- */
-
-void system_clock_init(uint16_t dfll_fine_calibration);
-
-/**
- * @}
- */
-
-/**
- * \name System Flash Wait States
- * @{
- */
-
-/**
- * \brief Set flash controller wait states.
- *
- * Will set the number of wait states that are used by the onboard
- * flash memory. The number of wait states depend on both device
- * supply voltage and CPU speed. The required number of wait states
- * can be found in the electrical characteristics of the device.
- *
- * \param[in] wait_states Number of wait states to use for internal flash
- */
-static inline void system_flash_set_waitstates(uint8_t wait_states)
-{
-	Assert(NVMCTRL_CTRLB_RWS((uint32_t)wait_states) ==
-			((uint32_t)wait_states << NVMCTRL_CTRLB_RWS_Pos));
-
-	NVMCTRL->CTRLB.bit.RWS = wait_states;
-}
-/**
- * @}
- */
-
-/**
- * @}
- */
-
-/**
- * \page asfdoc_sam0_system_clock_extra Extra Information for SYSTEM CLOCK Driver
- *
- * \section asfdoc_sam0_system_clock_extra_acronyms Acronyms
- * Below is a table listing the acronyms used in this module, along with their
- * intended meanings.
- *
- * <table>
- *	<tr>
- *		<th>Acronym</th>
- *		<th>Description</th>
- *	</tr>
- *	<tr>
- *		<td>DFLL</td>
- *		<td>Digital Frequency Locked Loop</td>
- *	</tr>
- *	<tr>
- *		<td>MUX</td>
- *		<td>Multiplexer</td>
- *	</tr>
- *	<tr>
- *		<td>OSC32K</td>
- *		<td>Internal 32KHz Oscillator</td>
- *	</tr>
- *	<tr>
- *		<td>OSC8M</td>
- *		<td>Internal 8MHz Oscillator</td>
- *	</tr>
- *	<tr>
- *		<td>PLL</td>
- *		<td>Phase Locked Loop</td>
- *	</tr>
- *	<tr>
- *		<td>OSC</td>
- *		<td>Oscillator</td>
- *	</tr>
- *	<tr>
- *		<td>XOSC</td>
- *		<td>External Oscillator</td>
- *	</tr>
- *	<tr>
- *		<td>XOSC32K</td>
- *		<td>External 32KHz Oscillator</td>
- *	</tr>
- *	<tr>
- *		<td>AHB</td>
- *		<td>Advanced High-performance Bus</td>
- *	</tr>
- *	<tr>
- *		<td>APB</td>
- *		<td>Advanced Peripheral Bus</td>
- *	</tr>
- *	<tr>
- *		<td>DPLL</td>
- *		<td>Digital Phase Locked Loop</td>
- *	</tr>
- * </table>
- *
- *
- * \section asfdoc_sam0_system_clock_extra_dependencies Dependencies
- * This driver has the following dependencies:
- *
- *  - None
- *
- *
- * \section asfdoc_sam0_system_clock_extra_errata Errata
- *
- *	- This driver implements experimental workaround for errata 9905
- *
- *	  "The DFLL clock must be requested before being configured otherwise a
- *	  write access to a DFLL register can freeze the device."
- *	  This driver will enable and configure the DFLL before the ONDEMAND bit is set.
- *
- *
- * \section asfdoc_sam0_system_clock_extra_history Module History
- * An overview of the module history is presented in the table below, with
- * details on the enhancements and fixes made to the module since its first
- * release. The current version of this corresponds to the newest version in
- * the table.
- *
- * <table>
- *	<tr>
- *		<th>Changelog</th>
- *	</tr>
- *	<tr>
- *		<td>
- *			\li Corrected OSC32K startup time definitions
- *			\li Support locking of OSC32K and XOSC32K config register (default: false)
- *			\li Added DPLL support, functions added:
- *			    \c system_clock_source_dpll_get_config_defaults() and
- *		        \c system_clock_source_dpll_set_config()
- *			\li Moved gclk channel locking feature out of the config struct
- *			    functions added:
- *			    \c system_gclk_chan_lock(),
- *			    \c system_gclk_chan_is_locked()
- *			    \c system_gclk_chan_is_enabled() and
- *			    \c system_gclk_gen_is_enabled()
- *		</td>
- *	</tr>
- *  <tr>
- *		<td>Fixed \c system_gclk_chan_disable() deadlocking if a channel is enabled
- *		    and configured to a failed/not running clock generator</td>
- *  </tr>
- *	<tr>
- *		<td>
- *			\li Changed default value for CONF_CLOCK_DFLL_ON_DEMAND from \c true to \c false
- *			\li Fixed system_flash_set_waitstates() failing with an assertion
- *			    if an odd number of wait states provided
- *		</td>
- *	</tr>
- *	<tr>
- *		<td>
- *			\li Updated DFLL configuration function to implement workaround for
- *			    errata 9905 in the DFLL module
- *			\li Updated \c system_clock_init() to reset interrupt flags before
- *			    they are used
- *			\li Fixed \c system_clock_source_get_hz() to return correcy DFLL
- *			    frequency number
- *		</td>
- *	</tr>
- *	<tr>
- *		<td>\li Fixed \c system_clock_source_is_ready not returning the correct
- *              state for \c SYSTEM_CLOCK_SOURCE_OSC8M
- *          \li Renamed the various \c system_clock_source_*_get_default_config()
- *              functions to \c system_clock_source_*_get_config_defaults() to
- *              match the remainder of ASF
- *          \li Added OSC8M calibration constant loading from the device signature
- *              row when the oscillator is initialized
- *          \li Updated default configuration of the XOSC32 to disable Automatic
- *              Gain Control due to silicon errata
- *      </td>
- *	</tr>
- *	<tr>
- *		<td>Initial Release</td>
- *	</tr>
- * </table>
- */
-
-/**
- * \page asfdoc_sam0_system_clock_exqsg Examples for System Clock Driver
- *
- * This is a list of the available Quick Start guides (QSGs) and example
- * applications for \ref asfdoc_sam0_system_clock_group. QSGs are simple
- * examples with step-by-step instructions to configure and use this driver in
- * a selection of use cases. Note that a QSG can be compiled as a standalone
- * application or be added to the user application.
- *
- *  - \subpage asfdoc_sam0_system_clock_basic_use_case
- *  - \subpage asfdoc_sam0_system_gclk_basic_use_case
- *
- * \page asfdoc_sam0_system_clock_document_revision_history Document Revision History
- *
- * <table>
- *	<tr>
- *		<th>Doc. Rev.</th>
- *		<th>Date</th>
- *		<th>Comments</th>
- *	</tr>
- *	<tr>
- *		<td>42119E</td>
- *		<td>12/2015</td>
- *		<td>Added support for SAM DA1 and SAM D09</td>
- *	</tr>
- *	<tr>
- *		<td>42119D</td>
- *		<td>12/2014</td>
- *		<td>Added support for SAM R21 and SAM D10/D11</td>
- *	</tr>
- *	<tr>
- *		<td>42119C</td>
- *		<td>01/2014</td>
- *		<td>Added support for SAM D21</td>
- *	</tr>
- *	<tr>
- *		<td>42119B</td>
- *		<td>06/2013</td>
- *		<td>Corrected documentation typos. Fixed missing steps in the Basic
- *          Use Case Quick Start Guide</td>
- *	</tr>
- *	<tr>
- *		<td>42119A</td>
- *		<td>06/2013</td>
- *		<td>Initial release</td>
- *	</tr>
- * </table>
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* SYSTEM_CLOCK_FEATURE_H_INCLUDED */
diff --git a/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/gclk.c b/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/gclk.c
deleted file mode 100644
index 79b5a5813..000000000
--- a/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/gclk.c
+++ /dev/null
@@ -1,522 +0,0 @@
-/**
- * \file
- *
- * \brief SAM D21/R21/DA0/DA1 Generic Clock Driver
- *
- * Copyright (C) 2013-2016 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-
-#include <gclk.h>
-#include <clock.h>
-#include <system_interrupt.h>
-
-/**
- * \brief Determines if the hardware module(s) are currently synchronizing to the bus.
- *
- * Checks to see if the underlying hardware peripheral module(s) are currently
- * synchronizing across multiple clock domains to the hardware bus, This
- * function can be used to delay further operations on a module until such time
- * that it is ready, to prevent blocking delays for synchronization in the
- * user application.
- *
- * \return Synchronization status of the underlying hardware module(s).
- *
- * \retval false if the module has completed synchronization
- * \retval true if the module synchronization is ongoing
- */
-static inline bool system_gclk_is_syncing(void)
-{
-	if (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY){
-		return true;
-	}
-
-	return false;
-}
-
-/**
- * \brief Initializes the GCLK driver.
- *
- * Initializes the Generic Clock module, disabling and resetting all active
- * Generic Clock Generators and Channels to their power-on default values.
- */
-void system_gclk_init(void)
-{
-	/* Turn on the digital interface clock */
-	system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBA, PM_APBAMASK_GCLK);
-
-	/* Software reset the module to ensure it is re-initialized correctly */
-	GCLK->CTRL.reg = GCLK_CTRL_SWRST;
-	while (GCLK->CTRL.reg & GCLK_CTRL_SWRST) {
-		/* Wait for reset to complete */
-	}
-}
-
-/**
- * \brief Writes a Generic Clock Generator configuration to the hardware module.
- *
- * Writes out a given configuration of a Generic Clock Generator configuration
- * to the hardware module.
- *
- * \note Changing the clock source on the fly (on a running
- *       generator) can take additional time if the clock source is configured
- *       to only run on-demand (ONDEMAND bit is set) and it is not currently
- *       running (no peripheral is requesting the clock source). In this case
- *       the GCLK will request the new clock while still keeping a request to
- *       the old clock source until the new clock source is ready.
- *
- * \note This function will not start a generator that is not already running;
- *       to start the generator, call \ref system_gclk_gen_enable()
- *       after configuring a generator.
- *
- * \param[in] generator  Generic Clock Generator index to configure
- * \param[in] config     Configuration settings for the generator
- */
-void system_gclk_gen_set_config(
-		const uint8_t generator,
-		struct system_gclk_gen_config *const config)
-{
-	/* Sanity check arguments */
-	Assert(config);
-
-	/* Cache new register configurations to minimize sync requirements. */
-	uint32_t new_genctrl_config = (generator << GCLK_GENCTRL_ID_Pos);
-	uint32_t new_gendiv_config  = (generator << GCLK_GENDIV_ID_Pos);
-
-	/* Select the requested source clock for the generator */
-	new_genctrl_config |= config->source_clock << GCLK_GENCTRL_SRC_Pos;
-
-	/* Configure the clock to be either high or low when disabled */
-	if (config->high_when_disabled) {
-		new_genctrl_config |= GCLK_GENCTRL_OOV;
-	}
-
-	/* Configure if the clock output to I/O pin should be enabled. */
-	if (config->output_enable) {
-		new_genctrl_config |= GCLK_GENCTRL_OE;
-	}
-
-	/* Set division factor */
-	if (config->division_factor > 1) {
-		/* Check if division is a power of two */
-		if (((config->division_factor & (config->division_factor - 1)) == 0)) {
-			/* Determine the index of the highest bit set to get the
-			 * division factor that must be loaded into the division
-			 * register */
-
-			uint32_t div2_count = 0;
-
-			uint32_t mask;
-			for (mask = (1UL << 1); mask < config->division_factor;
-						mask <<= 1) {
-				div2_count++;
-			}
-
-			/* Set binary divider power of 2 division factor */
-			new_gendiv_config  |= div2_count << GCLK_GENDIV_DIV_Pos;
-			new_genctrl_config |= GCLK_GENCTRL_DIVSEL;
-		} else {
-			/* Set integer division factor */
-
-			new_gendiv_config  |=
-					(config->division_factor) << GCLK_GENDIV_DIV_Pos;
-
-			/* Enable non-binary division with increased duty cycle accuracy */
-			new_genctrl_config |= GCLK_GENCTRL_IDC;
-		}
-
-	}
-
-	/* Enable or disable the clock in standby mode */
-	if (config->run_in_standby) {
-		new_genctrl_config |= GCLK_GENCTRL_RUNSTDBY;
-	}
-
-	while (system_gclk_is_syncing()) {
-		/* Wait for synchronization */
-	};
-
-	system_interrupt_enter_critical_section();
-
-	/* Select the correct generator */
-	*((uint8_t*)&GCLK->GENDIV.reg) = generator;
-
-	/* Write the new generator configuration */
-	while (system_gclk_is_syncing()) {
-		/* Wait for synchronization */
-	};
-	GCLK->GENDIV.reg  = new_gendiv_config;
-
-	while (system_gclk_is_syncing()) {
-		/* Wait for synchronization */
-	};
-	GCLK->GENCTRL.reg = new_genctrl_config | (GCLK->GENCTRL.reg & GCLK_GENCTRL_GENEN);
-
-	system_interrupt_leave_critical_section();
-}
-
-/**
- * \brief Enables a Generic Clock Generator that was previously configured.
- *
- * Starts the clock generation of a Generic Clock Generator that was previously
- * configured via a call to \ref system_gclk_gen_set_config().
- *
- * \param[in] generator  Generic Clock Generator index to enable
- */
-void system_gclk_gen_enable(
-		const uint8_t generator)
-{
-	while (system_gclk_is_syncing()) {
-		/* Wait for synchronization */
-	};
-
-	system_interrupt_enter_critical_section();
-
-	/* Select the requested generator */
-	*((uint8_t*)&GCLK->GENCTRL.reg) = generator;
-	while (system_gclk_is_syncing()) {
-		/* Wait for synchronization */
-	};
-
-	/* Enable generator */
-	GCLK->GENCTRL.reg |= GCLK_GENCTRL_GENEN;
-
-	system_interrupt_leave_critical_section();
-}
-
-/**
- * \brief Disables a Generic Clock Generator that was previously enabled.
- *
- * Stops the clock generation of a Generic Clock Generator that was previously
- * started via a call to \ref system_gclk_gen_enable().
- *
- * \param[in] generator  Generic Clock Generator index to disable
- */
-void system_gclk_gen_disable(
-		const uint8_t generator)
-{
-	while (system_gclk_is_syncing()) {
-		/* Wait for synchronization */
-	};
-
-	system_interrupt_enter_critical_section();
-
-	/* Select the requested generator */
-	*((uint8_t*)&GCLK->GENCTRL.reg) = generator;
-	while (system_gclk_is_syncing()) {
-		/* Wait for synchronization */
-	};
-
-	/* Disable generator */
-	GCLK->GENCTRL.reg &= ~GCLK_GENCTRL_GENEN;
-	while (GCLK->GENCTRL.reg & GCLK_GENCTRL_GENEN) {
-		/* Wait for clock to become disabled */
-	}
-
-	system_interrupt_leave_critical_section();
-}
-
-/**
- * \brief Determins if the specified Generic Clock Generator is enabled.
- *
- * \param[in] generator  Generic Clock Generator index to check
- *
- * \return The enabled status.
- * \retval true The Generic Clock Generator is enabled
- * \retval false The Generic Clock Generator is disabled
- */
-bool system_gclk_gen_is_enabled(
-		const uint8_t generator)
-{
-	bool enabled;
-
-	system_interrupt_enter_critical_section();
-
-	/* Select the requested generator */
-	*((uint8_t*)&GCLK->GENCTRL.reg) = generator;
-	/* Obtain the enabled status */
-	enabled = (GCLK->GENCTRL.reg & GCLK_GENCTRL_GENEN);
-
-	system_interrupt_leave_critical_section();
-
-	return enabled;
-}
-
-/**
- * \brief Retrieves the clock frequency of a Generic Clock generator.
- *
- * Determines the clock frequency (in Hz) of a specified Generic Clock
- * generator, used as a source to a Generic Clock Channel module.
- *
- * \param[in] generator  Generic Clock Generator index
- *
- * \return The frequency of the generic clock generator, in Hz.
- */
-uint32_t system_gclk_gen_get_hz(
-		const uint8_t generator)
-{
-	while (system_gclk_is_syncing()) {
-		/* Wait for synchronization */
-	};
-
-	system_interrupt_enter_critical_section();
-
-	/* Select the appropriate generator */
-	*((uint8_t*)&GCLK->GENCTRL.reg) = generator;
-	while (system_gclk_is_syncing()) {
-		/* Wait for synchronization */
-	};
-
-	/* Get the frequency of the source connected to the GCLK generator */
-	uint32_t gen_input_hz = system_clock_source_get_hz(
-			(enum system_clock_source)GCLK->GENCTRL.bit.SRC);
-
-	*((uint8_t*)&GCLK->GENCTRL.reg) = generator;
-
-	uint8_t divsel = GCLK->GENCTRL.bit.DIVSEL;
-
-	/* Select the appropriate generator division register */
-	*((uint8_t*)&GCLK->GENDIV.reg) = generator;
-	while (system_gclk_is_syncing()) {
-		/* Wait for synchronization */
-	};
-
-	uint32_t divider = GCLK->GENDIV.bit.DIV;
-
-	system_interrupt_leave_critical_section();
-
-	/* Check if the generator is using fractional or binary division */
-	if (!divsel && divider > 1) {
-		gen_input_hz /= divider;
-	} else if (divsel) {
-		gen_input_hz >>= (divider+1);
-	}
-
-	return gen_input_hz;
-}
-
-/**
- * \brief Writes a Generic Clock configuration to the hardware module.
- *
- * Writes out a given configuration of a Generic Clock configuration to the
- * hardware module. If the clock is currently running, it will be stopped.
- *
- * \note Once called the clock will not be running; to start the clock,
- *       call \ref system_gclk_chan_enable() after configuring a clock channel.
- *
- * \param[in] channel   Generic Clock channel to configure
- * \param[in] config    Configuration settings for the clock
- *
- */
-void system_gclk_chan_set_config(
-		const uint8_t channel,
-		struct system_gclk_chan_config *const config)
-{
-	/* Sanity check arguments */
-	Assert(config);
-
-	/* Cache the new config to reduce sync requirements */
-	uint32_t new_clkctrl_config = (channel << GCLK_CLKCTRL_ID_Pos);
-
-	/* Select the desired generic clock generator */
-	new_clkctrl_config |= config->source_generator << GCLK_CLKCTRL_GEN_Pos;
-
-	/* Disable generic clock channel */
-	system_gclk_chan_disable(channel);
-
-	/* Write the new configuration */
-	GCLK->CLKCTRL.reg = new_clkctrl_config;
-}
-
-/**
- * \brief Enables a Generic Clock that was previously configured.
- *
- * Starts the clock generation of a Generic Clock that was previously
- * configured via a call to \ref system_gclk_chan_set_config().
- *
- * \param[in] channel   Generic Clock channel to enable
- */
-void system_gclk_chan_enable(
-		const uint8_t channel)
-{
-	system_interrupt_enter_critical_section();
-
-	/* Select the requested generator channel */
-	*((uint8_t*)&GCLK->CLKCTRL.reg) = channel;
-
-	/* Enable the generic clock */
-	GCLK->CLKCTRL.reg |= GCLK_CLKCTRL_CLKEN;
-
-	system_interrupt_leave_critical_section();
-}
-
-/**
- * \brief Disables a Generic Clock that was previously enabled.
- *
- * Stops the clock generation of a Generic Clock that was previously started
- * via a call to \ref system_gclk_chan_enable().
- *
- * \param[in] channel  Generic Clock channel to disable
- */
-void system_gclk_chan_disable(
-		const uint8_t channel)
-{
-	system_interrupt_enter_critical_section();
-
-	/* Select the requested generator channel */
-	*((uint8_t*)&GCLK->CLKCTRL.reg) = channel;
-
-	/* Sanity check WRTLOCK */
-	Assert(!GCLK->CLKCTRL.bit.WRTLOCK);
-
-	/* Switch to known-working source so that the channel can be disabled */
-	uint32_t prev_gen_id = GCLK->CLKCTRL.bit.GEN;
-	GCLK->CLKCTRL.bit.GEN = 0;
-
-	/* Disable the generic clock */
-	GCLK->CLKCTRL.reg &= ~GCLK_CLKCTRL_CLKEN;
-	while (GCLK->CLKCTRL.reg & GCLK_CLKCTRL_CLKEN) {
-		/* Wait for clock to become disabled */
-	}
-
-	/* Restore previous configured clock generator */
-	GCLK->CLKCTRL.bit.GEN = prev_gen_id;
-
-	system_interrupt_leave_critical_section();
-}
-
-/**
- * \brief Determins if the specified Generic Clock channel is enabled.
- *
- * \param[in] channel  Generic Clock Channel index
- *
- * \return The enabled status.
- * \retval true The Generic Clock channel is enabled
- * \retval false The Generic Clock channel is disabled
- */
-bool system_gclk_chan_is_enabled(
-		const uint8_t channel)
-{
-	bool enabled;
-
-	system_interrupt_enter_critical_section();
-
-	/* Select the requested generic clock channel */
-	*((uint8_t*)&GCLK->CLKCTRL.reg) = channel;
-	enabled = GCLK->CLKCTRL.bit.CLKEN;
-
-	system_interrupt_leave_critical_section();
-
-	return enabled;
-}
-
-/**
- * \brief Locks a Generic Clock channel from further configuration writes.
- *
- * Locks a generic clock channel from further configuration writes. It is only
- * possible to unlock the channel configuration through a power on reset.
- *
- * \param[in] channel   Generic Clock channel to enable
- */
-void system_gclk_chan_lock(
-		const uint8_t channel)
-{
-	system_interrupt_enter_critical_section();
-
-	/* Select the requested generator channel */
-	*((uint8_t*)&GCLK->CLKCTRL.reg) = channel;
-
-	/* Lock the generic clock */
-	GCLK->CLKCTRL.reg |= GCLK_CLKCTRL_WRTLOCK | GCLK_CLKCTRL_CLKEN;
-
-	system_interrupt_leave_critical_section();
-}
-
-/**
- * \brief Determins if the specified Generic Clock channel is locked.
- *
- * \param[in] channel  Generic Clock Channel index
- *
- * \return The lock status.
- * \retval true The Generic Clock channel is locked
- * \retval false The Generic Clock channel is not locked
- */
-bool system_gclk_chan_is_locked(
-		const uint8_t channel)
-{
-	bool locked;
-
-	system_interrupt_enter_critical_section();
-
-	/* Select the requested generic clock channel */
-	*((uint8_t*)&GCLK->CLKCTRL.reg) = channel;
-	locked = GCLK->CLKCTRL.bit.WRTLOCK;
-
-	system_interrupt_leave_critical_section();
-
-	return locked;
-}
-
-/**
- * \brief Retrieves the clock frequency of a Generic Clock channel.
- *
- * Determines the clock frequency (in Hz) of a specified Generic Clock
- * channel, used as a source to a device peripheral module.
- *
- * \param[in] channel  Generic Clock Channel index
- *
- * \return The frequency of the generic clock channel, in Hz.
- */
-uint32_t system_gclk_chan_get_hz(
-		const uint8_t channel)
-{
-	uint8_t gen_id;
-
-	system_interrupt_enter_critical_section();
-
-	/* Select the requested generic clock channel */
-	*((uint8_t*)&GCLK->CLKCTRL.reg) = channel;
-	gen_id = GCLK->CLKCTRL.bit.GEN;
-
-	system_interrupt_leave_critical_section();
-
-	/* Return the clock speed of the associated GCLK generator */
-	return system_gclk_gen_get_hz(gen_id);
-}
diff --git a/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/module_config/conf_clocks.h b/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/module_config/conf_clocks.h
deleted file mode 100644
index 17357f7cc..000000000
--- a/atmel-samd/asf/sam0/drivers/system/clock/clock_samd21_r21_da/module_config/conf_clocks.h
+++ /dev/null
@@ -1,197 +0,0 @@
-/**
- * \file
- *
- * \brief SAM D21/R21/DA0/DA1 Clock configuration
- *
- * Copyright (C) 2013-2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-#include <clock.h>
-
-#ifndef CONF_CLOCKS_H_INCLUDED
-#  define CONF_CLOCKS_H_INCLUDED
-
-/* System clock bus configuration */
-#  define CONF_CLOCK_FLASH_WAIT_STATES            0
-#  define CONF_CLOCK_CPU_DIVIDER                  SYSTEM_MAIN_CLOCK_DIV_1
-#  define CONF_CLOCK_APBA_DIVIDER                 SYSTEM_MAIN_CLOCK_DIV_1
-#  define CONF_CLOCK_APBB_DIVIDER                 SYSTEM_MAIN_CLOCK_DIV_1
-#  define CONF_CLOCK_APBC_DIVIDER                 SYSTEM_MAIN_CLOCK_DIV_1
-
-/* SYSTEM_CLOCK_SOURCE_OSC8M configuration - Internal 8MHz oscillator */
-#  define CONF_CLOCK_OSC8M_PRESCALER              SYSTEM_OSC8M_DIV_1
-#  define CONF_CLOCK_OSC8M_ON_DEMAND              true
-#  define CONF_CLOCK_OSC8M_RUN_IN_STANDBY         false
-
-/* SYSTEM_CLOCK_SOURCE_XOSC configuration - External clock/oscillator */
-#  define CONF_CLOCK_XOSC_ENABLE                  false
-#  define CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL        SYSTEM_CLOCK_EXTERNAL_CRYSTAL
-#  define CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY      12000000UL
-#  define CONF_CLOCK_XOSC_STARTUP_TIME            SYSTEM_XOSC_STARTUP_32768
-#  define CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL       true
-#  define CONF_CLOCK_XOSC_ON_DEMAND               true
-#  define CONF_CLOCK_XOSC_RUN_IN_STANDBY          false
-
-/* SYSTEM_CLOCK_SOURCE_XOSC32K configuration - External 32KHz crystal/clock oscillator */
-#  define CONF_CLOCK_XOSC32K_ENABLE               false
-#  define CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL     SYSTEM_CLOCK_EXTERNAL_CRYSTAL
-#  define CONF_CLOCK_XOSC32K_STARTUP_TIME         SYSTEM_XOSC32K_STARTUP_65536
-#  define CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL  false
-#  define CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT    false
-#  define CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT  true
-#  define CONF_CLOCK_XOSC32K_ON_DEMAND            true
-#  define CONF_CLOCK_XOSC32K_RUN_IN_STANDBY       false
-
-/* SYSTEM_CLOCK_SOURCE_OSC32K configuration - Internal 32KHz oscillator */
-#  define CONF_CLOCK_OSC32K_ENABLE                false
-#  define CONF_CLOCK_OSC32K_STARTUP_TIME          SYSTEM_OSC32K_STARTUP_130
-#  define CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT    true
-#  define CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT   true
-#  define CONF_CLOCK_OSC32K_ON_DEMAND             true
-#  define CONF_CLOCK_OSC32K_RUN_IN_STANDBY        false
-
-/* SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop */
-#  define CONF_CLOCK_DFLL_ENABLE                  false
-#  define CONF_CLOCK_DFLL_LOOP_MODE               SYSTEM_CLOCK_DFLL_LOOP_MODE_OPEN
-#  define CONF_CLOCK_DFLL_ON_DEMAND               false
-
-/* DFLL open loop mode configuration */
-#  define CONF_CLOCK_DFLL_FINE_VALUE              (512)
-
-/* DFLL closed loop mode configuration */
-#  define CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR   GCLK_GENERATOR_1
-#  define CONF_CLOCK_DFLL_MULTIPLY_FACTOR         1465 //(48000000 / 32768)
-#  define CONF_CLOCK_DFLL_QUICK_LOCK              true
-#  define CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK   true
-#  define CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP     true
-#  define CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE      true
-#  define CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE    (0x1f / 4)
-#  define CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE      (0xff / 4)
-
-/* SYSTEM_CLOCK_SOURCE_DPLL configuration - Digital Phase-Locked Loop */
-#  define CONF_CLOCK_DPLL_ENABLE                  false
-#  define CONF_CLOCK_DPLL_ON_DEMAND               true
-#  define CONF_CLOCK_DPLL_RUN_IN_STANDBY          false
-#  define CONF_CLOCK_DPLL_LOCK_BYPASS             false
-#  define CONF_CLOCK_DPLL_WAKE_UP_FAST            false
-#  define CONF_CLOCK_DPLL_LOW_POWER_ENABLE        false
-
-#  define CONF_CLOCK_DPLL_LOCK_TIME               SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_DEFAULT
-#  define CONF_CLOCK_DPLL_REFERENCE_CLOCK         SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC32K
-#  define CONF_CLOCK_DPLL_FILTER                  SYSTEM_CLOCK_SOURCE_DPLL_FILTER_DEFAULT
-
-#  define CONF_CLOCK_DPLL_REFERENCE_FREQUENCY     32768
-#  define CONF_CLOCK_DPLL_REFERENCE_DIVIDER       1
-#  define CONF_CLOCK_DPLL_OUTPUT_FREQUENCY        48000000
-
-/* DPLL GCLK reference configuration */
-#  define CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR  GCLK_GENERATOR_1
-/* DPLL GCLK lock timer configuration */
-#  define CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR     GCLK_GENERATOR_1
-
-/* Set this to true to configure the GCLK when running clocks_init. If set to
- * false, none of the GCLK generators will be configured in clocks_init(). */
-#  define CONF_CLOCK_CONFIGURE_GCLK               true
-
-/* Configure GCLK generator 0 (Main Clock) */
-#  define CONF_CLOCK_GCLK_0_ENABLE                true
-#  define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY        false
-#  define CONF_CLOCK_GCLK_0_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC8M
-#  define CONF_CLOCK_GCLK_0_PRESCALER             1
-#  define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE         false
-
-/* Configure GCLK generator 1 */
-#  define CONF_CLOCK_GCLK_1_ENABLE                false
-#  define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY        false
-#  define CONF_CLOCK_GCLK_1_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_XOSC32K
-#  define CONF_CLOCK_GCLK_1_PRESCALER             1
-#  define CONF_CLOCK_GCLK_1_OUTPUT_ENABLE         false
-
-/* Configure GCLK generator 2 (RTC) */
-#  define CONF_CLOCK_GCLK_2_ENABLE                false
-#  define CONF_CLOCK_GCLK_2_RUN_IN_STANDBY        false
-#  define CONF_CLOCK_GCLK_2_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC32K
-#  define CONF_CLOCK_GCLK_2_PRESCALER             32
-#  define CONF_CLOCK_GCLK_2_OUTPUT_ENABLE         false
-
-/* Configure GCLK generator 3 */
-#  define CONF_CLOCK_GCLK_3_ENABLE                false
-#  define CONF_CLOCK_GCLK_3_RUN_IN_STANDBY        false
-#  define CONF_CLOCK_GCLK_3_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC8M
-#  define CONF_CLOCK_GCLK_3_PRESCALER             1
-#  define CONF_CLOCK_GCLK_3_OUTPUT_ENABLE         false
-
-/* Configure GCLK generator 4 */
-#  define CONF_CLOCK_GCLK_4_ENABLE                false
-#  define CONF_CLOCK_GCLK_4_RUN_IN_STANDBY        false
-#  define CONF_CLOCK_GCLK_4_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC8M
-#  define CONF_CLOCK_GCLK_4_PRESCALER             1
-#  define CONF_CLOCK_GCLK_4_OUTPUT_ENABLE         false
-
-/* Configure GCLK generator 5 */
-#  define CONF_CLOCK_GCLK_5_ENABLE                false
-#  define CONF_CLOCK_GCLK_5_RUN_IN_STANDBY        false
-#  define CONF_CLOCK_GCLK_5_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC8M
-#  define CONF_CLOCK_GCLK_5_PRESCALER             1
-#  define CONF_CLOCK_GCLK_5_OUTPUT_ENABLE         false
-
-/* Configure GCLK generator 6 */
-#  define CONF_CLOCK_GCLK_6_ENABLE                false
-#  define CONF_CLOCK_GCLK_6_RUN_IN_STANDBY        false
-#  define CONF_CLOCK_GCLK_6_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC8M
-#  define CONF_CLOCK_GCLK_6_PRESCALER             1
-#  define CONF_CLOCK_GCLK_6_OUTPUT_ENABLE         false
-
-/* Configure GCLK generator 7 */
-#  define CONF_CLOCK_GCLK_7_ENABLE                false
-#  define CONF_CLOCK_GCLK_7_RUN_IN_STANDBY        false
-#  define CONF_CLOCK_GCLK_7_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC8M
-#  define CONF_CLOCK_GCLK_7_PRESCALER             1
-#  define CONF_CLOCK_GCLK_7_OUTPUT_ENABLE         false
-
-/* Configure GCLK generator 8 */
-#  define CONF_CLOCK_GCLK_8_ENABLE                false
-#  define CONF_CLOCK_GCLK_8_RUN_IN_STANDBY        false
-#  define CONF_CLOCK_GCLK_8_CLOCK_SOURCE          SYSTEM_CLOCK_SOURCE_OSC8M
-#  define CONF_CLOCK_GCLK_8_PRESCALER             1
-#  define CONF_CLOCK_GCLK_8_OUTPUT_ENABLE         false
-
-#endif /* CONF_CLOCKS_H_INCLUDED */
-
diff --git a/atmel-samd/asf/sam0/drivers/system/clock/gclk.h b/atmel-samd/asf/sam0/drivers/system/clock/gclk.h
deleted file mode 100644
index ff26eac9e..000000000
--- a/atmel-samd/asf/sam0/drivers/system/clock/gclk.h
+++ /dev/null
@@ -1,307 +0,0 @@
-/**
- * \file
- *
- * \brief SAM Generic Clock Driver
- *
- * Copyright (C) 2012-2016 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-#ifndef SYSTEM_CLOCK_GCLK_H_INCLUDED
-#define SYSTEM_CLOCK_GCLK_H_INCLUDED
-
-/**
- * \addtogroup asfdoc_sam0_system_clock_group
- *
- * @{
- */
-
-#include <compiler.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * \brief List of available GCLK generators.
- *
- * List of Available GCLK generators. This enum is used in the peripheral
- * device drivers to select the GCLK generator to be used for its operation.
- *
- * The number of GCLK generators available is device dependent.
- */
-enum gclk_generator {
-	/** GCLK generator channel 0 */
-	GCLK_GENERATOR_0,
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 0)
-	/** GCLK generator channel 1 */
-	GCLK_GENERATOR_1,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 1)
-	/** GCLK generator channel 2 */
-	GCLK_GENERATOR_2,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 2)
-	/** GCLK generator channel 3 */
-	GCLK_GENERATOR_3,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 3)
-	/** GCLK generator channel 4 */
-	GCLK_GENERATOR_4,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 4)
-	/** GCLK generator channel 5 */
-	GCLK_GENERATOR_5,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 5)
-	/** GCLK generator channel 6 */
-	GCLK_GENERATOR_6,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 6)
-	/** GCLK generator channel 7 */
-	GCLK_GENERATOR_7,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 7)
-	/** GCLK generator channel 8 */
-	GCLK_GENERATOR_8,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 8)
-	/** GCLK generator channel 9 */
-	GCLK_GENERATOR_9,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 9)
-	/** GCLK generator channel 10 */
-	GCLK_GENERATOR_10,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 10)
-	/** GCLK generator channel 11 */
-	GCLK_GENERATOR_11,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 11)
-	/** GCLK generator channel 12 */
-	GCLK_GENERATOR_12,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 12)
-	/** GCLK generator channel 13 */
-	GCLK_GENERATOR_13,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 13)
-	/** GCLK generator channel 14 */
-	GCLK_GENERATOR_14,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 14)
-	/** GCLK generator channel 15 */
-	GCLK_GENERATOR_15,
-#endif
-#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 15)
-	/** GCLK generator channel 16 */
-	GCLK_GENERATOR_16,
-#endif
-};
-
-/**
- * \brief Generic Clock Generator configuration structure.
- *
- * Configuration structure for a Generic Clock Generator channel. This
- * structure should be initialized by the
- * \ref system_gclk_gen_get_config_defaults() function before being modified by
- * the user application.
- */
-struct system_gclk_gen_config {
-	/** Source clock input channel index, see the \ref system_clock_source */
-	uint8_t source_clock;
-	/** If \c true, the generator output level is high when disabled */
-	bool high_when_disabled;
-	/** Integer division factor of the clock output compared to the input */
-	uint32_t division_factor;
-	/** If \c true, the clock is kept enabled during device standby mode */
-	bool run_in_standby;
-	/** If \c true, enables GCLK generator clock output to a GPIO pin */
-	bool output_enable;
-};
-
-/**
- * \brief Generic Clock configuration structure.
- *
- * Configuration structure for a Generic Clock channel. This structure
- * should be initialized by the \ref system_gclk_chan_get_config_defaults()
- * function before being modified by the user application.
- */
-struct system_gclk_chan_config {
-	/** Generic Clock Generator source channel */
-	enum gclk_generator source_generator;
-};
-
-/** \name Generic Clock Management
- * @{
- */
-void system_gclk_init(void);
-
-/** @} */
-
-
-/**
- * \name Generic Clock Management (Generators)
- * @{
- */
-
-/**
- * \brief Initializes a Generic Clock Generator configuration structure to defaults.
- *
- * Initializes a given Generic Clock Generator configuration structure to
- * a set of known default values. This function should be called on all
- * new instances of these configuration structures before being modified
- * by the user application.
- *
- * The default configuration is:
- *  \li The clock is generated undivided from the source frequency
- *  \li The clock generator output is low when the generator is disabled
- *  \li The input clock is sourced from input clock channel 0
- *  \li The clock will be disabled during sleep
- *  \li The clock output will not be routed to a physical GPIO pin
- *
- * \param[out] config  Configuration structure to initialize to default values
- */
-static inline void system_gclk_gen_get_config_defaults(
-		struct system_gclk_gen_config *const config)
-{
-	/* Sanity check arguments */
-	Assert(config);
-
-	/* Default configuration values */
-	config->division_factor    = 1;
-	config->high_when_disabled = false;
-#if SAML21 || SAML22  || SAMR30
-	config->source_clock       = GCLK_SOURCE_OSC16M;
-#elif (SAMC20) || (SAMC21)
-	config->source_clock       = GCLK_SOURCE_OSC48M;
-#else
-	config->source_clock       = GCLK_SOURCE_OSC8M;
-#endif
-	config->run_in_standby     = false;
-	config->output_enable      = false;
-}
-
-void system_gclk_gen_set_config(
-		const uint8_t generator,
-		struct system_gclk_gen_config *const config);
-
-void system_gclk_gen_enable(
-		const uint8_t generator);
-
-void system_gclk_gen_disable(
-		const uint8_t generator);
-
-bool system_gclk_gen_is_enabled(
-		const uint8_t generator);
-
-/** @} */
-
-
-/**
- * \name Generic Clock Management (Channels)
- * @{
- */
-
-/**
- * \brief Initializes a Generic Clock configuration structure to defaults.
- *
- * Initializes a given Generic Clock configuration structure to a set of
- * known default values. This function should be called on all new
- * instances of these configuration structures before being modified by the
- * user application.
- *
- * The default configuration is as follows:
- *  \li The clock is sourced from the Generic Clock Generator channel 0
- *  \li The clock configuration will not be write-locked when set
- *
- * \param[out] config  Configuration structure to initialize to default values
- */
-static inline void system_gclk_chan_get_config_defaults(
-		struct system_gclk_chan_config *const config)
-{
-	/* Sanity check arguments */
-	Assert(config);
-
-	/* Default configuration values */
-	config->source_generator = GCLK_GENERATOR_0;
-}
-
-void system_gclk_chan_set_config(
-		const uint8_t channel,
-		struct system_gclk_chan_config *const config);
-
-void system_gclk_chan_enable(
-		const uint8_t channel);
-
-void system_gclk_chan_disable(
-		const uint8_t channel);
-
-bool system_gclk_chan_is_enabled(
-		const uint8_t channel);
-
-void system_gclk_chan_lock(
-		const uint8_t channel);
-
-bool system_gclk_chan_is_locked(
-		const uint8_t channel);
-
-/** @} */
-
-
-/**
- * \name Generic Clock Frequency Retrieval
- * @{
- */
-
-uint32_t system_gclk_gen_get_hz(
-		const uint8_t generator);
-
-uint32_t system_gclk_chan_get_hz(
-		const uint8_t channel);
-
-/** @} */
-
-#ifdef __cplusplus
-}
-#endif
-
-/** @} */
-
-#endif
diff --git a/atmel-samd/asf/sam0/drivers/system/docimg/performance_level_transition.svg b/atmel-samd/asf/sam0/drivers/system/docimg/performance_level_transition.svg
deleted file mode 100644
index e0c86a627..000000000
--- a/atmel-samd/asf/sam0/drivers/system/docimg/performance_level_transition.svg
+++ /dev/null
@@ -1,1006 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<!-- Created with Inkscape (http://www.inkscape.org/) -->
-
-<svg
-   xmlns:dc="http://purl.org/dc/elements/1.1/"
-   xmlns:cc="http://creativecommons.org/ns#"
-   xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
-   xmlns:svg="http://www.w3.org/2000/svg"
-   xmlns="http://www.w3.org/2000/svg"
-   xmlns:xlink="http://www.w3.org/1999/xlink"
-   xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
-   xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
-   id="svg2985"
-   version="1.1"
-   inkscape:version="0.48.4 r9939"
-   width="662"
-   height="650"
-   sodipodi:docname="performance_level_transition.png">
-  <metadata
-     id="metadata2991">
-    <rdf:RDF>
-      <cc:Work
-         rdf:about="">
-        <dc:format>image/svg+xml</dc:format>
-        <dc:type
-           rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
-        <dc:title></dc:title>
-      </cc:Work>
-    </rdf:RDF>
-  </metadata>
-  <defs
-     id="defs2989" />
-  <sodipodi:namedview
-     pagecolor="#ffffff"
-     bordercolor="#666666"
-     borderopacity="1"
-     objecttolerance="10"
-     gridtolerance="10"
-     guidetolerance="10"
-     inkscape:pageopacity="0"
-     inkscape:pageshadow="2"
-     inkscape:window-width="971"
-     inkscape:window-height="1060"
-     id="namedview2987"
-     showgrid="false"
-     inkscape:zoom="0.36307692"
-     inkscape:cx="331"
-     inkscape:cy="325"
-     inkscape:window-x="0"
-     inkscape:window-y="100"
-     inkscape:window-maximized="0"
-     inkscape:current-layer="svg2985" />
-  <image
-     width="662"
-     height="650"
-     xlink:href="data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAApYAAAKKCAYAAACH5hvqAAAABHNCSVQICAgIfAhkiAAAIABJREFU
-eJzs3Xd8lfX5//HXffZJTvbem4QQAmFDmLJE0Kpg66LWUa2jtfXXinW1jq+2to5Wra1WLC1OBBcq
-iqAoQ/YIBMgAkpBA9h5n3r8/gBggCevAScL1fDziA845932u+0ju874/1/25b0VVVZVewuVyYbPZ
-aGxspLW1lUOHDlFVVUVlZSUVFRXU1tbidDqpr69n3bp1KIqC0WhEURQAjEYjWq222/dwOBzYbLb2
-v7e0tKCqKgMHDiQ2Nhaz2YxWqyUuLg4/Pz8iIiIICQnBYrFgNpvx8vJCo9Gc189BCCGEEKInUnpy
-sFRVlaamJsrLy9m7dy+5ubkcOnSIiooKAgICqKmpQVEUgoODsVgsBAQEkJmZiZeXF/7+/hgMBnx9
-fdvDpI+PDwaDodv3tFqtNDU1tf+9srISVVVpbGykvr6e4uJiioqKqKura3+dj48PFRUVBAYGEhkZ
-yeDBg4mJiSE2NpaAgIDz9wEJIYQQQvQgPS5YulwuysvLycnJYdmyZaxfv57m5mays7OJiIggIiKC
-+Ph4wsPD8fPzax8lNBgMpxyNdBen00lbWxs2m43W1lYaGhooLi6mvLycwsJCCgsLycvLQ6vVkpmZ
-yeWXX86QIUOIiIi4IPUJIYQQQniCx4Ol3W6noqKCwsJC1q5dy/bt29mzZw8+Pj7cfPPNDBkyhISE
-BHx8fNpb2j2dqqq0tLSQl5dHbm4uH3/8Mfn5+YSGhjJ27FiGDRvGgAEDCA4Oxmw2e7pcIYQQQgi3
-8FiwrK2tZevWraxevZqcnByMRiPBwcFMnz6dfv36ER0djdFo9ERpbudwOCgpKSE3N5cNGzaQm5uL
-yWQiODiYadOmMWLECAIDA3tNcBZCCCGE6MwFD5aVlZWsXLmSF198EZPJRHZ2NtnZ2aSlpRESEtLn
-R/A6jtCuW7eO9evX09bWxhVXXMHVV19NaGiop0sUQgghhDgrFyRYNjc3U1BQwKeffsqKFSsICQnh
-lltuYfTo0Vgslot6pK6trY2NGzfy6quvsnfvXmbOnMnMmTNJT0/Hy8vL0+UJIYQQQpy28x4sd+3a
-xaJFi9iwYQOpqalcddVVZGVl4ePjcz7fttexWq1s3bqVTz75hPz8fJKTk7nuuuvo378/Op3O0+UJ
-IYQQQpzSeQuWLS0tfPHFFzz77LMMGzaMq6++WgLlKaiqSmtrKwUFBSxcuJDPPvuM2267jdtvv11G
-L4UQQgjR47k9WDqdTjZs2MCzzz6L0+nk4YcfJisrSy4afoYcDgc5OTk888wzNDQ0MG/ePEaMGIHJ
-ZPJ0aUIIIYQQnXJrsLRarSxdupQXX3yRGTNmMHfuXCIjI921+otSbW0tb7zxBsuXL2fmzJnceuut
-fX6CkxBCCCF6J7cFy5aWFl566SWWLFnCH//4RyZMmCAByE2sVivfffcdTz75JFdffTW33HILFovF
-02UJIYQQQhzHLcGyra2NJ554gl27dvHEE08wcODAs15XS1URubuLae3sSaMPUVGxxEQGoj86kdxl
-b6GoYA8Hq5q7XKfBHELKgBQCzcfuzOOktbGBQyX7KK1uAcASkURSRBAWbyM/NO2tFOdsp6jO2nXB
-umAGDk3B0FDG3oISmuyubrbOTERSPxIjfNGcxUT4AwcO8MQTT+Dn58cDDzwglyYSQgghRM+inqO2
-tjZ1wYIF6vTp09Vt27apLpfrnNa3871H1VSNoipKJz/+MeqYy+aqr3y1W212HHl9a8Uu9f4fD+78
-9Ud/ItKuVT/JazyygLNNLdqyVH3s17eo2f1D218TPXKmevuDL6hf51Wo7VvgKlGfnJKgarpZtxI4
-R11RWq3uXPykOjTc3G0ditJPvfvFb9VWx9l/Rvv371fnzp2rPv3006rVaj2nz1oIIYQQwp3O+To2
-Gzdu5N133+Xxxx8nMzPTLdekVE39ue2h33HNiGh+WJuLxvLdfPTCc/z1MR+S4p9mSpLv0QVULONu
-5Y0Hr8FPe/IkIaN3OP2jj7TlGw/n8M8nHmF+aRTzfv8qf4zwBqByzypeffPf3La7jqVvPEian/7o
-ug0kj7uZ+++9hjjfTj4ufRhZQb4Yxt3Ay++OodHmBMC6fwV3/P5/pN8wj19d3p8jU268iElLx3A2
-w5VHxcbGctddd/Hwww8zatQoJk6ceNbrEkIIIYRwp3MKlmVlZbz22mtcddVVDB8+3H0XOtf6kTRo
-FJOnpHF8TJzK9MxABk1+gneX3cDIO8dgOPqMPjSJCZMmE2zQnry+DorXfMT7OcH84d8vcMf4pB9a
-0pPHMzojlp/e8TILv7uBx2Ylc2RNGnxDkxg17hIGhBi6XnFIPCND4o/+RaUl5zBmoxcRqcOYMHk0
-Pm76aDQaDaNGjeK+++7jt7/9LUuXLiU8PNw9KxdCCCGEOAfndA2gjRs3oigKs2bNukB3z1HQm7ww
-O13Y22y4zvj0UBW7tQ273oDZbOS4khUDMVnT+OX/+xnJATo8cgP1MzBlyhRSUlJYtGgRTqfT0+UI
-IYQQQpxbsPzmm28YMWIEISEh7qqnGw5qSrbwv+deo9o/iTEjU7BozzTMKkRkjibLuJen5/2J97/d
-RGm9rf1ZrV8c19z+a36WHX9uQ7kXgMFgYO7cuaxatYra2lpPlyOEEEIIcfbB0mq1snLlSiZMmIBW
-2337+Yw1fc9DVw7EZDBgaP/xJnbQTJ5a1cKdTz3NjdlRx4W/msUPE+Ft6vD6H36G/HIRFUcna4dl
-XMYzzz/MMMMWHpo7k6Rgb4JGXsHjz/yN91du5mBNywmjla1sWfwogyO9O1m3P8N//ToN1u5mgp8/
-gwYNwt/fn6KiIo+8vxBCCCFER2c9MFdZWYnZbCYsLMyd9RxhiGLCVZczOjkIRbVRsz+HTz7ZSNI1
-9/Lg7dcyYUgchhMGK81p47nzytF4dTJ5J2xEf7yPvV5jInnijfwjdQK7tq5mxaot7C87xIq3nuOp
-5/7OpB/dywtP/4LUwGPnU+oISxvHFTNGE+J1YoDWEz5yMEbdhTgN4GTe3t4YjUbKysoYOnSoR2oQ
-QgghhDimZ3Z8DTFMu/FX/PayVDQ4aak5SGbQPfx19Tb2/2QOkzk5yJkHTOP3f/wtQfqTR09PPv9T
-i19EPGMi4hkz7RrqGhqoLsvnu8/e5el//J0/jRnLP28aghEAPVEDpvLLB35LerD+xDVzQU4t7YJG
-o8HhcNDa2ulVP4UQQgghLqizboVrNBpUVT2vE0cURUFRdHgHxXPtb3/PrNAd/ObuB1le1NDVEkeX
-Of6nnXqYZ64YyaW3vcaBhqN164z4B4aQlDGGm+69j3nZoWx8cxVFrSdP3zl53e7f5jOhqio6nU7u
-Hy6EEEKIHuGsg6Wfnx9eXl5UVVW5s56u3y8qi1vuuInMpu/4+2tfU249i3nbij/9hkRRsHsdW/dX
-njTz295Qw/7aZiwJ4XR2ycqeprn5yN2GEhMTPVyJEEIIIcQ5BEtvb2+GDBnC5s2bUd1zu/Huab1I
-v+QqbpyWxvrFL7JocxlnPlZqYtisa0htWcW8ex/no3W7qbcfqb3p4FYWvvAi765RuHz2KEL1Hh6O
-PA179uyhpqZGbu0ohBBCiB7hnC43NHHiRD799FOKi4vdVU+3tH4p3PqHh8hu2ct/nl3AttKm9udq
-ljxMpI8XRqPx5J/gfvzitY00qRA95CpeeO4Rhhm3cv+1k4iwmDAajURk/oi/fnqYK//vr/zykrgO
-H0wrW5Y8SlaUT+frNoZx5zs7udDzwq1WK++99x4TJ06UYCmEEEKIHuGcGr6jRo3io48+YunSpdx1
-111uuUh6SP9x/OK3kQxNCe5kio6CKXYcDz1/Px/t88Zms6H1D2bSVbeiSznc9UpNAQwbHHHkLj0a
-EymT5vJK2kR2blnNyrW7aQP8okZy6cyRpESFYm6f5e1D9vV388DI7q4TaWZYeshJtepDM7jzl3cS
-OzT66CQg93G5XCxdupSDBw/y6KOPunntQgghhBBnR1HPoY/tcrn48ssvefzxx1mwYAEpKSnurK1b
-KhwX5rrdDEXpJKS2L3hkXd2E4u4/ogs/iWfXrl3ceeed/O53v+Pyyy+/sG8uhBBCCNGFc2qFazQa
-pk+fzl133cXNN9/M6tWrcTgc7qqtWydmuc5mg7f/dLsi5ZQjrd2u+wKHytzcXB577DFmzZrF9OnT
-L+ybCyGEEEJ045yCJRwJXddeey2zZ8/m6aefZt26de6oS5zA5XJRUFDA448/TmpqKrfeeisGg+HU
-CwohhBBCXCDnHCwBdDodt912G5MnT+bBBx9k1apV7litOMrlcrFhwwbuvfdeEhMTue+++wgKCvJ0
-WUIIIYQQxzmncyxPZLfbWbVqFY8//jiXXnop1157rVxj8Ry4XC5qampYtGgRb731FjfddBM//elP
-ZaRSCCGEED2SW4PlMevWreO1116jvr6eO+64g7Fjx+Ll5eXut+nTrFYrq1ev5s0338RqtXL77bcz
-ZswY9PoTbysphBBCCNEznJdg6XK5qKysZOnSpSxYsICBAwdy++23k5mZ6ZZLEvV1JSUlvPLKK6xb
-t45p06Yxd+5coqKi5LMTQgghRI92XoLlMaqqcujQIV555RU+/PBDJk+ezOzZs0lPT5dzBDtwuVw0
-NTWxd+9ePv74Y1atWsXkyZO56aabiI2NRaNxy6mw50xVVdra2qioqKCoqIi0tDS5OHuPYaN89y72
-1bW1P6IxeBEem0h0kAXV1sD+ohoCY6IJ8jp51NvZ1khZaQllFfWoipmo5CTCAy3oNdBcWUJBQSkt
-HV6vaHzoNyidQJMGVDu1h8s4WHaYJpuK0SuU2MQIAi1mNMcdC6nYGsrZXVBMi/XYfbMUzP7RJCaG
-42NQKC8qpNUUSVy45YQTwF3YWho4tG8fZY1WMPoSFRNLdIgPGmxU5e0mv7qF41mITU0m3NvBgaJK
-fCKiCfWR00h6ourqalauXElmZiZRUVF4e3vLgbQQvdR5DZbH2O129uzZw7///W+Ki4sJCAhgxowZ
-jBw5ksjISHS6XnBj7vOktLSUb7/9llWrVlFeXk56ejpXXXUVWVlZaLVaT5cHgNPppLS0lA0bNrBu
-3Tq2bt1KTU0Nr7/+OkOHDvV0eQLAVcK/rp7Fq7oxTOsXgKK6aGurp04/iDt/eR0p1k3c88ASLn/0
-D/wk8/iDAWdjEZ/88z122Gw0NzTharbiDIlg/OU3MHNwKLsWPsH9z64hefJQ/E1H/k1qdXFce++t
-DPC3svvbxcxfUYxZbcTm0kCzBldcIrPnzGFknF/Hd6L021e4/NcfMWLacAI1oKo2ag/DgKlXcuOV
-Gbz54C/Y2+83PH3nSCwdcoW1bj9L3lrEjvxKFLOWFrRYbEbG3nYPU/u18c4NV/DntmHM7B/Y4fJi
-0Uy78RqGWvL4f/P+y8h7H+HWUdHn8/+COEs7duwgKyuLQYMGMWbMGIYNG0Z2djbx8fFy+o8QvcwF
-SXR6vZ6BAwfy5z//mQMHDrB27VqWLFnCX//6V6ZMmcL1119PcnIyRqO771HTMzkcDgoKCvjggw9Y
-unQpZrOZGTNmcM8995CUlITZbPZ0iQA0NzezZcsW3nrrLbZs2UJRURHl5eUAZGZmerg6cSKNzsDw
-G/8fT/woCS0qbRU7+cuv/8Zn60Zz7xCO3FXgRM4mcj5dyOIibx56+A4SQy0oLdV89vrTLHr7IwYn
-3gQYiMiawe8evof4gGMjfgqKolK/52se+9tqpsz7PT/OisJi0NFyeAevPv0s8z9LYPidl5x06Qlt
-QDb3PfEHUnSAamf3sn/y5KLPGZmdCJ0e56pU5X3HJ6sKuOEPT3JZ/2BsrYdZ/qdf88JrGxj650xA
-YfD19/HEnBR+OBw7cp3ZxuK8zrdd9CiqqrJ161a2bt1KQEAACQkJJCcnc9tttzF06FACAgJkFFOI
-XuCCDhWaTCbS0tJITU3luuuuY8+ePXzxxRfceuut+Pn5MWbMGEaNGkVycjJBQUH4+Pj0mFG7s+V0
-OmlpaaGyspK8vDw2b95Mbm4ueXl5TJo0iRdffJG0tDRMJpNHW94d29zbt29n48aN/OMf/6CpqQm7
-3X6Kuw+JnuTYTQE0Gi16gwZbN6+1VhXy1gfFDPnZb0kL9z3yoCWYqTc/xMg2HSG+Bup+WPPxX+zO
-BrYt+4r69IlcPzIBr6P/fC2Rg/j1c6/j0Oi6vp5Z+80FNGh1ejQaBVXp+t+YgoJSf5hdW3eSETiY
-QN8gZjz6JlNdWgyawx1We4obIoheoba2ltraWrZu3coHH3yARqPh9ttvZ9y4cdIuF6KH80gPWlEU
-zGYzWVlZZGVlcfPNN7N9+3bWrFnDggULMBqNmEwm4uLiyMrKIi4ujoiICPz8/E69cg9TVZXW1lYq
-KirIz89n165d5Ofn09TURGNjIzExMdx2222kpqYSGhrq8dMAjrW5169fz/fff8+WLVtYtWrVKYNk
-RUUF//nPf1i+fPkFqlR0Z8olqah2G1uX/Itn9gShqCqO1kYOJo3gtuwEaK3qZCmV1qYqDjl0DIny
-7fC4gpdvEF6+gOoA7JTnrOWVv7URaNYCZvpd8iOu6q+wfUcTmeNSMGsAtZEdS97ls/wj76XrN4l7
-rh6J6YR3ddZt5NVn/kTw0VZ4ZaWTsZMuIzXEm42d5gSF0PQpXHdlIe8seomNi7wJSYgiafQUbpgx
-gXAdoLrY+eGrPFMY3B4sTQlZ/PiySfh08ZkVFRXx9ttvn+YnLM6nw4cPd7rPUVUVu90OwIsvvshL
-L73E4MGD29vlY8aMISEhQdrlQvQgPeLkxrCwMKZNm8Yll1xCdXU1FRUV5ObmsnPnTt577z327t2L
-Xq8nPT2d8ePHk5iYSHx8PAEBAR4PZnAkZJWXl7Nv3z7Wr1/P+vXraWxsJDU1lZSUFEaOHElmZibh
-4eEEBAT0iJa/3W5n8+bNLFiw4KQ29+k4fPgwL730kowY9BCmv96Hl6IQnDCAwVkRaAC9VyDx/VKJ
-C7HQuK+zpRS0OiO6U14XVYM5MIoBAwcR7qMH9ISF+oDSjFY5MvnsCD1Bif3JstRwYNXb/OUjL26+
-aiSmE/6JKIYQ0rOyiNIcqcESlUZGUgQ+htYuK9BZwrn0Z79l5BWHyduSw66CTaz4x6PkHnqKZ+5M
-ARQC49MZnBXVPkqqD47BW991x6OwsJCHHnpIRuN7gNP9f9BVu/yuu+5ixIgRPeY0IiEuZp5PZR3o
-dDrCwsIICwsjIyODOXPm4HQ622dMFxQUsH79el5++WVaW1uxWq1cdtllmM1mvLy8iIuLw9vbuz28
-hYSEAGA0Gjs9ojUajSiKgs1m6/DlSPsR8rHHGxsbaWpqoq6ujvr6esrLy9tbNdu2baOpqQmj0ciA
-AQMYO3YsV1xxBYmJifj5+aHT6dBoND0ugOl0OuLj45k2bRq5ubn4+fnR2NhIS8uJM2s75+XlRVJS
-Et7e3ue5UnE6IiLCadDqiMkay7TpyRwfp7r+0vbyDSPNq5XduYdwZYYdDWUqVbu+4d2vCphw/U8A
-Lb5RqYy/ZBoJgR1CqFNLRrovK/LzaLSPwFdvIiormyha2VG9Dq+KzhvhGq94xk6dTr8T9j6qs6tg
-qVJXVkS13YfYmGSyZyUzxnU5c0ZG86Pffk7hNQmgKEQOHsu06f04MUo2drFWX19fRo4cKcGyB2hp
-aWHHjh2n/XpfX19CQkKIiYlh9uzZpKamSqgUoofoUcGyI0VR0Gq1aLVaAgMDGT16NKNHj+bGG2+k
-ra2NqqoqampqKC0tZf/+/RQVFVFQUEBLSwvNzc1otVoSEhKAIxcbr62tPek9AgMDAWhoaMDhcLQ/
-3tTUREBAAAEBAWg0Gurq6qiqqsJisWA2m7FYLAQEBHDZZZcxd+5cgoODCQoK6lXn/CiKQnh4OFdd
-dRXTp0+noKCAr776is2bN7Np0yby8vK6XT45OVlmhfcginqQ1xa/e8bLaf2iufqaDJ5cuJjVgyMY
-0S8Upa6IpR+9wzdVA5mm1eLoemGG/XgO/Z54i2c/TuPOqQMJ9dFRkbeRZav2ERYwwD07GNVF3tcL
-+fPnNn7++zu5dEAEiqOZ0rIKojIHEeqjJf8sVjts2DDWrFnjjgrFOTo2K7y7kK/T6UhLSyMjI4MJ
-EyaQnZ1NUlKS3HxDiB6mxwbLrhw7PzMmJoaYmBgGDRoEHDlXsK2tDZvNhtVqxWaz0dp6ZASkvr6e
-mpqak9ZVWVmJVqvF39//uIkzO3fu5K233uKuu+5i3LhxeHl5odfr20c+TSZTj2jBu4uXlxeZmZlk
-ZGRQW1vLvn372Lp1KytWrOC9997rcjlFUXpNkO7zTmfQrWE9T999PQuOXsvRYMrg/peeYNTE67in
-aSnvvnQ/TxRUoHP4MGjWTH591ywS/I3s7HKFCt4xI7j/9wYWfbyCx371Jw6Ut+Ltlcrw6dfw1CUT
-sCg2Dnz7Dn/+wMUjf5176hqtB/n45d+Qt9T/6MhjOFf85gFuuvRablKWsfKpe/h7bSsYIhk2eiT3
-PTiLGO8mUJ2sfOrnzHrDu8PknXBm3TuPuf2Bxi28cN9PWex/5IxPRUlm3r/+wvhoz5+WIuh2PxIQ
-EMDkyZOZOnUqI0eOJCoqiqCgINn3CNFDXZDrWPZUxzb9xB2UzWZj8eLFzJ8/n0cffZQxY8b0+tnp
-Z+rYSfOHDh1i48aNvPTSS5SVlVFaWkpLSwuZmZnMnz9fRix7DBWn1YpTZ8SgPfkLV1Vd2G02nK6O
-v+4aDCYjWgVQXdjan1fQGQzotBoUwOV04HCCXq+jq+9yl9OB3W7HpYKiaNEb9GiPXh1ddTqwOsBo
-1IHLgdV+5M+drcpha8Pu7FjjkVr0Wg2qy4ndbv+hRr0BnU6DcnTbba4Td2VHl9XQYdt+eM5gMtHJ
-RyU8YMeOHQwePBhVVfH19SU8PJz+/ftz3XXXMXr0aCIiItDpdBImhegF+s6w21noaidlMBi4+uqr
-URSFZ555hl//+tdMmDChT41SnoqiKBgMBuLi4oiLi2PmzJnk5+ezfPlytmzZgs1mk518j6KgNZpO
-Or+w/VlFg8F44vzsji/o+nmNVofhFMdVGq0Oo7bz3w9Fq8N0bHmNDlM3g4Q6g6nLnZKi0WIwdlbI
-kW3v7gy7brddeJxOpyMjI4MBAwYwceJExowZQ3Jyspw3KUQvdFGPWJ6K3W7nf//7H0uWLGHevHmM
-HTv2og9TLpeL2tpaampqCAsLw9fX99QLCSFEN5qbmykoKJA2txB9gATLU7DZbCxZsoT58+fzyCOP
-XJRtcSGEEEKI0yHB8jQcO+fyzTff5De/+c1F1xYXQgghhDgdko5Og8FgYM6cObS2tvL8889jMBik
-LS6EEEIIcQIZsTwDx0Yu33jjDWmLCyGEEEKcQILlGTp2zuXChQulLS6EEEII0YEkojNkMBiYPXu2
-tMWFEEIIIU4gI5ZnqWNb/NFHH2X06NHSFhdCCCHERU2C5Tk4Fi7feuuti/Ii6kIIIYQQHUkKOgfH
-2uJtbW3SFhdCCCHERU9GLN1AZosLIYQQQkiwdBur1coHH3zAwoULue+++xg/fry0xYUQQghxUZHk
-4yZGo5Grr76alpYWnnvuOfR6vbTFhRBCCHFRkRFLNzvWFv/Pf/7Dww8/LG1xIYQQQlw0JFieB1ar
-lSVLlvDmm29KW1wIIYQQFw1JO+eB0Whsny0ubXEhhBBCXCw0ni6grzIYDNxwww3ccMMNPPnkk6xe
-vRqn03nca+rr6ykvL/dQhUIIIYQQ7iWt8PPsWFv8rbfe4je/+U17W7yyspLnn3+e5uZm/vKXv2Aw
-GDxdqhBCCCHEOZFW+Hl2Yltcp9MxaNAgnn/+eV5++WUCAgK4+eabGTx4sKdLFUIIIYQ4JzJieYFY
-rVYWL17M/PnziYyM5O2338bhcKAoCjfffDMvvPACPj4+ni5TCCGEEOKsyTmWF4jRaGTChAkYjUYW
-LlyIw+EAQFVVVq1axZYtWzxcoRBCCCHEuZFgeYE0NDTwj3/8g9WrV3PiIHFhYSGffvopVqvVQ9UJ
-IYQQQpw7aYVfAI2NjTz66KO89NJL7SOVJ9Lr9WzatInMzMwLXJ0QQgghhHvIiOUFcOjQIQoLCzGb
-zV2+xm6388orr2C32y9gZUIIIYQQ7iMjlheAy+WiuLiYr7/+mgULFnR6TUuAuLg4PvroIwYNGuSB
-KoUQQgghzo0EywvI5XLR1NTEZ599xquvvsr27dupra1tP+dSURR+9rOf8fe//x2LxeLhaoUQPYHN
-ZsNms3V5Go04e4qiYDKZ0Ov1aDTSwBPCHSRYeoCqqlRUVPDFF1/w9ttvs2bNGhobGwFITExk/vz5
-TJgwwcNVCiE8pbGxkX379rFx40aKi4upr69v30cI99HpdISGhuLj48Po0aNJS0sjKCgIrVbr6dKE
-6LUkWHpQxxb5f//7X7777jucTif3338/jz/+OEaj0dMlCiEukGMHnMuXf8nChW/S0FxNk60cs4+K
-t68Ro1ELiqer7FvsVietzQ4a661YDGEYNQGMGjWSuT/9Ken90z1dnhC9kgTLTjidzgvadnI6nTQ1
-NfH555/z2muvkZeXxxdffEF6et/asUm7SYiTORwOiouLWbDgPyz+4F0wNhOXaiEk0huDUYtGo4Ci
-oEiodD8VVFRUFzgcLuqqWjl0oInyIjtjRk7k9p/fwdChw/Dy8vJ0pUL0GhIsORLsysrKKC0tZVfu
-LirKKzzSdlJVlZqaGtasWUNCQgIDBw684DWcLxqNBh8fH6Kjo+mX2o+Y6BhCQ0MlaIqLWl1dHR9+
-+CHvLPovpZW5JGcEERzljU4nvxeeVFfVSsGuGmwNJi6/9Mf8/Oe3ExsbiyLpXohTuqiDZWNjI+s3
-rOfdd95l9+7dOGnGoalD1djx9jF4urw+xeV00driQHGZ0Kt+GLQ+DBso14c9AAAgAElEQVQ2lNmz
-5zBo0CAZERAXnfr6eh559BFWfvsJUf30RCf5YTDKuX09hdPhoqayld2baugfP4p58+YxdOgwORgW
-4hQuumDpdDo5dOgQq1at4qVXnqey5iBRiV5EJvji7atHq9WAghyZup2KqoLqUnE4XDTWWTlc3MKB
-3AYyBw7hphtvYfLkyQQEBMqOW/RpTqeTnTt38sSTj7G/fDPpw4Pw9jFIq7uHsrU52ZdbR32Znif+
-+AxTpkyV89+F6MZFFSxbW1tZ+ulSFi78D/lF20jI8CEsyoLRrPN0aRclVVVpbXZQur+BsoJmhmdd
-wk+uuZ6pU6ei1+s9XZ4Q58WWLVu4/4H7qGzay7CJ0TJK2Qu4nCr7d9dQsK2VZ5/5O5dffgU6nXxv
-CNGZiyZYVldX89RTT7Fy9WcERTuITvLF7C3hpSdQVWhutLI/t5aGQ0ZuveUu7rj9Dkwmk6dLE8Kt
-6uvruelncymq2ETW+EiMJgknvYXLqVK4q4bWCn8e++PTXDLpEumuCNGJiyJY5ubm8vAjD7L3wHqy
-xodj8TNK26kHcrlUaitb2byygmmTruT+++cRFxcnO2/RJ9TX1/OHPz7Kt5s+YHB2qHRKeiGnU2Xv
-lkpcDeHMf30BKSkpni5JiB6nz39jFxYW8sDvf0dR9SaGT47Cx19CZU+l0SgEhXmRPTOSFWvf5+57
-7mTfvn2eLkuIc2a321m0aBGfL/+QASOCJVT2UlqtQnJmEI3OA7zwwvM0Nzd7uiQhepw+HSz37dvH
-gw8+SFn9DgaNCsfsLTvz3sDbx8CwidHkF2/kmb/8Se44Inq9gwdLeOe9hcT2N2DxlStO9GYGo5aB
-I8P56ptPWPbFMk+XI0SP02eDZWVlJX/689PsLVlD1tgIGSHoTRTwCzSRPSOeDdtX8Oyzf5WRAdGr
-vf/++1Q07CU22d/TpQg3sPgZiB/oxYIFb1BSUuLpcoToUfpssFz45kLWbvqCjJEh6PR9djP7NLO3
-ntShviz5+G0+++xTnE6np0sS4oxVV1ez8J35JPQPwGCSGeB9RWS8Dwcrclm9+jtcLpenyxGix+iT
-iaukpIR/z3+FmFQzFj9pO/Vm/kEmgmKd/PO1lzl8+LCnyxHijH311XJabTWERlk8XYpwI4NRi08I
-fLdmFa2trZ4uR4geo88Fy5aWFv7v/57EO6iVuH7+cqHzXk6jVUjsH8ihqj188MESLoKLGIg+pKmp
-iddee43UrCDpnPQxGo1CRJwPH3+6SNrhQnTQ5/Z027ZtZf2mNaRkBkmo7CMMJi2pWcEsWPg6ZWVl
-ni5HiNNWXFxMfWMtodEyWtkXWXyNGEywbfs2T5ciRI/Rp4JlW1sbX3zxJXpLExZ/ueVWXxIS6Y1N
-rWX58i89XYoQp2379u1gaEJvkHMr+yK9QUNEnC/fr18r3RQhjupTwbK8opyNW9cQkeCNRiOjlX2J
-Vqchpp8XixcvoaKiwtPlCHFKTqeT3bt3ozW2IXujvisi1sI336zE4XB4uhQheoQ+FSz37tnL3oJt
-+AfLrQD7ooBQM5U1pew/sN/TpQhxSlarlfr6erx9DEiy7LtM3nqsVivV1dWeLkWIHqFPBcv8/Hy8
-fHQYzdJ26ouMJi02qtidmyttJ9HjHQuWRi+5hm5fpjdoUVVVZoYLcVSfCpbbczYTGmVBq+1TmyWO
-0uo0GC0KJSUHsdvtni5HiG45nU5sNhs6neyP+jKTWYfT6aC2ttbTpQjRI/SpPd72HVvwC5I2eF+l
-URRMZh1lZWXYbDZPlyOEEO2nOUgXRYgj+lSwPHjwIHpDn9ok0ZECFl8DTS21MmIphBBC9EB9JoUd
-OnQIRQNGs97TpYjzyOilQ1Xscgs1IYQQogfqM8HS5XKhKKDVyvRLIYQQQghP6DPBUgghhBBCeJYE
-SyGEEEII4RYSLIUQQgghhFtIsBRCCCGEEG4hwVIIIYQQQriFBEshhBBCCOEWEiyFEEIIIYRbSLAU
-QgghhBBuIcFSCCGEEEK4hQRLIYToQk5ODkuXLqWystLTpQghRK+g83QBQgjRU+Xk5PCLX/wCg8HA
-3LlzmTx5Munp6YSHh2MymdBo5NhcnD91dXXce++9LFu2zNOlCA946aWXuOaaazxdxhmTYCmEEF1w
-uVw0NTWhqiovvPACf/vb38jIyGD69OkMHjyY4cOHEx8fj8Fg8HSpog/64IMP+N///oeqqp4uRXjA
-TTfdxJw5c1AUxdOlnBEJlkIIcZpUVSUnJ4ecnBwCAwNJSUkhPT2d2bNnM2LECEJCQjxdouhDJk2a
-xIQJE/jmm288XYrwgN56QCHBUgjRo+3fv5/W1laPvHdpaWmXz9XU1LB+/Xo2btzI+++/j9Fo5MYb
-b2TKlCn0798fvV7fa78YRM8QHx/PRx99RF5eHiNGjEBVVTZs2EBcXJxH6zp8+DCDBw9GVVXCwsLY
-vn17jx5Ve+SRR3j11VeZMWMGb7zxRo+uta2tjfj4+F6975BgKYTosb7//nvmzp1LYWGhx2o41Q7e
-5XLR2NhIY2Nje7t8wIABTJ48mbKyMvziL0ydom/y9fUlODi4/e/BwcGEhoZ6sCJwOBztf9ZoNISG
-hvbosGY2mwEwGo09vlZPHUS7k5x5LoTosT755BMKCgpQVdVjP2cqPj6eiRMn0r9/f0wm03n4VIQQ
-oueSEUshRK/w4IMP8qtf/cpt61u9enX7jMuysrJORzHef/99fvnLX3YbMIODg/Hz82PcuHHMnTuX
-/v374+/vT1NTE6tWraKJErfVLIQQPZ0ESyFEr+Dl5UVYWJjb1hcQEND+57CwsE6DpZ+fX5e1ZGVl
-kZiYyNVXX83w4cMJCwtDp/thl9rc3Oy2WoUQoreQYCmEEKcpISGBmTNnkp2dTVZWFtHR0Xh7e3u6
-LCGE6DEkWAohRBe8vLxITExk/Pjx3HjjjaSlpREQEIDJZOrREwCEEMJTJFgKIUQXJk6cyKpVq05q
-cwshhOic7CmFEKILgYGBni6hGwrGoGFMGTaVprwFrNrf2TU39fgFZtK//zjSw4PQKE4aKnezdsOH
-HGy1At4MHHM3IyN9ungPO4d3f8jKohaGj5yDz+HP+K7Mwvix42jKWcy3RQU4j5vXpMEr+jKuHBhP
-zpavUOIuYVhMBJpOBndb6nfz7ap3OWhzHve4xW88UydNIUh3/EJtdflszFlJYflBnHp/UgfeyDDf
-Ihav/pzWDpe/EUJ4lgRLIYTojTQBpKVexdgh42kLbqLw4EsctLs6vMBIdNrNXHPJTMKMTlptbaDo
-SYwdRUbKYJZ+8iybK2xY/OOICgsCQGcIJsCip6mxila7HbDiLLGgM5iITxpHsGsLK0tKUCzDmDDk
-MN+X7KfV2SEYKqEMHDCD5KACVtU6SM8eyeDUGJoaKrGeMLO+SVeHqZML3hlM8fRPm0SgtYomm5Uj
-SynoYobRP2EAiz99gW3VKiGRIxkcYubjtV/Q+6/8J0TfIcFSCCF6Ib13GAlxidQVF+IbnEVaTCxl
-+w5wJFoq6P3Hc9XUK7BUf8/S799j7f48XNpg4hMmMXPqXCZnX0XJsv+y7rN7WHd0nRH9HuSXs5L5
-dMnjrC0+cDTUqXj5D29/X3vLIfILdzJi1EjiTYvY3dxy9BkN5sB0MmLCKNk+nzK7i3SgqWYDby54
-lF2t9hO2oJtrhDorWPv543y8ZwdHxiK1hCb+mGtnXs/41MHkfr/93D9AIcR5IcHyDPiF/4gZQyPZ
-tn4xe6sqOtktagmOmcbwfgMJD/BBcbRxuOg71u5eT12bFcU7lfEjfkRyUOdtJ9VWz87t77G5IZ6r
-Rw+jOHcldf7DyAppZc2qdyg5oWWkMYYwaOhPSXFu4rPcYgYPv4HUQGMna3bRWPI1H23+Dquj4zoM
-hCRfzqUDMzFoOwwdqHZqy/eyZdtSDjQ1g5LAxCmzMVd8x7c71tPc2feBIZ6hg2aQEReJDjsVRZvY
-nLuCsmbrqT9YIcQZCwgaR/8QG1uWLSV+2k2kJgxiU1ERdU4V8CMpYwoRrkKWfv0v1h8qPxI4HRUc
-yF/MUlMEl0Q6UbR6oLPfUZUug5+rgQPFGygb8nOGJiexZ3vOkVcqZqKihxFrKuedvXmohJze+rrU
-cRkHNeXfU1j1YyZGJaPX7ux+USWRS6bNwVx/gCYlnMTIYJytleTnfsbGon04evHt8oTo6SRYnrZg
-ho+by9hUfyLbitj39TJsrh/aThpdOGlZt/DjseMwOFuwOR0oipF+ydkM77eMfy39NxVaC4GBiUSF
-BaCgxeQdjI/eRUN9JVYVVGsVJWYTij2ejH7ZuEq/Ia/ViwHpk6jbv4aDBQeO2zV7W4YwZvBwDq1a
-AYoPcUkTyQpyUN1Uj+u4/aaT2sbtnZznpMU7cACD0ibgbKmkxXF0exQdSfFjyYiLYv77f+egPYCE
-5HH4ag/w/Y71nHR1Pm0Uo8bfy5WD++O0NWDHRP/E0cQFevH2V4updspOXAj3MhM3YCxeNbvIq1jO
-vs3Z3DJ4ArE7v6euvBw0ISRERGGtX8/+8nKOPyR1ULzrn7y1B+yOsznwU2mtyGFrUTnTMqcRnbuL
-ErsLjSmIuPj+tBZ9wf6WlvZXa7ReBATFEt52/HmQttYqak77Wp86zOZAvAwKjXU1OE8VDJVAElMm
-k+Gl0mJtweZ0YTQFkJXcj6YFD5FT33CG2yyEOF0SLE+TYhlKZriR8opDBKdMJOr7b9h/rAWkmIlK
-vpIrxoyhNv99Pv/+c/ZVHUIxxjEg61ouHXUZs4fs4NXvvuGDxVv4AIBghk55hKuS23hnwcPsbG8T
-qWgjRx39s4O6A9+R3zyehLiB+OwroqE9MRoIT5xIcFs+X1cU41CjASe1+e/wzMdv0mw/8WT2rnfE
-1qZCPn/vPlaXH93Z6gJJTL+FmyZnMzLtSw7ldPvJYA5KJSMhmcpdC1i4agmVJDBl2u+ZFJNFRMAK
-qqtqT/djFkKcBsV7GKPiLezdtJbD9XWY939HxYgbGRKVwK6Kcpx6X3zNXtgaqmhwnby86mrD2snj
-p81VxrZd65k8axzJkeGUFJXh7Z1GSrCDDSs3YnM44eiBrCVoBDfcuvDECihc9zjPfbmMTsvQeBOd
-NJ6xlqSjodiP5P6XkRHSzKr127A7nZ0tdTwF2mp38cVX/2BNSSVJg3/FjZMnkhUfRc52CZZCnC8S
-LE+LL0kDsglw7OfbzVsYNHYOI2Oj2L87HwCtMYR+adn41K1m4Tdvc7DpaOC0HmD7pjfR67T003hj
-AOztAa9j0OumTWTdyfq8Mm5IyCLC71saauuPPK4kMCQjicriNymtqQOv6NNbX5c6LOOoZl/BDuou
-mUB4SCLeysFultMT4BdHiI+T3btXU95iBfawcdNqRs3OJsgvCKWq9oyrEUJ0xUhYygSS/PyoHjCH
-66OnojMEE2QKIipzLJbtG6l3tNBis6Iz++Kl0PnpK+fERWvpKnY1TCE+OhWv4nKCY7LxbcnjQE35
-cWGxtSGXNd++x0Hb8RGyqWpH1/sFjR/9h91I//YHVJoqcljz3SK+PVCAQw3oaskfqDbKD25gZ9E+
-HC4t1TUFNFgn4eVlOeOtFUKcPgmWp0ExJ5OVkkZj6WLWb9+IK3YCY4ddQUzB85TYXRiMYUSHBlBT
-sI2KluPnJ6qOUrZ8/xw7FCe2s3p3O4f2rKQq81oyoxIorN2GAwVj1CiSzU18X7iZBqeLY2dWao3+
-hAbF0tLxXErVQUtjxxmWp9hejQlvix861UlNSx3WbhfSYzFH4q2t53DdD20tZ0sdNr0vIWZf9HCW
-2y6EOJFGn8jQfulgb0FrDifGHA6A09qIPnIso6PeZFlxMbuK9jF6UCpxwf5UV9Z1CHsaIhJu5frp
-g9n6+bN8XbTv7A78nAfYsmc/P0kaTJhvNcMHJlO69xVKG5qOe5m9rYL83Ss6mbzTDcdhvv38Ob4s
-2M2x3ovLaaXN1oLd6UTp7FTyk6g4nLZTt82FEG4lwfKUjITGDCYpyMWmlStocDSwoyCXyZdkkhYT
-Tem+YvS6IHzNUFdXh3rSTsyF09HKaTRuutRUv4EdBy5nTGIGhr07cdj9SEsZiKvye7YeONjhS0FL
-QMq13J/yk+NX4DjEig8e56PcbXS2a9caAkhJn4kS3QaAziuW9P5TCXEW8XXhTqzEd1ufomhQUHGd
-uO2KgkbuTiKEG+kJih/BwCg/Niybx9s5u44+rqAPHMf1V/0/Bg2ewLrS9ziwZz2No+9k/JjrsG/6
-nJyyIlyKD6FhWUyeNAv/prXsr68+h26CSlXh5xxO/xkZGf4kGA/z1b6cUxyIni4X1rZ66puqkCtU
-CtG7SLA8BcXgT2L8SMJ8Asgc+xvinC4UcwJeljD6JQ5hc1EJVmcDLTYFb2+vI7d5c/MRsstWw759
-mxmTnUWU/kMOmJNJjw6laPt/qD3urVw0lnzFx5vX0NbxHCS1lfLSoi7Drd4Uzojx9zKifTWtVBzO
-4avl/2ZnRQ0o8W7dHiHEWdL6EhOega91N+vy81A7nFpjq9nJtqIDXNcvm9SQ5Wwo/5bPN4xizujZ
-/CRqOCMqDuJSLAQGpRBmrmHlZ59Qeo6TWFqa91NYbmXSkBHY9s9nT1X9Sa8x+6Yz/fI/MMp5fCvc
-0VbJlk1vklNec5bvrqAPHsH1P/oDdtexvZuLhsMbWbX1bNcphDhXEixPwcuSQlpCHM7mVnxDU/A9
-+nhTi0pc0hhictaSU1dEQUkFU2Mz8dm4huq2DjMtNf70G3EPs9OMfPbR02yvben0fbqltlFWupkD
-1lEMTUjCyQgS9CUsLDyxhaVirS9ga+7yTibvdM3amM+yT/7IxsrG9vXYHVas1mYcKu0n4XfOQUtb
-BS2uLEJ8THDse0WjA1sTNW1NMuIghJuYvCOJDrNQuPVtSqwn9h9qyNnwGWPifkREWCKm8o3s+P5Z
-GsqnMHzIJNLC0lAUO3WH1/Pu9wvYVlaK/YSDYIetmqpay9GLo//A5Wqjoe4gmpbm488Ot1WRl/8N
-GREaCrZ9e8K5nHaamw5R02zGN7Rf+76z/dlmC/lG/Unb6HQ0UF1TRpOtrevRVNVBa9NhqlpjCQ9L
-6bg0NdYiDNpD1NeV0tbcdPQUABWnvZGa2hKaW+Vy6kKcTxIsu6UhJH4W/cwlfLL4//iuuKh9R+cf
-fQM/v+YahsakkFu5jeID27FPn8wVwwv4Kmc9h+oqQRdCTL8ruHTIaOwl/6W47ixC5VGO+lw25B/g
-mqzZ2KsDqT2wjIq2Nrdspao6aG2ppq7pbEYv7NQ2FFHTYiCp31D8K5dRTwgJyYMwtx6msrGm81mf
-Qogz1taQw8fv30Xnk/NUnA3L+MfrX3DcRLz8d9mX/x5w5BhR7ab5XXngnzz3hnLS+tsacvjgvV90
-8r52Kvct5l/7lpz8nFrC2i9/z9ovOz82VTv8t6P66g/51+sfdbGNR5e1VbHpm9+x6ZuT131s+xYt
-7Pg5Oakt+ZTXF3zW7XqFEOdOgmW3QkhLTaShaDl5lWW4OuyQGmvWsbP0R0wcOBbf7Zso3b+Mb/ak
-8aMxdxOZPIPKhipUXTARkSn4WHfx5rqvTmhbn6kmivK3YBt+M1nGg3yxYhdW54mRTYNPzBRu+FEy
-DvWExndzHh+vfJ8q21lesFzRE5k8i594DzxuIk71vk/4ZFc++WUVzBhyGz8LG00jgcRHJFKX/z8O
-1UhLSgj3OtWOpPPQeTpLdr/+7pbufpkz3/WdzhKnWnfXn4MQ4vyRYNkNTfBwkg2H2bJ9NRWtx89r
-drSWsSvnC1LGDCItwMKaijxWL/8DtRXXMioti8iIEFRHK+W73+GtLZ+zr/rEgOWkraWCqjorVvWE
-gOhooLq2jCZrxxFJFXv1t6zNm8BQzTb2VZQd35JyWWmoL6POaCYyvN/JG9PQgv6kK6Sr2Nuqqaoz
-Hn+/35NYqa87TGughfCI/h0eVzFUfwe2Laxe8zoWrmNwTAr+OKnI/5jl6z6h0nYu05aEEEII0ZtI
-sOyGq2opLy34lE6PctVWinb/m7/t/qFt5LSVs2Pj39ixUeGHR7s6Qq5l19on2bX25GecFR/y9wWd
-tILUGtYtu491nazT2ryXT977GUu73JrOGmBtlO54med3nNz6Oo5rF0veuvXohd07X2tb1Ro+/Ggt
-H3XzbkIIIYTo2yRYntLZtZ3OPVadXTvq7N739NpOp36VxEkhhBDiYqbxdAFCCCGEEKJvkGAphBBC
-CCHcQoKlEEIIIYRwCwmWQgghhBDCLSRYCiGEEEIIt5BgKYQQQggh3EKCpRBCCCGEcAsJlkIIIYQQ
-wi0kWAohhBBCCLeQYCmEEEIIIdxCgqUQQgghhHALCZZCCCGEEMItJFgKIYQQQgi3kGAphBBCCCHc
-QoKlEEIIIYRwCwmWQgghhBDCLSRYCiGEEEIIt5BgKYQQQggh3EKCpRBCCCGEcAsJlkIIIYQQwi0k
-WAohhBBCCLeQYCmEEOeBoihotVrsNqenSxHnUWuzA61WR1BQkKdLEaJHkGAphBDngZeXF8HBwbQ2
-2z1dijiPHHYnGo2Cl5eXp0sRokeQYCmEEOeBwWDAYrHQ1mIH1dPViPOlpdmORqPDz8/P06UI0SP0
-mWAZFBSE06nK6EAf53KqoCooiuLpUoTollarJStrMIrTB1WCZZ9VdaiFWbNmYTAYPF2KED1CnwmW
-JpMJH4sPTofL06WI86i+ug2D1hedTufpUoQ4pbS0/rTU6GlrdXi6FHEe2G1OSgrqGJo1Qg52hTiq
-zwRLgKysIbID78NUVcXW5iQoKEiCpegV4uLi8PPzo6a8xdOliPOgucGO2eDDoEGDPF2KED1GnwqW
-Gf2zKDvQIG2nPsrlVGlutBMZGSltJ9EreHt7c/fdd5PzfTkOu3RT+hKXS6WksI6RQyYRGRnp6XKE
-6DH6VLDs1y+Vplo7tjYZteyL7HYXBsWfjIEDZMRS9BrTpk3D3xJO+cFGT5ci3Mja6qC5WsuMGTNk
-RrgQHfSpYJmWloafbygtjTKBpy9qrLPiYwojOSnF06UIcdoCAgK4/rqb2L+7FptVDnr7itL9jUSH
-pTEmOxuNpk99lQpxTvrUb0NsbCyD00dzqKRR2uF9jQqH9jeSEJ9EVFSUp6sR4oxcdeXVhPumU5zf
-4OlShBu0NNoo3mXllltuIzJC2uBCdNSngqWfnx/Z2WOpKHLK+Ux9TGO9jbICB7/4xS/k/ErR6yQk
-JHDnnXdTUQhNDTZPlyPOQVurg+1rD3PZpVcy49IZMlopxAn61G+EoihMnz6dYN9YSvfVe7oc4SYu
-l8rerRUMHz6a9PR0T5cjxBnTarVMnTqNGdOvZvM3pVjl6hW9ksupsi+3hiDvFO668x5MJpOnSxKi
-x+lTwRIgLCyMBx54gL1b6mmWkYE+obq8haoyB7+8+1eyIxe9lo+PD/Pun0f/hNFsXFkq54L3Mi6X
-yr7cWlorAnjg/odJSkrydElC9Eh9LlgeG7Ucnz2NXZvKsVudni5JnANrq4N9Oxq4Ze7dDB8+3NPl
-CHFOAgICePqpPxPhn8Gmr8uwtsjIZW/gsLvI31FNfYkPT/3fn5g8ebK0wIXoQp/8zdDpdPz6V/fh
-rYnlQF4dqszk6ZVUl0pBTjVBliSuu+46Ga0UfUJSUjJ/+ctfGZQ6kfUrSqirbpN9VA9mszrZtamc
-uhIzjz32JJdMklApRHf67G9HRkYGv/nV/VQUGCjb34jLJTvu3sTlUjmwt476MjNPP/WMtJ1En6HV
-asnMzOSFF/7GjIk3smlFJftz645MOJTdVI/hdLioqWhl44pDBBkyePFv/2TqlKkSKoU4hT57lWmd
-TscVV1yBqjp54KHfYbM6iO0XgFYr93Pt6RwOF/tza6guNvL4Y08xbNgwT5ckhFspikJoaCiPP/4E
-I0aOZP7r81n35Xbi+vkRFm3BaO6zu+Yez+lUqatspTC3GmeTP9dceQd33XUXQUFBni5NiF6hT++9
-tFotl102i7r6el74+5+x26pJyQxCUSRc9lQOm4u8HVU0HvLioQf+wGUzLvN0SUKcN15eXsyZPYfh
-w4azcOFCPv/yY3I3FZKSGUxYtDdePgY0GtlfXQhtLQ6SYrKYOOpyaqvaqBrRRFJSMqNGjfL4Jc6C
-g4P597//DUBISIhHaxHiVPp0sAQwmUzccP2NhIWG8/SfnmTzNwdJzQrG21d22D2Jy6VSX9NG4Y4G
-1FZ/Xnn5nwwZMgS9Xu/p0oQ4rzQaDQkJCcybN4+5P53LunXrePe9N1n3aQ4mbwgI02G2aDBb9Gi1
-0oZ1p5YmG9YWFw01TuorncReF0b2sMtR6FnfDRaLhVtuucXTZQhxWvp8sAQwGo3MnDmTAQMGcN99
-97Htm+0Ex6rEJvvj5WNABjA9R3WpNDfZ2Z9bQ90hLZfP+An33PNLubuOuOgYDAbi4+KJj4tnzuw5
-lJWVkZeXx7p1a9mzZy9t9TLJx9189XqikiIZ9pNhDBo0mISEhB4XKoXobS6KYHlMfHw8r776Kl+t
-WM6bb/2P1Z9tIK6fP2Gx3vgHmaRFfgEdG6Hcn1tL2YEGxo2awf+748dMnTIVi8Xi6fKE8Ci9Xk9c
-XBxxcXFMnToVm81GW1sbLpfcUcydDAYDZrNZ9v1CuNFFFSzhyLkq18z5MVMmT2X9/2fvrsOjOPc2
-jn9nNe4eAiQkENy9ULS0BUpLS42X0h7q3p660FKh7u6neurU0RoULVrcLcES4rbJ7s77B9LgcJpk
-k3B/rivXaWaemf3BIbt3nnlk7lw++vh9/pw8l+BIg9BoGyHhdgKDHdgcVl+XWu+4St0UFZRTmFtB
-9rYKDLeT0waezZl3DqFTp06Eh4frDV7kMBwOh8/H+YmIHI+TLljCnkk9UVFRDB48mEGDBrF9+3Zm
-z57F9OnT2bZtO1mZBbjd/3zh4oqKCvLz8wkLC8NmOyn/qnG73eS1ibwAACAASURBVOTm5hIdHY2f
-nx8BAQG0aJHCqdf0pk2btjRs2FBhUkREpJ44OdNOJTabjaSkJJKSLmD48HMpLS0lPz+fiop/vt1a
-ZmYmH330EaNHjyYuLq4Kqq17Vq1axYQJE7j77rvx8/MjMDCQ4OBghUkREZF66KQPlpXZbDaCg4MJ
-Dg6ukvstWrSISZMmMWLECJKTk6vknnWJaZp8++23zJo1C4vFQnx8vK9LEhERkWqkYFmNpkyZwubN
-m5k+fTqnnnrqSfc4fPfu3UybNo2MjAxmzZpFo0aNfF2SiMg/5KYoextLZs5mY2EFhCTStXN7UuLD
-sOIhc/lc1pUn0619PM5KVxVlLmPir4txHXS3wKY9GdI5gayFs5ixKpOKAyb+h9CsU3daNahg/qRf
-2Fz29xl7dGN6dO5IUoQ/AF5PGbs2rGLRijXsLvISkdiKTp3SiA5y4i3OYvbs2WzaUfD3DQw7Cemn
-0LNDIk68FOdmsGL+X6zblYfHL5SUZm1ok96AILvmG8iJ0aJo1SQ7O5vJkycD8Ouvv1JWVnaMK+qf
-devWsXHjRoqKivj5558pKirydUkiIv+ASdHWhTz31Ov8umYXLlcxuzbO5z/jn2Ti8my8VLD4hzd5
-/vOlFB00gX/Xkok88+zXbMwpxeVy7f8qd3sxzUKW/PdZnv1hEWWVzrlc5bg9Xkqyl/Lu088wc+Pu
-PcdL81j7x5eMffJ7trlMoJwVU/7DuFd/Yu2ufIqLspjz1bu88M6PZJVWUL57La898S6/rN71973L
-y3G7vZiY5G74g1fHP8tP8zdQVFJKXtY6Jr72DK9/PZ8SrXAlJ+jk6kKrQXPnziUrKwuAOXPmsGLF
-Crp06eLjqmqO2+1m9uzZrF27Fo/Hw7Jly9iyZQstWrTwdWkiIv8bs5wtcycxa4eF52+/nGZRfnjK
-s/ny0XuYPG0tvVq0P8rFVqIbdmL4yMtoGXnQR683G4CYLmdw2ZgBHNxHmL8Z7FFJ9DtnJCNaRYHp
-pWzTVK688GPm/esMTrPP5tXnl9P38fsY1joah9VLzqrfeeShn5jeqyeDowDi6D30Yi7tctB4f892
-PnvhRTY0vYYHLjuF2AAnpreMbbM+4+7nprKqf0c6RCkqyPHTv5ZqUFZWxoQJE/b3UlZUVDB58uST
-KlgWFhbyxx9/7J8EtWLFChYsWEB6ejoWizrKRaQusuAfGoF9+89M+GYqZ5zangZxUZz/4JucbxgY
-1NSTKQ/F+fkUBYcR7OdixU/fsrRlTx5tG4vTsqfOyKY9ufflzoSFBVORuf4I9zEp3TifHxZEcvm/
-uxMXuOfhvWH1o0Gv0XxwCtpARE6YgmU12Lp1K0uXLsXj8ew/9tNPP3H99dcTHh7uw8pqTmZmJtOn
-T9//fWFhIfPmzWP48OEEBgb6sDIRkf+RYSep23CuvdjF9798wj0fvIw9PoZ2g0dz5dl9SAg52sUV
-bFwygQdv3UC4c98v1/Gce8uNDGq257t1Xz7L1Ss/37/3j1+jNoy+7FJSgbJNf/H6uFuZGu4HXhNb
-YAjtLruYLgkGMzdmEJIYSXDl39mtfkRF+u19ZYC1vDf+NmbFBAAQGHoqNz14PrbNq9kU3ITk+D3H
-81ZN5ZFnv6AAcAQmMeKmWzi1sTatkOOnYFnFTNNkwYIFbNiw4YDjW7duZcmSJfTp08c3hdWwGTNm
-sHv37gOOTZkyhTvvvFPBUkTqLFtwAqeNvJ4ew/LJydzC8tXz+PK1hxibY+GJ63oe7UriU3sz5oYr
-SQ3b97DbQVRCKJAHQIO+F3LbpT32Pwq3OAOJifLHsx0c8U04+183cEZaOGDgCAghKiqCAGsRQdFR
-4DU5cFinl7KSMrDtW1i/AYMvuZrhbaIBsNpCife3kOcXgMWdTXmFCQ6DoEadue6OZDyFy3nqstdY
-edE1CpZyQhQsq1hRUREzZswgOzv7gONZWVlMnTqVnj17YrfbfVRdzSgvL+err746ZF/jNWvWMHfu
-XBo0aOCjykRE/nemu4z1S5aSF9CQdumxhITH0LhVR1LI5Y7/Librkq5HudrALzCSpOQmpB4yxnLP
-//hFJpCamnroGEv2hMy4pGRSU6MOOhtAow5tKH95CWsLB9AyeM+9vaUZfPL0Rxg9zuOCpgD+xDRI
-JjW18hhLk/DkVrSzvMOfK3aR3jkWm38YyalhkJNLgF0RQU6cBrtVsdzcXObNm3fI8fLychYtWsTO
-nTt9UFXNWrNmDUuXLj3sucmTJx8SOEVE6gSznM1zvuGBx19l5rpsTMAs2cXKjTtI7daO6CBfLM1j
-J6HzUM6NX8eLb0xhU14p7op8Fn73BVMXZhIRE8qRh0kaOBI6c/XlzZn18WtMWbKVCreH4t3rmfT+
-R8wLjqNRuLYSlROjX0eq2IIFC1iyZMlhzy1ZsoTVq1fX6x470zSPurTQtGnT2LJli9a0FJE6x7AH
-c8rIq7E3mc4Pd4/kwZwK8E/ngkvP49bTTyHCYeLnb2HVR2MZPudxrAZABH0v+zfnx9rJWvU+Vw2f
-isP6d9SLan0VLz4zEL+QSLZ/dB8Dvh9fKQhG0Gf0LVx5qpPQyEj8HYfvC7IGJ3Px2NuI+OJT7rv0
-BTILTRKancGlD/yb3i1jMHZsJSIqjADn4YKvP23PvpZ/J89gygcP8vKSDRQHxNGt12CeeqMfHZKD
-oXgtr9z6BOZlD3Ftt4Sq/UuVekfBsopNnjz5iNtBbtu2jenTp9O7d+96+zh89+7dTJ06lZKSksOe
-z8nJ0WLpIlJHGTjDkuh9+kh6Dbr476OVpk73v/EdVtxw0FWGAXRn9srrD3tPw4C4se/x5/2HObv3
-3k/+59SjbIVrEBLbjPOvf4AR15n7j+1vntiJFz/peMTrLY4Q0jsPJr3Tmewv3TD+Dri2NK57/S1N
-EZfjokfhVSg7O5tJkyYdtU19Xyx9/fr1bNy48YjntVi6iNQHhmHs/zrozAHnKp8/+PieryNfd/C1
-J1bXoceP4+K/rz/MOZHjoWBZhSovin4kc+bMYeXKlTVUUc1yu93MmjWLtWvXHrGNx+Nh+fLlbN26
-tQYrExERkZqgYFlFXC7XAYuiH8m+xdLro4MXRT+S5cuX8+eff+L1eo/aTkREROoWjbGsIqZpcvbZ
-Zx+wu86tt95KcXEx11xzDe3atdt/PCUlxRclVjubzcaAAQMO+LN+/fXXLF68mA4dOnD22WcDex7J
-JCUl4fV6tQuPiIhIPaJgWUX8/PwYMmTIAcfuvvtuiouLGTBgAMOHD/dRZTUnKCiIMWPGHHBszZo1
-LF68mDZt2nDHHXfsH+djsViw2fTPT0ROZl5K8nMpM4IIC3FQUZTL7oK/n3pZ7X4EBQcT4LRjGCYe
-VxE5xRYiIgIPXOvS4yI7O5dyz0FPgRyBREeEYLdofKTUHH2yS5UxDAOH48A1z/b1SFosFhwOx3EP
-QBepbrGxsVx44YX6Nyk+lMfn947im8CbePuxU5n/ytVc+UE2XdvF48DAGRRBQnI3zh81lDaJfmz9
-5QXOfzWYzybcRHKlT2/v1l+58LS78LZoTnxgpadAaQN56NaLaBLirPk/mpy0FCxF5KTUsmVLPv74
-Y+D4Z9yKVDnTZP+WEdZA2g/+F68+Nogow0tJ9ho+feIZHnk/nLfuHrCv+WH5h7bj2mdf5fRk/78P
-Hm52t0g1U7AUkbrPU0b2rgJswaGEBjkxMKkoKSS3oBjPYT+I7YSEh+DvdHDoU0ITj9tNeVkxeYWl
-AFicAYQFBeJw2PRBLdXOMAwMi5XAmKacN6oPn13/M8vG9Cbx2BfqlyTxOQVLEanzKrZM4cyWt9B6
-7Js8c3t/wiwlLP38ES6+7UXW5JQf0t4wmnDxbVdw/vDzGdipEX77d0Ixyc9cxpTvf2Dmb5N58fPp
-AAS1GcD1559L/3OGckrTeJxWfXhLTbASkphMqusbNu8qPWqwLC/N5PfvvyAvet/mG/40bNWJLi0T
-NcZSapSCpYjUC2blR4r7xTHynpvo2cD/gKPluZv56pNXuHN1HtEv3U23pGDApHz3cp675Vq+XGvS
-uld/Xnn1QgxMirM2MXXiy3zxwxzuevhexvRPraE/lcieUHikR+D7mW5KigopcO77WHdT6qo49nUi
-VUzBUkTqLcMIo/fwy7iiQ9gBx70VpXRv4uD667/np9kX0jWpDZRl8u3T4/hsXQK3PTmWYd1TiQra
-M+nBU17K+ecM4Jl7xjL2oVfp2vFxWoU5DveSIlXIS/HOrWy0NeCiaD/IPHJLR0AjzrjoX5yR7H/k
-RiI1QIsIishJx2L3J75hI8KdpWzfXQBUsH3BFF79YiuXPPEUowe23B8qAawOf5Ja9eH2u66i1bZv
-eGrCSurvxqxSK5heSnPWM+Hz6QQPGUirOM3slrpBPZYicpLxUrRjLd9//Q2rnA05r2UDDE8p6+fP
-Z6tfa87slniEN0Y7iW26M6BJMB9+8wdbzmtN02D9bi5VyFPM0ikvcXvht/iZYHP6ExTXg/tG9ybc
-gHwgf8ME7r9+FcEGgJ2GrU5nVB+TkvylvHz/TXwXXGmFy+AOXH/n/9EyUr2YUnMULEWk3vJ61/PA
-eV15zq/yctImHq9JuSWAvteNY3DHBpiuLDZt3E5+YDMiAo8SFgPCSU+Po3zWNgrKPKBgKf9IKOeM
-fYMBlkjCLU56Xf4MP55VtHdmt4HNGUhkdDRhgU7AJLH3Nfz4zQg83n0DJy34B0USHeXk3Z/+S4nb
-e+CqBbYQkrSGpdQwBUsRqbcMw48GTVvTJNwOppfdW5ezaPkuwgdcxYcPjqFteiOCbQaefBfZxYWU
-HWuig2HB5rBR4c6juMwN2I9xgcjRWAmNbUjo3u8CI5NoHnmktgb2wEjSmh6+QaPUptVRoMgJU7AU
-kXrLMBK54tG3uLxDGOBl56rfeX38s0zJyKTQGU6QbU//jtU/iJSYaELy8iiqMMF5hOVZ3GXkZuVj
-t0US7K9QKSJyMD3HEZH6be+i0YZhJS69F9fcNIronN+578bnmZNRsmeJInsADZs1JqxgI6szSyst
-W+SlvKyM0rIKTEwqcrazaHUOET06kBhqPeJLioicrBQsReTkYdiJ7TiER++5iB1/vsvLn/xGtssD
-hj/pfc+kb8sMnnrqM9bklO0JlxV5/PrRS9x39+NMmr+YHz56ly93hPJ/I3sQY9ei0yIiB1OwFJGT
-ixFIy6H/YnRHf6Z8+Am/r8gCDPwT23PtTaMo//FJxj35Dr8v34bX4k+zdi2IyJ7I5Zddxb2vzyF9
-xA1c1C5aWzuKiByGxliKyEnHCGjM6NuuY841z/PCfyYxsPVoQm1BpJ9xHU89VMrjr77KNd+/hoGJ
-gZfSvBwKi10UmYGE71zHxox8ghqFaqs8EZGDKFiKSJ1nCUxg4HmDadg8FocBYCM8uS2nDzNIiTjc
-DjkWUnuM4IZbsvlqxgZW7HLRPcEPiz2YPpeOpcMZl7Ji9iSe++9ve5oHt+WyMX1x7FjGfz/9kntv
-dPHAm2PpFq+lXEREKlOwFJE6zxrTiUc/6Lh3/T8AJ8mnjuTZ3hdXOnbQNYFxnHPdg5x9LQe1sRIS
-m0y3s6/h02FX7z1msKdJFzqfcjobNmWTGK5Z4SIiB9MYSxGpFw4XII8UKiu1OGobY/+M8n1HrARH
-J9G2c3ui/PT2KTUjMzOTVq1a0bJlSzIyMnxdjshRqcdSRKSW8nq9FBcXU1paSnl5ua/LqVfsdjuB
-gYH4+flhs9Xuj8KKigpWrFiBaZpUVFT4uhyRo6rdP00iItXohx9+ID09ndTUVF+Xsp/b7WbdunUs
-W7aUOXPmsn37dkpKSnC5XL4urV5xOBwEBQURExtDp46d6NixI8nJyTgchxuTKyLHS8FSRE5Kc+fO
-5fLLLycwMJB169Ydx2Pz6uN2u8nKymLmzD949z/vkLltE+FxVoKjIDzeSWyQA78AvV1XpZKicspK
-3KzZtYg/359I3hNeGjdK4cILRnLaaYMIDw+v9T2ZIrWRfmpE5KRUXFzMrl27fFqD1+tl27Zt/PDD
-D3z46VsUlm2nRcco2p4eR3C4ZpxXr8ADvivMd7F+WSaPv3g7L7/+LCMv+BdDhw4hKakhFovG04oc
-LwVLEREfmTRpEm+98zo78laS3i2UxOR0AgLtaPX1mhcc6qRdz3jS20ezYWUuH331HBMnfc8N19/M
-wIGnYbVqC0+R46FgKSJSg0zTpLi4iPfe+w9vvPs8zTr503dAAwKDHfjwabzs5Rdgo3mHaBqmhbJh
-+Q7uvOcW1q69llGjLiEsLMzX5YnUegqWIiI1KDMzkyeeHM+UXydw+sgUYpOCfF2SHMQwICjEQZvu
-ccQkFvH+58+zctVy7r1nLImJib4uT6RW08AREZEaUlRUxGOPP8rC1VM5Y1QThco6IDYpiFOGxDN3
-6Q888OBYcnJyfF2SSK2mYCkiUgPKykp5/vnnWLByCj0HJxCdEHjsi8TnDANiGgRx+kVNmbdkCq++
-+hKFhYW+Lkuk1lKwFBGpZuXl5Xz00Uf898t36TU0kbBIP42nrGMCQxwMvKAx3035mE8++UQLlYsc
-gYKliEg1W7p0Ke/851U6DQwnPNrf1+XI/yg8xp/0LkG8/Z+XWbt2ra/LEamVFCxFRKqR1+vljTdf
-xxqcS3KLSF+XI/+AxWLQpGUkYQ3KeOW1FyktLfV1SSK1joKliEg1mr9gPr/M+IYeZzTC4dBbbl1n
-d1jodGoiv06fxM8/T8M0TV+XJFKr6F1ORKSalJWV8cbrb9C6WyyhEX6+LkeqSHC4k+RW/kz45htN
-5BE5iIKliEg1WbFiBX/On0t6xyhN1qln0jtGs2HrUlauWunrUkRqFQVLEZFq4Ha7+fnnacSkugkK
-1b7f9U1ImINydjJr5izcbrevyxGpNRQsRUSqQWFhIUuXLiMy3qneynrI5rCSmBrKqjXLNIlHpBIF
-SxGRapCbm0OhawexDbS7Tn1kGBDXIIjfZk6ioKDA1+WI1BoKliIi1WDz5i2sXreEgCC7r0uRahIY
-6sBrutixY4evSxGpNRQsRUSqQU5ODv5Bdhx+Vl+XItXE6WfD4WdVsBSpxObrAkRE6qPy8nLsDitW
-qwZY1ld2hxWb3UphYdU+CjdNE6/Xu//7g//b4/Hs/94wDCwW9RFJ7aFgKSIi8j8wDKplYlZeXh4T
-JkygpKQEgN27d+8/99FHHxEZuWcHJ5vNRvfu3Wnbtm3VFyHyP1KwFBERqUVsNhuvvfYaCxYs2H9s
-3w4/48aN238sIiKCTz/9tMbrEzka9Z+LiIjUIsHBwQwbNgzYEygrbxu573vTNAkJCaFjx46+KlPk
-sBQsRUREapmBAwcSGBh41DajRo0iLCyshioSOT4KliIiIrVMamoqXbt2PWqbvn37Ymj1fallFCxF
-RERqmaCgIHr06HHE4NilSxeaNWtWw1WJHJuCpYiISC3jdDrp06cPjRo1Ouz5QYMGERERUcNViRyb
-gqWIiEgt1LRpU1JTUw85Hh0dTYcOHXA4HD6oSuToFCxFRERqofj4eLp27XpIgGzZsiXt2rXT+Eqp
-lRQsRUREaiGr1cqQIUMIDQ3df8xms9G2bVsSEhJ8WJnIkSlYioiI1FItW7Y8YJxlaGgoQ4YM0WNw
-qbUULEVERGqpfYul73vsHRISQocOHXxclciRKViKiIjUYgMGDCAgIACASy65RLPBpVbTXuEiInWY
-EdiRXs3aUpI9n+UZSykzQkhqMIi0qAgOnNph4nblkJ39Fyt3rsGzb5tAI5D4+H40i48kY82XrCss
-OsILhdOocX9SI6I48pSRUnZsnsaK3Zl4zUPPBkedTqdGjbEefMJ0U1K8lS2Z89lWvBuvaeAI6073
-xk3Jz5rDym2rcB3mfieLtLQ0unXrxs8//0zfvn19XY7IUSlYiojUYYZfOu2bDWW3NY91mUspswYR
-F9+fTk2S8FaU4a3c2DTxuIeQuvG//Lp0KvkeDxj+REb3okN6CmT+dORgSQhxCX3p3CgFr6fs72B6
-gHzsOYtYuTvzsHcICOtGx/SuWN0u3OYBlWF6PXRI7cv02c+wNGc3tuDWdGg6kEx2sG7bKlz/y19O
-PbFvsfSioiItii61noKliEh9VL6aLybcySZ3xd4DTkLDu9C2+XA6N70Us6KUqStnUHKCt60o3cT0
-WeP4c+fOI7Q4RteiZwdz/3iS6Zmr9odewxpGw+T/Y0DrAXRvO5Qtv79P+QnWVZ85nU769u1L48aN
-CQ8P93U5IkelYCkiUm+Z/B30ysjPnc6M+Vn4B91P84a9SchYyvrCf3rff3696cll86bJrIlvTfvw
-VOL8HWw5rvs4SWx8Ds0Ci1i1cxuRUa2IDfSHilw2ZsxkQ07mP6qyNmnZsiVNmzbVbHCp9RQsRURO
-Imb5av5as4Rm3VqTGp7AhqIj9TzWMI8Ll6ccw3Bgsx7vR5OdmISBdE4MpElKKX6OYBxWGxYD0ht0
-Zs6iF1mwfWu9CJfR0dEAWhRdaj0FSxGRk4qXkoJ15Ht6EBsWi7H1xIKlxRpAdHR70uz5h5wzK/LY
-nrue4vITe5BtsYQQEdOeRmFRlJfMZndJKYQe+7p9rPYALFlz+X7Bu2wqcdA4ZTRndehBelJX1u3K
-JM/jPfZNajkFSqkrFCxFRE4yHk8eZRUG4X7BJxxYrM442rW9hXaHOefOn8+EWc+zNifryDewhNA4
-9RzscTn7exKt1iji4toS6yxl3rwp7HJ7cZ5ATWbFLpavm8iWwj1hd9PG6Wxv1Z3IgGgCHDbySjVi
-U6SmKFiKyEnJZrPhdDp57LHHKCz8nwYaHlVpaWmV37PqGBi4KSnNxzzs7O4jc5dlsnDJG6zIyTnk
-nOkpJq8o9xgvHUhsXDciK88K95aTk7OY3xb9yNLM1XhOqCLwunLYXZb/9wx4Txnl9aCXUqQuUrAU
-kZNS7969efvtt/n888/57bffqvz+GRkZ2MJr5+g+uyOJYKeH3WXFJ3yt6XVRWLiJHTn/49hMz/ZD
-ZoXvvXOl/z6xvTtM04PXVJAUqQ0ULEXkpDVy5Eguvvjiarn3p59+ygvv3lUt9/5nHITHNiPQlcG8
-nG14T7DHsmr801nlIlJbKViKyEnt5JkUYWAYNuzBfemZlkbp7insLMrGJMjXhYlIPaJgKSJSH1mC
-SUzogt2zd8SiJYDIiFNoldqewLLVzFw7hazSMrDsC5Y2IqLak2Y9eLa3l8K8FezYu5L6nlnh7Uiz
-HTorHMDr2s6m3VuOsDPPibISGJxCcmI3yg64nZeykkx25hVUwWuISFVSsBQRqY9sSZzaayx/P3I2
-cZVmszt7NtNWfcXanRsPmiTjT3rbW0k/5BG1m2Vzb+O79XsmI+2ZFX4r7Y7wKNu14xte/e1tSj3u
-f/5nMJzENxzG0IZnHXSigswNH/PDnz/989cQkSqlYCkiUod58yfy38lzcbuyKfSamN5dLF/6KFvW
-+B3U0sTrceFy5VJQVvh3LPTmsX7NC3y8NZDDDwowKSveCqaXZUueYPPKg+97UOuKXFzew8/rztn6
-Jh/mOCgp3MHRp9p4Kdv5FR9P+QXLYYcqmFS4dpPvKWb1Xw+xzeomv7jSLHVzLb9Pvwu7p4A8V8Vh
-rheR6qJgKSJSl7lz2HXA0j8VFBdvofi4J3y7KS3N5HhWRyou2sKJzyOvVJlrGztdx9fWW57NrvLs
-Y7ZzF20+zH7npeTlrT/R8kSkCpzYmg4iIiIiIkegYCkiIiIiVULBUkRERESqhIKliIiIiFQJBUsR
-ERERqRIKliIiIiJSJRQsRURERKRKKFiKiIiISJVQsBQRERGRKqFgKSIiIiJVQsFSRERERKqEgqWI
-iIiIVAkFSxERERGpEjZfFyAiIiJ1h2EYBAQEYJom/v7+vi5HahkFSxERETlu8fHxFBYW7v/eMAwf
-ViO1jYKliEg1Mb0mpunrKqS6eNxePB4vdrvd16XUOIVJORKNsRQRqQbh4eG4Sj24y72+LkWqSUW5
-F3e5l5iYWF+XIlJrKFiKiFSDxAaJRITFU1pS4etSpJoUF5RjeqzEx8f7uhSRWkPBUkSkGkRGRBAV
-kkT+7jJflyLVJD+njKZNWhMREeHrUkRqDQVLEZFqEBYWToOEZHZsKQKNs6x3PG4vW9fl06p5RwID
-A31djkitoWApIlINAgIC6NuvD7s2GbjdHl+XI1WsrMRN7nYPnTt1wuFw+LockVpDwVJEpJp07NAJ
-ozyYbZsLj91Y6pSdGUXEhjWlQ4dOmiEtUomWGxIRqSZxcXFcdtmlvPzuOEZcE4zdYfV1SVIFPG6T
-NYvzOLPXcBITE2vsdU1PHosmf8O7r73PimII6jCce686n/apMRglO/jgxTfxdhnFpf1SsO/LuhUl
-/PrBEzz2n9+osFnZn4GdIfS+9nHuGhzG1zdcy2vLcrFbKwfkNtz20t20yJ7Io+PfYW25DYthgGkS
-33cU9195Ic3iAjDwUrBrI3N//C+vfjWDPHc4PU+/mDH/Oo3kECdFayYz5o4X2JnvwrLv9v5NuOim
-Oxk9MBVrWS5rFv/GB0+/z9zcfMyEDvzroosYMqgj4TYF9rpIwVJEpJpYLBZGj76U1996mZULs2jd
-JRbDog/Lusw0TdYu3Y1REsuoUZdgs9XQx6hZwvL/Ps6134Xw5nuTaB0Ja2d8xiM338qA+59gRAs3
-mZvW42lSwgELXJkecjILadj3Zp685yzCnZUeVBoGhnczWRlb6XTnpzx1RgqVf/UxDDcrv8lkZ4NT
-eevJe0mN8IOKXH5+azy33vYhL712OXGFi3n8rpfxnHIJb31xBwGlW/jp2cf49327eeXJSwgozmbj
-lla8OG08XcNtle5t4HFl8fUzD/JjVhJXPPY249NCydu6mPfue5j7Vt7EuJv6EmXXz0tdo0fhIiLV
-yN/fn5tvuJ01CwvI0wzxOi8vu4w/f8ng2muvr9HeSsxSHlEJgQAAIABJREFUtv61gpC0FBqGOjAM
-JyldBvOvK0eQEuY8rlsYhnHg14FnDzl/2GsdEbTr3IbQHWvJLihi5bQvWB3Yn2tH9ibK30FARBOG
-XHM1/RtHUOE2j/jaACUZC5gys5izxoyhe9MoDMNOeMNOXHrfHfRuGIShocl1knosRUSq2eDBg/l9
-xq/8+csfDBjRBIt6Leuk8jIPC37fRte2p3HagEE1++KWYFoN7E/R7c8yZvtKhg/rR5ce7eg55Cxs
-VgsVBcVHudjE467A5SqjzNzTn2QYVuwO+97eJRNPhYuysrL9PZaG1YZjb0IwvW5cLhdlZUBFLnPn
-LqG0QxcSwwqYOGUmUWeNJj5w/5X4xbdjzHXt8XNayQcwPZS7XJSVuQEDi9WG3W6yedEsNkf2pF1K
-BBbA666gwu0hoGEnzm5swa7eyjpJwVJEpJpFR0cz9r4Hueaaa/jz1y107JWIzaEHRnWJx2OycMZ2
-rEWNuXP8PYSHh9dwBQ6SBl7PN5935+cff+C7lx7g+ccKSexxCffcOJo2Ry0nj1mfP86oBe9h2/vP
-LjC8M3c+cx+dY8FTlM93D1/D2tf9918RespFPHvTuQAUzPqCa0ctIsBuAQJpe9Yonr/rDBr478Tt
-9uIX4DzgEToWO35O2LfOVlHBVO4ctYJQmwE4adH1Sm67ux+FOdmYIe0J8LOCx8WfX7/IU+/9QkFx
-Nrs9bXn8g+cY2CS4yv4GpWYoWIqI1IDk5GTGjh3LjbdejdW6nXY947HZFS7rAo/by6pF2eRuDuCR
-B+8jPT3dR5VYiWnahYuadubCq/NZs/JP3nj0ZT6Z2I608xse5bpwel18/yFjLA3DAC9Yg8I459Z3
-eOrMSmMsDQODCvLZEzKf2TfGcv85gECiU+KYtSMflwkB+zoYzTwWTV9PVOvmBANBoafz7GeVxlga
-BgYe8qNiMbN3UlzmhSAnXc+/nS9G3Ebhqm+58fLvUX9l3aR3NRGRGtKtWzfGPTCezGV2Fvy+Da9X
-K6fXdhXlXuZOy2Dxr4Xce+c4evY8xSfLC7l3r+LZ28bz1cIdeE0Dwz+Mpi0706VlKt58F8ezI/3R
-xlBy1PGXHOFcKG1O6YFn6nQ2Zrv29E+aXko3zuHp8a+xYGf5/raHXm8lsXMf0t1/MH3pVirMfT8L
-JuUlhRRaLAqWdZR6LEVEaojFYuHM0wcTExXDuHHjmPr5SjqemkhErL/GXdYyXq9JQU4Zc6dsI8SS
-zjtv3kuXzl2xWHzTH2MLTaBXOw+PvPUy+b07kBgRSHnuTtY6ojl7eEcC7YXgLmD9kllMDc3EDkAg
-aa3TgDJ2rF/Mr1P9Cdw3btFiJ7phG1qlgukuZ/PCP5hqXVspzAWS1qH1MaqyktJvFGcufYaXn3mV
-fqc0xV6axeKffqfR8FEMSA/Fs/jIVwc36Mm/b83knYlv85+1bWkY60fW9k0s+nEq8aNuoEWsP+7i
-nfy1ZCtxrdqQEKKF6OsCBUsRkRpkGAadO3fhxRdf4qGHHmTqZ7/RrGMorbvGYde4y1qhrNjNykW7
-2LishO7tTueGG24iLS3Ntwuh20LofOGtPNduMTOnTmfhJvCLbMP5Y4bRJD4Uw2Wj31lnYl+xm6UL
-d++9KJLglDRa9RtEX/sKVi9d9Pf9LE6aWBrRPC2KHhddSenWTBYtzKz0gpEENUknvUVfRjkqiAw4
-fFyw+cVw/vW302bOb/yyaBmlZjBt/u9W+pzSnCDDwJXQjmuvTyDJ/zBruBo2knucx60pG5g3cQoL
-FxZDRDIjHnyJti0b4g+U5+SxfuVa7E1aKFjWEQqWIiI+kJKSwlNPPc20adN48pnxrF60jG6Dkkhs
-FIzdacOXGeZkZJomFeVeMjfk8+uETUSHNeTma+7gjDPOJDIy0tfl7WELJKVVT1Ja9Tz0nDOUU4Zd
-ySnDDnNd2jCaHfbEHl3+7zq6HPFsFCOaHr0sR2AUbfqfR5v+hykrthWX/usoF1scRCSkc/qYdE4/
-3L0jmjFiTLOjFyC1ioKliIiPREfHcNFFFzNs2Nl89NGHfPjhR/zFTkITKohvFER4lB8BwQ5sNgtW
-q5JmVXJ7TNwVXspKKsjNKmP7xiJyMiw4jHDuvvUxzjlnOBEREb4uU6TOUbAUEfGxgIAArrjiSs49
-9zwWL1nM1ClT2ZqxiY0bd7Fhy0ocTgs2bQdZpSpcHrxeCw0TUwkPaEzX9BR6Xt6T9u3aEx0drf2/
-Rf5HCpYiIrWAYRhERkbSv19/evboSX5+PoVFhWzftp3c3BzKyrRrT1Wy2+3ExMYSEx1NWFg4oaGh
-OBwawyfyTylYiojUMn5+fvj5+REbG0tqk1RflyO1mbeCguxMlq3YQHGFSUBkIs3SUogKtlKQuZZF
-qzMo9xy0rJU9lvZdWxDlD3mb17BsSympHdoSF7gnElQUZ7F8+VZCUtJJiQoAwPRWkLFhI66geBpH
-29m6YiHrduzb7cdCQGQCaakpxIQ4AS+5W5Yxf/XOvecN/IJiaZLehLhQPwp3rGP1djdNWzUlzLnn
-NU2Pi80rV5DvTKBFkxjsWiWhzlKwFBERqYtMNzuX/cw7X82gCH+C7CYeTwXflqdx+W3nEpK9hcUL
-F1JcnMP8CVPYldqTMzskQkBzUto1JdLIZdILT/HUL+s595mPubN/ElZMCrfM5aGbx1Le/z4+eOAc
-ImwG3vICvn//LbY1H8WdZ0Xw3+cfZGpRM/q2icdmevF4yvmmNIUxd44kPdzL0m+f4YZPTc49M51A
-TEp37yI/tjM3X3kO1vWzeerRn+h9+yNc3z8NAyjJmMdj/36WuNH3kpYcg/YOqLsULEVEROoidxnz
-p/zMypKWPP7ASBIDLZTsnMfYkffyxdJ+3N37NG5qexqUbuGdNRksG3gZd1/aae9alSZFm9czrSCS
-fv1Lmf7jbC7pnkiDfdvnmLv4/YMX+HhAJ64+teGhu6k4Yuhx1uXccXFb/PBQmruOt+55kKc/b8lz
-V7YBw0GjjsO46a4hxFi9ZC37kWv//R2z+vXn4i6DufL0BTz4wif06XAvrUKLmfnFR2xqOozbzmxD
-gE29lXWZficQERGpiwwDu9PCrg1/MXPOMjKy8zHDO/PktJ+5t3fiUT/gTU8ZiyZNpszRiJHnnEXA
-ku+YuTqL/Q/No0/jhsta8vn4F/ltTS5H3STKsOIf0ZTh53Vj5zfT2JTjPujFwPRaCI2PITLMicUZ
-xYDLb2RE+HQefPpzpn/1Ns9NCeGBuy8gLUzjXOs69ViKiIjURTZ/up49gqG73ufzFx7l/UB/GsU3
-pd/Z53J6z+YEHaXnz12Ww5+rttOg81CSW8fSI30aCxduZGib6L0tgug8ZCRhGU/zwcdTaHFTn2MU
-YxAYFUtY6R/kFbnA62L97A957IG5BOFh5+oVFDU6k5axQXtaB6Vw0S3XMPOax7hxagIj7n6ILgn+
-VfLXIr6lHksREZE6yUJoUgeuuPMRXnhhHP8efQ6twnbw0n0P8PGcTNxHubI0ayXrNpbRrm0D/J3h
-dGmdQOZfi8gt+fsqR2gKF1w2jKLp3/D1vAyOtbO96fHgsdiwWixg2Ihq3IkBg07n9NNP58xBncmZ
-+xOf/LFhf+3RzfszrG9T/JK7cd4pzdXTVU/o/0cREZE6yFtRzIZ1G7HFpNAopSWJKS3pd8ZpJFmv
-4s0fV3Bu9wZEHXb50xKWfP8lk5evYuVdl/Iu4HUVsGZzFJMuGsI5oXubGVYadTuLe0Yv45rHnqVR
-vJ3mzY9UTTkZq1aSl9CSuHAnGYaV0PjmdO7Rkxgr0DUdc9Ui3l6yjtvPTMcKWKxOQkPDCQsNJUjr
-tNYb6rEUERGpg7zleUx+52kefukrNuwuA0zKcjPJ2O5Px26NCDpCVjOLNvLzxG1c/NTHTJw8mcmT
-JzP5uw+55VQLP89ZQ3nlxtYQOpxzGRcmbmLCj3+BeZh+S6+LrNV/8P6P2+j9f31JDDo4WpgU79rM
-wm3+dGiapOBRz6nHUkREpA6yBcRy/uXXEPXzJG6/eBh5FeU4m7TjnP6XcN3AJvhVamuxWrFYDMBL
-7poF/FHemsd6p+C3d4cha0gSQ4Z348sPFrO1bzMsVsv+3YesoWn83x038cvK1/beAyyujfx3/JXM
-fDsQC1Yim7Sj/7nXcFG/FJxUYJguFn1zH+cufRa7YRAY2YgO/S/isr7NqDzy07BY9jw6l3pDwVJE
-RKQuMmxEp3flgvSunH/t3z2Jh2xH6d+Qy97/ANMwMICIDpcwdap5YDvDj7Rh9/DHWWAY8MXXgyud
-txDX7nx+XDgC9t7jrnf+4M6Dy9nf3kmvG95n5/WHNDggVGILYMjtLzHYNNAOmvWHgqWIiEgdd8y9
-zQ8KdUdqv+/w4c4fGEQPComHtj7OsKhQWd+o/1lEREREqoSCpYiIiIhUCQVLEREREakSCpYiIiIi
-UiUULEVERESkSihYioiIiEiV0HJDIlJrGYaBZe/iycdcTkVERHxOwVJEaq2HH36Yhx9+GFCwFKkt
-XC4XM2fOBMDpdNKzZ08fVyS1iYKliNRaCpMitc/u3bsZOHAgpmkSHx9PRkaGflZlP42xFBERkRNi
-mub+L5HKFCxFREREpEooWIqIiIhIlVCwFBEREZEqoWApIiIiIlVCwVJEREREqoSCpYiIiIhUCQVL
-EREREakSCpYiIiIiUiUULEVERESkSihYikiNMIszePvqIcQlXcHiYi8ArnUT6Gy1YrFYDv0KS6TP
-Jffx6cyVuLwH3auimIyVv/H8PTfSs3UDLBYLzuiGDL36YT7+ZRH5B18gIiI1QnuFi0jNOcwWcKYl
-jPZ9h3Ja98Y4K203XFGazV/TPuHWq1cR+s17nN4kGAMwKwpY8tN7jB//JmvCWtNr0CUMPNeBx1VE
-xqqp3HL9RBZffj83XTmQBkF6ixMRqUl61xUR37KF02HgaO68tS9h1r8Pu8uLyBjUltFXPcYbE5bQ
-49+nEGqY7Fw+lWcffZedzUfx3kNjaBoXTqDThqfCRUH2Rs765DmufeYRgpMbcPuw1vjruYyISI3R
-W66I1Eo2RxBJLVqTHmJj+1+byS83MT0FTHr3PVYnnccLj99I+0bRBDr3/H5stTsJj0/n7Jsf4Z6B
-Bh++/h6LMwt9/KcQETm5KFiKSC1k4iraztyJPzF/l4fWp7Yk0mHgdW1h1m+baNm9O42i/A97pWGJ
-ot/QAQQsXci81btquG4RkZObHoWLiG9VbOfHN25jzcQwbJXGWLrLC9mxPhO/Dpdy8/AWBBrg3p3B
-qmyDTvFROO3G4e9nQEiDRiTYSti5qwhzzyEREakBCpYi4mMmpunB43EDJuVFu9m4cgPOtsP498sv
-ccHAdsQGOwCT0qxMNlSYdDrGHa12J3ZHMbvy6+ajcNM0KSoqoqCggIKCfLKysn1dUr1ks9mIj48j
-ICCQkJAQ/P0P3wsuIsdPwVJEfMuewJCrn+XJW/oSZnFTsH0V3zw9jqeXBRMUFEpIgHNvQwP/+GRa
-WN24CkrxHKUrsqKkkNJiP2JCg2vqT1EliouL2bBhA7/+9isrlq8gv2A3prWMLRkbsNusx76BnBCL
-xU5SYjIVpVYaNEiie/futGvXnsaNG2OxaKSYyP9CwVJEagEDwzAwLHZCE1txwd13MWPYCO59yEJ0
-0iMMbR4NgCU8kWYxBrs2b6fUZRLsd5hkaUL+1q1kOqM5Pzm8zjwG/+3333jrzTdZsuQvWnaOoUGj
-CFI7RxIRFYzT2QqLVUGnqnncXooKS8nelc/Wjat46Y3p5Ge5GTp0CBdfPJK0tDQFTJETpGApIrWM
-gV90B+4adwsbrxjPA8+2p9crVxHmMDAcyQy9rDvXv/8fvj+zLZf1boIF8ObN5f7bv6fZOWfSK93C
-y69+RdCAKzi1aayv/zBHVVxczOzZs/ngo3dZunI+fc9ow72jhxESHohRVxJxHRcRHUzDlBg6dEvD
-6/aya2c+Eyf8zrnnf8KAfmdy1ZXXkJaWhs2mj0uR46FfxUSk9jEsNO5+NiNH9CDz2zd5Z942PIBh
-cdB56CjOSszmlXGP8fXsVewuKgdbNI3CN/PSgzdw5eU3MamgDVeOPofG4c5jvpSvZGVl8cSTTzDu
-kXvwjyrgtnHnMmBIB0IjFCp9xWKzEJcYziVXD2DMraexeddC7rjrZj744AOKiop8XZ5InaBfwUSk
-VrIFxXPWqP9j8g8388lzXzCo+bW0inQQltydm8fdiXfcOG689AIax0YQ4LBSXrKbjDUrmJ9fTmyL
-BLyeCjxeEyy1L6Vt3LiRe++9l2L3FoZf2pEm6QnYNIay1rDarDRr2YCkxtEsnLOWV954hm3btnHb
-bbfh5+fn6/JEajX1WIpIzbA6iUttSdeuaQTuDXsW/0ja9+xEWlIYh6weZNiJansG9z98BUFlC5g2
-bz2lXjCsfjToNIynvpnOlFfvo1fLWMrLy8G/MSPvfotJ0yZxc38vL11xFQ99Nh/z0Ep8at68eVx3
-/ZVYgnfxr5tPo1mrJIXKWiog0EnPfi25+o5BTP7tM266+Ua2bcv0dVkitZp6LEWkRhh+0Qy5/QkG
-m8b+R732xN68ObUXxhGf/frTasT9/HaeeUgbqzWIVv1H8Hi/8yq9iIEB9OvemWHn/0VxQqNaNXln
-9erVPDjuPmKTLQw+ryt2h96CazvDMEhsFMWl1w3iPy9P5cknn+T++8cSGRnp69JEaiX1WIpIDTIO
-GT945FB5fG0Mw/j7a+8xe0AEzU/pQ6eUmH9Qa9Xavn079913H7Epe0JlQJAeqdYl8UkRjLyqL4uW
-zeC9997b00suIodQsBQRqWYFBQWMH/8Ihe5NnH1RD4XKOqphSgwXXtGL9z95hYmTfsI0a9tACxHf
-U7AUEalmv/32KyvXLuDsC3vo8Xcd1zA5hrMu6M4rr7zIli1bfF2OSK2jYCkiUo0qKip49/03adO1
-AYmNonxdjvxDhsWg8ynpGM4i3njjDSoqKnxdkkitomApIlJNTNPko48/YnvWRrr3aYFVs7/rBYfT
-xrCR3Zkx8xcWLVrk63JEahUFSxGRapKTk8NXX33F0PO7EhiscZX1SXxiBJGJVqZNm6ZeS5FKFCxF
-RKrJkiVLKCzJokXbxr4uRaqYw2mjbecmLFoyV7vyiFSiYCkiUg1cLheTJk2iYVoITj9N2KlvDMOg
-aYtE1m9dyapVq3xdjkitoWApIlIN8vLy2L4jk2atGhzXWp1S94SEBdKwURSLFi3wdSkitYaCpYhI
-NcjLy6Xck0dsQrivS5FqYrVaaNUhhW+/m6A1LUX2UrAUEakGGRmZ7MjOJDgkwNelSDWKbxDOzl27
-KCgo8HUpIrWCgqWISDXYtWsX/gF27A4tMVSfhUUEYVhMSktLfV2KSK2gYCkiUk1sdisWi95m6zP/
-ACcej5vs7GxflyJSK+gdT0RqrQceeACn04nT6eTxxx/3dTkih/Dzd4C5ZxUAEQGtgSEitZbb7aa8
-vBwAj8fj42pERORY1GMpIiIiIlVCwVJEREREqoSCpYiIiIhUCQVLEREREakSCpYiIiIiUiUULEVE
-RESkSihYioiIiEiVULAUERERkSqhYCkiIiIiVULBUkRERESqhIKliIiIiFQJBUsREZE6aOfOnaxY
-sYKSkhJflyKyn83XBYiIiMjxcbvd/PXXX0yZMoXJkyeTlJTEo48+SkBAgK9LEwEULKWapaSk0LVr
-V1JSUjAMw9fliNRzXnasXMvMiUuY8stasvIhqWUL+p7bnn69GxLiKGPxW98x/uPVuL3moZcHhNH/
-uhGMGZqIH262zpzL869vZcRjZ9Mtye/vdmYpS975jld+sXDJuMH0SA3Asu/H28zny/u/Ynun07hi
-WANyZ81g/N0/k1n55QLiGTy6C736pdMk1h+rAWZhFp8/+DVfztuOZ187hx9NTu3ORRe1p21qMKVb
-1/PWU9Nx9hvAv85qiJ/171u68zJ5+8FJlLU/lX9d3IQQe/14v3G5XOTm5rJmzRpmzZrF119/zV9/
-/YXH48HtdtOnTx88Hs+xbyRSQxQspVo98MADjB07VqFSpAZ4cjL4+Jmp7AiLo+PATtitUF5UwMy3
-J5HtOZtRgyKJbtOMwRUReE0TT85Ofp+ZS4s+TYkLtoDdn6ZNgrAB3pJiFs/ZQnHhNqZM30G7kY2p
-FC3xejxkbV3HpB9SaXplW2IC/x5Z5Sn34PbsSZKm18QWHk2P7slEBu1Ngh4Xm3+bzSvLcrny+h60
-SPADTDzlkNC5De1SAve2c5O1bg0fvuklZmxvGjRoyDlnNeLF92cxq3k4p6YHYwVwl7Jy0jyWWxpy
-3ZmNCK4HoXLnzp0sW7aMmTNnMn/+fGbNmkVOTg6meZhfCERqEQXL+sIsY9XE93nuze/IqKh8wkJE
-SieGXTySszo3wWGr2jfc8oLNfPD0YyyKPJNHrhpMeOUuhL0UKkVqgpudi1eywdqMa//di/RYP6wW
-cLtKWP/jNF74fjUDe/amUbf2jO625wrX2oWsWLOeAf83gM5J9gPuVpyXzeZCOwPPb8GMP1ayYWAD
-WsQc+JERmByPa90aZi9NYmjXqL97LQ9gEJTUkDMv7U+LOOeeQ143O1au4f2X5vDzzGTShjdmz6vb
-SRvYg0vPiMMAML3krVnJS48vYsmmUhq0DqJRr06cOmcCk79YRtqNnUkKtZC7dj3f/1JM/ytOJS3a
-Tl19x3G73SxZsoRp06YxadIkNm/eTGZmJuXl5b4uTeS4KVjWF6aHvK2rmDFlOq4mTYkO3PchYbJr
-x9fM/vJTJt72Ak/fPJBwa9W97XoqClk9fwYzEltS7tZv0iK+YyEgIhhb8U7y810Uh1oJDrBjcwbQ
-9OwhPD8Y7I7j/dn3su6PFWQZ8ZwzKJXCOd8ya0EWTQbF46w05TOyWRvOaZ7FhE/n0iLtNNIi7Ue+
-5QGl2ohrnspZAzfy1oKN5A9tRNQRmlptVqyOQML29nYafqH0G92TjeNn8O3kGEb1CWDSZ0twduvI
-ae3COfRX29rN4/HsHzP51VdfHfCY+3hMnz6dFi1a1Ogv8KZpqudUjkjBst5pxf3vfsPoTjF7vzcp
-y9/Kzy/fz80ff8j0Yd0Ylhri0wpFpDpYCE1vzmntM5j42g/8ER9B48QwYpMTSWseQ3yk3/H35LkL
-WbMkh0Y9OhIZEU2nvg34bPpadvaIoWFopehmc9Ksbwc6zZ/EV1+t55pLmxF6nNkSi5WwhHDMKbvJ
-KfUSZQNws+mPBXyVFbynjcfN9s07KG/elGYJjv2XBiU0YtDgTbz+w1/8XGJnRXEk55+ejH8dfARe
-UVHBqlWrWLt2LTabDZfLdULXe71eSktLq6m6Y7vooot89tpSOylY1keGUem3VwP/sCR6D+6H88Pn
-mLd6F2emhux57OQuZvPapfz44Vv8uGQHEM1pl13G8AHdSQr7+02c8hzm/zaRT9/+hJXFUQwYfRnn
-ndbjwDaVle/gs8ce5ofsJK686UrSS2fy4FMz6HvLzZzdPmHvPzo3y354iSd/h5tvuZJWITl89PSj
-LAg7g3vOasiXH7zNlD8L6T9qDCOHnkJsYF3rhxCpeYZfOKdddQbN1mSwavlOtm3ZxOwJc/BGxDP0
-hjPo2zb0OHr0TArWrGHBtjAu7BiNn8VCQosG+P2ygtVbi0gKDT0goFrDohh4XjqPPTaLX9vFMKTT
-8f6sGtgDHNhcbsoqzL2fRhWsmTKLlVMqNXNE0mdMBwIqPWkxbA5ST21H/78m89MUDwOvHUyzuBMI
-zrWIn58fF154IUOGDCEzM5N58+axcOFC3n77bYqLi495fZs2bbjllluIiYk5Ztvq0Lt3bw13kgMo
-WJ4EPOVFbFmzFjO0Paekx2EHvK4cpr41jntenYI3MBiHxQDPNl68YwwT+t3Cq09cQYtIO2VZK3n3
-kTsZ/8NqosJCcVp28NpdY/j82/9n777Do6j2P46/Z3t203sIIQkBEjoCoRepgigqYi+g2BWx94ZY
-ruVnR9Gr117wCiIqgiKgVOlFeu+E9IT07M7vD3oT772BDeTzep48PtmZOfPNGmY/OefMmVt486Xb
-aOQ89Ewmpdnr+PatZ3hmfDa3PXcnrZLDyJu5md+nzibx6hsxD9k3d8ufTJltctWNFXgD9rBm/m9M
-yNtK1qQCVmeV4zQqeffR6/hq3I288dIdtE0IOi0/OKRqDB8+nOeff95v5587dy6NGjXy2/lPyPSS
-vz2bPQGhpLRsSEqLNHymD29pCZumz2HkKzOJfak3TaJPcNmvLGL5zytZtXodwy9dhMUwMH1eKipc
-lDXaQqe0JgQclh2thJ91Fhf328boL/4gKaYlf2+U1Mee3QWUhwYQ5raw9+IQQI/Hb+WmXjH75lh6
-ydu4gX+/9QdjG0RxVaeIA9cAe3AYTc8KY8JyHw0bhuM4jVdlNgyDoKAg0tLSSE1N5YorruCxxx5j
-3rx5fPbZZyxatIiMjAxycnKOOjY8PJyzzz6bpKSkU1+4yDEoWJ5xdvDTpyPZPWXfXZWYlOZv548Z
-S+l01aO0S9z7euGOxXzx4TQSzn+YNx67nIRAO2ZJNt+9dS+DPviOGWv6k9Ymkj9/Hs2oMevo9/jr
-PHVlT2Jdxfz+xfNc/8CXjJ3ag3q9HQfCYmXxLr7/4GVenpDNkCdHMKR3Ki4D8v527WVsmr+cNk+9
-zPe39ad2QCl/jH+XO578ig/Ht6XxTd3OiLs95e/r3LkztWvXZtu2bVRUVFBRUXHig06S/XPZqi1f
-MUs//Z4fnO15dFgjgq0GVqxYPYHUb5VExIcz2JZVRuNo21/8gWZSvH0nsxaW0qpfW2ofGPY2Kc7I
-YNHcdWy6JI2GR06INBw069uGFUsn8+P3K4koP3Gy9JYUs25FJp74uoQ5DNg3Amy123AF7L8Bx05s
-o2S6tFrKF0szKe4UgeeQNvb2lBmcSR1mhmFgt9tM8xWBAAAgAElEQVSJjIykb9++9OrViy1btjB9
-+nSmT5/OihUrmD17tr/LFDkuBcszzha+fuNp/n3oldY0MWN7MLJpHQL33RUeEJnG7S+8RUij5sS7
-fGxfvYgt2btY8NtCSoojKCwup7wkl1mzprMjqQc3XdCZuCA7EEKHi4fxZdw5BNRLxGbs3NezUMDM
-z1/njV+KGfzY0wzu0wzXf3yxd5DY42IeHXwuCcEOwEHrc65k0ORfGPn7LHZf1ZGgUOcJW5EzR58+
-fRg9ejS5ubn+LoV+/fr5u4S/Zg2gfvtksl6fxb8buLioWx3CPVZKcnNY+tMysqxhxIY5/rrX36xg
-+5L1bA+vwz139qJ28MFgWZaxmQ8emcIfy3Jp0C3oqEMDomLpeWEDXntvHqvyTFp2+YvTFBcwf+Ic
-flhYSpebE3HbLQeC5eE7esnfvJ05iwsI7RTAcSbfnNFsNht169YlOTmZAQMGsH37dv744w8WL17M
-+++/7+/yRI6iYHnGacOo30dzdcuofd+blOZtZ8737/Lk3XfBW+9zc+d47O4wwoPz+PSBC3j7p8VY
-g6OJDArALMrCzLWTm1FIaXEJWzZmENdwALWDDq5gZw+Mo03vOABKsncCPvKnfcZDPxVQElSPMqsT
-p/W/GZcKolHjxtQOORgebc4QGiTWoWjGRrYXlZGiYFnjdOjQwd8lnCZsxHRux7Wrc/jqw7FMfrWY
-8goTm8tJcGgM59/Tn8axf31nTWVBAQuXFNGwazqxgYeOdxs4o2M5u3so74xZQdfWrY861rDYSWjf
-gms2ZfDiJxsO2eIjc/5cHrtkwcG5eE4nkbERtBrYk56to/YukA5ACb+OeIepz++/fhg4AwIIatyc
-+8+pxd+9L+hMdORw+ZVXXskjjzzCjh07iIw83j31IqeeguUZx4IzwI3Hc3DAyONJpd+Q25k3eiAT
-f5jHgPRaeDIX8PqDw5lBMlfddCepbbrTrn48exa9Tf9bp+5bSsLENPde0P6689FLkRnONQ/dhWPy
-p3z14bec16YuaZGuvzzqWI6cBG6aXorLiik1XWhxC5G/ZljddLruPBp03MqcBVvJza/EExtNk9Yp
-NEwOOmqdSWtYDN362YgN3hvkKn0+opum0KJdNEf9bWi4aNCnLb3IxCy3EN28IT1Kow5bNN2we2h2
-QSeuqYgiqEEQNiCwdgK9ruxI/qFtRcTQuUMyCXVCcO2/KcfhpmGPs7igfgG+AzvaiExIoEWnRGqH
-HhkrLYTUrUvv80wiAs6gsfC/Yf9weVRUFFFRUSc+QOQUUrCsKWwBhATZKdyyi6JyL/lLpvLL7mBu
-e+0ZbunRYO/NO5gs+/Pgr4TV5iYwzElmTg7FXt/x28ZOXMeLGXbVlZSn+pj10Kd88Ht/XhjQlOP3
-W5aTn5kNhB/yWhmZBXmUew+5xcfnpbC0nMgGDakVoN5KkROxOlzENanPRU3qn3BfW2Q8518Rf+B7
-V1g03S48/t3Ftoh4+l+1b//Is4g/xj7WkGjOHXKwjeDkulx8Z90T1mI4Aznrwg6cdcI997MQlprG
-gNS/fYCInAKn8X108neZ3nJy1y5i9oY9xKUmEey2UFlSSolpxeGw7x2G8pZTsPtPxo6dTP6+XOcI
-jKJzensCpv/M+PkbKfOagJestb9zR+90ej/8KdklXkzAcLoIcARQr/P53NG7Fj++8Ba/bi7EBKxO
-N56SHDas2kRhmQ/TW07elsX8+vvqI3oh97Dg5++ZsGTfubxlbFv9G99P2EiHjm2ICazJA2EiIiLV
-n3oszzg7+Omzt8maFnjgFW9JLqv+mMSimM68emk6ETYLRlo6La3jeP/l58ia0wB7eQEbV29gTWEQ
-ic6CvQfaPLQ89yLOnzKTV596hF292hDuKmf97GlM35LIsIfaEew8fMa9JSCe/rfcwrhp9/Dux9No
-dv+5BNdrQ/c2Vj4e9TyurHnEOYrZvG0b68qO/LvGRqhvHR8Of5R1nVsRRj5zp09iSeLZjDw/ncDT
-eT0RERGRGkDB8oyzha9fH37YXeHOWqmc3/8KXhoyiF5pEViA8LRuPPz8Hbw14mVGPPIF8Y36cOWt
-g7mpnYtRQx9h09YdlHtbEF6vEw8+9xLRH37MZy88zOpiN60vvpFH37iBfh3rYt+z8oj5lwYBddpz
-2+Ae3Pbmx0w85yyual2PwY8Nx/reG7z60giCEzpxw2P30SPFy7DvDj3WTlyHixna3uStd15mxkoP
-F956E2/cch1dUsLUvS4iIlLNKVieKSwe2lz/D+ZdNeLom1wMC3a7E4fDeiAEWuwhpJ97E+/3GMTb
-Xh8Wix2Hy4HVMHlzcid8VgcuuwG4qNW0Jw+90IW7nx6FD7DanTgd9r03Ajga8cyYuQw3HAS4bAdq
-6XjjC8y5phKHy4XNaqFB+wt4snVfHnyrEsNiw+lyYni70ud2cLmcVOTv3FuqK4KO19xE/+sfotJn
-YHccXreIiIhUXwqWZxCL3YnH/vdvcDEsVhwB7iPWhjNwBriP3BOr3Yn7WG0bFpwBnqNetlgdeDyO
-w/azOVwEHnoyiwvPvmmThy57bVhsuNyaTykiInK60eiiiIiIiFQJ9VhKtWCxuoiv35jG4dHYrRr4
-FhEROR0pWEq14AhOZugro7njhIuxi4iISHWloXCpPhQqRURETmsKliIiIiJSJTQUXgOU5WxkwsRf
-2LCz8BhbndRt04WOzVOJDvbXIxN95G1by8YdFhq0ro9Hf+6IiIiclhQsz3gmpbtX8sEbzzJh7tZj
-bLcTU68Z3ftdz0MPDqJJrPuUD0ebuSt49c5H2Jg8iH+0qIfHoQFxERGR05H6hmqQ1g99zc68PPIO
-/dq9irdv7ci80aMYOfYPiit9p76wslxWLlzJ7lI/nFtERESqjHosaxCr001wcDABh70aTN9BtzBv
-xlS+mjWPvGs64Qna+/dGZUkmy/+Yw/ylaymyhtOsaw/SG8TjOeSZ3SVZm5g7ZzZL1uwEZzhNOp1N
-eoPaBAUc/NWqLMlixdw5zF+yhkJrGM279iC9QW08DoOijNVM/GY8qwtzKVvyA++NsnHVNX2pH+Y6
-NW+KiIiIVBkFS8E0ffi8Jjarbe9jGgGzaDMfP/sYb349hXWbd1JmCSSxcTeuGPoAD13dHo/doDxj
-Ic/e+jCj5y5g045csAeS0LAtF9x4P8Nv7EGww4pZtJlPn3+C10f/yvpNOyixBJLU6Gwuv+N+Hrym
-HXu2LuSf733E0pxsmPkJw1fk0LR3FwVLERGR05CGwmuQop3rWbxwIQsP+Vrw+4+8MvwJPpsXypXn
-nk14gA0qc/ntn8/z0o+7ueL5r1m1I4eMrYt4+YoEfnlxBB/P2YrPV8iCb/7F6IVw9z9/Y0duLhlb
-FvL8gAasnLWATYUVUJnH9A9e5MXxO7j8ua9YsSOH3duW8H9XJ/Hry8/w0aytRJ91Cd98+xkXJtSl
-xw0fsWrNl1zQINzfb5WIyN9SUlQGhgWP5+hH24rUROqxrEGWvTuMju8d+Wokrbp3YfCDj3LjuU1x
-Wg3Kdqxl7I/LaTloOEMHdsRtAIRy/s3D2LLgOj76ZjZXtutO1tYdVPrsOIMCcDk9BIWEcNkTb3Gp
-aWAYULbzT779cRnNrnmCOwd2OtDOeTfdydaFQ/jw37O5umtdQj1u7BYLNoeboGAPNotu3pHTn9Pp
-pKK8Eq9Xc4fPZMVFZVitFkJDQ/1diki1oGBZg6Re8TgjLmuJAyjatpgPPviaXcHdeerle+nasA6B
-TgvgI2/XRtZkbmfj189x5e9vHGzAV8q2pavZHb6ADYXn06xrB1wfvsSzd1zD17VS6XvtVfRu04x6
-ydE48JGfsZHVu7ex/pvnuXLmW4e1s33ZSjKCF7Ah9zJanuo3QuQUCAsLo6iwjPKyCtwefy3lJSdb
-QX4xhqlgKbKfgmUNEpbalvMuOJcAwPSdQ9umSdx795OMeKchqS/eQIrTgUEl+bu2UZCVS4FrJ1vK
-j/hADE+gQVwQhs9Jnd5DGTcmmXffeYcJ82fy+gMTeTzPTcdLhvHK84OwZ2zf244jgC0VuUcUU5sG
-McEY6syRM1RCQm1q10omP6+I0PBAf5cjJ8mG1Tto3749Tqf+eBABBcsay7C4qNvuPIZdM4fBz77G
-/6U15NnbzybcYWB3BWBzRnPpiC959fKmx1jXcu9QN9hI7TSQl9P7cPe2raxZ/Bujx3zPz9+N5NVO
-rXkweW87Fz/1GW9c1eK47Zi7Tv7PK3KqRURE4rSEsWXDbhLrxvi7HDkJKiu9rP5zG5ecfx6GoSk8
-IqCbd2o0wxFOx0G3c1WbAMZ/9RHT12Tiw0ZUYiqJtazMnLGEzAowDGPvRbMsk5/feow7X/2ZnKId
-jH32QW5/+WfyHYEkpDSkx8U388qI++na2GDJ+gxC6jQgMd7GjOmLD2+nPIvJbz/B0P+bSI7p73dB
-5OQIDAwkPj6ejWt2YZr6RT8T5WbtYcvmTJo0aervUkSqDQXLGs3AEdaI64ddR/z6Kbz5wY/s3uMl
-MLkt99wygOJfhnPr8Hf5deZ85s/9nfeff4iH35pCeN14QgNCSKnr4PdRD/LIi5/y+5yFLJw/i7Ff
-fcHiHRFc3LkpkUnp3H3LxVROe4abnxrF5JnzWTD3dz74x8M8/MZkQpPjCTHACI0mNd5OQdYm/vxz
-A3llXn+/MSL/M7vdznnnnceuzaUUFZb6uxypYqZpsmLJZpo3akNKSoq/yxGpNhQsazwLSR0v5ebB
-LVj87w8YPXcTXksgLQbczojb+lMw8RUGdmtDuy59eWlyLr1vf4Tbz0nFYvHQ7IIbefDyliz95EnO
-7dCa9E69GDEhk75DH2Rw5yQMSyDNL7yVZ26/iD0/v8Yl3drQpnMfXpiUTY/bHuaOvg2xAjjj6NS/
-PRmTn6BPz7v5dWOev98UkSrRtGlTYiITmD9rjb9LkSpWvKeUxXM30LFDV4KCgvxdjki1oTmWZzwD
-d+1WPPbCe5TFtuBY08tt7hgGDH2OpK5bCU4MxQCMgDguvPUpWva4nLWbdlBiOIir35xGSTEEOvf+
-2hjuOlz+yIukD1jNhi27Kbc5iK3fjMZJsQf3CYjj/FueoHn3y1i3cTvFhoPYes1onHxwH4xgut78
-FJ+1GkBGWSRta+siLWeGoKAgrr/+eh55ahjNWtclPFK/22eK9Wt2Ur7HRadOnbBarf4uR6TaULCs
-AeyBMbTres7xdzCshCU2pUfi4fOErM5gkpu2Ifkvpg/Z3BGktuxA6l+sGWR1BJPcJJ3kJunH3ccV
-mkD7ngnHb0TkNNWzZy8+/KgpU35cRP8rOuBw6LJ7uisqLGXK90u54vIbSEtN83c5ItWKhsJFRE4i
-q9XKHbffxYaV+axYstnf5cj/qLyskp/Hzyc4oDaXDLwEm01/KIgcSsFSROQka926NQP6X860H5ez
-p7DE3+XIf8nnM1m6YAPzp2/i3nvuIywszN8liVQ7CpZyUm3ZsoXFixezdetWf5ci4jcul4trrx1E
-80Ydee/lHynMK/Z3SfIfMk2TDat38OPo+Qy97T7S09v4uySRaknBUk6qJ554gpYtWzJ8+HCt5Sc1
-WmhoKA8+8DAeey2++nAau3dp9YPThc/rY8PqnXz5z+lcOuA6Lr30Ug2BixyHgqWcVKZpHvgSqeki
-IyN57tkXCLIn8cV708jL3ePvkuQEvF4fC+esY9TLPzDg/Gu45ZZbCAzUIzpFjkfBUkTkFGrUqBGv
-vPwarZv24MVHx/LH9FUUF5X5uyw5gs9nkp9bxHdfzOL7z5fx6IPPMnToUDwej79Lk//Qc889R3Z2
-Np9++qkevXkKqC9fROQUMgyDyMhIhj/1NCl16zH6m89Z/McGuvdrQWLdaBxOXZb9LT+3iMVz17F4
-7iZiQhvw9tvDaXlWS61XeZpyu9243W5/l1Fj6AomIuIHdrudQYMG0aZNGyZMmMDX739FeIyLs/s0
-o0Gj2lhtCjGnkmmaFOYXs2zBRiZ9Nx+7EcKQ626iX7/ziIuL83d5IqcNBUsRET+x2Ww0bdqUhg0b
-MnDgQL7/YTzjPvuWPUWzSGseS63EcGLiwvAEuXC7nVismr1UVbyVPgoLiynMKyZzVz6b12WzaulO
-khKTeOyBF+jQoSMRERHqpRT5DylYioj4mc1mIyUlhbuG3c1VV17Nn3/+yYyZM9i4fiMrZm/DYjUJ
-jXBhdyjkVJXych95maU4HE4iIyPp0+0cHruvNQ0aNNA8SpH/gYKliEg1EhUVRbdu3Tj77LMpLi4m
-Ly+P8vJyiouL0OIKVcdqtRAUFIzT6SQ4eO9/ReR/p2ApIlINGYaBx+NR75mInFY0YUdEREREqoR6
-LEVEROQk8ZK1bh6ff/IR01dk4QxoxrX3DaZTkwRclXmM//gjihpcyGVdk7EbB4/ZMX88I9/4nNWH
-Pf3UTmrLwQy9uyWLX3qa95fuPOJcaQx5ahhdInbw3ttvM3Nl9oEtjqj23PngdaQnhWPFpLRgF4t/
-Hcu/vptBTlkIrXtcwtWXd6J2oIPizbN4/IUP2Ly74GDTztqcd91QruiRgqOymK2r5zB65Bf8kZkH
-sU24bMDF9O3WlEAtk6lgKSIiIieDSdH6X3joxi9o9+RjjBwWTvGmhbz25qPM6HEX958Xx5rF88l1
-dWMgYD/kuD271vBnZS0efvYB6kcGHNhid3jwODLZtGg2wQPf5R99kjh4S5sdT7CH0k2LmfenSb/7
-n6V/aiRQzuZZY3h96AhK3niaDuG7efOxf7C5Tl/ueeYVAst2MvndkTwwYhdvjrgCe/42Zsx0MnzM
-SNLD9sckKwGBgdi9e5jy/jN8scRO/2vv5/rUMPJ2LmfM80/y5Or7ePzG9oTaana6VLAUERGRk8BL
-9oalLLIkckfLusQE2zBDuzLoohyW+yyYvr8+2uIIICQ8goiIgMM3+ADDwBUUundJqMM2mpQCGA4C
-g8OJiIgAIKhrV6I/+4Xl23cTveQLZuW25sVn+1M/2AbEctnQIewYtZqsEh9xgGE4CQ6PICL88JhU
-umsx34zbQNenX+O8trWwAhERkdzwaCWfTd5DSbmpYOnvAkRERORMZCWyXnMalz7BA3ft4YqLLqDN
-WS1o2e9yWgKVxUcOZZ8sFexavoSc/GR6x/hY8slUAnu+RkLw/ghkEBDfmjsfbU2g20rBcdvxsmvx
-TNYGdODOtOhDAq2F8Ea9uLPRSf4xThMKliIiInISGLiTevDaJ+H8OGkSP416kpG7SohM689dD11H
-17p/3bOXN/NLrhswB7d9b4SzuAI579F3uLM9+EqL+O6xq1n5WgD7WwnpeCmv3DuYMID8WQwfchHv
-eByAia1BTx56/l461jX4rLAET6j7kKF3wOIg0A2wd02v0uLJDL2gFyF2A7CR2vo2Hh3el5xd26iI
-6EqIxwa+CuaPfYWn355EQXkR5a5WDH/3BXqlBFXlm3jaUbAUERGRk8OwEZ6SzjW3pXP1LfewbcUy
-vhn1MiPf+460x/r95aGhHa9g5ItP0jDq4FC4YRjg24rF5eGCEZ/yRv+UQ3oODQzDJC8TCOnAk689
-wcAmUYdsA8wcIlPiyM8qpBw40LK5hzWLthCckowbcLl78n/jXqJDuO2Q472UR0ZjZmdSVOqDQDut
-Bz7Idxc/QOnmidx6yRdUerXYrJYbEhERkarnzeOPj97grQl/YgKGxU1Ck5b06ZlOUHkO5ZW+/R2E
-x2UYxmFfR2w8YvtRBx+9zQimcYe2lP88g015FfteNKnYuYhXhr/OzG2lxzk3gJWYFp1Jq5zJ7BU7
-8R6yH+VlFP0379EZSD2WIiIiUvWsbmole/jlH+9gL7uYVvWicZTn8tuyQlr2vpCYICeYpWRuW8fy
-P204DQAH0XXiAagsyGLdqhV4M/Y/FcnAFRhJ7Vom+LzkbF7D8j9LDukhcxCVUIe/foaSjaRu19Jn
-1nO89sonXNm/Je7yXcz64hto2YsuqSGw4vhHe2p14K6ha/jw23f4MqM3LZKCyNy2iqkff4zR/3pS
-o12YFYVs2ZRJUO06hAfUvJhV835iEREROQUcJHS9lnfjzuLnCd/y8ZQ8bM54zrlqCJ0aJ+KmkJYd
-WrJt3m989N5v+46Jos8NN5Ce1JJuKdv4+euPDmnPSq0GPbhmUHsa97qA5asm8M81h54vit7X30jP
-2gn06tuFekfeTb6PLSCWax96jOa//sC3X33MHm8QTbvewFP9WhFlMyiNqM/Ay2zEuY4xqGtx0KjX
-YB5ouJJpo7/h3Z/zILI+5w57nQfbpeIxoDJ3HRNHT6LJNTfQITGImnaPuGGaevrsyRIREUFOTg5j
-xoxhwIAB/i7HLwYNGsQnn3zC9ddfz/vvv3/0UIaIiNQA5r5n3R89ZH14DDlku2keNVJ+6GfI0fHl
-GMPhJ6pqXxv/3WfTvp/JMKosPJaUlODxeDBNE5fLRXFx8Wn3uakeSxERETnJjh/6jhucThDYqiJw
-/W9t/OdBtibQzTsiIiIiUiUULEVERESkSmgoXERERPzDW8buHTvIKig+MJ/SERJF7egIAhyHPKyx
-spjtm7ZTERBNfK0Q7IcMQZvecvKzM8nKzqPMtBAYVYu4sCAcNoPyPTlk5FcSHROF02YBvBRlZbCj
-wEKt2pFYinaTURJE7VpBBwKRrzSfzbsriU8IxyjOYfP23ZRV7H/+pIEzKIpaceEHFm6XwylYioiI
-iF+YBZsYef+9TCkMpllSGFBOsRFEk05XcsPFrfY9+cakeOMUbr7mKSpTruKVkUNpFLovvngLWTbp
-K/49bztluzMo8pZSGphKj17nc1GPVLZN/5CHRmcw/MXhNIl2kL9xHq89/TZrYs7liXv7kDfuaR6e
-34cv376QGCuAyZ41E7n60a18/O1duOZ9xsBh39KkY2NCDMCspLg4lPYXDOTK81oRaNfA75EULEVE
-RMR/zEj63Pggj1yQBlSwYeJI7nj1azp0bkT7eDeYJayfOxejQ2cSN8xh3upLSW0bjxUv2X9O4pmv
-VnHZfXfTNy0Op1nI3G8/4MXPvyG58TAiYd/d6CYFWxby6tPvsDKqJ88/fDF1Q0zmcuw12g+94dwe
-1ZMnX3+UejYwzTKWfvsW//jxR9p1aEyzGPepeIdOK4raIiIi4nd7n3BjxR0cTKTbjdOyd6i5LGMN
-n/2wnXYdBtCyrp1fJ8wlt9QHZdlM+3IS7rPOoX/T2rgdVqzOUFr3G8xLw4fQNNazt2FfBVlrpvHI
-3SPIaHIZrzx+OXVDHP9pcRiGgcWwERDkwaCSCp9WazwW9ViKiIiIHxUw/6cveXtHLFDC2t9/Jvj8
-EdSLdgJedq5ZxEZnLPe0bUKopy0/f72ILbm9iXDlsWxzJXXT4w+bc2kPiqBeELDvoYula3/nhcf/
-YF1ZDPenNyLa89fP5jlSRd4ivhj1NlGWvT2W29bn0KFTH+ofZwH2mk49liIiIuJHVtzBYURGRhIZ
-GUtCYhTLx37M9DVZ+CrLWDV/FYExjUiOCCKhcWti92SycH02WG0EW+0n7CHbk++lVq8bGNo9iG8/
-+pwVmcX/UXWGLYDwyEgiIyOJik6g21WDuPrSNgQ5FKGORT2WIiIi4kceGnXsw6UXNgRMSnu1IvP2
-R5i1eDudogx+njSJGbumcdnc9zHMSnK2b2HWl224JP18GqbY+HTtRsrMxvueNQ6V2Wv4YvxMEjr0
-ozYQ3rI7dwy+hPq+5mQ++Dwvj5zAq48NINJhJzKuNt7CPEoqTLAagI+SPQVgNw4EJFtgGn0GXkp9
-Jaa/RXFbREREqo2SnB0UVARSJyGY7CVTWEYf/vXDFKZOmcKUqb8y4f0HCZg/hwU5AbS7rC+2FZMY
-PXcDe8p8+MpymfXTeMb9uBqfdW/Esdhs2G02AuObcctt55H73Vu89dMK9lRAWHITEksWsWDVTiq8
-PsoKdzL/tzU06NqYOAXJ/4reNhEREfGjXYx5+V6WfRUMmHjDkji737Wc3yKQBS/OJqz3UJrFe/Y9
-PtFB7Fln0y/5BybN30nnfj147Po9fPbvN7njxe2U2ipwJHXiqjuuo0NSCNvWHnIaw0F8m4t4eOhy
-7n35BRrWfoEBzXtw2+DtjHt7ON/m5VHpCSA+sSu3X5LOfzYTU/YzzKOf4i5VJCIigpycHMaMGcOA
-AQP8XY5fDBo0iE8++YTrr7+e999/v0qe7SoiImcIn5eignz2lJYfWPbH4vAQGuzBYYPSwnzK7EEE
-u2yHPDfcR2lBPuWOIIJcNgzTS8mePewpKsFnGDgCQwgOcGK1GHjLiyks8REY5MFm2duCr6KY3LwS
-AkJCcTus+LzlFBcUUlxWgWm14Q4MxuNyYDHAV15M7h6T0HAPp2I59JKSEjweD6Zp4nK5KC4uPu0+
-N9VjKSIiIv5hseIJDcdznM2uoDBcRx+EK/iQ1w0rAUEhBASFHLWn1eEm9IiVhSx2NxFRB9eftFgd
-BIZFEHis8hxuIsL/1k8i+2iOpYiIiIhUCQVLEREREakSCpYiIiIiUiUULEVERESkSihYioiIiEiV
-ULAUERERkSqhYCkiIiIiVULrWIqIiMgZa/fu3eTm5hIYGEh8fLy/yznjqcdSREREzljPPfccDRs2
-ZOjQoehhgyefgqWIiIic0UzTVKg8RTQULiJSjZmmSXl5OSUlJRQUFpCfl09OTg6VlZX+Lu2MEhcX
-h9vtJjg4mICAAFwu12n3jGaR6kDBUkSkGqqsrGTnzp3Mnz+PhQsXkbF7J7syt5KZmUGAOwCb3erv
-Es8YPq+PoqISwkPDiYqIJzamFs2aNyO9dWuSkpKx2+3+LlHktKFgKSJSzaxdu5bRo79iypSphEY5
-iK0dRv3m8XRPbEhgkJuAACc2m4JlVfH5TIqLSigpKWPbll1sWLeNr79dwKeffkTbNu249trBJCUl
-YbFo9pjIiShYiohUAz6fj507dzJu3Le8M8TpsZoAACAASURBVOotUlLjufrm7tRtkIDT5cBqtWho
-9iQKDHYDkFi3Fu06NaesrILtWzOYOmkeV197Oef06suQITcSFxeH1apQL3I8CpYiIn7m9Xr59dfJ
-fPjxB2Tn7eC+J68ltWESNocu0f5gtVlx26zUT0ukbv0ENqzdyrivp3D3vUu54rJr6NOnD263299l
-ilRL6tcXEfGj0tJSxn33LU8Nf4LE1GDue3wwjZvXU6isJqxWC/XTErnlrktp0ro2L73yPO++O4qy
-sjJ/lyZSLenKJSLiJ/n5+bz3z/f49LOPuPPhy2ncrJ7mTlZTQcEezjm/I8kp8Xww8iuysrK4//4H
-CA0N9XdpItWKeixFRPzA6/Xywb/e59fffuDB4YNo3jJVobKas1otNGxal9vvu5zfZ//Cq6++Sn5+
-vr/LEqlWFCxFRPxgwk8T+OKrT7nkmp7US6vj73LkP5BcrzY33DGAGXMm8/XXX1NRUeHvkkSqDQVL
-EZFTyDRNFixYwIsv/oNBN/ejSfP6WsbmNNSwSV0uuaYnI0e9yh9z//B3OSLVhq5mIiKnUHZ2Nm+9
-/SZpzWrRtlMzhcrTlGEYNG+VRr8BXXjhhefJzMz0d0ki1YKuaCIip9CMGTPYumM9ffp30rqUpzmb
-zUqPPm0xHGV89904fD6fv0sS8TsFSxGRU6S8vJyPP/0XXXudRe3EWH+XI1UgKNhD3/4dGffdODZt
-2uTvckT8TsFSROQUmT59Ort2b6Ftx+ZYLOqtPFOkNUnGHWIyddpUvF6vv8sR8SsFSxGRU6C8vJzP
-PvuMs3ulExoW6O9ypAq5PS6anlWPOXNmUFRU5O9yRPxKwVJE5BTYunUrK1Ysp1O3VppbeYaxWCw0
-apbC4j/ns2XLFn+XI+JXCpYiIqfAylUriEsIIzJKT2o5E8XERhAc4mHlypX+LkXErxQsRUROssrK
-ShYvWkxcQjiG5laekZwuB02a12fjpvX+LkXErxQsRUROsvLycjIzs4iODdMw+BmsUdMUxo8fr2WH
-pEZTsBQROclKSkrIysoiNCzI36XISRQSGkhJabFu4JEaTcFSROQUcTod/i5BTqLgkEDAVLCUGk3B
-UkREpAro8ZwiCpYiIiIiUkUULEVERESkSihYioiIiEiVULAUERERkSqhYCkiIiIiVULBUkRERESq
-hIKliIiIiFQJBUsRERERqRIKliIiIiJSJRQsRURERKRKKFiKiIiISJVQsBQRERGRKqFgKSIiIiJV
-wubvAkRE5OSrLMph2rhfmPVn9iGvumjcuwvd2iQT7rEefoBZzuZZs/llayBXDGyJx2Yc3ajppWD3
-TpZPX8CURTvwBkaR3q0d3dvE47Ts3T9n5SJ+mrWHLhe3IyHUvv9Aslcv5ttvVhPf+2y6N3Ixa/wf
-lCQ155x2sVgPnMqkNGMzY75eTdOBXWkW56Rw3WLe+XQupeXeg3XYw2jWsSWdu9YjwnXEzyEip5SC
-pYhIDeArK2bl3EVMnZ1LsGd/wDNYtHAty869gNtuakN0wMFBrPK83Uwc9zOjp7pIatWQnvXdRzRY
-wbrpU/jgn1NZn1lKWXklGBaWTJvOtH5Xcf9NrYl0WSjatZU/ZmTTpE86CaF2TG8FueuXMnLEtxQ3
-7k6PumEYlbmsnreCAl8SvdoeGiyhojCbuVNXENazI83iHJRlbuXXCfOwuF049pdrWFgyaza/Lb+K
-J4a2Icx+jBAsIqeEgqWISI0Rw/n33cCdA1P2hbdK1vzyE298PJv53RrQt1k4+yNZ3pZNZJSE07dN
-EVN+XU/7uk052Knpo2jDEt59ay6hnfrz/BUtSI4MwFdayMbF83j91YmMTophyPmJh53drCxlw6zf
-effNGbj7XMjdl59FjMdKRf5/9lNExHfhofevpGnEvoK8ZWxbMJPnnvuVaT3SuLB5CIqWIv6hOZYi
-IjWMYRj7vuzUbpZGQoyDwpLKQ/YoZ9Ws5ZTHtOL8S1uwfepC1mZVHNzs3cOS8b+T26gzg4e0ISXa
-jcViYHMHU79DZ24e3JY4p5dK36FnrWTd1Mm8OnIWji69uf2KvaHyf/8ZDAybi4TmDajvyGHF2hzK
-zP+6WRH5HylYiojUGF6K8vLYtSOTndsz2bl9J3O/n022GUnjOsEHevnMoh38MWM7iZ1SSenQjo7R
-25j022aKffu35/Pnsj00aFOPuMAjB74cNO7dnfO6JR7o4fSWFbJ+yk8Mf/4XLC27c8u1bYlyV+Fc
-SJ+P0j3FlBs2QsJcHGs6aE1jmiamqYQtp56GwkVEaowMvn/5JX74v4PJyxGawMUP3UhipHPfK5Xs
-+mMhawLSeaR1DHaHSas2tfhoxkp29UykbridyqIitpXYSY3yHLN3wmK34zjwnZfMBTP5x/xA6iSH
-kr9kA1symhMf8t8PV5cW7WDWT7+zxbP37L7SPayePYeF7iY80TSyRn+wVVZWkpGRwaJFi0hJSaFh
-w4b+LklqmJr8709EpIYJpe2AdHq2jt4XCE3ytm9i8Yy5zK0fSffG4VCSzYzvl7Blu5V/PbsNhwX2
-bN/C+s0ZLF3XjqT0KCxOJ2E2L7mFZZhw4oAYEk2Hc8/l6p4hTBj5Ax99PpcGj/Qg0vnfDZoVZC3j
-g6cXHTxxUCStO7XmumG9SY22/+WxZ6qCggIWLVrEjz/+yJIlS1i2bBkjRoxQsJRTTsFSRKTGcJPc
-siXnXVzvwJ3X3sIsQt74lvmzt9ClUQhFmzby++YCbMXlLJmTse84E19xEdOmr6VXy0g8IZG0Tw/k
-y6XbyOsaQ9hhY88+Nv06kY8nl3PFPecSgJWoBk25YlAXWiXaCK/M46X/m8w/xyQw7LJU3FYDq91J
-RKiNbTkFVPpM7JYDg/IU5+dTag8gIuRgYIyI78Ijz51Pati+4XSrDU9gIEFBTmrCYkOmaVJRUUFB
-QQFr1qxh6tSpfP7552RlZZGXl0dFRcWJGxE5SRQsRURqsLKiPeTm7yE/qAJfWTGLf11MUcLZfPD5
-ecS49vUomuWsm/gDw/+1lNVXtaJlbCCNejan8P5fGJcSyLldk4kOcUJFGVlbV/P5p3Mx2lxIdIid
-QsBqt+NyWDEsTup2PpuhWTmMePs7fki4lv4d4nA5XCTVCeaXqUtZtiGFFvXCcVigNGc3C+esYU9U
-FLVCDkZGqy2AqPgY4iNqQow8aP8w9+LFi1mwYAFTpkzh999/B9B8Sqk2FCzllJg+fTo33HCDv8sQ
-+UsPPPAAqamp/i7jJMpj7tixPLt4/406JsVZmWwpCOXKy5LwFeXy544K0s9pRpTLirG/49Bwktiq
-CY0//Zyf5+6iWf9Eguu35LLey/nijQ9YMKn2vmBZSuaWLWTHduCRi9IIcRgUHlmC1U1a395csOB9
-vv3XTyTEX0K7ZA8NOjWn/uQveO2JUaQkhe0NlrlZrNvlpf2gbsS4rEDNDE/HGubetWvXCcPkRx99
-xKxZs05RldXXnDlz/F1CjaJgKafE2rVrWbt2rb/LEPlLkyZNYuvWrRjGmXdbsWGxEhTqoHjJZubv
-Ovh6RJvu3HRrO1o3iSRv4TRyzRguaHH4IuUAjqhELhzYgFFz17OrZwK13SH0uPFqardeytTRU/h1
-Vibe8Fqc3ecihl3cmrrhLgzA6gogLMKD45DhcosnmnNvvYhdr3zPuB+W0eTWdgTXbcItz97MLz/8
-xo//XkAmENqyC7c83I6WzWrjsBqAicUZQGRUBfYzfE0Tn8/H5s2bmTBhAm+//TaZmZn/8TD3jBkz
-mDFjxkmsUuRoCpYiIvs0adLE3yWcNPbQOAY/9SiDjur1Mw70THraduPxNhz7bhyLi4YXX81rAziw
-v80TSuNOXWjcsQu377uN58hMXqt9L55qx1GvB9dpyF2vNsQ09p/OQlBiCgNuT+Gi2647qrZ9RRDe
-shevv3d0e2cawzAICAggISGBVq1asXbtWlasWKH5k/8lh8NB165dz8g/GqsbBUs5qYYMGUKXLl38
-XYbI33Luueee2R88Bhgnuof7RJuPtf0E7R73LTWOfboT/T84k/8X7WcYBrGxsfTv359evXqxefNm
-FixYwLx585g4cSKrV68+YRvXXXcdHTt2PAXVVn9Op5Orr77a32XUCAqWclJ16dJFwVJE5H8QEBBA
-WloaqampXHjhhdx1112sXLmS7777jvHjx1NcXExBQcFRcy47duzIkCFD/FS11FQKliIiIqcBwzDw
-eDx4PB6SkpI455xzePLJJ5k7dy5jxow5MFxeUFDg71KlBlOwFBEROQ1ZLBbi4uK44IIL6NWrF1u2
-bGH+/PksWLCAn3766cye1iHVloKliIjIac7tdpOWlkaDBg246KKLuPPOOwkODvZ3WVIDKViKiIic
-ISwWCx6Ph+TkZH+XIjXUGb4SmIiIiIicKgqWIiIiIlIlFCxFREREpEooWIqIiIhIlVCwFBEREZEq
-oWApIiIiIlVCwVJEREREqoSCpYiIiIhUCQVLEREREakSCpYiIiIiUiUULEVERKqAz2cCYBiGnysR
-8R8FSxGRk8xqteJwOCgtLfd3KXIS5ebkg2khJCTE36WI+I2CpYjISeZwOAgODmZ3Rg6mafq7HDlJ
-MjNySUpKwul0+rsUEb9RsBQROckCAgKIjY0lY2e2v0uRk8Q0TZYvXUf7dh00FC41moKliMhJZhgG
-Xbt2Yff2QirKKvxdjpwEhYXFrF6+gebNm/u7FBG/UrAUETkF6tZNIXt3Idu3Zfq7FDkJdm3PxGH3
-UL9+A3+XIuJXCpYiIqdAdHQ0PXr24JcfZ2H6NM/yTOKt9DJ/9p80TmtBVFSUv8sR8SsFSxGRU8Bi
-sXDd4OtYNG812zbv8nc5UoWys/JZunA93bp1x+12+7scEb9SsBQROUWSk5Npm96RqZPnUVFR6e9y
-pIosnLuCAHsobdu21Y07UuMpWIqInCJWq5XLL7uS5Ys2sWHtVn+XI1Vg965sfhg7nVtuuZmYmBh/
-lyPidwqWIiKnUOvWrenetQ+jP/mZ4uJSf5cj/4OC/CJGfzKRju260rNnbywWfaSK6F+BiMgpFBAQ
-wLXXXotZ5uKHsb9RqSHx01JlZSVTf57Ljs0F3HjDzbhcLn+XJFItKFiKiJxiCQkJvPzyy0wcN5Pf
-Js+nokJrW55OfD4fc2cuY/IP87nnrvto0EBLDInsp2ApInKKGYZBWlpDXvzHq/w4Zja//DCLMi2c
-flooK6tg+pQFjP3iN4bePozevc/BarX6uyyRasPm7wJERGqqHj16UF5ezvMvjKCoqITzBpxNgFtD
-qtVVeVkFE8dPZ9rExdxw/c0MHHgJNps+RkUOpX8RIiJ+4nA46NevH4mJidx9zzDWrd7K5YP6Uie5
-FlarBpSqC6/XR05WHl98OIGdmwt57JGn6NatG06n09+liVQ7unKJiPiRzWajRYsWfPbpF9SrcxZv
-vfg13339Kzu2ZeKt9Pq7vBrN5zPZsW03338zlWcf+QCjPIR/vvcBffr0UagUOQ71WIqIVAPx8fE8
-+eSTTJ8+ndFff8mbs78ktVECXXqkE58Qg9Nl93eJNUZlpZctG3eyZOEqZk5dTGx0EvcMe5CePXsR
-EhLi7/JEqjUFSxGRasLj8XDOOefQunVrVq5cwaSfJ/Lso+8TExNGk7PqUbd+baJiwwkOCdRQeRXL
-zMghL7eQjJ3ZLJq/hk1rt9O2TTsee/gZWjQ/i/DwcN2kI/I3GKZpmv4u4kwVERFBTk4OY8aMYcCA
-Af4uR0ROM6Zpkp2dzeLFi/juu/Fs3bqVoqIiSstK0aW7armcLjweD2lpqXTv3oMmTZoQGxurMCmn
-VElJCR6PB9M0cblcFBcXn3aPCVWPpYhINWUYBpGRkfTs2YsePXpSUlJCYWEhRUVFCpZVzO12ExQU
-hNvt1hN0RP4HCpYiIqcBwzBwu9243W5/lyIiclz6s0xEREREqoSCpYiIiIhUCQVLEREREakSCpYi
-IiIiUiUULEVERESkSihYioiIiEiVULAUERERkSqhYCkiIiIiVUILpIuIiIhUA/uftrX/kY6nIwVL
-ERERkWrA5XKRkZFx4PvT7TnhoGApIiIiUm2cjmHyUJpjKSIiIiJVQsFSRERERKqEgqWIiIiIVAkF
-SxERERGpEgqWIiIiIlIlFCxFREREpEpouSERERGpsUxvERuXzeLfb77DpI25+GKbcuVlV3Jp33RC
-HV6Wj32B/1vWgRcf70HkId1xe1aMZeC1L1IcGIDNcnCJIGfnW/jqyXNZ+69/8OTHUym2Ozm4NZqe
-V9/DrQODeeOSq5lUEojLZgHTxJF0FtdcdyuXd66P1TCpLM1m9o/f8u/vf2TZlkLiGl7ETbdfSLu0
-eCy563jl2eF8N3crAQ7rvrYtNOz1OE8/2JVws5ytS6cx9vOxTF6wmqLAaNr0vIyrL+lGk1phnMwF
-jRQsRUREpIbykfnnJB57+nt63f8Kv7arTcGOpbx/3yM8uPMZ/u/mppTk7mDD9gIqzSOOLMmn0tOV
-l798mvRYxyFbDAzyKdq9ldKut/Hz01diOyTJGYZBZdFicioDuPbFL7ipbRyGr4wts79kyL3/R+3x
-r9M5OJsf/vEcn5Z2ZMQLn9IgysqSMaN47amXKXr8EXpGl7JzSyAXPvRPHuhX/9DGMShj48+jeOjt
-VVxw/72MfrYu1vIdTBn1Cg8PW8FrHz1CPc/JG7BWsBQREZEayqRg1yaKfTZSYkMwDBsh8U25/IF7
-mJMb/rfmCxqGcfSi5uaR24978N7tVhd10prSlPGs37mHtC2TeW9uIE9/cTGNwvaG1hZ9r+DKytkE
-HZpSOfrc5p7NjH3nV+oPeZWBHVNwADhr03PIULzx67GbRyTkKqZgKSIiIjWUhdi0dtR3TuC+q25i
-4A1X0b5FGmn1OnFhYABWo/wvj/ZWllKYl0uOw36gPVdgEO593/pK95CTm3MgbBlWG25PIFbA9FZS
-VJhHTo4Tw1fK5jmzWZLYgusSLWz4ZBZFjdrQJPRgT6jVE0PPgf2x2qxU7N4FVFJcmE9OTs6+PRwE
-h7kp3LCYH7OSeKZTIg7A9JaRn1+Ej1A69knH7Tq5t9coWIqIiEgNZRCY2J6n3vqA5Utm8sVb/2L4
-p7sp9KRy+4NPcVnHWn9xrI+dayfyzH1bCT8Q1mLoP+w+ru0UDsDuSR9w66ZfDsxpdMSnMnjo/XSL
-g/Jd6/js2fuZFeHCwEZ0w0489fStNAu1MdNnYgtwHB7SDAt2+6GhcBNj33yM5WMCAbBY2/LU+3cR
-VpTPHmsgoZ69cy8rd8zhgXveJKeigNWzdnLNmF95oHN0Fbx3x6ZgKSIiIjWYgScqkTY9E0k/ewDZ
-uzcz88MX+L+R40lveuNfHGehdsMLee6fh8+xNAwDzHwAYi8YxlfHnGMJzvg0bn72vb1zLPfVsXdU
-u5Sw2nGUrimkwITw/ceapWxYuoo8RzSNwgHqcfUj9xwyx9LAMEwKQ6MIKVlEVn4lRNmxJ3Tl3a+7
-QOEKnutzb9W8ZX9Byw2JiIhIjWR6S/ntXy/z5KuT2F1cgWFzERlXn/Zd0wnKL8PrO3Eb++dYHnOu
-5Ym2H7Zt/4sOElt3oumapUxblU2lzwRMSjM38O9Rb/P13G2HNnDE8QaBdVsxuF02n46dS3ZZJaYJ
-mD7KCvLI9PkOu4P9ZFCPpYjIacTr9VJcXEx+fj5FRUWUl5f5u6QzlEFQUBAej4fQ0FDsdvuJD5HT
-jmFx0KBlA7794AdGvr2R5ikxUFHO9jWbuPDBW6gXZuVP00vWpj/46TsINQAcxNZrRj2vj8LsNUz7
-aTzbQq0H2rQG1qdHjwQAitbO57tx7kN68RzEpjSlaeJf3UBjwZPchYceW8/DL79BRrdUojywYc4C
-MkKbc/25TTB864//MzkTuPyp4eS9+jaj3l1DalwQZeVZrJk5lx0d+3JTWjCVhTuZOXcT9dq2IT7Q
-ety2/huGaZ7k24NqsIiICHJychgzZgwDBgzwdzkichorKipi4cKFzJw5k5UrV5Kfn0douAdngBUT
-Xcarms9rkpddAqaFpKQk2rRJJz29DXXq1MFqrdoPYvEzXwV5mVtYPHUaS3cXgSOalh06kN6sDk68
-ZPw5hdFTVh5ygIvkFl3oXK+Sb76ZQvERzdlCW3Ll1W0oWjCNSXNXscfLYccmNe9Mt/QIFk78jfCO
-/Wga4z52XWY5W5bPZ/a8JWQUVhJWO52zuzWjVpgbirOZMXUJgY1a0io59JiHlxbuYMWcP1iweisl
-9mBSmrajXYsUItx2ynPWM+6nFZzVry/1Q6u2j1HB8iRSsBSR/4XX6yUrK4tJkyby5VdfkJObRYs2
-9UmuV4v4hBhCQgOx2zXwdDKYpknRnhJ27cxi8/odrF+znV3b8unWrTsXDxhIo0aNCAgI8HeZItWO
-rkgiItWMz+dj165dTJgwga/HfI7TA30GtOOs1o0I8Dj9XV6NERUDSSnxtOvUHExYt3YrUybOYdCQ
-yzm78zlcN3gwjRs3weVy+btUkWpDPZYnkXosReS/MXXqVN775yj2lGbR98KONGqWgsej3rHqwOv1
-sW1LBhPHT2fHpnx69TiXG2+8kcDAQH+XJlItqMdSRKSaKC0tZfLkX3h6xJN06d2cHn0vIzLq2POn
-xD+sVguJyXEMuvlCVv25gc/e/4qVq1Yy4ukRREdHH/OuYJGaRMFSRKQayM/PZ9S7oxg7bjQ33X0R
-zVul+rsk+Qsul4MWrdNIqZ/AByPHctsdt/DAfQ+Rnp6OxaKV/ASoLCFj23oWLF5HOS7i6jUgrV4i
-IS4rmF62rprLgtUZhx1i8dSje/f65C9fzJINOzn43B+DwPAUWrVpRNhJfnLO/0rBUkTEzyorK3n3
-3VFM/GUcNw27iGYtFSpPF0EhHq69uT9ffjiBp4Y/zqh3/kliYqK/yxI/85XlsWDcv5myPosKnARa
-vaxdNZcffM35//buMzyqOm/j+PdMz6SSQAiBELr03kEERGABUUCJoiJFUVEeRQVdOwqLuy6Ci70g
-7LLqqrBgQUEUpUSqSFOKIEUCQQgJIZkkU87zgrJKV8NMJrk/15UXzJwz85thzpx7/u3cOqo3KW4v
-i996gSkro+jfoy4Rx7OiLS4enzebZa89z0u7o7iqy4nvAoP4wnI0DJT80YsKliIiIRQIBFiwYD7v
-znqLO+67loaNa4W6JPmN4hNiGTS8N69PfZ8nnxrHs5MmExsbG+qyJFTMAHtWf8TMJbvoe/vtdKxX
-GSc+cg7+wPPjJ/PG/FTG9r0EzGjqtb6K20b1IN7+iyEUhZmAi5od+3H3Pd0Jt8EVJbs9VUSkFDNN
-kxUrljPhL09y++gBNG5WB4tVX8vhqFy5GO68fxA7dn/H1Kn/wOPxhLokCRHT7+Hr+cvwJHagWZ3K
-OK0GWO3EJtahT8da7Pz8C/blFJ3/gcKUWixFRELk0KFDvPHGGzRpXUPd36WA2+1i2Mh+vPbcHJo3
-b0HPnj013rIMMs1CMvOPENM0CZfjlxcJt1ChVgoFC9ew92gBcJjVn73Co7kLcFoAqtLn1hvpWgMg
-n40fvsx9+z4FwGKNp/fIe+hSveSvPqBgKSISIvPmzWNXxhbuGpSm2cSlRM06KTRuUZ0ZM2bQvn17
-4uI0q7/sMbAETHweHwET/teXbeL3FmGzOXDbLEAkNRpdStoN7YmxG4Cb5MrRQDbgJKVFRwYPbnd8
-XwfJieGxXqp+SomIhEBubi4zZk6j99UdqVQlMdTlSDGx2230GdCFA9k/snjxV6EuR0LAsEbSqE4N
-jmzeSNZR78nbTX8hm5ZuwOWuT+XYCMBBfFJNGjZtStOmTWnatA6JMScugGAlNrkmTU7eV5/EyPBo
-C1SwFBEJga+++hKvP4/GzS9Ra2UpE58QQ5cr2jDjn9PJzz/1StJS2hkWO02u6E5t70r+PfsLDuYH
-MAuy2fz1h/xnWSEd+3YkwW0l7GblXCAFSxGRIPN4PLzxxjR69OlAVIw71OVIMTMMg3aXNmH7jm1s
-2rQp1OVI0BnEVW/LiLuGUT0vnRt7Xk7XHoN58YtMBo65l7QOqTgMA7szggin7Qz50sDuchHhDI8W
-ylPpko4XkS7pKCJnsm7dOu4YeRtPTh5BbLmSPxhffp9pL/yXSvF1efjhR7BaraEuR0LC5GTKMoxT
-QqSJyam3nbjLxDxt+/CgFksRkSBbsWI5lVPLERMbGepS5CKq17gma9d+S3Z2dqhLkZAxMIzjf2e6
-76y7hWeoBAVLEZGgKigoYNu2H6hWq1KpHWMlx1StnkTALCQzM/P8G4uUEgqWIiJB5PF4OHDgAJUq
-V9CknVIuOtpNZKydjIy9oS5FJGgULEVEgsjj8eAPFBEXHxPqUuQis9ltFBTms3+/Wiyl7FCwFBEJ
-oqKiIiJjXMTEatJOaWe1WoiKdpOTk0MgEAh1OSJBoWApIhJEATOAYQSwWNQNXtpZLceCpcfjUbCU
-MkPBUkRERESKRXiuvikiIiJSCuXm5gLHFtqPigq/ITMKliIiIiIlgMfjIS4uDtM0cblc5OXlhd3q
-EeoKFxERESkhTNM8+ReOFCxFREREpFgoWIqIiIhIsVCwFBEREZFioWApIiIiIsVCwVJEREREioWC
-pYiIiIgUCwVLERERESkWCpYiIiIiUiwULEVERESkWOiSjiK/YhLw+fAbVuzWkv67yyTg9+E3rdht
-Jb1WKZ1MAv4AXq8f0zQxLFZsditWi/GrbXxeHz5f4PTdDQt2hw2rAd4iL/7A6VcaMSxW7A4blvC6
-qp1ImaVgKXKSSV7GRt596VX2tr2DR3rXD3VB52BSdHgrM19+ie8rD2f84EY4Q12SlDE+MjZ+x6JP
-ljDrgzXsPVBExdr16HrVZfTt24LqFSMwgEDeYWb//UWmvrWRolMfIrkhY565jT+l5vLi2Em8n37o
-lA2sJLW7nMfHD6J5FVdwXpaI/CEKw6IGbAAAEehJREFUliIn+cncvJh/zvic5vVvwQRKbiNJgOwt
-S5g0fRYtHh4W6mKkzPGTvfVbpkx8lwx3Kl2v7UOM24rn8EG2ffohk7YfZtR9PbikguP49i5qdLiM
-zm0qY7P+4mGiKtAoJRKDXLDF07pvW1rWif1F66SFyORUKsfpVCUSLnS0SulhBvD5fHi9Pkws2B12
-bDbryXAY8BVR5DOxOx1YjRO3mniLivBjxWH1UlBYRMAM4CsqoKDQi9NhP60LzjQDeIu8YLVhNX0U
-eQNY7A6c9mNnzEDAj89bhM9vYlhtOOz207oGA37/sec1Ocs2x57H5/Xi8/kxDSsOhx2r1XKsFcjv
-pbCwiIBp4isqwFNYhN3hUHehBEUg9wCfvLwIo1lvnripJVUTInDYDHyFhRzpv41Xxs1i9twajBrS
-gEgAnFRt0ZpBw5vjtJ3+IfX8DNjjaNKtMzd0T+EMm4hImNDALCkV/IU5fLfwXR4dcSWJUVFERdUj
-7e6nWbBpH4V+EwKFfP/RZK7onMarS3ZwYrTX0b2ruH/Anxj89BzWzJ7IpX3uY/FPW/jH0E607P0Q
-K/d6Tnkmk6M/LmZorz9x5+Tp/OW6rlSNSubqpz+lED95mZt567lx9GpVjaioKMq3uZZJ//6cXdkF
-mACml4Nbl/KPcXfRumLUsW1aDWDia3PYfDD/2DaY+PIySX/7eW7u3YaEqCjiE9oyetJMVu06jD/g
-5bs5f2PAlaPYvG0vb49oS7U+97F6X24Q33Epu3zs37COzzKiufbGttSqGInDZgEMbE4X8TUbcv3N
-Lchd8y17DhWGulgRCTK1WEr4C3jZmf4uj979PIcvacv9f5mIy5/H5hXzGfvnQzzzzCN0uySeOl3T
-GJ6+jlcnv03HBg/QKDaXxf98lZUFTXny+supaanIXbdsYOZ/0qnc+yZu7tuL1Dj7GZ/SNA+z9O13
-aNfqMu6dOIDql9bDkr2bdyeP45F5+7my10i63eCk4MAPfDB1HDuzH2X8rZcTXbCTtydP4Lk1BgPv
-m8Agl0F+5ve89+wEsi0VeWJoOyLNI6x5fypjHvqQ5D49eOjy67EWHmTxh8/zwI+HeWn8LSQ16sqQ
-4evZNXMhVS4fxqB+vUiJ0ShLCQLTT3bGQXwJ8STHnun4MIhJqUCgYBs7f86nThRAAduXfsVLRzdz
-Yk6c1R1N055daFsz+tgN3kOsmPsx+euiOdGh4I5Noeu17aleTqcqkXChozUIioqK8HhObfmSC2EY
-Bi7XuQft+wuymD/3Y/Y1HsjzE++gSfV4rKaXA9t7MmHMY7z53mJajelLuZiqXDtyGMtueJi//7s1
-9zfcyV9n7eLqcS9yac1yuCztuDmtG4s/2ULzPjcxLK3JOcZYHuVAbG/uffoxGpSzYwb87F3+b97/
-/CDDH3ua+/q0INZlw5d3kE7vTubxl99iSdemdLRsY9m3O6nW8yke/fMAohwWfPlZDBryE7b4qris
-4Nm7mX/NSqfi0Id5fsyVJMZGYPjy6X/Z+4x5bCYzv+rCU/3bcU3aZl6Yt4IGvYZwV1rj807e8Xq9
-+Hy+3/G/UHY4nU4sFnXknJMZoMhTiMXpxnGWt8pqd2AzoMDr51jHWBE/rfuOPZv+t4MtPhFLg9a0
-ORksc9iUvpTNS/931JWr0oJLurdRsBQJIzpag2DQoEGhLiFspaamsmPHDgzj7BHPc3gzKz7fTvIV
-Xdjz/QoyNx+73fTm4XAUseabdWQe7Uk5p4vIal148IkbGDr6Xm7K9hF15VgGd6uF6zdnCRvV2zal
-VpwDAzACRXy3bDFb/JH08maQvijr+HYm2R4LvkObWf5dJld0SCQ5ycUnc2bwbMJRmrVqQpNqVUip
-1wi33QB87Ny8ko3fF9DyCi9r0788+Yz+nHyc/gMsWr6Fgn4NfmvBPPjgg0yePPk371eWTJw4kQce
-eCDUZZRsFjtxlStgfpbFz54A5Z2nHzz5P/9MfsBOxTgXBkVADJfdeS8Pj2j2qzGWvzqu3TUYNula
-bv7VGEuDcxz6IlICKVgGgWmevjabXJgLee8Kft7D9h82sWzjaGZPOcP+DWqSkV9I3QQXYCWlTR+6
-1nuVcV9V4fWbu1PJ+XvOXG4qVSiH4/iuAV8BezJ3s2ftQkbd8MGprwLTjCV+535c/doy/JY7yXt1
-Gk+PHo5ZqQ6dWjSmUZseXHvd1bSoFkXWnj1k7v6aSXcv59kzvB+xUdvJMuHMnfRnZ5qmPovn8dBD
-DzF27Nhz/pARKxVqpFLdt57Pv86gZs+qJ48DAHxH+ObzzRiV6pKScCJYHmMYxrnf2+P36+0XCV8K
-lhfR/Pnz1fX4BzmdzvOe5P2efHKpzqCHH2ZEr/qc1oASkUj9ilHH/2GSt3cj69ZlYC/IZ8mqrVzf
-pgruP3giM00/eZ58nK0G8urjt3NJQsQpW1iJS62DxRZNg543M7F5V667dSWb1q1mzitv8dKXy1i1
-K4/XJwymMM9DgaM1j770KL3qlz/tuayxValggezfWOPdd9/NwIEDf/drLCsUKs/HIDKlNtf0TeGR
-V6ZjFA7gmstqEOc2yN2/l9UfLODtrwvp/0gLkqNtkB/qekUkmBQsL6KWLVuGuoQyISK5Jg2SDfJ9
-UTRo3oryrmPL/pj+IvZu3chunwWHxQBMvDlbeGXC83i6jOfDzkcYP34S05vW5paOKb9udfmNLLYI
-aqXWImJeNq6UerRtnHT8HpOCnH1sXL8Xp92GJ2sPG9ZnUKFhI7r0uZ4ufa5j5NhxLHzuHkb+5WO+
-HnE1bWtWp3LkVxQ4k2nVtjknlv3zF+awdeNm8p0OHGcr5BxSU1NJTU39/S9S5ASrm4ZpAxlb9B6v
-T3uNWU8cJM8TICI2luTU2gx8eAh9WpfHBpzhejsiUopplLqEPXdiQ3pe05Dv5s1k9hcbyPWZYBaw
-c+XHPHrrKJ55dyVHvSamN4eV77zCO7uqMHL0dXTrP5jb+0QwY+oM1u49iomBwx2F0/1bO5nBsEfQ
-rFMPOkTu4PWps9iYkYsf8Gbv5v2XxjFk9N9ZtSeHvIx1PPfAKEZNeo/tWR5MDMyiI+w7fAR/agUS
-YyOp0qQTXTtG8ckbb/DFhgw8fpOAL4fVs17h7pvH8taKXZgYON1RRFl/e60ixcKIoO2g65g4aSSj
-/3wjd943iNGPjODJ527jqtaJJ1stDIebxt3a071dZWxnWWjVHhlPp6supdWvFkcXkXCkFksJezZX
-eXoPvZO1qx7k6VE38FqFGOxGgPzD2Vgq9GJ8WmfKuWD/2s+Z+mY6rYf8ne514rFaTHrffhdfDhvH
-tHdaUWdUN6LLVya+ko93nhjOvvSbefix22hQ4ULaB60kNevB6HvWM/TJSaStnk50hB2K8sk4aqHz
-iHF0rptIvKUdQ29sw4jJ4+j32QtEOmzgK2DfEZNLb3+KlilxuB2NuOWeW9kw9Cluvy6dhGgXVnxk
-7ztKpU63MrRLXQwsRFdIob7dwrwnB9Nr9Y1MfexO6pc/tQte5OKx2BxUrF2HK2vXOes2ht1F3Q4t
-qHuOx7G542jTo3XxFygiQacWSwl/hpWEut346/v/5fUJw0ktF0dsXG0GPTqV/859ml4NEzG8R1m3
-cg3WDjdxf1rL47PADeJS23Pvg9cR+HENWw/mE1u9PU8+8RBdmlQjKtJ1cs29X7K542ncqh3Nq5X/
-1XJEFmcCl94yjkUfvsmQbnUpFxtLpYZpTH9/Ni/8Xx8SI2xYnAl0u2siC95+kQEtU4mLjSWp/jVM
-e382L97V+1g3vsVJ1Y5D+NeiD3h8aHcql4ujQlJLHnrzHf7z4v/RMOnYtUwslVox7qUJ9KtdibhI
-9xlrFRERCSbD1DRRKWVOfKRPn4RhYppnnnFqmvzq9mOPcY7ZqaaJaRhnX+fSNI9fRec8j3G+bTA5
-cYSebVLJeWuVEmXHjzv426RxdL+6BSmpSeffQcKWz+vjX69/SI3kFtxzzz3YbOoklHPzeDxERkZi
-miYul4v8/Pywm1CoT7mUOmc/CM8evk69/bwH8rlC5YXcf6HbXEBgDLcvHREJnkAggNfrxe/3ExER
-oe8LuejUeSYiIlKK+Hw+MjMzWbJkCVOmTKF79+5MmTJFy99JUKjFUkREJMyZpklubi5bt25l7ty5
-fP/996Snp7N//35M06R79+6hLlHKCAVLERGRMHSim3v37t0sXLiQadOmkZ2dzc6dO9U6KSGjYCki
-IhImfD4fhw4dYuvWraxatYo5c+awdOlS4NyXwP3hhx/47LPPNIGohCssLAx1CX+YPmEiIiIlmGma
-HDlyhG3btp2xm/tCTJ8+nRkzZlzkSqU4hPtiPQqWIiIiJZhhGHi9XrZv3878+fP59ttv8fv9vzmA
-hHtgKWvs9vC8spqCpYiISAlXvnx50tLS6N+/P+vWrWPBggXMnz+fXbt2kZGRgdfrPef+tWrVolq1
-algsWgwmXDz77LNhuTyUgqWIiEiYsNvttGzZkpYtWzJs2DA2bNjAsmXLWL16Nenp6Rw+fPiM+w0Z
-MoQxY8aEbStYWRSOoRIULEVERMJSUlISSUlJdOrUiUOHDrFlyxbS09OZPXs269evJxAIEAgETm5v
-GEbYhhUJHwqWIiIiYczpdJKcnExycjJdunRh7NixJ7vLP/30U3bv3o3T6Qx1mVJGKFiKiIiUImfq
-Lo+Pj9f4SgkKBUsREZFS6kR3uWma6gaXoNDPFxGRIDIwwLRo6ZcywOf3c+RIHg6HI+ShLtTPL2WH
-gqWISBC5XC4K8r0cyckLdSlykZkBk0JPIfHx8Vit1lCXIxIUCpYiIkHkcrnAtJH1c3aoS5GLzFvk
-w+lwk1w5OdSliASNgqWISBC53W4SExPZ+1OmusNLudzcPHIOFZJcScFSyg4FSxGRIHI4HNSuXYt9
-P2UpWJZye3ZlYre5SExMDHUpIkGjYCkiEkSGYdCqVWt2bjtA3tGCUJcjF9GObT9Rt15dYmNjQ12K
-SNAoWIqIBFmdOnWonFyF9MVrQ12KXCRZh3JY+NEKrr7qak3ckTJFwVJEJMjcbjeDBw/m07lLyT2S
-H+pypJgFAibLl6yjYcPGNGrUKNTliASVgqWISAh063YFEa4Yvl31XahLkWJ26GA2n89fTv9+1xAR
-ERHqckSCSsFSRCQE3G43tw6/g3lzl5GxJzPU5Ugx8Xq9LJyXTr1aTenZs2eoyxEJOgVLEZEQ6dy5
-MymVajFv7hLMgGaIlwbbt/7EN8t/4Kq+/YmMjAx1OSJBp2ApIhIi5RPKM3TIcL75+gfWr90S6nLk
-D8o7ms+c/yyixxW96dy5MxaLTrFS9uhTLyISIhaLhU6dOjFhwtO8OOk91qzYhN/nD3VZ8jtkH87l
-1efeJSmhOneOvAu32x3qkkRCQsFSRCTELu96OUMH38Lbb85n7erNWjg9zBzNzeOd6fPIy7Zw7+j7
-iYmJCXVJIiFjC3UBIiJlndVqZejQ4ZjAq1NeY+QYK02a18UwQl2ZnM/R3HymPvMW+dkGEyf+lRo1
-aoS6JJGQMkz9NBYRKRH8fj8fz/uY8U89SZvLLuGKPh2olFw+1GXJGXg8hWz4ZiszX/+IVi068vjj
-T5AQnxDqskRCTsFSRKSEWbRoES+/8iKHj+zjT1d3oHnr+rgjtR5iSeD3+9m7+wCz3vmMjJ2HGdAv
-jZtuGkxcXFyoSxMpERQsRURKmEAgwL79+/j4o495fdrLxCa4uOqaLjRrXR+H3Q7qIg860zTZtSOD
-z+Z9zZcLVtCndz/SBl5P06ZNcTqdoS5PpMRQsBQRKcGysrL45NNPmPmvmfx8cB9N29ShStUKVE6p
-SHz5WGw2GxFuBZvi5Pf5KSgoosBTyN49mez6MYOfdh0kY3c2rVu2ZtSoUdSqVUvLCYmcgYKliEgY
-yMrKYv369SxfsZxdO3dxJDeHyGgbh3OyyM7JAn2TFxvDsFKjek28hQEKPQGSk5Np1qwp7dt3oEqV
-Klit1lCXKFJiKViKiIQRv99Pfn4+eXl55OfncfToUbKzs7VEUTGy2+1UrJiEw2EnIsJNdHS0urtF
-LpCCpYiIiIgUCw0QEREREZFioWApIiIiIsVCwVJEREREioWCpYiIiIgUCwVLERERESkW/w/6+1BI
-j+TWxQAAAABJRU5ErkJggg==
-"
-     id="image2993"
-     x="0"
-     y="0" />
-</svg>
diff --git a/atmel-samd/asf/sam0/drivers/system/interrupt/system_interrupt.c b/atmel-samd/asf/sam0/drivers/system/interrupt/system_interrupt.c
deleted file mode 100644
index 24ee27ffa..000000000
--- a/atmel-samd/asf/sam0/drivers/system/interrupt/system_interrupt.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/**
- * \file
- *
- * \brief SAM System Interrupt Driver
- *
- * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-#include "system_interrupt.h"
-
-/**
- * \brief Check if a interrupt line is pending.
- *
- * Checks if the requested interrupt vector is pending.
- *
- * \param[in] vector  Interrupt vector number to check
- *
- * \returns A boolean identifying if the requested interrupt vector is pending.
- *
- * \retval true   Specified interrupt vector is pending
- * \retval false  Specified interrupt vector is not pending
- *
- */
-bool system_interrupt_is_pending(
-		const enum system_interrupt_vector vector)
-{
-	bool result;
-
-	if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
-		result = ((NVIC->ISPR[0] & (1 << vector)) != 0);
-	} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
-		result = ((SCB->ICSR & SCB_ICSR_PENDSTSET_Msk) != 0);
-	} else {
-		Assert(false);
-		result = false;
-	}
-
-	return result;
-}
-
-/**
- * \brief Set a interrupt vector as pending.
- *
- * Set the requested interrupt vector as pending (i.e. issues a software
- * interrupt request for the specified vector). The software handler will be
- * handled (if enabled) in a priority order based on vector number and
- * configured priority settings.
- *
- * \param[in] vector  Interrupt vector number which is set as pending
- *
- * \returns Status code identifying if the vector was successfully set as
- *          pending.
- *
- * \retval STATUS_OK           If no error was detected
- * \retval STATUS_INVALID_ARG  If an unsupported interrupt vector number was given
- */
-enum status_code system_interrupt_set_pending(
-		const enum system_interrupt_vector vector)
-{
-	enum status_code status = STATUS_OK;
-
-	if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
-		NVIC->ISPR[0] = (1 << vector);
-	} else if (vector == SYSTEM_INTERRUPT_NON_MASKABLE) {
-		/* Note: Because NMI has highest priority it will be executed
-		 * immediately after it has been set pending */
-		SCB->ICSR = SCB_ICSR_NMIPENDSET_Msk;
-	} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
-		SCB->ICSR = SCB_ICSR_PENDSTSET_Msk;
-	} else {
-		/* The user want to set something unsupported as pending */
-		Assert(false);
-		status = STATUS_ERR_INVALID_ARG;
-	}
-
-	return status;
-}
-
-/**
- * \brief Clear pending interrupt vector.
- *
- * Clear a pending interrupt vector, so the software handler is not executed.
- *
- * \param[in] vector  Interrupt vector number to clear
- *
- * \returns A status code identifying if the interrupt pending state was
- *          successfully cleared.
- *
- * \retval STATUS_OK           If no error was detected
- * \retval STATUS_INVALID_ARG  If an unsupported interrupt vector number was given
- */
-enum status_code system_interrupt_clear_pending(
-		const enum system_interrupt_vector vector)
-{
-	enum status_code status = STATUS_OK;
-
-	if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
-		NVIC->ICPR[0] = (1 << vector);
-	} else if (vector == SYSTEM_INTERRUPT_NON_MASKABLE) {
-		/* Note: Clearing of NMI pending interrupts does not make sense and is
-		 * not supported by the device, as it has the highest priority and will
-		 * always be executed at the moment it is set */
-		return STATUS_ERR_INVALID_ARG;
-	} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
-		SCB->ICSR = SCB_ICSR_PENDSTCLR_Msk;
-	} else {
-		Assert(false);
-		status = STATUS_ERR_INVALID_ARG;
-	}
-
-	return status;
-}
-
-/**
- * \brief Set interrupt vector priority level.
- *
- * Set the priority level of an external interrupt or exception.
- *
- * \param[in] vector          Interrupt vector to change
- * \param[in] priority_level  New vector priority level to set
- *
- * \returns Status code indicating if the priority level of the interrupt was
- *          successfully set.
- *
- * \retval STATUS_OK           If no error was detected
- * \retval STATUS_INVALID_ARG  If an unsupported interrupt vector number was given
- */
-enum status_code system_interrupt_set_priority(
-		const enum system_interrupt_vector vector,
-		const enum system_interrupt_priority_level priority_level)
-{
-	enum status_code status = STATUS_OK;
-
-	if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
-		uint8_t register_num = vector / 4;
-		uint8_t priority_pos = ((vector % 4) * 8) + (8 - __NVIC_PRIO_BITS);
-
-		NVIC->IP[register_num] =
-				(NVIC->IP[register_num] & ~(_SYSTEM_INTERRUPT_PRIORITY_MASK << priority_pos)) |
-				(priority_level << priority_pos);
-
-	} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
-		SCB->SHP[1] = (priority_level << _SYSTEM_INTERRUPT_SYSTICK_PRI_POS);
-	} else {
-		Assert(false);
-		status = STATUS_ERR_INVALID_ARG;
-	}
-
-	return status;
-}
-
-/**
- * \brief Get interrupt vector priority level.
- *
- * Retrieves the priority level of the requested external interrupt or exception.
- *
- * \param[in] vector  Interrupt vector of which the priority level will be read
- *
- * \return Currently configured interrupt priority level of the given interrupt
- *         vector.
- */
-enum system_interrupt_priority_level system_interrupt_get_priority(
-		const enum system_interrupt_vector vector)
-{
-	uint8_t register_num = vector / 4;
-	uint8_t priority_pos = ((vector % 4) * 8) + (8 - __NVIC_PRIO_BITS);
-
-	enum system_interrupt_priority_level priority = SYSTEM_INTERRUPT_PRIORITY_LEVEL_0;
-
-	if (vector >= 0) {
-		priority = (enum system_interrupt_priority_level)
-				((NVIC->IP[register_num] >> priority_pos) & _SYSTEM_INTERRUPT_PRIORITY_MASK);
-	} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
-		priority = (enum system_interrupt_priority_level)
-				((SCB->SHP[1] >> _SYSTEM_INTERRUPT_SYSTICK_PRI_POS) & _SYSTEM_INTERRUPT_PRIORITY_MASK);
-	}
-
-	return priority;
-}
-
diff --git a/atmel-samd/asf/sam0/drivers/system/interrupt/system_interrupt.h b/atmel-samd/asf/sam0/drivers/system/interrupt/system_interrupt.h
deleted file mode 100644
index 0b7834369..000000000
--- a/atmel-samd/asf/sam0/drivers/system/interrupt/system_interrupt.h
+++ /dev/null
@@ -1,429 +0,0 @@
-/**
- * \file
- *
- * \brief SAM System Interrupt Driver
- *
- * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-#ifndef SYSTEM_INTERRUPT_H_INCLUDED
-#define SYSTEM_INTERRUPT_H_INCLUDED
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * \defgroup asfdoc_sam0_system_interrupt_group SAM System Interrupt (SYSTEM INTERRUPT) Driver
- *
- * This driver for Atmel&reg; | SMART ARM&reg;-based microcontrollers provides
- * an interface for the configuration and management of internal software and
- * hardware interrupts/exceptions.
- *
- * The following peripheral is used by this module:
- *  - NVIC (Nested Vector Interrupt Controller)
- *
- * The following devices can use this module:
- *  - Atmel | SMART SAM D20/D21
- *  - Atmel | SMART SAM R21
- *  - Atmel | SMART SAM D09/D10/D11
- *  - Atmel | SMART SAM L21/L22
- *  - Atmel | SMART SAM DA1
- *  - Atmel | SMART SAM C20/C21
- *
- * The outline of this documentation is as follows:
- *  - \ref asfdoc_sam0_system_interrupt_prerequisites
- *  - \ref asfdoc_sam0_system_interrupt_module_overview
- *  - \ref asfdoc_sam0_system_interrupt_special_considerations
- *  - \ref asfdoc_sam0_system_interrupt_extra_info
- *  - \ref asfdoc_sam0_system_interrupt_examples
- *  - \ref asfdoc_sam0_system_interrupt_api_overview
- *
- *
- * \section asfdoc_sam0_system_interrupt_prerequisites Prerequisites
- *
- * There are no prerequisites for this module.
- *
- *
- * \section asfdoc_sam0_system_interrupt_module_overview Module Overview
- *
- * The ARM&reg; Cortex&reg; M0+ core contains an interrupt and exception vector table, which
- * can be used to configure the device's interrupt handlers; individual
- * interrupts and exceptions can be enabled and disabled, as well as configured
- * with a variable priority.
- *
- * This driver provides a set of wrappers around the core interrupt functions,
- * to expose a simple API for the management of global and individual interrupts
- * within the device.
- *
- * \subsection asfdoc_sam0_system_interrupt_module_overview_criticalsec Critical Sections
- * In some applications it is important to ensure that no interrupts may be
- * executed by the system whilst a critical portion of code is being run; for
- * example, a buffer may be copied from one context to another - during which
- * interrupts must be disabled to avoid corruption of the source buffer contents
- * until the copy has completed. This driver provides a basic API to enter and
- * exit nested critical sections, so that global interrupts can be kept disabled
- * for as long as necessary to complete a critical application code section.
- *
- * \subsection asfdoc_sam0_system_interrupt_module_overview_softints Software Interrupts
- * For some applications, it may be desirable to raise a module or core
- * interrupt via software. For this reason, a set of APIs to set an interrupt or
- * exception as pending are provided to the user application.
- *
- * \section asfdoc_sam0_system_interrupt_special_considerations Special Considerations
- *
- * Interrupts from peripherals in the SAM devices are on a per-module basis;
- * an interrupt raised from any source within a module will cause a single,
- * module-common handler to execute. It is the user application or driver's
- * responsibility to de-multiplex the module-common interrupt to determine the
- * exact interrupt cause.
- *
- * \section asfdoc_sam0_system_interrupt_extra_info Extra Information
- *
- * For extra information, see \ref asfdoc_sam0_system_interrupt_extra. This includes:
- *  - \ref asfdoc_sam0_system_interrupt_extra_acronyms
- *  - \ref asfdoc_sam0_system_interrupt_extra_dependencies
- *  - \ref asfdoc_sam0_system_interrupt_extra_errata
- *  - \ref asfdoc_sam0_system_interrupt_extra_history
- *
- *
- * \section asfdoc_sam0_system_interrupt_examples Examples
- *
- * For a list of examples related to this driver, see
- * \ref asfdoc_sam0_system_interrupt_exqsg.
- *
- * \section asfdoc_sam0_system_interrupt_api_overview API Overview
- * @{
- */
-
-#include <compiler.h>
-#include <core_cm0plus.h>
-#include "system_interrupt_features.h"
-
-/**
- * \brief Table of possible system interrupt/exception vector priorities.
- *
- * Table of all possible interrupt and exception vector priorities within the
- * device.
- */
-enum system_interrupt_priority_level {
-	/** Priority level 0, the highest possible interrupt priority */
-	SYSTEM_INTERRUPT_PRIORITY_LEVEL_0  = 0,
-	/** Priority level 1 */
-	SYSTEM_INTERRUPT_PRIORITY_LEVEL_1  = 1,
-	/** Priority level 2 */
-	SYSTEM_INTERRUPT_PRIORITY_LEVEL_2  = 2,
-	/** Priority level 3, the lowest possible interrupt priority */
-	SYSTEM_INTERRUPT_PRIORITY_LEVEL_3  = 3,
-};
-
-/**
- * \name Critical Section Management
- * @{
- */
-
-/**
- * \brief Enters a critical section.
- *
- * Disables global interrupts. To support nested critical sections, an internal
- * count of the critical section nesting will be kept, so that global interrupts
- * are only re-enabled upon leaving the outermost nested critical section.
- *
- */
-static inline void system_interrupt_enter_critical_section(void)
-{
-	cpu_irq_enter_critical();
-}
-
-/**
- * \brief Leaves a critical section.
- *
- * Enables global interrupts. To support nested critical sections, an internal
- * count of the critical section nesting will be kept, so that global interrupts
- * are only re-enabled upon leaving the outermost nested critical section.
- *
- */
-static inline void system_interrupt_leave_critical_section(void)
-{
-	cpu_irq_leave_critical();
-}
-
-/** @} */
-
-/**
- * \name Interrupt Enabling/Disabling
- * @{
- */
-
-/**
- * \brief Check if global interrupts are enabled.
- *
- * Checks if global interrupts are currently enabled.
- *
- * \returns A boolean that identifies if the global interrupts are enabled or not.
- *
- * \retval true   Global interrupts are currently enabled
- * \retval false  Global interrupts are currently disabled
- *
- */
-static inline bool system_interrupt_is_global_enabled(void)
-{
-	return cpu_irq_is_enabled();
-}
-
-/**
- * \brief Enables global interrupts.
- *
- * Enables global interrupts in the device to fire any enabled interrupt handlers.
- */
-static inline void system_interrupt_enable_global(void)
-{
-	cpu_irq_enable();
-}
-
-/**
- * \brief Disables global interrupts.
- *
- * Disabled global interrupts in the device, preventing any enabled interrupt
- * handlers from executing.
- */
-static inline void system_interrupt_disable_global(void)
-{
-	cpu_irq_disable();
-}
-
-/**
- * \brief Checks if an interrupt vector is enabled or not.
- *
- * Checks if a specific interrupt vector is currently enabled.
- *
- * \param[in] vector  Interrupt vector number to check
- *
- * \returns A variable identifying if the requested interrupt vector is enabled.
- *
- * \retval true   Specified interrupt vector is currently enabled
- * \retval false  Specified interrupt vector is currently disabled
- *
- */
-static inline bool system_interrupt_is_enabled(
-		const enum system_interrupt_vector vector)
-{
-	return (bool)((NVIC->ISER[0] >> (uint32_t)vector) & 0x00000001);
-}
-
-/**
- * \brief Enable interrupt vector.
- *
- * Enables execution of the software handler for the requested interrupt vector.
- *
- * \param[in] vector Interrupt vector to enable
- */
-static inline void system_interrupt_enable(
-		const enum system_interrupt_vector vector)
-{
-	NVIC->ISER[0] = (uint32_t)(1 << ((uint32_t)vector & 0x0000001f));
-}
-
-/**
- * \brief Disable interrupt vector.
- *
- * Disables execution of the software handler for the requested interrupt vector.
- *
- * \param[in] vector  Interrupt vector to disable
- */
-static inline void system_interrupt_disable(
-		const enum system_interrupt_vector vector)
-{
-	NVIC->ICER[0] = (uint32_t)(1 << ((uint32_t)vector & 0x0000001f));
-}
-
-/** @} */
-
-/**
- * \name Interrupt State Management
- * @{
- */
-
-/**
- * \brief Get active interrupt (if any).
- *
- * Return the vector number for the current executing software handler, if any.
- *
- * \return Interrupt number that is currently executing.
- */
-static inline enum system_interrupt_vector system_interrupt_get_active(void)
-{
-	uint32_t IPSR = __get_IPSR();
-	/* The IPSR returns the Exception number, which with an offset 16 to IRQ number. */
-	return (enum system_interrupt_vector)((IPSR & _SYSTEM_INTERRUPT_IPSR_MASK) - 16);
-}
-
-bool system_interrupt_is_pending(
-		const enum system_interrupt_vector vector);
-
-enum status_code system_interrupt_set_pending(
-		const enum system_interrupt_vector vector);
-
-enum status_code system_interrupt_clear_pending(
-		const enum system_interrupt_vector vector);
-
-/** @} */
-
-/**
- * \name Interrupt Priority Management
- * @{
- */
-
-enum status_code system_interrupt_set_priority(
-		const enum system_interrupt_vector vector,
-		const enum system_interrupt_priority_level priority_level);
-
-enum system_interrupt_priority_level system_interrupt_get_priority(
-		const enum system_interrupt_vector vector);
-
-/** @} */
-
-/** @} */
-
-/**
- * \page asfdoc_sam0_system_interrupt_extra Extra Information for SYSTEM INTERRUPT Driver
- *
- * \section asfdoc_sam0_system_interrupt_extra_acronyms Acronyms
- * The table below presents the acronyms used in this module:
- *
- * <table>
- *	<tr>
- *		<th>Acronym</th>
- *		<th>Description</th>
- *	</tr>
- *	<tr>
- *		<td>ISR</td>
- *		<td>Interrupt Service Routine</td>
- *	</tr>
- *	<tr>
- *		<td>NMI</td>
- *		<td>Non-maskable Interrupt</td>
- *	</tr>
- *	<tr>
- *		<td>SERCOM</td>
- *		<td>Serial Communication Interface</td>
- *	</tr>
- * </table>
- *
- *
- * \section asfdoc_sam0_system_interrupt_extra_dependencies Dependencies
- * This driver has the following dependencies:
- *
- *  - None
- *
- *
- * \section asfdoc_sam0_system_interrupt_extra_errata Errata
- * There are no errata related to this driver.
- *
- *
- * \section asfdoc_sam0_system_interrupt_extra_history Module History
- * An overview of the module history is presented in the table below, with
- * details on the enhancements and fixes made to the module since its first
- * release. The current version of this corresponds to the newest version in
- * the table.
- *
- * <table>
- *	<tr>
- *		<th>Changelog</th>
- *	</tr>
- *	<tr>
- *		<td>Initial Release</td>
- *	</tr>
- * </table>
- */
-
-/**
- * \page asfdoc_sam0_system_interrupt_exqsg Examples for SYSTEM INTERRUPT Driver
- *
- * This is a list of the available Quick Start guides (QSGs) and example
- * applications for \ref asfdoc_sam0_system_interrupt_group. QSGs are simple examples with
- * step-by-step instructions to configure and use this driver in a selection of
- * use cases. Note that a QSG can be compiled as a standalone application or be
- * added to the user application.
- *
- *  - \subpage asfdoc_sam0_system_interrupt_critsec_use_case
- *  - \subpage asfdoc_sam0_system_interrupt_enablemodint_use_case
- *
- * \page asfdoc_sam0_system_interrupt_document_revision_history Document Revision History
- *
- * <table>
- *	<tr>
- *		<th>Doc. Rev.</th>
- *		<th>Date</th>
- *		<th>Comments</th>
- *	</tr>
- *	<tr>
- *		<td>42122E</td>
- *		<td>12/2015</td>
- *		<td>Added support for SAM L21/L22, SAM DA1, SAM D09, and SAM C20/C21</td>
- *	</tr>
- *	<tr>
- *		<td>42122D</td>
- *		<td>12/2014</td>
- *		<td>Added support for SAM R21 and SAM D10/D11</td>
- *	</tr>
- *	<tr>
- *		<td>42122C</td>
- *		<td>01/2014</td>
- *		<td>Added support for SAM D21</td>
- *	</tr>
- *	<tr>
- *		<td>42122B</td>
- *		<td>06/2013</td>
- *		<td>Corrected documentation typos</td>
- *	</tr>
- *	<tr>
- *		<td>42122A</td>
- *		<td>06/2013</td>
- *		<td>Initial release</td>
- *	</tr>
- * </table>
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif // #ifndef SYSTEM_INTERRUPT_H_INCLUDED
diff --git a/atmel-samd/asf/sam0/drivers/system/interrupt/system_interrupt_samd21/system_interrupt_features.h b/atmel-samd/asf/sam0/drivers/system/interrupt/system_interrupt_samd21/system_interrupt_features.h
deleted file mode 100644
index 25dfa838d..000000000
--- a/atmel-samd/asf/sam0/drivers/system/interrupt/system_interrupt_samd21/system_interrupt_features.h
+++ /dev/null
@@ -1,195 +0,0 @@
-/**
- * \file
- *
- * \brief SAM D21 System Interrupt Driver
- *
- * Copyright (C) 2013-2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-
-#ifndef SYSTEM_INTERRUPT_FEATURES_H_INCLUDED
-#define SYSTEM_INTERRUPT_FEATURES_H_INCLUDED
-
-#if !defined(__DOXYGEN__)
-
-/* Generates a interrupt vector table enum list entry for a given module type
-   and index (e.g. "SYSTEM_INTERRUPT_MODULE_TC0 = TC0_IRQn,"). */
-#  define _MODULE_IRQn(n, module) \
-		SYSTEM_INTERRUPT_MODULE_##module##n = module##n##_IRQn,
-
-/* Generates interrupt vector table enum list entries for all instances of a
-   given module type on the selected device. */
-#  define _SYSTEM_INTERRUPT_MODULES(name) \
-		MREPEAT(name##_INST_NUM, _MODULE_IRQn, name)
-
-#  define _SYSTEM_INTERRUPT_IPSR_MASK              0x0000003f
-#  define _SYSTEM_INTERRUPT_PRIORITY_MASK          0x00000003
-
-#  define _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START  0
-
-#  define _SYSTEM_INTERRUPT_SYSTICK_PRI_POS        30
-#endif
-
-/**
- * \addtogroup asfdoc_sam0_system_interrupt_group
- * @{
- */
-
-/**
- * \brief Table of possible system interrupt/exception vector numbers.
- *
- * Table of all possible interrupt and exception vector indexes within the
- * SAM D21 device. Check peripherals configuration in SAM D21 datasheet for
- * available vector index for specific device.
- *
- */
-#if defined(__DOXYGEN__)
-/** \note The actual enumeration name is "system_interrupt_vector". */
-enum system_interrupt_vector_samd21 {
-#else
-enum system_interrupt_vector {
-#endif
-	/** Interrupt vector index for a NMI interrupt */
-	SYSTEM_INTERRUPT_NON_MASKABLE      = NonMaskableInt_IRQn,
-	/** Interrupt vector index for a Hard Fault memory access exception */
-	SYSTEM_INTERRUPT_HARD_FAULT        = HardFault_IRQn,
-	/** Interrupt vector index for a Supervisor Call exception */
-	SYSTEM_INTERRUPT_SV_CALL           = SVCall_IRQn,
-	/** Interrupt vector index for a Pending Supervisor interrupt */
-	SYSTEM_INTERRUPT_PENDING_SV        = PendSV_IRQn,
-	/** Interrupt vector index for a System Tick interrupt */
-	SYSTEM_INTERRUPT_SYSTICK           = SysTick_IRQn,
-
-	/** Interrupt vector index for a Power Manager peripheral interrupt */
-	SYSTEM_INTERRUPT_MODULE_PM         = PM_IRQn,
-	/** Interrupt vector index for a System Control peripheral interrupt */
-	SYSTEM_INTERRUPT_MODULE_SYSCTRL    = SYSCTRL_IRQn,
-	/** Interrupt vector index for a Watch Dog peripheral interrupt */
-	SYSTEM_INTERRUPT_MODULE_WDT        = WDT_IRQn,
-	/** Interrupt vector index for a Real Time Clock peripheral interrupt */
-	SYSTEM_INTERRUPT_MODULE_RTC        = RTC_IRQn,
-	/** Interrupt vector index for an External Interrupt peripheral interrupt */
-	SYSTEM_INTERRUPT_MODULE_EIC        = EIC_IRQn,
-	/** Interrupt vector index for a Non Volatile Memory Controller interrupt */
-	SYSTEM_INTERRUPT_MODULE_NVMCTRL    = NVMCTRL_IRQn,
-	/** Interrupt vector index for a Direct Memory Access interrupt */
-	SYSTEM_INTERRUPT_MODULE_DMA        = DMAC_IRQn,
-#if defined(__DOXYGEN__) || defined(ID_USB)
-	/** Interrupt vector index for a Universal Serial Bus interrupt */
-	SYSTEM_INTERRUPT_MODULE_USB        = USB_IRQn,
-#endif
-	/** Interrupt vector index for an Event System interrupt */
-	SYSTEM_INTERRUPT_MODULE_EVSYS      = EVSYS_IRQn,
-#if defined(__DOXYGEN__)
-	/** Interrupt vector index for a SERCOM peripheral interrupt.
-	 *
-	 *  Each specific device may contain several SERCOM peripherals; each module
-	 *  instance will have its own entry in the table, with the instance number
-	 *  substituted for "n" in the entry name (e.g.
-	 *  \c SYSTEM_INTERRUPT_MODULE_SERCOM0).
-	 */
-	SYSTEM_INTERRUPT_MODULE_SERCOMn    = SERCOMn_IRQn,
-
-	/** Interrupt vector index for a Timer/Counter Control peripheral interrupt.
-	 *
-	 *  Each specific device may contain several TCC peripherals; each module
-	 *  instance will have its own entry in the table, with the instance number
-	 *  substituted for "n" in the entry name (e.g.
-	 *  \c SYSTEM_INTERRUPT_MODULE_TCC0).
-	 */
-	SYSTEM_INTERRUPT_MODULE_TCCn        = TCCn_IRQn,
-
-	/** Interrupt vector index for a Timer/Counter peripheral interrupt.
-	 *
-	 *  Each specific device may contain several TC peripherals; each module
-	 *  instance will have its own entry in the table, with the instance number
-	 *  substituted for "n" in the entry name (e.g.
-	 *  \c SYSTEM_INTERRUPT_MODULE_TC3).
-	 */
-	SYSTEM_INTERRUPT_MODULE_TCn        = TCn_IRQn,
-#else
-	_SYSTEM_INTERRUPT_MODULES(SERCOM)
-
-	_SYSTEM_INTERRUPT_MODULES(TCC)
-
-	SYSTEM_INTERRUPT_MODULE_TC3        = TC3_IRQn,
-	SYSTEM_INTERRUPT_MODULE_TC4        = TC4_IRQn,
-	SYSTEM_INTERRUPT_MODULE_TC5        = TC5_IRQn,
-#  if defined(ID_TC6)
-	SYSTEM_INTERRUPT_MODULE_TC6        = TC6_IRQn,
-#  endif
-#  if defined(ID_TC7)
-	SYSTEM_INTERRUPT_MODULE_TC7        = TC7_IRQn,
-#  endif
-#endif
-
-#if defined(__DOXYGEN__) || defined(ID_ADC)
-	/** Interrupt vector index for an Analog-to-Digital peripheral interrupt */
-	SYSTEM_INTERRUPT_MODULE_ADC        = ADC_IRQn,
-#endif
-
-#if defined(__DOXYGEN__) || defined(ID_AC)
-	/** Interrupt vector index for an Analog Comparator peripheral interrupt */
-	SYSTEM_INTERRUPT_MODULE_AC         = AC_IRQn,
-#endif
-
-#if defined(__DOXYGEN__) || defined(ID_DAC)
-	/** Interrupt vector index for a Digital-to-Analog peripheral interrupt */
-	SYSTEM_INTERRUPT_MODULE_DAC        = DAC_IRQn,
-#endif
-#if defined(__DOXYGEN__) || defined(ID_PTC)
-	/** Interrupt vector index for a Peripheral Touch Controller peripheral
-	 *  interrupt */
-	SYSTEM_INTERRUPT_MODULE_PTC        = PTC_IRQn,
-#endif
-#if defined(__DOXYGEN__) || defined(ID_I2S)
-	/** Interrupt vector index for a Inter-IC Sound Interface peripheral
-	 *  interrupt */
-	SYSTEM_INTERRUPT_MODULE_I2S        = I2S_IRQn,
-#endif
-#if defined(__DOXYGEN__) || defined(ID_AC1)
-	/** Interrupt vector index for an Analog Comparator 1 peripheral interrupt */
-	SYSTEM_INTERRUPT_MODULE_AC1        = AC1_IRQn,
-#endif
-};
-
-/** @} */
-
-#endif
diff --git a/atmel-samd/asf/sam0/drivers/system/pinmux/pinmux.c b/atmel-samd/asf/sam0/drivers/system/pinmux/pinmux.c
deleted file mode 100644
index a2c9c7cdc..000000000
--- a/atmel-samd/asf/sam0/drivers/system/pinmux/pinmux.c
+++ /dev/null
@@ -1,311 +0,0 @@
-/**
- * \file
- *
- * \brief SAM Pin Multiplexer Driver
- *
- * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-#include <pinmux.h>
-
-/**
- * \internal
- * Writes out a given configuration of a Port pin configuration to the
- * hardware module.
- *
- * \note If the pin direction is set as an output, the pull-up/pull-down input
- *       configuration setting is ignored.
- *
- * \param[in] port      Base of the PORT module to configure
- * \param[in] pin_mask  Mask of the port pin to configure
- * \param[in] config    Configuration settings for the pin
- */
-static void _system_pinmux_config(
-		PortGroup *const port,
-		const uint32_t pin_mask,
-		const struct system_pinmux_config *const config)
-{
-	Assert(port);
-	Assert(config);
-
-	/* Track the configuration bits into a temporary variable before writing */
-	uint32_t pin_cfg = 0;
-
-	/* Enabled powersave mode, don't create configuration */
-	if (!config->powersave) {
-		/* Enable the pin peripheral MUX flag if non-GPIO selected (pinmux will
-		 * be written later) and store the new MUX mask */
-		if (config->mux_position != SYSTEM_PINMUX_GPIO) {
-			pin_cfg |= PORT_WRCONFIG_PMUXEN;
-			pin_cfg |= (config->mux_position << PORT_WRCONFIG_PMUX_Pos);
-		}
-
-		/* Check if the user has requested that the input buffer be enabled */
-		if ((config->direction == SYSTEM_PINMUX_PIN_DIR_INPUT) ||
-				(config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK)) {
-			/* Enable input buffer flag */
-			pin_cfg |= PORT_WRCONFIG_INEN;
-
-			/* Enable pull-up/pull-down control flag if requested */
-			if (config->input_pull != SYSTEM_PINMUX_PIN_PULL_NONE) {
-				pin_cfg |= PORT_WRCONFIG_PULLEN;
-			}
-
-			/* Clear the port DIR bits to disable the output buffer */
-			port->DIRCLR.reg = pin_mask;
-		}
-
-		/* Check if the user has requested that the output buffer be enabled */
-		if ((config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT) ||
-				(config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK)) {
-			/* Cannot use a pull-up if the output driver is enabled,
-			 * if requested the input buffer can only sample the current
-			 * output state */
-			pin_cfg &= ~PORT_WRCONFIG_PULLEN;
-		}
-	} else {
-		port->DIRCLR.reg = pin_mask;
-	}
-
-	/* The Write Configuration register (WRCONFIG) requires the
-	 * pins to to grouped into two 16-bit half-words - split them out here */
-	uint32_t lower_pin_mask = (pin_mask & 0xFFFF);
-	uint32_t upper_pin_mask = (pin_mask >> 16);
-
-	/* Configure the lower 16-bits of the port to the desired configuration,
-	 * including the pin peripheral multiplexer just in case it is enabled */
-	port->WRCONFIG.reg
-		= (lower_pin_mask << PORT_WRCONFIG_PINMASK_Pos) |
-			pin_cfg | PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_WRPINCFG;
-
-	/* Configure the upper 16-bits of the port to the desired configuration,
-	 * including the pin peripheral multiplexer just in case it is enabled */
-	port->WRCONFIG.reg
-		= (upper_pin_mask << PORT_WRCONFIG_PINMASK_Pos) |
-			pin_cfg | PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_WRPINCFG |
-			PORT_WRCONFIG_HWSEL;
-
-	if(!config->powersave) {
-		/* Set the pull-up state once the port pins are configured if one was
-		 * requested and it does not violate the valid set of port
-		 * configurations */
-		if (pin_cfg & PORT_WRCONFIG_PULLEN) {
-			/* Set the OUT register bits to enable the pull-up if requested,
-			 * clear to enable pull-down */
-			if (config->input_pull == SYSTEM_PINMUX_PIN_PULL_UP) {
-				port->OUTSET.reg = pin_mask;
-			} else {
-				port->OUTCLR.reg = pin_mask;
-			}
-		}
-
-		/* Check if the user has requested that the output buffer be enabled */
-		if ((config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT) ||
-				(config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK)) {
-			/* Set the port DIR bits to enable the output buffer */
-			port->DIRSET.reg = pin_mask;
-		}
-	}
-}
-
-/**
- * \brief Writes a Port pin configuration to the hardware module.
- *
- * Writes out a given configuration of a Port pin configuration to the hardware
- * module.
- *
- * \note If the pin direction is set as an output, the pull-up/pull-down input
- *       configuration setting is ignored.
- *
- * \param[in] gpio_pin  Index of the GPIO pin to configure
- * \param[in] config    Configuration settings for the pin
- */
-void system_pinmux_pin_set_config(
-		const uint8_t gpio_pin,
-		const struct system_pinmux_config *const config)
-{
-	PortGroup *const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
-	uint32_t pin_mask = (1UL << (gpio_pin % 32));
-
-	_system_pinmux_config(port, pin_mask, config);
-}
-
-/**
- * \brief Writes a Port pin group configuration to the hardware module.
- *
- * Writes out a given configuration of a Port pin group configuration to the
- * hardware module.
- *
- * \note If the pin direction is set as an output, the pull-up/pull-down input
- *       configuration setting is ignored.
- *
- * \param[in] port      Base of the PORT module to configure
- * \param[in] mask      Mask of the port pin(s) to configure
- * \param[in] config    Configuration settings for the pin
- */
-void system_pinmux_group_set_config(
-		PortGroup *const port,
-		const uint32_t mask,
-		const struct system_pinmux_config *const config)
-{
-	Assert(port);
-
-	for (int i = 0; i < 32; i++) {
-		if (mask & (1UL << i)) {
-			_system_pinmux_config(port, (1UL << i), config);
-		}
-	}
-}
-
-/**
- * \brief Configures the input sampling mode for a group of pins.
- *
- * Configures the input sampling mode for a group of pins, to
- * control when the physical I/O pin value is sampled and
- * stored inside the microcontroller.
- *
- * \param[in] port     Base of the PORT module to configure
- * \param[in] mask     Mask of the port pin(s) to configure
- * \param[in] mode     New pin sampling mode to configure
- */
-void system_pinmux_group_set_input_sample_mode(
-		PortGroup *const port,
-		const uint32_t mask,
-		const enum system_pinmux_pin_sample mode)
-{
-	Assert(port);
-
-	if (mode == SYSTEM_PINMUX_PIN_SAMPLE_ONDEMAND) {
-		port->CTRL.reg |= mask;
-	} else {
-		port->CTRL.reg &= ~mask;
-	}
-}
-
-#ifdef FEATURE_SYSTEM_PINMUX_SLEWRATE_LIMITER
-/**
- * \brief Configures the output slew rate mode for a group of pins.
- *
- * Configures the output slew rate mode for a group of pins, to
- * control the speed at which the physical output pin can react to
- * logical changes of the I/O pin value.
- *
- * \param[in] port     Base of the PORT module to configure
- * \param[in] mask     Mask of the port pin(s) to configure
- * \param[in] mode     New pin slew rate mode to configure
- */
-void system_pinmux_group_set_output_slew_rate(
-		PortGroup *const port,
-		const uint32_t mask,
-		const enum system_pinmux_pin_slew_rate mode)
-{
-	Assert(port);
-
-	for (int i = 0; i < 32; i++) {
-		if (mask & (1UL << i)) {
-			if (mode == SYSTEM_PINMUX_PIN_SLEW_RATE_LIMITED) {
-				port->PINCFG[i].reg |=  PORT_PINCFG_SLEWLIM;
-			} else {
-				port->PINCFG[i].reg &= ~PORT_PINCFG_SLEWLIM;
-			}
-		}
-	}
-}
-#endif
-
-#ifdef FEATURE_SYSTEM_PINMUX_DRIVE_STRENGTH
-/**
- * \brief Configures the output driver strength mode for a group of pins.
- *
- * Configures the output drive strength for a group of pins, to
- * control the amount of current the pad is able to sink/source.
- *
- * \param[in] port     Base of the PORT module to configure
- * \param[in] mask     Mask of the port pin(s) to configure
- * \param[in] mode     New output driver strength mode to configure
- */
-void system_pinmux_group_set_output_strength(
-		PortGroup *const port,
-		const uint32_t mask,
-		const enum system_pinmux_pin_strength mode)
-{
-	Assert(port);
-
-	for (int i = 0; i < 32; i++) {
-		if (mask & (1UL << i)) {
-			if (mode == SYSTEM_PINMUX_PIN_STRENGTH_HIGH) {
-				port->PINCFG[i].reg |=  PORT_PINCFG_DRVSTR;
-			} else {
-				port->PINCFG[i].reg &= ~PORT_PINCFG_DRVSTR;
-			}
-		}
-	}
-}
-#endif
-
-#ifdef FEATURE_SYSTEM_PINMUX_OPEN_DRAIN
-/**
- * \brief Configures the output driver mode for a group of pins.
- *
- * Configures the output driver mode for a group of pins, to
- * control the pad behavior.
- *
- * \param[in] port Base of the PORT module to configure
- * \param[in] mask Mask of the port pin(s) to configure
- * \param[in] mode New pad output driver mode to configure
- */
-void system_pinmux_group_set_output_drive(
-		PortGroup *const port,
-		const uint32_t mask,
-		const enum system_pinmux_pin_drive mode)
-{
-	Assert(port);
-
-	for (int i = 0; i < 32; i++) {
-		if (mask & (1UL << i)) {
-			if (mode == SYSTEM_PINMUX_PIN_DRIVE_OPEN_DRAIN) {
-				port->PINCFG[i].reg |= PORT_PINCFG_ODRAIN;
-			} else {
-				port->PINCFG[i].reg &= ~PORT_PINCFG_ODRAIN;
-			}
-		}
-	}
-}
-#endif
diff --git a/atmel-samd/asf/sam0/drivers/system/pinmux/pinmux.h b/atmel-samd/asf/sam0/drivers/system/pinmux/pinmux.h
deleted file mode 100644
index 015389c3f..000000000
--- a/atmel-samd/asf/sam0/drivers/system/pinmux/pinmux.h
+++ /dev/null
@@ -1,675 +0,0 @@
-/**
- * \file
- *
- * \brief SAM Pin Multiplexer Driver
- *
- * Copyright (C) 2012-2016 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-#ifndef PINMUX_H_INCLUDED
-#define PINMUX_H_INCLUDED
-
-/**
- * \defgroup asfdoc_sam0_system_pinmux_group SAM System Pin Multiplexer (SYSTEM PINMUX) Driver
- *
- * This driver for Atmel&reg; | SMART ARM&reg;-based microcontrollers provides
- * an interface for the configuration and management of the device's physical
- * I/O Pins, to alter the direction and input/drive characteristics as well as
- * to configure the pin peripheral multiplexer selection.
- *
- * The following peripheral is used by this module:
- *  - PORT (Port I/O Management)
- *
- * The following devices can use this module:
- *  - Atmel | SMART SAM D20/D21
- *  - Atmel | SMART SAM R21
- *  - Atmel | SMART SAM D09/D10/D11
- *  - Atmel | SMART SAM L21/L22
- *  - Atmel | SMART SAM DA1
- *  - Atmel | SMART SAM C20/C21
- *
- * The outline of this documentation is as follows:
- *  - \ref asfdoc_sam0_system_pinmux_prerequisites
- *  - \ref asfdoc_sam0_system_pinmux_module_overview
- *  - \ref asfdoc_sam0_system_pinmux_special_considerations
- *  - \ref asfdoc_sam0_system_pinmux_extra_info
- *  - \ref asfdoc_sam0_system_pinmux_examples
- *  - \ref asfdoc_sam0_system_pinmux_api_overview
- *
- *
- * \section asfdoc_sam0_system_pinmux_prerequisites Prerequisites
- *
- * There are no prerequisites for this module.
- *
- *
- * \section asfdoc_sam0_system_pinmux_module_overview Module Overview
- *
- * The SAM devices contain a number of General Purpose I/O pins, used to
- * interface the user application logic and internal hardware peripherals to
- * an external system. The Pin Multiplexer (PINMUX) driver provides a method
- * of configuring the individual pin peripheral multiplexers to select
- * alternate pin functions.
- *
- * \subsection asfdoc_sam0_system_pinmux_features Driver Feature Macro Definition
- * <table>
- *  <tr>
- *    <th>Driver Feature Macro</th>
- *    <th>Supported devices</th>
- *  </tr>
- *  <tr>
- *    <td>FEATURE_SYSTEM_PINMUX_DRIVE_STRENGTH</td>
- *    <td>SAM L21, SAM C20/C21</td>
- *  </tr>
- * </table>
- * \note The specific features are only available in the driver when the
- * selected device supports those features.
- *
- * \subsection asfdoc_sam0_system_pinmux_physical_logical_pins Physical and Logical GPIO Pins
- * SAM devices use two naming conventions for the I/O pins in the device; one
- * physical and one logical. Each physical pin on a device package is assigned
- * both a physical port and pin identifier (e.g. "PORTA.0") as well as a
- * monotonically incrementing logical GPIO number (e.g. "GPIO0"). While the
- * former is used to map physical pins to their physical internal device module
- * counterparts, for simplicity the design of this driver uses the logical GPIO
- * numbers instead.
- *
- * \subsection asfdoc_sam0_system_pinmux_peripheral_muxing Peripheral Multiplexing
- * SAM devices contain a peripheral MUX, which is individually controllable
- * for each I/O pin of the device. The peripheral MUX allows you to select the
- * function of a physical package pin - whether it will be controlled as a user
- * controllable GPIO pin, or whether it will be connected internally to one of
- * several peripheral modules (such as an I<SUP>2</SUP>C module). When a pin is
- * configured in GPIO mode, other peripherals connected to the same pin will be
- * disabled.
- *
- * \subsection asfdoc_sam0_system_pinmux_pad_characteristics Special Pad Characteristics
- * There are several special modes that can be selected on one or more I/O pins
- * of the device, which alter the input and output characteristics of the pad.
- *
- * \subsubsection asfdoc_sam0_system_pinmux_drive_strength Drive Strength
- * The Drive Strength configures the strength of the output driver on the
- * pad. Normally, there is a fixed current limit that each I/O pin can safely
- * drive, however some I/O pads offer a higher drive mode which increases this
- * limit for that I/O pin at the expense of an increased power consumption.
- *
- * \subsubsection asfdoc_sam0_system_pinmux_slew_rate Slew Rate
- * The Slew Rate configures the slew rate of the output driver, limiting the
- * rate at which the pad output voltage can change with time.
- *
- * \subsubsection asfdoc_sam0_system_pinmux_input_sample_mode Input Sample Mode
- * The Input Sample Mode configures the input sampler buffer of the pad. By
- * default, the input buffer is only sampled "on-demand", i.e. when the user
- * application attempts to read from the input buffer. This mode is the most
- * power efficient, but increases the latency of the input sample by two clock
- * cycles of the port clock. To reduce latency, the input sampler can instead
- * be configured to always sample the input buffer on each port clock cycle, at
- * the expense of an increased power consumption.
- *
- * \subsection asfdoc_sam0_system_pinmux_module_overview_physical Physical Connection
- *
- * \ref asfdoc_sam0_system_pinmux_intconnections "The diagram below" shows
- * how this module is interconnected within the device:
- *
- * \anchor asfdoc_sam0_system_pinmux_intconnections
- * \dot
- * digraph overview {
- *   node [label="Port Pad" shape=square] pad;
- *
- *   subgraph driver {
- *     node [label="Peripheral MUX" shape=trapezium] pinmux;
- *     node [label="GPIO Module" shape=ellipse shape=ellipse style=filled fillcolor=lightgray] gpio;
- *     node [label="Other Peripheral Modules" shape=ellipse style=filled fillcolor=lightgray] peripherals;
- *   }
- *
- *   pinmux -> gpio;
- *   pad    -> pinmux;
- *   pinmux -> peripherals;
- * }
- * \enddot
- *
- * \section asfdoc_sam0_system_pinmux_special_considerations Special Considerations
- *
- * The SAM port pin input sampling mode is set in groups of four physical
- * pins; setting the sampling mode of any pin in a sub-group of eight I/O pins
- * will configure the sampling mode of the entire sub-group.
- *
- * High Drive Strength output driver mode is not available on all device pins -
- * refer to your device specific datasheet.
- *
- *
- * \section asfdoc_sam0_system_pinmux_extra_info Extra Information
- *
- * For extra information, see \ref asfdoc_sam0_system_pinmux_extra. This includes:
- *  - \ref asfdoc_sam0_system_pinmux_extra_acronyms
- *  - \ref asfdoc_sam0_system_pinmux_extra_dependencies
- *  - \ref asfdoc_sam0_system_pinmux_extra_errata
- *  - \ref asfdoc_sam0_system_pinmux_extra_history
- *
- *
- * \section asfdoc_sam0_system_pinmux_examples Examples
- *
- * For a list of examples related to this driver, see
- * \ref asfdoc_sam0_system_pinmux_exqsg.
- *
- *
- * \section asfdoc_sam0_system_pinmux_api_overview API Overview
- * @{
- */
-
-#include <compiler.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*@{*/
-#if (SAML21) || (SAMC20) || (SAMC21) || (SAMD21) || (SAMD10) || (SAMD11) || (SAMR30) || defined(__DOXYGEN__)
-/** Output Driver Strength Selection feature support */
-#  define FEATURE_SYSTEM_PINMUX_DRIVE_STRENGTH
-#endif
-/*@}*/
-
-/** Peripheral multiplexer index to select GPIO mode for a pin */
-#define SYSTEM_PINMUX_GPIO    (1 << 7)
-
-/**
- * \brief Port pin direction configuration enum.
- *
- * Enum for the possible pin direction settings of the port pin configuration
- * structure, to indicate the direction the pin should use.
- */
-enum system_pinmux_pin_dir {
-	/** The pin's input buffer should be enabled, so that the pin state can
-	 *  be read */
-	SYSTEM_PINMUX_PIN_DIR_INPUT,
-	/** The pin's output buffer should be enabled, so that the pin state can
-	 *  be set (but not read back) */
-	SYSTEM_PINMUX_PIN_DIR_OUTPUT,
-	/** The pin's output and input buffers should both be enabled, so that the
-	 *  pin state can be set and read back */
-	SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK,
-};
-
-/**
- * \brief Port pin input pull configuration enum.
- *
- * Enum for the possible pin pull settings of the port pin configuration
- * structure, to indicate the type of logic level pull the pin should use.
- */
-enum system_pinmux_pin_pull {
-	/** No logical pull should be applied to the pin */
-	SYSTEM_PINMUX_PIN_PULL_NONE,
-	/** Pin should be pulled up when idle */
-	SYSTEM_PINMUX_PIN_PULL_UP,
-	/** Pin should be pulled down when idle */
-	SYSTEM_PINMUX_PIN_PULL_DOWN,
-};
-
-/**
- * \brief Port pin digital input sampling mode enum.
- *
- * Enum for the possible input sampling modes for the port pin configuration
- * structure, to indicate the type of sampling a port pin should use.
- */
-enum system_pinmux_pin_sample {
-	/** Pin input buffer should continuously sample the pin state */
-	SYSTEM_PINMUX_PIN_SAMPLE_CONTINUOUS,
-	/** Pin input buffer should be enabled when the IN register is read */
-	SYSTEM_PINMUX_PIN_SAMPLE_ONDEMAND,
-};
-
-/**
- * \brief Port pin configuration structure.
- *
- * Configuration structure for a port pin instance. This structure should
- * be initialized by the \ref system_pinmux_get_config_defaults() function
- * before being modified by the user application.
- */
-struct system_pinmux_config {
-	/** MUX index of the peripheral that should control the pin, if peripheral
-	 *  control is desired. For GPIO use, this should be set to
-	 *  \ref SYSTEM_PINMUX_GPIO. */
-	uint8_t mux_position;
-
-	/** Port buffer input/output direction */
-	enum system_pinmux_pin_dir direction;
-
-	/** Logic level pull of the input buffer */
-	enum system_pinmux_pin_pull input_pull;
-
-	/** Enable lowest possible powerstate on the pin
-	 *
-	 *  \note All other configurations will be ignored, the pin will be disabled.
-	 */
-	bool powersave;
-};
-
-/** \name Configuration and Initialization
- * @{
- */
-
-/**
- * \brief Initializes a Port pin configuration structure to defaults.
- *
- * Initializes a given Port pin configuration structure to a set of
- * known default values. This function should be called on all new
- * instances of these configuration structures before being modified by the
- * user application.
- *
- * The default configuration is as follows:
- *  \li Non peripheral (i.e. GPIO) controlled
- *  \li Input mode with internal pull-up enabled
- *
- * \param[out] config  Configuration structure to initialize to default values
- */
-static inline void system_pinmux_get_config_defaults(
-		struct system_pinmux_config *const config)
-{
-	/* Sanity check arguments */
-	Assert(config);
-
-	/* Default configuration values */
-	config->mux_position = SYSTEM_PINMUX_GPIO;
-	config->direction    = SYSTEM_PINMUX_PIN_DIR_INPUT;
-	config->input_pull   = SYSTEM_PINMUX_PIN_PULL_UP;
-	config->powersave    = false;
-}
-
-void system_pinmux_pin_set_config(
-		const uint8_t gpio_pin,
-		const struct system_pinmux_config *const config);
-
-void system_pinmux_group_set_config(
-		PortGroup *const port,
-		const uint32_t mask,
-		const struct system_pinmux_config *const config);
-
-/** @} */
-
-/** \name Special Mode Configuration (Physical Group Orientated)
- *  @{
- */
-
-/**
- * \brief Retrieves the PORT module group instance from a given GPIO pin number.
- *
- * Retrieves the PORT module group instance associated with a given logical
- * GPIO pin number.
- *
- * \param[in] gpio_pin  Index of the GPIO pin to convert
- *
- * \return Base address of the associated PORT module.
- */
-static inline PortGroup* system_pinmux_get_group_from_gpio_pin(
-		const uint8_t gpio_pin)
-{
-	uint8_t port_index  = (gpio_pin / 128);
-	uint8_t group_index = (gpio_pin / 32);
-
-	/* Array of available ports */
-	Port *const ports[PORT_INST_NUM] = PORT_INSTS;
-
-	if (port_index < PORT_INST_NUM) {
-		return &(ports[port_index]->Group[group_index]);
-	} else {
-		Assert(false);
-		return NULL;
-	}
-}
-
-void system_pinmux_group_set_input_sample_mode(
-		PortGroup *const port,
-		const uint32_t mask,
-		const enum system_pinmux_pin_sample mode);
-
-/** @} */
-
-/** \name Special Mode Configuration (Logical Pin Orientated)
- *  @{
- */
-
-/**
- * \brief Retrieves the currently selected MUX position of a logical pin.
- *
- * Retrieves the selected MUX peripheral on a given logical GPIO pin.
- *
- * \param[in]  gpio_pin  Index of the GPIO pin to configure
- *
- * \return Currently selected peripheral index on the specified pin.
- */
-static inline uint8_t system_pinmux_pin_get_mux_position(
-		const uint8_t gpio_pin)
-{
-	PortGroup *const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
-	uint32_t pin_index = (gpio_pin % 32);
-
-	if (!(port->PINCFG[pin_index].reg & PORT_PINCFG_PMUXEN)) {
-		return SYSTEM_PINMUX_GPIO;
-	}
-
-	uint32_t pmux_reg = port->PMUX[pin_index / 2].reg;
-
-	if (pin_index & 1) {
-		return (pmux_reg & PORT_PMUX_PMUXO_Msk) >> PORT_PMUX_PMUXO_Pos;
-	}
-	else {
-		return (pmux_reg & PORT_PMUX_PMUXE_Msk) >> PORT_PMUX_PMUXE_Pos;
-	}
-}
-
-/**
- * \brief Configures the input sampling mode for a GPIO pin.
- *
- * Configures the input sampling mode for a GPIO input, to
- * control when the physical I/O pin value is sampled and
- * stored inside the microcontroller.
- *
- * \param[in] gpio_pin Index of the GPIO pin to configure
- * \param[in] mode     New pin sampling mode to configure
- */
-static inline void system_pinmux_pin_set_input_sample_mode(
-		const uint8_t gpio_pin,
-		const enum system_pinmux_pin_sample mode)
-{
-	PortGroup* const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
-	uint32_t pin_index = (gpio_pin % 32);
-
-	if (mode == SYSTEM_PINMUX_PIN_SAMPLE_ONDEMAND) {
-		port->CTRL.reg |= (1 << pin_index);
-	} else {
-		port->CTRL.reg &= ~(1 << pin_index);
-	}
-}
-
-/** @} */
-
-#ifdef FEATURE_SYSTEM_PINMUX_DRIVE_STRENGTH
-/**
- * \brief Port pin drive output strength enum.
- *
- * Enum for the possible output drive strengths for the port pin
- * configuration structure, to indicate the driver strength the pin should
- * use.
- */
-enum system_pinmux_pin_strength {
-  /** Normal output driver strength */
-  SYSTEM_PINMUX_PIN_STRENGTH_NORMAL,
-  /** High current output driver strength */
-  SYSTEM_PINMUX_PIN_STRENGTH_HIGH,
-};
-
-/**
- * \brief Configures the output driver strength mode for a GPIO pin.
- *
- * Configures the output drive strength for a GPIO output, to
- * control the amount of current the pad is able to sink/source.
- *
- * \param[in] gpio_pin  Index of the GPIO pin to configure
- * \param[in] mode      New output driver strength mode to configure
- */
-static inline void system_pinmux_pin_set_output_strength(
-    const uint8_t gpio_pin,
-    const enum system_pinmux_pin_strength mode)
-{
-  PortGroup* const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
-  uint32_t pin_index = (gpio_pin % 32);
-
-  if (mode == SYSTEM_PINMUX_PIN_STRENGTH_HIGH) {
-    port->PINCFG[pin_index].reg |=  PORT_PINCFG_DRVSTR;
-  }
- else {
-    port->PINCFG[pin_index].reg &= ~PORT_PINCFG_DRVSTR;
- }
-}
-
-void system_pinmux_group_set_output_strength(
-    PortGroup *const port,
-    const uint32_t mask,
-    const enum system_pinmux_pin_strength mode);
-#endif
-
-#ifdef FEATURE_SYSTEM_PINMUX_SLEWRATE_LIMITER
-/**
- * \brief Port pin output slew rate enum.
- *
- * Enum for the possible output drive slew rates for the port pin
- * configuration structure, to indicate the driver slew rate the pin should
- * use.
- */
-enum system_pinmux_pin_slew_rate {
-  /** Normal pin output slew rate */
-  SYSTEM_PINMUX_PIN_SLEW_RATE_NORMAL,
-  /** Enable slew rate limiter on the pin */
-  SYSTEM_PINMUX_PIN_SLEW_RATE_LIMITED,
-};
-
-/**
- * \brief Configures the output slew rate mode for a GPIO pin.
- *
- * Configures the output slew rate mode for a GPIO output, to
- * control the speed at which the physical output pin can react to
- * logical changes of the I/O pin value.
- *
- * \param[in] gpio_pin  Index of the GPIO pin to configure
- * \param[in] mode      New pin slew rate mode to configure
- */
-static inline void system_pinmux_pin_set_output_slew_rate(
-    const uint8_t gpio_pin,
-    const enum system_pinmux_pin_slew_rate mode)
-{
-  PortGroup* const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
-  uint32_t pin_index = (gpio_pin % 32);
-
-  if (mode == SYSTEM_PINMUX_PIN_SLEW_RATE_LIMITED) {
-    port->PINCFG[pin_index].reg |=  PORT_PINCFG_SLEWLIM;
-  }
-  else {
-    port->PINCFG[pin_index].reg &= ~PORT_PINCFG_SLEWLIM;
-  }
-}
-
-void system_pinmux_group_set_output_slew_rate(
-   PortGroup *const port,
-    const uint32_t mask,
-    const enum system_pinmux_pin_slew_rate mode);
-#endif
-
-#ifdef FEATURE_SYSTEM_PINMUX_OPEN_DRAIN
-/**
- * \brief Port pin output drive mode enum.
- *
- * Enum for the possible output drive modes for the port pin configuration
- * structure, to indicate the output mode the pin should use.
- */
-enum system_pinmux_pin_drive {
-  /** Use totem pole output drive mode */
-  SYSTEM_PINMUX_PIN_DRIVE_TOTEM,
-  /** Use open drain output drive mode */
-  SYSTEM_PINMUX_PIN_DRIVE_OPEN_DRAIN,
-};
-
-/**
- * \brief Configures the output driver mode for a GPIO pin.
- *
- * Configures the output driver mode for a GPIO output, to
- * control the pad behavior.
- *
- * \param[in] gpio_pin  Index of the GPIO pin to configure
- * \param[in] mode      New pad output driver mode to configure
- */
-static inline void system_pinmux_pin_set_output_drive(
-    const uint8_t gpio_pin,
-    const enum system_pinmux_pin_drive mode)
-{
-  PortGroup* const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
-  uint32_t pin_index = (gpio_pin % 32);
-
-  if (mode == SYSTEM_PINMUX_PIN_DRIVE_OPEN_DRAIN) {
-    port->PINCFG[pin_index].reg |=  PORT_PINCFG_ODRAIN;
-  }
-  else {
-    port->PINCFG[pin_index].reg &= ~PORT_PINCFG_ODRAIN;
-  }
-}
-
-void system_pinmux_group_set_output_drive(
-    PortGroup *const port,
-    const uint32_t mask,
-    const enum system_pinmux_pin_drive mode);
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-/** @} */
-
-/**
- * \page asfdoc_sam0_system_pinmux_extra Extra Information for SYSTEM PINMUX Driver
- *
- * \section asfdoc_sam0_system_pinmux_extra_acronyms Acronyms
- * The table below presents the acronyms used in this module:
- *
- * <table>
- *	<tr>
- *		<th>Acronym</th>
- *		<th>Description</th>
- *	</tr>
- *	<tr>
- *		<td>GPIO</td>
- *		<td>General Purpose Input/Output</td>
- *	</tr>
- *	<tr>
- *		<td>MUX</td>
- *		<td>Multiplexer</td>
- *	</tr>
- * </table>
- *
- *
- * \section asfdoc_sam0_system_pinmux_extra_dependencies Dependencies
- * This driver has the following dependencies:
- *
- *  - None
- *
- *
- * \section asfdoc_sam0_system_pinmux_extra_errata Errata
- * There are no errata related to this driver.
- *
- *
- * \section asfdoc_sam0_system_pinmux_extra_history Module History
- * An overview of the module history is presented in the table below, with
- * details on the enhancements and fixes made to the module since its first
- * release. The current version of this corresponds to the newest version in
- * the table.
- *
- * <table>
- *	<tr>
- *		<th>Changelog</th>
- *	</tr>
- *	<tr>
- *		<td>Removed code of open drain, slew limit and drive strength
- *		features</td>
- *	</tr>
- *	<tr>
- *		<td>Fixed broken sampling mode function implementations, which wrote
- *		    corrupt configuration values to the device registers</td>
- *	</tr>
- *	<tr>
- *		<td>Added missing NULL pointer asserts to the PORT driver functions</td>
- *	</tr>
- *	<tr>
- *		<td>Initial Release</td>
- *	</tr>
- * </table>
- */
-
-/**
- * \page asfdoc_sam0_system_pinmux_exqsg Examples for SYSTEM PINMUX Driver
- *
- * This is a list of the available Quick Start guides (QSGs) and example
- * applications for \ref asfdoc_sam0_system_pinmux_group. QSGs are simple
- * examples with step-by-step instructions to configure and use this driver in a
- * selection of use cases. Note that a QSG can be compiled as a standalone
- * application or be added to the user application.
- *
- *  - \subpage asfdoc_sam0_system_pinmux_basic_use_case
- *
- * \page asfdoc_sam0_system_pinmux_document_revision_history Document Revision History
- *
- * <table>
- *	<tr>
- *		<th>Doc. Rev.</td>
- *		<th>Date</td>
- *		<th>Comments</td>
- *	</tr>
- *	<tr>
- *		<td>42121F</td>
- *		<td>12/2015</td>
- *		<td>Added support for SAM L21/L22, SAM DA1, SAM D09, and SAM C20/C21</td>
- *	</tr>
- *	<tr>
- *		<td>42121E</td>
- *		<td>12/2014</td>
- *		<td>Added support for SAM R21 and SAM D10/D11</td>
- *	</tr>
- *	<tr>
- *		<td>42121D</td>
- *		<td>01/2014</td>
- *		<td>Added support for SAM D21</td>
- *	</tr>
- *	<tr>
- *		<td>42121C</td>
- *		<td>09/2013</td>
- *		<td>Fixed incorrect documentation for the device pin sampling mode</td>
- *	</tr>
- *	<tr>
- *		<td>42121B</td>
- *		<td>06/2013</td>
- *		<td>Corrected documentation typos</td>
- *	</tr>
- *	<tr>
- *		<td>42121A</td>
- *		<td>06/2013</td>
- *		<td>Initial release</td>
- *	</tr>
- * </table>
- */
-
-#endif
diff --git a/atmel-samd/asf/sam0/drivers/system/power/power_sam_d_r/power.h b/atmel-samd/asf/sam0/drivers/system/power/power_sam_d_r/power.h
deleted file mode 100644
index fe884dea2..000000000
--- a/atmel-samd/asf/sam0/drivers/system/power/power_sam_d_r/power.h
+++ /dev/null
@@ -1,224 +0,0 @@
-/**
- * \file
- *
- * \brief SAM Power related functionality
- *
- * Copyright (C) 2014-2016 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-#ifndef POWER_H_INCLUDED
-#define POWER_H_INCLUDED
-
-#include <compiler.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * \addtogroup asfdoc_sam0_system_group
- * @{
- */
-
-/**
- * \brief Voltage references within the device.
- *
- * List of available voltage references (VREF) that may be used within the
- * device.
- */
-enum system_voltage_reference {
-	/** Temperature sensor voltage reference */
-	SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE,
-	/** Bandgap voltage reference */
-	SYSTEM_VOLTAGE_REFERENCE_BANDGAP,
-};
-
-/**
- * \brief Device sleep modes.
- *
- * List of available sleep modes in the device. A table of clocks available in
- * different sleep modes can be found in \ref asfdoc_sam0_system_module_overview_sleep_mode.
- */
-enum system_sleepmode {
-	/** IDLE 0 sleep mode */
-	SYSTEM_SLEEPMODE_IDLE_0,
-	/** IDLE 1 sleep mode */
-	SYSTEM_SLEEPMODE_IDLE_1,
-	/** IDLE 2 sleep mode */
-	SYSTEM_SLEEPMODE_IDLE_2,
-	/** Standby sleep mode */
-	SYSTEM_SLEEPMODE_STANDBY,
-};
-
-
-
-/**
- * \name Voltage References
- * @{
- */
-
-/**
- * \brief Enable the selected voltage reference
- *
- * Enables the selected voltage reference source, making the voltage reference
- * available on a pin as well as an input source to the analog peripherals.
- *
- * \param[in] vref  Voltage reference to enable
- */
-static inline void system_voltage_reference_enable(
-		const enum system_voltage_reference vref)
-{
-	switch (vref) {
-		case SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE:
-			SYSCTRL->VREF.reg |= SYSCTRL_VREF_TSEN;
-			break;
-
-		case SYSTEM_VOLTAGE_REFERENCE_BANDGAP:
-			SYSCTRL->VREF.reg |= SYSCTRL_VREF_BGOUTEN;
-			break;
-
-		default:
-			Assert(false);
-			return;
-	}
-}
-
-/**
- * \brief Disable the selected voltage reference
- *
- * Disables the selected voltage reference source.
- *
- * \param[in] vref  Voltage reference to disable
- */
-static inline void system_voltage_reference_disable(
-		const enum system_voltage_reference vref)
-{
-	switch (vref) {
-		case SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE:
-			SYSCTRL->VREF.reg &= ~SYSCTRL_VREF_TSEN;
-			break;
-
-		case SYSTEM_VOLTAGE_REFERENCE_BANDGAP:
-			SYSCTRL->VREF.reg &= ~SYSCTRL_VREF_BGOUTEN;
-			break;
-
-		default:
-			Assert(false);
-			return;
-	}
-}
-
-/**
- * @}
- */
-
-
-/**
- * \name Device Sleep Control
- * @{
- */
-
-/**
- * \brief Set the sleep mode of the device
- *
- * Sets the sleep mode of the device; the configured sleep mode will be entered
- * upon the next call of the \ref system_sleep() function.
- *
- * For an overview of which systems are disabled in sleep for the different
- * sleep modes, see \ref asfdoc_sam0_system_module_overview_sleep_mode.
- *
- * \param[in] sleep_mode  Sleep mode to configure for the next sleep operation
- *
- * \retval STATUS_OK               Operation completed successfully
- * \retval STATUS_ERR_INVALID_ARG  The requested sleep mode was invalid or not
- *                                 available
- */
-static inline enum status_code system_set_sleepmode(
-	const enum system_sleepmode sleep_mode)
-{
-#if (SAMD20)
-	/* Errata 13140: Make sure that the Flash does not power all the way down
-	 * when in sleep mode. This errata has been fixed as of revision D of SAMD21 */
-	NVMCTRL->CTRLB.bit.SLEEPPRM = NVMCTRL_CTRLB_SLEEPPRM_DISABLED_Val;
-#endif
-
-	switch (sleep_mode) {
-		case SYSTEM_SLEEPMODE_IDLE_0:
-		case SYSTEM_SLEEPMODE_IDLE_1:
-		case SYSTEM_SLEEPMODE_IDLE_2:
-			SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
-			PM->SLEEP.reg = sleep_mode;
-			break;
-
-		case SYSTEM_SLEEPMODE_STANDBY:
-			SCB->SCR |=  SCB_SCR_SLEEPDEEP_Msk;
-			break;
-
-		default:
-			return STATUS_ERR_INVALID_ARG;
-	}
-
-	return STATUS_OK;
-}
-
-/**
- * \brief Put the system to sleep waiting for interrupt
- *
- * Executes a device DSB (Data Synchronization Barrier) instruction to ensure
- * all ongoing memory accesses have completed, then a WFI (Wait For Interrupt)
- * instruction to place the device into the sleep mode specified by
- * \ref system_set_sleepmode until woken by an interrupt.
- */
-static inline void system_sleep(void)
-{
-	__DSB();
-	__WFI();
-}
-
-/**
- * @}
- */
-
-/** @} */
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* POWER_H_INCLUDED */
diff --git a/atmel-samd/asf/sam0/drivers/system/reset/reset_sam_d_r/reset.h b/atmel-samd/asf/sam0/drivers/system/reset/reset_sam_d_r/reset.h
deleted file mode 100644
index befed28e8..000000000
--- a/atmel-samd/asf/sam0/drivers/system/reset/reset_sam_d_r/reset.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/**
- * \file
- *
- * \brief SAM Reset related functionality
- *
- * Copyright (C) 2014-2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-#ifndef RESET_H_INCLUDED
-#define RESET_H_INCLUDED
-
-#include <compiler.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * \addtogroup asfdoc_sam0_system_group
- * @{
- */
-
-/**
- * \brief Reset causes of the system.
- *
- * List of possible reset causes of the system.
- */
-enum system_reset_cause {
-	/** The system was last reset by a software reset */
-	SYSTEM_RESET_CAUSE_SOFTWARE       = PM_RCAUSE_SYST,
-	/** The system was last reset by the watchdog timer */
-	SYSTEM_RESET_CAUSE_WDT            = PM_RCAUSE_WDT,
-	/** The system was last reset because the external reset line was pulled low */
-	SYSTEM_RESET_CAUSE_EXTERNAL_RESET = PM_RCAUSE_EXT,
-	/** The system was last reset by the BOD33 */
-	SYSTEM_RESET_CAUSE_BOD33          = PM_RCAUSE_BOD33,
-	/** The system was last reset by the BOD12 */
-	SYSTEM_RESET_CAUSE_BOD12          = PM_RCAUSE_BOD12,
-	/** The system was last reset by the POR (Power on reset) */
-	SYSTEM_RESET_CAUSE_POR            = PM_RCAUSE_POR,
-};
-
-
-/**
- * \name Reset Control
- * @{
- */
-
-/**
- * \brief Reset the MCU.
- *
- * Resets the MCU and all associated peripherals and registers, except RTC, all 32KHz sources,
- * WDT (if ALWAYSON is set) and GCLK (if WRTLOCK is set).
- *
- */
-static inline void system_reset(void)
-{
-	NVIC_SystemReset();
-}
-
-/**
- * \brief Return the reset cause.
- *
- * Retrieves the cause of the last system reset.
- *
- * \return An enum value indicating the cause of the last system reset.
- */
-static inline enum system_reset_cause system_get_reset_cause(void)
-{
-	return (enum system_reset_cause)PM->RCAUSE.reg;
-}
-
-/**
- * @}
- */
-
-/** @} */
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* RESET_H_INCLUDED */
diff --git a/atmel-samd/asf/sam0/drivers/system/system.c b/atmel-samd/asf/sam0/drivers/system/system.c
deleted file mode 100644
index 62f2d6463..000000000
--- a/atmel-samd/asf/sam0/drivers/system/system.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/**
- * \file
- *
- * \brief SAM System related functionality
- *
- * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-
-#include <system.h>
-
-/**
- * \internal
- * Dummy initialization function, used as a weak alias target for the various
- * init functions called by \ref system_init().
- */
-void _system_dummy_init(void);
-void _system_dummy_init(void)
-{
-	return;
-}
-
-#if !defined(__DOXYGEN__)
-#  if defined(__GNUC__)
-void system_clock_init(uint16_t dfll_fine_calibration) WEAK __attribute__((alias("_system_dummy_init")));
-void system_board_init(void) WEAK __attribute__((alias("_system_dummy_init")));
-void _system_events_init(void) WEAK __attribute__((alias("_system_dummy_init")));
-void _system_extint_init(void) WEAK __attribute__((alias("_system_dummy_init")));
-void _system_divas_init(void) WEAK __attribute__((alias("_system_dummy_init")));
-#  elif defined(__ICCARM__)
-void system_clock_init(uint16_t dfll_fine_calibration);
-void system_board_init(void);
-void _system_events_init(void);
-void _system_extint_init(void);
-void _system_divas_init(void);
-#    pragma weak system_clock_init=_system_dummy_init
-#    pragma weak system_board_init=_system_dummy_init
-#    pragma weak _system_events_init=_system_dummy_init
-#    pragma weak _system_extint_init=_system_dummy_init
-#    pragma weak _system_divas_init=_system_dummy_init
-#  endif
-#endif
-
-/**
- * \brief Initialize system
- *
- * This function will call the various initialization functions within the
- * system namespace. If a given optional system module is not available, the
- * associated call will effectively be a NOP (No Operation).
- *
- * Currently the following initialization functions are supported:
- *  - System clock initialization (via the SYSTEM CLOCK sub-module)
- *  - Board hardware initialization (via the Board module)
- *  - Event system driver initialization (via the EVSYS module)
- *  - External Interrupt driver initialization (via the EXTINT module)
- */
-void system_init(uint16_t dfll_fine_calibration)
-{
-	/* Configure GCLK and clock sources according to conf_clocks.h */
-	system_clock_init(dfll_fine_calibration);
-
-	/* Initialize board hardware */
-	system_board_init();
-
-	/* Initialize EVSYS hardware */
-	_system_events_init();
-
-	/* Initialize External hardware */
-	_system_extint_init();
-
-	/* Initialize DIVAS hardware */
-	_system_divas_init();
-}
diff --git a/atmel-samd/asf/sam0/drivers/system/system.h b/atmel-samd/asf/sam0/drivers/system/system.h
deleted file mode 100644
index a0be5b705..000000000
--- a/atmel-samd/asf/sam0/drivers/system/system.h
+++ /dev/null
@@ -1,727 +0,0 @@
-/**
- * \file
- *
- * \brief SAM System related functionality
- *
- * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * 4. This software may only be redistributed and used in connection with an
- *    Atmel microcontroller product.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-/*
- * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
- */
-#ifndef SYSTEM_H_INCLUDED
-#define SYSTEM_H_INCLUDED
-
-#include <compiler.h>
-#include <clock.h>
-#include <gclk.h>
-#include <pinmux.h>
-#include <power.h>
-#include <reset.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * \defgroup asfdoc_sam0_system_group SAM System (SYSTEM) Driver
- *
- * This driver for Atmel&reg; | SMART ARM&reg;-based microcontrollers provides an interface for the configuration
- * and management of the device's system relation functionality, necessary for
- * the basic device operation. This is not limited to a single peripheral, but
- * extends across multiple hardware peripherals.
- *
- * The following peripherals are used by this module:
- * \if DEVICE_SAML21_SYSTEM_SUPPORT
- *  - PM (Power Manager)
- *  - RSTC (Reset Controller)
- *  - SUPC (Supply Controller)
- * \endif
- * \if DEVICE_SAMC21_SYSTEM_SUPPORT
- *  - PM (Power Manager)
- *  - RSTC (Reset Controller)
- *  - SUPC (Supply Controller)
- * \endif
- * \if DEVICE_SAMD21_SYSTEM_SUPPORT
- *  - SYSCTRL (System Control)
- *  - PM (Power Manager)
- * \endif
- *
- * The following devices can use this module:
- * \if DEVICE_SAML21_SYSTEM_SUPPORT
- *  - Atmel | SMART SAM L21
- * \endif
- * \if DEVICE_SAMC21_SYSTEM_SUPPORT
- *  - Atmel | SMART SAM C20/C21
- * \endif
- * \if DEVICE_SAMD21_SYSTEM_SUPPORT
- *  - Atmel | SMART SAM D20/D21
- *  - Atmel | SMART SAM R21
- *  - Atmel | SMART SAM D09/D10/D11
- *  - Atmel | SMART SAM DA1
- * \endif
- *
- * The outline of this documentation is as follows:
- *  - \ref asfdoc_sam0_system_prerequisites
- *  - \ref asfdoc_sam0_system_module_overview
- *  - \ref asfdoc_sam0_system_special_considerations
- *  - \ref asfdoc_sam0_system_extra_info
- *  - \ref asfdoc_sam0_system_examples
- *  - \ref asfdoc_sam0_system_api_overview
- *
- *
- * \section asfdoc_sam0_system_prerequisites Prerequisites
- *
- * There are no prerequisites for this module.
- *
- *
- * \section asfdoc_sam0_system_module_overview Module Overview
- *
- * The System driver provides a collection of interfaces between the user
- * application logic, and the core device functionality (such as clocks, reset
- * cause determination, etc.) that is required for all applications. It contains
- * a number of sub-modules that control one specific aspect of the device:
- *
- * - System Core (this module)
- * - \ref asfdoc_sam0_system_clock_group "System Clock Control" (sub-module)
- * - \ref asfdoc_sam0_system_interrupt_group "System Interrupt Control" (sub-module)
- * - \ref asfdoc_sam0_system_pinmux_group "System Pin Multiplexer Control" (sub-module)
- *
- *
- * \if DEVICE_SAML21_SYSTEM_SUPPORT
- * \subsection asfdoc_sam0_system_module_overview_vreg_l21 Voltage Regulator
- * The SAM device controls the voltage regulators for the core (VDDCORE) and
- * backup (VDDBU) domains. It sets the voltage regulators according to the sleep
- * modes, the performance level, or the user configuration.
- *
- * In active mode, the voltage regulator can be chosen on the fly between a LDO
- * or a Buck converter. In standby mode, the low power voltage regulator is used
- * to supply VDDCORE.
- *
- * \subsection asfdoc_sam0_system_module_overview_bbps Battery Backup Power Switch
- * The SAM device supports connection of a battery backup to the VBAT power pin.
- * It includes functionality that enables automatic power switching between main
- * power and battery backup power. This will ensure power to the backup domain,
- * when the main battery or power source is unavailable.
- * \endif
- *
- * \if DEVICE_SAMC21_SYSTEM_SUPPORT
- * \subsection asfdoc_sam0_system_module_overview_vreg_c21 Voltage Regulator
- * The SAM device controls the voltage regulators for the core (VDDCORE). It sets
- * the voltage regulators according to the sleep modes.
- *
- * There are a selectable reference voltage and voltage dependent on the temperature
- * which can be used by analog modules like the ADC.
- * \endif
- *
- * \subsection asfdoc_sam0_system_module_overview_vref Voltage References
- * The various analog modules within the SAM devices (such as AC, ADC, and
- * DAC) require a voltage reference to be configured to act as a reference point
- * for comparisons and conversions.
- *
- * The SAM devices contain multiple references, including an internal
- * temperature sensor and a fixed band-gap voltage source. When enabled, the
- * associated voltage reference can be selected within the desired peripheral
- * where applicable.
- *
- * \subsection asfdoc_sam0_system_module_overview_reset_cause System Reset Cause
- * In some applications there may be a need to execute a different program
- * flow based on how the device was reset. For example, if the cause of reset
- * was the Watchdog timer (WDT), this might indicate an error in the application,
- * and a form of error handling or error logging might be needed.
- *
- * For this reason, an API is provided to retrieve the cause of the last system
- * reset, so that appropriate action can be taken.
- *
- * \if DEVICE_SAML21_SYSTEM_SUPPORT
- * There are three groups of reset sources:
- *   - Power supply reset: Resets caused by an electrical issue. It covers POR and BOD reset.
- *   - User reset: Resets caused by the application. It covers external reset,
- *             system reset, and watchdog reset.
- *   - Backup reset: Resets caused by a backup mode exit condition.
- *
- * \subsection asfdoc_sam0_system_module_overview_performance_level Performance Level
- * Performance level allows the user to adjust the regulator output voltage to reduce
- * power consumption. The user can on the fly select the most suitable performance
- * level, depending on the application demands.
- *
- * The SAM device can operate at two different performance levels (PL0 and PL2).
- * When operating at PL0, the voltage applied on the full logic area is reduced
- * by voltage scaling. This voltage scaling technique allows to reduce the active
- * power consumption while decreasing the maximum frequency of the device. When
- * operating at PL2, the voltage regulator supplies the highest voltage, allowing
- * the device to run at higher clock speeds.
- *
- * Performance level transition is possible only when the device is in active
- * mode. After a reset, the device starts at the lowest performance level
- * (lowest power consumption and lowest max. frequency). The application can then
- * switch to another performance level at any time without any stop in the code
- * execution. As shown in \ref asfdoc_sam0_system_performance_level_transition_figure.
- *
- * \note When scaling down the performance level, the bus frequency should first be
- *  scaled down in order to not exceed the maximum frequency allowed for the
- *  low performance level.
- *  When scaling up the performance level (e.g. from PL0 to PL2), check the performance
- *  level status before increasing the bus frequency. It can be increased only
- *  when the performance level transition is completed.
- *
- * \anchor asfdoc_sam0_system_performance_level_transition_figure
- * \image html performance_level_transition.svg "Performance Level Transition"
- *
- * \subsection asfdoc_sam0_system_module_overview_power_domain Power Domain Gating
- * Power domain gating allows power saving by reducing the voltage in logic
- * areas in the device to a low-power supply. The feature is available in
- * Standby sleep mode and will reduce the voltage in domains where all peripherals
- * are idle. Internal logic will maintain its content, meaning the corresponding
- * peripherals will not need to be reconfigured when normal operating voltage
- * is returned. Most power domains can be in the following three states:
- *
- * - Active state: The power domain is powered on.
- * - Retention state: The main voltage supply for the power domain is switched off,
- * while maintaining a secondary low-power supply for the sequential cells. The
- * logic context is restored when waking up.
- * - Off state: The power domain is entirely powered off. The logic context is lost.
- *
- * The SAM L21 device  contains three power domains which can be controlled using
- * power domain gating, namely PD0, PD1, and PD2. These power domains can be
- * configured to the following cases:
- * - Default with no sleepwalking peripherals: A power domain is automatically set
- * to retention state in standby sleep mode if no activity require it. The application
- * can force all power domains to remain in active state during standby sleep mode
- * in order to accelerate wakeup time.
- * - Default with sleepwalking peripherals: If one or more peripherals are enabled
- * to perform sleepwalking tasks in standby sleep mode, the corresponding power
- * domain (PDn) remains in active state as well as all inferior power domains (<PDn).
- * - Sleepwalking with dynamic power domain gating: During standby sleep mode, a
- * power domain (PDn) in active can wake up a superior power domain (>PDn) in order
- * to perform a sleepwalking task. The superior power domain is then automatically
- * set to active state. At the end of the sleepwalking task, the device can either
- * be woken up or the superior power domain can return to retention state.
- *
- * Power domains can be linked to each other, it allows a power domain (PDn) to be kept
- * in active state if the inferior power domain (PDn-1) is in active state too.
- *
- * \ref asfdoc_sam0_system_power_domain_overview_table illustrates the
- * four cases to consider in standby mode.
- *
- * \anchor asfdoc_sam0_system_power_domain_overview_table
- * <table>
- *  <caption>Sleep Mode versus Power Domain State Overview</caption>
- *  <tr>
- *      <th>Sleep mode</th>
- *      <th>PD0</th>
- *      <th>PD1</th>
- *      <th>PD2</th>
- *      <th>PDTOP</th>
- *      <th>PDBACKUP</th>
- *  </tr>
- *  <tr>
- *      <td>Idle</td>
- *      <td>active</td>
- *      <td>active</td>
- *      <td>active</td>
- *      <td>active</td>
- *      <td>active</td>
- *  </tr>
- *  <tr>
- *      <td>Standby - Case 1</td>
- *      <td>active</td>
- *      <td>active</td>
- *      <td>active</td>
- *      <td>active</td>
- *      <td>active</td>
- *  </tr>
- *  <tr>
- *      <td>Standby - Case 2</td>
- *      <td>active</td>
- *      <td>active</td>
- *      <td>retention</td>
- *      <td>active</td>
- *      <td>active</td>
- *  </tr>
- *  <tr>
- *      <td>Standby - Case 3</td>
- *      <td>active</td>
- *      <td>retention</td>
- *      <td>retention</td>
- *      <td>active</td>
- *      <td>active</td>
- *  </tr>
- *  <tr>
- *      <td>Standby - Case 4</td>
- *      <td>retention</td>
- *      <td>retention</td>
- *      <td>retention</td>
- *      <td>active</td>
- *      <td>active</td>
- *  </tr>
- *  <tr>
- *      <td>Backup</td>
- *      <td>off</td>
- *      <td>off</td>
- *      <td>off</td>
- *      <td>off</td>
- *      <td>active</td>
- *  </tr>
- *  <tr>
- *      <td>Off</td>
- *      <td>off</td>
- *      <td>off</td>
- *      <td>off</td>
- *      <td>off</td>
- *      <td>off</td>
- *  </tr>
- * </table>
- *
- * \subsection asfdoc_sam0_system_module_overview_ram_state RAMs Low Power Mode
- * By default, in standby sleep mode, RAM is in low power mode (back biased)
- * if its power domain is in retention state.
- * \ref asfdoc_sam0_system_power_ram_state_table lists RAMs low power mode.
- *
- * \anchor asfdoc_sam0_system_power_ram_state_table
- * <table>
- *  <caption>RAM Back-biasing Mode</caption>
- *  <tr>
- *      <th>RAM mode</th>
- *      <th>Description</th>
- *  </tr>
- *  <tr>
- *      <td>Retention Back-biasing mode</td>
- *      <td>RAM is back-biased if its power domain is in retention mode</td>
- *  </tr>
- *  <tr>
- *      <td>Standby Back-biasing mode</td>
- *      <td>RAM is back-biased if the device is in standby mode</td>
- *  </tr>
- *  <tr>
- *      <td>Standby OFF mode</td>
- *      <td>RAM is OFF if the device is in standby mode</td>
- *  </tr>
- *  <tr>
- *      <td>Always OFF mode</td>
- *      <td>RAM is OFF if the device is in RET mode</td>
- *  </tr>
- * </table>
- *
- * \endif
- *
- * \subsection asfdoc_sam0_system_module_overview_sleep_mode Sleep Modes
- * The SAM devices have several sleep modes. The sleep mode controls
- * which clock systems on the device will remain enabled or disabled when the
- * device enters a low power sleep mode.
- * \ref asfdoc_sam0_system_module_sleep_mode_table "The table below" lists the
- * clock settings of the different sleep modes.
- *
- * \anchor asfdoc_sam0_system_module_sleep_mode_table
- * <table>
- *  <caption>SAM Device Sleep Modes</caption>
- * \if DEVICE_SAML21_SYSTEM_SUPPORT
- *  <tr>
- *      <th>Sleep mode</th>
- *      <th>System clock</th>
- *      <th>CPU clock</th>
- *      <th>AHB/AHB clock</th>
- *      <th>GCLK clocks</th>
- *      <th>Oscillators (ONDEMAND  = 0)</th>
- *      <th>Oscillators (ONDEMAND  = 1)</th>
- *      <th>Regulator mode</th>
- *      <th>RAM mode</th>
- *  </tr>
- *  <tr>
- *      <td>Idle</td>
- *      <td>Run</td>
- *      <td>Stop</td>
- *      <td>Run if requested</td>
- *      <td>Run</td>
- *      <td>Run</td>
- *      <td>Run if requested</td>
- *      <td>Normal</td>
- *      <td>Normal</td>
- *  </tr>
- *  <tr>
- *      <td>Standby</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Run if requested</td>
- *      <td>Run if requested</td>
- *      <td>Run if requested or RUNSTDBY  = 1</td>
- *      <td>Run if requested</td>
- *      <td>Low pwer</td>
- *      <td>Low pwer</td>
- *  </tr>
- *  <tr>
- *      <td>Backup</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Backup</td>
- *      <td>Off</td>
- *  </tr>
- *  <tr>
- *      <td>Off</td>
- *      <td>Off</td>
- *      <td>Off</td>
- *      <td>Off</td>
- *      <td>Off</td>
- *      <td>Off</td>
- *      <td>Off</td>
- *      <td>Off</td>
- *      <td>Off</td>
- *  </tr>
- * \else
- *  <tr>
- *      <th>Sleep mode</th>
- *      <th>CPU clock</th>
- *      <th>AHB clock</th>
- *      <th>APB clocks</th>
- *      <th>Clock sources</th>
- *      <th>System clock</th>
- *      <th>32KHz</th>
- *      <th>Reg mode</th>
- *      <th>RAM mode</th>
- *  </tr>
- *  <tr>
- *      <td>Idle 0</td>
- *      <td>Stop</td>
- *      <td>Run</td>
- *      <td>Run</td>
- *      <td>Run</td>
- *      <td>Run</td>
- *      <td>Run</td>
- *      <td>Normal</td>
- *      <td>Normal</td>
- *  </tr>
- *  <tr>
- *      <td>Idle 1</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Run</td>
- *      <td>Run</td>
- *      <td>Run</td>
- *      <td>Run</td>
- *      <td>Normal</td>
- *      <td>Normal</td>
- *  </tr>
- *  <tr>
- *      <td>Idle 2</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Run</td>
- *      <td>Run</td>
- *      <td>Run</td>
- *      <td>Normal</td>
- *      <td>Normal</td>
- *  </tr>
- *  <tr>
- *      <td>Standby</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Stop</td>
- *      <td>Low Power</td>
- *      <td>Source/Drain biasing</td>
- *  </tr>
- * \endif
- * </table>
- *
- * Before entering device sleep, one of the available sleep modes must be set.
- * The device will automatically wake up in response to an interrupt being
- * generated or upon any other sleep mode exit condition.
- *
- * Some peripheral clocks will remain enabled during sleep, depending on their
- * configuration. If desired, the modules can remain clocked during sleep to allow
- * them continue to operate while other parts of the system are powered down
- * to save power.
- *
- *
- * \section asfdoc_sam0_system_special_considerations Special Considerations
- *
- * Most of the functions in this driver have device specific restrictions and
- * caveats; refer to your device datasheet.
- *
- *
- * \section asfdoc_sam0_system_extra_info Extra Information
- *
- * For extra information, see \ref asfdoc_sam0_system_extra. This includes:
- *  - \ref asfdoc_sam0_system_extra_acronyms
- *  - \ref asfdoc_sam0_system_extra_dependencies
- *  - \ref asfdoc_sam0_system_extra_errata
- *  - \ref asfdoc_sam0_system_extra_history
- *
- *
- * \section asfdoc_sam0_system_examples Examples
- *
- * For SYSTEM module related examples, refer to the sub-modules listed in
- * the \ref asfdoc_sam0_system_module_overview "Module Overview".
- *
- * \if DEVICE_SAML21_SYSTEM_SUPPORT
- * For a list of examples related to this driver, see
- * \ref asfdoc_sam0_drivers_power_exqsg.
- * \endif
- *
- *
- * \section asfdoc_sam0_system_api_overview API Overview
- * @{
- */
-
-/**
- * \name System Debugger
- * @{
- */
-
-/**
- * \brief Check if debugger is present.
- *
- * Check if debugger is connected to the onboard debug system (DAP).
- *
- * \return A bool identifying if a debugger is present.
- *
- * \retval true  Debugger is connected to the system
- * \retval false Debugger is not connected to the system
- *
- */
-static inline bool system_is_debugger_present(void)
-{
-	return DSU->STATUSB.reg & DSU_STATUSB_DBGPRES;
-}
-
-/**
- * @}
- */
-
-/**
- * \name System Identification
- * @{
- */
-
-/**
- * \brief Retrieve the device identification signature.
- *
- * Retrieves the signature of the current device.
- *
- * \return Device ID signature as a 32-bit integer.
- */
-static inline uint32_t system_get_device_id(void)
-{
-	return DSU->DID.reg;
-}
-
-/**
- * @}
- */
-
-/**
- * \name System Initialization
- * @{
- */
-
-void system_init(uint16_t dfll_fine_calibration);
-
-/**
- * @}
- */
-
-
-/**
- * @}
- */
-
-/**
- *
- * \if DEVICE_SAML21_SYSTEM_SUPPORT
- * \page asfdoc_sam0_drivers_power_exqsg Examples for SYSTEM Driver
- *
- * This is a list of the available Quick Start Guides (QSGs) and example
- * applications for \ref asfdoc_sam0_system_group. QSGs are simple examples with step-by-step instructions to
- * configure and use this driver in a selection of
- * use cases. Note that a QSG can be compiled as a standalone application or be
- * added to the user application.
- *
- *  - \subpage asfdoc_sam0_power_basic_use_case
- * \endif
- *
- * \page asfdoc_sam0_system_extra Extra Information for SYSTEM Driver
- *
- * \section asfdoc_sam0_system_extra_acronyms Acronyms
- * Below is a table listing the acronyms used in this module, along with their
- * intended meanings.
- *
- * <table>
- *  <tr>
- *      <th>Acronym</th>
- *      <th>Definition</th>
- *  </tr>
- *  <tr>
- *      <td>PM</td>
- *      <td>Power Manager</td>
- *  </tr>
- * \if DEVICE_SAML21_SYSTEM_SUPPORT
- *  <tr>
- *      <td>SUPC</td>
- *      <td>Supply Controller</td>
- *  </tr>
- *  <tr>
- *      <td>RSTC</td>
- *      <td>Reset Controller</td>
- *  </tr>
- * \endif
- * \if DEVICE_SAMC21_SYSTEM_SUPPORT
- *  <tr>
- *      <td>SUPC</td>
- *      <td>Supply Controller</td>
- *  </tr>
- *  <tr>
- *      <td>RSTC</td>
- *      <td>Reset Controller</td>
- *  </tr>
- * \endif
- * \if DEVICE_SAMD21_SYSTEM_SUPPORT
- *  <tr>
- *      <td>SYSCTRL</td>
- *      <td>System control interface</td>
- *  </tr>
- * \endif
- * </table>
- *
- *
- * \section asfdoc_sam0_system_extra_dependencies Dependencies
- * This driver has the following dependencies:
- *
- *  - None
- *
- *
- * \section asfdoc_sam0_system_extra_errata Errata
- * There are no errata related to this driver.
- *
- *
- * \section asfdoc_sam0_system_extra_history Module History
- * An overview of the module history is presented in the table below, with
- * details on the enhancements and fixes made to the module since its first
- * release. The current version of this corresponds to the newest version in
- * the table.
- *
- * <table>
- *  <tr>
- *      <th>Changelog</th>
- *  </tr>
- * \if DEVICE_SAML21_SYSTEM_SUPPORT
- *  <tr>
- *      <td>Initial Release</td>
- *  </tr>
- * \endif
- * \if DEVICE_SAMC21_SYSTEM_SUPPORT
- *  <tr>
- *      <td>Initial Release</td>
- *  </tr>
- * \endif
- * \if DEVICE_SAMD21_SYSTEM_SUPPORT
- *  <tr>
- *      <td>Added new \c system_reset() to reset the complete MCU with some exceptions</td>
- *  </tr>
- *  <tr>
- *      <td>Added new \c system_get_device_id() function to retrieved the device
- *          ID</td>
- *  </tr>
- *  <tr>
- *      <td>Initial Release</td>
- *  </tr>
- * \endif
- * </table>
- *
- * \page asfdoc_sam0_system_document_revision_history Document Revision History
- *
- * <table>
- * <tr>
- *      <th>Doc. Rev.</th>
- *      <th>Date</th>
- *      <th>Comments</th>
- *  </tr>
- * \if DEVICE_SAML21_SYSTEM_SUPPORT
- *  <tr>
- *      <td>42449A</td>
- *      <td>07/2015</td>
- *      <td>Initial document release</td>
- * </tr>
- * \endif
- * \if DEVICE_SAMC21_SYSTEM_SUPPORT
- *  <tr>
- *      <td>42484A</td>
- *      <td>12/2015</td>
- *      <td>Initial document release.</td>
- * </tr>
- * \endif
- * \if DEVICE_SAMD21_SYSTEM_SUPPORT
- *  <tr>
- *      <td>42120E</td>
- *      <td>12/2015</td>
- *      <td>Added support for SAM DA1 and SAM D09</td>
- * </tr>
- *  <tr>
- *      <td>42120D</td>
- *      <td>12/2014</td>
- *      <td>Added support for SAM R21 and SAM D10/D11</td>
- * </tr>
- * <tr>
- *      <td>42120C</td>
- *      <td>01/2014</td>
- *      <td>Added support for SAM D21</td>
- *  </tr>
- *  <tr>
- *      <td>42120B</td>
- *      <td>06/2013</td>
- *      <td>Corrected documentation typos</td>
- *  </tr>
- *  <tr>
- *      <td>42120A</td>
- *      <td>06/2013</td>
- *      <td>Initial document release</td>
- *  </tr>
- * \endif
- * </table>
- */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* SYSTEM_H_INCLUDED */