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| author | Dan Halbert <halbert@halwitz.org> | 2018-02-27 22:03:52 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-02-27 22:03:52 -0500 |
| commit | 568c04e6afa8016062f685b2198c0209f62827f4 (patch) | |
| tree | d07b76119f715add462983b335797adf64b61249 /docs/reference/asm_thumb2_misc.rst | |
| parent | 6a2379fd0bfe10017d8abc5c36ef1d470c0d9b27 (diff) | |
| parent | ea633117d01d94e8d56ed94344e4b3e46b4eef03 (diff) | |
Merge pull request #650 from tannewt/merge_2x3.0.0-alpha.2
Merge in commits from 2.x branch.
Diffstat (limited to 'docs/reference/asm_thumb2_misc.rst')
| -rw-r--r-- | docs/reference/asm_thumb2_misc.rst | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/docs/reference/asm_thumb2_misc.rst b/docs/reference/asm_thumb2_misc.rst deleted file mode 100644 index ca3f878cc..000000000 --- a/docs/reference/asm_thumb2_misc.rst +++ /dev/null @@ -1,13 +0,0 @@ -Miscellaneous instructions -========================== - -* nop() ``pass`` no operation. -* wfi() Suspend execution in a low power state until an interrupt occurs. -* cpsid(flags) set the Priority Mask Register - disable interrupts. -* cpsie(flags) clear the Priority Mask Register - enable interrupts. -* mrs(Rd, special_reg) ``Rd = special_reg`` copy a special register to a general register. The special register - may be IPSR (Interrupt Status Register) or BASEPRI (Base Priority Register). The IPSR provides a means of determining - the exception number of an interrupt being processed. It contains zero if no interrupt is being processed. - -Currently the ``cpsie()`` and ``cpsid()`` functions are partially implemented. -They require but ignore the flags argument and serve as a means of enabling and disabling interrupts. |