summaryrefslogtreecommitdiff
path: root/ports/esp32s2
diff options
context:
space:
mode:
authorfoamyguy <foamyguy@gmail.com>2020-11-08 18:32:15 -0600
committerGitHub <noreply@github.com>2020-11-08 18:32:15 -0600
commitcf21c4da601e00a614efd8ade774a0c8e5444c64 (patch)
tree118a157edbc1884f502de8e9e26f79d178ed8c9a /ports/esp32s2
parent7611e71a1bc49bcb426e0854519d5143eb262a17 (diff)
parenteec9821fdc19ca81c2d0811a6b6c5909a54b8c81 (diff)
Merge pull request #1 from adafruit/main
merge from adafruit
Diffstat (limited to 'ports/esp32s2')
-rw-r--r--ports/esp32s2/CMakeLists.txt2
-rw-r--r--ports/esp32s2/Makefile86
-rw-r--r--ports/esp32s2/README.md84
-rw-r--r--ports/esp32s2/bindings/espidf/__init__.c2
-rw-r--r--ports/esp32s2/boards/adafruit_esp32s2_eink_portal/board.c47
-rw-r--r--ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.h45
-rw-r--r--ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.mk17
-rw-r--r--ports/esp32s2/boards/adafruit_esp32s2_eink_portal/pins.c41
-rw-r--r--ports/esp32s2/boards/adafruit_esp32s2_eink_portal/sdkconfig33
-rw-r--r--ports/esp32s2/boards/adafruit_metro_esp32s2/board.c43
-rw-r--r--ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.h48
-rw-r--r--ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.mk17
-rw-r--r--ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c68
-rw-r--r--ports/esp32s2/boards/adafruit_metro_esp32s2/sdkconfig39
-rw-r--r--ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h4
-rw-r--r--ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h4
-rw-r--r--ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.mk2
-rw-r--r--ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h4
-rw-r--r--ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h4
-rw-r--r--ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h7
-rw-r--r--ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.mk1
-rw-r--r--ports/esp32s2/boards/microdev_micro_s2/pins.c21
-rw-r--r--ports/esp32s2/boards/microdev_micro_s2/sdkconfig8
-rw-r--r--ports/esp32s2/boards/muselab_nanoesp32_s2/board.c47
-rw-r--r--ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h38
-rw-r--r--ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.mk17
-rw-r--r--ports/esp32s2/boards/muselab_nanoesp32_s2/pins.c48
-rw-r--r--ports/esp32s2/boards/muselab_nanoesp32_s2/sdkconfig0
-rw-r--r--ports/esp32s2/boards/targett_module_clip_wroom/board.c51
-rw-r--r--ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.h40
-rw-r--r--ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk17
-rw-r--r--ports/esp32s2/boards/targett_module_clip_wroom/pins.c48
-rw-r--r--ports/esp32s2/boards/targett_module_clip_wroom/sdkconfig0
-rw-r--r--ports/esp32s2/boards/targett_module_clip_wrover/board.c51
-rw-r--r--ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h40
-rw-r--r--ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk17
-rw-r--r--ports/esp32s2/boards/targett_module_clip_wrover/pins.c48
-rw-r--r--ports/esp32s2/boards/targett_module_clip_wrover/sdkconfig33
-rw-r--r--ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h7
-rw-r--r--ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk3
-rw-r--r--ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c61
-rw-r--r--ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig8
-rw-r--r--ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/board.c56
-rw-r--r--ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h38
-rw-r--r--ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.mk21
-rw-r--r--ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c102
-rw-r--r--ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/sdkconfig41
-rw-r--r--ports/esp32s2/common-hal/analogio/AnalogIn.c98
-rw-r--r--ports/esp32s2/common-hal/analogio/AnalogIn.h42
-rw-r--r--ports/esp32s2/common-hal/analogio/AnalogOut.c73
-rw-r--r--ports/esp32s2/common-hal/analogio/AnalogOut.h43
-rw-r--r--ports/esp32s2/common-hal/analogio/__init__.c1
-rw-r--r--ports/esp32s2/common-hal/busio/I2C.c2
-rw-r--r--ports/esp32s2/common-hal/busio/I2C.h2
-rw-r--r--ports/esp32s2/common-hal/busio/SPI.c86
-rw-r--r--ports/esp32s2/common-hal/busio/SPI.h10
-rw-r--r--ports/esp32s2/common-hal/busio/UART.c2
-rw-r--r--ports/esp32s2/common-hal/busio/UART.h2
-rw-r--r--ports/esp32s2/common-hal/canio/CAN.c295
-rw-r--r--ports/esp32s2/common-hal/canio/CAN.h49
-rw-r--r--ports/esp32s2/common-hal/canio/Listener.c182
-rw-r--r--ports/esp32s2/common-hal/canio/Listener.h40
-rw-r--r--ports/esp32s2/common-hal/canio/__init__.c25
-rw-r--r--ports/esp32s2/common-hal/canio/__init__.h27
-rw-r--r--ports/esp32s2/common-hal/countio/Counter.c84
-rw-r--r--ports/esp32s2/common-hal/countio/Counter.h40
-rw-r--r--ports/esp32s2/common-hal/countio/__init__.c1
-rw-r--r--ports/esp32s2/common-hal/digitalio/DigitalInOut.c22
-rw-r--r--ports/esp32s2/common-hal/digitalio/DigitalInOut.h1
-rw-r--r--ports/esp32s2/common-hal/microcontroller/Pin.c4
-rw-r--r--ports/esp32s2/common-hal/microcontroller/Processor.c2
-rw-r--r--ports/esp32s2/common-hal/neopixel_write/__init__.c6
-rw-r--r--ports/esp32s2/common-hal/pulseio/PulseIn.h4
-rw-r--r--ports/esp32s2/common-hal/pulseio/PulseOut.h4
-rw-r--r--ports/esp32s2/common-hal/pwmio/PWMOut.c2
-rw-r--r--ports/esp32s2/common-hal/pwmio/PWMOut.h2
-rw-r--r--ports/esp32s2/common-hal/rtc/RTC.c52
-rw-r--r--ports/esp32s2/common-hal/rtc/RTC.h34
-rw-r--r--ports/esp32s2/common-hal/rtc/__init__.c0
-rw-r--r--ports/esp32s2/common-hal/socketpool/Socket.c22
-rw-r--r--ports/esp32s2/common-hal/socketpool/Socket.h2
-rw-r--r--ports/esp32s2/common-hal/socketpool/SocketPool.c2
-rw-r--r--ports/esp32s2/common-hal/ssl/SSLContext.h2
-rw-r--r--ports/esp32s2/common-hal/ssl/__init__.c2
-rw-r--r--ports/esp32s2/common-hal/touchio/TouchIn.c96
-rw-r--r--ports/esp32s2/common-hal/touchio/TouchIn.h42
-rw-r--r--ports/esp32s2/common-hal/touchio/__init__.c1
-rw-r--r--ports/esp32s2/common-hal/wifi/Network.c6
-rw-r--r--ports/esp32s2/common-hal/wifi/Network.h2
-rw-r--r--ports/esp32s2/common-hal/wifi/Radio.c97
-rw-r--r--ports/esp32s2/common-hal/wifi/Radio.h6
-rw-r--r--ports/esp32s2/common-hal/wifi/ScannedNetworks.c2
-rw-r--r--ports/esp32s2/common-hal/wifi/ScannedNetworks.h2
-rw-r--r--ports/esp32s2/common-hal/wifi/__init__.c14
m---------ports/esp32s2/esp-idf0
-rw-r--r--ports/esp32s2/esp-idf-config/partitions-16MB.csv10
-rw-r--r--ports/esp32s2/esp-idf-config/partitions-4MB.csv (renamed from ports/esp32s2/partitions.csv)0
-rw-r--r--ports/esp32s2/esp-idf-config/partitions-8MB.csv10
-rw-r--r--ports/esp32s2/esp-idf-config/sdkconfig-16MB.defaults9
-rw-r--r--ports/esp32s2/esp-idf-config/sdkconfig-4MB.defaults9
-rw-r--r--ports/esp32s2/esp-idf-config/sdkconfig-8MB.defaults9
-rw-r--r--ports/esp32s2/esp-idf-config/sdkconfig-debug.defaults13
-rw-r--r--ports/esp32s2/esp-idf-config/sdkconfig-opt.defaults12
-rw-r--r--ports/esp32s2/esp-idf-config/sdkconfig.defaults (renamed from ports/esp32s2/sdkconfig.defaults)48
-rw-r--r--ports/esp32s2/mpconfigport.h4
-rw-r--r--ports/esp32s2/mpconfigport.mk9
-rw-r--r--ports/esp32s2/mphalport.c4
-rw-r--r--ports/esp32s2/peripherals/pcnt.c66
-rw-r--r--ports/esp32s2/peripherals/pcnt.h35
-rwxr-xr-xports/esp32s2/peripherals/pins.c97
-rw-r--r--ports/esp32s2/peripherals/pins.h8
-rw-r--r--ports/esp32s2/peripherals/rmt.c2
-rw-r--r--ports/esp32s2/peripherals/rmt.h2
-rw-r--r--ports/esp32s2/supervisor/internal_flash.c2
-rw-r--r--ports/esp32s2/supervisor/port.c19
-rw-r--r--ports/esp32s2/supervisor/usb.c42
116 files changed, 3187 insertions, 217 deletions
diff --git a/ports/esp32s2/CMakeLists.txt b/ports/esp32s2/CMakeLists.txt
index 0d7f48995..6ad33282f 100644
--- a/ports/esp32s2/CMakeLists.txt
+++ b/ports/esp32s2/CMakeLists.txt
@@ -6,7 +6,7 @@ set(ENV{IDF_PATH} ${CMAKE_SOURCE_DIR}/esp-idf)
# The component list here determines what options we get in menuconfig and what the ninja file
# can build.
-set(COMPONENTS esptool_py soc driver log main esp-tls mbedtls esp_event esp_netif esp_wifi lwip wpa_supplicant freertos)
+set(COMPONENTS esptool_py soc driver log main esp-tls mbedtls esp_event esp_adc_cal esp_netif esp_wifi lwip wpa_supplicant freertos)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
project(circuitpython)
diff --git a/ports/esp32s2/Makefile b/ports/esp32s2/Makefile
index ea9c68592..55d6e91d4 100644
--- a/ports/esp32s2/Makefile
+++ b/ports/esp32s2/Makefile
@@ -73,30 +73,37 @@ INC += -I./peripherals
INC += -I../../lib/mp-readline
INC += -I../../lib/tinyusb/src
INC += -I../../supervisor/shared/usb
-INC += -Iesp-idf/components/freertos/include/freertos
-INC += -Iesp-idf/components/freertos/xtensa/include
-INC += -Iesp-idf/components/esp32s2/include
-INC += -Iesp-idf/components/xtensa/esp32s2/include
-INC += -Iesp-idf/components/esp_common/include
-INC += -Iesp-idf/components/esp_event/include
-INC += -Iesp-idf/components/esp_netif/include
-INC += -Iesp-idf/components/esp_ringbuf/include
-INC += -Iesp-idf/components/esp_rom/include
-INC += -Iesp-idf/components/esp_wifi/include
-INC += -Iesp-idf/components/xtensa/include
-INC += -Iesp-idf/components/esp_timer/include
-INC += -Iesp-idf/components/mbedtls/mbedtls/include
-INC += -Iesp-idf/components/mbedtls/port/include/
-INC += -Iesp-idf/components/newlib/platform_include
-INC += -Iesp-idf/components/lwip/lwip/src/include
-INC += -Iesp-idf/components/lwip/port/esp32/include
-INC += -Iesp-idf/components/lwip/include/apps/sntp
-INC += -Iesp-idf/components/soc/include
-INC += -Iesp-idf/components/soc/src/esp32s2/include
-INC += -Iesp-idf/components/soc/soc/include
-INC += -Iesp-idf/components/soc/soc/esp32s2/include
-INC += -Iesp-idf/components/heap/include
-INC += -Iesp-idf/components/esp_system/include
+
+INC += -isystem esp-idf
+INC += -isystem esp-idf/components/driver/include
+INC += -isystem esp-idf/components/freertos/include/freertos
+INC += -isystem esp-idf/components/freertos/xtensa/include
+INC += -isystem esp-idf/components/esp32s2/include
+INC += -isystem esp-idf/components/xtensa/esp32s2/include
+INC += -isystem esp-idf/components/esp_common/include
+INC += -isystem esp-idf/components/esp_event/include
+INC += -isystem esp-idf/components/esp_netif/include
+INC += -isystem esp-idf/components/esp_ringbuf/include
+INC += -isystem esp-idf/components/esp_rom/include
+INC += -isystem esp-idf/components/esp_wifi/include
+INC += -isystem esp-idf/components/xtensa/include
+INC += -isystem esp-idf/components/esp_timer/include
+INC += -isystem esp-idf/components/mbedtls/mbedtls/include
+INC += -isystem esp-idf/components/mbedtls/port/include/
+INC += -isystem esp-idf/components/newlib/platform_include
+INC += -isystem esp-idf/components/lwip/lwip/src/include
+INC += -isystem esp-idf/components/lwip/port/esp32/include
+INC += -isystem esp-idf/components/lwip/include/apps/sntp
+INC += -isystem esp-idf/components/hal/include
+INC += -isystem esp-idf/components/hal/esp32s2/include
+INC += -isystem esp-idf/components/log/include/
+INC += -isystem esp-idf/components/driver/esp32s2/include
+INC += -isystem esp-idf/components/soc/include
+INC += -isystem esp-idf/components/soc/src/esp32s2/include
+INC += -isystem esp-idf/components/soc/soc/include
+INC += -isystem esp-idf/components/soc/soc/esp32s2/include
+INC += -isystem esp-idf/components/heap/include
+INC += -isystem esp-idf/components/esp_system/include
INC += -I$(BUILD)/esp-idf/config
CFLAGS += -DHAVE_CONFIG_H \
@@ -125,7 +132,7 @@ CFLAGS += $(OPTIMIZATION_FLAGS)
CFLAGS += $(INC) -Werror -Wall -mlongcalls -std=gnu11 -Wl,--gc-sections $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT)
-LDFLAGS = $(CFLAGS) -Wl,-nostdlib -Wl,-Map=$@.map -Wl,-cref
+LDFLAGS = $(CFLAGS) -Wl,-nostdlib -Wl,-Map=$@.map -Wl,-cref -Wl,--undefined=uxTopUsedPriority
LDFLAGS += -L$(BUILD)/esp-idf/esp-idf/esp32s2 \
-Tesp32s2_out.ld \
-L$(BUILD)/esp-idf/esp-idf/esp32s2/ld \
@@ -181,6 +188,7 @@ SRC_C += \
lib/utils/pyexec.c \
lib/utils/stdout_helpers.c \
lib/utils/sys_stdio_mphal.c \
+ peripherals/pcnt.c \
peripherals/pins.c \
peripherals/rmt.c \
supervisor/shared/memory.c
@@ -228,9 +236,17 @@ IDF_PATH = $(realpath ./esp-idf)
$(BUILD)/esp-idf:
$(Q)$(MKDIR) -p $@
+FLASH_SDKCONFIG = esp-idf-config/sdkconfig-$(CIRCUITPY_ESP_FLASH_SIZE).defaults
+ifeq ($(DEBUG), 1)
+ DEBUG_SDKCONFIG = esp-idf-config/sdkconfig-debug.defaults
+else
+ DEBUG_SDKCONFIG = esp-idf-config/sdkconfig-opt.defaults
+endif
+SDKCONFIGS = esp-idf-config/sdkconfig.defaults;$(DEBUG_SDKCONFIG);$(FLASH_SDKCONFIG);boards/$(BOARD)/sdkconfig
+
# create the config headers
$(BUILD)/esp-idf/config/sdkconfig.h: boards/$(BOARD)/sdkconfig | $(BUILD)/esp-idf
- IDF_PATH=$(IDF_PATH) cmake -S . -B $(BUILD)/esp-idf -DSDKCONFIG=$(BUILD)/esp-idf/sdkconfig -DSDKCONFIG_DEFAULTS="sdkconfig.defaults;boards/$(BOARD)/sdkconfig" -DCMAKE_TOOLCHAIN_FILE=$(IDF_PATH)/tools/cmake/toolchain-esp32s2.cmake -DIDF_TARGET=esp32s2 -GNinja
+ IDF_PATH=$(IDF_PATH) cmake -S . -B $(BUILD)/esp-idf -DSDKCONFIG=$(BUILD)/esp-idf/sdkconfig -DSDKCONFIG_DEFAULTS="$(SDKCONFIGS)" -DCMAKE_TOOLCHAIN_FILE=$(IDF_PATH)/tools/cmake/toolchain-esp32s2.cmake -DIDF_TARGET=esp32s2 -GNinja
# build a lib
# Adding -d explain -j 1 -v to the ninja line will output debug info
@@ -247,20 +263,20 @@ $(BUILD)/esp-idf/esp-idf/esp32s2/ld/esp32s2.project.ld: $(BUILD)/esp-idf/config/
$(BUILD)/esp-idf/partition_table/partition-table.bin: $(BUILD)/esp-idf/config/sdkconfig.h
IDF_PATH=$(IDF_PATH) ninja -C $(BUILD)/esp-idf partition_table/partition-table.bin
-# run menuconfig
+# run menuconfig and then remove standard settings
menuconfig: $(BUILD)/esp-idf/config
$(Q)ninja -C $(BUILD)/esp-idf menuconfig
- $(Q)diff --old-line-format= --unchanged-line-format= sdkconfig.defaults $(BUILD)/esp-idf/sdkconfig > boards/$(BOARD)/sdkconfig || true
+ $(Q)diff --old-line-format= --unchanged-line-format= esp-idf-config/sdkconfig.defaults $(BUILD)/esp-idf/sdkconfig > $(BUILD)/sdkconfig.diff || true
+ $(Q)grep -Fvxf $(DEBUG_SDKCONFIG) -f $(FLASH_SDKCONFIG) $(BUILD)/sdkconfig.diff > boards/$(BOARD)/sdkconfig
# qstr builds include headers so we need to make sure they are up to date
-$(HEADER_BUILD)/qstr.i.last: | $(BUILD)/esp-idf/config/sdkconfig.h
+$(HEADER_BUILD)/qstr.split: | $(BUILD)/esp-idf/config/sdkconfig.h
-# Order here matters
-ESP_IDF_COMPONENTS_LINK = freertos log esp_system esp32s2 bootloader_support pthread esp_timer vfs spi_flash app_update esp_common esp32s2 heap newlib driver xtensa soc esp_ringbuf esp_wifi esp_event wpa_supplicant mbedtls efuse nvs_flash esp_netif lwip esp_rom esp-tls
+ESP_IDF_COMPONENTS_LINK = freertos log hal esp_system esp_adc_cal esp32s2 bootloader_support pthread esp_timer vfs spi_flash app_update esp_common esp32s2 heap newlib driver xtensa soc esp_ringbuf esp_wifi esp_event wpa_supplicant mbedtls efuse nvs_flash esp_netif lwip esp_rom esp-tls
ESP_IDF_COMPONENTS_INCLUDE = driver freertos log soc
-INC += $(foreach component, $(ESP_IDF_COMPONENTS_INCLUDE), -Iesp-idf/components/$(component)/include)
+INC += $(foreach component, $(ESP_IDF_COMPONENTS_INCLUDE), -isystem esp-idf/components/$(component)/include)
ESP_IDF_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/$(component)/lib$(component).a)
ESP_IDF_WIFI_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_WIFI_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/$(component)/lib$(component).a)
@@ -268,11 +284,11 @@ ESP_IDF_WIFI_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_WIFI_COMPONENT
MBEDTLS_COMPONENTS_LINK = crypto tls x509
MBEDTLS_COMPONENTS_LINK_EXPANDED = $(foreach component, $(MBEDTLS_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/mbedtls/mbedtls/library/libmbed$(component).a)
-BINARY_BLOBS = esp-idf/components/xtensa/esp32s2/libhal.a
+BINARY_BLOBS = esp-idf/components/xtensa/esp32s2/libxt_hal.a
BINARY_WIFI_BLOBS = libcoexist.a libcore.a libespnow.a libmesh.a libnet80211.a libpp.a librtc.a libsmartconfig.a libphy.a
BINARY_BLOBS += $(addprefix esp-idf/components/esp_wifi/lib/esp32s2/, $(BINARY_WIFI_BLOBS))
-ESP_IDF_COMPONENTS_EXPANDED += $(BUILD)/esp-idf/esp-idf/soc/soc/esp32s2/libsoc_esp32s2.a esp-idf/components/xtensa/esp32s2/libhal.a
+ESP_IDF_COMPONENTS_EXPANDED += $(BUILD)/esp-idf/esp-idf/soc/soc/esp32s2/libsoc_esp32s2.a esp-idf/components/xtensa/esp32s2/libxt_hal.a
ESP_AUTOGEN_LD = $(BUILD)/esp-idf/esp-idf/esp32s2/esp32s2_out.ld $(BUILD)/esp-idf/esp-idf/esp32s2/ld/esp32s2.project.ld
FLASH_FLAGS = --flash_mode $(CIRCUITPY_ESP_FLASH_MODE) --flash_freq $(CIRCUITPY_ESP_FLASH_FREQ) --flash_size $(CIRCUITPY_ESP_FLASH_SIZE)
@@ -307,8 +323,6 @@ $(BUILD)/firmware.elf: $(OBJ) | esp-idf-stamp
$(BUILD)/circuitpython-firmware.bin: $(BUILD)/firmware.elf
$(STEPECHO) "Create $@"
$(Q)esptool.py --chip esp32s2 elf2image $(FLASH_FLAGS) --elf-sha256-offset 0xb0 -o $@ $^
-# $(Q)$(OBJCOPY) -O binary $^ $@
-# $(Q)$(OBJCOPY) -O binary -j .vectors -j .text -j .data $^ $@
$(BUILD)/firmware.bin: $(BUILD)/circuitpython-firmware.bin | esp-idf-stamp
$(Q)$(PYTHON) ../../tools/join_bins.py $@ 0x1000 $(BUILD)/esp-idf/bootloader/bootloader.bin 0x8000 $(BUILD)/esp-idf/partition_table/partition-table.bin 0x10000 $(BUILD)/circuitpython-firmware.bin
diff --git a/ports/esp32s2/README.md b/ports/esp32s2/README.md
new file mode 100644
index 000000000..0738d520e
--- /dev/null
+++ b/ports/esp32s2/README.md
@@ -0,0 +1,84 @@
+# Circuitpython on ESP32-S2 #
+
+This port adds the ESP32-S2 line of modules from Espressif to Circuitpython. ESP32-S2 modules are low power, single-core Wi-Fi microcontroller SoCs designed for IoT applications.
+
+## How this port is organized: ##
+
+- **bindings/** contains some required bindings to the ESP-IDF for exceptions and memory.
+- **boards/** contains the configuration files for each development board and breakout available on the port.
+- **common-hal/** contains the port-specific module implementations, used by shared-module and shared-bindings.
+- **esp-idf/** contains the Espressif IoT development framework installation, includign all the drivers for the port.
+- **modules/** contains information specific to certain ESP32-S2 hardware modules, such as the pins used for flash and RAM on the WROVER and WROOM.
+- **peripherals/** contains peripheral setup files and peripheral mapping information, sorted by family and sub-variant. Most files in this directory can be generated with the python scripts in **tools/**.
+- **supervisor/** contains port-specific implementations of internal flash, serial and USB, as well as the **port.c** file, which initializes the port at startup.
+- **tools/** includes useful python scripts for debugging and other purposes.
+
+At the root level, refer to **mpconfigboard.h** and **mpconfigport.mk** for port specific settings and a list of enabled circuitpython modules.
+
+## Connecting to the ESP32-S2 ##
+
+The USB port built into ESP32-S2 boards such as the Saola is not the native USB of the board, but a debugging and programming interface. The actual ESP32-S2 native USB which exposes the Circuitpython drive and CDC connection is located on IO pins 19 and 20:
+
+| GPIO | USB |
+| ---- | ----------- |
+| 20 | D+ (green) |
+| 19 | D- (white) |
+| GND | GND (black) |
+| 5V | +5V (red) |
+
+Connect these pins using a [USB adapter](https://www.adafruit.com/product/4090) or [breakout cable](https://www.adafruit.com/product/4448) to access the Circuitpython drive.
+
+## Building and flashing ##
+
+Before building or flashing the ESP32-S2, you must [install the esp-idf](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/get-started/index.html). This must be re-done every time the esp-idf is updated, but not every time you build. Run `cd ports/esp32s2` from `circuitpython/` to move to the esp32s2 port root, and run:
+
+```
+./esp-idf/install.sh
+```
+
+After this initial installation, you must add the esp-idf tools to your path. You must also do this **any time you open a new bash environment for building or flashing**:
+
+```
+. esp-idf/export.sh
+```
+
+When Circuitpython updates the ESP-IDF to a new release, you may need to run this installation process again. The exact commands used may also vary based on your bash environment.
+
+Building boards such as the Saola is typically done through `make flash`. The default port is `tty.SLAB_USBtoUART`, which will only work on certain Mac setups. On most machines, both Mac and Linux, you will need to set the port yourself by running `ls /dev/tty.usb*` and selecting the one that only appears when your development board is plugged in. An example make command with the port setting is as follows:
+
+```
+make BOARD=espressif_saola_1_wrover flash PORT=/dev/tty.usbserial-1421120
+```
+
+## Debugging ##
+
+The ESP32-S2 supports JTAG debugging over OpenOCD using a JLink or other probe hardware. The official tutorials can be found on the Espressif website [here](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/api-guides/jtag-debugging/index.html), but they are mostly for the ESP32-S2 Kaluga, which has built-in debugging.
+
+OpenOCD is automatically installed and added to your bash environment during the esp-idf installation and setup process. You can double check that it is installed by using `openocd --version`, as per the tutorial. Attach the JTAG probe pins according to the [instructions](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/api-guides/jtag-debugging/configure-other-jtag.html) for JTAG debugging on boards that do not contain an integrated debugger.
+
+Once the debugger is connected physically, you must run OpenOCD with attached configuration files specifying the **interface** (your debugger probe) and either a **target** or a **board** (targets are for SoCs only, and can be used when a full board configuration file doesn't exist). You can find the path location of these files by checking the `OPENOCD_SCRIPTS` environmental variable by running `echo $OPENOCD_SCRIPTS` in bash. Interfaces will be in the `interface/` directory, and targets and boards in the `target/` and `board/` directories, respectively.
+
+**Note:** Unfortunately, there are no board files for the esp32-s2 other than the Kaluga, and the included `target/esp32s2.cfg` target file will not work by default on the Jlink for boards like the Saola 1, as the default speed is incorrect. In addition, these files are covered under the GPL and cannot be included in Circuitpython. Thus, you must make a copy of the esp32s2.cfg file yourself and add the following line manually, under `transport select jtag` at the start of the file:
+
+```
+adapter_khz 1000
+```
+
+Once this is complete, your final OpenOCD command may look something like this:
+
+`openocd -f interface/jlink.cfg -f SOMEPATH/copied-esp32s2-saola-1.cfg`
+
+Where `SOMEPATH` is the location of your copied configuration file (this can be placed in the port/boards director with a prefix to ignore it with `.gitignore`, for instance). Interface, target and board config files sourced from espressif only need their paths from the $OPENOCD_SCRIPTS location, you don't need to include their full path. Once OpenOCD is running, connect to GDB with:
+
+`xtensa-esp32s2-elf-gdb build-espressif_saola_1_wrover/firmware.elf`
+
+And follow the Espressif GDB tutorial [instructions](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/api-guides/jtag-debugging/using-debugger.html) for connecting, or add them to your `gdbinit`:
+
+```
+target remote :3333
+set remote hardware-watchpoint-limit 2
+mon reset halt
+flushregs
+thb app_main
+c
+```
diff --git a/ports/esp32s2/bindings/espidf/__init__.c b/ports/esp32s2/bindings/espidf/__init__.c
index 3b910cfe6..554bfaa39 100644
--- a/ports/esp32s2/bindings/espidf/__init__.c
+++ b/ports/esp32s2/bindings/espidf/__init__.c
@@ -29,7 +29,7 @@
#include "bindings/espidf/__init__.h"
-#include "esp-idf/components/heap/include/esp_heap_caps.h"
+#include "components/heap/include/esp_heap_caps.h"
//| """Direct access to a few ESP-IDF details. This module *should not* include any functionality
//| that could be implemented by other frameworks. It should only include ESP-IDF specific
diff --git a/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/board.c b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/board.c
new file mode 100644
index 000000000..9f708874b
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/board.c
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+#include "shared-bindings/microcontroller/Pin.h"
+
+void board_init(void) {
+ // USB
+ common_hal_never_reset_pin(&pin_GPIO19);
+ common_hal_never_reset_pin(&pin_GPIO20);
+
+ // Debug UART
+ common_hal_never_reset_pin(&pin_GPIO43);
+ common_hal_never_reset_pin(&pin_GPIO44);
+}
+
+bool board_requests_safe_mode(void) {
+ return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.h b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.h
new file mode 100644
index 000000000..5a17a0cad
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.h
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+//Micropython setup
+
+#define MICROPY_HW_BOARD_NAME "EInk Portal"
+#define MICROPY_HW_MCU_NAME "ESP32S2"
+
+#define MICROPY_HW_NEOPIXEL (&pin_GPIO1)
+
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
+#define AUTORESET_DELAY_MS 500
+
+#define DEFAULT_I2C_BUS_SCL (&pin_GPIO34)
+#define DEFAULT_I2C_BUS_SDA (&pin_GPIO33)
+
+#define DEFAULT_SPI_BUS_SCK (&pin_GPIO36)
+#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO35)
+#define DEFAULT_SPI_BUS_MISO (&pin_GPIO37)
diff --git a/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.mk b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.mk
new file mode 100644
index 000000000..31aff57da
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/mpconfigboard.mk
@@ -0,0 +1,17 @@
+USB_VID = 0x239A
+USB_PID = 0x80E6
+USB_PRODUCT = "EInk Portal"
+USB_MANUFACTURER = "Adafruit"
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = MPZ
+
+# The default queue depth of 16 overflows on release builds,
+# so increase it to 32.
+CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
+
+CIRCUITPY_ESP_FLASH_MODE=dio
+CIRCUITPY_ESP_FLASH_FREQ=40m
+CIRCUITPY_ESP_FLASH_SIZE=4MB
+
+CIRCUITPY_MODULE=wrover
diff --git a/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/pins.c b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/pins.c
new file mode 100644
index 000000000..65bc3fb53
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/pins.c
@@ -0,0 +1,41 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+ { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO10) },
+ { MP_ROM_QSTR(MP_QSTR_AD1), MP_ROM_PTR(&pin_GPIO18) },
+ { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO13) },
+
+ { MP_ROM_QSTR(MP_QSTR_SPEAKER), MP_ROM_PTR(&pin_GPIO17) },
+ { MP_ROM_QSTR(MP_QSTR_SPEAKER_ENABLE), MP_ROM_PTR(&pin_GPIO16) },
+
+ { MP_ROM_QSTR(MP_QSTR_EPD_BUSY), MP_ROM_PTR(&pin_GPIO5) },
+ { MP_ROM_QSTR(MP_QSTR_EPD_RESET), MP_ROM_PTR(&pin_GPIO6) },
+ { MP_ROM_QSTR(MP_QSTR_EPD_DC), MP_ROM_PTR(&pin_GPIO7) },
+ { MP_ROM_QSTR(MP_QSTR_EPD_CS), MP_ROM_PTR(&pin_GPIO8) },
+
+ { MP_ROM_QSTR(MP_QSTR_BUTTON_A), MP_ROM_PTR(&pin_GPIO15) },
+ { MP_ROM_QSTR(MP_QSTR_BUTTON_B), MP_ROM_PTR(&pin_GPIO14) },
+ { MP_ROM_QSTR(MP_QSTR_BUTTON_C), MP_ROM_PTR(&pin_GPIO12) },
+ { MP_ROM_QSTR(MP_QSTR_BUTTON_D), MP_ROM_PTR(&pin_GPIO11) },
+
+ { MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_GPIO3) },
+
+ { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO4) },
+ { MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_GPIO4) },
+
+ { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO33) },
+ { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO34) },
+
+ { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_GPIO8) },
+ { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) },
+ { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) },
+ { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) },
+
+ { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_GPIO21) },
+
+ { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO1) },
+
+ { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+ { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/sdkconfig b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/sdkconfig
new file mode 100644
index 000000000..9d8bbde96
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_esp32s2_eink_portal/sdkconfig
@@ -0,0 +1,33 @@
+CONFIG_ESP32S2_SPIRAM_SUPPORT=y
+
+#
+# SPI RAM config
+#
+# CONFIG_SPIRAM_TYPE_AUTO is not set
+CONFIG_SPIRAM_TYPE_ESPPSRAM16=y
+# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
+# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
+CONFIG_SPIRAM_SIZE=2097152
+
+#
+# PSRAM clock and cs IO for ESP32S2
+#
+CONFIG_DEFAULT_PSRAM_CLK_IO=30
+CONFIG_DEFAULT_PSRAM_CS_IO=26
+# end of PSRAM clock and cs IO for ESP32S2
+
+# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
+# CONFIG_SPIRAM_RODATA is not set
+# CONFIG_SPIRAM_SPEED_80M is not set
+CONFIG_SPIRAM_SPEED_40M=y
+# CONFIG_SPIRAM_SPEED_26M is not set
+# CONFIG_SPIRAM_SPEED_20M is not set
+CONFIG_SPIRAM=y
+CONFIG_SPIRAM_BOOT_INIT=y
+# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set
+CONFIG_SPIRAM_USE_MEMMAP=y
+# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
+# CONFIG_SPIRAM_USE_MALLOC is not set
+CONFIG_SPIRAM_MEMTEST=y
+# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
+# end of SPI RAM config
diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/board.c b/ports/esp32s2/boards/adafruit_metro_esp32s2/board.c
new file mode 100644
index 000000000..7380be6da
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/board.c
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+#include "shared-bindings/microcontroller/Pin.h"
+
+void board_init(void) {
+ // USB
+ common_hal_never_reset_pin(&pin_GPIO19);
+ common_hal_never_reset_pin(&pin_GPIO20);
+}
+
+bool board_requests_safe_mode(void) {
+ return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.h b/ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.h
new file mode 100644
index 000000000..7280aab9c
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.h
@@ -0,0 +1,48 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+//Micropython setup
+
+#define MICROPY_HW_BOARD_NAME "Metro ESP32S2"
+#define MICROPY_HW_MCU_NAME "ESP32S2"
+
+#define MICROPY_HW_NEOPIXEL (&pin_GPIO45)
+
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
+#define AUTORESET_DELAY_MS 500
+
+#define DEFAULT_I2C_BUS_SCL (&pin_GPIO34)
+#define DEFAULT_I2C_BUS_SDA (&pin_GPIO33)
+
+#define DEFAULT_SPI_BUS_SCK (&pin_GPIO36)
+#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO35)
+#define DEFAULT_SPI_BUS_MISO (&pin_GPIO37)
+
+#define DEFAULT_UART_BUS_RX (&pin_GPIO5)
+#define DEFAULT_UART_BUS_TX (&pin_GPIO6)
diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.mk b/ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.mk
new file mode 100644
index 000000000..e78098d64
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/mpconfigboard.mk
@@ -0,0 +1,17 @@
+USB_VID = 0x239A
+USB_PID = 0x80E0
+USB_PRODUCT = "Metro ESP32S2"
+USB_MANUFACTURER = "Adafruit"
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = MPZ
+
+# The default queue depth of 16 overflows on release builds,
+# so increase it to 32.
+CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
+
+CIRCUITPY_ESP_FLASH_MODE=dio
+CIRCUITPY_ESP_FLASH_FREQ=40m
+CIRCUITPY_ESP_FLASH_SIZE=4MB
+
+CIRCUITPY_MODULE=wrover
diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c b/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c
new file mode 100644
index 000000000..dbd6cfef8
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/pins.c
@@ -0,0 +1,68 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+ { MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO1) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO2) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO3) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO4) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO5) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO6) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_SDA),MP_ROM_PTR(&pin_GPIO33) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO33),MP_ROM_PTR(&pin_GPIO33) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_SCL),MP_ROM_PTR(&pin_GPIO34) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO34),MP_ROM_PTR(&pin_GPIO34) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_MOSI),MP_ROM_PTR(&pin_GPIO35) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO35),MP_ROM_PTR(&pin_GPIO35) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_MISO),MP_ROM_PTR(&pin_GPIO37) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO37),MP_ROM_PTR(&pin_GPIO37) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO42) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO45) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_DEBUG_RX), MP_ROM_PTR(&pin_GPIO38) },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_DEBUG_TX), MP_ROM_PTR(&pin_GPIO37) },
+
+ { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+ { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+ { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/esp32s2/boards/adafruit_metro_esp32s2/sdkconfig b/ports/esp32s2/boards/adafruit_metro_esp32s2/sdkconfig
new file mode 100644
index 000000000..80b9a2cf8
--- /dev/null
+++ b/ports/esp32s2/boards/adafruit_metro_esp32s2/sdkconfig
@@ -0,0 +1,39 @@
+CONFIG_ESP32S2_SPIRAM_SUPPORT=y
+
+#
+# SPI RAM config
+#
+# CONFIG_SPIRAM_TYPE_AUTO is not set
+CONFIG_SPIRAM_TYPE_ESPPSRAM16=y
+# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
+# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
+CONFIG_SPIRAM_SIZE=2097152
+
+#
+# PSRAM clock and cs IO for ESP32S2
+#
+CONFIG_DEFAULT_PSRAM_CLK_IO=30
+CONFIG_DEFAULT_PSRAM_CS_IO=26
+# end of PSRAM clock and cs IO for ESP32S2
+
+# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
+# CONFIG_SPIRAM_RODATA is not set
+# CONFIG_SPIRAM_SPEED_80M is not set
+CONFIG_SPIRAM_SPEED_40M=y
+# CONFIG_SPIRAM_SPEED_26M is not set
+# CONFIG_SPIRAM_SPEED_20M is not set
+CONFIG_SPIRAM=y
+CONFIG_SPIRAM_BOOT_INIT=y
+# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set
+CONFIG_SPIRAM_USE_MEMMAP=y
+# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
+# CONFIG_SPIRAM_USE_MALLOC is not set
+CONFIG_SPIRAM_MEMTEST=y
+# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
+# end of SPI RAM config
+
+#
+# LWIP
+#
+CONFIG_LWIP_LOCAL_HOSTNAME="Metro-ESP32S2"
+# end of LWIP
diff --git a/ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h b/ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h
index ed3f23a3c..1ec61e946 100644
--- a/ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h
+++ b/ports/esp32s2/boards/electroniccats_bastwifi/mpconfigboard.h
@@ -29,4 +29,8 @@
#define MICROPY_HW_BOARD_NAME "BastWiFi"
#define MICROPY_HW_MCU_NAME "ESP32S2"
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
#define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h b/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h
index 84d15ffc2..2c0f175ab 100644
--- a/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h
+++ b/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.h
@@ -31,4 +31,8 @@
#define MICROPY_HW_NEOPIXEL (&pin_GPIO45)
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
#define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.mk b/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.mk
index ba85e46ef..2dce03881 100644
--- a/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.mk
+++ b/ports/esp32s2/boards/espressif_kaluga_1/mpconfigboard.mk
@@ -11,7 +11,7 @@ LONGINT_IMPL = MPZ
CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
CIRCUITPY_ESP_FLASH_MODE=dio
-CIRCUITPY_ESP_FLASH_FREQ=40m
+CIRCUITPY_ESP_FLASH_FREQ=80m
CIRCUITPY_ESP_FLASH_SIZE=4MB
CIRCUITPY_MODULE=wrover
diff --git a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h
index a94f10ea4..3f628c0f1 100644
--- a/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h
+++ b/ports/esp32s2/boards/espressif_saola_1_wroom/mpconfigboard.h
@@ -31,4 +31,8 @@
#define MICROPY_HW_NEOPIXEL (&pin_GPIO18)
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
#define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h
index 338186dc5..961522891 100644
--- a/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h
+++ b/ports/esp32s2/boards/espressif_saola_1_wrover/mpconfigboard.h
@@ -31,4 +31,8 @@
#define MICROPY_HW_NEOPIXEL (&pin_GPIO18)
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
#define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h
index bb28fe16a..b87b5dfa0 100644
--- a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h
+++ b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.h
@@ -26,10 +26,15 @@
//Micropython setup
-#define MICROPY_HW_BOARD_NAME "microDev microS2"
+#define MICROPY_HW_BOARD_NAME "microS2"
#define MICROPY_HW_MCU_NAME "ESP32S2"
#define MICROPY_HW_LED (&pin_GPIO21)
+#define MICROPY_HW_BUTTON (&pin_GPIO0)
#define MICROPY_HW_NEOPIXEL (&pin_GPIO33)
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
#define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.mk b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.mk
index 783e7ad4c..515617095 100644
--- a/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.mk
+++ b/ports/esp32s2/boards/microdev_micro_s2/mpconfigboard.mk
@@ -2,6 +2,7 @@ USB_VID = 0x239A
USB_PID = 0x80C6
USB_PRODUCT = "microS2"
USB_MANUFACTURER = "microDev"
+USB_DEVICES = "CDC,MSC,HID"
INTERNAL_FLASH_FILESYSTEM = 1
LONGINT_IMPL = MPZ
diff --git a/ports/esp32s2/boards/microdev_micro_s2/pins.c b/ports/esp32s2/boards/microdev_micro_s2/pins.c
index 25300b5c3..bd230ed38 100644
--- a/ports/esp32s2/boards/microdev_micro_s2/pins.c
+++ b/ports/esp32s2/boards/microdev_micro_s2/pins.c
@@ -42,8 +42,27 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
- { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO21) },
+ { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO1) },
+ { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO2) },
+
+ { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) },
+ { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) },
+ { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) },
+
+ { MP_ROM_QSTR(MP_QSTR_MTCK), MP_ROM_PTR(&pin_GPIO39) },
+ { MP_ROM_QSTR(MP_QSTR_MTDO), MP_ROM_PTR(&pin_GPIO40) },
+ { MP_ROM_QSTR(MP_QSTR_MTDI), MP_ROM_PTR(&pin_GPIO41) },
+ { MP_ROM_QSTR(MP_QSTR_MTMS), MP_ROM_PTR(&pin_GPIO42) },
+ { MP_ROM_QSTR(MP_QSTR_DAC1), MP_ROM_PTR(&pin_GPIO17) },
+ { MP_ROM_QSTR(MP_QSTR_DAC2), MP_ROM_PTR(&pin_GPIO18) },
+
+ { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO21) },
+ { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO0) },
{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO33) },
+
+ { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+ { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+ { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
};
MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/esp32s2/boards/microdev_micro_s2/sdkconfig b/ports/esp32s2/boards/microdev_micro_s2/sdkconfig
index b73c4a8c2..4b8cc5cc3 100644
--- a/ports/esp32s2/boards/microdev_micro_s2/sdkconfig
+++ b/ports/esp32s2/boards/microdev_micro_s2/sdkconfig
@@ -16,10 +16,8 @@ CONFIG_DEFAULT_PSRAM_CLK_IO=30
CONFIG_DEFAULT_PSRAM_CS_IO=26
# end of PSRAM clock and cs IO for ESP32S2
-CONFIG_SPIRAM_SPIWP_SD3_PIN=28
# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
# CONFIG_SPIRAM_RODATA is not set
-# CONFIG_SPIRAM_USE_AHB_DBUS3 is not set
# CONFIG_SPIRAM_SPEED_80M is not set
CONFIG_SPIRAM_SPEED_40M=y
# CONFIG_SPIRAM_SPEED_26M is not set
@@ -33,3 +31,9 @@ CONFIG_SPIRAM_USE_MEMMAP=y
CONFIG_SPIRAM_MEMTEST=y
# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
# end of SPI RAM config
+
+#
+# LWIP
+#
+CONFIG_LWIP_LOCAL_HOSTNAME="microS2"
+# end of LWIP
diff --git a/ports/esp32s2/boards/muselab_nanoesp32_s2/board.c b/ports/esp32s2/boards/muselab_nanoesp32_s2/board.c
new file mode 100644
index 000000000..9f708874b
--- /dev/null
+++ b/ports/esp32s2/boards/muselab_nanoesp32_s2/board.c
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+#include "shared-bindings/microcontroller/Pin.h"
+
+void board_init(void) {
+ // USB
+ common_hal_never_reset_pin(&pin_GPIO19);
+ common_hal_never_reset_pin(&pin_GPIO20);
+
+ // Debug UART
+ common_hal_never_reset_pin(&pin_GPIO43);
+ common_hal_never_reset_pin(&pin_GPIO44);
+}
+
+bool board_requests_safe_mode(void) {
+ return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h b/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h
new file mode 100644
index 000000000..6b05ac06f
--- /dev/null
+++ b/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.h
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+//Micropython setup
+
+#define MICROPY_HW_BOARD_NAME "nanoESP32-S2"
+#define MICROPY_HW_MCU_NAME "ESP32S2"
+
+#define MICROPY_HW_NEOPIXEL (&pin_GPIO18)
+
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
+#define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.mk b/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.mk
new file mode 100644
index 000000000..449676d38
--- /dev/null
+++ b/ports/esp32s2/boards/muselab_nanoesp32_s2/mpconfigboard.mk
@@ -0,0 +1,17 @@
+USB_VID = 0x239A
+USB_PID = 0x80DE
+USB_PRODUCT = "nanoESP32-S2"
+USB_MANUFACTURER = "Muselab"
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = MPZ
+
+# The default queue depth of 16 overflows on release builds,
+# so increase it to 32.
+CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
+
+CIRCUITPY_ESP_FLASH_MODE=dio
+CIRCUITPY_ESP_FLASH_FREQ=40m
+CIRCUITPY_ESP_FLASH_SIZE=4MB
+
+CIRCUITPY_MODULE=wroom
diff --git a/ports/esp32s2/boards/muselab_nanoesp32_s2/pins.c b/ports/esp32s2/boards/muselab_nanoesp32_s2/pins.c
new file mode 100644
index 000000000..0562d9331
--- /dev/null
+++ b/ports/esp32s2/boards/muselab_nanoesp32_s2/pins.c
@@ -0,0 +1,48 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+ { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
+ { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
+ { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
+ { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
+ { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
+ { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
+ { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
+ { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
+ { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
+ { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
+ { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
+ { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
+ { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
+ { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+ { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
+ { MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
+ { MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
+ { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
+
+
+ { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
+ { MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) },
+ { MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) },
+ { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
+ { MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) },
+ { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
+ { MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) },
+ { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
+ { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
+ { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
+ { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
+ { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) },
+ { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) },
+ { MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) },
+ { MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
+ { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
+ { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
+ { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
+ { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
+ { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },
+ { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },
+
+ { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO18) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/esp32s2/boards/muselab_nanoesp32_s2/sdkconfig b/ports/esp32s2/boards/muselab_nanoesp32_s2/sdkconfig
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/ports/esp32s2/boards/muselab_nanoesp32_s2/sdkconfig
diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/board.c b/ports/esp32s2/boards/targett_module_clip_wroom/board.c
new file mode 100644
index 000000000..7f5de0e0d
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wroom/board.c
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+#include "shared-bindings/microcontroller/Pin.h"
+
+void board_init(void) {
+ // USB
+ common_hal_never_reset_pin(&pin_GPIO19);
+ common_hal_never_reset_pin(&pin_GPIO20);
+
+ // Debug UART
+ common_hal_never_reset_pin(&pin_GPIO43);
+ common_hal_never_reset_pin(&pin_GPIO44);
+
+ // Crystal
+ common_hal_never_reset_pin(&pin_GPIO15);
+ common_hal_never_reset_pin(&pin_GPIO16);
+}
+
+bool board_requests_safe_mode(void) {
+ return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.h b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.h
new file mode 100644
index 000000000..6cf69138e
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.h
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+//Micropython setup
+
+//Essentially the same as the Saola board but without the neopixel
+
+#define MICROPY_HW_BOARD_NAME "Targett Module Clip w/Wroom"
+#define MICROPY_HW_MCU_NAME "ESP32S2"
+
+//#define MICROPY_HW_NEOPIXEL (&pin_GPIO18)
+
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
+#define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk
new file mode 100644
index 000000000..f88cb75d2
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wroom/mpconfigboard.mk
@@ -0,0 +1,17 @@
+USB_VID = 0x1209
+USB_PID = 0x3252
+USB_PRODUCT = "Targett Module Clip w/Wroom"
+USB_MANUFACTURER = "Targett"
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = MPZ
+
+# The default queue depth of 16 overflows on release builds,
+# so increase it to 32.
+CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
+
+CIRCUITPY_ESP_FLASH_MODE=dio
+CIRCUITPY_ESP_FLASH_FREQ=40m
+CIRCUITPY_ESP_FLASH_SIZE=4MB
+
+CIRCUITPY_MODULE=wroom
diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/pins.c b/ports/esp32s2/boards/targett_module_clip_wroom/pins.c
new file mode 100644
index 000000000..99db09645
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wroom/pins.c
@@ -0,0 +1,48 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+ { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
+ { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
+ { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
+ { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
+ { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
+ { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
+ { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
+ { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
+ { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
+ { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
+ { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
+ { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
+ { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
+ { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+ { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
+ { MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
+ { MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
+ { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
+
+
+ { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
+ { MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) },
+ { MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) },
+ { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
+ { MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) },
+ { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
+ { MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) },
+ { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
+ { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
+ { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
+ { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
+ { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) },
+ { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) },
+ { MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) },
+ { MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
+ { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
+ { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
+ { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
+ { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
+ { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },
+ { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },
+
+ //{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO18) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/esp32s2/boards/targett_module_clip_wroom/sdkconfig b/ports/esp32s2/boards/targett_module_clip_wroom/sdkconfig
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wroom/sdkconfig
diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/board.c b/ports/esp32s2/boards/targett_module_clip_wrover/board.c
new file mode 100644
index 000000000..83dcb920a
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wrover/board.c
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+#include "shared-bindings/microcontroller/Pin.h"
+
+void board_init(void) {
+ // USB
+ common_hal_never_reset_pin(&pin_GPIO19);
+ common_hal_never_reset_pin(&pin_GPIO20);
+
+ // Debug UART
+ common_hal_never_reset_pin(&pin_GPIO43);
+ common_hal_never_reset_pin(&pin_GPIO44);
+
+ //Crystal
+ common_hal_never_reset_pin(&pin_GPIO15);
+ common_hal_never_reset_pin(&pin_GPIO16);
+}
+
+bool board_requests_safe_mode(void) {
+ return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h
new file mode 100644
index 000000000..3c74d27fa
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.h
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+//Micropython setup
+
+//Same setup as the Saola board but with no Neopixel on board
+
+#define MICROPY_HW_BOARD_NAME "Targett Module Clip w/Wrover"
+#define MICROPY_HW_MCU_NAME "ESP32S2"
+
+//#define MICROPY_HW_NEOPIXEL (&pin_GPIO18)
+
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
+#define AUTORESET_DELAY_MS 500
diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk
new file mode 100644
index 000000000..e2dc15584
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wrover/mpconfigboard.mk
@@ -0,0 +1,17 @@
+USB_VID = 0x1209
+USB_PID = 0x3253
+USB_PRODUCT = "Targett Module Clip w/Wrover"
+USB_MANUFACTURER = "Targett"
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = MPZ
+
+# The default queue depth of 16 overflows on release builds,
+# so increase it to 32.
+CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
+
+CIRCUITPY_ESP_FLASH_MODE=dio
+CIRCUITPY_ESP_FLASH_FREQ=40m
+CIRCUITPY_ESP_FLASH_SIZE=4MB
+
+CIRCUITPY_MODULE=wrover
diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/pins.c b/ports/esp32s2/boards/targett_module_clip_wrover/pins.c
new file mode 100644
index 000000000..99db09645
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wrover/pins.c
@@ -0,0 +1,48 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+ { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
+ { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
+ { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
+ { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
+ { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
+ { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
+ { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
+ { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
+ { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
+ { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
+ { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
+ { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
+ { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
+ { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+ { MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
+ { MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
+ { MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
+ { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
+
+
+ { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
+ { MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) },
+ { MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) },
+ { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
+ { MP_ROM_QSTR(MP_QSTR_IO26), MP_ROM_PTR(&pin_GPIO26) },
+ { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
+ { MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) },
+ { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
+ { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
+ { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
+ { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
+ { MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) },
+ { MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) },
+ { MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) },
+ { MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
+ { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
+ { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
+ { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
+ { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
+ { MP_ROM_QSTR(MP_QSTR_IO45), MP_ROM_PTR(&pin_GPIO45) },
+ { MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },
+
+ //{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO18) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/esp32s2/boards/targett_module_clip_wrover/sdkconfig b/ports/esp32s2/boards/targett_module_clip_wrover/sdkconfig
new file mode 100644
index 000000000..9d8bbde96
--- /dev/null
+++ b/ports/esp32s2/boards/targett_module_clip_wrover/sdkconfig
@@ -0,0 +1,33 @@
+CONFIG_ESP32S2_SPIRAM_SUPPORT=y
+
+#
+# SPI RAM config
+#
+# CONFIG_SPIRAM_TYPE_AUTO is not set
+CONFIG_SPIRAM_TYPE_ESPPSRAM16=y
+# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
+# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
+CONFIG_SPIRAM_SIZE=2097152
+
+#
+# PSRAM clock and cs IO for ESP32S2
+#
+CONFIG_DEFAULT_PSRAM_CLK_IO=30
+CONFIG_DEFAULT_PSRAM_CS_IO=26
+# end of PSRAM clock and cs IO for ESP32S2
+
+# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
+# CONFIG_SPIRAM_RODATA is not set
+# CONFIG_SPIRAM_SPEED_80M is not set
+CONFIG_SPIRAM_SPEED_40M=y
+# CONFIG_SPIRAM_SPEED_26M is not set
+# CONFIG_SPIRAM_SPEED_20M is not set
+CONFIG_SPIRAM=y
+CONFIG_SPIRAM_BOOT_INIT=y
+# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set
+CONFIG_SPIRAM_USE_MEMMAP=y
+# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
+# CONFIG_SPIRAM_USE_MALLOC is not set
+CONFIG_SPIRAM_MEMTEST=y
+# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
+# end of SPI RAM config
diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h
index 93fb0c573..5a885f29c 100644
--- a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h
+++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.h
@@ -29,8 +29,11 @@
#define MICROPY_HW_BOARD_NAME "FeatherS2"
#define MICROPY_HW_MCU_NAME "ESP32S2"
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
#define AUTORESET_DELAY_MS 500
-// Doesn't work with this on.
-// #define MICROPY_HW_APA102_MOSI (&pin_GPIO44)
+// #define MICROPY_HW_APA102_MOSI (&pin_GPIO40)
// #define MICROPY_HW_APA102_SCK (&pin_GPIO45)
diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk
index 294736d17..9857c0761 100644
--- a/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk
+++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/mpconfigboard.mk
@@ -16,3 +16,6 @@ CIRCUITPY_ESP_FLASH_FREQ=40m
CIRCUITPY_ESP_FLASH_SIZE=16MB
CIRCUITPY_BITBANG_APA102 = 1
+
+# Include these Python libraries in firmware.
+# FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DotStar
diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c b/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c
index e8dd2edf6..c294fb9d3 100644
--- a/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c
+++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/pins.c
@@ -1,55 +1,100 @@
#include "shared-bindings/board/__init__.h"
STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+ { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) },
{ MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO17) },
+ { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) },
{ MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO18) },
- { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO14) },
- { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO14) },
+ { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+ { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO13) },
+ { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO13) },
+ { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
{ MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO12) },
{ MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO12) },
+ { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
{ MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO6) },
{ MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO6) },
+ { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
{ MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO5) },
{ MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO5) },
+ { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) },
{ MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO36) },
+ { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) },
{ MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO35) },
+ { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) },
{ MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO37) },
+ { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
{ MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO44) },
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
+ { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
{ MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO43) },
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
- // Moving to 9 and 8
- { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO38) },
- { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO33) },
+ { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO8) },
+ { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
+ { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO8) },
+
+ { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO9) },
+ { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
+ { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO9) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
+ { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO0) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
{ MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO1) },
+ { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_GPIO1) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
{ MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO3) },
+ { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO3) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
{ MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO7) },
- { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO8) },
- { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO9) },
+ { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO7) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
+ { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO33) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
+ { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO38) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
{ MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO10) },
+ { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO10) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
{ MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO11) },
+ { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO11) },
- { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_GPIO44) }, // MTDO
+ { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_GPIO40) }, // MTDO
{ MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_GPIO45) },
+
+ { MP_ROM_QSTR(MP_QSTR_LDO2), MP_ROM_PTR(&pin_GPIO21) },
+ { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO13) },
+ { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
+ { MP_ROM_QSTR(MP_QSTR_AMB), MP_ROM_PTR(&pin_GPIO4) },
+
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig b/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig
index b73c4a8c2..c9d44460c 100644
--- a/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig
+++ b/ports/esp32s2/boards/unexpectedmaker_feathers2/sdkconfig
@@ -16,10 +16,8 @@ CONFIG_DEFAULT_PSRAM_CLK_IO=30
CONFIG_DEFAULT_PSRAM_CS_IO=26
# end of PSRAM clock and cs IO for ESP32S2
-CONFIG_SPIRAM_SPIWP_SD3_PIN=28
# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
# CONFIG_SPIRAM_RODATA is not set
-# CONFIG_SPIRAM_USE_AHB_DBUS3 is not set
# CONFIG_SPIRAM_SPEED_80M is not set
CONFIG_SPIRAM_SPEED_40M=y
# CONFIG_SPIRAM_SPEED_26M is not set
@@ -33,3 +31,9 @@ CONFIG_SPIRAM_USE_MEMMAP=y
CONFIG_SPIRAM_MEMTEST=y
# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
# end of SPI RAM config
+
+#
+# LWIP
+#
+CONFIG_LWIP_LOCAL_HOSTNAME="UMFeatherS2"
+# end of LWIP
diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/board.c b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/board.c
new file mode 100644
index 000000000..1dc30b5af
--- /dev/null
+++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/board.c
@@ -0,0 +1,56 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "boards/board.h"
+#include "mpconfigboard.h"
+#include "shared-bindings/microcontroller/Pin.h"
+
+void board_init(void) {
+ // USB
+ common_hal_never_reset_pin(&pin_GPIO19);
+ common_hal_never_reset_pin(&pin_GPIO20);
+
+ // Debug UART
+ common_hal_never_reset_pin(&pin_GPIO43);
+ common_hal_never_reset_pin(&pin_GPIO44);
+
+ // SPI Flash and RAM
+ common_hal_never_reset_pin(&pin_GPIO26);
+ common_hal_never_reset_pin(&pin_GPIO27);
+ common_hal_never_reset_pin(&pin_GPIO28);
+ common_hal_never_reset_pin(&pin_GPIO29);
+ common_hal_never_reset_pin(&pin_GPIO30);
+ common_hal_never_reset_pin(&pin_GPIO31);
+ common_hal_never_reset_pin(&pin_GPIO32);
+}
+
+bool board_requests_safe_mode(void) {
+ return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h
new file mode 100644
index 000000000..93d901bec
--- /dev/null
+++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.h
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+//Micropython setup
+
+#define MICROPY_HW_BOARD_NAME "FeatherS2 PreRelease"
+#define MICROPY_HW_MCU_NAME "ESP32S2"
+
+#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
+#define BOARD_USER_SAFE_MODE_ACTION translate("pressing boot button at start up.\n")
+
+#define AUTORESET_DELAY_MS 500
+
+// #define MICROPY_HW_APA102_MOSI (&pin_GPIO40)
+// #define MICROPY_HW_APA102_SCK (&pin_GPIO45)
diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.mk b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.mk
new file mode 100644
index 000000000..9857c0761
--- /dev/null
+++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/mpconfigboard.mk
@@ -0,0 +1,21 @@
+USB_VID = 0x239A
+USB_PID = 0x80AC
+USB_PRODUCT = "FeatherS2"
+USB_MANUFACTURER = "UnexpectedMaker"
+USB_DEVICES = "CDC,MSC,HID"
+
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = MPZ
+
+# The default queue depth of 16 overflows on release builds,
+# so increase it to 32.
+CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
+
+CIRCUITPY_ESP_FLASH_MODE=qio
+CIRCUITPY_ESP_FLASH_FREQ=40m
+CIRCUITPY_ESP_FLASH_SIZE=16MB
+
+CIRCUITPY_BITBANG_APA102 = 1
+
+# Include these Python libraries in firmware.
+# FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_DotStar
diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c
new file mode 100644
index 000000000..a1036f850
--- /dev/null
+++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/pins.c
@@ -0,0 +1,102 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
+ { MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
+ { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO17) },
+ { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO17) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
+ { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO18) },
+ { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO18) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+ { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO13) },
+ { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO13) },
+ { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO13) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
+ { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO12) },
+ { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO12) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
+ { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO6) },
+ { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO6) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
+ { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO5) },
+ { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO5) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
+ { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) },
+ { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO36) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
+ { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) },
+ { MP_ROM_QSTR(MP_QSTR_D24), MP_ROM_PTR(&pin_GPIO35) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
+ { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) },
+ { MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO37) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
+ { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO44) },
+ { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
+ { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO43) },
+ { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
+
+ { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO38) },
+ { MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
+ { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO38) },
+
+ { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO33) },
+ { MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
+ { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO33) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
+ { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO0) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
+ { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO1) },
+ { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_GPIO1) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
+ { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO3) },
+ { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO3) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
+ { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO7) },
+ { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO7) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
+ { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO8) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
+ { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO9) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
+ { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO10) },
+ { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO10) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
+ { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO11) },
+ { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO11) },
+
+ { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_GPIO40) }, // MTDO
+ { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_GPIO45) },
+
+ { MP_ROM_QSTR(MP_QSTR_LDO2), MP_ROM_PTR(&pin_GPIO21) },
+ { MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
+ { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO13) },
+
+ { MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
+ { MP_ROM_QSTR(MP_QSTR_AMB), MP_ROM_PTR(&pin_GPIO4) },
+
+ { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+ { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+ { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+};
+MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);
diff --git a/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/sdkconfig b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/sdkconfig
new file mode 100644
index 000000000..00e0bb256
--- /dev/null
+++ b/ports/esp32s2/boards/unexpectedmaker_feathers2_prerelease/sdkconfig
@@ -0,0 +1,41 @@
+CONFIG_ESP32S2_SPIRAM_SUPPORT=y
+
+#
+# SPI RAM config
+#
+# CONFIG_SPIRAM_TYPE_AUTO is not set
+# CONFIG_SPIRAM_TYPE_ESPPSRAM16 is not set
+# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
+CONFIG_SPIRAM_TYPE_ESPPSRAM64=y
+CONFIG_SPIRAM_SIZE=8388608
+
+#
+# PSRAM clock and cs IO for ESP32S2
+#
+CONFIG_DEFAULT_PSRAM_CLK_IO=30
+CONFIG_DEFAULT_PSRAM_CS_IO=26
+# end of PSRAM clock and cs IO for ESP32S2
+
+CONFIG_SPIRAM_SPIWP_SD3_PIN=28
+# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
+# CONFIG_SPIRAM_RODATA is not set
+# CONFIG_SPIRAM_USE_AHB_DBUS3 is not set
+# CONFIG_SPIRAM_SPEED_80M is not set
+CONFIG_SPIRAM_SPEED_40M=y
+# CONFIG_SPIRAM_SPEED_26M is not set
+# CONFIG_SPIRAM_SPEED_20M is not set
+CONFIG_SPIRAM=y
+CONFIG_SPIRAM_BOOT_INIT=y
+# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set
+CONFIG_SPIRAM_USE_MEMMAP=y
+# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
+# CONFIG_SPIRAM_USE_MALLOC is not set
+CONFIG_SPIRAM_MEMTEST=y
+# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
+# end of SPI RAM config
+
+#
+# LWIP
+#
+CONFIG_LWIP_LOCAL_HOSTNAME="UMFeatherS2"
+# end of LWIP
diff --git a/ports/esp32s2/common-hal/analogio/AnalogIn.c b/ports/esp32s2/common-hal/analogio/AnalogIn.c
new file mode 100644
index 000000000..bab1721ea
--- /dev/null
+++ b/ports/esp32s2/common-hal/analogio/AnalogIn.c
@@ -0,0 +1,98 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "common-hal/analogio/AnalogIn.h"
+#include "py/mperrno.h"
+#include "py/runtime.h"
+#include "supervisor/shared/translate.h"
+
+#include "components/driver/include/driver/adc_common.h"
+#include "components/esp_adc_cal/include/esp_adc_cal.h"
+
+#include "shared-bindings/microcontroller/Pin.h"
+
+#define DEFAULT_VREF 1100
+#define NO_OF_SAMPLES 64
+#define ATTENUATION ADC_ATTEN_DB_11
+#define DATA_WIDTH ADC_WIDTH_BIT_13
+
+void common_hal_analogio_analogin_construct(analogio_analogin_obj_t* self,
+ const mcu_pin_obj_t *pin) {
+ if (pin->adc_index == 0 || pin->adc_channel == ADC_CHANNEL_MAX) {
+ mp_raise_ValueError(translate("Pin does not have ADC capabilities"));
+ }
+ common_hal_mcu_pin_claim(pin);
+ self->pin = pin;
+}
+
+bool common_hal_analogio_analogin_deinited(analogio_analogin_obj_t *self) {
+ return self->pin == NULL;
+}
+
+void common_hal_analogio_analogin_deinit(analogio_analogin_obj_t *self) {
+ if (common_hal_analogio_analogin_deinited(self)) {
+ return;
+ }
+ reset_pin_number(self->pin->number);
+ self->pin = NULL;
+}
+
+uint16_t common_hal_analogio_analogin_get_value(analogio_analogin_obj_t *self) {
+ if (self->pin->adc_index == ADC_UNIT_1) {
+ adc1_config_width(DATA_WIDTH);
+ adc1_config_channel_atten((adc1_channel_t)self->pin->adc_channel, ATTENUATION);
+ } else if (self->pin->adc_index == ADC_UNIT_2) {
+ adc2_config_channel_atten((adc2_channel_t)self->pin->adc_channel, ATTENUATION);
+ }
+
+ // Automatically select calibration process depending on status of efuse
+ esp_adc_cal_characteristics_t *adc_chars = calloc(1, sizeof(esp_adc_cal_characteristics_t));
+ esp_adc_cal_characterize(self->pin->adc_index, ATTENUATION, DATA_WIDTH, DEFAULT_VREF, adc_chars);
+
+ uint32_t adc_reading = 0;
+ //Multisampling
+ for (int i = 0; i < NO_OF_SAMPLES; i++) {
+ if (self->pin->adc_index == ADC_UNIT_1) {
+ adc_reading += adc1_get_raw((adc1_channel_t)self->pin->adc_channel);
+ } else {
+ int raw;
+ esp_err_t r = adc2_get_raw((adc2_channel_t)self->pin->adc_channel, DATA_WIDTH, &raw);
+ if ( r != ESP_OK ) {
+ mp_raise_ValueError(translate("ADC2 is being used by WiFi"));
+ }
+ adc_reading += raw;
+ }
+ }
+ adc_reading /= NO_OF_SAMPLES;
+
+ // This corrects non-linear regions of the ADC range with a LUT, so it's a better reading than raw
+ uint32_t voltage = esp_adc_cal_raw_to_voltage(adc_reading, adc_chars);
+ return voltage * ((1 << 16) - 1)/3300;
+}
+
+float common_hal_analogio_analogin_get_reference_voltage(analogio_analogin_obj_t *self) {
+ return 3.3f;
+}
diff --git a/ports/esp32s2/common-hal/analogio/AnalogIn.h b/ports/esp32s2/common-hal/analogio/AnalogIn.h
new file mode 100644
index 000000000..fed4d0217
--- /dev/null
+++ b/ports/esp32s2/common-hal/analogio/AnalogIn.h
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ANALOGIO_ANALOGIN_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ANALOGIO_ANALOGIN_H
+
+#include "common-hal/microcontroller/Pin.h"
+
+#include "components/hal/include/hal/adc_types.h"
+#include "FreeRTOS.h"
+#include "freertos/semphr.h"
+#include "py/obj.h"
+
+typedef struct {
+ mp_obj_base_t base;
+ const mcu_pin_obj_t * pin;
+} analogio_analogin_obj_t;
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ANALOGIO_ANALOGIN_H
diff --git a/ports/esp32s2/common-hal/analogio/AnalogOut.c b/ports/esp32s2/common-hal/analogio/AnalogOut.c
new file mode 100644
index 000000000..080a01b04
--- /dev/null
+++ b/ports/esp32s2/common-hal/analogio/AnalogOut.c
@@ -0,0 +1,73 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * SPDX-FileCopyrightText: Copyright (c) 2013, 2014 Damien P. George
+ * Copyright (c) 2019, Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+#include <string.h>
+
+#include "py/mperrno.h"
+#include "py/runtime.h"
+
+#include "shared-bindings/analogio/AnalogOut.h"
+#include "shared-bindings/microcontroller/Pin.h"
+#include "supervisor/shared/translate.h"
+
+#include "components/driver/include/driver/dac_common.h"
+
+#include "common-hal/microcontroller/Pin.h"
+
+void common_hal_analogio_analogout_construct(analogio_analogout_obj_t* self,
+ const mcu_pin_obj_t *pin) {
+ if (pin == &pin_GPIO17) {
+ self->channel = DAC_CHANNEL_1;
+ } else if (pin == &pin_GPIO18) {
+ self->channel = DAC_CHANNEL_2;
+ } else {
+ mp_raise_ValueError(translate("Invalid DAC pin supplied"));
+ }
+ dac_output_enable(self->channel);
+}
+
+bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) {
+ return (self->channel == DAC_CHANNEL_MAX);
+}
+
+void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) {
+ dac_output_disable(self->channel);
+ self->channel = DAC_CHANNEL_MAX;
+}
+
+void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self,
+ uint16_t value) {
+ uint8_t dac_value = (value * 255) / 65535;
+ dac_output_enable(self->channel);
+ dac_output_voltage(self->channel, dac_value);
+}
+
+void analogout_reset(void) {
+ dac_output_disable(DAC_CHANNEL_1);
+ dac_output_disable(DAC_CHANNEL_2);
+}
diff --git a/ports/esp32s2/common-hal/analogio/AnalogOut.h b/ports/esp32s2/common-hal/analogio/AnalogOut.h
new file mode 100644
index 000000000..6285151ba
--- /dev/null
+++ b/ports/esp32s2/common-hal/analogio/AnalogOut.h
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Scott Shawcroft
+ * Copyright (c) 2019 Lucian Copeland for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ANALOGIO_ANALOGOUT_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_ANALOGIO_ANALOGOUT_H
+
+#include "common-hal/microcontroller/Pin.h"
+
+#include "py/obj.h"
+
+typedef struct {
+ mp_obj_base_t base;
+ const mcu_pin_obj_t * pin;
+ uint8_t channel;
+} analogio_analogout_obj_t;
+
+void analogout_reset(void);
+
+#endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_ANALOGIO_ANALOGOUT_H
diff --git a/ports/esp32s2/common-hal/analogio/__init__.c b/ports/esp32s2/common-hal/analogio/__init__.c
new file mode 100644
index 000000000..eea58c77d
--- /dev/null
+++ b/ports/esp32s2/common-hal/analogio/__init__.c
@@ -0,0 +1 @@
+// No analogio module functions.
diff --git a/ports/esp32s2/common-hal/busio/I2C.c b/ports/esp32s2/common-hal/busio/I2C.c
index 57270372f..6f1953128 100644
--- a/ports/esp32s2/common-hal/busio/I2C.c
+++ b/ports/esp32s2/common-hal/busio/I2C.c
@@ -28,7 +28,7 @@
#include "py/mperrno.h"
#include "py/runtime.h"
-#include "driver/i2c.h"
+#include "components/driver/include/driver/i2c.h"
#include "shared-bindings/microcontroller/__init__.h"
#include "shared-bindings/microcontroller/Pin.h"
diff --git a/ports/esp32s2/common-hal/busio/I2C.h b/ports/esp32s2/common-hal/busio/I2C.h
index 24a3fd495..c39d6d744 100644
--- a/ports/esp32s2/common-hal/busio/I2C.h
+++ b/ports/esp32s2/common-hal/busio/I2C.h
@@ -29,7 +29,7 @@
#include "common-hal/microcontroller/Pin.h"
-#include "esp-idf/components/soc/include/hal/i2c_types.h"
+#include "components/hal/include/hal/i2c_types.h"
#include "FreeRTOS.h"
#include "freertos/semphr.h"
#include "py/obj.h"
diff --git a/ports/esp32s2/common-hal/busio/SPI.c b/ports/esp32s2/common-hal/busio/SPI.c
index a22075cd5..490419f34 100644
--- a/ports/esp32s2/common-hal/busio/SPI.c
+++ b/ports/esp32s2/common-hal/busio/SPI.c
@@ -115,6 +115,7 @@ static void spi_bus_intr_disable(void *self)
void common_hal_busio_spi_construct(busio_spi_obj_t *self,
const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi,
const mcu_pin_obj_t * miso) {
+
spi_bus_config_t bus_config;
bus_config.mosi_io_num = mosi != NULL ? mosi->number : -1;
bus_config.miso_io_num = miso != NULL ? miso->number : -1;
@@ -183,9 +184,6 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
// spi_hal_init clears the given hal context so set everything after.
spi_hal_init(hal, host_id);
- hal->dmadesc_tx = &self->tx_dma;
- hal->dmadesc_rx = &self->rx_dma;
- hal->dmadesc_n = 1;
// We don't use native CS.
// hal->cs_setup = 0;
@@ -196,7 +194,6 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
hal->half_duplex = 0;
// hal->tx_lsbfirst = 0;
// hal->rx_lsbfirst = 0;
- hal->dma_enabled = 1;
hal->no_compensate = 1;
// Ignore CS bits
@@ -216,8 +213,12 @@ void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) {
spi_never_reset[self->host_id] = true;
common_hal_never_reset_pin(self->clock_pin);
- common_hal_never_reset_pin(self->MOSI_pin);
- common_hal_never_reset_pin(self->MISO_pin);
+ if (self->MOSI_pin != NULL) {
+ common_hal_never_reset_pin(self->MOSI_pin);
+ }
+ if (self->MISO_pin != NULL) {
+ common_hal_never_reset_pin(self->MISO_pin);
+ }
}
bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) {
@@ -240,9 +241,15 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) {
spi_bus_free(self->host_id);
common_hal_reset_pin(self->clock_pin);
- common_hal_reset_pin(self->MOSI_pin);
- common_hal_reset_pin(self->MISO_pin);
+ if (self->MOSI_pin != NULL) {
+ common_hal_reset_pin(self->MOSI_pin);
+ }
+ if (self->MISO_pin != NULL) {
+ common_hal_reset_pin(self->MISO_pin);
+ }
self->clock_pin = NULL;
+ self->MISO_pin = NULL;
+ self->MOSI_pin = NULL;
}
bool common_hal_busio_spi_configure(busio_spi_obj_t *self,
@@ -259,7 +266,7 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self,
self->bits = bits;
self->target_frequency = baudrate;
self->hal_context.timing_conf = &self->timing_conf;
- esp_err_t result = spi_hal_get_clock_conf(&self->hal_context,
+ esp_err_t result = spi_hal_cal_clock_conf(&self->hal_context,
self->target_frequency,
128 /* duty_cycle */,
self->connected_through_gpio,
@@ -297,34 +304,74 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) {
bool common_hal_busio_spi_write(busio_spi_obj_t *self,
const uint8_t *data, size_t len) {
+ if (self->MOSI_pin == NULL) {
+ mp_raise_ValueError(translate("No MOSI Pin"));
+ }
return common_hal_busio_spi_transfer(self, data, NULL, len);
}
bool common_hal_busio_spi_read(busio_spi_obj_t *self,
uint8_t *data, size_t len, uint8_t write_value) {
- return common_hal_busio_spi_transfer(self, NULL, data, len);
+
+ if (self->MISO_pin == NULL) {
+ mp_raise_ValueError(translate("No MISO Pin"));
+ }
+ if (self->MOSI_pin == NULL) {
+ return common_hal_busio_spi_transfer(self, NULL, data, len);
+ } else {
+ memset(data, write_value, len);
+ return common_hal_busio_spi_transfer(self, data, data, len);
+ }
}
bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) {
if (len == 0) {
return true;
}
+ // Other than the read special case, stop transfers that don't have a pin/array match
+ if (!self->MOSI_pin && (data_out != data_in)) {
+ mp_raise_ValueError(translate("No MOSI Pin"));
+ }
+ if (!self->MISO_pin && data_in) {
+ mp_raise_ValueError(translate("No MISO Pin"));
+ }
spi_hal_context_t* hal = &self->hal_context;
hal->send_buffer = NULL;
hal->rcv_buffer = NULL;
// Reset timing_conf in case we've moved since the last time we used it.
hal->timing_conf = &self->timing_conf;
+ lldesc_t tx_dma __attribute__((aligned(16)));
+ lldesc_t rx_dma __attribute__((aligned(16)));
+ hal->dmadesc_tx = &tx_dma;
+ hal->dmadesc_rx = &rx_dma;
+ hal->dmadesc_n = 1;
+
+ size_t burst_length;
+ // If both of the incoming pointers are DMA capable then use DMA. Otherwise, do
+ // bursts the size of the SPI data buffer without DMA.
+ if ((data_out == NULL || esp_ptr_dma_capable(data_out)) &&
+ (data_in == NULL || esp_ptr_dma_capable(data_out))) {
+ hal->dma_enabled = 1;
+ burst_length = LLDESC_MAX_NUM_PER_DESC;
+ } else {
+ hal->dma_enabled = 0;
+ burst_length = sizeof(hal->hw->data_buf);
+ // When switching to non-DMA, we need to make sure DMA is off. Otherwise,
+ // the S2 will transmit zeroes instead of our data.
+ spi_ll_txdma_disable(hal->hw);
+ }
+
// This rounds up.
- size_t dma_count = (len + LLDESC_MAX_NUM_PER_DESC - 1) / LLDESC_MAX_NUM_PER_DESC;
- for (size_t i = 0; i < dma_count; i++) {
- size_t offset = LLDESC_MAX_NUM_PER_DESC * i;
- size_t dma_len = len - offset;
- if (dma_len > LLDESC_MAX_NUM_PER_DESC) {
- dma_len = LLDESC_MAX_NUM_PER_DESC;
+ size_t burst_count = (len + burst_length - 1) / burst_length;
+ for (size_t i = 0; i < burst_count; i++) {
+ size_t offset = burst_length * i;
+ size_t this_length = len - offset;
+ if (this_length > burst_length) {
+ this_length = burst_length;
}
- hal->tx_bitlen = dma_len * self->bits;
- hal->rx_bitlen = dma_len * self->bits;
+ hal->tx_bitlen = this_length * self->bits;
+ hal->rx_bitlen = this_length * self->bits;
if (data_out != NULL) {
hal->send_buffer = (uint8_t*) data_out + offset;
}
@@ -341,6 +388,9 @@ bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_ou
}
spi_hal_fetch_result(hal);
}
+ hal->dmadesc_tx = NULL;
+ hal->dmadesc_rx = NULL;
+ hal->dmadesc_n = 0;
return true;
}
diff --git a/ports/esp32s2/common-hal/busio/SPI.h b/ports/esp32s2/common-hal/busio/SPI.h
index 6d8203831..f6c1c344a 100644
--- a/ports/esp32s2/common-hal/busio/SPI.h
+++ b/ports/esp32s2/common-hal/busio/SPI.h
@@ -29,9 +29,9 @@
#include "common-hal/microcontroller/Pin.h"
-#include "esp-idf/components/driver/include/driver/spi_common_internal.h"
-#include "esp-idf/components/soc/include/hal/spi_hal.h"
-#include "esp-idf/components/soc/include/hal/spi_types.h"
+#include "components/driver/include/driver/spi_common_internal.h"
+#include "components/hal/include/hal/spi_hal.h"
+#include "components/hal/include/hal/spi_types.h"
#include "py/obj.h"
typedef struct {
@@ -44,10 +44,6 @@ typedef struct {
spi_hal_context_t hal_context;
spi_hal_timing_conf_t timing_conf;
intr_handle_t interrupt;
- // IDF allocates these in DMA accessible memory so they may need to move when
- // we use external RAM for CircuitPython.
- lldesc_t tx_dma;
- lldesc_t rx_dma;
uint32_t target_frequency;
int32_t real_frequency;
uint8_t polarity;
diff --git a/ports/esp32s2/common-hal/busio/UART.c b/ports/esp32s2/common-hal/busio/UART.c
index b0162adba..98cebba67 100644
--- a/ports/esp32s2/common-hal/busio/UART.c
+++ b/ports/esp32s2/common-hal/busio/UART.c
@@ -27,7 +27,7 @@
#include "shared-bindings/microcontroller/__init__.h"
#include "shared-bindings/busio/UART.h"
-#include "driver/uart.h"
+#include "components/driver/include/driver/uart.h"
#include "mpconfigport.h"
#include "lib/utils/interrupt_char.h"
diff --git a/ports/esp32s2/common-hal/busio/UART.h b/ports/esp32s2/common-hal/busio/UART.h
index b3cc92966..1d7f13511 100644
--- a/ports/esp32s2/common-hal/busio/UART.h
+++ b/ports/esp32s2/common-hal/busio/UART.h
@@ -29,7 +29,7 @@
#include "common-hal/microcontroller/Pin.h"
-#include "esp-idf/components/soc/include/hal/uart_types.h"
+#include "components/hal/include/hal/uart_types.h"
#include "py/obj.h"
typedef struct {
diff --git a/ports/esp32s2/common-hal/canio/CAN.c b/ports/esp32s2/common-hal/canio/CAN.c
new file mode 100644
index 000000000..768fde243
--- /dev/null
+++ b/ports/esp32s2/common-hal/canio/CAN.c
@@ -0,0 +1,295 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <string.h>
+
+#include "py/runtime.h"
+#include "py/mperrno.h"
+
+#include "common-hal/canio/CAN.h"
+#include "shared-bindings/microcontroller/Pin.h"
+#include "shared-bindings/util.h"
+#include "supervisor/port.h"
+
+#include "hal/twai_types.h"
+
+STATIC bool reserved_can;
+
+twai_timing_config_t get_t_config(int baudrate) {
+ switch(baudrate) {
+ case 1000000:
+ {
+ // TWAI_TIMING_CONFIG_abc expands to a C designated initializer list
+ // { .brp = 4, ...}. This is only acceptable to the compiler as an
+ // initializer and 'return TWAI_TIMING_CONFIG_1MBITS()` is not valid.
+ // Instead, introduce a temporary, named variable and return it.
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_1MBITS();
+ return t_config;
+ }
+ case 800000:
+ {
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_800KBITS();
+ return t_config;
+ }
+ case 500000:
+ {
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_500KBITS();
+ return t_config;
+ }
+ case 250000:
+ {
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_250KBITS();
+ return t_config;
+ }
+ case 125000:
+ {
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_125KBITS();
+ return t_config;
+ }
+ case 100000:
+ {
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_100KBITS();
+ return t_config;
+ }
+ case 50000:
+ {
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_50KBITS();
+ return t_config;
+ }
+ case 25000:
+ {
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_25KBITS();
+ return t_config;
+ }
+ case 20000:
+ {
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_20KBITS();
+ return t_config;
+ }
+ case 16000:
+ {
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_16KBITS();
+ return t_config;
+ }
+ case 12500:
+ {
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_12_5KBITS();
+ return t_config;
+ }
+ case 10000:
+ {
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_10KBITS();
+ return t_config;
+ }
+ case 5000:
+ {
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_5KBITS();
+ return t_config;
+ }
+ case 1000:
+ {
+ twai_timing_config_t t_config = TWAI_TIMING_CONFIG_1KBITS();
+ return t_config;
+ }
+ default:
+ mp_raise_ValueError(translate("Baudrate not supported by peripheral"));
+ }
+}
+
+void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent)
+{
+#define DIV_ROUND(a, b) (((a) + (b)/2) / (b))
+#define DIV_ROUND_UP(a, b) (((a) + (b) - 1) / (b))
+ if (reserved_can) {
+ mp_raise_ValueError(translate("All CAN peripherals are in use"));
+ }
+
+ if (loopback && silent) {
+ mp_raise_ValueError(translate("loopback + silent mode not supported by peripheral"));
+ }
+
+ twai_timing_config_t t_config = get_t_config(baudrate);
+ twai_general_config_t g_config = TWAI_GENERAL_CONFIG_DEFAULT(-1, -1, TWAI_MODE_NORMAL);
+ g_config.tx_io = tx->number;
+ g_config.rx_io = rx->number;
+ if (loopback) {
+ g_config.mode = TWAI_MODE_NO_ACK;
+ }
+ if (silent) {
+ g_config.mode = TWAI_MODE_LISTEN_ONLY;
+ }
+
+ twai_filter_config_t f_config = TWAI_FILTER_CONFIG_ACCEPT_ALL();
+
+ esp_err_t result = twai_driver_install(&g_config, &t_config, &f_config);
+ if (result == ESP_ERR_NO_MEM) {
+ mp_raise_msg(&mp_type_MemoryError, translate("ESP-IDF memory allocation failed"));
+ } else if (result == ESP_ERR_INVALID_ARG) {
+ mp_raise_ValueError(translate("Invalid pins"));
+ } else if (result != ESP_OK) {
+ mp_raise_OSError_msg_varg(translate("twai_driver_install returned esp-idf error #%d"), (int)result);
+ }
+
+ result = twai_start();
+ if (result != ESP_OK) {
+ mp_raise_OSError_msg_varg(translate("twai_start returned esp-idf error #%d"), (int)result);
+ }
+
+ self->silent = silent;
+ self->loopback = loopback;
+ self->baudrate = baudrate;
+ self->tx_pin = tx;
+ self->rx_pin = rx;
+
+ claim_pin(tx);
+ claim_pin(rx);
+
+ reserved_can = true;
+}
+
+bool common_hal_canio_can_loopback_get(canio_can_obj_t *self)
+{
+ return self->loopback;
+}
+
+int common_hal_canio_can_baudrate_get(canio_can_obj_t *self)
+{
+ return self->baudrate;
+}
+
+int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self)
+{
+ twai_status_info_t info;
+ twai_get_status_info(&info);
+ return info.tx_error_counter;
+}
+
+int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self)
+{
+ twai_status_info_t info;
+ twai_get_status_info(&info);
+ return info.rx_error_counter;
+}
+
+canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self) {
+ twai_status_info_t info;
+ twai_get_status_info(&info);
+ if (info.state == TWAI_STATE_BUS_OFF || info.state == TWAI_STATE_RECOVERING) {
+ return BUS_STATE_OFF;
+ }
+ if (info.tx_error_counter > 127 || info.rx_error_counter > 127) {
+ return BUS_STATE_ERROR_PASSIVE;
+ }
+ if (info.tx_error_counter > 96 || info.rx_error_counter > 96) {
+ return BUS_STATE_ERROR_WARNING;
+ }
+ return BUS_STATE_ERROR_ACTIVE;
+}
+
+static void can_restart(void) {
+ twai_status_info_t info;
+ twai_get_status_info(&info);
+ if (info.state != TWAI_STATE_BUS_OFF) {
+ return;
+ }
+ twai_initiate_recovery();
+ // wait 100ms (hard coded for now) for bus to recover
+ uint64_t deadline = port_get_raw_ticks(NULL) + 100;
+ do {
+ twai_get_status_info(&info);
+ } while (port_get_raw_ticks(NULL) < deadline && (info.state == TWAI_STATE_BUS_OFF || info.state == TWAI_STATE_RECOVERING));
+}
+
+void canio_maybe_auto_restart(canio_can_obj_t *self) {
+ if (self->auto_restart) can_restart();
+}
+
+void common_hal_canio_can_restart(canio_can_obj_t *self) {
+ if (!common_hal_canio_can_auto_restart_get(self)) {
+ can_restart();
+ }
+}
+
+bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self) {
+ return self->auto_restart;
+}
+
+void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool value) {
+ self->auto_restart = value;
+ canio_maybe_auto_restart(self);
+}
+
+void common_hal_canio_can_send(canio_can_obj_t *self, mp_obj_t message_in)
+{
+ canio_maybe_auto_restart(self);
+ canio_message_obj_t *message = message_in;
+ bool rtr = message->base.type == &canio_remote_transmission_request_type;
+ twai_message_t message_out = {
+ .extd = message->extended,
+ .rtr = rtr,
+ .self = self->loopback,
+ .identifier = message->id,
+ .data_length_code = message->size,
+ };
+ if (!rtr) {
+ memcpy(message_out.data, message->data, message->size);
+ }
+ // Allow transmission to occur in background
+ twai_transmit(&message_out, 0);
+}
+
+bool common_hal_canio_can_silent_get(canio_can_obj_t *self) {
+ return self->silent;
+}
+
+bool common_hal_canio_can_deinited(canio_can_obj_t *self) {
+ return !self->tx_pin;
+}
+
+void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self) {
+ if (common_hal_canio_can_deinited(self)) {
+ raise_deinited_error();
+ }
+}
+
+void common_hal_canio_can_deinit(canio_can_obj_t *self)
+{
+ if (self->tx_pin) {
+ (void)twai_stop();
+ (void)twai_driver_uninstall();
+ reset_pin_number(self->tx_pin->number);
+ reset_pin_number(self->rx_pin->number);
+ reserved_can = false;
+ }
+ self->tx_pin = NULL;
+ self->rx_pin = NULL;
+}
+
+void common_hal_canio_reset(void) {
+ (void)twai_stop();
+ (void)twai_driver_uninstall();
+ reserved_can = false;
+}
diff --git a/ports/esp32s2/common-hal/canio/CAN.h b/ports/esp32s2/common-hal/canio/CAN.h
new file mode 100644
index 000000000..85fb6972b
--- /dev/null
+++ b/ports/esp32s2/common-hal/canio/CAN.h
@@ -0,0 +1,49 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "py/obj.h"
+#include "shared-bindings/canio/__init__.h"
+#include "shared-bindings/canio/CAN.h"
+#include "common-hal/microcontroller/Pin.h"
+#include "common-hal/canio/__init__.h"
+#include "shared-module/canio/Message.h"
+
+#include "driver/twai.h"
+
+#define FILTER_BANK_COUNT (28)
+
+typedef struct canio_can_obj {
+ mp_obj_base_t base;
+ int baudrate;
+ const mcu_pin_obj_t *rx_pin;
+ const mcu_pin_obj_t *tx_pin;
+ bool loopback:1;
+ bool silent:1;
+ bool auto_restart:1;
+ bool fifo_in_use:1;
+} canio_can_obj_t;
diff --git a/ports/esp32s2/common-hal/canio/Listener.c b/ports/esp32s2/common-hal/canio/Listener.c
new file mode 100644
index 000000000..fddbfeb58
--- /dev/null
+++ b/ports/esp32s2/common-hal/canio/Listener.c
@@ -0,0 +1,182 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <math.h>
+#include <string.h>
+
+#include "py/obj.h"
+#include "py/runtime.h"
+
+#include "common-hal/canio/__init__.h"
+#include "common-hal/canio/Listener.h"
+#include "shared-bindings/canio/Listener.h"
+#include "shared-bindings/util.h"
+#include "supervisor/shared/tick.h"
+#include "supervisor/shared/safe_mode.h"
+
+#include "hal/twai_ll.h"
+
+// IDE = "extended ID" flag of packet header. We always add this bit to the
+// mask because a match is always for just one kind of address length
+#define FILTER16_IDE (1<<3)
+#define FILTER32_IDE (1<<2)
+
+// Work around a problem reported at
+// https://github.com/espressif/esp-idf/issues/6020 where
+// twai_ll_set_acc_filter does not work under -Os optimization
+__attribute__((optimize("O0")))
+__attribute__((noinline))
+static void canio_set_acc_filter(twai_dev_t* hw, uint32_t code, uint32_t mask, bool single_filter)
+{
+ uint32_t code_swapped = __builtin_bswap32(code);
+ uint32_t mask_swapped = __builtin_bswap32(mask);
+ for (int i = 0; i < 4; i++) {
+ hw->acceptance_filter.acr[i].val = ((code_swapped >> (i * 8)) & 0xFF);
+ hw->acceptance_filter.amr[i].val = ((mask_swapped >> (i * 8)) & 0xFF);
+ }
+ hw->mode_reg.afm = single_filter;
+}
+
+STATIC void install_standard_filter(canio_listener_obj_t *self, canio_match_obj_t *match) {
+ canio_set_acc_filter(&TWAI, match->id << 21, ~(match->mask << 21), true);
+ self->extended = false;
+ self->standard = true;
+}
+
+STATIC void install_extended_filter(canio_listener_obj_t *self, canio_match_obj_t *match) {
+ canio_set_acc_filter(&TWAI, match->id << 3, ~(match->mask << 3), true);
+ self->extended = true;
+ self->standard = false;
+}
+
+STATIC void install_all_match_filter(canio_listener_obj_t *self) {
+ canio_set_acc_filter(&TWAI, 0u, ~0u, true);
+ self->extended = true;
+ self->standard = true;
+}
+
+__attribute__((noinline,optimize("O0")))
+void set_filters(canio_listener_obj_t *self, size_t nmatch, canio_match_obj_t **matches) {
+ twai_ll_enter_reset_mode(&TWAI);
+
+ if (!nmatch) {
+ install_all_match_filter(self);
+ } else {
+ canio_match_obj_t *match = matches[0];
+ if (match->extended) {
+ install_extended_filter(self, match);
+ } else {
+ install_standard_filter(self, match);
+ }
+ }
+
+ twai_ll_exit_reset_mode(&TWAI);
+}
+
+
+void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout) {
+ if (can->fifo_in_use) {
+ mp_raise_ValueError(translate("All RX FIFOs in use"));
+ }
+ if (nmatch > 1) {
+ mp_raise_ValueError(translate("Filters too complex"));
+ }
+
+ // Nothing can fail now so it's safe to assign self->can
+ can->fifo_in_use = 1;
+ self->can = can;
+ self->pending = false;
+
+ set_filters(self, nmatch, matches);
+ self->extended = self->standard = true;
+
+ common_hal_canio_listener_set_timeout(self, timeout);
+}
+
+void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout) {
+ self->timeout_ms = (int)MICROPY_FLOAT_C_FUN(ceil)(timeout * 1000);
+}
+
+float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self) {
+ return self->timeout_ms / 1000.0f;
+}
+
+void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self) {
+ if (!self->can) {
+ raise_deinited_error();
+ }
+ common_hal_canio_can_check_for_deinit(self->can);
+}
+
+// The API has no peek method so we must receive a packet into a holding area
+// and then we can say that we have 1 message pending
+int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self) {
+ while (!self->pending && twai_receive(&self->message_in, 0) == ESP_OK) {
+ if (self->message_in.extd && self->extended) {
+ self->pending = true;
+ }
+ if (!self->message_in.extd && self->standard) {
+ self->pending = true;
+ }
+ }
+ return self->pending;
+}
+
+mp_obj_t common_hal_canio_listener_receive(canio_listener_obj_t *self) {
+ if (!common_hal_canio_listener_in_waiting(self)) {
+ uint64_t deadline = supervisor_ticks_ms64() + self->timeout_ms;
+ do {
+ if (supervisor_ticks_ms64() > deadline) {
+ return NULL;
+ }
+ } while (!common_hal_canio_listener_in_waiting(self));
+ }
+
+ bool rtr = self->message_in.rtr;
+
+ int dlc = self->message_in.data_length_code;
+ canio_message_obj_t *message = m_new_obj(canio_message_obj_t);
+ message->base.type = rtr ? &canio_remote_transmission_request_type : &canio_message_type;
+ message->extended = self->message_in.extd;
+ message->id = self->message_in.identifier;
+ message->size = dlc;
+
+ if (!rtr) {
+ MP_STATIC_ASSERT(sizeof(self->message_in.data) == sizeof(message->data));
+ memcpy(message->data, self->message_in.data, sizeof(message->data));
+ }
+
+ self->pending = false;
+
+ return message;
+}
+
+void common_hal_canio_listener_deinit(canio_listener_obj_t *self) {
+ if (self->can) {
+ self->can->fifo_in_use = false;
+ }
+ self->can = NULL;
+}
diff --git a/ports/esp32s2/common-hal/canio/Listener.h b/ports/esp32s2/common-hal/canio/Listener.h
new file mode 100644
index 000000000..d24900e43
--- /dev/null
+++ b/ports/esp32s2/common-hal/canio/Listener.h
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#pragma once
+
+#include "common-hal/canio/CAN.h"
+#include "shared-module/canio/Match.h"
+
+typedef struct canio_listener_obj {
+ mp_obj_base_t base;
+ canio_can_obj_t *can;
+ bool extended:1;
+ bool standard:1;
+ bool pending:1;
+ twai_message_t message_in;
+ uint32_t timeout_ms;
+} canio_listener_obj_t;
diff --git a/ports/esp32s2/common-hal/canio/__init__.c b/ports/esp32s2/common-hal/canio/__init__.c
new file mode 100644
index 000000000..7932bfc2d
--- /dev/null
+++ b/ports/esp32s2/common-hal/canio/__init__.c
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
diff --git a/ports/esp32s2/common-hal/canio/__init__.h b/ports/esp32s2/common-hal/canio/__init__.h
new file mode 100644
index 000000000..20b6638cd
--- /dev/null
+++ b/ports/esp32s2/common-hal/canio/__init__.h
@@ -0,0 +1,27 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#pragma once
diff --git a/ports/esp32s2/common-hal/countio/Counter.c b/ports/esp32s2/common-hal/countio/Counter.c
new file mode 100644
index 000000000..fe52d93ad
--- /dev/null
+++ b/ports/esp32s2/common-hal/countio/Counter.c
@@ -0,0 +1,84 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "common-hal/countio/Counter.h"
+#include "common-hal/microcontroller/Pin.h"
+
+#include "py/runtime.h"
+#include "supervisor/shared/translate.h"
+
+void common_hal_countio_counter_construct(countio_counter_obj_t* self,
+ const mcu_pin_obj_t* pin) {
+ claim_pin(pin);
+
+ // Prepare configuration for the PCNT unit
+ const pcnt_config_t pcnt_config = {
+ // Set PCNT input signal and control GPIOs
+ .pulse_gpio_num = pin->number,
+ .ctrl_gpio_num = PCNT_PIN_NOT_USED,
+ .channel = PCNT_CHANNEL_0,
+ // What to do on the positive / negative edge of pulse input?
+ .pos_mode = PCNT_COUNT_INC, // Count up on the positive edge
+ .neg_mode = PCNT_COUNT_DIS, // Keep the counter value on the negative edge
+ };
+
+ // Initialize PCNT unit
+ const int8_t unit = peripherals_pcnt_init(pcnt_config);
+ if (unit == -1) {
+ mp_raise_RuntimeError(translate("All PCNT units in use"));
+ }
+
+ self->pin = pin->number;
+ self->unit = (pcnt_unit_t)unit;
+}
+
+bool common_hal_countio_counter_deinited(countio_counter_obj_t* self) {
+ return self->unit == PCNT_UNIT_MAX;
+}
+
+void common_hal_countio_counter_deinit(countio_counter_obj_t* self) {
+ if (common_hal_countio_counter_deinited(self)) {
+ return;
+ }
+ reset_pin_number(self->pin);
+ peripherals_pcnt_deinit(&self->unit);
+}
+
+mp_int_t common_hal_countio_counter_get_count(countio_counter_obj_t* self) {
+ int16_t count;
+ pcnt_get_counter_value(self->unit, &count);
+ return count+self->count;
+}
+
+void common_hal_countio_counter_set_count(countio_counter_obj_t* self,
+ mp_int_t new_count) {
+ self->count = new_count;
+ pcnt_counter_clear(self->unit);
+}
+
+void common_hal_countio_counter_reset(countio_counter_obj_t* self) {
+ common_hal_countio_counter_set_count(self, 0);
+}
diff --git a/ports/esp32s2/common-hal/countio/Counter.h b/ports/esp32s2/common-hal/countio/Counter.h
new file mode 100644
index 000000000..20fe5b83e
--- /dev/null
+++ b/ports/esp32s2/common-hal/countio/Counter.h
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_COUNTIO_COUNTER_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_COUNTIO_COUNTER_H
+
+#include "py/obj.h"
+#include "peripherals/pcnt.h"
+
+typedef struct {
+ mp_obj_base_t base;
+ uint8_t pin;
+ mp_int_t count;
+ pcnt_unit_t unit;
+} countio_counter_obj_t;
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_COUNTIO_COUNT_H
diff --git a/ports/esp32s2/common-hal/countio/__init__.c b/ports/esp32s2/common-hal/countio/__init__.c
new file mode 100644
index 000000000..b95b20d15
--- /dev/null
+++ b/ports/esp32s2/common-hal/countio/__init__.c
@@ -0,0 +1 @@
+//No countio module functions
diff --git a/ports/esp32s2/common-hal/digitalio/DigitalInOut.c b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c
index fb3ee10ad..152db1e71 100644
--- a/ports/esp32s2/common-hal/digitalio/DigitalInOut.c
+++ b/ports/esp32s2/common-hal/digitalio/DigitalInOut.c
@@ -28,9 +28,9 @@
#include "py/runtime.h"
#include "supervisor/shared/translate.h"
-#include "driver/gpio.h"
+#include "components/driver/include/driver/gpio.h"
-#include "esp-idf/components/soc/include/hal/gpio_hal.h"
+#include "components/hal/include/hal/gpio_hal.h"
void common_hal_digitalio_digitalinout_never_reset(
digitalio_digitalinout_obj_t *self) {
@@ -42,6 +42,16 @@ digitalinout_result_t common_hal_digitalio_digitalinout_construct(
claim_pin(pin);
self->pin = pin;
+ gpio_config_t config;
+ config.pin_bit_mask = 1ull << pin->number;
+ config.mode = GPIO_MODE_INPUT;
+ config.pull_up_en = GPIO_PULLUP_DISABLE;
+ config.pull_down_en = GPIO_PULLDOWN_DISABLE;
+ config.intr_type = GPIO_INTR_DISABLE;
+ if (gpio_config(&config) != ESP_OK) {
+ return DIGITALINOUT_PIN_BUSY;
+ }
+
return DIGITALINOUT_OK;
}
@@ -67,7 +77,7 @@ void common_hal_digitalio_digitalinout_switch_to_input(
digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_output(
digitalio_digitalinout_obj_t *self, bool value,
digitalio_drive_mode_t drive_mode) {
- gpio_set_level(self->pin->number, value);
+ common_hal_digitalio_digitalinout_set_value(self, value);
return common_hal_digitalio_digitalinout_set_drive_mode(self, drive_mode);
}
@@ -82,12 +92,16 @@ digitalio_direction_t common_hal_digitalio_digitalinout_get_direction(
void common_hal_digitalio_digitalinout_set_value(
digitalio_digitalinout_obj_t *self, bool value) {
+ self->output_value = value;
gpio_set_level(self->pin->number, value);
}
bool common_hal_digitalio_digitalinout_get_value(
digitalio_digitalinout_obj_t *self) {
- return gpio_get_level(self->pin->number) == 1;
+ if (common_hal_digitalio_digitalinout_get_direction(self) == DIRECTION_INPUT) {
+ return gpio_get_level(self->pin->number) == 1;
+ }
+ return self->output_value;
}
digitalinout_result_t common_hal_digitalio_digitalinout_set_drive_mode(
diff --git a/ports/esp32s2/common-hal/digitalio/DigitalInOut.h b/ports/esp32s2/common-hal/digitalio/DigitalInOut.h
index 6877f1741..c09c5502d 100644
--- a/ports/esp32s2/common-hal/digitalio/DigitalInOut.h
+++ b/ports/esp32s2/common-hal/digitalio/DigitalInOut.h
@@ -33,6 +33,7 @@
typedef struct {
mp_obj_base_t base;
const mcu_pin_obj_t *pin;
+ bool output_value;
} digitalio_digitalinout_obj_t;
#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_DIGITALIO_DIGITALINOUT_H
diff --git a/ports/esp32s2/common-hal/microcontroller/Pin.c b/ports/esp32s2/common-hal/microcontroller/Pin.c
index 546dca848..3c2611efe 100644
--- a/ports/esp32s2/common-hal/microcontroller/Pin.c
+++ b/ports/esp32s2/common-hal/microcontroller/Pin.c
@@ -31,8 +31,8 @@
#include "py/mphal.h"
-#include "esp-idf/components/driver/include/driver/gpio.h"
-#include "esp-idf/components/soc/include/hal/gpio_hal.h"
+#include "components/driver/include/driver/gpio.h"
+#include "components/hal/include/hal/gpio_hal.h"
#ifdef MICROPY_HW_NEOPIXEL
bool neopixel_in_use;
diff --git a/ports/esp32s2/common-hal/microcontroller/Processor.c b/ports/esp32s2/common-hal/microcontroller/Processor.c
index c64fa010e..b81521601 100644
--- a/ports/esp32s2/common-hal/microcontroller/Processor.c
+++ b/ports/esp32s2/common-hal/microcontroller/Processor.c
@@ -34,7 +34,7 @@
#include "soc/efuse_reg.h"
-#include "esp-idf/components/driver/esp32s2/include/driver/temp_sensor.h"
+#include "components/driver/esp32s2/include/driver/temp_sensor.h"
float common_hal_mcu_processor_get_temperature(void) {
float tsens_out;
diff --git a/ports/esp32s2/common-hal/neopixel_write/__init__.c b/ports/esp32s2/common-hal/neopixel_write/__init__.c
index 193d754f4..63d50bf14 100644
--- a/ports/esp32s2/common-hal/neopixel_write/__init__.c
+++ b/ports/esp32s2/common-hal/neopixel_write/__init__.c
@@ -43,8 +43,8 @@
#include "py/mphal.h"
#include "py/runtime.h"
#include "shared-bindings/neopixel_write/__init__.h"
-#include "driver/rmt.h"
-#include "rmt.h"
+#include "components/driver/include/driver/rmt.h"
+#include "peripherals/rmt.h"
#define WS2812_T0H_NS (350)
#define WS2812_T0L_NS (1000)
@@ -125,4 +125,6 @@ void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout
// Free channel again
esp32s2_peripherals_free_rmt(config.channel);
+ // Swap pin back to GPIO mode
+ gpio_set_direction(digitalinout->pin->number, GPIO_MODE_OUTPUT);
}
diff --git a/ports/esp32s2/common-hal/pulseio/PulseIn.h b/ports/esp32s2/common-hal/pulseio/PulseIn.h
index 97d70d4b0..289605ed0 100644
--- a/ports/esp32s2/common-hal/pulseio/PulseIn.h
+++ b/ports/esp32s2/common-hal/pulseio/PulseIn.h
@@ -30,8 +30,8 @@
#include "common-hal/microcontroller/Pin.h"
#include "py/obj.h"
-#include "driver/rmt.h"
-#include "rmt.h"
+#include "components/driver/include/driver/rmt.h"
+#include "peripherals/rmt.h"
typedef struct {
mp_obj_base_t base;
diff --git a/ports/esp32s2/common-hal/pulseio/PulseOut.h b/ports/esp32s2/common-hal/pulseio/PulseOut.h
index 629591af6..c3952452f 100644
--- a/ports/esp32s2/common-hal/pulseio/PulseOut.h
+++ b/ports/esp32s2/common-hal/pulseio/PulseOut.h
@@ -28,8 +28,8 @@
#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PULSEIO_PULSEOUT_H
#include "common-hal/microcontroller/Pin.h"
-#include "driver/rmt.h"
-#include "rmt.h"
+#include "components/driver/include/driver/rmt.h"
+#include "peripherals/rmt.h"
#include "py/obj.h"
diff --git a/ports/esp32s2/common-hal/pwmio/PWMOut.c b/ports/esp32s2/common-hal/pwmio/PWMOut.c
index d745b7789..e1fdd4760 100644
--- a/ports/esp32s2/common-hal/pwmio/PWMOut.c
+++ b/ports/esp32s2/common-hal/pwmio/PWMOut.c
@@ -28,7 +28,7 @@
#include "common-hal/pwmio/PWMOut.h"
#include "shared-bindings/pwmio/PWMOut.h"
#include "py/runtime.h"
-#include "driver/ledc.h"
+#include "components/driver/include/driver/ledc.h"
#define INDEX_EMPTY 0xFF
diff --git a/ports/esp32s2/common-hal/pwmio/PWMOut.h b/ports/esp32s2/common-hal/pwmio/PWMOut.h
index c489e5a27..9055dee8e 100644
--- a/ports/esp32s2/common-hal/pwmio/PWMOut.h
+++ b/ports/esp32s2/common-hal/pwmio/PWMOut.h
@@ -28,7 +28,7 @@
#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_PWMIO_PWMOUT_H
#include "common-hal/microcontroller/Pin.h"
-#include "driver/ledc.h"
+#include "components/driver/include/driver/ledc.h"
typedef struct {
mp_obj_base_t base;
diff --git a/ports/esp32s2/common-hal/rtc/RTC.c b/ports/esp32s2/common-hal/rtc/RTC.c
new file mode 100644
index 000000000..4d8713639
--- /dev/null
+++ b/ports/esp32s2/common-hal/rtc/RTC.c
@@ -0,0 +1,52 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright 2019 Sony Semiconductor Solutions Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <sys/time.h>
+
+#include "py/obj.h"
+#include "py/runtime.h"
+#include "components/soc/soc/include/soc/rtc_periph.h"
+#include "shared-bindings/rtc/RTC.h"
+
+void common_hal_rtc_get_time(timeutils_struct_time_t *tm) {
+ struct timeval tv_now;
+ gettimeofday(&tv_now, NULL);
+ timeutils_seconds_since_2000_to_struct_time(tv_now.tv_sec, tm);
+}
+
+void common_hal_rtc_set_time(timeutils_struct_time_t *tm) {
+ struct timeval tv_now = {0};
+ tv_now.tv_sec = timeutils_seconds_since_2000(tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec);
+ settimeofday(&tv_now, NULL);
+}
+
+int common_hal_rtc_get_calibration(void) {
+ return 0;
+}
+
+void common_hal_rtc_set_calibration(int calibration) {
+ mp_raise_NotImplementedError(translate("RTC calibration is not supported on this board"));
+}
diff --git a/ports/esp32s2/common-hal/rtc/RTC.h b/ports/esp32s2/common-hal/rtc/RTC.h
new file mode 100644
index 000000000..e51f1f784
--- /dev/null
+++ b/ports/esp32s2/common-hal/rtc/RTC.h
@@ -0,0 +1,34 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018 Noralf Trønnes
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_RTC_RTC_H
+#define MICROPY_INCLUDED_NRF_COMMON_HAL_RTC_RTC_H
+
+extern void rtc_init(void);
+extern void rtc_reset(void);
+extern void common_hal_rtc_init(void);
+
+#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_RTC_RTC_H
diff --git a/ports/esp32s2/common-hal/rtc/__init__.c b/ports/esp32s2/common-hal/rtc/__init__.c
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/ports/esp32s2/common-hal/rtc/__init__.c
diff --git a/ports/esp32s2/common-hal/socketpool/Socket.c b/ports/esp32s2/common-hal/socketpool/Socket.c
index 0a994c604..750415dc7 100644
--- a/ports/esp32s2/common-hal/socketpool/Socket.c
+++ b/ports/esp32s2/common-hal/socketpool/Socket.c
@@ -79,15 +79,15 @@ mp_uint_t common_hal_socketpool_socket_send(socketpool_socket_obj_t* self, const
mp_uint_t common_hal_socketpool_socket_recv_into(socketpool_socket_obj_t* self, const uint8_t* buf, mp_uint_t len) {
size_t received = 0;
- ssize_t last_read = 1;
+ int status = 0;
uint64_t start_ticks = supervisor_ticks_ms64();
int sockfd;
esp_err_t err = esp_tls_get_conn_sockfd(self->tcp, &sockfd);
if (err != ESP_OK) {
mp_raise_OSError(MP_EBADF);
}
- while (received < len &&
- last_read > 0 &&
+ while (received == 0 &&
+ status >= 0 &&
(self->timeout_ms == 0 || supervisor_ticks_ms64() - start_ticks <= self->timeout_ms) &&
!mp_hal_is_interrupted()) {
RUN_BACKGROUND_TASKS;
@@ -95,27 +95,25 @@ mp_uint_t common_hal_socketpool_socket_recv_into(socketpool_socket_obj_t* self,
if (available == 0) {
// This reads the raw socket buffer and is used for non-TLS connections
// and between encrypted TLS blocks.
- int status = lwip_ioctl(sockfd, FIONREAD, &available);
- if (status < 0) {
- last_read = status;
- break;
- }
+ status = lwip_ioctl(sockfd, FIONREAD, &available);
}
size_t remaining = len - received;
if (available > remaining) {
available = remaining;
}
if (available > 0) {
- last_read = esp_tls_conn_read(self->tcp, (void*) buf + received, available);
- received += last_read;
+ status = esp_tls_conn_read(self->tcp, (void*) buf + received, available);
+ if (status > 0) {
+ received += status;
+ }
}
}
- if (last_read == 0) {
+ if (received == 0) {
// socket closed
common_hal_socketpool_socket_close(self);
}
- if (last_read < 0) {
+ if (status < 0) {
mp_raise_BrokenPipeError();
}
return received;
diff --git a/ports/esp32s2/common-hal/socketpool/Socket.h b/ports/esp32s2/common-hal/socketpool/Socket.h
index c23dd171c..62b5ded58 100644
--- a/ports/esp32s2/common-hal/socketpool/Socket.h
+++ b/ports/esp32s2/common-hal/socketpool/Socket.h
@@ -32,7 +32,7 @@
#include "common-hal/socketpool/SocketPool.h"
#include "common-hal/ssl/SSLContext.h"
-#include "esp-idf/components/esp-tls/esp_tls.h"
+#include "components/esp-tls/esp_tls.h"
typedef struct {
mp_obj_base_t base;
diff --git a/ports/esp32s2/common-hal/socketpool/SocketPool.c b/ports/esp32s2/common-hal/socketpool/SocketPool.c
index 4a07f21c4..1d4d04b03 100644
--- a/ports/esp32s2/common-hal/socketpool/SocketPool.c
+++ b/ports/esp32s2/common-hal/socketpool/SocketPool.c
@@ -29,7 +29,7 @@
#include "py/runtime.h"
#include "shared-bindings/wifi/__init__.h"
-#include "esp-idf/components/lwip/lwip/src/include/lwip/netdb.h"
+#include "components/lwip/lwip/src/include/lwip/netdb.h"
#include "bindings/espidf/__init__.h"
diff --git a/ports/esp32s2/common-hal/ssl/SSLContext.h b/ports/esp32s2/common-hal/ssl/SSLContext.h
index 41d199f08..e359ac0de 100644
--- a/ports/esp32s2/common-hal/ssl/SSLContext.h
+++ b/ports/esp32s2/common-hal/ssl/SSLContext.h
@@ -29,7 +29,7 @@
#include "py/obj.h"
-#include "esp-idf/components/esp-tls/esp_tls.h"
+#include "components/esp-tls/esp_tls.h"
typedef struct {
mp_obj_base_t base;
diff --git a/ports/esp32s2/common-hal/ssl/__init__.c b/ports/esp32s2/common-hal/ssl/__init__.c
index a105e5362..8d386d0c3 100644
--- a/ports/esp32s2/common-hal/ssl/__init__.c
+++ b/ports/esp32s2/common-hal/ssl/__init__.c
@@ -26,7 +26,7 @@
#include "shared-bindings/ssl/SSLContext.h"
-#include "esp-idf/components/mbedtls/esp_crt_bundle/include/esp_crt_bundle.h"
+#include "components/mbedtls/esp_crt_bundle/include/esp_crt_bundle.h"
void common_hal_ssl_create_default_context(ssl_sslcontext_obj_t* self) {
memset(&self->ssl_config, 0, sizeof(esp_tls_cfg_t));
diff --git a/ports/esp32s2/common-hal/touchio/TouchIn.c b/ports/esp32s2/common-hal/touchio/TouchIn.c
new file mode 100644
index 000000000..3e3e4b551
--- /dev/null
+++ b/ports/esp32s2/common-hal/touchio/TouchIn.c
@@ -0,0 +1,96 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "shared-bindings/touchio/TouchIn.h"
+#include "py/runtime.h"
+
+#include "driver/touch_pad.h"
+
+static uint16_t get_raw_reading(touchio_touchin_obj_t *self) {
+ uint32_t touch_value;
+ touch_pad_read_raw_data((touch_pad_t)self->pin->touch_channel, &touch_value);
+ if (touch_value > UINT16_MAX) {
+ return UINT16_MAX;
+ }
+ return touch_value;
+}
+
+void common_hal_touchio_touchin_construct(touchio_touchin_obj_t* self,
+ const mcu_pin_obj_t *pin) {
+ if (pin->touch_channel == TOUCH_PAD_MAX) {
+ mp_raise_ValueError(translate("Invalid pin"));
+ }
+ claim_pin(pin);
+
+ touch_pad_init();
+ touch_pad_config((touch_pad_t)pin->touch_channel);
+
+ touch_pad_set_fsm_mode(TOUCH_FSM_MODE_TIMER);
+ touch_pad_fsm_start();
+
+ // wait for "raw data" to reset
+ mp_hal_delay_ms(10);
+
+ // Initial values for pins will vary, depending on what peripherals the pins
+ // share on-chip.
+
+ // Set a "touched" threshold not too far above the initial value.
+ // For simple finger touch, the values may vary as much as a factor of two,
+ // but for touches using fruit or other objects, the difference is much less.
+
+ self->pin = pin;
+ self->threshold = get_raw_reading(self) + 100;
+}
+
+bool common_hal_touchio_touchin_deinited(touchio_touchin_obj_t* self) {
+ return self->pin == NULL;
+}
+
+void common_hal_touchio_touchin_deinit(touchio_touchin_obj_t* self) {
+ if (common_hal_touchio_touchin_deinited(self)) {
+ return;
+ }
+ touch_pad_deinit();
+ reset_pin_number(self->pin->touch_channel);
+ self->pin = NULL;
+}
+
+bool common_hal_touchio_touchin_get_value(touchio_touchin_obj_t *self) {
+ uint16_t reading = get_raw_reading(self);
+ return reading > self->threshold;
+}
+
+uint16_t common_hal_touchio_touchin_get_raw_value(touchio_touchin_obj_t *self) {
+ return get_raw_reading(self);
+}
+
+uint16_t common_hal_touchio_touchin_get_threshold(touchio_touchin_obj_t *self) {
+ return self->threshold;
+}
+
+void common_hal_touchio_touchin_set_threshold(touchio_touchin_obj_t *self, uint16_t new_threshold) {
+ self->threshold = new_threshold;
+}
diff --git a/ports/esp32s2/common-hal/touchio/TouchIn.h b/ports/esp32s2/common-hal/touchio/TouchIn.h
new file mode 100644
index 000000000..585bb37bf
--- /dev/null
+++ b/ports/esp32s2/common-hal/touchio/TouchIn.h
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2016 Scott Shawcroft
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_TOUCHIO_TOUCHIN_H
+#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_TOUCHIO_TOUCHIN_H
+
+#include "common-hal/microcontroller/Pin.h"
+
+#include "py/obj.h"
+
+typedef struct {
+ mp_obj_base_t base;
+ const mcu_pin_obj_t * pin;
+ uint16_t threshold;
+} touchio_touchin_obj_t;
+
+void touchin_reset(void);
+
+#endif // MICROPY_INCLUDED_ESP32S2_COMMON_HAL_TOUCHIO_TOUCHIN_H
diff --git a/ports/esp32s2/common-hal/touchio/__init__.c b/ports/esp32s2/common-hal/touchio/__init__.c
new file mode 100644
index 000000000..d2290447c
--- /dev/null
+++ b/ports/esp32s2/common-hal/touchio/__init__.c
@@ -0,0 +1 @@
+// No touchio module functions.
diff --git a/ports/esp32s2/common-hal/wifi/Network.c b/ports/esp32s2/common-hal/wifi/Network.c
index 0320e8f92..e90b3d552 100644
--- a/ports/esp32s2/common-hal/wifi/Network.c
+++ b/ports/esp32s2/common-hal/wifi/Network.c
@@ -35,6 +35,12 @@ mp_obj_t common_hal_wifi_network_get_ssid(wifi_network_obj_t *self) {
return mp_obj_new_str(cstr, strlen(cstr));
}
+#define MAC_ADDRESS_LENGTH 6
+
+mp_obj_t common_hal_wifi_network_get_bssid(wifi_network_obj_t *self) {
+ return mp_obj_new_bytes(self->record.bssid, MAC_ADDRESS_LENGTH);
+}
+
mp_obj_t common_hal_wifi_network_get_rssi(wifi_network_obj_t *self) {
return mp_obj_new_int(self->record.rssi);
}
diff --git a/ports/esp32s2/common-hal/wifi/Network.h b/ports/esp32s2/common-hal/wifi/Network.h
index ab75fcafe..9345bb457 100644
--- a/ports/esp32s2/common-hal/wifi/Network.h
+++ b/ports/esp32s2/common-hal/wifi/Network.h
@@ -29,7 +29,7 @@
#include "py/obj.h"
-#include "esp-idf/components/esp_wifi/include/esp_wifi_types.h"
+#include "components/esp_wifi/include/esp_wifi_types.h"
typedef struct {
mp_obj_base_t base;
diff --git a/ports/esp32s2/common-hal/wifi/Radio.c b/ports/esp32s2/common-hal/wifi/Radio.c
index 3c6ab5757..275bae31a 100644
--- a/ports/esp32s2/common-hal/wifi/Radio.c
+++ b/ports/esp32s2/common-hal/wifi/Radio.c
@@ -25,6 +25,7 @@
*/
#include "shared-bindings/wifi/Radio.h"
+#include "shared-bindings/wifi/Network.h"
#include <string.h>
@@ -35,8 +36,10 @@
#include "shared-bindings/wifi/ScannedNetworks.h"
#include "shared-module/ipaddress/__init__.h"
-#include "esp-idf/components/esp_wifi/include/esp_wifi.h"
-#include "esp-idf/components/lwip/include/apps/ping/ping_sock.h"
+#include "components/esp_wifi/include/esp_wifi.h"
+#include "components/lwip/include/apps/ping/ping_sock.h"
+
+#define MAC_ADDRESS_LENGTH 6
static void start_station(wifi_radio_obj_t *self) {
if (self->sta_mode) {
@@ -50,6 +53,8 @@ static void start_station(wifi_radio_obj_t *self) {
}
esp_wifi_set_mode(next_mode);
+ self->sta_mode = 1;
+
esp_wifi_set_config(WIFI_MODE_STA, &self->sta_config);
}
@@ -73,8 +78,6 @@ void common_hal_wifi_radio_set_enabled(wifi_radio_obj_t *self, bool enabled) {
}
}
-#define MAC_ADDRESS_LENGTH 6
-
mp_obj_t common_hal_wifi_radio_get_mac_address(wifi_radio_obj_t *self) {
uint8_t mac[MAC_ADDRESS_LENGTH];
esp_wifi_get_mac(ESP_IF_WIFI_STA, mac);
@@ -104,14 +107,39 @@ void common_hal_wifi_radio_stop_scanning_networks(wifi_radio_obj_t *self) {
self->current_scan = NULL;
}
-wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout) {
+mp_obj_t common_hal_wifi_radio_get_hostname(wifi_radio_obj_t *self) {
+ const char *hostname = NULL;
+ esp_netif_get_hostname(self->netif, &hostname);
+ if (hostname == NULL) {
+ return mp_const_none;
+ }
+ return mp_obj_new_str(hostname, strlen(hostname));
+}
+
+void common_hal_wifi_radio_set_hostname(wifi_radio_obj_t *self, const char *hostname) {
+ esp_netif_set_hostname(self->netif, hostname);
+}
+
+wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t* ssid, size_t ssid_len, uint8_t* password, size_t password_len, uint8_t channel, mp_float_t timeout, uint8_t* bssid, size_t bssid_len) {
// check enabled
+ start_station(self);
+
wifi_config_t* config = &self->sta_config;
memcpy(&config->sta.ssid, ssid, ssid_len);
config->sta.ssid[ssid_len] = 0;
memcpy(&config->sta.password, password, password_len);
config->sta.password[password_len] = 0;
config->sta.channel = channel;
+ // From esp_wifi_types.h:
+ // Generally, station_config.bssid_set needs to be 0; and it needs
+ // to be 1 only when users need to check the MAC address of the AP
+ if (bssid_len > 0){
+ memcpy(&config->sta.bssid, bssid, bssid_len);
+ config->sta.bssid[bssid_len] = 0;
+ config->sta.bssid_set = 1;
+ } else {
+ config->sta.bssid_set = 0;
+ }
esp_wifi_set_config(ESP_IF_WIFI_STA, config);
self->starting_retries = 5;
self->retries_left = 5;
@@ -137,13 +165,66 @@ wifi_radio_error_t common_hal_wifi_radio_connect(wifi_radio_obj_t *self, uint8_t
return WIFI_RADIO_ERROR_NONE;
}
+mp_obj_t common_hal_wifi_radio_get_ap_info(wifi_radio_obj_t *self) {
+ if (!esp_netif_is_netif_up(self->netif)) {
+ return mp_const_none;
+ }
+
+ // Make sure the interface is in STA mode
+ if (!self->sta_mode){
+ return mp_const_none;
+ }
+
+ wifi_network_obj_t *ap_info = m_new_obj(wifi_network_obj_t);
+ ap_info->base.type = &wifi_network_type;
+ // From esp_wifi.h, the possible return values (typos theirs):
+ // ESP_OK: succeed
+ // ESP_ERR_WIFI_CONN: The station interface don't initialized
+ // ESP_ERR_WIFI_NOT_CONNECT: The station is in disconnect status
+ if (esp_wifi_sta_get_ap_info(&self->ap_info.record) != ESP_OK){
+ return mp_const_none;
+ } else {
+ memcpy(&ap_info->record, &self->ap_info.record, sizeof(wifi_ap_record_t));
+ return MP_OBJ_FROM_PTR(ap_info);
+ }
+}
+
+mp_obj_t common_hal_wifi_radio_get_ipv4_gateway(wifi_radio_obj_t *self) {
+ if (!esp_netif_is_netif_up(self->netif)) {
+ return mp_const_none;
+ }
+ esp_netif_get_ip_info(self->netif, &self->ip_info);
+ return common_hal_ipaddress_new_ipv4address(self->ip_info.gw.addr);
+}
+
+mp_obj_t common_hal_wifi_radio_get_ipv4_subnet(wifi_radio_obj_t *self) {
+ if (!esp_netif_is_netif_up(self->netif)) {
+ return mp_const_none;
+ }
+ esp_netif_get_ip_info(self->netif, &self->ip_info);
+ return common_hal_ipaddress_new_ipv4address(self->ip_info.netmask.addr);
+}
+
mp_obj_t common_hal_wifi_radio_get_ipv4_address(wifi_radio_obj_t *self) {
if (!esp_netif_is_netif_up(self->netif)) {
return mp_const_none;
}
- esp_netif_ip_info_t ip_info;
- esp_netif_get_ip_info(self->netif, &ip_info);
- return common_hal_ipaddress_new_ipv4address(ip_info.ip.addr);
+ esp_netif_get_ip_info(self->netif, &self->ip_info);
+ return common_hal_ipaddress_new_ipv4address(self->ip_info.ip.addr);
+}
+
+mp_obj_t common_hal_wifi_radio_get_ipv4_dns(wifi_radio_obj_t *self) {
+ if (!esp_netif_is_netif_up(self->netif)) {
+ return mp_const_none;
+ }
+
+ esp_netif_get_dns_info(self->netif, ESP_NETIF_DNS_MAIN, &self->dns_info);
+
+ // dns_info is of type esp_netif_dns_info_t, which is just ever so slightly
+ // different than esp_netif_ip_info_t used for
+ // common_hal_wifi_radio_get_ipv4_address (includes both ipv4 and 6),
+ // so some extra jumping is required to get to the actual address
+ return common_hal_ipaddress_new_ipv4address(self->dns_info.ip.u_addr.ip4.addr);
}
mp_int_t common_hal_wifi_radio_ping(wifi_radio_obj_t *self, mp_obj_t ip_address, mp_float_t timeout) {
diff --git a/ports/esp32s2/common-hal/wifi/Radio.h b/ports/esp32s2/common-hal/wifi/Radio.h
index 205aef176..c7f484eaf 100644
--- a/ports/esp32s2/common-hal/wifi/Radio.h
+++ b/ports/esp32s2/common-hal/wifi/Radio.h
@@ -29,9 +29,10 @@
#include "py/obj.h"
-#include "esp-idf/components/esp_event/include/esp_event.h"
+#include "components/esp_event/include/esp_event.h"
#include "shared-bindings/wifi/ScannedNetworks.h"
+#include "shared-bindings/wifi/Network.h"
// Event bits for the Radio event group.
#define WIFI_SCAN_DONE_BIT BIT0
@@ -46,6 +47,9 @@ typedef struct {
StaticEventGroup_t event_group;
EventGroupHandle_t event_group_handle;
wifi_config_t sta_config;
+ wifi_network_obj_t ap_info;
+ esp_netif_ip_info_t ip_info;
+ esp_netif_dns_info_t dns_info;
esp_netif_t *netif;
bool started;
bool ap_mode;
diff --git a/ports/esp32s2/common-hal/wifi/ScannedNetworks.c b/ports/esp32s2/common-hal/wifi/ScannedNetworks.c
index 507c6d186..cc733308d 100644
--- a/ports/esp32s2/common-hal/wifi/ScannedNetworks.c
+++ b/ports/esp32s2/common-hal/wifi/ScannedNetworks.c
@@ -37,7 +37,7 @@
#include "shared-bindings/wifi/Radio.h"
#include "shared-bindings/wifi/ScannedNetworks.h"
-#include "esp-idf/components/esp_wifi/include/esp_wifi.h"
+#include "components/esp_wifi/include/esp_wifi.h"
static void wifi_scannednetworks_done(wifi_scannednetworks_obj_t *self) {
self->done = true;
diff --git a/ports/esp32s2/common-hal/wifi/ScannedNetworks.h b/ports/esp32s2/common-hal/wifi/ScannedNetworks.h
index cd57e95f2..36da387f2 100644
--- a/ports/esp32s2/common-hal/wifi/ScannedNetworks.h
+++ b/ports/esp32s2/common-hal/wifi/ScannedNetworks.h
@@ -35,7 +35,7 @@
#include "FreeRTOS.h"
#include "freertos/event_groups.h"
-#include "esp-idf/components/esp_wifi/include/esp_wifi_types.h"
+#include "components/esp_wifi/include/esp_wifi_types.h"
typedef struct {
mp_obj_base_t base;
diff --git a/ports/esp32s2/common-hal/wifi/__init__.c b/ports/esp32s2/common-hal/wifi/__init__.c
index b9ea9da06..833ef0623 100644
--- a/ports/esp32s2/common-hal/wifi/__init__.c
+++ b/ports/esp32s2/common-hal/wifi/__init__.c
@@ -31,13 +31,14 @@
#include "py/runtime.h"
-#include "esp-idf/components/esp_wifi/include/esp_wifi.h"
+#include "components/esp_wifi/include/esp_wifi.h"
-#include "esp-idf/components/heap/include/esp_heap_caps.h"
+#include "components/heap/include/esp_heap_caps.h"
wifi_radio_obj_t common_hal_wifi_radio_obj;
-#include "esp_log.h"
+#include "components/log/include/esp_log.h"
+
static const char* TAG = "wifi";
static void event_handler(void* arg, esp_event_base_t event_base,
@@ -99,6 +100,13 @@ void common_hal_wifi_init(void) {
wifi_radio_obj_t* self = &common_hal_wifi_radio_obj;
self->netif = esp_netif_create_default_wifi_sta();
+ // Even though we just called esp_netif_create_default_wifi_sta,
+ // station mode isn't actually ready for use until esp_wifi_set_mode()
+ // is called and the configuration is loaded via esp_wifi_set_config().
+ // Set both convienence flags to false so it's not forgotten.
+ self->sta_mode = 0;
+ self->ap_mode = 0;
+
self->event_group_handle = xEventGroupCreateStatic(&self->event_group);
ESP_ERROR_CHECK(esp_event_handler_instance_register(WIFI_EVENT,
ESP_EVENT_ANY_ID,
diff --git a/ports/esp32s2/esp-idf b/ports/esp32s2/esp-idf
-Subproject de733cdab556c5713c94ba95078f4024dd56fd8
+Subproject 8bc19ba893e5544d571a753d82b44a84799b94b
diff --git a/ports/esp32s2/esp-idf-config/partitions-16MB.csv b/ports/esp32s2/esp-idf-config/partitions-16MB.csv
new file mode 100644
index 000000000..13ea81bea
--- /dev/null
+++ b/ports/esp32s2/esp-idf-config/partitions-16MB.csv
@@ -0,0 +1,10 @@
+# ESP-IDF Partition Table
+# Name, Type, SubType, Offset, Size, Flags
+# bootloader.bin,, 0x1000, 32K
+# partition table,, 0x8000, 4K
+nvs, data, nvs, 0x9000, 20K,
+otadata, data, ota, 0xe000, 8K,
+ota_0, 0, ota_0, 0x10000, 2048K,
+ota_1, 0, ota_1, 0x210000, 2048K,
+uf2, app, factory,0x410000, 256K,
+user_fs, data, fat, 0x450000, 11968K,
diff --git a/ports/esp32s2/partitions.csv b/ports/esp32s2/esp-idf-config/partitions-4MB.csv
index cf9b3cca8..cf9b3cca8 100644
--- a/ports/esp32s2/partitions.csv
+++ b/ports/esp32s2/esp-idf-config/partitions-4MB.csv
diff --git a/ports/esp32s2/esp-idf-config/partitions-8MB.csv b/ports/esp32s2/esp-idf-config/partitions-8MB.csv
new file mode 100644
index 000000000..f4ba9b60a
--- /dev/null
+++ b/ports/esp32s2/esp-idf-config/partitions-8MB.csv
@@ -0,0 +1,10 @@
+# ESP-IDF Partition Table
+# Name, Type, SubType, Offset, Size, Flags
+# bootloader.bin,, 0x1000, 32K
+# partition table,, 0x8000, 4K
+nvs, data, nvs, 0x9000, 20K,
+otadata, data, ota, 0xe000, 8K,
+ota_0, 0, ota_0, 0x10000, 2048K,
+ota_1, 0, ota_1, 0x210000, 2048K,
+uf2, app, factory,0x410000, 256K,
+user_fs, data, fat, 0x450000, 3776K,
diff --git a/ports/esp32s2/esp-idf-config/sdkconfig-16MB.defaults b/ports/esp32s2/esp-idf-config/sdkconfig-16MB.defaults
new file mode 100644
index 000000000..2299feccd
--- /dev/null
+++ b/ports/esp32s2/esp-idf-config/sdkconfig-16MB.defaults
@@ -0,0 +1,9 @@
+# No newlines in this file so they are preserved in the board sdkconfig.
+# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set
+# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set
+# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set
+# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set
+CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y
+CONFIG_ESPTOOLPY_FLASHSIZE="16MB"
+CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-16MB.csv"
+CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-16MB.csv" \ No newline at end of file
diff --git a/ports/esp32s2/esp-idf-config/sdkconfig-4MB.defaults b/ports/esp32s2/esp-idf-config/sdkconfig-4MB.defaults
new file mode 100644
index 000000000..4da90d1bc
--- /dev/null
+++ b/ports/esp32s2/esp-idf-config/sdkconfig-4MB.defaults
@@ -0,0 +1,9 @@
+# No newlines in this file so they are preserved in the board sdkconfig.
+# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set
+# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set
+CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
+# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set
+# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set
+CONFIG_ESPTOOLPY_FLASHSIZE="4MB"
+CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-4MB.csv"
+CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-4MB.csv" \ No newline at end of file
diff --git a/ports/esp32s2/esp-idf-config/sdkconfig-8MB.defaults b/ports/esp32s2/esp-idf-config/sdkconfig-8MB.defaults
new file mode 100644
index 000000000..af681c5ea
--- /dev/null
+++ b/ports/esp32s2/esp-idf-config/sdkconfig-8MB.defaults
@@ -0,0 +1,9 @@
+# No newlines in this file so they are preserved in the board sdkconfig.
+# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set
+# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set
+# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set
+CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y
+# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set
+CONFIG_ESPTOOLPY_FLASHSIZE="8MB"
+CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-8MB.csv"
+CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-8MB.csv" \ No newline at end of file
diff --git a/ports/esp32s2/esp-idf-config/sdkconfig-debug.defaults b/ports/esp32s2/esp-idf-config/sdkconfig-debug.defaults
new file mode 100644
index 000000000..f45f6ae9f
--- /dev/null
+++ b/ports/esp32s2/esp-idf-config/sdkconfig-debug.defaults
@@ -0,0 +1,13 @@
+# No newlines in this file so they are preserved in the board sdkconfig.
+CONFIG_ESP_ERR_TO_NAME_LOOKUP=y
+CONFIG_ESP_CONSOLE_UART_DEFAULT=y
+# CONFIG_ESP_CONSOLE_USB_CDC is not set
+# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set
+# CONFIG_ESP_CONSOLE_NONE is not set
+CONFIG_ESP_CONSOLE_UART=y
+CONFIG_ESP_CONSOLE_UART_NUM=0
+CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
+CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
+# CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT is not set
+# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
+# CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set \ No newline at end of file
diff --git a/ports/esp32s2/esp-idf-config/sdkconfig-opt.defaults b/ports/esp32s2/esp-idf-config/sdkconfig-opt.defaults
new file mode 100644
index 000000000..af0746bc0
--- /dev/null
+++ b/ports/esp32s2/esp-idf-config/sdkconfig-opt.defaults
@@ -0,0 +1,12 @@
+# No newlines in this file so they are preserved in the board sdkconfig.
+# CONFIG_ESP_ERR_TO_NAME_LOOKUP is not set
+# CONFIG_ESP_CONSOLE_UART_DEFAULT is not set
+# CONFIG_CONSOLE_UART_DEFAULT is not set
+CONFIG_ESP_CONSOLE_UART_NONE=y
+CONFIG_ESP_CONSOLE_NONE=y
+CONFIG_ESP_CONSOLE_UART_NUM=-1
+CONFIG_CONSOLE_UART_NUM=-1
+# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set
+CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT=y
+# CONFIG_ESP32S2_PANIC_PRINT_HALT is not set
+CONFIG_ESP32S2_PANIC_SILENT_REBOOT=y \ No newline at end of file
diff --git a/ports/esp32s2/sdkconfig.defaults b/ports/esp32s2/esp-idf-config/sdkconfig.defaults
index c0a56c143..025b05caa 100644
--- a/ports/esp32s2/sdkconfig.defaults
+++ b/ports/esp32s2/esp-idf-config/sdkconfig.defaults
@@ -88,12 +88,6 @@ CONFIG_ESPTOOLPY_FLASHFREQ_40M=y
# CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set
# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set
CONFIG_ESPTOOLPY_FLASHFREQ="40m"
-# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set
-# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set
-CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
-# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set
-# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set
-CONFIG_ESPTOOLPY_FLASHSIZE="4MB"
CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y
CONFIG_ESPTOOLPY_BEFORE_RESET=y
# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set
@@ -119,8 +113,6 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=115200
# CONFIG_PARTITION_TABLE_SINGLE_APP is not set
# CONFIG_PARTITION_TABLE_TWO_OTA is not set
CONFIG_PARTITION_TABLE_CUSTOM=y
-CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
-CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
CONFIG_PARTITION_TABLE_OFFSET=0x8000
CONFIG_PARTITION_TABLE_MD5=y
# end of Partition Table
@@ -143,6 +135,7 @@ CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y
# CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set
# CONFIG_COMPILER_WARN_WRITE_STRINGS is not set
# CONFIG_COMPILER_DISABLE_GCC8_WARNINGS is not set
+# CONFIG_COMPILER_DUMP_RTL_FILES is not set
# end of Compiler options
#
@@ -272,6 +265,11 @@ CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP=y
# end of Power Management
#
+# ADC-Calibration
+#
+# end of ADC-Calibration
+
+#
# Common ESP-related
#
CONFIG_ESP_ERR_TO_NAME_LOOKUP=y
@@ -340,12 +338,13 @@ CONFIG_ESP_TIMER_IMPL_SYSTIMER=y
#
# Wi-Fi
#
-CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10
-CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32
+CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=4
+CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=8
# CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set
CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y
CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1
-CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32
+CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM=16
+CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=16
# CONFIG_ESP32_WIFI_CSI_ENABLED is not set
CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y
CONFIG_ESP32_WIFI_TX_BA_WIN=6
@@ -409,6 +408,7 @@ CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0
# CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set
CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y
# CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set
+# CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set
CONFIG_FREERTOS_DEBUG_OCDAWARE=y
# end of FreeRTOS
@@ -447,7 +447,7 @@ CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y
# CONFIG_LWIP_L2_TO_L3_COPY is not set
# CONFIG_LWIP_IRAM_OPTIMIZATION is not set
CONFIG_LWIP_TIMERS_ONDEMAND=y
-CONFIG_LWIP_MAX_SOCKETS=10
+CONFIG_LWIP_MAX_SOCKETS=4
# CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set
# CONFIG_LWIP_SO_LINGER is not set
CONFIG_LWIP_SO_REUSE=y
@@ -468,6 +468,9 @@ CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y
# CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set
#
+# CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set
+
+#
# DHCP server
#
CONFIG_LWIP_DHCPS_LEASE_UNIT=60
@@ -482,15 +485,15 @@ CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8
#
# TCP
#
-CONFIG_LWIP_MAX_ACTIVE_TCP=16
-CONFIG_LWIP_MAX_LISTENING_TCP=16
+CONFIG_LWIP_MAX_ACTIVE_TCP=4
+CONFIG_LWIP_MAX_LISTENING_TCP=4
CONFIG_LWIP_TCP_MAXRTX=12
CONFIG_LWIP_TCP_SYNMAXRTX=6
CONFIG_LWIP_TCP_MSS=1440
CONFIG_LWIP_TCP_TMR_INTERVAL=250
CONFIG_LWIP_TCP_MSL=60000
-CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744
-CONFIG_LWIP_TCP_WND_DEFAULT=5744
+CONFIG_LWIP_TCP_SND_BUF_DEFAULT=2880
+CONFIG_LWIP_TCP_WND_DEFAULT=2880
CONFIG_LWIP_TCP_RECVMBOX_SIZE=6
CONFIG_LWIP_TCP_QUEUE_OOSEQ=y
# CONFIG_LWIP_TCP_SACK_OUT is not set
@@ -513,6 +516,8 @@ CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y
# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set
CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF
# CONFIG_LWIP_PPP_SUPPORT is not set
+CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3
+CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5
# CONFIG_LWIP_SLIP_SUPPORT is not set
#
@@ -560,8 +565,10 @@ CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y
# CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set
CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y
CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384
-CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096
-# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set
+CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=2048
+CONFIG_MBEDTLS_DYNAMIC_BUFFER=y
+CONFIG_MBEDTLS_DYNAMIC_FREE_PEER_CERT=y
+CONFIG_MBEDTLS_DYNAMIC_FREE_CONFIG_DATA=y
# CONFIG_MBEDTLS_DEBUG is not set
#
@@ -714,6 +721,7 @@ CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y
CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20
CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1
CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192
+# CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set
#
# Auto-detect flash chips
@@ -832,8 +840,8 @@ CONFIG_TCP_MAXRTX=12
CONFIG_TCP_SYNMAXRTX=6
CONFIG_TCP_MSS=1440
CONFIG_TCP_MSL=60000
-CONFIG_TCP_SND_BUF_DEFAULT=5744
-CONFIG_TCP_WND_DEFAULT=5744
+CONFIG_TCP_SND_BUF_DEFAULT=2880
+CONFIG_TCP_WND_DEFAULT=2880
CONFIG_TCP_RECVMBOX_SIZE=6
CONFIG_TCP_QUEUE_OOSEQ=y
# CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set
diff --git a/ports/esp32s2/mpconfigport.h b/ports/esp32s2/mpconfigport.h
index c06e63439..cec8dd35d 100644
--- a/ports/esp32s2/mpconfigport.h
+++ b/ports/esp32s2/mpconfigport.h
@@ -31,8 +31,8 @@
#define CIRCUITPY_INTERNAL_NVM_SIZE (0)
#define MICROPY_NLR_THUMB (0)
-#define MICROPY_PY_UJSON (1)
-#define MICROPY_USE_INTERNAL_PRINTF (0)
+#define MICROPY_PY_UJSON (1)
+#define MICROPY_USE_INTERNAL_PRINTF (0)
#include "py/circuitpy_mpconfig.h"
diff --git a/ports/esp32s2/mpconfigport.mk b/ports/esp32s2/mpconfigport.mk
index ee98ce1f4..bdb25a87b 100644
--- a/ports/esp32s2/mpconfigport.mk
+++ b/ports/esp32s2/mpconfigport.mk
@@ -14,18 +14,21 @@ LONGINT_IMPL = MPZ
# These modules are implemented in ports/<port>/common-hal:
CIRCUITPY_FULL_BUILD = 1
-CIRCUITPY_ANALOGIO = 0
CIRCUITPY_AUDIOBUSIO = 0
CIRCUITPY_AUDIOIO = 0
-CIRCUITPY_COUNTIO = 0
+CIRCUITPY_CANIO = 1
+CIRCUITPY_COUNTIO = 1
CIRCUITPY_FREQUENCYIO = 0
CIRCUITPY_I2CPERIPHERAL = 0
CIRCUITPY_ROTARYIO = 0
-CIRCUITPY_RTC = 0
CIRCUITPY_NVM = 0
# We don't have enough endpoints to include MIDI.
CIRCUITPY_USB_MIDI = 0
CIRCUITPY_WIFI = 1
CIRCUITPY_ESPIDF = 1
+ifndef CIRCUITPY_TOUCHIO_USE_NATIVE
+CIRCUITPY_TOUCHIO_USE_NATIVE = 1
+endif
+
CIRCUITPY_MODULE ?= none
diff --git a/ports/esp32s2/mphalport.c b/ports/esp32s2/mphalport.c
index e1662a6ce..9b4c4bc5e 100644
--- a/ports/esp32s2/mphalport.c
+++ b/ports/esp32s2/mphalport.c
@@ -31,8 +31,8 @@
#include "py/mpstate.h"
#include "py/gc.h"
-#include "esp-idf/components/xtensa/include/esp_debug_helpers.h"
-#include "esp-idf/components/esp_rom/include/esp32s2/rom/ets_sys.h"
+#include "components/xtensa/include/esp_debug_helpers.h"
+#include "components/esp_rom/include/esp32s2/rom/ets_sys.h"
void mp_hal_delay_us(mp_uint_t delay) {
ets_delay_us(delay);
diff --git a/ports/esp32s2/peripherals/pcnt.c b/ports/esp32s2/peripherals/pcnt.c
new file mode 100644
index 000000000..555a0ec1d
--- /dev/null
+++ b/ports/esp32s2/peripherals/pcnt.c
@@ -0,0 +1,66 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "peripherals/pcnt.h"
+
+#define PCNT_UNIT_ACTIVE 1
+#define PCNT_UNIT_INACTIVE 0
+
+static uint8_t pcnt_state[4];
+
+int peripherals_pcnt_init(pcnt_config_t pcnt_config) {
+ // Look for available pcnt unit
+ for (uint8_t i = 0; i<=3; i++) {
+ if (pcnt_state[i] == PCNT_UNIT_INACTIVE) {
+ pcnt_config.unit = (pcnt_unit_t)i;
+ pcnt_state[i] = PCNT_UNIT_ACTIVE;
+ break;
+ } else if (i == 3) {
+ return -1;
+ }
+ }
+
+ // Initialize PCNT unit
+ pcnt_unit_config(&pcnt_config);
+
+ // Configure and enable the input filter
+ pcnt_set_filter_value(pcnt_config.unit, 100);
+ pcnt_filter_enable(pcnt_config.unit);
+
+ // Initialize PCNT's counter
+ pcnt_counter_pause(pcnt_config.unit);
+ pcnt_counter_clear(pcnt_config.unit);
+
+ // Everything is set up, now go to counting
+ pcnt_counter_resume(pcnt_config.unit);
+
+ return pcnt_config.unit;
+}
+
+void peripherals_pcnt_deinit(pcnt_unit_t* unit) {
+ pcnt_state[*unit] = PCNT_UNIT_INACTIVE;
+ *unit = PCNT_UNIT_MAX;
+}
diff --git a/ports/esp32s2/peripherals/pcnt.h b/ports/esp32s2/peripherals/pcnt.h
new file mode 100644
index 000000000..abed80fd0
--- /dev/null
+++ b/ports/esp32s2/peripherals/pcnt.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 microDev
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H
+#define MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H
+
+#include "driver/pcnt.h"
+
+extern int peripherals_pcnt_init(pcnt_config_t pcnt_config);
+extern void peripherals_pcnt_deinit(pcnt_unit_t* unit);
+
+#endif // MICROPY_INCLUDED_ESP32S2_PERIPHERALS_PCNT_HANDLER_H
diff --git a/ports/esp32s2/peripherals/pins.c b/ports/esp32s2/peripherals/pins.c
index 34fd6483e..0d3d89ad5 100755
--- a/ports/esp32s2/peripherals/pins.c
+++ b/ports/esp32s2/peripherals/pins.c
@@ -26,56 +26,61 @@
#include "peripherals/pins.h"
-#define NO_ADC 0xff
+#define NO_ADC 0
+#define NO_ADC_CHANNEL ADC_CHANNEL_MAX
+
+#define NO_TOUCH_CHANNEL TOUCH_PAD_MAX
// This macro is used to simplify pin definition in boards/<board>/pins.c
-#define PIN(p_name, p_number) \
+#define PIN(p_name, p_number, p_adc_index, p_adc_channel, p_touch_channel) \
const mcu_pin_obj_t pin_## p_name = { \
PIN_PREFIX_VALUES \
.number = p_number, \
+ .adc_index = p_adc_index, \
+ .adc_channel = p_adc_channel, \
+ .touch_channel = p_touch_channel, \
}
-PIN(GPIO0, 0);
-PIN(GPIO1, 1);
-PIN(GPIO2, 2);
-PIN(GPIO3, 3);
-PIN(GPIO4, 4);
-PIN(GPIO5, 5);
-PIN(GPIO6, 6);
-PIN(GPIO7, 7);
-PIN(GPIO8, 8);
-PIN(GPIO9, 9);
-PIN(GPIO10, 10);
-PIN(GPIO11, 11);
-PIN(GPIO12, 12);
-PIN(GPIO13, 13);
-PIN(GPIO14, 14);
-PIN(GPIO15, 15);
-PIN(GPIO16, 16);
-PIN(GPIO17, 17);
-PIN(GPIO18, 18);
-
-PIN(GPIO19, 19);
-PIN(GPIO20, 20);
-PIN(GPIO21, 21);
-PIN(GPIO26, 26);
-PIN(GPIO27, 27);
-PIN(GPIO28, 28);
-PIN(GPIO29, 29);
-PIN(GPIO30, 30);
-PIN(GPIO31, 31);
-PIN(GPIO32, 32);
-PIN(GPIO33, 33);
-PIN(GPIO34, 34);
-PIN(GPIO35, 35);
-PIN(GPIO36, 36);
-PIN(GPIO37, 37);
-PIN(GPIO38, 38);
-PIN(GPIO39, 39);
-PIN(GPIO40, 40);
-PIN(GPIO41, 41);
-PIN(GPIO42, 42);
-PIN(GPIO43, 43);
-PIN(GPIO44, 44);
-PIN(GPIO45, 45);
-PIN(GPIO46, 46);
+PIN(GPIO0, 0, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO1, 1, ADC_UNIT_1, ADC_CHANNEL_0, TOUCH_PAD_NUM1);
+PIN(GPIO2, 2, ADC_UNIT_1, ADC_CHANNEL_1, TOUCH_PAD_NUM2);
+PIN(GPIO3, 3, ADC_UNIT_1, ADC_CHANNEL_2, TOUCH_PAD_NUM3);
+PIN(GPIO4, 4, ADC_UNIT_1, ADC_CHANNEL_3, TOUCH_PAD_NUM4);
+PIN(GPIO5, 5, ADC_UNIT_1, ADC_CHANNEL_4, TOUCH_PAD_NUM5);
+PIN(GPIO6, 6, ADC_UNIT_1, ADC_CHANNEL_5, TOUCH_PAD_NUM6);
+PIN(GPIO7, 7, ADC_UNIT_1, ADC_CHANNEL_6, TOUCH_PAD_NUM7);
+PIN(GPIO8, 8, ADC_UNIT_1, ADC_CHANNEL_7, TOUCH_PAD_NUM8);
+PIN(GPIO9, 9, ADC_UNIT_1, ADC_CHANNEL_8, TOUCH_PAD_NUM9);
+PIN(GPIO10, 10, ADC_UNIT_1, ADC_CHANNEL_9, TOUCH_PAD_NUM10);
+PIN(GPIO11, 11, ADC_UNIT_2, ADC_CHANNEL_0, TOUCH_PAD_NUM11);
+PIN(GPIO12, 12, ADC_UNIT_2, ADC_CHANNEL_1, TOUCH_PAD_NUM12);
+PIN(GPIO13, 13, ADC_UNIT_2, ADC_CHANNEL_2, TOUCH_PAD_NUM13);
+PIN(GPIO14, 14, ADC_UNIT_2, ADC_CHANNEL_3, TOUCH_PAD_NUM14);
+PIN(GPIO15, 15, ADC_UNIT_2, ADC_CHANNEL_4, NO_TOUCH_CHANNEL);
+PIN(GPIO16, 16, ADC_UNIT_2, ADC_CHANNEL_5, NO_TOUCH_CHANNEL);
+PIN(GPIO17, 17, ADC_UNIT_2, ADC_CHANNEL_6, NO_TOUCH_CHANNEL);
+PIN(GPIO18, 18, ADC_UNIT_2, ADC_CHANNEL_7, NO_TOUCH_CHANNEL);
+PIN(GPIO19, 19, ADC_UNIT_2, ADC_CHANNEL_8, NO_TOUCH_CHANNEL);
+PIN(GPIO20, 20, ADC_UNIT_2, ADC_CHANNEL_9, NO_TOUCH_CHANNEL);
+PIN(GPIO21, 21, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO26, 26, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO27, 27, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO28, 28, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO29, 29, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO30, 30, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO31, 31, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO32, 32, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO33, 33, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO34, 34, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO35, 35, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO36, 36, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO37, 37, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO38, 38, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO39, 39, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO40, 40, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO41, 41, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO42, 42, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO43, 43, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO44, 44, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO45, 45, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
+PIN(GPIO46, 46, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
diff --git a/ports/esp32s2/peripherals/pins.h b/ports/esp32s2/peripherals/pins.h
index 07d0b908e..c78eb8385 100644
--- a/ports/esp32s2/peripherals/pins.h
+++ b/ports/esp32s2/peripherals/pins.h
@@ -34,11 +34,17 @@
#include "esp32s2_peripherals_config.h"
#include "esp-idf/config/sdkconfig.h"
-#include "esp-idf/components/soc/include/hal/gpio_types.h"
+
+#include "components/hal/include/hal/gpio_types.h"
+#include "components/hal/include/hal/adc_types.h"
+#include "components/hal/include/hal/touch_sensor_types.h"
typedef struct {
PIN_PREFIX_FIELDS
gpio_num_t number;
+ uint8_t adc_index:2;
+ uint8_t adc_channel:6;
+ uint8_t touch_channel;
} mcu_pin_obj_t;
extern const mcu_pin_obj_t pin_GPIO0;
diff --git a/ports/esp32s2/peripherals/rmt.c b/ports/esp32s2/peripherals/rmt.c
index b7629dbd5..2be5f06d8 100644
--- a/ports/esp32s2/peripherals/rmt.c
+++ b/ports/esp32s2/peripherals/rmt.c
@@ -24,7 +24,7 @@
* THE SOFTWARE.
*/
-#include "rmt.h"
+#include "peripherals/rmt.h"
#include "py/runtime.h"
bool rmt_reserved_channels[RMT_CHANNEL_MAX];
diff --git a/ports/esp32s2/peripherals/rmt.h b/ports/esp32s2/peripherals/rmt.h
index 01ed09907..020f8dc3e 100644
--- a/ports/esp32s2/peripherals/rmt.h
+++ b/ports/esp32s2/peripherals/rmt.h
@@ -28,7 +28,7 @@
#define MICROPY_INCLUDED_ESP32S2_PERIPHERALS_RMT_H
#include "py/mphal.h"
-#include "driver/rmt.h"
+#include "components/driver/include/driver/rmt.h"
#include <stdint.h>
void esp32s2_peripherals_rmt_reset(void);
diff --git a/ports/esp32s2/supervisor/internal_flash.c b/ports/esp32s2/supervisor/internal_flash.c
index 4b216a095..de69a49f9 100644
--- a/ports/esp32s2/supervisor/internal_flash.c
+++ b/ports/esp32s2/supervisor/internal_flash.c
@@ -37,7 +37,7 @@
#include "py/runtime.h"
#include "lib/oofatfs/ff.h"
-#include "esp-idf/components/spi_flash/include/esp_partition.h"
+#include "components/spi_flash/include/esp_partition.h"
#include "supervisor/usb.h"
diff --git a/ports/esp32s2/supervisor/port.c b/ports/esp32s2/supervisor/port.c
index e52b7f376..0b9c03f74 100644
--- a/ports/esp32s2/supervisor/port.c
+++ b/ports/esp32s2/supervisor/port.c
@@ -35,6 +35,7 @@
#include "freertos/task.h"
#include "common-hal/microcontroller/Pin.h"
+#include "common-hal/analogio/AnalogOut.h"
#include "common-hal/busio/I2C.h"
#include "common-hal/busio/SPI.h"
#include "common-hal/busio/UART.h"
@@ -43,10 +44,11 @@
#include "common-hal/wifi/__init__.h"
#include "supervisor/memory.h"
#include "supervisor/shared/tick.h"
+#include "shared-bindings/rtc/__init__.h"
#include "peripherals/rmt.h"
-#include "esp-idf/components/heap/include/esp_heap_caps.h"
-#include "esp-idf/components/soc/soc/esp32s2/include/soc/cache_memory.h"
+#include "components/heap/include/esp_heap_caps.h"
+#include "components/soc/soc/esp32s2/include/soc/cache_memory.h"
#define HEAP_SIZE (48 * 1024)
@@ -55,6 +57,8 @@ uint32_t heap_size;
STATIC esp_timer_handle_t _tick_timer;
+extern void esp_restart(void) NORETURN;
+
void tick_timer_cb(void* arg) {
supervisor_tick();
}
@@ -92,6 +96,10 @@ void reset_port(void) {
// A larger delay so the idle task can run and do any IDF cleanup needed.
vTaskDelay(4);
+#if CIRCUITPY_ANALOGIO
+ analogout_reset();
+#endif
+
#if CIRCUITPY_PULSEIO
esp32s2_peripherals_rmt_reset();
pulsein_reset();
@@ -106,15 +114,22 @@ void reset_port(void) {
spi_reset();
uart_reset();
#endif
+
+#if CIRCUITPY_RTC
+ rtc_reset();
+#endif
+
#if CIRCUITPY_WIFI
wifi_reset();
#endif
}
void reset_to_bootloader(void) {
+ esp_restart();
}
void reset_cpu(void) {
+ esp_restart();
}
uint32_t *port_heap_get_bottom(void) {
diff --git a/ports/esp32s2/supervisor/usb.c b/ports/esp32s2/supervisor/usb.c
index 39eb8204f..1ad6af047 100644
--- a/ports/esp32s2/supervisor/usb.c
+++ b/ports/esp32s2/supervisor/usb.c
@@ -29,10 +29,12 @@
#include "lib/utils/interrupt_char.h"
#include "lib/mp-readline/readline.h"
-#include "esp-idf/components/soc/soc/esp32s2/include/soc/usb_periph.h"
-#include "esp-idf/components/driver/include/driver/periph_ctrl.h"
-#include "esp-idf/components/driver/include/driver/gpio.h"
-#include "esp-idf/components/esp_rom/include/esp32s2/rom/gpio.h"
+#include "components/soc/soc/esp32s2/include/soc/usb_periph.h"
+#include "components/driver/include/driver/periph_ctrl.h"
+#include "components/driver/include/driver/gpio.h"
+#include "components/esp_rom/include/esp32s2/rom/gpio.h"
+#include "components/esp_rom/include/esp_rom_gpio.h"
+#include "components/hal/esp32s2/include/hal/gpio_ll.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
@@ -68,6 +70,33 @@ void usb_device_task(void* param)
}
}
+static void configure_pins (usb_hal_context_t *usb)
+{
+ /* usb_periph_iopins currently configures USB_OTG as USB Device.
+ * Introduce additional parameters in usb_hal_context_t when adding support
+ * for USB Host.
+ */
+ for ( const usb_iopin_dsc_t *iopin = usb_periph_iopins; iopin->pin != -1; ++iopin ) {
+ if ( (usb->use_external_phy) || (iopin->ext_phy_only == 0) ) {
+ esp_rom_gpio_pad_select_gpio(iopin->pin);
+ if ( iopin->is_output ) {
+ esp_rom_gpio_connect_out_signal(iopin->pin, iopin->func, false, false);
+ }
+ else {
+ esp_rom_gpio_connect_in_signal(iopin->pin, iopin->func, false);
+ if ( (iopin->pin != GPIO_FUNC_IN_LOW) && (iopin->pin != GPIO_FUNC_IN_HIGH) ) {
+ gpio_ll_input_enable(&GPIO, iopin->pin);
+ }
+ }
+ esp_rom_gpio_pad_unhold(iopin->pin);
+ }
+ }
+ if ( !usb->use_external_phy ) {
+ gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3);
+ gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3);
+ }
+}
+
void init_usb_hardware(void) {
periph_module_reset(PERIPH_USB_MODULE);
periph_module_enable(PERIPH_USB_MODULE);
@@ -75,10 +104,7 @@ void init_usb_hardware(void) {
.use_external_phy = false // use built-in PHY
};
usb_hal_init(&hal);
-
- // Initialize the pin drive strength.
- gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3);
- gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3);
+ configure_pins(&hal);
(void) xTaskCreateStatic(usb_device_task,
"usbd",