diff options
| author | Jeff Epler <jepler@gmail.com> | 2021-03-16 12:21:50 -0500 |
|---|---|---|
| committer | Jeff Epler <jepler@gmail.com> | 2021-03-16 12:21:50 -0500 |
| commit | 58679dc038e475d7cd00ee45256b7f906ecc2240 (patch) | |
| tree | 30cbc3f9e7e4efc81a43f364d554f33c1df34169 /ports/litex | |
| parent | 97b6664201de2530c9b92957a5e8d2a68524fa7e (diff) | |
| parent | bc690d4070c69e21d9070badc9f56a15d62ffb5d (diff) | |
Merge remote-tracking branch 'origin/main' into bitmap-read-2
Diffstat (limited to 'ports/litex')
| -rw-r--r-- | ports/litex/background.c | 9 | ||||
| -rw-r--r-- | ports/litex/boards/fomu/csr.h | 426 | ||||
| -rw-r--r-- | ports/litex/boards/fomu/generated/soc.h | 34 | ||||
| -rw-r--r-- | ports/litex/boards/fomu/mpconfigboard.h | 4 | ||||
| -rw-r--r-- | ports/litex/boards/fomu/pins.c | 8 | ||||
| -rw-r--r-- | ports/litex/common-hal/digitalio/DigitalInOut.c | 36 | ||||
| -rw-r--r-- | ports/litex/common-hal/microcontroller/Pin.c | 12 | ||||
| -rw-r--r-- | ports/litex/common-hal/microcontroller/Pin.h | 10 | ||||
| -rw-r--r-- | ports/litex/common-hal/microcontroller/__init__.c | 19 | ||||
| -rw-r--r-- | ports/litex/common-hal/neopixel_write/__init__.c | 7 | ||||
| -rw-r--r-- | ports/litex/common-hal/os/__init__.c | 4 | ||||
| -rw-r--r-- | ports/litex/common-hal/supervisor/Runtime.c | 4 | ||||
| -rw-r--r-- | ports/litex/fatfs_port.c | 2 | ||||
| -rw-r--r-- | ports/litex/hw/common.h | 30 | ||||
| -rw-r--r-- | ports/litex/irq.h | 67 | ||||
| -rw-r--r-- | ports/litex/mpconfigport.h | 2 | ||||
| -rw-r--r-- | ports/litex/mphalport.c | 12 | ||||
| -rw-r--r-- | ports/litex/mphalport.h | 4 | ||||
| -rw-r--r-- | ports/litex/supervisor/internal_flash.c | 73 | ||||
| -rw-r--r-- | ports/litex/supervisor/port.c | 6 |
20 files changed, 391 insertions, 378 deletions
diff --git a/ports/litex/background.c b/ports/litex/background.c index 174d9588a..da86919c0 100644 --- a/ports/litex/background.c +++ b/ports/litex/background.c @@ -29,6 +29,9 @@ #include "supervisor/usb.h" #include "supervisor/shared/stack.h" -void port_background_task(void) {} -void port_start_background_task(void) {} -void port_finish_background_task(void) {} +void port_background_task(void) { +} +void port_start_background_task(void) { +} +void port_finish_background_task(void) { +} diff --git a/ports/litex/boards/fomu/csr.h b/ports/litex/boards/fomu/csr.h index bf66fe3a1..7405d4312 100644 --- a/ports/litex/boards/fomu/csr.h +++ b/ports/litex/boards/fomu/csr.h @@ -1,6 +1,6 @@ -//-------------------------------------------------------------------------------- +// -------------------------------------------------------------------------------- // Auto-generated by Migen (f4fcd10) & LiteX (de205d4a) on 2019-11-25 14:57:34 -//-------------------------------------------------------------------------------- +// -------------------------------------------------------------------------------- #include <generated/soc.h> #ifndef __GENERATED_CSR_H #define __GENERATED_CSR_H @@ -21,41 +21,41 @@ extern uint32_t csr_readl(unsigned long addr); #define CSR_CTRL_RESET_ADDR 0xe0000000L #define CSR_CTRL_RESET_SIZE 1 static inline unsigned char ctrl_reset_read(void) { - unsigned char r = csr_readl(0xe0000000L); - return r; + unsigned char r = csr_readl(0xe0000000L); + return r; } static inline void ctrl_reset_write(unsigned char value) { - csr_writel(value, 0xe0000000L); + csr_writel(value, 0xe0000000L); } #define CSR_CTRL_SCRATCH_ADDR 0xe0000004L #define CSR_CTRL_SCRATCH_SIZE 4 static inline unsigned int ctrl_scratch_read(void) { - unsigned int r = csr_readl(0xe0000004L); - r <<= 8; - r |= csr_readl(0xe0000008L); - r <<= 8; - r |= csr_readl(0xe000000cL); - r <<= 8; - r |= csr_readl(0xe0000010L); - return r; + unsigned int r = csr_readl(0xe0000004L); + r <<= 8; + r |= csr_readl(0xe0000008L); + r <<= 8; + r |= csr_readl(0xe000000cL); + r <<= 8; + r |= csr_readl(0xe0000010L); + return r; } static inline void ctrl_scratch_write(unsigned int value) { - csr_writel(value >> 24, 0xe0000004L); - csr_writel(value >> 16, 0xe0000008L); - csr_writel(value >> 8, 0xe000000cL); - csr_writel(value, 0xe0000010L); + csr_writel(value >> 24, 0xe0000004L); + csr_writel(value >> 16, 0xe0000008L); + csr_writel(value >> 8, 0xe000000cL); + csr_writel(value, 0xe0000010L); } #define CSR_CTRL_BUS_ERRORS_ADDR 0xe0000014L #define CSR_CTRL_BUS_ERRORS_SIZE 4 static inline unsigned int ctrl_bus_errors_read(void) { - unsigned int r = csr_readl(0xe0000014L); - r <<= 8; - r |= csr_readl(0xe0000018L); - r <<= 8; - r |= csr_readl(0xe000001cL); - r <<= 8; - r |= csr_readl(0xe0000020L); - return r; + unsigned int r = csr_readl(0xe0000014L); + r <<= 8; + r |= csr_readl(0xe0000018L); + r <<= 8; + r |= csr_readl(0xe000001cL); + r <<= 8; + r |= csr_readl(0xe0000020L); + return r; } /* lxspi */ @@ -63,11 +63,11 @@ static inline unsigned int ctrl_bus_errors_read(void) { #define CSR_LXSPI_BITBANG_ADDR 0xe0007800L #define CSR_LXSPI_BITBANG_SIZE 1 static inline unsigned char lxspi_bitbang_read(void) { - unsigned char r = csr_readl(0xe0007800L); - return r; + unsigned char r = csr_readl(0xe0007800L); + return r; } static inline void lxspi_bitbang_write(unsigned char value) { - csr_writel(value, 0xe0007800L); + csr_writel(value, 0xe0007800L); } #define CSR_LXSPI_BITBANG_MOSI_OFFSET 0 #define CSR_LXSPI_BITBANG_MOSI_SIZE 1 @@ -80,17 +80,17 @@ static inline void lxspi_bitbang_write(unsigned char value) { #define CSR_LXSPI_MISO_ADDR 0xe0007804L #define CSR_LXSPI_MISO_SIZE 1 static inline unsigned char lxspi_miso_read(void) { - unsigned char r = csr_readl(0xe0007804L); - return r; + unsigned char r = csr_readl(0xe0007804L); + return r; } #define CSR_LXSPI_BITBANG_EN_ADDR 0xe0007808L #define CSR_LXSPI_BITBANG_EN_SIZE 1 static inline unsigned char lxspi_bitbang_en_read(void) { - unsigned char r = csr_readl(0xe0007808L); - return r; + unsigned char r = csr_readl(0xe0007808L); + return r; } static inline void lxspi_bitbang_en_write(unsigned char value) { - csr_writel(value, 0xe0007808L); + csr_writel(value, 0xe0007808L); } /* messible */ @@ -98,23 +98,23 @@ static inline void lxspi_bitbang_en_write(unsigned char value) { #define CSR_MESSIBLE_IN_ADDR 0xe0008000L #define CSR_MESSIBLE_IN_SIZE 1 static inline unsigned char messible_in_read(void) { - unsigned char r = csr_readl(0xe0008000L); - return r; + unsigned char r = csr_readl(0xe0008000L); + return r; } static inline void messible_in_write(unsigned char value) { - csr_writel(value, 0xe0008000L); + csr_writel(value, 0xe0008000L); } #define CSR_MESSIBLE_OUT_ADDR 0xe0008004L #define CSR_MESSIBLE_OUT_SIZE 1 static inline unsigned char messible_out_read(void) { - unsigned char r = csr_readl(0xe0008004L); - return r; + unsigned char r = csr_readl(0xe0008004L); + return r; } #define CSR_MESSIBLE_STATUS_ADDR 0xe0008008L #define CSR_MESSIBLE_STATUS_SIZE 1 static inline unsigned char messible_status_read(void) { - unsigned char r = csr_readl(0xe0008008L); - return r; + unsigned char r = csr_readl(0xe0008008L); + return r; } #define CSR_MESSIBLE_STATUS_FULL_OFFSET 0 #define CSR_MESSIBLE_STATUS_FULL_SIZE 1 @@ -126,11 +126,11 @@ static inline unsigned char messible_status_read(void) { #define CSR_REBOOT_CTRL_ADDR 0xe0006000L #define CSR_REBOOT_CTRL_SIZE 1 static inline unsigned char reboot_ctrl_read(void) { - unsigned char r = csr_readl(0xe0006000L); - return r; + unsigned char r = csr_readl(0xe0006000L); + return r; } static inline void reboot_ctrl_write(unsigned char value) { - csr_writel(value, 0xe0006000L); + csr_writel(value, 0xe0006000L); } #define CSR_REBOOT_CTRL_IMAGE_OFFSET 0 #define CSR_REBOOT_CTRL_IMAGE_SIZE 2 @@ -139,20 +139,20 @@ static inline void reboot_ctrl_write(unsigned char value) { #define CSR_REBOOT_ADDR_ADDR 0xe0006004L #define CSR_REBOOT_ADDR_SIZE 4 static inline unsigned int reboot_addr_read(void) { - unsigned int r = csr_readl(0xe0006004L); - r <<= 8; - r |= csr_readl(0xe0006008L); - r <<= 8; - r |= csr_readl(0xe000600cL); - r <<= 8; - r |= csr_readl(0xe0006010L); - return r; + unsigned int r = csr_readl(0xe0006004L); + r <<= 8; + r |= csr_readl(0xe0006008L); + r <<= 8; + r |= csr_readl(0xe000600cL); + r <<= 8; + r |= csr_readl(0xe0006010L); + return r; } static inline void reboot_addr_write(unsigned int value) { - csr_writel(value >> 24, 0xe0006004L); - csr_writel(value >> 16, 0xe0006008L); - csr_writel(value >> 8, 0xe000600cL); - csr_writel(value, 0xe0006010L); + csr_writel(value >> 24, 0xe0006004L); + csr_writel(value >> 16, 0xe0006008L); + csr_writel(value >> 8, 0xe000600cL); + csr_writel(value, 0xe0006010L); } /* rgb */ @@ -160,29 +160,29 @@ static inline void reboot_addr_write(unsigned int value) { #define CSR_RGB_DAT_ADDR 0xe0006800L #define CSR_RGB_DAT_SIZE 1 static inline unsigned char rgb_dat_read(void) { - unsigned char r = csr_readl(0xe0006800L); - return r; + unsigned char r = csr_readl(0xe0006800L); + return r; } static inline void rgb_dat_write(unsigned char value) { - csr_writel(value, 0xe0006800L); + csr_writel(value, 0xe0006800L); } #define CSR_RGB_ADDR_ADDR 0xe0006804L #define CSR_RGB_ADDR_SIZE 1 static inline unsigned char rgb_addr_read(void) { - unsigned char r = csr_readl(0xe0006804L); - return r; + unsigned char r = csr_readl(0xe0006804L); + return r; } static inline void rgb_addr_write(unsigned char value) { - csr_writel(value, 0xe0006804L); + csr_writel(value, 0xe0006804L); } #define CSR_RGB_CTRL_ADDR 0xe0006808L #define CSR_RGB_CTRL_SIZE 1 static inline unsigned char rgb_ctrl_read(void) { - unsigned char r = csr_readl(0xe0006808L); - return r; + unsigned char r = csr_readl(0xe0006808L); + return r; } static inline void rgb_ctrl_write(unsigned char value) { - csr_writel(value, 0xe0006808L); + csr_writel(value, 0xe0006808L); } #define CSR_RGB_CTRL_EXE_OFFSET 0 #define CSR_RGB_CTRL_EXE_SIZE 1 @@ -199,11 +199,11 @@ static inline void rgb_ctrl_write(unsigned char value) { #define CSR_RGB_RAW_ADDR 0xe000680cL #define CSR_RGB_RAW_SIZE 1 static inline unsigned char rgb_raw_read(void) { - unsigned char r = csr_readl(0xe000680cL); - return r; + unsigned char r = csr_readl(0xe000680cL); + return r; } static inline void rgb_raw_write(unsigned char value) { - csr_writel(value, 0xe000680cL); + csr_writel(value, 0xe000680cL); } #define CSR_RGB_RAW_R_OFFSET 0 #define CSR_RGB_RAW_R_SIZE 1 @@ -217,95 +217,95 @@ static inline void rgb_raw_write(unsigned char value) { #define CSR_TIMER0_LOAD_ADDR 0xe0002800L #define CSR_TIMER0_LOAD_SIZE 4 static inline unsigned int timer0_load_read(void) { - unsigned int r = csr_readl(0xe0002800L); - r <<= 8; - r |= csr_readl(0xe0002804L); - r <<= 8; - r |= csr_readl(0xe0002808L); - r <<= 8; - r |= csr_readl(0xe000280cL); - return r; + unsigned int r = csr_readl(0xe0002800L); + r <<= 8; + r |= csr_readl(0xe0002804L); + r <<= 8; + r |= csr_readl(0xe0002808L); + r <<= 8; + r |= csr_readl(0xe000280cL); + return r; } static inline void timer0_load_write(unsigned int value) { - csr_writel(value >> 24, 0xe0002800L); - csr_writel(value >> 16, 0xe0002804L); - csr_writel(value >> 8, 0xe0002808L); - csr_writel(value, 0xe000280cL); + csr_writel(value >> 24, 0xe0002800L); + csr_writel(value >> 16, 0xe0002804L); + csr_writel(value >> 8, 0xe0002808L); + csr_writel(value, 0xe000280cL); } #define CSR_TIMER0_RELOAD_ADDR 0xe0002810L #define CSR_TIMER0_RELOAD_SIZE 4 static inline unsigned int timer0_reload_read(void) { - unsigned int r = csr_readl(0xe0002810L); - r <<= 8; - r |= csr_readl(0xe0002814L); - r <<= 8; - r |= csr_readl(0xe0002818L); - r <<= 8; - r |= csr_readl(0xe000281cL); - return r; + unsigned int r = csr_readl(0xe0002810L); + r <<= 8; + r |= csr_readl(0xe0002814L); + r <<= 8; + r |= csr_readl(0xe0002818L); + r <<= 8; + r |= csr_readl(0xe000281cL); + return r; } static inline void timer0_reload_write(unsigned int value) { - csr_writel(value >> 24, 0xe0002810L); - csr_writel(value >> 16, 0xe0002814L); - csr_writel(value >> 8, 0xe0002818L); - csr_writel(value, 0xe000281cL); + csr_writel(value >> 24, 0xe0002810L); + csr_writel(value >> 16, 0xe0002814L); + csr_writel(value >> 8, 0xe0002818L); + csr_writel(value, 0xe000281cL); } #define CSR_TIMER0_EN_ADDR 0xe0002820L #define CSR_TIMER0_EN_SIZE 1 static inline unsigned char timer0_en_read(void) { - unsigned char r = csr_readl(0xe0002820L); - return r; + unsigned char r = csr_readl(0xe0002820L); + return r; } static inline void timer0_en_write(unsigned char value) { - csr_writel(value, 0xe0002820L); + csr_writel(value, 0xe0002820L); } #define CSR_TIMER0_UPDATE_VALUE_ADDR 0xe0002824L #define CSR_TIMER0_UPDATE_VALUE_SIZE 1 static inline unsigned char timer0_update_value_read(void) { - unsigned char r = csr_readl(0xe0002824L); - return r; + unsigned char r = csr_readl(0xe0002824L); + return r; } static inline void timer0_update_value_write(unsigned char value) { - csr_writel(value, 0xe0002824L); + csr_writel(value, 0xe0002824L); } #define CSR_TIMER0_VALUE_ADDR 0xe0002828L #define CSR_TIMER0_VALUE_SIZE 4 static inline unsigned int timer0_value_read(void) { - unsigned int r = csr_readl(0xe0002828L); - r <<= 8; - r |= csr_readl(0xe000282cL); - r <<= 8; - r |= csr_readl(0xe0002830L); - r <<= 8; - r |= csr_readl(0xe0002834L); - return r; + unsigned int r = csr_readl(0xe0002828L); + r <<= 8; + r |= csr_readl(0xe000282cL); + r <<= 8; + r |= csr_readl(0xe0002830L); + r <<= 8; + r |= csr_readl(0xe0002834L); + return r; } #define CSR_TIMER0_EV_STATUS_ADDR 0xe0002838L #define CSR_TIMER0_EV_STATUS_SIZE 1 static inline unsigned char timer0_ev_status_read(void) { - unsigned char r = csr_readl(0xe0002838L); - return r; + unsigned char r = csr_readl(0xe0002838L); + return r; } static inline void timer0_ev_status_write(unsigned char value) { - csr_writel(value, 0xe0002838L); + csr_writel(value, 0xe0002838L); } #define CSR_TIMER0_EV_PENDING_ADDR 0xe000283cL #define CSR_TIMER0_EV_PENDING_SIZE 1 static inline unsigned char timer0_ev_pending_read(void) { - unsigned char r = csr_readl(0xe000283cL); - return r; + unsigned char r = csr_readl(0xe000283cL); + return r; } static inline void timer0_ev_pending_write(unsigned char value) { - csr_writel(value, 0xe000283cL); + csr_writel(value, 0xe000283cL); } #define CSR_TIMER0_EV_ENABLE_ADDR 0xe0002840L #define CSR_TIMER0_EV_ENABLE_SIZE 1 static inline unsigned char timer0_ev_enable_read(void) { - unsigned char r = csr_readl(0xe0002840L); - return r; + unsigned char r = csr_readl(0xe0002840L); + return r; } static inline void timer0_ev_enable_write(unsigned char value) { - csr_writel(value, 0xe0002840L); + csr_writel(value, 0xe0002840L); } /* touch */ @@ -313,26 +313,26 @@ static inline void timer0_ev_enable_write(unsigned char value) { #define CSR_TOUCH_O_ADDR 0xe0005800L #define CSR_TOUCH_O_SIZE 1 static inline unsigned char touch_o_read(void) { - unsigned char r = csr_readl(0xe0005800L); - return r; + unsigned char r = csr_readl(0xe0005800L); + return r; } static inline void touch_o_write(unsigned char value) { - csr_writel(value, 0xe0005800L); + csr_writel(value, 0xe0005800L); } #define CSR_TOUCH_OE_ADDR 0xe0005804L #define CSR_TOUCH_OE_SIZE 1 static inline unsigned char touch_oe_read(void) { - unsigned char r = csr_readl(0xe0005804L); - return r; + unsigned char r = csr_readl(0xe0005804L); + return r; } static inline void touch_oe_write(unsigned char value) { - csr_writel(value, 0xe0005804L); + csr_writel(value, 0xe0005804L); } #define CSR_TOUCH_I_ADDR 0xe0005808L #define CSR_TOUCH_I_SIZE 1 static inline unsigned char touch_i_read(void) { - unsigned char r = csr_readl(0xe0005808L); - return r; + unsigned char r = csr_readl(0xe0005808L); + return r; } /* usb */ @@ -340,28 +340,28 @@ static inline unsigned char touch_i_read(void) { #define CSR_USB_PULLUP_OUT_ADDR 0xe0004800L #define CSR_USB_PULLUP_OUT_SIZE 1 static inline unsigned char usb_pullup_out_read(void) { - unsigned char r = csr_readl(0xe0004800L); - return r; + unsigned char r = csr_readl(0xe0004800L); + return r; } static inline void usb_pullup_out_write(unsigned char value) { - csr_writel(value, 0xe0004800L); + csr_writel(value, 0xe0004800L); } #define CSR_USB_ADDRESS_ADDR 0xe0004804L #define CSR_USB_ADDRESS_SIZE 1 static inline unsigned char usb_address_read(void) { - unsigned char r = csr_readl(0xe0004804L); - return r; + unsigned char r = csr_readl(0xe0004804L); + return r; } static inline void usb_address_write(unsigned char value) { - csr_writel(value, 0xe0004804L); + csr_writel(value, 0xe0004804L); } #define CSR_USB_ADDRESS_ADDR_OFFSET 0 #define CSR_USB_ADDRESS_ADDR_SIZE 7 #define CSR_USB_NEXT_EV_ADDR 0xe0004808L #define CSR_USB_NEXT_EV_SIZE 1 static inline unsigned char usb_next_ev_read(void) { - unsigned char r = csr_readl(0xe0004808L); - return r; + unsigned char r = csr_readl(0xe0004808L); + return r; } #define CSR_USB_NEXT_EV_IN_OFFSET 0 #define CSR_USB_NEXT_EV_IN_SIZE 1 @@ -374,27 +374,27 @@ static inline unsigned char usb_next_ev_read(void) { #define CSR_USB_SETUP_DATA_ADDR 0xe000480cL #define CSR_USB_SETUP_DATA_SIZE 1 static inline unsigned char usb_setup_data_read(void) { - unsigned char r = csr_readl(0xe000480cL); - return r; + unsigned char r = csr_readl(0xe000480cL); + return r; } #define CSR_USB_SETUP_DATA_DATA_OFFSET 0 #define CSR_USB_SETUP_DATA_DATA_SIZE 8 #define CSR_USB_SETUP_CTRL_ADDR 0xe0004810L #define CSR_USB_SETUP_CTRL_SIZE 1 static inline unsigned char usb_setup_ctrl_read(void) { - unsigned char r = csr_readl(0xe0004810L); - return r; + unsigned char r = csr_readl(0xe0004810L); + return r; } static inline void usb_setup_ctrl_write(unsigned char value) { - csr_writel(value, 0xe0004810L); + csr_writel(value, 0xe0004810L); } #define CSR_USB_SETUP_CTRL_RESET_OFFSET 5 #define CSR_USB_SETUP_CTRL_RESET_SIZE 1 #define CSR_USB_SETUP_STATUS_ADDR 0xe0004814L #define CSR_USB_SETUP_STATUS_SIZE 1 static inline unsigned char usb_setup_status_read(void) { - unsigned char r = csr_readl(0xe0004814L); - return r; + unsigned char r = csr_readl(0xe0004814L); + return r; } #define CSR_USB_SETUP_STATUS_EPNO_OFFSET 0 #define CSR_USB_SETUP_STATUS_EPNO_SIZE 4 @@ -409,49 +409,49 @@ static inline unsigned char usb_setup_status_read(void) { #define CSR_USB_SETUP_EV_STATUS_ADDR 0xe0004818L #define CSR_USB_SETUP_EV_STATUS_SIZE 1 static inline unsigned char usb_setup_ev_status_read(void) { - unsigned char r = csr_readl(0xe0004818L); - return r; + unsigned char r = csr_readl(0xe0004818L); + return r; } static inline void usb_setup_ev_status_write(unsigned char value) { - csr_writel(value, 0xe0004818L); + csr_writel(value, 0xe0004818L); } #define CSR_USB_SETUP_EV_PENDING_ADDR 0xe000481cL #define CSR_USB_SETUP_EV_PENDING_SIZE 1 static inline unsigned char usb_setup_ev_pending_read(void) { - unsigned char r = csr_readl(0xe000481cL); - return r; + unsigned char r = csr_readl(0xe000481cL); + return r; } static inline void usb_setup_ev_pending_write(unsigned char value) { - csr_writel(value, 0xe000481cL); + csr_writel(value, 0xe000481cL); } #define CSR_USB_SETUP_EV_ENABLE_ADDR 0xe0004820L #define CSR_USB_SETUP_EV_ENABLE_SIZE 1 static inline unsigned char usb_setup_ev_enable_read(void) { - unsigned char r = csr_readl(0xe0004820L); - return r; + unsigned char r = csr_readl(0xe0004820L); + return r; } static inline void usb_setup_ev_enable_write(unsigned char value) { - csr_writel(value, 0xe0004820L); + csr_writel(value, 0xe0004820L); } #define CSR_USB_IN_DATA_ADDR 0xe0004824L #define CSR_USB_IN_DATA_SIZE 1 static inline unsigned char usb_in_data_read(void) { - unsigned char r = csr_readl(0xe0004824L); - return r; + unsigned char r = csr_readl(0xe0004824L); + return r; } static inline void usb_in_data_write(unsigned char value) { - csr_writel(value, 0xe0004824L); + csr_writel(value, 0xe0004824L); } #define CSR_USB_IN_DATA_DATA_OFFSET 0 #define CSR_USB_IN_DATA_DATA_SIZE 8 #define CSR_USB_IN_CTRL_ADDR 0xe0004828L #define CSR_USB_IN_CTRL_SIZE 1 static inline unsigned char usb_in_ctrl_read(void) { - unsigned char r = csr_readl(0xe0004828L); - return r; + unsigned char r = csr_readl(0xe0004828L); + return r; } static inline void usb_in_ctrl_write(unsigned char value) { - csr_writel(value, 0xe0004828L); + csr_writel(value, 0xe0004828L); } #define CSR_USB_IN_CTRL_EPNO_OFFSET 0 #define CSR_USB_IN_CTRL_EPNO_SIZE 4 @@ -462,8 +462,8 @@ static inline void usb_in_ctrl_write(unsigned char value) { #define CSR_USB_IN_STATUS_ADDR 0xe000482cL #define CSR_USB_IN_STATUS_SIZE 1 static inline unsigned char usb_in_status_read(void) { - unsigned char r = csr_readl(0xe000482cL); - return r; + unsigned char r = csr_readl(0xe000482cL); + return r; } #define CSR_USB_IN_STATUS_IDLE_OFFSET 0 #define CSR_USB_IN_STATUS_IDLE_SIZE 1 @@ -474,46 +474,46 @@ static inline unsigned char usb_in_status_read(void) { #define CSR_USB_IN_EV_STATUS_ADDR 0xe0004830L #define CSR_USB_IN_EV_STATUS_SIZE 1 static inline unsigned char usb_in_ev_status_read(void) { - unsigned char r = csr_readl(0xe0004830L); - return r; + unsigned char r = csr_readl(0xe0004830L); + return r; } static inline void usb_in_ev_status_write(unsigned char value) { - csr_writel(value, 0xe0004830L); + csr_writel(value, 0xe0004830L); } #define CSR_USB_IN_EV_PENDING_ADDR 0xe0004834L #define CSR_USB_IN_EV_PENDING_SIZE 1 static inline unsigned char usb_in_ev_pending_read(void) { - unsigned char r = csr_readl(0xe0004834L); - return r; + unsigned char r = csr_readl(0xe0004834L); + return r; } static inline void usb_in_ev_pending_write(unsigned char value) { - csr_writel(value, 0xe0004834L); + csr_writel(value, 0xe0004834L); } #define CSR_USB_IN_EV_ENABLE_ADDR 0xe0004838L #define CSR_USB_IN_EV_ENABLE_SIZE 1 static inline unsigned char usb_in_ev_enable_read(void) { - unsigned char r = csr_readl(0xe0004838L); - return r; + unsigned char r = csr_readl(0xe0004838L); + return r; } static inline void usb_in_ev_enable_write(unsigned char value) { - csr_writel(value, 0xe0004838L); + csr_writel(value, 0xe0004838L); } #define CSR_USB_OUT_DATA_ADDR 0xe000483cL #define CSR_USB_OUT_DATA_SIZE 1 static inline unsigned char usb_out_data_read(void) { - unsigned char r = csr_readl(0xe000483cL); - return r; + unsigned char r = csr_readl(0xe000483cL); + return r; } #define CSR_USB_OUT_DATA_DATA_OFFSET 0 #define CSR_USB_OUT_DATA_DATA_SIZE 8 #define CSR_USB_OUT_CTRL_ADDR 0xe0004840L #define CSR_USB_OUT_CTRL_SIZE 1 static inline unsigned char usb_out_ctrl_read(void) { - unsigned char r = csr_readl(0xe0004840L); - return r; + unsigned char r = csr_readl(0xe0004840L); + return r; } static inline void usb_out_ctrl_write(unsigned char value) { - csr_writel(value, 0xe0004840L); + csr_writel(value, 0xe0004840L); } #define CSR_USB_OUT_CTRL_EPNO_OFFSET 0 #define CSR_USB_OUT_CTRL_EPNO_SIZE 4 @@ -526,8 +526,8 @@ static inline void usb_out_ctrl_write(unsigned char value) { #define CSR_USB_OUT_STATUS_ADDR 0xe0004844L #define CSR_USB_OUT_STATUS_SIZE 1 static inline unsigned char usb_out_status_read(void) { - unsigned char r = csr_readl(0xe0004844L); - return r; + unsigned char r = csr_readl(0xe0004844L); + return r; } #define CSR_USB_OUT_STATUS_EPNO_OFFSET 0 #define CSR_USB_OUT_STATUS_EPNO_SIZE 4 @@ -538,41 +538,41 @@ static inline unsigned char usb_out_status_read(void) { #define CSR_USB_OUT_EV_STATUS_ADDR 0xe0004848L #define CSR_USB_OUT_EV_STATUS_SIZE 1 static inline unsigned char usb_out_ev_status_read(void) { - unsigned char r = csr_readl(0xe0004848L); - return r; + unsigned char r = csr_readl(0xe0004848L); + return r; } static inline void usb_out_ev_status_write(unsigned char value) { - csr_writel(value, 0xe0004848L); + csr_writel(value, 0xe0004848L); } #define CSR_USB_OUT_EV_PENDING_ADDR 0xe000484cL #define CSR_USB_OUT_EV_PENDING_SIZE 1 static inline unsigned char usb_out_ev_pending_read(void) { - unsigned char r = csr_readl(0xe000484cL); - return r; + unsigned char r = csr_readl(0xe000484cL); + return r; } static inline void usb_out_ev_pending_write(unsigned char value) { - csr_writel(value, 0xe000484cL); + csr_writel(value, 0xe000484cL); } #define CSR_USB_OUT_EV_ENABLE_ADDR 0xe0004850L #define CSR_USB_OUT_EV_ENABLE_SIZE 1 static inline unsigned char usb_out_ev_enable_read(void) { - unsigned char r = csr_readl(0xe0004850L); - return r; + unsigned char r = csr_readl(0xe0004850L); + return r; } static inline void usb_out_ev_enable_write(unsigned char value) { - csr_writel(value, 0xe0004850L); + csr_writel(value, 0xe0004850L); } #define CSR_USB_OUT_ENABLE_STATUS_ADDR 0xe0004854L #define CSR_USB_OUT_ENABLE_STATUS_SIZE 1 static inline unsigned char usb_out_enable_status_read(void) { - unsigned char r = csr_readl(0xe0004854L); - return r; + unsigned char r = csr_readl(0xe0004854L); + return r; } #define CSR_USB_OUT_STALL_STATUS_ADDR 0xe0004858L #define CSR_USB_OUT_STALL_STATUS_SIZE 1 static inline unsigned char usb_out_stall_status_read(void) { - unsigned char r = csr_readl(0xe0004858L); - return r; + unsigned char r = csr_readl(0xe0004858L); + return r; } /* version */ @@ -580,68 +580,68 @@ static inline unsigned char usb_out_stall_status_read(void) { #define CSR_VERSION_MAJOR_ADDR 0xe0007000L #define CSR_VERSION_MAJOR_SIZE 1 static inline unsigned char version_major_read(void) { - unsigned char r = csr_readl(0xe0007000L); - return r; + unsigned char r = csr_readl(0xe0007000L); + return r; } #define CSR_VERSION_MINOR_ADDR 0xe0007004L #define CSR_VERSION_MINOR_SIZE 1 static inline unsigned char version_minor_read(void) { - unsigned char r = csr_readl(0xe0007004L); - return r; + unsigned char r = csr_readl(0xe0007004L); + return r; } #define CSR_VERSION_REVISION_ADDR 0xe0007008L #define CSR_VERSION_REVISION_SIZE 1 static inline unsigned char version_revision_read(void) { - unsigned char r = csr_readl(0xe0007008L); - return r; + unsigned char r = csr_readl(0xe0007008L); + return r; } #define CSR_VERSION_GITREV_ADDR 0xe000700cL #define CSR_VERSION_GITREV_SIZE 4 static inline unsigned int version_gitrev_read(void) { - unsigned int r = csr_readl(0xe000700cL); - r <<= 8; - r |= csr_readl(0xe0007010L); - r <<= 8; - r |= csr_readl(0xe0007014L); - r <<= 8; - r |= csr_readl(0xe0007018L); - return r; + unsigned int r = csr_readl(0xe000700cL); + r <<= 8; + r |= csr_readl(0xe0007010L); + r <<= 8; + r |= csr_readl(0xe0007014L); + r <<= 8; + r |= csr_readl(0xe0007018L); + return r; } #define CSR_VERSION_GITEXTRA_ADDR 0xe000701cL #define CSR_VERSION_GITEXTRA_SIZE 2 static inline unsigned short int version_gitextra_read(void) { - unsigned short int r = csr_readl(0xe000701cL); - r <<= 8; - r |= csr_readl(0xe0007020L); - return r; + unsigned short int r = csr_readl(0xe000701cL); + r <<= 8; + r |= csr_readl(0xe0007020L); + return r; } #define CSR_VERSION_DIRTY_ADDR 0xe0007024L #define CSR_VERSION_DIRTY_SIZE 1 static inline unsigned char version_dirty_read(void) { - unsigned char r = csr_readl(0xe0007024L); - return r; + unsigned char r = csr_readl(0xe0007024L); + return r; } #define CSR_VERSION_DIRTY_DIRTY_OFFSET 0 #define CSR_VERSION_DIRTY_DIRTY_SIZE 1 #define CSR_VERSION_MODEL_ADDR 0xe0007028L #define CSR_VERSION_MODEL_SIZE 1 static inline unsigned char version_model_read(void) { - unsigned char r = csr_readl(0xe0007028L); - return r; + unsigned char r = csr_readl(0xe0007028L); + return r; } #define CSR_VERSION_MODEL_MODEL_OFFSET 0 #define CSR_VERSION_MODEL_MODEL_SIZE 8 #define CSR_VERSION_SEED_ADDR 0xe000702cL #define CSR_VERSION_SEED_SIZE 4 static inline unsigned int version_seed_read(void) { - unsigned int r = csr_readl(0xe000702cL); - r <<= 8; - r |= csr_readl(0xe0007030L); - r <<= 8; - r |= csr_readl(0xe0007034L); - r <<= 8; - r |= csr_readl(0xe0007038L); - return r; + unsigned int r = csr_readl(0xe000702cL); + r <<= 8; + r |= csr_readl(0xe0007030L); + r <<= 8; + r |= csr_readl(0xe0007034L); + r <<= 8; + r |= csr_readl(0xe0007038L); + return r; } #endif diff --git a/ports/litex/boards/fomu/generated/soc.h b/ports/litex/boards/fomu/generated/soc.h index 91b2f1a31..1d73bbf0f 100644 --- a/ports/litex/boards/fomu/generated/soc.h +++ b/ports/litex/boards/fomu/generated/soc.h @@ -1,58 +1,58 @@ -//-------------------------------------------------------------------------------- +// -------------------------------------------------------------------------------- // Auto-generated by Migen (f4fcd10) & LiteX (de205d4a) on 2019-11-25 15:17:59 -//-------------------------------------------------------------------------------- +// -------------------------------------------------------------------------------- #ifndef __GENERATED_SOC_H #define __GENERATED_SOC_H #define CONFIG_BITSTREAM_SYNC_HEADER1 2123999870 static inline int config_bitstream_sync_header1_read(void) { - return 2123999870; + return 2123999870; } #define CONFIG_BITSTREAM_SYNC_HEADER2 2125109630 static inline int config_bitstream_sync_header2_read(void) { - return 2125109630; + return 2125109630; } #define CONFIG_CLOCK_FREQUENCY 12000000 static inline int config_clock_frequency_read(void) { - return 12000000; + return 12000000; } #define CONFIG_CPU_RESET_ADDR 0 static inline int config_cpu_reset_addr_read(void) { - return 0; + return 0; } #define CONFIG_CPU_TYPE "VEXRISCV" -static inline const char * config_cpu_type_read(void) { - return "VEXRISCV"; +static inline const char *config_cpu_type_read(void) { + return "VEXRISCV"; } #define CONFIG_CPU_TYPE_VEXRISCV #define CONFIG_CPU_VARIANT "MIN" -static inline const char * config_cpu_variant_read(void) { - return "MIN"; +static inline const char *config_cpu_variant_read(void) { + return "MIN"; } #define CONFIG_CPU_VARIANT_MIN #define CONFIG_CSR_ALIGNMENT 32 static inline int config_csr_alignment_read(void) { - return 32; + return 32; } #define CONFIG_CSR_DATA_WIDTH 8 static inline int config_csr_data_width_read(void) { - return 8; + return 8; } #define CONFIG_FOMU_REV "HACKER" -static inline const char * config_fomu_rev_read(void) { - return "HACKER"; +static inline const char *config_fomu_rev_read(void) { + return "HACKER"; } #define CONFIG_FOMU_REV_HACKER #define CONFIG_SHADOW_BASE 2147483648 static inline int config_shadow_base_read(void) { - return 2147483648; + return 2147483648; } #define TIMER0_INTERRUPT 2 static inline int timer0_interrupt_read(void) { - return 2; + return 2; } #define USB_INTERRUPT 3 static inline int usb_interrupt_read(void) { - return 3; + return 3; } #endif diff --git a/ports/litex/boards/fomu/mpconfigboard.h b/ports/litex/boards/fomu/mpconfigboard.h index 127301eee..fd627c0b0 100644 --- a/ports/litex/boards/fomu/mpconfigboard.h +++ b/ports/litex/boards/fomu/mpconfigboard.h @@ -24,14 +24,14 @@ * THE SOFTWARE. */ -//Micropython setup +// Micropython setup #define MICROPY_HW_BOARD_NAME "Fomu" #define MICROPY_HW_MCU_NAME "VexRiscv" #define FLASH_SIZE (0x100000) #define FLASH_PAGE_SIZE (0x1000) -#define FLASH_PARTITION_OFFSET_BYTES (1024*1024) +#define FLASH_PARTITION_OFFSET_BYTES (1024 * 1024) #define AUTORESET_DELAY_MS 500 #define BOARD_FLASH_SIZE (FLASH_SIZE) diff --git a/ports/litex/boards/fomu/pins.c b/ports/litex/boards/fomu/pins.c index 6be495c33..804a8b37f 100644 --- a/ports/litex/boards/fomu/pins.c +++ b/ports/litex/boards/fomu/pins.c @@ -1,9 +1,9 @@ #include "shared-bindings/board/__init__.h" STATIC const mp_rom_map_elem_t board_global_dict_table[] = { - { MP_ROM_QSTR(MP_QSTR_TOUCH1), MP_ROM_PTR(&pin_TOUCH1) }, - { MP_ROM_QSTR(MP_QSTR_TOUCH2), MP_ROM_PTR(&pin_TOUCH2) }, - { MP_ROM_QSTR(MP_QSTR_TOUCH3), MP_ROM_PTR(&pin_TOUCH3) }, - { MP_ROM_QSTR(MP_QSTR_TOUCH4), MP_ROM_PTR(&pin_TOUCH4) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH1), MP_ROM_PTR(&pin_TOUCH1) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH2), MP_ROM_PTR(&pin_TOUCH2) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH3), MP_ROM_PTR(&pin_TOUCH3) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH4), MP_ROM_PTR(&pin_TOUCH4) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); diff --git a/ports/litex/common-hal/digitalio/DigitalInOut.c b/ports/litex/common-hal/digitalio/DigitalInOut.c index 53df637c4..96cc95dfa 100644 --- a/ports/litex/common-hal/digitalio/DigitalInOut.c +++ b/ports/litex/common-hal/digitalio/DigitalInOut.c @@ -32,12 +32,12 @@ #include "csr.h" void common_hal_digitalio_digitalinout_never_reset( - digitalio_digitalinout_obj_t *self) { + digitalio_digitalinout_obj_t *self) { (void)self; } digitalinout_result_t common_hal_digitalio_digitalinout_construct( - digitalio_digitalinout_obj_t *self, const mcu_pin_obj_t *pin) { + digitalio_digitalinout_obj_t *self, const mcu_pin_obj_t *pin) { // claim_pin(pin); self->pin = pin; @@ -59,14 +59,14 @@ void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self } void common_hal_digitalio_digitalinout_switch_to_input( - digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { (void)pull; touch_oe_write(touch_oe_read() & ~(1 << self->pin->number)); } digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_output( - digitalio_digitalinout_obj_t *self, bool value, - digitalio_drive_mode_t drive_mode) { + digitalio_digitalinout_obj_t *self, bool value, + digitalio_drive_mode_t drive_mode) { (void)drive_mode; common_hal_digitalio_digitalinout_set_value(self, value); touch_oe_write(touch_oe_read() | (1 << self->pin->number)); @@ -74,48 +74,50 @@ digitalinout_result_t common_hal_digitalio_digitalinout_switch_to_output( } digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( - digitalio_digitalinout_obj_t *self) { + digitalio_digitalinout_obj_t *self) { return (touch_oe_read() & (1 << self->pin->number)) ? DIRECTION_OUTPUT : DIRECTION_INPUT; } void common_hal_digitalio_digitalinout_set_value( - digitalio_digitalinout_obj_t *self, bool value) { - if (value) + digitalio_digitalinout_obj_t *self, bool value) { + if (value) { touch_o_write(touch_o_read() | (1 << self->pin->number)); - else + } else { touch_o_write(touch_o_read() & ~(1 << self->pin->number)); + } } bool common_hal_digitalio_digitalinout_get_value( - digitalio_digitalinout_obj_t *self) { + digitalio_digitalinout_obj_t *self) { return !!(touch_i_read() & (1 << self->pin->number)); } digitalinout_result_t common_hal_digitalio_digitalinout_set_drive_mode( - digitalio_digitalinout_obj_t *self, - digitalio_drive_mode_t drive_mode) { + digitalio_digitalinout_obj_t *self, + digitalio_drive_mode_t drive_mode) { (void)self; (void)drive_mode; return DIGITALINOUT_OK; } digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( - digitalio_digitalinout_obj_t *self) { - if (common_hal_digitalio_digitalinout_get_direction(self) == DIRECTION_OUTPUT) + digitalio_digitalinout_obj_t *self) { + if (common_hal_digitalio_digitalinout_get_direction(self) == DIRECTION_OUTPUT) { return DRIVE_MODE_PUSH_PULL; - else + } else { return DRIVE_MODE_OPEN_DRAIN; + } } void common_hal_digitalio_digitalinout_set_pull( - digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { + digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { (void)self; (void)pull; } digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( - digitalio_digitalinout_obj_t *self) { + digitalio_digitalinout_obj_t *self) { return PULL_NONE; } diff --git a/ports/litex/common-hal/microcontroller/Pin.c b/ports/litex/common-hal/microcontroller/Pin.c index 4d088a076..1cc4c41d5 100644 --- a/ports/litex/common-hal/microcontroller/Pin.c +++ b/ports/litex/common-hal/microcontroller/Pin.c @@ -38,27 +38,27 @@ void reset_pin_number(uint8_t pin_port, uint8_t pin_number) { } // Clear claimed bit. - claimed_pins[pin_port] &= ~(1<<pin_number); + claimed_pins[pin_port] &= ~(1 << pin_number); } -void common_hal_reset_pin(const mcu_pin_obj_t* pin) { +void common_hal_reset_pin(const mcu_pin_obj_t *pin) { if (pin == NULL) { return; } reset_pin_number(0, pin->number); } -void claim_pin(const mcu_pin_obj_t* pin) { +void claim_pin(const mcu_pin_obj_t *pin) { // Set bit in claimed_pins bitmask. - claimed_pins[0] |= 1<<pin->number; + claimed_pins[0] |= 1 << pin->number; } -void common_hal_mcu_pin_claim(const mcu_pin_obj_t* pin) { +void common_hal_mcu_pin_claim(const mcu_pin_obj_t *pin) { claim_pin(pin); } bool pin_number_is_free(uint8_t pin_port, uint8_t pin_number) { - return !(claimed_pins[pin_port] & 1<<pin_number); + return !(claimed_pins[pin_port] & 1 << pin_number); } bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) { diff --git a/ports/litex/common-hal/microcontroller/Pin.h b/ports/litex/common-hal/microcontroller/Pin.h index 186e120a2..522191f3c 100644 --- a/ports/litex/common-hal/microcontroller/Pin.h +++ b/ports/litex/common-hal/microcontroller/Pin.h @@ -36,10 +36,10 @@ typedef struct { } mcu_pin_obj_t; #define PIN(p_number) \ -{ \ - { &mcu_pin_type }, \ - .number = p_number \ -} + { \ + { &mcu_pin_type }, \ + .number = p_number \ + } extern const mcu_pin_obj_t pin_TOUCH1; extern const mcu_pin_obj_t pin_TOUCH2; @@ -50,7 +50,7 @@ void reset_all_pins(void); // reset_pin_number takes the pin number instead of the pointer so that objects don't // need to store a full pointer. void reset_pin_number(uint8_t pin_port, uint8_t pin_number); -void claim_pin(const mcu_pin_obj_t* pin); +void claim_pin(const mcu_pin_obj_t *pin); bool pin_number_is_free(uint8_t pin_port, uint8_t pin_number); void never_reset_pin_number(uint8_t pin_port, uint8_t pin_number); // GPIO_TypeDef * pin_port(uint8_t pin_port); diff --git a/ports/litex/common-hal/microcontroller/__init__.c b/ports/litex/common-hal/microcontroller/__init__.c index 522a41e2e..0a496d804 100644 --- a/ports/litex/common-hal/microcontroller/__init__.c +++ b/ports/litex/common-hal/microcontroller/__init__.c @@ -72,7 +72,7 @@ void common_hal_mcu_enable_interrupts(void) { if (nesting_count == 0) { // This is very very bad because it means there was mismatched disable/enables so we // "HardFault". - asm("ebreak"); + asm ("ebreak"); } nesting_count--; if (nesting_count > 0) { @@ -82,14 +82,17 @@ void common_hal_mcu_enable_interrupts(void) { } void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { - if(runmode == RUNMODE_SAFE_MODE) + if (runmode == RUNMODE_SAFE_MODE) { safe_mode_on_next_reset(PROGRAMMATIC_SAFE_MODE); + } } void common_hal_mcu_reset(void) { - filesystem_flush(); //TODO: implement as part of flash improvements + filesystem_flush(); // TODO: implement as part of flash improvements // NVIC_SystemReset(); - while(1); + while (1) { + ; + } } // The singleton microcontroller.Processor object, bound to microcontroller.cpu @@ -106,9 +109,9 @@ const mcu_pin_obj_t pin_TOUCH3 = PIN(2); const mcu_pin_obj_t pin_TOUCH4 = PIN(3); STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { - { MP_ROM_QSTR(MP_QSTR_TOUCH1), MP_ROM_PTR(&pin_TOUCH1) }, - { MP_ROM_QSTR(MP_QSTR_TOUCH2), MP_ROM_PTR(&pin_TOUCH2) }, - { MP_ROM_QSTR(MP_QSTR_TOUCH3), MP_ROM_PTR(&pin_TOUCH3) }, - { MP_ROM_QSTR(MP_QSTR_TOUCH4), MP_ROM_PTR(&pin_TOUCH4) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH1), MP_ROM_PTR(&pin_TOUCH1) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH2), MP_ROM_PTR(&pin_TOUCH2) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH3), MP_ROM_PTR(&pin_TOUCH3) }, + { MP_ROM_QSTR(MP_QSTR_TOUCH4), MP_ROM_PTR(&pin_TOUCH4) }, }; MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/litex/common-hal/neopixel_write/__init__.c b/ports/litex/common-hal/neopixel_write/__init__.c index 29fd318d4..e7e5600fb 100644 --- a/ports/litex/common-hal/neopixel_write/__init__.c +++ b/ports/litex/common-hal/neopixel_write/__init__.c @@ -60,8 +60,9 @@ static void ledda_write(uint8_t value, uint8_t addr) { static int ledda_init_done; static void ledda_init(void) { - if (ledda_init_done) + if (ledda_init_done) { return; + } // Enable the driver rgb_ctrl_write((1 << CSR_RGB_CTRL_EXE_OFFSET) | (1 << CSR_RGB_CTRL_CURREN_OFFSET) | (1 << CSR_RGB_CTRL_RGBLEDEN_OFFSET)); @@ -69,7 +70,7 @@ static void ledda_init(void) { ledda_write(LEDDCR0_LEDDEN | LEDDCR0_FR250 | LEDDCR0_QUICKSTOP, LEDDCR0); // Set clock register to 12 MHz / 64 kHz - 1 - ledda_write((12000000/64000)-1, LEDDBR); + ledda_write((12000000 / 64000) - 1, LEDDBR); // Ensure LED "breathe" effect is diabled ledda_write(0, LEDDBCRR); @@ -82,7 +83,7 @@ static void ledda_init(void) { ledda_init_done = 1; } -void common_hal_neopixel_write (const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, uint32_t numBytes) { +void common_hal_neopixel_write(const digitalio_digitalinout_obj_t *digitalinout, uint8_t *pixels, uint32_t numBytes) { (void)digitalinout; (void)numBytes; ledda_init(); diff --git a/ports/litex/common-hal/os/__init__.c b/ports/litex/common-hal/os/__init__.c index 578f3e8c6..c070c2777 100644 --- a/ports/litex/common-hal/os/__init__.c +++ b/ports/litex/common-hal/os/__init__.c @@ -50,12 +50,12 @@ STATIC MP_DEFINE_ATTRTUPLE( (mp_obj_t)&os_uname_info_release_obj, (mp_obj_t)&os_uname_info_version_obj, (mp_obj_t)&os_uname_info_machine_obj -); + ); mp_obj_t common_hal_os_uname(void) { return (mp_obj_t)&os_uname_info_obj; } -bool common_hal_os_urandom(uint8_t* buffer, uint32_t length) { +bool common_hal_os_urandom(uint8_t *buffer, uint32_t length) { return false; } diff --git a/ports/litex/common-hal/supervisor/Runtime.c b/ports/litex/common-hal/supervisor/Runtime.c index 974f26cec..f82765178 100644 --- a/ports/litex/common-hal/supervisor/Runtime.c +++ b/ports/litex/common-hal/supervisor/Runtime.c @@ -29,9 +29,9 @@ #include "supervisor/serial.h" bool common_hal_supervisor_runtime_get_serial_connected(void) { - return (bool) serial_connected(); + return (bool)serial_connected(); } bool common_hal_supervisor_runtime_get_serial_bytes_available(void) { - return (bool) serial_bytes_available(); + return (bool)serial_bytes_available(); } diff --git a/ports/litex/fatfs_port.c b/ports/litex/fatfs_port.c index 8bdc047c1..631f7f098 100644 --- a/ports/litex/fatfs_port.c +++ b/ports/litex/fatfs_port.c @@ -28,6 +28,6 @@ #include "lib/oofatfs/ff.h" DWORD get_fattime(void) { - // TODO: Implement this function. For now, fake it. + // TODO: Implement this function. For now, fake it. return ((2016 - 1980) << 25) | ((12) << 21) | ((4) << 16) | ((00) << 11) | ((18) << 5) | (23 / 2); } diff --git a/ports/litex/hw/common.h b/ports/litex/hw/common.h index b902bc4f2..8b3a0304e 100644 --- a/ports/litex/hw/common.h +++ b/ports/litex/hw/common.h @@ -1,33 +1,27 @@ #ifndef _HW_COMMON_H_ #define _HW_COMMON_H_ #include <stdint.h> -static inline void csr_writeb(uint8_t value, uint32_t addr) -{ - *((volatile uint8_t *)addr) = value; +static inline void csr_writeb(uint8_t value, uint32_t addr) { + *((volatile uint8_t *)addr) = value; } -static inline uint8_t csr_readb(uint32_t addr) -{ - return *(volatile uint8_t *)addr; +static inline uint8_t csr_readb(uint32_t addr) { + return *(volatile uint8_t *)addr; } -static inline void csr_writew(uint16_t value, uint32_t addr) -{ - *((volatile uint16_t *)addr) = value; +static inline void csr_writew(uint16_t value, uint32_t addr) { + *((volatile uint16_t *)addr) = value; } -static inline uint16_t csr_readw(uint32_t addr) -{ - return *(volatile uint16_t *)addr; +static inline uint16_t csr_readw(uint32_t addr) { + return *(volatile uint16_t *)addr; } -static inline void csr_writel(uint32_t value, uint32_t addr) -{ - *((volatile uint32_t *)addr) = value; +static inline void csr_writel(uint32_t value, uint32_t addr) { + *((volatile uint32_t *)addr) = value; } -static inline uint32_t csr_readl(uint32_t addr) -{ - return *(volatile uint32_t *)addr; +static inline uint32_t csr_readl(uint32_t addr) { + return *(volatile uint32_t *)addr; } #endif /* _HW_COMMON_H_ */ diff --git a/ports/litex/irq.h b/ports/litex/irq.h index dc96c228d..34c8b0a10 100644 --- a/ports/litex/irq.h +++ b/ports/litex/irq.h @@ -14,54 +14,53 @@ extern "C" { #define CSR_DCACHE_INFO 0xCC0 #define csrr(reg) ({ unsigned long __tmp; \ - asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \ - __tmp; }) + asm volatile ("csrr %0, " #reg : "=r" (__tmp)); \ + __tmp; }) #define csrw(reg, val) ({ \ - if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \ - asm volatile ("csrw " #reg ", %0" :: "i"(val)); \ - else \ - asm volatile ("csrw " #reg ", %0" :: "r"(val)); }) + if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \ + asm volatile ("csrw " #reg ", %0" : : "i" (val)); \ + else \ + asm volatile ("csrw " #reg ", %0" : : "r" (val)); }) #define csrs(reg, bit) ({ \ - if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \ - asm volatile ("csrrs x0, " #reg ", %0" :: "i"(bit)); \ - else \ - asm volatile ("csrrs x0, " #reg ", %0" :: "r"(bit)); }) + if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \ + asm volatile ("csrrs x0, " #reg ", %0" : : "i" (bit)); \ + else \ + asm volatile ("csrrs x0, " #reg ", %0" : : "r" (bit)); }) #define csrc(reg, bit) ({ \ - if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \ - asm volatile ("csrrc x0, " #reg ", %0" :: "i"(bit)); \ - else \ - asm volatile ("csrrc x0, " #reg ", %0" :: "r"(bit)); }) - -static inline unsigned int irq_getie(void) -{ - return (csrr(mstatus) & CSR_MSTATUS_MIE) != 0; + if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \ + asm volatile ("csrrc x0, " #reg ", %0" : : "i" (bit)); \ + else \ + asm volatile ("csrrc x0, " #reg ", %0" : : "r" (bit)); }) + +static inline unsigned int irq_getie(void) { + return (csrr(mstatus) & CSR_MSTATUS_MIE) != 0; } -static inline void irq_setie(unsigned int ie) -{ - if(ie) csrs(mstatus,CSR_MSTATUS_MIE); else csrc(mstatus,CSR_MSTATUS_MIE); +static inline void irq_setie(unsigned int ie) { + if (ie) { + csrs(mstatus,CSR_MSTATUS_MIE); + } else { + csrc(mstatus,CSR_MSTATUS_MIE); + } } -static inline unsigned int irq_getmask(void) -{ - unsigned int mask; - asm volatile ("csrr %0, %1" : "=r"(mask) : "i"(CSR_IRQ_MASK)); - return mask; +static inline unsigned int irq_getmask(void) { + unsigned int mask; + asm volatile ("csrr %0, %1" : "=r" (mask) : "i" (CSR_IRQ_MASK)); + return mask; } -static inline void irq_setmask(unsigned int mask) -{ - asm volatile ("csrw %0, %1" :: "i"(CSR_IRQ_MASK), "r"(mask)); +static inline void irq_setmask(unsigned int mask) { + asm volatile ("csrw %0, %1" : : "i" (CSR_IRQ_MASK), "r" (mask)); } -static inline unsigned int irq_pending(void) -{ - unsigned int pending; - asm volatile ("csrr %0, %1" : "=r"(pending) : "i"(CSR_IRQ_PENDING)); - return pending; +static inline unsigned int irq_pending(void) { + unsigned int pending; + asm volatile ("csrr %0, %1" : "=r" (pending) : "i" (CSR_IRQ_PENDING)); + return pending; } #ifdef __cplusplus diff --git a/ports/litex/mpconfigport.h b/ports/litex/mpconfigport.h index 5f739e49e..cedc3badc 100644 --- a/ports/litex/mpconfigport.h +++ b/ports/litex/mpconfigport.h @@ -35,7 +35,7 @@ #include "py/circuitpy_mpconfig.h" #define MICROPY_PORT_ROOT_POINTERS \ - CIRCUITPY_COMMON_ROOT_POINTERS + CIRCUITPY_COMMON_ROOT_POINTERS #define MICROPY_NLR_SETJMP (1) #define CIRCUITPY_DEFAULT_STACK_SIZE 0x6000 diff --git a/ports/litex/mphalport.c b/ports/litex/mphalport.c index c7369dc05..5eedc73f3 100644 --- a/ports/litex/mphalport.c +++ b/ports/litex/mphalport.c @@ -60,12 +60,14 @@ void isr(void) { // Increase the "nesting count". Note: This should be going from 0 -> 1. nesting_count += 1; -#ifdef CFG_TUSB_MCU - if (irqs & (1 << USB_INTERRUPT)) + #ifdef CFG_TUSB_MCU + if (irqs & (1 << USB_INTERRUPT)) { usb_irq_handler(); -#endif - if (irqs & (1 << TIMER0_INTERRUPT)) + } + #endif + if (irqs & (1 << TIMER0_INTERRUPT)) { SysTick_Handler(); + } // Decrease the "nesting count". Note: This should be going from 1 -> 0. nesting_count -= 1; @@ -73,6 +75,6 @@ void isr(void) { mp_uint_t cpu_get_regs_and_sp(mp_uint_t *regs) { unsigned long __tmp; - asm volatile ("mv %0, x2" :"=r"(__tmp)); + asm volatile ("mv %0, x2" : "=r" (__tmp)); return __tmp; } diff --git a/ports/litex/mphalport.h b/ports/litex/mphalport.h index 540575c58..62c8e0bab 100644 --- a/ports/litex/mphalport.h +++ b/ports/litex/mphalport.h @@ -34,8 +34,8 @@ #include "py/mpconfig.h" #include "supervisor/shared/tick.h" -#define mp_hal_ticks_ms() ((mp_uint_t) supervisor_ticks_ms32()) -//#define mp_hal_delay_us(us) NRFX_DELAY_US((uint32_t) (us)) +#define mp_hal_ticks_ms() ((mp_uint_t)supervisor_ticks_ms32()) +// #define mp_hal_delay_us(us) NRFX_DELAY_US((uint32_t) (us)) bool mp_hal_stdin_any(void); diff --git a/ports/litex/supervisor/internal_flash.c b/ports/litex/supervisor/internal_flash.c index 9b1dea685..989fffcc4 100644 --- a/ports/litex/supervisor/internal_flash.c +++ b/ports/litex/supervisor/internal_flash.c @@ -53,9 +53,9 @@ enum pin { #define NO_CACHE 0xffffffff -static uint8_t _flash_cache[FLASH_PAGE_SIZE] __attribute__((aligned(4))); +static uint8_t _flash_cache[FLASH_PAGE_SIZE] __attribute__((aligned(4))); static uint32_t _flash_page_addr = NO_CACHE; -static bool _flash_cache_dirty; +static bool _flash_cache_dirty; // ------------------------------------------------------------------------- // When performing SPI operations, the flash cannot be accessed. Since we // normally execute directly from SPI, this can cause problems. @@ -65,14 +65,12 @@ static bool _flash_cache_dirty; // Therefore, we must re-implement these functions here and explicitly mark // them as being in `.ramtext`, even though they really ought to be inlined. __attribute__((section(".ramtext"))) -static inline void spi_writel(uint32_t value, uint32_t addr) -{ +static inline void spi_writel(uint32_t value, uint32_t addr) { *((volatile uint32_t *)addr) = value; } __attribute__((section(".ramtext"))) -static inline uint32_t spi_readl(uint32_t addr) -{ +static inline uint32_t spi_readl(uint32_t addr) { return *(volatile uint32_t *)addr; } @@ -92,9 +90,12 @@ static inline void bb_spi_en(unsigned int en) { } __attribute__((section(".ramtext"))) -static inline void bb_spi_irq_setie(unsigned int ie) -{ - if(ie) csrs(mstatus,CSR_MSTATUS_MIE); else csrc(mstatus,CSR_MSTATUS_MIE); +static inline void bb_spi_irq_setie(unsigned int ie) { + if (ie) { + csrs(mstatus,CSR_MSTATUS_MIE); + } else { + csrc(mstatus,CSR_MSTATUS_MIE); + } } __attribute__((section(".ramtext"))) @@ -162,14 +163,14 @@ static int bb_spi_beginWrite(uint32_t addr, const void *v_data, unsigned int cou const uint8_t *data = v_data; unsigned int i; -#ifdef NDEBUG + #ifdef NDEBUG if (v_data < (const void *)_flash_cache) { - asm("ebreak"); + asm ("ebreak"); } - if ((v_data+count) > (const void *)&_flash_cache[4096]) { - asm("ebreak"); + if ((v_data + count) > (const void *)&_flash_cache[4096]) { + asm ("ebreak"); } -#endif + #endif // Enable Write-Enable Latch (WEL) bb_spi_begin(); @@ -181,8 +182,9 @@ static int bb_spi_beginWrite(uint32_t addr, const void *v_data, unsigned int cou spi_single_tx(addr >> 16); spi_single_tx(addr >> 8); spi_single_tx(addr >> 0); - for (i = 0; (i < count) && (i < 256); i++) + for (i = 0; (i < count) && (i < 256); i++) { spi_single_tx(*data++); + } bb_spi_end(); return 0; @@ -215,41 +217,46 @@ static void bb_spi_write_page(uint32_t flash_address, const uint8_t *data) { // Ensure we're within the target flash address range. if ((flash_address - FLASH_PARTITION_OFFSET_BYTES) > FLASH_SIZE) { - asm("ebreak"); + asm ("ebreak"); return; } if (flash_address < FLASH_PARTITION_OFFSET_BYTES) { - asm("ebreak"); + asm ("ebreak"); return; } if ((flash_address_end - FLASH_PARTITION_OFFSET_BYTES) > FLASH_SIZE) { - asm("ebreak"); + asm ("ebreak"); return; } if (flash_address_end < FLASH_PARTITION_OFFSET_BYTES) { - asm("ebreak"); + asm ("ebreak"); return; } // Ensure we're not erasing the middle of a flash bank if ((flash_address & 0xfff) != 0) { - asm("ebreak"); + asm ("ebreak"); return; } page_write_log[page_write_log_offset++] = flash_address; - if (page_write_log_offset > sizeof(page_write_log)/sizeof(*page_write_log)) page_write_log_offset=0; + if (page_write_log_offset > sizeof(page_write_log) / sizeof(*page_write_log)) { + page_write_log_offset = 0; + } - while (bb_spi_is_busy()) + while (bb_spi_is_busy()) { ; // relax + } bb_spi_beginErase4(flash_address); - while (bb_spi_is_busy()) + while (bb_spi_is_busy()) { ; // relax + } while (flash_address < flash_address_end) { bb_spi_beginWrite(flash_address, data, 256); - while (bb_spi_is_busy()) + while (bb_spi_is_busy()) { ; // relax + } flash_address += 256; data += 256; } @@ -267,16 +274,18 @@ uint32_t supervisor_flash_get_block_size(void) { } uint32_t supervisor_flash_get_block_count(void) { - return FLASH_SIZE/FILESYSTEM_BLOCK_SIZE; + return FLASH_SIZE / FILESYSTEM_BLOCK_SIZE; } __attribute__((section(".ramtext"))) void port_internal_flash_flush(void) { // Skip if data is the same, or if there is no data in the cache - if (_flash_page_addr == NO_CACHE) + if (_flash_page_addr == NO_CACHE) { return; - if (!_flash_cache_dirty) + } + if (!_flash_cache_dirty) { return; + } // Disable interrupts and enable bit-bang mode on the SPI flash. // This function is running from RAM -- otherwise enabling bitbang mode @@ -291,7 +300,7 @@ void port_internal_flash_flush(void) { bb_spi_en(0); bb_spi_irq_setie(1); - _flash_cache_dirty = false; + _flash_cache_dirty = false; } mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t num_blocks) { @@ -299,7 +308,7 @@ mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t n supervisor_flash_flush(); uint32_t src = lba2addr(block); - memcpy(dest, (uint8_t*) src, FILESYSTEM_BLOCK_SIZE*num_blocks); + memcpy(dest, (uint8_t *)src, FILESYSTEM_BLOCK_SIZE * num_blocks); #if USB_AVAILABLE usb_background(); @@ -310,7 +319,7 @@ mp_uint_t supervisor_flash_read_blocks(uint8_t *dest, uint32_t block, uint32_t n mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32_t num_blocks) { while (num_blocks) { - uint32_t const addr = lba2addr(lba); + uint32_t const addr = lba2addr(lba); uint32_t const page_addr = addr & ~(FLASH_PAGE_SIZE - 1); uint32_t count = 8 - (lba % 8); // up to page boundary @@ -334,8 +343,8 @@ mp_uint_t supervisor_flash_write_blocks(const uint8_t *src, uint32_t lba, uint32 } // adjust for next run - lba += count; - src += count * FILESYSTEM_BLOCK_SIZE; + lba += count; + src += count * FILESYSTEM_BLOCK_SIZE; num_blocks -= count; #if USB_AVAILABLE diff --git a/ports/litex/supervisor/port.c b/ports/litex/supervisor/port.c index 04ff1c09b..6f108ee05 100644 --- a/ports/litex/supervisor/port.c +++ b/ports/litex/supervisor/port.c @@ -87,7 +87,7 @@ void reset_port(void) { void reset_to_bootloader(void) { reboot_ctrl_write(0xac); - for(;;) {} + for (;;) {} } void reset_cpu(void) { @@ -97,7 +97,7 @@ void reset_cpu(void) { // simply writing this value" -- // https://workshop.fomu.im/en/latest/riscv.html reboot_ctrl_write(0xac); - for(;;) {} + for (;;) {} } bool port_has_fixed_stack(void) { @@ -129,7 +129,7 @@ uint32_t port_get_saved_word(void) { return _ebss; } -uint64_t port_get_raw_ticks(uint8_t* subticks) { +uint64_t port_get_raw_ticks(uint8_t *subticks) { // Reading 64 bits may take two loads, so turn of interrupts while we do it. common_hal_mcu_disable_interrupts(); uint64_t raw_tick_snapshot = raw_ticks; |
