diff options
| author | Dan Halbert <halbert@halwitz.org> | 2020-01-31 18:57:41 -0500 |
|---|---|---|
| committer | Dan Halbert <halbert@halwitz.org> | 2020-01-31 18:57:41 -0500 |
| commit | be4e681d07cb89228dbf3f623b202413eb5cd19e (patch) | |
| tree | e5f8fbe7ddb236b4cf7f1841455bd04d1bb4c219 /ports/nrf | |
| parent | 8258cb851e63f5363803b3c9f807204b38ee6c4d (diff) | |
fix UICR check; do not use NULL for no MISO
Diffstat (limited to 'ports/nrf')
| -rw-r--r-- | ports/nrf/boards/clue_nrf52840_express/board.c | 2 | ||||
| -rw-r--r-- | ports/nrf/boards/ohs2020_badge/board.c | 2 | ||||
| -rw-r--r-- | ports/nrf/common-hal/busio/SPI.c | 4 | ||||
| -rw-r--r-- | ports/nrf/peripherals/nrf/nrf52840/power.c | 18 |
4 files changed, 18 insertions, 8 deletions
diff --git a/ports/nrf/boards/clue_nrf52840_express/board.c b/ports/nrf/boards/clue_nrf52840_express/board.c index c118fe92f..abc4e3cfa 100644 --- a/ports/nrf/boards/clue_nrf52840_express/board.c +++ b/ports/nrf/boards/clue_nrf52840_express/board.c @@ -49,7 +49,7 @@ uint8_t display_init_sequence[] = { void board_init(void) { busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, NULL); + common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, mp_const_none); common_hal_busio_spi_never_reset(spi); displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; diff --git a/ports/nrf/boards/ohs2020_badge/board.c b/ports/nrf/boards/ohs2020_badge/board.c index 189f7acdf..457edf44a 100644 --- a/ports/nrf/boards/ohs2020_badge/board.c +++ b/ports/nrf/boards/ohs2020_badge/board.c @@ -49,7 +49,7 @@ uint8_t display_init_sequence[] = { void board_init(void) { busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus; - common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, NULL); + common_hal_busio_spi_construct(spi, &pin_P0_14, &pin_P0_15, mp_const_none); common_hal_busio_spi_never_reset(spi); displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus; diff --git a/ports/nrf/common-hal/busio/SPI.c b/ports/nrf/common-hal/busio/SPI.c index 639bbcdd0..8e1d73bf0 100644 --- a/ports/nrf/common-hal/busio/SPI.c +++ b/ports/nrf/common-hal/busio/SPI.c @@ -143,7 +143,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * self->clock_pin_number = clock->number; claim_pin(clock); - if (mosi != (mcu_pin_obj_t*)&mp_const_none_obj) { + if (mosi != mp_const_none) { config.mosi_pin = mosi->number; self->MOSI_pin_number = mosi->number; claim_pin(mosi); @@ -151,7 +151,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * self->MOSI_pin_number = NO_PIN; } - if (miso != (mcu_pin_obj_t*)&mp_const_none_obj) { + if (miso != mp_const_none) { config.miso_pin = miso->number; self->MISO_pin_number = mosi->number; claim_pin(miso); diff --git a/ports/nrf/peripherals/nrf/nrf52840/power.c b/ports/nrf/peripherals/nrf/nrf52840/power.c index 794872c5d..d64c536bb 100644 --- a/ports/nrf/peripherals/nrf/nrf52840/power.c +++ b/ports/nrf/peripherals/nrf/nrf52840/power.c @@ -25,16 +25,26 @@ */ #include "nrfx.h" -#include "nrfx_nvmc.h" +#include "hal/nrf_nvmc.h" void nrf_peripherals_power_init(void) { // Set GPIO reference voltage to 3.3V if it isn't already. REGOUT0 will get reset to 0xfffffff // if flash is erased, which sets the default to 1.8V // This matters only when "high voltage mode" is enabled, which is true on the PCA10059, // and might be true on other boards. - if (NRF_UICR->REGOUT0 == 0xffffffff) { - nrfx_nvmc_word_write((uint32_t) &NRF_UICR->REGOUT0, UICR_REGOUT0_VOUT_3V3 << UICR_REGOUT0_VOUT_Pos); - // Must reset to make enable change. + if (NRF_UICR->REGOUT0 == 0xffffffff && NRF_POWER->MAINREGSTATUS & 1) { + // Expand what nrf_nvmc_word_write() did. + // It's missing from nrfx V2.0.0, and nrfx_nvmc_word_write() does bounds + // checking which prevents writes to UICR. + // Reported: https://devzone.nordicsemi.com/f/nordic-q-a/57243/nrfx_nvmc-h-api-cannot-write-to-uicr + NRF_NVMC->CONFIG = NRF_NVMC_MODE_WRITE; + while (!(NRF_NVMC->READY & NVMC_READY_READY_Msk)) {} + NRF_UICR->REGOUT0 = UICR_REGOUT0_VOUT_3V3 << UICR_REGOUT0_VOUT_Pos; + __DMB(); + while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {} + NRF_NVMC->CONFIG = NRF_NVMC_MODE_READONLY; + + // Must reset to enable change. NVIC_SystemReset(); } } |
