summaryrefslogtreecommitdiff
path: root/ports/nrf
diff options
context:
space:
mode:
authorScott Shawcroft <scott@adafruit.com>2020-12-21 17:39:08 -0800
committerGitHub <noreply@github.com>2020-12-21 17:39:08 -0800
commitfb0c74c5f1ab9d7d319caf898bdae30ce57a61af (patch)
treed7993cc7d33f80e56cd627147a0a346cf3e2ef47 /ports/nrf
parent233ccaac58c180731ef7e088a3159ddc6c745305 (diff)
parentd24a5d62700252a49152ed2bc6af0b9b3025344e (diff)
Merge pull request #3662 from ElectronicCats/bastble
Add new board BastBLE
Diffstat (limited to 'ports/nrf')
-rw-r--r--ports/nrf/boards/bastble/README.md4
-rw-r--r--ports/nrf/boards/bastble/board.c41
-rw-r--r--ports/nrf/boards/bastble/mpconfigboard.h25
-rw-r--r--ports/nrf/boards/bastble/mpconfigboard.mk10
-rw-r--r--ports/nrf/boards/bastble/pins.c47
5 files changed, 127 insertions, 0 deletions
diff --git a/ports/nrf/boards/bastble/README.md b/ports/nrf/boards/bastble/README.md
new file mode 100644
index 000000000..0af6209bd
--- /dev/null
+++ b/ports/nrf/boards/bastble/README.md
@@ -0,0 +1,4 @@
+# Electronic Cats BastBLE
+
+The [BastBLE](https://electroniccats.com/store/bast-ble/) based on Nordic nRF 52840 and containing
+a powerful Cortex M4F. This board include a external memory QSPI flash.
diff --git a/ports/nrf/boards/bastble/board.c b/ports/nrf/boards/bastble/board.c
new file mode 100644
index 000000000..b6fb04f06
--- /dev/null
+++ b/ports/nrf/boards/bastble/board.c
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "supervisor/board.h"
+#include "nrf.h"
+#include "nrf_rtc.h"
+
+void board_init(void) {
+
+}
+
+bool board_requests_safe_mode(void) {
+ return false;
+}
+
+void reset_board(void) {
+
+}
diff --git a/ports/nrf/boards/bastble/mpconfigboard.h b/ports/nrf/boards/bastble/mpconfigboard.h
new file mode 100644
index 000000000..e36227c6b
--- /dev/null
+++ b/ports/nrf/boards/bastble/mpconfigboard.h
@@ -0,0 +1,25 @@
+#include "nrfx/hal/nrf_gpio.h"
+
+#define MICROPY_HW_BOARD_NAME "BastBLE"
+#define MICROPY_HW_MCU_NAME "nRF52840"
+
+#define CIRCUITPY_AUTORELOAD_DELAY_MS 500
+
+#if QSPI_FLASH_FILESYSTEM
+#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 30)
+#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 29)
+#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 28)
+#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 2)
+#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 3)
+#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 26)
+#endif
+
+#define DEFAULT_I2C_BUS_SCL (&pin_P1_10)
+#define DEFAULT_I2C_BUS_SDA (&pin_P1_11)
+
+#define DEFAULT_SPI_BUS_SCK (&pin_P1_00)
+#define DEFAULT_SPI_BUS_MOSI (&pin_P1_06)
+#define DEFAULT_SPI_BUS_MISO (&pin_P0_15)
+
+#define DEFAULT_UART_BUS_RX (&pin_P0_09)
+#define DEFAULT_UART_BUS_TX (&pin_P0_10)
diff --git a/ports/nrf/boards/bastble/mpconfigboard.mk b/ports/nrf/boards/bastble/mpconfigboard.mk
new file mode 100644
index 000000000..eca900de7
--- /dev/null
+++ b/ports/nrf/boards/bastble/mpconfigboard.mk
@@ -0,0 +1,10 @@
+USB_VID = 0x1209
+USB_PID = 0x805A
+USB_PRODUCT = "BastBLE"
+USB_MANUFACTURER = "ElectronicCats"
+
+MCU_CHIP = nrf52840
+
+QSPI_FLASH_FILESYSTEM = 1
+EXTERNAL_FLASH_DEVICE_COUNT = 1
+EXTERNAL_FLASH_DEVICES = "GD25Q16C"
diff --git a/ports/nrf/boards/bastble/pins.c b/ports/nrf/boards/bastble/pins.c
new file mode 100644
index 000000000..b35dad43d
--- /dev/null
+++ b/ports/nrf/boards/bastble/pins.c
@@ -0,0 +1,47 @@
+#include "shared-bindings/board/__init__.h"
+
+STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
+ { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P1_11) },
+ { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P1_10) },
+ { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P1_00) },
+ { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_02) },
+ { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P1_13) },
+ { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P1_06) },
+ { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P0_15) },
+ { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P0_06) },
+ { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P1_09) },
+ { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P0_08) },
+ { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_26) },
+ { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P0_07) },
+
+ { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_02) },
+ { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_28) },
+ { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_05) },
+ { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_03) },
+
+ { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_30) },
+ { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P1_11) },
+
+ { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_29) },
+ { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P1_10) },
+
+ { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P1_06) },
+ { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_15) },
+
+ { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P1_00) },
+ { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_P0_24) },
+
+ { MP_ROM_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_P0_31) },
+
+ // voltage sense battery
+ { MP_ROM_QSTR(MP_QSTR_VBAT), MP_ROM_PTR(&pin_P0_26) },
+
+ { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_10) },
+ { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_09) },
+
+ { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+ { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
+ { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
+};
+
+MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);