merged master

23 files changed, 191 insertions, 58 deletions

diff --git a/ports/stm/boards/STM32F401xd_fs.ld b/ports/stm/boards/STM32F401xd_fs.ld
index 3086c2c6b..69bae46cb 100644
--- a/ports/stm/boards/STM32F401xd_fs.ld
+++ b/ports/stm/boards/STM32F401xd_fs.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F401xe_boot.ld b/ports/stm/boards/STM32F401xe_boot.ld
index 040947694..37827c330 100644
--- a/ports/stm/boards/STM32F401xe_boot.ld
+++ b/ports/stm/boards/STM32F401xe_boot.ld
@@ -12,7 +12,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F401xe_fs.ld b/ports/stm/boards/STM32F401xe_fs.ld
index b55bc4bb4..20247930c 100644
--- a/ports/stm/boards/STM32F401xe_fs.ld
+++ b/ports/stm/boards/STM32F401xe_fs.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F405_boot.ld b/ports/stm/boards/STM32F405_boot.ld
index 906f56e0d..5768d1a01 100644
--- a/ports/stm/boards/STM32F405_boot.ld
+++ b/ports/stm/boards/STM32F405_boot.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define the top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F405_default.ld b/ports/stm/boards/STM32F405_default.ld
index 0aafdbcac..4c11fd7cf 100644
--- a/ports/stm/boards/STM32F405_default.ld
+++ b/ports/stm/boards/STM32F405_default.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F405_fs.ld b/ports/stm/boards/STM32F405_fs.ld
index bff312660..e6c66127f 100644
--- a/ports/stm/boards/STM32F405_fs.ld
+++ b/ports/stm/boards/STM32F405_fs.ld
@@ -14,7 +14,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F407_fs.ld b/ports/stm/boards/STM32F407_fs.ld
index 5330b4116..f06c19d99 100644
--- a/ports/stm/boards/STM32F407_fs.ld
+++ b/ports/stm/boards/STM32F407_fs.ld
@@ -14,7 +14,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F411_fs.ld b/ports/stm/boards/STM32F411_fs.ld
index 82c7aea06..1b45f235f 100644
--- a/ports/stm/boards/STM32F411_fs.ld
+++ b/ports/stm/boards/STM32F411_fs.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F411_nvm.ld b/ports/stm/boards/STM32F411_nvm.ld
index 897b99631..5ac3e52a6 100644
--- a/ports/stm/boards/STM32F411_nvm.ld
+++ b/ports/stm/boards/STM32F411_nvm.ld
@@ -14,7 +14,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define the top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F412_fs.ld b/ports/stm/boards/STM32F412_fs.ld
index afd51c6b1..8837bd87d 100644
--- a/ports/stm/boards/STM32F412_fs.ld
+++ b/ports/stm/boards/STM32F412_fs.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F746xG_fs.ld b/ports/stm/boards/STM32F746xG_fs.ld
index f1bd3d5dc..be10a1429 100644
--- a/ports/stm/boards/STM32F746xG_fs.ld
+++ b/ports/stm/boards/STM32F746xG_fs.ld
@@ -38,7 +38,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32F767_fs.ld b/ports/stm/boards/STM32F767_fs.ld
index 40e67829b..25322b0b6 100644
--- a/ports/stm/boards/STM32F767_fs.ld
+++ b/ports/stm/boards/STM32F767_fs.ld
@@ -13,7 +13,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K;
 _minimum_heap_size = 16K;
 
 /* Define tho top end of the stack.  The stack is full descending so begins just
diff --git a/ports/stm/boards/STM32H743_fs.ld b/ports/stm/boards/STM32H743_fs.ld
index 251c6cc27..b6c3d5b62 100644
--- a/ports/stm/boards/STM32H743_fs.ld
+++ b/ports/stm/boards/STM32H743_fs.ld
@@ -12,8 +12,8 @@ MEMORY
 {
     FLASH (rx)          : ORIGIN = 0x08000000, LENGTH = 2048K
     FLASH_ISR (rx)      : ORIGIN = 0x08000000, LENGTH = 128K    /* sector 0, 128K */
-    FLASH_FS (r)        : ORIGIN = 0x08020000, LENGTH = 128K    /* sector 1, 128K */
-    FLASH_FIRMWARE (rx) : ORIGIN = 0x08040000, LENGTH = 1792K   /* sectors 6*128 + 8*128 */
+    FLASH_FS (r)        : ORIGIN = 0x08020000, LENGTH = 384K    /* sector 1-3, 128K */
+    FLASH_FIRMWARE (rx) : ORIGIN = 0x08080000, LENGTH = 1536K   /* sectors 4*128 + 8*128 */
     DTCM (xrw)          : ORIGIN = 0x20000000, LENGTH = 128K
     RAM (xrw)           : ORIGIN = 0x24000000, LENGTH = 512K    /* AXI SRAM */
     SRAM_D2 (xrw)       : ORIGIN = 0x30000000, LENGTH = 288K    /* AHB1 SRAM */
@@ -22,7 +22,7 @@ MEMORY
 }
 
 /* produce a link error if there is not this amount of RAM for these sections */
-_minimum_stack_size = 2K;
+_minimum_stack_size = 24K; /*TODO: this can probably be bigger, but how big?*/
 _minimum_heap_size = 16K;
 
 /* brainless copy paste for stack code. Results in ambiguous hard crash */
diff --git a/ports/stm/common-hal/busio/UART.c b/ports/stm/common-hal/busio/UART.c
index 76afa5848..54ac68d73 100644
--- a/ports/stm/common-hal/busio/UART.c
+++ b/ports/stm/common-hal/busio/UART.c
@@ -209,8 +209,7 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
 
     // Init buffer for rx and claim pins
     if (self->rx != NULL) {
-        ringbuf_alloc(&self->rbuf, receiver_buffer_size, true);
-        if (!self->rbuf.buf) {
+        if (!ringbuf_alloc(&self->ringbuf, receiver_buffer_size, true)) {
             mp_raise_ValueError(translate("UART Buffer allocation error"));
         }
         claim_pin(rx);
@@ -246,9 +245,7 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) {
     reset_pin_number(self->rx->pin->port,self->rx->pin->number);
     self->tx = NULL;
     self->rx = NULL;
-    gc_free(self->rbuf.buf);
-    self->rbuf.size = 0;
-    self->rbuf.iput = self->rbuf.iget = 0;
+    ringbuf_free(&self->ringbuf);
 }
 
 size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) {
@@ -256,11 +253,10 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t
         mp_raise_ValueError(translate("No RX pin"));
     }
 
-    size_t rx_bytes = 0;
     uint64_t start_ticks = supervisor_ticks_ms64();
 
     // Wait for all bytes received or timeout, same as nrf
-    while ( (ringbuf_count(&self->rbuf) < len) && (supervisor_ticks_ms64() - start_ticks < self->timeout_ms) ) {
+    while ( (ringbuf_num_filled(&self->ringbuf) < len) && (supervisor_ticks_ms64() - start_ticks < self->timeout_ms) ) {
         RUN_BACKGROUND_TASKS;
         //restart if it failed in the callback
         if (errflag != HAL_OK) {
@@ -274,12 +270,8 @@ size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t
 
     // Halt reception
     HAL_NVIC_DisableIRQ(self->irq);
-    // copy received data
-    rx_bytes = ringbuf_count(&self->rbuf);
-    rx_bytes = MIN(rx_bytes, len);
-    for (uint16_t i = 0; i < rx_bytes; i++) {
-        data[i] = ringbuf_get(&self->rbuf);
-    }
+    // Copy as much received data as available, up to len bytes.
+    size_t rx_bytes = ringbuf_get_n(&self->ringbuf, data, len);
     HAL_NVIC_EnableIRQ(self->irq);
 
     if (rx_bytes == 0) {
@@ -319,7 +311,7 @@ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *handle)
             if ((HAL_UART_GetState(handle) & HAL_UART_STATE_BUSY_RX) == HAL_UART_STATE_BUSY_RX) {
                 return;
             }
-            ringbuf_put_n(&context->rbuf, &context->rx_char, 1);
+            ringbuf_put_n(&context->ringbuf, &context->rx_char, 1);
             errflag = HAL_UART_Receive_IT(handle, &context->rx_char, 1);
 
             return;
@@ -378,13 +370,13 @@ void common_hal_busio_uart_set_timeout(busio_uart_obj_t *self, mp_float_t timeou
 }
 
 uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) {
-    return ringbuf_count(&self->rbuf);
+    return ringbuf_num_filled(&self->ringbuf);
 }
 
 void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) {
     // Halt reception
     HAL_NVIC_DisableIRQ(self->irq);
-    ringbuf_clear(&self->rbuf);
+    ringbuf_clear(&self->ringbuf);
     HAL_NVIC_EnableIRQ(self->irq);
 }
 
diff --git a/ports/stm/common-hal/busio/UART.h b/ports/stm/common-hal/busio/UART.h
index 5ac1d352c..d1971ce27 100644
--- a/ports/stm/common-hal/busio/UART.h
+++ b/ports/stm/common-hal/busio/UART.h
@@ -47,7 +47,7 @@ typedef struct {
     const mcu_periph_obj_t *tx;
     const mcu_periph_obj_t *rx;
 
-    ringbuf_t rbuf;
+    ringbuf_t ringbuf;
     uint8_t rx_char;
 
     uint32_t baudrate;
diff --git a/ports/stm/common-hal/microcontroller/Pin.c b/ports/stm/common-hal/microcontroller/Pin.c
index 5e131c310..610213497 100644
--- a/ports/stm/common-hal/microcontroller/Pin.c
+++ b/ports/stm/common-hal/microcontroller/Pin.c
@@ -134,3 +134,15 @@ GPIO_TypeDef * pin_port(uint8_t pin_port) {
 uint16_t pin_mask(uint8_t pin_number) {
     return 1<<pin_number;
 }
+
+uint8_t common_hal_mcu_pin_number(const mcu_pin_obj_t* pin) {
+    return pin->port * 16 + pin->number;
+}
+
+void common_hal_mcu_pin_claim(const mcu_pin_obj_t* pin) {
+    claim_pin(pin);
+}
+
+void common_hal_mcu_pin_reset_number(uint8_t pin_no) {
+    reset_pin_number(pin_no / 16, pin_no % 16);
+}
diff --git a/ports/stm/common-hal/rgbmatrix/RGBMatrix.c b/ports/stm/common-hal/rgbmatrix/RGBMatrix.c
new file mode 100644
index 000000000..9e60cc3e6
--- /dev/null
+++ b/ports/stm/common-hal/rgbmatrix/RGBMatrix.c
@@ -0,0 +1,54 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stddef.h>
+
+#include "common-hal/rgbmatrix/RGBMatrix.h"
+
+#include STM32_HAL_H
+
+extern void _PM_IRQ_HANDLER(void);
+
+void *common_hal_rgbmatrix_timer_allocate() {
+    // TODO(jepler) properly handle resource allocation including never-reset
+    return TIM6;
+}
+
+
+void common_hal_rgbmatrix_timer_enable(void* ptr) {
+    HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn);
+}
+
+void common_hal_rgbmatrix_timer_disable(void* ptr) {
+    TIM_TypeDef *tim = (TIM_TypeDef*)ptr;
+    tim->DIER &= ~TIM_DIER_UIE;
+    HAL_NVIC_DisableIRQ(TIM6_DAC_IRQn);
+}
+
+void common_hal_rgbmatrix_timer_free(void* ptr) {
+    common_hal_rgbmatrix_timer_disable(ptr);
+    // TODO(jepler) properly handle resource allocation including never-reset
+}
diff --git a/ports/stm/common-hal/rgbmatrix/RGBMatrix.h b/ports/stm/common-hal/rgbmatrix/RGBMatrix.h
new file mode 100644
index 000000000..48de4dcb2
--- /dev/null
+++ b/ports/stm/common-hal/rgbmatrix/RGBMatrix.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020 Jeff Epler for Adafruit Industries
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_RGBMATRIX_RGBMATRIX_H
+#define MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_RGBMATRIX_RGBMATRIX_H
+
+void *common_hal_rgbmatrix_timer_allocate(void);
+void common_hal_rgbmatrix_timer_enable(void*);
+void common_hal_rgbmatrix_timer_disable(void*);
+void common_hal_rgbmatrix_timer_free(void*);
+
+#endif
diff --git a/ports/stm/common-hal/rgbmatrix/__init__.c b/ports/stm/common-hal/rgbmatrix/__init__.c
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/ports/stm/common-hal/rgbmatrix/__init__.c
diff --git a/ports/stm/common-hal/rgbmatrix/__init__.h b/ports/stm/common-hal/rgbmatrix/__init__.h
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/ports/stm/common-hal/rgbmatrix/__init__.h
diff --git a/ports/stm/mpconfigport.mk b/ports/stm/mpconfigport.mk
index ee8b2e160..0c5247d95 100644
--- a/ports/stm/mpconfigport.mk
+++ b/ports/stm/mpconfigport.mk
@@ -3,6 +3,11 @@ LONGINT_IMPL = MPZ
 INTERNAL_LIBM = 1
 USB_SERIAL_NUMBER_LENGTH = 24
 
+ifeq ($(MCU_VARIANT),STM32F405xx)
+	CIRCUITPY_FRAMEBUFFERIO = 1
+	CIRCUITPY_RGBMATRIX = 1
+endif
+
 ifeq ($(MCU_SERIES),F4)
 	# Not yet implemented common-hal modules:
 	CIRCUITPY_AUDIOBUSIO = 0
@@ -23,7 +28,6 @@ ifeq ($(MCU_SERIES),H7)
 	CIRCUITPY_ANALOGIO = 0
 	CIRCUITPY_NEOPIXEL_WRITE = 0
 	CIRCUITPY_PULSEIO = 0
-	CIRCUITPY_OS = 1
 	CIRCUITPY_NVM = 0
 	CIRCUITPY_AUDIOBUSIO = 0
 	CIRCUITPY_AUDIOIO = 0
@@ -32,18 +36,12 @@ ifeq ($(MCU_SERIES),H7)
 	CIRCUITPY_RTC = 0
 	CIRCUITPY_FREQUENCYIO = 0
 	CIRCUITPY_I2CSLAVE = 0
-	# shared-module modules that still need prerequisites filled
-	CIRCUITPY_DISPLAYIO = 0 # Requires SPI, PulseIO, and common-hal module (stub ok)
-	CIRCUITPY_RANDOM = 0	# Requires OS
-	CIRCUITPY_STORAGE = 0	# Requires OS, filesystem
 endif
 
 ifeq ($(MCU_SERIES),F7)
 	# Not yet implemented common-hal modules:
 	CIRCUITPY_ANALOGIO = 0
 	CIRCUITPY_NEOPIXEL_WRITE = 0
-	CIRCUITPY_PULSEIO = 1
-	CIRCUITPY_OS = 1
 	CIRCUITPY_NVM = 0
 	CIRCUITPY_AUDIOBUSIO = 0
 	CIRCUITPY_AUDIOIO = 0
@@ -52,8 +50,4 @@ ifeq ($(MCU_SERIES),F7)
 	CIRCUITPY_RTC = 0
 	CIRCUITPY_FREQUENCYIO = 0
 	CIRCUITPY_I2CSLAVE = 0
-	# shared-module modules that still need prerequisites filled
-	CIRCUITPY_DISPLAYIO = 0 # Requires SPI, PulseIO, and common-hal module (stub ok)
-	CIRCUITPY_RANDOM = 0	# Requires OS
-	CIRCUITPY_STORAGE = 0	# Requires OS, filesystem
 endif
diff --git a/ports/stm/supervisor/internal_flash.h b/ports/stm/supervisor/internal_flash.h
index 97626f9f4..b4d07ff48 100644
--- a/ports/stm/supervisor/internal_flash.h
+++ b/ports/stm/supervisor/internal_flash.h
@@ -83,7 +83,7 @@
 
 #ifdef STM32H743xx
 #define STM32_FLASH_SIZE 0x200000 //2MB
-#define INTERNAL_FLASH_FILESYSTEM_SIZE 0x20000 //128KiB
+#define INTERNAL_FLASH_FILESYSTEM_SIZE 0x60000 //384KiB
 #define INTERNAL_FLASH_FILESYSTEM_START_ADDR 0x08020000
 #endif
 
diff --git a/ports/stm/supervisor/port.c b/ports/stm/supervisor/port.c
index 779348c02..23ba7d874 100644
--- a/ports/stm/supervisor/port.c
+++ b/ports/stm/supervisor/port.c
@@ -49,7 +49,7 @@
 #include STM32_HAL_H
 
 //only enable the Reset Handler overwrite for the H7 for now
-#if defined(STM32H7)
+#if (CPY_STM32H7)
 
 // Device memories must be accessed in order.
 #define DEVICE 2
@@ -153,16 +153,16 @@ __attribute__((used, naked)) void Reset_Handler(void) {
 static RTC_HandleTypeDef _hrtc;
 
 #if BOARD_HAS_LOW_SPEED_CRYSTAL
-#define RTC_CLOCK_FREQUENCY LSE_VALUE
+static uint32_t rtc_clock_frequency = LSE_VALUE;
 #else
-#define RTC_CLOCK_FREQUENCY LSI_VALUE
+static uint32_t rtc_clock_frequency = LSI_VALUE;
 #endif
 
 safe_mode_t port_init(void) {
     HAL_Init();
     __HAL_RCC_SYSCFG_CLK_ENABLE();
 
-    #if defined(STM32F4)
+    #if (CPY_STM32F4)
         __HAL_RCC_PWR_CLK_ENABLE();
     #endif
 
@@ -170,24 +170,70 @@ safe_mode_t port_init(void) {
     stm32_peripherals_gpio_init();
 
     HAL_PWR_EnableBkUpAccess();
+
+    // TODO: move all of this to clocks.c
     #if BOARD_HAS_LOW_SPEED_CRYSTAL
-    __HAL_RCC_LSE_CONFIG(RCC_LSE_ON);
-    while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) {}
+    uint32_t tickstart = HAL_GetTick();
+
+    // H7/F7 untested with LSE, so autofail them until above move is done
+    #if (CPY_STM32F4) 
+    bool lse_setupsuccess = true;
     #else
-    __HAL_RCC_LSI_ENABLE();
+    bool lse_setupsuccess = false;
     #endif
-    #if BOARD_HAS_LOW_SPEED_CRYSTAL
-    __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
+
+    // Update LSE configuration in Backup Domain control register
+    // Requires to enable write access to Backup Domain of necessary
+    // TODO: should be using the HAL OSC initializer, otherwise we'll need
+    // preprocessor defines for every register to account for F7/H7
+    #if (CPY_STM32F4)
+    if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
+    {
+        // Enable write access to Backup domain
+        SET_BIT(PWR->CR, PWR_CR_DBP);
+        // Wait for Backup domain Write protection disable
+        tickstart = HAL_GetTick();
+        while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
+        {
+            if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
+            {
+                lse_setupsuccess = false;
+            }
+        }
+    }
+    #endif
+
+    __HAL_RCC_LSE_CONFIG(RCC_LSE_ON);
+    tickstart = HAL_GetTick();
+    while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) {
+        if((HAL_GetTick() - tickstart ) > LSE_STARTUP_TIMEOUT)
+        {
+            lse_setupsuccess = false;
+            __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
+            __HAL_RCC_LSI_ENABLE();
+            rtc_clock_frequency = LSI_VALUE;
+            break;
+        }
+    }
+
+    if (lse_setupsuccess) {
+        __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
+    } else {
+        __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
+    }
+
     #else
+    __HAL_RCC_LSI_ENABLE();
     __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
     #endif
+
     __HAL_RCC_RTC_ENABLE();
     _hrtc.Instance = RTC;
     _hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
-    // Divide async as little as possible so that we have RTC_CLOCK_FREQUENCY count in subseconds.
+    // Divide async as little as possible so that we have rtc_clock_frequency count in subseconds.
     // This ensures our timing > 1 second is correct.
     _hrtc.Init.AsynchPrediv = 0x0;
-    _hrtc.Init.SynchPrediv = RTC_CLOCK_FREQUENCY - 1;
+    _hrtc.Init.SynchPrediv = rtc_clock_frequency - 1;
     _hrtc.Init.OutPut = RTC_OUTPUT_DISABLE;
 
     HAL_RTC_Init(&_hrtc);
@@ -293,7 +339,7 @@ volatile uint32_t cached_date = 0;
 volatile uint32_t seconds_to_minute = 0;
 volatile uint32_t cached_hours_minutes = 0;
 uint64_t port_get_raw_ticks(uint8_t* subticks) {
-    uint32_t subseconds = RTC_CLOCK_FREQUENCY - (uint32_t)(RTC->SSR);
+    uint32_t subseconds = rtc_clock_frequency - (uint32_t)(RTC->SSR);
     uint32_t time = (uint32_t)(RTC->TR & RTC_TR_RESERVED_MASK);
     uint32_t date = (uint32_t)(RTC->DR & RTC_DR_RESERVED_MASK);
     if (date != cached_date) {
@@ -341,7 +387,7 @@ void RTC_Alarm_IRQHandler(void) {
 
 // Enable 1/1024 second tick.
 void port_enable_tick(void) {
-    HAL_RTCEx_SetWakeUpTimer_IT(&_hrtc, RTC_CLOCK_FREQUENCY / 1024 / 2, RTC_WAKEUPCLOCK_RTCCLK_DIV2);
+    HAL_RTCEx_SetWakeUpTimer_IT(&_hrtc, rtc_clock_frequency / 1024 / 2, RTC_WAKEUPCLOCK_RTCCLK_DIV2);
     HAL_NVIC_SetPriority(RTC_WKUP_IRQn, 1, 0U);
     HAL_NVIC_EnableIRQ(RTC_WKUP_IRQn);
 }
@@ -372,7 +418,7 @@ void port_interrupt_after_ticks(uint32_t ticks) {
         alarm.AlarmMask = RTC_ALARMMASK_ALL;
     }
 
-    alarm.AlarmTime.SubSeconds = RTC_CLOCK_FREQUENCY -
+    alarm.AlarmTime.SubSeconds = rtc_clock_frequency -
                                  ((raw_ticks % 1024) * 32);
     alarm.AlarmTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
     alarm.AlarmTime.StoreOperation = RTC_STOREOPERATION_SET;